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Meng Wang688a8672019-01-29 13:43:33 +08001// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002/*
Xiao Lid8bb93c2020-01-07 12:59:05 +08003 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080016#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070017#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070023#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070024#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -080025#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070026#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070030#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080032#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070033#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +053034#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080035#include "codecs/wcd938x/wcd938x.h"
Kunlei Zhangf61a2312020-02-11 15:37:03 +080036#include "codecs/wcd937x/wcd937x-mbhc.h"
37#include "codecs/wcd937x/wcd937x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070038#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053041#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070042
43#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070044#define __CHIPSET__ "KONA "
45#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
46
47#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070048#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070049#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070050#define SAMPLING_RATE_22P05KHZ 22050
51#define SAMPLING_RATE_32KHZ 32000
52#define SAMPLING_RATE_44P1KHZ 44100
53#define SAMPLING_RATE_48KHZ 48000
54#define SAMPLING_RATE_88P2KHZ 88200
55#define SAMPLING_RATE_96KHZ 96000
56#define SAMPLING_RATE_176P4KHZ 176400
57#define SAMPLING_RATE_192KHZ 192000
58#define SAMPLING_RATE_352P8KHZ 352800
59#define SAMPLING_RATE_384KHZ 384000
60
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -070061#define IS_FRACTIONAL(x) \
62((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
63(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
64(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
65
66#define IS_MSM_INTERFACE_MI2S(x) \
67((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
68
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080069#define WCD9XXX_MBHC_DEF_RLOADS 5
70#define WCD9XXX_MBHC_DEF_BUTTONS 8
71#define CODEC_EXT_CLK_RATE 9600000
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define DEV_NAME_STR_LEN 32
74#define WCD_MBHC_HS_V_MAX 1600
75
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070076#define TDM_CHANNEL_MAX 8
77#define DEV_NAME_STR_LEN 32
78
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80
81#define ADSP_STATE_READY_TIMEOUT_MS 3000
82
Laxminath Kasamd3621032020-04-01 18:14:05 +053083#define WSA8810_NAME_1 "wsa881x.1020170211"
84#define WSA8810_NAME_2 "wsa881x.1020170212"
85#define WSA8815_NAME_1 "wsa881x.1021170213"
86#define WSA8815_NAME_2 "wsa881x.1021170214"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -080087#define WCN_CDC_SLIM_RX_CH_MAX 2
88#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053089#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070090
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +053091#define SWR_MAX_SLAVE_DEVICES 6
92
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070093enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -070094 RX_PATH = 0,
95 TX_PATH,
96 MAX_PATH,
97};
98
99enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700100 TDM_0 = 0,
101 TDM_1,
102 TDM_2,
103 TDM_3,
104 TDM_4,
105 TDM_5,
106 TDM_6,
107 TDM_7,
108 TDM_PORT_MAX,
109};
110
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700111#define TDM_MAX_SLOTS 8
112#define TDM_SLOT_WIDTH_BITS 32
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800113#define TDM_SLOT_WIDTH_BYTES TDM_SLOT_WIDTH_BITS/8
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700114
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700115enum {
116 TDM_PRI = 0,
117 TDM_SEC,
118 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800119 TDM_QUAT,
120 TDM_QUIN,
121 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700122 TDM_INTERFACE_MAX,
123};
124
125enum {
126 PRIM_AUX_PCM = 0,
127 SEC_AUX_PCM,
128 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800129 QUAT_AUX_PCM,
130 QUIN_AUX_PCM,
131 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700132 AUX_PCM_MAX,
133};
134
135enum {
136 PRIM_MI2S = 0,
137 SEC_MI2S,
138 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800139 QUAT_MI2S,
140 QUIN_MI2S,
141 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700142 MI2S_MAX,
143};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700144
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700145enum {
146 WSA_CDC_DMA_RX_0 = 0,
147 WSA_CDC_DMA_RX_1,
148 RX_CDC_DMA_RX_0,
149 RX_CDC_DMA_RX_1,
150 RX_CDC_DMA_RX_2,
151 RX_CDC_DMA_RX_3,
152 RX_CDC_DMA_RX_5,
153 CDC_DMA_RX_MAX,
154};
155
156enum {
157 WSA_CDC_DMA_TX_0 = 0,
158 WSA_CDC_DMA_TX_1,
159 WSA_CDC_DMA_TX_2,
160 TX_CDC_DMA_TX_0,
161 TX_CDC_DMA_TX_3,
162 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800163 VA_CDC_DMA_TX_0,
164 VA_CDC_DMA_TX_1,
165 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700166 CDC_DMA_TX_MAX,
167};
168
Banajit Goswami83a370d2019-03-05 16:15:21 -0800169enum {
170 SLIM_RX_7 = 0,
171 SLIM_RX_MAX,
172};
173enum {
174 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530175 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800176 SLIM_TX_MAX,
177};
178
Meng Wange8e53822019-03-18 10:49:50 +0800179enum {
180 AFE_LOOPBACK_TX_IDX = 0,
181 AFE_LOOPBACK_TX_IDX_MAX,
182};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700183struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700184 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700185 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530186 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700187 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
188 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
189 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800190 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
191 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700192 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
193 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
194 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
195 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
196 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800197 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700198 struct clk *lpass_audio_hw_vote;
199 int core_audio_vote_count;
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +0530200 u32 wsa_max_devs;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800201 u32 tdm_max_slots; /* Max TDM slots used */
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +0530202 int (*get_wsa_dev_num)(struct snd_soc_component*);
203 struct afe_cps_hw_intf_cfg cps_config;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700204};
205
206struct tdm_port {
207 u32 mode;
208 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700209};
210
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700211struct tdm_dev_config {
212 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
213};
214
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800215enum {
216 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700217 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800218 EXT_DISP_RX_IDX_MAX,
219};
220
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700221struct msm_wsa881x_dev_info {
222 struct device_node *of_node;
223 u32 index;
224};
225
226struct aux_codec_dev_info {
227 struct device_node *of_node;
228 u32 index;
229};
230
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700231struct dev_config {
232 u32 sample_rate;
233 u32 bit_format;
234 u32 channels;
235};
236
Banajit Goswami83a370d2019-03-05 16:15:21 -0800237/* Default configuration of slimbus channels */
238static struct dev_config slim_rx_cfg[] = {
239 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
240};
241
242static struct dev_config slim_tx_cfg[] = {
243 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530244 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800245};
246
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800247/* Default configuration of external display BE */
248static struct dev_config ext_disp_rx_cfg[] = {
249 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700250 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800251};
252
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700253static struct dev_config usb_rx_cfg = {
254 .sample_rate = SAMPLING_RATE_48KHZ,
255 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
256 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700257};
258
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700259static struct dev_config usb_tx_cfg = {
260 .sample_rate = SAMPLING_RATE_48KHZ,
261 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
262 .channels = 1,
263};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700264
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700265static struct dev_config proxy_rx_cfg = {
266 .sample_rate = SAMPLING_RATE_48KHZ,
267 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
268 .channels = 2,
269};
270
271static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
272 {
273 AFE_API_VERSION_I2S_CONFIG,
274 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
275 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
276 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
277 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
278 0,
279 },
280 {
281 AFE_API_VERSION_I2S_CONFIG,
282 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
283 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
284 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
285 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
286 0,
287 },
288 {
289 AFE_API_VERSION_I2S_CONFIG,
290 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
291 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
292 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
293 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
294 0,
295 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800296 {
297 AFE_API_VERSION_I2S_CONFIG,
298 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
299 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
300 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
301 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
302 0,
303 },
304 {
305 AFE_API_VERSION_I2S_CONFIG,
306 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
307 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
308 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
309 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
310 0,
311 },
312 {
313 AFE_API_VERSION_I2S_CONFIG,
314 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
315 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
316 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
317 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
318 0,
319 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700320};
321
322struct mi2s_conf {
323 struct mutex lock;
324 u32 ref_cnt;
325 u32 msm_is_mi2s_master;
326};
327
328static u32 mi2s_ebit_clk[MI2S_MAX] = {
329 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
330 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
331 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
332};
333
334static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
335
336/* Default configuration of TDM channels */
337static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
338 { /* PRI TDM */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
347 },
348 { /* SEC TDM */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
357 },
358 { /* TERT TDM */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
367 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800368 { /* QUAT TDM */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
377 },
378 { /* QUIN TDM */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
387 },
388 { /* SEN TDM */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
397 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700398};
399
400static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
401 { /* PRI TDM */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
410 },
411 { /* SEC TDM */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
420 },
421 { /* TERT TDM */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
429 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
430 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800431 { /* QUAT TDM */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
439 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
440 },
441 { /* QUIN TDM */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
449 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
450 },
451 { /* SEN TDM */
452 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
453 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
454 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
455 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
456 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
457 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
458 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
459 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
460 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700461};
462
463/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700464static struct dev_config aux_pcm_rx_cfg[] = {
465 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700466 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800468 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
469 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
470 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700471};
472
473static struct dev_config aux_pcm_tx_cfg[] = {
474 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700475 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
476 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800477 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
478 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
479 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700480};
481
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700482/* Default configuration of MI2S channels */
483static struct dev_config mi2s_rx_cfg[] = {
484 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
485 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
486 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800487 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
488 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
489 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700490};
491
492static struct dev_config mi2s_tx_cfg[] = {
493 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
494 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
495 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800496 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
497 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
498 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700499};
500
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700501static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
502 { /* PRI TDM */
503 { {0, 4, 0xFFFF} }, /* RX_0 */
504 { {8, 12, 0xFFFF} }, /* RX_1 */
505 { {16, 20, 0xFFFF} }, /* RX_2 */
506 { {24, 28, 0xFFFF} }, /* RX_3 */
507 { {0xFFFF} }, /* RX_4 */
508 { {0xFFFF} }, /* RX_5 */
509 { {0xFFFF} }, /* RX_6 */
510 { {0xFFFF} }, /* RX_7 */
511 },
512 {
513 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
514 { {8, 12, 0xFFFF} }, /* TX_1 */
515 { {16, 20, 0xFFFF} }, /* TX_2 */
516 { {24, 28, 0xFFFF} }, /* TX_3 */
517 { {0xFFFF} }, /* TX_4 */
518 { {0xFFFF} }, /* TX_5 */
519 { {0xFFFF} }, /* TX_6 */
520 { {0xFFFF} }, /* TX_7 */
521 },
522};
523
524static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
525 { /* SEC TDM */
526 { {0, 4, 0xFFFF} }, /* RX_0 */
527 { {8, 12, 0xFFFF} }, /* RX_1 */
528 { {16, 20, 0xFFFF} }, /* RX_2 */
529 { {24, 28, 0xFFFF} }, /* RX_3 */
530 { {0xFFFF} }, /* RX_4 */
531 { {0xFFFF} }, /* RX_5 */
532 { {0xFFFF} }, /* RX_6 */
533 { {0xFFFF} }, /* RX_7 */
534 },
535 {
536 { {0, 4, 0xFFFF} }, /* TX_0 */
537 { {8, 12, 0xFFFF} }, /* TX_1 */
538 { {16, 20, 0xFFFF} }, /* TX_2 */
539 { {24, 28, 0xFFFF} }, /* TX_3 */
540 { {0xFFFF} }, /* TX_4 */
541 { {0xFFFF} }, /* TX_5 */
542 { {0xFFFF} }, /* TX_6 */
543 { {0xFFFF} }, /* TX_7 */
544 },
545};
546
547static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
548 { /* TERT TDM */
549 { {0, 4, 0xFFFF} }, /* RX_0 */
550 { {8, 12, 0xFFFF} }, /* RX_1 */
551 { {16, 20, 0xFFFF} }, /* RX_2 */
552 { {24, 28, 0xFFFF} }, /* RX_3 */
553 { {0xFFFF} }, /* RX_4 */
554 { {0xFFFF} }, /* RX_5 */
555 { {0xFFFF} }, /* RX_6 */
556 { {0xFFFF} }, /* RX_7 */
557 },
558 {
559 { {0, 4, 0xFFFF} }, /* TX_0 */
560 { {8, 12, 0xFFFF} }, /* TX_1 */
561 { {16, 20, 0xFFFF} }, /* TX_2 */
562 { {24, 28, 0xFFFF} }, /* TX_3 */
563 { {0xFFFF} }, /* TX_4 */
564 { {0xFFFF} }, /* TX_5 */
565 { {0xFFFF} }, /* TX_6 */
566 { {0xFFFF} }, /* TX_7 */
567 },
568};
569
570static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
571 { /* QUAT TDM */
572 { {0, 4, 0xFFFF} }, /* RX_0 */
573 { {8, 12, 0xFFFF} }, /* RX_1 */
574 { {16, 20, 0xFFFF} }, /* RX_2 */
575 { {24, 28, 0xFFFF} }, /* RX_3 */
576 { {0xFFFF} }, /* RX_4 */
577 { {0xFFFF} }, /* RX_5 */
578 { {0xFFFF} }, /* RX_6 */
579 { {0xFFFF} }, /* RX_7 */
580 },
581 {
582 { {0, 4, 0xFFFF} }, /* TX_0 */
583 { {8, 12, 0xFFFF} }, /* TX_1 */
584 { {16, 20, 0xFFFF} }, /* TX_2 */
585 { {24, 28, 0xFFFF} }, /* TX_3 */
586 { {0xFFFF} }, /* TX_4 */
587 { {0xFFFF} }, /* TX_5 */
588 { {0xFFFF} }, /* TX_6 */
589 { {0xFFFF} }, /* TX_7 */
590 },
591};
592
593static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
594 { /* QUIN TDM */
595 { {0, 4, 0xFFFF} }, /* RX_0 */
596 { {8, 12, 0xFFFF} }, /* RX_1 */
597 { {16, 20, 0xFFFF} }, /* RX_2 */
598 { {24, 28, 0xFFFF} }, /* RX_3 */
599 { {0xFFFF} }, /* RX_4 */
600 { {0xFFFF} }, /* RX_5 */
601 { {0xFFFF} }, /* RX_6 */
602 { {0xFFFF} }, /* RX_7 */
603 },
604 {
605 { {0, 4, 0xFFFF} }, /* TX_0 */
606 { {8, 12, 0xFFFF} }, /* TX_1 */
607 { {16, 20, 0xFFFF} }, /* TX_2 */
608 { {24, 28, 0xFFFF} }, /* TX_3 */
609 { {0xFFFF} }, /* TX_4 */
610 { {0xFFFF} }, /* TX_5 */
611 { {0xFFFF} }, /* TX_6 */
612 { {0xFFFF} }, /* TX_7 */
613 },
614};
615
616static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
617 { /* SEN TDM */
618 { {0, 4, 0xFFFF} }, /* RX_0 */
619 { {8, 12, 0xFFFF} }, /* RX_1 */
620 { {16, 20, 0xFFFF} }, /* RX_2 */
621 { {24, 28, 0xFFFF} }, /* RX_3 */
622 { {0xFFFF} }, /* RX_4 */
623 { {0xFFFF} }, /* RX_5 */
624 { {0xFFFF} }, /* RX_6 */
625 { {0xFFFF} }, /* RX_7 */
626 },
627 {
628 { {0, 4, 0xFFFF} }, /* TX_0 */
629 { {8, 12, 0xFFFF} }, /* TX_1 */
630 { {16, 20, 0xFFFF} }, /* TX_2 */
631 { {24, 28, 0xFFFF} }, /* TX_3 */
632 { {0xFFFF} }, /* TX_4 */
633 { {0xFFFF} }, /* TX_5 */
634 { {0xFFFF} }, /* TX_6 */
635 { {0xFFFF} }, /* TX_7 */
636 },
637};
638
639static void *tdm_cfg[TDM_INTERFACE_MAX] = {
640 pri_tdm_dev_config,
641 sec_tdm_dev_config,
642 tert_tdm_dev_config,
643 quat_tdm_dev_config,
644 quin_tdm_dev_config,
645 sen_tdm_dev_config,
646};
647
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700648/* Default configuration of Codec DMA Interface RX */
649static struct dev_config cdc_dma_rx_cfg[] = {
650 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
651 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
653 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
655 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
656 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
657};
658
659/* Default configuration of Codec DMA Interface TX */
660static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530661 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700662 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
663 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
664 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
665 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
666 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800667 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
668 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
669 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700670};
671
Meng Wange8e53822019-03-18 10:49:50 +0800672static struct dev_config afe_loopback_tx_cfg[] = {
673 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
674};
675
Meng Wangd1db67c2019-04-17 12:41:34 +0800676static int msm_vi_feed_tx_ch = 2;
677static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700678static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
679 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700680static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700681static char const *ch_text[] = {"Two", "Three", "Four", "Five",
682 "Six", "Seven", "Eight"};
683static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
684 "KHZ_16", "KHZ_22P05",
685 "KHZ_32", "KHZ_44P1", "KHZ_48",
686 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
687 "KHZ_192", "KHZ_352P8", "KHZ_384"};
688static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
689 "Five", "Six", "Seven",
690 "Eight"};
691static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
692 "KHZ_48", "KHZ_176P4",
693 "KHZ_352P8"};
694static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
695static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
696 "Five", "Six", "Seven", "Eight"};
697static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
698static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
699 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700700 "KHZ_48", "KHZ_88P2", "KHZ_96",
701 "KHZ_176P4", "KHZ_192","KHZ_352P8",
702 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700703static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
704 "Five", "Six", "Seven",
705 "Eight"};
706
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700707static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
708static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
709 "Five", "Six", "Seven",
710 "Eight"};
711static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
712 "KHZ_16", "KHZ_22P05",
713 "KHZ_32", "KHZ_44P1", "KHZ_48",
714 "KHZ_88P2", "KHZ_96",
715 "KHZ_176P4", "KHZ_192",
716 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700717static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
718 "KHZ_16", "KHZ_22P05",
719 "KHZ_32", "KHZ_44P1", "KHZ_48",
720 "KHZ_88P2", "KHZ_96",
721 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800722static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
723 "S24_3LE"};
724static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
725 "KHZ_192", "KHZ_32", "KHZ_44P1",
726 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800727static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
728 "KHZ_44P1", "KHZ_48",
729 "KHZ_88P2", "KHZ_96"};
730static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
731 "KHZ_44P1", "KHZ_48",
732 "KHZ_88P2", "KHZ_96"};
733static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
734 "KHZ_44P1", "KHZ_48",
735 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800736static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700737
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700738static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
739static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
740static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
741static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
742static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
743static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800744static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700745static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
746static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
747static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
748static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
749static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
750static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
751static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700752static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700753static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
754static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800755static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
757static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700758static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700759static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
760static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800761static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700764static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
765static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700766static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
767static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
768static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800769static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
770static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
771static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700772static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
773static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
774static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800775static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
776static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
777static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700778static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
779static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
780static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
781static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800783static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700786static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800789static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700792static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
797static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
798static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
800static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
801static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
802static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
803static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
804static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800805static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
806static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
807static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700808static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
809static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700810static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
812static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
813static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
814static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800815static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
816static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
817static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700818static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
819 cdc_dma_sample_rate_text);
820static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
821 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700822static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
823 cdc_dma_sample_rate_text);
824static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
825 cdc_dma_sample_rate_text);
826static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
827 cdc_dma_sample_rate_text);
828static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
829 cdc_dma_sample_rate_text);
830static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
831 cdc_dma_sample_rate_text);
832static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
833 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800834static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
835 cdc_dma_sample_rate_text);
836static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
837 cdc_dma_sample_rate_text);
838static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
839 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700840
841/* WCD9380 */
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
843static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
845static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
848 cdc80_dma_sample_rate_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
850 cdc80_dma_sample_rate_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
852 cdc80_dma_sample_rate_text);
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
854 cdc80_dma_sample_rate_text);
855static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
856 cdc80_dma_sample_rate_text);
857/* WCD9385 */
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
859static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
861static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
862static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
863static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
864 cdc_dma_sample_rate_text);
865static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
866 cdc_dma_sample_rate_text);
867static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
868 cdc_dma_sample_rate_text);
869static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
870 cdc_dma_sample_rate_text);
871static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
872 cdc_dma_sample_rate_text);
873
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800874/* WCD937x */
875static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
876static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
877static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
878static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
879static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
880static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
881 cdc_dma_sample_rate_text);
882static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
883 cdc_dma_sample_rate_text);
884static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
885 cdc_dma_sample_rate_text);
886static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
887 cdc_dma_sample_rate_text);
888static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
889 cdc_dma_sample_rate_text);
890
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800891static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
892static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
893static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
894 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800895static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
896static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
897static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800898static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700899
900static bool is_initial_boot;
901static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700902static struct snd_soc_aux_dev *msm_aux_dev;
903static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700904static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700905static int dmic_0_1_gpio_cnt;
906static int dmic_2_3_gpio_cnt;
907static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700908
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800909static void *def_wcd_mbhc_cal(void);
910
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700911/*
912 * Need to report LINEIN
913 * if R/L channel impedance is larger than 5K ohm
914 */
915static struct wcd_mbhc_config wcd_mbhc_cfg = {
916 .read_fw_bin = false,
917 .calibration = NULL,
918 .detect_extn_cable = true,
919 .mono_stero_detection = false,
920 .swap_gnd_mic = NULL,
921 .hs_ext_micbias = true,
922 .key_code[0] = KEY_MEDIA,
923 .key_code[1] = KEY_VOICECOMMAND,
924 .key_code[2] = KEY_VOLUMEUP,
925 .key_code[3] = KEY_VOLUMEDOWN,
926 .key_code[4] = 0,
927 .key_code[5] = 0,
928 .key_code[6] = 0,
929 .key_code[7] = 0,
930 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530931 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700932 .mbhc_micbias = MIC_BIAS_2,
933 .anc_micbias = MIC_BIAS_2,
934 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530935 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700936};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700937
938static inline int param_is_mask(int p)
939{
940 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
941 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
942}
943
944static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
945 int n)
946{
947 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
948}
949
950static void param_set_mask(struct snd_pcm_hw_params *p, int n,
951 unsigned int bit)
952{
953 if (bit >= SNDRV_MASK_MAX)
954 return;
955 if (param_is_mask(n)) {
956 struct snd_mask *m = param_to_mask(p, n);
957
958 m->bits[0] = 0;
959 m->bits[1] = 0;
960 m->bits[bit >> 5] |= (1 << (bit & 31));
961 }
962}
963
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700964static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
965 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700966{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700967 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700968
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700969 switch (usb_rx_cfg.sample_rate) {
970 case SAMPLING_RATE_384KHZ:
971 sample_rate_val = 12;
972 break;
973 case SAMPLING_RATE_352P8KHZ:
974 sample_rate_val = 11;
975 break;
976 case SAMPLING_RATE_192KHZ:
977 sample_rate_val = 10;
978 break;
979 case SAMPLING_RATE_176P4KHZ:
980 sample_rate_val = 9;
981 break;
982 case SAMPLING_RATE_96KHZ:
983 sample_rate_val = 8;
984 break;
985 case SAMPLING_RATE_88P2KHZ:
986 sample_rate_val = 7;
987 break;
988 case SAMPLING_RATE_48KHZ:
989 sample_rate_val = 6;
990 break;
991 case SAMPLING_RATE_44P1KHZ:
992 sample_rate_val = 5;
993 break;
994 case SAMPLING_RATE_32KHZ:
995 sample_rate_val = 4;
996 break;
997 case SAMPLING_RATE_22P05KHZ:
998 sample_rate_val = 3;
999 break;
1000 case SAMPLING_RATE_16KHZ:
1001 sample_rate_val = 2;
1002 break;
1003 case SAMPLING_RATE_11P025KHZ:
1004 sample_rate_val = 1;
1005 break;
1006 case SAMPLING_RATE_8KHZ:
1007 default:
1008 sample_rate_val = 0;
1009 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001010 }
1011
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001012 ucontrol->value.integer.value[0] = sample_rate_val;
1013 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1014 usb_rx_cfg.sample_rate);
1015 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001016}
1017
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001018static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1019 struct snd_ctl_elem_value *ucontrol)
1020{
1021 switch (ucontrol->value.integer.value[0]) {
1022 case 12:
1023 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1024 break;
1025 case 11:
1026 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1027 break;
1028 case 10:
1029 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1030 break;
1031 case 9:
1032 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1033 break;
1034 case 8:
1035 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1036 break;
1037 case 7:
1038 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1039 break;
1040 case 6:
1041 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1042 break;
1043 case 5:
1044 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1045 break;
1046 case 4:
1047 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1048 break;
1049 case 3:
1050 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1051 break;
1052 case 2:
1053 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1054 break;
1055 case 1:
1056 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1057 break;
1058 case 0:
1059 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1060 break;
1061 default:
1062 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1063 break;
1064 }
1065
1066 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1067 __func__, ucontrol->value.integer.value[0],
1068 usb_rx_cfg.sample_rate);
1069 return 0;
1070}
1071
1072static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 int sample_rate_val = 0;
1076
1077 switch (usb_tx_cfg.sample_rate) {
1078 case SAMPLING_RATE_384KHZ:
1079 sample_rate_val = 12;
1080 break;
1081 case SAMPLING_RATE_352P8KHZ:
1082 sample_rate_val = 11;
1083 break;
1084 case SAMPLING_RATE_192KHZ:
1085 sample_rate_val = 10;
1086 break;
1087 case SAMPLING_RATE_176P4KHZ:
1088 sample_rate_val = 9;
1089 break;
1090 case SAMPLING_RATE_96KHZ:
1091 sample_rate_val = 8;
1092 break;
1093 case SAMPLING_RATE_88P2KHZ:
1094 sample_rate_val = 7;
1095 break;
1096 case SAMPLING_RATE_48KHZ:
1097 sample_rate_val = 6;
1098 break;
1099 case SAMPLING_RATE_44P1KHZ:
1100 sample_rate_val = 5;
1101 break;
1102 case SAMPLING_RATE_32KHZ:
1103 sample_rate_val = 4;
1104 break;
1105 case SAMPLING_RATE_22P05KHZ:
1106 sample_rate_val = 3;
1107 break;
1108 case SAMPLING_RATE_16KHZ:
1109 sample_rate_val = 2;
1110 break;
1111 case SAMPLING_RATE_11P025KHZ:
1112 sample_rate_val = 1;
1113 break;
1114 case SAMPLING_RATE_8KHZ:
1115 sample_rate_val = 0;
1116 break;
1117 default:
1118 sample_rate_val = 6;
1119 break;
1120 }
1121
1122 ucontrol->value.integer.value[0] = sample_rate_val;
1123 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1124 usb_tx_cfg.sample_rate);
1125 return 0;
1126}
1127
1128static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1129 struct snd_ctl_elem_value *ucontrol)
1130{
1131 switch (ucontrol->value.integer.value[0]) {
1132 case 12:
1133 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1134 break;
1135 case 11:
1136 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1137 break;
1138 case 10:
1139 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1140 break;
1141 case 9:
1142 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1143 break;
1144 case 8:
1145 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1146 break;
1147 case 7:
1148 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1149 break;
1150 case 6:
1151 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1152 break;
1153 case 5:
1154 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1155 break;
1156 case 4:
1157 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1158 break;
1159 case 3:
1160 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1161 break;
1162 case 2:
1163 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1164 break;
1165 case 1:
1166 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1167 break;
1168 case 0:
1169 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1170 break;
1171 default:
1172 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1173 break;
1174 }
1175
1176 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1177 __func__, ucontrol->value.integer.value[0],
1178 usb_tx_cfg.sample_rate);
1179 return 0;
1180}
Meng Wange8e53822019-03-18 10:49:50 +08001181static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1182 struct snd_ctl_elem_value *ucontrol)
1183{
1184 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1185 afe_loopback_tx_cfg[0].channels);
1186 ucontrol->value.enumerated.item[0] =
1187 afe_loopback_tx_cfg[0].channels - 1;
1188
1189 return 0;
1190}
1191
1192static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1193 struct snd_ctl_elem_value *ucontrol)
1194{
1195 afe_loopback_tx_cfg[0].channels =
1196 ucontrol->value.enumerated.item[0] + 1;
1197 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1198 afe_loopback_tx_cfg[0].channels);
1199
1200 return 1;
1201}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001202
1203static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1204 struct snd_ctl_elem_value *ucontrol)
1205{
1206 switch (usb_rx_cfg.bit_format) {
1207 case SNDRV_PCM_FORMAT_S32_LE:
1208 ucontrol->value.integer.value[0] = 3;
1209 break;
1210 case SNDRV_PCM_FORMAT_S24_3LE:
1211 ucontrol->value.integer.value[0] = 2;
1212 break;
1213 case SNDRV_PCM_FORMAT_S24_LE:
1214 ucontrol->value.integer.value[0] = 1;
1215 break;
1216 case SNDRV_PCM_FORMAT_S16_LE:
1217 default:
1218 ucontrol->value.integer.value[0] = 0;
1219 break;
1220 }
1221
1222 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1223 __func__, usb_rx_cfg.bit_format,
1224 ucontrol->value.integer.value[0]);
1225 return 0;
1226}
1227
1228static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1229 struct snd_ctl_elem_value *ucontrol)
1230{
1231 int rc = 0;
1232
1233 switch (ucontrol->value.integer.value[0]) {
1234 case 3:
1235 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1236 break;
1237 case 2:
1238 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1239 break;
1240 case 1:
1241 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1242 break;
1243 case 0:
1244 default:
1245 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1246 break;
1247 }
1248 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1249 __func__, usb_rx_cfg.bit_format,
1250 ucontrol->value.integer.value[0]);
1251
1252 return rc;
1253}
1254
1255static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1256 struct snd_ctl_elem_value *ucontrol)
1257{
1258 switch (usb_tx_cfg.bit_format) {
1259 case SNDRV_PCM_FORMAT_S32_LE:
1260 ucontrol->value.integer.value[0] = 3;
1261 break;
1262 case SNDRV_PCM_FORMAT_S24_3LE:
1263 ucontrol->value.integer.value[0] = 2;
1264 break;
1265 case SNDRV_PCM_FORMAT_S24_LE:
1266 ucontrol->value.integer.value[0] = 1;
1267 break;
1268 case SNDRV_PCM_FORMAT_S16_LE:
1269 default:
1270 ucontrol->value.integer.value[0] = 0;
1271 break;
1272 }
1273
1274 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1275 __func__, usb_tx_cfg.bit_format,
1276 ucontrol->value.integer.value[0]);
1277 return 0;
1278}
1279
1280static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1281 struct snd_ctl_elem_value *ucontrol)
1282{
1283 int rc = 0;
1284
1285 switch (ucontrol->value.integer.value[0]) {
1286 case 3:
1287 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1288 break;
1289 case 2:
1290 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1291 break;
1292 case 1:
1293 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1294 break;
1295 case 0:
1296 default:
1297 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1298 break;
1299 }
1300 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1301 __func__, usb_tx_cfg.bit_format,
1302 ucontrol->value.integer.value[0]);
1303
1304 return rc;
1305}
1306
1307static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1308 struct snd_ctl_elem_value *ucontrol)
1309{
1310 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1311 usb_rx_cfg.channels);
1312 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1313 return 0;
1314}
1315
1316static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1318{
1319 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1320
1321 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1322 return 1;
1323}
1324
1325static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1326 struct snd_ctl_elem_value *ucontrol)
1327{
1328 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1329 usb_tx_cfg.channels);
1330 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1331 return 0;
1332}
1333
1334static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1335 struct snd_ctl_elem_value *ucontrol)
1336{
1337 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1338
1339 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1340 return 1;
1341}
1342
Meng Wangd1db67c2019-04-17 12:41:34 +08001343static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1344 struct snd_ctl_elem_value *ucontrol)
1345{
1346 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1347 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1348 ucontrol->value.integer.value[0]);
1349 return 0;
1350}
1351
1352static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1353 struct snd_ctl_elem_value *ucontrol)
1354{
1355 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1356 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1357 return 1;
1358}
1359
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001360static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1361{
1362 int idx = 0;
1363
1364 if (strnstr(kcontrol->id.name, "Display Port RX",
1365 sizeof("Display Port RX"))) {
1366 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07001367 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1368 sizeof("Display Port1 RX"))) {
1369 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001370 } else {
1371 pr_err("%s: unsupported BE: %s\n",
1372 __func__, kcontrol->id.name);
1373 idx = -EINVAL;
1374 }
1375
1376 return idx;
1377}
1378
1379static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1380 struct snd_ctl_elem_value *ucontrol)
1381{
1382 int idx = ext_disp_get_port_idx(kcontrol);
1383
1384 if (idx < 0)
1385 return idx;
1386
1387 switch (ext_disp_rx_cfg[idx].bit_format) {
1388 case SNDRV_PCM_FORMAT_S24_3LE:
1389 ucontrol->value.integer.value[0] = 2;
1390 break;
1391 case SNDRV_PCM_FORMAT_S24_LE:
1392 ucontrol->value.integer.value[0] = 1;
1393 break;
1394 case SNDRV_PCM_FORMAT_S16_LE:
1395 default:
1396 ucontrol->value.integer.value[0] = 0;
1397 break;
1398 }
1399
1400 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1401 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1402 ucontrol->value.integer.value[0]);
1403 return 0;
1404}
1405
1406static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1407 struct snd_ctl_elem_value *ucontrol)
1408{
1409 int idx = ext_disp_get_port_idx(kcontrol);
1410
1411 if (idx < 0)
1412 return idx;
1413
1414 switch (ucontrol->value.integer.value[0]) {
1415 case 2:
1416 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1417 break;
1418 case 1:
1419 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1420 break;
1421 case 0:
1422 default:
1423 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1424 break;
1425 }
1426 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1427 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1428 ucontrol->value.integer.value[0]);
1429
1430 return 0;
1431}
1432
1433static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1434 struct snd_ctl_elem_value *ucontrol)
1435{
1436 int idx = ext_disp_get_port_idx(kcontrol);
1437
1438 if (idx < 0)
1439 return idx;
1440
1441 ucontrol->value.integer.value[0] =
1442 ext_disp_rx_cfg[idx].channels - 2;
1443
1444 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1445 idx, ext_disp_rx_cfg[idx].channels);
1446
1447 return 0;
1448}
1449
1450static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1451 struct snd_ctl_elem_value *ucontrol)
1452{
1453 int idx = ext_disp_get_port_idx(kcontrol);
1454
1455 if (idx < 0)
1456 return idx;
1457
1458 ext_disp_rx_cfg[idx].channels =
1459 ucontrol->value.integer.value[0] + 2;
1460
1461 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1462 idx, ext_disp_rx_cfg[idx].channels);
1463 return 1;
1464}
1465
1466static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1467 struct snd_ctl_elem_value *ucontrol)
1468{
1469 int sample_rate_val;
1470 int idx = ext_disp_get_port_idx(kcontrol);
1471
1472 if (idx < 0)
1473 return idx;
1474
1475 switch (ext_disp_rx_cfg[idx].sample_rate) {
1476 case SAMPLING_RATE_176P4KHZ:
1477 sample_rate_val = 6;
1478 break;
1479
1480 case SAMPLING_RATE_88P2KHZ:
1481 sample_rate_val = 5;
1482 break;
1483
1484 case SAMPLING_RATE_44P1KHZ:
1485 sample_rate_val = 4;
1486 break;
1487
1488 case SAMPLING_RATE_32KHZ:
1489 sample_rate_val = 3;
1490 break;
1491
1492 case SAMPLING_RATE_192KHZ:
1493 sample_rate_val = 2;
1494 break;
1495
1496 case SAMPLING_RATE_96KHZ:
1497 sample_rate_val = 1;
1498 break;
1499
1500 case SAMPLING_RATE_48KHZ:
1501 default:
1502 sample_rate_val = 0;
1503 break;
1504 }
1505
1506 ucontrol->value.integer.value[0] = sample_rate_val;
1507 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1508 idx, ext_disp_rx_cfg[idx].sample_rate);
1509
1510 return 0;
1511}
1512
1513static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1514 struct snd_ctl_elem_value *ucontrol)
1515{
1516 int idx = ext_disp_get_port_idx(kcontrol);
1517
1518 if (idx < 0)
1519 return idx;
1520
1521 switch (ucontrol->value.integer.value[0]) {
1522 case 6:
1523 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1524 break;
1525 case 5:
1526 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1527 break;
1528 case 4:
1529 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1530 break;
1531 case 3:
1532 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1533 break;
1534 case 2:
1535 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1536 break;
1537 case 1:
1538 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1539 break;
1540 case 0:
1541 default:
1542 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1543 break;
1544 }
1545
1546 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1547 __func__, ucontrol->value.integer.value[0], idx,
1548 ext_disp_rx_cfg[idx].sample_rate);
1549 return 0;
1550}
1551
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001552static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1553 struct snd_ctl_elem_value *ucontrol)
1554{
1555 pr_debug("%s: proxy_rx channels = %d\n",
1556 __func__, proxy_rx_cfg.channels);
1557 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1558
1559 return 0;
1560}
1561
1562static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1563 struct snd_ctl_elem_value *ucontrol)
1564{
1565 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1566 pr_debug("%s: proxy_rx channels = %d\n",
1567 __func__, proxy_rx_cfg.channels);
1568
1569 return 1;
1570}
1571
1572static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1573 struct tdm_port *port)
1574{
1575 if (port) {
1576 if (strnstr(kcontrol->id.name, "PRI",
1577 sizeof(kcontrol->id.name))) {
1578 port->mode = TDM_PRI;
1579 } else if (strnstr(kcontrol->id.name, "SEC",
1580 sizeof(kcontrol->id.name))) {
1581 port->mode = TDM_SEC;
1582 } else if (strnstr(kcontrol->id.name, "TERT",
1583 sizeof(kcontrol->id.name))) {
1584 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001585 } else if (strnstr(kcontrol->id.name, "QUAT",
1586 sizeof(kcontrol->id.name))) {
1587 port->mode = TDM_QUAT;
1588 } else if (strnstr(kcontrol->id.name, "QUIN",
1589 sizeof(kcontrol->id.name))) {
1590 port->mode = TDM_QUIN;
1591 } else if (strnstr(kcontrol->id.name, "SEN",
1592 sizeof(kcontrol->id.name))) {
1593 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001594 } else {
1595 pr_err("%s: unsupported mode in: %s\n",
1596 __func__, kcontrol->id.name);
1597 return -EINVAL;
1598 }
1599
1600 if (strnstr(kcontrol->id.name, "RX_0",
1601 sizeof(kcontrol->id.name)) ||
1602 strnstr(kcontrol->id.name, "TX_0",
1603 sizeof(kcontrol->id.name))) {
1604 port->channel = TDM_0;
1605 } else if (strnstr(kcontrol->id.name, "RX_1",
1606 sizeof(kcontrol->id.name)) ||
1607 strnstr(kcontrol->id.name, "TX_1",
1608 sizeof(kcontrol->id.name))) {
1609 port->channel = TDM_1;
1610 } else if (strnstr(kcontrol->id.name, "RX_2",
1611 sizeof(kcontrol->id.name)) ||
1612 strnstr(kcontrol->id.name, "TX_2",
1613 sizeof(kcontrol->id.name))) {
1614 port->channel = TDM_2;
1615 } else if (strnstr(kcontrol->id.name, "RX_3",
1616 sizeof(kcontrol->id.name)) ||
1617 strnstr(kcontrol->id.name, "TX_3",
1618 sizeof(kcontrol->id.name))) {
1619 port->channel = TDM_3;
1620 } else if (strnstr(kcontrol->id.name, "RX_4",
1621 sizeof(kcontrol->id.name)) ||
1622 strnstr(kcontrol->id.name, "TX_4",
1623 sizeof(kcontrol->id.name))) {
1624 port->channel = TDM_4;
1625 } else if (strnstr(kcontrol->id.name, "RX_5",
1626 sizeof(kcontrol->id.name)) ||
1627 strnstr(kcontrol->id.name, "TX_5",
1628 sizeof(kcontrol->id.name))) {
1629 port->channel = TDM_5;
1630 } else if (strnstr(kcontrol->id.name, "RX_6",
1631 sizeof(kcontrol->id.name)) ||
1632 strnstr(kcontrol->id.name, "TX_6",
1633 sizeof(kcontrol->id.name))) {
1634 port->channel = TDM_6;
1635 } else if (strnstr(kcontrol->id.name, "RX_7",
1636 sizeof(kcontrol->id.name)) ||
1637 strnstr(kcontrol->id.name, "TX_7",
1638 sizeof(kcontrol->id.name))) {
1639 port->channel = TDM_7;
1640 } else {
1641 pr_err("%s: unsupported channel in: %s\n",
1642 __func__, kcontrol->id.name);
1643 return -EINVAL;
1644 }
1645 } else {
1646 return -EINVAL;
1647 }
1648 return 0;
1649}
1650
1651static int tdm_get_sample_rate(int value)
1652{
1653 int sample_rate = 0;
1654
1655 switch (value) {
1656 case 0:
1657 sample_rate = SAMPLING_RATE_8KHZ;
1658 break;
1659 case 1:
1660 sample_rate = SAMPLING_RATE_16KHZ;
1661 break;
1662 case 2:
1663 sample_rate = SAMPLING_RATE_32KHZ;
1664 break;
1665 case 3:
1666 sample_rate = SAMPLING_RATE_48KHZ;
1667 break;
1668 case 4:
1669 sample_rate = SAMPLING_RATE_176P4KHZ;
1670 break;
1671 case 5:
1672 sample_rate = SAMPLING_RATE_352P8KHZ;
1673 break;
1674 default:
1675 sample_rate = SAMPLING_RATE_48KHZ;
1676 break;
1677 }
1678 return sample_rate;
1679}
1680
1681static int tdm_get_sample_rate_val(int sample_rate)
1682{
1683 int sample_rate_val = 0;
1684
1685 switch (sample_rate) {
1686 case SAMPLING_RATE_8KHZ:
1687 sample_rate_val = 0;
1688 break;
1689 case SAMPLING_RATE_16KHZ:
1690 sample_rate_val = 1;
1691 break;
1692 case SAMPLING_RATE_32KHZ:
1693 sample_rate_val = 2;
1694 break;
1695 case SAMPLING_RATE_48KHZ:
1696 sample_rate_val = 3;
1697 break;
1698 case SAMPLING_RATE_176P4KHZ:
1699 sample_rate_val = 4;
1700 break;
1701 case SAMPLING_RATE_352P8KHZ:
1702 sample_rate_val = 5;
1703 break;
1704 default:
1705 sample_rate_val = 3;
1706 break;
1707 }
1708 return sample_rate_val;
1709}
1710
1711static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_value *ucontrol)
1713{
1714 struct tdm_port port;
1715 int ret = tdm_get_port_idx(kcontrol, &port);
1716
1717 if (ret) {
1718 pr_err("%s: unsupported control: %s\n",
1719 __func__, kcontrol->id.name);
1720 } else {
1721 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1722 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1723
1724 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1725 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1726 ucontrol->value.enumerated.item[0]);
1727 }
1728 return ret;
1729}
1730
1731static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1732 struct snd_ctl_elem_value *ucontrol)
1733{
1734 struct tdm_port port;
1735 int ret = tdm_get_port_idx(kcontrol, &port);
1736
1737 if (ret) {
1738 pr_err("%s: unsupported control: %s\n",
1739 __func__, kcontrol->id.name);
1740 } else {
1741 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1742 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1743
1744 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1745 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1746 ucontrol->value.enumerated.item[0]);
1747 }
1748 return ret;
1749}
1750
1751static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1752 struct snd_ctl_elem_value *ucontrol)
1753{
1754 struct tdm_port port;
1755 int ret = tdm_get_port_idx(kcontrol, &port);
1756
1757 if (ret) {
1758 pr_err("%s: unsupported control: %s\n",
1759 __func__, kcontrol->id.name);
1760 } else {
1761 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1762 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1763
1764 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1765 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1766 ucontrol->value.enumerated.item[0]);
1767 }
1768 return ret;
1769}
1770
1771static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1772 struct snd_ctl_elem_value *ucontrol)
1773{
1774 struct tdm_port port;
1775 int ret = tdm_get_port_idx(kcontrol, &port);
1776
1777 if (ret) {
1778 pr_err("%s: unsupported control: %s\n",
1779 __func__, kcontrol->id.name);
1780 } else {
1781 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1782 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1783
1784 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1785 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1786 ucontrol->value.enumerated.item[0]);
1787 }
1788 return ret;
1789}
1790
1791static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001792{
1793 int format = 0;
1794
1795 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001796 case 0:
1797 format = SNDRV_PCM_FORMAT_S16_LE;
1798 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001799 case 1:
1800 format = SNDRV_PCM_FORMAT_S24_LE;
1801 break;
1802 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001803 format = SNDRV_PCM_FORMAT_S32_LE;
1804 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001805 default:
1806 format = SNDRV_PCM_FORMAT_S16_LE;
1807 break;
1808 }
1809 return format;
1810}
1811
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001812static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001813{
1814 int value = 0;
1815
1816 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001817 case SNDRV_PCM_FORMAT_S16_LE:
1818 value = 0;
1819 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001820 case SNDRV_PCM_FORMAT_S24_LE:
1821 value = 1;
1822 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001823 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001824 value = 2;
1825 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001826 default:
1827 value = 0;
1828 break;
1829 }
1830 return value;
1831}
1832
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001833static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1834 struct snd_ctl_elem_value *ucontrol)
1835{
1836 struct tdm_port port;
1837 int ret = tdm_get_port_idx(kcontrol, &port);
1838
1839 if (ret) {
1840 pr_err("%s: unsupported control: %s\n",
1841 __func__, kcontrol->id.name);
1842 } else {
1843 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1844 tdm_rx_cfg[port.mode][port.channel].bit_format);
1845
1846 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1847 tdm_rx_cfg[port.mode][port.channel].bit_format,
1848 ucontrol->value.enumerated.item[0]);
1849 }
1850 return ret;
1851}
1852
1853static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1854 struct snd_ctl_elem_value *ucontrol)
1855{
1856 struct tdm_port port;
1857 int ret = tdm_get_port_idx(kcontrol, &port);
1858
1859 if (ret) {
1860 pr_err("%s: unsupported control: %s\n",
1861 __func__, kcontrol->id.name);
1862 } else {
1863 tdm_rx_cfg[port.mode][port.channel].bit_format =
1864 tdm_get_format(ucontrol->value.enumerated.item[0]);
1865
1866 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1867 tdm_rx_cfg[port.mode][port.channel].bit_format,
1868 ucontrol->value.enumerated.item[0]);
1869 }
1870 return ret;
1871}
1872
1873static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1874 struct snd_ctl_elem_value *ucontrol)
1875{
1876 struct tdm_port port;
1877 int ret = tdm_get_port_idx(kcontrol, &port);
1878
1879 if (ret) {
1880 pr_err("%s: unsupported control: %s\n",
1881 __func__, kcontrol->id.name);
1882 } else {
1883 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1884 tdm_tx_cfg[port.mode][port.channel].bit_format);
1885
1886 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1887 tdm_tx_cfg[port.mode][port.channel].bit_format,
1888 ucontrol->value.enumerated.item[0]);
1889 }
1890 return ret;
1891}
1892
1893static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1894 struct snd_ctl_elem_value *ucontrol)
1895{
1896 struct tdm_port port;
1897 int ret = tdm_get_port_idx(kcontrol, &port);
1898
1899 if (ret) {
1900 pr_err("%s: unsupported control: %s\n",
1901 __func__, kcontrol->id.name);
1902 } else {
1903 tdm_tx_cfg[port.mode][port.channel].bit_format =
1904 tdm_get_format(ucontrol->value.enumerated.item[0]);
1905
1906 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1907 tdm_tx_cfg[port.mode][port.channel].bit_format,
1908 ucontrol->value.enumerated.item[0]);
1909 }
1910 return ret;
1911}
1912
1913static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1914 struct snd_ctl_elem_value *ucontrol)
1915{
1916 struct tdm_port port;
1917 int ret = tdm_get_port_idx(kcontrol, &port);
1918
1919 if (ret) {
1920 pr_err("%s: unsupported control: %s\n",
1921 __func__, kcontrol->id.name);
1922 } else {
1923
1924 ucontrol->value.enumerated.item[0] =
1925 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1926
1927 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1928 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1929 ucontrol->value.enumerated.item[0]);
1930 }
1931 return ret;
1932}
1933
1934static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1935 struct snd_ctl_elem_value *ucontrol)
1936{
1937 struct tdm_port port;
1938 int ret = tdm_get_port_idx(kcontrol, &port);
1939
1940 if (ret) {
1941 pr_err("%s: unsupported control: %s\n",
1942 __func__, kcontrol->id.name);
1943 } else {
1944 tdm_rx_cfg[port.mode][port.channel].channels =
1945 ucontrol->value.enumerated.item[0] + 1;
1946
1947 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1948 tdm_rx_cfg[port.mode][port.channel].channels,
1949 ucontrol->value.enumerated.item[0] + 1);
1950 }
1951 return ret;
1952}
1953
1954static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1955 struct snd_ctl_elem_value *ucontrol)
1956{
1957 struct tdm_port port;
1958 int ret = tdm_get_port_idx(kcontrol, &port);
1959
1960 if (ret) {
1961 pr_err("%s: unsupported control: %s\n",
1962 __func__, kcontrol->id.name);
1963 } else {
1964 ucontrol->value.enumerated.item[0] =
1965 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1966
1967 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1968 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1969 ucontrol->value.enumerated.item[0]);
1970 }
1971 return ret;
1972}
1973
1974static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1975 struct snd_ctl_elem_value *ucontrol)
1976{
1977 struct tdm_port port;
1978 int ret = tdm_get_port_idx(kcontrol, &port);
1979
1980 if (ret) {
1981 pr_err("%s: unsupported control: %s\n",
1982 __func__, kcontrol->id.name);
1983 } else {
1984 tdm_tx_cfg[port.mode][port.channel].channels =
1985 ucontrol->value.enumerated.item[0] + 1;
1986
1987 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1988 tdm_tx_cfg[port.mode][port.channel].channels,
1989 ucontrol->value.enumerated.item[0] + 1);
1990 }
1991 return ret;
1992}
1993
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001994static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1995 struct snd_ctl_elem_value *ucontrol)
1996{
1997 int slot_index = 0;
1998 int interface = ucontrol->value.integer.value[0];
1999 int channel = ucontrol->value.integer.value[1];
2000 unsigned int offset_val = 0;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002001 unsigned int max_slot_offset = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002002 unsigned int *slot_offset = NULL;
2003 struct tdm_dev_config *config = NULL;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002004 struct msm_asoc_mach_data *pdata = NULL;
2005 struct snd_soc_component *component = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002006
2007 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
2008 pr_err("%s: incorrect interface = %d\n", __func__, interface);
2009 return -EINVAL;
2010 }
2011 if (channel < 0 || channel >= TDM_PORT_MAX) {
2012 pr_err("%s: incorrect channel = %d\n", __func__, channel);
2013 return -EINVAL;
2014 }
2015
2016 pr_debug("%s: interface = %d, channel = %d\n", __func__,
2017 interface, channel);
2018
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002019 component = snd_soc_kcontrol_component(kcontrol);
2020 pdata = snd_soc_card_get_drvdata(component->card);
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002021 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
2022 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002023 if (!config) {
2024 pr_err("%s: tdm config is NULL\n", __func__);
2025 return -EINVAL;
2026 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002027
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002028 slot_offset = config->tdm_slot_offset;
2029 if (!slot_offset) {
2030 pr_err("%s: slot offset is NULL\n", __func__);
2031 return -EINVAL;
2032 }
2033
2034 max_slot_offset = TDM_SLOT_WIDTH_BYTES * (pdata->tdm_max_slots - 1);
2035
2036 for (slot_index = 0; slot_index < pdata->tdm_max_slots; slot_index++) {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002037 offset_val = ucontrol->value.integer.value[MAX_PATH +
2038 slot_index];
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002039 /* Offset value can only be 0, 4, 8, .. */
2040 if (offset_val % 4 == 0 && offset_val <= max_slot_offset)
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002041 slot_offset[slot_index] = offset_val;
2042 pr_debug("%s: slot offset[%d] = %d\n", __func__,
2043 slot_index, slot_offset[slot_index]);
2044 }
2045
2046 return 0;
2047}
2048
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002049static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2050{
2051 int idx = 0;
2052
2053 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2054 sizeof("PRIM_AUX_PCM"))) {
2055 idx = PRIM_AUX_PCM;
2056 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2057 sizeof("SEC_AUX_PCM"))) {
2058 idx = SEC_AUX_PCM;
2059 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2060 sizeof("TERT_AUX_PCM"))) {
2061 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002062 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2063 sizeof("QUAT_AUX_PCM"))) {
2064 idx = QUAT_AUX_PCM;
2065 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2066 sizeof("QUIN_AUX_PCM"))) {
2067 idx = QUIN_AUX_PCM;
2068 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2069 sizeof("SEN_AUX_PCM"))) {
2070 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002071 } else {
2072 pr_err("%s: unsupported port: %s\n",
2073 __func__, kcontrol->id.name);
2074 idx = -EINVAL;
2075 }
2076
2077 return idx;
2078}
2079
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002080static int aux_pcm_get_sample_rate(int value)
2081{
2082 int sample_rate = 0;
2083
2084 switch (value) {
2085 case 1:
2086 sample_rate = SAMPLING_RATE_16KHZ;
2087 break;
2088 case 0:
2089 default:
2090 sample_rate = SAMPLING_RATE_8KHZ;
2091 break;
2092 }
2093 return sample_rate;
2094}
2095
2096static int aux_pcm_get_sample_rate_val(int sample_rate)
2097{
2098 int sample_rate_val = 0;
2099
2100 switch (sample_rate) {
2101 case SAMPLING_RATE_16KHZ:
2102 sample_rate_val = 1;
2103 break;
2104 case SAMPLING_RATE_8KHZ:
2105 default:
2106 sample_rate_val = 0;
2107 break;
2108 }
2109 return sample_rate_val;
2110}
2111
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002112static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002113{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002114 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002115
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002116 switch (value) {
2117 case 0:
2118 format = SNDRV_PCM_FORMAT_S16_LE;
2119 break;
2120 case 1:
2121 format = SNDRV_PCM_FORMAT_S24_LE;
2122 break;
2123 case 2:
2124 format = SNDRV_PCM_FORMAT_S24_3LE;
2125 break;
2126 case 3:
2127 format = SNDRV_PCM_FORMAT_S32_LE;
2128 break;
2129 default:
2130 format = SNDRV_PCM_FORMAT_S16_LE;
2131 break;
2132 }
2133 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002134}
2135
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002136static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002137{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002138 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002139
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002140 switch (format) {
2141 case SNDRV_PCM_FORMAT_S16_LE:
2142 value = 0;
2143 break;
2144 case SNDRV_PCM_FORMAT_S24_LE:
2145 value = 1;
2146 break;
2147 case SNDRV_PCM_FORMAT_S24_3LE:
2148 value = 2;
2149 break;
2150 case SNDRV_PCM_FORMAT_S32_LE:
2151 value = 3;
2152 break;
2153 default:
2154 value = 0;
2155 break;
2156 }
2157 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002158}
2159
2160static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2161 struct snd_ctl_elem_value *ucontrol)
2162{
2163 int idx = aux_pcm_get_port_idx(kcontrol);
2164
2165 if (idx < 0)
2166 return idx;
2167
2168 ucontrol->value.enumerated.item[0] =
2169 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2170
2171 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2172 idx, aux_pcm_rx_cfg[idx].sample_rate,
2173 ucontrol->value.enumerated.item[0]);
2174
2175 return 0;
2176}
2177
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002178static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002179 struct snd_ctl_elem_value *ucontrol)
2180{
2181 int idx = aux_pcm_get_port_idx(kcontrol);
2182
2183 if (idx < 0)
2184 return idx;
2185
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002186 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002187 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2188
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002189 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2190 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002191 ucontrol->value.enumerated.item[0]);
2192
2193 return 0;
2194}
2195
2196static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2197 struct snd_ctl_elem_value *ucontrol)
2198{
2199 int idx = aux_pcm_get_port_idx(kcontrol);
2200
2201 if (idx < 0)
2202 return idx;
2203
2204 ucontrol->value.enumerated.item[0] =
2205 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2206
2207 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2208 idx, aux_pcm_tx_cfg[idx].sample_rate,
2209 ucontrol->value.enumerated.item[0]);
2210
2211 return 0;
2212}
2213
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002214static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2215 struct snd_ctl_elem_value *ucontrol)
2216{
2217 int idx = aux_pcm_get_port_idx(kcontrol);
2218
2219 if (idx < 0)
2220 return idx;
2221
2222 aux_pcm_tx_cfg[idx].sample_rate =
2223 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2224
2225 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2226 idx, aux_pcm_tx_cfg[idx].sample_rate,
2227 ucontrol->value.enumerated.item[0]);
2228
2229 return 0;
2230}
2231
2232static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2233 struct snd_ctl_elem_value *ucontrol)
2234{
2235 int idx = aux_pcm_get_port_idx(kcontrol);
2236
2237 if (idx < 0)
2238 return idx;
2239
2240 ucontrol->value.enumerated.item[0] =
2241 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2242
2243 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2244 idx, aux_pcm_rx_cfg[idx].bit_format,
2245 ucontrol->value.enumerated.item[0]);
2246
2247 return 0;
2248}
2249
2250static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2251 struct snd_ctl_elem_value *ucontrol)
2252{
2253 int idx = aux_pcm_get_port_idx(kcontrol);
2254
2255 if (idx < 0)
2256 return idx;
2257
2258 aux_pcm_rx_cfg[idx].bit_format =
2259 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2260
2261 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2262 idx, aux_pcm_rx_cfg[idx].bit_format,
2263 ucontrol->value.enumerated.item[0]);
2264
2265 return 0;
2266}
2267
2268static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2269 struct snd_ctl_elem_value *ucontrol)
2270{
2271 int idx = aux_pcm_get_port_idx(kcontrol);
2272
2273 if (idx < 0)
2274 return idx;
2275
2276 ucontrol->value.enumerated.item[0] =
2277 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2278
2279 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2280 idx, aux_pcm_tx_cfg[idx].bit_format,
2281 ucontrol->value.enumerated.item[0]);
2282
2283 return 0;
2284}
2285
2286static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2287 struct snd_ctl_elem_value *ucontrol)
2288{
2289 int idx = aux_pcm_get_port_idx(kcontrol);
2290
2291 if (idx < 0)
2292 return idx;
2293
2294 aux_pcm_tx_cfg[idx].bit_format =
2295 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2296
2297 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2298 idx, aux_pcm_tx_cfg[idx].bit_format,
2299 ucontrol->value.enumerated.item[0]);
2300
2301 return 0;
2302}
2303
2304static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2305{
2306 int idx = 0;
2307
2308 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2309 sizeof("PRIM_MI2S_RX"))) {
2310 idx = PRIM_MI2S;
2311 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2312 sizeof("SEC_MI2S_RX"))) {
2313 idx = SEC_MI2S;
2314 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2315 sizeof("TERT_MI2S_RX"))) {
2316 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002317 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2318 sizeof("QUAT_MI2S_RX"))) {
2319 idx = QUAT_MI2S;
2320 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2321 sizeof("QUIN_MI2S_RX"))) {
2322 idx = QUIN_MI2S;
2323 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2324 sizeof("SEN_MI2S_RX"))) {
2325 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002326 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2327 sizeof("PRIM_MI2S_TX"))) {
2328 idx = PRIM_MI2S;
2329 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2330 sizeof("SEC_MI2S_TX"))) {
2331 idx = SEC_MI2S;
2332 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2333 sizeof("TERT_MI2S_TX"))) {
2334 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002335 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2336 sizeof("QUAT_MI2S_TX"))) {
2337 idx = QUAT_MI2S;
2338 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2339 sizeof("QUIN_MI2S_TX"))) {
2340 idx = QUIN_MI2S;
2341 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2342 sizeof("SEN_MI2S_TX"))) {
2343 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002344 } else {
2345 pr_err("%s: unsupported channel: %s\n",
2346 __func__, kcontrol->id.name);
2347 idx = -EINVAL;
2348 }
2349
2350 return idx;
2351}
2352
2353static int mi2s_get_sample_rate(int value)
2354{
2355 int sample_rate = 0;
2356
2357 switch (value) {
2358 case 0:
2359 sample_rate = SAMPLING_RATE_8KHZ;
2360 break;
2361 case 1:
2362 sample_rate = SAMPLING_RATE_11P025KHZ;
2363 break;
2364 case 2:
2365 sample_rate = SAMPLING_RATE_16KHZ;
2366 break;
2367 case 3:
2368 sample_rate = SAMPLING_RATE_22P05KHZ;
2369 break;
2370 case 4:
2371 sample_rate = SAMPLING_RATE_32KHZ;
2372 break;
2373 case 5:
2374 sample_rate = SAMPLING_RATE_44P1KHZ;
2375 break;
2376 case 6:
2377 sample_rate = SAMPLING_RATE_48KHZ;
2378 break;
2379 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002380 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002381 break;
2382 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002383 sample_rate = SAMPLING_RATE_96KHZ;
2384 break;
2385 case 9:
2386 sample_rate = SAMPLING_RATE_176P4KHZ;
2387 break;
2388 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002389 sample_rate = SAMPLING_RATE_192KHZ;
2390 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002391 case 11:
2392 sample_rate = SAMPLING_RATE_352P8KHZ;
2393 break;
2394 case 12:
2395 sample_rate = SAMPLING_RATE_384KHZ;
2396 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002397 default:
2398 sample_rate = SAMPLING_RATE_48KHZ;
2399 break;
2400 }
2401 return sample_rate;
2402}
2403
2404static int mi2s_get_sample_rate_val(int sample_rate)
2405{
2406 int sample_rate_val = 0;
2407
2408 switch (sample_rate) {
2409 case SAMPLING_RATE_8KHZ:
2410 sample_rate_val = 0;
2411 break;
2412 case SAMPLING_RATE_11P025KHZ:
2413 sample_rate_val = 1;
2414 break;
2415 case SAMPLING_RATE_16KHZ:
2416 sample_rate_val = 2;
2417 break;
2418 case SAMPLING_RATE_22P05KHZ:
2419 sample_rate_val = 3;
2420 break;
2421 case SAMPLING_RATE_32KHZ:
2422 sample_rate_val = 4;
2423 break;
2424 case SAMPLING_RATE_44P1KHZ:
2425 sample_rate_val = 5;
2426 break;
2427 case SAMPLING_RATE_48KHZ:
2428 sample_rate_val = 6;
2429 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002430 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002431 sample_rate_val = 7;
2432 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002433 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002434 sample_rate_val = 8;
2435 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002436 case SAMPLING_RATE_176P4KHZ:
2437 sample_rate_val = 9;
2438 break;
2439 case SAMPLING_RATE_192KHZ:
2440 sample_rate_val = 10;
2441 break;
2442 case SAMPLING_RATE_352P8KHZ:
2443 sample_rate_val = 11;
2444 break;
2445 case SAMPLING_RATE_384KHZ:
2446 sample_rate_val = 12;
2447 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002448 default:
2449 sample_rate_val = 6;
2450 break;
2451 }
2452 return sample_rate_val;
2453}
2454
2455static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2456 struct snd_ctl_elem_value *ucontrol)
2457{
2458 int idx = mi2s_get_port_idx(kcontrol);
2459
2460 if (idx < 0)
2461 return idx;
2462
2463 ucontrol->value.enumerated.item[0] =
2464 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2465
2466 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2467 idx, mi2s_rx_cfg[idx].sample_rate,
2468 ucontrol->value.enumerated.item[0]);
2469
2470 return 0;
2471}
2472
2473static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2474 struct snd_ctl_elem_value *ucontrol)
2475{
2476 int idx = mi2s_get_port_idx(kcontrol);
2477
2478 if (idx < 0)
2479 return idx;
2480
2481 mi2s_rx_cfg[idx].sample_rate =
2482 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2483
2484 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2485 idx, mi2s_rx_cfg[idx].sample_rate,
2486 ucontrol->value.enumerated.item[0]);
2487
2488 return 0;
2489}
2490
2491static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2492 struct snd_ctl_elem_value *ucontrol)
2493{
2494 int idx = mi2s_get_port_idx(kcontrol);
2495
2496 if (idx < 0)
2497 return idx;
2498
2499 ucontrol->value.enumerated.item[0] =
2500 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2501
2502 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2503 idx, mi2s_tx_cfg[idx].sample_rate,
2504 ucontrol->value.enumerated.item[0]);
2505
2506 return 0;
2507}
2508
2509static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2510 struct snd_ctl_elem_value *ucontrol)
2511{
2512 int idx = mi2s_get_port_idx(kcontrol);
2513
2514 if (idx < 0)
2515 return idx;
2516
2517 mi2s_tx_cfg[idx].sample_rate =
2518 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2519
2520 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2521 idx, mi2s_tx_cfg[idx].sample_rate,
2522 ucontrol->value.enumerated.item[0]);
2523
2524 return 0;
2525}
2526
2527static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2528 struct snd_ctl_elem_value *ucontrol)
2529{
2530 int idx = mi2s_get_port_idx(kcontrol);
2531
2532 if (idx < 0)
2533 return idx;
2534
2535 ucontrol->value.enumerated.item[0] =
2536 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2537
2538 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2539 idx, mi2s_rx_cfg[idx].bit_format,
2540 ucontrol->value.enumerated.item[0]);
2541
2542 return 0;
2543}
2544
2545static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2546 struct snd_ctl_elem_value *ucontrol)
2547{
2548 int idx = mi2s_get_port_idx(kcontrol);
2549
2550 if (idx < 0)
2551 return idx;
2552
2553 mi2s_rx_cfg[idx].bit_format =
2554 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2555
2556 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2557 idx, mi2s_rx_cfg[idx].bit_format,
2558 ucontrol->value.enumerated.item[0]);
2559
2560 return 0;
2561}
2562
2563static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2564 struct snd_ctl_elem_value *ucontrol)
2565{
2566 int idx = mi2s_get_port_idx(kcontrol);
2567
2568 if (idx < 0)
2569 return idx;
2570
2571 ucontrol->value.enumerated.item[0] =
2572 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2573
2574 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2575 idx, mi2s_tx_cfg[idx].bit_format,
2576 ucontrol->value.enumerated.item[0]);
2577
2578 return 0;
2579}
2580
2581static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2582 struct snd_ctl_elem_value *ucontrol)
2583{
2584 int idx = mi2s_get_port_idx(kcontrol);
2585
2586 if (idx < 0)
2587 return idx;
2588
2589 mi2s_tx_cfg[idx].bit_format =
2590 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2591
2592 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2593 idx, mi2s_tx_cfg[idx].bit_format,
2594 ucontrol->value.enumerated.item[0]);
2595
2596 return 0;
2597}
2598static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2599 struct snd_ctl_elem_value *ucontrol)
2600{
2601 int idx = mi2s_get_port_idx(kcontrol);
2602
2603 if (idx < 0)
2604 return idx;
2605
2606 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2607 idx, mi2s_rx_cfg[idx].channels);
2608 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2609
2610 return 0;
2611}
2612
2613static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2614 struct snd_ctl_elem_value *ucontrol)
2615{
2616 int idx = mi2s_get_port_idx(kcontrol);
2617
2618 if (idx < 0)
2619 return idx;
2620
2621 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2622 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2623 idx, mi2s_rx_cfg[idx].channels);
2624
2625 return 1;
2626}
2627
2628static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2629 struct snd_ctl_elem_value *ucontrol)
2630{
2631 int idx = mi2s_get_port_idx(kcontrol);
2632
2633 if (idx < 0)
2634 return idx;
2635
2636 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2637 idx, mi2s_tx_cfg[idx].channels);
2638 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2639
2640 return 0;
2641}
2642
2643static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2644 struct snd_ctl_elem_value *ucontrol)
2645{
2646 int idx = mi2s_get_port_idx(kcontrol);
2647
2648 if (idx < 0)
2649 return idx;
2650
2651 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2652 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2653 idx, mi2s_tx_cfg[idx].channels);
2654
2655 return 1;
2656}
2657
2658static int msm_get_port_id(int be_id)
2659{
2660 int afe_port_id = 0;
2661
2662 switch (be_id) {
2663 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2664 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2665 break;
2666 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2667 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2668 break;
2669 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2670 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2671 break;
2672 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2673 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2674 break;
2675 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2676 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2677 break;
2678 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2679 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2680 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002681 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2682 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2683 break;
2684 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2685 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2686 break;
2687 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2688 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2689 break;
2690 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2691 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2692 break;
2693 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2694 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2695 break;
2696 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2697 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2698 break;
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05302699 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
2700 afe_port_id = AFE_PORT_ID_WSA_CODEC_DMA_RX_0;
2701 break;
2702 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
2703 afe_port_id = AFE_PORT_ID_WSA_CODEC_DMA_TX_0;
2704 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07002705 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2706 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2707 break;
2708 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2709 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2710 break;
2711 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2712 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2713 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002714 default:
2715 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2716 afe_port_id = -EINVAL;
2717 }
2718
2719 return afe_port_id;
2720}
2721
2722static u32 get_mi2s_bits_per_sample(u32 bit_format)
2723{
2724 u32 bit_per_sample = 0;
2725
2726 switch (bit_format) {
2727 case SNDRV_PCM_FORMAT_S32_LE:
2728 case SNDRV_PCM_FORMAT_S24_3LE:
2729 case SNDRV_PCM_FORMAT_S24_LE:
2730 bit_per_sample = 32;
2731 break;
2732 case SNDRV_PCM_FORMAT_S16_LE:
2733 default:
2734 bit_per_sample = 16;
2735 break;
2736 }
2737
2738 return bit_per_sample;
2739}
2740
2741static void update_mi2s_clk_val(int dai_id, int stream)
2742{
2743 u32 bit_per_sample = 0;
2744
2745 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2746 bit_per_sample =
2747 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2748 mi2s_clk[dai_id].clk_freq_in_hz =
2749 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2750 } else {
2751 bit_per_sample =
2752 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2753 mi2s_clk[dai_id].clk_freq_in_hz =
2754 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2755 }
2756}
2757
2758static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2759{
2760 int ret = 0;
2761 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2762 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2763 int port_id = 0;
2764 int index = cpu_dai->id;
2765
2766 port_id = msm_get_port_id(rtd->dai_link->id);
2767 if (port_id < 0) {
2768 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2769 ret = port_id;
2770 goto err;
2771 }
2772
2773 if (enable) {
2774 update_mi2s_clk_val(index, substream->stream);
2775 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2776 mi2s_clk[index].clk_freq_in_hz);
2777 }
2778
2779 mi2s_clk[index].enable = enable;
2780 ret = afe_set_lpass_clock_v2(port_id,
2781 &mi2s_clk[index]);
2782 if (ret < 0) {
2783 dev_err(rtd->card->dev,
2784 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2785 __func__, port_id, ret);
2786 goto err;
2787 }
2788
2789err:
2790 return ret;
2791}
2792
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002793static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2794{
2795 int idx = 0;
2796
2797 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2798 sizeof("WSA_CDC_DMA_RX_0")))
2799 idx = WSA_CDC_DMA_RX_0;
2800 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2801 sizeof("WSA_CDC_DMA_RX_0")))
2802 idx = WSA_CDC_DMA_RX_1;
2803 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2804 sizeof("RX_CDC_DMA_RX_0")))
2805 idx = RX_CDC_DMA_RX_0;
2806 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2807 sizeof("RX_CDC_DMA_RX_1")))
2808 idx = RX_CDC_DMA_RX_1;
2809 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2810 sizeof("RX_CDC_DMA_RX_2")))
2811 idx = RX_CDC_DMA_RX_2;
2812 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2813 sizeof("RX_CDC_DMA_RX_3")))
2814 idx = RX_CDC_DMA_RX_3;
2815 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2816 sizeof("RX_CDC_DMA_RX_5")))
2817 idx = RX_CDC_DMA_RX_5;
2818 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2819 sizeof("WSA_CDC_DMA_TX_0")))
2820 idx = WSA_CDC_DMA_TX_0;
2821 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2822 sizeof("WSA_CDC_DMA_TX_1")))
2823 idx = WSA_CDC_DMA_TX_1;
2824 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2825 sizeof("WSA_CDC_DMA_TX_2")))
2826 idx = WSA_CDC_DMA_TX_2;
2827 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2828 sizeof("TX_CDC_DMA_TX_0")))
2829 idx = TX_CDC_DMA_TX_0;
2830 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2831 sizeof("TX_CDC_DMA_TX_3")))
2832 idx = TX_CDC_DMA_TX_3;
2833 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2834 sizeof("TX_CDC_DMA_TX_4")))
2835 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08002836 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2837 sizeof("VA_CDC_DMA_TX_0")))
2838 idx = VA_CDC_DMA_TX_0;
2839 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2840 sizeof("VA_CDC_DMA_TX_1")))
2841 idx = VA_CDC_DMA_TX_1;
2842 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2843 sizeof("VA_CDC_DMA_TX_2")))
2844 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002845 else {
2846 pr_err("%s: unsupported channel: %s\n",
2847 __func__, kcontrol->id.name);
2848 return -EINVAL;
2849 }
2850
2851 return idx;
2852}
2853
2854static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2855 struct snd_ctl_elem_value *ucontrol)
2856{
2857 int ch_num = cdc_dma_get_port_idx(kcontrol);
2858
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002859 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002860 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2861 return ch_num;
2862 }
2863
2864 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2865 cdc_dma_rx_cfg[ch_num].channels - 1);
2866 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2867 return 0;
2868}
2869
2870static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2871 struct snd_ctl_elem_value *ucontrol)
2872{
2873 int ch_num = cdc_dma_get_port_idx(kcontrol);
2874
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002875 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002876 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2877 return ch_num;
2878 }
2879
2880 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2881
2882 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2883 cdc_dma_rx_cfg[ch_num].channels);
2884 return 1;
2885}
2886
2887static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2888 struct snd_ctl_elem_value *ucontrol)
2889{
2890 int ch_num = cdc_dma_get_port_idx(kcontrol);
2891
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002892 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002893 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2894 return ch_num;
2895 }
2896
2897 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2898 case SNDRV_PCM_FORMAT_S32_LE:
2899 ucontrol->value.integer.value[0] = 3;
2900 break;
2901 case SNDRV_PCM_FORMAT_S24_3LE:
2902 ucontrol->value.integer.value[0] = 2;
2903 break;
2904 case SNDRV_PCM_FORMAT_S24_LE:
2905 ucontrol->value.integer.value[0] = 1;
2906 break;
2907 case SNDRV_PCM_FORMAT_S16_LE:
2908 default:
2909 ucontrol->value.integer.value[0] = 0;
2910 break;
2911 }
2912
2913 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2914 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2915 ucontrol->value.integer.value[0]);
2916 return 0;
2917}
2918
2919static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2920 struct snd_ctl_elem_value *ucontrol)
2921{
2922 int rc = 0;
2923 int ch_num = cdc_dma_get_port_idx(kcontrol);
2924
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002925 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002926 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2927 return ch_num;
2928 }
2929
2930 switch (ucontrol->value.integer.value[0]) {
2931 case 3:
2932 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2933 break;
2934 case 2:
2935 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2936 break;
2937 case 1:
2938 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2939 break;
2940 case 0:
2941 default:
2942 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2943 break;
2944 }
2945 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2946 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2947 ucontrol->value.integer.value[0]);
2948
2949 return rc;
2950}
2951
2952
2953static int cdc_dma_get_sample_rate_val(int sample_rate)
2954{
2955 int sample_rate_val = 0;
2956
2957 switch (sample_rate) {
2958 case SAMPLING_RATE_8KHZ:
2959 sample_rate_val = 0;
2960 break;
2961 case SAMPLING_RATE_11P025KHZ:
2962 sample_rate_val = 1;
2963 break;
2964 case SAMPLING_RATE_16KHZ:
2965 sample_rate_val = 2;
2966 break;
2967 case SAMPLING_RATE_22P05KHZ:
2968 sample_rate_val = 3;
2969 break;
2970 case SAMPLING_RATE_32KHZ:
2971 sample_rate_val = 4;
2972 break;
2973 case SAMPLING_RATE_44P1KHZ:
2974 sample_rate_val = 5;
2975 break;
2976 case SAMPLING_RATE_48KHZ:
2977 sample_rate_val = 6;
2978 break;
2979 case SAMPLING_RATE_88P2KHZ:
2980 sample_rate_val = 7;
2981 break;
2982 case SAMPLING_RATE_96KHZ:
2983 sample_rate_val = 8;
2984 break;
2985 case SAMPLING_RATE_176P4KHZ:
2986 sample_rate_val = 9;
2987 break;
2988 case SAMPLING_RATE_192KHZ:
2989 sample_rate_val = 10;
2990 break;
2991 case SAMPLING_RATE_352P8KHZ:
2992 sample_rate_val = 11;
2993 break;
2994 case SAMPLING_RATE_384KHZ:
2995 sample_rate_val = 12;
2996 break;
2997 default:
2998 sample_rate_val = 6;
2999 break;
3000 }
3001 return sample_rate_val;
3002}
3003
3004static int cdc_dma_get_sample_rate(int value)
3005{
3006 int sample_rate = 0;
3007
3008 switch (value) {
3009 case 0:
3010 sample_rate = SAMPLING_RATE_8KHZ;
3011 break;
3012 case 1:
3013 sample_rate = SAMPLING_RATE_11P025KHZ;
3014 break;
3015 case 2:
3016 sample_rate = SAMPLING_RATE_16KHZ;
3017 break;
3018 case 3:
3019 sample_rate = SAMPLING_RATE_22P05KHZ;
3020 break;
3021 case 4:
3022 sample_rate = SAMPLING_RATE_32KHZ;
3023 break;
3024 case 5:
3025 sample_rate = SAMPLING_RATE_44P1KHZ;
3026 break;
3027 case 6:
3028 sample_rate = SAMPLING_RATE_48KHZ;
3029 break;
3030 case 7:
3031 sample_rate = SAMPLING_RATE_88P2KHZ;
3032 break;
3033 case 8:
3034 sample_rate = SAMPLING_RATE_96KHZ;
3035 break;
3036 case 9:
3037 sample_rate = SAMPLING_RATE_176P4KHZ;
3038 break;
3039 case 10:
3040 sample_rate = SAMPLING_RATE_192KHZ;
3041 break;
3042 case 11:
3043 sample_rate = SAMPLING_RATE_352P8KHZ;
3044 break;
3045 case 12:
3046 sample_rate = SAMPLING_RATE_384KHZ;
3047 break;
3048 default:
3049 sample_rate = SAMPLING_RATE_48KHZ;
3050 break;
3051 }
3052 return sample_rate;
3053}
3054
3055static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3056 struct snd_ctl_elem_value *ucontrol)
3057{
3058 int ch_num = cdc_dma_get_port_idx(kcontrol);
3059
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003060 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003061 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3062 return ch_num;
3063 }
3064
3065 ucontrol->value.enumerated.item[0] =
3066 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3067
3068 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3069 cdc_dma_rx_cfg[ch_num].sample_rate);
3070 return 0;
3071}
3072
3073static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3074 struct snd_ctl_elem_value *ucontrol)
3075{
3076 int ch_num = cdc_dma_get_port_idx(kcontrol);
3077
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003078 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003079 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3080 return ch_num;
3081 }
3082
3083 cdc_dma_rx_cfg[ch_num].sample_rate =
3084 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3085
3086
3087 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3088 __func__, ucontrol->value.enumerated.item[0],
3089 cdc_dma_rx_cfg[ch_num].sample_rate);
3090 return 0;
3091}
3092
3093static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3094 struct snd_ctl_elem_value *ucontrol)
3095{
3096 int ch_num = cdc_dma_get_port_idx(kcontrol);
3097
3098 if (ch_num < 0) {
3099 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3100 return ch_num;
3101 }
3102
3103 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3104 cdc_dma_tx_cfg[ch_num].channels);
3105 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3106 return 0;
3107}
3108
3109static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3110 struct snd_ctl_elem_value *ucontrol)
3111{
3112 int ch_num = cdc_dma_get_port_idx(kcontrol);
3113
3114 if (ch_num < 0) {
3115 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3116 return ch_num;
3117 }
3118
3119 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3120
3121 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3122 cdc_dma_tx_cfg[ch_num].channels);
3123 return 1;
3124}
3125
3126static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3127 struct snd_ctl_elem_value *ucontrol)
3128{
3129 int sample_rate_val;
3130 int ch_num = cdc_dma_get_port_idx(kcontrol);
3131
3132 if (ch_num < 0) {
3133 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3134 return ch_num;
3135 }
3136
3137 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3138 case SAMPLING_RATE_384KHZ:
3139 sample_rate_val = 12;
3140 break;
3141 case SAMPLING_RATE_352P8KHZ:
3142 sample_rate_val = 11;
3143 break;
3144 case SAMPLING_RATE_192KHZ:
3145 sample_rate_val = 10;
3146 break;
3147 case SAMPLING_RATE_176P4KHZ:
3148 sample_rate_val = 9;
3149 break;
3150 case SAMPLING_RATE_96KHZ:
3151 sample_rate_val = 8;
3152 break;
3153 case SAMPLING_RATE_88P2KHZ:
3154 sample_rate_val = 7;
3155 break;
3156 case SAMPLING_RATE_48KHZ:
3157 sample_rate_val = 6;
3158 break;
3159 case SAMPLING_RATE_44P1KHZ:
3160 sample_rate_val = 5;
3161 break;
3162 case SAMPLING_RATE_32KHZ:
3163 sample_rate_val = 4;
3164 break;
3165 case SAMPLING_RATE_22P05KHZ:
3166 sample_rate_val = 3;
3167 break;
3168 case SAMPLING_RATE_16KHZ:
3169 sample_rate_val = 2;
3170 break;
3171 case SAMPLING_RATE_11P025KHZ:
3172 sample_rate_val = 1;
3173 break;
3174 case SAMPLING_RATE_8KHZ:
3175 sample_rate_val = 0;
3176 break;
3177 default:
3178 sample_rate_val = 6;
3179 break;
3180 }
3181
3182 ucontrol->value.integer.value[0] = sample_rate_val;
3183 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3184 cdc_dma_tx_cfg[ch_num].sample_rate);
3185 return 0;
3186}
3187
3188static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3189 struct snd_ctl_elem_value *ucontrol)
3190{
3191 int ch_num = cdc_dma_get_port_idx(kcontrol);
3192
3193 if (ch_num < 0) {
3194 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3195 return ch_num;
3196 }
3197
3198 switch (ucontrol->value.integer.value[0]) {
3199 case 12:
3200 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3201 break;
3202 case 11:
3203 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3204 break;
3205 case 10:
3206 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3207 break;
3208 case 9:
3209 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3210 break;
3211 case 8:
3212 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3213 break;
3214 case 7:
3215 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3216 break;
3217 case 6:
3218 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3219 break;
3220 case 5:
3221 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3222 break;
3223 case 4:
3224 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3225 break;
3226 case 3:
3227 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3228 break;
3229 case 2:
3230 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3231 break;
3232 case 1:
3233 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3234 break;
3235 case 0:
3236 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3237 break;
3238 default:
3239 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3240 break;
3241 }
3242
3243 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3244 __func__, ucontrol->value.integer.value[0],
3245 cdc_dma_tx_cfg[ch_num].sample_rate);
3246 return 0;
3247}
3248
3249static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3250 struct snd_ctl_elem_value *ucontrol)
3251{
3252 int ch_num = cdc_dma_get_port_idx(kcontrol);
3253
3254 if (ch_num < 0) {
3255 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3256 return ch_num;
3257 }
3258
3259 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3260 case SNDRV_PCM_FORMAT_S32_LE:
3261 ucontrol->value.integer.value[0] = 3;
3262 break;
3263 case SNDRV_PCM_FORMAT_S24_3LE:
3264 ucontrol->value.integer.value[0] = 2;
3265 break;
3266 case SNDRV_PCM_FORMAT_S24_LE:
3267 ucontrol->value.integer.value[0] = 1;
3268 break;
3269 case SNDRV_PCM_FORMAT_S16_LE:
3270 default:
3271 ucontrol->value.integer.value[0] = 0;
3272 break;
3273 }
3274
3275 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3276 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3277 ucontrol->value.integer.value[0]);
3278 return 0;
3279}
3280
3281static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3282 struct snd_ctl_elem_value *ucontrol)
3283{
3284 int rc = 0;
3285 int ch_num = cdc_dma_get_port_idx(kcontrol);
3286
3287 if (ch_num < 0) {
3288 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3289 return ch_num;
3290 }
3291
3292 switch (ucontrol->value.integer.value[0]) {
3293 case 3:
3294 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3295 break;
3296 case 2:
3297 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3298 break;
3299 case 1:
3300 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3301 break;
3302 case 0:
3303 default:
3304 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3305 break;
3306 }
3307 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3308 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3309 ucontrol->value.integer.value[0]);
3310
3311 return rc;
3312}
3313
3314static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3315{
3316 int idx = 0;
3317
3318 switch (be_id) {
3319 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3320 idx = WSA_CDC_DMA_RX_0;
3321 break;
3322 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3323 idx = WSA_CDC_DMA_TX_0;
3324 break;
3325 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3326 idx = WSA_CDC_DMA_RX_1;
3327 break;
3328 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3329 idx = WSA_CDC_DMA_TX_1;
3330 break;
3331 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3332 idx = WSA_CDC_DMA_TX_2;
3333 break;
3334 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3335 idx = RX_CDC_DMA_RX_0;
3336 break;
3337 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3338 idx = RX_CDC_DMA_RX_1;
3339 break;
3340 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3341 idx = RX_CDC_DMA_RX_2;
3342 break;
3343 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3344 idx = RX_CDC_DMA_RX_3;
3345 break;
3346 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3347 idx = RX_CDC_DMA_RX_5;
3348 break;
3349 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3350 idx = TX_CDC_DMA_TX_0;
3351 break;
3352 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3353 idx = TX_CDC_DMA_TX_3;
3354 break;
3355 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3356 idx = TX_CDC_DMA_TX_4;
3357 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003358 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3359 idx = VA_CDC_DMA_TX_0;
3360 break;
3361 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3362 idx = VA_CDC_DMA_TX_1;
3363 break;
3364 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3365 idx = VA_CDC_DMA_TX_2;
3366 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003367 default:
3368 idx = RX_CDC_DMA_RX_0;
3369 break;
3370 }
3371
3372 return idx;
3373}
3374
Banajit Goswami83a370d2019-03-05 16:15:21 -08003375static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3376 struct snd_ctl_elem_value *ucontrol)
3377{
3378 /*
3379 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3380 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3381 * value.
3382 */
3383 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3384 case SAMPLING_RATE_96KHZ:
3385 ucontrol->value.integer.value[0] = 5;
3386 break;
3387 case SAMPLING_RATE_88P2KHZ:
3388 ucontrol->value.integer.value[0] = 4;
3389 break;
3390 case SAMPLING_RATE_48KHZ:
3391 ucontrol->value.integer.value[0] = 3;
3392 break;
3393 case SAMPLING_RATE_44P1KHZ:
3394 ucontrol->value.integer.value[0] = 2;
3395 break;
3396 case SAMPLING_RATE_16KHZ:
3397 ucontrol->value.integer.value[0] = 1;
3398 break;
3399 case SAMPLING_RATE_8KHZ:
3400 default:
3401 ucontrol->value.integer.value[0] = 0;
3402 break;
3403 }
3404 pr_debug("%s: sample rate = %d\n", __func__,
3405 slim_rx_cfg[SLIM_RX_7].sample_rate);
3406
3407 return 0;
3408}
3409
3410static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3411 struct snd_ctl_elem_value *ucontrol)
3412{
3413 switch (ucontrol->value.integer.value[0]) {
3414 case 1:
3415 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3416 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3417 break;
3418 case 2:
3419 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3420 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3421 break;
3422 case 3:
3423 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3424 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3425 break;
3426 case 4:
3427 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3428 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3429 break;
3430 case 5:
3431 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3432 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3433 break;
3434 case 0:
3435 default:
3436 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3437 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3438 break;
3439 }
3440 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3441 __func__,
3442 slim_rx_cfg[SLIM_RX_7].sample_rate,
3443 slim_tx_cfg[SLIM_TX_7].sample_rate,
3444 ucontrol->value.enumerated.item[0]);
3445
3446 return 0;
3447}
3448
3449static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3450 struct snd_ctl_elem_value *ucontrol)
3451{
3452 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3453 case SAMPLING_RATE_96KHZ:
3454 ucontrol->value.integer.value[0] = 5;
3455 break;
3456 case SAMPLING_RATE_88P2KHZ:
3457 ucontrol->value.integer.value[0] = 4;
3458 break;
3459 case SAMPLING_RATE_48KHZ:
3460 ucontrol->value.integer.value[0] = 3;
3461 break;
3462 case SAMPLING_RATE_44P1KHZ:
3463 ucontrol->value.integer.value[0] = 2;
3464 break;
3465 case SAMPLING_RATE_16KHZ:
3466 ucontrol->value.integer.value[0] = 1;
3467 break;
3468 case SAMPLING_RATE_8KHZ:
3469 default:
3470 ucontrol->value.integer.value[0] = 0;
3471 break;
3472 }
3473 pr_debug("%s: sample rate rx = %d\n", __func__,
3474 slim_rx_cfg[SLIM_RX_7].sample_rate);
3475
3476 return 0;
3477}
3478
3479static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3480 struct snd_ctl_elem_value *ucontrol)
3481{
3482 switch (ucontrol->value.integer.value[0]) {
3483 case 1:
3484 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3485 break;
3486 case 2:
3487 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3488 break;
3489 case 3:
3490 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3491 break;
3492 case 4:
3493 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3494 break;
3495 case 5:
3496 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3497 break;
3498 case 0:
3499 default:
3500 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3501 break;
3502 }
3503 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3504 __func__,
3505 slim_rx_cfg[SLIM_RX_7].sample_rate,
3506 ucontrol->value.enumerated.item[0]);
3507
3508 return 0;
3509}
3510
3511static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3512 struct snd_ctl_elem_value *ucontrol)
3513{
3514 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3515 case SAMPLING_RATE_96KHZ:
3516 ucontrol->value.integer.value[0] = 5;
3517 break;
3518 case SAMPLING_RATE_88P2KHZ:
3519 ucontrol->value.integer.value[0] = 4;
3520 break;
3521 case SAMPLING_RATE_48KHZ:
3522 ucontrol->value.integer.value[0] = 3;
3523 break;
3524 case SAMPLING_RATE_44P1KHZ:
3525 ucontrol->value.integer.value[0] = 2;
3526 break;
3527 case SAMPLING_RATE_16KHZ:
3528 ucontrol->value.integer.value[0] = 1;
3529 break;
3530 case SAMPLING_RATE_8KHZ:
3531 default:
3532 ucontrol->value.integer.value[0] = 0;
3533 break;
3534 }
3535 pr_debug("%s: sample rate tx = %d\n", __func__,
3536 slim_tx_cfg[SLIM_TX_7].sample_rate);
3537
3538 return 0;
3539}
3540
3541static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3542 struct snd_ctl_elem_value *ucontrol)
3543{
3544 switch (ucontrol->value.integer.value[0]) {
3545 case 1:
3546 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3547 break;
3548 case 2:
3549 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3550 break;
3551 case 3:
3552 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3553 break;
3554 case 4:
3555 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3556 break;
3557 case 5:
3558 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3559 break;
3560 case 0:
3561 default:
3562 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3563 break;
3564 }
3565 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3566 __func__,
3567 slim_tx_cfg[SLIM_TX_7].sample_rate,
3568 ucontrol->value.enumerated.item[0]);
3569
3570 return 0;
3571}
3572
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003573static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3574 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3575 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3576 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3577 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3578 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3579 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3580 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3581 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3582 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3583 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3584 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3585 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3586 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3587 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3588 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3589 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3590 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3591 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3592 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3593 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3594 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3595 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3596 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3597 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3598 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3599 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003600 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3601 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3602 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3603 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3604 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3605 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003606 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3607 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3608 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3609 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003610 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3611 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3612 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3613 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3614 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3615 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3616 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3617 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3618 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3619 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003620 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3621 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3622 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3623 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3624 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3625 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003626 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3627 wsa_cdc_dma_rx_0_sample_rate,
3628 cdc_dma_rx_sample_rate_get,
3629 cdc_dma_rx_sample_rate_put),
3630 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3631 wsa_cdc_dma_rx_1_sample_rate,
3632 cdc_dma_rx_sample_rate_get,
3633 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003634 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3635 wsa_cdc_dma_tx_0_sample_rate,
3636 cdc_dma_tx_sample_rate_get,
3637 cdc_dma_tx_sample_rate_put),
3638 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3639 wsa_cdc_dma_tx_1_sample_rate,
3640 cdc_dma_tx_sample_rate_get,
3641 cdc_dma_tx_sample_rate_put),
3642 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3643 wsa_cdc_dma_tx_2_sample_rate,
3644 cdc_dma_tx_sample_rate_get,
3645 cdc_dma_tx_sample_rate_put),
3646 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3647 tx_cdc_dma_tx_0_sample_rate,
3648 cdc_dma_tx_sample_rate_get,
3649 cdc_dma_tx_sample_rate_put),
3650 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3651 tx_cdc_dma_tx_3_sample_rate,
3652 cdc_dma_tx_sample_rate_get,
3653 cdc_dma_tx_sample_rate_put),
3654 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3655 tx_cdc_dma_tx_4_sample_rate,
3656 cdc_dma_tx_sample_rate_get,
3657 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003658 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3659 va_cdc_dma_tx_0_sample_rate,
3660 cdc_dma_tx_sample_rate_get,
3661 cdc_dma_tx_sample_rate_put),
3662 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3663 va_cdc_dma_tx_1_sample_rate,
3664 cdc_dma_tx_sample_rate_get,
3665 cdc_dma_tx_sample_rate_put),
3666 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3667 va_cdc_dma_tx_2_sample_rate,
3668 cdc_dma_tx_sample_rate_get,
3669 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003670};
3671
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07003672static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3673 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3674 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3675 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3676 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3677 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3678 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3679 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3680 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3681 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3682 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3683 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3684 rx_cdc80_dma_rx_0_sample_rate,
3685 cdc_dma_rx_sample_rate_get,
3686 cdc_dma_rx_sample_rate_put),
3687 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3688 rx_cdc80_dma_rx_1_sample_rate,
3689 cdc_dma_rx_sample_rate_get,
3690 cdc_dma_rx_sample_rate_put),
3691 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3692 rx_cdc80_dma_rx_2_sample_rate,
3693 cdc_dma_rx_sample_rate_get,
3694 cdc_dma_rx_sample_rate_put),
3695 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3696 rx_cdc80_dma_rx_3_sample_rate,
3697 cdc_dma_rx_sample_rate_get,
3698 cdc_dma_rx_sample_rate_put),
3699 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3700 rx_cdc80_dma_rx_5_sample_rate,
3701 cdc_dma_rx_sample_rate_get,
3702 cdc_dma_rx_sample_rate_put),
3703};
3704
3705static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3706 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3707 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3708 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3709 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3710 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3711 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3712 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3713 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3714 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3715 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3716 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3717 rx_cdc85_dma_rx_0_sample_rate,
3718 cdc_dma_rx_sample_rate_get,
3719 cdc_dma_rx_sample_rate_put),
3720 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3721 rx_cdc85_dma_rx_1_sample_rate,
3722 cdc_dma_rx_sample_rate_get,
3723 cdc_dma_rx_sample_rate_put),
3724 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3725 rx_cdc85_dma_rx_2_sample_rate,
3726 cdc_dma_rx_sample_rate_get,
3727 cdc_dma_rx_sample_rate_put),
3728 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3729 rx_cdc85_dma_rx_3_sample_rate,
3730 cdc_dma_rx_sample_rate_get,
3731 cdc_dma_rx_sample_rate_put),
3732 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3733 rx_cdc85_dma_rx_5_sample_rate,
3734 cdc_dma_rx_sample_rate_get,
3735 cdc_dma_rx_sample_rate_put),
3736};
3737
Kunlei Zhangf61a2312020-02-11 15:37:03 +08003738static const struct snd_kcontrol_new msm_int_wcd937x_snd_controls[] = {
3739 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3740 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3741 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3742 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3743 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3744 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3745 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3746 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3747 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3748 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3749 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3750 rx_cdc_dma_rx_0_sample_rate,
3751 cdc_dma_rx_sample_rate_get,
3752 cdc_dma_rx_sample_rate_put),
3753 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3754 rx_cdc_dma_rx_1_sample_rate,
3755 cdc_dma_rx_sample_rate_get,
3756 cdc_dma_rx_sample_rate_put),
3757 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3758 rx_cdc_dma_rx_2_sample_rate,
3759 cdc_dma_rx_sample_rate_get,
3760 cdc_dma_rx_sample_rate_put),
3761 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3762 rx_cdc_dma_rx_3_sample_rate,
3763 cdc_dma_rx_sample_rate_get,
3764 cdc_dma_rx_sample_rate_put),
3765 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3766 rx_cdc_dma_rx_5_sample_rate,
3767 cdc_dma_rx_sample_rate_get,
3768 cdc_dma_rx_sample_rate_put),
3769};
3770
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003771static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3772 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3773 usb_audio_rx_sample_rate_get,
3774 usb_audio_rx_sample_rate_put),
3775 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3776 usb_audio_tx_sample_rate_get,
3777 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303778 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3779 usb_audio_rx_format_get, usb_audio_rx_format_put),
3780 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3781 usb_audio_tx_format_get, usb_audio_tx_format_put),
3782 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3783 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3784 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3785 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3786 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3787 proxy_rx_ch_get, proxy_rx_ch_put),
3788 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3789 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3790 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3791 ext_disp_rx_format_get, ext_disp_rx_format_put),
3792 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3793 ext_disp_rx_sample_rate_get,
3794 ext_disp_rx_sample_rate_put),
3795 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3796 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3797 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3798 ext_disp_rx_format_get, ext_disp_rx_format_put),
3799 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3800 ext_disp_rx_sample_rate_get,
3801 ext_disp_rx_sample_rate_put),
3802 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3803 msm_bt_sample_rate_get,
3804 msm_bt_sample_rate_put),
3805 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3806 msm_bt_sample_rate_rx_get,
3807 msm_bt_sample_rate_rx_put),
3808 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3809 msm_bt_sample_rate_tx_get,
3810 msm_bt_sample_rate_tx_put),
3811 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3812 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3813 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3814 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3815};
3816
3817static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003818 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3819 tdm_rx_sample_rate_get,
3820 tdm_rx_sample_rate_put),
3821 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3822 tdm_rx_sample_rate_get,
3823 tdm_rx_sample_rate_put),
3824 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3825 tdm_rx_sample_rate_get,
3826 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003827 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3828 tdm_rx_sample_rate_get,
3829 tdm_rx_sample_rate_put),
3830 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3831 tdm_rx_sample_rate_get,
3832 tdm_rx_sample_rate_put),
3833 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3834 tdm_rx_sample_rate_get,
3835 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003836 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3837 tdm_tx_sample_rate_get,
3838 tdm_tx_sample_rate_put),
3839 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3840 tdm_tx_sample_rate_get,
3841 tdm_tx_sample_rate_put),
3842 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3843 tdm_tx_sample_rate_get,
3844 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003845 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3846 tdm_tx_sample_rate_get,
3847 tdm_tx_sample_rate_put),
3848 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3849 tdm_tx_sample_rate_get,
3850 tdm_tx_sample_rate_put),
3851 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3852 tdm_tx_sample_rate_get,
3853 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003854 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3855 tdm_rx_format_get,
3856 tdm_rx_format_put),
3857 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3858 tdm_rx_format_get,
3859 tdm_rx_format_put),
3860 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3861 tdm_rx_format_get,
3862 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003863 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3864 tdm_rx_format_get,
3865 tdm_rx_format_put),
3866 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3867 tdm_rx_format_get,
3868 tdm_rx_format_put),
3869 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3870 tdm_rx_format_get,
3871 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003872 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3873 tdm_tx_format_get,
3874 tdm_tx_format_put),
3875 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3876 tdm_tx_format_get,
3877 tdm_tx_format_put),
3878 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3879 tdm_tx_format_get,
3880 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003881 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3882 tdm_tx_format_get,
3883 tdm_tx_format_put),
3884 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3885 tdm_tx_format_get,
3886 tdm_tx_format_put),
3887 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3888 tdm_tx_format_get,
3889 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003890 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3891 tdm_rx_ch_get,
3892 tdm_rx_ch_put),
3893 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3894 tdm_rx_ch_get,
3895 tdm_rx_ch_put),
3896 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3897 tdm_rx_ch_get,
3898 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003899 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3900 tdm_rx_ch_get,
3901 tdm_rx_ch_put),
3902 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3903 tdm_rx_ch_get,
3904 tdm_rx_ch_put),
3905 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3906 tdm_rx_ch_get,
3907 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003908 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3909 tdm_tx_ch_get,
3910 tdm_tx_ch_put),
3911 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3912 tdm_tx_ch_get,
3913 tdm_tx_ch_put),
3914 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3915 tdm_tx_ch_get,
3916 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003917 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3918 tdm_tx_ch_get,
3919 tdm_tx_ch_put),
3920 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3921 tdm_tx_ch_get,
3922 tdm_tx_ch_put),
3923 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3924 tdm_tx_ch_get,
3925 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303926 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3927 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3928};
3929
3930static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3931 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3932 aux_pcm_rx_sample_rate_get,
3933 aux_pcm_rx_sample_rate_put),
3934 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3935 aux_pcm_rx_sample_rate_get,
3936 aux_pcm_rx_sample_rate_put),
3937 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3938 aux_pcm_rx_sample_rate_get,
3939 aux_pcm_rx_sample_rate_put),
3940 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3941 aux_pcm_rx_sample_rate_get,
3942 aux_pcm_rx_sample_rate_put),
3943 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3944 aux_pcm_rx_sample_rate_get,
3945 aux_pcm_rx_sample_rate_put),
3946 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3947 aux_pcm_rx_sample_rate_get,
3948 aux_pcm_rx_sample_rate_put),
3949 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3950 aux_pcm_tx_sample_rate_get,
3951 aux_pcm_tx_sample_rate_put),
3952 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3953 aux_pcm_tx_sample_rate_get,
3954 aux_pcm_tx_sample_rate_put),
3955 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3956 aux_pcm_tx_sample_rate_get,
3957 aux_pcm_tx_sample_rate_put),
3958 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3959 aux_pcm_tx_sample_rate_get,
3960 aux_pcm_tx_sample_rate_put),
3961 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3962 aux_pcm_tx_sample_rate_get,
3963 aux_pcm_tx_sample_rate_put),
3964 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3965 aux_pcm_tx_sample_rate_get,
3966 aux_pcm_tx_sample_rate_put),
3967 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3968 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3969 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3970 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3971 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3972 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3973 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3974 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3975 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3976 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3977 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3978 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3979 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3980 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3981 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3982 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3983 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3984 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3985 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3986 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3987 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3988 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3989 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3990 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3991};
3992
3993static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3994 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3995 mi2s_rx_sample_rate_get,
3996 mi2s_rx_sample_rate_put),
3997 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3998 mi2s_rx_sample_rate_get,
3999 mi2s_rx_sample_rate_put),
4000 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
4001 mi2s_rx_sample_rate_get,
4002 mi2s_rx_sample_rate_put),
4003 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
4004 mi2s_rx_sample_rate_get,
4005 mi2s_rx_sample_rate_put),
4006 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
4007 mi2s_rx_sample_rate_get,
4008 mi2s_rx_sample_rate_put),
4009 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
4010 mi2s_rx_sample_rate_get,
4011 mi2s_rx_sample_rate_put),
4012 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
4013 mi2s_tx_sample_rate_get,
4014 mi2s_tx_sample_rate_put),
4015 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
4016 mi2s_tx_sample_rate_get,
4017 mi2s_tx_sample_rate_put),
4018 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
4019 mi2s_tx_sample_rate_get,
4020 mi2s_tx_sample_rate_put),
4021 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
4022 mi2s_tx_sample_rate_get,
4023 mi2s_tx_sample_rate_put),
4024 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
4025 mi2s_tx_sample_rate_get,
4026 mi2s_tx_sample_rate_put),
4027 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
4028 mi2s_tx_sample_rate_get,
4029 mi2s_tx_sample_rate_put),
4030 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
4031 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4032 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
4033 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4034 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
4035 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4036 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
4037 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4038 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
4039 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4040 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
4041 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4042 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
4043 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4044 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
4045 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4046 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
4047 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4048 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
4049 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4050 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
4051 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4052 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
4053 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004054 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
4055 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4056 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
4057 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4058 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
4059 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004060 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
4061 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4062 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
4063 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4064 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
4065 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004066 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
4067 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4068 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
4069 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4070 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
4071 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004072 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
4073 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4074 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
4075 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4076 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
4077 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004078};
4079
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004080static const struct snd_kcontrol_new msm_snd_controls[] = {
4081 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4082 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4083 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4084 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4085 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4086 aux_pcm_rx_sample_rate_get,
4087 aux_pcm_rx_sample_rate_put),
4088 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4089 aux_pcm_tx_sample_rate_get,
4090 aux_pcm_tx_sample_rate_put),
4091};
4092
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004093static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4094{
4095 int idx;
4096
4097 switch (be_id) {
4098 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4099 idx = EXT_DISP_RX_IDX_DP;
4100 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004101 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4102 idx = EXT_DISP_RX_IDX_DP1;
4103 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004104 default:
4105 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4106 idx = -EINVAL;
4107 break;
4108 }
4109
4110 return idx;
4111}
4112
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004113static int kona_send_island_va_config(int32_t be_id)
4114{
4115 int rc = 0;
4116 int port_id = 0xFFFF;
4117
4118 port_id = msm_get_port_id(be_id);
4119 if (port_id < 0) {
4120 pr_err("%s: Invalid island interface, be_id: %d\n",
4121 __func__, be_id);
4122 rc = -EINVAL;
4123 } else {
4124 /*
4125 * send island mode config
4126 * This should be the first configuration
4127 */
4128 rc = afe_send_port_island_mode(port_id);
4129 if (rc)
4130 pr_err("%s: afe send island mode failed %d\n",
4131 __func__, rc);
4132 }
4133
4134 return rc;
4135}
4136
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004137static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4138 struct snd_pcm_hw_params *params)
4139{
4140 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4141 struct snd_interval *rate = hw_param_interval(params,
4142 SNDRV_PCM_HW_PARAM_RATE);
4143 struct snd_interval *channels = hw_param_interval(params,
4144 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +08004145 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004146
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004147 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4148 __func__, dai_link->id, params_format(params),
4149 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004150
4151 switch (dai_link->id) {
4152 case MSM_BACKEND_DAI_USB_RX:
4153 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4154 usb_rx_cfg.bit_format);
4155 rate->min = rate->max = usb_rx_cfg.sample_rate;
4156 channels->min = channels->max = usb_rx_cfg.channels;
4157 break;
4158
4159 case MSM_BACKEND_DAI_USB_TX:
4160 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4161 usb_tx_cfg.bit_format);
4162 rate->min = rate->max = usb_tx_cfg.sample_rate;
4163 channels->min = channels->max = usb_tx_cfg.channels;
4164 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004165
4166 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004167 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004168 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4169 if (idx < 0) {
4170 pr_err("%s: Incorrect ext disp idx %d\n",
4171 __func__, idx);
4172 rc = idx;
4173 goto done;
4174 }
4175
4176 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4177 ext_disp_rx_cfg[idx].bit_format);
4178 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4179 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4180 break;
4181
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004182 case MSM_BACKEND_DAI_AFE_PCM_RX:
4183 channels->min = channels->max = proxy_rx_cfg.channels;
4184 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4185 break;
4186
4187 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4188 channels->min = channels->max =
4189 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4190 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4191 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4192 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4193 break;
4194
4195 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4196 channels->min = channels->max =
4197 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4198 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4199 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4200 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4201 break;
4202
4203 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4204 channels->min = channels->max =
4205 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4206 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4207 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4208 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4209 break;
4210
4211 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4212 channels->min = channels->max =
4213 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4214 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4215 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4216 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4217 break;
4218
4219 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4220 channels->min = channels->max =
4221 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4222 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4223 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4224 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4225 break;
4226
4227 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4228 channels->min = channels->max =
4229 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4230 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4231 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4232 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4233 break;
4234
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004235 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4236 channels->min = channels->max =
4237 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4238 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4239 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4240 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4241 break;
4242
4243 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4244 channels->min = channels->max =
4245 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4247 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4248 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4249 break;
4250
4251 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4252 channels->min = channels->max =
4253 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4256 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4257 break;
4258
4259 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4260 channels->min = channels->max =
4261 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4263 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4264 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4265 break;
4266
4267 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4268 channels->min = channels->max =
4269 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4270 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4271 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4272 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4273 break;
4274
4275 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4276 channels->min = channels->max =
4277 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4278 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4279 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4280 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4281 break;
4282
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004283 case MSM_BACKEND_DAI_AUXPCM_RX:
4284 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4285 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4286 rate->min = rate->max =
4287 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4288 channels->min = channels->max =
4289 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4290 break;
4291
4292 case MSM_BACKEND_DAI_AUXPCM_TX:
4293 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4294 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4295 rate->min = rate->max =
4296 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4297 channels->min = channels->max =
4298 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4299 break;
4300
4301 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4302 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4303 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4304 rate->min = rate->max =
4305 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4306 channels->min = channels->max =
4307 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4308 break;
4309
4310 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4311 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4312 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4313 rate->min = rate->max =
4314 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4315 channels->min = channels->max =
4316 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4317 break;
4318
4319 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4320 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4321 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4322 rate->min = rate->max =
4323 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4324 channels->min = channels->max =
4325 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4326 break;
4327
4328 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4329 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4330 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4331 rate->min = rate->max =
4332 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4333 channels->min = channels->max =
4334 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4335 break;
4336
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004337 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4338 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4339 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4340 rate->min = rate->max =
4341 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4342 channels->min = channels->max =
4343 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4349 rate->min = rate->max =
4350 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4351 channels->min = channels->max =
4352 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4353 break;
4354
4355 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4358 rate->min = rate->max =
4359 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4360 channels->min = channels->max =
4361 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4367 rate->min = rate->max =
4368 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4369 channels->min = channels->max =
4370 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4371 break;
4372
4373 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4374 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4375 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4376 rate->min = rate->max =
4377 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4378 channels->min = channels->max =
4379 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4380 break;
4381
4382 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4383 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4384 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4385 rate->min = rate->max =
4386 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4387 channels->min = channels->max =
4388 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4389 break;
4390
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004391 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4392 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4393 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4394 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4395 channels->min = channels->max =
4396 mi2s_rx_cfg[PRIM_MI2S].channels;
4397 break;
4398
4399 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4400 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4401 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4402 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4403 channels->min = channels->max =
4404 mi2s_tx_cfg[PRIM_MI2S].channels;
4405 break;
4406
4407 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4408 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4409 mi2s_rx_cfg[SEC_MI2S].bit_format);
4410 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4411 channels->min = channels->max =
4412 mi2s_rx_cfg[SEC_MI2S].channels;
4413 break;
4414
4415 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4416 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4417 mi2s_tx_cfg[SEC_MI2S].bit_format);
4418 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4419 channels->min = channels->max =
4420 mi2s_tx_cfg[SEC_MI2S].channels;
4421 break;
4422
4423 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4424 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4425 mi2s_rx_cfg[TERT_MI2S].bit_format);
4426 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4427 channels->min = channels->max =
4428 mi2s_rx_cfg[TERT_MI2S].channels;
4429 break;
4430
4431 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4432 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4433 mi2s_tx_cfg[TERT_MI2S].bit_format);
4434 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4435 channels->min = channels->max =
4436 mi2s_tx_cfg[TERT_MI2S].channels;
4437 break;
4438
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004439 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4440 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4441 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4442 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4443 channels->min = channels->max =
4444 mi2s_rx_cfg[QUAT_MI2S].channels;
4445 break;
4446
4447 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4448 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4449 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4450 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4451 channels->min = channels->max =
4452 mi2s_tx_cfg[QUAT_MI2S].channels;
4453 break;
4454
4455 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4456 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4457 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4458 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4459 channels->min = channels->max =
4460 mi2s_rx_cfg[QUIN_MI2S].channels;
4461 break;
4462
4463 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4464 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4465 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4466 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4467 channels->min = channels->max =
4468 mi2s_tx_cfg[QUIN_MI2S].channels;
4469 break;
4470
4471 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4472 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4473 mi2s_rx_cfg[SEN_MI2S].bit_format);
4474 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4475 channels->min = channels->max =
4476 mi2s_rx_cfg[SEN_MI2S].channels;
4477 break;
4478
4479 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4480 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4481 mi2s_tx_cfg[SEN_MI2S].bit_format);
4482 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4483 channels->min = channels->max =
4484 mi2s_tx_cfg[SEN_MI2S].channels;
4485 break;
4486
Meng Wang574f4942019-02-18 12:59:41 +08004487 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4488 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4489 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4490 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4491 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4492 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4493 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4494 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4495 cdc_dma_rx_cfg[idx].bit_format);
4496 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4497 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4498 break;
4499
4500 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4501 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4502 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4503 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4504 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004505 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4506 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4507 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4508 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4509 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +08004510 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004511 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4512 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4513 break;
4514
Meng Wang574f4942019-02-18 12:59:41 +08004515 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304516 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +08004517 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4518 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304519 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +08004520 channels->min = channels->max = msm_vi_feed_tx_ch;
4521 break;
4522
Banajit Goswami83a370d2019-03-05 16:15:21 -08004523 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4524 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4525 slim_rx_cfg[SLIM_RX_7].bit_format);
4526 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4527 channels->min = channels->max =
4528 slim_rx_cfg[SLIM_RX_7].channels;
4529 break;
4530
4531 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +05304532 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4533 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -08004534 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4535 channels->min = channels->max =
4536 slim_tx_cfg[SLIM_TX_7].channels;
4537 break;
4538
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304539 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4540 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4541 channels->min = channels->max =
4542 slim_tx_cfg[SLIM_TX_8].channels;
4543 break;
4544
Meng Wange8e53822019-03-18 10:49:50 +08004545 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4546 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4547 afe_loopback_tx_cfg[idx].bit_format);
4548 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4549 channels->min = channels->max =
4550 afe_loopback_tx_cfg[idx].channels;
4551 break;
4552
Meng Wang574f4942019-02-18 12:59:41 +08004553 default:
4554 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004555 break;
4556 }
4557
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004558done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004559 return rc;
4560}
4561
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08004562static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4563{
4564 struct snd_soc_card *card = component->card;
4565 struct msm_asoc_mach_data *pdata =
4566 snd_soc_card_get_drvdata(card);
4567
4568 if (!pdata->fsa_handle)
4569 return false;
4570
4571 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4572}
4573
4574static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4575{
4576 int value = 0;
4577 bool ret = false;
4578 struct snd_soc_card *card;
4579 struct msm_asoc_mach_data *pdata;
4580
4581 if (!component) {
4582 pr_err("%s component is NULL\n", __func__);
4583 return false;
4584 }
4585 card = component->card;
4586 pdata = snd_soc_card_get_drvdata(card);
4587
4588 if (!pdata)
4589 return false;
4590
4591 if (wcd_mbhc_cfg.enable_usbc_analog)
4592 return msm_usbc_swap_gnd_mic(component, active);
4593
4594 /* if usbc is not defined, swap using us_euro_gpio_p */
4595 if (pdata->us_euro_gpio_p) {
4596 value = msm_cdc_pinctrl_get_state(
4597 pdata->us_euro_gpio_p);
4598 if (value)
4599 msm_cdc_pinctrl_select_sleep_state(
4600 pdata->us_euro_gpio_p);
4601 else
4602 msm_cdc_pinctrl_select_active_state(
4603 pdata->us_euro_gpio_p);
4604 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4605 __func__, value, !value);
4606 ret = true;
4607 }
4608
4609 return ret;
4610}
4611
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004612static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4613 struct snd_pcm_hw_params *params)
4614{
4615 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4616 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4617 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004618 int slot_width = TDM_SLOT_WIDTH_BITS;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004619 int channels, slots;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004620 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004621 unsigned int *slot_offset;
4622 struct tdm_dev_config *config;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004623 struct msm_asoc_mach_data *pdata = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004624 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004625
4626 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4627
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004628 pdata = snd_soc_card_get_drvdata(rtd->card);
4629 slots = pdata->tdm_max_slots;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004630 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004631 pr_err("%s: dai id 0x%x not supported\n",
4632 __func__, cpu_dai->id);
4633 return -EINVAL;
4634 }
4635
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004636 /* RX or TX */
4637 path_dir = cpu_dai->id % MAX_PATH;
4638
4639 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4640 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4641 / (MAX_PATH * TDM_PORT_MAX);
4642
4643 /* 0, 1, 2, .. 7 */
4644 channel_interface =
4645 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4646 % TDM_PORT_MAX;
4647
4648 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4649 __func__, path_dir, interface, channel_interface);
4650
4651 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4652 (path_dir * TDM_PORT_MAX) + channel_interface;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004653 if (!config) {
4654 pr_err("%s: tdm config is NULL\n", __func__);
4655 return -EINVAL;
4656 }
4657
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004658 slot_offset = config->tdm_slot_offset;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004659 if (!slot_offset) {
4660 pr_err("%s: slot offset is NULL\n", __func__);
4661 return -EINVAL;
4662 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004663
4664 if (path_dir)
4665 channels = tdm_tx_cfg[interface][channel_interface].channels;
4666 else
4667 channels = tdm_rx_cfg[interface][channel_interface].channels;
4668
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004669 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4670 /*2 slot config - bits 0 and 1 set for the first two slots */
4671 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004672
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004673 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4674 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004675
4676 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4677 slots, slot_width);
4678 if (ret < 0) {
4679 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4680 __func__, ret);
4681 goto end;
4682 }
4683
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004684 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4685
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004686 ret = snd_soc_dai_set_channel_map(cpu_dai,
4687 0, NULL, channels, slot_offset);
4688 if (ret < 0) {
4689 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4690 __func__, ret);
4691 goto end;
4692 }
4693 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4694 /*2 slot config - bits 0 and 1 set for the first two slots */
4695 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004696
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004697 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4698 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004699
4700 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4701 slots, slot_width);
4702 if (ret < 0) {
4703 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4704 __func__, ret);
4705 goto end;
4706 }
4707
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004708 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4709
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004710 ret = snd_soc_dai_set_channel_map(cpu_dai,
4711 channels, slot_offset, 0, NULL);
4712 if (ret < 0) {
4713 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4714 __func__, ret);
4715 goto end;
4716 }
4717 } else {
4718 ret = -EINVAL;
4719 pr_err("%s: invalid use case, err:%d\n",
4720 __func__, ret);
4721 goto end;
4722 }
4723
4724 rate = params_rate(params);
4725 clk_freq = rate * slot_width * slots;
4726 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4727 if (ret < 0)
4728 pr_err("%s: failed to set tdm clk, err:%d\n",
4729 __func__, ret);
4730
4731end:
4732 return ret;
4733}
4734
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004735static int msm_get_tdm_mode(u32 port_id)
4736{
4737 int tdm_mode;
4738
4739 switch (port_id) {
4740 case AFE_PORT_ID_PRIMARY_TDM_RX:
4741 case AFE_PORT_ID_PRIMARY_TDM_TX:
4742 tdm_mode = TDM_PRI;
4743 break;
4744 case AFE_PORT_ID_SECONDARY_TDM_RX:
4745 case AFE_PORT_ID_SECONDARY_TDM_TX:
4746 tdm_mode = TDM_SEC;
4747 break;
4748 case AFE_PORT_ID_TERTIARY_TDM_RX:
4749 case AFE_PORT_ID_TERTIARY_TDM_TX:
4750 tdm_mode = TDM_TERT;
4751 break;
4752 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4753 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4754 tdm_mode = TDM_QUAT;
4755 break;
4756 case AFE_PORT_ID_QUINARY_TDM_RX:
4757 case AFE_PORT_ID_QUINARY_TDM_TX:
4758 tdm_mode = TDM_QUIN;
4759 break;
4760 case AFE_PORT_ID_SENARY_TDM_RX:
4761 case AFE_PORT_ID_SENARY_TDM_TX:
4762 tdm_mode = TDM_SEN;
4763 break;
4764 default:
4765 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4766 tdm_mode = -EINVAL;
4767 }
4768 return tdm_mode;
4769}
4770
4771static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4772{
4773 int ret = 0;
4774 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4775 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4776 struct snd_soc_card *card = rtd->card;
4777 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4778 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4779
4780 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4781 ret = -EINVAL;
4782 pr_err("%s: Invalid TDM interface %d\n",
4783 __func__, ret);
4784 return ret;
4785 }
4786
4787 if (pdata->mi2s_gpio_p[tdm_mode]) {
4788 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4789 == 0) {
4790 ret = msm_cdc_pinctrl_select_active_state(
4791 pdata->mi2s_gpio_p[tdm_mode]);
4792 if (ret) {
4793 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4794 __func__, ret);
4795 goto done;
4796 }
4797 }
4798 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4799 }
4800
4801done:
4802 return ret;
4803}
4804
4805static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4806{
4807 int ret = 0;
4808 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4809 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4810 struct snd_soc_card *card = rtd->card;
4811 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4812 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4813
4814 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4815 ret = -EINVAL;
4816 pr_err("%s: Invalid TDM interface %d\n",
4817 __func__, ret);
4818 return;
4819 }
4820
4821 if (pdata->mi2s_gpio_p[tdm_mode]) {
4822 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4823 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4824 == 0) {
4825 ret = msm_cdc_pinctrl_select_sleep_state(
4826 pdata->mi2s_gpio_p[tdm_mode]);
4827 if (ret)
4828 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4829 __func__, ret);
4830 }
4831 }
4832}
4833
4834static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4835{
4836 int ret = 0;
4837 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4838 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4839 struct snd_soc_card *card = rtd->card;
4840 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4841 u32 aux_mode = cpu_dai->id - 1;
4842
4843 if (aux_mode >= AUX_PCM_MAX) {
4844 ret = -EINVAL;
4845 pr_err("%s: Invalid AUX interface %d\n",
4846 __func__, ret);
4847 return ret;
4848 }
4849
4850 if (pdata->mi2s_gpio_p[aux_mode]) {
4851 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4852 == 0) {
4853 ret = msm_cdc_pinctrl_select_active_state(
4854 pdata->mi2s_gpio_p[aux_mode]);
4855 if (ret) {
4856 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4857 __func__, ret);
4858 goto done;
4859 }
4860 }
4861 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4862 }
4863
4864done:
4865 return ret;
4866}
4867
4868static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4869{
4870 int ret = 0;
4871 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4872 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4873 struct snd_soc_card *card = rtd->card;
4874 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4875 u32 aux_mode = cpu_dai->id - 1;
4876
4877 if (aux_mode >= AUX_PCM_MAX) {
4878 pr_err("%s: Invalid AUX interface %d\n",
4879 __func__, ret);
4880 return;
4881 }
4882
4883 if (pdata->mi2s_gpio_p[aux_mode]) {
4884 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4885 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4886 == 0) {
4887 ret = msm_cdc_pinctrl_select_sleep_state(
4888 pdata->mi2s_gpio_p[aux_mode]);
4889 if (ret)
4890 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4891 __func__, ret);
4892 }
4893 }
4894}
4895
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004896static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4897{
4898 int ret = 0;
4899 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4900 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4901
4902 switch (dai_link->id) {
4903 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4904 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4905 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4906 ret = kona_send_island_va_config(dai_link->id);
4907 if (ret)
4908 pr_err("%s: send island va cfg failed, err: %d\n",
4909 __func__, ret);
4910 break;
4911 }
4912
4913 return ret;
4914}
4915
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05304916static void set_cps_config(struct snd_soc_pcm_runtime *rtd,
4917 u32 num_ch, u32 ch_mask)
4918{
4919 int i = 0;
4920 int val = 0;
4921 u8 dev_num = 0;
4922 int ch_configured = 0;
4923 int j = 0;
4924 int n = 0;
4925 char wsa_cdc_name[DEV_NAME_STR_LEN];
4926 struct snd_soc_component *component = NULL;
4927 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4928 struct msm_asoc_mach_data *pdata =
4929 snd_soc_card_get_drvdata(rtd->card);
4930
4931 if (!pdata) {
4932 pr_err("%s: pdata is NULL\n", __func__);
4933 return;
4934 }
4935
4936 if (!num_ch) {
4937 pr_err("%s: channel count is 0\n", __func__);
4938 return;
4939 }
4940
4941 if (!pdata->get_wsa_dev_num) {
4942 pr_err("%s: get_wsa_dev_num is NULL\n", __func__);
4943 return;
4944 }
4945
4946 if (!pdata->cps_config.spkr_dep_cfg) {
4947 pr_debug("%s: spkr_dep_cfg is NULL\n", __func__);
4948 return;
4949 }
4950
4951 if (!pdata->cps_config.hw_reg_cfg.lpass_wr_cmd_reg_phy_addr ||
4952 !pdata->cps_config.hw_reg_cfg.lpass_rd_cmd_reg_phy_addr ||
4953 !pdata->cps_config.hw_reg_cfg.lpass_rd_fifo_reg_phy_addr) {
4954 pr_err("%s: cps static configuration is not set\n", __func__);
4955 return;
4956 }
4957
4958 pdata->cps_config.lpass_hw_intf_cfg_mode = 1;
4959
4960 while (ch_configured < num_ch) {
4961 if (!(ch_mask & (1 << i))) {
4962 i++;
4963 continue;
4964 }
4965
4966 snprintf(wsa_cdc_name, sizeof(wsa_cdc_name), "wsa-codec.%d",
4967 i+1);
4968
4969 /* Use n to make sure both WSA components are retrieved */
4970 /* When first WSA component is retrieved adjust looping
4971 variable such that the next time only the remaining part
4972 of the array is traversed */
4973 for (j = n; j < rtd->card->num_aux_devs; j++)
4974 {
4975 if (msm_codec_conf[j].name_prefix != NULL ) {
4976 if (strstr(msm_codec_conf[j].name_prefix,
4977 "Left")) {
4978 component = soc_find_component_locked(
4979 msm_aux_dev[j].codec_of_node,
4980 NULL);
4981 n = j+1;
4982 break;
4983 }
4984 else if (strstr(msm_codec_conf[j].name_prefix,
4985 "Right")) {
4986 component = soc_find_component_locked(
4987 msm_aux_dev[j].codec_of_node,
4988 NULL);
4989 n = j+1;
4990 break;
4991 }
4992 }
4993 }
4994
4995 if (!component) {
4996 pr_err("%s: %s component is NULL\n", __func__,
4997 wsa_cdc_name);
4998 return;
4999 }
5000
5001 dev_num = pdata->get_wsa_dev_num(component);
5002 if (dev_num < 0 || dev_num > SWR_MAX_SLAVE_DEVICES) {
5003 pr_err("%s: invalid slave dev num : %d\n", __func__,
5004 dev_num);
5005 return;
5006 }
5007
5008 /* Clear stale dev num info */
5009 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr &= 0xFFFF;
5010 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr &= 0xFFFF;
5011
5012 val = 0;
5013
5014 /* bits 20:23 carry swr device number */
5015 val |= dev_num << 20;
5016
5017 /* bits 24:27 carry read length in bytes */
5018 val |= 1 << 24;
5019
5020 /* Update dev num in packed reg addr */
5021 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr |= val;
5022 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr |= val;
5023 i++;
5024 ch_configured++;
5025 }
5026
5027 afe_set_cps_config(msm_get_port_id(dai_link->id),
5028 &pdata->cps_config, ch_mask);
5029}
5030
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005031static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5032 struct snd_pcm_hw_params *params)
5033{
5034 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5035 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5036 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5037 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5038
5039 int ret = 0;
5040 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5041 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5042 u32 user_set_tx_ch = 0;
5043 u32 user_set_rx_ch = 0;
5044 u32 ch_id;
5045
5046 ret = snd_soc_dai_get_channel_map(codec_dai,
5047 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5048 &rx_ch_cdc_dma);
5049 if (ret < 0) {
5050 pr_err("%s: failed to get codec chan map, err:%d\n",
5051 __func__, ret);
5052 goto err;
5053 }
5054
5055 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5056 switch (dai_link->id) {
5057 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5058 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5059 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5060 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5061 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5062 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5063 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5064 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5065 {
5066 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5067 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5068 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5069 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5070 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5071 user_set_rx_ch, &rx_ch_cdc_dma);
5072 if (ret < 0) {
5073 pr_err("%s: failed to set cpu chan map, err:%d\n",
5074 __func__, ret);
5075 goto err;
5076 }
5077
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05305078 if (dai_link->id == MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0 ||
5079 dai_link->id == MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1) {
5080 set_cps_config(rtd, user_set_rx_ch,
5081 rx_ch_cdc_dma);
5082 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005083 }
5084 break;
5085 }
5086 } else {
5087 switch (dai_link->id) {
5088 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5089 {
5090 user_set_tx_ch = msm_vi_feed_tx_ch;
5091 }
5092 break;
5093 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5094 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5095 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
5096 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5097 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08005098 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
5099 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
5100 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005101 {
5102 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5103 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5104 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5105 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5106 }
5107 break;
5108 }
5109
5110 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5111 &tx_ch_cdc_dma, 0, 0);
5112 if (ret < 0) {
5113 pr_err("%s: failed to set cpu chan map, err:%d\n",
5114 __func__, ret);
5115 goto err;
5116 }
5117 }
5118
5119err:
5120 return ret;
5121}
5122
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005123static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5124{
5125 cpumask_t mask;
5126
5127 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5128 pm_qos_remove_request(&substream->latency_pm_qos_req);
5129
5130 cpumask_clear(&mask);
5131 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5132 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5133 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5134
5135 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5136
5137 pm_qos_add_request(&substream->latency_pm_qos_req,
5138 PM_QOS_CPU_DMA_LATENCY,
5139 MSM_LL_QOS_VALUE);
5140 return 0;
5141}
5142
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005143void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
5144{
5145 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5146 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5147 int index = cpu_dai->id;
5148 struct snd_soc_card *card = rtd->card;
5149 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5150 int sample_rate = 0;
5151
5152 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5153 sample_rate = mi2s_rx_cfg[index].sample_rate;
5154 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5155 sample_rate = mi2s_tx_cfg[index].sample_rate;
5156 } else {
5157 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5158 return;
5159 }
5160
5161 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5162 if (pdata->lpass_audio_hw_vote != NULL) {
5163 if (--pdata->core_audio_vote_count == 0) {
5164 clk_disable_unprepare(
5165 pdata->lpass_audio_hw_vote);
5166 } else if (pdata->core_audio_vote_count < 0) {
5167 pr_err("%s: audio vote mismatch\n", __func__);
5168 pdata->core_audio_vote_count = 0;
5169 }
5170 } else {
5171 pr_err("%s: Invalid lpass audio hw node\n", __func__);
5172 }
5173 }
5174}
5175
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005176static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5177{
5178 int ret = 0;
5179 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5180 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5181 int index = cpu_dai->id;
5182 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005183 struct snd_soc_card *card = rtd->card;
5184 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005185 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005186
5187 dev_dbg(rtd->card->dev,
5188 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5189 __func__, substream->name, substream->stream,
5190 cpu_dai->name, cpu_dai->id);
5191
5192 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5193 ret = -EINVAL;
5194 dev_err(rtd->card->dev,
5195 "%s: CPU DAI id (%d) out of range\n",
5196 __func__, cpu_dai->id);
5197 goto err;
5198 }
5199 /*
5200 * Mutex protection in case the same MI2S
5201 * interface using for both TX and RX so
5202 * that the same clock won't be enable twice.
5203 */
5204 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005205 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5206 sample_rate = mi2s_rx_cfg[index].sample_rate;
5207 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5208 sample_rate = mi2s_tx_cfg[index].sample_rate;
5209 } else {
5210 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5211 ret = -EINVAL;
5212 goto vote_err;
5213 }
5214
5215 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5216 if (pdata->lpass_audio_hw_vote == NULL) {
5217 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5218 __func__);
5219 ret = -EINVAL;
5220 goto vote_err;
5221 }
5222 if (pdata->core_audio_vote_count == 0) {
5223 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5224 if (ret < 0) {
5225 dev_err(rtd->card->dev, "%s: audio vote error\n",
5226 __func__);
5227 goto vote_err;
5228 }
5229 }
5230 pdata->core_audio_vote_count++;
5231 }
5232
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005233 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5234 /* Check if msm needs to provide the clock to the interface */
5235 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5236 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5237 fmt = SND_SOC_DAIFMT_CBM_CFM;
5238 }
5239 ret = msm_mi2s_set_sclk(substream, true);
5240 if (ret < 0) {
5241 dev_err(rtd->card->dev,
5242 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5243 __func__, ret);
5244 goto clean_up;
5245 }
5246
5247 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5248 if (ret < 0) {
5249 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5250 __func__, index, ret);
5251 goto clk_off;
5252 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005253 if (pdata->mi2s_gpio_p[index]) {
5254 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5255 == 0) {
5256 ret = msm_cdc_pinctrl_select_active_state(
5257 pdata->mi2s_gpio_p[index]);
5258 if (ret) {
5259 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5260 __func__, ret);
5261 goto clk_off;
5262 }
5263 }
5264 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5265 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005266 }
5267clk_off:
5268 if (ret < 0)
5269 msm_mi2s_set_sclk(substream, false);
5270clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005271 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005272 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005273 mi2s_disable_audio_vote(substream);
5274 }
5275vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005276 mutex_unlock(&mi2s_intf_conf[index].lock);
5277err:
5278 return ret;
5279}
5280
5281static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5282{
5283 int ret = 0;
5284 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5285 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005286 struct snd_soc_card *card = rtd->card;
5287 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005288
5289 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5290 substream->name, substream->stream);
5291 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5292 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5293 return;
5294 }
5295
5296 mutex_lock(&mi2s_intf_conf[index].lock);
5297 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005298 if (pdata->mi2s_gpio_p[index]) {
5299 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5300 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5301 == 0) {
5302 ret = msm_cdc_pinctrl_select_sleep_state(
5303 pdata->mi2s_gpio_p[index]);
5304 if (ret)
5305 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5306 __func__, ret);
5307 }
5308 }
5309
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005310 ret = msm_mi2s_set_sclk(substream, false);
5311 if (ret < 0)
5312 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5313 __func__, index, ret);
5314 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005315 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005316 mutex_unlock(&mi2s_intf_conf[index].lock);
5317}
5318
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305319static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5320 struct snd_pcm_hw_params *params)
5321{
5322 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5323 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5324 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5325 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5326 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5327 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5328 int ret = 0;
5329
5330 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5331 codec_dai->name, codec_dai->id);
5332 ret = snd_soc_dai_get_channel_map(codec_dai,
5333 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5334 if (ret) {
5335 dev_err(rtd->dev,
5336 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5337 __func__, ret);
5338 goto err;
5339 }
5340
5341 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5342 __func__, tx_ch_cnt, dai_link->id);
5343
5344 ret = snd_soc_dai_set_channel_map(cpu_dai,
5345 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5346 if (ret)
5347 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5348 __func__, ret);
5349
5350err:
5351 return ret;
5352}
5353
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005354static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5355 struct snd_pcm_hw_params *params)
5356{
5357 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5358 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5359 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5360 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5361 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5362 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5363 int ret = 0;
5364
5365 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5366 codec_dai->name, codec_dai->id);
5367 ret = snd_soc_dai_get_channel_map(codec_dai,
5368 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5369 if (ret) {
5370 dev_err(rtd->dev,
5371 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5372 __func__, ret);
5373 goto err;
5374 }
5375
5376 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5377 __func__, tx_ch_cnt, dai_link->id);
5378
5379 ret = snd_soc_dai_set_channel_map(cpu_dai,
5380 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5381 if (ret)
5382 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5383 __func__, ret);
5384
5385err:
5386 return ret;
5387}
5388
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005389static struct snd_soc_ops kona_aux_be_ops = {
5390 .startup = kona_aux_snd_startup,
5391 .shutdown = kona_aux_snd_shutdown
5392};
5393
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005394static struct snd_soc_ops kona_tdm_be_ops = {
5395 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005396 .startup = kona_tdm_snd_startup,
5397 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005398};
5399
5400static struct snd_soc_ops msm_mi2s_be_ops = {
5401 .startup = msm_mi2s_snd_startup,
5402 .shutdown = msm_mi2s_snd_shutdown,
5403};
5404
5405static struct snd_soc_ops msm_fe_qos_ops = {
5406 .prepare = msm_fe_qos_prepare,
5407};
5408
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005409static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07005410 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005411 .hw_params = msm_snd_cdc_dma_hw_params,
5412};
5413
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005414static struct snd_soc_ops msm_wcn_ops = {
5415 .hw_params = msm_wcn_hw_params,
5416};
5417
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305418static struct snd_soc_ops msm_wcn_ops_lito = {
5419 .hw_params = msm_wcn_hw_params_lito,
5420};
5421
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005422static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5423 struct snd_kcontrol *kcontrol, int event)
5424{
5425 struct msm_asoc_mach_data *pdata = NULL;
5426 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5427 int ret = 0;
5428 u32 dmic_idx;
5429 int *dmic_gpio_cnt;
5430 struct device_node *dmic_gpio;
5431 char *wname;
5432
5433 wname = strpbrk(w->name, "012345");
5434 if (!wname) {
5435 dev_err(component->dev, "%s: widget not found\n", __func__);
5436 return -EINVAL;
5437 }
5438
5439 ret = kstrtouint(wname, 10, &dmic_idx);
5440 if (ret < 0) {
5441 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5442 __func__);
5443 return -EINVAL;
5444 }
5445
5446 pdata = snd_soc_card_get_drvdata(component->card);
5447
5448 switch (dmic_idx) {
5449 case 0:
5450 case 1:
5451 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5452 dmic_gpio = pdata->dmic01_gpio_p;
5453 break;
5454 case 2:
5455 case 3:
5456 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5457 dmic_gpio = pdata->dmic23_gpio_p;
5458 break;
5459 case 4:
5460 case 5:
5461 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5462 dmic_gpio = pdata->dmic45_gpio_p;
5463 break;
5464 default:
5465 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5466 __func__);
5467 return -EINVAL;
5468 }
5469
5470 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5471 __func__, event, dmic_idx, *dmic_gpio_cnt);
5472
5473 switch (event) {
5474 case SND_SOC_DAPM_PRE_PMU:
5475 (*dmic_gpio_cnt)++;
5476 if (*dmic_gpio_cnt == 1) {
5477 ret = msm_cdc_pinctrl_select_active_state(
5478 dmic_gpio);
5479 if (ret < 0) {
5480 pr_err("%s: gpio set cannot be activated %sd",
5481 __func__, "dmic_gpio");
5482 return ret;
5483 }
5484 }
5485
5486 break;
5487 case SND_SOC_DAPM_POST_PMD:
5488 (*dmic_gpio_cnt)--;
5489 if (*dmic_gpio_cnt == 0) {
5490 ret = msm_cdc_pinctrl_select_sleep_state(
5491 dmic_gpio);
5492 if (ret < 0) {
5493 pr_err("%s: gpio set cannot be de-activated %sd",
5494 __func__, "dmic_gpio");
5495 return ret;
5496 }
5497 }
5498 break;
5499 default:
5500 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5501 return -EINVAL;
5502 }
5503 return 0;
5504}
5505
5506static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5507 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5508 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5509 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5510 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005511 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005512 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5513 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5514 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5515 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5516 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5517 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305518 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5519 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005520};
5521
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005522static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5523{
5524 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5525 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5526 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5527
5528 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5529 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5530}
5531
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305532static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5533{
5534 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5535 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5536 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5537
5538 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5539 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5540}
5541
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305542#ifndef CONFIG_TDM_DISABLE
5543static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5544{
5545 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5546 ARRAY_SIZE(msm_tdm_snd_controls));
5547}
5548#else
5549static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5550{
5551 return;
5552}
5553#endif
5554
5555#ifndef CONFIG_MI2S_DISABLE
5556static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5557{
5558 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5559 ARRAY_SIZE(msm_mi2s_snd_controls));
5560}
5561#else
5562static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5563{
5564 return;
5565}
5566#endif
5567
5568#ifndef CONFIG_AUXPCM_DISABLE
5569static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5570{
5571 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5572 ARRAY_SIZE(msm_auxpcm_snd_controls));
5573}
5574#else
5575static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5576{
5577 return;
5578}
5579#endif
5580
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005581static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5582{
5583 int ret = -EINVAL;
5584 struct snd_soc_component *component;
5585 struct snd_soc_dapm_context *dapm;
5586 struct snd_card *card;
5587 struct snd_info_entry *entry;
5588 struct snd_soc_component *aux_comp;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005589 struct platform_device *pdev = NULL;
5590 int i = 0;
Kunlei Zhangf712be02020-06-30 21:05:46 +08005591 bool is_wcd937x_used = false;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005592 char *data = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005593 struct msm_asoc_mach_data *pdata =
5594 snd_soc_card_get_drvdata(rtd->card);
5595
5596 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5597 if (!component) {
5598 pr_err("%s: could not find component for bolero_codec\n",
5599 __func__);
5600 return ret;
5601 }
5602
5603 dapm = snd_soc_component_get_dapm(component);
5604
5605 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5606 ARRAY_SIZE(msm_int_snd_controls));
5607 if (ret < 0) {
5608 pr_err("%s: add_component_controls failed: %d\n",
5609 __func__, ret);
5610 return ret;
5611 }
5612 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5613 ARRAY_SIZE(msm_common_snd_controls));
5614 if (ret < 0) {
5615 pr_err("%s: add common snd controls failed: %d\n",
5616 __func__, ret);
5617 return ret;
5618 }
5619
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305620 msm_add_tdm_snd_controls(component);
5621 msm_add_mi2s_snd_controls(component);
5622 msm_add_auxpcm_snd_controls(component);
5623
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005624 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5625 ARRAY_SIZE(msm_int_dapm_widgets));
5626
5627 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5628 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5629 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5630 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +05305631 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5632 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305633 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5634 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005635
5636 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5637 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5638 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5639 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005640 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005641
5642 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5643 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5644 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5645 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5646
5647 snd_soc_dapm_sync(dapm);
5648
5649 /*
5650 * Send speaker configuration only for WSA8810.
5651 * Default configuration is for WSA8815.
5652 */
5653 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5654 __func__, rtd->card->num_aux_devs);
5655 if (rtd->card->num_aux_devs &&
5656 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +08005657 list_for_each_entry(aux_comp,
5658 &rtd->card->aux_comp_list,
5659 card_aux_list) {
5660 if (aux_comp->name != NULL && (
5661 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5662 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5663 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005664 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005665 wsa_macro_set_spkr_gain_offset(component,
5666 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
Laxminath Kasamd3621032020-04-01 18:14:05 +05305667 } else if (aux_comp->name != NULL && (
5668 !strcmp(aux_comp->name, WSA8815_NAME_1) ||
5669 !strcmp(aux_comp->name, WSA8815_NAME_2))) {
5670 wsa_macro_set_spkr_mode(component,
5671 WSA_MACRO_SPKR_MODE_DEFAULT);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005672 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005673 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005674 }
5675
5676 for (i = 0; i < rtd->card->num_aux_devs; i++)
5677 {
5678 if (msm_aux_dev[i].name != NULL ) {
5679 if (strstr(msm_aux_dev[i].name, "wsa"))
5680 continue;
5681 }
5682
5683 if (msm_aux_dev[i].codec_of_node) {
5684 pdev = of_find_device_by_node(
5685 msm_aux_dev[i].codec_of_node);
5686
5687 if (pdev)
5688 data = (char*) of_device_get_match_data(
5689 &pdev->dev);
5690 if (data != NULL) {
5691 if (!strncmp(data, "wcd937x",
5692 sizeof("wcd937x"))) {
Kunlei Zhangf712be02020-06-30 21:05:46 +08005693 is_wcd937x_used = true;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005694 break;
5695 }
5696 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +05305697 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005698 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005699
Kunlei Zhangf712be02020-06-30 21:05:46 +08005700 if (is_wcd937x_used) {
5701 bolero_set_port_map(component,
5702 ARRAY_SIZE(sm_port_map_wcd937x),
5703 sm_port_map_wcd937x);
5704 } else if (pdata->lito_v2_enabled) {
5705 /*
5706 * Enable tx data line3 for saipan version v2 and
5707 * write corresponding lpi register.
5708 */
5709 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5710 sm_port_map_v2);
5711 } else {
5712 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5713 sm_port_map);
5714 }
5715
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005716 card = rtd->card->snd_card;
5717 if (!pdata->codec_root) {
5718 entry = snd_info_create_subdir(card->module, "codecs",
5719 card->proc_root);
5720 if (!entry) {
5721 pr_debug("%s: Cannot create codecs module entry\n",
5722 __func__);
5723 ret = 0;
5724 goto err;
5725 }
5726 pdata->codec_root = entry;
5727 }
5728 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -08005729 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005730 codec_reg_done = true;
5731 return 0;
5732err:
5733 return ret;
5734}
5735
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08005736static void *def_wcd_mbhc_cal(void)
5737{
5738 void *wcd_mbhc_cal;
5739 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5740 u16 *btn_high;
5741
5742 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5743 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5744 if (!wcd_mbhc_cal)
5745 return NULL;
5746
5747 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5748 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5749 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5750 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5751 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5752
5753 btn_high[0] = 75;
5754 btn_high[1] = 150;
5755 btn_high[2] = 237;
5756 btn_high[3] = 500;
5757 btn_high[4] = 500;
5758 btn_high[5] = 500;
5759 btn_high[6] = 500;
5760 btn_high[7] = 500;
5761
5762 return wcd_mbhc_cal;
5763}
5764
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005765/* Digital audio interface glue - connects codec <---> CPU */
5766static struct snd_soc_dai_link msm_common_dai_links[] = {
5767 /* FrontEnd DAI Links */
5768 {/* hw:x,0 */
5769 .name = MSM_DAILINK_NAME(Media1),
5770 .stream_name = "MultiMedia1",
5771 .cpu_dai_name = "MultiMedia1",
5772 .platform_name = "msm-pcm-dsp.0",
5773 .dynamic = 1,
5774 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5775 .dpcm_playback = 1,
5776 .dpcm_capture = 1,
5777 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5778 SND_SOC_DPCM_TRIGGER_POST},
5779 .codec_dai_name = "snd-soc-dummy-dai",
5780 .codec_name = "snd-soc-dummy",
5781 .ignore_suspend = 1,
5782 /* this dainlink has playback support */
5783 .ignore_pmdown_time = 1,
5784 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5785 },
5786 {/* hw:x,1 */
5787 .name = MSM_DAILINK_NAME(Media2),
5788 .stream_name = "MultiMedia2",
5789 .cpu_dai_name = "MultiMedia2",
5790 .platform_name = "msm-pcm-dsp.0",
5791 .dynamic = 1,
5792 .dpcm_playback = 1,
5793 .dpcm_capture = 1,
5794 .codec_dai_name = "snd-soc-dummy-dai",
5795 .codec_name = "snd-soc-dummy",
5796 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5797 SND_SOC_DPCM_TRIGGER_POST},
5798 .ignore_suspend = 1,
5799 /* this dainlink has playback support */
5800 .ignore_pmdown_time = 1,
5801 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5802 },
5803 {/* hw:x,2 */
5804 .name = "VoiceMMode1",
5805 .stream_name = "VoiceMMode1",
5806 .cpu_dai_name = "VoiceMMode1",
5807 .platform_name = "msm-pcm-voice",
5808 .dynamic = 1,
5809 .dpcm_playback = 1,
5810 .dpcm_capture = 1,
5811 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5812 SND_SOC_DPCM_TRIGGER_POST},
5813 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5814 .ignore_suspend = 1,
5815 .ignore_pmdown_time = 1,
5816 .codec_dai_name = "snd-soc-dummy-dai",
5817 .codec_name = "snd-soc-dummy",
5818 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5819 },
5820 {/* hw:x,3 */
5821 .name = "MSM VoIP",
5822 .stream_name = "VoIP",
5823 .cpu_dai_name = "VoIP",
5824 .platform_name = "msm-voip-dsp",
5825 .dynamic = 1,
5826 .dpcm_playback = 1,
5827 .dpcm_capture = 1,
5828 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5829 SND_SOC_DPCM_TRIGGER_POST},
5830 .codec_dai_name = "snd-soc-dummy-dai",
5831 .codec_name = "snd-soc-dummy",
5832 .ignore_suspend = 1,
5833 /* this dainlink has playback support */
5834 .ignore_pmdown_time = 1,
5835 .id = MSM_FRONTEND_DAI_VOIP,
5836 },
5837 {/* hw:x,4 */
5838 .name = MSM_DAILINK_NAME(ULL),
5839 .stream_name = "MultiMedia3",
5840 .cpu_dai_name = "MultiMedia3",
5841 .platform_name = "msm-pcm-dsp.2",
5842 .dynamic = 1,
5843 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5844 .dpcm_playback = 1,
5845 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5846 SND_SOC_DPCM_TRIGGER_POST},
5847 .codec_dai_name = "snd-soc-dummy-dai",
5848 .codec_name = "snd-soc-dummy",
5849 .ignore_suspend = 1,
5850 /* this dainlink has playback support */
5851 .ignore_pmdown_time = 1,
5852 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5853 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005854 {/* hw:x,5 */
5855 .name = "MSM AFE-PCM RX",
5856 .stream_name = "AFE-PROXY RX",
5857 .cpu_dai_name = "msm-dai-q6-dev.241",
5858 .codec_name = "msm-stub-codec.1",
5859 .codec_dai_name = "msm-stub-rx",
5860 .platform_name = "msm-pcm-afe",
5861 .dpcm_playback = 1,
5862 .ignore_suspend = 1,
5863 /* this dainlink has playback support */
5864 .ignore_pmdown_time = 1,
5865 },
5866 {/* hw:x,6 */
5867 .name = "MSM AFE-PCM TX",
5868 .stream_name = "AFE-PROXY TX",
5869 .cpu_dai_name = "msm-dai-q6-dev.240",
5870 .codec_name = "msm-stub-codec.1",
5871 .codec_dai_name = "msm-stub-tx",
5872 .platform_name = "msm-pcm-afe",
5873 .dpcm_capture = 1,
5874 .ignore_suspend = 1,
5875 },
5876 {/* hw:x,7 */
5877 .name = MSM_DAILINK_NAME(Compress1),
5878 .stream_name = "Compress1",
5879 .cpu_dai_name = "MultiMedia4",
5880 .platform_name = "msm-compress-dsp",
5881 .dynamic = 1,
5882 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5883 .dpcm_playback = 1,
5884 .dpcm_capture = 1,
5885 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5886 SND_SOC_DPCM_TRIGGER_POST},
5887 .codec_dai_name = "snd-soc-dummy-dai",
5888 .codec_name = "snd-soc-dummy",
5889 .ignore_suspend = 1,
5890 .ignore_pmdown_time = 1,
5891 /* this dainlink has playback support */
5892 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5893 },
Meng Wang197cb302019-03-01 13:54:38 +08005894 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005895 {/* hw:x,8 */
5896 .name = "AUXPCM Hostless",
5897 .stream_name = "AUXPCM Hostless",
5898 .cpu_dai_name = "AUXPCM_HOSTLESS",
5899 .platform_name = "msm-pcm-hostless",
5900 .dynamic = 1,
5901 .dpcm_playback = 1,
5902 .dpcm_capture = 1,
5903 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5904 SND_SOC_DPCM_TRIGGER_POST},
5905 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5906 .ignore_suspend = 1,
5907 /* this dainlink has playback support */
5908 .ignore_pmdown_time = 1,
5909 .codec_dai_name = "snd-soc-dummy-dai",
5910 .codec_name = "snd-soc-dummy",
5911 },
5912 {/* hw:x,9 */
5913 .name = MSM_DAILINK_NAME(LowLatency),
5914 .stream_name = "MultiMedia5",
5915 .cpu_dai_name = "MultiMedia5",
5916 .platform_name = "msm-pcm-dsp.1",
5917 .dynamic = 1,
5918 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5919 .dpcm_playback = 1,
5920 .dpcm_capture = 1,
5921 .codec_dai_name = "snd-soc-dummy-dai",
5922 .codec_name = "snd-soc-dummy",
5923 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5924 SND_SOC_DPCM_TRIGGER_POST},
5925 .ignore_suspend = 1,
5926 /* this dainlink has playback support */
5927 .ignore_pmdown_time = 1,
5928 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5929 .ops = &msm_fe_qos_ops,
5930 },
5931 {/* hw:x,10 */
5932 .name = "Listen 1 Audio Service",
5933 .stream_name = "Listen 1 Audio Service",
5934 .cpu_dai_name = "LSM1",
5935 .platform_name = "msm-lsm-client",
5936 .dynamic = 1,
5937 .dpcm_capture = 1,
5938 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5939 SND_SOC_DPCM_TRIGGER_POST },
5940 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5941 .ignore_suspend = 1,
5942 .codec_dai_name = "snd-soc-dummy-dai",
5943 .codec_name = "snd-soc-dummy",
5944 .id = MSM_FRONTEND_DAI_LSM1,
5945 },
5946 /* Multiple Tunnel instances */
5947 {/* hw:x,11 */
5948 .name = MSM_DAILINK_NAME(Compress2),
5949 .stream_name = "Compress2",
5950 .cpu_dai_name = "MultiMedia7",
5951 .platform_name = "msm-compress-dsp",
5952 .dynamic = 1,
5953 .dpcm_playback = 1,
5954 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5955 SND_SOC_DPCM_TRIGGER_POST},
5956 .codec_dai_name = "snd-soc-dummy-dai",
5957 .codec_name = "snd-soc-dummy",
5958 .ignore_suspend = 1,
5959 .ignore_pmdown_time = 1,
5960 /* this dainlink has playback support */
5961 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5962 },
5963 {/* hw:x,12 */
5964 .name = MSM_DAILINK_NAME(MultiMedia10),
5965 .stream_name = "MultiMedia10",
5966 .cpu_dai_name = "MultiMedia10",
5967 .platform_name = "msm-pcm-dsp.1",
5968 .dynamic = 1,
5969 .dpcm_playback = 1,
5970 .dpcm_capture = 1,
5971 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5972 SND_SOC_DPCM_TRIGGER_POST},
5973 .codec_dai_name = "snd-soc-dummy-dai",
5974 .codec_name = "snd-soc-dummy",
5975 .ignore_suspend = 1,
5976 .ignore_pmdown_time = 1,
5977 /* this dainlink has playback support */
5978 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5979 },
5980 {/* hw:x,13 */
5981 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5982 .stream_name = "MM_NOIRQ",
5983 .cpu_dai_name = "MultiMedia8",
5984 .platform_name = "msm-pcm-dsp-noirq",
5985 .dynamic = 1,
5986 .dpcm_playback = 1,
5987 .dpcm_capture = 1,
5988 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5989 SND_SOC_DPCM_TRIGGER_POST},
5990 .codec_dai_name = "snd-soc-dummy-dai",
5991 .codec_name = "snd-soc-dummy",
5992 .ignore_suspend = 1,
5993 .ignore_pmdown_time = 1,
5994 /* this dainlink has playback support */
5995 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5996 .ops = &msm_fe_qos_ops,
5997 },
5998 /* HDMI Hostless */
5999 {/* hw:x,14 */
6000 .name = "HDMI_RX_HOSTLESS",
6001 .stream_name = "HDMI_RX_HOSTLESS",
6002 .cpu_dai_name = "HDMI_HOSTLESS",
6003 .platform_name = "msm-pcm-hostless",
6004 .dynamic = 1,
6005 .dpcm_playback = 1,
6006 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6007 SND_SOC_DPCM_TRIGGER_POST},
6008 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6009 .ignore_suspend = 1,
6010 .ignore_pmdown_time = 1,
6011 .codec_dai_name = "snd-soc-dummy-dai",
6012 .codec_name = "snd-soc-dummy",
6013 },
6014 {/* hw:x,15 */
6015 .name = "VoiceMMode2",
6016 .stream_name = "VoiceMMode2",
6017 .cpu_dai_name = "VoiceMMode2",
6018 .platform_name = "msm-pcm-voice",
6019 .dynamic = 1,
6020 .dpcm_playback = 1,
6021 .dpcm_capture = 1,
6022 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6023 SND_SOC_DPCM_TRIGGER_POST},
6024 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6025 .ignore_suspend = 1,
6026 .ignore_pmdown_time = 1,
6027 .codec_dai_name = "snd-soc-dummy-dai",
6028 .codec_name = "snd-soc-dummy",
6029 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6030 },
6031 /* LSM FE */
6032 {/* hw:x,16 */
6033 .name = "Listen 2 Audio Service",
6034 .stream_name = "Listen 2 Audio Service",
6035 .cpu_dai_name = "LSM2",
6036 .platform_name = "msm-lsm-client",
6037 .dynamic = 1,
6038 .dpcm_capture = 1,
6039 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6040 SND_SOC_DPCM_TRIGGER_POST },
6041 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6042 .ignore_suspend = 1,
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 .id = MSM_FRONTEND_DAI_LSM2,
6046 },
6047 {/* hw:x,17 */
6048 .name = "Listen 3 Audio Service",
6049 .stream_name = "Listen 3 Audio Service",
6050 .cpu_dai_name = "LSM3",
6051 .platform_name = "msm-lsm-client",
6052 .dynamic = 1,
6053 .dpcm_capture = 1,
6054 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6055 SND_SOC_DPCM_TRIGGER_POST },
6056 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6057 .ignore_suspend = 1,
6058 .codec_dai_name = "snd-soc-dummy-dai",
6059 .codec_name = "snd-soc-dummy",
6060 .id = MSM_FRONTEND_DAI_LSM3,
6061 },
6062 {/* hw:x,18 */
6063 .name = "Listen 4 Audio Service",
6064 .stream_name = "Listen 4 Audio Service",
6065 .cpu_dai_name = "LSM4",
6066 .platform_name = "msm-lsm-client",
6067 .dynamic = 1,
6068 .dpcm_capture = 1,
6069 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6070 SND_SOC_DPCM_TRIGGER_POST },
6071 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6072 .ignore_suspend = 1,
6073 .codec_dai_name = "snd-soc-dummy-dai",
6074 .codec_name = "snd-soc-dummy",
6075 .id = MSM_FRONTEND_DAI_LSM4,
6076 },
6077 {/* hw:x,19 */
6078 .name = "Listen 5 Audio Service",
6079 .stream_name = "Listen 5 Audio Service",
6080 .cpu_dai_name = "LSM5",
6081 .platform_name = "msm-lsm-client",
6082 .dynamic = 1,
6083 .dpcm_capture = 1,
6084 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6085 SND_SOC_DPCM_TRIGGER_POST },
6086 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6087 .ignore_suspend = 1,
6088 .codec_dai_name = "snd-soc-dummy-dai",
6089 .codec_name = "snd-soc-dummy",
6090 .id = MSM_FRONTEND_DAI_LSM5,
6091 },
6092 {/* hw:x,20 */
6093 .name = "Listen 6 Audio Service",
6094 .stream_name = "Listen 6 Audio Service",
6095 .cpu_dai_name = "LSM6",
6096 .platform_name = "msm-lsm-client",
6097 .dynamic = 1,
6098 .dpcm_capture = 1,
6099 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6100 SND_SOC_DPCM_TRIGGER_POST },
6101 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6102 .ignore_suspend = 1,
6103 .codec_dai_name = "snd-soc-dummy-dai",
6104 .codec_name = "snd-soc-dummy",
6105 .id = MSM_FRONTEND_DAI_LSM6,
6106 },
6107 {/* hw:x,21 */
6108 .name = "Listen 7 Audio Service",
6109 .stream_name = "Listen 7 Audio Service",
6110 .cpu_dai_name = "LSM7",
6111 .platform_name = "msm-lsm-client",
6112 .dynamic = 1,
6113 .dpcm_capture = 1,
6114 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6115 SND_SOC_DPCM_TRIGGER_POST },
6116 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6117 .ignore_suspend = 1,
6118 .codec_dai_name = "snd-soc-dummy-dai",
6119 .codec_name = "snd-soc-dummy",
6120 .id = MSM_FRONTEND_DAI_LSM7,
6121 },
6122 {/* hw:x,22 */
6123 .name = "Listen 8 Audio Service",
6124 .stream_name = "Listen 8 Audio Service",
6125 .cpu_dai_name = "LSM8",
6126 .platform_name = "msm-lsm-client",
6127 .dynamic = 1,
6128 .dpcm_capture = 1,
6129 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6130 SND_SOC_DPCM_TRIGGER_POST },
6131 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6132 .ignore_suspend = 1,
6133 .codec_dai_name = "snd-soc-dummy-dai",
6134 .codec_name = "snd-soc-dummy",
6135 .id = MSM_FRONTEND_DAI_LSM8,
6136 },
6137 {/* hw:x,23 */
6138 .name = MSM_DAILINK_NAME(Media9),
6139 .stream_name = "MultiMedia9",
6140 .cpu_dai_name = "MultiMedia9",
6141 .platform_name = "msm-pcm-dsp.0",
6142 .dynamic = 1,
6143 .dpcm_playback = 1,
6144 .dpcm_capture = 1,
6145 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6146 SND_SOC_DPCM_TRIGGER_POST},
6147 .codec_dai_name = "snd-soc-dummy-dai",
6148 .codec_name = "snd-soc-dummy",
6149 .ignore_suspend = 1,
6150 /* this dainlink has playback support */
6151 .ignore_pmdown_time = 1,
6152 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6153 },
6154 {/* hw:x,24 */
6155 .name = MSM_DAILINK_NAME(Compress4),
6156 .stream_name = "Compress4",
6157 .cpu_dai_name = "MultiMedia11",
6158 .platform_name = "msm-compress-dsp",
6159 .dynamic = 1,
6160 .dpcm_playback = 1,
6161 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6162 SND_SOC_DPCM_TRIGGER_POST},
6163 .codec_dai_name = "snd-soc-dummy-dai",
6164 .codec_name = "snd-soc-dummy",
6165 .ignore_suspend = 1,
6166 .ignore_pmdown_time = 1,
6167 /* this dainlink has playback support */
6168 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6169 },
6170 {/* hw:x,25 */
6171 .name = MSM_DAILINK_NAME(Compress5),
6172 .stream_name = "Compress5",
6173 .cpu_dai_name = "MultiMedia12",
6174 .platform_name = "msm-compress-dsp",
6175 .dynamic = 1,
6176 .dpcm_playback = 1,
6177 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6178 SND_SOC_DPCM_TRIGGER_POST},
6179 .codec_dai_name = "snd-soc-dummy-dai",
6180 .codec_name = "snd-soc-dummy",
6181 .ignore_suspend = 1,
6182 .ignore_pmdown_time = 1,
6183 /* this dainlink has playback support */
6184 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6185 },
6186 {/* hw:x,26 */
6187 .name = MSM_DAILINK_NAME(Compress6),
6188 .stream_name = "Compress6",
6189 .cpu_dai_name = "MultiMedia13",
6190 .platform_name = "msm-compress-dsp",
6191 .dynamic = 1,
6192 .dpcm_playback = 1,
6193 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6194 SND_SOC_DPCM_TRIGGER_POST},
6195 .codec_dai_name = "snd-soc-dummy-dai",
6196 .codec_name = "snd-soc-dummy",
6197 .ignore_suspend = 1,
6198 .ignore_pmdown_time = 1,
6199 /* this dainlink has playback support */
6200 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6201 },
6202 {/* hw:x,27 */
6203 .name = MSM_DAILINK_NAME(Compress7),
6204 .stream_name = "Compress7",
6205 .cpu_dai_name = "MultiMedia14",
6206 .platform_name = "msm-compress-dsp",
6207 .dynamic = 1,
6208 .dpcm_playback = 1,
6209 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6210 SND_SOC_DPCM_TRIGGER_POST},
6211 .codec_dai_name = "snd-soc-dummy-dai",
6212 .codec_name = "snd-soc-dummy",
6213 .ignore_suspend = 1,
6214 .ignore_pmdown_time = 1,
6215 /* this dainlink has playback support */
6216 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6217 },
6218 {/* hw:x,28 */
6219 .name = MSM_DAILINK_NAME(Compress8),
6220 .stream_name = "Compress8",
6221 .cpu_dai_name = "MultiMedia15",
6222 .platform_name = "msm-compress-dsp",
6223 .dynamic = 1,
6224 .dpcm_playback = 1,
6225 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6226 SND_SOC_DPCM_TRIGGER_POST},
6227 .codec_dai_name = "snd-soc-dummy-dai",
6228 .codec_name = "snd-soc-dummy",
6229 .ignore_suspend = 1,
6230 .ignore_pmdown_time = 1,
6231 /* this dainlink has playback support */
6232 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6233 },
6234 {/* hw:x,29 */
6235 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6236 .stream_name = "MM_NOIRQ_2",
6237 .cpu_dai_name = "MultiMedia16",
6238 .platform_name = "msm-pcm-dsp-noirq",
6239 .dynamic = 1,
6240 .dpcm_playback = 1,
6241 .dpcm_capture = 1,
6242 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6243 SND_SOC_DPCM_TRIGGER_POST},
6244 .codec_dai_name = "snd-soc-dummy-dai",
6245 .codec_name = "snd-soc-dummy",
6246 .ignore_suspend = 1,
6247 .ignore_pmdown_time = 1,
6248 /* this dainlink has playback support */
6249 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -07006250 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006251 },
6252 {/* hw:x,30 */
6253 .name = "CDC_DMA Hostless",
6254 .stream_name = "CDC_DMA Hostless",
6255 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6256 .platform_name = "msm-pcm-hostless",
6257 .dynamic = 1,
6258 .dpcm_playback = 1,
6259 .dpcm_capture = 1,
6260 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6261 SND_SOC_DPCM_TRIGGER_POST},
6262 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6263 .ignore_suspend = 1,
6264 /* this dailink has playback support */
6265 .ignore_pmdown_time = 1,
6266 .codec_dai_name = "snd-soc-dummy-dai",
6267 .codec_name = "snd-soc-dummy",
6268 },
6269 {/* hw:x,31 */
6270 .name = "TX3_CDC_DMA Hostless",
6271 .stream_name = "TX3_CDC_DMA Hostless",
6272 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6273 .platform_name = "msm-pcm-hostless",
6274 .dynamic = 1,
6275 .dpcm_capture = 1,
6276 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6277 SND_SOC_DPCM_TRIGGER_POST},
6278 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6279 .ignore_suspend = 1,
6280 .codec_dai_name = "snd-soc-dummy-dai",
6281 .codec_name = "snd-soc-dummy",
6282 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006283 {/* hw:x,32 */
6284 .name = "Tertiary MI2S TX_Hostless",
6285 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6286 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6287 .platform_name = "msm-pcm-hostless",
6288 .dynamic = 1,
6289 .dpcm_capture = 1,
6290 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6291 SND_SOC_DPCM_TRIGGER_POST},
6292 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6293 .ignore_suspend = 1,
6294 .ignore_pmdown_time = 1,
6295 .codec_dai_name = "snd-soc-dummy-dai",
6296 .codec_name = "snd-soc-dummy",
6297 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006298};
6299
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006300static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006301 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006302 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6303 .stream_name = "WSA CDC DMA0 Capture",
6304 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6305 .platform_name = "msm-pcm-hostless",
6306 .codec_name = "bolero_codec",
6307 .codec_dai_name = "wsa_macro_vifeedback",
6308 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6309 .be_hw_params_fixup = msm_be_hw_params_fixup,
6310 .ignore_suspend = 1,
6311 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6312 .ops = &msm_cdc_dma_be_ops,
6313 },
6314};
6315
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006316static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006317 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006318 .name = MSM_DAILINK_NAME(ASM Loopback),
6319 .stream_name = "MultiMedia6",
6320 .cpu_dai_name = "MultiMedia6",
6321 .platform_name = "msm-pcm-loopback",
6322 .dynamic = 1,
6323 .dpcm_playback = 1,
6324 .dpcm_capture = 1,
6325 .codec_dai_name = "snd-soc-dummy-dai",
6326 .codec_name = "snd-soc-dummy",
6327 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6328 SND_SOC_DPCM_TRIGGER_POST},
6329 .ignore_suspend = 1,
6330 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6331 .ignore_pmdown_time = 1,
6332 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6333 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006334 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006335 .name = "USB Audio Hostless",
6336 .stream_name = "USB Audio Hostless",
6337 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6338 .platform_name = "msm-pcm-hostless",
6339 .dynamic = 1,
6340 .dpcm_playback = 1,
6341 .dpcm_capture = 1,
6342 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6343 SND_SOC_DPCM_TRIGGER_POST},
6344 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6345 .ignore_suspend = 1,
6346 .ignore_pmdown_time = 1,
6347 .codec_dai_name = "snd-soc-dummy-dai",
6348 .codec_name = "snd-soc-dummy",
6349 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006350 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006351 .name = "SLIMBUS_7 Hostless",
6352 .stream_name = "SLIMBUS_7 Hostless",
6353 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6354 .platform_name = "msm-pcm-hostless",
6355 .dynamic = 1,
6356 .dpcm_capture = 1,
6357 .dpcm_playback = 1,
6358 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6359 SND_SOC_DPCM_TRIGGER_POST},
6360 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6361 .ignore_suspend = 1,
6362 .ignore_pmdown_time = 1,
6363 .codec_dai_name = "snd-soc-dummy-dai",
6364 .codec_name = "snd-soc-dummy",
6365 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006366 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006367 .name = "Compress Capture",
6368 .stream_name = "Compress9",
6369 .cpu_dai_name = "MultiMedia17",
6370 .platform_name = "msm-compress-dsp",
6371 .dynamic = 1,
6372 .dpcm_capture = 1,
6373 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6374 SND_SOC_DPCM_TRIGGER_POST},
6375 .codec_dai_name = "snd-soc-dummy-dai",
6376 .codec_name = "snd-soc-dummy",
6377 .ignore_suspend = 1,
6378 .ignore_pmdown_time = 1,
6379 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6380 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306381 {/* hw:x,38 */
6382 .name = "SLIMBUS_8 Hostless",
6383 .stream_name = "SLIMBUS_8 Hostless",
6384 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6385 .platform_name = "msm-pcm-hostless",
6386 .dynamic = 1,
6387 .dpcm_capture = 1,
6388 .dpcm_playback = 1,
6389 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6390 SND_SOC_DPCM_TRIGGER_POST},
6391 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6392 .ignore_suspend = 1,
6393 .ignore_pmdown_time = 1,
6394 .codec_dai_name = "snd-soc-dummy-dai",
6395 .codec_name = "snd-soc-dummy",
6396 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -07006397 {/* hw:x,39 */
6398 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6399 .stream_name = "TX CDC DMA5 Capture",
6400 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6401 .platform_name = "msm-pcm-hostless",
6402 .codec_name = "bolero_codec",
6403 .codec_dai_name = "tx_macro_tx3",
6404 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6405 .be_hw_params_fixup = msm_be_hw_params_fixup,
6406 .ignore_suspend = 1,
6407 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6408 .ops = &msm_cdc_dma_be_ops,
6409 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006410};
6411
6412static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6413 /* Backend AFE DAI Links */
6414 {
6415 .name = LPASS_BE_AFE_PCM_RX,
6416 .stream_name = "AFE Playback",
6417 .cpu_dai_name = "msm-dai-q6-dev.224",
6418 .platform_name = "msm-pcm-routing",
6419 .codec_name = "msm-stub-codec.1",
6420 .codec_dai_name = "msm-stub-rx",
6421 .no_pcm = 1,
6422 .dpcm_playback = 1,
6423 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6424 .be_hw_params_fixup = msm_be_hw_params_fixup,
6425 /* this dainlink has playback support */
6426 .ignore_pmdown_time = 1,
6427 .ignore_suspend = 1,
6428 },
6429 {
6430 .name = LPASS_BE_AFE_PCM_TX,
6431 .stream_name = "AFE Capture",
6432 .cpu_dai_name = "msm-dai-q6-dev.225",
6433 .platform_name = "msm-pcm-routing",
6434 .codec_name = "msm-stub-codec.1",
6435 .codec_dai_name = "msm-stub-tx",
6436 .no_pcm = 1,
6437 .dpcm_capture = 1,
6438 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6439 .be_hw_params_fixup = msm_be_hw_params_fixup,
6440 .ignore_suspend = 1,
6441 },
6442 /* Incall Record Uplink BACK END DAI Link */
6443 {
6444 .name = LPASS_BE_INCALL_RECORD_TX,
6445 .stream_name = "Voice Uplink Capture",
6446 .cpu_dai_name = "msm-dai-q6-dev.32772",
6447 .platform_name = "msm-pcm-routing",
6448 .codec_name = "msm-stub-codec.1",
6449 .codec_dai_name = "msm-stub-tx",
6450 .no_pcm = 1,
6451 .dpcm_capture = 1,
6452 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6453 .be_hw_params_fixup = msm_be_hw_params_fixup,
6454 .ignore_suspend = 1,
6455 },
6456 /* Incall Record Downlink BACK END DAI Link */
6457 {
6458 .name = LPASS_BE_INCALL_RECORD_RX,
6459 .stream_name = "Voice Downlink Capture",
6460 .cpu_dai_name = "msm-dai-q6-dev.32771",
6461 .platform_name = "msm-pcm-routing",
6462 .codec_name = "msm-stub-codec.1",
6463 .codec_dai_name = "msm-stub-tx",
6464 .no_pcm = 1,
6465 .dpcm_capture = 1,
6466 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6467 .be_hw_params_fixup = msm_be_hw_params_fixup,
6468 .ignore_suspend = 1,
6469 },
6470 /* Incall Music BACK END DAI Link */
6471 {
6472 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6473 .stream_name = "Voice Farend Playback",
6474 .cpu_dai_name = "msm-dai-q6-dev.32773",
6475 .platform_name = "msm-pcm-routing",
6476 .codec_name = "msm-stub-codec.1",
6477 .codec_dai_name = "msm-stub-rx",
6478 .no_pcm = 1,
6479 .dpcm_playback = 1,
6480 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6481 .be_hw_params_fixup = msm_be_hw_params_fixup,
6482 .ignore_suspend = 1,
6483 .ignore_pmdown_time = 1,
6484 },
6485 /* Incall Music 2 BACK END DAI Link */
6486 {
6487 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6488 .stream_name = "Voice2 Farend Playback",
6489 .cpu_dai_name = "msm-dai-q6-dev.32770",
6490 .platform_name = "msm-pcm-routing",
6491 .codec_name = "msm-stub-codec.1",
6492 .codec_dai_name = "msm-stub-rx",
6493 .no_pcm = 1,
6494 .dpcm_playback = 1,
6495 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6496 .be_hw_params_fixup = msm_be_hw_params_fixup,
6497 .ignore_suspend = 1,
6498 .ignore_pmdown_time = 1,
6499 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +05306500 /* Proxy Tx BACK END DAI Link */
6501 {
6502 .name = LPASS_BE_PROXY_TX,
6503 .stream_name = "Proxy Capture",
6504 .cpu_dai_name = "msm-dai-q6-dev.8195",
6505 .platform_name = "msm-pcm-routing",
6506 .codec_name = "msm-stub-codec.1",
6507 .codec_dai_name = "msm-stub-tx",
6508 .no_pcm = 1,
6509 .dpcm_capture = 1,
6510 .id = MSM_BACKEND_DAI_PROXY_TX,
6511 .ignore_suspend = 1,
6512 },
6513 /* Proxy Rx BACK END DAI Link */
6514 {
6515 .name = LPASS_BE_PROXY_RX,
6516 .stream_name = "Proxy Playback",
6517 .cpu_dai_name = "msm-dai-q6-dev.8194",
6518 .platform_name = "msm-pcm-routing",
6519 .codec_name = "msm-stub-codec.1",
6520 .codec_dai_name = "msm-stub-rx",
6521 .no_pcm = 1,
6522 .dpcm_playback = 1,
6523 .id = MSM_BACKEND_DAI_PROXY_RX,
6524 .ignore_pmdown_time = 1,
6525 .ignore_suspend = 1,
6526 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006527 {
6528 .name = LPASS_BE_USB_AUDIO_RX,
6529 .stream_name = "USB Audio Playback",
6530 .cpu_dai_name = "msm-dai-q6-dev.28672",
6531 .platform_name = "msm-pcm-routing",
6532 .codec_name = "msm-stub-codec.1",
6533 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306534 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006535 .no_pcm = 1,
6536 .dpcm_playback = 1,
6537 .id = MSM_BACKEND_DAI_USB_RX,
6538 .be_hw_params_fixup = msm_be_hw_params_fixup,
6539 .ignore_pmdown_time = 1,
6540 .ignore_suspend = 1,
6541 },
6542 {
6543 .name = LPASS_BE_USB_AUDIO_TX,
6544 .stream_name = "USB Audio Capture",
6545 .cpu_dai_name = "msm-dai-q6-dev.28673",
6546 .platform_name = "msm-pcm-routing",
6547 .codec_name = "msm-stub-codec.1",
6548 .codec_dai_name = "msm-stub-tx",
6549 .no_pcm = 1,
6550 .dpcm_capture = 1,
6551 .id = MSM_BACKEND_DAI_USB_TX,
6552 .be_hw_params_fixup = msm_be_hw_params_fixup,
6553 .ignore_suspend = 1,
6554 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05306555};
6556
6557
6558static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006559 {
6560 .name = LPASS_BE_PRI_TDM_RX_0,
6561 .stream_name = "Primary TDM0 Playback",
6562 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6563 .platform_name = "msm-pcm-routing",
6564 .codec_name = "msm-stub-codec.1",
6565 .codec_dai_name = "msm-stub-rx",
6566 .no_pcm = 1,
6567 .dpcm_playback = 1,
6568 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6569 .be_hw_params_fixup = msm_be_hw_params_fixup,
6570 .ops = &kona_tdm_be_ops,
6571 .ignore_suspend = 1,
6572 .ignore_pmdown_time = 1,
6573 },
6574 {
6575 .name = LPASS_BE_PRI_TDM_TX_0,
6576 .stream_name = "Primary TDM0 Capture",
6577 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6578 .platform_name = "msm-pcm-routing",
6579 .codec_name = "msm-stub-codec.1",
6580 .codec_dai_name = "msm-stub-tx",
6581 .no_pcm = 1,
6582 .dpcm_capture = 1,
6583 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6584 .be_hw_params_fixup = msm_be_hw_params_fixup,
6585 .ops = &kona_tdm_be_ops,
6586 .ignore_suspend = 1,
6587 },
6588 {
6589 .name = LPASS_BE_SEC_TDM_RX_0,
6590 .stream_name = "Secondary TDM0 Playback",
6591 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "msm-stub-codec.1",
6594 .codec_dai_name = "msm-stub-rx",
6595 .no_pcm = 1,
6596 .dpcm_playback = 1,
6597 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ops = &kona_tdm_be_ops,
6600 .ignore_suspend = 1,
6601 .ignore_pmdown_time = 1,
6602 },
6603 {
6604 .name = LPASS_BE_SEC_TDM_TX_0,
6605 .stream_name = "Secondary TDM0 Capture",
6606 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6607 .platform_name = "msm-pcm-routing",
6608 .codec_name = "msm-stub-codec.1",
6609 .codec_dai_name = "msm-stub-tx",
6610 .no_pcm = 1,
6611 .dpcm_capture = 1,
6612 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6613 .be_hw_params_fixup = msm_be_hw_params_fixup,
6614 .ops = &kona_tdm_be_ops,
6615 .ignore_suspend = 1,
6616 },
6617 {
6618 .name = LPASS_BE_TERT_TDM_RX_0,
6619 .stream_name = "Tertiary TDM0 Playback",
6620 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6621 .platform_name = "msm-pcm-routing",
6622 .codec_name = "msm-stub-codec.1",
6623 .codec_dai_name = "msm-stub-rx",
6624 .no_pcm = 1,
6625 .dpcm_playback = 1,
6626 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6627 .be_hw_params_fixup = msm_be_hw_params_fixup,
6628 .ops = &kona_tdm_be_ops,
6629 .ignore_suspend = 1,
6630 .ignore_pmdown_time = 1,
6631 },
6632 {
6633 .name = LPASS_BE_TERT_TDM_TX_0,
6634 .stream_name = "Tertiary TDM0 Capture",
6635 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6636 .platform_name = "msm-pcm-routing",
6637 .codec_name = "msm-stub-codec.1",
6638 .codec_dai_name = "msm-stub-tx",
6639 .no_pcm = 1,
6640 .dpcm_capture = 1,
6641 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6642 .be_hw_params_fixup = msm_be_hw_params_fixup,
6643 .ops = &kona_tdm_be_ops,
6644 .ignore_suspend = 1,
6645 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006646 {
6647 .name = LPASS_BE_QUAT_TDM_RX_0,
6648 .stream_name = "Quaternary TDM0 Playback",
6649 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6650 .platform_name = "msm-pcm-routing",
6651 .codec_name = "msm-stub-codec.1",
6652 .codec_dai_name = "msm-stub-rx",
6653 .no_pcm = 1,
6654 .dpcm_playback = 1,
6655 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6656 .be_hw_params_fixup = msm_be_hw_params_fixup,
6657 .ops = &kona_tdm_be_ops,
6658 .ignore_suspend = 1,
6659 .ignore_pmdown_time = 1,
6660 },
6661 {
6662 .name = LPASS_BE_QUAT_TDM_TX_0,
6663 .stream_name = "Quaternary TDM0 Capture",
6664 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6665 .platform_name = "msm-pcm-routing",
6666 .codec_name = "msm-stub-codec.1",
6667 .codec_dai_name = "msm-stub-tx",
6668 .no_pcm = 1,
6669 .dpcm_capture = 1,
6670 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6671 .be_hw_params_fixup = msm_be_hw_params_fixup,
6672 .ops = &kona_tdm_be_ops,
6673 .ignore_suspend = 1,
6674 },
6675 {
6676 .name = LPASS_BE_QUIN_TDM_RX_0,
6677 .stream_name = "Quinary TDM0 Playback",
6678 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6679 .platform_name = "msm-pcm-routing",
6680 .codec_name = "msm-stub-codec.1",
6681 .codec_dai_name = "msm-stub-rx",
6682 .no_pcm = 1,
6683 .dpcm_playback = 1,
6684 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6685 .be_hw_params_fixup = msm_be_hw_params_fixup,
6686 .ops = &kona_tdm_be_ops,
6687 .ignore_suspend = 1,
6688 .ignore_pmdown_time = 1,
6689 },
6690 {
6691 .name = LPASS_BE_QUIN_TDM_TX_0,
6692 .stream_name = "Quinary TDM0 Capture",
6693 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6694 .platform_name = "msm-pcm-routing",
6695 .codec_name = "msm-stub-codec.1",
6696 .codec_dai_name = "msm-stub-tx",
6697 .no_pcm = 1,
6698 .dpcm_capture = 1,
6699 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6700 .be_hw_params_fixup = msm_be_hw_params_fixup,
6701 .ops = &kona_tdm_be_ops,
6702 .ignore_suspend = 1,
6703 },
6704 {
6705 .name = LPASS_BE_SEN_TDM_RX_0,
6706 .stream_name = "Senary TDM0 Playback",
6707 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6708 .platform_name = "msm-pcm-routing",
6709 .codec_name = "msm-stub-codec.1",
6710 .codec_dai_name = "msm-stub-rx",
6711 .no_pcm = 1,
6712 .dpcm_playback = 1,
6713 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6714 .be_hw_params_fixup = msm_be_hw_params_fixup,
6715 .ops = &kona_tdm_be_ops,
6716 .ignore_suspend = 1,
6717 .ignore_pmdown_time = 1,
6718 },
6719 {
6720 .name = LPASS_BE_SEN_TDM_TX_0,
6721 .stream_name = "Senary TDM0 Capture",
6722 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6723 .platform_name = "msm-pcm-routing",
6724 .codec_name = "msm-stub-codec.1",
6725 .codec_dai_name = "msm-stub-tx",
6726 .no_pcm = 1,
6727 .dpcm_capture = 1,
6728 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6729 .be_hw_params_fixup = msm_be_hw_params_fixup,
6730 .ops = &kona_tdm_be_ops,
6731 .ignore_suspend = 1,
6732 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006733};
6734
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006735static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6736 {
6737 .name = LPASS_BE_SLIMBUS_7_RX,
6738 .stream_name = "Slimbus7 Playback",
6739 .cpu_dai_name = "msm-dai-q6-dev.16398",
6740 .platform_name = "msm-pcm-routing",
6741 .codec_name = "btfmslim_slave",
6742 /* BT codec driver determines capabilities based on
6743 * dai name, bt codecdai name should always contains
6744 * supported usecase information
6745 */
6746 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6747 .no_pcm = 1,
6748 .dpcm_playback = 1,
6749 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6750 .be_hw_params_fixup = msm_be_hw_params_fixup,
6751 .init = &msm_wcn_init,
6752 .ops = &msm_wcn_ops,
6753 /* dai link has playback support */
6754 .ignore_pmdown_time = 1,
6755 .ignore_suspend = 1,
6756 },
6757 {
6758 .name = LPASS_BE_SLIMBUS_7_TX,
6759 .stream_name = "Slimbus7 Capture",
6760 .cpu_dai_name = "msm-dai-q6-dev.16399",
6761 .platform_name = "msm-pcm-routing",
6762 .codec_name = "btfmslim_slave",
6763 .codec_dai_name = "btfm_bt_sco_slim_tx",
6764 .no_pcm = 1,
6765 .dpcm_capture = 1,
6766 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6767 .be_hw_params_fixup = msm_be_hw_params_fixup,
6768 .ops = &msm_wcn_ops,
6769 .ignore_suspend = 1,
6770 },
6771};
6772
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306773static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6774 {
6775 .name = LPASS_BE_SLIMBUS_7_RX,
6776 .stream_name = "Slimbus7 Playback",
6777 .cpu_dai_name = "msm-dai-q6-dev.16398",
6778 .platform_name = "msm-pcm-routing",
6779 .codec_name = "btfmslim_slave",
6780 /* BT codec driver determines capabilities based on
6781 * dai name, bt codecdai name should always contains
6782 * supported usecase information
6783 */
6784 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6785 .no_pcm = 1,
6786 .dpcm_playback = 1,
6787 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6788 .be_hw_params_fixup = msm_be_hw_params_fixup,
6789 .init = &msm_wcn_init_lito,
6790 .ops = &msm_wcn_ops_lito,
6791 /* dai link has playback support */
6792 .ignore_pmdown_time = 1,
6793 .ignore_suspend = 1,
6794 },
6795 {
6796 .name = LPASS_BE_SLIMBUS_7_TX,
6797 .stream_name = "Slimbus7 Capture",
6798 .cpu_dai_name = "msm-dai-q6-dev.16399",
6799 .platform_name = "msm-pcm-routing",
6800 .codec_name = "btfmslim_slave",
6801 .codec_dai_name = "btfm_bt_sco_slim_tx",
6802 .no_pcm = 1,
6803 .dpcm_capture = 1,
6804 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6805 .be_hw_params_fixup = msm_be_hw_params_fixup,
6806 .ops = &msm_wcn_ops_lito,
6807 .ignore_suspend = 1,
6808 },
6809 {
6810 .name = LPASS_BE_SLIMBUS_8_TX,
6811 .stream_name = "Slimbus8 Capture",
6812 .cpu_dai_name = "msm-dai-q6-dev.16401",
6813 .platform_name = "msm-pcm-routing",
6814 .codec_name = "btfmslim_slave",
6815 .codec_dai_name = "btfm_fm_slim_tx",
6816 .no_pcm = 1,
6817 .dpcm_capture = 1,
6818 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6819 .be_hw_params_fixup = msm_be_hw_params_fixup,
6820 .ops = &msm_wcn_ops_lito,
6821 .ignore_suspend = 1,
6822 },
6823};
6824
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006825static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6826 /* DISP PORT BACK END DAI Link */
6827 {
6828 .name = LPASS_BE_DISPLAY_PORT,
6829 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006830 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006831 .platform_name = "msm-pcm-routing",
6832 .codec_name = "msm-ext-disp-audio-codec-rx",
6833 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6834 .no_pcm = 1,
6835 .dpcm_playback = 1,
6836 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6837 .be_hw_params_fixup = msm_be_hw_params_fixup,
6838 .ignore_pmdown_time = 1,
6839 .ignore_suspend = 1,
6840 },
6841 /* DISP PORT 1 BACK END DAI Link */
6842 {
6843 .name = LPASS_BE_DISPLAY_PORT1,
6844 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006845 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006846 .platform_name = "msm-pcm-routing",
6847 .codec_name = "msm-ext-disp-audio-codec-rx",
6848 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6849 .no_pcm = 1,
6850 .dpcm_playback = 1,
6851 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6852 .be_hw_params_fixup = msm_be_hw_params_fixup,
6853 .ignore_pmdown_time = 1,
6854 .ignore_suspend = 1,
6855 },
6856};
6857
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006858static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6859 {
6860 .name = LPASS_BE_PRI_MI2S_RX,
6861 .stream_name = "Primary MI2S Playback",
6862 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6863 .platform_name = "msm-pcm-routing",
6864 .codec_name = "msm-stub-codec.1",
6865 .codec_dai_name = "msm-stub-rx",
6866 .no_pcm = 1,
6867 .dpcm_playback = 1,
6868 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6869 .be_hw_params_fixup = msm_be_hw_params_fixup,
6870 .ops = &msm_mi2s_be_ops,
6871 .ignore_suspend = 1,
6872 .ignore_pmdown_time = 1,
6873 },
6874 {
6875 .name = LPASS_BE_PRI_MI2S_TX,
6876 .stream_name = "Primary MI2S Capture",
6877 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6878 .platform_name = "msm-pcm-routing",
6879 .codec_name = "msm-stub-codec.1",
6880 .codec_dai_name = "msm-stub-tx",
6881 .no_pcm = 1,
6882 .dpcm_capture = 1,
6883 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6884 .be_hw_params_fixup = msm_be_hw_params_fixup,
6885 .ops = &msm_mi2s_be_ops,
6886 .ignore_suspend = 1,
6887 },
6888 {
6889 .name = LPASS_BE_SEC_MI2S_RX,
6890 .stream_name = "Secondary MI2S Playback",
6891 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6892 .platform_name = "msm-pcm-routing",
6893 .codec_name = "msm-stub-codec.1",
6894 .codec_dai_name = "msm-stub-rx",
6895 .no_pcm = 1,
6896 .dpcm_playback = 1,
6897 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6898 .be_hw_params_fixup = msm_be_hw_params_fixup,
6899 .ops = &msm_mi2s_be_ops,
6900 .ignore_suspend = 1,
6901 .ignore_pmdown_time = 1,
6902 },
6903 {
6904 .name = LPASS_BE_SEC_MI2S_TX,
6905 .stream_name = "Secondary MI2S Capture",
6906 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6907 .platform_name = "msm-pcm-routing",
6908 .codec_name = "msm-stub-codec.1",
6909 .codec_dai_name = "msm-stub-tx",
6910 .no_pcm = 1,
6911 .dpcm_capture = 1,
6912 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6913 .be_hw_params_fixup = msm_be_hw_params_fixup,
6914 .ops = &msm_mi2s_be_ops,
6915 .ignore_suspend = 1,
6916 },
6917 {
6918 .name = LPASS_BE_TERT_MI2S_RX,
6919 .stream_name = "Tertiary MI2S Playback",
6920 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6921 .platform_name = "msm-pcm-routing",
6922 .codec_name = "msm-stub-codec.1",
6923 .codec_dai_name = "msm-stub-rx",
6924 .no_pcm = 1,
6925 .dpcm_playback = 1,
6926 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6927 .be_hw_params_fixup = msm_be_hw_params_fixup,
6928 .ops = &msm_mi2s_be_ops,
6929 .ignore_suspend = 1,
6930 .ignore_pmdown_time = 1,
6931 },
6932 {
6933 .name = LPASS_BE_TERT_MI2S_TX,
6934 .stream_name = "Tertiary MI2S Capture",
6935 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6936 .platform_name = "msm-pcm-routing",
6937 .codec_name = "msm-stub-codec.1",
6938 .codec_dai_name = "msm-stub-tx",
6939 .no_pcm = 1,
6940 .dpcm_capture = 1,
6941 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6942 .be_hw_params_fixup = msm_be_hw_params_fixup,
6943 .ops = &msm_mi2s_be_ops,
6944 .ignore_suspend = 1,
6945 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006946 {
6947 .name = LPASS_BE_QUAT_MI2S_RX,
6948 .stream_name = "Quaternary MI2S Playback",
6949 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6950 .platform_name = "msm-pcm-routing",
6951 .codec_name = "msm-stub-codec.1",
6952 .codec_dai_name = "msm-stub-rx",
6953 .no_pcm = 1,
6954 .dpcm_playback = 1,
6955 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6956 .be_hw_params_fixup = msm_be_hw_params_fixup,
6957 .ops = &msm_mi2s_be_ops,
6958 .ignore_suspend = 1,
6959 .ignore_pmdown_time = 1,
6960 },
6961 {
6962 .name = LPASS_BE_QUAT_MI2S_TX,
6963 .stream_name = "Quaternary MI2S Capture",
6964 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6965 .platform_name = "msm-pcm-routing",
6966 .codec_name = "msm-stub-codec.1",
6967 .codec_dai_name = "msm-stub-tx",
6968 .no_pcm = 1,
6969 .dpcm_capture = 1,
6970 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6971 .be_hw_params_fixup = msm_be_hw_params_fixup,
6972 .ops = &msm_mi2s_be_ops,
6973 .ignore_suspend = 1,
6974 },
6975 {
6976 .name = LPASS_BE_QUIN_MI2S_RX,
6977 .stream_name = "Quinary MI2S Playback",
6978 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6979 .platform_name = "msm-pcm-routing",
6980 .codec_name = "msm-stub-codec.1",
6981 .codec_dai_name = "msm-stub-rx",
6982 .no_pcm = 1,
6983 .dpcm_playback = 1,
6984 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6985 .be_hw_params_fixup = msm_be_hw_params_fixup,
6986 .ops = &msm_mi2s_be_ops,
6987 .ignore_suspend = 1,
6988 .ignore_pmdown_time = 1,
6989 },
6990 {
6991 .name = LPASS_BE_QUIN_MI2S_TX,
6992 .stream_name = "Quinary MI2S Capture",
6993 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6994 .platform_name = "msm-pcm-routing",
6995 .codec_name = "msm-stub-codec.1",
6996 .codec_dai_name = "msm-stub-tx",
6997 .no_pcm = 1,
6998 .dpcm_capture = 1,
6999 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7000 .be_hw_params_fixup = msm_be_hw_params_fixup,
7001 .ops = &msm_mi2s_be_ops,
7002 .ignore_suspend = 1,
7003 },
7004 {
7005 .name = LPASS_BE_SENARY_MI2S_RX,
7006 .stream_name = "Senary MI2S Playback",
7007 .cpu_dai_name = "msm-dai-q6-mi2s.5",
7008 .platform_name = "msm-pcm-routing",
7009 .codec_name = "msm-stub-codec.1",
7010 .codec_dai_name = "msm-stub-rx",
7011 .no_pcm = 1,
7012 .dpcm_playback = 1,
7013 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
7014 .be_hw_params_fixup = msm_be_hw_params_fixup,
7015 .ops = &msm_mi2s_be_ops,
7016 .ignore_suspend = 1,
7017 .ignore_pmdown_time = 1,
7018 },
7019 {
7020 .name = LPASS_BE_SENARY_MI2S_TX,
7021 .stream_name = "Senary MI2S Capture",
7022 .cpu_dai_name = "msm-dai-q6-mi2s.5",
7023 .platform_name = "msm-pcm-routing",
7024 .codec_name = "msm-stub-codec.1",
7025 .codec_dai_name = "msm-stub-tx",
7026 .no_pcm = 1,
7027 .dpcm_capture = 1,
7028 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
7029 .be_hw_params_fixup = msm_be_hw_params_fixup,
7030 .ops = &msm_mi2s_be_ops,
7031 .ignore_suspend = 1,
7032 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007033};
7034
7035static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7036 /* Primary AUX PCM Backend DAI Links */
7037 {
7038 .name = LPASS_BE_AUXPCM_RX,
7039 .stream_name = "AUX PCM Playback",
7040 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7041 .platform_name = "msm-pcm-routing",
7042 .codec_name = "msm-stub-codec.1",
7043 .codec_dai_name = "msm-stub-rx",
7044 .no_pcm = 1,
7045 .dpcm_playback = 1,
7046 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7047 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007048 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007049 .ignore_pmdown_time = 1,
7050 .ignore_suspend = 1,
7051 },
7052 {
7053 .name = LPASS_BE_AUXPCM_TX,
7054 .stream_name = "AUX PCM Capture",
7055 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7056 .platform_name = "msm-pcm-routing",
7057 .codec_name = "msm-stub-codec.1",
7058 .codec_dai_name = "msm-stub-tx",
7059 .no_pcm = 1,
7060 .dpcm_capture = 1,
7061 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7062 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007063 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007064 .ignore_suspend = 1,
7065 },
7066 /* Secondary AUX PCM Backend DAI Links */
7067 {
7068 .name = LPASS_BE_SEC_AUXPCM_RX,
7069 .stream_name = "Sec AUX PCM Playback",
7070 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7071 .platform_name = "msm-pcm-routing",
7072 .codec_name = "msm-stub-codec.1",
7073 .codec_dai_name = "msm-stub-rx",
7074 .no_pcm = 1,
7075 .dpcm_playback = 1,
7076 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7077 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007078 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007079 .ignore_pmdown_time = 1,
7080 .ignore_suspend = 1,
7081 },
7082 {
7083 .name = LPASS_BE_SEC_AUXPCM_TX,
7084 .stream_name = "Sec AUX PCM Capture",
7085 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7086 .platform_name = "msm-pcm-routing",
7087 .codec_name = "msm-stub-codec.1",
7088 .codec_dai_name = "msm-stub-tx",
7089 .no_pcm = 1,
7090 .dpcm_capture = 1,
7091 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7092 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007093 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007094 .ignore_suspend = 1,
7095 },
7096 /* Tertiary AUX PCM Backend DAI Links */
7097 {
7098 .name = LPASS_BE_TERT_AUXPCM_RX,
7099 .stream_name = "Tert AUX PCM Playback",
7100 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7101 .platform_name = "msm-pcm-routing",
7102 .codec_name = "msm-stub-codec.1",
7103 .codec_dai_name = "msm-stub-rx",
7104 .no_pcm = 1,
7105 .dpcm_playback = 1,
7106 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7107 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007108 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007109 .ignore_suspend = 1,
7110 },
7111 {
7112 .name = LPASS_BE_TERT_AUXPCM_TX,
7113 .stream_name = "Tert AUX PCM Capture",
7114 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7115 .platform_name = "msm-pcm-routing",
7116 .codec_name = "msm-stub-codec.1",
7117 .codec_dai_name = "msm-stub-tx",
7118 .no_pcm = 1,
7119 .dpcm_capture = 1,
7120 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7121 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007122 .ops = &kona_aux_be_ops,
7123 .ignore_suspend = 1,
7124 },
7125 /* Quaternary AUX PCM Backend DAI Links */
7126 {
7127 .name = LPASS_BE_QUAT_AUXPCM_RX,
7128 .stream_name = "Quat AUX PCM Playback",
7129 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7130 .platform_name = "msm-pcm-routing",
7131 .codec_name = "msm-stub-codec.1",
7132 .codec_dai_name = "msm-stub-rx",
7133 .no_pcm = 1,
7134 .dpcm_playback = 1,
7135 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7136 .be_hw_params_fixup = msm_be_hw_params_fixup,
7137 .ops = &kona_aux_be_ops,
7138 .ignore_suspend = 1,
7139 },
7140 {
7141 .name = LPASS_BE_QUAT_AUXPCM_TX,
7142 .stream_name = "Quat AUX PCM Capture",
7143 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7144 .platform_name = "msm-pcm-routing",
7145 .codec_name = "msm-stub-codec.1",
7146 .codec_dai_name = "msm-stub-tx",
7147 .no_pcm = 1,
7148 .dpcm_capture = 1,
7149 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7150 .be_hw_params_fixup = msm_be_hw_params_fixup,
7151 .ops = &kona_aux_be_ops,
7152 .ignore_suspend = 1,
7153 },
7154 /* Quinary AUX PCM Backend DAI Links */
7155 {
7156 .name = LPASS_BE_QUIN_AUXPCM_RX,
7157 .stream_name = "Quin AUX PCM Playback",
7158 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7159 .platform_name = "msm-pcm-routing",
7160 .codec_name = "msm-stub-codec.1",
7161 .codec_dai_name = "msm-stub-rx",
7162 .no_pcm = 1,
7163 .dpcm_playback = 1,
7164 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7165 .be_hw_params_fixup = msm_be_hw_params_fixup,
7166 .ops = &kona_aux_be_ops,
7167 .ignore_suspend = 1,
7168 },
7169 {
7170 .name = LPASS_BE_QUIN_AUXPCM_TX,
7171 .stream_name = "Quin AUX PCM Capture",
7172 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7173 .platform_name = "msm-pcm-routing",
7174 .codec_name = "msm-stub-codec.1",
7175 .codec_dai_name = "msm-stub-tx",
7176 .no_pcm = 1,
7177 .dpcm_capture = 1,
7178 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7179 .be_hw_params_fixup = msm_be_hw_params_fixup,
7180 .ops = &kona_aux_be_ops,
7181 .ignore_suspend = 1,
7182 },
7183 /* Senary AUX PCM Backend DAI Links */
7184 {
7185 .name = LPASS_BE_SEN_AUXPCM_RX,
7186 .stream_name = "Sen AUX PCM Playback",
7187 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7188 .platform_name = "msm-pcm-routing",
7189 .codec_name = "msm-stub-codec.1",
7190 .codec_dai_name = "msm-stub-rx",
7191 .no_pcm = 1,
7192 .dpcm_playback = 1,
7193 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
7194 .be_hw_params_fixup = msm_be_hw_params_fixup,
7195 .ops = &kona_aux_be_ops,
7196 .ignore_suspend = 1,
7197 },
7198 {
7199 .name = LPASS_BE_SEN_AUXPCM_TX,
7200 .stream_name = "Sen AUX PCM Capture",
7201 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7202 .platform_name = "msm-pcm-routing",
7203 .codec_name = "msm-stub-codec.1",
7204 .codec_dai_name = "msm-stub-tx",
7205 .no_pcm = 1,
7206 .dpcm_capture = 1,
7207 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
7208 .be_hw_params_fixup = msm_be_hw_params_fixup,
7209 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007210 .ignore_suspend = 1,
7211 },
7212};
7213
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007214static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7215 /* WSA CDC DMA Backend DAI Links */
7216 {
7217 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7218 .stream_name = "WSA CDC DMA0 Playback",
7219 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7220 .platform_name = "msm-pcm-routing",
7221 .codec_name = "bolero_codec",
7222 .codec_dai_name = "wsa_macro_rx1",
7223 .no_pcm = 1,
7224 .dpcm_playback = 1,
7225 .init = &msm_int_audrx_init,
7226 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7227 .be_hw_params_fixup = msm_be_hw_params_fixup,
7228 .ignore_pmdown_time = 1,
7229 .ignore_suspend = 1,
7230 .ops = &msm_cdc_dma_be_ops,
7231 },
7232 {
7233 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7234 .stream_name = "WSA CDC DMA1 Playback",
7235 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7236 .platform_name = "msm-pcm-routing",
7237 .codec_name = "bolero_codec",
7238 .codec_dai_name = "wsa_macro_rx_mix",
7239 .no_pcm = 1,
7240 .dpcm_playback = 1,
7241 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7242 .be_hw_params_fixup = msm_be_hw_params_fixup,
7243 .ignore_pmdown_time = 1,
7244 .ignore_suspend = 1,
7245 .ops = &msm_cdc_dma_be_ops,
7246 },
7247 {
7248 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7249 .stream_name = "WSA CDC DMA1 Capture",
7250 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7251 .platform_name = "msm-pcm-routing",
7252 .codec_name = "bolero_codec",
7253 .codec_dai_name = "wsa_macro_echo",
7254 .no_pcm = 1,
7255 .dpcm_capture = 1,
7256 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7257 .be_hw_params_fixup = msm_be_hw_params_fixup,
7258 .ignore_suspend = 1,
7259 .ops = &msm_cdc_dma_be_ops,
7260 },
7261};
7262
7263static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7264 /* RX CDC DMA Backend DAI Links */
7265 {
7266 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7267 .stream_name = "RX CDC DMA0 Playback",
7268 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7269 .platform_name = "msm-pcm-routing",
7270 .codec_name = "bolero_codec",
7271 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307272 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007273 .no_pcm = 1,
7274 .dpcm_playback = 1,
7275 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7276 .be_hw_params_fixup = msm_be_hw_params_fixup,
7277 .ignore_pmdown_time = 1,
7278 .ignore_suspend = 1,
7279 .ops = &msm_cdc_dma_be_ops,
7280 },
7281 {
7282 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7283 .stream_name = "RX CDC DMA1 Playback",
7284 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7285 .platform_name = "msm-pcm-routing",
7286 .codec_name = "bolero_codec",
7287 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307288 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007289 .no_pcm = 1,
7290 .dpcm_playback = 1,
7291 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7292 .be_hw_params_fixup = msm_be_hw_params_fixup,
7293 .ignore_pmdown_time = 1,
7294 .ignore_suspend = 1,
7295 .ops = &msm_cdc_dma_be_ops,
7296 },
7297 {
7298 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7299 .stream_name = "RX CDC DMA2 Playback",
7300 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7301 .platform_name = "msm-pcm-routing",
7302 .codec_name = "bolero_codec",
7303 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307304 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007305 .no_pcm = 1,
7306 .dpcm_playback = 1,
7307 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7308 .be_hw_params_fixup = msm_be_hw_params_fixup,
7309 .ignore_pmdown_time = 1,
7310 .ignore_suspend = 1,
7311 .ops = &msm_cdc_dma_be_ops,
7312 },
7313 {
7314 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7315 .stream_name = "RX CDC DMA3 Playback",
7316 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7317 .platform_name = "msm-pcm-routing",
7318 .codec_name = "bolero_codec",
7319 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307320 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007321 .no_pcm = 1,
7322 .dpcm_playback = 1,
7323 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7324 .be_hw_params_fixup = msm_be_hw_params_fixup,
7325 .ignore_pmdown_time = 1,
7326 .ignore_suspend = 1,
7327 .ops = &msm_cdc_dma_be_ops,
7328 },
7329 /* TX CDC DMA Backend DAI Links */
7330 {
7331 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7332 .stream_name = "TX CDC DMA3 Capture",
7333 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7334 .platform_name = "msm-pcm-routing",
7335 .codec_name = "bolero_codec",
7336 .codec_dai_name = "tx_macro_tx1",
7337 .no_pcm = 1,
7338 .dpcm_capture = 1,
7339 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7340 .be_hw_params_fixup = msm_be_hw_params_fixup,
7341 .ignore_suspend = 1,
7342 .ops = &msm_cdc_dma_be_ops,
7343 },
7344 {
7345 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7346 .stream_name = "TX CDC DMA4 Capture",
7347 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7348 .platform_name = "msm-pcm-routing",
7349 .codec_name = "bolero_codec",
7350 .codec_dai_name = "tx_macro_tx2",
7351 .no_pcm = 1,
7352 .dpcm_capture = 1,
7353 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7354 .be_hw_params_fixup = msm_be_hw_params_fixup,
7355 .ignore_suspend = 1,
7356 .ops = &msm_cdc_dma_be_ops,
7357 },
7358};
7359
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007360static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7361 {
7362 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7363 .stream_name = "VA CDC DMA0 Capture",
7364 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7365 .platform_name = "msm-pcm-routing",
7366 .codec_name = "bolero_codec",
7367 .codec_dai_name = "va_macro_tx1",
7368 .no_pcm = 1,
7369 .dpcm_capture = 1,
7370 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7371 .be_hw_params_fixup = msm_be_hw_params_fixup,
7372 .ignore_suspend = 1,
7373 .ops = &msm_cdc_dma_be_ops,
7374 },
7375 {
7376 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7377 .stream_name = "VA CDC DMA1 Capture",
7378 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7379 .platform_name = "msm-pcm-routing",
7380 .codec_name = "bolero_codec",
7381 .codec_dai_name = "va_macro_tx2",
7382 .no_pcm = 1,
7383 .dpcm_capture = 1,
7384 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7385 .be_hw_params_fixup = msm_be_hw_params_fixup,
7386 .ignore_suspend = 1,
7387 .ops = &msm_cdc_dma_be_ops,
7388 },
7389 {
7390 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7391 .stream_name = "VA CDC DMA2 Capture",
7392 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7393 .platform_name = "msm-pcm-routing",
7394 .codec_name = "bolero_codec",
7395 .codec_dai_name = "va_macro_tx3",
7396 .no_pcm = 1,
7397 .dpcm_capture = 1,
7398 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7399 .be_hw_params_fixup = msm_be_hw_params_fixup,
7400 .ignore_suspend = 1,
7401 .ops = &msm_cdc_dma_be_ops,
7402 },
7403};
7404
Meng Wange8e53822019-03-18 10:49:50 +08007405static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7406 {
7407 .name = LPASS_BE_AFE_LOOPBACK_TX,
7408 .stream_name = "AFE Loopback Capture",
7409 .cpu_dai_name = "msm-dai-q6-dev.24577",
7410 .platform_name = "msm-pcm-routing",
7411 .codec_name = "msm-stub-codec.1",
7412 .codec_dai_name = "msm-stub-tx",
7413 .no_pcm = 1,
7414 .dpcm_capture = 1,
7415 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7416 .be_hw_params_fixup = msm_be_hw_params_fixup,
7417 .ignore_pmdown_time = 1,
7418 .ignore_suspend = 1,
7419 },
7420};
7421
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007422static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007423 ARRAY_SIZE(msm_common_dai_links) +
7424 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7425 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7426 ARRAY_SIZE(msm_common_be_dai_links) +
7427 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7428 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7429 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007430 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007431 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7432 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +08007433 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307434 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307435 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7436 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007437
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007438static int msm_populate_dai_link_component_of_node(
7439 struct snd_soc_card *card)
7440{
7441 int i, index, ret = 0;
7442 struct device *cdev = card->dev;
7443 struct snd_soc_dai_link *dai_link = card->dai_link;
7444 struct device_node *np;
7445
7446 if (!cdev) {
7447 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7448 return -ENODEV;
7449 }
7450
7451 for (i = 0; i < card->num_links; i++) {
7452 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7453 continue;
7454
7455 /* populate platform_of_node for snd card dai links */
7456 if (dai_link[i].platform_name &&
7457 !dai_link[i].platform_of_node) {
7458 index = of_property_match_string(cdev->of_node,
7459 "asoc-platform-names",
7460 dai_link[i].platform_name);
7461 if (index < 0) {
7462 dev_err(cdev, "%s: No match found for platform name: %s\n",
7463 __func__, dai_link[i].platform_name);
7464 ret = index;
7465 goto err;
7466 }
7467 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7468 index);
7469 if (!np) {
7470 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7471 __func__, dai_link[i].platform_name,
7472 index);
7473 ret = -ENODEV;
7474 goto err;
7475 }
7476 dai_link[i].platform_of_node = np;
7477 dai_link[i].platform_name = NULL;
7478 }
7479
7480 /* populate cpu_of_node for snd card dai links */
7481 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7482 index = of_property_match_string(cdev->of_node,
7483 "asoc-cpu-names",
7484 dai_link[i].cpu_dai_name);
7485 if (index >= 0) {
7486 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7487 index);
7488 if (!np) {
7489 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7490 __func__,
7491 dai_link[i].cpu_dai_name);
7492 ret = -ENODEV;
7493 goto err;
7494 }
7495 dai_link[i].cpu_of_node = np;
7496 dai_link[i].cpu_dai_name = NULL;
7497 }
7498 }
7499
7500 /* populate codec_of_node for snd card dai links */
7501 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7502 index = of_property_match_string(cdev->of_node,
7503 "asoc-codec-names",
7504 dai_link[i].codec_name);
7505 if (index < 0)
7506 continue;
7507 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7508 index);
7509 if (!np) {
7510 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7511 __func__, dai_link[i].codec_name);
7512 ret = -ENODEV;
7513 goto err;
7514 }
7515 dai_link[i].codec_of_node = np;
7516 dai_link[i].codec_name = NULL;
7517 }
7518 }
7519
7520err:
7521 return ret;
7522}
7523
7524static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7525{
7526 int ret = -EINVAL;
7527 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7528
7529 if (!component) {
7530 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7531 return ret;
7532 }
7533
7534 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7535 ARRAY_SIZE(msm_snd_controls));
7536 if (ret < 0) {
7537 dev_err(component->dev,
7538 "%s: add_codec_controls failed, err = %d\n",
7539 __func__, ret);
7540 return ret;
7541 }
7542
7543 return ret;
7544}
7545
7546static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7547 struct snd_pcm_hw_params *params)
7548{
7549 return 0;
7550}
7551
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007552static struct snd_soc_ops msm_stub_be_ops = {
7553 .hw_params = msm_snd_stub_hw_params,
7554};
7555
7556struct snd_soc_card snd_soc_card_stub_msm = {
7557 .name = "kona-stub-snd-card",
7558};
7559
7560static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7561 /* FrontEnd DAI Links */
7562 {
7563 .name = "MSMSTUB Media1",
7564 .stream_name = "MultiMedia1",
7565 .cpu_dai_name = "MultiMedia1",
7566 .platform_name = "msm-pcm-dsp.0",
7567 .dynamic = 1,
7568 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7569 .dpcm_playback = 1,
7570 .dpcm_capture = 1,
7571 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7572 SND_SOC_DPCM_TRIGGER_POST},
7573 .codec_dai_name = "snd-soc-dummy-dai",
7574 .codec_name = "snd-soc-dummy",
7575 .ignore_suspend = 1,
7576 /* this dainlink has playback support */
7577 .ignore_pmdown_time = 1,
7578 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7579 },
7580};
7581
7582static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7583 /* Backend DAI Links */
7584 {
7585 .name = LPASS_BE_AUXPCM_RX,
7586 .stream_name = "AUX PCM Playback",
7587 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7588 .platform_name = "msm-pcm-routing",
7589 .codec_name = "msm-stub-codec.1",
7590 .codec_dai_name = "msm-stub-rx",
7591 .no_pcm = 1,
7592 .dpcm_playback = 1,
7593 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7594 .init = &msm_audrx_stub_init,
7595 .be_hw_params_fixup = msm_be_hw_params_fixup,
7596 .ignore_pmdown_time = 1,
7597 .ignore_suspend = 1,
7598 .ops = &msm_stub_be_ops,
7599 },
7600 {
7601 .name = LPASS_BE_AUXPCM_TX,
7602 .stream_name = "AUX PCM Capture",
7603 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7604 .platform_name = "msm-pcm-routing",
7605 .codec_name = "msm-stub-codec.1",
7606 .codec_dai_name = "msm-stub-tx",
7607 .no_pcm = 1,
7608 .dpcm_capture = 1,
7609 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7610 .be_hw_params_fixup = msm_be_hw_params_fixup,
7611 .ignore_suspend = 1,
7612 .ops = &msm_stub_be_ops,
7613 },
7614};
7615
7616static struct snd_soc_dai_link msm_stub_dai_links[
7617 ARRAY_SIZE(msm_stub_fe_dai_links) +
7618 ARRAY_SIZE(msm_stub_be_dai_links)];
7619
7620static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007621 { .compatible = "qcom,kona-asoc-snd",
7622 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007623 { .compatible = "qcom,kona-asoc-snd-stub",
7624 .data = "stub_codec"},
7625 {},
7626};
7627
7628static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7629{
7630 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007631 struct snd_soc_dai_link *dailink = NULL;
7632 int len_1 = 0;
7633 int len_2 = 0;
7634 int total_links = 0;
7635 int rc = 0;
7636 u32 mi2s_audio_intf = 0;
7637 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007638 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307639 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007640 const struct of_device_id *match;
7641
7642 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7643 if (!match) {
7644 dev_err(dev, "%s: No DT match found for sound card\n",
7645 __func__);
7646 return NULL;
7647 }
7648
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007649 if (!strcmp(match->data, "codec")) {
7650 card = &snd_soc_card_kona_msm;
7651
7652 memcpy(msm_kona_dai_links + total_links,
7653 msm_common_dai_links,
7654 sizeof(msm_common_dai_links));
7655 total_links += ARRAY_SIZE(msm_common_dai_links);
7656
7657 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007658 msm_bolero_fe_dai_links,
7659 sizeof(msm_bolero_fe_dai_links));
7660 total_links +=
7661 ARRAY_SIZE(msm_bolero_fe_dai_links);
7662
7663 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007664 msm_common_misc_fe_dai_links,
7665 sizeof(msm_common_misc_fe_dai_links));
7666 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7667
7668 memcpy(msm_kona_dai_links + total_links,
7669 msm_common_be_dai_links,
7670 sizeof(msm_common_be_dai_links));
7671 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7672
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007673 memcpy(msm_kona_dai_links + total_links,
7674 msm_wsa_cdc_dma_be_dai_links,
7675 sizeof(msm_wsa_cdc_dma_be_dai_links));
7676 total_links +=
7677 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7678
7679 memcpy(msm_kona_dai_links + total_links,
7680 msm_rx_tx_cdc_dma_be_dai_links,
7681 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7682 total_links +=
7683 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7684
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007685 memcpy(msm_kona_dai_links + total_links,
7686 msm_va_cdc_dma_be_dai_links,
7687 sizeof(msm_va_cdc_dma_be_dai_links));
7688 total_links +=
7689 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7690
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007691 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7692 &mi2s_audio_intf);
7693 if (rc) {
7694 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7695 __func__);
7696 } else {
7697 if (mi2s_audio_intf) {
7698 memcpy(msm_kona_dai_links + total_links,
7699 msm_mi2s_be_dai_links,
7700 sizeof(msm_mi2s_be_dai_links));
7701 total_links +=
7702 ARRAY_SIZE(msm_mi2s_be_dai_links);
7703 }
7704 }
7705
7706 rc = of_property_read_u32(dev->of_node,
7707 "qcom,auxpcm-audio-intf",
7708 &auxpcm_audio_intf);
7709 if (rc) {
7710 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7711 __func__);
7712 } else {
7713 if (auxpcm_audio_intf) {
7714 memcpy(msm_kona_dai_links + total_links,
7715 msm_auxpcm_be_dai_links,
7716 sizeof(msm_auxpcm_be_dai_links));
7717 total_links +=
7718 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7719 }
7720 }
7721
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007722 rc = of_property_read_u32(dev->of_node,
7723 "qcom,ext-disp-audio-rx", &val);
7724 if (!rc && val) {
7725 dev_dbg(dev, "%s(): ext disp audio support present\n",
7726 __func__);
7727 memcpy(msm_kona_dai_links + total_links,
7728 ext_disp_be_dai_link,
7729 sizeof(ext_disp_be_dai_link));
7730 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7731 }
7732
7733 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7734 if (!rc && val) {
7735 dev_dbg(dev, "%s(): WCN BT support present\n",
7736 __func__);
7737 memcpy(msm_kona_dai_links + total_links,
7738 msm_wcn_be_dai_links,
7739 sizeof(msm_wcn_be_dai_links));
7740 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7741 }
7742
Meng Wange8e53822019-03-18 10:49:50 +08007743 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7744 &val);
7745 if (!rc && val) {
7746 memcpy(msm_kona_dai_links + total_links,
7747 msm_afe_rxtx_lb_be_dai_link,
7748 sizeof(msm_afe_rxtx_lb_be_dai_link));
7749 total_links +=
7750 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7751 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307752
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307753 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7754 &val);
7755 if (!rc && val) {
7756 memcpy(msm_kona_dai_links + total_links,
7757 msm_tdm_be_dai_links,
7758 sizeof(msm_tdm_be_dai_links));
7759 total_links +=
7760 ARRAY_SIZE(msm_tdm_be_dai_links);
7761 }
7762
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307763 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7764 &wcn_btfm_intf);
7765 if (rc) {
7766 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7767 __func__);
7768 } else {
7769 if (wcn_btfm_intf) {
7770 memcpy(msm_kona_dai_links + total_links,
7771 msm_wcn_btfm_be_dai_links,
7772 sizeof(msm_wcn_btfm_be_dai_links));
7773 total_links +=
7774 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7775 }
7776 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007777 dailink = msm_kona_dai_links;
7778 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007779 card = &snd_soc_card_stub_msm;
7780 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7781 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7782
7783 memcpy(msm_stub_dai_links,
7784 msm_stub_fe_dai_links,
7785 sizeof(msm_stub_fe_dai_links));
7786 memcpy(msm_stub_dai_links + len_1,
7787 msm_stub_be_dai_links,
7788 sizeof(msm_stub_be_dai_links));
7789
7790 dailink = msm_stub_dai_links;
7791 total_links = len_2;
7792 }
7793
7794 if (card) {
7795 card->dai_link = dailink;
7796 card->num_links = total_links;
7797 }
7798
7799 return card;
7800}
7801
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007802static int msm_wsa881x_init(struct snd_soc_component *component)
7803{
7804 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7805 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7806 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7807 SPKR_L_BOOST, SPKR_L_VI};
7808 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7809 SPKR_R_BOOST, SPKR_R_VI};
7810 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7811 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7812 struct msm_asoc_mach_data *pdata;
7813 struct snd_soc_dapm_context *dapm;
7814 struct snd_card *card;
7815 struct snd_info_entry *entry;
7816 int ret = 0;
7817
7818 if (!component) {
7819 pr_err("%s component is NULL\n", __func__);
7820 return -EINVAL;
7821 }
7822
7823 card = component->card->snd_card;
7824 dapm = snd_soc_component_get_dapm(component);
7825
7826 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7827 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7828 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307829 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7830 wsa883x_set_channel_map(component, &spkleft_ports[0],
7831 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7832 &ch_rate[0], &spkleft_port_types[0]);
7833 else
7834 wsa881x_set_channel_map(component, &spkleft_ports[0],
7835 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7836 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007837 if (dapm->component) {
7838 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7839 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7840 }
7841 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7842 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7843 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307844 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7845 wsa883x_set_channel_map(component, &spkright_ports[0],
7846 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7847 &ch_rate[0], &spkright_port_types[0]);
7848 else
7849 wsa881x_set_channel_map(component, &spkright_ports[0],
7850 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7851 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007852 if (dapm->component) {
7853 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7854 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7855 }
7856 } else {
7857 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7858 component->name);
7859 ret = -EINVAL;
7860 goto err;
7861 }
7862 pdata = snd_soc_card_get_drvdata(component->card);
7863 if (!pdata->codec_root) {
7864 entry = snd_info_create_subdir(card->module, "codecs",
7865 card->proc_root);
7866 if (!entry) {
7867 pr_err("%s: Cannot create codecs module entry\n",
7868 __func__);
7869 ret = 0;
7870 goto err;
7871 }
7872 pdata->codec_root = entry;
7873 }
Laxminath Kasam99690f12020-03-15 15:38:21 +05307874 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7875 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7876 component);
7877 else
7878 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7879 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007880err:
7881 return ret;
7882}
7883
7884static int msm_aux_codec_init(struct snd_soc_component *component)
7885{
7886 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7887 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007888 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007889 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007890 struct snd_info_entry *entry;
7891 struct snd_card *card = component->card->snd_card;
7892 struct msm_asoc_mach_data *pdata;
7893
7894 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7895 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7896 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7897 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7898 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7899 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7900 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7901 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7902 snd_soc_dapm_sync(dapm);
7903
7904 pdata = snd_soc_card_get_drvdata(component->card);
7905 if (!pdata->codec_root) {
7906 entry = snd_info_create_subdir(card->module, "codecs",
7907 card->proc_root);
7908 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007909 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007910 __func__);
7911 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007912 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007913 }
7914 pdata->codec_root = entry;
7915 }
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007916 if (!strncmp(component->driver->name, "wcd937x", 7)) {
7917 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007918 ret = snd_soc_add_component_controls(component,
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007919 msm_int_wcd937x_snd_controls,
7920 ARRAY_SIZE(msm_int_wcd937x_snd_controls));
7921 } else {
7922 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7923 codec_variant = wcd938x_get_codec_variant(component);
7924 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7925 if (codec_variant == WCD9380)
7926 ret = snd_soc_add_component_controls(component,
7927 msm_int_wcd9380_snd_controls,
7928 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7929 else if (codec_variant == WCD9385)
7930 ret = snd_soc_add_component_controls(component,
7931 msm_int_wcd9385_snd_controls,
7932 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7933 }
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007934
7935 if (ret < 0) {
7936 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7937 __func__, ret);
7938 return ret;
7939 }
7940
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007941mbhc_cfg_cal:
7942 mbhc_calibration = def_wcd_mbhc_cal();
7943 if (!mbhc_calibration)
7944 return -ENOMEM;
7945 wcd_mbhc_cfg.calibration = mbhc_calibration;
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007946 if (!strncmp(component->driver->name, "wcd937x", 7))
7947 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7948 else
7949 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007950 if (ret) {
7951 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7952 __func__, ret);
7953 goto err_hs_detect;
7954 }
7955 return 0;
7956
7957err_hs_detect:
7958 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007959 return ret;
7960}
7961
7962static int msm_init_aux_dev(struct platform_device *pdev,
7963 struct snd_soc_card *card)
7964{
7965 struct device_node *wsa_of_node;
7966 struct device_node *aux_codec_of_node;
7967 u32 wsa_max_devs;
7968 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307969 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007970 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007971 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +08007972 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7973 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007974 const char *auxdev_name_prefix[1];
7975 char *dev_name_str = NULL;
7976 int found = 0;
7977 int codecs_found = 0;
7978 int ret = 0;
7979
7980 /* Get maximum WSA device count for this platform */
7981 ret = of_property_read_u32(pdev->dev.of_node,
7982 "qcom,wsa-max-devs", &wsa_max_devs);
7983 if (ret) {
7984 dev_info(&pdev->dev,
7985 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7986 __func__, pdev->dev.of_node->full_name, ret);
7987 wsa_max_devs = 0;
7988 goto codec_aux_dev;
7989 }
7990 if (wsa_max_devs == 0) {
7991 dev_warn(&pdev->dev,
7992 "%s: Max WSA devices is 0 for this target?\n",
7993 __func__);
7994 goto codec_aux_dev;
7995 }
7996
7997 /* Get count of WSA device phandles for this platform */
7998 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7999 "qcom,wsa-devs", NULL);
8000 if (wsa_dev_cnt == -ENOENT) {
8001 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8002 __func__);
8003 goto err;
8004 } else if (wsa_dev_cnt <= 0) {
8005 dev_err(&pdev->dev,
8006 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8007 __func__, wsa_dev_cnt);
8008 ret = -EINVAL;
8009 goto err;
8010 }
8011
8012 /*
8013 * Expect total phandles count to be NOT less than maximum possible
8014 * WSA count. However, if it is less, then assign same value to
8015 * max count as well.
8016 */
8017 if (wsa_dev_cnt < wsa_max_devs) {
8018 dev_dbg(&pdev->dev,
8019 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8020 __func__, wsa_max_devs, wsa_dev_cnt);
8021 wsa_max_devs = wsa_dev_cnt;
8022 }
8023
8024 /* Make sure prefix string passed for each WSA device */
8025 ret = of_property_count_strings(pdev->dev.of_node,
8026 "qcom,wsa-aux-dev-prefix");
8027 if (ret != wsa_dev_cnt) {
8028 dev_err(&pdev->dev,
8029 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8030 __func__, wsa_dev_cnt, ret);
8031 ret = -EINVAL;
8032 goto err;
8033 }
8034
8035 /*
8036 * Alloc mem to store phandle and index info of WSA device, if already
8037 * registered with ALSA core
8038 */
8039 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8040 sizeof(struct msm_wsa881x_dev_info),
8041 GFP_KERNEL);
8042 if (!wsa881x_dev_info) {
8043 ret = -ENOMEM;
8044 goto err;
8045 }
8046
8047 /*
8048 * search and check whether all WSA devices are already
8049 * registered with ALSA core or not. If found a node, store
8050 * the node and the index in a local array of struct for later
8051 * use.
8052 */
8053 for (i = 0; i < wsa_dev_cnt; i++) {
8054 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8055 "qcom,wsa-devs", i);
8056 if (unlikely(!wsa_of_node)) {
8057 /* we should not be here */
8058 dev_err(&pdev->dev,
8059 "%s: wsa dev node is not present\n",
8060 __func__);
8061 ret = -EINVAL;
8062 goto err;
8063 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308064 if (soc_find_component_locked(wsa_of_node, NULL)) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008065 /* WSA device registered with ALSA core */
8066 wsa881x_dev_info[found].of_node = wsa_of_node;
8067 wsa881x_dev_info[found].index = i;
8068 found++;
8069 if (found == wsa_max_devs)
8070 break;
8071 }
8072 }
8073
8074 if (found < wsa_max_devs) {
8075 dev_dbg(&pdev->dev,
8076 "%s: failed to find %d components. Found only %d\n",
8077 __func__, wsa_max_devs, found);
8078 return -EPROBE_DEFER;
8079 }
8080 dev_info(&pdev->dev,
8081 "%s: found %d wsa881x devices registered with ALSA core\n",
8082 __func__, found);
8083
8084codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308085 /* Get maximum aux codec device count for this platform */
8086 ret = of_property_read_u32(pdev->dev.of_node,
8087 "qcom,codec-max-aux-devs",
8088 &codec_max_aux_devs);
8089 if (ret) {
8090 dev_err(&pdev->dev,
8091 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8092 __func__, pdev->dev.of_node->full_name, ret);
8093 codec_max_aux_devs = 0;
8094 goto aux_dev_register;
8095 }
8096 if (codec_max_aux_devs == 0) {
8097 dev_dbg(&pdev->dev,
8098 "%s: Max aux codec devices is 0 for this target?\n",
8099 __func__);
8100 goto aux_dev_register;
8101 }
8102
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008103 /* Get count of aux codec device phandles for this platform */
8104 codec_aux_dev_cnt = of_count_phandle_with_args(
8105 pdev->dev.of_node,
8106 "qcom,codec-aux-devs", NULL);
8107 if (codec_aux_dev_cnt == -ENOENT) {
8108 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8109 __func__);
8110 goto err;
8111 } else if (codec_aux_dev_cnt <= 0) {
8112 dev_err(&pdev->dev,
8113 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8114 __func__, codec_aux_dev_cnt);
8115 ret = -EINVAL;
8116 goto err;
8117 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008118
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008119 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308120 * Expect total phandles count to be NOT less than maximum possible
8121 * AUX device count. However, if it is less, then assign same value to
8122 * max count as well.
8123 */
8124 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8125 dev_dbg(&pdev->dev,
8126 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8127 __func__, codec_max_aux_devs,
8128 codec_aux_dev_cnt);
8129 codec_max_aux_devs = codec_aux_dev_cnt;
8130 }
8131
8132 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008133 * Alloc mem to store phandle and index info of aux codec
8134 * if already registered with ALSA core
8135 */
8136 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8137 sizeof(struct aux_codec_dev_info),
8138 GFP_KERNEL);
8139 if (!aux_cdc_dev_info) {
8140 ret = -ENOMEM;
8141 goto err;
8142 }
8143
8144 /*
8145 * search and check whether all aux codecs are already
8146 * registered with ALSA core or not. If found a node, store
8147 * the node and the index in a local array of struct for later
8148 * use.
8149 */
8150 for (i = 0; i < codec_aux_dev_cnt; i++) {
8151 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8152 "qcom,codec-aux-devs", i);
8153 if (unlikely(!aux_codec_of_node)) {
8154 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008155 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008156 "%s: aux codec dev node is not present\n",
8157 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008158 ret = -EINVAL;
8159 goto err;
8160 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308161 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008162 /* AUX codec registered with ALSA core */
8163 aux_cdc_dev_info[codecs_found].of_node =
8164 aux_codec_of_node;
8165 aux_cdc_dev_info[codecs_found].index = i;
8166 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008167 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008168 }
8169
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008170 if (codecs_found < codec_aux_dev_cnt) {
8171 dev_dbg(&pdev->dev,
8172 "%s: failed to find %d components. Found only %d\n",
8173 __func__, codec_aux_dev_cnt, codecs_found);
8174 return -EPROBE_DEFER;
8175 }
8176 dev_info(&pdev->dev,
8177 "%s: found %d AUX codecs registered with ALSA core\n",
8178 __func__, codecs_found);
8179
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308180aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008181 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8182 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8183
8184 /* Alloc array of AUX devs struct */
8185 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8186 sizeof(struct snd_soc_aux_dev),
8187 GFP_KERNEL);
8188 if (!msm_aux_dev) {
8189 ret = -ENOMEM;
8190 goto err;
8191 }
8192
8193 /* Alloc array of codec conf struct */
8194 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8195 sizeof(struct snd_soc_codec_conf),
8196 GFP_KERNEL);
8197 if (!msm_codec_conf) {
8198 ret = -ENOMEM;
8199 goto err;
8200 }
8201
8202 for (i = 0; i < wsa_max_devs; i++) {
8203 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8204 GFP_KERNEL);
8205 if (!dev_name_str) {
8206 ret = -ENOMEM;
8207 goto err;
8208 }
8209
8210 ret = of_property_read_string_index(pdev->dev.of_node,
8211 "qcom,wsa-aux-dev-prefix",
8212 wsa881x_dev_info[i].index,
8213 auxdev_name_prefix);
8214 if (ret) {
8215 dev_err(&pdev->dev,
8216 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8217 __func__, ret);
8218 ret = -EINVAL;
8219 goto err;
8220 }
8221
8222 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8223 msm_aux_dev[i].name = dev_name_str;
8224 msm_aux_dev[i].codec_name = NULL;
8225 msm_aux_dev[i].codec_of_node =
8226 wsa881x_dev_info[i].of_node;
8227 msm_aux_dev[i].init = msm_wsa881x_init;
8228 msm_codec_conf[i].dev_name = NULL;
8229 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8230 msm_codec_conf[i].of_node =
8231 wsa881x_dev_info[i].of_node;
8232 }
8233
8234 for (i = 0; i < codec_aux_dev_cnt; i++) {
8235 msm_aux_dev[wsa_max_devs + i].name = NULL;
8236 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8237 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8238 aux_cdc_dev_info[i].of_node;
8239 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8240 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8241 msm_codec_conf[wsa_max_devs + i].name_prefix =
8242 NULL;
8243 msm_codec_conf[wsa_max_devs + i].of_node =
8244 aux_cdc_dev_info[i].of_node;
8245 }
8246
8247 card->codec_conf = msm_codec_conf;
8248 card->aux_dev = msm_aux_dev;
8249err:
8250 return ret;
8251}
8252
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008253static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8254{
8255 int count = 0;
8256 u32 mi2s_master_slave[MI2S_MAX];
8257 int ret = 0;
8258
8259 for (count = 0; count < MI2S_MAX; count++) {
8260 mutex_init(&mi2s_intf_conf[count].lock);
8261 mi2s_intf_conf[count].ref_cnt = 0;
8262 }
8263
8264 ret = of_property_read_u32_array(pdev->dev.of_node,
8265 "qcom,msm-mi2s-master",
8266 mi2s_master_slave, MI2S_MAX);
8267 if (ret) {
8268 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8269 __func__);
8270 } else {
8271 for (count = 0; count < MI2S_MAX; count++) {
8272 mi2s_intf_conf[count].msm_is_mi2s_master =
8273 mi2s_master_slave[count];
8274 }
8275 }
8276}
8277
8278static void msm_i2s_auxpcm_deinit(void)
8279{
8280 int count = 0;
8281
8282 for (count = 0; count < MI2S_MAX; count++) {
8283 mutex_destroy(&mi2s_intf_conf[count].lock);
8284 mi2s_intf_conf[count].ref_cnt = 0;
8285 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8286 }
8287}
8288
8289static int kona_ssr_enable(struct device *dev, void *data)
8290{
8291 struct platform_device *pdev = to_platform_device(dev);
8292 struct snd_soc_card *card = platform_get_drvdata(pdev);
8293 int ret = 0;
8294
8295 if (!card) {
8296 dev_err(dev, "%s: card is NULL\n", __func__);
8297 ret = -EINVAL;
8298 goto err;
8299 }
8300
8301 if (!strcmp(card->name, "kona-stub-snd-card")) {
8302 /* TODO */
8303 dev_dbg(dev, "%s: TODO \n", __func__);
8304 }
8305
8306 snd_soc_card_change_online_state(card, 1);
8307 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8308
8309err:
8310 return ret;
8311}
8312
8313static void kona_ssr_disable(struct device *dev, void *data)
8314{
8315 struct platform_device *pdev = to_platform_device(dev);
8316 struct snd_soc_card *card = platform_get_drvdata(pdev);
8317
8318 if (!card) {
8319 dev_err(dev, "%s: card is NULL\n", __func__);
8320 return;
8321 }
8322
8323 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8324 snd_soc_card_change_online_state(card, 0);
8325
8326 if (!strcmp(card->name, "kona-stub-snd-card")) {
8327 /* TODO */
8328 dev_dbg(dev, "%s: TODO \n", __func__);
8329 }
8330}
8331
8332static const struct snd_event_ops kona_ssr_ops = {
8333 .enable = kona_ssr_enable,
8334 .disable = kona_ssr_disable,
8335};
8336
8337static int msm_audio_ssr_compare(struct device *dev, void *data)
8338{
8339 struct device_node *node = data;
8340
8341 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8342 __func__, dev->of_node, node);
8343 return (dev->of_node && dev->of_node == node);
8344}
8345
8346static int msm_audio_ssr_register(struct device *dev)
8347{
8348 struct device_node *np = dev->of_node;
8349 struct snd_event_clients *ssr_clients = NULL;
8350 struct device_node *node = NULL;
8351 int ret = 0;
8352 int i = 0;
8353
8354 for (i = 0; ; i++) {
8355 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8356 if (!node)
8357 break;
8358 snd_event_mstr_add_client(&ssr_clients,
8359 msm_audio_ssr_compare, node);
8360 }
8361
8362 ret = snd_event_master_register(dev, &kona_ssr_ops,
8363 ssr_clients, NULL);
8364 if (!ret)
8365 snd_event_notify(dev, SND_EVENT_UP);
8366
8367 return ret;
8368}
8369
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308370static void parse_cps_configuration(struct platform_device *pdev,
8371 struct msm_asoc_mach_data *pdata)
8372{
8373 int ret = 0;
8374 int i = 0, j = 0;
8375 u32 dt_values[MAX_CPS_LEVELS];
8376
8377 if (!pdev || !pdata || !pdata->wsa_max_devs)
8378 return;
8379
8380 pdata->get_wsa_dev_num = wsa883x_codec_get_dev_num;
8381 pdata->cps_config.hw_reg_cfg.num_spkr = pdata->wsa_max_devs;
8382
8383 ret = of_property_read_u32_array(pdev->dev.of_node,
8384 "qcom,cps_reg_phy_addr", dt_values,
8385 sizeof(dt_values)/sizeof(dt_values[0]));
8386 if (ret) {
8387 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8388 __func__, "qcom,cps_reg_phy_addr");
8389 } else {
8390 pdata->cps_config.hw_reg_cfg.lpass_wr_cmd_reg_phy_addr =
8391 dt_values[0];
8392 pdata->cps_config.hw_reg_cfg.lpass_rd_cmd_reg_phy_addr =
8393 dt_values[1];
8394 pdata->cps_config.hw_reg_cfg.lpass_rd_fifo_reg_phy_addr =
8395 dt_values[2];
8396 }
8397
8398 ret = of_property_read_u32_array(pdev->dev.of_node,
8399 "qcom,cps_threshold_levels", dt_values,
8400 sizeof(dt_values)/sizeof(dt_values[0]) - 1);
8401 if (ret) {
8402 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8403 __func__, "qcom,cps_threshold_levels");
8404 } else {
8405 pdata->cps_config.hw_reg_cfg.vbatt_lower2_threshold =
8406 dt_values[0];
8407 pdata->cps_config.hw_reg_cfg.vbatt_lower1_threshold =
8408 dt_values[1];
8409 }
8410
8411 pdata->cps_config.spkr_dep_cfg = devm_kzalloc(&pdev->dev,
8412 sizeof(struct lpass_swr_spkr_dep_cfg_t)
8413 * pdata->wsa_max_devs, GFP_KERNEL);
8414 if (!pdata->cps_config.spkr_dep_cfg) {
8415 dev_err(&pdev->dev, "%s: spkr dep cfg alloc failed\n", __func__);
8416 return;
8417 }
8418 ret = of_property_read_u32_array(pdev->dev.of_node,
8419 "qcom,cps_wsa_vbatt_temp_reg_addr", dt_values,
8420 sizeof(dt_values)/sizeof(dt_values[0]) - 1);
8421 if (ret) {
8422 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8423 __func__, "qcom,cps_wsa_vbatt_temp_reg_addr");
8424 } else {
8425 for (i = 0; i < pdata->wsa_max_devs; i++) {
8426 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr =
8427 dt_values[0];
8428 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr =
8429 dt_values[1];
8430 }
8431 }
8432
8433 ret = of_property_read_u32_array(pdev->dev.of_node,
8434 "qcom,cps_normal_values", dt_values,
8435 sizeof(dt_values)/sizeof(dt_values[0]));
8436 if (ret) {
8437 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8438 __func__, "qcom,cps_normal_values");
8439 } else {
8440 for (i = 0; i < pdata->wsa_max_devs; i++) {
8441 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8442 pdata->cps_config.spkr_dep_cfg[i].
8443 value_normal_thrsd[j] = dt_values[j];
8444 }
8445 }
8446 }
8447
8448 ret = of_property_read_u32_array(pdev->dev.of_node,
8449 "qcom,cps_lower1_values", dt_values,
8450 sizeof(dt_values)/sizeof(dt_values[0]));
8451 if (ret) {
8452 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8453 __func__, "qcom,cps_lower1_values");
8454 } else {
8455 for (i = 0; i < pdata->wsa_max_devs; i++) {
8456 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8457 pdata->cps_config.spkr_dep_cfg[i].
8458 value_low1_thrsd[j] = dt_values[j];
8459 }
8460 }
8461 }
8462
8463 ret = of_property_read_u32_array(pdev->dev.of_node,
8464 "qcom,cps_lower2_values", dt_values,
8465 sizeof(dt_values)/sizeof(dt_values[0]));
8466 if (ret) {
8467 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8468 __func__, "qcom,cps_lower2_values");
8469 } else {
8470 for (i = 0; i < pdata->wsa_max_devs; i++) {
8471 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8472 pdata->cps_config.spkr_dep_cfg[i].
8473 value_low2_thrsd[j] = dt_values[j];
8474 }
8475 }
8476 }
8477}
8478
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008479static int msm_asoc_machine_probe(struct platform_device *pdev)
8480{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008481 struct snd_soc_card *card = NULL;
8482 struct msm_asoc_mach_data *pdata = NULL;
8483 const char *mbhc_audio_jack_type = NULL;
8484 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008485 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008486 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008487
8488 if (!pdev->dev.of_node) {
8489 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8490 return -EINVAL;
8491 }
8492
8493 pdata = devm_kzalloc(&pdev->dev,
8494 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8495 if (!pdata)
8496 return -ENOMEM;
8497
Vatsal Bucha71e0b482019-09-11 14:51:20 +05308498 of_property_read_u32(pdev->dev.of_node,
8499 "qcom,lito-is-v2-enabled",
8500 &pdata->lito_v2_enabled);
8501
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008502 card = populate_snd_card_dailinks(&pdev->dev);
8503 if (!card) {
8504 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8505 ret = -EINVAL;
8506 goto err;
8507 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008508
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008509 card->dev = &pdev->dev;
8510 platform_set_drvdata(pdev, card);
8511 snd_soc_card_set_drvdata(card, pdata);
8512
8513 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8514 if (ret) {
8515 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8516 __func__, ret);
8517 goto err;
8518 }
8519
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008520 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8521 if (ret) {
8522 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8523 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008524 goto err;
8525 }
8526
8527 ret = msm_populate_dai_link_component_of_node(card);
8528 if (ret) {
8529 ret = -EPROBE_DEFER;
8530 goto err;
8531 }
8532
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008533 ret = msm_init_aux_dev(pdev, card);
8534 if (ret)
8535 goto err;
8536
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008537 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008538 if (ret == -EPROBE_DEFER) {
8539 if (codec_reg_done)
8540 ret = -EINVAL;
8541 goto err;
8542 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008543 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8544 __func__, ret);
8545 goto err;
8546 }
8547 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8548 __func__, card->name);
8549
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308550 /* Get maximum WSA device count for this platform */
8551 ret = of_property_read_u32(pdev->dev.of_node,
8552 "qcom,wsa-max-devs", &pdata->wsa_max_devs);
8553 if (ret) {
8554 dev_err(&pdev->dev, "%s: No DT match for wsa max devs\n",
8555 __func__);
8556 pdata->wsa_max_devs = 0;
8557 }
8558
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08008559 ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
8560 &pdata->tdm_max_slots);
8561 if (ret) {
8562 dev_err(&pdev->dev, "%s: No DT match for tdm max slots\n",
8563 __func__);
8564 }
8565
8566 if ((pdata->tdm_max_slots <= 0) || (pdata->tdm_max_slots >
8567 TDM_MAX_SLOTS)) {
8568 pdata->tdm_max_slots = TDM_MAX_SLOTS;
8569 dev_err(&pdev->dev, "%s: Using default tdm max slot: %d\n",
8570 __func__, pdata->tdm_max_slots);
8571 }
8572
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008573 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8574 "qcom,hph-en1-gpio", 0);
8575 if (!pdata->hph_en1_gpio_p) {
8576 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8577 __func__, "qcom,hph-en1-gpio",
8578 pdev->dev.of_node->full_name);
8579 }
8580
8581 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8582 "qcom,hph-en0-gpio", 0);
8583 if (!pdata->hph_en0_gpio_p) {
8584 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8585 __func__, "qcom,hph-en0-gpio",
8586 pdev->dev.of_node->full_name);
8587 }
8588
8589 ret = of_property_read_string(pdev->dev.of_node,
8590 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8591 if (ret) {
8592 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8593 __func__, "qcom,mbhc-audio-jack-type",
8594 pdev->dev.of_node->full_name);
8595 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8596 } else {
8597 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8598 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8599 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8600 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8601 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8602 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8603 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8604 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8605 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8606 } else {
8607 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8608 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8609 }
8610 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008611 /*
8612 * Parse US-Euro gpio info from DT. Report no error if us-euro
8613 * entry is not found in DT file as some targets do not support
8614 * US-Euro detection
8615 */
8616 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8617 "qcom,us-euro-gpios", 0);
8618 if (!pdata->us_euro_gpio_p) {
8619 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8620 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8621 } else {
8622 dev_dbg(&pdev->dev, "%s detected\n",
8623 "qcom,us-euro-gpios");
8624 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8625 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008626
Meng Wanga60b4082019-02-25 17:02:23 +08008627 if (wcd_mbhc_cfg.enable_usbc_analog)
8628 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8629
8630 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8631 "fsa4480-i2c-handle", 0);
8632 if (!pdata->fsa_handle)
8633 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8634 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8635
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008636 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008637 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8638 "qcom,cdc-dmic01-gpios",
8639 0);
8640 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8641 "qcom,cdc-dmic23-gpios",
8642 0);
8643 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8644 "qcom,cdc-dmic45-gpios",
8645 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +05308646 if (pdata->dmic01_gpio_p)
8647 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8648 if (pdata->dmic23_gpio_p)
8649 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +05308650 if (pdata->dmic45_gpio_p)
8651 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008652
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008653 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8654 "qcom,pri-mi2s-gpios", 0);
8655 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8656 "qcom,sec-mi2s-gpios", 0);
8657 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8658 "qcom,tert-mi2s-gpios", 0);
8659 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8660 "qcom,quat-mi2s-gpios", 0);
8661 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8662 "qcom,quin-mi2s-gpios", 0);
8663 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8664 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008665 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8666 if (pdata->mi2s_gpio_p[index])
8667 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008668 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008669 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008670
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308671 /* parse cps configuration from dt */
8672 if (of_property_read_bool(pdev->dev.of_node, "qcom,cps_reg_phy_addr"))
8673 parse_cps_configuration(pdev, pdata);
8674
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008675 /* Register LPASS audio hw vote */
8676 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8677 if (IS_ERR(lpass_audio_hw_vote)) {
8678 ret = PTR_ERR(lpass_audio_hw_vote);
8679 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8680 __func__, "lpass_audio_hw_vote", ret);
8681 lpass_audio_hw_vote = NULL;
8682 ret = 0;
8683 }
8684 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8685 pdata->core_audio_vote_count = 0;
8686
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008687 ret = msm_audio_ssr_register(&pdev->dev);
8688 if (ret)
8689 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8690 __func__, ret);
8691
8692 is_initial_boot = true;
8693
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008694 return 0;
8695err:
8696 devm_kfree(&pdev->dev, pdata);
8697 return ret;
8698}
8699
8700static int msm_asoc_machine_remove(struct platform_device *pdev)
8701{
8702 struct snd_soc_card *card = platform_get_drvdata(pdev);
8703
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008704 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008705 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008706 msm_i2s_auxpcm_deinit();
8707
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008708 return 0;
8709}
8710
8711static struct platform_driver kona_asoc_machine_driver = {
8712 .driver = {
8713 .name = DRV_NAME,
8714 .owner = THIS_MODULE,
8715 .pm = &snd_soc_pm_ops,
8716 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +08008717 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008718 },
8719 .probe = msm_asoc_machine_probe,
8720 .remove = msm_asoc_machine_remove,
8721};
8722module_platform_driver(kona_asoc_machine_driver);
8723
8724MODULE_DESCRIPTION("ALSA SoC msm");
8725MODULE_LICENSE("GPL v2");
8726MODULE_ALIAS("platform:" DRV_NAME);
8727MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);