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Meng Wang688a8672019-01-29 13:43:33 +08001// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002/*
Xiao Lid8bb93c2020-01-07 12:59:05 +08003 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080016#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070017#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070023#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070024#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -080025#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070026#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070030#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080032#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070033#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +053034#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080035#include "codecs/wcd938x/wcd938x.h"
Kunlei Zhangf61a2312020-02-11 15:37:03 +080036#include "codecs/wcd937x/wcd937x-mbhc.h"
37#include "codecs/wcd937x/wcd937x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070038#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053041#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070042
43#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070044#define __CHIPSET__ "KONA "
45#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
46
47#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070048#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070049#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070050#define SAMPLING_RATE_22P05KHZ 22050
51#define SAMPLING_RATE_32KHZ 32000
52#define SAMPLING_RATE_44P1KHZ 44100
53#define SAMPLING_RATE_48KHZ 48000
54#define SAMPLING_RATE_88P2KHZ 88200
55#define SAMPLING_RATE_96KHZ 96000
56#define SAMPLING_RATE_176P4KHZ 176400
57#define SAMPLING_RATE_192KHZ 192000
58#define SAMPLING_RATE_352P8KHZ 352800
59#define SAMPLING_RATE_384KHZ 384000
60
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -070061#define IS_FRACTIONAL(x) \
62((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
63(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
64(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
65
66#define IS_MSM_INTERFACE_MI2S(x) \
67((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
68
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080069#define WCD9XXX_MBHC_DEF_RLOADS 5
70#define WCD9XXX_MBHC_DEF_BUTTONS 8
71#define CODEC_EXT_CLK_RATE 9600000
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define DEV_NAME_STR_LEN 32
74#define WCD_MBHC_HS_V_MAX 1600
75
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070076#define TDM_CHANNEL_MAX 8
77#define DEV_NAME_STR_LEN 32
78
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80
81#define ADSP_STATE_READY_TIMEOUT_MS 3000
82
Laxminath Kasamd3621032020-04-01 18:14:05 +053083#define WSA8810_NAME_1 "wsa881x.1020170211"
84#define WSA8810_NAME_2 "wsa881x.1020170212"
85#define WSA8815_NAME_1 "wsa881x.1021170213"
86#define WSA8815_NAME_2 "wsa881x.1021170214"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -080087#define WCN_CDC_SLIM_RX_CH_MAX 2
88#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053089#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070090
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070091enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -070092 RX_PATH = 0,
93 TX_PATH,
94 MAX_PATH,
95};
96
97enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070098 TDM_0 = 0,
99 TDM_1,
100 TDM_2,
101 TDM_3,
102 TDM_4,
103 TDM_5,
104 TDM_6,
105 TDM_7,
106 TDM_PORT_MAX,
107};
108
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700109#define TDM_MAX_SLOTS 8
110#define TDM_SLOT_WIDTH_BITS 32
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800111#define TDM_SLOT_WIDTH_BYTES TDM_SLOT_WIDTH_BITS/8
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700112
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700113enum {
114 TDM_PRI = 0,
115 TDM_SEC,
116 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800117 TDM_QUAT,
118 TDM_QUIN,
119 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700120 TDM_INTERFACE_MAX,
121};
122
123enum {
124 PRIM_AUX_PCM = 0,
125 SEC_AUX_PCM,
126 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800127 QUAT_AUX_PCM,
128 QUIN_AUX_PCM,
129 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700130 AUX_PCM_MAX,
131};
132
133enum {
134 PRIM_MI2S = 0,
135 SEC_MI2S,
136 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800137 QUAT_MI2S,
138 QUIN_MI2S,
139 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700140 MI2S_MAX,
141};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700142
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700143enum {
144 WSA_CDC_DMA_RX_0 = 0,
145 WSA_CDC_DMA_RX_1,
146 RX_CDC_DMA_RX_0,
147 RX_CDC_DMA_RX_1,
148 RX_CDC_DMA_RX_2,
149 RX_CDC_DMA_RX_3,
150 RX_CDC_DMA_RX_5,
151 CDC_DMA_RX_MAX,
152};
153
154enum {
155 WSA_CDC_DMA_TX_0 = 0,
156 WSA_CDC_DMA_TX_1,
157 WSA_CDC_DMA_TX_2,
158 TX_CDC_DMA_TX_0,
159 TX_CDC_DMA_TX_3,
160 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800161 VA_CDC_DMA_TX_0,
162 VA_CDC_DMA_TX_1,
163 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700164 CDC_DMA_TX_MAX,
165};
166
Banajit Goswami83a370d2019-03-05 16:15:21 -0800167enum {
168 SLIM_RX_7 = 0,
169 SLIM_RX_MAX,
170};
171enum {
172 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530173 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800174 SLIM_TX_MAX,
175};
176
Meng Wange8e53822019-03-18 10:49:50 +0800177enum {
178 AFE_LOOPBACK_TX_IDX = 0,
179 AFE_LOOPBACK_TX_IDX_MAX,
180};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700181struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700182 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700183 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530184 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700185 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
186 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
187 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800188 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
189 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700190 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
191 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
192 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
193 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
194 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800195 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700196 struct clk *lpass_audio_hw_vote;
197 int core_audio_vote_count;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800198 u32 tdm_max_slots; /* Max TDM slots used */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700199};
200
201struct tdm_port {
202 u32 mode;
203 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700204};
205
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700206struct tdm_dev_config {
207 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
208};
209
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800210enum {
211 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700212 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800213 EXT_DISP_RX_IDX_MAX,
214};
215
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700216struct msm_wsa881x_dev_info {
217 struct device_node *of_node;
218 u32 index;
219};
220
221struct aux_codec_dev_info {
222 struct device_node *of_node;
223 u32 index;
224};
225
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700226struct dev_config {
227 u32 sample_rate;
228 u32 bit_format;
229 u32 channels;
230};
231
Banajit Goswami83a370d2019-03-05 16:15:21 -0800232/* Default configuration of slimbus channels */
233static struct dev_config slim_rx_cfg[] = {
234 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
235};
236
237static struct dev_config slim_tx_cfg[] = {
238 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530239 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800240};
241
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800242/* Default configuration of external display BE */
243static struct dev_config ext_disp_rx_cfg[] = {
244 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700245 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800246};
247
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700248static struct dev_config usb_rx_cfg = {
249 .sample_rate = SAMPLING_RATE_48KHZ,
250 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
251 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700252};
253
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700254static struct dev_config usb_tx_cfg = {
255 .sample_rate = SAMPLING_RATE_48KHZ,
256 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
257 .channels = 1,
258};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700259
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700260static struct dev_config proxy_rx_cfg = {
261 .sample_rate = SAMPLING_RATE_48KHZ,
262 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
263 .channels = 2,
264};
265
266static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
267 {
268 AFE_API_VERSION_I2S_CONFIG,
269 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
270 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
271 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
272 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
273 0,
274 },
275 {
276 AFE_API_VERSION_I2S_CONFIG,
277 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
278 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
279 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
280 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
281 0,
282 },
283 {
284 AFE_API_VERSION_I2S_CONFIG,
285 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
286 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
287 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
288 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
289 0,
290 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800291 {
292 AFE_API_VERSION_I2S_CONFIG,
293 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
294 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
295 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
296 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
297 0,
298 },
299 {
300 AFE_API_VERSION_I2S_CONFIG,
301 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
302 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
303 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
304 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
305 0,
306 },
307 {
308 AFE_API_VERSION_I2S_CONFIG,
309 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
310 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
311 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
312 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
313 0,
314 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700315};
316
317struct mi2s_conf {
318 struct mutex lock;
319 u32 ref_cnt;
320 u32 msm_is_mi2s_master;
321};
322
323static u32 mi2s_ebit_clk[MI2S_MAX] = {
324 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
325 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
326 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
327};
328
329static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
330
331/* Default configuration of TDM channels */
332static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
333 { /* PRI TDM */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
342 },
343 { /* SEC TDM */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
352 },
353 { /* TERT TDM */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
362 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800363 { /* QUAT TDM */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
372 },
373 { /* QUIN TDM */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
382 },
383 { /* SEN TDM */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
392 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700393};
394
395static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
396 { /* PRI TDM */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
405 },
406 { /* SEC TDM */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
415 },
416 { /* TERT TDM */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
425 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800426 { /* QUAT TDM */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
429 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
435 },
436 { /* QUIN TDM */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
439 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
445 },
446 { /* SEN TDM */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
449 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
450 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
451 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
452 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
453 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
454 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
455 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700456};
457
458/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700459static struct dev_config aux_pcm_rx_cfg[] = {
460 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700461 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
462 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800463 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
464 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
465 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700466};
467
468static struct dev_config aux_pcm_tx_cfg[] = {
469 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700470 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
471 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800472 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
473 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
474 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700475};
476
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700477/* Default configuration of MI2S channels */
478static struct dev_config mi2s_rx_cfg[] = {
479 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800482 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
483 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
484 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700485};
486
487static struct dev_config mi2s_tx_cfg[] = {
488 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
489 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
490 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800491 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
492 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
493 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700494};
495
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700496static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
497 { /* PRI TDM */
498 { {0, 4, 0xFFFF} }, /* RX_0 */
499 { {8, 12, 0xFFFF} }, /* RX_1 */
500 { {16, 20, 0xFFFF} }, /* RX_2 */
501 { {24, 28, 0xFFFF} }, /* RX_3 */
502 { {0xFFFF} }, /* RX_4 */
503 { {0xFFFF} }, /* RX_5 */
504 { {0xFFFF} }, /* RX_6 */
505 { {0xFFFF} }, /* RX_7 */
506 },
507 {
508 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
509 { {8, 12, 0xFFFF} }, /* TX_1 */
510 { {16, 20, 0xFFFF} }, /* TX_2 */
511 { {24, 28, 0xFFFF} }, /* TX_3 */
512 { {0xFFFF} }, /* TX_4 */
513 { {0xFFFF} }, /* TX_5 */
514 { {0xFFFF} }, /* TX_6 */
515 { {0xFFFF} }, /* TX_7 */
516 },
517};
518
519static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
520 { /* SEC TDM */
521 { {0, 4, 0xFFFF} }, /* RX_0 */
522 { {8, 12, 0xFFFF} }, /* RX_1 */
523 { {16, 20, 0xFFFF} }, /* RX_2 */
524 { {24, 28, 0xFFFF} }, /* RX_3 */
525 { {0xFFFF} }, /* RX_4 */
526 { {0xFFFF} }, /* RX_5 */
527 { {0xFFFF} }, /* RX_6 */
528 { {0xFFFF} }, /* RX_7 */
529 },
530 {
531 { {0, 4, 0xFFFF} }, /* TX_0 */
532 { {8, 12, 0xFFFF} }, /* TX_1 */
533 { {16, 20, 0xFFFF} }, /* TX_2 */
534 { {24, 28, 0xFFFF} }, /* TX_3 */
535 { {0xFFFF} }, /* TX_4 */
536 { {0xFFFF} }, /* TX_5 */
537 { {0xFFFF} }, /* TX_6 */
538 { {0xFFFF} }, /* TX_7 */
539 },
540};
541
542static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
543 { /* TERT TDM */
544 { {0, 4, 0xFFFF} }, /* RX_0 */
545 { {8, 12, 0xFFFF} }, /* RX_1 */
546 { {16, 20, 0xFFFF} }, /* RX_2 */
547 { {24, 28, 0xFFFF} }, /* RX_3 */
548 { {0xFFFF} }, /* RX_4 */
549 { {0xFFFF} }, /* RX_5 */
550 { {0xFFFF} }, /* RX_6 */
551 { {0xFFFF} }, /* RX_7 */
552 },
553 {
554 { {0, 4, 0xFFFF} }, /* TX_0 */
555 { {8, 12, 0xFFFF} }, /* TX_1 */
556 { {16, 20, 0xFFFF} }, /* TX_2 */
557 { {24, 28, 0xFFFF} }, /* TX_3 */
558 { {0xFFFF} }, /* TX_4 */
559 { {0xFFFF} }, /* TX_5 */
560 { {0xFFFF} }, /* TX_6 */
561 { {0xFFFF} }, /* TX_7 */
562 },
563};
564
565static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
566 { /* QUAT TDM */
567 { {0, 4, 0xFFFF} }, /* RX_0 */
568 { {8, 12, 0xFFFF} }, /* RX_1 */
569 { {16, 20, 0xFFFF} }, /* RX_2 */
570 { {24, 28, 0xFFFF} }, /* RX_3 */
571 { {0xFFFF} }, /* RX_4 */
572 { {0xFFFF} }, /* RX_5 */
573 { {0xFFFF} }, /* RX_6 */
574 { {0xFFFF} }, /* RX_7 */
575 },
576 {
577 { {0, 4, 0xFFFF} }, /* TX_0 */
578 { {8, 12, 0xFFFF} }, /* TX_1 */
579 { {16, 20, 0xFFFF} }, /* TX_2 */
580 { {24, 28, 0xFFFF} }, /* TX_3 */
581 { {0xFFFF} }, /* TX_4 */
582 { {0xFFFF} }, /* TX_5 */
583 { {0xFFFF} }, /* TX_6 */
584 { {0xFFFF} }, /* TX_7 */
585 },
586};
587
588static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
589 { /* QUIN TDM */
590 { {0, 4, 0xFFFF} }, /* RX_0 */
591 { {8, 12, 0xFFFF} }, /* RX_1 */
592 { {16, 20, 0xFFFF} }, /* RX_2 */
593 { {24, 28, 0xFFFF} }, /* RX_3 */
594 { {0xFFFF} }, /* RX_4 */
595 { {0xFFFF} }, /* RX_5 */
596 { {0xFFFF} }, /* RX_6 */
597 { {0xFFFF} }, /* RX_7 */
598 },
599 {
600 { {0, 4, 0xFFFF} }, /* TX_0 */
601 { {8, 12, 0xFFFF} }, /* TX_1 */
602 { {16, 20, 0xFFFF} }, /* TX_2 */
603 { {24, 28, 0xFFFF} }, /* TX_3 */
604 { {0xFFFF} }, /* TX_4 */
605 { {0xFFFF} }, /* TX_5 */
606 { {0xFFFF} }, /* TX_6 */
607 { {0xFFFF} }, /* TX_7 */
608 },
609};
610
611static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
612 { /* SEN TDM */
613 { {0, 4, 0xFFFF} }, /* RX_0 */
614 { {8, 12, 0xFFFF} }, /* RX_1 */
615 { {16, 20, 0xFFFF} }, /* RX_2 */
616 { {24, 28, 0xFFFF} }, /* RX_3 */
617 { {0xFFFF} }, /* RX_4 */
618 { {0xFFFF} }, /* RX_5 */
619 { {0xFFFF} }, /* RX_6 */
620 { {0xFFFF} }, /* RX_7 */
621 },
622 {
623 { {0, 4, 0xFFFF} }, /* TX_0 */
624 { {8, 12, 0xFFFF} }, /* TX_1 */
625 { {16, 20, 0xFFFF} }, /* TX_2 */
626 { {24, 28, 0xFFFF} }, /* TX_3 */
627 { {0xFFFF} }, /* TX_4 */
628 { {0xFFFF} }, /* TX_5 */
629 { {0xFFFF} }, /* TX_6 */
630 { {0xFFFF} }, /* TX_7 */
631 },
632};
633
634static void *tdm_cfg[TDM_INTERFACE_MAX] = {
635 pri_tdm_dev_config,
636 sec_tdm_dev_config,
637 tert_tdm_dev_config,
638 quat_tdm_dev_config,
639 quin_tdm_dev_config,
640 sen_tdm_dev_config,
641};
642
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700643/* Default configuration of Codec DMA Interface RX */
644static struct dev_config cdc_dma_rx_cfg[] = {
645 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
646 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
647 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
648 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
649 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
650 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
651 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652};
653
654/* Default configuration of Codec DMA Interface TX */
655static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530656 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700657 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
658 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
659 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
660 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
661 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800662 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
663 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
664 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700665};
666
Meng Wange8e53822019-03-18 10:49:50 +0800667static struct dev_config afe_loopback_tx_cfg[] = {
668 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
669};
670
Meng Wangd1db67c2019-04-17 12:41:34 +0800671static int msm_vi_feed_tx_ch = 2;
672static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700673static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
674 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700675static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700676static char const *ch_text[] = {"Two", "Three", "Four", "Five",
677 "Six", "Seven", "Eight"};
678static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
679 "KHZ_16", "KHZ_22P05",
680 "KHZ_32", "KHZ_44P1", "KHZ_48",
681 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
682 "KHZ_192", "KHZ_352P8", "KHZ_384"};
683static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
684 "Five", "Six", "Seven",
685 "Eight"};
686static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
687 "KHZ_48", "KHZ_176P4",
688 "KHZ_352P8"};
689static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
690static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
691 "Five", "Six", "Seven", "Eight"};
692static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
693static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
694 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700695 "KHZ_48", "KHZ_88P2", "KHZ_96",
696 "KHZ_176P4", "KHZ_192","KHZ_352P8",
697 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700698static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
699 "Five", "Six", "Seven",
700 "Eight"};
701
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700702static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
703static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
704 "Five", "Six", "Seven",
705 "Eight"};
706static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
707 "KHZ_16", "KHZ_22P05",
708 "KHZ_32", "KHZ_44P1", "KHZ_48",
709 "KHZ_88P2", "KHZ_96",
710 "KHZ_176P4", "KHZ_192",
711 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700712static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
713 "KHZ_16", "KHZ_22P05",
714 "KHZ_32", "KHZ_44P1", "KHZ_48",
715 "KHZ_88P2", "KHZ_96",
716 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800717static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
718 "S24_3LE"};
719static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
720 "KHZ_192", "KHZ_32", "KHZ_44P1",
721 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800722static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
723 "KHZ_44P1", "KHZ_48",
724 "KHZ_88P2", "KHZ_96"};
725static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
726 "KHZ_44P1", "KHZ_48",
727 "KHZ_88P2", "KHZ_96"};
728static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
729 "KHZ_44P1", "KHZ_48",
730 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800731static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700732
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700733static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
734static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
735static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
736static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
737static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
738static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800739static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700740static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
741static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
742static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
743static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
744static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
745static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
746static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700747static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700748static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
749static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800750static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
752static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700753static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700754static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
755static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800756static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
757static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
758static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700759static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
760static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700761static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800764static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
766static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700767static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
768static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
769static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800770static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
771static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
772static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700773static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
774static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
775static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
777static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800778static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
780static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700781static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800784static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700787static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
797static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
798static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
799static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800800static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
801static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
802static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700803static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
804static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700805static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
806static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
807static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
808static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
809static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800810static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
811static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
812static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
814 cdc_dma_sample_rate_text);
815static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
816 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700817static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
818 cdc_dma_sample_rate_text);
819static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
820 cdc_dma_sample_rate_text);
821static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
822 cdc_dma_sample_rate_text);
823static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
824 cdc_dma_sample_rate_text);
825static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
826 cdc_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
828 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800829static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
830 cdc_dma_sample_rate_text);
831static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
832 cdc_dma_sample_rate_text);
833static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
834 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700835
836/* WCD9380 */
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
839static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
840static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
841static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
843 cdc80_dma_sample_rate_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
845 cdc80_dma_sample_rate_text);
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
847 cdc80_dma_sample_rate_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
849 cdc80_dma_sample_rate_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
851 cdc80_dma_sample_rate_text);
852/* WCD9385 */
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
855static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
857static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
859 cdc_dma_sample_rate_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
861 cdc_dma_sample_rate_text);
862static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
863 cdc_dma_sample_rate_text);
864static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
865 cdc_dma_sample_rate_text);
866static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
867 cdc_dma_sample_rate_text);
868
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800869/* WCD937x */
870static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
871static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
872static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
873static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
874static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
875static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
876 cdc_dma_sample_rate_text);
877static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
878 cdc_dma_sample_rate_text);
879static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
880 cdc_dma_sample_rate_text);
881static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
882 cdc_dma_sample_rate_text);
883static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
884 cdc_dma_sample_rate_text);
885
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800886static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
887static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
888static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
889 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800890static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
891static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
892static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800893static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700894
895static bool is_initial_boot;
896static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700897static struct snd_soc_aux_dev *msm_aux_dev;
898static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700899static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700900static int dmic_0_1_gpio_cnt;
901static int dmic_2_3_gpio_cnt;
902static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700903
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800904static void *def_wcd_mbhc_cal(void);
905
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700906/*
907 * Need to report LINEIN
908 * if R/L channel impedance is larger than 5K ohm
909 */
910static struct wcd_mbhc_config wcd_mbhc_cfg = {
911 .read_fw_bin = false,
912 .calibration = NULL,
913 .detect_extn_cable = true,
914 .mono_stero_detection = false,
915 .swap_gnd_mic = NULL,
916 .hs_ext_micbias = true,
917 .key_code[0] = KEY_MEDIA,
918 .key_code[1] = KEY_VOICECOMMAND,
919 .key_code[2] = KEY_VOLUMEUP,
920 .key_code[3] = KEY_VOLUMEDOWN,
921 .key_code[4] = 0,
922 .key_code[5] = 0,
923 .key_code[6] = 0,
924 .key_code[7] = 0,
925 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530926 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700927 .mbhc_micbias = MIC_BIAS_2,
928 .anc_micbias = MIC_BIAS_2,
929 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530930 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700931};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700932
933static inline int param_is_mask(int p)
934{
935 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
936 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
937}
938
939static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
940 int n)
941{
942 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
943}
944
945static void param_set_mask(struct snd_pcm_hw_params *p, int n,
946 unsigned int bit)
947{
948 if (bit >= SNDRV_MASK_MAX)
949 return;
950 if (param_is_mask(n)) {
951 struct snd_mask *m = param_to_mask(p, n);
952
953 m->bits[0] = 0;
954 m->bits[1] = 0;
955 m->bits[bit >> 5] |= (1 << (bit & 31));
956 }
957}
958
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700959static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
960 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700961{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700962 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700963
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700964 switch (usb_rx_cfg.sample_rate) {
965 case SAMPLING_RATE_384KHZ:
966 sample_rate_val = 12;
967 break;
968 case SAMPLING_RATE_352P8KHZ:
969 sample_rate_val = 11;
970 break;
971 case SAMPLING_RATE_192KHZ:
972 sample_rate_val = 10;
973 break;
974 case SAMPLING_RATE_176P4KHZ:
975 sample_rate_val = 9;
976 break;
977 case SAMPLING_RATE_96KHZ:
978 sample_rate_val = 8;
979 break;
980 case SAMPLING_RATE_88P2KHZ:
981 sample_rate_val = 7;
982 break;
983 case SAMPLING_RATE_48KHZ:
984 sample_rate_val = 6;
985 break;
986 case SAMPLING_RATE_44P1KHZ:
987 sample_rate_val = 5;
988 break;
989 case SAMPLING_RATE_32KHZ:
990 sample_rate_val = 4;
991 break;
992 case SAMPLING_RATE_22P05KHZ:
993 sample_rate_val = 3;
994 break;
995 case SAMPLING_RATE_16KHZ:
996 sample_rate_val = 2;
997 break;
998 case SAMPLING_RATE_11P025KHZ:
999 sample_rate_val = 1;
1000 break;
1001 case SAMPLING_RATE_8KHZ:
1002 default:
1003 sample_rate_val = 0;
1004 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001005 }
1006
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001007 ucontrol->value.integer.value[0] = sample_rate_val;
1008 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1009 usb_rx_cfg.sample_rate);
1010 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001011}
1012
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001013static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1014 struct snd_ctl_elem_value *ucontrol)
1015{
1016 switch (ucontrol->value.integer.value[0]) {
1017 case 12:
1018 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1019 break;
1020 case 11:
1021 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1022 break;
1023 case 10:
1024 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1025 break;
1026 case 9:
1027 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1028 break;
1029 case 8:
1030 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1031 break;
1032 case 7:
1033 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1034 break;
1035 case 6:
1036 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1037 break;
1038 case 5:
1039 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1040 break;
1041 case 4:
1042 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1043 break;
1044 case 3:
1045 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1046 break;
1047 case 2:
1048 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1049 break;
1050 case 1:
1051 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1052 break;
1053 case 0:
1054 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1055 break;
1056 default:
1057 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1058 break;
1059 }
1060
1061 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1062 __func__, ucontrol->value.integer.value[0],
1063 usb_rx_cfg.sample_rate);
1064 return 0;
1065}
1066
1067static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1068 struct snd_ctl_elem_value *ucontrol)
1069{
1070 int sample_rate_val = 0;
1071
1072 switch (usb_tx_cfg.sample_rate) {
1073 case SAMPLING_RATE_384KHZ:
1074 sample_rate_val = 12;
1075 break;
1076 case SAMPLING_RATE_352P8KHZ:
1077 sample_rate_val = 11;
1078 break;
1079 case SAMPLING_RATE_192KHZ:
1080 sample_rate_val = 10;
1081 break;
1082 case SAMPLING_RATE_176P4KHZ:
1083 sample_rate_val = 9;
1084 break;
1085 case SAMPLING_RATE_96KHZ:
1086 sample_rate_val = 8;
1087 break;
1088 case SAMPLING_RATE_88P2KHZ:
1089 sample_rate_val = 7;
1090 break;
1091 case SAMPLING_RATE_48KHZ:
1092 sample_rate_val = 6;
1093 break;
1094 case SAMPLING_RATE_44P1KHZ:
1095 sample_rate_val = 5;
1096 break;
1097 case SAMPLING_RATE_32KHZ:
1098 sample_rate_val = 4;
1099 break;
1100 case SAMPLING_RATE_22P05KHZ:
1101 sample_rate_val = 3;
1102 break;
1103 case SAMPLING_RATE_16KHZ:
1104 sample_rate_val = 2;
1105 break;
1106 case SAMPLING_RATE_11P025KHZ:
1107 sample_rate_val = 1;
1108 break;
1109 case SAMPLING_RATE_8KHZ:
1110 sample_rate_val = 0;
1111 break;
1112 default:
1113 sample_rate_val = 6;
1114 break;
1115 }
1116
1117 ucontrol->value.integer.value[0] = sample_rate_val;
1118 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1119 usb_tx_cfg.sample_rate);
1120 return 0;
1121}
1122
1123static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125{
1126 switch (ucontrol->value.integer.value[0]) {
1127 case 12:
1128 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1129 break;
1130 case 11:
1131 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1132 break;
1133 case 10:
1134 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1135 break;
1136 case 9:
1137 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1138 break;
1139 case 8:
1140 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1141 break;
1142 case 7:
1143 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1144 break;
1145 case 6:
1146 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1147 break;
1148 case 5:
1149 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1150 break;
1151 case 4:
1152 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1153 break;
1154 case 3:
1155 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1156 break;
1157 case 2:
1158 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1159 break;
1160 case 1:
1161 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1162 break;
1163 case 0:
1164 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1165 break;
1166 default:
1167 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1168 break;
1169 }
1170
1171 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1172 __func__, ucontrol->value.integer.value[0],
1173 usb_tx_cfg.sample_rate);
1174 return 0;
1175}
Meng Wange8e53822019-03-18 10:49:50 +08001176static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1177 struct snd_ctl_elem_value *ucontrol)
1178{
1179 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1180 afe_loopback_tx_cfg[0].channels);
1181 ucontrol->value.enumerated.item[0] =
1182 afe_loopback_tx_cfg[0].channels - 1;
1183
1184 return 0;
1185}
1186
1187static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1188 struct snd_ctl_elem_value *ucontrol)
1189{
1190 afe_loopback_tx_cfg[0].channels =
1191 ucontrol->value.enumerated.item[0] + 1;
1192 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1193 afe_loopback_tx_cfg[0].channels);
1194
1195 return 1;
1196}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001197
1198static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1199 struct snd_ctl_elem_value *ucontrol)
1200{
1201 switch (usb_rx_cfg.bit_format) {
1202 case SNDRV_PCM_FORMAT_S32_LE:
1203 ucontrol->value.integer.value[0] = 3;
1204 break;
1205 case SNDRV_PCM_FORMAT_S24_3LE:
1206 ucontrol->value.integer.value[0] = 2;
1207 break;
1208 case SNDRV_PCM_FORMAT_S24_LE:
1209 ucontrol->value.integer.value[0] = 1;
1210 break;
1211 case SNDRV_PCM_FORMAT_S16_LE:
1212 default:
1213 ucontrol->value.integer.value[0] = 0;
1214 break;
1215 }
1216
1217 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1218 __func__, usb_rx_cfg.bit_format,
1219 ucontrol->value.integer.value[0]);
1220 return 0;
1221}
1222
1223static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1224 struct snd_ctl_elem_value *ucontrol)
1225{
1226 int rc = 0;
1227
1228 switch (ucontrol->value.integer.value[0]) {
1229 case 3:
1230 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1231 break;
1232 case 2:
1233 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1234 break;
1235 case 1:
1236 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1237 break;
1238 case 0:
1239 default:
1240 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1241 break;
1242 }
1243 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1244 __func__, usb_rx_cfg.bit_format,
1245 ucontrol->value.integer.value[0]);
1246
1247 return rc;
1248}
1249
1250static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1251 struct snd_ctl_elem_value *ucontrol)
1252{
1253 switch (usb_tx_cfg.bit_format) {
1254 case SNDRV_PCM_FORMAT_S32_LE:
1255 ucontrol->value.integer.value[0] = 3;
1256 break;
1257 case SNDRV_PCM_FORMAT_S24_3LE:
1258 ucontrol->value.integer.value[0] = 2;
1259 break;
1260 case SNDRV_PCM_FORMAT_S24_LE:
1261 ucontrol->value.integer.value[0] = 1;
1262 break;
1263 case SNDRV_PCM_FORMAT_S16_LE:
1264 default:
1265 ucontrol->value.integer.value[0] = 0;
1266 break;
1267 }
1268
1269 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1270 __func__, usb_tx_cfg.bit_format,
1271 ucontrol->value.integer.value[0]);
1272 return 0;
1273}
1274
1275static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1277{
1278 int rc = 0;
1279
1280 switch (ucontrol->value.integer.value[0]) {
1281 case 3:
1282 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1283 break;
1284 case 2:
1285 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1286 break;
1287 case 1:
1288 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1289 break;
1290 case 0:
1291 default:
1292 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1293 break;
1294 }
1295 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1296 __func__, usb_tx_cfg.bit_format,
1297 ucontrol->value.integer.value[0]);
1298
1299 return rc;
1300}
1301
1302static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_value *ucontrol)
1304{
1305 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1306 usb_rx_cfg.channels);
1307 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1308 return 0;
1309}
1310
1311static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1313{
1314 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1315
1316 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1317 return 1;
1318}
1319
1320static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_value *ucontrol)
1322{
1323 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1324 usb_tx_cfg.channels);
1325 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1326 return 0;
1327}
1328
1329static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1330 struct snd_ctl_elem_value *ucontrol)
1331{
1332 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1333
1334 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1335 return 1;
1336}
1337
Meng Wangd1db67c2019-04-17 12:41:34 +08001338static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1339 struct snd_ctl_elem_value *ucontrol)
1340{
1341 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1342 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1343 ucontrol->value.integer.value[0]);
1344 return 0;
1345}
1346
1347static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1348 struct snd_ctl_elem_value *ucontrol)
1349{
1350 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1351 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1352 return 1;
1353}
1354
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001355static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1356{
1357 int idx = 0;
1358
1359 if (strnstr(kcontrol->id.name, "Display Port RX",
1360 sizeof("Display Port RX"))) {
1361 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07001362 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1363 sizeof("Display Port1 RX"))) {
1364 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001365 } else {
1366 pr_err("%s: unsupported BE: %s\n",
1367 __func__, kcontrol->id.name);
1368 idx = -EINVAL;
1369 }
1370
1371 return idx;
1372}
1373
1374static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1375 struct snd_ctl_elem_value *ucontrol)
1376{
1377 int idx = ext_disp_get_port_idx(kcontrol);
1378
1379 if (idx < 0)
1380 return idx;
1381
1382 switch (ext_disp_rx_cfg[idx].bit_format) {
1383 case SNDRV_PCM_FORMAT_S24_3LE:
1384 ucontrol->value.integer.value[0] = 2;
1385 break;
1386 case SNDRV_PCM_FORMAT_S24_LE:
1387 ucontrol->value.integer.value[0] = 1;
1388 break;
1389 case SNDRV_PCM_FORMAT_S16_LE:
1390 default:
1391 ucontrol->value.integer.value[0] = 0;
1392 break;
1393 }
1394
1395 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1396 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1397 ucontrol->value.integer.value[0]);
1398 return 0;
1399}
1400
1401static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1402 struct snd_ctl_elem_value *ucontrol)
1403{
1404 int idx = ext_disp_get_port_idx(kcontrol);
1405
1406 if (idx < 0)
1407 return idx;
1408
1409 switch (ucontrol->value.integer.value[0]) {
1410 case 2:
1411 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1412 break;
1413 case 1:
1414 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1415 break;
1416 case 0:
1417 default:
1418 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1419 break;
1420 }
1421 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1422 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1423 ucontrol->value.integer.value[0]);
1424
1425 return 0;
1426}
1427
1428static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1429 struct snd_ctl_elem_value *ucontrol)
1430{
1431 int idx = ext_disp_get_port_idx(kcontrol);
1432
1433 if (idx < 0)
1434 return idx;
1435
1436 ucontrol->value.integer.value[0] =
1437 ext_disp_rx_cfg[idx].channels - 2;
1438
1439 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1440 idx, ext_disp_rx_cfg[idx].channels);
1441
1442 return 0;
1443}
1444
1445static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1446 struct snd_ctl_elem_value *ucontrol)
1447{
1448 int idx = ext_disp_get_port_idx(kcontrol);
1449
1450 if (idx < 0)
1451 return idx;
1452
1453 ext_disp_rx_cfg[idx].channels =
1454 ucontrol->value.integer.value[0] + 2;
1455
1456 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1457 idx, ext_disp_rx_cfg[idx].channels);
1458 return 1;
1459}
1460
1461static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1462 struct snd_ctl_elem_value *ucontrol)
1463{
1464 int sample_rate_val;
1465 int idx = ext_disp_get_port_idx(kcontrol);
1466
1467 if (idx < 0)
1468 return idx;
1469
1470 switch (ext_disp_rx_cfg[idx].sample_rate) {
1471 case SAMPLING_RATE_176P4KHZ:
1472 sample_rate_val = 6;
1473 break;
1474
1475 case SAMPLING_RATE_88P2KHZ:
1476 sample_rate_val = 5;
1477 break;
1478
1479 case SAMPLING_RATE_44P1KHZ:
1480 sample_rate_val = 4;
1481 break;
1482
1483 case SAMPLING_RATE_32KHZ:
1484 sample_rate_val = 3;
1485 break;
1486
1487 case SAMPLING_RATE_192KHZ:
1488 sample_rate_val = 2;
1489 break;
1490
1491 case SAMPLING_RATE_96KHZ:
1492 sample_rate_val = 1;
1493 break;
1494
1495 case SAMPLING_RATE_48KHZ:
1496 default:
1497 sample_rate_val = 0;
1498 break;
1499 }
1500
1501 ucontrol->value.integer.value[0] = sample_rate_val;
1502 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1503 idx, ext_disp_rx_cfg[idx].sample_rate);
1504
1505 return 0;
1506}
1507
1508static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1509 struct snd_ctl_elem_value *ucontrol)
1510{
1511 int idx = ext_disp_get_port_idx(kcontrol);
1512
1513 if (idx < 0)
1514 return idx;
1515
1516 switch (ucontrol->value.integer.value[0]) {
1517 case 6:
1518 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1519 break;
1520 case 5:
1521 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1522 break;
1523 case 4:
1524 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1525 break;
1526 case 3:
1527 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1528 break;
1529 case 2:
1530 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1531 break;
1532 case 1:
1533 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1534 break;
1535 case 0:
1536 default:
1537 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1538 break;
1539 }
1540
1541 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1542 __func__, ucontrol->value.integer.value[0], idx,
1543 ext_disp_rx_cfg[idx].sample_rate);
1544 return 0;
1545}
1546
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001547static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1549{
1550 pr_debug("%s: proxy_rx channels = %d\n",
1551 __func__, proxy_rx_cfg.channels);
1552 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1553
1554 return 0;
1555}
1556
1557static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1558 struct snd_ctl_elem_value *ucontrol)
1559{
1560 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1561 pr_debug("%s: proxy_rx channels = %d\n",
1562 __func__, proxy_rx_cfg.channels);
1563
1564 return 1;
1565}
1566
1567static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1568 struct tdm_port *port)
1569{
1570 if (port) {
1571 if (strnstr(kcontrol->id.name, "PRI",
1572 sizeof(kcontrol->id.name))) {
1573 port->mode = TDM_PRI;
1574 } else if (strnstr(kcontrol->id.name, "SEC",
1575 sizeof(kcontrol->id.name))) {
1576 port->mode = TDM_SEC;
1577 } else if (strnstr(kcontrol->id.name, "TERT",
1578 sizeof(kcontrol->id.name))) {
1579 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001580 } else if (strnstr(kcontrol->id.name, "QUAT",
1581 sizeof(kcontrol->id.name))) {
1582 port->mode = TDM_QUAT;
1583 } else if (strnstr(kcontrol->id.name, "QUIN",
1584 sizeof(kcontrol->id.name))) {
1585 port->mode = TDM_QUIN;
1586 } else if (strnstr(kcontrol->id.name, "SEN",
1587 sizeof(kcontrol->id.name))) {
1588 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001589 } else {
1590 pr_err("%s: unsupported mode in: %s\n",
1591 __func__, kcontrol->id.name);
1592 return -EINVAL;
1593 }
1594
1595 if (strnstr(kcontrol->id.name, "RX_0",
1596 sizeof(kcontrol->id.name)) ||
1597 strnstr(kcontrol->id.name, "TX_0",
1598 sizeof(kcontrol->id.name))) {
1599 port->channel = TDM_0;
1600 } else if (strnstr(kcontrol->id.name, "RX_1",
1601 sizeof(kcontrol->id.name)) ||
1602 strnstr(kcontrol->id.name, "TX_1",
1603 sizeof(kcontrol->id.name))) {
1604 port->channel = TDM_1;
1605 } else if (strnstr(kcontrol->id.name, "RX_2",
1606 sizeof(kcontrol->id.name)) ||
1607 strnstr(kcontrol->id.name, "TX_2",
1608 sizeof(kcontrol->id.name))) {
1609 port->channel = TDM_2;
1610 } else if (strnstr(kcontrol->id.name, "RX_3",
1611 sizeof(kcontrol->id.name)) ||
1612 strnstr(kcontrol->id.name, "TX_3",
1613 sizeof(kcontrol->id.name))) {
1614 port->channel = TDM_3;
1615 } else if (strnstr(kcontrol->id.name, "RX_4",
1616 sizeof(kcontrol->id.name)) ||
1617 strnstr(kcontrol->id.name, "TX_4",
1618 sizeof(kcontrol->id.name))) {
1619 port->channel = TDM_4;
1620 } else if (strnstr(kcontrol->id.name, "RX_5",
1621 sizeof(kcontrol->id.name)) ||
1622 strnstr(kcontrol->id.name, "TX_5",
1623 sizeof(kcontrol->id.name))) {
1624 port->channel = TDM_5;
1625 } else if (strnstr(kcontrol->id.name, "RX_6",
1626 sizeof(kcontrol->id.name)) ||
1627 strnstr(kcontrol->id.name, "TX_6",
1628 sizeof(kcontrol->id.name))) {
1629 port->channel = TDM_6;
1630 } else if (strnstr(kcontrol->id.name, "RX_7",
1631 sizeof(kcontrol->id.name)) ||
1632 strnstr(kcontrol->id.name, "TX_7",
1633 sizeof(kcontrol->id.name))) {
1634 port->channel = TDM_7;
1635 } else {
1636 pr_err("%s: unsupported channel in: %s\n",
1637 __func__, kcontrol->id.name);
1638 return -EINVAL;
1639 }
1640 } else {
1641 return -EINVAL;
1642 }
1643 return 0;
1644}
1645
1646static int tdm_get_sample_rate(int value)
1647{
1648 int sample_rate = 0;
1649
1650 switch (value) {
1651 case 0:
1652 sample_rate = SAMPLING_RATE_8KHZ;
1653 break;
1654 case 1:
1655 sample_rate = SAMPLING_RATE_16KHZ;
1656 break;
1657 case 2:
1658 sample_rate = SAMPLING_RATE_32KHZ;
1659 break;
1660 case 3:
1661 sample_rate = SAMPLING_RATE_48KHZ;
1662 break;
1663 case 4:
1664 sample_rate = SAMPLING_RATE_176P4KHZ;
1665 break;
1666 case 5:
1667 sample_rate = SAMPLING_RATE_352P8KHZ;
1668 break;
1669 default:
1670 sample_rate = SAMPLING_RATE_48KHZ;
1671 break;
1672 }
1673 return sample_rate;
1674}
1675
1676static int tdm_get_sample_rate_val(int sample_rate)
1677{
1678 int sample_rate_val = 0;
1679
1680 switch (sample_rate) {
1681 case SAMPLING_RATE_8KHZ:
1682 sample_rate_val = 0;
1683 break;
1684 case SAMPLING_RATE_16KHZ:
1685 sample_rate_val = 1;
1686 break;
1687 case SAMPLING_RATE_32KHZ:
1688 sample_rate_val = 2;
1689 break;
1690 case SAMPLING_RATE_48KHZ:
1691 sample_rate_val = 3;
1692 break;
1693 case SAMPLING_RATE_176P4KHZ:
1694 sample_rate_val = 4;
1695 break;
1696 case SAMPLING_RATE_352P8KHZ:
1697 sample_rate_val = 5;
1698 break;
1699 default:
1700 sample_rate_val = 3;
1701 break;
1702 }
1703 return sample_rate_val;
1704}
1705
1706static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1707 struct snd_ctl_elem_value *ucontrol)
1708{
1709 struct tdm_port port;
1710 int ret = tdm_get_port_idx(kcontrol, &port);
1711
1712 if (ret) {
1713 pr_err("%s: unsupported control: %s\n",
1714 __func__, kcontrol->id.name);
1715 } else {
1716 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1717 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1718
1719 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1720 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1721 ucontrol->value.enumerated.item[0]);
1722 }
1723 return ret;
1724}
1725
1726static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1727 struct snd_ctl_elem_value *ucontrol)
1728{
1729 struct tdm_port port;
1730 int ret = tdm_get_port_idx(kcontrol, &port);
1731
1732 if (ret) {
1733 pr_err("%s: unsupported control: %s\n",
1734 __func__, kcontrol->id.name);
1735 } else {
1736 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1737 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1738
1739 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1740 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1741 ucontrol->value.enumerated.item[0]);
1742 }
1743 return ret;
1744}
1745
1746static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1747 struct snd_ctl_elem_value *ucontrol)
1748{
1749 struct tdm_port port;
1750 int ret = tdm_get_port_idx(kcontrol, &port);
1751
1752 if (ret) {
1753 pr_err("%s: unsupported control: %s\n",
1754 __func__, kcontrol->id.name);
1755 } else {
1756 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1757 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1758
1759 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1760 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1761 ucontrol->value.enumerated.item[0]);
1762 }
1763 return ret;
1764}
1765
1766static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1767 struct snd_ctl_elem_value *ucontrol)
1768{
1769 struct tdm_port port;
1770 int ret = tdm_get_port_idx(kcontrol, &port);
1771
1772 if (ret) {
1773 pr_err("%s: unsupported control: %s\n",
1774 __func__, kcontrol->id.name);
1775 } else {
1776 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1777 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1778
1779 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1780 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1781 ucontrol->value.enumerated.item[0]);
1782 }
1783 return ret;
1784}
1785
1786static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001787{
1788 int format = 0;
1789
1790 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001791 case 0:
1792 format = SNDRV_PCM_FORMAT_S16_LE;
1793 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001794 case 1:
1795 format = SNDRV_PCM_FORMAT_S24_LE;
1796 break;
1797 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001798 format = SNDRV_PCM_FORMAT_S32_LE;
1799 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001800 default:
1801 format = SNDRV_PCM_FORMAT_S16_LE;
1802 break;
1803 }
1804 return format;
1805}
1806
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001807static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001808{
1809 int value = 0;
1810
1811 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001812 case SNDRV_PCM_FORMAT_S16_LE:
1813 value = 0;
1814 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001815 case SNDRV_PCM_FORMAT_S24_LE:
1816 value = 1;
1817 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001818 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001819 value = 2;
1820 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001821 default:
1822 value = 0;
1823 break;
1824 }
1825 return value;
1826}
1827
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001828static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1829 struct snd_ctl_elem_value *ucontrol)
1830{
1831 struct tdm_port port;
1832 int ret = tdm_get_port_idx(kcontrol, &port);
1833
1834 if (ret) {
1835 pr_err("%s: unsupported control: %s\n",
1836 __func__, kcontrol->id.name);
1837 } else {
1838 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1839 tdm_rx_cfg[port.mode][port.channel].bit_format);
1840
1841 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1842 tdm_rx_cfg[port.mode][port.channel].bit_format,
1843 ucontrol->value.enumerated.item[0]);
1844 }
1845 return ret;
1846}
1847
1848static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1849 struct snd_ctl_elem_value *ucontrol)
1850{
1851 struct tdm_port port;
1852 int ret = tdm_get_port_idx(kcontrol, &port);
1853
1854 if (ret) {
1855 pr_err("%s: unsupported control: %s\n",
1856 __func__, kcontrol->id.name);
1857 } else {
1858 tdm_rx_cfg[port.mode][port.channel].bit_format =
1859 tdm_get_format(ucontrol->value.enumerated.item[0]);
1860
1861 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1862 tdm_rx_cfg[port.mode][port.channel].bit_format,
1863 ucontrol->value.enumerated.item[0]);
1864 }
1865 return ret;
1866}
1867
1868static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1869 struct snd_ctl_elem_value *ucontrol)
1870{
1871 struct tdm_port port;
1872 int ret = tdm_get_port_idx(kcontrol, &port);
1873
1874 if (ret) {
1875 pr_err("%s: unsupported control: %s\n",
1876 __func__, kcontrol->id.name);
1877 } else {
1878 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1879 tdm_tx_cfg[port.mode][port.channel].bit_format);
1880
1881 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1882 tdm_tx_cfg[port.mode][port.channel].bit_format,
1883 ucontrol->value.enumerated.item[0]);
1884 }
1885 return ret;
1886}
1887
1888static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1889 struct snd_ctl_elem_value *ucontrol)
1890{
1891 struct tdm_port port;
1892 int ret = tdm_get_port_idx(kcontrol, &port);
1893
1894 if (ret) {
1895 pr_err("%s: unsupported control: %s\n",
1896 __func__, kcontrol->id.name);
1897 } else {
1898 tdm_tx_cfg[port.mode][port.channel].bit_format =
1899 tdm_get_format(ucontrol->value.enumerated.item[0]);
1900
1901 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1902 tdm_tx_cfg[port.mode][port.channel].bit_format,
1903 ucontrol->value.enumerated.item[0]);
1904 }
1905 return ret;
1906}
1907
1908static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1909 struct snd_ctl_elem_value *ucontrol)
1910{
1911 struct tdm_port port;
1912 int ret = tdm_get_port_idx(kcontrol, &port);
1913
1914 if (ret) {
1915 pr_err("%s: unsupported control: %s\n",
1916 __func__, kcontrol->id.name);
1917 } else {
1918
1919 ucontrol->value.enumerated.item[0] =
1920 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1921
1922 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1923 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1924 ucontrol->value.enumerated.item[0]);
1925 }
1926 return ret;
1927}
1928
1929static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1930 struct snd_ctl_elem_value *ucontrol)
1931{
1932 struct tdm_port port;
1933 int ret = tdm_get_port_idx(kcontrol, &port);
1934
1935 if (ret) {
1936 pr_err("%s: unsupported control: %s\n",
1937 __func__, kcontrol->id.name);
1938 } else {
1939 tdm_rx_cfg[port.mode][port.channel].channels =
1940 ucontrol->value.enumerated.item[0] + 1;
1941
1942 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1943 tdm_rx_cfg[port.mode][port.channel].channels,
1944 ucontrol->value.enumerated.item[0] + 1);
1945 }
1946 return ret;
1947}
1948
1949static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1950 struct snd_ctl_elem_value *ucontrol)
1951{
1952 struct tdm_port port;
1953 int ret = tdm_get_port_idx(kcontrol, &port);
1954
1955 if (ret) {
1956 pr_err("%s: unsupported control: %s\n",
1957 __func__, kcontrol->id.name);
1958 } else {
1959 ucontrol->value.enumerated.item[0] =
1960 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1961
1962 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1963 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1964 ucontrol->value.enumerated.item[0]);
1965 }
1966 return ret;
1967}
1968
1969static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1970 struct snd_ctl_elem_value *ucontrol)
1971{
1972 struct tdm_port port;
1973 int ret = tdm_get_port_idx(kcontrol, &port);
1974
1975 if (ret) {
1976 pr_err("%s: unsupported control: %s\n",
1977 __func__, kcontrol->id.name);
1978 } else {
1979 tdm_tx_cfg[port.mode][port.channel].channels =
1980 ucontrol->value.enumerated.item[0] + 1;
1981
1982 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1983 tdm_tx_cfg[port.mode][port.channel].channels,
1984 ucontrol->value.enumerated.item[0] + 1);
1985 }
1986 return ret;
1987}
1988
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001989static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 int slot_index = 0;
1993 int interface = ucontrol->value.integer.value[0];
1994 int channel = ucontrol->value.integer.value[1];
1995 unsigned int offset_val = 0;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08001996 unsigned int max_slot_offset = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07001997 unsigned int *slot_offset = NULL;
1998 struct tdm_dev_config *config = NULL;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08001999 struct msm_asoc_mach_data *pdata = NULL;
2000 struct snd_soc_component *component = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002001
2002 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
2003 pr_err("%s: incorrect interface = %d\n", __func__, interface);
2004 return -EINVAL;
2005 }
2006 if (channel < 0 || channel >= TDM_PORT_MAX) {
2007 pr_err("%s: incorrect channel = %d\n", __func__, channel);
2008 return -EINVAL;
2009 }
2010
2011 pr_debug("%s: interface = %d, channel = %d\n", __func__,
2012 interface, channel);
2013
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002014 component = snd_soc_kcontrol_component(kcontrol);
2015 pdata = snd_soc_card_get_drvdata(component->card);
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002016 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
2017 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002018 if (!config) {
2019 pr_err("%s: tdm config is NULL\n", __func__);
2020 return -EINVAL;
2021 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002022
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002023 slot_offset = config->tdm_slot_offset;
2024 if (!slot_offset) {
2025 pr_err("%s: slot offset is NULL\n", __func__);
2026 return -EINVAL;
2027 }
2028
2029 max_slot_offset = TDM_SLOT_WIDTH_BYTES * (pdata->tdm_max_slots - 1);
2030
2031 for (slot_index = 0; slot_index < pdata->tdm_max_slots; slot_index++) {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002032 offset_val = ucontrol->value.integer.value[MAX_PATH +
2033 slot_index];
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002034 /* Offset value can only be 0, 4, 8, .. */
2035 if (offset_val % 4 == 0 && offset_val <= max_slot_offset)
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002036 slot_offset[slot_index] = offset_val;
2037 pr_debug("%s: slot offset[%d] = %d\n", __func__,
2038 slot_index, slot_offset[slot_index]);
2039 }
2040
2041 return 0;
2042}
2043
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002044static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2045{
2046 int idx = 0;
2047
2048 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2049 sizeof("PRIM_AUX_PCM"))) {
2050 idx = PRIM_AUX_PCM;
2051 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2052 sizeof("SEC_AUX_PCM"))) {
2053 idx = SEC_AUX_PCM;
2054 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2055 sizeof("TERT_AUX_PCM"))) {
2056 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002057 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2058 sizeof("QUAT_AUX_PCM"))) {
2059 idx = QUAT_AUX_PCM;
2060 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2061 sizeof("QUIN_AUX_PCM"))) {
2062 idx = QUIN_AUX_PCM;
2063 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2064 sizeof("SEN_AUX_PCM"))) {
2065 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002066 } else {
2067 pr_err("%s: unsupported port: %s\n",
2068 __func__, kcontrol->id.name);
2069 idx = -EINVAL;
2070 }
2071
2072 return idx;
2073}
2074
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002075static int aux_pcm_get_sample_rate(int value)
2076{
2077 int sample_rate = 0;
2078
2079 switch (value) {
2080 case 1:
2081 sample_rate = SAMPLING_RATE_16KHZ;
2082 break;
2083 case 0:
2084 default:
2085 sample_rate = SAMPLING_RATE_8KHZ;
2086 break;
2087 }
2088 return sample_rate;
2089}
2090
2091static int aux_pcm_get_sample_rate_val(int sample_rate)
2092{
2093 int sample_rate_val = 0;
2094
2095 switch (sample_rate) {
2096 case SAMPLING_RATE_16KHZ:
2097 sample_rate_val = 1;
2098 break;
2099 case SAMPLING_RATE_8KHZ:
2100 default:
2101 sample_rate_val = 0;
2102 break;
2103 }
2104 return sample_rate_val;
2105}
2106
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002107static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002108{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002109 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002110
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002111 switch (value) {
2112 case 0:
2113 format = SNDRV_PCM_FORMAT_S16_LE;
2114 break;
2115 case 1:
2116 format = SNDRV_PCM_FORMAT_S24_LE;
2117 break;
2118 case 2:
2119 format = SNDRV_PCM_FORMAT_S24_3LE;
2120 break;
2121 case 3:
2122 format = SNDRV_PCM_FORMAT_S32_LE;
2123 break;
2124 default:
2125 format = SNDRV_PCM_FORMAT_S16_LE;
2126 break;
2127 }
2128 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002129}
2130
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002131static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002132{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002133 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002134
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002135 switch (format) {
2136 case SNDRV_PCM_FORMAT_S16_LE:
2137 value = 0;
2138 break;
2139 case SNDRV_PCM_FORMAT_S24_LE:
2140 value = 1;
2141 break;
2142 case SNDRV_PCM_FORMAT_S24_3LE:
2143 value = 2;
2144 break;
2145 case SNDRV_PCM_FORMAT_S32_LE:
2146 value = 3;
2147 break;
2148 default:
2149 value = 0;
2150 break;
2151 }
2152 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002153}
2154
2155static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2156 struct snd_ctl_elem_value *ucontrol)
2157{
2158 int idx = aux_pcm_get_port_idx(kcontrol);
2159
2160 if (idx < 0)
2161 return idx;
2162
2163 ucontrol->value.enumerated.item[0] =
2164 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2165
2166 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2167 idx, aux_pcm_rx_cfg[idx].sample_rate,
2168 ucontrol->value.enumerated.item[0]);
2169
2170 return 0;
2171}
2172
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002173static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002174 struct snd_ctl_elem_value *ucontrol)
2175{
2176 int idx = aux_pcm_get_port_idx(kcontrol);
2177
2178 if (idx < 0)
2179 return idx;
2180
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002181 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002182 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2183
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002184 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2185 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002186 ucontrol->value.enumerated.item[0]);
2187
2188 return 0;
2189}
2190
2191static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2192 struct snd_ctl_elem_value *ucontrol)
2193{
2194 int idx = aux_pcm_get_port_idx(kcontrol);
2195
2196 if (idx < 0)
2197 return idx;
2198
2199 ucontrol->value.enumerated.item[0] =
2200 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2201
2202 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2203 idx, aux_pcm_tx_cfg[idx].sample_rate,
2204 ucontrol->value.enumerated.item[0]);
2205
2206 return 0;
2207}
2208
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002209static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2210 struct snd_ctl_elem_value *ucontrol)
2211{
2212 int idx = aux_pcm_get_port_idx(kcontrol);
2213
2214 if (idx < 0)
2215 return idx;
2216
2217 aux_pcm_tx_cfg[idx].sample_rate =
2218 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2219
2220 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2221 idx, aux_pcm_tx_cfg[idx].sample_rate,
2222 ucontrol->value.enumerated.item[0]);
2223
2224 return 0;
2225}
2226
2227static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2228 struct snd_ctl_elem_value *ucontrol)
2229{
2230 int idx = aux_pcm_get_port_idx(kcontrol);
2231
2232 if (idx < 0)
2233 return idx;
2234
2235 ucontrol->value.enumerated.item[0] =
2236 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2237
2238 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2239 idx, aux_pcm_rx_cfg[idx].bit_format,
2240 ucontrol->value.enumerated.item[0]);
2241
2242 return 0;
2243}
2244
2245static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2246 struct snd_ctl_elem_value *ucontrol)
2247{
2248 int idx = aux_pcm_get_port_idx(kcontrol);
2249
2250 if (idx < 0)
2251 return idx;
2252
2253 aux_pcm_rx_cfg[idx].bit_format =
2254 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2255
2256 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2257 idx, aux_pcm_rx_cfg[idx].bit_format,
2258 ucontrol->value.enumerated.item[0]);
2259
2260 return 0;
2261}
2262
2263static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2264 struct snd_ctl_elem_value *ucontrol)
2265{
2266 int idx = aux_pcm_get_port_idx(kcontrol);
2267
2268 if (idx < 0)
2269 return idx;
2270
2271 ucontrol->value.enumerated.item[0] =
2272 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2273
2274 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2275 idx, aux_pcm_tx_cfg[idx].bit_format,
2276 ucontrol->value.enumerated.item[0]);
2277
2278 return 0;
2279}
2280
2281static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2282 struct snd_ctl_elem_value *ucontrol)
2283{
2284 int idx = aux_pcm_get_port_idx(kcontrol);
2285
2286 if (idx < 0)
2287 return idx;
2288
2289 aux_pcm_tx_cfg[idx].bit_format =
2290 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2291
2292 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2293 idx, aux_pcm_tx_cfg[idx].bit_format,
2294 ucontrol->value.enumerated.item[0]);
2295
2296 return 0;
2297}
2298
2299static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2300{
2301 int idx = 0;
2302
2303 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2304 sizeof("PRIM_MI2S_RX"))) {
2305 idx = PRIM_MI2S;
2306 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2307 sizeof("SEC_MI2S_RX"))) {
2308 idx = SEC_MI2S;
2309 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2310 sizeof("TERT_MI2S_RX"))) {
2311 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002312 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2313 sizeof("QUAT_MI2S_RX"))) {
2314 idx = QUAT_MI2S;
2315 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2316 sizeof("QUIN_MI2S_RX"))) {
2317 idx = QUIN_MI2S;
2318 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2319 sizeof("SEN_MI2S_RX"))) {
2320 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002321 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2322 sizeof("PRIM_MI2S_TX"))) {
2323 idx = PRIM_MI2S;
2324 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2325 sizeof("SEC_MI2S_TX"))) {
2326 idx = SEC_MI2S;
2327 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2328 sizeof("TERT_MI2S_TX"))) {
2329 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002330 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2331 sizeof("QUAT_MI2S_TX"))) {
2332 idx = QUAT_MI2S;
2333 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2334 sizeof("QUIN_MI2S_TX"))) {
2335 idx = QUIN_MI2S;
2336 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2337 sizeof("SEN_MI2S_TX"))) {
2338 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002339 } else {
2340 pr_err("%s: unsupported channel: %s\n",
2341 __func__, kcontrol->id.name);
2342 idx = -EINVAL;
2343 }
2344
2345 return idx;
2346}
2347
2348static int mi2s_get_sample_rate(int value)
2349{
2350 int sample_rate = 0;
2351
2352 switch (value) {
2353 case 0:
2354 sample_rate = SAMPLING_RATE_8KHZ;
2355 break;
2356 case 1:
2357 sample_rate = SAMPLING_RATE_11P025KHZ;
2358 break;
2359 case 2:
2360 sample_rate = SAMPLING_RATE_16KHZ;
2361 break;
2362 case 3:
2363 sample_rate = SAMPLING_RATE_22P05KHZ;
2364 break;
2365 case 4:
2366 sample_rate = SAMPLING_RATE_32KHZ;
2367 break;
2368 case 5:
2369 sample_rate = SAMPLING_RATE_44P1KHZ;
2370 break;
2371 case 6:
2372 sample_rate = SAMPLING_RATE_48KHZ;
2373 break;
2374 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002375 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002376 break;
2377 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002378 sample_rate = SAMPLING_RATE_96KHZ;
2379 break;
2380 case 9:
2381 sample_rate = SAMPLING_RATE_176P4KHZ;
2382 break;
2383 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002384 sample_rate = SAMPLING_RATE_192KHZ;
2385 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002386 case 11:
2387 sample_rate = SAMPLING_RATE_352P8KHZ;
2388 break;
2389 case 12:
2390 sample_rate = SAMPLING_RATE_384KHZ;
2391 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002392 default:
2393 sample_rate = SAMPLING_RATE_48KHZ;
2394 break;
2395 }
2396 return sample_rate;
2397}
2398
2399static int mi2s_get_sample_rate_val(int sample_rate)
2400{
2401 int sample_rate_val = 0;
2402
2403 switch (sample_rate) {
2404 case SAMPLING_RATE_8KHZ:
2405 sample_rate_val = 0;
2406 break;
2407 case SAMPLING_RATE_11P025KHZ:
2408 sample_rate_val = 1;
2409 break;
2410 case SAMPLING_RATE_16KHZ:
2411 sample_rate_val = 2;
2412 break;
2413 case SAMPLING_RATE_22P05KHZ:
2414 sample_rate_val = 3;
2415 break;
2416 case SAMPLING_RATE_32KHZ:
2417 sample_rate_val = 4;
2418 break;
2419 case SAMPLING_RATE_44P1KHZ:
2420 sample_rate_val = 5;
2421 break;
2422 case SAMPLING_RATE_48KHZ:
2423 sample_rate_val = 6;
2424 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002425 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002426 sample_rate_val = 7;
2427 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002428 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002429 sample_rate_val = 8;
2430 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002431 case SAMPLING_RATE_176P4KHZ:
2432 sample_rate_val = 9;
2433 break;
2434 case SAMPLING_RATE_192KHZ:
2435 sample_rate_val = 10;
2436 break;
2437 case SAMPLING_RATE_352P8KHZ:
2438 sample_rate_val = 11;
2439 break;
2440 case SAMPLING_RATE_384KHZ:
2441 sample_rate_val = 12;
2442 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002443 default:
2444 sample_rate_val = 6;
2445 break;
2446 }
2447 return sample_rate_val;
2448}
2449
2450static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2451 struct snd_ctl_elem_value *ucontrol)
2452{
2453 int idx = mi2s_get_port_idx(kcontrol);
2454
2455 if (idx < 0)
2456 return idx;
2457
2458 ucontrol->value.enumerated.item[0] =
2459 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2460
2461 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2462 idx, mi2s_rx_cfg[idx].sample_rate,
2463 ucontrol->value.enumerated.item[0]);
2464
2465 return 0;
2466}
2467
2468static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2469 struct snd_ctl_elem_value *ucontrol)
2470{
2471 int idx = mi2s_get_port_idx(kcontrol);
2472
2473 if (idx < 0)
2474 return idx;
2475
2476 mi2s_rx_cfg[idx].sample_rate =
2477 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2478
2479 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2480 idx, mi2s_rx_cfg[idx].sample_rate,
2481 ucontrol->value.enumerated.item[0]);
2482
2483 return 0;
2484}
2485
2486static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2487 struct snd_ctl_elem_value *ucontrol)
2488{
2489 int idx = mi2s_get_port_idx(kcontrol);
2490
2491 if (idx < 0)
2492 return idx;
2493
2494 ucontrol->value.enumerated.item[0] =
2495 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2496
2497 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2498 idx, mi2s_tx_cfg[idx].sample_rate,
2499 ucontrol->value.enumerated.item[0]);
2500
2501 return 0;
2502}
2503
2504static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2505 struct snd_ctl_elem_value *ucontrol)
2506{
2507 int idx = mi2s_get_port_idx(kcontrol);
2508
2509 if (idx < 0)
2510 return idx;
2511
2512 mi2s_tx_cfg[idx].sample_rate =
2513 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2514
2515 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2516 idx, mi2s_tx_cfg[idx].sample_rate,
2517 ucontrol->value.enumerated.item[0]);
2518
2519 return 0;
2520}
2521
2522static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2523 struct snd_ctl_elem_value *ucontrol)
2524{
2525 int idx = mi2s_get_port_idx(kcontrol);
2526
2527 if (idx < 0)
2528 return idx;
2529
2530 ucontrol->value.enumerated.item[0] =
2531 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2532
2533 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2534 idx, mi2s_rx_cfg[idx].bit_format,
2535 ucontrol->value.enumerated.item[0]);
2536
2537 return 0;
2538}
2539
2540static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2541 struct snd_ctl_elem_value *ucontrol)
2542{
2543 int idx = mi2s_get_port_idx(kcontrol);
2544
2545 if (idx < 0)
2546 return idx;
2547
2548 mi2s_rx_cfg[idx].bit_format =
2549 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2550
2551 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2552 idx, mi2s_rx_cfg[idx].bit_format,
2553 ucontrol->value.enumerated.item[0]);
2554
2555 return 0;
2556}
2557
2558static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2559 struct snd_ctl_elem_value *ucontrol)
2560{
2561 int idx = mi2s_get_port_idx(kcontrol);
2562
2563 if (idx < 0)
2564 return idx;
2565
2566 ucontrol->value.enumerated.item[0] =
2567 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2568
2569 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2570 idx, mi2s_tx_cfg[idx].bit_format,
2571 ucontrol->value.enumerated.item[0]);
2572
2573 return 0;
2574}
2575
2576static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2577 struct snd_ctl_elem_value *ucontrol)
2578{
2579 int idx = mi2s_get_port_idx(kcontrol);
2580
2581 if (idx < 0)
2582 return idx;
2583
2584 mi2s_tx_cfg[idx].bit_format =
2585 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2586
2587 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2588 idx, mi2s_tx_cfg[idx].bit_format,
2589 ucontrol->value.enumerated.item[0]);
2590
2591 return 0;
2592}
2593static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2594 struct snd_ctl_elem_value *ucontrol)
2595{
2596 int idx = mi2s_get_port_idx(kcontrol);
2597
2598 if (idx < 0)
2599 return idx;
2600
2601 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2602 idx, mi2s_rx_cfg[idx].channels);
2603 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2604
2605 return 0;
2606}
2607
2608static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2609 struct snd_ctl_elem_value *ucontrol)
2610{
2611 int idx = mi2s_get_port_idx(kcontrol);
2612
2613 if (idx < 0)
2614 return idx;
2615
2616 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2617 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2618 idx, mi2s_rx_cfg[idx].channels);
2619
2620 return 1;
2621}
2622
2623static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2624 struct snd_ctl_elem_value *ucontrol)
2625{
2626 int idx = mi2s_get_port_idx(kcontrol);
2627
2628 if (idx < 0)
2629 return idx;
2630
2631 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2632 idx, mi2s_tx_cfg[idx].channels);
2633 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2634
2635 return 0;
2636}
2637
2638static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2639 struct snd_ctl_elem_value *ucontrol)
2640{
2641 int idx = mi2s_get_port_idx(kcontrol);
2642
2643 if (idx < 0)
2644 return idx;
2645
2646 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2647 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2648 idx, mi2s_tx_cfg[idx].channels);
2649
2650 return 1;
2651}
2652
2653static int msm_get_port_id(int be_id)
2654{
2655 int afe_port_id = 0;
2656
2657 switch (be_id) {
2658 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2659 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2660 break;
2661 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2662 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2663 break;
2664 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2665 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2666 break;
2667 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2668 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2669 break;
2670 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2671 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2672 break;
2673 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2674 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2675 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002676 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2677 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2678 break;
2679 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2680 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2681 break;
2682 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2683 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2684 break;
2685 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2686 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2687 break;
2688 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2689 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2690 break;
2691 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2692 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2693 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07002694 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2695 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2696 break;
2697 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2698 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2699 break;
2700 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2701 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2702 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002703 default:
2704 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2705 afe_port_id = -EINVAL;
2706 }
2707
2708 return afe_port_id;
2709}
2710
2711static u32 get_mi2s_bits_per_sample(u32 bit_format)
2712{
2713 u32 bit_per_sample = 0;
2714
2715 switch (bit_format) {
2716 case SNDRV_PCM_FORMAT_S32_LE:
2717 case SNDRV_PCM_FORMAT_S24_3LE:
2718 case SNDRV_PCM_FORMAT_S24_LE:
2719 bit_per_sample = 32;
2720 break;
2721 case SNDRV_PCM_FORMAT_S16_LE:
2722 default:
2723 bit_per_sample = 16;
2724 break;
2725 }
2726
2727 return bit_per_sample;
2728}
2729
2730static void update_mi2s_clk_val(int dai_id, int stream)
2731{
2732 u32 bit_per_sample = 0;
2733
2734 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2735 bit_per_sample =
2736 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2737 mi2s_clk[dai_id].clk_freq_in_hz =
2738 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2739 } else {
2740 bit_per_sample =
2741 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2742 mi2s_clk[dai_id].clk_freq_in_hz =
2743 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2744 }
2745}
2746
2747static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2748{
2749 int ret = 0;
2750 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2751 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2752 int port_id = 0;
2753 int index = cpu_dai->id;
2754
2755 port_id = msm_get_port_id(rtd->dai_link->id);
2756 if (port_id < 0) {
2757 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2758 ret = port_id;
2759 goto err;
2760 }
2761
2762 if (enable) {
2763 update_mi2s_clk_val(index, substream->stream);
2764 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2765 mi2s_clk[index].clk_freq_in_hz);
2766 }
2767
2768 mi2s_clk[index].enable = enable;
2769 ret = afe_set_lpass_clock_v2(port_id,
2770 &mi2s_clk[index]);
2771 if (ret < 0) {
2772 dev_err(rtd->card->dev,
2773 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2774 __func__, port_id, ret);
2775 goto err;
2776 }
2777
2778err:
2779 return ret;
2780}
2781
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002782static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2783{
2784 int idx = 0;
2785
2786 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2787 sizeof("WSA_CDC_DMA_RX_0")))
2788 idx = WSA_CDC_DMA_RX_0;
2789 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2790 sizeof("WSA_CDC_DMA_RX_0")))
2791 idx = WSA_CDC_DMA_RX_1;
2792 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2793 sizeof("RX_CDC_DMA_RX_0")))
2794 idx = RX_CDC_DMA_RX_0;
2795 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2796 sizeof("RX_CDC_DMA_RX_1")))
2797 idx = RX_CDC_DMA_RX_1;
2798 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2799 sizeof("RX_CDC_DMA_RX_2")))
2800 idx = RX_CDC_DMA_RX_2;
2801 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2802 sizeof("RX_CDC_DMA_RX_3")))
2803 idx = RX_CDC_DMA_RX_3;
2804 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2805 sizeof("RX_CDC_DMA_RX_5")))
2806 idx = RX_CDC_DMA_RX_5;
2807 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2808 sizeof("WSA_CDC_DMA_TX_0")))
2809 idx = WSA_CDC_DMA_TX_0;
2810 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2811 sizeof("WSA_CDC_DMA_TX_1")))
2812 idx = WSA_CDC_DMA_TX_1;
2813 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2814 sizeof("WSA_CDC_DMA_TX_2")))
2815 idx = WSA_CDC_DMA_TX_2;
2816 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2817 sizeof("TX_CDC_DMA_TX_0")))
2818 idx = TX_CDC_DMA_TX_0;
2819 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2820 sizeof("TX_CDC_DMA_TX_3")))
2821 idx = TX_CDC_DMA_TX_3;
2822 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2823 sizeof("TX_CDC_DMA_TX_4")))
2824 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08002825 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2826 sizeof("VA_CDC_DMA_TX_0")))
2827 idx = VA_CDC_DMA_TX_0;
2828 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2829 sizeof("VA_CDC_DMA_TX_1")))
2830 idx = VA_CDC_DMA_TX_1;
2831 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2832 sizeof("VA_CDC_DMA_TX_2")))
2833 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002834 else {
2835 pr_err("%s: unsupported channel: %s\n",
2836 __func__, kcontrol->id.name);
2837 return -EINVAL;
2838 }
2839
2840 return idx;
2841}
2842
2843static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2844 struct snd_ctl_elem_value *ucontrol)
2845{
2846 int ch_num = cdc_dma_get_port_idx(kcontrol);
2847
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002848 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002849 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2850 return ch_num;
2851 }
2852
2853 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2854 cdc_dma_rx_cfg[ch_num].channels - 1);
2855 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2856 return 0;
2857}
2858
2859static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2860 struct snd_ctl_elem_value *ucontrol)
2861{
2862 int ch_num = cdc_dma_get_port_idx(kcontrol);
2863
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002864 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002865 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2866 return ch_num;
2867 }
2868
2869 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2870
2871 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2872 cdc_dma_rx_cfg[ch_num].channels);
2873 return 1;
2874}
2875
2876static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2877 struct snd_ctl_elem_value *ucontrol)
2878{
2879 int ch_num = cdc_dma_get_port_idx(kcontrol);
2880
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002881 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002882 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2883 return ch_num;
2884 }
2885
2886 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2887 case SNDRV_PCM_FORMAT_S32_LE:
2888 ucontrol->value.integer.value[0] = 3;
2889 break;
2890 case SNDRV_PCM_FORMAT_S24_3LE:
2891 ucontrol->value.integer.value[0] = 2;
2892 break;
2893 case SNDRV_PCM_FORMAT_S24_LE:
2894 ucontrol->value.integer.value[0] = 1;
2895 break;
2896 case SNDRV_PCM_FORMAT_S16_LE:
2897 default:
2898 ucontrol->value.integer.value[0] = 0;
2899 break;
2900 }
2901
2902 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2903 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2904 ucontrol->value.integer.value[0]);
2905 return 0;
2906}
2907
2908static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2909 struct snd_ctl_elem_value *ucontrol)
2910{
2911 int rc = 0;
2912 int ch_num = cdc_dma_get_port_idx(kcontrol);
2913
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002914 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002915 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2916 return ch_num;
2917 }
2918
2919 switch (ucontrol->value.integer.value[0]) {
2920 case 3:
2921 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2922 break;
2923 case 2:
2924 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2925 break;
2926 case 1:
2927 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2928 break;
2929 case 0:
2930 default:
2931 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2932 break;
2933 }
2934 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2935 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2936 ucontrol->value.integer.value[0]);
2937
2938 return rc;
2939}
2940
2941
2942static int cdc_dma_get_sample_rate_val(int sample_rate)
2943{
2944 int sample_rate_val = 0;
2945
2946 switch (sample_rate) {
2947 case SAMPLING_RATE_8KHZ:
2948 sample_rate_val = 0;
2949 break;
2950 case SAMPLING_RATE_11P025KHZ:
2951 sample_rate_val = 1;
2952 break;
2953 case SAMPLING_RATE_16KHZ:
2954 sample_rate_val = 2;
2955 break;
2956 case SAMPLING_RATE_22P05KHZ:
2957 sample_rate_val = 3;
2958 break;
2959 case SAMPLING_RATE_32KHZ:
2960 sample_rate_val = 4;
2961 break;
2962 case SAMPLING_RATE_44P1KHZ:
2963 sample_rate_val = 5;
2964 break;
2965 case SAMPLING_RATE_48KHZ:
2966 sample_rate_val = 6;
2967 break;
2968 case SAMPLING_RATE_88P2KHZ:
2969 sample_rate_val = 7;
2970 break;
2971 case SAMPLING_RATE_96KHZ:
2972 sample_rate_val = 8;
2973 break;
2974 case SAMPLING_RATE_176P4KHZ:
2975 sample_rate_val = 9;
2976 break;
2977 case SAMPLING_RATE_192KHZ:
2978 sample_rate_val = 10;
2979 break;
2980 case SAMPLING_RATE_352P8KHZ:
2981 sample_rate_val = 11;
2982 break;
2983 case SAMPLING_RATE_384KHZ:
2984 sample_rate_val = 12;
2985 break;
2986 default:
2987 sample_rate_val = 6;
2988 break;
2989 }
2990 return sample_rate_val;
2991}
2992
2993static int cdc_dma_get_sample_rate(int value)
2994{
2995 int sample_rate = 0;
2996
2997 switch (value) {
2998 case 0:
2999 sample_rate = SAMPLING_RATE_8KHZ;
3000 break;
3001 case 1:
3002 sample_rate = SAMPLING_RATE_11P025KHZ;
3003 break;
3004 case 2:
3005 sample_rate = SAMPLING_RATE_16KHZ;
3006 break;
3007 case 3:
3008 sample_rate = SAMPLING_RATE_22P05KHZ;
3009 break;
3010 case 4:
3011 sample_rate = SAMPLING_RATE_32KHZ;
3012 break;
3013 case 5:
3014 sample_rate = SAMPLING_RATE_44P1KHZ;
3015 break;
3016 case 6:
3017 sample_rate = SAMPLING_RATE_48KHZ;
3018 break;
3019 case 7:
3020 sample_rate = SAMPLING_RATE_88P2KHZ;
3021 break;
3022 case 8:
3023 sample_rate = SAMPLING_RATE_96KHZ;
3024 break;
3025 case 9:
3026 sample_rate = SAMPLING_RATE_176P4KHZ;
3027 break;
3028 case 10:
3029 sample_rate = SAMPLING_RATE_192KHZ;
3030 break;
3031 case 11:
3032 sample_rate = SAMPLING_RATE_352P8KHZ;
3033 break;
3034 case 12:
3035 sample_rate = SAMPLING_RATE_384KHZ;
3036 break;
3037 default:
3038 sample_rate = SAMPLING_RATE_48KHZ;
3039 break;
3040 }
3041 return sample_rate;
3042}
3043
3044static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3045 struct snd_ctl_elem_value *ucontrol)
3046{
3047 int ch_num = cdc_dma_get_port_idx(kcontrol);
3048
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003049 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003050 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3051 return ch_num;
3052 }
3053
3054 ucontrol->value.enumerated.item[0] =
3055 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3056
3057 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3058 cdc_dma_rx_cfg[ch_num].sample_rate);
3059 return 0;
3060}
3061
3062static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3063 struct snd_ctl_elem_value *ucontrol)
3064{
3065 int ch_num = cdc_dma_get_port_idx(kcontrol);
3066
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003067 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003068 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3069 return ch_num;
3070 }
3071
3072 cdc_dma_rx_cfg[ch_num].sample_rate =
3073 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3074
3075
3076 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3077 __func__, ucontrol->value.enumerated.item[0],
3078 cdc_dma_rx_cfg[ch_num].sample_rate);
3079 return 0;
3080}
3081
3082static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3083 struct snd_ctl_elem_value *ucontrol)
3084{
3085 int ch_num = cdc_dma_get_port_idx(kcontrol);
3086
3087 if (ch_num < 0) {
3088 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3089 return ch_num;
3090 }
3091
3092 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3093 cdc_dma_tx_cfg[ch_num].channels);
3094 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3095 return 0;
3096}
3097
3098static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3099 struct snd_ctl_elem_value *ucontrol)
3100{
3101 int ch_num = cdc_dma_get_port_idx(kcontrol);
3102
3103 if (ch_num < 0) {
3104 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3105 return ch_num;
3106 }
3107
3108 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3109
3110 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3111 cdc_dma_tx_cfg[ch_num].channels);
3112 return 1;
3113}
3114
3115static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3116 struct snd_ctl_elem_value *ucontrol)
3117{
3118 int sample_rate_val;
3119 int ch_num = cdc_dma_get_port_idx(kcontrol);
3120
3121 if (ch_num < 0) {
3122 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3123 return ch_num;
3124 }
3125
3126 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3127 case SAMPLING_RATE_384KHZ:
3128 sample_rate_val = 12;
3129 break;
3130 case SAMPLING_RATE_352P8KHZ:
3131 sample_rate_val = 11;
3132 break;
3133 case SAMPLING_RATE_192KHZ:
3134 sample_rate_val = 10;
3135 break;
3136 case SAMPLING_RATE_176P4KHZ:
3137 sample_rate_val = 9;
3138 break;
3139 case SAMPLING_RATE_96KHZ:
3140 sample_rate_val = 8;
3141 break;
3142 case SAMPLING_RATE_88P2KHZ:
3143 sample_rate_val = 7;
3144 break;
3145 case SAMPLING_RATE_48KHZ:
3146 sample_rate_val = 6;
3147 break;
3148 case SAMPLING_RATE_44P1KHZ:
3149 sample_rate_val = 5;
3150 break;
3151 case SAMPLING_RATE_32KHZ:
3152 sample_rate_val = 4;
3153 break;
3154 case SAMPLING_RATE_22P05KHZ:
3155 sample_rate_val = 3;
3156 break;
3157 case SAMPLING_RATE_16KHZ:
3158 sample_rate_val = 2;
3159 break;
3160 case SAMPLING_RATE_11P025KHZ:
3161 sample_rate_val = 1;
3162 break;
3163 case SAMPLING_RATE_8KHZ:
3164 sample_rate_val = 0;
3165 break;
3166 default:
3167 sample_rate_val = 6;
3168 break;
3169 }
3170
3171 ucontrol->value.integer.value[0] = sample_rate_val;
3172 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3173 cdc_dma_tx_cfg[ch_num].sample_rate);
3174 return 0;
3175}
3176
3177static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3178 struct snd_ctl_elem_value *ucontrol)
3179{
3180 int ch_num = cdc_dma_get_port_idx(kcontrol);
3181
3182 if (ch_num < 0) {
3183 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3184 return ch_num;
3185 }
3186
3187 switch (ucontrol->value.integer.value[0]) {
3188 case 12:
3189 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3190 break;
3191 case 11:
3192 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3193 break;
3194 case 10:
3195 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3196 break;
3197 case 9:
3198 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3199 break;
3200 case 8:
3201 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3202 break;
3203 case 7:
3204 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3205 break;
3206 case 6:
3207 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3208 break;
3209 case 5:
3210 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3211 break;
3212 case 4:
3213 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3214 break;
3215 case 3:
3216 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3217 break;
3218 case 2:
3219 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3220 break;
3221 case 1:
3222 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3223 break;
3224 case 0:
3225 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3226 break;
3227 default:
3228 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3229 break;
3230 }
3231
3232 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3233 __func__, ucontrol->value.integer.value[0],
3234 cdc_dma_tx_cfg[ch_num].sample_rate);
3235 return 0;
3236}
3237
3238static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3239 struct snd_ctl_elem_value *ucontrol)
3240{
3241 int ch_num = cdc_dma_get_port_idx(kcontrol);
3242
3243 if (ch_num < 0) {
3244 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3245 return ch_num;
3246 }
3247
3248 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3249 case SNDRV_PCM_FORMAT_S32_LE:
3250 ucontrol->value.integer.value[0] = 3;
3251 break;
3252 case SNDRV_PCM_FORMAT_S24_3LE:
3253 ucontrol->value.integer.value[0] = 2;
3254 break;
3255 case SNDRV_PCM_FORMAT_S24_LE:
3256 ucontrol->value.integer.value[0] = 1;
3257 break;
3258 case SNDRV_PCM_FORMAT_S16_LE:
3259 default:
3260 ucontrol->value.integer.value[0] = 0;
3261 break;
3262 }
3263
3264 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3265 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3266 ucontrol->value.integer.value[0]);
3267 return 0;
3268}
3269
3270static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3271 struct snd_ctl_elem_value *ucontrol)
3272{
3273 int rc = 0;
3274 int ch_num = cdc_dma_get_port_idx(kcontrol);
3275
3276 if (ch_num < 0) {
3277 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3278 return ch_num;
3279 }
3280
3281 switch (ucontrol->value.integer.value[0]) {
3282 case 3:
3283 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3284 break;
3285 case 2:
3286 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3287 break;
3288 case 1:
3289 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3290 break;
3291 case 0:
3292 default:
3293 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3294 break;
3295 }
3296 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3297 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3298 ucontrol->value.integer.value[0]);
3299
3300 return rc;
3301}
3302
3303static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3304{
3305 int idx = 0;
3306
3307 switch (be_id) {
3308 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3309 idx = WSA_CDC_DMA_RX_0;
3310 break;
3311 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3312 idx = WSA_CDC_DMA_TX_0;
3313 break;
3314 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3315 idx = WSA_CDC_DMA_RX_1;
3316 break;
3317 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3318 idx = WSA_CDC_DMA_TX_1;
3319 break;
3320 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3321 idx = WSA_CDC_DMA_TX_2;
3322 break;
3323 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3324 idx = RX_CDC_DMA_RX_0;
3325 break;
3326 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3327 idx = RX_CDC_DMA_RX_1;
3328 break;
3329 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3330 idx = RX_CDC_DMA_RX_2;
3331 break;
3332 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3333 idx = RX_CDC_DMA_RX_3;
3334 break;
3335 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3336 idx = RX_CDC_DMA_RX_5;
3337 break;
3338 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3339 idx = TX_CDC_DMA_TX_0;
3340 break;
3341 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3342 idx = TX_CDC_DMA_TX_3;
3343 break;
3344 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3345 idx = TX_CDC_DMA_TX_4;
3346 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003347 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3348 idx = VA_CDC_DMA_TX_0;
3349 break;
3350 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3351 idx = VA_CDC_DMA_TX_1;
3352 break;
3353 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3354 idx = VA_CDC_DMA_TX_2;
3355 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003356 default:
3357 idx = RX_CDC_DMA_RX_0;
3358 break;
3359 }
3360
3361 return idx;
3362}
3363
Banajit Goswami83a370d2019-03-05 16:15:21 -08003364static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3365 struct snd_ctl_elem_value *ucontrol)
3366{
3367 /*
3368 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3369 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3370 * value.
3371 */
3372 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3373 case SAMPLING_RATE_96KHZ:
3374 ucontrol->value.integer.value[0] = 5;
3375 break;
3376 case SAMPLING_RATE_88P2KHZ:
3377 ucontrol->value.integer.value[0] = 4;
3378 break;
3379 case SAMPLING_RATE_48KHZ:
3380 ucontrol->value.integer.value[0] = 3;
3381 break;
3382 case SAMPLING_RATE_44P1KHZ:
3383 ucontrol->value.integer.value[0] = 2;
3384 break;
3385 case SAMPLING_RATE_16KHZ:
3386 ucontrol->value.integer.value[0] = 1;
3387 break;
3388 case SAMPLING_RATE_8KHZ:
3389 default:
3390 ucontrol->value.integer.value[0] = 0;
3391 break;
3392 }
3393 pr_debug("%s: sample rate = %d\n", __func__,
3394 slim_rx_cfg[SLIM_RX_7].sample_rate);
3395
3396 return 0;
3397}
3398
3399static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3400 struct snd_ctl_elem_value *ucontrol)
3401{
3402 switch (ucontrol->value.integer.value[0]) {
3403 case 1:
3404 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3405 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3406 break;
3407 case 2:
3408 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3409 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3410 break;
3411 case 3:
3412 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3413 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3414 break;
3415 case 4:
3416 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3417 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3418 break;
3419 case 5:
3420 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3421 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3422 break;
3423 case 0:
3424 default:
3425 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3426 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3427 break;
3428 }
3429 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3430 __func__,
3431 slim_rx_cfg[SLIM_RX_7].sample_rate,
3432 slim_tx_cfg[SLIM_TX_7].sample_rate,
3433 ucontrol->value.enumerated.item[0]);
3434
3435 return 0;
3436}
3437
3438static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3439 struct snd_ctl_elem_value *ucontrol)
3440{
3441 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3442 case SAMPLING_RATE_96KHZ:
3443 ucontrol->value.integer.value[0] = 5;
3444 break;
3445 case SAMPLING_RATE_88P2KHZ:
3446 ucontrol->value.integer.value[0] = 4;
3447 break;
3448 case SAMPLING_RATE_48KHZ:
3449 ucontrol->value.integer.value[0] = 3;
3450 break;
3451 case SAMPLING_RATE_44P1KHZ:
3452 ucontrol->value.integer.value[0] = 2;
3453 break;
3454 case SAMPLING_RATE_16KHZ:
3455 ucontrol->value.integer.value[0] = 1;
3456 break;
3457 case SAMPLING_RATE_8KHZ:
3458 default:
3459 ucontrol->value.integer.value[0] = 0;
3460 break;
3461 }
3462 pr_debug("%s: sample rate rx = %d\n", __func__,
3463 slim_rx_cfg[SLIM_RX_7].sample_rate);
3464
3465 return 0;
3466}
3467
3468static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3469 struct snd_ctl_elem_value *ucontrol)
3470{
3471 switch (ucontrol->value.integer.value[0]) {
3472 case 1:
3473 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3474 break;
3475 case 2:
3476 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3477 break;
3478 case 3:
3479 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3480 break;
3481 case 4:
3482 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3483 break;
3484 case 5:
3485 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3486 break;
3487 case 0:
3488 default:
3489 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3490 break;
3491 }
3492 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3493 __func__,
3494 slim_rx_cfg[SLIM_RX_7].sample_rate,
3495 ucontrol->value.enumerated.item[0]);
3496
3497 return 0;
3498}
3499
3500static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3501 struct snd_ctl_elem_value *ucontrol)
3502{
3503 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3504 case SAMPLING_RATE_96KHZ:
3505 ucontrol->value.integer.value[0] = 5;
3506 break;
3507 case SAMPLING_RATE_88P2KHZ:
3508 ucontrol->value.integer.value[0] = 4;
3509 break;
3510 case SAMPLING_RATE_48KHZ:
3511 ucontrol->value.integer.value[0] = 3;
3512 break;
3513 case SAMPLING_RATE_44P1KHZ:
3514 ucontrol->value.integer.value[0] = 2;
3515 break;
3516 case SAMPLING_RATE_16KHZ:
3517 ucontrol->value.integer.value[0] = 1;
3518 break;
3519 case SAMPLING_RATE_8KHZ:
3520 default:
3521 ucontrol->value.integer.value[0] = 0;
3522 break;
3523 }
3524 pr_debug("%s: sample rate tx = %d\n", __func__,
3525 slim_tx_cfg[SLIM_TX_7].sample_rate);
3526
3527 return 0;
3528}
3529
3530static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3531 struct snd_ctl_elem_value *ucontrol)
3532{
3533 switch (ucontrol->value.integer.value[0]) {
3534 case 1:
3535 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3536 break;
3537 case 2:
3538 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3539 break;
3540 case 3:
3541 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3542 break;
3543 case 4:
3544 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3545 break;
3546 case 5:
3547 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3548 break;
3549 case 0:
3550 default:
3551 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3552 break;
3553 }
3554 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3555 __func__,
3556 slim_tx_cfg[SLIM_TX_7].sample_rate,
3557 ucontrol->value.enumerated.item[0]);
3558
3559 return 0;
3560}
3561
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003562static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3563 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3564 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3565 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3566 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3567 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3568 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3569 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3570 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3571 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3572 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3573 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3574 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3575 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3576 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3577 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3578 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3579 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3580 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3581 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3582 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3583 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3584 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3585 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3586 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3587 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3588 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003589 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3590 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3591 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3592 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3593 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3594 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003595 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3596 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3597 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3598 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003599 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3600 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3601 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3602 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3603 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3604 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3605 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3606 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3607 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3608 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003609 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3610 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3611 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3612 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3613 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3614 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003615 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3616 wsa_cdc_dma_rx_0_sample_rate,
3617 cdc_dma_rx_sample_rate_get,
3618 cdc_dma_rx_sample_rate_put),
3619 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3620 wsa_cdc_dma_rx_1_sample_rate,
3621 cdc_dma_rx_sample_rate_get,
3622 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003623 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3624 wsa_cdc_dma_tx_0_sample_rate,
3625 cdc_dma_tx_sample_rate_get,
3626 cdc_dma_tx_sample_rate_put),
3627 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3628 wsa_cdc_dma_tx_1_sample_rate,
3629 cdc_dma_tx_sample_rate_get,
3630 cdc_dma_tx_sample_rate_put),
3631 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3632 wsa_cdc_dma_tx_2_sample_rate,
3633 cdc_dma_tx_sample_rate_get,
3634 cdc_dma_tx_sample_rate_put),
3635 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3636 tx_cdc_dma_tx_0_sample_rate,
3637 cdc_dma_tx_sample_rate_get,
3638 cdc_dma_tx_sample_rate_put),
3639 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3640 tx_cdc_dma_tx_3_sample_rate,
3641 cdc_dma_tx_sample_rate_get,
3642 cdc_dma_tx_sample_rate_put),
3643 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3644 tx_cdc_dma_tx_4_sample_rate,
3645 cdc_dma_tx_sample_rate_get,
3646 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003647 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3648 va_cdc_dma_tx_0_sample_rate,
3649 cdc_dma_tx_sample_rate_get,
3650 cdc_dma_tx_sample_rate_put),
3651 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3652 va_cdc_dma_tx_1_sample_rate,
3653 cdc_dma_tx_sample_rate_get,
3654 cdc_dma_tx_sample_rate_put),
3655 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3656 va_cdc_dma_tx_2_sample_rate,
3657 cdc_dma_tx_sample_rate_get,
3658 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003659};
3660
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07003661static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3662 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3663 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3664 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3665 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3666 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3667 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3668 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3669 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3670 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3671 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3672 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3673 rx_cdc80_dma_rx_0_sample_rate,
3674 cdc_dma_rx_sample_rate_get,
3675 cdc_dma_rx_sample_rate_put),
3676 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3677 rx_cdc80_dma_rx_1_sample_rate,
3678 cdc_dma_rx_sample_rate_get,
3679 cdc_dma_rx_sample_rate_put),
3680 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3681 rx_cdc80_dma_rx_2_sample_rate,
3682 cdc_dma_rx_sample_rate_get,
3683 cdc_dma_rx_sample_rate_put),
3684 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3685 rx_cdc80_dma_rx_3_sample_rate,
3686 cdc_dma_rx_sample_rate_get,
3687 cdc_dma_rx_sample_rate_put),
3688 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3689 rx_cdc80_dma_rx_5_sample_rate,
3690 cdc_dma_rx_sample_rate_get,
3691 cdc_dma_rx_sample_rate_put),
3692};
3693
3694static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3695 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3696 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3697 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3698 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3699 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3700 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3701 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3702 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3703 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3704 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3705 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3706 rx_cdc85_dma_rx_0_sample_rate,
3707 cdc_dma_rx_sample_rate_get,
3708 cdc_dma_rx_sample_rate_put),
3709 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3710 rx_cdc85_dma_rx_1_sample_rate,
3711 cdc_dma_rx_sample_rate_get,
3712 cdc_dma_rx_sample_rate_put),
3713 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3714 rx_cdc85_dma_rx_2_sample_rate,
3715 cdc_dma_rx_sample_rate_get,
3716 cdc_dma_rx_sample_rate_put),
3717 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3718 rx_cdc85_dma_rx_3_sample_rate,
3719 cdc_dma_rx_sample_rate_get,
3720 cdc_dma_rx_sample_rate_put),
3721 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3722 rx_cdc85_dma_rx_5_sample_rate,
3723 cdc_dma_rx_sample_rate_get,
3724 cdc_dma_rx_sample_rate_put),
3725};
3726
Kunlei Zhangf61a2312020-02-11 15:37:03 +08003727static const struct snd_kcontrol_new msm_int_wcd937x_snd_controls[] = {
3728 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3729 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3730 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3731 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3732 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3733 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3734 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3735 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3736 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3737 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3738 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3739 rx_cdc_dma_rx_0_sample_rate,
3740 cdc_dma_rx_sample_rate_get,
3741 cdc_dma_rx_sample_rate_put),
3742 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3743 rx_cdc_dma_rx_1_sample_rate,
3744 cdc_dma_rx_sample_rate_get,
3745 cdc_dma_rx_sample_rate_put),
3746 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3747 rx_cdc_dma_rx_2_sample_rate,
3748 cdc_dma_rx_sample_rate_get,
3749 cdc_dma_rx_sample_rate_put),
3750 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3751 rx_cdc_dma_rx_3_sample_rate,
3752 cdc_dma_rx_sample_rate_get,
3753 cdc_dma_rx_sample_rate_put),
3754 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3755 rx_cdc_dma_rx_5_sample_rate,
3756 cdc_dma_rx_sample_rate_get,
3757 cdc_dma_rx_sample_rate_put),
3758};
3759
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003760static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3761 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3762 usb_audio_rx_sample_rate_get,
3763 usb_audio_rx_sample_rate_put),
3764 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3765 usb_audio_tx_sample_rate_get,
3766 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303767 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3768 usb_audio_rx_format_get, usb_audio_rx_format_put),
3769 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3770 usb_audio_tx_format_get, usb_audio_tx_format_put),
3771 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3772 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3773 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3774 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3775 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3776 proxy_rx_ch_get, proxy_rx_ch_put),
3777 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3778 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3779 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3780 ext_disp_rx_format_get, ext_disp_rx_format_put),
3781 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3782 ext_disp_rx_sample_rate_get,
3783 ext_disp_rx_sample_rate_put),
3784 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3785 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3786 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3787 ext_disp_rx_format_get, ext_disp_rx_format_put),
3788 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3789 ext_disp_rx_sample_rate_get,
3790 ext_disp_rx_sample_rate_put),
3791 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3792 msm_bt_sample_rate_get,
3793 msm_bt_sample_rate_put),
3794 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3795 msm_bt_sample_rate_rx_get,
3796 msm_bt_sample_rate_rx_put),
3797 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3798 msm_bt_sample_rate_tx_get,
3799 msm_bt_sample_rate_tx_put),
3800 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3801 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3802 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3803 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3804};
3805
3806static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003807 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3808 tdm_rx_sample_rate_get,
3809 tdm_rx_sample_rate_put),
3810 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3811 tdm_rx_sample_rate_get,
3812 tdm_rx_sample_rate_put),
3813 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3814 tdm_rx_sample_rate_get,
3815 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003816 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3817 tdm_rx_sample_rate_get,
3818 tdm_rx_sample_rate_put),
3819 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3820 tdm_rx_sample_rate_get,
3821 tdm_rx_sample_rate_put),
3822 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3823 tdm_rx_sample_rate_get,
3824 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003825 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3826 tdm_tx_sample_rate_get,
3827 tdm_tx_sample_rate_put),
3828 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3829 tdm_tx_sample_rate_get,
3830 tdm_tx_sample_rate_put),
3831 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3832 tdm_tx_sample_rate_get,
3833 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003834 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3835 tdm_tx_sample_rate_get,
3836 tdm_tx_sample_rate_put),
3837 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3838 tdm_tx_sample_rate_get,
3839 tdm_tx_sample_rate_put),
3840 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3841 tdm_tx_sample_rate_get,
3842 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003843 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3844 tdm_rx_format_get,
3845 tdm_rx_format_put),
3846 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3847 tdm_rx_format_get,
3848 tdm_rx_format_put),
3849 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3850 tdm_rx_format_get,
3851 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003852 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3853 tdm_rx_format_get,
3854 tdm_rx_format_put),
3855 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3856 tdm_rx_format_get,
3857 tdm_rx_format_put),
3858 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3859 tdm_rx_format_get,
3860 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003861 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3862 tdm_tx_format_get,
3863 tdm_tx_format_put),
3864 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3865 tdm_tx_format_get,
3866 tdm_tx_format_put),
3867 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3868 tdm_tx_format_get,
3869 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003870 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3871 tdm_tx_format_get,
3872 tdm_tx_format_put),
3873 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3874 tdm_tx_format_get,
3875 tdm_tx_format_put),
3876 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3877 tdm_tx_format_get,
3878 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003879 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3880 tdm_rx_ch_get,
3881 tdm_rx_ch_put),
3882 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3883 tdm_rx_ch_get,
3884 tdm_rx_ch_put),
3885 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3886 tdm_rx_ch_get,
3887 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003888 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3889 tdm_rx_ch_get,
3890 tdm_rx_ch_put),
3891 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3892 tdm_rx_ch_get,
3893 tdm_rx_ch_put),
3894 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3895 tdm_rx_ch_get,
3896 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003897 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3898 tdm_tx_ch_get,
3899 tdm_tx_ch_put),
3900 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3901 tdm_tx_ch_get,
3902 tdm_tx_ch_put),
3903 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3904 tdm_tx_ch_get,
3905 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003906 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3907 tdm_tx_ch_get,
3908 tdm_tx_ch_put),
3909 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3910 tdm_tx_ch_get,
3911 tdm_tx_ch_put),
3912 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3913 tdm_tx_ch_get,
3914 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303915 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3916 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3917};
3918
3919static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3920 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3921 aux_pcm_rx_sample_rate_get,
3922 aux_pcm_rx_sample_rate_put),
3923 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3924 aux_pcm_rx_sample_rate_get,
3925 aux_pcm_rx_sample_rate_put),
3926 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3927 aux_pcm_rx_sample_rate_get,
3928 aux_pcm_rx_sample_rate_put),
3929 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3930 aux_pcm_rx_sample_rate_get,
3931 aux_pcm_rx_sample_rate_put),
3932 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3933 aux_pcm_rx_sample_rate_get,
3934 aux_pcm_rx_sample_rate_put),
3935 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3936 aux_pcm_rx_sample_rate_get,
3937 aux_pcm_rx_sample_rate_put),
3938 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3939 aux_pcm_tx_sample_rate_get,
3940 aux_pcm_tx_sample_rate_put),
3941 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3942 aux_pcm_tx_sample_rate_get,
3943 aux_pcm_tx_sample_rate_put),
3944 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3945 aux_pcm_tx_sample_rate_get,
3946 aux_pcm_tx_sample_rate_put),
3947 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3948 aux_pcm_tx_sample_rate_get,
3949 aux_pcm_tx_sample_rate_put),
3950 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3951 aux_pcm_tx_sample_rate_get,
3952 aux_pcm_tx_sample_rate_put),
3953 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3954 aux_pcm_tx_sample_rate_get,
3955 aux_pcm_tx_sample_rate_put),
3956 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3957 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3958 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3959 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3960 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3961 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3962 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3963 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3964 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3965 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3966 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3967 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3968 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3969 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3970 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3971 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3972 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3973 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3974 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3975 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3976 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3977 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3978 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3979 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3980};
3981
3982static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3983 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3984 mi2s_rx_sample_rate_get,
3985 mi2s_rx_sample_rate_put),
3986 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3987 mi2s_rx_sample_rate_get,
3988 mi2s_rx_sample_rate_put),
3989 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3990 mi2s_rx_sample_rate_get,
3991 mi2s_rx_sample_rate_put),
3992 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3993 mi2s_rx_sample_rate_get,
3994 mi2s_rx_sample_rate_put),
3995 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3996 mi2s_rx_sample_rate_get,
3997 mi2s_rx_sample_rate_put),
3998 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3999 mi2s_rx_sample_rate_get,
4000 mi2s_rx_sample_rate_put),
4001 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
4002 mi2s_tx_sample_rate_get,
4003 mi2s_tx_sample_rate_put),
4004 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
4005 mi2s_tx_sample_rate_get,
4006 mi2s_tx_sample_rate_put),
4007 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
4008 mi2s_tx_sample_rate_get,
4009 mi2s_tx_sample_rate_put),
4010 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
4011 mi2s_tx_sample_rate_get,
4012 mi2s_tx_sample_rate_put),
4013 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
4014 mi2s_tx_sample_rate_get,
4015 mi2s_tx_sample_rate_put),
4016 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
4017 mi2s_tx_sample_rate_get,
4018 mi2s_tx_sample_rate_put),
4019 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
4020 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4021 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
4022 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4023 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
4024 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4025 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
4026 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4027 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
4028 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4029 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
4030 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4031 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
4032 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4033 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
4034 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4035 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
4036 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4037 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
4038 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4039 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
4040 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4041 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
4042 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004043 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
4044 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4045 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
4046 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4047 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
4048 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004049 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
4050 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4051 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
4052 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4053 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
4054 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004055 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
4056 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4057 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
4058 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4059 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
4060 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004061 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
4062 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4063 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
4064 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4065 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
4066 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004067};
4068
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004069static const struct snd_kcontrol_new msm_snd_controls[] = {
4070 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4071 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4072 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4073 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4074 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4075 aux_pcm_rx_sample_rate_get,
4076 aux_pcm_rx_sample_rate_put),
4077 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4078 aux_pcm_tx_sample_rate_get,
4079 aux_pcm_tx_sample_rate_put),
4080};
4081
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004082static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4083{
4084 int idx;
4085
4086 switch (be_id) {
4087 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4088 idx = EXT_DISP_RX_IDX_DP;
4089 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004090 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4091 idx = EXT_DISP_RX_IDX_DP1;
4092 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004093 default:
4094 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4095 idx = -EINVAL;
4096 break;
4097 }
4098
4099 return idx;
4100}
4101
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004102static int kona_send_island_va_config(int32_t be_id)
4103{
4104 int rc = 0;
4105 int port_id = 0xFFFF;
4106
4107 port_id = msm_get_port_id(be_id);
4108 if (port_id < 0) {
4109 pr_err("%s: Invalid island interface, be_id: %d\n",
4110 __func__, be_id);
4111 rc = -EINVAL;
4112 } else {
4113 /*
4114 * send island mode config
4115 * This should be the first configuration
4116 */
4117 rc = afe_send_port_island_mode(port_id);
4118 if (rc)
4119 pr_err("%s: afe send island mode failed %d\n",
4120 __func__, rc);
4121 }
4122
4123 return rc;
4124}
4125
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004126static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4127 struct snd_pcm_hw_params *params)
4128{
4129 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4130 struct snd_interval *rate = hw_param_interval(params,
4131 SNDRV_PCM_HW_PARAM_RATE);
4132 struct snd_interval *channels = hw_param_interval(params,
4133 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +08004134 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004135
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004136 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4137 __func__, dai_link->id, params_format(params),
4138 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004139
4140 switch (dai_link->id) {
4141 case MSM_BACKEND_DAI_USB_RX:
4142 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4143 usb_rx_cfg.bit_format);
4144 rate->min = rate->max = usb_rx_cfg.sample_rate;
4145 channels->min = channels->max = usb_rx_cfg.channels;
4146 break;
4147
4148 case MSM_BACKEND_DAI_USB_TX:
4149 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4150 usb_tx_cfg.bit_format);
4151 rate->min = rate->max = usb_tx_cfg.sample_rate;
4152 channels->min = channels->max = usb_tx_cfg.channels;
4153 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004154
4155 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004156 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004157 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4158 if (idx < 0) {
4159 pr_err("%s: Incorrect ext disp idx %d\n",
4160 __func__, idx);
4161 rc = idx;
4162 goto done;
4163 }
4164
4165 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4166 ext_disp_rx_cfg[idx].bit_format);
4167 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4168 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4169 break;
4170
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004171 case MSM_BACKEND_DAI_AFE_PCM_RX:
4172 channels->min = channels->max = proxy_rx_cfg.channels;
4173 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4174 break;
4175
4176 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4177 channels->min = channels->max =
4178 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4179 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4180 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4181 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4182 break;
4183
4184 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4185 channels->min = channels->max =
4186 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4187 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4188 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4189 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4190 break;
4191
4192 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4193 channels->min = channels->max =
4194 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4195 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4196 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4197 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4198 break;
4199
4200 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4201 channels->min = channels->max =
4202 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4203 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4204 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4205 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4206 break;
4207
4208 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4209 channels->min = channels->max =
4210 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4211 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4212 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4213 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4214 break;
4215
4216 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4217 channels->min = channels->max =
4218 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4220 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4221 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4222 break;
4223
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004224 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4225 channels->min = channels->max =
4226 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4229 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4230 break;
4231
4232 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4233 channels->min = channels->max =
4234 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4235 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4236 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4237 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4238 break;
4239
4240 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4241 channels->min = channels->max =
4242 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4243 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4244 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4245 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4246 break;
4247
4248 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4249 channels->min = channels->max =
4250 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4251 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4252 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4253 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4254 break;
4255
4256 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4257 channels->min = channels->max =
4258 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4259 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4260 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4261 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4262 break;
4263
4264 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4265 channels->min = channels->max =
4266 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4267 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4268 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4269 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4270 break;
4271
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004272 case MSM_BACKEND_DAI_AUXPCM_RX:
4273 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4274 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4275 rate->min = rate->max =
4276 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4277 channels->min = channels->max =
4278 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4279 break;
4280
4281 case MSM_BACKEND_DAI_AUXPCM_TX:
4282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4283 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4284 rate->min = rate->max =
4285 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4286 channels->min = channels->max =
4287 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4292 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4293 rate->min = rate->max =
4294 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4295 channels->min = channels->max =
4296 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4297 break;
4298
4299 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4301 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4302 rate->min = rate->max =
4303 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4304 channels->min = channels->max =
4305 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4306 break;
4307
4308 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4309 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4310 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4311 rate->min = rate->max =
4312 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4313 channels->min = channels->max =
4314 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4315 break;
4316
4317 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4318 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4319 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4320 rate->min = rate->max =
4321 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4322 channels->min = channels->max =
4323 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4324 break;
4325
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004326 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4327 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4328 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4329 rate->min = rate->max =
4330 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4331 channels->min = channels->max =
4332 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4333 break;
4334
4335 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4336 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4337 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4338 rate->min = rate->max =
4339 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4340 channels->min = channels->max =
4341 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4342 break;
4343
4344 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4345 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4346 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4347 rate->min = rate->max =
4348 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4349 channels->min = channels->max =
4350 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4351 break;
4352
4353 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4354 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4355 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4356 rate->min = rate->max =
4357 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4358 channels->min = channels->max =
4359 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4365 rate->min = rate->max =
4366 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4367 channels->min = channels->max =
4368 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4369 break;
4370
4371 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4373 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4374 rate->min = rate->max =
4375 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4376 channels->min = channels->max =
4377 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4378 break;
4379
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004380 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4381 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4382 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4383 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4384 channels->min = channels->max =
4385 mi2s_rx_cfg[PRIM_MI2S].channels;
4386 break;
4387
4388 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4389 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4390 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4391 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4392 channels->min = channels->max =
4393 mi2s_tx_cfg[PRIM_MI2S].channels;
4394 break;
4395
4396 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4397 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4398 mi2s_rx_cfg[SEC_MI2S].bit_format);
4399 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4400 channels->min = channels->max =
4401 mi2s_rx_cfg[SEC_MI2S].channels;
4402 break;
4403
4404 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4405 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4406 mi2s_tx_cfg[SEC_MI2S].bit_format);
4407 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4408 channels->min = channels->max =
4409 mi2s_tx_cfg[SEC_MI2S].channels;
4410 break;
4411
4412 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4413 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4414 mi2s_rx_cfg[TERT_MI2S].bit_format);
4415 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4416 channels->min = channels->max =
4417 mi2s_rx_cfg[TERT_MI2S].channels;
4418 break;
4419
4420 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4421 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4422 mi2s_tx_cfg[TERT_MI2S].bit_format);
4423 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4424 channels->min = channels->max =
4425 mi2s_tx_cfg[TERT_MI2S].channels;
4426 break;
4427
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004428 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4429 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4430 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4431 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4432 channels->min = channels->max =
4433 mi2s_rx_cfg[QUAT_MI2S].channels;
4434 break;
4435
4436 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4437 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4438 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4439 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4440 channels->min = channels->max =
4441 mi2s_tx_cfg[QUAT_MI2S].channels;
4442 break;
4443
4444 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4445 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4446 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4447 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4448 channels->min = channels->max =
4449 mi2s_rx_cfg[QUIN_MI2S].channels;
4450 break;
4451
4452 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4454 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4455 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4456 channels->min = channels->max =
4457 mi2s_tx_cfg[QUIN_MI2S].channels;
4458 break;
4459
4460 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4461 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4462 mi2s_rx_cfg[SEN_MI2S].bit_format);
4463 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4464 channels->min = channels->max =
4465 mi2s_rx_cfg[SEN_MI2S].channels;
4466 break;
4467
4468 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4469 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4470 mi2s_tx_cfg[SEN_MI2S].bit_format);
4471 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4472 channels->min = channels->max =
4473 mi2s_tx_cfg[SEN_MI2S].channels;
4474 break;
4475
Meng Wang574f4942019-02-18 12:59:41 +08004476 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4477 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4478 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4479 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4480 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4481 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4482 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4483 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4484 cdc_dma_rx_cfg[idx].bit_format);
4485 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4486 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4487 break;
4488
4489 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4490 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4491 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4492 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4493 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004494 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4495 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4496 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4497 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4498 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +08004499 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004500 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4501 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4502 break;
4503
Meng Wang574f4942019-02-18 12:59:41 +08004504 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304505 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +08004506 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4507 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304508 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +08004509 channels->min = channels->max = msm_vi_feed_tx_ch;
4510 break;
4511
Banajit Goswami83a370d2019-03-05 16:15:21 -08004512 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4513 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4514 slim_rx_cfg[SLIM_RX_7].bit_format);
4515 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4516 channels->min = channels->max =
4517 slim_rx_cfg[SLIM_RX_7].channels;
4518 break;
4519
4520 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +05304521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4522 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -08004523 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4524 channels->min = channels->max =
4525 slim_tx_cfg[SLIM_TX_7].channels;
4526 break;
4527
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304528 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4529 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4530 channels->min = channels->max =
4531 slim_tx_cfg[SLIM_TX_8].channels;
4532 break;
4533
Meng Wange8e53822019-03-18 10:49:50 +08004534 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4535 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4536 afe_loopback_tx_cfg[idx].bit_format);
4537 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4538 channels->min = channels->max =
4539 afe_loopback_tx_cfg[idx].channels;
4540 break;
4541
Meng Wang574f4942019-02-18 12:59:41 +08004542 default:
4543 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004544 break;
4545 }
4546
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004547done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004548 return rc;
4549}
4550
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08004551static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4552{
4553 struct snd_soc_card *card = component->card;
4554 struct msm_asoc_mach_data *pdata =
4555 snd_soc_card_get_drvdata(card);
4556
4557 if (!pdata->fsa_handle)
4558 return false;
4559
4560 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4561}
4562
4563static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4564{
4565 int value = 0;
4566 bool ret = false;
4567 struct snd_soc_card *card;
4568 struct msm_asoc_mach_data *pdata;
4569
4570 if (!component) {
4571 pr_err("%s component is NULL\n", __func__);
4572 return false;
4573 }
4574 card = component->card;
4575 pdata = snd_soc_card_get_drvdata(card);
4576
4577 if (!pdata)
4578 return false;
4579
4580 if (wcd_mbhc_cfg.enable_usbc_analog)
4581 return msm_usbc_swap_gnd_mic(component, active);
4582
4583 /* if usbc is not defined, swap using us_euro_gpio_p */
4584 if (pdata->us_euro_gpio_p) {
4585 value = msm_cdc_pinctrl_get_state(
4586 pdata->us_euro_gpio_p);
4587 if (value)
4588 msm_cdc_pinctrl_select_sleep_state(
4589 pdata->us_euro_gpio_p);
4590 else
4591 msm_cdc_pinctrl_select_active_state(
4592 pdata->us_euro_gpio_p);
4593 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4594 __func__, value, !value);
4595 ret = true;
4596 }
4597
4598 return ret;
4599}
4600
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004601static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4602 struct snd_pcm_hw_params *params)
4603{
4604 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4605 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4606 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004607 int slot_width = TDM_SLOT_WIDTH_BITS;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004608 int channels, slots;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004609 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004610 unsigned int *slot_offset;
4611 struct tdm_dev_config *config;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004612 struct msm_asoc_mach_data *pdata = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004613 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004614
4615 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4616
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004617 pdata = snd_soc_card_get_drvdata(rtd->card);
4618 slots = pdata->tdm_max_slots;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004619 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004620 pr_err("%s: dai id 0x%x not supported\n",
4621 __func__, cpu_dai->id);
4622 return -EINVAL;
4623 }
4624
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004625 /* RX or TX */
4626 path_dir = cpu_dai->id % MAX_PATH;
4627
4628 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4629 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4630 / (MAX_PATH * TDM_PORT_MAX);
4631
4632 /* 0, 1, 2, .. 7 */
4633 channel_interface =
4634 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4635 % TDM_PORT_MAX;
4636
4637 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4638 __func__, path_dir, interface, channel_interface);
4639
4640 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4641 (path_dir * TDM_PORT_MAX) + channel_interface;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004642 if (!config) {
4643 pr_err("%s: tdm config is NULL\n", __func__);
4644 return -EINVAL;
4645 }
4646
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004647 slot_offset = config->tdm_slot_offset;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004648 if (!slot_offset) {
4649 pr_err("%s: slot offset is NULL\n", __func__);
4650 return -EINVAL;
4651 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004652
4653 if (path_dir)
4654 channels = tdm_tx_cfg[interface][channel_interface].channels;
4655 else
4656 channels = tdm_rx_cfg[interface][channel_interface].channels;
4657
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004658 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4659 /*2 slot config - bits 0 and 1 set for the first two slots */
4660 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004661
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004662 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4663 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004664
4665 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4666 slots, slot_width);
4667 if (ret < 0) {
4668 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4669 __func__, ret);
4670 goto end;
4671 }
4672
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004673 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4674
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004675 ret = snd_soc_dai_set_channel_map(cpu_dai,
4676 0, NULL, channels, slot_offset);
4677 if (ret < 0) {
4678 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4679 __func__, ret);
4680 goto end;
4681 }
4682 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4683 /*2 slot config - bits 0 and 1 set for the first two slots */
4684 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004685
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004686 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4687 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004688
4689 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4690 slots, slot_width);
4691 if (ret < 0) {
4692 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4693 __func__, ret);
4694 goto end;
4695 }
4696
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004697 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4698
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004699 ret = snd_soc_dai_set_channel_map(cpu_dai,
4700 channels, slot_offset, 0, NULL);
4701 if (ret < 0) {
4702 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4703 __func__, ret);
4704 goto end;
4705 }
4706 } else {
4707 ret = -EINVAL;
4708 pr_err("%s: invalid use case, err:%d\n",
4709 __func__, ret);
4710 goto end;
4711 }
4712
4713 rate = params_rate(params);
4714 clk_freq = rate * slot_width * slots;
4715 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4716 if (ret < 0)
4717 pr_err("%s: failed to set tdm clk, err:%d\n",
4718 __func__, ret);
4719
4720end:
4721 return ret;
4722}
4723
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004724static int msm_get_tdm_mode(u32 port_id)
4725{
4726 int tdm_mode;
4727
4728 switch (port_id) {
4729 case AFE_PORT_ID_PRIMARY_TDM_RX:
4730 case AFE_PORT_ID_PRIMARY_TDM_TX:
4731 tdm_mode = TDM_PRI;
4732 break;
4733 case AFE_PORT_ID_SECONDARY_TDM_RX:
4734 case AFE_PORT_ID_SECONDARY_TDM_TX:
4735 tdm_mode = TDM_SEC;
4736 break;
4737 case AFE_PORT_ID_TERTIARY_TDM_RX:
4738 case AFE_PORT_ID_TERTIARY_TDM_TX:
4739 tdm_mode = TDM_TERT;
4740 break;
4741 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4742 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4743 tdm_mode = TDM_QUAT;
4744 break;
4745 case AFE_PORT_ID_QUINARY_TDM_RX:
4746 case AFE_PORT_ID_QUINARY_TDM_TX:
4747 tdm_mode = TDM_QUIN;
4748 break;
4749 case AFE_PORT_ID_SENARY_TDM_RX:
4750 case AFE_PORT_ID_SENARY_TDM_TX:
4751 tdm_mode = TDM_SEN;
4752 break;
4753 default:
4754 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4755 tdm_mode = -EINVAL;
4756 }
4757 return tdm_mode;
4758}
4759
4760static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4761{
4762 int ret = 0;
4763 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4764 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4765 struct snd_soc_card *card = rtd->card;
4766 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4767 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4768
4769 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4770 ret = -EINVAL;
4771 pr_err("%s: Invalid TDM interface %d\n",
4772 __func__, ret);
4773 return ret;
4774 }
4775
4776 if (pdata->mi2s_gpio_p[tdm_mode]) {
4777 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4778 == 0) {
4779 ret = msm_cdc_pinctrl_select_active_state(
4780 pdata->mi2s_gpio_p[tdm_mode]);
4781 if (ret) {
4782 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4783 __func__, ret);
4784 goto done;
4785 }
4786 }
4787 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4788 }
4789
4790done:
4791 return ret;
4792}
4793
4794static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4795{
4796 int ret = 0;
4797 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4798 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4799 struct snd_soc_card *card = rtd->card;
4800 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4801 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4802
4803 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4804 ret = -EINVAL;
4805 pr_err("%s: Invalid TDM interface %d\n",
4806 __func__, ret);
4807 return;
4808 }
4809
4810 if (pdata->mi2s_gpio_p[tdm_mode]) {
4811 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4812 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4813 == 0) {
4814 ret = msm_cdc_pinctrl_select_sleep_state(
4815 pdata->mi2s_gpio_p[tdm_mode]);
4816 if (ret)
4817 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4818 __func__, ret);
4819 }
4820 }
4821}
4822
4823static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4824{
4825 int ret = 0;
4826 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4827 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4828 struct snd_soc_card *card = rtd->card;
4829 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4830 u32 aux_mode = cpu_dai->id - 1;
4831
4832 if (aux_mode >= AUX_PCM_MAX) {
4833 ret = -EINVAL;
4834 pr_err("%s: Invalid AUX interface %d\n",
4835 __func__, ret);
4836 return ret;
4837 }
4838
4839 if (pdata->mi2s_gpio_p[aux_mode]) {
4840 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4841 == 0) {
4842 ret = msm_cdc_pinctrl_select_active_state(
4843 pdata->mi2s_gpio_p[aux_mode]);
4844 if (ret) {
4845 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4846 __func__, ret);
4847 goto done;
4848 }
4849 }
4850 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4851 }
4852
4853done:
4854 return ret;
4855}
4856
4857static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4858{
4859 int ret = 0;
4860 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4861 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4862 struct snd_soc_card *card = rtd->card;
4863 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4864 u32 aux_mode = cpu_dai->id - 1;
4865
4866 if (aux_mode >= AUX_PCM_MAX) {
4867 pr_err("%s: Invalid AUX interface %d\n",
4868 __func__, ret);
4869 return;
4870 }
4871
4872 if (pdata->mi2s_gpio_p[aux_mode]) {
4873 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4874 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4875 == 0) {
4876 ret = msm_cdc_pinctrl_select_sleep_state(
4877 pdata->mi2s_gpio_p[aux_mode]);
4878 if (ret)
4879 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4880 __func__, ret);
4881 }
4882 }
4883}
4884
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004885static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4886{
4887 int ret = 0;
4888 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4889 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4890
4891 switch (dai_link->id) {
4892 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4893 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4894 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4895 ret = kona_send_island_va_config(dai_link->id);
4896 if (ret)
4897 pr_err("%s: send island va cfg failed, err: %d\n",
4898 __func__, ret);
4899 break;
4900 }
4901
4902 return ret;
4903}
4904
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004905static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4906 struct snd_pcm_hw_params *params)
4907{
4908 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4909 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4910 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4911 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4912
4913 int ret = 0;
4914 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4915 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4916 u32 user_set_tx_ch = 0;
4917 u32 user_set_rx_ch = 0;
4918 u32 ch_id;
4919
4920 ret = snd_soc_dai_get_channel_map(codec_dai,
4921 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4922 &rx_ch_cdc_dma);
4923 if (ret < 0) {
4924 pr_err("%s: failed to get codec chan map, err:%d\n",
4925 __func__, ret);
4926 goto err;
4927 }
4928
4929 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4930 switch (dai_link->id) {
4931 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4932 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4933 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4934 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4935 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4936 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4937 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4938 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4939 {
4940 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4941 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4942 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4943 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4944 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4945 user_set_rx_ch, &rx_ch_cdc_dma);
4946 if (ret < 0) {
4947 pr_err("%s: failed to set cpu chan map, err:%d\n",
4948 __func__, ret);
4949 goto err;
4950 }
4951
4952 }
4953 break;
4954 }
4955 } else {
4956 switch (dai_link->id) {
4957 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4958 {
4959 user_set_tx_ch = msm_vi_feed_tx_ch;
4960 }
4961 break;
4962 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4963 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4964 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4965 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4966 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004967 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4968 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4969 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004970 {
4971 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4972 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4973 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4974 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4975 }
4976 break;
4977 }
4978
4979 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4980 &tx_ch_cdc_dma, 0, 0);
4981 if (ret < 0) {
4982 pr_err("%s: failed to set cpu chan map, err:%d\n",
4983 __func__, ret);
4984 goto err;
4985 }
4986 }
4987
4988err:
4989 return ret;
4990}
4991
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004992static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4993{
4994 cpumask_t mask;
4995
4996 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4997 pm_qos_remove_request(&substream->latency_pm_qos_req);
4998
4999 cpumask_clear(&mask);
5000 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5001 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5002 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5003
5004 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5005
5006 pm_qos_add_request(&substream->latency_pm_qos_req,
5007 PM_QOS_CPU_DMA_LATENCY,
5008 MSM_LL_QOS_VALUE);
5009 return 0;
5010}
5011
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005012void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
5013{
5014 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5015 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5016 int index = cpu_dai->id;
5017 struct snd_soc_card *card = rtd->card;
5018 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5019 int sample_rate = 0;
5020
5021 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5022 sample_rate = mi2s_rx_cfg[index].sample_rate;
5023 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5024 sample_rate = mi2s_tx_cfg[index].sample_rate;
5025 } else {
5026 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5027 return;
5028 }
5029
5030 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5031 if (pdata->lpass_audio_hw_vote != NULL) {
5032 if (--pdata->core_audio_vote_count == 0) {
5033 clk_disable_unprepare(
5034 pdata->lpass_audio_hw_vote);
5035 } else if (pdata->core_audio_vote_count < 0) {
5036 pr_err("%s: audio vote mismatch\n", __func__);
5037 pdata->core_audio_vote_count = 0;
5038 }
5039 } else {
5040 pr_err("%s: Invalid lpass audio hw node\n", __func__);
5041 }
5042 }
5043}
5044
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005045static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5046{
5047 int ret = 0;
5048 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5049 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5050 int index = cpu_dai->id;
5051 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005052 struct snd_soc_card *card = rtd->card;
5053 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005054 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005055
5056 dev_dbg(rtd->card->dev,
5057 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5058 __func__, substream->name, substream->stream,
5059 cpu_dai->name, cpu_dai->id);
5060
5061 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5062 ret = -EINVAL;
5063 dev_err(rtd->card->dev,
5064 "%s: CPU DAI id (%d) out of range\n",
5065 __func__, cpu_dai->id);
5066 goto err;
5067 }
5068 /*
5069 * Mutex protection in case the same MI2S
5070 * interface using for both TX and RX so
5071 * that the same clock won't be enable twice.
5072 */
5073 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005074 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5075 sample_rate = mi2s_rx_cfg[index].sample_rate;
5076 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5077 sample_rate = mi2s_tx_cfg[index].sample_rate;
5078 } else {
5079 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5080 ret = -EINVAL;
5081 goto vote_err;
5082 }
5083
5084 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5085 if (pdata->lpass_audio_hw_vote == NULL) {
5086 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5087 __func__);
5088 ret = -EINVAL;
5089 goto vote_err;
5090 }
5091 if (pdata->core_audio_vote_count == 0) {
5092 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5093 if (ret < 0) {
5094 dev_err(rtd->card->dev, "%s: audio vote error\n",
5095 __func__);
5096 goto vote_err;
5097 }
5098 }
5099 pdata->core_audio_vote_count++;
5100 }
5101
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005102 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5103 /* Check if msm needs to provide the clock to the interface */
5104 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5105 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5106 fmt = SND_SOC_DAIFMT_CBM_CFM;
5107 }
5108 ret = msm_mi2s_set_sclk(substream, true);
5109 if (ret < 0) {
5110 dev_err(rtd->card->dev,
5111 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5112 __func__, ret);
5113 goto clean_up;
5114 }
5115
5116 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5117 if (ret < 0) {
5118 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5119 __func__, index, ret);
5120 goto clk_off;
5121 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005122 if (pdata->mi2s_gpio_p[index]) {
5123 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5124 == 0) {
5125 ret = msm_cdc_pinctrl_select_active_state(
5126 pdata->mi2s_gpio_p[index]);
5127 if (ret) {
5128 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5129 __func__, ret);
5130 goto clk_off;
5131 }
5132 }
5133 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5134 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005135 }
5136clk_off:
5137 if (ret < 0)
5138 msm_mi2s_set_sclk(substream, false);
5139clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005140 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005141 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005142 mi2s_disable_audio_vote(substream);
5143 }
5144vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005145 mutex_unlock(&mi2s_intf_conf[index].lock);
5146err:
5147 return ret;
5148}
5149
5150static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5151{
5152 int ret = 0;
5153 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5154 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005155 struct snd_soc_card *card = rtd->card;
5156 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005157
5158 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5159 substream->name, substream->stream);
5160 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5161 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5162 return;
5163 }
5164
5165 mutex_lock(&mi2s_intf_conf[index].lock);
5166 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005167 if (pdata->mi2s_gpio_p[index]) {
5168 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5169 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5170 == 0) {
5171 ret = msm_cdc_pinctrl_select_sleep_state(
5172 pdata->mi2s_gpio_p[index]);
5173 if (ret)
5174 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5175 __func__, ret);
5176 }
5177 }
5178
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005179 ret = msm_mi2s_set_sclk(substream, false);
5180 if (ret < 0)
5181 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5182 __func__, index, ret);
5183 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005184 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005185 mutex_unlock(&mi2s_intf_conf[index].lock);
5186}
5187
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305188static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5189 struct snd_pcm_hw_params *params)
5190{
5191 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5192 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5193 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5194 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5195 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5196 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5197 int ret = 0;
5198
5199 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5200 codec_dai->name, codec_dai->id);
5201 ret = snd_soc_dai_get_channel_map(codec_dai,
5202 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5203 if (ret) {
5204 dev_err(rtd->dev,
5205 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5206 __func__, ret);
5207 goto err;
5208 }
5209
5210 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5211 __func__, tx_ch_cnt, dai_link->id);
5212
5213 ret = snd_soc_dai_set_channel_map(cpu_dai,
5214 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5215 if (ret)
5216 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5217 __func__, ret);
5218
5219err:
5220 return ret;
5221}
5222
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005223static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5224 struct snd_pcm_hw_params *params)
5225{
5226 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5227 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5228 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5229 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5230 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5231 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5232 int ret = 0;
5233
5234 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5235 codec_dai->name, codec_dai->id);
5236 ret = snd_soc_dai_get_channel_map(codec_dai,
5237 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5238 if (ret) {
5239 dev_err(rtd->dev,
5240 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5241 __func__, ret);
5242 goto err;
5243 }
5244
5245 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5246 __func__, tx_ch_cnt, dai_link->id);
5247
5248 ret = snd_soc_dai_set_channel_map(cpu_dai,
5249 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5250 if (ret)
5251 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5252 __func__, ret);
5253
5254err:
5255 return ret;
5256}
5257
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005258static struct snd_soc_ops kona_aux_be_ops = {
5259 .startup = kona_aux_snd_startup,
5260 .shutdown = kona_aux_snd_shutdown
5261};
5262
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005263static struct snd_soc_ops kona_tdm_be_ops = {
5264 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005265 .startup = kona_tdm_snd_startup,
5266 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005267};
5268
5269static struct snd_soc_ops msm_mi2s_be_ops = {
5270 .startup = msm_mi2s_snd_startup,
5271 .shutdown = msm_mi2s_snd_shutdown,
5272};
5273
5274static struct snd_soc_ops msm_fe_qos_ops = {
5275 .prepare = msm_fe_qos_prepare,
5276};
5277
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005278static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07005279 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005280 .hw_params = msm_snd_cdc_dma_hw_params,
5281};
5282
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005283static struct snd_soc_ops msm_wcn_ops = {
5284 .hw_params = msm_wcn_hw_params,
5285};
5286
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305287static struct snd_soc_ops msm_wcn_ops_lito = {
5288 .hw_params = msm_wcn_hw_params_lito,
5289};
5290
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005291static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5292 struct snd_kcontrol *kcontrol, int event)
5293{
5294 struct msm_asoc_mach_data *pdata = NULL;
5295 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5296 int ret = 0;
5297 u32 dmic_idx;
5298 int *dmic_gpio_cnt;
5299 struct device_node *dmic_gpio;
5300 char *wname;
5301
5302 wname = strpbrk(w->name, "012345");
5303 if (!wname) {
5304 dev_err(component->dev, "%s: widget not found\n", __func__);
5305 return -EINVAL;
5306 }
5307
5308 ret = kstrtouint(wname, 10, &dmic_idx);
5309 if (ret < 0) {
5310 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5311 __func__);
5312 return -EINVAL;
5313 }
5314
5315 pdata = snd_soc_card_get_drvdata(component->card);
5316
5317 switch (dmic_idx) {
5318 case 0:
5319 case 1:
5320 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5321 dmic_gpio = pdata->dmic01_gpio_p;
5322 break;
5323 case 2:
5324 case 3:
5325 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5326 dmic_gpio = pdata->dmic23_gpio_p;
5327 break;
5328 case 4:
5329 case 5:
5330 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5331 dmic_gpio = pdata->dmic45_gpio_p;
5332 break;
5333 default:
5334 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5335 __func__);
5336 return -EINVAL;
5337 }
5338
5339 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5340 __func__, event, dmic_idx, *dmic_gpio_cnt);
5341
5342 switch (event) {
5343 case SND_SOC_DAPM_PRE_PMU:
5344 (*dmic_gpio_cnt)++;
5345 if (*dmic_gpio_cnt == 1) {
5346 ret = msm_cdc_pinctrl_select_active_state(
5347 dmic_gpio);
5348 if (ret < 0) {
5349 pr_err("%s: gpio set cannot be activated %sd",
5350 __func__, "dmic_gpio");
5351 return ret;
5352 }
5353 }
5354
5355 break;
5356 case SND_SOC_DAPM_POST_PMD:
5357 (*dmic_gpio_cnt)--;
5358 if (*dmic_gpio_cnt == 0) {
5359 ret = msm_cdc_pinctrl_select_sleep_state(
5360 dmic_gpio);
5361 if (ret < 0) {
5362 pr_err("%s: gpio set cannot be de-activated %sd",
5363 __func__, "dmic_gpio");
5364 return ret;
5365 }
5366 }
5367 break;
5368 default:
5369 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5370 return -EINVAL;
5371 }
5372 return 0;
5373}
5374
5375static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5376 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5377 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5378 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5379 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005380 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005381 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5382 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5383 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5384 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5385 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5386 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305387 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5388 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005389};
5390
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005391static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5392{
5393 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5394 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5395 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5396
5397 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5398 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5399}
5400
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305401static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5402{
5403 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5404 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5405 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5406
5407 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5408 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5409}
5410
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305411#ifndef CONFIG_TDM_DISABLE
5412static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5413{
5414 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5415 ARRAY_SIZE(msm_tdm_snd_controls));
5416}
5417#else
5418static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5419{
5420 return;
5421}
5422#endif
5423
5424#ifndef CONFIG_MI2S_DISABLE
5425static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5426{
5427 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5428 ARRAY_SIZE(msm_mi2s_snd_controls));
5429}
5430#else
5431static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5432{
5433 return;
5434}
5435#endif
5436
5437#ifndef CONFIG_AUXPCM_DISABLE
5438static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5439{
5440 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5441 ARRAY_SIZE(msm_auxpcm_snd_controls));
5442}
5443#else
5444static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5445{
5446 return;
5447}
5448#endif
5449
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005450static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5451{
5452 int ret = -EINVAL;
5453 struct snd_soc_component *component;
5454 struct snd_soc_dapm_context *dapm;
5455 struct snd_card *card;
5456 struct snd_info_entry *entry;
5457 struct snd_soc_component *aux_comp;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005458 struct platform_device *pdev = NULL;
5459 int i = 0;
Kunlei Zhangf712be02020-06-30 21:05:46 +08005460 bool is_wcd937x_used = false;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005461 char *data = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005462 struct msm_asoc_mach_data *pdata =
5463 snd_soc_card_get_drvdata(rtd->card);
5464
5465 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5466 if (!component) {
5467 pr_err("%s: could not find component for bolero_codec\n",
5468 __func__);
5469 return ret;
5470 }
5471
5472 dapm = snd_soc_component_get_dapm(component);
5473
5474 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5475 ARRAY_SIZE(msm_int_snd_controls));
5476 if (ret < 0) {
5477 pr_err("%s: add_component_controls failed: %d\n",
5478 __func__, ret);
5479 return ret;
5480 }
5481 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5482 ARRAY_SIZE(msm_common_snd_controls));
5483 if (ret < 0) {
5484 pr_err("%s: add common snd controls failed: %d\n",
5485 __func__, ret);
5486 return ret;
5487 }
5488
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305489 msm_add_tdm_snd_controls(component);
5490 msm_add_mi2s_snd_controls(component);
5491 msm_add_auxpcm_snd_controls(component);
5492
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005493 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5494 ARRAY_SIZE(msm_int_dapm_widgets));
5495
5496 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5497 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5498 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5499 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +05305500 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5501 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305502 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5503 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005504
5505 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5506 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5507 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5508 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005509 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005510
5511 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5512 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5513 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5514 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5515
5516 snd_soc_dapm_sync(dapm);
5517
5518 /*
5519 * Send speaker configuration only for WSA8810.
5520 * Default configuration is for WSA8815.
5521 */
5522 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5523 __func__, rtd->card->num_aux_devs);
5524 if (rtd->card->num_aux_devs &&
5525 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +08005526 list_for_each_entry(aux_comp,
5527 &rtd->card->aux_comp_list,
5528 card_aux_list) {
5529 if (aux_comp->name != NULL && (
5530 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5531 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5532 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005533 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005534 wsa_macro_set_spkr_gain_offset(component,
5535 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
Laxminath Kasamd3621032020-04-01 18:14:05 +05305536 } else if (aux_comp->name != NULL && (
5537 !strcmp(aux_comp->name, WSA8815_NAME_1) ||
5538 !strcmp(aux_comp->name, WSA8815_NAME_2))) {
5539 wsa_macro_set_spkr_mode(component,
5540 WSA_MACRO_SPKR_MODE_DEFAULT);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005541 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005542 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005543 }
5544
5545 for (i = 0; i < rtd->card->num_aux_devs; i++)
5546 {
5547 if (msm_aux_dev[i].name != NULL ) {
5548 if (strstr(msm_aux_dev[i].name, "wsa"))
5549 continue;
5550 }
5551
5552 if (msm_aux_dev[i].codec_of_node) {
5553 pdev = of_find_device_by_node(
5554 msm_aux_dev[i].codec_of_node);
5555
5556 if (pdev)
5557 data = (char*) of_device_get_match_data(
5558 &pdev->dev);
5559 if (data != NULL) {
5560 if (!strncmp(data, "wcd937x",
5561 sizeof("wcd937x"))) {
Kunlei Zhangf712be02020-06-30 21:05:46 +08005562 is_wcd937x_used = true;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005563 break;
5564 }
5565 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +05305566 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005567 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005568
Kunlei Zhangf712be02020-06-30 21:05:46 +08005569 if (is_wcd937x_used) {
5570 bolero_set_port_map(component,
5571 ARRAY_SIZE(sm_port_map_wcd937x),
5572 sm_port_map_wcd937x);
5573 } else if (pdata->lito_v2_enabled) {
5574 /*
5575 * Enable tx data line3 for saipan version v2 and
5576 * write corresponding lpi register.
5577 */
5578 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5579 sm_port_map_v2);
5580 } else {
5581 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5582 sm_port_map);
5583 }
5584
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005585 card = rtd->card->snd_card;
5586 if (!pdata->codec_root) {
5587 entry = snd_info_create_subdir(card->module, "codecs",
5588 card->proc_root);
5589 if (!entry) {
5590 pr_debug("%s: Cannot create codecs module entry\n",
5591 __func__);
5592 ret = 0;
5593 goto err;
5594 }
5595 pdata->codec_root = entry;
5596 }
5597 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -08005598 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005599 codec_reg_done = true;
5600 return 0;
5601err:
5602 return ret;
5603}
5604
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08005605static void *def_wcd_mbhc_cal(void)
5606{
5607 void *wcd_mbhc_cal;
5608 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5609 u16 *btn_high;
5610
5611 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5612 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5613 if (!wcd_mbhc_cal)
5614 return NULL;
5615
5616 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5617 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5618 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5619 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5620 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5621
5622 btn_high[0] = 75;
5623 btn_high[1] = 150;
5624 btn_high[2] = 237;
5625 btn_high[3] = 500;
5626 btn_high[4] = 500;
5627 btn_high[5] = 500;
5628 btn_high[6] = 500;
5629 btn_high[7] = 500;
5630
5631 return wcd_mbhc_cal;
5632}
5633
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005634/* Digital audio interface glue - connects codec <---> CPU */
5635static struct snd_soc_dai_link msm_common_dai_links[] = {
5636 /* FrontEnd DAI Links */
5637 {/* hw:x,0 */
5638 .name = MSM_DAILINK_NAME(Media1),
5639 .stream_name = "MultiMedia1",
5640 .cpu_dai_name = "MultiMedia1",
5641 .platform_name = "msm-pcm-dsp.0",
5642 .dynamic = 1,
5643 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5644 .dpcm_playback = 1,
5645 .dpcm_capture = 1,
5646 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5647 SND_SOC_DPCM_TRIGGER_POST},
5648 .codec_dai_name = "snd-soc-dummy-dai",
5649 .codec_name = "snd-soc-dummy",
5650 .ignore_suspend = 1,
5651 /* this dainlink has playback support */
5652 .ignore_pmdown_time = 1,
5653 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5654 },
5655 {/* hw:x,1 */
5656 .name = MSM_DAILINK_NAME(Media2),
5657 .stream_name = "MultiMedia2",
5658 .cpu_dai_name = "MultiMedia2",
5659 .platform_name = "msm-pcm-dsp.0",
5660 .dynamic = 1,
5661 .dpcm_playback = 1,
5662 .dpcm_capture = 1,
5663 .codec_dai_name = "snd-soc-dummy-dai",
5664 .codec_name = "snd-soc-dummy",
5665 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5666 SND_SOC_DPCM_TRIGGER_POST},
5667 .ignore_suspend = 1,
5668 /* this dainlink has playback support */
5669 .ignore_pmdown_time = 1,
5670 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5671 },
5672 {/* hw:x,2 */
5673 .name = "VoiceMMode1",
5674 .stream_name = "VoiceMMode1",
5675 .cpu_dai_name = "VoiceMMode1",
5676 .platform_name = "msm-pcm-voice",
5677 .dynamic = 1,
5678 .dpcm_playback = 1,
5679 .dpcm_capture = 1,
5680 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5681 SND_SOC_DPCM_TRIGGER_POST},
5682 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5683 .ignore_suspend = 1,
5684 .ignore_pmdown_time = 1,
5685 .codec_dai_name = "snd-soc-dummy-dai",
5686 .codec_name = "snd-soc-dummy",
5687 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5688 },
5689 {/* hw:x,3 */
5690 .name = "MSM VoIP",
5691 .stream_name = "VoIP",
5692 .cpu_dai_name = "VoIP",
5693 .platform_name = "msm-voip-dsp",
5694 .dynamic = 1,
5695 .dpcm_playback = 1,
5696 .dpcm_capture = 1,
5697 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5698 SND_SOC_DPCM_TRIGGER_POST},
5699 .codec_dai_name = "snd-soc-dummy-dai",
5700 .codec_name = "snd-soc-dummy",
5701 .ignore_suspend = 1,
5702 /* this dainlink has playback support */
5703 .ignore_pmdown_time = 1,
5704 .id = MSM_FRONTEND_DAI_VOIP,
5705 },
5706 {/* hw:x,4 */
5707 .name = MSM_DAILINK_NAME(ULL),
5708 .stream_name = "MultiMedia3",
5709 .cpu_dai_name = "MultiMedia3",
5710 .platform_name = "msm-pcm-dsp.2",
5711 .dynamic = 1,
5712 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5713 .dpcm_playback = 1,
5714 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5715 SND_SOC_DPCM_TRIGGER_POST},
5716 .codec_dai_name = "snd-soc-dummy-dai",
5717 .codec_name = "snd-soc-dummy",
5718 .ignore_suspend = 1,
5719 /* this dainlink has playback support */
5720 .ignore_pmdown_time = 1,
5721 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5722 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005723 {/* hw:x,5 */
5724 .name = "MSM AFE-PCM RX",
5725 .stream_name = "AFE-PROXY RX",
5726 .cpu_dai_name = "msm-dai-q6-dev.241",
5727 .codec_name = "msm-stub-codec.1",
5728 .codec_dai_name = "msm-stub-rx",
5729 .platform_name = "msm-pcm-afe",
5730 .dpcm_playback = 1,
5731 .ignore_suspend = 1,
5732 /* this dainlink has playback support */
5733 .ignore_pmdown_time = 1,
5734 },
5735 {/* hw:x,6 */
5736 .name = "MSM AFE-PCM TX",
5737 .stream_name = "AFE-PROXY TX",
5738 .cpu_dai_name = "msm-dai-q6-dev.240",
5739 .codec_name = "msm-stub-codec.1",
5740 .codec_dai_name = "msm-stub-tx",
5741 .platform_name = "msm-pcm-afe",
5742 .dpcm_capture = 1,
5743 .ignore_suspend = 1,
5744 },
5745 {/* hw:x,7 */
5746 .name = MSM_DAILINK_NAME(Compress1),
5747 .stream_name = "Compress1",
5748 .cpu_dai_name = "MultiMedia4",
5749 .platform_name = "msm-compress-dsp",
5750 .dynamic = 1,
5751 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5752 .dpcm_playback = 1,
5753 .dpcm_capture = 1,
5754 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5755 SND_SOC_DPCM_TRIGGER_POST},
5756 .codec_dai_name = "snd-soc-dummy-dai",
5757 .codec_name = "snd-soc-dummy",
5758 .ignore_suspend = 1,
5759 .ignore_pmdown_time = 1,
5760 /* this dainlink has playback support */
5761 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5762 },
Meng Wang197cb302019-03-01 13:54:38 +08005763 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005764 {/* hw:x,8 */
5765 .name = "AUXPCM Hostless",
5766 .stream_name = "AUXPCM Hostless",
5767 .cpu_dai_name = "AUXPCM_HOSTLESS",
5768 .platform_name = "msm-pcm-hostless",
5769 .dynamic = 1,
5770 .dpcm_playback = 1,
5771 .dpcm_capture = 1,
5772 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5773 SND_SOC_DPCM_TRIGGER_POST},
5774 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5775 .ignore_suspend = 1,
5776 /* this dainlink has playback support */
5777 .ignore_pmdown_time = 1,
5778 .codec_dai_name = "snd-soc-dummy-dai",
5779 .codec_name = "snd-soc-dummy",
5780 },
5781 {/* hw:x,9 */
5782 .name = MSM_DAILINK_NAME(LowLatency),
5783 .stream_name = "MultiMedia5",
5784 .cpu_dai_name = "MultiMedia5",
5785 .platform_name = "msm-pcm-dsp.1",
5786 .dynamic = 1,
5787 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5788 .dpcm_playback = 1,
5789 .dpcm_capture = 1,
5790 .codec_dai_name = "snd-soc-dummy-dai",
5791 .codec_name = "snd-soc-dummy",
5792 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5793 SND_SOC_DPCM_TRIGGER_POST},
5794 .ignore_suspend = 1,
5795 /* this dainlink has playback support */
5796 .ignore_pmdown_time = 1,
5797 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5798 .ops = &msm_fe_qos_ops,
5799 },
5800 {/* hw:x,10 */
5801 .name = "Listen 1 Audio Service",
5802 .stream_name = "Listen 1 Audio Service",
5803 .cpu_dai_name = "LSM1",
5804 .platform_name = "msm-lsm-client",
5805 .dynamic = 1,
5806 .dpcm_capture = 1,
5807 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5808 SND_SOC_DPCM_TRIGGER_POST },
5809 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5810 .ignore_suspend = 1,
5811 .codec_dai_name = "snd-soc-dummy-dai",
5812 .codec_name = "snd-soc-dummy",
5813 .id = MSM_FRONTEND_DAI_LSM1,
5814 },
5815 /* Multiple Tunnel instances */
5816 {/* hw:x,11 */
5817 .name = MSM_DAILINK_NAME(Compress2),
5818 .stream_name = "Compress2",
5819 .cpu_dai_name = "MultiMedia7",
5820 .platform_name = "msm-compress-dsp",
5821 .dynamic = 1,
5822 .dpcm_playback = 1,
5823 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5824 SND_SOC_DPCM_TRIGGER_POST},
5825 .codec_dai_name = "snd-soc-dummy-dai",
5826 .codec_name = "snd-soc-dummy",
5827 .ignore_suspend = 1,
5828 .ignore_pmdown_time = 1,
5829 /* this dainlink has playback support */
5830 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5831 },
5832 {/* hw:x,12 */
5833 .name = MSM_DAILINK_NAME(MultiMedia10),
5834 .stream_name = "MultiMedia10",
5835 .cpu_dai_name = "MultiMedia10",
5836 .platform_name = "msm-pcm-dsp.1",
5837 .dynamic = 1,
5838 .dpcm_playback = 1,
5839 .dpcm_capture = 1,
5840 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5841 SND_SOC_DPCM_TRIGGER_POST},
5842 .codec_dai_name = "snd-soc-dummy-dai",
5843 .codec_name = "snd-soc-dummy",
5844 .ignore_suspend = 1,
5845 .ignore_pmdown_time = 1,
5846 /* this dainlink has playback support */
5847 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5848 },
5849 {/* hw:x,13 */
5850 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5851 .stream_name = "MM_NOIRQ",
5852 .cpu_dai_name = "MultiMedia8",
5853 .platform_name = "msm-pcm-dsp-noirq",
5854 .dynamic = 1,
5855 .dpcm_playback = 1,
5856 .dpcm_capture = 1,
5857 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5858 SND_SOC_DPCM_TRIGGER_POST},
5859 .codec_dai_name = "snd-soc-dummy-dai",
5860 .codec_name = "snd-soc-dummy",
5861 .ignore_suspend = 1,
5862 .ignore_pmdown_time = 1,
5863 /* this dainlink has playback support */
5864 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5865 .ops = &msm_fe_qos_ops,
5866 },
5867 /* HDMI Hostless */
5868 {/* hw:x,14 */
5869 .name = "HDMI_RX_HOSTLESS",
5870 .stream_name = "HDMI_RX_HOSTLESS",
5871 .cpu_dai_name = "HDMI_HOSTLESS",
5872 .platform_name = "msm-pcm-hostless",
5873 .dynamic = 1,
5874 .dpcm_playback = 1,
5875 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5876 SND_SOC_DPCM_TRIGGER_POST},
5877 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5878 .ignore_suspend = 1,
5879 .ignore_pmdown_time = 1,
5880 .codec_dai_name = "snd-soc-dummy-dai",
5881 .codec_name = "snd-soc-dummy",
5882 },
5883 {/* hw:x,15 */
5884 .name = "VoiceMMode2",
5885 .stream_name = "VoiceMMode2",
5886 .cpu_dai_name = "VoiceMMode2",
5887 .platform_name = "msm-pcm-voice",
5888 .dynamic = 1,
5889 .dpcm_playback = 1,
5890 .dpcm_capture = 1,
5891 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5892 SND_SOC_DPCM_TRIGGER_POST},
5893 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5894 .ignore_suspend = 1,
5895 .ignore_pmdown_time = 1,
5896 .codec_dai_name = "snd-soc-dummy-dai",
5897 .codec_name = "snd-soc-dummy",
5898 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5899 },
5900 /* LSM FE */
5901 {/* hw:x,16 */
5902 .name = "Listen 2 Audio Service",
5903 .stream_name = "Listen 2 Audio Service",
5904 .cpu_dai_name = "LSM2",
5905 .platform_name = "msm-lsm-client",
5906 .dynamic = 1,
5907 .dpcm_capture = 1,
5908 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5909 SND_SOC_DPCM_TRIGGER_POST },
5910 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5911 .ignore_suspend = 1,
5912 .codec_dai_name = "snd-soc-dummy-dai",
5913 .codec_name = "snd-soc-dummy",
5914 .id = MSM_FRONTEND_DAI_LSM2,
5915 },
5916 {/* hw:x,17 */
5917 .name = "Listen 3 Audio Service",
5918 .stream_name = "Listen 3 Audio Service",
5919 .cpu_dai_name = "LSM3",
5920 .platform_name = "msm-lsm-client",
5921 .dynamic = 1,
5922 .dpcm_capture = 1,
5923 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5924 SND_SOC_DPCM_TRIGGER_POST },
5925 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5926 .ignore_suspend = 1,
5927 .codec_dai_name = "snd-soc-dummy-dai",
5928 .codec_name = "snd-soc-dummy",
5929 .id = MSM_FRONTEND_DAI_LSM3,
5930 },
5931 {/* hw:x,18 */
5932 .name = "Listen 4 Audio Service",
5933 .stream_name = "Listen 4 Audio Service",
5934 .cpu_dai_name = "LSM4",
5935 .platform_name = "msm-lsm-client",
5936 .dynamic = 1,
5937 .dpcm_capture = 1,
5938 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5939 SND_SOC_DPCM_TRIGGER_POST },
5940 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5941 .ignore_suspend = 1,
5942 .codec_dai_name = "snd-soc-dummy-dai",
5943 .codec_name = "snd-soc-dummy",
5944 .id = MSM_FRONTEND_DAI_LSM4,
5945 },
5946 {/* hw:x,19 */
5947 .name = "Listen 5 Audio Service",
5948 .stream_name = "Listen 5 Audio Service",
5949 .cpu_dai_name = "LSM5",
5950 .platform_name = "msm-lsm-client",
5951 .dynamic = 1,
5952 .dpcm_capture = 1,
5953 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5954 SND_SOC_DPCM_TRIGGER_POST },
5955 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5956 .ignore_suspend = 1,
5957 .codec_dai_name = "snd-soc-dummy-dai",
5958 .codec_name = "snd-soc-dummy",
5959 .id = MSM_FRONTEND_DAI_LSM5,
5960 },
5961 {/* hw:x,20 */
5962 .name = "Listen 6 Audio Service",
5963 .stream_name = "Listen 6 Audio Service",
5964 .cpu_dai_name = "LSM6",
5965 .platform_name = "msm-lsm-client",
5966 .dynamic = 1,
5967 .dpcm_capture = 1,
5968 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5969 SND_SOC_DPCM_TRIGGER_POST },
5970 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5971 .ignore_suspend = 1,
5972 .codec_dai_name = "snd-soc-dummy-dai",
5973 .codec_name = "snd-soc-dummy",
5974 .id = MSM_FRONTEND_DAI_LSM6,
5975 },
5976 {/* hw:x,21 */
5977 .name = "Listen 7 Audio Service",
5978 .stream_name = "Listen 7 Audio Service",
5979 .cpu_dai_name = "LSM7",
5980 .platform_name = "msm-lsm-client",
5981 .dynamic = 1,
5982 .dpcm_capture = 1,
5983 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5984 SND_SOC_DPCM_TRIGGER_POST },
5985 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5986 .ignore_suspend = 1,
5987 .codec_dai_name = "snd-soc-dummy-dai",
5988 .codec_name = "snd-soc-dummy",
5989 .id = MSM_FRONTEND_DAI_LSM7,
5990 },
5991 {/* hw:x,22 */
5992 .name = "Listen 8 Audio Service",
5993 .stream_name = "Listen 8 Audio Service",
5994 .cpu_dai_name = "LSM8",
5995 .platform_name = "msm-lsm-client",
5996 .dynamic = 1,
5997 .dpcm_capture = 1,
5998 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5999 SND_SOC_DPCM_TRIGGER_POST },
6000 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6001 .ignore_suspend = 1,
6002 .codec_dai_name = "snd-soc-dummy-dai",
6003 .codec_name = "snd-soc-dummy",
6004 .id = MSM_FRONTEND_DAI_LSM8,
6005 },
6006 {/* hw:x,23 */
6007 .name = MSM_DAILINK_NAME(Media9),
6008 .stream_name = "MultiMedia9",
6009 .cpu_dai_name = "MultiMedia9",
6010 .platform_name = "msm-pcm-dsp.0",
6011 .dynamic = 1,
6012 .dpcm_playback = 1,
6013 .dpcm_capture = 1,
6014 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6015 SND_SOC_DPCM_TRIGGER_POST},
6016 .codec_dai_name = "snd-soc-dummy-dai",
6017 .codec_name = "snd-soc-dummy",
6018 .ignore_suspend = 1,
6019 /* this dainlink has playback support */
6020 .ignore_pmdown_time = 1,
6021 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6022 },
6023 {/* hw:x,24 */
6024 .name = MSM_DAILINK_NAME(Compress4),
6025 .stream_name = "Compress4",
6026 .cpu_dai_name = "MultiMedia11",
6027 .platform_name = "msm-compress-dsp",
6028 .dynamic = 1,
6029 .dpcm_playback = 1,
6030 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6031 SND_SOC_DPCM_TRIGGER_POST},
6032 .codec_dai_name = "snd-soc-dummy-dai",
6033 .codec_name = "snd-soc-dummy",
6034 .ignore_suspend = 1,
6035 .ignore_pmdown_time = 1,
6036 /* this dainlink has playback support */
6037 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6038 },
6039 {/* hw:x,25 */
6040 .name = MSM_DAILINK_NAME(Compress5),
6041 .stream_name = "Compress5",
6042 .cpu_dai_name = "MultiMedia12",
6043 .platform_name = "msm-compress-dsp",
6044 .dynamic = 1,
6045 .dpcm_playback = 1,
6046 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6047 SND_SOC_DPCM_TRIGGER_POST},
6048 .codec_dai_name = "snd-soc-dummy-dai",
6049 .codec_name = "snd-soc-dummy",
6050 .ignore_suspend = 1,
6051 .ignore_pmdown_time = 1,
6052 /* this dainlink has playback support */
6053 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6054 },
6055 {/* hw:x,26 */
6056 .name = MSM_DAILINK_NAME(Compress6),
6057 .stream_name = "Compress6",
6058 .cpu_dai_name = "MultiMedia13",
6059 .platform_name = "msm-compress-dsp",
6060 .dynamic = 1,
6061 .dpcm_playback = 1,
6062 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6063 SND_SOC_DPCM_TRIGGER_POST},
6064 .codec_dai_name = "snd-soc-dummy-dai",
6065 .codec_name = "snd-soc-dummy",
6066 .ignore_suspend = 1,
6067 .ignore_pmdown_time = 1,
6068 /* this dainlink has playback support */
6069 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6070 },
6071 {/* hw:x,27 */
6072 .name = MSM_DAILINK_NAME(Compress7),
6073 .stream_name = "Compress7",
6074 .cpu_dai_name = "MultiMedia14",
6075 .platform_name = "msm-compress-dsp",
6076 .dynamic = 1,
6077 .dpcm_playback = 1,
6078 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6079 SND_SOC_DPCM_TRIGGER_POST},
6080 .codec_dai_name = "snd-soc-dummy-dai",
6081 .codec_name = "snd-soc-dummy",
6082 .ignore_suspend = 1,
6083 .ignore_pmdown_time = 1,
6084 /* this dainlink has playback support */
6085 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6086 },
6087 {/* hw:x,28 */
6088 .name = MSM_DAILINK_NAME(Compress8),
6089 .stream_name = "Compress8",
6090 .cpu_dai_name = "MultiMedia15",
6091 .platform_name = "msm-compress-dsp",
6092 .dynamic = 1,
6093 .dpcm_playback = 1,
6094 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6095 SND_SOC_DPCM_TRIGGER_POST},
6096 .codec_dai_name = "snd-soc-dummy-dai",
6097 .codec_name = "snd-soc-dummy",
6098 .ignore_suspend = 1,
6099 .ignore_pmdown_time = 1,
6100 /* this dainlink has playback support */
6101 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6102 },
6103 {/* hw:x,29 */
6104 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6105 .stream_name = "MM_NOIRQ_2",
6106 .cpu_dai_name = "MultiMedia16",
6107 .platform_name = "msm-pcm-dsp-noirq",
6108 .dynamic = 1,
6109 .dpcm_playback = 1,
6110 .dpcm_capture = 1,
6111 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6112 SND_SOC_DPCM_TRIGGER_POST},
6113 .codec_dai_name = "snd-soc-dummy-dai",
6114 .codec_name = "snd-soc-dummy",
6115 .ignore_suspend = 1,
6116 .ignore_pmdown_time = 1,
6117 /* this dainlink has playback support */
6118 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -07006119 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006120 },
6121 {/* hw:x,30 */
6122 .name = "CDC_DMA Hostless",
6123 .stream_name = "CDC_DMA Hostless",
6124 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6125 .platform_name = "msm-pcm-hostless",
6126 .dynamic = 1,
6127 .dpcm_playback = 1,
6128 .dpcm_capture = 1,
6129 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6130 SND_SOC_DPCM_TRIGGER_POST},
6131 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6132 .ignore_suspend = 1,
6133 /* this dailink has playback support */
6134 .ignore_pmdown_time = 1,
6135 .codec_dai_name = "snd-soc-dummy-dai",
6136 .codec_name = "snd-soc-dummy",
6137 },
6138 {/* hw:x,31 */
6139 .name = "TX3_CDC_DMA Hostless",
6140 .stream_name = "TX3_CDC_DMA Hostless",
6141 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6142 .platform_name = "msm-pcm-hostless",
6143 .dynamic = 1,
6144 .dpcm_capture = 1,
6145 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6146 SND_SOC_DPCM_TRIGGER_POST},
6147 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6148 .ignore_suspend = 1,
6149 .codec_dai_name = "snd-soc-dummy-dai",
6150 .codec_name = "snd-soc-dummy",
6151 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006152 {/* hw:x,32 */
6153 .name = "Tertiary MI2S TX_Hostless",
6154 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6155 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6156 .platform_name = "msm-pcm-hostless",
6157 .dynamic = 1,
6158 .dpcm_capture = 1,
6159 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6160 SND_SOC_DPCM_TRIGGER_POST},
6161 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6162 .ignore_suspend = 1,
6163 .ignore_pmdown_time = 1,
6164 .codec_dai_name = "snd-soc-dummy-dai",
6165 .codec_name = "snd-soc-dummy",
6166 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006167};
6168
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006169static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006170 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006171 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6172 .stream_name = "WSA CDC DMA0 Capture",
6173 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6174 .platform_name = "msm-pcm-hostless",
6175 .codec_name = "bolero_codec",
6176 .codec_dai_name = "wsa_macro_vifeedback",
6177 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6178 .be_hw_params_fixup = msm_be_hw_params_fixup,
6179 .ignore_suspend = 1,
6180 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6181 .ops = &msm_cdc_dma_be_ops,
6182 },
6183};
6184
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006185static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006186 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006187 .name = MSM_DAILINK_NAME(ASM Loopback),
6188 .stream_name = "MultiMedia6",
6189 .cpu_dai_name = "MultiMedia6",
6190 .platform_name = "msm-pcm-loopback",
6191 .dynamic = 1,
6192 .dpcm_playback = 1,
6193 .dpcm_capture = 1,
6194 .codec_dai_name = "snd-soc-dummy-dai",
6195 .codec_name = "snd-soc-dummy",
6196 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6197 SND_SOC_DPCM_TRIGGER_POST},
6198 .ignore_suspend = 1,
6199 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6200 .ignore_pmdown_time = 1,
6201 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6202 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006203 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006204 .name = "USB Audio Hostless",
6205 .stream_name = "USB Audio Hostless",
6206 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6207 .platform_name = "msm-pcm-hostless",
6208 .dynamic = 1,
6209 .dpcm_playback = 1,
6210 .dpcm_capture = 1,
6211 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6212 SND_SOC_DPCM_TRIGGER_POST},
6213 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6214 .ignore_suspend = 1,
6215 .ignore_pmdown_time = 1,
6216 .codec_dai_name = "snd-soc-dummy-dai",
6217 .codec_name = "snd-soc-dummy",
6218 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006219 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006220 .name = "SLIMBUS_7 Hostless",
6221 .stream_name = "SLIMBUS_7 Hostless",
6222 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6223 .platform_name = "msm-pcm-hostless",
6224 .dynamic = 1,
6225 .dpcm_capture = 1,
6226 .dpcm_playback = 1,
6227 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6228 SND_SOC_DPCM_TRIGGER_POST},
6229 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6230 .ignore_suspend = 1,
6231 .ignore_pmdown_time = 1,
6232 .codec_dai_name = "snd-soc-dummy-dai",
6233 .codec_name = "snd-soc-dummy",
6234 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006235 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006236 .name = "Compress Capture",
6237 .stream_name = "Compress9",
6238 .cpu_dai_name = "MultiMedia17",
6239 .platform_name = "msm-compress-dsp",
6240 .dynamic = 1,
6241 .dpcm_capture = 1,
6242 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6243 SND_SOC_DPCM_TRIGGER_POST},
6244 .codec_dai_name = "snd-soc-dummy-dai",
6245 .codec_name = "snd-soc-dummy",
6246 .ignore_suspend = 1,
6247 .ignore_pmdown_time = 1,
6248 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6249 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306250 {/* hw:x,38 */
6251 .name = "SLIMBUS_8 Hostless",
6252 .stream_name = "SLIMBUS_8 Hostless",
6253 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6254 .platform_name = "msm-pcm-hostless",
6255 .dynamic = 1,
6256 .dpcm_capture = 1,
6257 .dpcm_playback = 1,
6258 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6259 SND_SOC_DPCM_TRIGGER_POST},
6260 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6261 .ignore_suspend = 1,
6262 .ignore_pmdown_time = 1,
6263 .codec_dai_name = "snd-soc-dummy-dai",
6264 .codec_name = "snd-soc-dummy",
6265 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -07006266 {/* hw:x,39 */
6267 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6268 .stream_name = "TX CDC DMA5 Capture",
6269 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6270 .platform_name = "msm-pcm-hostless",
6271 .codec_name = "bolero_codec",
6272 .codec_dai_name = "tx_macro_tx3",
6273 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6274 .be_hw_params_fixup = msm_be_hw_params_fixup,
6275 .ignore_suspend = 1,
6276 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6277 .ops = &msm_cdc_dma_be_ops,
6278 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006279};
6280
6281static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6282 /* Backend AFE DAI Links */
6283 {
6284 .name = LPASS_BE_AFE_PCM_RX,
6285 .stream_name = "AFE Playback",
6286 .cpu_dai_name = "msm-dai-q6-dev.224",
6287 .platform_name = "msm-pcm-routing",
6288 .codec_name = "msm-stub-codec.1",
6289 .codec_dai_name = "msm-stub-rx",
6290 .no_pcm = 1,
6291 .dpcm_playback = 1,
6292 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6293 .be_hw_params_fixup = msm_be_hw_params_fixup,
6294 /* this dainlink has playback support */
6295 .ignore_pmdown_time = 1,
6296 .ignore_suspend = 1,
6297 },
6298 {
6299 .name = LPASS_BE_AFE_PCM_TX,
6300 .stream_name = "AFE Capture",
6301 .cpu_dai_name = "msm-dai-q6-dev.225",
6302 .platform_name = "msm-pcm-routing",
6303 .codec_name = "msm-stub-codec.1",
6304 .codec_dai_name = "msm-stub-tx",
6305 .no_pcm = 1,
6306 .dpcm_capture = 1,
6307 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6308 .be_hw_params_fixup = msm_be_hw_params_fixup,
6309 .ignore_suspend = 1,
6310 },
6311 /* Incall Record Uplink BACK END DAI Link */
6312 {
6313 .name = LPASS_BE_INCALL_RECORD_TX,
6314 .stream_name = "Voice Uplink Capture",
6315 .cpu_dai_name = "msm-dai-q6-dev.32772",
6316 .platform_name = "msm-pcm-routing",
6317 .codec_name = "msm-stub-codec.1",
6318 .codec_dai_name = "msm-stub-tx",
6319 .no_pcm = 1,
6320 .dpcm_capture = 1,
6321 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6322 .be_hw_params_fixup = msm_be_hw_params_fixup,
6323 .ignore_suspend = 1,
6324 },
6325 /* Incall Record Downlink BACK END DAI Link */
6326 {
6327 .name = LPASS_BE_INCALL_RECORD_RX,
6328 .stream_name = "Voice Downlink Capture",
6329 .cpu_dai_name = "msm-dai-q6-dev.32771",
6330 .platform_name = "msm-pcm-routing",
6331 .codec_name = "msm-stub-codec.1",
6332 .codec_dai_name = "msm-stub-tx",
6333 .no_pcm = 1,
6334 .dpcm_capture = 1,
6335 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6336 .be_hw_params_fixup = msm_be_hw_params_fixup,
6337 .ignore_suspend = 1,
6338 },
6339 /* Incall Music BACK END DAI Link */
6340 {
6341 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6342 .stream_name = "Voice Farend Playback",
6343 .cpu_dai_name = "msm-dai-q6-dev.32773",
6344 .platform_name = "msm-pcm-routing",
6345 .codec_name = "msm-stub-codec.1",
6346 .codec_dai_name = "msm-stub-rx",
6347 .no_pcm = 1,
6348 .dpcm_playback = 1,
6349 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6350 .be_hw_params_fixup = msm_be_hw_params_fixup,
6351 .ignore_suspend = 1,
6352 .ignore_pmdown_time = 1,
6353 },
6354 /* Incall Music 2 BACK END DAI Link */
6355 {
6356 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6357 .stream_name = "Voice2 Farend Playback",
6358 .cpu_dai_name = "msm-dai-q6-dev.32770",
6359 .platform_name = "msm-pcm-routing",
6360 .codec_name = "msm-stub-codec.1",
6361 .codec_dai_name = "msm-stub-rx",
6362 .no_pcm = 1,
6363 .dpcm_playback = 1,
6364 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6365 .be_hw_params_fixup = msm_be_hw_params_fixup,
6366 .ignore_suspend = 1,
6367 .ignore_pmdown_time = 1,
6368 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +05306369 /* Proxy Tx BACK END DAI Link */
6370 {
6371 .name = LPASS_BE_PROXY_TX,
6372 .stream_name = "Proxy Capture",
6373 .cpu_dai_name = "msm-dai-q6-dev.8195",
6374 .platform_name = "msm-pcm-routing",
6375 .codec_name = "msm-stub-codec.1",
6376 .codec_dai_name = "msm-stub-tx",
6377 .no_pcm = 1,
6378 .dpcm_capture = 1,
6379 .id = MSM_BACKEND_DAI_PROXY_TX,
6380 .ignore_suspend = 1,
6381 },
6382 /* Proxy Rx BACK END DAI Link */
6383 {
6384 .name = LPASS_BE_PROXY_RX,
6385 .stream_name = "Proxy Playback",
6386 .cpu_dai_name = "msm-dai-q6-dev.8194",
6387 .platform_name = "msm-pcm-routing",
6388 .codec_name = "msm-stub-codec.1",
6389 .codec_dai_name = "msm-stub-rx",
6390 .no_pcm = 1,
6391 .dpcm_playback = 1,
6392 .id = MSM_BACKEND_DAI_PROXY_RX,
6393 .ignore_pmdown_time = 1,
6394 .ignore_suspend = 1,
6395 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006396 {
6397 .name = LPASS_BE_USB_AUDIO_RX,
6398 .stream_name = "USB Audio Playback",
6399 .cpu_dai_name = "msm-dai-q6-dev.28672",
6400 .platform_name = "msm-pcm-routing",
6401 .codec_name = "msm-stub-codec.1",
6402 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306403 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006404 .no_pcm = 1,
6405 .dpcm_playback = 1,
6406 .id = MSM_BACKEND_DAI_USB_RX,
6407 .be_hw_params_fixup = msm_be_hw_params_fixup,
6408 .ignore_pmdown_time = 1,
6409 .ignore_suspend = 1,
6410 },
6411 {
6412 .name = LPASS_BE_USB_AUDIO_TX,
6413 .stream_name = "USB Audio Capture",
6414 .cpu_dai_name = "msm-dai-q6-dev.28673",
6415 .platform_name = "msm-pcm-routing",
6416 .codec_name = "msm-stub-codec.1",
6417 .codec_dai_name = "msm-stub-tx",
6418 .no_pcm = 1,
6419 .dpcm_capture = 1,
6420 .id = MSM_BACKEND_DAI_USB_TX,
6421 .be_hw_params_fixup = msm_be_hw_params_fixup,
6422 .ignore_suspend = 1,
6423 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05306424};
6425
6426
6427static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006428 {
6429 .name = LPASS_BE_PRI_TDM_RX_0,
6430 .stream_name = "Primary TDM0 Playback",
6431 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6432 .platform_name = "msm-pcm-routing",
6433 .codec_name = "msm-stub-codec.1",
6434 .codec_dai_name = "msm-stub-rx",
6435 .no_pcm = 1,
6436 .dpcm_playback = 1,
6437 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6438 .be_hw_params_fixup = msm_be_hw_params_fixup,
6439 .ops = &kona_tdm_be_ops,
6440 .ignore_suspend = 1,
6441 .ignore_pmdown_time = 1,
6442 },
6443 {
6444 .name = LPASS_BE_PRI_TDM_TX_0,
6445 .stream_name = "Primary TDM0 Capture",
6446 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6447 .platform_name = "msm-pcm-routing",
6448 .codec_name = "msm-stub-codec.1",
6449 .codec_dai_name = "msm-stub-tx",
6450 .no_pcm = 1,
6451 .dpcm_capture = 1,
6452 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6453 .be_hw_params_fixup = msm_be_hw_params_fixup,
6454 .ops = &kona_tdm_be_ops,
6455 .ignore_suspend = 1,
6456 },
6457 {
6458 .name = LPASS_BE_SEC_TDM_RX_0,
6459 .stream_name = "Secondary TDM0 Playback",
6460 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6461 .platform_name = "msm-pcm-routing",
6462 .codec_name = "msm-stub-codec.1",
6463 .codec_dai_name = "msm-stub-rx",
6464 .no_pcm = 1,
6465 .dpcm_playback = 1,
6466 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6467 .be_hw_params_fixup = msm_be_hw_params_fixup,
6468 .ops = &kona_tdm_be_ops,
6469 .ignore_suspend = 1,
6470 .ignore_pmdown_time = 1,
6471 },
6472 {
6473 .name = LPASS_BE_SEC_TDM_TX_0,
6474 .stream_name = "Secondary TDM0 Capture",
6475 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6476 .platform_name = "msm-pcm-routing",
6477 .codec_name = "msm-stub-codec.1",
6478 .codec_dai_name = "msm-stub-tx",
6479 .no_pcm = 1,
6480 .dpcm_capture = 1,
6481 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6482 .be_hw_params_fixup = msm_be_hw_params_fixup,
6483 .ops = &kona_tdm_be_ops,
6484 .ignore_suspend = 1,
6485 },
6486 {
6487 .name = LPASS_BE_TERT_TDM_RX_0,
6488 .stream_name = "Tertiary TDM0 Playback",
6489 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6490 .platform_name = "msm-pcm-routing",
6491 .codec_name = "msm-stub-codec.1",
6492 .codec_dai_name = "msm-stub-rx",
6493 .no_pcm = 1,
6494 .dpcm_playback = 1,
6495 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6496 .be_hw_params_fixup = msm_be_hw_params_fixup,
6497 .ops = &kona_tdm_be_ops,
6498 .ignore_suspend = 1,
6499 .ignore_pmdown_time = 1,
6500 },
6501 {
6502 .name = LPASS_BE_TERT_TDM_TX_0,
6503 .stream_name = "Tertiary TDM0 Capture",
6504 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6505 .platform_name = "msm-pcm-routing",
6506 .codec_name = "msm-stub-codec.1",
6507 .codec_dai_name = "msm-stub-tx",
6508 .no_pcm = 1,
6509 .dpcm_capture = 1,
6510 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6511 .be_hw_params_fixup = msm_be_hw_params_fixup,
6512 .ops = &kona_tdm_be_ops,
6513 .ignore_suspend = 1,
6514 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006515 {
6516 .name = LPASS_BE_QUAT_TDM_RX_0,
6517 .stream_name = "Quaternary TDM0 Playback",
6518 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6519 .platform_name = "msm-pcm-routing",
6520 .codec_name = "msm-stub-codec.1",
6521 .codec_dai_name = "msm-stub-rx",
6522 .no_pcm = 1,
6523 .dpcm_playback = 1,
6524 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6525 .be_hw_params_fixup = msm_be_hw_params_fixup,
6526 .ops = &kona_tdm_be_ops,
6527 .ignore_suspend = 1,
6528 .ignore_pmdown_time = 1,
6529 },
6530 {
6531 .name = LPASS_BE_QUAT_TDM_TX_0,
6532 .stream_name = "Quaternary TDM0 Capture",
6533 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6534 .platform_name = "msm-pcm-routing",
6535 .codec_name = "msm-stub-codec.1",
6536 .codec_dai_name = "msm-stub-tx",
6537 .no_pcm = 1,
6538 .dpcm_capture = 1,
6539 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6540 .be_hw_params_fixup = msm_be_hw_params_fixup,
6541 .ops = &kona_tdm_be_ops,
6542 .ignore_suspend = 1,
6543 },
6544 {
6545 .name = LPASS_BE_QUIN_TDM_RX_0,
6546 .stream_name = "Quinary TDM0 Playback",
6547 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6548 .platform_name = "msm-pcm-routing",
6549 .codec_name = "msm-stub-codec.1",
6550 .codec_dai_name = "msm-stub-rx",
6551 .no_pcm = 1,
6552 .dpcm_playback = 1,
6553 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6554 .be_hw_params_fixup = msm_be_hw_params_fixup,
6555 .ops = &kona_tdm_be_ops,
6556 .ignore_suspend = 1,
6557 .ignore_pmdown_time = 1,
6558 },
6559 {
6560 .name = LPASS_BE_QUIN_TDM_TX_0,
6561 .stream_name = "Quinary TDM0 Capture",
6562 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6563 .platform_name = "msm-pcm-routing",
6564 .codec_name = "msm-stub-codec.1",
6565 .codec_dai_name = "msm-stub-tx",
6566 .no_pcm = 1,
6567 .dpcm_capture = 1,
6568 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6569 .be_hw_params_fixup = msm_be_hw_params_fixup,
6570 .ops = &kona_tdm_be_ops,
6571 .ignore_suspend = 1,
6572 },
6573 {
6574 .name = LPASS_BE_SEN_TDM_RX_0,
6575 .stream_name = "Senary TDM0 Playback",
6576 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6577 .platform_name = "msm-pcm-routing",
6578 .codec_name = "msm-stub-codec.1",
6579 .codec_dai_name = "msm-stub-rx",
6580 .no_pcm = 1,
6581 .dpcm_playback = 1,
6582 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6583 .be_hw_params_fixup = msm_be_hw_params_fixup,
6584 .ops = &kona_tdm_be_ops,
6585 .ignore_suspend = 1,
6586 .ignore_pmdown_time = 1,
6587 },
6588 {
6589 .name = LPASS_BE_SEN_TDM_TX_0,
6590 .stream_name = "Senary TDM0 Capture",
6591 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "msm-stub-codec.1",
6594 .codec_dai_name = "msm-stub-tx",
6595 .no_pcm = 1,
6596 .dpcm_capture = 1,
6597 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ops = &kona_tdm_be_ops,
6600 .ignore_suspend = 1,
6601 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006602};
6603
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006604static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6605 {
6606 .name = LPASS_BE_SLIMBUS_7_RX,
6607 .stream_name = "Slimbus7 Playback",
6608 .cpu_dai_name = "msm-dai-q6-dev.16398",
6609 .platform_name = "msm-pcm-routing",
6610 .codec_name = "btfmslim_slave",
6611 /* BT codec driver determines capabilities based on
6612 * dai name, bt codecdai name should always contains
6613 * supported usecase information
6614 */
6615 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6616 .no_pcm = 1,
6617 .dpcm_playback = 1,
6618 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6619 .be_hw_params_fixup = msm_be_hw_params_fixup,
6620 .init = &msm_wcn_init,
6621 .ops = &msm_wcn_ops,
6622 /* dai link has playback support */
6623 .ignore_pmdown_time = 1,
6624 .ignore_suspend = 1,
6625 },
6626 {
6627 .name = LPASS_BE_SLIMBUS_7_TX,
6628 .stream_name = "Slimbus7 Capture",
6629 .cpu_dai_name = "msm-dai-q6-dev.16399",
6630 .platform_name = "msm-pcm-routing",
6631 .codec_name = "btfmslim_slave",
6632 .codec_dai_name = "btfm_bt_sco_slim_tx",
6633 .no_pcm = 1,
6634 .dpcm_capture = 1,
6635 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6636 .be_hw_params_fixup = msm_be_hw_params_fixup,
6637 .ops = &msm_wcn_ops,
6638 .ignore_suspend = 1,
6639 },
6640};
6641
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306642static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6643 {
6644 .name = LPASS_BE_SLIMBUS_7_RX,
6645 .stream_name = "Slimbus7 Playback",
6646 .cpu_dai_name = "msm-dai-q6-dev.16398",
6647 .platform_name = "msm-pcm-routing",
6648 .codec_name = "btfmslim_slave",
6649 /* BT codec driver determines capabilities based on
6650 * dai name, bt codecdai name should always contains
6651 * supported usecase information
6652 */
6653 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6654 .no_pcm = 1,
6655 .dpcm_playback = 1,
6656 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6657 .be_hw_params_fixup = msm_be_hw_params_fixup,
6658 .init = &msm_wcn_init_lito,
6659 .ops = &msm_wcn_ops_lito,
6660 /* dai link has playback support */
6661 .ignore_pmdown_time = 1,
6662 .ignore_suspend = 1,
6663 },
6664 {
6665 .name = LPASS_BE_SLIMBUS_7_TX,
6666 .stream_name = "Slimbus7 Capture",
6667 .cpu_dai_name = "msm-dai-q6-dev.16399",
6668 .platform_name = "msm-pcm-routing",
6669 .codec_name = "btfmslim_slave",
6670 .codec_dai_name = "btfm_bt_sco_slim_tx",
6671 .no_pcm = 1,
6672 .dpcm_capture = 1,
6673 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6674 .be_hw_params_fixup = msm_be_hw_params_fixup,
6675 .ops = &msm_wcn_ops_lito,
6676 .ignore_suspend = 1,
6677 },
6678 {
6679 .name = LPASS_BE_SLIMBUS_8_TX,
6680 .stream_name = "Slimbus8 Capture",
6681 .cpu_dai_name = "msm-dai-q6-dev.16401",
6682 .platform_name = "msm-pcm-routing",
6683 .codec_name = "btfmslim_slave",
6684 .codec_dai_name = "btfm_fm_slim_tx",
6685 .no_pcm = 1,
6686 .dpcm_capture = 1,
6687 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6688 .be_hw_params_fixup = msm_be_hw_params_fixup,
6689 .ops = &msm_wcn_ops_lito,
6690 .ignore_suspend = 1,
6691 },
6692};
6693
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006694static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6695 /* DISP PORT BACK END DAI Link */
6696 {
6697 .name = LPASS_BE_DISPLAY_PORT,
6698 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006699 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006700 .platform_name = "msm-pcm-routing",
6701 .codec_name = "msm-ext-disp-audio-codec-rx",
6702 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6703 .no_pcm = 1,
6704 .dpcm_playback = 1,
6705 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6706 .be_hw_params_fixup = msm_be_hw_params_fixup,
6707 .ignore_pmdown_time = 1,
6708 .ignore_suspend = 1,
6709 },
6710 /* DISP PORT 1 BACK END DAI Link */
6711 {
6712 .name = LPASS_BE_DISPLAY_PORT1,
6713 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006714 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006715 .platform_name = "msm-pcm-routing",
6716 .codec_name = "msm-ext-disp-audio-codec-rx",
6717 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6718 .no_pcm = 1,
6719 .dpcm_playback = 1,
6720 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6721 .be_hw_params_fixup = msm_be_hw_params_fixup,
6722 .ignore_pmdown_time = 1,
6723 .ignore_suspend = 1,
6724 },
6725};
6726
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006727static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6728 {
6729 .name = LPASS_BE_PRI_MI2S_RX,
6730 .stream_name = "Primary MI2S Playback",
6731 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6732 .platform_name = "msm-pcm-routing",
6733 .codec_name = "msm-stub-codec.1",
6734 .codec_dai_name = "msm-stub-rx",
6735 .no_pcm = 1,
6736 .dpcm_playback = 1,
6737 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6738 .be_hw_params_fixup = msm_be_hw_params_fixup,
6739 .ops = &msm_mi2s_be_ops,
6740 .ignore_suspend = 1,
6741 .ignore_pmdown_time = 1,
6742 },
6743 {
6744 .name = LPASS_BE_PRI_MI2S_TX,
6745 .stream_name = "Primary MI2S Capture",
6746 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6747 .platform_name = "msm-pcm-routing",
6748 .codec_name = "msm-stub-codec.1",
6749 .codec_dai_name = "msm-stub-tx",
6750 .no_pcm = 1,
6751 .dpcm_capture = 1,
6752 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6753 .be_hw_params_fixup = msm_be_hw_params_fixup,
6754 .ops = &msm_mi2s_be_ops,
6755 .ignore_suspend = 1,
6756 },
6757 {
6758 .name = LPASS_BE_SEC_MI2S_RX,
6759 .stream_name = "Secondary MI2S Playback",
6760 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6761 .platform_name = "msm-pcm-routing",
6762 .codec_name = "msm-stub-codec.1",
6763 .codec_dai_name = "msm-stub-rx",
6764 .no_pcm = 1,
6765 .dpcm_playback = 1,
6766 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6767 .be_hw_params_fixup = msm_be_hw_params_fixup,
6768 .ops = &msm_mi2s_be_ops,
6769 .ignore_suspend = 1,
6770 .ignore_pmdown_time = 1,
6771 },
6772 {
6773 .name = LPASS_BE_SEC_MI2S_TX,
6774 .stream_name = "Secondary MI2S Capture",
6775 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6776 .platform_name = "msm-pcm-routing",
6777 .codec_name = "msm-stub-codec.1",
6778 .codec_dai_name = "msm-stub-tx",
6779 .no_pcm = 1,
6780 .dpcm_capture = 1,
6781 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6782 .be_hw_params_fixup = msm_be_hw_params_fixup,
6783 .ops = &msm_mi2s_be_ops,
6784 .ignore_suspend = 1,
6785 },
6786 {
6787 .name = LPASS_BE_TERT_MI2S_RX,
6788 .stream_name = "Tertiary MI2S Playback",
6789 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6790 .platform_name = "msm-pcm-routing",
6791 .codec_name = "msm-stub-codec.1",
6792 .codec_dai_name = "msm-stub-rx",
6793 .no_pcm = 1,
6794 .dpcm_playback = 1,
6795 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6796 .be_hw_params_fixup = msm_be_hw_params_fixup,
6797 .ops = &msm_mi2s_be_ops,
6798 .ignore_suspend = 1,
6799 .ignore_pmdown_time = 1,
6800 },
6801 {
6802 .name = LPASS_BE_TERT_MI2S_TX,
6803 .stream_name = "Tertiary MI2S Capture",
6804 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6805 .platform_name = "msm-pcm-routing",
6806 .codec_name = "msm-stub-codec.1",
6807 .codec_dai_name = "msm-stub-tx",
6808 .no_pcm = 1,
6809 .dpcm_capture = 1,
6810 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6811 .be_hw_params_fixup = msm_be_hw_params_fixup,
6812 .ops = &msm_mi2s_be_ops,
6813 .ignore_suspend = 1,
6814 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006815 {
6816 .name = LPASS_BE_QUAT_MI2S_RX,
6817 .stream_name = "Quaternary MI2S Playback",
6818 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6819 .platform_name = "msm-pcm-routing",
6820 .codec_name = "msm-stub-codec.1",
6821 .codec_dai_name = "msm-stub-rx",
6822 .no_pcm = 1,
6823 .dpcm_playback = 1,
6824 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6825 .be_hw_params_fixup = msm_be_hw_params_fixup,
6826 .ops = &msm_mi2s_be_ops,
6827 .ignore_suspend = 1,
6828 .ignore_pmdown_time = 1,
6829 },
6830 {
6831 .name = LPASS_BE_QUAT_MI2S_TX,
6832 .stream_name = "Quaternary MI2S Capture",
6833 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6834 .platform_name = "msm-pcm-routing",
6835 .codec_name = "msm-stub-codec.1",
6836 .codec_dai_name = "msm-stub-tx",
6837 .no_pcm = 1,
6838 .dpcm_capture = 1,
6839 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6840 .be_hw_params_fixup = msm_be_hw_params_fixup,
6841 .ops = &msm_mi2s_be_ops,
6842 .ignore_suspend = 1,
6843 },
6844 {
6845 .name = LPASS_BE_QUIN_MI2S_RX,
6846 .stream_name = "Quinary MI2S Playback",
6847 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6848 .platform_name = "msm-pcm-routing",
6849 .codec_name = "msm-stub-codec.1",
6850 .codec_dai_name = "msm-stub-rx",
6851 .no_pcm = 1,
6852 .dpcm_playback = 1,
6853 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6854 .be_hw_params_fixup = msm_be_hw_params_fixup,
6855 .ops = &msm_mi2s_be_ops,
6856 .ignore_suspend = 1,
6857 .ignore_pmdown_time = 1,
6858 },
6859 {
6860 .name = LPASS_BE_QUIN_MI2S_TX,
6861 .stream_name = "Quinary MI2S Capture",
6862 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6863 .platform_name = "msm-pcm-routing",
6864 .codec_name = "msm-stub-codec.1",
6865 .codec_dai_name = "msm-stub-tx",
6866 .no_pcm = 1,
6867 .dpcm_capture = 1,
6868 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6869 .be_hw_params_fixup = msm_be_hw_params_fixup,
6870 .ops = &msm_mi2s_be_ops,
6871 .ignore_suspend = 1,
6872 },
6873 {
6874 .name = LPASS_BE_SENARY_MI2S_RX,
6875 .stream_name = "Senary MI2S Playback",
6876 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6877 .platform_name = "msm-pcm-routing",
6878 .codec_name = "msm-stub-codec.1",
6879 .codec_dai_name = "msm-stub-rx",
6880 .no_pcm = 1,
6881 .dpcm_playback = 1,
6882 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6883 .be_hw_params_fixup = msm_be_hw_params_fixup,
6884 .ops = &msm_mi2s_be_ops,
6885 .ignore_suspend = 1,
6886 .ignore_pmdown_time = 1,
6887 },
6888 {
6889 .name = LPASS_BE_SENARY_MI2S_TX,
6890 .stream_name = "Senary MI2S Capture",
6891 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6892 .platform_name = "msm-pcm-routing",
6893 .codec_name = "msm-stub-codec.1",
6894 .codec_dai_name = "msm-stub-tx",
6895 .no_pcm = 1,
6896 .dpcm_capture = 1,
6897 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6898 .be_hw_params_fixup = msm_be_hw_params_fixup,
6899 .ops = &msm_mi2s_be_ops,
6900 .ignore_suspend = 1,
6901 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006902};
6903
6904static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6905 /* Primary AUX PCM Backend DAI Links */
6906 {
6907 .name = LPASS_BE_AUXPCM_RX,
6908 .stream_name = "AUX PCM Playback",
6909 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6910 .platform_name = "msm-pcm-routing",
6911 .codec_name = "msm-stub-codec.1",
6912 .codec_dai_name = "msm-stub-rx",
6913 .no_pcm = 1,
6914 .dpcm_playback = 1,
6915 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6916 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006917 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006918 .ignore_pmdown_time = 1,
6919 .ignore_suspend = 1,
6920 },
6921 {
6922 .name = LPASS_BE_AUXPCM_TX,
6923 .stream_name = "AUX PCM Capture",
6924 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6925 .platform_name = "msm-pcm-routing",
6926 .codec_name = "msm-stub-codec.1",
6927 .codec_dai_name = "msm-stub-tx",
6928 .no_pcm = 1,
6929 .dpcm_capture = 1,
6930 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6931 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006932 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006933 .ignore_suspend = 1,
6934 },
6935 /* Secondary AUX PCM Backend DAI Links */
6936 {
6937 .name = LPASS_BE_SEC_AUXPCM_RX,
6938 .stream_name = "Sec AUX PCM Playback",
6939 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6940 .platform_name = "msm-pcm-routing",
6941 .codec_name = "msm-stub-codec.1",
6942 .codec_dai_name = "msm-stub-rx",
6943 .no_pcm = 1,
6944 .dpcm_playback = 1,
6945 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6946 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006947 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006948 .ignore_pmdown_time = 1,
6949 .ignore_suspend = 1,
6950 },
6951 {
6952 .name = LPASS_BE_SEC_AUXPCM_TX,
6953 .stream_name = "Sec AUX PCM Capture",
6954 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6955 .platform_name = "msm-pcm-routing",
6956 .codec_name = "msm-stub-codec.1",
6957 .codec_dai_name = "msm-stub-tx",
6958 .no_pcm = 1,
6959 .dpcm_capture = 1,
6960 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6961 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006962 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006963 .ignore_suspend = 1,
6964 },
6965 /* Tertiary AUX PCM Backend DAI Links */
6966 {
6967 .name = LPASS_BE_TERT_AUXPCM_RX,
6968 .stream_name = "Tert AUX PCM Playback",
6969 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6970 .platform_name = "msm-pcm-routing",
6971 .codec_name = "msm-stub-codec.1",
6972 .codec_dai_name = "msm-stub-rx",
6973 .no_pcm = 1,
6974 .dpcm_playback = 1,
6975 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6976 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006977 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006978 .ignore_suspend = 1,
6979 },
6980 {
6981 .name = LPASS_BE_TERT_AUXPCM_TX,
6982 .stream_name = "Tert AUX PCM Capture",
6983 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6984 .platform_name = "msm-pcm-routing",
6985 .codec_name = "msm-stub-codec.1",
6986 .codec_dai_name = "msm-stub-tx",
6987 .no_pcm = 1,
6988 .dpcm_capture = 1,
6989 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6990 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006991 .ops = &kona_aux_be_ops,
6992 .ignore_suspend = 1,
6993 },
6994 /* Quaternary AUX PCM Backend DAI Links */
6995 {
6996 .name = LPASS_BE_QUAT_AUXPCM_RX,
6997 .stream_name = "Quat AUX PCM Playback",
6998 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6999 .platform_name = "msm-pcm-routing",
7000 .codec_name = "msm-stub-codec.1",
7001 .codec_dai_name = "msm-stub-rx",
7002 .no_pcm = 1,
7003 .dpcm_playback = 1,
7004 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7005 .be_hw_params_fixup = msm_be_hw_params_fixup,
7006 .ops = &kona_aux_be_ops,
7007 .ignore_suspend = 1,
7008 },
7009 {
7010 .name = LPASS_BE_QUAT_AUXPCM_TX,
7011 .stream_name = "Quat AUX PCM Capture",
7012 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7013 .platform_name = "msm-pcm-routing",
7014 .codec_name = "msm-stub-codec.1",
7015 .codec_dai_name = "msm-stub-tx",
7016 .no_pcm = 1,
7017 .dpcm_capture = 1,
7018 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7019 .be_hw_params_fixup = msm_be_hw_params_fixup,
7020 .ops = &kona_aux_be_ops,
7021 .ignore_suspend = 1,
7022 },
7023 /* Quinary AUX PCM Backend DAI Links */
7024 {
7025 .name = LPASS_BE_QUIN_AUXPCM_RX,
7026 .stream_name = "Quin AUX PCM Playback",
7027 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7028 .platform_name = "msm-pcm-routing",
7029 .codec_name = "msm-stub-codec.1",
7030 .codec_dai_name = "msm-stub-rx",
7031 .no_pcm = 1,
7032 .dpcm_playback = 1,
7033 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7034 .be_hw_params_fixup = msm_be_hw_params_fixup,
7035 .ops = &kona_aux_be_ops,
7036 .ignore_suspend = 1,
7037 },
7038 {
7039 .name = LPASS_BE_QUIN_AUXPCM_TX,
7040 .stream_name = "Quin AUX PCM Capture",
7041 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7042 .platform_name = "msm-pcm-routing",
7043 .codec_name = "msm-stub-codec.1",
7044 .codec_dai_name = "msm-stub-tx",
7045 .no_pcm = 1,
7046 .dpcm_capture = 1,
7047 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7048 .be_hw_params_fixup = msm_be_hw_params_fixup,
7049 .ops = &kona_aux_be_ops,
7050 .ignore_suspend = 1,
7051 },
7052 /* Senary AUX PCM Backend DAI Links */
7053 {
7054 .name = LPASS_BE_SEN_AUXPCM_RX,
7055 .stream_name = "Sen AUX PCM Playback",
7056 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7057 .platform_name = "msm-pcm-routing",
7058 .codec_name = "msm-stub-codec.1",
7059 .codec_dai_name = "msm-stub-rx",
7060 .no_pcm = 1,
7061 .dpcm_playback = 1,
7062 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
7063 .be_hw_params_fixup = msm_be_hw_params_fixup,
7064 .ops = &kona_aux_be_ops,
7065 .ignore_suspend = 1,
7066 },
7067 {
7068 .name = LPASS_BE_SEN_AUXPCM_TX,
7069 .stream_name = "Sen AUX PCM Capture",
7070 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7071 .platform_name = "msm-pcm-routing",
7072 .codec_name = "msm-stub-codec.1",
7073 .codec_dai_name = "msm-stub-tx",
7074 .no_pcm = 1,
7075 .dpcm_capture = 1,
7076 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
7077 .be_hw_params_fixup = msm_be_hw_params_fixup,
7078 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007079 .ignore_suspend = 1,
7080 },
7081};
7082
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007083static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7084 /* WSA CDC DMA Backend DAI Links */
7085 {
7086 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7087 .stream_name = "WSA CDC DMA0 Playback",
7088 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7089 .platform_name = "msm-pcm-routing",
7090 .codec_name = "bolero_codec",
7091 .codec_dai_name = "wsa_macro_rx1",
7092 .no_pcm = 1,
7093 .dpcm_playback = 1,
7094 .init = &msm_int_audrx_init,
7095 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7096 .be_hw_params_fixup = msm_be_hw_params_fixup,
7097 .ignore_pmdown_time = 1,
7098 .ignore_suspend = 1,
7099 .ops = &msm_cdc_dma_be_ops,
7100 },
7101 {
7102 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7103 .stream_name = "WSA CDC DMA1 Playback",
7104 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7105 .platform_name = "msm-pcm-routing",
7106 .codec_name = "bolero_codec",
7107 .codec_dai_name = "wsa_macro_rx_mix",
7108 .no_pcm = 1,
7109 .dpcm_playback = 1,
7110 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7111 .be_hw_params_fixup = msm_be_hw_params_fixup,
7112 .ignore_pmdown_time = 1,
7113 .ignore_suspend = 1,
7114 .ops = &msm_cdc_dma_be_ops,
7115 },
7116 {
7117 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7118 .stream_name = "WSA CDC DMA1 Capture",
7119 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7120 .platform_name = "msm-pcm-routing",
7121 .codec_name = "bolero_codec",
7122 .codec_dai_name = "wsa_macro_echo",
7123 .no_pcm = 1,
7124 .dpcm_capture = 1,
7125 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7126 .be_hw_params_fixup = msm_be_hw_params_fixup,
7127 .ignore_suspend = 1,
7128 .ops = &msm_cdc_dma_be_ops,
7129 },
7130};
7131
7132static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7133 /* RX CDC DMA Backend DAI Links */
7134 {
7135 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7136 .stream_name = "RX CDC DMA0 Playback",
7137 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7138 .platform_name = "msm-pcm-routing",
7139 .codec_name = "bolero_codec",
7140 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307141 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007142 .no_pcm = 1,
7143 .dpcm_playback = 1,
7144 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7145 .be_hw_params_fixup = msm_be_hw_params_fixup,
7146 .ignore_pmdown_time = 1,
7147 .ignore_suspend = 1,
7148 .ops = &msm_cdc_dma_be_ops,
7149 },
7150 {
7151 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7152 .stream_name = "RX CDC DMA1 Playback",
7153 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7154 .platform_name = "msm-pcm-routing",
7155 .codec_name = "bolero_codec",
7156 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307157 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007158 .no_pcm = 1,
7159 .dpcm_playback = 1,
7160 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7161 .be_hw_params_fixup = msm_be_hw_params_fixup,
7162 .ignore_pmdown_time = 1,
7163 .ignore_suspend = 1,
7164 .ops = &msm_cdc_dma_be_ops,
7165 },
7166 {
7167 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7168 .stream_name = "RX CDC DMA2 Playback",
7169 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7170 .platform_name = "msm-pcm-routing",
7171 .codec_name = "bolero_codec",
7172 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307173 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007174 .no_pcm = 1,
7175 .dpcm_playback = 1,
7176 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7177 .be_hw_params_fixup = msm_be_hw_params_fixup,
7178 .ignore_pmdown_time = 1,
7179 .ignore_suspend = 1,
7180 .ops = &msm_cdc_dma_be_ops,
7181 },
7182 {
7183 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7184 .stream_name = "RX CDC DMA3 Playback",
7185 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7186 .platform_name = "msm-pcm-routing",
7187 .codec_name = "bolero_codec",
7188 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307189 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007190 .no_pcm = 1,
7191 .dpcm_playback = 1,
7192 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7193 .be_hw_params_fixup = msm_be_hw_params_fixup,
7194 .ignore_pmdown_time = 1,
7195 .ignore_suspend = 1,
7196 .ops = &msm_cdc_dma_be_ops,
7197 },
7198 /* TX CDC DMA Backend DAI Links */
7199 {
7200 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7201 .stream_name = "TX CDC DMA3 Capture",
7202 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7203 .platform_name = "msm-pcm-routing",
7204 .codec_name = "bolero_codec",
7205 .codec_dai_name = "tx_macro_tx1",
7206 .no_pcm = 1,
7207 .dpcm_capture = 1,
7208 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7209 .be_hw_params_fixup = msm_be_hw_params_fixup,
7210 .ignore_suspend = 1,
7211 .ops = &msm_cdc_dma_be_ops,
7212 },
7213 {
7214 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7215 .stream_name = "TX CDC DMA4 Capture",
7216 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7217 .platform_name = "msm-pcm-routing",
7218 .codec_name = "bolero_codec",
7219 .codec_dai_name = "tx_macro_tx2",
7220 .no_pcm = 1,
7221 .dpcm_capture = 1,
7222 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7223 .be_hw_params_fixup = msm_be_hw_params_fixup,
7224 .ignore_suspend = 1,
7225 .ops = &msm_cdc_dma_be_ops,
7226 },
7227};
7228
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007229static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7230 {
7231 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7232 .stream_name = "VA CDC DMA0 Capture",
7233 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7234 .platform_name = "msm-pcm-routing",
7235 .codec_name = "bolero_codec",
7236 .codec_dai_name = "va_macro_tx1",
7237 .no_pcm = 1,
7238 .dpcm_capture = 1,
7239 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7240 .be_hw_params_fixup = msm_be_hw_params_fixup,
7241 .ignore_suspend = 1,
7242 .ops = &msm_cdc_dma_be_ops,
7243 },
7244 {
7245 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7246 .stream_name = "VA CDC DMA1 Capture",
7247 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7248 .platform_name = "msm-pcm-routing",
7249 .codec_name = "bolero_codec",
7250 .codec_dai_name = "va_macro_tx2",
7251 .no_pcm = 1,
7252 .dpcm_capture = 1,
7253 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7254 .be_hw_params_fixup = msm_be_hw_params_fixup,
7255 .ignore_suspend = 1,
7256 .ops = &msm_cdc_dma_be_ops,
7257 },
7258 {
7259 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7260 .stream_name = "VA CDC DMA2 Capture",
7261 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7262 .platform_name = "msm-pcm-routing",
7263 .codec_name = "bolero_codec",
7264 .codec_dai_name = "va_macro_tx3",
7265 .no_pcm = 1,
7266 .dpcm_capture = 1,
7267 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7268 .be_hw_params_fixup = msm_be_hw_params_fixup,
7269 .ignore_suspend = 1,
7270 .ops = &msm_cdc_dma_be_ops,
7271 },
7272};
7273
Meng Wange8e53822019-03-18 10:49:50 +08007274static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7275 {
7276 .name = LPASS_BE_AFE_LOOPBACK_TX,
7277 .stream_name = "AFE Loopback Capture",
7278 .cpu_dai_name = "msm-dai-q6-dev.24577",
7279 .platform_name = "msm-pcm-routing",
7280 .codec_name = "msm-stub-codec.1",
7281 .codec_dai_name = "msm-stub-tx",
7282 .no_pcm = 1,
7283 .dpcm_capture = 1,
7284 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7285 .be_hw_params_fixup = msm_be_hw_params_fixup,
7286 .ignore_pmdown_time = 1,
7287 .ignore_suspend = 1,
7288 },
7289};
7290
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007291static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007292 ARRAY_SIZE(msm_common_dai_links) +
7293 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7294 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7295 ARRAY_SIZE(msm_common_be_dai_links) +
7296 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7297 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7298 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007299 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007300 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7301 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +08007302 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307303 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307304 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7305 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007306
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007307static int msm_populate_dai_link_component_of_node(
7308 struct snd_soc_card *card)
7309{
7310 int i, index, ret = 0;
7311 struct device *cdev = card->dev;
7312 struct snd_soc_dai_link *dai_link = card->dai_link;
7313 struct device_node *np;
7314
7315 if (!cdev) {
7316 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7317 return -ENODEV;
7318 }
7319
7320 for (i = 0; i < card->num_links; i++) {
7321 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7322 continue;
7323
7324 /* populate platform_of_node for snd card dai links */
7325 if (dai_link[i].platform_name &&
7326 !dai_link[i].platform_of_node) {
7327 index = of_property_match_string(cdev->of_node,
7328 "asoc-platform-names",
7329 dai_link[i].platform_name);
7330 if (index < 0) {
7331 dev_err(cdev, "%s: No match found for platform name: %s\n",
7332 __func__, dai_link[i].platform_name);
7333 ret = index;
7334 goto err;
7335 }
7336 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7337 index);
7338 if (!np) {
7339 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7340 __func__, dai_link[i].platform_name,
7341 index);
7342 ret = -ENODEV;
7343 goto err;
7344 }
7345 dai_link[i].platform_of_node = np;
7346 dai_link[i].platform_name = NULL;
7347 }
7348
7349 /* populate cpu_of_node for snd card dai links */
7350 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7351 index = of_property_match_string(cdev->of_node,
7352 "asoc-cpu-names",
7353 dai_link[i].cpu_dai_name);
7354 if (index >= 0) {
7355 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7356 index);
7357 if (!np) {
7358 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7359 __func__,
7360 dai_link[i].cpu_dai_name);
7361 ret = -ENODEV;
7362 goto err;
7363 }
7364 dai_link[i].cpu_of_node = np;
7365 dai_link[i].cpu_dai_name = NULL;
7366 }
7367 }
7368
7369 /* populate codec_of_node for snd card dai links */
7370 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7371 index = of_property_match_string(cdev->of_node,
7372 "asoc-codec-names",
7373 dai_link[i].codec_name);
7374 if (index < 0)
7375 continue;
7376 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7377 index);
7378 if (!np) {
7379 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7380 __func__, dai_link[i].codec_name);
7381 ret = -ENODEV;
7382 goto err;
7383 }
7384 dai_link[i].codec_of_node = np;
7385 dai_link[i].codec_name = NULL;
7386 }
7387 }
7388
7389err:
7390 return ret;
7391}
7392
7393static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7394{
7395 int ret = -EINVAL;
7396 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7397
7398 if (!component) {
7399 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7400 return ret;
7401 }
7402
7403 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7404 ARRAY_SIZE(msm_snd_controls));
7405 if (ret < 0) {
7406 dev_err(component->dev,
7407 "%s: add_codec_controls failed, err = %d\n",
7408 __func__, ret);
7409 return ret;
7410 }
7411
7412 return ret;
7413}
7414
7415static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7416 struct snd_pcm_hw_params *params)
7417{
7418 return 0;
7419}
7420
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007421static struct snd_soc_ops msm_stub_be_ops = {
7422 .hw_params = msm_snd_stub_hw_params,
7423};
7424
7425struct snd_soc_card snd_soc_card_stub_msm = {
7426 .name = "kona-stub-snd-card",
7427};
7428
7429static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7430 /* FrontEnd DAI Links */
7431 {
7432 .name = "MSMSTUB Media1",
7433 .stream_name = "MultiMedia1",
7434 .cpu_dai_name = "MultiMedia1",
7435 .platform_name = "msm-pcm-dsp.0",
7436 .dynamic = 1,
7437 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7438 .dpcm_playback = 1,
7439 .dpcm_capture = 1,
7440 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7441 SND_SOC_DPCM_TRIGGER_POST},
7442 .codec_dai_name = "snd-soc-dummy-dai",
7443 .codec_name = "snd-soc-dummy",
7444 .ignore_suspend = 1,
7445 /* this dainlink has playback support */
7446 .ignore_pmdown_time = 1,
7447 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7448 },
7449};
7450
7451static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7452 /* Backend DAI Links */
7453 {
7454 .name = LPASS_BE_AUXPCM_RX,
7455 .stream_name = "AUX PCM Playback",
7456 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7457 .platform_name = "msm-pcm-routing",
7458 .codec_name = "msm-stub-codec.1",
7459 .codec_dai_name = "msm-stub-rx",
7460 .no_pcm = 1,
7461 .dpcm_playback = 1,
7462 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7463 .init = &msm_audrx_stub_init,
7464 .be_hw_params_fixup = msm_be_hw_params_fixup,
7465 .ignore_pmdown_time = 1,
7466 .ignore_suspend = 1,
7467 .ops = &msm_stub_be_ops,
7468 },
7469 {
7470 .name = LPASS_BE_AUXPCM_TX,
7471 .stream_name = "AUX PCM Capture",
7472 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7473 .platform_name = "msm-pcm-routing",
7474 .codec_name = "msm-stub-codec.1",
7475 .codec_dai_name = "msm-stub-tx",
7476 .no_pcm = 1,
7477 .dpcm_capture = 1,
7478 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7479 .be_hw_params_fixup = msm_be_hw_params_fixup,
7480 .ignore_suspend = 1,
7481 .ops = &msm_stub_be_ops,
7482 },
7483};
7484
7485static struct snd_soc_dai_link msm_stub_dai_links[
7486 ARRAY_SIZE(msm_stub_fe_dai_links) +
7487 ARRAY_SIZE(msm_stub_be_dai_links)];
7488
7489static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007490 { .compatible = "qcom,kona-asoc-snd",
7491 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007492 { .compatible = "qcom,kona-asoc-snd-stub",
7493 .data = "stub_codec"},
7494 {},
7495};
7496
7497static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7498{
7499 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007500 struct snd_soc_dai_link *dailink = NULL;
7501 int len_1 = 0;
7502 int len_2 = 0;
7503 int total_links = 0;
7504 int rc = 0;
7505 u32 mi2s_audio_intf = 0;
7506 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007507 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307508 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007509 const struct of_device_id *match;
7510
7511 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7512 if (!match) {
7513 dev_err(dev, "%s: No DT match found for sound card\n",
7514 __func__);
7515 return NULL;
7516 }
7517
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007518 if (!strcmp(match->data, "codec")) {
7519 card = &snd_soc_card_kona_msm;
7520
7521 memcpy(msm_kona_dai_links + total_links,
7522 msm_common_dai_links,
7523 sizeof(msm_common_dai_links));
7524 total_links += ARRAY_SIZE(msm_common_dai_links);
7525
7526 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007527 msm_bolero_fe_dai_links,
7528 sizeof(msm_bolero_fe_dai_links));
7529 total_links +=
7530 ARRAY_SIZE(msm_bolero_fe_dai_links);
7531
7532 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007533 msm_common_misc_fe_dai_links,
7534 sizeof(msm_common_misc_fe_dai_links));
7535 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7536
7537 memcpy(msm_kona_dai_links + total_links,
7538 msm_common_be_dai_links,
7539 sizeof(msm_common_be_dai_links));
7540 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7541
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007542 memcpy(msm_kona_dai_links + total_links,
7543 msm_wsa_cdc_dma_be_dai_links,
7544 sizeof(msm_wsa_cdc_dma_be_dai_links));
7545 total_links +=
7546 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7547
7548 memcpy(msm_kona_dai_links + total_links,
7549 msm_rx_tx_cdc_dma_be_dai_links,
7550 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7551 total_links +=
7552 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7553
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007554 memcpy(msm_kona_dai_links + total_links,
7555 msm_va_cdc_dma_be_dai_links,
7556 sizeof(msm_va_cdc_dma_be_dai_links));
7557 total_links +=
7558 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7559
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007560 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7561 &mi2s_audio_intf);
7562 if (rc) {
7563 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7564 __func__);
7565 } else {
7566 if (mi2s_audio_intf) {
7567 memcpy(msm_kona_dai_links + total_links,
7568 msm_mi2s_be_dai_links,
7569 sizeof(msm_mi2s_be_dai_links));
7570 total_links +=
7571 ARRAY_SIZE(msm_mi2s_be_dai_links);
7572 }
7573 }
7574
7575 rc = of_property_read_u32(dev->of_node,
7576 "qcom,auxpcm-audio-intf",
7577 &auxpcm_audio_intf);
7578 if (rc) {
7579 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7580 __func__);
7581 } else {
7582 if (auxpcm_audio_intf) {
7583 memcpy(msm_kona_dai_links + total_links,
7584 msm_auxpcm_be_dai_links,
7585 sizeof(msm_auxpcm_be_dai_links));
7586 total_links +=
7587 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7588 }
7589 }
7590
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007591 rc = of_property_read_u32(dev->of_node,
7592 "qcom,ext-disp-audio-rx", &val);
7593 if (!rc && val) {
7594 dev_dbg(dev, "%s(): ext disp audio support present\n",
7595 __func__);
7596 memcpy(msm_kona_dai_links + total_links,
7597 ext_disp_be_dai_link,
7598 sizeof(ext_disp_be_dai_link));
7599 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7600 }
7601
7602 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7603 if (!rc && val) {
7604 dev_dbg(dev, "%s(): WCN BT support present\n",
7605 __func__);
7606 memcpy(msm_kona_dai_links + total_links,
7607 msm_wcn_be_dai_links,
7608 sizeof(msm_wcn_be_dai_links));
7609 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7610 }
7611
Meng Wange8e53822019-03-18 10:49:50 +08007612 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7613 &val);
7614 if (!rc && val) {
7615 memcpy(msm_kona_dai_links + total_links,
7616 msm_afe_rxtx_lb_be_dai_link,
7617 sizeof(msm_afe_rxtx_lb_be_dai_link));
7618 total_links +=
7619 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7620 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307621
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307622 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7623 &val);
7624 if (!rc && val) {
7625 memcpy(msm_kona_dai_links + total_links,
7626 msm_tdm_be_dai_links,
7627 sizeof(msm_tdm_be_dai_links));
7628 total_links +=
7629 ARRAY_SIZE(msm_tdm_be_dai_links);
7630 }
7631
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307632 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7633 &wcn_btfm_intf);
7634 if (rc) {
7635 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7636 __func__);
7637 } else {
7638 if (wcn_btfm_intf) {
7639 memcpy(msm_kona_dai_links + total_links,
7640 msm_wcn_btfm_be_dai_links,
7641 sizeof(msm_wcn_btfm_be_dai_links));
7642 total_links +=
7643 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7644 }
7645 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007646 dailink = msm_kona_dai_links;
7647 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007648 card = &snd_soc_card_stub_msm;
7649 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7650 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7651
7652 memcpy(msm_stub_dai_links,
7653 msm_stub_fe_dai_links,
7654 sizeof(msm_stub_fe_dai_links));
7655 memcpy(msm_stub_dai_links + len_1,
7656 msm_stub_be_dai_links,
7657 sizeof(msm_stub_be_dai_links));
7658
7659 dailink = msm_stub_dai_links;
7660 total_links = len_2;
7661 }
7662
7663 if (card) {
7664 card->dai_link = dailink;
7665 card->num_links = total_links;
7666 }
7667
7668 return card;
7669}
7670
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007671static int msm_wsa881x_init(struct snd_soc_component *component)
7672{
7673 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7674 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7675 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7676 SPKR_L_BOOST, SPKR_L_VI};
7677 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7678 SPKR_R_BOOST, SPKR_R_VI};
7679 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7680 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7681 struct msm_asoc_mach_data *pdata;
7682 struct snd_soc_dapm_context *dapm;
7683 struct snd_card *card;
7684 struct snd_info_entry *entry;
7685 int ret = 0;
7686
7687 if (!component) {
7688 pr_err("%s component is NULL\n", __func__);
7689 return -EINVAL;
7690 }
7691
7692 card = component->card->snd_card;
7693 dapm = snd_soc_component_get_dapm(component);
7694
7695 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7696 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7697 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307698 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7699 wsa883x_set_channel_map(component, &spkleft_ports[0],
7700 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7701 &ch_rate[0], &spkleft_port_types[0]);
7702 else
7703 wsa881x_set_channel_map(component, &spkleft_ports[0],
7704 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7705 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007706 if (dapm->component) {
7707 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7708 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7709 }
7710 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7711 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7712 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307713 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7714 wsa883x_set_channel_map(component, &spkright_ports[0],
7715 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7716 &ch_rate[0], &spkright_port_types[0]);
7717 else
7718 wsa881x_set_channel_map(component, &spkright_ports[0],
7719 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7720 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007721 if (dapm->component) {
7722 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7723 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7724 }
7725 } else {
7726 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7727 component->name);
7728 ret = -EINVAL;
7729 goto err;
7730 }
7731 pdata = snd_soc_card_get_drvdata(component->card);
7732 if (!pdata->codec_root) {
7733 entry = snd_info_create_subdir(card->module, "codecs",
7734 card->proc_root);
7735 if (!entry) {
7736 pr_err("%s: Cannot create codecs module entry\n",
7737 __func__);
7738 ret = 0;
7739 goto err;
7740 }
7741 pdata->codec_root = entry;
7742 }
Laxminath Kasam99690f12020-03-15 15:38:21 +05307743 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7744 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7745 component);
7746 else
7747 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7748 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007749err:
7750 return ret;
7751}
7752
7753static int msm_aux_codec_init(struct snd_soc_component *component)
7754{
7755 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7756 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007757 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007758 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007759 struct snd_info_entry *entry;
7760 struct snd_card *card = component->card->snd_card;
7761 struct msm_asoc_mach_data *pdata;
7762
7763 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7764 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7765 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7766 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7767 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7768 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7769 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7770 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7771 snd_soc_dapm_sync(dapm);
7772
7773 pdata = snd_soc_card_get_drvdata(component->card);
7774 if (!pdata->codec_root) {
7775 entry = snd_info_create_subdir(card->module, "codecs",
7776 card->proc_root);
7777 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007778 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007779 __func__);
7780 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007781 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007782 }
7783 pdata->codec_root = entry;
7784 }
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007785 if (!strncmp(component->driver->name, "wcd937x", 7)) {
7786 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007787 ret = snd_soc_add_component_controls(component,
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007788 msm_int_wcd937x_snd_controls,
7789 ARRAY_SIZE(msm_int_wcd937x_snd_controls));
7790 } else {
7791 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7792 codec_variant = wcd938x_get_codec_variant(component);
7793 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7794 if (codec_variant == WCD9380)
7795 ret = snd_soc_add_component_controls(component,
7796 msm_int_wcd9380_snd_controls,
7797 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7798 else if (codec_variant == WCD9385)
7799 ret = snd_soc_add_component_controls(component,
7800 msm_int_wcd9385_snd_controls,
7801 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7802 }
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007803
7804 if (ret < 0) {
7805 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7806 __func__, ret);
7807 return ret;
7808 }
7809
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007810mbhc_cfg_cal:
7811 mbhc_calibration = def_wcd_mbhc_cal();
7812 if (!mbhc_calibration)
7813 return -ENOMEM;
7814 wcd_mbhc_cfg.calibration = mbhc_calibration;
Kunlei Zhangf61a2312020-02-11 15:37:03 +08007815 if (!strncmp(component->driver->name, "wcd937x", 7))
7816 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7817 else
7818 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007819 if (ret) {
7820 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7821 __func__, ret);
7822 goto err_hs_detect;
7823 }
7824 return 0;
7825
7826err_hs_detect:
7827 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007828 return ret;
7829}
7830
7831static int msm_init_aux_dev(struct platform_device *pdev,
7832 struct snd_soc_card *card)
7833{
7834 struct device_node *wsa_of_node;
7835 struct device_node *aux_codec_of_node;
7836 u32 wsa_max_devs;
7837 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307838 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007839 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007840 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +08007841 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7842 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007843 const char *auxdev_name_prefix[1];
7844 char *dev_name_str = NULL;
7845 int found = 0;
7846 int codecs_found = 0;
7847 int ret = 0;
7848
7849 /* Get maximum WSA device count for this platform */
7850 ret = of_property_read_u32(pdev->dev.of_node,
7851 "qcom,wsa-max-devs", &wsa_max_devs);
7852 if (ret) {
7853 dev_info(&pdev->dev,
7854 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7855 __func__, pdev->dev.of_node->full_name, ret);
7856 wsa_max_devs = 0;
7857 goto codec_aux_dev;
7858 }
7859 if (wsa_max_devs == 0) {
7860 dev_warn(&pdev->dev,
7861 "%s: Max WSA devices is 0 for this target?\n",
7862 __func__);
7863 goto codec_aux_dev;
7864 }
7865
7866 /* Get count of WSA device phandles for this platform */
7867 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7868 "qcom,wsa-devs", NULL);
7869 if (wsa_dev_cnt == -ENOENT) {
7870 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7871 __func__);
7872 goto err;
7873 } else if (wsa_dev_cnt <= 0) {
7874 dev_err(&pdev->dev,
7875 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7876 __func__, wsa_dev_cnt);
7877 ret = -EINVAL;
7878 goto err;
7879 }
7880
7881 /*
7882 * Expect total phandles count to be NOT less than maximum possible
7883 * WSA count. However, if it is less, then assign same value to
7884 * max count as well.
7885 */
7886 if (wsa_dev_cnt < wsa_max_devs) {
7887 dev_dbg(&pdev->dev,
7888 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7889 __func__, wsa_max_devs, wsa_dev_cnt);
7890 wsa_max_devs = wsa_dev_cnt;
7891 }
7892
7893 /* Make sure prefix string passed for each WSA device */
7894 ret = of_property_count_strings(pdev->dev.of_node,
7895 "qcom,wsa-aux-dev-prefix");
7896 if (ret != wsa_dev_cnt) {
7897 dev_err(&pdev->dev,
7898 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7899 __func__, wsa_dev_cnt, ret);
7900 ret = -EINVAL;
7901 goto err;
7902 }
7903
7904 /*
7905 * Alloc mem to store phandle and index info of WSA device, if already
7906 * registered with ALSA core
7907 */
7908 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7909 sizeof(struct msm_wsa881x_dev_info),
7910 GFP_KERNEL);
7911 if (!wsa881x_dev_info) {
7912 ret = -ENOMEM;
7913 goto err;
7914 }
7915
7916 /*
7917 * search and check whether all WSA devices are already
7918 * registered with ALSA core or not. If found a node, store
7919 * the node and the index in a local array of struct for later
7920 * use.
7921 */
7922 for (i = 0; i < wsa_dev_cnt; i++) {
7923 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7924 "qcom,wsa-devs", i);
7925 if (unlikely(!wsa_of_node)) {
7926 /* we should not be here */
7927 dev_err(&pdev->dev,
7928 "%s: wsa dev node is not present\n",
7929 __func__);
7930 ret = -EINVAL;
7931 goto err;
7932 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05307933 if (soc_find_component_locked(wsa_of_node, NULL)) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007934 /* WSA device registered with ALSA core */
7935 wsa881x_dev_info[found].of_node = wsa_of_node;
7936 wsa881x_dev_info[found].index = i;
7937 found++;
7938 if (found == wsa_max_devs)
7939 break;
7940 }
7941 }
7942
7943 if (found < wsa_max_devs) {
7944 dev_dbg(&pdev->dev,
7945 "%s: failed to find %d components. Found only %d\n",
7946 __func__, wsa_max_devs, found);
7947 return -EPROBE_DEFER;
7948 }
7949 dev_info(&pdev->dev,
7950 "%s: found %d wsa881x devices registered with ALSA core\n",
7951 __func__, found);
7952
7953codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307954 /* Get maximum aux codec device count for this platform */
7955 ret = of_property_read_u32(pdev->dev.of_node,
7956 "qcom,codec-max-aux-devs",
7957 &codec_max_aux_devs);
7958 if (ret) {
7959 dev_err(&pdev->dev,
7960 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7961 __func__, pdev->dev.of_node->full_name, ret);
7962 codec_max_aux_devs = 0;
7963 goto aux_dev_register;
7964 }
7965 if (codec_max_aux_devs == 0) {
7966 dev_dbg(&pdev->dev,
7967 "%s: Max aux codec devices is 0 for this target?\n",
7968 __func__);
7969 goto aux_dev_register;
7970 }
7971
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007972 /* Get count of aux codec device phandles for this platform */
7973 codec_aux_dev_cnt = of_count_phandle_with_args(
7974 pdev->dev.of_node,
7975 "qcom,codec-aux-devs", NULL);
7976 if (codec_aux_dev_cnt == -ENOENT) {
7977 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7978 __func__);
7979 goto err;
7980 } else if (codec_aux_dev_cnt <= 0) {
7981 dev_err(&pdev->dev,
7982 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7983 __func__, codec_aux_dev_cnt);
7984 ret = -EINVAL;
7985 goto err;
7986 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007987
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007988 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307989 * Expect total phandles count to be NOT less than maximum possible
7990 * AUX device count. However, if it is less, then assign same value to
7991 * max count as well.
7992 */
7993 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7994 dev_dbg(&pdev->dev,
7995 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7996 __func__, codec_max_aux_devs,
7997 codec_aux_dev_cnt);
7998 codec_max_aux_devs = codec_aux_dev_cnt;
7999 }
8000
8001 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008002 * Alloc mem to store phandle and index info of aux codec
8003 * if already registered with ALSA core
8004 */
8005 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8006 sizeof(struct aux_codec_dev_info),
8007 GFP_KERNEL);
8008 if (!aux_cdc_dev_info) {
8009 ret = -ENOMEM;
8010 goto err;
8011 }
8012
8013 /*
8014 * search and check whether all aux codecs are already
8015 * registered with ALSA core or not. If found a node, store
8016 * the node and the index in a local array of struct for later
8017 * use.
8018 */
8019 for (i = 0; i < codec_aux_dev_cnt; i++) {
8020 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8021 "qcom,codec-aux-devs", i);
8022 if (unlikely(!aux_codec_of_node)) {
8023 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008024 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008025 "%s: aux codec dev node is not present\n",
8026 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008027 ret = -EINVAL;
8028 goto err;
8029 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308030 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008031 /* AUX codec registered with ALSA core */
8032 aux_cdc_dev_info[codecs_found].of_node =
8033 aux_codec_of_node;
8034 aux_cdc_dev_info[codecs_found].index = i;
8035 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008036 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008037 }
8038
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008039 if (codecs_found < codec_aux_dev_cnt) {
8040 dev_dbg(&pdev->dev,
8041 "%s: failed to find %d components. Found only %d\n",
8042 __func__, codec_aux_dev_cnt, codecs_found);
8043 return -EPROBE_DEFER;
8044 }
8045 dev_info(&pdev->dev,
8046 "%s: found %d AUX codecs registered with ALSA core\n",
8047 __func__, codecs_found);
8048
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308049aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008050 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8051 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8052
8053 /* Alloc array of AUX devs struct */
8054 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8055 sizeof(struct snd_soc_aux_dev),
8056 GFP_KERNEL);
8057 if (!msm_aux_dev) {
8058 ret = -ENOMEM;
8059 goto err;
8060 }
8061
8062 /* Alloc array of codec conf struct */
8063 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8064 sizeof(struct snd_soc_codec_conf),
8065 GFP_KERNEL);
8066 if (!msm_codec_conf) {
8067 ret = -ENOMEM;
8068 goto err;
8069 }
8070
8071 for (i = 0; i < wsa_max_devs; i++) {
8072 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8073 GFP_KERNEL);
8074 if (!dev_name_str) {
8075 ret = -ENOMEM;
8076 goto err;
8077 }
8078
8079 ret = of_property_read_string_index(pdev->dev.of_node,
8080 "qcom,wsa-aux-dev-prefix",
8081 wsa881x_dev_info[i].index,
8082 auxdev_name_prefix);
8083 if (ret) {
8084 dev_err(&pdev->dev,
8085 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8086 __func__, ret);
8087 ret = -EINVAL;
8088 goto err;
8089 }
8090
8091 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8092 msm_aux_dev[i].name = dev_name_str;
8093 msm_aux_dev[i].codec_name = NULL;
8094 msm_aux_dev[i].codec_of_node =
8095 wsa881x_dev_info[i].of_node;
8096 msm_aux_dev[i].init = msm_wsa881x_init;
8097 msm_codec_conf[i].dev_name = NULL;
8098 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8099 msm_codec_conf[i].of_node =
8100 wsa881x_dev_info[i].of_node;
8101 }
8102
8103 for (i = 0; i < codec_aux_dev_cnt; i++) {
8104 msm_aux_dev[wsa_max_devs + i].name = NULL;
8105 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8106 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8107 aux_cdc_dev_info[i].of_node;
8108 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8109 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8110 msm_codec_conf[wsa_max_devs + i].name_prefix =
8111 NULL;
8112 msm_codec_conf[wsa_max_devs + i].of_node =
8113 aux_cdc_dev_info[i].of_node;
8114 }
8115
8116 card->codec_conf = msm_codec_conf;
8117 card->aux_dev = msm_aux_dev;
8118err:
8119 return ret;
8120}
8121
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008122static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8123{
8124 int count = 0;
8125 u32 mi2s_master_slave[MI2S_MAX];
8126 int ret = 0;
8127
8128 for (count = 0; count < MI2S_MAX; count++) {
8129 mutex_init(&mi2s_intf_conf[count].lock);
8130 mi2s_intf_conf[count].ref_cnt = 0;
8131 }
8132
8133 ret = of_property_read_u32_array(pdev->dev.of_node,
8134 "qcom,msm-mi2s-master",
8135 mi2s_master_slave, MI2S_MAX);
8136 if (ret) {
8137 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8138 __func__);
8139 } else {
8140 for (count = 0; count < MI2S_MAX; count++) {
8141 mi2s_intf_conf[count].msm_is_mi2s_master =
8142 mi2s_master_slave[count];
8143 }
8144 }
8145}
8146
8147static void msm_i2s_auxpcm_deinit(void)
8148{
8149 int count = 0;
8150
8151 for (count = 0; count < MI2S_MAX; count++) {
8152 mutex_destroy(&mi2s_intf_conf[count].lock);
8153 mi2s_intf_conf[count].ref_cnt = 0;
8154 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8155 }
8156}
8157
8158static int kona_ssr_enable(struct device *dev, void *data)
8159{
8160 struct platform_device *pdev = to_platform_device(dev);
8161 struct snd_soc_card *card = platform_get_drvdata(pdev);
8162 int ret = 0;
8163
8164 if (!card) {
8165 dev_err(dev, "%s: card is NULL\n", __func__);
8166 ret = -EINVAL;
8167 goto err;
8168 }
8169
8170 if (!strcmp(card->name, "kona-stub-snd-card")) {
8171 /* TODO */
8172 dev_dbg(dev, "%s: TODO \n", __func__);
8173 }
8174
8175 snd_soc_card_change_online_state(card, 1);
8176 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8177
8178err:
8179 return ret;
8180}
8181
8182static void kona_ssr_disable(struct device *dev, void *data)
8183{
8184 struct platform_device *pdev = to_platform_device(dev);
8185 struct snd_soc_card *card = platform_get_drvdata(pdev);
8186
8187 if (!card) {
8188 dev_err(dev, "%s: card is NULL\n", __func__);
8189 return;
8190 }
8191
8192 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8193 snd_soc_card_change_online_state(card, 0);
8194
8195 if (!strcmp(card->name, "kona-stub-snd-card")) {
8196 /* TODO */
8197 dev_dbg(dev, "%s: TODO \n", __func__);
8198 }
8199}
8200
8201static const struct snd_event_ops kona_ssr_ops = {
8202 .enable = kona_ssr_enable,
8203 .disable = kona_ssr_disable,
8204};
8205
8206static int msm_audio_ssr_compare(struct device *dev, void *data)
8207{
8208 struct device_node *node = data;
8209
8210 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8211 __func__, dev->of_node, node);
8212 return (dev->of_node && dev->of_node == node);
8213}
8214
8215static int msm_audio_ssr_register(struct device *dev)
8216{
8217 struct device_node *np = dev->of_node;
8218 struct snd_event_clients *ssr_clients = NULL;
8219 struct device_node *node = NULL;
8220 int ret = 0;
8221 int i = 0;
8222
8223 for (i = 0; ; i++) {
8224 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8225 if (!node)
8226 break;
8227 snd_event_mstr_add_client(&ssr_clients,
8228 msm_audio_ssr_compare, node);
8229 }
8230
8231 ret = snd_event_master_register(dev, &kona_ssr_ops,
8232 ssr_clients, NULL);
8233 if (!ret)
8234 snd_event_notify(dev, SND_EVENT_UP);
8235
8236 return ret;
8237}
8238
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008239static int msm_asoc_machine_probe(struct platform_device *pdev)
8240{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008241 struct snd_soc_card *card = NULL;
8242 struct msm_asoc_mach_data *pdata = NULL;
8243 const char *mbhc_audio_jack_type = NULL;
8244 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008245 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008246 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008247
8248 if (!pdev->dev.of_node) {
8249 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8250 return -EINVAL;
8251 }
8252
8253 pdata = devm_kzalloc(&pdev->dev,
8254 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8255 if (!pdata)
8256 return -ENOMEM;
8257
Vatsal Bucha71e0b482019-09-11 14:51:20 +05308258 of_property_read_u32(pdev->dev.of_node,
8259 "qcom,lito-is-v2-enabled",
8260 &pdata->lito_v2_enabled);
8261
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008262 card = populate_snd_card_dailinks(&pdev->dev);
8263 if (!card) {
8264 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8265 ret = -EINVAL;
8266 goto err;
8267 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008268
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008269 card->dev = &pdev->dev;
8270 platform_set_drvdata(pdev, card);
8271 snd_soc_card_set_drvdata(card, pdata);
8272
8273 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8274 if (ret) {
8275 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8276 __func__, ret);
8277 goto err;
8278 }
8279
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008280 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8281 if (ret) {
8282 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8283 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008284 goto err;
8285 }
8286
8287 ret = msm_populate_dai_link_component_of_node(card);
8288 if (ret) {
8289 ret = -EPROBE_DEFER;
8290 goto err;
8291 }
8292
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008293 ret = msm_init_aux_dev(pdev, card);
8294 if (ret)
8295 goto err;
8296
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008297 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008298 if (ret == -EPROBE_DEFER) {
8299 if (codec_reg_done)
8300 ret = -EINVAL;
8301 goto err;
8302 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008303 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8304 __func__, ret);
8305 goto err;
8306 }
8307 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8308 __func__, card->name);
8309
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08008310 ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
8311 &pdata->tdm_max_slots);
8312 if (ret) {
8313 dev_err(&pdev->dev, "%s: No DT match for tdm max slots\n",
8314 __func__);
8315 }
8316
8317 if ((pdata->tdm_max_slots <= 0) || (pdata->tdm_max_slots >
8318 TDM_MAX_SLOTS)) {
8319 pdata->tdm_max_slots = TDM_MAX_SLOTS;
8320 dev_err(&pdev->dev, "%s: Using default tdm max slot: %d\n",
8321 __func__, pdata->tdm_max_slots);
8322 }
8323
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008324 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8325 "qcom,hph-en1-gpio", 0);
8326 if (!pdata->hph_en1_gpio_p) {
8327 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8328 __func__, "qcom,hph-en1-gpio",
8329 pdev->dev.of_node->full_name);
8330 }
8331
8332 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8333 "qcom,hph-en0-gpio", 0);
8334 if (!pdata->hph_en0_gpio_p) {
8335 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8336 __func__, "qcom,hph-en0-gpio",
8337 pdev->dev.of_node->full_name);
8338 }
8339
8340 ret = of_property_read_string(pdev->dev.of_node,
8341 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8342 if (ret) {
8343 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8344 __func__, "qcom,mbhc-audio-jack-type",
8345 pdev->dev.of_node->full_name);
8346 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8347 } else {
8348 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8349 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8350 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8351 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8352 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8353 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8354 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8355 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8356 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8357 } else {
8358 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8359 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8360 }
8361 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008362 /*
8363 * Parse US-Euro gpio info from DT. Report no error if us-euro
8364 * entry is not found in DT file as some targets do not support
8365 * US-Euro detection
8366 */
8367 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8368 "qcom,us-euro-gpios", 0);
8369 if (!pdata->us_euro_gpio_p) {
8370 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8371 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8372 } else {
8373 dev_dbg(&pdev->dev, "%s detected\n",
8374 "qcom,us-euro-gpios");
8375 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8376 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008377
Meng Wanga60b4082019-02-25 17:02:23 +08008378 if (wcd_mbhc_cfg.enable_usbc_analog)
8379 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8380
8381 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8382 "fsa4480-i2c-handle", 0);
8383 if (!pdata->fsa_handle)
8384 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8385 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8386
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008387 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008388 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8389 "qcom,cdc-dmic01-gpios",
8390 0);
8391 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8392 "qcom,cdc-dmic23-gpios",
8393 0);
8394 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8395 "qcom,cdc-dmic45-gpios",
8396 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +05308397 if (pdata->dmic01_gpio_p)
8398 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8399 if (pdata->dmic23_gpio_p)
8400 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +05308401 if (pdata->dmic45_gpio_p)
8402 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008403
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008404 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8405 "qcom,pri-mi2s-gpios", 0);
8406 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8407 "qcom,sec-mi2s-gpios", 0);
8408 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8409 "qcom,tert-mi2s-gpios", 0);
8410 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8411 "qcom,quat-mi2s-gpios", 0);
8412 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8413 "qcom,quin-mi2s-gpios", 0);
8414 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8415 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008416 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8417 if (pdata->mi2s_gpio_p[index])
8418 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008419 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008420 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008421
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008422 /* Register LPASS audio hw vote */
8423 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8424 if (IS_ERR(lpass_audio_hw_vote)) {
8425 ret = PTR_ERR(lpass_audio_hw_vote);
8426 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8427 __func__, "lpass_audio_hw_vote", ret);
8428 lpass_audio_hw_vote = NULL;
8429 ret = 0;
8430 }
8431 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8432 pdata->core_audio_vote_count = 0;
8433
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008434 ret = msm_audio_ssr_register(&pdev->dev);
8435 if (ret)
8436 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8437 __func__, ret);
8438
8439 is_initial_boot = true;
8440
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008441 return 0;
8442err:
8443 devm_kfree(&pdev->dev, pdata);
8444 return ret;
8445}
8446
8447static int msm_asoc_machine_remove(struct platform_device *pdev)
8448{
8449 struct snd_soc_card *card = platform_get_drvdata(pdev);
8450
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008451 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008452 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008453 msm_i2s_auxpcm_deinit();
8454
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008455 return 0;
8456}
8457
8458static struct platform_driver kona_asoc_machine_driver = {
8459 .driver = {
8460 .name = DRV_NAME,
8461 .owner = THIS_MODULE,
8462 .pm = &snd_soc_pm_ops,
8463 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +08008464 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008465 },
8466 .probe = msm_asoc_machine_probe,
8467 .remove = msm_asoc_machine_remove,
8468};
8469module_platform_driver(kona_asoc_machine_driver);
8470
8471MODULE_DESCRIPTION("ALSA SoC msm");
8472MODULE_LICENSE("GPL v2");
8473MODULE_ALIAS("platform:" DRV_NAME);
8474MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);