blob: 05416508839b522e9160335d33c83ceb9c2ec97f [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
Michal Kazioredb82362013-07-05 16:15:14 +030026#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030027#include "htc.h"
28#include "hw.h"
29#include "targaddrs.h"
30#include "wmi.h"
31#include "../ath.h"
32#include "../regd.h"
Janusz Dziedzic9702c682013-11-20 09:59:41 +020033#include "../dfs_pattern_detector.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030034
35#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
36#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37#define WO(_f) ((_f##_OFFSET) >> 2)
38
39#define ATH10K_SCAN_ID 0
40#define WMI_READY_TIMEOUT (5 * HZ)
41#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020042#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030043
44/* Antenna noise floor */
45#define ATH10K_DEFAULT_NOISE_FLOOR -95
46
Bartosz Markowski71098612013-11-14 09:01:15 +010047#define ATH10K_MAX_NUM_MGMT_PENDING 128
Bartosz Markowski5e00d312013-09-26 17:47:12 +020048
Kalle Valo5a13e762014-01-20 11:01:46 +020049/* number of failed packets */
50#define ATH10K_KICKOUT_THRESHOLD 50
51
52/*
53 * Use insanely high numbers to make sure that the firmware implementation
54 * won't start, we have the same functionality already in hostapd. Unit
55 * is seconds.
56 */
57#define ATH10K_KEEPALIVE_MIN_IDLE 3747
58#define ATH10K_KEEPALIVE_MAX_IDLE 3895
59#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
60
Kalle Valo5e3dd152013-06-12 20:52:10 +030061struct ath10k;
62
Kalle Valo5e3dd152013-06-12 20:52:10 +030063struct ath10k_skb_cb {
64 dma_addr_t paddr;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020065 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030066
67 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030068 u8 tid;
69 bool is_offchan;
Michal Kaziora16942e2014-02-27 18:50:04 +020070 struct ath10k_htt_txbuf *txbuf;
71 u32 txbuf_paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +030072 } __packed htt;
Michal Kazior748afc42014-01-23 12:48:21 +010073
74 struct {
75 bool dtim_zero;
76 bool deliver_cab;
77 } bcn;
Kalle Valo5e3dd152013-06-12 20:52:10 +030078} __packed;
79
80static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
81{
82 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
83 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
84 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
85}
86
Kalle Valo5e3dd152013-06-12 20:52:10 +030087static inline u32 host_interest_item_address(u32 item_offset)
88{
89 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
90}
91
92struct ath10k_bmi {
93 bool done_sent;
94};
95
Bartosz Markowskib3effe62013-09-26 17:47:11 +020096#define ATH10K_MAX_MEM_REQS 16
97
98struct ath10k_mem_chunk {
99 void *vaddr;
100 dma_addr_t paddr;
101 u32 len;
102 u32 req_id;
103};
104
Kalle Valo5e3dd152013-06-12 20:52:10 +0300105struct ath10k_wmi {
106 enum ath10k_htc_ep_id eid;
107 struct completion service_ready;
108 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200109 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200110 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200111 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200112 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200113
114 u32 num_mem_chunks;
115 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300116};
117
118struct ath10k_peer_stat {
119 u8 peer_macaddr[ETH_ALEN];
120 u32 peer_rssi;
121 u32 peer_tx_rate;
Ben Greear23c3aae2014-03-28 14:35:15 +0200122 u32 peer_rx_rate; /* 10x only */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300123};
124
125struct ath10k_target_stats {
126 /* PDEV stats */
127 s32 ch_noise_floor;
128 u32 tx_frame_count;
129 u32 rx_frame_count;
130 u32 rx_clear_count;
131 u32 cycle_count;
132 u32 phy_err_count;
133 u32 chan_tx_power;
134
135 /* PDEV TX stats */
136 s32 comp_queued;
137 s32 comp_delivered;
138 s32 msdu_enqued;
139 s32 mpdu_enqued;
140 s32 wmm_drop;
141 s32 local_enqued;
142 s32 local_freed;
143 s32 hw_queued;
144 s32 hw_reaped;
145 s32 underrun;
146 s32 tx_abort;
147 s32 mpdus_requed;
148 u32 tx_ko;
149 u32 data_rc;
150 u32 self_triggers;
151 u32 sw_retry_failure;
152 u32 illgl_rate_phy_err;
153 u32 pdev_cont_xretry;
154 u32 pdev_tx_timeout;
155 u32 pdev_resets;
156 u32 phy_underrun;
157 u32 txop_ovf;
158
159 /* PDEV RX stats */
160 s32 mid_ppdu_route_change;
161 s32 status_rcvd;
162 s32 r0_frags;
163 s32 r1_frags;
164 s32 r2_frags;
165 s32 r3_frags;
166 s32 htt_msdus;
167 s32 htt_mpdus;
168 s32 loc_msdus;
169 s32 loc_mpdus;
170 s32 oversize_amsdu;
171 s32 phy_errs;
172 s32 phy_err_drop;
173 s32 mpdu_errs;
174
175 /* VDEV STATS */
176
177 /* PEER STATS */
178 u8 peers;
179 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
180
181 /* TODO: Beacon filter stats */
182
183};
184
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200185struct ath10k_dfs_stats {
186 u32 phy_errors;
187 u32 pulses_total;
188 u32 pulses_detected;
189 u32 pulses_discarded;
190 u32 radar_detected;
191};
192
Kalle Valo5e3dd152013-06-12 20:52:10 +0300193#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
194
195struct ath10k_peer {
196 struct list_head list;
197 int vdev_id;
198 u8 addr[ETH_ALEN];
199 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
200 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
201};
202
Michal Kazior9797feb2014-02-14 14:49:48 +0100203struct ath10k_sta {
204 struct ath10k_vif *arvif;
205
206 /* the following are protected by ar->data_lock */
207 u32 changed; /* IEEE80211_RC_* */
208 u32 bw;
209 u32 nss;
210 u32 smps;
211
212 struct work_struct update_wk;
213};
214
Kalle Valo5e3dd152013-06-12 20:52:10 +0300215#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
216
217struct ath10k_vif {
Michal Kazior05791192013-10-16 15:44:45 +0300218 struct list_head list;
219
Kalle Valo5e3dd152013-06-12 20:52:10 +0300220 u32 vdev_id;
221 enum wmi_vdev_type vdev_type;
222 enum wmi_vdev_subtype vdev_subtype;
223 u32 beacon_interval;
224 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200225 struct sk_buff *beacon;
Michal Kazior748afc42014-01-23 12:48:21 +0100226 /* protected by data_lock */
227 bool beacon_sent;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300228
229 struct ath10k *ar;
230 struct ieee80211_vif *vif;
231
Michal Kaziorc930f742014-01-23 11:38:25 +0100232 bool is_started;
233 bool is_up;
234 u32 aid;
235 u8 bssid[ETH_ALEN];
236
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300237 struct work_struct wep_key_work;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300238 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300239 u8 def_wep_key_idx;
240 u8 def_wep_key_newidx;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300241
242 u16 tx_seq_no;
243
244 union {
245 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300246 u32 uapsd;
247 } sta;
248 struct {
249 /* 127 stations; wmi limit */
250 u8 tim_bitmap[16];
251 u8 tim_len;
252 u32 ssid_len;
253 u8 ssid[IEEE80211_MAX_SSID_LEN];
254 bool hidden_ssid;
255 /* P2P_IE with NoA attribute for P2P_GO case */
256 u32 noa_len;
257 u8 *noa_data;
258 } ap;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300259 } u;
Janusz Dziedzic51ab1a02014-01-08 09:08:33 +0100260
261 u8 fixed_rate;
262 u8 fixed_nss;
Janusz Dziedzic9f81f722014-01-17 20:04:14 +0100263 u8 force_sgi;
Marek Kwaczynskie81bd102014-03-11 12:58:00 +0200264 bool use_cts_prot;
265 int num_legacy_stations;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266};
267
268struct ath10k_vif_iter {
269 u32 vdev_id;
270 struct ath10k_vif *arvif;
271};
272
273struct ath10k_debug {
274 struct dentry *debugfs_phy;
275
276 struct ath10k_target_stats target_stats;
277 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
278
279 struct completion event_stats_compl;
Kalle Valoa3d135e2013-09-03 11:44:10 +0300280
281 unsigned long htt_stats_mask;
282 struct delayed_work htt_stats_dwork;
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200283 struct ath10k_dfs_stats dfs_stats;
284 struct ath_dfs_pool_stats dfs_pool_stats;
Kalle Valof118a3e2014-01-03 12:59:31 +0200285
286 u32 fw_dbglog_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287};
288
Michal Kaziorf7843d72013-07-16 09:38:52 +0200289enum ath10k_state {
290 ATH10K_STATE_OFF = 0,
291 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200292
293 /* When doing firmware recovery the device is first powered down.
294 * mac80211 is supposed to call in to start() hook later on. It is
295 * however possible that driver unloading and firmware crash overlap.
296 * mac80211 can wait on conf_mutex in stop() while the device is
297 * stopped in ath10k_core_restart() work holding conf_mutex. The state
298 * RESTARTED means that the device is up and mac80211 has started hw
299 * reconfiguration. Once mac80211 is done with the reconfiguration we
300 * set the state to STATE_ON in restart_complete(). */
301 ATH10K_STATE_RESTARTING,
302 ATH10K_STATE_RESTARTED,
303
304 /* The device has crashed while restarting hw. This state is like ON
305 * but commands are blocked in HTC and -ECOMM response is given. This
306 * prevents completion timeouts and makes the driver more responsive to
307 * userspace commands. This is also prevents recursive recovery. */
308 ATH10K_STATE_WEDGED,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200309};
310
Michal Kazior0d9b0432013-08-09 10:13:33 +0200311enum ath10k_fw_features {
312 /* wmi_mgmt_rx_hdr contains extra RSSI information */
313 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
314
Bartosz Markowskice428702013-09-26 17:47:05 +0200315 /* firmware from 10X branch */
316 ATH10K_FW_FEATURE_WMI_10X = 1,
317
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200318 /* firmware support tx frame management over WMI, otherwise it's HTT */
319 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
320
Bartosz Markowskid3541812013-12-10 16:20:40 +0100321 /* Firmware does not support P2P */
322 ATH10K_FW_FEATURE_NO_P2P = 3,
323
Michal Kazior0d9b0432013-08-09 10:13:33 +0200324 /* keep last */
325 ATH10K_FW_FEATURE_COUNT,
326};
327
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200328enum ath10k_dev_flags {
329 /* Indicates that ath10k device is during CAC phase of DFS */
330 ATH10K_CAC_RUNNING,
Kalle Valo650b91f2013-11-20 10:00:49 +0200331 ATH10K_FLAG_FIRST_BOOT_DONE,
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200332};
333
Kalle Valo5e3dd152013-06-12 20:52:10 +0300334struct ath10k {
335 struct ath_common ath_common;
336 struct ieee80211_hw *hw;
337 struct device *dev;
338 u8 mac_addr[ETH_ALEN];
339
Kalle Valoe01ae682013-09-01 11:22:14 +0300340 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300341 u32 target_version;
342 u8 fw_version_major;
343 u32 fw_version_minor;
344 u16 fw_version_release;
345 u16 fw_version_build;
346 u32 phy_capability;
347 u32 hw_min_tx_power;
348 u32 hw_max_tx_power;
349 u32 ht_cap_info;
350 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200351 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300352
Michal Kazior0d9b0432013-08-09 10:13:33 +0200353 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
354
Kalle Valo5e3dd152013-06-12 20:52:10 +0300355 struct targetdef *targetdef;
356 struct hostdef *hostdef;
357
358 bool p2p;
359
360 struct {
361 void *priv;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300362 const struct ath10k_hif_ops *ops;
363 } hif;
364
Marek Puzyniak9042e172014-02-10 17:14:23 +0100365 struct completion target_suspend;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300366
367 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300368 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300369 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300370 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300371
372 struct ath10k_hw_params {
373 u32 id;
374 const char *name;
375 u32 patch_load_addr;
376
377 struct ath10k_hw_params_fw {
378 const char *dir;
379 const char *fw;
380 const char *otp;
381 const char *board;
382 } fw;
383 } hw_params;
384
Kalle Valo36527912013-09-27 19:54:55 +0300385 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300386 const void *board_data;
387 size_t board_len;
388
Michal Kazior29385052013-07-16 09:38:58 +0200389 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300390 const void *otp_data;
391 size_t otp_len;
392
Michal Kazior29385052013-07-16 09:38:58 +0200393 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300394 const void *firmware_data;
395 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200396
Kalle Valo1a222432013-09-27 19:55:07 +0300397 int fw_api;
398
Kalle Valo5e3dd152013-06-12 20:52:10 +0300399 struct {
400 struct completion started;
401 struct completion completed;
402 struct completion on_channel;
403 struct timer_list timeout;
404 bool is_roc;
405 bool in_progress;
406 bool aborting;
407 int vdev_id;
408 int roc_freq;
409 } scan;
410
411 struct {
412 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
413 } mac;
414
415 /* should never be NULL; needed for regular htt rx */
416 struct ieee80211_channel *rx_channel;
417
418 /* valid during scan; needed for mgmt rx during scan */
419 struct ieee80211_channel *scan_channel;
420
Michal Kaziorc930f742014-01-23 11:38:25 +0100421 /* current operating channel definition */
422 struct cfg80211_chan_def chandef;
423
Kalle Valo5e3dd152013-06-12 20:52:10 +0300424 int free_vdev_map;
425 int monitor_vdev_id;
426 bool monitor_enabled;
427 bool monitor_present;
428 unsigned int filter_flags;
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200429 unsigned long dev_flags;
Marek Puzyniak7d9b40b2013-11-20 10:00:28 +0200430 u32 dfs_block_radar_events;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300431
432 struct wmi_pdev_set_wmm_params_arg wmm_params;
433 struct completion install_key_done;
434
435 struct completion vdev_setup_done;
436
437 struct workqueue_struct *workqueue;
438
439 /* prevents concurrent FW reconfiguration */
440 struct mutex conf_mutex;
441
442 /* protects shared structure data */
443 spinlock_t data_lock;
444
Michal Kazior05791192013-10-16 15:44:45 +0300445 struct list_head arvifs;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300446 struct list_head peers;
447 wait_queue_head_t peer_mapping_wq;
448
Bartosz Markowski0e759f32014-01-02 14:38:33 +0100449 /* number of created peers; protected by data_lock */
450 int num_peers;
451
Kalle Valo5e3dd152013-06-12 20:52:10 +0300452 struct work_struct offchan_tx_work;
453 struct sk_buff_head offchan_tx_queue;
454 struct completion offchan_tx_completed;
455 struct sk_buff *offchan_tx_skb;
456
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200457 struct work_struct wmi_mgmt_tx_work;
458 struct sk_buff_head wmi_mgmt_tx_queue;
459
Michal Kaziorf7843d72013-07-16 09:38:52 +0200460 enum ath10k_state state;
461
Michal Kazioraffd3212013-07-16 09:54:35 +0200462 struct work_struct restart_work;
463
Michal Kazior2e1dea42013-07-31 10:32:40 +0200464 /* cycle count is reported twice for each visited channel during scan.
465 * access protected by data_lock */
466 u32 survey_last_rx_clear_count;
467 u32 survey_last_cycle_count;
468 struct survey_info survey[ATH10K_NUM_CHANS];
469
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200470 struct dfs_pattern_detector *dfs_detector;
471
Kalle Valo5e3dd152013-06-12 20:52:10 +0300472#ifdef CONFIG_ATH10K_DEBUGFS
473 struct ath10k_debug debug;
474#endif
475};
476
477struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300478 const struct ath10k_hif_ops *hif_ops);
479void ath10k_core_destroy(struct ath10k *ar);
480
Michal Kaziordd30a362013-07-16 09:38:51 +0200481int ath10k_core_start(struct ath10k *ar);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100482int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200483void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300484int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300485void ath10k_core_unregister(struct ath10k *ar);
486
Kalle Valo5e3dd152013-06-12 20:52:10 +0300487#endif /* _CORE_H_ */