Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 33 | * Parts developed by LinSysSoft Sahara team |
| 34 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 35 | **************************************************************************/ |
| 36 | |
| 37 | /* |
| 38 | * FILENAME: sxg.c |
| 39 | * |
| 40 | * The SXG driver for Alacritech's 10Gbe products. |
| 41 | * |
| 42 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 43 | * IS-NIC driver. |
| 44 | */ |
| 45 | |
| 46 | #include <linux/kernel.h> |
| 47 | #include <linux/string.h> |
| 48 | #include <linux/errno.h> |
| 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 51 | #include <linux/firmware.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 52 | #include <linux/ioport.h> |
| 53 | #include <linux/slab.h> |
| 54 | #include <linux/interrupt.h> |
| 55 | #include <linux/timer.h> |
| 56 | #include <linux/pci.h> |
| 57 | #include <linux/spinlock.h> |
| 58 | #include <linux/init.h> |
| 59 | #include <linux/netdevice.h> |
| 60 | #include <linux/etherdevice.h> |
| 61 | #include <linux/ethtool.h> |
| 62 | #include <linux/skbuff.h> |
| 63 | #include <linux/delay.h> |
| 64 | #include <linux/types.h> |
| 65 | #include <linux/dma-mapping.h> |
| 66 | #include <linux/mii.h> |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 67 | #include <linux/ip.h> |
| 68 | #include <linux/in.h> |
| 69 | #include <linux/tcp.h> |
| 70 | #include <linux/ipv6.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 71 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 72 | #define SLIC_GET_STATS_ENABLED 0 |
| 73 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 74 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 75 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 76 | #define VPCI 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 77 | #define ATK_DEBUG 1 |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 78 | #define SXG_UCODE_DEBUG 0 |
| 79 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 80 | |
| 81 | #include "sxg_os.h" |
| 82 | #include "sxghw.h" |
| 83 | #include "sxghif.h" |
| 84 | #include "sxg.h" |
| 85 | #include "sxgdbg.h" |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 86 | #include "sxgphycode-1.2.h" |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 87 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 88 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 89 | enum sxg_buffer_type BufferType); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 90 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 91 | void *RcvBlock, |
| 92 | dma_addr_t PhysicalAddress, |
| 93 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 94 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 95 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 96 | dma_addr_t PhysicalAddress, |
| 97 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 98 | |
| 99 | static void sxg_mcast_init_crc32(void); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 100 | static int sxg_entry_open(struct net_device *dev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 101 | static int sxg_second_open(struct net_device * dev); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 102 | static int sxg_entry_halt(struct net_device *dev); |
| 103 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 104 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 105 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 106 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 107 | struct sxg_scatter_gather *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 108 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 109 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 110 | int budget); |
| 111 | static void sxg_interrupt(struct adapter_t *adapter); |
| 112 | static int sxg_poll(struct napi_struct *napi, int budget); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 113 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 114 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 115 | int *sxg_napi_continue, int *work_done, int budget); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 116 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 117 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 118 | struct sxg_event *Event); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 119 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 120 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 121 | struct ether_header *EtherHdr, ushort length); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 122 | static struct net_device_stats *sxg_get_stats(struct net_device * dev); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 123 | void sxg_free_resources(struct adapter_t *adapter); |
| 124 | void sxg_free_rcvblocks(struct adapter_t *adapter); |
| 125 | void sxg_free_sgl_buffers(struct adapter_t *adapter); |
| 126 | void sxg_unmap_resources(struct adapter_t *adapter); |
| 127 | void sxg_free_mcast_addrs(struct adapter_t *adapter); |
| 128 | void sxg_collect_statistics(struct adapter_t *adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 129 | static int sxg_register_interrupt(struct adapter_t *adapter); |
| 130 | static void sxg_remove_isr(struct adapter_t *adapter); |
| 131 | static irqreturn_t sxg_isr(int irq, void *dev_id); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 132 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 133 | static void sxg_watchdog(unsigned long data); |
| 134 | static void sxg_update_link_status (struct work_struct *work); |
| 135 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 136 | #define XXXTODO 0 |
| 137 | |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 138 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 139 | static int sxg_mac_set_address(struct net_device *dev, void *ptr); |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 140 | #endif |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 141 | static void sxg_mcast_set_list(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 142 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 143 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 144 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 145 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 146 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 147 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 148 | unsigned char Index); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 149 | int sxg_change_mtu (struct net_device *netdev, int new_mtu); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 150 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 151 | static int sxg_phy_init(struct adapter_t *adapter); |
| 152 | static void sxg_link_event(struct adapter_t *adapter); |
| 153 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 154 | static void sxg_link_state(struct adapter_t *adapter, |
| 155 | enum SXG_LINK_STATE LinkState); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 156 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 157 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 158 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 159 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 160 | static void sxg_set_mcast_addr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 161 | |
| 162 | static unsigned int sxg_first_init = 1; |
| 163 | static char *sxg_banner = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 164 | "Alacritech SLIC Technology(tm) Server and Storage \ |
| 165 | 10Gbe Accelerator (Non-Accelerated)\n"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 166 | |
| 167 | static int sxg_debug = 1; |
| 168 | static int debug = -1; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 169 | static struct net_device *head_netdevice = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 170 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 171 | static struct sxgbase_driver sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 172 | .dynamic_intagg = 1, |
| 173 | }; |
| 174 | static int intagg_delay = 100; |
| 175 | static u32 dynamic_intagg = 0; |
| 176 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 177 | char sxg_driver_name[] = "sxg_nic"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 178 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 179 | #define DRV_DESCRIPTION \ |
| 180 | "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 181 | #define DRV_COPYRIGHT \ |
| 182 | "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 183 | |
| 184 | MODULE_AUTHOR(DRV_AUTHOR); |
| 185 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 186 | MODULE_LICENSE("GPL"); |
| 187 | |
| 188 | module_param(dynamic_intagg, int, 0); |
| 189 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 190 | module_param(intagg_delay, int, 0); |
| 191 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 192 | |
| 193 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 194 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 195 | {0,} |
| 196 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 197 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 198 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 199 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 200 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 201 | { |
| 202 | writel(value, reg); |
| 203 | if (flush) |
| 204 | mb(); |
| 205 | } |
| 206 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 207 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 208 | u64 value, u32 cpu) |
| 209 | { |
| 210 | u32 value_high = (u32) (value >> 32); |
| 211 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 212 | unsigned long flags; |
| 213 | |
| 214 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 215 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 216 | writel(value_low, reg); |
| 217 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 218 | } |
| 219 | |
| 220 | static void sxg_init_driver(void) |
| 221 | { |
| 222 | if (sxg_first_init) { |
| 223 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 224 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 225 | sxg_first_init = 0; |
| 226 | spin_lock_init(&sxg_global.driver_lock); |
| 227 | } |
| 228 | } |
| 229 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 230 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 231 | { |
| 232 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 233 | adapter->netdev->name, adapter->currmacaddr[0], |
| 234 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 235 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 236 | adapter->currmacaddr[5]); |
| 237 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 238 | adapter->netdev->name, adapter->macaddr[0], |
| 239 | adapter->macaddr[1], adapter->macaddr[2], |
| 240 | adapter->macaddr[3], adapter->macaddr[4], |
| 241 | adapter->macaddr[5]); |
| 242 | return; |
| 243 | } |
| 244 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 245 | /* SXG Globals */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 246 | static struct sxg_driver SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 247 | |
| 248 | #ifdef ATKDBG |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 249 | static struct sxg_trace_buffer LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 250 | #endif /* ATKDBG */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 251 | static struct sxg_trace_buffer *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 252 | |
| 253 | /* |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 254 | * MSI Related API's |
| 255 | */ |
| 256 | int sxg_register_intr(struct adapter_t *adapter); |
| 257 | int sxg_enable_msi_x(struct adapter_t *adapter); |
| 258 | int sxg_add_msi_isr(struct adapter_t *adapter); |
| 259 | void sxg_remove_msix_isr(struct adapter_t *adapter); |
| 260 | int sxg_set_interrupt_capability(struct adapter_t *adapter); |
| 261 | |
| 262 | int sxg_set_interrupt_capability(struct adapter_t *adapter) |
| 263 | { |
| 264 | int ret; |
| 265 | |
| 266 | ret = sxg_enable_msi_x(adapter); |
| 267 | if (ret != STATUS_SUCCESS) { |
| 268 | adapter->msi_enabled = FALSE; |
| 269 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Disable\n"); |
| 270 | } else { |
| 271 | adapter->msi_enabled = TRUE; |
| 272 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Enable\n"); |
| 273 | } |
| 274 | return ret; |
| 275 | } |
| 276 | |
| 277 | int sxg_register_intr(struct adapter_t *adapter) |
| 278 | { |
| 279 | int ret = 0; |
| 280 | |
| 281 | if (adapter->msi_enabled) { |
| 282 | ret = sxg_add_msi_isr(adapter); |
| 283 | } |
| 284 | else { |
| 285 | DBG_ERROR("MSI-X Enable Failed. Using Pin INT\n"); |
| 286 | ret = sxg_register_interrupt(adapter); |
| 287 | if (ret != STATUS_SUCCESS) { |
| 288 | DBG_ERROR("sxg_register_interrupt Failed\n"); |
| 289 | } |
| 290 | } |
| 291 | return ret; |
| 292 | } |
| 293 | |
| 294 | int sxg_enable_msi_x(struct adapter_t *adapter) |
| 295 | { |
| 296 | int ret; |
| 297 | |
| 298 | adapter->nr_msix_entries = 1; |
| 299 | adapter->msi_entries = kmalloc(adapter->nr_msix_entries * |
| 300 | sizeof(struct msix_entry),GFP_KERNEL); |
| 301 | if (!adapter->msi_entries) { |
| 302 | DBG_ERROR("%s:MSI Entries memory allocation Failed\n",__func__); |
| 303 | return -ENOMEM; |
| 304 | } |
| 305 | memset(adapter->msi_entries, 0, adapter->nr_msix_entries * |
| 306 | sizeof(struct msix_entry)); |
| 307 | |
| 308 | ret = pci_enable_msix(adapter->pcidev, adapter->msi_entries, |
| 309 | adapter->nr_msix_entries); |
| 310 | if (ret) { |
| 311 | DBG_ERROR("Enabling MSI-X with %d vectors failed\n", |
| 312 | adapter->nr_msix_entries); |
| 313 | /*Should try with less vector returned.*/ |
| 314 | kfree(adapter->msi_entries); |
| 315 | return STATUS_FAILURE; /*MSI-X Enable failed.*/ |
| 316 | } |
| 317 | return (STATUS_SUCCESS); |
| 318 | } |
| 319 | |
| 320 | int sxg_add_msi_isr(struct adapter_t *adapter) |
| 321 | { |
| 322 | int ret,i; |
| 323 | |
| 324 | if (!adapter->intrregistered) { |
| 325 | for (i=0; i<adapter->nr_msix_entries; i++) { |
| 326 | ret = request_irq (adapter->msi_entries[i].vector, |
| 327 | sxg_isr, |
| 328 | IRQF_SHARED, |
| 329 | adapter->netdev->name, |
| 330 | adapter->netdev); |
| 331 | if (ret) { |
| 332 | DBG_ERROR("sxg: MSI-X request_irq (%s) " |
| 333 | "FAILED [%x]\n", adapter->netdev->name, |
| 334 | ret); |
| 335 | return (ret); |
| 336 | } |
| 337 | } |
| 338 | } |
| 339 | adapter->msi_enabled = TRUE; |
| 340 | adapter->intrregistered = 1; |
| 341 | adapter->IntRegistered = TRUE; |
| 342 | return (STATUS_SUCCESS); |
| 343 | } |
| 344 | |
| 345 | void sxg_remove_msix_isr(struct adapter_t *adapter) |
| 346 | { |
| 347 | int i,vector; |
| 348 | struct net_device *netdev = adapter->netdev; |
| 349 | |
| 350 | for(i=0; i< adapter->nr_msix_entries;i++) |
| 351 | { |
| 352 | vector = adapter->msi_entries[i].vector; |
| 353 | DBG_ERROR("%s : Freeing IRQ vector#%d\n",__FUNCTION__,vector); |
| 354 | free_irq(vector,netdev); |
| 355 | } |
| 356 | } |
| 357 | |
| 358 | |
| 359 | static void sxg_remove_isr(struct adapter_t *adapter) |
| 360 | { |
| 361 | struct net_device *netdev = adapter->netdev; |
| 362 | if (adapter->msi_enabled) |
| 363 | sxg_remove_msix_isr(adapter); |
| 364 | else |
| 365 | free_irq(adapter->netdev->irq, netdev); |
| 366 | } |
| 367 | |
| 368 | void sxg_reset_interrupt_capability(struct adapter_t *adapter) |
| 369 | { |
| 370 | if (adapter->msi_enabled) { |
| 371 | pci_disable_msix(adapter->pcidev); |
| 372 | kfree(adapter->msi_entries); |
| 373 | adapter->msi_entries = NULL; |
| 374 | } |
| 375 | return; |
| 376 | } |
| 377 | |
| 378 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 379 | * sxg_download_microcode |
| 380 | * |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 381 | * Download Microcode to Sahara adapter using the Linux |
| 382 | * Firmware module to get the ucode.sys file. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 383 | * |
| 384 | * Arguments - |
| 385 | * adapter - A pointer to our adapter structure |
| 386 | * UcodeSel - microcode file selection |
| 387 | * |
| 388 | * Return |
| 389 | * int |
| 390 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 391 | static bool sxg_download_microcode(struct adapter_t *adapter, |
| 392 | enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 393 | { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 394 | const struct firmware *fw; |
| 395 | const char *file = ""; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 396 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 397 | int ret; |
| 398 | int ucode_start; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 399 | u32 Section; |
| 400 | u32 ThisSectionSize; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 401 | u32 instruction = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 402 | u32 BaseAddress, AddressOffset, Address; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 403 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 404 | u32 ValueRead; |
| 405 | u32 i; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 406 | u32 index = 0; |
| 407 | u32 num_sections = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 408 | u32 sectionSize[16]; |
| 409 | u32 sectionStart[16]; |
| 410 | |
| 411 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 412 | adapter, 0, 0, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 413 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 414 | /* |
| 415 | * This routine is only implemented to download the microcode |
| 416 | * for the Revision B Sahara chip. Rev A and Diagnostic |
| 417 | * microcode is not supported at this time. If Rev A or |
| 418 | * diagnostic ucode is required, this routine will obviously |
| 419 | * need to change. Also, eventually need to add support for |
| 420 | * Rev B checked version of ucode. That's easy enough once |
| 421 | * the free version of Rev B works. |
| 422 | */ |
| 423 | ASSERT(UcodeSel == SXG_UCODE_SYSTEM); |
| 424 | ASSERT(adapter->asictype == SAHARA_REV_B); |
| 425 | #if SXG_UCODE_DEBUG |
| 426 | file = "sxg/saharadbgdownloadB.sys"; |
| 427 | #else |
| 428 | file = "sxg/saharadownloadB.sys"; |
| 429 | #endif |
| 430 | ret = request_firmware(&fw, file, &adapter->pcidev->dev); |
| 431 | if (ret) { |
| 432 | DBG_ERROR("%s SXG_NIC: Failed to load firmware %s\n", __func__,file); |
| 433 | return ret; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 434 | } |
| 435 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 436 | /* |
| 437 | * The microcode .sys file contains starts with a 4 byte word containing |
| 438 | * the number of sections. That is followed by "num_sections" 4 byte |
| 439 | * words containing each "section" size. That is followed num_sections |
| 440 | * 4 byte words containing each section "start" address. |
| 441 | * |
| 442 | * Following the above header, the .sys file contains num_sections, |
| 443 | * where each section size is specified, newline delineatetd 12 byte |
| 444 | * microcode instructions. |
| 445 | */ |
| 446 | num_sections = *(u32 *)(fw->data + index); |
| 447 | index += 4; |
| 448 | ASSERT(num_sections <= 3); |
| 449 | for (i = 0; i < num_sections; i++) { |
| 450 | sectionSize[i] = *(u32 *)(fw->data + index); |
| 451 | index += 4; |
| 452 | } |
| 453 | for (i = 0; i < num_sections; i++) { |
| 454 | sectionStart[i] = *(u32 *)(fw->data + index); |
| 455 | index += 4; |
| 456 | } |
| 457 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 458 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 459 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 460 | udelay(50); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 461 | HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 462 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 463 | /* |
| 464 | * Download each section of the microcode as specified in |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 465 | * sectionSize[index] to sectionStart[index] address. As |
| 466 | * described above, the .sys file contains 12 byte word |
| 467 | * microcode instructions. The *download.sys file is generated |
| 468 | * using the objtosys.exe utility that was built for Sahara |
| 469 | * microcode. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 470 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 471 | /* See usage of this below when we read back for parity */ |
| 472 | ucode_start = index; |
| 473 | instruction = *(u32 *)(fw->data + index); |
| 474 | index += 4; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 475 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 476 | for (Section = 0; Section < num_sections; Section++) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 477 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 478 | /* Size in instructions */ |
| 479 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 480 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 481 | AddressOffset++) { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 482 | u32 first_instr = 0; /* See comment below */ |
| 483 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 484 | Address = BaseAddress + AddressOffset; |
| 485 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 486 | /* Write instruction bits 31 - 0 (low) */ |
| 487 | first_instr = instruction; |
| 488 | WRITE_REG(HwRegs->UcodeDataLow, instruction, FLUSH); |
| 489 | instruction = *(u32 *)(fw->data + index); |
| 490 | index += 4; /* Advance to the "next" instruction */ |
| 491 | |
| 492 | /* Write instruction bits 63-32 (middle) */ |
| 493 | WRITE_REG(HwRegs->UcodeDataMiddle, instruction, FLUSH); |
| 494 | instruction = *(u32 *)(fw->data + index); |
| 495 | index += 4; /* Advance to the "next" instruction */ |
| 496 | |
| 497 | /* Write instruction bits 95-64 (high) */ |
| 498 | WRITE_REG(HwRegs->UcodeDataHigh, instruction, FLUSH); |
| 499 | instruction = *(u32 *)(fw->data + index); |
| 500 | index += 4; /* Advance to the "next" instruction */ |
| 501 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 502 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 503 | WRITE_REG(HwRegs->UcodeAddr, |
| 504 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 505 | /* |
| 506 | * Sahara bug in the ucode download logic - the write to DataLow |
| 507 | * for the next instruction could get corrupted. To avoid this, |
| 508 | * write to DataLow again for this instruction (which may get |
| 509 | * corrupted, but it doesn't matter), then increment the address |
| 510 | * and write the data for the next instruction to DataLow. That |
| 511 | * write should succeed. |
| 512 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 513 | WRITE_REG(HwRegs->UcodeDataLow, first_instr, FLUSH); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 514 | } |
| 515 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 516 | /* |
| 517 | * Now repeat the entire operation reading the instruction back and |
| 518 | * checking for parity errors |
| 519 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 520 | index = ucode_start; |
| 521 | |
| 522 | for (Section = 0; Section < num_sections; Section++) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 523 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 524 | /* Size in instructions */ |
| 525 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 526 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 527 | AddressOffset++) { |
| 528 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 529 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 530 | WRITE_REG(HwRegs->UcodeAddr, |
| 531 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 532 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 533 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 534 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 535 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 536 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 537 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 538 | return FALSE; /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 539 | } |
| 540 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 541 | /* Read the instruction back and compare */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 542 | /* First instruction */ |
| 543 | instruction = *(u32 *)(fw->data + index); |
| 544 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 545 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 546 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 547 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 548 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 549 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 550 | } |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 551 | instruction = *(u32 *)(fw->data + index); |
| 552 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 553 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 554 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 555 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 556 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 557 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 558 | } |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 559 | instruction = *(u32 *)(fw->data + index); |
| 560 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 561 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 562 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 563 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 564 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 565 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 566 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 567 | } |
| 568 | } |
| 569 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 570 | /* download finished */ |
| 571 | release_firmware(fw); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 572 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 573 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 574 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 575 | /* |
| 576 | * Poll the CardUp register to wait for microcode to initialize |
| 577 | * Give up after 10,000 attemps (500ms). |
| 578 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 579 | for (i = 0; i < 10000; i++) { |
| 580 | udelay(50); |
| 581 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 582 | if (ValueRead == 0xCAFE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 583 | break; |
| 584 | } |
| 585 | } |
| 586 | if (i == 10000) { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 587 | DBG_ERROR("sxg: %s TIMEOUT bringing up card - verify MICROCODE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 588 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 589 | return FALSE; /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 590 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 591 | /* |
| 592 | * Now write the LoadSync register. This is used to |
| 593 | * synchronize with the card so it can scribble on the memory |
| 594 | * that contained 0xCAFE from the "CardUp" step above |
| 595 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 596 | if (UcodeSel == SXG_UCODE_SYSTEM) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 597 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 598 | } |
| 599 | |
| 600 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 601 | adapter, 0, 0, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 602 | return (TRUE); |
| 603 | } |
| 604 | |
| 605 | /* |
| 606 | * sxg_allocate_resources - Allocate memory and locks |
| 607 | * |
| 608 | * Arguments - |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 609 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 610 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 611 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 612 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 613 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 614 | { |
Mithlesh Thukral | 9fd6966 | 2009-02-24 18:09:34 +0530 | [diff] [blame] | 615 | int status = STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 616 | u32 RssIds, IsrCount; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 617 | /* struct sxg_xmt_ring *XmtRing; */ |
| 618 | /* struct sxg_rcv_ring *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 619 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 620 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 621 | |
| 622 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 623 | adapter, 0, 0, 0); |
| 624 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 625 | /* Windows tells us how many CPUs it plans to use for */ |
| 626 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 627 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 628 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 629 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 630 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 631 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 632 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 633 | spin_lock_init(&adapter->RcvQLock); |
| 634 | spin_lock_init(&adapter->SglQLock); |
| 635 | spin_lock_init(&adapter->XmtZeroLock); |
| 636 | spin_lock_init(&adapter->Bit64RegLock); |
| 637 | spin_lock_init(&adapter->AdapterLock); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 638 | atomic_set(&adapter->pending_allocations, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 639 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 640 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 641 | |
| 642 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 643 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 644 | InitializeListHead(&adapter->AllRcvBlocks); |
| 645 | InitializeListHead(&adapter->FreeSglBuffers); |
| 646 | InitializeListHead(&adapter->AllSglBuffers); |
| 647 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 648 | /* |
| 649 | * Mark these basic allocations done. This flags essentially |
| 650 | * tells the SxgFreeResources routine that it can grab spinlocks |
| 651 | * and reference listheads. |
| 652 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 653 | adapter->BasicAllocations = TRUE; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 654 | /* |
| 655 | * Main allocation loop. Start with the maximum supported by |
| 656 | * the microcode and back off if memory allocation |
| 657 | * fails. If we hit a minimum, fail. |
| 658 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 659 | |
| 660 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 661 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 662 | (unsigned int)(sizeof(struct sxg_xmt_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 663 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 664 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 665 | * Start with big items first - receive and transmit rings. |
| 666 | * At the moment I'm going to keep the ring size fixed and |
| 667 | * adjust the TCBs if we fail. Later we might |
| 668 | * consider reducing the ring size as well.. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 669 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 670 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 671 | sizeof(struct sxg_xmt_ring) * |
| 672 | 1, |
| 673 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 674 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 675 | |
| 676 | if (!adapter->XmtRings) { |
| 677 | goto per_tcb_allocation_failed; |
| 678 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 679 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 680 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 681 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 682 | (unsigned int)(sizeof(struct sxg_rcv_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 683 | adapter->RcvRings = |
| 684 | pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 685 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 686 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 687 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 688 | if (!adapter->RcvRings) { |
| 689 | goto per_tcb_allocation_failed; |
| 690 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 691 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 692 | adapter->ucode_stats = kzalloc(sizeof(struct sxg_ucode_stats), GFP_ATOMIC); |
| 693 | adapter->pucode_stats = pci_map_single(adapter->pcidev, |
| 694 | adapter->ucode_stats, |
| 695 | sizeof(struct sxg_ucode_stats), |
| 696 | PCI_DMA_FROMDEVICE); |
| 697 | // memset(adapter->ucode_stats, 0, sizeof(struct sxg_ucode_stats)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 698 | break; |
| 699 | |
| 700 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 701 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 702 | if (adapter->XmtRings) { |
| 703 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 704 | sizeof(struct sxg_xmt_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 705 | adapter->XmtRings, |
| 706 | adapter->PXmtRings); |
| 707 | adapter->XmtRings = NULL; |
| 708 | } |
| 709 | if (adapter->RcvRings) { |
| 710 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 711 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 712 | adapter->RcvRings, |
| 713 | adapter->PRcvRings); |
| 714 | adapter->RcvRings = NULL; |
| 715 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 716 | /* Loop around and try again.... */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 717 | if (adapter->ucode_stats) { |
| 718 | pci_unmap_single(adapter->pcidev, |
| 719 | sizeof(struct sxg_ucode_stats), |
| 720 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 721 | adapter->ucode_stats = NULL; |
| 722 | } |
| 723 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 724 | } |
| 725 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 726 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 727 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 728 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 729 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 730 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 731 | /* Sanity check receive data structure format */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 732 | /* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 733 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 734 | ASSERT(sizeof(struct sxg_rcv_descriptor_block) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 735 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 736 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 737 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 738 | (unsigned int)(sizeof(struct sxg_event_ring) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 739 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 740 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 741 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 742 | sizeof(struct sxg_event_ring) * |
| 743 | RssIds, |
| 744 | &adapter->PEventRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 745 | |
| 746 | if (!adapter->EventRings) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 747 | /* Caller will call SxgFreeAdapter to clean up above |
| 748 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 749 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 750 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 751 | status = STATUS_RESOURCES; |
| 752 | goto per_tcb_allocation_failed; |
| 753 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 754 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 755 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 756 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 757 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 758 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 759 | IsrCount, &adapter->PIsr); |
| 760 | if (!adapter->Isr) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 761 | /* Caller will call SxgFreeAdapter to clean up above |
| 762 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 763 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 764 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 765 | status = STATUS_RESOURCES; |
| 766 | goto per_tcb_allocation_failed; |
| 767 | } |
| 768 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 769 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 770 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 771 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 772 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 773 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 774 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 775 | sizeof(u32), |
| 776 | &adapter-> |
| 777 | PXmtRingZeroIndex); |
| 778 | if (!adapter->XmtRingZeroIndex) { |
| 779 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 780 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 781 | status = STATUS_RESOURCES; |
| 782 | goto per_tcb_allocation_failed; |
| 783 | } |
| 784 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 785 | |
| 786 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 787 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 788 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 789 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 790 | } |
| 791 | |
| 792 | /* |
| 793 | * sxg_config_pci - |
| 794 | * |
| 795 | * Set up PCI Configuration space |
| 796 | * |
| 797 | * Arguments - |
| 798 | * pcidev - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 799 | */ |
| 800 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 801 | { |
| 802 | u16 pci_command; |
| 803 | u16 new_command; |
| 804 | |
| 805 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 806 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 807 | /* Set the command register */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 808 | new_command = pci_command | ( |
| 809 | /* Memory Space Enable */ |
| 810 | PCI_COMMAND_MEMORY | |
| 811 | /* Bus master enable */ |
| 812 | PCI_COMMAND_MASTER | |
| 813 | /* Memory write and invalidate */ |
| 814 | PCI_COMMAND_INVALIDATE | |
| 815 | /* Parity error response */ |
| 816 | PCI_COMMAND_PARITY | |
| 817 | /* System ERR */ |
| 818 | PCI_COMMAND_SERR | |
| 819 | /* Fast back-to-back */ |
| 820 | PCI_COMMAND_FAST_BACK); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 821 | if (pci_command != new_command) { |
| 822 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 823 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 824 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 825 | } |
| 826 | } |
| 827 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 828 | /* |
| 829 | * sxg_read_config |
| 830 | * @adapter : Pointer to the adapter structure for the card |
| 831 | * This function will read the configuration data from EEPROM/FLASH |
| 832 | */ |
| 833 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 834 | { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 835 | /* struct sxg_config data; */ |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 836 | struct sxg_config *config; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 837 | struct sw_cfg_data *data; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 838 | dma_addr_t p_addr; |
| 839 | unsigned long status; |
| 840 | unsigned long i; |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 841 | config = pci_alloc_consistent(adapter->pcidev, |
| 842 | sizeof(struct sxg_config), &p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 843 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 844 | if(!config) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 845 | /* |
| 846 | * We cant get even this much memory. Raise a hell |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 847 | * Get out of here |
| 848 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 849 | printk(KERN_ERR"%s : Could not allocate memory for reading \ |
| 850 | EEPROM\n", __FUNCTION__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 851 | return -ENOMEM; |
| 852 | } |
| 853 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 854 | data = &config->SwCfg; |
| 855 | |
| 856 | /* Initialize (reflective memory) status register */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 857 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 858 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 859 | /* Send request to fetch configuration data */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 860 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 861 | for(i=0; i<1000; i++) { |
| 862 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 863 | if (status != SXG_CFG_TIMEOUT) |
| 864 | break; |
| 865 | mdelay(1); /* Do we really need this */ |
| 866 | } |
| 867 | |
| 868 | switch(status) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 869 | /* Config read from EEPROM succeeded */ |
| 870 | case SXG_CFG_LOAD_EEPROM: |
| 871 | /* Config read from Flash succeeded */ |
| 872 | case SXG_CFG_LOAD_FLASH: |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 873 | /* |
| 874 | * Copy the MAC address to adapter structure |
| 875 | * TODO: We are not doing the remaining part : FRU, etc |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 876 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 877 | memcpy(adapter->macaddr, data->MacAddr[0].MacAddr, |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 878 | sizeof(struct sxg_config_mac)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 879 | break; |
| 880 | case SXG_CFG_TIMEOUT: |
| 881 | case SXG_CFG_LOAD_INVALID: |
| 882 | case SXG_CFG_LOAD_ERROR: |
| 883 | default: /* Fix default handler later */ |
| 884 | printk(KERN_WARNING"%s : We could not read the config \ |
| 885 | word. Status = %ld\n", __FUNCTION__, status); |
| 886 | break; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 887 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 888 | pci_free_consistent(adapter->pcidev, sizeof(struct sw_cfg_data), data, |
| 889 | p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 890 | if (adapter->netdev) { |
| 891 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 892 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 893 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 894 | sxg_dbg_macaddrs(adapter); |
| 895 | |
| 896 | return status; |
| 897 | } |
| 898 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 899 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 900 | const struct pci_device_id *pci_tbl_entry) |
| 901 | { |
| 902 | static int did_version = 0; |
| 903 | int err; |
| 904 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 905 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 906 | void __iomem *memmapped_ioaddr; |
| 907 | u32 status = 0; |
| 908 | ulong mmio_start = 0; |
| 909 | ulong mmio_len = 0; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 910 | unsigned char revision_id; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 911 | |
| 912 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 913 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 914 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 915 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 916 | #ifdef ATKDBG |
| 917 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 918 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 919 | #endif |
| 920 | |
| 921 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 922 | |
| 923 | err = pci_enable_device(pcidev); |
| 924 | |
| 925 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 926 | if (err) { |
| 927 | return err; |
| 928 | } |
| 929 | |
| 930 | if (sxg_debug > 0 && did_version++ == 0) { |
| 931 | printk(KERN_INFO "%s\n", sxg_banner); |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 932 | printk(KERN_INFO "%s\n", SXG_DRV_VERSION); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 933 | } |
| 934 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 935 | pci_read_config_byte(pcidev, PCI_REVISION_ID, &revision_id); |
| 936 | |
Yang Hongyang | 6a35528 | 2009-04-06 19:01:13 -0700 | [diff] [blame] | 937 | if (!(err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64)))) { |
| 938 | DBG_ERROR("pci_set_dma_mask(DMA_BIT_MASK(64)) successful\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 939 | } else { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame^] | 940 | if ((err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)))) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 941 | DBG_ERROR |
| 942 | ("No usable DMA configuration, aborting err[%x]\n", |
| 943 | err); |
| 944 | return err; |
| 945 | } |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame^] | 946 | DBG_ERROR("pci_set_dma_mask(DMA_BIT_MASK(32)) successful\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 947 | } |
| 948 | |
| 949 | DBG_ERROR("Call pci_request_regions\n"); |
| 950 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 951 | err = pci_request_regions(pcidev, sxg_driver_name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 952 | if (err) { |
| 953 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 954 | return err; |
| 955 | } |
| 956 | |
| 957 | DBG_ERROR("call pci_set_master\n"); |
| 958 | pci_set_master(pcidev); |
| 959 | |
| 960 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 961 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 962 | if (!netdev) { |
| 963 | err = -ENOMEM; |
| 964 | goto err_out_exit_sxg_probe; |
| 965 | } |
| 966 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 967 | |
| 968 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 969 | |
| 970 | pci_set_drvdata(pcidev, netdev); |
| 971 | adapter = netdev_priv(netdev); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 972 | if (revision_id == 1) { |
| 973 | adapter->asictype = SAHARA_REV_A; |
| 974 | } else if (revision_id == 2) { |
| 975 | adapter->asictype = SAHARA_REV_B; |
| 976 | } else { |
| 977 | ASSERT(0); |
| 978 | DBG_ERROR("%s Unexpected revision ID %x\n", __FUNCTION__, revision_id); |
| 979 | goto err_out_exit_sxg_probe; |
| 980 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 981 | adapter->netdev = netdev; |
| 982 | adapter->pcidev = pcidev; |
| 983 | |
| 984 | mmio_start = pci_resource_start(pcidev, 0); |
| 985 | mmio_len = pci_resource_len(pcidev, 0); |
| 986 | |
| 987 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 988 | mmio_start, mmio_len); |
| 989 | |
| 990 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 991 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 992 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 993 | if (!memmapped_ioaddr) { |
| 994 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 995 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 996 | goto err_out_free_mmio_region_0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 997 | } |
| 998 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 999 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] \ |
| 1000 | len[%lx], IRQ %d.\n", __func__, memmapped_ioaddr, mmio_start, |
| 1001 | mmio_len, pcidev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1002 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1003 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1004 | adapter->base_addr = memmapped_ioaddr; |
| 1005 | |
| 1006 | mmio_start = pci_resource_start(pcidev, 2); |
| 1007 | mmio_len = pci_resource_len(pcidev, 2); |
| 1008 | |
| 1009 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 1010 | mmio_start, mmio_len); |
| 1011 | |
| 1012 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1013 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 1014 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1015 | if (!memmapped_ioaddr) { |
| 1016 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1017 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1018 | goto err_out_free_mmio_region_2; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1019 | } |
| 1020 | |
| 1021 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 1022 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 1023 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 1024 | |
| 1025 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 1026 | |
| 1027 | adapter->State = SXG_STATE_INITIALIZING; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1028 | /* |
| 1029 | * Maintain a list of all adapters anchored by |
| 1030 | * the global SxgDriver structure. |
| 1031 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1032 | adapter->Next = SxgDriver.Adapters; |
| 1033 | SxgDriver.Adapters = adapter; |
| 1034 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 1035 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1036 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1037 | sxg_mcast_init_crc32(); |
| 1038 | |
| 1039 | adapter->JumboEnabled = FALSE; |
| 1040 | adapter->RssEnabled = FALSE; |
| 1041 | if (adapter->JumboEnabled) { |
| 1042 | adapter->FrameSize = JUMBOMAXFRAME; |
| 1043 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 1044 | } else { |
| 1045 | adapter->FrameSize = ETHERMAXFRAME; |
| 1046 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 1047 | } |
| 1048 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1049 | /* |
| 1050 | * status = SXG_READ_EEPROM(adapter); |
| 1051 | * if (!status) { |
| 1052 | * goto sxg_init_bad; |
| 1053 | * } |
| 1054 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1055 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1056 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1057 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1058 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1059 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1060 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1061 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1062 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1063 | |
| 1064 | adapter->vendid = pci_tbl_entry->vendor; |
| 1065 | adapter->devid = pci_tbl_entry->device; |
| 1066 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1067 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 1068 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 1069 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 1070 | adapter->irq = pcidev->irq; |
| 1071 | adapter->next_netdevice = head_netdevice; |
| 1072 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1073 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1074 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1075 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1076 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1077 | status = sxg_allocate_resources(adapter); |
| 1078 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1079 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1080 | if (status != STATUS_SUCCESS) { |
| 1081 | goto err_out_unmap; |
| 1082 | } |
| 1083 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1084 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 1085 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1086 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1087 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1088 | sxg_read_config(adapter); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1089 | status = sxg_adapter_set_hwaddr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1090 | } else { |
| 1091 | adapter->state = ADAPT_FAIL; |
| 1092 | adapter->linkstate = LINK_DOWN; |
| 1093 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 1094 | } |
| 1095 | |
| 1096 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 1097 | netdev->irq = adapter->irq; |
| 1098 | netdev->open = sxg_entry_open; |
| 1099 | netdev->stop = sxg_entry_halt; |
| 1100 | netdev->hard_start_xmit = sxg_send_packets; |
| 1101 | netdev->do_ioctl = sxg_ioctl; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1102 | netdev->change_mtu = sxg_change_mtu; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1103 | #if XXXTODO |
| 1104 | netdev->set_mac_address = sxg_mac_set_address; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1105 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1106 | netdev->get_stats = sxg_get_stats; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1107 | netdev->set_multicast_list = sxg_mcast_set_list; |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 1108 | SET_ETHTOOL_OPS(netdev, &sxg_nic_ethtool_ops); |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1109 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 1110 | err = sxg_set_interrupt_capability(adapter); |
| 1111 | if (err != STATUS_SUCCESS) |
| 1112 | DBG_ERROR("Cannot enable MSI-X capability\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1113 | |
| 1114 | strcpy(netdev->name, "eth%d"); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1115 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1116 | if ((err = register_netdev(netdev))) { |
| 1117 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 1118 | netdev->name); |
| 1119 | goto err_out_unmap; |
| 1120 | } |
| 1121 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1122 | netif_napi_add(netdev, &adapter->napi, |
| 1123 | sxg_poll, SXG_NETDEV_WEIGHT); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 1124 | netdev->watchdog_timeo = 2 * HZ; |
| 1125 | init_timer(&adapter->watchdog_timer); |
| 1126 | adapter->watchdog_timer.function = &sxg_watchdog; |
| 1127 | adapter->watchdog_timer.data = (unsigned long) adapter; |
| 1128 | INIT_WORK(&adapter->update_link_status, sxg_update_link_status); |
| 1129 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1130 | DBG_ERROR |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1131 | ("sxg: %s addr 0x%lx, irq %d, MAC addr \ |
| 1132 | %02X:%02X:%02X:%02X:%02X:%02X\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1133 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 1134 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 1135 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 1136 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1137 | /* sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1138 | ASSERT(status == FALSE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1139 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1140 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1141 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1142 | status, jiffies, smp_processor_id()); |
| 1143 | return status; |
| 1144 | |
| 1145 | err_out_unmap: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1146 | sxg_free_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1147 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1148 | err_out_free_mmio_region_2: |
| 1149 | |
| 1150 | mmio_start = pci_resource_start(pcidev, 2); |
| 1151 | mmio_len = pci_resource_len(pcidev, 2); |
| 1152 | release_mem_region(mmio_start, mmio_len); |
| 1153 | |
| 1154 | err_out_free_mmio_region_0: |
| 1155 | |
| 1156 | mmio_start = pci_resource_start(pcidev, 0); |
| 1157 | mmio_len = pci_resource_len(pcidev, 0); |
| 1158 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1159 | release_mem_region(mmio_start, mmio_len); |
| 1160 | |
| 1161 | err_out_exit_sxg_probe: |
| 1162 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1163 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1164 | smp_processor_id()); |
| 1165 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1166 | pci_disable_device(pcidev); |
| 1167 | DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__); |
| 1168 | kfree(netdev); |
| 1169 | printk("Exit %s, Sxg driver loading failed..\n", __FUNCTION__); |
| 1170 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1171 | return -ENODEV; |
| 1172 | } |
| 1173 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1174 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1175 | * LINE BASE Interrupt routines.. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1176 | * |
| 1177 | * sxg_disable_interrupt |
| 1178 | * |
| 1179 | * DisableInterrupt Handler |
| 1180 | * |
| 1181 | * Arguments: |
| 1182 | * |
| 1183 | * adapter: Our adapter structure |
| 1184 | * |
| 1185 | * Return Value: |
| 1186 | * None. |
| 1187 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1188 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1189 | { |
| 1190 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 1191 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1192 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1193 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1194 | /* Turn off interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1195 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 1196 | |
| 1197 | adapter->InterruptsEnabled = 0; |
| 1198 | |
| 1199 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 1200 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 1201 | } |
| 1202 | |
| 1203 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1204 | * sxg_enable_interrupt |
| 1205 | * |
| 1206 | * EnableInterrupt Handler |
| 1207 | * |
| 1208 | * Arguments: |
| 1209 | * |
| 1210 | * adapter: Our adapter structure |
| 1211 | * |
| 1212 | * Return Value: |
| 1213 | * None. |
| 1214 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1215 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1216 | { |
| 1217 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 1218 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1219 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1220 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1221 | /* Turn on interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1222 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 1223 | |
| 1224 | adapter->InterruptsEnabled = 1; |
| 1225 | |
| 1226 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 1227 | adapter, 0, 0, 0); |
| 1228 | } |
| 1229 | |
| 1230 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1231 | * sxg_isr - Process an line-based interrupt |
| 1232 | * |
| 1233 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1234 | * Context - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1235 | * QueueDefault - Output parameter to queue to default CPU |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1236 | * TargetCpus - Output bitmap to schedule DPC's |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1237 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1238 | * Return Value: TRUE if our interrupt |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1239 | */ |
| 1240 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 1241 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1242 | struct net_device *dev = (struct net_device *) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1243 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1244 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1245 | if(adapter->state != ADAPT_UP) |
| 1246 | return IRQ_NONE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1247 | adapter->Stats.NumInts++; |
| 1248 | if (adapter->Isr[0] == 0) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1249 | /* |
| 1250 | * The SLIC driver used to experience a number of spurious |
| 1251 | * interrupts due to the delay associated with the masking of |
| 1252 | * the interrupt (we'd bounce back in here). If we see that |
| 1253 | * again with Sahara,add a READ_REG of the Icr register after |
| 1254 | * the WRITE_REG below. |
| 1255 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1256 | adapter->Stats.FalseInts++; |
| 1257 | return IRQ_NONE; |
| 1258 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1259 | /* |
| 1260 | * Move the Isr contents and clear the value in |
| 1261 | * shared memory, and mask interrupts |
| 1262 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1263 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1264 | #if XXXTODO /* RSS Stuff */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1265 | /* |
| 1266 | * If RSS is enabled and the ISR specifies SXG_ISR_EVENT, then |
| 1267 | * schedule DPC's based on event queues. |
| 1268 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1269 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1270 | for (i = 0; |
| 1271 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1272 | i++) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1273 | struct sxg_event_ring *EventRing = |
| 1274 | &adapter->EventRings[i]; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1275 | struct sxg_event *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1276 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1277 | unsigned char Cpu = |
| 1278 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1279 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1280 | adapter->IsrDpcsPending++; |
| 1281 | CpuMask |= (1 << Cpu); |
| 1282 | } |
| 1283 | } |
| 1284 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1285 | /* |
| 1286 | * Now, either schedule the CPUs specified by the CpuMask, |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1287 | * or queue default |
| 1288 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1289 | if (CpuMask) { |
| 1290 | *QueueDefault = FALSE; |
| 1291 | } else { |
| 1292 | adapter->IsrDpcsPending = 1; |
| 1293 | *QueueDefault = TRUE; |
| 1294 | } |
| 1295 | *TargetCpus = CpuMask; |
| 1296 | #endif |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1297 | sxg_interrupt(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1298 | |
| 1299 | return IRQ_HANDLED; |
| 1300 | } |
| 1301 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1302 | static void sxg_interrupt(struct adapter_t *adapter) |
| 1303 | { |
| 1304 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
| 1305 | |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1306 | if (napi_schedule_prep(&adapter->napi)) { |
| 1307 | __napi_schedule(&adapter->napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1308 | } |
| 1309 | } |
| 1310 | |
| 1311 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 1312 | int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1313 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1314 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1315 | u32 NewIsr; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1316 | int sxg_napi_continue = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1317 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1318 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1319 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1320 | ASSERT(adapter->RssEnabled == FALSE); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1321 | |
| 1322 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1323 | adapter->Isr[0] = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1324 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1325 | /* Always process the event queue. */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1326 | while (sxg_napi_continue) |
| 1327 | { |
| 1328 | sxg_process_event_queue(adapter, |
| 1329 | (adapter->RssEnabled ? /*RssId */ 0 : 0), |
| 1330 | &sxg_napi_continue, work_done, budget); |
| 1331 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1332 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1333 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1334 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1335 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1336 | ASSERT(adapter->RssEnabled); |
| 1337 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1338 | adapter, 0, 0, 0); |
| 1339 | return; |
| 1340 | } |
| 1341 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1342 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1343 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1344 | /* Reenable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1345 | adapter->IsrCopy[0] = 0; |
| 1346 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1347 | adapter, NewIsr, 0, 0); |
| 1348 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1349 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1350 | adapter, 0, 0, 0); |
| 1351 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1352 | static int sxg_poll(struct napi_struct *napi, int budget) |
| 1353 | { |
| 1354 | struct adapter_t *adapter = container_of(napi, struct adapter_t, napi); |
| 1355 | int work_done = 0; |
| 1356 | |
| 1357 | sxg_handle_interrupt(adapter, &work_done, budget); |
| 1358 | |
| 1359 | if (work_done < budget) { |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1360 | napi_complete(napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1361 | WRITE_REG(adapter->UcodeRegs[0].Isr, 0, TRUE); |
| 1362 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1363 | return work_done; |
| 1364 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1365 | |
| 1366 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1367 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1368 | * message based interrupt DPC routines |
| 1369 | * |
| 1370 | * Arguments: |
| 1371 | * adapter - Our adapter structure |
| 1372 | * Queue - The ISR that needs processing |
| 1373 | * |
| 1374 | * Return Value: |
| 1375 | * None |
| 1376 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1377 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1378 | { |
| 1379 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1380 | u32 NewIsr = 0; |
| 1381 | |
| 1382 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1383 | adapter, Isr, 0, 0); |
| 1384 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1385 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1386 | if (Isr & SXG_ISR_ERR) { |
| 1387 | if (Isr & SXG_ISR_PDQF) { |
| 1388 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1389 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1390 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1391 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1392 | if (Isr & SXG_ISR_RMISS) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1393 | /* |
| 1394 | * There is a bunch of code in the SLIC driver which |
| 1395 | * attempts to process more receive events per DPC |
| 1396 | * if we start to fall behind. We'll probablyd |
| 1397 | * need to do something similar here, but hold |
| 1398 | * off for now. I don't want to make the code more |
| 1399 | * complicated than strictly needed. |
| 1400 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1401 | adapter->stats.rx_missed_errors++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1402 | if (adapter->stats.rx_missed_errors< 5) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1403 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1404 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1405 | } |
| 1406 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1407 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1408 | if (Isr & SXG_ISR_DEAD) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1409 | /* |
| 1410 | * Set aside the crash info and set the adapter state |
| 1411 | * to RESET |
| 1412 | */ |
| 1413 | adapter->CrashCpu = (unsigned char) |
| 1414 | ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1415 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1416 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1417 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1418 | adapter->CrashLocation, adapter->CrashCpu); |
| 1419 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1420 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1421 | if (Isr & SXG_ISR_ERFULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1422 | /* |
| 1423 | * Same issue as RMISS, really. This means the |
| 1424 | * host is falling behind the card. Need to increase |
| 1425 | * event ring size, process more events per interrupt, |
| 1426 | * and/or reduce/remove interrupt aggregation. |
| 1427 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1428 | adapter->Stats.EventRingFull++; |
| 1429 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1430 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1431 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1432 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1433 | if (Isr & SXG_ISR_XDROP) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1434 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1435 | } |
| 1436 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1437 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1438 | if (Isr & SXG_ISR_SPSEND) { |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1439 | sxg_complete_slow_send(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1440 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1441 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1442 | if (Isr & SXG_ISR_UPC) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1443 | /* Maybe change when debug is added.. */ |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1444 | // ASSERT(adapter->DumpCmdRunning); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1445 | adapter->DumpCmdRunning = FALSE; |
| 1446 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1447 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1448 | if (Isr & SXG_ISR_LINK) { |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 1449 | if (adapter->state != ADAPT_DOWN) { |
| 1450 | adapter->link_status_changed = 1; |
| 1451 | schedule_work(&adapter->update_link_status); |
| 1452 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1453 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1454 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1455 | if (Isr & SXG_ISR_BREAK) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1456 | /* |
| 1457 | * At the moment AGDB isn't written to support interactive |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1458 | * debug sessions. When it is, this interrupt will be used to |
| 1459 | * signal AGDB that it has hit a breakpoint. For now, ASSERT. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1460 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1461 | ASSERT(0); |
| 1462 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1463 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1464 | if (Isr & SXG_ISR_PING) { |
| 1465 | adapter->PingOutstanding = FALSE; |
| 1466 | } |
| 1467 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1468 | adapter, Isr, NewIsr, 0); |
| 1469 | |
| 1470 | return (NewIsr); |
| 1471 | } |
| 1472 | |
| 1473 | /* |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1474 | * sxg_rcv_checksum - Set the checksum for received packet |
| 1475 | * |
| 1476 | * Arguements: |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1477 | * @adapter - Adapter structure on which packet is received |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1478 | * @skb - Packet which is receieved |
| 1479 | * @Event - Event read from hardware |
| 1480 | */ |
| 1481 | |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1482 | void sxg_rcv_checksum(struct adapter_t *adapter, struct sk_buff *skb, |
| 1483 | struct sxg_event *Event) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1484 | { |
| 1485 | skb->ip_summed = CHECKSUM_NONE; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1486 | if (likely(adapter->flags & SXG_RCV_IP_CSUM_ENABLED)) { |
| 1487 | if (likely(adapter->flags & SXG_RCV_TCP_CSUM_ENABLED) |
| 1488 | && (Event->Status & EVENT_STATUS_TCPIP)) { |
| 1489 | if(!(Event->Status & EVENT_STATUS_TCPBAD)) |
| 1490 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1491 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1492 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1493 | } else if(Event->Status & EVENT_STATUS_IPONLY) { |
| 1494 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
| 1495 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1496 | } |
| 1497 | } |
| 1498 | } |
| 1499 | |
| 1500 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1501 | * sxg_process_event_queue - Process our event queue |
| 1502 | * |
| 1503 | * Arguments: |
| 1504 | * - adapter - Adapter structure |
| 1505 | * - RssId - The event queue requiring processing |
| 1506 | * |
| 1507 | * Return Value: |
| 1508 | * None. |
| 1509 | */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1510 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 1511 | int *sxg_napi_continue, int *work_done, int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1512 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1513 | struct sxg_event_ring *EventRing = &adapter->EventRings[RssId]; |
| 1514 | struct sxg_event *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1515 | u32 EventsProcessed = 0, Batches = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1516 | struct sk_buff *skb; |
| 1517 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1518 | struct sk_buff *prev_skb = NULL; |
| 1519 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1520 | u32 Index; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1521 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1522 | #endif |
| 1523 | u32 ReturnStatus = 0; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1524 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1525 | |
| 1526 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1527 | (adapter->State == SXG_STATE_PAUSING) || |
| 1528 | (adapter->State == SXG_STATE_PAUSED) || |
| 1529 | (adapter->State == SXG_STATE_HALTING)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1530 | /* |
| 1531 | * We may still have unprocessed events on the queue if |
| 1532 | * the card crashed. Don't process them. |
| 1533 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1534 | if (adapter->Dead) { |
| 1535 | return (0); |
| 1536 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1537 | /* |
| 1538 | * In theory there should only be a single processor that |
| 1539 | * accesses this queue, and only at interrupt-DPC time. So/ |
| 1540 | * we shouldn't need a lock for any of this. |
| 1541 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1542 | while (Event->Status & EVENT_STATUS_VALID) { |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1543 | (*sxg_napi_continue) = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1544 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1545 | Event, Event->Code, Event->Status, |
| 1546 | adapter->NextEvent); |
| 1547 | switch (Event->Code) { |
| 1548 | case EVENT_CODE_BUFFERS: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1549 | /* struct sxg_ring_info Head & Tail == unsigned char */ |
| 1550 | ASSERT(!(Event->CommandIndex & 0xFF00)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1551 | sxg_complete_descriptor_blocks(adapter, |
| 1552 | Event->CommandIndex); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1553 | break; |
| 1554 | case EVENT_CODE_SLOWRCV: |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1555 | (*work_done)++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1556 | --adapter->RcvBuffersOnCard; |
| 1557 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1558 | u32 rx_bytes; |
| 1559 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1560 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1561 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1562 | IndicationList, num_skbs); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1563 | /* |
| 1564 | * Linux, we just pass up each skb to the |
| 1565 | * protocol above at this point, there is no |
| 1566 | * capability of an indication list. |
| 1567 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1568 | #else |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1569 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1570 | /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
| 1571 | rx_bytes = Event->Length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1572 | adapter->stats.rx_packets++; |
| 1573 | adapter->stats.rx_bytes += rx_bytes; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1574 | sxg_rcv_checksum(adapter, skb, Event); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1575 | skb->dev = adapter->netdev; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1576 | netif_receive_skb(skb); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1577 | #endif |
| 1578 | } |
| 1579 | break; |
| 1580 | default: |
| 1581 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1582 | __func__, Event->Code); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1583 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1584 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1585 | /* |
| 1586 | * See if we need to restock card receive buffers. |
| 1587 | * There are two things to note here: |
| 1588 | * First - This test is not SMP safe. The |
| 1589 | * adapter->BuffersOnCard field is protected via atomic |
| 1590 | * interlocked calls, but we do not protect it with respect |
| 1591 | * to these tests. The only way to do that is with a lock, |
| 1592 | * and I don't want to grab a lock every time we adjust the |
| 1593 | * BuffersOnCard count. Instead, we allow the buffer |
| 1594 | * replenishment to be off once in a while. The worst that |
| 1595 | * can happen is the card is given on more-or-less descriptor |
| 1596 | * block than the arbitrary value we've chosen. No big deal |
| 1597 | * In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard |
| 1598 | * is adjusted. |
| 1599 | * Second - We expect this test to rarely |
| 1600 | * evaluate to true. We attempt to refill descriptor blocks |
| 1601 | * as they are returned to us (sxg_complete_descriptor_blocks) |
| 1602 | * so The only time this should evaluate to true is when |
| 1603 | * sxg_complete_descriptor_blocks failed to allocate |
| 1604 | * receive buffers. |
| 1605 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1606 | if (adapter->JumboEnabled) |
| 1607 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 1608 | |
| 1609 | if (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1610 | sxg_stock_rcv_buffers(adapter); |
| 1611 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1612 | /* |
| 1613 | * It's more efficient to just set this to zero. |
| 1614 | * But clearing the top bit saves potential debug info... |
| 1615 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1616 | Event->Status &= ~EVENT_STATUS_VALID; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1617 | /* Advance to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1618 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1619 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1620 | EventsProcessed++; |
| 1621 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1622 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1623 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1624 | EVENT_RING_BATCH, FALSE); |
| 1625 | EventsProcessed = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1626 | /* |
| 1627 | * If we've processed our batch limit, break out of the |
| 1628 | * loop and return SXG_ISR_EVENT to arrange for us to |
| 1629 | * be called again |
| 1630 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1631 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1632 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1633 | TRACE_NOISY, "EvtLimit", Batches, |
| 1634 | adapter->NextEvent, 0, 0); |
| 1635 | ReturnStatus = SXG_ISR_EVENT; |
| 1636 | break; |
| 1637 | } |
| 1638 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1639 | if (*work_done >= budget) { |
| 1640 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1641 | EventsProcessed, FALSE); |
| 1642 | EventsProcessed = 0; |
| 1643 | (*sxg_napi_continue) = 0; |
| 1644 | break; |
| 1645 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1646 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1647 | if (!(Event->Status & EVENT_STATUS_VALID)) |
| 1648 | (*sxg_napi_continue) = 0; |
| 1649 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1650 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1651 | /* Indicate any received dumb-nic frames */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1652 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1653 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1654 | /* Release events back to the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1655 | if (EventsProcessed) { |
| 1656 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1657 | EventsProcessed, FALSE); |
| 1658 | } |
| 1659 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1660 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1661 | |
| 1662 | return (ReturnStatus); |
| 1663 | } |
| 1664 | |
| 1665 | /* |
| 1666 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1667 | * |
| 1668 | * Arguments - |
| 1669 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1670 | * Return |
| 1671 | * None |
| 1672 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1673 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1674 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1675 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 1676 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1677 | u32 *ContextType; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1678 | struct sxg_cmd *XmtCmd; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1679 | unsigned long flags = 0; |
| 1680 | unsigned long sgl_flags = 0; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1681 | unsigned int processed_count = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1682 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1683 | /* |
| 1684 | * NOTE - This lock is dropped and regrabbed in this loop. |
| 1685 | * This means two different processors can both be running/ |
| 1686 | * through this loop. Be *very* careful. |
| 1687 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1688 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1689 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1690 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1691 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1692 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1693 | while ((XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) |
| 1694 | && processed_count++ < SXG_COMPLETE_SLOW_SEND_LIMIT) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1695 | /* |
| 1696 | * Locate the current Cmd (ring descriptor entry), and |
| 1697 | * associated SGL, and advance the tail |
| 1698 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1699 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1700 | ASSERT(ContextType); |
| 1701 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1702 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1703 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1704 | XmtCmd->Sgl = 0; |
| 1705 | |
| 1706 | switch (*ContextType) { |
| 1707 | case SXG_SGL_DUMB: |
| 1708 | { |
| 1709 | struct sk_buff *skb; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1710 | struct sxg_scatter_gather *SxgSgl = |
| 1711 | (struct sxg_scatter_gather *)ContextType; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1712 | dma64_addr_t FirstSgeAddress; |
| 1713 | u32 FirstSgeLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1714 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1715 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1716 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1717 | skb = SxgSgl->DumbPacket; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1718 | FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress; |
| 1719 | FirstSgeLength = XmtCmd->Buffer.FirstSgeLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1720 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1721 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1722 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1723 | 0, 0); |
| 1724 | ASSERT(adapter->Stats.XmtQLen); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1725 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1726 | * Now drop the lock and complete the send |
| 1727 | * back to Microsoft. We need to drop the lock |
| 1728 | * because Microsoft can come back with a |
| 1729 | * chimney send, which results in a double trip |
| 1730 | * in SxgTcpOuput |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1731 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1732 | spin_unlock_irqrestore( |
| 1733 | &adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1734 | |
| 1735 | SxgSgl->DumbPacket = NULL; |
| 1736 | SXG_COMPLETE_DUMB_SEND(adapter, skb, |
| 1737 | FirstSgeAddress, |
| 1738 | FirstSgeLength); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1739 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1740 | /* and reacquire.. */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1741 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1742 | } |
| 1743 | break; |
| 1744 | default: |
| 1745 | ASSERT(0); |
| 1746 | } |
| 1747 | } |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1748 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1749 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1750 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1751 | } |
| 1752 | |
| 1753 | /* |
| 1754 | * sxg_slow_receive |
| 1755 | * |
| 1756 | * Arguments - |
| 1757 | * adapter - A pointer to our adapter structure |
| 1758 | * Event - Receive event |
| 1759 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1760 | * Return - skb |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1761 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1762 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 1763 | struct sxg_event *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1764 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1765 | u32 BufferSize = adapter->ReceiveBufferSize; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1766 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1767 | struct sk_buff *Packet; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1768 | static int read_counter = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1769 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1770 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1771 | if(read_counter++ & 0x100) |
| 1772 | { |
| 1773 | sxg_collect_statistics(adapter); |
| 1774 | read_counter = 0; |
| 1775 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1776 | ASSERT(RcvDataBufferHdr); |
| 1777 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1778 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1779 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1780 | /*RcvDataBufferHdr->VirtualAddress*/ 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1781 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1782 | switch (adapter->State) { |
| 1783 | case SXG_STATE_RUNNING: |
| 1784 | break; |
| 1785 | case SXG_STATE_PAUSING: |
| 1786 | case SXG_STATE_PAUSED: |
| 1787 | case SXG_STATE_HALTING: |
| 1788 | goto drop; |
| 1789 | default: |
| 1790 | ASSERT(0); |
| 1791 | goto drop; |
| 1792 | } |
| 1793 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1794 | /* |
| 1795 | * memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1796 | * RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1797 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1798 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1799 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1800 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1801 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1802 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1803 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1804 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1805 | SXG_RECEIVE_DATA_LOCATION |
| 1806 | (RcvDataBufferHdr)); |
| 1807 | goto drop; |
| 1808 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1809 | #if XXXTODO /* VLAN stuff */ |
| 1810 | /* If there's a VLAN tag, extract it and validate it */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1811 | if (((struct ether_header *) |
| 1812 | (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))->EtherType |
| 1813 | == ETHERTYPE_VLAN) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1814 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1815 | STATUS_SUCCESS) { |
| 1816 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1817 | "BadVlan", Event, |
| 1818 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1819 | Event->Length, 0); |
| 1820 | goto drop; |
| 1821 | } |
| 1822 | } |
| 1823 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1824 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1825 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1826 | if (!sxg_mac_filter(adapter, |
| 1827 | (struct ether_header *)(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)), |
| 1828 | Event->Length)) { |
| 1829 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1830 | Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1831 | Event->Length, 0); |
| 1832 | goto drop; |
| 1833 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1834 | |
| 1835 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1836 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1837 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1838 | |
| 1839 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1840 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1841 | /* Lastly adjust the receive packet length. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1842 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1843 | RcvDataBufferHdr->PhysicalAddress = (dma_addr_t)NULL; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1844 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 1845 | if (RcvDataBufferHdr->skb) |
| 1846 | { |
| 1847 | spin_lock(&adapter->RcvQLock); |
| 1848 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1849 | // adapter->RcvBuffersOnCard ++; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1850 | spin_unlock(&adapter->RcvQLock); |
| 1851 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1852 | return (Packet); |
| 1853 | |
| 1854 | drop: |
| 1855 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1856 | RcvDataBufferHdr, Event->Length, 0, 0); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1857 | adapter->stats.rx_dropped++; |
| 1858 | // adapter->Stats.RcvDiscards++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1859 | spin_lock(&adapter->RcvQLock); |
| 1860 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1861 | spin_unlock(&adapter->RcvQLock); |
| 1862 | return (NULL); |
| 1863 | } |
| 1864 | |
| 1865 | /* |
| 1866 | * sxg_process_rcv_error - process receive error and update |
| 1867 | * stats |
| 1868 | * |
| 1869 | * Arguments: |
| 1870 | * adapter - Adapter structure |
| 1871 | * ErrorStatus - 4-byte receive error status |
| 1872 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1873 | * Return Value : None |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1874 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1875 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1876 | { |
| 1877 | u32 Error; |
| 1878 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1879 | adapter->stats.rx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1880 | |
| 1881 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1882 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1883 | switch (Error) { |
| 1884 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1885 | adapter->Stats.TransportCsum++; |
| 1886 | break; |
| 1887 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1888 | adapter->Stats.TransportUflow++; |
| 1889 | break; |
| 1890 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1891 | adapter->Stats.TransportHdrLen++; |
| 1892 | break; |
| 1893 | } |
| 1894 | } |
| 1895 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1896 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1897 | switch (Error) { |
| 1898 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1899 | adapter->Stats.NetworkCsum++; |
| 1900 | break; |
| 1901 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1902 | adapter->Stats.NetworkUflow++; |
| 1903 | break; |
| 1904 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1905 | adapter->Stats.NetworkHdrLen++; |
| 1906 | break; |
| 1907 | } |
| 1908 | } |
| 1909 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1910 | adapter->Stats.Parity++; |
| 1911 | } |
| 1912 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1913 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1914 | switch (Error) { |
| 1915 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1916 | adapter->Stats.LinkParity++; |
| 1917 | break; |
| 1918 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1919 | adapter->Stats.LinkEarly++; |
| 1920 | break; |
| 1921 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1922 | adapter->Stats.LinkBufOflow++; |
| 1923 | break; |
| 1924 | case SXG_RCV_STATUS_LINK_CODE: |
| 1925 | adapter->Stats.LinkCode++; |
| 1926 | break; |
| 1927 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1928 | adapter->Stats.LinkDribble++; |
| 1929 | break; |
| 1930 | case SXG_RCV_STATUS_LINK_CRC: |
| 1931 | adapter->Stats.LinkCrc++; |
| 1932 | break; |
| 1933 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1934 | adapter->Stats.LinkOflow++; |
| 1935 | break; |
| 1936 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1937 | adapter->Stats.LinkUflow++; |
| 1938 | break; |
| 1939 | } |
| 1940 | } |
| 1941 | } |
| 1942 | |
| 1943 | /* |
| 1944 | * sxg_mac_filter |
| 1945 | * |
| 1946 | * Arguments: |
| 1947 | * adapter - Adapter structure |
| 1948 | * pether - Ethernet header |
| 1949 | * length - Frame length |
| 1950 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1951 | * Return Value : TRUE if the frame is to be allowed |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1952 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1953 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 1954 | struct ether_header *EtherHdr, ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1955 | { |
| 1956 | bool EqualAddr; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1957 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1958 | |
| 1959 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1960 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1961 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1962 | if (adapter->MacFilter & MAC_BCAST) { |
| 1963 | adapter->Stats.DumbRcvBcastPkts++; |
| 1964 | adapter->Stats.DumbRcvBcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1965 | return (TRUE); |
| 1966 | } |
| 1967 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1968 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1969 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1970 | adapter->Stats.DumbRcvMcastPkts++; |
| 1971 | adapter->Stats.DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1972 | return (TRUE); |
| 1973 | } |
| 1974 | if (adapter->MacFilter & MAC_MCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1975 | struct dev_mc_list *mclist = dev->mc_list; |
| 1976 | while (mclist) { |
| 1977 | ETHER_EQ_ADDR(mclist->da_addr, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1978 | EtherHdr->ether_dhost, |
| 1979 | EqualAddr); |
| 1980 | if (EqualAddr) { |
| 1981 | adapter->Stats. |
| 1982 | DumbRcvMcastPkts++; |
| 1983 | adapter->Stats. |
| 1984 | DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1985 | return (TRUE); |
| 1986 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1987 | mclist = mclist->next; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1988 | } |
| 1989 | } |
| 1990 | } |
| 1991 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1992 | /* |
| 1993 | * Not broadcast or multicast. Must be directed at us or |
| 1994 | * the card is in promiscuous mode. Either way, consider it |
| 1995 | * ours if MAC_DIRECTED is set |
| 1996 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1997 | adapter->Stats.DumbRcvUcastPkts++; |
| 1998 | adapter->Stats.DumbRcvUcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1999 | return (TRUE); |
| 2000 | } |
| 2001 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2002 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2003 | return (TRUE); |
| 2004 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2005 | return (FALSE); |
| 2006 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2007 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2008 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2009 | { |
| 2010 | if (!adapter->intrregistered) { |
| 2011 | int retval; |
| 2012 | |
| 2013 | DBG_ERROR |
| 2014 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2015 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2016 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2017 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2018 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2019 | |
| 2020 | retval = request_irq(adapter->netdev->irq, |
| 2021 | &sxg_isr, |
| 2022 | IRQF_SHARED, |
| 2023 | adapter->netdev->name, adapter->netdev); |
| 2024 | |
| 2025 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2026 | |
| 2027 | if (retval) { |
| 2028 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 2029 | adapter->netdev->name, retval); |
| 2030 | return (retval); |
| 2031 | } |
| 2032 | adapter->intrregistered = 1; |
| 2033 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2034 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2035 | adapter->RssEnabled = FALSE; |
| 2036 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2037 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2038 | } |
| 2039 | return (STATUS_SUCCESS); |
| 2040 | } |
| 2041 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2042 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2043 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2044 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2045 | #if XXXTODO |
| 2046 | slic_init_cleanup(adapter); |
| 2047 | #endif |
| 2048 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 2049 | adapter->error_interrupts = 0; |
| 2050 | adapter->rcv_interrupts = 0; |
| 2051 | adapter->xmit_interrupts = 0; |
| 2052 | adapter->linkevent_interrupts = 0; |
| 2053 | adapter->upr_interrupts = 0; |
| 2054 | adapter->num_isrs = 0; |
| 2055 | adapter->xmit_completes = 0; |
| 2056 | adapter->rcv_broadcasts = 0; |
| 2057 | adapter->rcv_multicasts = 0; |
| 2058 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2059 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2060 | } |
| 2061 | |
| 2062 | /* |
| 2063 | * sxg_if_init |
| 2064 | * |
| 2065 | * Perform initialization of our slic interface. |
| 2066 | * |
| 2067 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2068 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2069 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2070 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2071 | int status = 0; |
| 2072 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2073 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2074 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2075 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2076 | adapter->linkstate, dev->flags); |
| 2077 | |
| 2078 | /* adapter should be down at this point */ |
| 2079 | if (adapter->state != ADAPT_DOWN) { |
| 2080 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 2081 | return (-EIO); |
| 2082 | } |
| 2083 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 2084 | |
| 2085 | adapter->devflags_prev = dev->flags; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2086 | adapter->MacFilter = MAC_DIRECTED; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2087 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2088 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2089 | adapter->netdev->name); |
| 2090 | if (dev->flags & IFF_BROADCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2091 | adapter->MacFilter |= MAC_BCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2092 | DBG_ERROR("BCAST "); |
| 2093 | } |
| 2094 | if (dev->flags & IFF_PROMISC) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2095 | adapter->MacFilter |= MAC_PROMISC; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2096 | DBG_ERROR("PROMISC "); |
| 2097 | } |
| 2098 | if (dev->flags & IFF_ALLMULTI) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2099 | adapter->MacFilter |= MAC_ALLMCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2100 | DBG_ERROR("ALL_MCAST "); |
| 2101 | } |
| 2102 | if (dev->flags & IFF_MULTICAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2103 | adapter->MacFilter |= MAC_MCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2104 | DBG_ERROR("MCAST "); |
| 2105 | } |
| 2106 | DBG_ERROR("\n"); |
| 2107 | } |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2108 | status = sxg_register_intr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2109 | if (status != STATUS_SUCCESS) { |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2110 | DBG_ERROR("sxg_if_init: sxg_register_intr FAILED %x\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2111 | status); |
| 2112 | sxg_deregister_interrupt(adapter); |
| 2113 | return (status); |
| 2114 | } |
| 2115 | |
| 2116 | adapter->state = ADAPT_UP; |
| 2117 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2118 | /* clear any pending events, then enable interrupts */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2119 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2120 | |
| 2121 | return (STATUS_SUCCESS); |
| 2122 | } |
| 2123 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2124 | void sxg_set_interrupt_aggregation(struct adapter_t *adapter) |
| 2125 | { |
| 2126 | /* |
| 2127 | * Top bit disables aggregation on xmt (SXG_AGG_XMT_DISABLE). |
| 2128 | * Make sure Max is less than 0x8000. |
| 2129 | */ |
| 2130 | adapter->max_aggregation = SXG_MAX_AGG_DEFAULT; |
| 2131 | adapter->min_aggregation = SXG_MIN_AGG_DEFAULT; |
| 2132 | WRITE_REG(adapter->UcodeRegs[0].Aggregation, |
| 2133 | ((adapter->max_aggregation << SXG_MAX_AGG_SHIFT) | |
| 2134 | adapter->min_aggregation), |
| 2135 | TRUE); |
| 2136 | } |
| 2137 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2138 | static int sxg_entry_open(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2139 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2140 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2141 | int status; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2142 | static int turn; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2143 | int sxg_initial_rcv_data_buffers = SXG_INITIAL_RCV_DATA_BUFFERS; |
| 2144 | int i; |
| 2145 | |
| 2146 | if (adapter->JumboEnabled == TRUE) { |
| 2147 | sxg_initial_rcv_data_buffers = |
| 2148 | SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS; |
| 2149 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, |
| 2150 | SXG_JUMBO_RCV_RING_SIZE); |
| 2151 | } |
| 2152 | |
| 2153 | /* |
| 2154 | * Allocate receive data buffers. We allocate a block of buffers and |
| 2155 | * a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK |
| 2156 | */ |
| 2157 | |
| 2158 | for (i = 0; i < sxg_initial_rcv_data_buffers; |
| 2159 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) |
| 2160 | { |
| 2161 | status = sxg_allocate_buffer_memory(adapter, |
| 2162 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 2163 | SXG_BUFFER_TYPE_RCV); |
| 2164 | if (status != STATUS_SUCCESS) |
| 2165 | return status; |
| 2166 | } |
| 2167 | /* |
| 2168 | * NBL resource allocation can fail in the 'AllocateComplete' routine, |
| 2169 | * which doesn't return status. Make sure we got the number of buffers |
| 2170 | * we requested |
| 2171 | */ |
| 2172 | |
| 2173 | if (adapter->FreeRcvBufferCount < sxg_initial_rcv_data_buffers) { |
| 2174 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 2175 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 2176 | 0); |
| 2177 | return (STATUS_RESOURCES); |
| 2178 | } |
| 2179 | /* |
| 2180 | * The microcode expects it to be downloaded on every open. |
| 2181 | */ |
| 2182 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __FUNCTION__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2183 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2184 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
| 2185 | __FUNCTION__); |
| 2186 | sxg_read_config(adapter); |
| 2187 | } else { |
| 2188 | adapter->state = ADAPT_FAIL; |
| 2189 | adapter->linkstate = LINK_DOWN; |
| 2190 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", |
| 2191 | status); |
| 2192 | } |
| 2193 | msleep(5); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2194 | |
| 2195 | if (turn) { |
| 2196 | sxg_second_open(adapter->netdev); |
| 2197 | |
| 2198 | return STATUS_SUCCESS; |
| 2199 | } |
| 2200 | |
| 2201 | turn++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2202 | |
| 2203 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2204 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2205 | adapter->activated); |
| 2206 | DBG_ERROR |
| 2207 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2208 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2209 | adapter->netdev, adapter, adapter->port); |
| 2210 | |
| 2211 | netif_stop_queue(adapter->netdev); |
| 2212 | |
| 2213 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2214 | if (!adapter->activated) { |
| 2215 | sxg_global.num_sxg_ports_active++; |
| 2216 | adapter->activated = 1; |
| 2217 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2218 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2219 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2220 | status = sxg_initialize_adapter(adapter); |
| 2221 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2222 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2223 | |
| 2224 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2225 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2226 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2227 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2228 | status); |
| 2229 | } |
| 2230 | |
| 2231 | if (status != STATUS_SUCCESS) { |
| 2232 | if (adapter->activated) { |
| 2233 | sxg_global.num_sxg_ports_active--; |
| 2234 | adapter->activated = 0; |
| 2235 | } |
| 2236 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2237 | sxg_global.flags); |
| 2238 | return (status); |
| 2239 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2240 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2241 | sxg_set_interrupt_aggregation(adapter); |
| 2242 | napi_enable(&adapter->napi); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2243 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2244 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2245 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2246 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2247 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2248 | |
| 2249 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2250 | return STATUS_SUCCESS; |
| 2251 | } |
| 2252 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2253 | int sxg_second_open(struct net_device * dev) |
| 2254 | { |
| 2255 | struct adapter_t *adapter = (struct adapter_t*) netdev_priv(dev); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2256 | int status = 0; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2257 | |
| 2258 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2259 | netif_start_queue(adapter->netdev); |
| 2260 | adapter->state = ADAPT_UP; |
| 2261 | adapter->linkstate = LINK_UP; |
| 2262 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2263 | status = sxg_initialize_adapter(adapter); |
| 2264 | sxg_set_interrupt_aggregation(adapter); |
| 2265 | napi_enable(&adapter->napi); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2266 | /* Re-enable interrupts */ |
| 2267 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2268 | |
Mithlesh Thukral | 544ed36 | 2009-03-20 17:35:12 +0530 | [diff] [blame] | 2269 | sxg_register_intr(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2270 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2271 | mod_timer(&adapter->watchdog_timer, jiffies); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2272 | return (STATUS_SUCCESS); |
| 2273 | |
| 2274 | } |
| 2275 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2276 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 2277 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2278 | u32 mmio_start = 0; |
| 2279 | u32 mmio_len = 0; |
| 2280 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2281 | struct net_device *dev = pci_get_drvdata(pcidev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2282 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2283 | |
| 2284 | flush_scheduled_work(); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2285 | |
| 2286 | /* Deallocate Resources */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2287 | unregister_netdev(dev); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2288 | sxg_reset_interrupt_capability(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2289 | sxg_free_resources(adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2290 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2291 | ASSERT(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2292 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2293 | mmio_start = pci_resource_start(pcidev, 0); |
| 2294 | mmio_len = pci_resource_len(pcidev, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2295 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2296 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __FUNCTION__, |
| 2297 | mmio_start, mmio_len); |
| 2298 | release_mem_region(mmio_start, mmio_len); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2299 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2300 | mmio_start = pci_resource_start(pcidev, 2); |
| 2301 | mmio_len = pci_resource_len(pcidev, 2); |
| 2302 | |
| 2303 | DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__, |
| 2304 | mmio_start, mmio_len); |
| 2305 | release_mem_region(mmio_start, mmio_len); |
| 2306 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2307 | pci_disable_device(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2308 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2309 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2310 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2311 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2312 | } |
| 2313 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2314 | static int sxg_entry_halt(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2315 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2316 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2317 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
| 2318 | int i; |
| 2319 | u32 RssIds, IsrCount; |
| 2320 | unsigned long flags; |
| 2321 | |
| 2322 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2323 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2324 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2325 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2326 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2327 | adapter->state = ADAPT_DOWN; |
| 2328 | adapter->linkstate = LINK_DOWN; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2329 | |
| 2330 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2331 | sxg_deregister_interrupt(adapter); |
| 2332 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 2333 | mdelay(5000); |
| 2334 | |
| 2335 | del_timer_sync(&adapter->watchdog_timer); |
| 2336 | netif_stop_queue(dev); |
| 2337 | netif_carrier_off(dev); |
| 2338 | |
| 2339 | napi_disable(&adapter->napi); |
| 2340 | |
| 2341 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 0, true); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2342 | adapter->devflags_prev = 0; |
| 2343 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2344 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2345 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2346 | spin_lock(&adapter->RcvQLock); |
| 2347 | /* Free all the blocks and the buffers, moved from remove() routine */ |
| 2348 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 2349 | sxg_free_rcvblocks(adapter); |
| 2350 | } |
| 2351 | |
| 2352 | |
| 2353 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 2354 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 2355 | InitializeListHead(&adapter->AllRcvBlocks); |
| 2356 | InitializeListHead(&adapter->FreeSglBuffers); |
| 2357 | InitializeListHead(&adapter->AllSglBuffers); |
| 2358 | |
| 2359 | adapter->FreeRcvBufferCount = 0; |
| 2360 | adapter->FreeRcvBlockCount = 0; |
| 2361 | adapter->AllRcvBlockCount = 0; |
| 2362 | adapter->RcvBuffersOnCard = 0; |
| 2363 | adapter->PendingRcvCount = 0; |
| 2364 | |
| 2365 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
| 2366 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
| 2367 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 2368 | for (i = 0; i < SXG_MAX_RING_SIZE; i++) |
| 2369 | adapter->RcvRingZeroInfo.Context[i] = NULL; |
| 2370 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 2371 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 2372 | |
| 2373 | spin_unlock(&adapter->RcvQLock); |
| 2374 | |
| 2375 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
| 2376 | adapter->AllSglBufferCount = 0; |
| 2377 | adapter->FreeSglBufferCount = 0; |
| 2378 | adapter->PendingXmtCount = 0; |
| 2379 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
| 2380 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 2381 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2382 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2383 | for (i = 0; i < SXG_MAX_RSS; i++) { |
| 2384 | adapter->NextEvent[i] = 0; |
| 2385 | } |
| 2386 | atomic_set(&adapter->pending_allocations, 0); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2387 | adapter->intrregistered = 0; |
| 2388 | sxg_remove_isr(adapter); |
| 2389 | DBG_ERROR("sxg: %s (%s) EXIT\n", __FUNCTION__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2390 | return (STATUS_SUCCESS); |
| 2391 | } |
| 2392 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2393 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2394 | { |
| 2395 | ASSERT(rq); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2396 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2397 | switch (cmd) { |
| 2398 | case SIOCSLICSETINTAGG: |
| 2399 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2400 | /* struct adapter_t *adapter = (struct adapter_t *) |
| 2401 | * netdev_priv(dev); |
| 2402 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2403 | u32 data[7]; |
| 2404 | u32 intagg; |
| 2405 | |
| 2406 | if (copy_from_user(data, rq->ifr_data, 28)) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2407 | DBG_ERROR("copy_from_user FAILED getting \ |
| 2408 | initial params\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2409 | return -EFAULT; |
| 2410 | } |
| 2411 | intagg = data[0]; |
| 2412 | printk(KERN_EMERG |
| 2413 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2414 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2415 | return 0; |
| 2416 | } |
| 2417 | |
| 2418 | default: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2419 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2420 | return -EOPNOTSUPP; |
| 2421 | } |
| 2422 | return 0; |
| 2423 | } |
| 2424 | |
| 2425 | #define NORMAL_ETHFRAME 0 |
| 2426 | |
| 2427 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2428 | * sxg_send_packets - Send a skb packet |
| 2429 | * |
| 2430 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2431 | * skb - The packet to send |
| 2432 | * dev - Our linux net device that refs our adapter |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2433 | * |
| 2434 | * Return: |
| 2435 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 2436 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2437 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2438 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2439 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2440 | u32 status = STATUS_SUCCESS; |
| 2441 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2442 | /* |
| 2443 | * DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 2444 | * skb); |
| 2445 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2446 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2447 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2448 | switch (adapter->State) { |
| 2449 | case SXG_STATE_INITIALIZING: |
| 2450 | case SXG_STATE_HALTED: |
| 2451 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2452 | ASSERT(0); /* unexpected */ |
| 2453 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2454 | case SXG_STATE_RESETTING: |
| 2455 | case SXG_STATE_SLEEP: |
| 2456 | case SXG_STATE_BOOTDIAG: |
| 2457 | case SXG_STATE_DIAG: |
| 2458 | case SXG_STATE_HALTING: |
| 2459 | status = STATUS_FAILURE; |
| 2460 | break; |
| 2461 | case SXG_STATE_RUNNING: |
| 2462 | if (adapter->LinkState != SXG_LINK_UP) { |
| 2463 | status = STATUS_FAILURE; |
| 2464 | } |
| 2465 | break; |
| 2466 | default: |
| 2467 | ASSERT(0); |
| 2468 | status = STATUS_FAILURE; |
| 2469 | } |
| 2470 | if (status != STATUS_SUCCESS) { |
| 2471 | goto xmit_fail; |
| 2472 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2473 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2474 | status = sxg_transmit_packet(adapter, skb); |
| 2475 | if (status == STATUS_SUCCESS) { |
| 2476 | goto xmit_done; |
| 2477 | } |
| 2478 | |
| 2479 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2480 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2481 | if (status != STATUS_SUCCESS) { |
| 2482 | #if XXXTODO |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2483 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2484 | #else |
| 2485 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 2486 | adapter->stats.tx_dropped++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2487 | return NETDEV_TX_BUSY; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2488 | #endif |
| 2489 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2490 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2491 | status); |
| 2492 | |
| 2493 | xmit_done: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2494 | return NETDEV_TX_OK; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2495 | } |
| 2496 | |
| 2497 | /* |
| 2498 | * sxg_transmit_packet |
| 2499 | * |
| 2500 | * This function transmits a single packet. |
| 2501 | * |
| 2502 | * Arguments - |
| 2503 | * adapter - Pointer to our adapter structure |
| 2504 | * skb - The packet to be sent |
| 2505 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2506 | * Return - STATUS of send |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2507 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2508 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2509 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2510 | struct sxg_x64_sgl *pSgl; |
| 2511 | struct sxg_scatter_gather *SxgSgl; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2512 | unsigned long sgl_flags; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2513 | /* void *SglBuffer; */ |
| 2514 | /* u32 SglBufferLength; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2515 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2516 | /* |
| 2517 | * The vast majority of work is done in the shared |
| 2518 | * sxg_dumb_sgl routine. |
| 2519 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2520 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2521 | adapter, skb, 0, 0); |
| 2522 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2523 | /* Allocate a SGL buffer */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2524 | SXG_GET_SGL_BUFFER(adapter, SxgSgl, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2525 | if (!SxgSgl) { |
| 2526 | adapter->Stats.NoSglBuf++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2527 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2528 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2529 | adapter, skb, 0, 0); |
| 2530 | return (STATUS_RESOURCES); |
| 2531 | } |
| 2532 | ASSERT(SxgSgl->adapter == adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2533 | /*SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2534 | SglBufferLength = SXG_SGL_BUF_SIZE; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2535 | SxgSgl->VlanTag.VlanTci = 0; |
| 2536 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2537 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2538 | SxgSgl->DumbPacket = skb; |
| 2539 | pSgl = NULL; |
| 2540 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2541 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2542 | return (sxg_dumb_sgl(pSgl, SxgSgl)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2543 | } |
| 2544 | |
| 2545 | /* |
| 2546 | * sxg_dumb_sgl |
| 2547 | * |
| 2548 | * Arguments: |
| 2549 | * pSgl - |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2550 | * SxgSgl - struct sxg_scatter_gather |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2551 | * |
| 2552 | * Return Value: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2553 | * Status of send operation. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2554 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2555 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2556 | struct sxg_scatter_gather *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2557 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2558 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2559 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2560 | /* For now, all dumb-nic sends go on RSS queue zero */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2561 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 2562 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2563 | struct sxg_cmd *XmtCmd = NULL; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2564 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2565 | u32 DataLength = skb->len; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2566 | /* unsigned int BufLen; */ |
| 2567 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2568 | u64 phys_addr; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2569 | unsigned long flags; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2570 | unsigned long queue_id=0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2571 | |
| 2572 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2573 | pSgl, SxgSgl, 0, 0); |
| 2574 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2575 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2576 | SxgSgl->pSgl = pSgl; |
| 2577 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2578 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2579 | ASSERT(sizeof(struct sxg_x64_sge) == sizeof(struct sxg_x64_sge)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2580 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2581 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2582 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2583 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2584 | /* |
| 2585 | * From here below we work with the SGL placed in our |
| 2586 | * buffer. |
| 2587 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2588 | |
| 2589 | SxgSgl->Sgl.NumberOfElements = 1; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2590 | /* |
| 2591 | * Set ucode Queue ID based on bottom bits of destination TCP port. |
| 2592 | * This Queue ID splits slowpath/dumb-nic packet processing across |
| 2593 | * multiple threads on the card to improve performance. It is split |
| 2594 | * using the TCP port to avoid out-of-order packets that can result |
| 2595 | * from multithreaded processing. We use the destination port because |
| 2596 | * we expect to be run on a server, so in nearly all cases the local |
| 2597 | * port is likely to be constant (well-known server port) and the |
| 2598 | * remote port is likely to be random. The exception to this is iSCSI, |
| 2599 | * in which case we use the sport instead. Note |
| 2600 | * that original attempt at XOR'ing source and dest port resulted in |
| 2601 | * poor balance on NTTTCP/iometer applications since they tend to |
| 2602 | * line up (even-even, odd-odd..). |
| 2603 | */ |
| 2604 | |
| 2605 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2606 | struct iphdr *ip; |
| 2607 | |
| 2608 | ip = ip_hdr(skb); |
| 2609 | if ((ip->protocol == IPPROTO_TCP)&&(DataLength >= sizeof( |
| 2610 | struct tcphdr))){ |
| 2611 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2612 | (ntohs (tcp_hdr(skb)->source) & |
| 2613 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2614 | (ntohs(tcp_hdr(skb)->dest) & |
| 2615 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2616 | } |
| 2617 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2618 | if ((ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) && (DataLength >= |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2619 | sizeof(struct tcphdr)) ) { |
| 2620 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2621 | (ntohs (tcp_hdr(skb)->source) & |
| 2622 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2623 | (ntohs(tcp_hdr(skb)->dest) & |
| 2624 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2625 | } |
| 2626 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2627 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2628 | /* Grab the spinlock and acquire a command */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2629 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2630 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2631 | if (XmtCmd == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2632 | /* |
| 2633 | * Call sxg_complete_slow_send to see if we can |
| 2634 | * free up any XmtRingZero entries and then try again |
| 2635 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2636 | |
| 2637 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 2638 | sxg_complete_slow_send(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2639 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2640 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2641 | if (XmtCmd == NULL) { |
| 2642 | adapter->Stats.XmtZeroFull++; |
| 2643 | goto abortcmd; |
| 2644 | } |
| 2645 | } |
| 2646 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2647 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2648 | /* Update stats */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2649 | adapter->stats.tx_packets++; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2650 | adapter->stats.tx_bytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2651 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2652 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2653 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2654 | adapter->Stats.DumbXmtBcastPkts++; |
| 2655 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2656 | } else { |
| 2657 | adapter->Stats.DumbXmtMcastPkts++; |
| 2658 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2659 | } |
| 2660 | } else { |
| 2661 | adapter->Stats.DumbXmtUcastPkts++; |
| 2662 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2663 | } |
| 2664 | #endif |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2665 | /* |
| 2666 | * Fill in the command |
| 2667 | * Copy out the first SGE to the command and adjust for offset |
| 2668 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2669 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2670 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2671 | |
| 2672 | /* |
| 2673 | * SAHARA SGL WORKAROUND |
| 2674 | * See if the SGL straddles a 64k boundary. If so, skip to |
| 2675 | * the start of the next 64k boundary and continue |
| 2676 | */ |
| 2677 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2678 | if ((adapter->asictype == SAHARA_REV_A) && |
| 2679 | (SXG_INVALID_SGL(phys_addr,skb->data_len))) |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2680 | { |
| 2681 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2682 | /* Silently drop this packet */ |
| 2683 | printk(KERN_EMERG"Dropped a packet for 64k boundary problem\n"); |
| 2684 | return STATUS_SUCCESS; |
| 2685 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2686 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2687 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2688 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2689 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2690 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2691 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2692 | XmtCmd->Flags = 0; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2693 | |
| 2694 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 2695 | /* |
| 2696 | * We need to set the Checkum in IP header to 0. This is |
| 2697 | * required by hardware. |
| 2698 | */ |
| 2699 | ip_hdr(skb)->check = 0x0; |
| 2700 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_IP; |
| 2701 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_TCP; |
| 2702 | /* Dont know if length will require a change in case of VLAN */ |
| 2703 | XmtCmd->CsumFlags.MacLen = ETH_HLEN; |
| 2704 | XmtCmd->CsumFlags.IpHl = skb_network_header_len(skb) >> |
| 2705 | SXG_NW_HDR_LEN_SHIFT; |
| 2706 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2707 | /* |
| 2708 | * Advance transmit cmd descripter by 1. |
| 2709 | * NOTE - See comments in SxgTcpOutput where we write |
| 2710 | * to the XmtCmd register regarding CPU ID values and/or |
| 2711 | * multiple commands. |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2712 | * Top 16 bits specify queue_id. See comments about queue_id above |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2713 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2714 | /* Four queues at the moment */ |
| 2715 | ASSERT((queue_id & ~SXG_LARGE_SEND_QUEUE_MASK) == 0); |
| 2716 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, ((queue_id << 16) | 1), TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2717 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2718 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2719 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2720 | XmtCmd, pSgl, SxgSgl, 0); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2721 | return STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2722 | |
| 2723 | abortcmd: |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2724 | /* |
| 2725 | * NOTE - Only jump to this label AFTER grabbing the |
| 2726 | * XmtZeroLock, and DO NOT DROP IT between the |
| 2727 | * command allocation and the following abort. |
| 2728 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2729 | if (XmtCmd) { |
| 2730 | SXG_ABORT_CMD(XmtRingInfo); |
| 2731 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2732 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2733 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2734 | /* |
| 2735 | * failsgl: |
| 2736 | * Jump to this label if failure occurs before the |
| 2737 | * XmtZeroLock is grabbed |
| 2738 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2739 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2740 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2741 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2742 | /* SxgSgl->DumbPacket is the skb */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2743 | // SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2744 | |
| 2745 | return STATUS_FAILURE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2746 | } |
| 2747 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2748 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2749 | * Link management functions |
| 2750 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2751 | * sxg_initialize_link - Initialize the link stuff |
| 2752 | * |
| 2753 | * Arguments - |
| 2754 | * adapter - A pointer to our adapter structure |
| 2755 | * |
| 2756 | * Return |
| 2757 | * status |
| 2758 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2759 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2760 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2761 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2762 | u32 Value; |
| 2763 | u32 ConfigData; |
| 2764 | u32 MaxFrame; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2765 | u32 AxgMacReg1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2766 | int status; |
| 2767 | |
| 2768 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2769 | adapter, 0, 0, 0); |
| 2770 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2771 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2772 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2773 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2774 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2775 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2776 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2777 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2778 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2779 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2780 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2781 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2782 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2783 | /* |
| 2784 | * Link address 0 |
| 2785 | * XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) |
| 2786 | * is stored with the first nibble (0a) in the byte 0 |
| 2787 | * of the Mac address. Possibly reverse? |
| 2788 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2789 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2790 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2791 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2792 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2793 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2794 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2795 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2796 | Value = ntohl(Value); |
| 2797 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2798 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2799 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2800 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2801 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2802 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2803 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2804 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2805 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2806 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2807 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2808 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2809 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2810 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2811 | /* Configure MAC */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2812 | AxgMacReg1 = ( /* Enable XMT */ |
| 2813 | AXGMAC_CFG1_XMT_EN | |
| 2814 | /* Enable receive */ |
| 2815 | AXGMAC_CFG1_RCV_EN | |
| 2816 | /* short frame detection */ |
| 2817 | AXGMAC_CFG1_SHORT_ASSERT | |
| 2818 | /* Verify frame length */ |
| 2819 | AXGMAC_CFG1_CHECK_LEN | |
| 2820 | /* Generate FCS */ |
| 2821 | AXGMAC_CFG1_GEN_FCS | |
| 2822 | /* Pad frames to 64 bytes */ |
| 2823 | AXGMAC_CFG1_PAD_64); |
| 2824 | |
| 2825 | if (adapter->XmtFcEnabled) { |
| 2826 | AxgMacReg1 |= AXGMAC_CFG1_XMT_PAUSE; /* Allow sending of pause */ |
| 2827 | } |
| 2828 | if (adapter->RcvFcEnabled) { |
| 2829 | AxgMacReg1 |= AXGMAC_CFG1_RCV_PAUSE; /* Enable detection of pause */ |
| 2830 | } |
| 2831 | |
| 2832 | WRITE_REG(HwRegs->MacConfig1, AxgMacReg1, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2833 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2834 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2835 | if (adapter->JumboEnabled) { |
| 2836 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2837 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2838 | /* |
| 2839 | * AMIIM Configuration Register - |
| 2840 | * The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion |
| 2841 | * (bottom bits) of this register is used to determine the MDC frequency |
| 2842 | * as specified in the A-XGMAC Design Document. This value must not be |
| 2843 | * zero. The following value (62 or 0x3E) is based on our MAC transmit |
| 2844 | * clock frequency (MTCLK) of 312.5 MHz. Given a maximum MDIO clock |
| 2845 | * frequency of 2.5 MHz (see the PHY spec), we get: |
| 2846 | * 312.5/(2*(X+1)) < 2.5 ==> X = 62. |
| 2847 | * This value happens to be the default value for this register, so we |
| 2848 | * really don't have to do this. |
| 2849 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2850 | if (adapter->asictype == SAHARA_REV_B) { |
| 2851 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000001F, TRUE); |
| 2852 | } else { |
| 2853 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2854 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2855 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2856 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2857 | WRITE_REG(HwRegs->LinkStatus, |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2858 | (LS_PHY_CLR_RESET | |
| 2859 | LS_XGXS_ENABLE | |
| 2860 | LS_XGXS_CTL | |
| 2861 | LS_PHY_CLK_EN | |
| 2862 | LS_ATTN_ALARM), |
| 2863 | TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2864 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2865 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2866 | /* |
| 2867 | * Per information given by Aeluros, wait 100 ms after removing reset. |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2868 | * It's not enough to wait for the self-clearing reset bit in reg 0 to |
| 2869 | * clear. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2870 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2871 | mdelay(100); |
| 2872 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2873 | /* Verify the PHY has come up by checking that the Reset bit has |
| 2874 | * cleared. |
| 2875 | */ |
| 2876 | status = sxg_read_mdio_reg(adapter, |
| 2877 | MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2878 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
| 2879 | &Value); |
| 2880 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, |
| 2881 | (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2882 | if (status != STATUS_SUCCESS) |
| 2883 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2884 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2885 | return (STATUS_FAILURE); |
| 2886 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2887 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2888 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2889 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2890 | return (STATUS_FAILURE); |
| 2891 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2892 | /* The XAUI link should also be up - confirm */ |
| 2893 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2894 | return (STATUS_FAILURE); |
| 2895 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2896 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2897 | status = sxg_phy_init(adapter); |
| 2898 | if (status != STATUS_SUCCESS) |
| 2899 | return (STATUS_FAILURE); |
| 2900 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2901 | /* Enable the Link Alarm */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2902 | |
| 2903 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2904 | * LASI_CONTROL - LASI control register |
| 2905 | * LASI_CTL_LS_ALARM_ENABLE - enable link alarm bit |
| 2906 | */ |
| 2907 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2908 | LASI_CONTROL, |
| 2909 | LASI_CTL_LS_ALARM_ENABLE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2910 | if (status != STATUS_SUCCESS) |
| 2911 | return (STATUS_FAILURE); |
| 2912 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2913 | /* XXXTODO - temporary - verify bit is set */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2914 | |
| 2915 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2916 | * LASI_CONTROL - LASI control register |
| 2917 | */ |
| 2918 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2919 | LASI_CONTROL, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2920 | &Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2921 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2922 | if (status != STATUS_SUCCESS) |
| 2923 | return (STATUS_FAILURE); |
| 2924 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2925 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2926 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2927 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2928 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2929 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2930 | RCV_CONFIG_ENPARSE | |
| 2931 | RCV_CONFIG_RCVBAD | |
| 2932 | RCV_CONFIG_RCVPAUSE | |
| 2933 | RCV_CONFIG_TZIPV6 | |
| 2934 | RCV_CONFIG_TZIPV4 | |
| 2935 | RCV_CONFIG_HASH_16 | |
| 2936 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2937 | |
| 2938 | if (adapter->asictype == SAHARA_REV_B) { |
| 2939 | ConfigData |= (RCV_CONFIG_HIPRICTL | |
| 2940 | RCV_CONFIG_NEWSTATUSFMT); |
| 2941 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2942 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2943 | |
| 2944 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2945 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2946 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2947 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2948 | |
| 2949 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2950 | adapter, 0, 0, 0); |
| 2951 | return (STATUS_SUCCESS); |
| 2952 | } |
| 2953 | |
| 2954 | /* |
| 2955 | * sxg_phy_init - Initialize the PHY |
| 2956 | * |
| 2957 | * Arguments - |
| 2958 | * adapter - A pointer to our adapter structure |
| 2959 | * |
| 2960 | * Return |
| 2961 | * status |
| 2962 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2963 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2964 | { |
| 2965 | u32 Value; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2966 | struct phy_ucode *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2967 | int status; |
| 2968 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2969 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2970 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2971 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2972 | * 0xC205 - PHY ID register (?) |
| 2973 | * &Value - XXXTODO - add def |
| 2974 | */ |
| 2975 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2976 | 0xC205, |
| 2977 | &Value); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2978 | if (status != STATUS_SUCCESS) |
| 2979 | return (STATUS_FAILURE); |
| 2980 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2981 | if (Value == 0x0012) { |
| 2982 | /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
| 2983 | DBG_ERROR("AEL2005C PHY detected. Downloading PHY \ |
| 2984 | microcode.\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2985 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2986 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2987 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2988 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2989 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2990 | mdelay(p->Data); |
| 2991 | } else { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2992 | /* write the given data to the specified address */ |
| 2993 | status = sxg_write_mdio_reg(adapter, |
| 2994 | MIIM_DEV_PHY_PMA, |
| 2995 | /* PHY address */ |
| 2996 | p->Addr, |
| 2997 | /* PHY data */ |
| 2998 | p->Data); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2999 | if (status != STATUS_SUCCESS) |
| 3000 | return (STATUS_FAILURE); |
| 3001 | } |
| 3002 | } |
| 3003 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3004 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3005 | |
| 3006 | return (STATUS_SUCCESS); |
| 3007 | } |
| 3008 | |
| 3009 | /* |
| 3010 | * sxg_link_event - Process a link event notification from the card |
| 3011 | * |
| 3012 | * Arguments - |
| 3013 | * adapter - A pointer to our adapter structure |
| 3014 | * |
| 3015 | * Return |
| 3016 | * None |
| 3017 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3018 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3019 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3020 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3021 | struct net_device *netdev = adapter->netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3022 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3023 | int status; |
| 3024 | u32 Value; |
| 3025 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3026 | if (adapter->state == ADAPT_DOWN) |
| 3027 | return; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3028 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 3029 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3030 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3031 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3032 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3033 | READ_REG(HwRegs->LinkStatus, Value); |
| 3034 | if (Value & LS_LINK_ALARM) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3035 | /* |
| 3036 | * We got a Link Status alarm. First, pause to let the |
| 3037 | * link state settle (it can bounce a number of times) |
| 3038 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3039 | mdelay(10); |
| 3040 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3041 | /* Now clear the alarm by reading the LASI status register. */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3042 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3043 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3044 | /* LASI status register */ |
| 3045 | LASI_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3046 | &Value); |
| 3047 | if (status != STATUS_SUCCESS) { |
| 3048 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 3049 | sxg_link_state(adapter, SXG_LINK_DOWN); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3050 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3051 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 3052 | /* |
| 3053 | * We used to assert that the LASI_LS_ALARM bit was set, as |
| 3054 | * it should be. But there appears to be cases during |
| 3055 | * initialization (when the PHY is reset and re-initialized) |
| 3056 | * when we get a link alarm, but the status bit is 0 when we |
| 3057 | * read it. Rather than trying to assure this never happens |
| 3058 | * (and nver being certain), just ignore it. |
| 3059 | |
| 3060 | * ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 3061 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3062 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3063 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3064 | LinkState = sxg_get_link_state(adapter); |
| 3065 | sxg_link_state(adapter, LinkState); |
| 3066 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 3067 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3068 | if (LinkState == SXG_LINK_UP) { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3069 | netif_carrier_on(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3070 | netif_tx_start_all_queues(netdev); |
| 3071 | } else { |
| 3072 | netif_tx_stop_all_queues(netdev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3073 | netif_carrier_off(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3074 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3075 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3076 | /* |
| 3077 | * XXXTODO - Assuming Link Attention is only being generated |
| 3078 | * for the Link Alarm pin (and not for a XAUI Link Status change) |
| 3079 | * , then it's impossible to get here. Yet we've gotten here |
| 3080 | * twice (under extreme conditions - bouncing the link up and |
| 3081 | * down many times a second). Needs further investigation. |
| 3082 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3083 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 3084 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3085 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3086 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3087 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3088 | |
| 3089 | } |
| 3090 | |
| 3091 | /* |
| 3092 | * sxg_get_link_state - Determine if the link is up or down |
| 3093 | * |
| 3094 | * Arguments - |
| 3095 | * adapter - A pointer to our adapter structure |
| 3096 | * |
| 3097 | * Return |
| 3098 | * Link State |
| 3099 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3100 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3101 | { |
| 3102 | int status; |
| 3103 | u32 Value; |
| 3104 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3105 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3106 | |
| 3107 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 3108 | adapter, 0, 0, 0); |
| 3109 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3110 | /* |
| 3111 | * Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if |
| 3112 | * the following 3 bits (from 3 different MDIO registers) are all true. |
| 3113 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3114 | |
| 3115 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3116 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3117 | /* PMA/PMD Receive Signal Detect register */ |
| 3118 | PHY_PMA_RCV_DET, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3119 | &Value); |
| 3120 | if (status != STATUS_SUCCESS) |
| 3121 | goto bad; |
| 3122 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3123 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3124 | if (!(Value & PMA_RCV_DETECT)) |
| 3125 | return (SXG_LINK_DOWN); |
| 3126 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3127 | /* MIIM_DEV_PHY_PCS - PHY PCS module */ |
| 3128 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, |
| 3129 | /* PCS 10GBASE-R Status 1 register */ |
| 3130 | PHY_PCS_10G_STATUS1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3131 | &Value); |
| 3132 | if (status != STATUS_SUCCESS) |
| 3133 | goto bad; |
| 3134 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3135 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3136 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 3137 | return (SXG_LINK_DOWN); |
| 3138 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3139 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS,/* PHY XS module */ |
| 3140 | /* XS Lane Status register */ |
| 3141 | PHY_XS_LANE_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3142 | &Value); |
| 3143 | if (status != STATUS_SUCCESS) |
| 3144 | goto bad; |
| 3145 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3146 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3147 | if (!(Value & XS_LANE_ALIGN)) |
| 3148 | return (SXG_LINK_DOWN); |
| 3149 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3150 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3151 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3152 | |
| 3153 | return (SXG_LINK_UP); |
| 3154 | |
| 3155 | bad: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3156 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3157 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 3158 | ASSERT(0); |
| 3159 | return (SXG_LINK_DOWN); |
| 3160 | } |
| 3161 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3162 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 3163 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3164 | { |
| 3165 | if (adapter->LinkState == SXG_LINK_UP) { |
| 3166 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3167 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3168 | netif_start_queue(adapter->netdev); |
| 3169 | } else { |
| 3170 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3171 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3172 | netif_stop_queue(adapter->netdev); |
| 3173 | } |
| 3174 | } |
| 3175 | |
| 3176 | /* |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 3177 | * sxg_change_mtu - Change the Maximum Transfer Unit |
| 3178 | * * @returns 0 on success, negative on failure |
| 3179 | */ |
| 3180 | int sxg_change_mtu (struct net_device *netdev, int new_mtu) |
| 3181 | { |
| 3182 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(netdev); |
| 3183 | |
| 3184 | if (!((new_mtu == SXG_DEFAULT_MTU) || (new_mtu == SXG_JUMBO_MTU))) |
| 3185 | return -EINVAL; |
| 3186 | |
| 3187 | if(new_mtu == netdev->mtu) |
| 3188 | return 0; |
| 3189 | |
| 3190 | netdev->mtu = new_mtu; |
| 3191 | |
| 3192 | if (new_mtu == SXG_JUMBO_MTU) { |
| 3193 | adapter->JumboEnabled = TRUE; |
| 3194 | adapter->FrameSize = JUMBOMAXFRAME; |
| 3195 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 3196 | } else { |
| 3197 | adapter->JumboEnabled = FALSE; |
| 3198 | adapter->FrameSize = ETHERMAXFRAME; |
| 3199 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 3200 | } |
| 3201 | |
| 3202 | sxg_entry_halt(netdev); |
| 3203 | sxg_entry_open(netdev); |
| 3204 | return 0; |
| 3205 | } |
| 3206 | |
| 3207 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3208 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 3209 | * This routine the central point of processing for all link state changes. |
| 3210 | * Nothing else in the driver should alter the link state or perform |
| 3211 | * link state indications |
| 3212 | * |
| 3213 | * Arguments - |
| 3214 | * adapter - A pointer to our adapter structure |
| 3215 | * LinkState - The link state |
| 3216 | * |
| 3217 | * Return |
| 3218 | * None |
| 3219 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3220 | static void sxg_link_state(struct adapter_t *adapter, |
| 3221 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3222 | { |
| 3223 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 3224 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 3225 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3226 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3227 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3228 | /* |
| 3229 | * Hold the adapter lock during this routine. Maybe move |
| 3230 | * the lock to the caller. |
| 3231 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3232 | /* IMP TODO : Check if we can survive without taking this lock */ |
| 3233 | // spin_lock(&adapter->AdapterLock); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3234 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3235 | /* Nothing changed.. */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3236 | // spin_unlock(&adapter->AdapterLock); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3237 | DBG_ERROR("EXIT #0 %s. Link status = %d\n", |
| 3238 | __func__, LinkState); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3239 | return; |
| 3240 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3241 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3242 | adapter->LinkState = LinkState; |
| 3243 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3244 | /* Drop the lock and indicate link state */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3245 | // spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3246 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3247 | |
| 3248 | sxg_indicate_link_state(adapter, LinkState); |
| 3249 | } |
| 3250 | |
| 3251 | /* |
| 3252 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 3253 | * |
| 3254 | * Arguments - |
| 3255 | * adapter - A pointer to our adapter structure |
| 3256 | * DevAddr - MDIO device number being addressed |
| 3257 | * RegAddr - register address for the specified MDIO device |
| 3258 | * Value - value to write to the MDIO register |
| 3259 | * |
| 3260 | * Return |
| 3261 | * status |
| 3262 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3263 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3264 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3265 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3266 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3267 | /* Address operation (written to MIIM field reg) */ |
| 3268 | u32 AddrOp; |
| 3269 | /* Write operation (written to MIIM field reg) */ |
| 3270 | u32 WriteOp; |
| 3271 | u32 Cmd;/* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3272 | u32 ValueRead; |
| 3273 | u32 Timeout; |
| 3274 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3275 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3276 | |
| 3277 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3278 | adapter, 0, 0, 0); |
| 3279 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3280 | /* Ensure values don't exceed field width */ |
| 3281 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3282 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 3283 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3284 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3285 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3286 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3287 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3288 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3289 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3290 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3291 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3292 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3293 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3294 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3295 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 3296 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3297 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3298 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3299 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3300 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3301 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3302 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3303 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3304 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3305 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3306 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3307 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3308 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3309 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3310 | Timeout = SXG_LINK_TIMEOUT; |
| 3311 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3312 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3313 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3314 | if (--Timeout == 0) { |
| 3315 | return (STATUS_FAILURE); |
| 3316 | } |
| 3317 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3318 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3319 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3320 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3321 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3322 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3323 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 3324 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3325 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3326 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3327 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3328 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3329 | Timeout = SXG_LINK_TIMEOUT; |
| 3330 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3331 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3332 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3333 | if (--Timeout == 0) { |
| 3334 | return (STATUS_FAILURE); |
| 3335 | } |
| 3336 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3337 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3338 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3339 | |
| 3340 | return (STATUS_SUCCESS); |
| 3341 | } |
| 3342 | |
| 3343 | /* |
| 3344 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 3345 | * |
| 3346 | * Arguments - |
| 3347 | * adapter - A pointer to our adapter structure |
| 3348 | * DevAddr - MDIO device number being addressed |
| 3349 | * RegAddr - register address for the specified MDIO device |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3350 | * pValue - pointer to where to put data read from the MDIO register |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3351 | * |
| 3352 | * Return |
| 3353 | * status |
| 3354 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3355 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3356 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3357 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3358 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3359 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 3360 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 3361 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3362 | u32 ValueRead; |
| 3363 | u32 Timeout; |
| 3364 | |
| 3365 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3366 | adapter, 0, 0, 0); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3367 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3368 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3369 | /* Ensure values don't exceed field width */ |
| 3370 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3371 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3372 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3373 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3374 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3375 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3376 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3377 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3378 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3379 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3380 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3381 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3382 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3383 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 3384 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3385 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3386 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3387 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3388 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3389 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3390 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3391 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3392 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3393 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3394 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3395 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3396 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3397 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3398 | Timeout = SXG_LINK_TIMEOUT; |
| 3399 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3400 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3401 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3402 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3403 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 3404 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3405 | return (STATUS_FAILURE); |
| 3406 | } |
| 3407 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3408 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3409 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3410 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3411 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3412 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3413 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 3414 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3415 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3416 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3417 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3418 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3419 | Timeout = SXG_LINK_TIMEOUT; |
| 3420 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3421 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3422 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3423 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3424 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 3425 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3426 | return (STATUS_FAILURE); |
| 3427 | } |
| 3428 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3429 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3430 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3431 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3432 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3433 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3434 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3435 | |
| 3436 | return (STATUS_SUCCESS); |
| 3437 | } |
| 3438 | |
| 3439 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3440 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 3441 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 3442 | * the polynomial: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3443 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 |
| 3444 | * + x^4 + x^2 + x^1. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3445 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3446 | * After the CRC for the 6 bytes is generated (but before the value is |
| 3447 | * complemented), we must then transpose the value and return bits 30-23. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3448 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3449 | static u32 sxg_crc_table[256];/* Table of CRC's for all possible byte values */ |
| 3450 | static u32 sxg_crc_init; /* Is table initialized */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3451 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3452 | /* Contruct the CRC32 table */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3453 | static void sxg_mcast_init_crc32(void) |
| 3454 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3455 | u32 c; /* CRC shit reg */ |
| 3456 | u32 e = 0; /* Poly X-or pattern */ |
| 3457 | int i; /* counter */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3458 | int k; /* byte being shifted into crc */ |
| 3459 | |
| 3460 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 3461 | |
| 3462 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 3463 | e |= 1L << (31 - p[i]); |
| 3464 | } |
| 3465 | |
| 3466 | for (i = 1; i < 256; i++) { |
| 3467 | c = i; |
| 3468 | for (k = 8; k; k--) { |
| 3469 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 3470 | } |
| 3471 | sxg_crc_table[i] = c; |
| 3472 | } |
| 3473 | } |
| 3474 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3475 | /* |
| 3476 | * Return the MAC hast as described above. |
| 3477 | */ |
| 3478 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 3479 | { |
| 3480 | u32 crc; |
| 3481 | char *p; |
| 3482 | int i; |
| 3483 | unsigned char machash = 0; |
| 3484 | |
| 3485 | if (!sxg_crc_init) { |
| 3486 | sxg_mcast_init_crc32(); |
| 3487 | sxg_crc_init = 1; |
| 3488 | } |
| 3489 | |
| 3490 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 3491 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 3492 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 3493 | } |
| 3494 | |
| 3495 | /* Return bits 1-8, transposed */ |
| 3496 | for (i = 1; i < 9; i++) { |
| 3497 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 3498 | } |
| 3499 | |
| 3500 | return (machash); |
| 3501 | } |
| 3502 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3503 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3504 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3505 | struct sxg_ucode_regs *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3506 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3507 | DBG_ERROR("%s ENTER (%s) MacFilter[%x] mask[%llx]\n", __FUNCTION__, |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3508 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 3509 | adapter->MulticastMask); |
| 3510 | |
| 3511 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3512 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3513 | * Turn on all multicast addresses. We have to do this for |
| 3514 | * promiscuous mode as well as ALLMCAST mode. It saves the |
| 3515 | * Microcode from having keep state about the MAC configuration |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3516 | */ |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3517 | /* DBG_ERROR("sxg: %s MacFilter = MAC_ALLMCAST | MAC_PROMISC\n \ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3518 | * SLUT MODE!!!\n",__func__); |
| 3519 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3520 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 3521 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3522 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high \ |
| 3523 | * 0xFFFFFFFF\n",__func__, adapter->netdev->name); |
| 3524 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3525 | |
| 3526 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3527 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3528 | * Commit our multicast mast to the SLIC by writing to the |
| 3529 | * multicast address mask registers |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3530 | */ |
| 3531 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 3532 | __func__, adapter->netdev->name, |
| 3533 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 3534 | ((ulong) |
| 3535 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 3536 | |
| 3537 | WRITE_REG(sxg_regs->McastLow, |
| 3538 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 3539 | WRITE_REG(sxg_regs->McastHigh, |
| 3540 | (u32) ((adapter-> |
| 3541 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 3542 | } |
| 3543 | } |
| 3544 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3545 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3546 | { |
| 3547 | unsigned char crcpoly; |
| 3548 | |
| 3549 | /* Get the CRC polynomial for the mac address */ |
| 3550 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 3551 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3552 | /* |
| 3553 | * We only have space on the SLIC for 64 entries. Lop |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3554 | * off the top two bits. (2^6 = 64) |
| 3555 | */ |
| 3556 | crcpoly &= 0x3F; |
| 3557 | |
| 3558 | /* OR in the new bit into our 64 bit mask. */ |
| 3559 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 3560 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3561 | |
| 3562 | /* |
| 3563 | * Function takes MAC addresses from dev_mc_list and generates the Mask |
| 3564 | */ |
| 3565 | |
| 3566 | static void sxg_set_mcast_addr(struct adapter_t *adapter) |
| 3567 | { |
| 3568 | struct dev_mc_list *mclist; |
| 3569 | struct net_device *dev = adapter->netdev; |
| 3570 | int i; |
| 3571 | |
| 3572 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_MCAST)) { |
| 3573 | for (i = 0, mclist = dev->mc_list; i < dev->mc_count; |
| 3574 | i++, mclist = mclist->next) { |
| 3575 | sxg_mcast_set_bit(adapter,mclist->da_addr); |
| 3576 | } |
| 3577 | } |
| 3578 | sxg_mcast_set_mask(adapter); |
| 3579 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3580 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3581 | static void sxg_mcast_set_list(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3582 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3583 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3584 | |
| 3585 | ASSERT(adapter); |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3586 | if (dev->flags & IFF_PROMISC) |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3587 | adapter->MacFilter |= MAC_PROMISC; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3588 | if (dev->flags & IFF_MULTICAST) |
| 3589 | adapter->MacFilter |= MAC_MCAST; |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3590 | if (dev->flags & IFF_ALLMULTI) |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3591 | adapter->MacFilter |= MAC_ALLMCAST; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3592 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3593 | //XXX handle other flags as well |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3594 | sxg_set_mcast_addr(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3595 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3596 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3597 | void sxg_free_sgl_buffers(struct adapter_t *adapter) |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3598 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3599 | struct list_entry *ple; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3600 | struct sxg_scatter_gather *Sgl; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3601 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3602 | while(!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3603 | ple = RemoveHeadList(&adapter->AllSglBuffers); |
| 3604 | Sgl = container_of(ple, struct sxg_scatter_gather, AllList); |
| 3605 | kfree(Sgl); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3606 | adapter->AllSglBufferCount--; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3607 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3608 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3609 | |
| 3610 | void sxg_free_rcvblocks(struct adapter_t *adapter) |
| 3611 | { |
| 3612 | u32 i; |
| 3613 | void *temp_RcvBlock; |
| 3614 | struct list_entry *ple; |
| 3615 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
| 3616 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3617 | ASSERT((adapter->state == SXG_STATE_INITIALIZING) || |
| 3618 | (adapter->state == SXG_STATE_HALTING)); |
| 3619 | while(!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3620 | |
| 3621 | ple = RemoveHeadList(&adapter->AllRcvBlocks); |
| 3622 | RcvBlockHdr = container_of(ple, struct sxg_rcv_block_hdr, AllList); |
| 3623 | |
| 3624 | if(RcvBlockHdr->VirtualAddress) { |
| 3625 | temp_RcvBlock = RcvBlockHdr->VirtualAddress; |
| 3626 | |
| 3627 | for(i=0; i< SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3628 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3629 | RcvDataBufferHdr = |
| 3630 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
| 3631 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3632 | } |
| 3633 | } |
| 3634 | |
| 3635 | pci_free_consistent(adapter->pcidev, |
| 3636 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 3637 | RcvBlockHdr->VirtualAddress, |
| 3638 | RcvBlockHdr->PhysicalAddress); |
| 3639 | adapter->AllRcvBlockCount--; |
| 3640 | } |
| 3641 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3642 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3643 | adapter, 0, 0, 0); |
| 3644 | } |
| 3645 | void sxg_free_mcast_addrs(struct adapter_t *adapter) |
| 3646 | { |
| 3647 | struct sxg_multicast_address *address; |
| 3648 | while(adapter->MulticastAddrs) { |
| 3649 | address = adapter->MulticastAddrs; |
| 3650 | adapter->MulticastAddrs = address->Next; |
| 3651 | kfree(address); |
| 3652 | } |
| 3653 | |
| 3654 | adapter->MulticastMask= 0; |
| 3655 | } |
| 3656 | |
| 3657 | void sxg_unmap_resources(struct adapter_t *adapter) |
| 3658 | { |
| 3659 | if(adapter->HwRegs) { |
| 3660 | iounmap((void *)adapter->HwRegs); |
| 3661 | } |
| 3662 | if(adapter->UcodeRegs) { |
| 3663 | iounmap((void *)adapter->UcodeRegs); |
| 3664 | } |
| 3665 | |
| 3666 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3667 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3668 | adapter, 0, 0, 0); |
| 3669 | } |
| 3670 | |
| 3671 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3672 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3673 | /* |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3674 | * sxg_free_resources - Free everything allocated in SxgAllocateResources |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3675 | * |
| 3676 | * Arguments - |
| 3677 | * adapter - A pointer to our adapter structure |
| 3678 | * |
| 3679 | * Return |
| 3680 | * none |
| 3681 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3682 | void sxg_free_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3683 | { |
| 3684 | u32 RssIds, IsrCount; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3685 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 3686 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3687 | |
| 3688 | if (adapter->BasicAllocations == FALSE) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3689 | /* |
| 3690 | * No allocations have been made, including spinlocks, |
| 3691 | * or listhead initializations. Return. |
| 3692 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3693 | return; |
| 3694 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3695 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3696 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3697 | sxg_free_rcvblocks(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3698 | } |
| 3699 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3700 | sxg_free_sgl_buffers(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3701 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3702 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3703 | if (adapter->XmtRingZeroIndex) { |
| 3704 | pci_free_consistent(adapter->pcidev, |
| 3705 | sizeof(u32), |
| 3706 | adapter->XmtRingZeroIndex, |
| 3707 | adapter->PXmtRingZeroIndex); |
| 3708 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3709 | if (adapter->Isr) { |
| 3710 | pci_free_consistent(adapter->pcidev, |
| 3711 | sizeof(u32) * IsrCount, |
| 3712 | adapter->Isr, adapter->PIsr); |
| 3713 | } |
| 3714 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3715 | if (adapter->EventRings) { |
| 3716 | pci_free_consistent(adapter->pcidev, |
| 3717 | sizeof(struct sxg_event_ring) * RssIds, |
| 3718 | adapter->EventRings, adapter->PEventRings); |
| 3719 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3720 | if (adapter->RcvRings) { |
| 3721 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3722 | sizeof(struct sxg_rcv_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3723 | adapter->RcvRings, |
| 3724 | adapter->PRcvRings); |
| 3725 | adapter->RcvRings = NULL; |
| 3726 | } |
| 3727 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3728 | if(adapter->XmtRings) { |
| 3729 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3730 | sizeof(struct sxg_xmt_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3731 | adapter->XmtRings, |
| 3732 | adapter->PXmtRings); |
| 3733 | adapter->XmtRings = NULL; |
| 3734 | } |
| 3735 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3736 | if (adapter->ucode_stats) { |
| 3737 | pci_unmap_single(adapter->pcidev, |
| 3738 | sizeof(struct sxg_ucode_stats), |
| 3739 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 3740 | adapter->ucode_stats = NULL; |
| 3741 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3742 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3743 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3744 | /* Unmap register spaces */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3745 | sxg_unmap_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3746 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3747 | sxg_free_mcast_addrs(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3748 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3749 | adapter->BasicAllocations = FALSE; |
| 3750 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3751 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3752 | |
| 3753 | /* |
| 3754 | * sxg_allocate_complete - |
| 3755 | * |
| 3756 | * This routine is called when a memory allocation has completed. |
| 3757 | * |
| 3758 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3759 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3760 | * VirtualAddress - Memory virtual address |
| 3761 | * PhysicalAddress - Memory physical address |
| 3762 | * Length - Length of memory allocated (or 0) |
| 3763 | * Context - The type of buffer allocated |
| 3764 | * |
| 3765 | * Return |
| 3766 | * None. |
| 3767 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3768 | static int sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3769 | void *VirtualAddress, |
| 3770 | dma_addr_t PhysicalAddress, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3771 | u32 Length, enum sxg_buffer_type Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3772 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3773 | int status = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3774 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3775 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3776 | ASSERT(atomic_read(&adapter->pending_allocations)); |
| 3777 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3778 | |
| 3779 | switch (Context) { |
| 3780 | |
| 3781 | case SXG_BUFFER_TYPE_RCV: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3782 | status = sxg_allocate_rcvblock_complete(adapter, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3783 | VirtualAddress, |
| 3784 | PhysicalAddress, Length); |
| 3785 | break; |
| 3786 | case SXG_BUFFER_TYPE_SGL: |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3787 | sxg_allocate_sgl_buffer_complete(adapter, (struct sxg_scatter_gather *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3788 | VirtualAddress, |
| 3789 | PhysicalAddress, Length); |
| 3790 | break; |
| 3791 | } |
| 3792 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3793 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3794 | |
| 3795 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3796 | } |
| 3797 | |
| 3798 | /* |
| 3799 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3800 | * synchronous and asynchronous buffer allocations |
| 3801 | * |
| 3802 | * Arguments - |
| 3803 | * adapter - A pointer to our adapter structure |
| 3804 | * Size - block size to allocate |
| 3805 | * BufferType - Type of buffer to allocate |
| 3806 | * |
| 3807 | * Return |
| 3808 | * int |
| 3809 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3810 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3811 | u32 Size, enum sxg_buffer_type BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3812 | { |
| 3813 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3814 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3815 | dma_addr_t pBuffer; |
| 3816 | |
| 3817 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3818 | adapter, Size, BufferType, 0); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3819 | /* |
| 3820 | * Grab the adapter lock and check the state. If we're in anything other |
| 3821 | * than INITIALIZING or RUNNING state, fail. This is to prevent |
| 3822 | * allocations in an improper driver state |
| 3823 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3824 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3825 | atomic_inc(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3826 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3827 | if(BufferType != SXG_BUFFER_TYPE_SGL) |
| 3828 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3829 | else { |
| 3830 | Buffer = kzalloc(Size, GFP_ATOMIC); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 3831 | pBuffer = (dma_addr_t)NULL; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3832 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3833 | if (Buffer == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3834 | /* |
| 3835 | * Decrement the AllocationsPending count while holding |
| 3836 | * the lock. Pause processing relies on this |
| 3837 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3838 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3839 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3840 | adapter, Size, BufferType, 0); |
| 3841 | return (STATUS_RESOURCES); |
| 3842 | } |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3843 | status = sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3844 | |
| 3845 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3846 | adapter, Size, BufferType, status); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3847 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3848 | } |
| 3849 | |
| 3850 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3851 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor |
| 3852 | * block allocation |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3853 | * |
| 3854 | * Arguments - |
| 3855 | * adapter - A pointer to our adapter structure |
| 3856 | * RcvBlock - receive block virtual address |
| 3857 | * PhysicalAddress - Physical address |
| 3858 | * Length - Memory length |
| 3859 | * |
| 3860 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3861 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3862 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3863 | void *RcvBlock, |
| 3864 | dma_addr_t PhysicalAddress, |
| 3865 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3866 | { |
| 3867 | u32 i; |
| 3868 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3869 | u64 Paddr; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3870 | void *temp_RcvBlock; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3871 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3872 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3873 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3874 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3875 | |
| 3876 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3877 | adapter, RcvBlock, Length, 0); |
| 3878 | if (RcvBlock == NULL) { |
| 3879 | goto fail; |
| 3880 | } |
| 3881 | memset(RcvBlock, 0, Length); |
| 3882 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3883 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3884 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3885 | /* |
| 3886 | * First, initialize the contained pool of receive data buffers. |
| 3887 | * This initialization requires NBL/NB/MDL allocations, if any of them |
| 3888 | * fail, free the block and return without queueing the shared memory |
| 3889 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3890 | //RcvDataBuffer = RcvBlock; |
| 3891 | temp_RcvBlock = RcvBlock; |
| 3892 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3893 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3894 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 3895 | temp_RcvBlock; |
| 3896 | /* For FREE macro assertion */ |
| 3897 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 3898 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 3899 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3900 | goto fail; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3901 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3902 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3903 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3904 | /* |
| 3905 | * Place this entire block of memory on the AllRcvBlocks queue so it |
| 3906 | * can be free later |
| 3907 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3908 | |
| 3909 | RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock + |
| 3910 | SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3911 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3912 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3913 | spin_lock(&adapter->RcvQLock); |
| 3914 | adapter->AllRcvBlockCount++; |
| 3915 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3916 | spin_unlock(&adapter->RcvQLock); |
| 3917 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3918 | /* Now free the contained receive data buffers that we |
| 3919 | * initialized above */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3920 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3921 | for (i = 0, Paddr = PhysicalAddress; |
| 3922 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3923 | i++, Paddr += SXG_RCV_DATA_HDR_SIZE, |
| 3924 | temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3925 | RcvDataBufferHdr = |
| 3926 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3927 | spin_lock(&adapter->RcvQLock); |
| 3928 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3929 | spin_unlock(&adapter->RcvQLock); |
| 3930 | } |
| 3931 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3932 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3933 | RcvDescriptorBlock = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3934 | (struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3935 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3936 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3937 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3938 | (struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3939 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3940 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3941 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3942 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3943 | spin_lock(&adapter->RcvQLock); |
| 3944 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3945 | spin_unlock(&adapter->RcvQLock); |
| 3946 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3947 | adapter, RcvBlock, Length, 0); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3948 | return STATUS_SUCCESS; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3949 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3950 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3951 | if (RcvBlock) { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3952 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3953 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3954 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3955 | RcvDataBufferHdr = |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3956 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3957 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3958 | } |
| 3959 | pci_free_consistent(adapter->pcidev, |
| 3960 | Length, RcvBlock, PhysicalAddress); |
| 3961 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3962 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3963 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3964 | adapter, adapter->FreeRcvBufferCount, |
| 3965 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3966 | adapter->Stats.NoMem++; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3967 | /* As allocation failed, free all previously allocated blocks..*/ |
| 3968 | //sxg_free_rcvblocks(adapter); |
| 3969 | |
| 3970 | return STATUS_RESOURCES; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3971 | } |
| 3972 | |
| 3973 | /* |
| 3974 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3975 | * |
| 3976 | * Arguments - |
| 3977 | * adapter - A pointer to our adapter structure |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3978 | * SxgSgl - struct sxg_scatter_gather buffer |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3979 | * PhysicalAddress - Physical address |
| 3980 | * Length - Memory length |
| 3981 | * |
| 3982 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3983 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3984 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3985 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3986 | dma_addr_t PhysicalAddress, |
| 3987 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3988 | { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3989 | unsigned long sgl_flags; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3990 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3991 | adapter, SxgSgl, Length, 0); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3992 | spin_lock_irqsave(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3993 | adapter->AllSglBufferCount++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3994 | /* PhysicalAddress; */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3995 | SxgSgl->PhysicalAddress = PhysicalAddress; |
| 3996 | /* Initialize backpointer once */ |
| 3997 | SxgSgl->adapter = adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3998 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3999 | spin_unlock_irqrestore(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4000 | SxgSgl->State = SXG_BUFFER_BUSY; |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 4001 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4002 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 4003 | adapter, SxgSgl, Length, 0); |
| 4004 | } |
| 4005 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4006 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4007 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4008 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4009 | /* |
| 4010 | * DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] \ |
| 4011 | * funct#[%d]\n", __func__, card->config_set, |
| 4012 | * adapter->port, adapter->physport, adapter->functionnumber); |
| 4013 | * |
| 4014 | * sxg_dbg_macaddrs(adapter); |
| 4015 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4016 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", |
| 4017 | * __FUNCTION__); |
| 4018 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4019 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4020 | /* sxg_dbg_macaddrs(adapter); */ |
| 4021 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4022 | struct net_device * dev = adapter->netdev; |
| 4023 | if(!dev) |
| 4024 | { |
| 4025 | printk("sxg: Dev is Null\n"); |
| 4026 | } |
| 4027 | |
| 4028 | DBG_ERROR("%s ENTER (%s)\n", __FUNCTION__, adapter->netdev->name); |
| 4029 | |
| 4030 | if (netif_running(dev)) { |
| 4031 | return -EBUSY; |
| 4032 | } |
| 4033 | if (!adapter) { |
| 4034 | return -EBUSY; |
| 4035 | } |
| 4036 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4037 | if (!(adapter->currmacaddr[0] || |
| 4038 | adapter->currmacaddr[1] || |
| 4039 | adapter->currmacaddr[2] || |
| 4040 | adapter->currmacaddr[3] || |
| 4041 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 4042 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 4043 | } |
| 4044 | if (adapter->netdev) { |
| 4045 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4046 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4047 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4048 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4049 | sxg_dbg_macaddrs(adapter); |
| 4050 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4051 | return 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4052 | } |
| 4053 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4054 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4055 | static int sxg_mac_set_address(struct net_device *dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4056 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4057 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4058 | struct sockaddr *addr = ptr; |
| 4059 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4060 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4061 | |
| 4062 | if (netif_running(dev)) { |
| 4063 | return -EBUSY; |
| 4064 | } |
| 4065 | if (!adapter) { |
| 4066 | return -EBUSY; |
| 4067 | } |
| 4068 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4069 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4070 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4071 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4072 | adapter->currmacaddr[5]); |
| 4073 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 4074 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 4075 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4076 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4077 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4078 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4079 | adapter->currmacaddr[5]); |
| 4080 | |
| 4081 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4082 | return 0; |
| 4083 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4084 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4085 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4086 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4087 | * SXG DRIVER FUNCTIONS (below) |
| 4088 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4089 | * sxg_initialize_adapter - Initialize adapter |
| 4090 | * |
| 4091 | * Arguments - |
| 4092 | * adapter - A pointer to our adapter structure |
| 4093 | * |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4094 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4095 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4096 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4097 | { |
| 4098 | u32 RssIds, IsrCount; |
| 4099 | u32 i; |
| 4100 | int status; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4101 | int sxg_rcv_ring_size = SXG_RCV_RING_SIZE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4102 | |
| 4103 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 4104 | adapter, 0, 0, 0); |
| 4105 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4106 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 4107 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4108 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4109 | /* |
| 4110 | * Sanity check SXG_UCODE_REGS structure definition to |
| 4111 | * make sure the length is correct |
| 4112 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4113 | ASSERT(sizeof(struct sxg_ucode_regs) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4114 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4115 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4116 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 4117 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4118 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4119 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 4120 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 4121 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 4122 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4123 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4124 | WRITE_REG64(adapter, |
| 4125 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 4126 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 4127 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4128 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4129 | for (i = 0; i < IsrCount; i++) { |
| 4130 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4131 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4132 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 4133 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 4134 | } |
| 4135 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4136 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4137 | WRITE_REG64(adapter, |
| 4138 | adapter->UcodeRegs[0].SPSendIndex, |
| 4139 | adapter->PXmtRingZeroIndex, 0); |
| 4140 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4141 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4142 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4143 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4144 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 4145 | TRUE); |
| 4146 | } |
| 4147 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4148 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4149 | WRITE_REG64(adapter, |
| 4150 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 4151 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 4152 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4153 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4154 | WRITE_REG64(adapter, |
| 4155 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4156 | if (adapter->JumboEnabled == TRUE) |
| 4157 | sxg_rcv_ring_size = SXG_JUMBO_RCV_RING_SIZE; |
| 4158 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, sxg_rcv_ring_size, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4159 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4160 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4161 | sxg_stock_rcv_buffers(adapter); |
| 4162 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4163 | /* |
| 4164 | * Initialize checksum offload capabilities. At the moment we always |
| 4165 | * enable IP and TCP receive checksums on the card. Depending on the |
| 4166 | * checksum configuration specified by the user, we can choose to |
| 4167 | * report or ignore the checksum information provided by the card. |
| 4168 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4169 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 4170 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 4171 | |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 4172 | adapter->flags |= (SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED ); |
| 4173 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4174 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4175 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4176 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4177 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4178 | status); |
| 4179 | if (status != STATUS_SUCCESS) { |
| 4180 | return (status); |
| 4181 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4182 | /* |
| 4183 | * Initialize Dead to FALSE. |
| 4184 | * SlicCheckForHang or SlicDumpThread will take it from here. |
| 4185 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4186 | adapter->Dead = FALSE; |
| 4187 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 4188 | adapter->XmtFcEnabled = TRUE; |
| 4189 | adapter->RcvFcEnabled = TRUE; |
| 4190 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4191 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4192 | |
| 4193 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 4194 | adapter, 0, 0, 0); |
| 4195 | return (STATUS_SUCCESS); |
| 4196 | } |
| 4197 | |
| 4198 | /* |
| 4199 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 4200 | * the card. The caller should hold the RcvQLock |
| 4201 | * |
| 4202 | * Arguments - |
| 4203 | * adapter - A pointer to our adapter structure |
| 4204 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 4205 | * |
| 4206 | * Return |
| 4207 | * status |
| 4208 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4209 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4210 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4211 | { |
| 4212 | u32 i; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4213 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4214 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 4215 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 4216 | struct sxg_cmd *RingDescriptorCmd; |
| 4217 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4218 | |
| 4219 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 4220 | adapter, adapter->RcvBuffersOnCard, |
| 4221 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4222 | |
| 4223 | ASSERT(RcvDescriptorBlockHdr); |
| 4224 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4225 | /* |
| 4226 | * If we don't have the resources to fill the descriptor block, |
| 4227 | * return failure |
| 4228 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4229 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 4230 | SXG_RING_FULL(RcvRingInfo)) { |
| 4231 | adapter->Stats.NoMem++; |
| 4232 | return (STATUS_FAILURE); |
| 4233 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4234 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4235 | SXG_GET_CMD(RingZero, |
| 4236 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4237 | ASSERT(RingDescriptorCmd); |
| 4238 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4239 | RcvDescriptorBlock = (struct sxg_rcv_descriptor_block *) |
| 4240 | RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4241 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4242 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4243 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 4244 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4245 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4246 | // ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4247 | if (!RcvDataBufferHdr->SxgDumbRcvPacket) { |
| 4248 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, |
| 4249 | adapter->ReceiveBufferSize); |
| 4250 | if(RcvDataBufferHdr->skb) |
| 4251 | RcvDataBufferHdr->SxgDumbRcvPacket = |
| 4252 | RcvDataBufferHdr->skb; |
| 4253 | else |
| 4254 | goto no_memory; |
| 4255 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4256 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 4257 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4258 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4259 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4260 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4261 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4262 | RcvDataBufferHdr->PhysicalAddress; |
| 4263 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4264 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4265 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 4266 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4267 | /* |
| 4268 | * RcvBuffersOnCard is not protected via the receive lock (see |
| 4269 | * sxg_process_event_queue) We don't want to grap a lock every time a |
| 4270 | * buffer is returned to us, so we use atomic interlocked functions |
| 4271 | * instead. |
| 4272 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4273 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 4274 | |
| 4275 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 4276 | RcvDescriptorBlockHdr, |
| 4277 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4278 | |
| 4279 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 4280 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 4281 | adapter, adapter->RcvBuffersOnCard, |
| 4282 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4283 | return (STATUS_SUCCESS); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4284 | no_memory: |
Mithlesh Thukral | b9d1081 | 2009-02-18 18:52:18 +0530 | [diff] [blame] | 4285 | for (; i >= 0 ; i--) { |
| 4286 | if (RcvDescriptorBlock->Descriptors[i].VirtualAddress) { |
| 4287 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 4288 | RcvDescriptorBlock->Descriptors[i]. |
| 4289 | VirtualAddress; |
| 4290 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4291 | (dma_addr_t)NULL; |
| 4292 | RcvDescriptorBlock->Descriptors[i].VirtualAddress=NULL; |
| 4293 | } |
| 4294 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4295 | } |
| 4296 | RcvDescriptorBlockHdr->State = SXG_BUFFER_FREE; |
| 4297 | SXG_RETURN_CMD(RingZero, RcvRingInfo, RingDescriptorCmd, |
| 4298 | RcvDescriptorBlockHdr); |
| 4299 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4300 | return (-ENOMEM); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4301 | } |
| 4302 | |
| 4303 | /* |
| 4304 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 4305 | * |
| 4306 | * Arguments - |
| 4307 | * adapter - A pointer to our adapter structure |
| 4308 | * |
| 4309 | * Return |
| 4310 | * None |
| 4311 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4312 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4313 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4314 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4315 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
| 4316 | int sxg_min_rcv_data_buffers = SXG_MIN_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4317 | |
| 4318 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 4319 | adapter, adapter->RcvBuffersOnCard, |
| 4320 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4321 | /* |
| 4322 | * First, see if we've got less than our minimum threshold of |
| 4323 | * receive buffers, there isn't an allocation in progress, and |
| 4324 | * we haven't exceeded our maximum.. get another block of buffers |
| 4325 | * None of this needs to be SMP safe. It's round numbers. |
| 4326 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4327 | if (adapter->JumboEnabled == TRUE) |
| 4328 | sxg_min_rcv_data_buffers = SXG_MIN_JUMBO_RCV_DATA_BUFFERS; |
| 4329 | if ((adapter->FreeRcvBufferCount < sxg_min_rcv_data_buffers) && |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4330 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4331 | (atomic_read(&adapter->pending_allocations) == 0)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4332 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 4333 | SXG_RCV_BLOCK_SIZE |
| 4334 | (SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4335 | SXG_BUFFER_TYPE_RCV); |
| 4336 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4337 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4338 | spin_lock(&adapter->RcvQLock); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4339 | if (adapter->JumboEnabled) |
| 4340 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 4341 | while (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4342 | struct list_entry *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4343 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4344 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4345 | RcvDescriptorBlockHdr = NULL; |
| 4346 | if (adapter->FreeRcvBlockCount) { |
| 4347 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4348 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4349 | container_of(_ple, struct sxg_rcv_descriptor_block_hdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4350 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4351 | adapter->FreeRcvBlockCount--; |
| 4352 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 4353 | } |
| 4354 | |
| 4355 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4356 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4357 | adapter->Stats.NoMem++; |
| 4358 | break; |
| 4359 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4360 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4361 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 4362 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4363 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4364 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4365 | RcvDescriptorBlockHdr); |
| 4366 | break; |
| 4367 | } |
| 4368 | } |
| 4369 | spin_unlock(&adapter->RcvQLock); |
| 4370 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 4371 | adapter, adapter->RcvBuffersOnCard, |
| 4372 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4373 | } |
| 4374 | |
| 4375 | /* |
| 4376 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 4377 | * completed by the microcode |
| 4378 | * |
| 4379 | * Arguments - |
| 4380 | * adapter - A pointer to our adapter structure |
| 4381 | * Index - Where the microcode is up to |
| 4382 | * |
| 4383 | * Return |
| 4384 | * None |
| 4385 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4386 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4387 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4388 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4389 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
| 4390 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4391 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
| 4392 | struct sxg_cmd *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4393 | |
| 4394 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 4395 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4396 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4397 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4398 | spin_lock(&adapter->RcvQLock); |
| 4399 | ASSERT(Index != RcvRingInfo->Tail); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4400 | while (sxg_ring_get_forward_diff(RcvRingInfo, Index, |
| 4401 | RcvRingInfo->Tail) > 3) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4402 | /* |
| 4403 | * Locate the current Cmd (ring descriptor entry), and |
| 4404 | * associated receive descriptor block, and advance |
| 4405 | * the tail |
| 4406 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4407 | SXG_RETURN_CMD(RingZero, |
| 4408 | RcvRingInfo, |
| 4409 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4410 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 4411 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 4412 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4413 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4414 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4415 | RingDescriptorCmd->Sgl = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4416 | /* |
| 4417 | * Attempt to refill it and hand it right back to the |
| 4418 | * card. If we fail to refill it, free the descriptor block |
| 4419 | * header. The card will be restocked later via the |
| 4420 | * RcvBuffersOnCard test |
| 4421 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4422 | if (sxg_fill_descriptor_block(adapter, |
| 4423 | RcvDescriptorBlockHdr) == STATUS_FAILURE) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4424 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4425 | RcvDescriptorBlockHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4426 | } |
| 4427 | spin_unlock(&adapter->RcvQLock); |
| 4428 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 4429 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4430 | } |
| 4431 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4432 | /* |
| 4433 | * Read the statistics which the card has been maintaining. |
| 4434 | */ |
| 4435 | void sxg_collect_statistics(struct adapter_t *adapter) |
| 4436 | { |
| 4437 | if(adapter->ucode_stats) |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4438 | WRITE_REG64(adapter, adapter->UcodeRegs[0].GetUcodeStats, |
| 4439 | adapter->pucode_stats, 0); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4440 | adapter->stats.rx_fifo_errors = adapter->ucode_stats->ERDrops; |
| 4441 | adapter->stats.rx_over_errors = adapter->ucode_stats->NBDrops; |
| 4442 | adapter->stats.tx_fifo_errors = adapter->ucode_stats->XDrops; |
| 4443 | } |
| 4444 | |
| 4445 | static struct net_device_stats *sxg_get_stats(struct net_device * dev) |
| 4446 | { |
| 4447 | struct adapter_t *adapter = netdev_priv(dev); |
| 4448 | |
| 4449 | sxg_collect_statistics(adapter); |
| 4450 | return (&adapter->stats); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4451 | } |
| 4452 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 4453 | static void sxg_watchdog(unsigned long data) |
| 4454 | { |
| 4455 | struct adapter_t *adapter = (struct adapter_t *) data; |
| 4456 | |
| 4457 | if (adapter->state != ADAPT_DOWN) { |
| 4458 | sxg_link_event(adapter); |
| 4459 | /* Reset the timer */ |
| 4460 | mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ)); |
| 4461 | } |
| 4462 | } |
| 4463 | |
| 4464 | static void sxg_update_link_status (struct work_struct *work) |
| 4465 | { |
| 4466 | struct adapter_t *adapter = (struct adapter_t *)container_of |
| 4467 | (work, struct adapter_t, update_link_status); |
| 4468 | if (likely(adapter->link_status_changed)) { |
| 4469 | sxg_link_event(adapter); |
| 4470 | adapter->link_status_changed = 0; |
| 4471 | } |
| 4472 | } |
| 4473 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4474 | static struct pci_driver sxg_driver = { |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 4475 | .name = sxg_driver_name, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4476 | .id_table = sxg_pci_tbl, |
| 4477 | .probe = sxg_entry_probe, |
| 4478 | .remove = sxg_entry_remove, |
| 4479 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 4480 | .suspend = sxgpm_suspend, |
| 4481 | .resume = sxgpm_resume, |
| 4482 | #endif |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4483 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4484 | }; |
| 4485 | |
| 4486 | static int __init sxg_module_init(void) |
| 4487 | { |
| 4488 | sxg_init_driver(); |
| 4489 | |
| 4490 | if (debug >= 0) |
| 4491 | sxg_debug = debug; |
| 4492 | |
| 4493 | return pci_register_driver(&sxg_driver); |
| 4494 | } |
| 4495 | |
| 4496 | static void __exit sxg_module_cleanup(void) |
| 4497 | { |
| 4498 | pci_unregister_driver(&sxg_driver); |
| 4499 | } |
| 4500 | |
| 4501 | module_init(sxg_module_init); |
| 4502 | module_exit(sxg_module_cleanup); |