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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
Geert Uytterhoevend16da512015-03-15 14:03:50 +010020#include <linux/of.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050021#include <linux/platform_device.h>
22#include <linux/regulator/driver.h>
23#include <linux/regulator/machine.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050024#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
Rhyland Klein67901782012-05-08 11:42:41 -070027#include <linux/regulator/of_regulator.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050028
Graeme Gregory518fb722011-05-02 16:20:08 -050029#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053030#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053032 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
33 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050034
Axel Lind9fe28f2012-06-21 18:48:00 +080035/* supported VIO voltages in microvolts */
36static const unsigned int VIO_VSEL_table[] = {
37 1500000, 1800000, 2500000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050038};
39
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050040/* VSEL tables for TPS65910 specific LDOs and dcdc's */
41
AnilKumar Cha9a56592012-10-15 17:45:58 +053042/* supported VRTC voltages in microvolts */
43static const unsigned int VRTC_VSEL_table[] = {
44 1800000,
45};
46
Axel Lind9fe28f2012-06-21 18:48:00 +080047/* supported VDD3 voltages in microvolts */
48static const unsigned int VDD3_VSEL_table[] = {
49 5000000,
Graeme Gregory518fb722011-05-02 16:20:08 -050050};
51
Axel Lind9fe28f2012-06-21 18:48:00 +080052/* supported VDIG1 voltages in microvolts */
53static const unsigned int VDIG1_VSEL_table[] = {
54 1200000, 1500000, 1800000, 2700000,
Graeme Gregory518fb722011-05-02 16:20:08 -050055};
56
Axel Lind9fe28f2012-06-21 18:48:00 +080057/* supported VDIG2 voltages in microvolts */
58static const unsigned int VDIG2_VSEL_table[] = {
59 1000000, 1100000, 1200000, 1800000,
Graeme Gregory518fb722011-05-02 16:20:08 -050060};
61
Axel Lind9fe28f2012-06-21 18:48:00 +080062/* supported VPLL voltages in microvolts */
63static const unsigned int VPLL_VSEL_table[] = {
64 1000000, 1100000, 1800000, 2500000,
Graeme Gregory518fb722011-05-02 16:20:08 -050065};
66
Axel Lind9fe28f2012-06-21 18:48:00 +080067/* supported VDAC voltages in microvolts */
68static const unsigned int VDAC_VSEL_table[] = {
69 1800000, 2600000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050070};
71
Axel Lind9fe28f2012-06-21 18:48:00 +080072/* supported VAUX1 voltages in microvolts */
73static const unsigned int VAUX1_VSEL_table[] = {
74 1800000, 2500000, 2800000, 2850000,
Graeme Gregory518fb722011-05-02 16:20:08 -050075};
76
Axel Lind9fe28f2012-06-21 18:48:00 +080077/* supported VAUX2 voltages in microvolts */
78static const unsigned int VAUX2_VSEL_table[] = {
79 1800000, 2800000, 2900000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050080};
81
Axel Lind9fe28f2012-06-21 18:48:00 +080082/* supported VAUX33 voltages in microvolts */
83static const unsigned int VAUX33_VSEL_table[] = {
84 1800000, 2000000, 2800000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050085};
86
Axel Lind9fe28f2012-06-21 18:48:00 +080087/* supported VMMC voltages in microvolts */
88static const unsigned int VMMC_VSEL_table[] = {
89 1800000, 2800000, 3000000, 3300000,
Graeme Gregory518fb722011-05-02 16:20:08 -050090};
91
Markus Pargmann03746dc2013-12-20 12:43:27 +010092/* supported BBCH voltages in microvolts */
93static const unsigned int VBB_VSEL_table[] = {
94 3000000, 2520000, 3150000, 5000000,
95};
96
Graeme Gregory518fb722011-05-02 16:20:08 -050097struct tps_info {
98 const char *name;
Laxman Dewangan19228a62012-07-06 14:13:12 +053099 const char *vin_name;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530100 u8 n_voltages;
Axel Lind9fe28f2012-06-21 18:48:00 +0800101 const unsigned int *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530102 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -0500103};
104
105static struct tps_info tps65910_regs[] = {
106 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530107 .name = "vrtc",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530108 .vin_name = "vcc7",
AnilKumar Cha9a56592012-10-15 17:45:58 +0530109 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
110 .voltage_table = VRTC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530111 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500112 },
113 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530114 .name = "vio",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530115 .vin_name = "vccio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530116 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
117 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530118 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500119 },
120 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530121 .name = "vdd1",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530122 .vin_name = "vcc1",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530123 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500124 },
125 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530126 .name = "vdd2",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530127 .vin_name = "vcc2",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530128 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500129 },
130 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530131 .name = "vdd3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
133 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530137 .name = "vdig1",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530138 .vin_name = "vcc6",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530139 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
140 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530141 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500142 },
143 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530144 .name = "vdig2",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530145 .vin_name = "vcc6",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530146 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
147 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530148 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500149 },
150 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530151 .name = "vpll",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530152 .vin_name = "vcc5",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530153 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
154 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530155 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500156 },
157 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530158 .name = "vdac",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530159 .vin_name = "vcc5",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530160 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
161 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530162 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500163 },
164 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530165 .name = "vaux1",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530166 .vin_name = "vcc4",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530167 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
168 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530169 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500170 },
171 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530172 .name = "vaux2",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530173 .vin_name = "vcc4",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530174 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
175 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530176 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500177 },
178 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530179 .name = "vaux33",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530180 .vin_name = "vcc3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530181 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
182 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530183 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500184 },
185 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530186 .name = "vmmc",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530187 .vin_name = "vcc3",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530190 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500191 },
Markus Pargmann03746dc2013-12-20 12:43:27 +0100192 {
193 .name = "vbb",
194 .vin_name = "vcc7",
195 .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
196 .voltage_table = VBB_VSEL_table,
197 },
Graeme Gregory518fb722011-05-02 16:20:08 -0500198};
199
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500200static struct tps_info tps65911_regs[] = {
201 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530202 .name = "vrtc",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530203 .vin_name = "vcc7",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530204 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530205 },
206 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530207 .name = "vio",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530208 .vin_name = "vccio",
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530209 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
210 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530211 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500212 },
213 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530214 .name = "vdd1",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530215 .vin_name = "vcc1",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530216 .n_voltages = 0x4C,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530217 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500218 },
219 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530220 .name = "vdd2",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530221 .vin_name = "vcc2",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530222 .n_voltages = 0x4C,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530223 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500224 },
225 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530226 .name = "vddctrl",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530227 .n_voltages = 0x44,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530228 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500229 },
230 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530231 .name = "ldo1",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530232 .vin_name = "vcc6",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530233 .n_voltages = 0x33,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530234 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500235 },
236 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530237 .name = "ldo2",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530238 .vin_name = "vcc6",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530239 .n_voltages = 0x33,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530240 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500241 },
242 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530243 .name = "ldo3",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530244 .vin_name = "vcc5",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530245 .n_voltages = 0x1A,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530246 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500247 },
248 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530249 .name = "ldo4",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530250 .vin_name = "vcc5",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530251 .n_voltages = 0x33,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530252 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500253 },
254 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530255 .name = "ldo5",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530256 .vin_name = "vcc4",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530257 .n_voltages = 0x1A,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530258 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500259 },
260 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530261 .name = "ldo6",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530262 .vin_name = "vcc3",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530263 .n_voltages = 0x1A,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530264 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500265 },
266 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530267 .name = "ldo7",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530268 .vin_name = "vcc3",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530269 .n_voltages = 0x1A,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530270 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500271 },
272 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530273 .name = "ldo8",
Laxman Dewangan19228a62012-07-06 14:13:12 +0530274 .vin_name = "vcc3",
Laxman Dewangan7be53182012-07-09 20:27:13 +0530275 .n_voltages = 0x1A,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530276 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500277 },
278};
279
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530280#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
281static unsigned int tps65910_ext_sleep_control[] = {
282 0,
283 EXT_CONTROL_REG_BITS(VIO, 1, 0),
284 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
285 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
286 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
287 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
288 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
289 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
290 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
291 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
292 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
293 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
294 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
295};
296
297static unsigned int tps65911_ext_sleep_control[] = {
298 0,
299 EXT_CONTROL_REG_BITS(VIO, 1, 0),
300 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
301 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
302 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
303 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
304 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
305 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
306 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
307 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
308 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
309 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
310 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
311};
312
Graeme Gregory518fb722011-05-02 16:20:08 -0500313struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800314 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500315 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800316 struct regulator_dev **rdev;
317 struct tps_info **info;
Axel Lin39aa9b62011-07-11 09:57:43 +0800318 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500319 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500320 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530321 unsigned int *ext_sleep_control;
322 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500323};
324
Graeme Gregory518fb722011-05-02 16:20:08 -0500325static int tps65910_get_ctrl_register(int id)
326{
327 switch (id) {
328 case TPS65910_REG_VRTC:
329 return TPS65910_VRTC;
330 case TPS65910_REG_VIO:
331 return TPS65910_VIO;
332 case TPS65910_REG_VDD1:
333 return TPS65910_VDD1;
334 case TPS65910_REG_VDD2:
335 return TPS65910_VDD2;
336 case TPS65910_REG_VDD3:
337 return TPS65910_VDD3;
338 case TPS65910_REG_VDIG1:
339 return TPS65910_VDIG1;
340 case TPS65910_REG_VDIG2:
341 return TPS65910_VDIG2;
342 case TPS65910_REG_VPLL:
343 return TPS65910_VPLL;
344 case TPS65910_REG_VDAC:
345 return TPS65910_VDAC;
346 case TPS65910_REG_VAUX1:
347 return TPS65910_VAUX1;
348 case TPS65910_REG_VAUX2:
349 return TPS65910_VAUX2;
350 case TPS65910_REG_VAUX33:
351 return TPS65910_VAUX33;
352 case TPS65910_REG_VMMC:
353 return TPS65910_VMMC;
Markus Pargmann03746dc2013-12-20 12:43:27 +0100354 case TPS65910_REG_VBB:
355 return TPS65910_BBCH;
Graeme Gregory518fb722011-05-02 16:20:08 -0500356 default:
357 return -EINVAL;
358 }
359}
360
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500361static int tps65911_get_ctrl_register(int id)
362{
363 switch (id) {
364 case TPS65910_REG_VRTC:
365 return TPS65910_VRTC;
366 case TPS65910_REG_VIO:
367 return TPS65910_VIO;
368 case TPS65910_REG_VDD1:
369 return TPS65910_VDD1;
370 case TPS65910_REG_VDD2:
371 return TPS65910_VDD2;
372 case TPS65911_REG_VDDCTRL:
373 return TPS65911_VDDCTRL;
374 case TPS65911_REG_LDO1:
375 return TPS65911_LDO1;
376 case TPS65911_REG_LDO2:
377 return TPS65911_LDO2;
378 case TPS65911_REG_LDO3:
379 return TPS65911_LDO3;
380 case TPS65911_REG_LDO4:
381 return TPS65911_LDO4;
382 case TPS65911_REG_LDO5:
383 return TPS65911_LDO5;
384 case TPS65911_REG_LDO6:
385 return TPS65911_LDO6;
386 case TPS65911_REG_LDO7:
387 return TPS65911_LDO7;
388 case TPS65911_REG_LDO8:
389 return TPS65911_LDO8;
390 default:
391 return -EINVAL;
392 }
393}
394
Graeme Gregory518fb722011-05-02 16:20:08 -0500395static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
396{
397 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
398 struct tps65910 *mfd = pmic->mfd;
399 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500400
401 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500402 if (reg < 0)
403 return reg;
404
405 switch (mode) {
406 case REGULATOR_MODE_NORMAL:
Axel Linfaa95fd2012-07-11 19:44:13 +0800407 return tps65910_reg_update_bits(pmic->mfd, reg,
408 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
409 LDO_ST_ON_BIT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500410 case REGULATOR_MODE_IDLE:
411 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700412 return tps65910_reg_set_bits(mfd, reg, value);
Graeme Gregory518fb722011-05-02 16:20:08 -0500413 case REGULATOR_MODE_STANDBY:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700414 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500415 }
416
417 return -EINVAL;
418}
419
420static unsigned int tps65910_get_mode(struct regulator_dev *dev)
421{
422 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Linfaa95fd2012-07-11 19:44:13 +0800423 int ret, reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500424
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500425 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500426 if (reg < 0)
427 return reg;
428
Axel Linfaa95fd2012-07-11 19:44:13 +0800429 ret = tps65910_reg_read(pmic->mfd, reg, &value);
430 if (ret < 0)
431 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500432
Axel Lin58599392012-03-13 07:15:27 +0800433 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500434 return REGULATOR_MODE_STANDBY;
435 else if (value & LDO_ST_MODE_BIT)
436 return REGULATOR_MODE_IDLE;
437 else
438 return REGULATOR_MODE_NORMAL;
439}
440
Laxman Dewangan18039e02012-03-14 13:00:58 +0530441static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500442{
443 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Linfaa95fd2012-07-11 19:44:13 +0800444 int ret, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500445 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500446
447 switch (id) {
448 case TPS65910_REG_VDD1:
Axel Linfaa95fd2012-07-11 19:44:13 +0800449 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
450 if (ret < 0)
451 return ret;
452 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
453 if (ret < 0)
454 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500455 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
Axel Linfaa95fd2012-07-11 19:44:13 +0800456 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
457 if (ret < 0)
458 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500459 sr = opvsel & VDD1_OP_CMD_MASK;
460 opvsel &= VDD1_OP_SEL_MASK;
461 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500462 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500463 break;
464 case TPS65910_REG_VDD2:
Axel Linfaa95fd2012-07-11 19:44:13 +0800465 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
466 if (ret < 0)
467 return ret;
468 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
469 if (ret < 0)
470 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500471 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
Axel Linfaa95fd2012-07-11 19:44:13 +0800472 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
473 if (ret < 0)
474 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500475 sr = opvsel & VDD2_OP_CMD_MASK;
476 opvsel &= VDD2_OP_SEL_MASK;
477 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500478 vselmax = 75;
479 break;
480 case TPS65911_REG_VDDCTRL:
Axel Linfaa95fd2012-07-11 19:44:13 +0800481 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
482 &opvsel);
483 if (ret < 0)
484 return ret;
485 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
486 &srvsel);
487 if (ret < 0)
488 return ret;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500489 sr = opvsel & VDDCTRL_OP_CMD_MASK;
490 opvsel &= VDDCTRL_OP_SEL_MASK;
491 srvsel &= VDDCTRL_SR_SEL_MASK;
492 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500493 break;
494 }
495
496 /* multiplier 0 == 1 but 2,3 normal */
497 if (!mult)
Jingoo Han4b579272013-10-14 17:53:40 +0900498 mult = 1;
Graeme Gregory518fb722011-05-02 16:20:08 -0500499
500 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500501 /* normalise to valid range */
502 if (srvsel < 3)
503 srvsel = 3;
504 if (srvsel > vselmax)
505 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530506 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500507 } else {
508
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500509 /* normalise to valid range*/
510 if (opvsel < 3)
511 opvsel = 3;
512 if (opvsel > vselmax)
513 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530514 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500515 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530516 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500517}
518
Axel Lin1f904fd2012-05-09 09:22:47 +0800519static int tps65910_get_voltage_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500520{
521 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Linfaa95fd2012-07-11 19:44:13 +0800522 int ret, reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500523
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500524 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500525 if (reg < 0)
526 return reg;
527
Axel Linfaa95fd2012-07-11 19:44:13 +0800528 ret = tps65910_reg_read(pmic->mfd, reg, &value);
529 if (ret < 0)
530 return ret;
Graeme Gregory518fb722011-05-02 16:20:08 -0500531
532 switch (id) {
533 case TPS65910_REG_VIO:
534 case TPS65910_REG_VDIG1:
535 case TPS65910_REG_VDIG2:
536 case TPS65910_REG_VPLL:
537 case TPS65910_REG_VDAC:
538 case TPS65910_REG_VAUX1:
539 case TPS65910_REG_VAUX2:
540 case TPS65910_REG_VAUX33:
541 case TPS65910_REG_VMMC:
542 value &= LDO_SEL_MASK;
543 value >>= LDO_SEL_SHIFT;
544 break;
Markus Pargmann03746dc2013-12-20 12:43:27 +0100545 case TPS65910_REG_VBB:
546 value &= BBCH_BBSEL_MASK;
547 value >>= BBCH_BBSEL_SHIFT;
548 break;
Graeme Gregory518fb722011-05-02 16:20:08 -0500549 default:
550 return -EINVAL;
551 }
552
Axel Lin1f904fd2012-05-09 09:22:47 +0800553 return value;
Graeme Gregory518fb722011-05-02 16:20:08 -0500554}
555
556static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
557{
Axel Lind9fe28f2012-06-21 18:48:00 +0800558 return dev->desc->volt_table[0];
Graeme Gregory518fb722011-05-02 16:20:08 -0500559}
560
Axel Lin1f904fd2012-05-09 09:22:47 +0800561static int tps65911_get_voltage_sel(struct regulator_dev *dev)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500562{
563 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Linfaa95fd2012-07-11 19:44:13 +0800564 int ret, id = rdev_get_id(dev);
565 unsigned int value, reg;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500566
567 reg = pmic->get_ctrl_reg(id);
568
Axel Linfaa95fd2012-07-11 19:44:13 +0800569 ret = tps65910_reg_read(pmic->mfd, reg, &value);
570 if (ret < 0)
571 return ret;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500572
573 switch (id) {
574 case TPS65911_REG_LDO1:
575 case TPS65911_REG_LDO2:
576 case TPS65911_REG_LDO4:
577 value &= LDO1_SEL_MASK;
578 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500579 break;
580 case TPS65911_REG_LDO3:
581 case TPS65911_REG_LDO5:
582 case TPS65911_REG_LDO6:
583 case TPS65911_REG_LDO7:
584 case TPS65911_REG_LDO8:
585 value &= LDO3_SEL_MASK;
586 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500587 break;
588 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530589 value &= LDO_SEL_MASK;
590 value >>= LDO_SEL_SHIFT;
Axel Lin1f904fd2012-05-09 09:22:47 +0800591 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500592 default:
593 return -EINVAL;
594 }
595
Axel Lin1f904fd2012-05-09 09:22:47 +0800596 return value;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500597}
598
Axel Lin94732b92012-03-09 10:22:20 +0800599static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
600 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500601{
602 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
603 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500604 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500605
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500606 switch (id) {
607 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530608 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500609 if (dcdc_mult == 1)
610 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530611 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500612
Axel Linfaa95fd2012-07-11 19:44:13 +0800613 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
614 VDD1_VGAIN_SEL_MASK,
615 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
616 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500617 break;
618 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530619 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500620 if (dcdc_mult == 1)
621 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530622 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500623
Axel Linfaa95fd2012-07-11 19:44:13 +0800624 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
625 VDD1_VGAIN_SEL_MASK,
626 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
627 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500628 break;
629 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530630 vsel = selector + 3;
Axel Linfaa95fd2012-07-11 19:44:13 +0800631 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500632 }
633
634 return 0;
635}
636
Axel Lin94732b92012-03-09 10:22:20 +0800637static int tps65910_set_voltage_sel(struct regulator_dev *dev,
638 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500639{
640 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
641 int reg, id = rdev_get_id(dev);
642
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500643 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500644 if (reg < 0)
645 return reg;
646
647 switch (id) {
648 case TPS65910_REG_VIO:
649 case TPS65910_REG_VDIG1:
650 case TPS65910_REG_VDIG2:
651 case TPS65910_REG_VPLL:
652 case TPS65910_REG_VDAC:
653 case TPS65910_REG_VAUX1:
654 case TPS65910_REG_VAUX2:
655 case TPS65910_REG_VAUX33:
656 case TPS65910_REG_VMMC:
Axel Linfaa95fd2012-07-11 19:44:13 +0800657 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
658 selector << LDO_SEL_SHIFT);
Markus Pargmann03746dc2013-12-20 12:43:27 +0100659 case TPS65910_REG_VBB:
660 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
661 selector << BBCH_BBSEL_SHIFT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500662 }
663
664 return -EINVAL;
665}
666
Axel Lin94732b92012-03-09 10:22:20 +0800667static int tps65911_set_voltage_sel(struct regulator_dev *dev,
668 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500669{
670 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
671 int reg, id = rdev_get_id(dev);
672
673 reg = pmic->get_ctrl_reg(id);
674 if (reg < 0)
675 return reg;
676
677 switch (id) {
678 case TPS65911_REG_LDO1:
679 case TPS65911_REG_LDO2:
680 case TPS65911_REG_LDO4:
Axel Linfaa95fd2012-07-11 19:44:13 +0800681 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
682 selector << LDO_SEL_SHIFT);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500683 case TPS65911_REG_LDO3:
684 case TPS65911_REG_LDO5:
685 case TPS65911_REG_LDO6:
686 case TPS65911_REG_LDO7:
687 case TPS65911_REG_LDO8:
Axel Linfaa95fd2012-07-11 19:44:13 +0800688 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
689 selector << LDO_SEL_SHIFT);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530690 case TPS65910_REG_VIO:
Axel Linfaa95fd2012-07-11 19:44:13 +0800691 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
692 selector << LDO_SEL_SHIFT);
Markus Pargmann03746dc2013-12-20 12:43:27 +0100693 case TPS65910_REG_VBB:
694 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
695 selector << BBCH_BBSEL_SHIFT);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500696 }
697
698 return -EINVAL;
699}
700
701
Graeme Gregory518fb722011-05-02 16:20:08 -0500702static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
703 unsigned selector)
704{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500705 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500706
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500707 switch (id) {
708 case TPS65910_REG_VDD1:
709 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530710 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500711 volt = VDD1_2_MIN_VOLT +
Jingoo Han4b579272013-10-14 17:53:40 +0900712 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800713 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500714 case TPS65911_REG_VDDCTRL:
715 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800716 break;
717 default:
718 BUG();
719 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500720 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500721
722 return volt * 100 * mult;
723}
724
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500725static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
726{
727 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
728 int step_mv = 0, id = rdev_get_id(dev);
729
Jingoo Han4b579272013-10-14 17:53:40 +0900730 switch (id) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500731 case TPS65911_REG_LDO1:
732 case TPS65911_REG_LDO2:
733 case TPS65911_REG_LDO4:
734 /* The first 5 values of the selector correspond to 1V */
735 if (selector < 5)
736 selector = 0;
737 else
738 selector -= 4;
739
740 step_mv = 50;
741 break;
742 case TPS65911_REG_LDO3:
743 case TPS65911_REG_LDO5:
744 case TPS65911_REG_LDO6:
745 case TPS65911_REG_LDO7:
746 case TPS65911_REG_LDO8:
747 /* The first 3 values of the selector correspond to 1V */
748 if (selector < 3)
749 selector = 0;
750 else
751 selector -= 2;
752
753 step_mv = 100;
754 break;
755 case TPS65910_REG_VIO:
Axel Lind9fe28f2012-06-21 18:48:00 +0800756 return pmic->info[id]->voltage_table[selector];
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500757 default:
758 return -EINVAL;
759 }
760
761 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
762}
763
Graeme Gregory518fb722011-05-02 16:20:08 -0500764/* Regulator ops (except VRTC) */
765static struct regulator_ops tps65910_ops_dcdc = {
Axel Lina40a9c42012-04-17 14:34:46 +0800766 .is_enabled = regulator_is_enabled_regmap,
767 .enable = regulator_enable_regmap,
768 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500769 .set_mode = tps65910_set_mode,
770 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530771 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800772 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Axel Lin01bc3a12012-06-20 22:40:10 +0800773 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500774 .list_voltage = tps65910_list_voltage_dcdc,
Axel Lin9fa81752013-04-20 10:30:17 +0800775 .map_voltage = regulator_map_voltage_ascend,
Graeme Gregory518fb722011-05-02 16:20:08 -0500776};
777
778static struct regulator_ops tps65910_ops_vdd3 = {
Axel Lina40a9c42012-04-17 14:34:46 +0800779 .is_enabled = regulator_is_enabled_regmap,
780 .enable = regulator_enable_regmap,
781 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500782 .set_mode = tps65910_set_mode,
783 .get_mode = tps65910_get_mode,
784 .get_voltage = tps65910_get_voltage_vdd3,
Axel Lind9fe28f2012-06-21 18:48:00 +0800785 .list_voltage = regulator_list_voltage_table,
Axel Lin9fa81752013-04-20 10:30:17 +0800786 .map_voltage = regulator_map_voltage_ascend,
Graeme Gregory518fb722011-05-02 16:20:08 -0500787};
788
Markus Pargmann03746dc2013-12-20 12:43:27 +0100789static struct regulator_ops tps65910_ops_vbb = {
790 .is_enabled = regulator_is_enabled_regmap,
791 .enable = regulator_enable_regmap,
792 .disable = regulator_disable_regmap,
793 .set_mode = tps65910_set_mode,
794 .get_mode = tps65910_get_mode,
795 .get_voltage_sel = tps65910_get_voltage_sel,
796 .set_voltage_sel = tps65910_set_voltage_sel,
797 .list_voltage = regulator_list_voltage_table,
798 .map_voltage = regulator_map_voltage_iterate,
799};
800
Graeme Gregory518fb722011-05-02 16:20:08 -0500801static struct regulator_ops tps65910_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800802 .is_enabled = regulator_is_enabled_regmap,
803 .enable = regulator_enable_regmap,
804 .disable = regulator_disable_regmap,
Graeme Gregory518fb722011-05-02 16:20:08 -0500805 .set_mode = tps65910_set_mode,
806 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800807 .get_voltage_sel = tps65910_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800808 .set_voltage_sel = tps65910_set_voltage_sel,
Axel Lind9fe28f2012-06-21 18:48:00 +0800809 .list_voltage = regulator_list_voltage_table,
Axel Lin9fa81752013-04-20 10:30:17 +0800810 .map_voltage = regulator_map_voltage_ascend,
Graeme Gregory518fb722011-05-02 16:20:08 -0500811};
812
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500813static struct regulator_ops tps65911_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800814 .is_enabled = regulator_is_enabled_regmap,
815 .enable = regulator_enable_regmap,
816 .disable = regulator_disable_regmap,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500817 .set_mode = tps65910_set_mode,
818 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800819 .get_voltage_sel = tps65911_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800820 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500821 .list_voltage = tps65911_list_voltage,
Axel Lin9fa81752013-04-20 10:30:17 +0800822 .map_voltage = regulator_map_voltage_ascend,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500823};
824
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530825static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
826 int id, int ext_sleep_config)
827{
828 struct tps65910 *mfd = pmic->mfd;
829 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
830 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
831 int ret;
832
833 /*
834 * Regulator can not be control from multiple external input EN1, EN2
835 * and EN3 together.
836 */
837 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
838 int en_count;
839 en_count = ((ext_sleep_config &
840 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
841 en_count += ((ext_sleep_config &
842 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
843 en_count += ((ext_sleep_config &
844 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530845 en_count += ((ext_sleep_config &
846 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530847 if (en_count > 1) {
848 dev_err(mfd->dev,
849 "External sleep control flag is not proper\n");
850 return -EINVAL;
851 }
852 }
853
854 pmic->board_ext_control[id] = ext_sleep_config;
855
856 /* External EN1 control */
857 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700858 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530859 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
860 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700861 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530862 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
863 if (ret < 0) {
864 dev_err(mfd->dev,
865 "Error in configuring external control EN1\n");
866 return ret;
867 }
868
869 /* External EN2 control */
870 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700871 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530872 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
873 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700874 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530875 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
876 if (ret < 0) {
877 dev_err(mfd->dev,
878 "Error in configuring external control EN2\n");
879 return ret;
880 }
881
882 /* External EN3 control for TPS65910 LDO only */
883 if ((tps65910_chip_id(mfd) == TPS65910) &&
884 (id >= TPS65910_REG_VDIG1)) {
885 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700886 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530887 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
888 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700889 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530890 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
891 if (ret < 0) {
892 dev_err(mfd->dev,
893 "Error in configuring external control EN3\n");
894 return ret;
895 }
896 }
897
898 /* Return if no external control is selected */
899 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
900 /* Clear all sleep controls */
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700901 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530902 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
903 if (!ret)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700904 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530905 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
906 if (ret < 0)
907 dev_err(mfd->dev,
908 "Error in configuring SLEEP register\n");
909 return ret;
910 }
911
912 /*
913 * For regulator that has separate operational and sleep register make
914 * sure that operational is used and clear sleep register to turn
915 * regulator off when external control is inactive
916 */
917 if ((id == TPS65910_REG_VDD1) ||
918 (id == TPS65910_REG_VDD2) ||
919 ((id == TPS65911_REG_VDDCTRL) &&
920 (tps65910_chip_id(mfd) == TPS65911))) {
921 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
922 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
Axel Linfaa95fd2012-07-11 19:44:13 +0800923 int opvsel, srvsel;
924
925 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
926 if (ret < 0)
927 return ret;
928 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
929 if (ret < 0)
930 return ret;
931
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530932 if (opvsel & VDD1_OP_CMD_MASK) {
933 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
Axel Linfaa95fd2012-07-11 19:44:13 +0800934
935 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
936 reg_val);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530937 if (ret < 0) {
938 dev_err(mfd->dev,
939 "Error in configuring op register\n");
940 return ret;
941 }
942 }
Axel Linfaa95fd2012-07-11 19:44:13 +0800943 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530944 if (ret < 0) {
Masanari Iida6d3be302013-09-30 23:19:09 +0900945 dev_err(mfd->dev, "Error in setting sr register\n");
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530946 return ret;
947 }
948 }
949
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700950 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530951 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530952 if (!ret) {
953 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700954 ret = tps65910_reg_set_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530955 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
956 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700957 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530958 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
959 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530960 if (ret < 0)
961 dev_err(mfd->dev,
962 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530963
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530964 return ret;
965}
966
Rhyland Klein67901782012-05-08 11:42:41 -0700967#ifdef CONFIG_OF
968
969static struct of_regulator_match tps65910_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530970 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
971 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
972 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
973 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
974 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
975 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
976 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
977 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
978 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
979 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
980 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
981 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
982 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
Markus Pargmann03746dc2013-12-20 12:43:27 +0100983 { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
Rhyland Klein67901782012-05-08 11:42:41 -0700984};
985
986static struct of_regulator_match tps65911_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530987 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
988 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
989 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
990 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
991 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
992 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
993 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
994 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
995 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
996 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
997 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
998 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
999 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -07001000};
1001
1002static struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301003 struct platform_device *pdev,
1004 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001005{
1006 struct tps65910_board *pmic_plat_data;
1007 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Axel Linc92f5dd2013-01-27 21:16:56 +08001008 struct device_node *np, *regulators;
Rhyland Klein67901782012-05-08 11:42:41 -07001009 struct of_regulator_match *matches;
1010 unsigned int prop;
1011 int idx = 0, ret, count;
1012
1013 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1014 GFP_KERNEL);
Sachin Kamatbcb2c0d2014-02-20 14:23:18 +05301015 if (!pmic_plat_data)
Rhyland Klein67901782012-05-08 11:42:41 -07001016 return NULL;
Rhyland Klein67901782012-05-08 11:42:41 -07001017
Guodong Xub8b27a42014-09-10 11:50:39 +08001018 np = pdev->dev.parent->of_node;
Laxman Dewangan4ae1ff72013-10-08 19:31:04 +05301019 regulators = of_get_child_by_name(np, "regulators");
Laxman Dewangan92ab9532012-05-20 21:48:49 +05301020 if (!regulators) {
1021 dev_err(&pdev->dev, "regulator node not found\n");
1022 return NULL;
1023 }
Rhyland Klein67901782012-05-08 11:42:41 -07001024
1025 switch (tps65910_chip_id(tps65910)) {
1026 case TPS65910:
1027 count = ARRAY_SIZE(tps65910_matches);
1028 matches = tps65910_matches;
1029 break;
1030 case TPS65911:
1031 count = ARRAY_SIZE(tps65911_matches);
1032 matches = tps65911_matches;
1033 break;
1034 default:
Axel Linc92f5dd2013-01-27 21:16:56 +08001035 of_node_put(regulators);
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301036 dev_err(&pdev->dev, "Invalid tps chip version\n");
Rhyland Klein67901782012-05-08 11:42:41 -07001037 return NULL;
1038 }
1039
Axel Lin08337fd2013-01-24 10:31:45 +08001040 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
Axel Linc92f5dd2013-01-27 21:16:56 +08001041 of_node_put(regulators);
Rhyland Klein67901782012-05-08 11:42:41 -07001042 if (ret < 0) {
1043 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1044 ret);
1045 return NULL;
1046 }
1047
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301048 *tps65910_reg_matches = matches;
1049
Rhyland Klein67901782012-05-08 11:42:41 -07001050 for (idx = 0; idx < count; idx++) {
Axel Lin23b11342014-02-18 21:11:48 +08001051 if (!matches[idx].of_node)
Rhyland Klein67901782012-05-08 11:42:41 -07001052 continue;
1053
1054 pmic_plat_data->tps65910_pmic_init_data[idx] =
1055 matches[idx].init_data;
1056
1057 ret = of_property_read_u32(matches[idx].of_node,
1058 "ti,regulator-ext-sleep-control", &prop);
1059 if (!ret)
1060 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
Laxman Dewangan19228a62012-07-06 14:13:12 +05301061
Rhyland Klein67901782012-05-08 11:42:41 -07001062 }
1063
1064 return pmic_plat_data;
1065}
1066#else
1067static inline struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301068 struct platform_device *pdev,
1069 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001070{
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301071 *tps65910_reg_matches = NULL;
Mark Brown74ea0e52012-06-15 19:04:33 +01001072 return NULL;
Rhyland Klein67901782012-05-08 11:42:41 -07001073}
1074#endif
1075
Bill Pembertona5023572012-11-19 13:22:22 -05001076static int tps65910_probe(struct platform_device *pdev)
Graeme Gregory518fb722011-05-02 16:20:08 -05001077{
1078 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001079 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001080 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001081 struct regulator_dev *rdev;
1082 struct tps65910_reg *pmic;
1083 struct tps65910_board *pmic_plat_data;
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301084 struct of_regulator_match *tps65910_reg_matches = NULL;
Graeme Gregory518fb722011-05-02 16:20:08 -05001085 int i, err;
1086
1087 pmic_plat_data = dev_get_platdata(tps65910->dev);
Rhyland Klein67901782012-05-08 11:42:41 -07001088 if (!pmic_plat_data && tps65910->dev->of_node)
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301089 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1090 &tps65910_reg_matches);
Rhyland Klein67901782012-05-08 11:42:41 -07001091
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301092 if (!pmic_plat_data) {
1093 dev_err(&pdev->dev, "Platform data not found\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001094 return -EINVAL;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301095 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001096
Axel Lin9eb0c422012-04-11 14:40:18 +08001097 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Sachin Kamatbcb2c0d2014-02-20 14:23:18 +05301098 if (!pmic)
Graeme Gregory518fb722011-05-02 16:20:08 -05001099 return -ENOMEM;
1100
Graeme Gregory518fb722011-05-02 16:20:08 -05001101 pmic->mfd = tps65910;
1102 platform_set_drvdata(pdev, pmic);
1103
1104 /* Give control of all register to control port */
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001105 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
Graeme Gregory518fb722011-05-02 16:20:08 -05001106 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1107
Jingoo Han4b579272013-10-14 17:53:40 +09001108 switch (tps65910_chip_id(tps65910)) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001109 case TPS65910:
1110 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001111 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301112 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001113 info = tps65910_regs;
Jan Remmet8f9165c2016-09-23 10:52:00 +02001114 /* Work around silicon erratum SWCZ010: output programmed
1115 * voltage level can go higher than expected or crash
1116 * Workaround: use no synchronization of DCDC clocks
1117 */
1118 tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL,
1119 DCDCCTRL_DCDCCKSYNC_MASK);
Axel Lind04156b2011-07-10 21:44:09 +08001120 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001121 case TPS65911:
1122 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001123 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301124 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001125 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001126 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001127 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301128 dev_err(&pdev->dev, "Invalid tps chip version\n");
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001129 return -ENODEV;
1130 }
1131
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301132 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001133 sizeof(struct regulator_desc), GFP_KERNEL);
Sachin Kamatbcb2c0d2014-02-20 14:23:18 +05301134 if (!pmic->desc)
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301135 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001136
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301137 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001138 sizeof(struct tps_info *), GFP_KERNEL);
Sachin Kamatbcb2c0d2014-02-20 14:23:18 +05301139 if (!pmic->info)
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301140 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001141
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301142 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001143 sizeof(struct regulator_dev *), GFP_KERNEL);
Sachin Kamatbcb2c0d2014-02-20 14:23:18 +05301144 if (!pmic->rdev)
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301145 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001146
Kyle Mannac1fc1482011-11-03 12:08:06 -05001147 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1148 i++, info++) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001149 /* Register the regulators */
1150 pmic->info[i] = info;
1151
1152 pmic->desc[i].name = info->name;
Laxman Dewangand2cfdb02012-07-17 11:34:06 +05301153 pmic->desc[i].supply_name = info->vin_name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001154 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301155 pmic->desc[i].n_voltages = info->n_voltages;
Axel Lin94f48ab2012-07-04 09:59:17 +08001156 pmic->desc[i].enable_time = info->enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -05001157
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001158 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001159 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301160 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1161 VDD1_2_NUM_VOLT_COARSE;
Axel Lin01bc3a12012-06-20 22:40:10 +08001162 pmic->desc[i].ramp_delay = 12500;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001163 } else if (i == TPS65910_REG_VDD3) {
Axel Lin01bc3a12012-06-20 22:40:10 +08001164 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001165 pmic->desc[i].ops = &tps65910_ops_vdd3;
Axel Lind9fe28f2012-06-21 18:48:00 +08001166 pmic->desc[i].volt_table = info->voltage_table;
Axel Lin01bc3a12012-06-20 22:40:10 +08001167 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001168 pmic->desc[i].ops = &tps65910_ops_dcdc;
Axel Lin01bc3a12012-06-20 22:40:10 +08001169 pmic->desc[i].ramp_delay = 5000;
1170 }
Markus Pargmann03746dc2013-12-20 12:43:27 +01001171 } else if (i == TPS65910_REG_VBB &&
1172 tps65910_chip_id(tps65910) == TPS65910) {
1173 pmic->desc[i].ops = &tps65910_ops_vbb;
1174 pmic->desc[i].volt_table = info->voltage_table;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001175 } else {
Axel Lind9fe28f2012-06-21 18:48:00 +08001176 if (tps65910_chip_id(tps65910) == TPS65910) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001177 pmic->desc[i].ops = &tps65910_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001178 pmic->desc[i].volt_table = info->voltage_table;
1179 } else {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001180 pmic->desc[i].ops = &tps65911_ops;
Axel Lind9fe28f2012-06-21 18:48:00 +08001181 }
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001182 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001183
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301184 err = tps65910_set_ext_sleep_config(pmic, i,
1185 pmic_plat_data->regulator_ext_sleep_control[i]);
1186 /*
1187 * Failing on regulator for configuring externally control
1188 * is not a serious issue, just throw warning.
1189 */
1190 if (err < 0)
1191 dev_warn(tps65910->dev,
1192 "Failed to initialise ext control config\n");
1193
Graeme Gregory518fb722011-05-02 16:20:08 -05001194 pmic->desc[i].type = REGULATOR_VOLTAGE;
1195 pmic->desc[i].owner = THIS_MODULE;
Axel Lina40a9c42012-04-17 14:34:46 +08001196 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
Axel Linb8903eb2013-12-29 17:00:20 +08001197 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
Graeme Gregory518fb722011-05-02 16:20:08 -05001198
Mark Brownc1727082012-04-04 00:50:22 +01001199 config.dev = tps65910->dev;
Axel Lin23b11342014-02-18 21:11:48 +08001200 config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
Mark Brownc1727082012-04-04 00:50:22 +01001201 config.driver_data = pmic;
Axel Lina40a9c42012-04-17 14:34:46 +08001202 config.regmap = tps65910->regmap;
Mark Brownc1727082012-04-04 00:50:22 +01001203
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301204 if (tps65910_reg_matches)
1205 config.of_node = tps65910_reg_matches[i].of_node;
Rhyland Klein67901782012-05-08 11:42:41 -07001206
Sachin Kamat95095e42013-09-04 17:17:51 +05301207 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1208 &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001209 if (IS_ERR(rdev)) {
1210 dev_err(tps65910->dev,
1211 "failed to register %s regulator\n",
1212 pdev->name);
Sachin Kamat95095e42013-09-04 17:17:51 +05301213 return PTR_ERR(rdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001214 }
1215
1216 /* Save regulator for cleanup */
1217 pmic->rdev[i] = rdev;
1218 }
1219 return 0;
Graeme Gregory518fb722011-05-02 16:20:08 -05001220}
1221
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301222static void tps65910_shutdown(struct platform_device *pdev)
1223{
1224 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1225 int i;
1226
1227 /*
1228 * Before bootloader jumps to kernel, it makes sure that required
1229 * external control signals are in desired state so that given rails
1230 * can be configure accordingly.
1231 * If rails are configured to be controlled from external control
1232 * then before shutting down/rebooting the system, the external
1233 * control configuration need to be remove from the rails so that
1234 * its output will be available as per register programming even
1235 * if external controls are removed. This is require when the POR
1236 * value of the control signals are not in active state and before
1237 * bootloader initializes it, the system requires the rail output
1238 * to be active for booting.
1239 */
1240 for (i = 0; i < pmic->num_regulators; i++) {
1241 int err;
1242 if (!pmic->rdev[i])
1243 continue;
1244
1245 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1246 if (err < 0)
1247 dev_err(&pdev->dev,
1248 "Error in clearing external control\n");
1249 }
1250}
1251
Graeme Gregory518fb722011-05-02 16:20:08 -05001252static struct platform_driver tps65910_driver = {
1253 .driver = {
1254 .name = "tps65910-pmic",
Graeme Gregory518fb722011-05-02 16:20:08 -05001255 },
1256 .probe = tps65910_probe,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301257 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001258};
1259
1260static int __init tps65910_init(void)
1261{
1262 return platform_driver_register(&tps65910_driver);
1263}
1264subsys_initcall(tps65910_init);
1265
1266static void __exit tps65910_cleanup(void)
1267{
1268 platform_driver_unregister(&tps65910_driver);
1269}
1270module_exit(tps65910_cleanup);
1271
1272MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001273MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001274MODULE_LICENSE("GPL v2");
1275MODULE_ALIAS("platform:tps65910-pmic");