blob: 16349ba687367755abe33c5d439e48704e3fcdbb [file] [log] [blame]
Auke Kok9d5c8242008-01-24 02:22:38 -08001/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
Alexander Duyck86d5d382009-02-06 23:23:12 +00004 Copyright(c) 2007-2009 Intel Corporation.
Auke Kok9d5c8242008-01-24 02:22:38 -08005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/init.h>
31#include <linux/vmalloc.h>
32#include <linux/pagemap.h>
33#include <linux/netdevice.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080034#include <linux/ipv6.h>
35#include <net/checksum.h>
36#include <net/ip6_checksum.h>
Patrick Ohlyc6cb0902009-02-12 05:03:42 +000037#include <linux/net_tstamp.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080038#include <linux/mii.h>
39#include <linux/ethtool.h>
40#include <linux/if_vlan.h>
41#include <linux/pci.h>
Alexander Duyckc54106b2008-10-16 21:26:57 -070042#include <linux/pci-aspm.h>
Auke Kok9d5c8242008-01-24 02:22:38 -080043#include <linux/delay.h>
44#include <linux/interrupt.h>
45#include <linux/if_ether.h>
Alexander Duyck40a914f2008-11-27 00:24:37 -080046#include <linux/aer.h>
Jeff Kirsher421e02f2008-10-17 11:08:31 -070047#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -070048#include <linux/dca.h>
49#endif
Auke Kok9d5c8242008-01-24 02:22:38 -080050#include "igb.h"
51
Alexander Duyck55cac242009-11-19 12:42:21 +000052#define DRV_VERSION "2.1.0-k2"
Auke Kok9d5c8242008-01-24 02:22:38 -080053char igb_driver_name[] = "igb";
54char igb_driver_version[] = DRV_VERSION;
55static const char igb_driver_string[] =
56 "Intel(R) Gigabit Ethernet Network Driver";
Alexander Duyck86d5d382009-02-06 23:23:12 +000057static const char igb_copyright[] = "Copyright (c) 2007-2009 Intel Corporation.";
Auke Kok9d5c8242008-01-24 02:22:38 -080058
Auke Kok9d5c8242008-01-24 02:22:38 -080059static const struct e1000_info *igb_info_tbl[] = {
60 [board_82575] = &e1000_82575_info,
61};
62
63static struct pci_device_id igb_pci_tbl[] = {
Alexander Duyck55cac242009-11-19 12:42:21 +000064 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
Alexander Duyck2d064c02008-07-08 15:10:12 -070069 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
Alexander Duyck9eb23412009-03-13 20:42:15 +000070 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
Alexander Duyck747d49b2009-10-05 06:33:27 +000071 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
Alexander Duyck2d064c02008-07-08 15:10:12 -070072 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
73 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
Alexander Duyck4703bf72009-07-23 18:09:48 +000074 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
Alexander Duyckc8ea5ea2009-03-13 20:42:35 +000075 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
Auke Kok9d5c8242008-01-24 02:22:38 -080076 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
77 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
78 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
79 /* required last entry */
80 {0, }
81};
82
83MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
84
85void igb_reset(struct igb_adapter *);
86static int igb_setup_all_tx_resources(struct igb_adapter *);
87static int igb_setup_all_rx_resources(struct igb_adapter *);
88static void igb_free_all_tx_resources(struct igb_adapter *);
89static void igb_free_all_rx_resources(struct igb_adapter *);
Alexander Duyck06cf2662009-10-27 15:53:25 +000090static void igb_setup_mrqc(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -080091void igb_update_stats(struct igb_adapter *);
92static int igb_probe(struct pci_dev *, const struct pci_device_id *);
93static void __devexit igb_remove(struct pci_dev *pdev);
94static int igb_sw_init(struct igb_adapter *);
95static int igb_open(struct net_device *);
96static int igb_close(struct net_device *);
97static void igb_configure_tx(struct igb_adapter *);
98static void igb_configure_rx(struct igb_adapter *);
Auke Kok9d5c8242008-01-24 02:22:38 -080099static void igb_clean_all_tx_rings(struct igb_adapter *);
100static void igb_clean_all_rx_rings(struct igb_adapter *);
Mitch Williams3b644cf2008-06-27 10:59:48 -0700101static void igb_clean_tx_ring(struct igb_ring *);
102static void igb_clean_rx_ring(struct igb_ring *);
Alexander Duyckff41f8d2009-09-03 14:48:56 +0000103static void igb_set_rx_mode(struct net_device *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800104static void igb_update_phy_info(unsigned long);
105static void igb_watchdog(unsigned long);
106static void igb_watchdog_task(struct work_struct *);
Alexander Duyckb1a436c2009-10-27 15:54:43 +0000107static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
Auke Kok9d5c8242008-01-24 02:22:38 -0800108static struct net_device_stats *igb_get_stats(struct net_device *);
109static int igb_change_mtu(struct net_device *, int);
110static int igb_set_mac(struct net_device *, void *);
Alexander Duyck68d480c2009-10-05 06:33:08 +0000111static void igb_set_uta(struct igb_adapter *adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800112static irqreturn_t igb_intr(int irq, void *);
113static irqreturn_t igb_intr_msi(int irq, void *);
114static irqreturn_t igb_msix_other(int irq, void *);
Alexander Duyck047e0032009-10-27 15:49:27 +0000115static irqreturn_t igb_msix_ring(int irq, void *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700116#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +0000117static void igb_update_dca(struct igb_q_vector *);
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700118static void igb_setup_dca(struct igb_adapter *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700119#endif /* CONFIG_IGB_DCA */
Alexander Duyck047e0032009-10-27 15:49:27 +0000120static bool igb_clean_tx_irq(struct igb_q_vector *);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700121static int igb_poll(struct napi_struct *, int);
Alexander Duyck047e0032009-10-27 15:49:27 +0000122static bool igb_clean_rx_irq_adv(struct igb_q_vector *, int *, int);
Auke Kok9d5c8242008-01-24 02:22:38 -0800123static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
124static void igb_tx_timeout(struct net_device *);
125static void igb_reset_task(struct work_struct *);
126static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
127static void igb_vlan_rx_add_vid(struct net_device *, u16);
128static void igb_vlan_rx_kill_vid(struct net_device *, u16);
129static void igb_restore_vlan(struct igb_adapter *);
Alexander Duyck26ad9172009-10-05 06:32:49 +0000130static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800131static void igb_ping_all_vfs(struct igb_adapter *);
132static void igb_msg_task(struct igb_adapter *);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800133static void igb_vmm_control(struct igb_adapter *);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +0000134static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
Alexander Duyck4ae196d2009-02-19 20:40:07 -0800135static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800136
Auke Kok9d5c8242008-01-24 02:22:38 -0800137#ifdef CONFIG_PM
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +0000138static int igb_suspend(struct pci_dev *, pm_message_t);
Auke Kok9d5c8242008-01-24 02:22:38 -0800139static int igb_resume(struct pci_dev *);
140#endif
141static void igb_shutdown(struct pci_dev *);
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700142#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700143static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
144static struct notifier_block dca_notifier = {
145 .notifier_call = igb_notify_dca,
146 .next = NULL,
147 .priority = 0
148};
149#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800150#ifdef CONFIG_NET_POLL_CONTROLLER
151/* for netdump / net console */
152static void igb_netpoll(struct net_device *);
153#endif
Alexander Duyck37680112009-02-19 20:40:30 -0800154#ifdef CONFIG_PCI_IOV
Alexander Duyck2a3abf62009-04-07 14:37:52 +0000155static unsigned int max_vfs = 0;
156module_param(max_vfs, uint, 0);
157MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
158 "per physical function");
159#endif /* CONFIG_PCI_IOV */
160
Auke Kok9d5c8242008-01-24 02:22:38 -0800161static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
162 pci_channel_state_t);
163static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
164static void igb_io_resume(struct pci_dev *);
165
166static struct pci_error_handlers igb_err_handler = {
167 .error_detected = igb_io_error_detected,
168 .slot_reset = igb_io_slot_reset,
169 .resume = igb_io_resume,
170};
171
172
173static struct pci_driver igb_driver = {
174 .name = igb_driver_name,
175 .id_table = igb_pci_tbl,
176 .probe = igb_probe,
177 .remove = __devexit_p(igb_remove),
178#ifdef CONFIG_PM
179 /* Power Managment Hooks */
180 .suspend = igb_suspend,
181 .resume = igb_resume,
182#endif
183 .shutdown = igb_shutdown,
184 .err_handler = &igb_err_handler
185};
186
187MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
188MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
189MODULE_LICENSE("GPL");
190MODULE_VERSION(DRV_VERSION);
191
Patrick Ohly38c845c2009-02-12 05:03:41 +0000192/**
Patrick Ohly38c845c2009-02-12 05:03:41 +0000193 * igb_read_clock - read raw cycle counter (to be used by time counter)
194 */
195static cycle_t igb_read_clock(const struct cyclecounter *tc)
196{
197 struct igb_adapter *adapter =
198 container_of(tc, struct igb_adapter, cycles);
199 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +0000200 u64 stamp = 0;
201 int shift = 0;
Patrick Ohly38c845c2009-02-12 05:03:41 +0000202
Alexander Duyck55cac242009-11-19 12:42:21 +0000203 /*
204 * The timestamp latches on lowest register read. For the 82580
205 * the lowest register is SYSTIMR instead of SYSTIML. However we never
206 * adjusted TIMINCA so SYSTIMR will just read as all 0s so ignore it.
207 */
208 if (hw->mac.type == e1000_82580) {
209 stamp = rd32(E1000_SYSTIMR) >> 8;
210 shift = IGB_82580_TSYNC_SHIFT;
211 }
212
Alexander Duyckc5b9bd52009-10-27 23:46:01 +0000213 stamp |= (u64)rd32(E1000_SYSTIML) << shift;
214 stamp |= (u64)rd32(E1000_SYSTIMH) << (shift + 32);
Patrick Ohly38c845c2009-02-12 05:03:41 +0000215 return stamp;
216}
217
Auke Kok9d5c8242008-01-24 02:22:38 -0800218#ifdef DEBUG
219/**
220 * igb_get_hw_dev_name - return device name string
221 * used by hardware layer to print debugging information
222 **/
223char *igb_get_hw_dev_name(struct e1000_hw *hw)
224{
225 struct igb_adapter *adapter = hw->back;
226 return adapter->netdev->name;
227}
Patrick Ohly38c845c2009-02-12 05:03:41 +0000228
229/**
230 * igb_get_time_str - format current NIC and system time as string
231 */
232static char *igb_get_time_str(struct igb_adapter *adapter,
233 char buffer[160])
234{
235 cycle_t hw = adapter->cycles.read(&adapter->cycles);
236 struct timespec nic = ns_to_timespec(timecounter_read(&adapter->clock));
237 struct timespec sys;
238 struct timespec delta;
239 getnstimeofday(&sys);
240
241 delta = timespec_sub(nic, sys);
242
243 sprintf(buffer,
Patrick Ohly33af6bc2009-02-12 05:03:43 +0000244 "HW %llu, NIC %ld.%09lus, SYS %ld.%09lus, NIC-SYS %lds + %09luns",
245 hw,
Patrick Ohly38c845c2009-02-12 05:03:41 +0000246 (long)nic.tv_sec, nic.tv_nsec,
247 (long)sys.tv_sec, sys.tv_nsec,
248 (long)delta.tv_sec, delta.tv_nsec);
249
250 return buffer;
251}
Auke Kok9d5c8242008-01-24 02:22:38 -0800252#endif
253
254/**
255 * igb_init_module - Driver Registration Routine
256 *
257 * igb_init_module is the first routine called when the driver is
258 * loaded. All it does is register with the PCI subsystem.
259 **/
260static int __init igb_init_module(void)
261{
262 int ret;
263 printk(KERN_INFO "%s - version %s\n",
264 igb_driver_string, igb_driver_version);
265
266 printk(KERN_INFO "%s\n", igb_copyright);
267
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700268#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700269 dca_register_notify(&dca_notifier);
270#endif
Alexander Duyckbbd98fe2009-01-31 00:52:30 -0800271 ret = pci_register_driver(&igb_driver);
Auke Kok9d5c8242008-01-24 02:22:38 -0800272 return ret;
273}
274
275module_init(igb_init_module);
276
277/**
278 * igb_exit_module - Driver Exit Cleanup Routine
279 *
280 * igb_exit_module is called just before the driver is removed
281 * from memory.
282 **/
283static void __exit igb_exit_module(void)
284{
Jeff Kirsher421e02f2008-10-17 11:08:31 -0700285#ifdef CONFIG_IGB_DCA
Jeb Cramerfe4506b2008-07-08 15:07:55 -0700286 dca_unregister_notify(&dca_notifier);
287#endif
Auke Kok9d5c8242008-01-24 02:22:38 -0800288 pci_unregister_driver(&igb_driver);
289}
290
291module_exit(igb_exit_module);
292
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800293#define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
294/**
295 * igb_cache_ring_register - Descriptor ring to register mapping
296 * @adapter: board private structure to initialize
297 *
298 * Once we know the feature-set enabled for the device, we'll cache
299 * the register offset the descriptor ring is assigned to.
300 **/
301static void igb_cache_ring_register(struct igb_adapter *adapter)
302{
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000303 int i = 0, j = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +0000304 u32 rbase_offset = adapter->vfs_allocated_count;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800305
306 switch (adapter->hw.mac.type) {
307 case e1000_82576:
308 /* The queues are allocated for virtualization such that VF 0
309 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
310 * In order to avoid collision we start at the first free queue
311 * and continue consuming queues in the same sequence
312 */
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000313 if (adapter->vfs_allocated_count) {
Alexander Duycka99955f2009-11-12 18:37:19 +0000314 for (; i < adapter->rss_queues; i++)
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000315 adapter->rx_ring[i].reg_idx = rbase_offset +
316 Q_IDX_82576(i);
Alexander Duycka99955f2009-11-12 18:37:19 +0000317 for (; j < adapter->rss_queues; j++)
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000318 adapter->tx_ring[j].reg_idx = rbase_offset +
319 Q_IDX_82576(j);
320 }
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800321 case e1000_82575:
Alexander Duyck55cac242009-11-19 12:42:21 +0000322 case e1000_82580:
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800323 default:
Alexander Duyckee1b9f02009-10-27 23:49:40 +0000324 for (; i < adapter->num_rx_queues; i++)
325 adapter->rx_ring[i].reg_idx = rbase_offset + i;
326 for (; j < adapter->num_tx_queues; j++)
327 adapter->tx_ring[j].reg_idx = rbase_offset + j;
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800328 break;
329 }
330}
331
Alexander Duyck047e0032009-10-27 15:49:27 +0000332static void igb_free_queues(struct igb_adapter *adapter)
333{
334 kfree(adapter->tx_ring);
335 kfree(adapter->rx_ring);
336
337 adapter->tx_ring = NULL;
338 adapter->rx_ring = NULL;
339
340 adapter->num_rx_queues = 0;
341 adapter->num_tx_queues = 0;
342}
343
Auke Kok9d5c8242008-01-24 02:22:38 -0800344/**
345 * igb_alloc_queues - Allocate memory for all rings
346 * @adapter: board private structure to initialize
347 *
348 * We allocate one ring per queue at run-time since we don't know the
349 * number of queues at compile-time.
350 **/
351static int igb_alloc_queues(struct igb_adapter *adapter)
352{
353 int i;
354
355 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
356 sizeof(struct igb_ring), GFP_KERNEL);
357 if (!adapter->tx_ring)
Alexander Duyck047e0032009-10-27 15:49:27 +0000358 goto err;
Auke Kok9d5c8242008-01-24 02:22:38 -0800359
360 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
361 sizeof(struct igb_ring), GFP_KERNEL);
Alexander Duyck047e0032009-10-27 15:49:27 +0000362 if (!adapter->rx_ring)
363 goto err;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -0700364
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700365 for (i = 0; i < adapter->num_tx_queues; i++) {
366 struct igb_ring *ring = &(adapter->tx_ring[i]);
Alexander Duyck68fd9912008-11-20 00:48:10 -0800367 ring->count = adapter->tx_ring_count;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700368 ring->queue_index = i;
Alexander Duyck80785292009-10-27 15:51:47 +0000369 ring->pdev = adapter->pdev;
Alexander Duycke694e962009-10-27 15:53:06 +0000370 ring->netdev = adapter->netdev;
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000371 /* For 82575, context index must be unique per ring. */
372 if (adapter->hw.mac.type == e1000_82575)
373 ring->flags = IGB_RING_FLAG_TX_CTX_IDX;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700374 }
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000375
Auke Kok9d5c8242008-01-24 02:22:38 -0800376 for (i = 0; i < adapter->num_rx_queues; i++) {
377 struct igb_ring *ring = &(adapter->rx_ring[i]);
Alexander Duyck68fd9912008-11-20 00:48:10 -0800378 ring->count = adapter->rx_ring_count;
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700379 ring->queue_index = i;
Alexander Duyck80785292009-10-27 15:51:47 +0000380 ring->pdev = adapter->pdev;
Alexander Duycke694e962009-10-27 15:53:06 +0000381 ring->netdev = adapter->netdev;
Alexander Duyck4c844852009-10-27 15:52:07 +0000382 ring->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Alexander Duyck85ad76b2009-10-27 15:52:46 +0000383 ring->flags = IGB_RING_FLAG_RX_CSUM; /* enable rx checksum */
384 /* set flag indicating ring supports SCTP checksum offload */
385 if (adapter->hw.mac.type >= e1000_82576)
386 ring->flags |= IGB_RING_FLAG_RX_SCTP_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -0800387 }
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800388
389 igb_cache_ring_register(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +0000390
Auke Kok9d5c8242008-01-24 02:22:38 -0800391 return 0;
Auke Kok9d5c8242008-01-24 02:22:38 -0800392
Alexander Duyck047e0032009-10-27 15:49:27 +0000393err:
394 igb_free_queues(adapter);
Alexander Duycka88f10e2008-07-08 15:13:38 -0700395
Alexander Duyck047e0032009-10-27 15:49:27 +0000396 return -ENOMEM;
Alexander Duycka88f10e2008-07-08 15:13:38 -0700397}
398
Auke Kok9d5c8242008-01-24 02:22:38 -0800399#define IGB_N0_QUEUE -1
Alexander Duyck047e0032009-10-27 15:49:27 +0000400static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -0800401{
402 u32 msixbm = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +0000403 struct igb_adapter *adapter = q_vector->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -0800404 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700405 u32 ivar, index;
Alexander Duyck047e0032009-10-27 15:49:27 +0000406 int rx_queue = IGB_N0_QUEUE;
407 int tx_queue = IGB_N0_QUEUE;
408
409 if (q_vector->rx_ring)
410 rx_queue = q_vector->rx_ring->reg_idx;
411 if (q_vector->tx_ring)
412 tx_queue = q_vector->tx_ring->reg_idx;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700413
414 switch (hw->mac.type) {
415 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800416 /* The 82575 assigns vectors using a bitmask, which matches the
417 bitmask for the EICR/EIMS/EIMC registers. To assign one
418 or more queues to a vector, we write the appropriate bits
419 into the MSIXBM register for that vector. */
Alexander Duyck047e0032009-10-27 15:49:27 +0000420 if (rx_queue > IGB_N0_QUEUE)
Auke Kok9d5c8242008-01-24 02:22:38 -0800421 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
Alexander Duyck047e0032009-10-27 15:49:27 +0000422 if (tx_queue > IGB_N0_QUEUE)
Auke Kok9d5c8242008-01-24 02:22:38 -0800423 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
Auke Kok9d5c8242008-01-24 02:22:38 -0800424 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
Alexander Duyck047e0032009-10-27 15:49:27 +0000425 q_vector->eims_value = msixbm;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700426 break;
427 case e1000_82576:
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800428 /* 82576 uses a table-based method for assigning vectors.
Alexander Duyck2d064c02008-07-08 15:10:12 -0700429 Each queue has a single entry in the table to which we write
430 a vector number along with a "valid" bit. Sadly, the layout
431 of the table is somewhat counterintuitive. */
432 if (rx_queue > IGB_N0_QUEUE) {
Alexander Duyck047e0032009-10-27 15:49:27 +0000433 index = (rx_queue & 0x7);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700434 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck047e0032009-10-27 15:49:27 +0000435 if (rx_queue < 8) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800436 /* vector goes into low byte of register */
437 ivar = ivar & 0xFFFFFF00;
438 ivar |= msix_vector | E1000_IVAR_VALID;
Alexander Duyck047e0032009-10-27 15:49:27 +0000439 } else {
440 /* vector goes into third byte of register */
441 ivar = ivar & 0xFF00FFFF;
442 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700443 }
Alexander Duyck2d064c02008-07-08 15:10:12 -0700444 array_wr32(E1000_IVAR0, index, ivar);
445 }
446 if (tx_queue > IGB_N0_QUEUE) {
Alexander Duyck047e0032009-10-27 15:49:27 +0000447 index = (tx_queue & 0x7);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700448 ivar = array_rd32(E1000_IVAR0, index);
Alexander Duyck047e0032009-10-27 15:49:27 +0000449 if (tx_queue < 8) {
Alexander Duyck26bc19e2008-12-26 01:34:11 -0800450 /* vector goes into second byte of register */
451 ivar = ivar & 0xFFFF00FF;
452 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
Alexander Duyck047e0032009-10-27 15:49:27 +0000453 } else {
454 /* vector goes into high byte of register */
455 ivar = ivar & 0x00FFFFFF;
456 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700457 }
Alexander Duyck2d064c02008-07-08 15:10:12 -0700458 array_wr32(E1000_IVAR0, index, ivar);
459 }
Alexander Duyck047e0032009-10-27 15:49:27 +0000460 q_vector->eims_value = 1 << msix_vector;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700461 break;
Alexander Duyck55cac242009-11-19 12:42:21 +0000462 case e1000_82580:
463 /* 82580 uses the same table-based approach as 82576 but has fewer
464 entries as a result we carry over for queues greater than 4. */
465 if (rx_queue > IGB_N0_QUEUE) {
466 index = (rx_queue >> 1);
467 ivar = array_rd32(E1000_IVAR0, index);
468 if (rx_queue & 0x1) {
469 /* vector goes into third byte of register */
470 ivar = ivar & 0xFF00FFFF;
471 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
472 } else {
473 /* vector goes into low byte of register */
474 ivar = ivar & 0xFFFFFF00;
475 ivar |= msix_vector | E1000_IVAR_VALID;
476 }
477 array_wr32(E1000_IVAR0, index, ivar);
478 }
479 if (tx_queue > IGB_N0_QUEUE) {
480 index = (tx_queue >> 1);
481 ivar = array_rd32(E1000_IVAR0, index);
482 if (tx_queue & 0x1) {
483 /* vector goes into high byte of register */
484 ivar = ivar & 0x00FFFFFF;
485 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
486 } else {
487 /* vector goes into second byte of register */
488 ivar = ivar & 0xFFFF00FF;
489 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
490 }
491 array_wr32(E1000_IVAR0, index, ivar);
492 }
493 q_vector->eims_value = 1 << msix_vector;
494 break;
Alexander Duyck2d064c02008-07-08 15:10:12 -0700495 default:
496 BUG();
497 break;
498 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800499}
500
501/**
502 * igb_configure_msix - Configure MSI-X hardware
503 *
504 * igb_configure_msix sets up the hardware to properly
505 * generate MSI-X interrupts.
506 **/
507static void igb_configure_msix(struct igb_adapter *adapter)
508{
509 u32 tmp;
510 int i, vector = 0;
511 struct e1000_hw *hw = &adapter->hw;
512
513 adapter->eims_enable_mask = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -0800514
515 /* set vector for other causes, i.e. link changes */
Alexander Duyck2d064c02008-07-08 15:10:12 -0700516 switch (hw->mac.type) {
517 case e1000_82575:
Auke Kok9d5c8242008-01-24 02:22:38 -0800518 tmp = rd32(E1000_CTRL_EXT);
519 /* enable MSI-X PBA support*/
520 tmp |= E1000_CTRL_EXT_PBA_CLR;
521
522 /* Auto-Mask interrupts upon ICR read. */
523 tmp |= E1000_CTRL_EXT_EIAME;
524 tmp |= E1000_CTRL_EXT_IRCA;
525
526 wr32(E1000_CTRL_EXT, tmp);
Alexander Duyck047e0032009-10-27 15:49:27 +0000527
528 /* enable msix_other interrupt */
529 array_wr32(E1000_MSIXBM(0), vector++,
530 E1000_EIMS_OTHER);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700531 adapter->eims_other = E1000_EIMS_OTHER;
Auke Kok9d5c8242008-01-24 02:22:38 -0800532
Alexander Duyck2d064c02008-07-08 15:10:12 -0700533 break;
534
535 case e1000_82576:
Alexander Duyck55cac242009-11-19 12:42:21 +0000536 case e1000_82580:
Alexander Duyck047e0032009-10-27 15:49:27 +0000537 /* Turn on MSI-X capability first, or our settings
538 * won't stick. And it will take days to debug. */
539 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
540 E1000_GPIE_PBA | E1000_GPIE_EIAME |
541 E1000_GPIE_NSICR);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700542
Alexander Duyck047e0032009-10-27 15:49:27 +0000543 /* enable msix_other interrupt */
544 adapter->eims_other = 1 << vector;
545 tmp = (vector++ | E1000_IVAR_VALID) << 8;
546
547 wr32(E1000_IVAR_MISC, tmp);
Alexander Duyck2d064c02008-07-08 15:10:12 -0700548 break;
549 default:
550 /* do nothing, since nothing else supports MSI-X */
551 break;
552 } /* switch (hw->mac.type) */
Alexander Duyck047e0032009-10-27 15:49:27 +0000553
554 adapter->eims_enable_mask |= adapter->eims_other;
555
556 for (i = 0; i < adapter->num_q_vectors; i++) {
557 struct igb_q_vector *q_vector = adapter->q_vector[i];
558 igb_assign_vector(q_vector, vector++);
559 adapter->eims_enable_mask |= q_vector->eims_value;
560 }
561
Auke Kok9d5c8242008-01-24 02:22:38 -0800562 wrfl();
563}
564
565/**
566 * igb_request_msix - Initialize MSI-X interrupts
567 *
568 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
569 * kernel.
570 **/
571static int igb_request_msix(struct igb_adapter *adapter)
572{
573 struct net_device *netdev = adapter->netdev;
Alexander Duyck047e0032009-10-27 15:49:27 +0000574 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -0800575 int i, err = 0, vector = 0;
576
Auke Kok9d5c8242008-01-24 02:22:38 -0800577 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -0800578 igb_msix_other, 0, netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800579 if (err)
580 goto out;
Alexander Duyck047e0032009-10-27 15:49:27 +0000581 vector++;
582
583 for (i = 0; i < adapter->num_q_vectors; i++) {
584 struct igb_q_vector *q_vector = adapter->q_vector[i];
585
586 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
587
588 if (q_vector->rx_ring && q_vector->tx_ring)
589 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
590 q_vector->rx_ring->queue_index);
591 else if (q_vector->tx_ring)
592 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
593 q_vector->tx_ring->queue_index);
594 else if (q_vector->rx_ring)
595 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
596 q_vector->rx_ring->queue_index);
597 else
598 sprintf(q_vector->name, "%s-unused", netdev->name);
599
600 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -0800601 igb_msix_ring, 0, q_vector->name,
Alexander Duyck047e0032009-10-27 15:49:27 +0000602 q_vector);
603 if (err)
604 goto out;
605 vector++;
606 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800607
Auke Kok9d5c8242008-01-24 02:22:38 -0800608 igb_configure_msix(adapter);
609 return 0;
610out:
611 return err;
612}
613
614static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
615{
616 if (adapter->msix_entries) {
617 pci_disable_msix(adapter->pdev);
618 kfree(adapter->msix_entries);
619 adapter->msix_entries = NULL;
Alexander Duyck047e0032009-10-27 15:49:27 +0000620 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
Auke Kok9d5c8242008-01-24 02:22:38 -0800621 pci_disable_msi(adapter->pdev);
Alexander Duyck047e0032009-10-27 15:49:27 +0000622 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800623}
624
Alexander Duyck047e0032009-10-27 15:49:27 +0000625/**
626 * igb_free_q_vectors - Free memory allocated for interrupt vectors
627 * @adapter: board private structure to initialize
628 *
629 * This function frees the memory allocated to the q_vectors. In addition if
630 * NAPI is enabled it will delete any references to the NAPI struct prior
631 * to freeing the q_vector.
632 **/
633static void igb_free_q_vectors(struct igb_adapter *adapter)
634{
635 int v_idx;
636
637 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
638 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
639 adapter->q_vector[v_idx] = NULL;
640 netif_napi_del(&q_vector->napi);
641 kfree(q_vector);
642 }
643 adapter->num_q_vectors = 0;
644}
645
646/**
647 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
648 *
649 * This function resets the device so that it has 0 rx queues, tx queues, and
650 * MSI-X interrupts allocated.
651 */
652static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
653{
654 igb_free_queues(adapter);
655 igb_free_q_vectors(adapter);
656 igb_reset_interrupt_capability(adapter);
657}
Auke Kok9d5c8242008-01-24 02:22:38 -0800658
659/**
660 * igb_set_interrupt_capability - set MSI or MSI-X if supported
661 *
662 * Attempt to configure interrupts using the best available
663 * capabilities of the hardware and kernel.
664 **/
665static void igb_set_interrupt_capability(struct igb_adapter *adapter)
666{
667 int err;
668 int numvecs, i;
669
Alexander Duyck83b71802009-02-06 23:15:45 +0000670 /* Number of supported queues. */
Alexander Duycka99955f2009-11-12 18:37:19 +0000671 adapter->num_rx_queues = adapter->rss_queues;
672 adapter->num_tx_queues = adapter->rss_queues;
Alexander Duyck83b71802009-02-06 23:15:45 +0000673
Alexander Duyck047e0032009-10-27 15:49:27 +0000674 /* start with one vector for every rx queue */
675 numvecs = adapter->num_rx_queues;
676
677 /* if tx handler is seperate add 1 for every tx queue */
Alexander Duycka99955f2009-11-12 18:37:19 +0000678 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
679 numvecs += adapter->num_tx_queues;
Alexander Duyck047e0032009-10-27 15:49:27 +0000680
681 /* store the number of vectors reserved for queues */
682 adapter->num_q_vectors = numvecs;
683
684 /* add 1 vector for link status interrupts */
685 numvecs++;
Auke Kok9d5c8242008-01-24 02:22:38 -0800686 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
687 GFP_KERNEL);
688 if (!adapter->msix_entries)
689 goto msi_only;
690
691 for (i = 0; i < numvecs; i++)
692 adapter->msix_entries[i].entry = i;
693
694 err = pci_enable_msix(adapter->pdev,
695 adapter->msix_entries,
696 numvecs);
697 if (err == 0)
Alexander Duyck34a20e82008-08-26 04:25:13 -0700698 goto out;
Auke Kok9d5c8242008-01-24 02:22:38 -0800699
700 igb_reset_interrupt_capability(adapter);
701
702 /* If we can't do MSI-X, try MSI */
703msi_only:
Alexander Duyck2a3abf62009-04-07 14:37:52 +0000704#ifdef CONFIG_PCI_IOV
705 /* disable SR-IOV for non MSI-X configurations */
706 if (adapter->vf_data) {
707 struct e1000_hw *hw = &adapter->hw;
708 /* disable iov and allow time for transactions to clear */
709 pci_disable_sriov(adapter->pdev);
710 msleep(500);
711
712 kfree(adapter->vf_data);
713 adapter->vf_data = NULL;
714 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
715 msleep(100);
716 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
717 }
718#endif
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000719 adapter->vfs_allocated_count = 0;
Alexander Duycka99955f2009-11-12 18:37:19 +0000720 adapter->rss_queues = 1;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000721 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
Auke Kok9d5c8242008-01-24 02:22:38 -0800722 adapter->num_rx_queues = 1;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700723 adapter->num_tx_queues = 1;
Alexander Duyck047e0032009-10-27 15:49:27 +0000724 adapter->num_q_vectors = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -0800725 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700726 adapter->flags |= IGB_FLAG_HAS_MSI;
Alexander Duyck34a20e82008-08-26 04:25:13 -0700727out:
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -0700728 /* Notify the stack of the (possibly) reduced Tx Queue count. */
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700729 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
Auke Kok9d5c8242008-01-24 02:22:38 -0800730 return;
731}
732
733/**
Alexander Duyck047e0032009-10-27 15:49:27 +0000734 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
735 * @adapter: board private structure to initialize
736 *
737 * We allocate one q_vector per queue interrupt. If allocation fails we
738 * return -ENOMEM.
739 **/
740static int igb_alloc_q_vectors(struct igb_adapter *adapter)
741{
742 struct igb_q_vector *q_vector;
743 struct e1000_hw *hw = &adapter->hw;
744 int v_idx;
745
746 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
747 q_vector = kzalloc(sizeof(struct igb_q_vector), GFP_KERNEL);
748 if (!q_vector)
749 goto err_out;
750 q_vector->adapter = adapter;
751 q_vector->itr_shift = (hw->mac.type == e1000_82575) ? 16 : 0;
752 q_vector->itr_register = hw->hw_addr + E1000_EITR(0);
753 q_vector->itr_val = IGB_START_ITR;
754 q_vector->set_itr = 1;
755 netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll, 64);
756 adapter->q_vector[v_idx] = q_vector;
757 }
758 return 0;
759
760err_out:
761 while (v_idx) {
762 v_idx--;
763 q_vector = adapter->q_vector[v_idx];
764 netif_napi_del(&q_vector->napi);
765 kfree(q_vector);
766 adapter->q_vector[v_idx] = NULL;
767 }
768 return -ENOMEM;
769}
770
771static void igb_map_rx_ring_to_vector(struct igb_adapter *adapter,
772 int ring_idx, int v_idx)
773{
774 struct igb_q_vector *q_vector;
775
776 q_vector = adapter->q_vector[v_idx];
777 q_vector->rx_ring = &adapter->rx_ring[ring_idx];
778 q_vector->rx_ring->q_vector = q_vector;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000779 q_vector->itr_val = adapter->rx_itr_setting;
780 if (q_vector->itr_val && q_vector->itr_val <= 3)
781 q_vector->itr_val = IGB_START_ITR;
Alexander Duyck047e0032009-10-27 15:49:27 +0000782}
783
784static void igb_map_tx_ring_to_vector(struct igb_adapter *adapter,
785 int ring_idx, int v_idx)
786{
787 struct igb_q_vector *q_vector;
788
789 q_vector = adapter->q_vector[v_idx];
790 q_vector->tx_ring = &adapter->tx_ring[ring_idx];
791 q_vector->tx_ring->q_vector = q_vector;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +0000792 q_vector->itr_val = adapter->tx_itr_setting;
793 if (q_vector->itr_val && q_vector->itr_val <= 3)
794 q_vector->itr_val = IGB_START_ITR;
Alexander Duyck047e0032009-10-27 15:49:27 +0000795}
796
797/**
798 * igb_map_ring_to_vector - maps allocated queues to vectors
799 *
800 * This function maps the recently allocated queues to vectors.
801 **/
802static int igb_map_ring_to_vector(struct igb_adapter *adapter)
803{
804 int i;
805 int v_idx = 0;
806
807 if ((adapter->num_q_vectors < adapter->num_rx_queues) ||
808 (adapter->num_q_vectors < adapter->num_tx_queues))
809 return -ENOMEM;
810
811 if (adapter->num_q_vectors >=
812 (adapter->num_rx_queues + adapter->num_tx_queues)) {
813 for (i = 0; i < adapter->num_rx_queues; i++)
814 igb_map_rx_ring_to_vector(adapter, i, v_idx++);
815 for (i = 0; i < adapter->num_tx_queues; i++)
816 igb_map_tx_ring_to_vector(adapter, i, v_idx++);
817 } else {
818 for (i = 0; i < adapter->num_rx_queues; i++) {
819 if (i < adapter->num_tx_queues)
820 igb_map_tx_ring_to_vector(adapter, i, v_idx);
821 igb_map_rx_ring_to_vector(adapter, i, v_idx++);
822 }
823 for (; i < adapter->num_tx_queues; i++)
824 igb_map_tx_ring_to_vector(adapter, i, v_idx++);
825 }
826 return 0;
827}
828
829/**
830 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
831 *
832 * This function initializes the interrupts and allocates all of the queues.
833 **/
834static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
835{
836 struct pci_dev *pdev = adapter->pdev;
837 int err;
838
839 igb_set_interrupt_capability(adapter);
840
841 err = igb_alloc_q_vectors(adapter);
842 if (err) {
843 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
844 goto err_alloc_q_vectors;
845 }
846
847 err = igb_alloc_queues(adapter);
848 if (err) {
849 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
850 goto err_alloc_queues;
851 }
852
853 err = igb_map_ring_to_vector(adapter);
854 if (err) {
855 dev_err(&pdev->dev, "Invalid q_vector to ring mapping\n");
856 goto err_map_queues;
857 }
858
859
860 return 0;
861err_map_queues:
862 igb_free_queues(adapter);
863err_alloc_queues:
864 igb_free_q_vectors(adapter);
865err_alloc_q_vectors:
866 igb_reset_interrupt_capability(adapter);
867 return err;
868}
869
870/**
Auke Kok9d5c8242008-01-24 02:22:38 -0800871 * igb_request_irq - initialize interrupts
872 *
873 * Attempts to configure interrupts using the best available
874 * capabilities of the hardware and kernel.
875 **/
876static int igb_request_irq(struct igb_adapter *adapter)
877{
878 struct net_device *netdev = adapter->netdev;
Alexander Duyck047e0032009-10-27 15:49:27 +0000879 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -0800880 struct e1000_hw *hw = &adapter->hw;
881 int err = 0;
882
883 if (adapter->msix_entries) {
884 err = igb_request_msix(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700885 if (!err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800886 goto request_done;
Auke Kok9d5c8242008-01-24 02:22:38 -0800887 /* fall back to MSI */
Alexander Duyck047e0032009-10-27 15:49:27 +0000888 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800889 if (!pci_enable_msi(adapter->pdev))
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700890 adapter->flags |= IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800891 igb_free_all_tx_resources(adapter);
892 igb_free_all_rx_resources(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +0000893 adapter->num_tx_queues = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -0800894 adapter->num_rx_queues = 1;
Alexander Duyck047e0032009-10-27 15:49:27 +0000895 adapter->num_q_vectors = 1;
896 err = igb_alloc_q_vectors(adapter);
897 if (err) {
898 dev_err(&pdev->dev,
899 "Unable to allocate memory for vectors\n");
900 goto request_done;
901 }
902 err = igb_alloc_queues(adapter);
903 if (err) {
904 dev_err(&pdev->dev,
905 "Unable to allocate memory for queues\n");
906 igb_free_q_vectors(adapter);
907 goto request_done;
908 }
909 igb_setup_all_tx_resources(adapter);
910 igb_setup_all_rx_resources(adapter);
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700911 } else {
Alexander Duyck2d064c02008-07-08 15:10:12 -0700912 switch (hw->mac.type) {
913 case e1000_82575:
914 wr32(E1000_MSIXBM(0),
Alexander Duyck047e0032009-10-27 15:49:27 +0000915 (E1000_EICR_RX_QUEUE0 |
916 E1000_EICR_TX_QUEUE0 |
917 E1000_EIMS_OTHER));
Alexander Duyck2d064c02008-07-08 15:10:12 -0700918 break;
Alexander Duyck55cac242009-11-19 12:42:21 +0000919 case e1000_82580:
Alexander Duyck2d064c02008-07-08 15:10:12 -0700920 case e1000_82576:
921 wr32(E1000_IVAR0, E1000_IVAR_VALID);
922 break;
923 default:
924 break;
925 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800926 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700927
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700928 if (adapter->flags & IGB_FLAG_HAS_MSI) {
Joe Perchesa0607fd2009-11-18 23:29:17 -0800929 err = request_irq(adapter->pdev->irq, igb_intr_msi, 0,
Alexander Duyck047e0032009-10-27 15:49:27 +0000930 netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800931 if (!err)
932 goto request_done;
Alexander Duyck047e0032009-10-27 15:49:27 +0000933
Auke Kok9d5c8242008-01-24 02:22:38 -0800934 /* fall back to legacy interrupts */
935 igb_reset_interrupt_capability(adapter);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -0700936 adapter->flags &= ~IGB_FLAG_HAS_MSI;
Auke Kok9d5c8242008-01-24 02:22:38 -0800937 }
938
Joe Perchesa0607fd2009-11-18 23:29:17 -0800939 err = request_irq(adapter->pdev->irq, igb_intr, IRQF_SHARED,
Alexander Duyck047e0032009-10-27 15:49:27 +0000940 netdev->name, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800941
Andy Gospodarek6cb5e572008-02-15 14:05:25 -0800942 if (err)
Auke Kok9d5c8242008-01-24 02:22:38 -0800943 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
944 err);
Auke Kok9d5c8242008-01-24 02:22:38 -0800945
946request_done:
947 return err;
948}
949
950static void igb_free_irq(struct igb_adapter *adapter)
951{
Auke Kok9d5c8242008-01-24 02:22:38 -0800952 if (adapter->msix_entries) {
953 int vector = 0, i;
954
Alexander Duyck047e0032009-10-27 15:49:27 +0000955 free_irq(adapter->msix_entries[vector++].vector, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800956
Alexander Duyck047e0032009-10-27 15:49:27 +0000957 for (i = 0; i < adapter->num_q_vectors; i++) {
958 struct igb_q_vector *q_vector = adapter->q_vector[i];
959 free_irq(adapter->msix_entries[vector++].vector,
960 q_vector);
961 }
962 } else {
963 free_irq(adapter->pdev->irq, adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -0800964 }
Auke Kok9d5c8242008-01-24 02:22:38 -0800965}
966
967/**
968 * igb_irq_disable - Mask off interrupt generation on the NIC
969 * @adapter: board private structure
970 **/
971static void igb_irq_disable(struct igb_adapter *adapter)
972{
973 struct e1000_hw *hw = &adapter->hw;
974
Alexander Duyck25568a52009-10-27 23:49:59 +0000975 /*
976 * we need to be careful when disabling interrupts. The VFs are also
977 * mapped into these registers and so clearing the bits can cause
978 * issues on the VF drivers so we only need to clear what we set
979 */
Auke Kok9d5c8242008-01-24 02:22:38 -0800980 if (adapter->msix_entries) {
Alexander Duyck2dfd1212009-09-03 14:49:15 +0000981 u32 regval = rd32(E1000_EIAM);
982 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
983 wr32(E1000_EIMC, adapter->eims_enable_mask);
984 regval = rd32(E1000_EIAC);
985 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
Auke Kok9d5c8242008-01-24 02:22:38 -0800986 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -0700987
988 wr32(E1000_IAM, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -0800989 wr32(E1000_IMC, ~0);
990 wrfl();
991 synchronize_irq(adapter->pdev->irq);
992}
993
994/**
995 * igb_irq_enable - Enable default interrupt generation settings
996 * @adapter: board private structure
997 **/
998static void igb_irq_enable(struct igb_adapter *adapter)
999{
1000 struct e1000_hw *hw = &adapter->hw;
1001
1002 if (adapter->msix_entries) {
Alexander Duyck25568a52009-10-27 23:49:59 +00001003 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC;
Alexander Duyck2dfd1212009-09-03 14:49:15 +00001004 u32 regval = rd32(E1000_EIAC);
1005 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1006 regval = rd32(E1000_EIAM);
1007 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001008 wr32(E1000_EIMS, adapter->eims_enable_mask);
Alexander Duyck25568a52009-10-27 23:49:59 +00001009 if (adapter->vfs_allocated_count) {
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001010 wr32(E1000_MBVFIMR, 0xFF);
Alexander Duyck25568a52009-10-27 23:49:59 +00001011 ims |= E1000_IMS_VMMB;
1012 }
Alexander Duyck55cac242009-11-19 12:42:21 +00001013 if (adapter->hw.mac.type == e1000_82580)
1014 ims |= E1000_IMS_DRSTA;
1015
Alexander Duyck25568a52009-10-27 23:49:59 +00001016 wr32(E1000_IMS, ims);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001017 } else {
Alexander Duyck55cac242009-11-19 12:42:21 +00001018 wr32(E1000_IMS, IMS_ENABLE_MASK |
1019 E1000_IMS_DRSTA);
1020 wr32(E1000_IAM, IMS_ENABLE_MASK |
1021 E1000_IMS_DRSTA);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001022 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001023}
1024
1025static void igb_update_mng_vlan(struct igb_adapter *adapter)
1026{
Alexander Duyck51466232009-10-27 23:47:35 +00001027 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08001028 u16 vid = adapter->hw.mng_cookie.vlan_id;
1029 u16 old_vid = adapter->mng_vlan_id;
Auke Kok9d5c8242008-01-24 02:22:38 -08001030
Alexander Duyck51466232009-10-27 23:47:35 +00001031 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1032 /* add VID to filter table */
1033 igb_vfta_set(hw, vid, true);
1034 adapter->mng_vlan_id = vid;
1035 } else {
1036 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1037 }
1038
1039 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1040 (vid != old_vid) &&
1041 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1042 /* remove VID from filter table */
1043 igb_vfta_set(hw, old_vid, false);
Auke Kok9d5c8242008-01-24 02:22:38 -08001044 }
1045}
1046
1047/**
1048 * igb_release_hw_control - release control of the h/w to f/w
1049 * @adapter: address of board private structure
1050 *
1051 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1052 * For ASF and Pass Through versions of f/w this means that the
1053 * driver is no longer loaded.
1054 *
1055 **/
1056static void igb_release_hw_control(struct igb_adapter *adapter)
1057{
1058 struct e1000_hw *hw = &adapter->hw;
1059 u32 ctrl_ext;
1060
1061 /* Let firmware take over control of h/w */
1062 ctrl_ext = rd32(E1000_CTRL_EXT);
1063 wr32(E1000_CTRL_EXT,
1064 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1065}
1066
Auke Kok9d5c8242008-01-24 02:22:38 -08001067/**
1068 * igb_get_hw_control - get control of the h/w from f/w
1069 * @adapter: address of board private structure
1070 *
1071 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1072 * For ASF and Pass Through versions of f/w this means that
1073 * the driver is loaded.
1074 *
1075 **/
1076static void igb_get_hw_control(struct igb_adapter *adapter)
1077{
1078 struct e1000_hw *hw = &adapter->hw;
1079 u32 ctrl_ext;
1080
1081 /* Let firmware know the driver has taken over */
1082 ctrl_ext = rd32(E1000_CTRL_EXT);
1083 wr32(E1000_CTRL_EXT,
1084 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1085}
1086
Auke Kok9d5c8242008-01-24 02:22:38 -08001087/**
1088 * igb_configure - configure the hardware for RX and TX
1089 * @adapter: private board structure
1090 **/
1091static void igb_configure(struct igb_adapter *adapter)
1092{
1093 struct net_device *netdev = adapter->netdev;
1094 int i;
1095
1096 igb_get_hw_control(adapter);
Alexander Duyckff41f8d2009-09-03 14:48:56 +00001097 igb_set_rx_mode(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001098
1099 igb_restore_vlan(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001100
Alexander Duyck85b430b2009-10-27 15:50:29 +00001101 igb_setup_tctl(adapter);
Alexander Duyck06cf2662009-10-27 15:53:25 +00001102 igb_setup_mrqc(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001103 igb_setup_rctl(adapter);
Alexander Duyck85b430b2009-10-27 15:50:29 +00001104
1105 igb_configure_tx(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001106 igb_configure_rx(adapter);
Alexander Duyck662d7202008-06-27 11:00:29 -07001107
1108 igb_rx_fifo_flush_82575(&adapter->hw);
1109
Alexander Duyckc493ea42009-03-20 00:16:50 +00001110 /* call igb_desc_unused which always leaves
Auke Kok9d5c8242008-01-24 02:22:38 -08001111 * at least 1 descriptor unused to make sure
1112 * next_to_use != next_to_clean */
1113 for (i = 0; i < adapter->num_rx_queues; i++) {
1114 struct igb_ring *ring = &adapter->rx_ring[i];
Alexander Duyckc493ea42009-03-20 00:16:50 +00001115 igb_alloc_rx_buffers_adv(ring, igb_desc_unused(ring));
Auke Kok9d5c8242008-01-24 02:22:38 -08001116 }
1117
1118
1119 adapter->tx_queue_len = netdev->tx_queue_len;
1120}
1121
1122
1123/**
1124 * igb_up - Open the interface and prepare it to handle traffic
1125 * @adapter: board private structure
1126 **/
Auke Kok9d5c8242008-01-24 02:22:38 -08001127int igb_up(struct igb_adapter *adapter)
1128{
1129 struct e1000_hw *hw = &adapter->hw;
1130 int i;
1131
1132 /* hardware has been reset, we need to reload some things */
1133 igb_configure(adapter);
1134
1135 clear_bit(__IGB_DOWN, &adapter->state);
1136
Alexander Duyck047e0032009-10-27 15:49:27 +00001137 for (i = 0; i < adapter->num_q_vectors; i++) {
1138 struct igb_q_vector *q_vector = adapter->q_vector[i];
1139 napi_enable(&q_vector->napi);
1140 }
PJ Waskiewicz844290e2008-06-27 11:00:39 -07001141 if (adapter->msix_entries)
Auke Kok9d5c8242008-01-24 02:22:38 -08001142 igb_configure_msix(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001143
1144 /* Clear any pending interrupts. */
1145 rd32(E1000_ICR);
1146 igb_irq_enable(adapter);
1147
Alexander Duyckd4960302009-10-27 15:53:45 +00001148 /* notify VFs that reset has been completed */
1149 if (adapter->vfs_allocated_count) {
1150 u32 reg_data = rd32(E1000_CTRL_EXT);
1151 reg_data |= E1000_CTRL_EXT_PFRSTD;
1152 wr32(E1000_CTRL_EXT, reg_data);
1153 }
1154
Jesse Brandeburg4cb9be72009-04-21 18:42:05 +00001155 netif_tx_start_all_queues(adapter->netdev);
1156
Alexander Duyck25568a52009-10-27 23:49:59 +00001157 /* start the watchdog. */
1158 hw->mac.get_link_status = 1;
1159 schedule_work(&adapter->watchdog_task);
1160
Auke Kok9d5c8242008-01-24 02:22:38 -08001161 return 0;
1162}
1163
1164void igb_down(struct igb_adapter *adapter)
1165{
Auke Kok9d5c8242008-01-24 02:22:38 -08001166 struct net_device *netdev = adapter->netdev;
Alexander Duyck330a6d62009-10-27 23:51:35 +00001167 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08001168 u32 tctl, rctl;
1169 int i;
1170
1171 /* signal that we're down so the interrupt handler does not
1172 * reschedule our watchdog timer */
1173 set_bit(__IGB_DOWN, &adapter->state);
1174
1175 /* disable receives in the hardware */
1176 rctl = rd32(E1000_RCTL);
1177 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1178 /* flush and sleep below */
1179
David S. Millerfd2ea0a2008-07-17 01:56:23 -07001180 netif_tx_stop_all_queues(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001181
1182 /* disable transmits in the hardware */
1183 tctl = rd32(E1000_TCTL);
1184 tctl &= ~E1000_TCTL_EN;
1185 wr32(E1000_TCTL, tctl);
1186 /* flush both disables and wait for them to finish */
1187 wrfl();
1188 msleep(10);
1189
Alexander Duyck047e0032009-10-27 15:49:27 +00001190 for (i = 0; i < adapter->num_q_vectors; i++) {
1191 struct igb_q_vector *q_vector = adapter->q_vector[i];
1192 napi_disable(&q_vector->napi);
1193 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001194
Auke Kok9d5c8242008-01-24 02:22:38 -08001195 igb_irq_disable(adapter);
1196
1197 del_timer_sync(&adapter->watchdog_timer);
1198 del_timer_sync(&adapter->phy_info_timer);
1199
1200 netdev->tx_queue_len = adapter->tx_queue_len;
1201 netif_carrier_off(netdev);
Alexander Duyck04fe6352009-02-06 23:22:32 +00001202
1203 /* record the stats before reset*/
1204 igb_update_stats(adapter);
1205
Auke Kok9d5c8242008-01-24 02:22:38 -08001206 adapter->link_speed = 0;
1207 adapter->link_duplex = 0;
1208
Jeff Kirsher30236822008-06-24 17:01:15 -07001209 if (!pci_channel_offline(adapter->pdev))
1210 igb_reset(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001211 igb_clean_all_tx_rings(adapter);
1212 igb_clean_all_rx_rings(adapter);
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00001213#ifdef CONFIG_IGB_DCA
1214
1215 /* since we reset the hardware DCA settings were cleared */
1216 igb_setup_dca(adapter);
1217#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001218}
1219
1220void igb_reinit_locked(struct igb_adapter *adapter)
1221{
1222 WARN_ON(in_interrupt());
1223 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1224 msleep(1);
1225 igb_down(adapter);
1226 igb_up(adapter);
1227 clear_bit(__IGB_RESETTING, &adapter->state);
1228}
1229
1230void igb_reset(struct igb_adapter *adapter)
1231{
Alexander Duyck090b1792009-10-27 23:51:55 +00001232 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08001233 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07001234 struct e1000_mac_info *mac = &hw->mac;
1235 struct e1000_fc_info *fc = &hw->fc;
Auke Kok9d5c8242008-01-24 02:22:38 -08001236 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
1237 u16 hwm;
1238
1239 /* Repartition Pba for greater than 9k mtu
1240 * To take effect CTRL.RST is required.
1241 */
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001242 switch (mac->type) {
Alexander Duyck55cac242009-11-19 12:42:21 +00001243 case e1000_82580:
1244 pba = rd32(E1000_RXPBS);
1245 pba = igb_rxpbs_adjust_82580(pba);
1246 break;
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001247 case e1000_82576:
Alexander Duyckd249be52009-10-27 23:46:38 +00001248 pba = rd32(E1000_RXPBS);
1249 pba &= E1000_RXPBS_SIZE_MASK_82576;
Alexander Duyckfa4dfae2009-02-06 23:21:31 +00001250 break;
1251 case e1000_82575:
1252 default:
1253 pba = E1000_PBA_34K;
1254 break;
Alexander Duyck2d064c02008-07-08 15:10:12 -07001255 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001256
Alexander Duyck2d064c02008-07-08 15:10:12 -07001257 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1258 (mac->type < e1000_82576)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08001259 /* adjust PBA for jumbo frames */
1260 wr32(E1000_PBA, pba);
1261
1262 /* To maintain wire speed transmits, the Tx FIFO should be
1263 * large enough to accommodate two full transmit packets,
1264 * rounded up to the next 1KB and expressed in KB. Likewise,
1265 * the Rx FIFO should be large enough to accommodate at least
1266 * one full receive packet and is similarly rounded up and
1267 * expressed in KB. */
1268 pba = rd32(E1000_PBA);
1269 /* upper 16 bits has Tx packet buffer allocation size in KB */
1270 tx_space = pba >> 16;
1271 /* lower 16 bits has Rx packet buffer allocation size in KB */
1272 pba &= 0xffff;
1273 /* the tx fifo also stores 16 bytes of information about the tx
1274 * but don't include ethernet FCS because hardware appends it */
1275 min_tx_space = (adapter->max_frame_size +
Alexander Duyck85e8d002009-02-16 00:00:20 -08001276 sizeof(union e1000_adv_tx_desc) -
Auke Kok9d5c8242008-01-24 02:22:38 -08001277 ETH_FCS_LEN) * 2;
1278 min_tx_space = ALIGN(min_tx_space, 1024);
1279 min_tx_space >>= 10;
1280 /* software strips receive CRC, so leave room for it */
1281 min_rx_space = adapter->max_frame_size;
1282 min_rx_space = ALIGN(min_rx_space, 1024);
1283 min_rx_space >>= 10;
1284
1285 /* If current Tx allocation is less than the min Tx FIFO size,
1286 * and the min Tx FIFO size is less than the current Rx FIFO
1287 * allocation, take space away from current Rx allocation */
1288 if (tx_space < min_tx_space &&
1289 ((min_tx_space - tx_space) < pba)) {
1290 pba = pba - (min_tx_space - tx_space);
1291
1292 /* if short on rx space, rx wins and must trump tx
1293 * adjustment */
1294 if (pba < min_rx_space)
1295 pba = min_rx_space;
1296 }
Alexander Duyck2d064c02008-07-08 15:10:12 -07001297 wr32(E1000_PBA, pba);
Auke Kok9d5c8242008-01-24 02:22:38 -08001298 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001299
1300 /* flow control settings */
1301 /* The high water mark must be low enough to fit one full frame
1302 * (or the size used for early receive) above it in the Rx FIFO.
1303 * Set it to the lower of:
1304 * - 90% of the Rx FIFO size, or
1305 * - the full Rx FIFO size minus one full frame */
1306 hwm = min(((pba << 10) * 9 / 10),
Alexander Duyck2d064c02008-07-08 15:10:12 -07001307 ((pba << 10) - 2 * adapter->max_frame_size));
Auke Kok9d5c8242008-01-24 02:22:38 -08001308
Alexander Duyck2d064c02008-07-08 15:10:12 -07001309 if (mac->type < e1000_82576) {
1310 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
1311 fc->low_water = fc->high_water - 8;
1312 } else {
1313 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
1314 fc->low_water = fc->high_water - 16;
1315 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001316 fc->pause_time = 0xFFFF;
1317 fc->send_xon = 1;
Alexander Duyck0cce1192009-07-23 18:10:24 +00001318 fc->current_mode = fc->requested_mode;
Auke Kok9d5c8242008-01-24 02:22:38 -08001319
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001320 /* disable receive for all VFs and wait one second */
1321 if (adapter->vfs_allocated_count) {
1322 int i;
1323 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00001324 adapter->vf_data[i].flags = 0;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001325
1326 /* ping all the active vfs to let them know we are going down */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00001327 igb_ping_all_vfs(adapter);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08001328
1329 /* disable transmits and receives */
1330 wr32(E1000_VFRE, 0);
1331 wr32(E1000_VFTE, 0);
1332 }
1333
Auke Kok9d5c8242008-01-24 02:22:38 -08001334 /* Allow time for pending master requests to run */
Alexander Duyck330a6d62009-10-27 23:51:35 +00001335 hw->mac.ops.reset_hw(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001336 wr32(E1000_WUC, 0);
1337
Alexander Duyck330a6d62009-10-27 23:51:35 +00001338 if (hw->mac.ops.init_hw(hw))
Alexander Duyck090b1792009-10-27 23:51:55 +00001339 dev_err(&pdev->dev, "Hardware Error\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08001340
Alexander Duyck55cac242009-11-19 12:42:21 +00001341 if (hw->mac.type == e1000_82580) {
1342 u32 reg = rd32(E1000_PCIEMISC);
1343 wr32(E1000_PCIEMISC,
1344 reg & ~E1000_PCIEMISC_LX_DECISION);
1345 }
Auke Kok9d5c8242008-01-24 02:22:38 -08001346 igb_update_mng_vlan(adapter);
1347
1348 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1349 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1350
Alexander Duyck330a6d62009-10-27 23:51:35 +00001351 igb_reset_adaptive(hw);
1352 igb_get_phy_info(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001353}
1354
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001355static const struct net_device_ops igb_netdev_ops = {
Alexander Duyck559e9c42009-10-27 23:52:50 +00001356 .ndo_open = igb_open,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001357 .ndo_stop = igb_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08001358 .ndo_start_xmit = igb_xmit_frame_adv,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001359 .ndo_get_stats = igb_get_stats,
Alexander Duyckff41f8d2009-09-03 14:48:56 +00001360 .ndo_set_rx_mode = igb_set_rx_mode,
1361 .ndo_set_multicast_list = igb_set_rx_mode,
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001362 .ndo_set_mac_address = igb_set_mac,
1363 .ndo_change_mtu = igb_change_mtu,
1364 .ndo_do_ioctl = igb_ioctl,
1365 .ndo_tx_timeout = igb_tx_timeout,
1366 .ndo_validate_addr = eth_validate_addr,
1367 .ndo_vlan_rx_register = igb_vlan_rx_register,
1368 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
1369 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
1370#ifdef CONFIG_NET_POLL_CONTROLLER
1371 .ndo_poll_controller = igb_netpoll,
1372#endif
1373};
1374
Taku Izumi42bfd33a2008-06-20 12:10:30 +09001375/**
Auke Kok9d5c8242008-01-24 02:22:38 -08001376 * igb_probe - Device Initialization Routine
1377 * @pdev: PCI device information struct
1378 * @ent: entry in igb_pci_tbl
1379 *
1380 * Returns 0 on success, negative on failure
1381 *
1382 * igb_probe initializes an adapter identified by a pci_dev structure.
1383 * The OS initialization, configuring of the adapter private structure,
1384 * and a hardware reset occur.
1385 **/
1386static int __devinit igb_probe(struct pci_dev *pdev,
1387 const struct pci_device_id *ent)
1388{
1389 struct net_device *netdev;
1390 struct igb_adapter *adapter;
1391 struct e1000_hw *hw;
Alexander Duyck4337e992009-10-27 23:48:31 +00001392 u16 eeprom_data = 0;
1393 static int global_quad_port_a; /* global quad port a indication */
Auke Kok9d5c8242008-01-24 02:22:38 -08001394 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
1395 unsigned long mmio_start, mmio_len;
David S. Miller2d6a5e92009-03-17 15:01:30 -07001396 int err, pci_using_dac;
Auke Kok9d5c8242008-01-24 02:22:38 -08001397 u16 eeprom_apme_mask = IGB_EEPROM_APME;
1398 u32 part_num;
1399
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001400 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001401 if (err)
1402 return err;
1403
1404 pci_using_dac = 0;
Yang Hongyang6a355282009-04-06 19:01:13 -07001405 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Auke Kok9d5c8242008-01-24 02:22:38 -08001406 if (!err) {
Yang Hongyang6a355282009-04-06 19:01:13 -07001407 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Auke Kok9d5c8242008-01-24 02:22:38 -08001408 if (!err)
1409 pci_using_dac = 1;
1410 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07001411 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Auke Kok9d5c8242008-01-24 02:22:38 -08001412 if (err) {
Yang Hongyang284901a2009-04-06 19:01:15 -07001413 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
Auke Kok9d5c8242008-01-24 02:22:38 -08001414 if (err) {
1415 dev_err(&pdev->dev, "No usable DMA "
1416 "configuration, aborting\n");
1417 goto err_dma;
1418 }
1419 }
1420 }
1421
Alexander Duyckaed5dec2009-02-06 23:16:04 +00001422 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
1423 IORESOURCE_MEM),
1424 igb_driver_name);
Auke Kok9d5c8242008-01-24 02:22:38 -08001425 if (err)
1426 goto err_pci_reg;
1427
Frans Pop19d5afd2009-10-02 10:04:12 -07001428 pci_enable_pcie_error_reporting(pdev);
Alexander Duyck40a914f2008-11-27 00:24:37 -08001429
Auke Kok9d5c8242008-01-24 02:22:38 -08001430 pci_set_master(pdev);
Auke Kokc682fc22008-04-23 11:09:34 -07001431 pci_save_state(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001432
1433 err = -ENOMEM;
Alexander Duyck1bfaf072009-02-19 20:39:23 -08001434 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
1435 IGB_ABS_MAX_TX_QUEUES);
Auke Kok9d5c8242008-01-24 02:22:38 -08001436 if (!netdev)
1437 goto err_alloc_etherdev;
1438
1439 SET_NETDEV_DEV(netdev, &pdev->dev);
1440
1441 pci_set_drvdata(pdev, netdev);
1442 adapter = netdev_priv(netdev);
1443 adapter->netdev = netdev;
1444 adapter->pdev = pdev;
1445 hw = &adapter->hw;
1446 hw->back = adapter;
1447 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1448
1449 mmio_start = pci_resource_start(pdev, 0);
1450 mmio_len = pci_resource_len(pdev, 0);
1451
1452 err = -EIO;
Alexander Duyck28b07592009-02-06 23:20:31 +00001453 hw->hw_addr = ioremap(mmio_start, mmio_len);
1454 if (!hw->hw_addr)
Auke Kok9d5c8242008-01-24 02:22:38 -08001455 goto err_ioremap;
1456
Stephen Hemminger2e5c6922008-11-19 22:20:44 -08001457 netdev->netdev_ops = &igb_netdev_ops;
Auke Kok9d5c8242008-01-24 02:22:38 -08001458 igb_set_ethtool_ops(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08001459 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9d5c8242008-01-24 02:22:38 -08001460
1461 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1462
1463 netdev->mem_start = mmio_start;
1464 netdev->mem_end = mmio_start + mmio_len;
1465
Auke Kok9d5c8242008-01-24 02:22:38 -08001466 /* PCI config space info */
1467 hw->vendor_id = pdev->vendor;
1468 hw->device_id = pdev->device;
1469 hw->revision_id = pdev->revision;
1470 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1471 hw->subsystem_device_id = pdev->subsystem_device;
1472
Auke Kok9d5c8242008-01-24 02:22:38 -08001473 /* Copy the default MAC, PHY and NVM function pointers */
1474 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1475 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1476 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1477 /* Initialize skew-specific constants */
1478 err = ei->get_invariants(hw);
1479 if (err)
Alexander Duyck450c87c2009-02-06 23:22:11 +00001480 goto err_sw_init;
Auke Kok9d5c8242008-01-24 02:22:38 -08001481
Alexander Duyck450c87c2009-02-06 23:22:11 +00001482 /* setup the private structure */
Auke Kok9d5c8242008-01-24 02:22:38 -08001483 err = igb_sw_init(adapter);
1484 if (err)
1485 goto err_sw_init;
1486
1487 igb_get_bus_info_pcie(hw);
1488
1489 hw->phy.autoneg_wait_to_complete = false;
1490 hw->mac.adaptive_ifs = true;
1491
1492 /* Copper options */
1493 if (hw->phy.media_type == e1000_media_type_copper) {
1494 hw->phy.mdix = AUTO_ALL_MODES;
1495 hw->phy.disable_polarity_correction = false;
1496 hw->phy.ms_type = e1000_ms_hw_default;
1497 }
1498
1499 if (igb_check_reset_block(hw))
1500 dev_info(&pdev->dev,
1501 "PHY reset is blocked due to SOL/IDER session.\n");
1502
1503 netdev->features = NETIF_F_SG |
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001504 NETIF_F_IP_CSUM |
Auke Kok9d5c8242008-01-24 02:22:38 -08001505 NETIF_F_HW_VLAN_TX |
1506 NETIF_F_HW_VLAN_RX |
1507 NETIF_F_HW_VLAN_FILTER;
1508
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001509 netdev->features |= NETIF_F_IPV6_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08001510 netdev->features |= NETIF_F_TSO;
Auke Kok9d5c8242008-01-24 02:22:38 -08001511 netdev->features |= NETIF_F_TSO6;
Herbert Xu5c0999b2009-01-19 15:20:57 -08001512 netdev->features |= NETIF_F_GRO;
Alexander Duyckd3352522008-07-08 15:12:13 -07001513
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001514 netdev->vlan_features |= NETIF_F_TSO;
1515 netdev->vlan_features |= NETIF_F_TSO6;
Alexander Duyck7d8eb292009-02-06 23:18:27 +00001516 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyckcd1da502009-08-25 04:47:50 +00001517 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Jeff Kirsher48f29ff2008-06-05 04:06:27 -07001518 netdev->vlan_features |= NETIF_F_SG;
1519
Auke Kok9d5c8242008-01-24 02:22:38 -08001520 if (pci_using_dac)
1521 netdev->features |= NETIF_F_HIGHDMA;
1522
Alexander Duyck5b043fb2009-10-27 23:52:31 +00001523 if (hw->mac.type >= e1000_82576)
Jesse Brandeburgb9473562009-04-27 22:36:13 +00001524 netdev->features |= NETIF_F_SCTP_CSUM;
1525
Alexander Duyck330a6d62009-10-27 23:51:35 +00001526 adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001527
1528 /* before reading the NVM, reset the controller to put the device in a
1529 * known good starting state */
1530 hw->mac.ops.reset_hw(hw);
1531
1532 /* make sure the NVM is good */
1533 if (igb_validate_nvm_checksum(hw) < 0) {
1534 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1535 err = -EIO;
1536 goto err_eeprom;
1537 }
1538
1539 /* copy the MAC address out of the NVM */
1540 if (hw->mac.ops.read_mac_addr(hw))
1541 dev_err(&pdev->dev, "NVM Read Error\n");
1542
1543 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1544 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1545
1546 if (!is_valid_ether_addr(netdev->perm_addr)) {
1547 dev_err(&pdev->dev, "Invalid MAC Address\n");
1548 err = -EIO;
1549 goto err_eeprom;
1550 }
1551
Alexander Duyck0e340482009-03-20 00:17:08 +00001552 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
1553 (unsigned long) adapter);
1554 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
1555 (unsigned long) adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001556
1557 INIT_WORK(&adapter->reset_task, igb_reset_task);
1558 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1559
Alexander Duyck450c87c2009-02-06 23:22:11 +00001560 /* Initialize link properties that are user-changeable */
Auke Kok9d5c8242008-01-24 02:22:38 -08001561 adapter->fc_autoneg = true;
1562 hw->mac.autoneg = true;
1563 hw->phy.autoneg_advertised = 0x2f;
1564
Alexander Duyck0cce1192009-07-23 18:10:24 +00001565 hw->fc.requested_mode = e1000_fc_default;
1566 hw->fc.current_mode = e1000_fc_default;
Auke Kok9d5c8242008-01-24 02:22:38 -08001567
Auke Kok9d5c8242008-01-24 02:22:38 -08001568 igb_validate_mdi_setting(hw);
1569
Auke Kok9d5c8242008-01-24 02:22:38 -08001570 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1571 * enable the ACPI Magic Packet filter
1572 */
1573
Alexander Duycka2cf8b62009-03-13 20:41:17 +00001574 if (hw->bus.func == 0)
Alexander Duyck312c75a2009-02-06 23:17:47 +00001575 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
Alexander Duyck55cac242009-11-19 12:42:21 +00001576 else if (hw->mac.type == e1000_82580)
1577 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
1578 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
1579 &eeprom_data);
Alexander Duycka2cf8b62009-03-13 20:41:17 +00001580 else if (hw->bus.func == 1)
1581 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
Auke Kok9d5c8242008-01-24 02:22:38 -08001582
1583 if (eeprom_data & eeprom_apme_mask)
1584 adapter->eeprom_wol |= E1000_WUFC_MAG;
1585
1586 /* now that we have the eeprom settings, apply the special cases where
1587 * the eeprom may be wrong or the board simply won't support wake on
1588 * lan on a particular port */
1589 switch (pdev->device) {
1590 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1591 adapter->eeprom_wol = 0;
1592 break;
1593 case E1000_DEV_ID_82575EB_FIBER_SERDES:
Alexander Duyck2d064c02008-07-08 15:10:12 -07001594 case E1000_DEV_ID_82576_FIBER:
1595 case E1000_DEV_ID_82576_SERDES:
Auke Kok9d5c8242008-01-24 02:22:38 -08001596 /* Wake events only supported on port A for dual fiber
1597 * regardless of eeprom setting */
1598 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1599 adapter->eeprom_wol = 0;
1600 break;
Alexander Duyckc8ea5ea2009-03-13 20:42:35 +00001601 case E1000_DEV_ID_82576_QUAD_COPPER:
1602 /* if quad port adapter, disable WoL on all but port A */
1603 if (global_quad_port_a != 0)
1604 adapter->eeprom_wol = 0;
1605 else
1606 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
1607 /* Reset for multiple quad port adapters */
1608 if (++global_quad_port_a == 4)
1609 global_quad_port_a = 0;
1610 break;
Auke Kok9d5c8242008-01-24 02:22:38 -08001611 }
1612
1613 /* initialize the wol settings based on the eeprom settings */
1614 adapter->wol = adapter->eeprom_wol;
\"Rafael J. Wysocki\e1b86d82008-11-07 20:30:37 +00001615 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
Auke Kok9d5c8242008-01-24 02:22:38 -08001616
1617 /* reset the hardware with the new settings */
1618 igb_reset(adapter);
1619
1620 /* let the f/w know that the h/w is now under the control of the
1621 * driver. */
1622 igb_get_hw_control(adapter);
1623
Auke Kok9d5c8242008-01-24 02:22:38 -08001624 strcpy(netdev->name, "eth%d");
1625 err = register_netdev(netdev);
1626 if (err)
1627 goto err_register;
1628
Jesse Brandeburgb168dfc2009-04-17 20:44:32 +00001629 /* carrier off reporting is important to ethtool even BEFORE open */
1630 netif_carrier_off(netdev);
1631
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001632#ifdef CONFIG_IGB_DCA
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08001633 if (dca_add_requester(&pdev->dev) == 0) {
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001634 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001635 dev_info(&pdev->dev, "DCA enabled\n");
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001636 igb_setup_dca(adapter);
1637 }
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00001638
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001639#endif
Auke Kok9d5c8242008-01-24 02:22:38 -08001640 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1641 /* print bus type/speed/width info */
Johannes Berg7c510e42008-10-27 17:47:26 -07001642 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08001643 netdev->name,
Alexander Duyck559e9c42009-10-27 23:52:50 +00001644 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1645 "unknown"),
Alexander Duyck59c3de82009-03-31 20:38:00 +00001646 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
1647 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
1648 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
1649 "unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07001650 netdev->dev_addr);
Auke Kok9d5c8242008-01-24 02:22:38 -08001651
1652 igb_read_part_num(hw, &part_num);
1653 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1654 (part_num >> 8), (part_num & 0xff));
1655
1656 dev_info(&pdev->dev,
1657 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1658 adapter->msix_entries ? "MSI-X" :
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001659 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
Auke Kok9d5c8242008-01-24 02:22:38 -08001660 adapter->num_rx_queues, adapter->num_tx_queues);
1661
Auke Kok9d5c8242008-01-24 02:22:38 -08001662 return 0;
1663
1664err_register:
1665 igb_release_hw_control(adapter);
1666err_eeprom:
1667 if (!igb_check_reset_block(hw))
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08001668 igb_reset_phy(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001669
1670 if (hw->flash_address)
1671 iounmap(hw->flash_address);
Auke Kok9d5c8242008-01-24 02:22:38 -08001672err_sw_init:
Alexander Duyck047e0032009-10-27 15:49:27 +00001673 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001674 iounmap(hw->hw_addr);
1675err_ioremap:
1676 free_netdev(netdev);
1677err_alloc_etherdev:
Alexander Duyck559e9c42009-10-27 23:52:50 +00001678 pci_release_selected_regions(pdev,
1679 pci_select_bars(pdev, IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08001680err_pci_reg:
1681err_dma:
1682 pci_disable_device(pdev);
1683 return err;
1684}
1685
1686/**
1687 * igb_remove - Device Removal Routine
1688 * @pdev: PCI device information struct
1689 *
1690 * igb_remove is called by the PCI subsystem to alert the driver
1691 * that it should release a PCI device. The could be caused by a
1692 * Hot-Plug event, or because the driver is going to be removed from
1693 * memory.
1694 **/
1695static void __devexit igb_remove(struct pci_dev *pdev)
1696{
1697 struct net_device *netdev = pci_get_drvdata(pdev);
1698 struct igb_adapter *adapter = netdev_priv(netdev);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001699 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08001700
1701 /* flush_scheduled work may reschedule our watchdog task, so
1702 * explicitly disable watchdog tasks from being rescheduled */
1703 set_bit(__IGB_DOWN, &adapter->state);
1704 del_timer_sync(&adapter->watchdog_timer);
1705 del_timer_sync(&adapter->phy_info_timer);
1706
1707 flush_scheduled_work();
1708
Jeff Kirsher421e02f2008-10-17 11:08:31 -07001709#ifdef CONFIG_IGB_DCA
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001710 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001711 dev_info(&pdev->dev, "DCA disabled\n");
1712 dca_remove_requester(&pdev->dev);
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07001713 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08001714 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07001715 }
1716#endif
1717
Auke Kok9d5c8242008-01-24 02:22:38 -08001718 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1719 * would have already happened in close and is redundant. */
1720 igb_release_hw_control(adapter);
1721
1722 unregister_netdev(netdev);
1723
Alexander Duyck330a6d62009-10-27 23:51:35 +00001724 if (!igb_check_reset_block(hw))
1725 igb_reset_phy(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08001726
Alexander Duyck047e0032009-10-27 15:49:27 +00001727 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08001728
Alexander Duyck37680112009-02-19 20:40:30 -08001729#ifdef CONFIG_PCI_IOV
1730 /* reclaim resources allocated to VFs */
1731 if (adapter->vf_data) {
1732 /* disable iov and allow time for transactions to clear */
1733 pci_disable_sriov(pdev);
1734 msleep(500);
1735
1736 kfree(adapter->vf_data);
1737 adapter->vf_data = NULL;
1738 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1739 msleep(100);
1740 dev_info(&pdev->dev, "IOV Disabled\n");
1741 }
1742#endif
Alexander Duyck559e9c42009-10-27 23:52:50 +00001743
Alexander Duyck28b07592009-02-06 23:20:31 +00001744 iounmap(hw->hw_addr);
1745 if (hw->flash_address)
1746 iounmap(hw->flash_address);
Alexander Duyck559e9c42009-10-27 23:52:50 +00001747 pci_release_selected_regions(pdev,
1748 pci_select_bars(pdev, IORESOURCE_MEM));
Auke Kok9d5c8242008-01-24 02:22:38 -08001749
1750 free_netdev(netdev);
1751
Frans Pop19d5afd2009-10-02 10:04:12 -07001752 pci_disable_pcie_error_reporting(pdev);
Alexander Duyck40a914f2008-11-27 00:24:37 -08001753
Auke Kok9d5c8242008-01-24 02:22:38 -08001754 pci_disable_device(pdev);
1755}
1756
1757/**
Alexander Duycka6b623e2009-10-27 23:47:53 +00001758 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
1759 * @adapter: board private structure to initialize
1760 *
1761 * This function initializes the vf specific data storage and then attempts to
1762 * allocate the VFs. The reason for ordering it this way is because it is much
1763 * mor expensive time wise to disable SR-IOV than it is to allocate and free
1764 * the memory for the VFs.
1765 **/
1766static void __devinit igb_probe_vfs(struct igb_adapter * adapter)
1767{
1768#ifdef CONFIG_PCI_IOV
1769 struct pci_dev *pdev = adapter->pdev;
1770
1771 if (adapter->vfs_allocated_count > 7)
1772 adapter->vfs_allocated_count = 7;
1773
1774 if (adapter->vfs_allocated_count) {
1775 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
1776 sizeof(struct vf_data_storage),
1777 GFP_KERNEL);
1778 /* if allocation failed then we do not support SR-IOV */
1779 if (!adapter->vf_data) {
1780 adapter->vfs_allocated_count = 0;
1781 dev_err(&pdev->dev, "Unable to allocate memory for VF "
1782 "Data Storage\n");
1783 }
1784 }
1785
1786 if (pci_enable_sriov(pdev, adapter->vfs_allocated_count)) {
1787 kfree(adapter->vf_data);
1788 adapter->vf_data = NULL;
1789#endif /* CONFIG_PCI_IOV */
1790 adapter->vfs_allocated_count = 0;
1791#ifdef CONFIG_PCI_IOV
1792 } else {
1793 unsigned char mac_addr[ETH_ALEN];
1794 int i;
1795 dev_info(&pdev->dev, "%d vfs allocated\n",
1796 adapter->vfs_allocated_count);
1797 for (i = 0; i < adapter->vfs_allocated_count; i++) {
1798 random_ether_addr(mac_addr);
1799 igb_set_vf_mac(adapter, i, mac_addr);
1800 }
1801 }
1802#endif /* CONFIG_PCI_IOV */
1803}
1804
Alexander Duyck115f4592009-11-12 18:37:00 +00001805
1806/**
1807 * igb_init_hw_timer - Initialize hardware timer used with IEEE 1588 timestamp
1808 * @adapter: board private structure to initialize
1809 *
1810 * igb_init_hw_timer initializes the function pointer and values for the hw
1811 * timer found in hardware.
1812 **/
1813static void igb_init_hw_timer(struct igb_adapter *adapter)
1814{
1815 struct e1000_hw *hw = &adapter->hw;
1816
1817 switch (hw->mac.type) {
Alexander Duyck55cac242009-11-19 12:42:21 +00001818 case e1000_82580:
1819 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
1820 adapter->cycles.read = igb_read_clock;
1821 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
1822 adapter->cycles.mult = 1;
1823 /*
1824 * The 82580 timesync updates the system timer every 8ns by 8ns
1825 * and the value cannot be shifted. Instead we need to shift
1826 * the registers to generate a 64bit timer value. As a result
1827 * SYSTIMR/L/H, TXSTMPL/H, RXSTMPL/H all have to be shifted by
1828 * 24 in order to generate a larger value for synchronization.
1829 */
1830 adapter->cycles.shift = IGB_82580_TSYNC_SHIFT;
1831 /* disable system timer temporarily by setting bit 31 */
1832 wr32(E1000_TSAUXC, 0x80000000);
1833 wrfl();
1834
1835 /* Set registers so that rollover occurs soon to test this. */
1836 wr32(E1000_SYSTIMR, 0x00000000);
1837 wr32(E1000_SYSTIML, 0x80000000);
1838 wr32(E1000_SYSTIMH, 0x000000FF);
1839 wrfl();
1840
1841 /* enable system timer by clearing bit 31 */
1842 wr32(E1000_TSAUXC, 0x0);
1843 wrfl();
1844
1845 timecounter_init(&adapter->clock,
1846 &adapter->cycles,
1847 ktime_to_ns(ktime_get_real()));
1848 /*
1849 * Synchronize our NIC clock against system wall clock. NIC
1850 * time stamp reading requires ~3us per sample, each sample
1851 * was pretty stable even under load => only require 10
1852 * samples for each offset comparison.
1853 */
1854 memset(&adapter->compare, 0, sizeof(adapter->compare));
1855 adapter->compare.source = &adapter->clock;
1856 adapter->compare.target = ktime_get_real;
1857 adapter->compare.num_samples = 10;
1858 timecompare_update(&adapter->compare, 0);
1859 break;
Alexander Duyck115f4592009-11-12 18:37:00 +00001860 case e1000_82576:
1861 /*
1862 * Initialize hardware timer: we keep it running just in case
1863 * that some program needs it later on.
1864 */
1865 memset(&adapter->cycles, 0, sizeof(adapter->cycles));
1866 adapter->cycles.read = igb_read_clock;
1867 adapter->cycles.mask = CLOCKSOURCE_MASK(64);
1868 adapter->cycles.mult = 1;
1869 /**
1870 * Scale the NIC clock cycle by a large factor so that
1871 * relatively small clock corrections can be added or
1872 * substracted at each clock tick. The drawbacks of a large
1873 * factor are a) that the clock register overflows more quickly
1874 * (not such a big deal) and b) that the increment per tick has
1875 * to fit into 24 bits. As a result we need to use a shift of
1876 * 19 so we can fit a value of 16 into the TIMINCA register.
1877 */
1878 adapter->cycles.shift = IGB_82576_TSYNC_SHIFT;
1879 wr32(E1000_TIMINCA,
1880 (1 << E1000_TIMINCA_16NS_SHIFT) |
1881 (16 << IGB_82576_TSYNC_SHIFT));
1882
1883 /* Set registers so that rollover occurs soon to test this. */
1884 wr32(E1000_SYSTIML, 0x00000000);
1885 wr32(E1000_SYSTIMH, 0xFF800000);
1886 wrfl();
1887
1888 timecounter_init(&adapter->clock,
1889 &adapter->cycles,
1890 ktime_to_ns(ktime_get_real()));
1891 /*
1892 * Synchronize our NIC clock against system wall clock. NIC
1893 * time stamp reading requires ~3us per sample, each sample
1894 * was pretty stable even under load => only require 10
1895 * samples for each offset comparison.
1896 */
1897 memset(&adapter->compare, 0, sizeof(adapter->compare));
1898 adapter->compare.source = &adapter->clock;
1899 adapter->compare.target = ktime_get_real;
1900 adapter->compare.num_samples = 10;
1901 timecompare_update(&adapter->compare, 0);
1902 break;
1903 case e1000_82575:
1904 /* 82575 does not support timesync */
1905 default:
1906 break;
1907 }
1908
1909}
1910
Alexander Duycka6b623e2009-10-27 23:47:53 +00001911/**
Auke Kok9d5c8242008-01-24 02:22:38 -08001912 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1913 * @adapter: board private structure to initialize
1914 *
1915 * igb_sw_init initializes the Adapter private data structure.
1916 * Fields are initialized based on PCI device information and
1917 * OS network device settings (MTU size).
1918 **/
1919static int __devinit igb_sw_init(struct igb_adapter *adapter)
1920{
1921 struct e1000_hw *hw = &adapter->hw;
1922 struct net_device *netdev = adapter->netdev;
1923 struct pci_dev *pdev = adapter->pdev;
1924
1925 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1926
Alexander Duyck68fd9912008-11-20 00:48:10 -08001927 adapter->tx_ring_count = IGB_DEFAULT_TXD;
1928 adapter->rx_ring_count = IGB_DEFAULT_RXD;
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00001929 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
1930 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
1931
Auke Kok9d5c8242008-01-24 02:22:38 -08001932 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1933 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1934
Alexander Duycka6b623e2009-10-27 23:47:53 +00001935#ifdef CONFIG_PCI_IOV
1936 if (hw->mac.type == e1000_82576)
1937 adapter->vfs_allocated_count = max_vfs;
1938
1939#endif /* CONFIG_PCI_IOV */
Alexander Duycka99955f2009-11-12 18:37:19 +00001940 adapter->rss_queues = min_t(u32, IGB_MAX_RX_QUEUES, num_online_cpus());
1941
1942 /*
1943 * if rss_queues > 4 or vfs are going to be allocated with rss_queues
1944 * then we should combine the queues into a queue pair in order to
1945 * conserve interrupts due to limited supply
1946 */
1947 if ((adapter->rss_queues > 4) ||
1948 ((adapter->rss_queues > 1) && (adapter->vfs_allocated_count > 6)))
1949 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1950
Alexander Duycka6b623e2009-10-27 23:47:53 +00001951 /* This call may decrease the number of queues */
Alexander Duyck047e0032009-10-27 15:49:27 +00001952 if (igb_init_interrupt_scheme(adapter)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08001953 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1954 return -ENOMEM;
1955 }
1956
Alexander Duyck115f4592009-11-12 18:37:00 +00001957 igb_init_hw_timer(adapter);
Alexander Duycka6b623e2009-10-27 23:47:53 +00001958 igb_probe_vfs(adapter);
1959
Auke Kok9d5c8242008-01-24 02:22:38 -08001960 /* Explicitly disable IRQ since the NIC can be in any state. */
1961 igb_irq_disable(adapter);
1962
1963 set_bit(__IGB_DOWN, &adapter->state);
1964 return 0;
1965}
1966
1967/**
1968 * igb_open - Called when a network interface is made active
1969 * @netdev: network interface device structure
1970 *
1971 * Returns 0 on success, negative value on failure
1972 *
1973 * The open entry point is called when a network interface is made
1974 * active by the system (IFF_UP). At this point all resources needed
1975 * for transmit and receive operations are allocated, the interrupt
1976 * handler is registered with the OS, the watchdog timer is started,
1977 * and the stack is notified that the interface is ready.
1978 **/
1979static int igb_open(struct net_device *netdev)
1980{
1981 struct igb_adapter *adapter = netdev_priv(netdev);
1982 struct e1000_hw *hw = &adapter->hw;
1983 int err;
1984 int i;
1985
1986 /* disallow open during test */
1987 if (test_bit(__IGB_TESTING, &adapter->state))
1988 return -EBUSY;
1989
Jesse Brandeburgb168dfc2009-04-17 20:44:32 +00001990 netif_carrier_off(netdev);
1991
Auke Kok9d5c8242008-01-24 02:22:38 -08001992 /* allocate transmit descriptors */
1993 err = igb_setup_all_tx_resources(adapter);
1994 if (err)
1995 goto err_setup_tx;
1996
1997 /* allocate receive descriptors */
1998 err = igb_setup_all_rx_resources(adapter);
1999 if (err)
2000 goto err_setup_rx;
2001
2002 /* e1000_power_up_phy(adapter); */
2003
Auke Kok9d5c8242008-01-24 02:22:38 -08002004 /* before we allocate an interrupt, we must be ready to handle it.
2005 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2006 * as soon as we call pci_request_irq, so we have to setup our
2007 * clean_rx handler before we do so. */
2008 igb_configure(adapter);
2009
2010 err = igb_request_irq(adapter);
2011 if (err)
2012 goto err_req_irq;
2013
2014 /* From here on the code is the same as igb_up() */
2015 clear_bit(__IGB_DOWN, &adapter->state);
2016
Alexander Duyck047e0032009-10-27 15:49:27 +00002017 for (i = 0; i < adapter->num_q_vectors; i++) {
2018 struct igb_q_vector *q_vector = adapter->q_vector[i];
2019 napi_enable(&q_vector->napi);
2020 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002021
2022 /* Clear any pending interrupts. */
2023 rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07002024
2025 igb_irq_enable(adapter);
2026
Alexander Duyckd4960302009-10-27 15:53:45 +00002027 /* notify VFs that reset has been completed */
2028 if (adapter->vfs_allocated_count) {
2029 u32 reg_data = rd32(E1000_CTRL_EXT);
2030 reg_data |= E1000_CTRL_EXT_PFRSTD;
2031 wr32(E1000_CTRL_EXT, reg_data);
2032 }
2033
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07002034 netif_tx_start_all_queues(netdev);
2035
Alexander Duyck25568a52009-10-27 23:49:59 +00002036 /* start the watchdog. */
2037 hw->mac.get_link_status = 1;
2038 schedule_work(&adapter->watchdog_task);
Auke Kok9d5c8242008-01-24 02:22:38 -08002039
2040 return 0;
2041
2042err_req_irq:
2043 igb_release_hw_control(adapter);
2044 /* e1000_power_down_phy(adapter); */
2045 igb_free_all_rx_resources(adapter);
2046err_setup_rx:
2047 igb_free_all_tx_resources(adapter);
2048err_setup_tx:
2049 igb_reset(adapter);
2050
2051 return err;
2052}
2053
2054/**
2055 * igb_close - Disables a network interface
2056 * @netdev: network interface device structure
2057 *
2058 * Returns 0, this is not allowed to fail
2059 *
2060 * The close entry point is called when an interface is de-activated
2061 * by the OS. The hardware is still under the driver's control, but
2062 * needs to be disabled. A global MAC reset is issued to stop the
2063 * hardware, and all transmit and receive resources are freed.
2064 **/
2065static int igb_close(struct net_device *netdev)
2066{
2067 struct igb_adapter *adapter = netdev_priv(netdev);
2068
2069 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
2070 igb_down(adapter);
2071
2072 igb_free_irq(adapter);
2073
2074 igb_free_all_tx_resources(adapter);
2075 igb_free_all_rx_resources(adapter);
2076
Auke Kok9d5c8242008-01-24 02:22:38 -08002077 return 0;
2078}
2079
2080/**
2081 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
Auke Kok9d5c8242008-01-24 02:22:38 -08002082 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2083 *
2084 * Return 0 on success, negative on failure
2085 **/
Alexander Duyck80785292009-10-27 15:51:47 +00002086int igb_setup_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002087{
Alexander Duyck80785292009-10-27 15:51:47 +00002088 struct pci_dev *pdev = tx_ring->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002089 int size;
2090
2091 size = sizeof(struct igb_buffer) * tx_ring->count;
2092 tx_ring->buffer_info = vmalloc(size);
2093 if (!tx_ring->buffer_info)
2094 goto err;
2095 memset(tx_ring->buffer_info, 0, size);
2096
2097 /* round up to nearest 4K */
Alexander Duyck85e8d002009-02-16 00:00:20 -08002098 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
Auke Kok9d5c8242008-01-24 02:22:38 -08002099 tx_ring->size = ALIGN(tx_ring->size, 4096);
2100
Alexander Duyck439705e2009-10-27 23:49:20 +00002101 tx_ring->desc = pci_alloc_consistent(pdev,
2102 tx_ring->size,
Auke Kok9d5c8242008-01-24 02:22:38 -08002103 &tx_ring->dma);
2104
2105 if (!tx_ring->desc)
2106 goto err;
2107
Auke Kok9d5c8242008-01-24 02:22:38 -08002108 tx_ring->next_to_use = 0;
2109 tx_ring->next_to_clean = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002110 return 0;
2111
2112err:
2113 vfree(tx_ring->buffer_info);
Alexander Duyck047e0032009-10-27 15:49:27 +00002114 dev_err(&pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002115 "Unable to allocate memory for the transmit descriptor ring\n");
2116 return -ENOMEM;
2117}
2118
2119/**
2120 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2121 * (Descriptors) for all queues
2122 * @adapter: board private structure
2123 *
2124 * Return 0 on success, negative on failure
2125 **/
2126static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
2127{
Alexander Duyck439705e2009-10-27 23:49:20 +00002128 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002129 int i, err = 0;
2130
2131 for (i = 0; i < adapter->num_tx_queues; i++) {
Alexander Duyck80785292009-10-27 15:51:47 +00002132 err = igb_setup_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002133 if (err) {
Alexander Duyck439705e2009-10-27 23:49:20 +00002134 dev_err(&pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002135 "Allocation for Tx Queue %u failed\n", i);
2136 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002137 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002138 break;
2139 }
2140 }
2141
Alexander Duycka99955f2009-11-12 18:37:19 +00002142 for (i = 0; i < IGB_ABS_MAX_TX_QUEUES; i++) {
Alexander Duyck439705e2009-10-27 23:49:20 +00002143 int r_idx = i % adapter->num_tx_queues;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07002144 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00002145 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002146 return err;
2147}
2148
2149/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00002150 * igb_setup_tctl - configure the transmit control registers
2151 * @adapter: Board private structure
Auke Kok9d5c8242008-01-24 02:22:38 -08002152 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002153void igb_setup_tctl(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002154{
Auke Kok9d5c8242008-01-24 02:22:38 -08002155 struct e1000_hw *hw = &adapter->hw;
2156 u32 tctl;
Auke Kok9d5c8242008-01-24 02:22:38 -08002157
Alexander Duyck85b430b2009-10-27 15:50:29 +00002158 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2159 wr32(E1000_TXDCTL(0), 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08002160
2161 /* Program the Transmit Control Register */
Auke Kok9d5c8242008-01-24 02:22:38 -08002162 tctl = rd32(E1000_TCTL);
2163 tctl &= ~E1000_TCTL_CT;
2164 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2165 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2166
2167 igb_config_collision_dist(hw);
2168
Auke Kok9d5c8242008-01-24 02:22:38 -08002169 /* Enable transmits */
2170 tctl |= E1000_TCTL_EN;
2171
2172 wr32(E1000_TCTL, tctl);
2173}
2174
2175/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00002176 * igb_configure_tx_ring - Configure transmit ring after Reset
2177 * @adapter: board private structure
2178 * @ring: tx ring to configure
2179 *
2180 * Configure a transmit ring after a reset.
2181 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002182void igb_configure_tx_ring(struct igb_adapter *adapter,
2183 struct igb_ring *ring)
Alexander Duyck85b430b2009-10-27 15:50:29 +00002184{
2185 struct e1000_hw *hw = &adapter->hw;
2186 u32 txdctl;
2187 u64 tdba = ring->dma;
2188 int reg_idx = ring->reg_idx;
2189
2190 /* disable the queue */
2191 txdctl = rd32(E1000_TXDCTL(reg_idx));
2192 wr32(E1000_TXDCTL(reg_idx),
2193 txdctl & ~E1000_TXDCTL_QUEUE_ENABLE);
2194 wrfl();
2195 mdelay(10);
2196
2197 wr32(E1000_TDLEN(reg_idx),
2198 ring->count * sizeof(union e1000_adv_tx_desc));
2199 wr32(E1000_TDBAL(reg_idx),
2200 tdba & 0x00000000ffffffffULL);
2201 wr32(E1000_TDBAH(reg_idx), tdba >> 32);
2202
Alexander Duyckfce99e32009-10-27 15:51:27 +00002203 ring->head = hw->hw_addr + E1000_TDH(reg_idx);
2204 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
2205 writel(0, ring->head);
2206 writel(0, ring->tail);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002207
2208 txdctl |= IGB_TX_PTHRESH;
2209 txdctl |= IGB_TX_HTHRESH << 8;
2210 txdctl |= IGB_TX_WTHRESH << 16;
2211
2212 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
2213 wr32(E1000_TXDCTL(reg_idx), txdctl);
2214}
2215
2216/**
2217 * igb_configure_tx - Configure transmit Unit after Reset
2218 * @adapter: board private structure
2219 *
2220 * Configure the Tx unit of the MAC after a reset.
2221 **/
2222static void igb_configure_tx(struct igb_adapter *adapter)
2223{
2224 int i;
2225
2226 for (i = 0; i < adapter->num_tx_queues; i++)
2227 igb_configure_tx_ring(adapter, &adapter->tx_ring[i]);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002228}
2229
2230/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002231 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
Auke Kok9d5c8242008-01-24 02:22:38 -08002232 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2233 *
2234 * Returns 0 on success, negative on failure
2235 **/
Alexander Duyck80785292009-10-27 15:51:47 +00002236int igb_setup_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002237{
Alexander Duyck80785292009-10-27 15:51:47 +00002238 struct pci_dev *pdev = rx_ring->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002239 int size, desc_len;
2240
2241 size = sizeof(struct igb_buffer) * rx_ring->count;
2242 rx_ring->buffer_info = vmalloc(size);
2243 if (!rx_ring->buffer_info)
2244 goto err;
2245 memset(rx_ring->buffer_info, 0, size);
2246
2247 desc_len = sizeof(union e1000_adv_rx_desc);
2248
2249 /* Round up to nearest 4K */
2250 rx_ring->size = rx_ring->count * desc_len;
2251 rx_ring->size = ALIGN(rx_ring->size, 4096);
2252
2253 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
2254 &rx_ring->dma);
2255
2256 if (!rx_ring->desc)
2257 goto err;
2258
2259 rx_ring->next_to_clean = 0;
2260 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002261
Auke Kok9d5c8242008-01-24 02:22:38 -08002262 return 0;
2263
2264err:
2265 vfree(rx_ring->buffer_info);
Alexander Duyck439705e2009-10-27 23:49:20 +00002266 rx_ring->buffer_info = NULL;
Alexander Duyck80785292009-10-27 15:51:47 +00002267 dev_err(&pdev->dev, "Unable to allocate memory for "
Auke Kok9d5c8242008-01-24 02:22:38 -08002268 "the receive descriptor ring\n");
2269 return -ENOMEM;
2270}
2271
2272/**
2273 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
2274 * (Descriptors) for all queues
2275 * @adapter: board private structure
2276 *
2277 * Return 0 on success, negative on failure
2278 **/
2279static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
2280{
Alexander Duyck439705e2009-10-27 23:49:20 +00002281 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08002282 int i, err = 0;
2283
2284 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyck80785292009-10-27 15:51:47 +00002285 err = igb_setup_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002286 if (err) {
Alexander Duyck439705e2009-10-27 23:49:20 +00002287 dev_err(&pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08002288 "Allocation for Rx Queue %u failed\n", i);
2289 for (i--; i >= 0; i--)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002290 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002291 break;
2292 }
2293 }
2294
2295 return err;
2296}
2297
2298/**
Alexander Duyck06cf2662009-10-27 15:53:25 +00002299 * igb_setup_mrqc - configure the multiple receive queue control registers
2300 * @adapter: Board private structure
2301 **/
2302static void igb_setup_mrqc(struct igb_adapter *adapter)
2303{
2304 struct e1000_hw *hw = &adapter->hw;
2305 u32 mrqc, rxcsum;
2306 u32 j, num_rx_queues, shift = 0, shift2 = 0;
2307 union e1000_reta {
2308 u32 dword;
2309 u8 bytes[4];
2310 } reta;
2311 static const u8 rsshash[40] = {
2312 0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2, 0x41, 0x67,
2313 0x25, 0x3d, 0x43, 0xa3, 0x8f, 0xb0, 0xd0, 0xca, 0x2b, 0xcb,
2314 0xae, 0x7b, 0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80, 0x30,
2315 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa };
2316
2317 /* Fill out hash function seeds */
2318 for (j = 0; j < 10; j++) {
2319 u32 rsskey = rsshash[(j * 4)];
2320 rsskey |= rsshash[(j * 4) + 1] << 8;
2321 rsskey |= rsshash[(j * 4) + 2] << 16;
2322 rsskey |= rsshash[(j * 4) + 3] << 24;
2323 array_wr32(E1000_RSSRK(0), j, rsskey);
2324 }
2325
Alexander Duycka99955f2009-11-12 18:37:19 +00002326 num_rx_queues = adapter->rss_queues;
Alexander Duyck06cf2662009-10-27 15:53:25 +00002327
2328 if (adapter->vfs_allocated_count) {
2329 /* 82575 and 82576 supports 2 RSS queues for VMDq */
2330 switch (hw->mac.type) {
Alexander Duyck55cac242009-11-19 12:42:21 +00002331 case e1000_82580:
2332 num_rx_queues = 1;
2333 shift = 0;
2334 break;
Alexander Duyck06cf2662009-10-27 15:53:25 +00002335 case e1000_82576:
2336 shift = 3;
2337 num_rx_queues = 2;
2338 break;
2339 case e1000_82575:
2340 shift = 2;
2341 shift2 = 6;
2342 default:
2343 break;
2344 }
2345 } else {
2346 if (hw->mac.type == e1000_82575)
2347 shift = 6;
2348 }
2349
2350 for (j = 0; j < (32 * 4); j++) {
2351 reta.bytes[j & 3] = (j % num_rx_queues) << shift;
2352 if (shift2)
2353 reta.bytes[j & 3] |= num_rx_queues << shift2;
2354 if ((j & 3) == 3)
2355 wr32(E1000_RETA(j >> 2), reta.dword);
2356 }
2357
2358 /*
2359 * Disable raw packet checksumming so that RSS hash is placed in
2360 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
2361 * offloads as they are enabled by default
2362 */
2363 rxcsum = rd32(E1000_RXCSUM);
2364 rxcsum |= E1000_RXCSUM_PCSD;
2365
2366 if (adapter->hw.mac.type >= e1000_82576)
2367 /* Enable Receive Checksum Offload for SCTP */
2368 rxcsum |= E1000_RXCSUM_CRCOFL;
2369
2370 /* Don't need to set TUOFL or IPOFL, they default to 1 */
2371 wr32(E1000_RXCSUM, rxcsum);
2372
2373 /* If VMDq is enabled then we set the appropriate mode for that, else
2374 * we default to RSS so that an RSS hash is calculated per packet even
2375 * if we are only using one queue */
2376 if (adapter->vfs_allocated_count) {
2377 if (hw->mac.type > e1000_82575) {
2378 /* Set the default pool for the PF's first queue */
2379 u32 vtctl = rd32(E1000_VT_CTL);
2380 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
2381 E1000_VT_CTL_DISABLE_DEF_POOL);
2382 vtctl |= adapter->vfs_allocated_count <<
2383 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
2384 wr32(E1000_VT_CTL, vtctl);
2385 }
Alexander Duycka99955f2009-11-12 18:37:19 +00002386 if (adapter->rss_queues > 1)
Alexander Duyck06cf2662009-10-27 15:53:25 +00002387 mrqc = E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
2388 else
2389 mrqc = E1000_MRQC_ENABLE_VMDQ;
2390 } else {
2391 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
2392 }
2393 igb_vmm_control(adapter);
2394
2395 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
2396 E1000_MRQC_RSS_FIELD_IPV4_TCP);
2397 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
2398 E1000_MRQC_RSS_FIELD_IPV6_TCP);
2399 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
2400 E1000_MRQC_RSS_FIELD_IPV6_UDP);
2401 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
2402 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
2403
2404 wr32(E1000_MRQC, mrqc);
2405}
2406
2407/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002408 * igb_setup_rctl - configure the receive control registers
2409 * @adapter: Board private structure
2410 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002411void igb_setup_rctl(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08002412{
2413 struct e1000_hw *hw = &adapter->hw;
2414 u32 rctl;
Auke Kok9d5c8242008-01-24 02:22:38 -08002415
2416 rctl = rd32(E1000_RCTL);
2417
2418 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
Alexander Duyck69d728b2008-11-25 01:04:03 -08002419 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
Auke Kok9d5c8242008-01-24 02:22:38 -08002420
Alexander Duyck69d728b2008-11-25 01:04:03 -08002421 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
Alexander Duyck28b07592009-02-06 23:20:31 +00002422 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
Auke Kok9d5c8242008-01-24 02:22:38 -08002423
Auke Kok87cb7e82008-07-08 15:08:29 -07002424 /*
2425 * enable stripping of CRC. It's unlikely this will break BMC
2426 * redirection as it did with e1000. Newer features require
2427 * that the HW strips the CRC.
Alexander Duyck73cd78f2009-02-12 18:16:59 +00002428 */
Auke Kok87cb7e82008-07-08 15:08:29 -07002429 rctl |= E1000_RCTL_SECRC;
Auke Kok9d5c8242008-01-24 02:22:38 -08002430
Alexander Duyck559e9c42009-10-27 23:52:50 +00002431 /* disable store bad packets and clear size bits. */
Alexander Duyckec54d7d2009-01-31 00:52:57 -08002432 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
Auke Kok9d5c8242008-01-24 02:22:38 -08002433
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00002434 /* enable LPE to prevent packets larger than max_frame_size */
2435 rctl |= E1000_RCTL_LPE;
Auke Kok9d5c8242008-01-24 02:22:38 -08002436
Alexander Duyck952f72a2009-10-27 15:51:07 +00002437 /* disable queue 0 to prevent tail write w/o re-config */
2438 wr32(E1000_RXDCTL(0), 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08002439
Alexander Duycke1739522009-02-19 20:39:44 -08002440 /* Attention!!! For SR-IOV PF driver operations you must enable
2441 * queue drop for all VF and PF queues to prevent head of line blocking
2442 * if an un-trusted VF does not provide descriptors to hardware.
2443 */
2444 if (adapter->vfs_allocated_count) {
Alexander Duycke1739522009-02-19 20:39:44 -08002445 /* set all queue drop enable bits */
2446 wr32(E1000_QDE, ALL_QUEUES);
Alexander Duycke1739522009-02-19 20:39:44 -08002447 }
2448
Auke Kok9d5c8242008-01-24 02:22:38 -08002449 wr32(E1000_RCTL, rctl);
2450}
2451
Alexander Duyck7d5753f2009-10-27 23:47:16 +00002452static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
2453 int vfn)
2454{
2455 struct e1000_hw *hw = &adapter->hw;
2456 u32 vmolr;
2457
2458 /* if it isn't the PF check to see if VFs are enabled and
2459 * increase the size to support vlan tags */
2460 if (vfn < adapter->vfs_allocated_count &&
2461 adapter->vf_data[vfn].vlans_enabled)
2462 size += VLAN_TAG_SIZE;
2463
2464 vmolr = rd32(E1000_VMOLR(vfn));
2465 vmolr &= ~E1000_VMOLR_RLPML_MASK;
2466 vmolr |= size | E1000_VMOLR_LPE;
2467 wr32(E1000_VMOLR(vfn), vmolr);
2468
2469 return 0;
2470}
2471
Auke Kok9d5c8242008-01-24 02:22:38 -08002472/**
Alexander Duycke1739522009-02-19 20:39:44 -08002473 * igb_rlpml_set - set maximum receive packet size
2474 * @adapter: board private structure
2475 *
2476 * Configure maximum receivable packet size.
2477 **/
2478static void igb_rlpml_set(struct igb_adapter *adapter)
2479{
2480 u32 max_frame_size = adapter->max_frame_size;
2481 struct e1000_hw *hw = &adapter->hw;
2482 u16 pf_id = adapter->vfs_allocated_count;
2483
2484 if (adapter->vlgrp)
2485 max_frame_size += VLAN_TAG_SIZE;
2486
2487 /* if vfs are enabled we set RLPML to the largest possible request
2488 * size and set the VMOLR RLPML to the size we need */
2489 if (pf_id) {
2490 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
Alexander Duyck7d5753f2009-10-27 23:47:16 +00002491 max_frame_size = MAX_JUMBO_FRAME_SIZE;
Alexander Duycke1739522009-02-19 20:39:44 -08002492 }
2493
2494 wr32(E1000_RLPML, max_frame_size);
2495}
2496
Alexander Duyck7d5753f2009-10-27 23:47:16 +00002497static inline void igb_set_vmolr(struct igb_adapter *adapter, int vfn)
2498{
2499 struct e1000_hw *hw = &adapter->hw;
2500 u32 vmolr;
2501
2502 /*
2503 * This register exists only on 82576 and newer so if we are older then
2504 * we should exit and do nothing
2505 */
2506 if (hw->mac.type < e1000_82576)
2507 return;
2508
2509 vmolr = rd32(E1000_VMOLR(vfn));
2510 vmolr |= E1000_VMOLR_AUPE | /* Accept untagged packets */
2511 E1000_VMOLR_STRVLAN; /* Strip vlan tags */
2512
2513 /* clear all bits that might not be set */
2514 vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
2515
Alexander Duycka99955f2009-11-12 18:37:19 +00002516 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
Alexander Duyck7d5753f2009-10-27 23:47:16 +00002517 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
2518 /*
2519 * for VMDq only allow the VFs and pool 0 to accept broadcast and
2520 * multicast packets
2521 */
2522 if (vfn <= adapter->vfs_allocated_count)
2523 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
2524
2525 wr32(E1000_VMOLR(vfn), vmolr);
2526}
2527
Alexander Duycke1739522009-02-19 20:39:44 -08002528/**
Alexander Duyck85b430b2009-10-27 15:50:29 +00002529 * igb_configure_rx_ring - Configure a receive ring after Reset
2530 * @adapter: board private structure
2531 * @ring: receive ring to be configured
2532 *
2533 * Configure the Rx unit of the MAC after a reset.
2534 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00002535void igb_configure_rx_ring(struct igb_adapter *adapter,
2536 struct igb_ring *ring)
Alexander Duyck85b430b2009-10-27 15:50:29 +00002537{
2538 struct e1000_hw *hw = &adapter->hw;
2539 u64 rdba = ring->dma;
2540 int reg_idx = ring->reg_idx;
Alexander Duyck952f72a2009-10-27 15:51:07 +00002541 u32 srrctl, rxdctl;
Alexander Duyck85b430b2009-10-27 15:50:29 +00002542
2543 /* disable the queue */
2544 rxdctl = rd32(E1000_RXDCTL(reg_idx));
2545 wr32(E1000_RXDCTL(reg_idx),
2546 rxdctl & ~E1000_RXDCTL_QUEUE_ENABLE);
2547
2548 /* Set DMA base address registers */
2549 wr32(E1000_RDBAL(reg_idx),
2550 rdba & 0x00000000ffffffffULL);
2551 wr32(E1000_RDBAH(reg_idx), rdba >> 32);
2552 wr32(E1000_RDLEN(reg_idx),
2553 ring->count * sizeof(union e1000_adv_rx_desc));
2554
2555 /* initialize head and tail */
Alexander Duyckfce99e32009-10-27 15:51:27 +00002556 ring->head = hw->hw_addr + E1000_RDH(reg_idx);
2557 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
2558 writel(0, ring->head);
2559 writel(0, ring->tail);
Alexander Duyck85b430b2009-10-27 15:50:29 +00002560
Alexander Duyck952f72a2009-10-27 15:51:07 +00002561 /* set descriptor configuration */
Alexander Duyck4c844852009-10-27 15:52:07 +00002562 if (ring->rx_buffer_len < IGB_RXBUFFER_1024) {
2563 srrctl = ALIGN(ring->rx_buffer_len, 64) <<
Alexander Duyck952f72a2009-10-27 15:51:07 +00002564 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
2565#if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
2566 srrctl |= IGB_RXBUFFER_16384 >>
2567 E1000_SRRCTL_BSIZEPKT_SHIFT;
2568#else
2569 srrctl |= (PAGE_SIZE / 2) >>
2570 E1000_SRRCTL_BSIZEPKT_SHIFT;
2571#endif
2572 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
2573 } else {
Alexander Duyck4c844852009-10-27 15:52:07 +00002574 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
Alexander Duyck952f72a2009-10-27 15:51:07 +00002575 E1000_SRRCTL_BSIZEPKT_SHIFT;
2576 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
2577 }
2578
2579 wr32(E1000_SRRCTL(reg_idx), srrctl);
2580
Alexander Duyck7d5753f2009-10-27 23:47:16 +00002581 /* set filtering for VMDQ pools */
2582 igb_set_vmolr(adapter, reg_idx & 0x7);
2583
Alexander Duyck85b430b2009-10-27 15:50:29 +00002584 /* enable receive descriptor fetching */
2585 rxdctl = rd32(E1000_RXDCTL(reg_idx));
2586 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
2587 rxdctl &= 0xFFF00000;
2588 rxdctl |= IGB_RX_PTHRESH;
2589 rxdctl |= IGB_RX_HTHRESH << 8;
2590 rxdctl |= IGB_RX_WTHRESH << 16;
2591 wr32(E1000_RXDCTL(reg_idx), rxdctl);
2592}
2593
2594/**
Auke Kok9d5c8242008-01-24 02:22:38 -08002595 * igb_configure_rx - Configure receive Unit after Reset
2596 * @adapter: board private structure
2597 *
2598 * Configure the Rx unit of the MAC after a reset.
2599 **/
2600static void igb_configure_rx(struct igb_adapter *adapter)
2601{
Hannes Eder91075842009-02-18 19:36:04 -08002602 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08002603
Alexander Duyck68d480c2009-10-05 06:33:08 +00002604 /* set UTA to appropriate mode */
2605 igb_set_uta(adapter);
2606
Alexander Duyck26ad9172009-10-05 06:32:49 +00002607 /* set the correct pool for the PF default MAC address in entry 0 */
2608 igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
2609 adapter->vfs_allocated_count);
2610
Alexander Duyck06cf2662009-10-27 15:53:25 +00002611 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2612 * the Base and Length of the Rx Descriptor Ring */
2613 for (i = 0; i < adapter->num_rx_queues; i++)
2614 igb_configure_rx_ring(adapter, &adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002615}
2616
2617/**
2618 * igb_free_tx_resources - Free Tx Resources per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08002619 * @tx_ring: Tx descriptor ring for a specific queue
2620 *
2621 * Free all transmit software resources
2622 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08002623void igb_free_tx_resources(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002624{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002625 igb_clean_tx_ring(tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08002626
2627 vfree(tx_ring->buffer_info);
2628 tx_ring->buffer_info = NULL;
2629
Alexander Duyck439705e2009-10-27 23:49:20 +00002630 /* if not set, then don't free */
2631 if (!tx_ring->desc)
2632 return;
2633
Alexander Duyck80785292009-10-27 15:51:47 +00002634 pci_free_consistent(tx_ring->pdev, tx_ring->size,
2635 tx_ring->desc, tx_ring->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08002636
2637 tx_ring->desc = NULL;
2638}
2639
2640/**
2641 * igb_free_all_tx_resources - Free Tx Resources for All Queues
2642 * @adapter: board private structure
2643 *
2644 * Free all transmit software resources
2645 **/
2646static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2647{
2648 int i;
2649
2650 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002651 igb_free_tx_resources(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002652}
2653
Alexander Duyckb1a436c2009-10-27 15:54:43 +00002654void igb_unmap_and_free_tx_resource(struct igb_ring *tx_ring,
2655 struct igb_buffer *buffer_info)
Auke Kok9d5c8242008-01-24 02:22:38 -08002656{
Alexander Duyck6366ad32009-12-02 16:47:18 +00002657 if (buffer_info->dma) {
2658 if (buffer_info->mapped_as_page)
2659 pci_unmap_page(tx_ring->pdev,
2660 buffer_info->dma,
2661 buffer_info->length,
2662 PCI_DMA_TODEVICE);
2663 else
2664 pci_unmap_single(tx_ring->pdev,
2665 buffer_info->dma,
2666 buffer_info->length,
2667 PCI_DMA_TODEVICE);
2668 buffer_info->dma = 0;
2669 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002670 if (buffer_info->skb) {
2671 dev_kfree_skb_any(buffer_info->skb);
2672 buffer_info->skb = NULL;
2673 }
2674 buffer_info->time_stamp = 0;
Alexander Duyck6366ad32009-12-02 16:47:18 +00002675 buffer_info->length = 0;
2676 buffer_info->next_to_watch = 0;
2677 buffer_info->mapped_as_page = false;
Auke Kok9d5c8242008-01-24 02:22:38 -08002678}
2679
2680/**
2681 * igb_clean_tx_ring - Free Tx Buffers
Auke Kok9d5c8242008-01-24 02:22:38 -08002682 * @tx_ring: ring to be cleaned
2683 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002684static void igb_clean_tx_ring(struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002685{
2686 struct igb_buffer *buffer_info;
2687 unsigned long size;
2688 unsigned int i;
2689
2690 if (!tx_ring->buffer_info)
2691 return;
2692 /* Free all the Tx ring sk_buffs */
2693
2694 for (i = 0; i < tx_ring->count; i++) {
2695 buffer_info = &tx_ring->buffer_info[i];
Alexander Duyck80785292009-10-27 15:51:47 +00002696 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
Auke Kok9d5c8242008-01-24 02:22:38 -08002697 }
2698
2699 size = sizeof(struct igb_buffer) * tx_ring->count;
2700 memset(tx_ring->buffer_info, 0, size);
2701
2702 /* Zero out the descriptor ring */
Auke Kok9d5c8242008-01-24 02:22:38 -08002703 memset(tx_ring->desc, 0, tx_ring->size);
2704
2705 tx_ring->next_to_use = 0;
2706 tx_ring->next_to_clean = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002707}
2708
2709/**
2710 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2711 * @adapter: board private structure
2712 **/
2713static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2714{
2715 int i;
2716
2717 for (i = 0; i < adapter->num_tx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002718 igb_clean_tx_ring(&adapter->tx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002719}
2720
2721/**
2722 * igb_free_rx_resources - Free Rx Resources
Auke Kok9d5c8242008-01-24 02:22:38 -08002723 * @rx_ring: ring to clean the resources from
2724 *
2725 * Free all receive software resources
2726 **/
Alexander Duyck68fd9912008-11-20 00:48:10 -08002727void igb_free_rx_resources(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002728{
Mitch Williams3b644cf2008-06-27 10:59:48 -07002729 igb_clean_rx_ring(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08002730
2731 vfree(rx_ring->buffer_info);
2732 rx_ring->buffer_info = NULL;
2733
Alexander Duyck439705e2009-10-27 23:49:20 +00002734 /* if not set, then don't free */
2735 if (!rx_ring->desc)
2736 return;
2737
Alexander Duyck80785292009-10-27 15:51:47 +00002738 pci_free_consistent(rx_ring->pdev, rx_ring->size,
2739 rx_ring->desc, rx_ring->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08002740
2741 rx_ring->desc = NULL;
2742}
2743
2744/**
2745 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2746 * @adapter: board private structure
2747 *
2748 * Free all receive software resources
2749 **/
2750static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2751{
2752 int i;
2753
2754 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002755 igb_free_rx_resources(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002756}
2757
2758/**
2759 * igb_clean_rx_ring - Free Rx Buffers per Queue
Auke Kok9d5c8242008-01-24 02:22:38 -08002760 * @rx_ring: ring to free buffers from
2761 **/
Mitch Williams3b644cf2008-06-27 10:59:48 -07002762static void igb_clean_rx_ring(struct igb_ring *rx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08002763{
2764 struct igb_buffer *buffer_info;
Auke Kok9d5c8242008-01-24 02:22:38 -08002765 unsigned long size;
2766 unsigned int i;
2767
2768 if (!rx_ring->buffer_info)
2769 return;
Alexander Duyck439705e2009-10-27 23:49:20 +00002770
Auke Kok9d5c8242008-01-24 02:22:38 -08002771 /* Free all the Rx ring sk_buffs */
2772 for (i = 0; i < rx_ring->count; i++) {
2773 buffer_info = &rx_ring->buffer_info[i];
2774 if (buffer_info->dma) {
Alexander Duyck80785292009-10-27 15:51:47 +00002775 pci_unmap_single(rx_ring->pdev,
2776 buffer_info->dma,
Alexander Duyck4c844852009-10-27 15:52:07 +00002777 rx_ring->rx_buffer_len,
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00002778 PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08002779 buffer_info->dma = 0;
2780 }
2781
2782 if (buffer_info->skb) {
2783 dev_kfree_skb(buffer_info->skb);
2784 buffer_info->skb = NULL;
2785 }
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00002786 if (buffer_info->page_dma) {
Alexander Duyck80785292009-10-27 15:51:47 +00002787 pci_unmap_page(rx_ring->pdev,
2788 buffer_info->page_dma,
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00002789 PAGE_SIZE / 2,
2790 PCI_DMA_FROMDEVICE);
2791 buffer_info->page_dma = 0;
2792 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002793 if (buffer_info->page) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002794 put_page(buffer_info->page);
2795 buffer_info->page = NULL;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07002796 buffer_info->page_offset = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002797 }
2798 }
2799
Auke Kok9d5c8242008-01-24 02:22:38 -08002800 size = sizeof(struct igb_buffer) * rx_ring->count;
2801 memset(rx_ring->buffer_info, 0, size);
2802
2803 /* Zero out the descriptor ring */
2804 memset(rx_ring->desc, 0, rx_ring->size);
2805
2806 rx_ring->next_to_clean = 0;
2807 rx_ring->next_to_use = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08002808}
2809
2810/**
2811 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2812 * @adapter: board private structure
2813 **/
2814static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2815{
2816 int i;
2817
2818 for (i = 0; i < adapter->num_rx_queues; i++)
Mitch Williams3b644cf2008-06-27 10:59:48 -07002819 igb_clean_rx_ring(&adapter->rx_ring[i]);
Auke Kok9d5c8242008-01-24 02:22:38 -08002820}
2821
2822/**
2823 * igb_set_mac - Change the Ethernet Address of the NIC
2824 * @netdev: network interface device structure
2825 * @p: pointer to an address structure
2826 *
2827 * Returns 0 on success, negative on failure
2828 **/
2829static int igb_set_mac(struct net_device *netdev, void *p)
2830{
2831 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck28b07592009-02-06 23:20:31 +00002832 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08002833 struct sockaddr *addr = p;
2834
2835 if (!is_valid_ether_addr(addr->sa_data))
2836 return -EADDRNOTAVAIL;
2837
2838 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Alexander Duyck28b07592009-02-06 23:20:31 +00002839 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9d5c8242008-01-24 02:22:38 -08002840
Alexander Duyck26ad9172009-10-05 06:32:49 +00002841 /* set the correct pool for the new PF MAC address in entry 0 */
2842 igb_rar_set_qsel(adapter, hw->mac.addr, 0,
2843 adapter->vfs_allocated_count);
Alexander Duycke1739522009-02-19 20:39:44 -08002844
Auke Kok9d5c8242008-01-24 02:22:38 -08002845 return 0;
2846}
2847
2848/**
Alexander Duyck68d480c2009-10-05 06:33:08 +00002849 * igb_write_mc_addr_list - write multicast addresses to MTA
2850 * @netdev: network interface device structure
2851 *
2852 * Writes multicast address list to the MTA hash table.
2853 * Returns: -ENOMEM on failure
2854 * 0 on no addresses written
2855 * X on writing X addresses to MTA
2856 **/
2857static int igb_write_mc_addr_list(struct net_device *netdev)
2858{
2859 struct igb_adapter *adapter = netdev_priv(netdev);
2860 struct e1000_hw *hw = &adapter->hw;
2861 struct dev_mc_list *mc_ptr = netdev->mc_list;
2862 u8 *mta_list;
2863 u32 vmolr = 0;
2864 int i;
2865
2866 if (!netdev->mc_count) {
2867 /* nothing to program, so clear mc list */
2868 igb_update_mc_addr_list(hw, NULL, 0);
2869 igb_restore_vf_multicasts(adapter);
2870 return 0;
2871 }
2872
2873 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2874 if (!mta_list)
2875 return -ENOMEM;
2876
2877 /* set vmolr receive overflow multicast bit */
2878 vmolr |= E1000_VMOLR_ROMPE;
2879
2880 /* The shared function expects a packed array of only addresses. */
2881 mc_ptr = netdev->mc_list;
2882
2883 for (i = 0; i < netdev->mc_count; i++) {
2884 if (!mc_ptr)
2885 break;
2886 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2887 mc_ptr = mc_ptr->next;
2888 }
2889 igb_update_mc_addr_list(hw, mta_list, i);
2890 kfree(mta_list);
2891
2892 return netdev->mc_count;
2893}
2894
2895/**
2896 * igb_write_uc_addr_list - write unicast addresses to RAR table
2897 * @netdev: network interface device structure
2898 *
2899 * Writes unicast address list to the RAR table.
2900 * Returns: -ENOMEM on failure/insufficient address space
2901 * 0 on no addresses written
2902 * X on writing X addresses to the RAR table
2903 **/
2904static int igb_write_uc_addr_list(struct net_device *netdev)
2905{
2906 struct igb_adapter *adapter = netdev_priv(netdev);
2907 struct e1000_hw *hw = &adapter->hw;
2908 unsigned int vfn = adapter->vfs_allocated_count;
2909 unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2910 int count = 0;
2911
2912 /* return ENOMEM indicating insufficient memory for addresses */
2913 if (netdev->uc.count > rar_entries)
2914 return -ENOMEM;
2915
2916 if (netdev->uc.count && rar_entries) {
2917 struct netdev_hw_addr *ha;
2918 list_for_each_entry(ha, &netdev->uc.list, list) {
2919 if (!rar_entries)
2920 break;
2921 igb_rar_set_qsel(adapter, ha->addr,
2922 rar_entries--,
2923 vfn);
2924 count++;
2925 }
2926 }
2927 /* write the addresses in reverse order to avoid write combining */
2928 for (; rar_entries > 0 ; rar_entries--) {
2929 wr32(E1000_RAH(rar_entries), 0);
2930 wr32(E1000_RAL(rar_entries), 0);
2931 }
2932 wrfl();
2933
2934 return count;
2935}
2936
2937/**
Alexander Duyckff41f8d2009-09-03 14:48:56 +00002938 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
Auke Kok9d5c8242008-01-24 02:22:38 -08002939 * @netdev: network interface device structure
2940 *
Alexander Duyckff41f8d2009-09-03 14:48:56 +00002941 * The set_rx_mode entry point is called whenever the unicast or multicast
2942 * address lists or the network interface flags are updated. This routine is
2943 * responsible for configuring the hardware for proper unicast, multicast,
Auke Kok9d5c8242008-01-24 02:22:38 -08002944 * promiscuous mode, and all-multi behavior.
2945 **/
Alexander Duyckff41f8d2009-09-03 14:48:56 +00002946static void igb_set_rx_mode(struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08002947{
2948 struct igb_adapter *adapter = netdev_priv(netdev);
2949 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck68d480c2009-10-05 06:33:08 +00002950 unsigned int vfn = adapter->vfs_allocated_count;
2951 u32 rctl, vmolr = 0;
2952 int count;
Auke Kok9d5c8242008-01-24 02:22:38 -08002953
2954 /* Check for Promiscuous and All Multicast modes */
Auke Kok9d5c8242008-01-24 02:22:38 -08002955 rctl = rd32(E1000_RCTL);
2956
Alexander Duyck68d480c2009-10-05 06:33:08 +00002957 /* clear the effected bits */
2958 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
2959
Patrick McHardy746b9f02008-07-16 20:15:45 -07002960 if (netdev->flags & IFF_PROMISC) {
Auke Kok9d5c8242008-01-24 02:22:38 -08002961 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
Alexander Duyck68d480c2009-10-05 06:33:08 +00002962 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
Patrick McHardy746b9f02008-07-16 20:15:45 -07002963 } else {
Alexander Duyck68d480c2009-10-05 06:33:08 +00002964 if (netdev->flags & IFF_ALLMULTI) {
Patrick McHardy746b9f02008-07-16 20:15:45 -07002965 rctl |= E1000_RCTL_MPE;
Alexander Duyck68d480c2009-10-05 06:33:08 +00002966 vmolr |= E1000_VMOLR_MPME;
2967 } else {
2968 /*
2969 * Write addresses to the MTA, if the attempt fails
2970 * then we should just turn on promiscous mode so
2971 * that we can at least receive multicast traffic
2972 */
2973 count = igb_write_mc_addr_list(netdev);
2974 if (count < 0) {
2975 rctl |= E1000_RCTL_MPE;
2976 vmolr |= E1000_VMOLR_MPME;
2977 } else if (count) {
2978 vmolr |= E1000_VMOLR_ROMPE;
2979 }
2980 }
2981 /*
2982 * Write addresses to available RAR registers, if there is not
2983 * sufficient space to store all the addresses then enable
2984 * unicast promiscous mode
2985 */
2986 count = igb_write_uc_addr_list(netdev);
2987 if (count < 0) {
Alexander Duyckff41f8d2009-09-03 14:48:56 +00002988 rctl |= E1000_RCTL_UPE;
Alexander Duyck68d480c2009-10-05 06:33:08 +00002989 vmolr |= E1000_VMOLR_ROPE;
2990 }
Patrick McHardy78ed11a2008-07-16 20:16:14 -07002991 rctl |= E1000_RCTL_VFE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07002992 }
Auke Kok9d5c8242008-01-24 02:22:38 -08002993 wr32(E1000_RCTL, rctl);
2994
Alexander Duyck68d480c2009-10-05 06:33:08 +00002995 /*
2996 * In order to support SR-IOV and eventually VMDq it is necessary to set
2997 * the VMOLR to enable the appropriate modes. Without this workaround
2998 * we will have issues with VLAN tag stripping not being done for frames
2999 * that are only arriving because we are the default pool
3000 */
3001 if (hw->mac.type < e1000_82576)
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003002 return;
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003003
Alexander Duyck68d480c2009-10-05 06:33:08 +00003004 vmolr |= rd32(E1000_VMOLR(vfn)) &
3005 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3006 wr32(E1000_VMOLR(vfn), vmolr);
Alexander Duyck28fc06f2009-07-23 18:08:54 +00003007 igb_restore_vf_multicasts(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003008}
3009
3010/* Need to wait a few seconds after link up to get diagnostic information from
3011 * the phy */
3012static void igb_update_phy_info(unsigned long data)
3013{
3014 struct igb_adapter *adapter = (struct igb_adapter *) data;
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08003015 igb_get_phy_info(&adapter->hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08003016}
3017
3018/**
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003019 * igb_has_link - check shared code for link and determine up/down
3020 * @adapter: pointer to driver private info
3021 **/
3022static bool igb_has_link(struct igb_adapter *adapter)
3023{
3024 struct e1000_hw *hw = &adapter->hw;
3025 bool link_active = false;
3026 s32 ret_val = 0;
3027
3028 /* get_link_status is set on LSC (link status) interrupt or
3029 * rx sequence error interrupt. get_link_status will stay
3030 * false until the e1000_check_for_link establishes link
3031 * for copper adapters ONLY
3032 */
3033 switch (hw->phy.media_type) {
3034 case e1000_media_type_copper:
3035 if (hw->mac.get_link_status) {
3036 ret_val = hw->mac.ops.check_for_link(hw);
3037 link_active = !hw->mac.get_link_status;
3038 } else {
3039 link_active = true;
3040 }
3041 break;
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003042 case e1000_media_type_internal_serdes:
3043 ret_val = hw->mac.ops.check_for_link(hw);
3044 link_active = hw->mac.serdes_has_link;
3045 break;
3046 default:
3047 case e1000_media_type_unknown:
3048 break;
3049 }
3050
3051 return link_active;
3052}
3053
3054/**
Auke Kok9d5c8242008-01-24 02:22:38 -08003055 * igb_watchdog - Timer Call-back
3056 * @data: pointer to adapter cast into an unsigned long
3057 **/
3058static void igb_watchdog(unsigned long data)
3059{
3060 struct igb_adapter *adapter = (struct igb_adapter *)data;
3061 /* Do the rest outside of interrupt context */
3062 schedule_work(&adapter->watchdog_task);
3063}
3064
3065static void igb_watchdog_task(struct work_struct *work)
3066{
3067 struct igb_adapter *adapter = container_of(work,
Alexander Duyck559e9c42009-10-27 23:52:50 +00003068 struct igb_adapter,
3069 watchdog_task);
Auke Kok9d5c8242008-01-24 02:22:38 -08003070 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08003071 struct net_device *netdev = adapter->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003072 u32 link;
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003073 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003074
Alexander Duyck4d6b7252009-02-06 23:16:24 +00003075 link = igb_has_link(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003076 if (link) {
3077 if (!netif_carrier_ok(netdev)) {
3078 u32 ctrl;
Alexander Duyck330a6d62009-10-27 23:51:35 +00003079 hw->mac.ops.get_speed_and_duplex(hw,
3080 &adapter->link_speed,
3081 &adapter->link_duplex);
Auke Kok9d5c8242008-01-24 02:22:38 -08003082
3083 ctrl = rd32(E1000_CTRL);
Alexander Duyck527d47c2008-11-27 00:21:39 -08003084 /* Links status message must follow this format */
3085 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
Auke Kok9d5c8242008-01-24 02:22:38 -08003086 "Flow Control: %s\n",
Alexander Duyck559e9c42009-10-27 23:52:50 +00003087 netdev->name,
3088 adapter->link_speed,
3089 adapter->link_duplex == FULL_DUPLEX ?
Auke Kok9d5c8242008-01-24 02:22:38 -08003090 "Full Duplex" : "Half Duplex",
Alexander Duyck559e9c42009-10-27 23:52:50 +00003091 ((ctrl & E1000_CTRL_TFCE) &&
3092 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX" :
3093 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3094 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
Auke Kok9d5c8242008-01-24 02:22:38 -08003095
3096 /* tweak tx_queue_len according to speed/duplex and
3097 * adjust the timeout factor */
3098 netdev->tx_queue_len = adapter->tx_queue_len;
3099 adapter->tx_timeout_factor = 1;
3100 switch (adapter->link_speed) {
3101 case SPEED_10:
3102 netdev->tx_queue_len = 10;
3103 adapter->tx_timeout_factor = 14;
3104 break;
3105 case SPEED_100:
3106 netdev->tx_queue_len = 100;
3107 /* maybe add some timeout factor ? */
3108 break;
3109 }
3110
3111 netif_carrier_on(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003112
Alexander Duyck4ae196d2009-02-19 20:40:07 -08003113 igb_ping_all_vfs(adapter);
3114
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003115 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08003116 if (!test_bit(__IGB_DOWN, &adapter->state))
3117 mod_timer(&adapter->phy_info_timer,
3118 round_jiffies(jiffies + 2 * HZ));
3119 }
3120 } else {
3121 if (netif_carrier_ok(netdev)) {
3122 adapter->link_speed = 0;
3123 adapter->link_duplex = 0;
Alexander Duyck527d47c2008-11-27 00:21:39 -08003124 /* Links status message must follow this format */
3125 printk(KERN_INFO "igb: %s NIC Link is Down\n",
3126 netdev->name);
Auke Kok9d5c8242008-01-24 02:22:38 -08003127 netif_carrier_off(netdev);
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003128
Alexander Duyck4ae196d2009-02-19 20:40:07 -08003129 igb_ping_all_vfs(adapter);
3130
Alexander Duyck4b1a9872009-02-06 23:19:50 +00003131 /* link state has changed, schedule phy info update */
Auke Kok9d5c8242008-01-24 02:22:38 -08003132 if (!test_bit(__IGB_DOWN, &adapter->state))
3133 mod_timer(&adapter->phy_info_timer,
3134 round_jiffies(jiffies + 2 * HZ));
3135 }
3136 }
3137
Auke Kok9d5c8242008-01-24 02:22:38 -08003138 igb_update_stats(adapter);
Alexander Duyck645a3ab2009-10-27 23:50:18 +00003139 igb_update_adaptive(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08003140
Alexander Duyckdbabb062009-11-12 18:38:16 +00003141 for (i = 0; i < adapter->num_tx_queues; i++) {
3142 struct igb_ring *tx_ring = &adapter->tx_ring[i];
3143 if (!netif_carrier_ok(netdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003144 /* We've lost link, so the controller stops DMA,
3145 * but we've got queued Tx work that's never going
3146 * to get done, so reset controller to flush Tx.
3147 * (Do the reset outside of interrupt context). */
Alexander Duyckdbabb062009-11-12 18:38:16 +00003148 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
3149 adapter->tx_timeout_count++;
3150 schedule_work(&adapter->reset_task);
3151 /* return immediately since reset is imminent */
3152 return;
3153 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003154 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003155
Alexander Duyckdbabb062009-11-12 18:38:16 +00003156 /* Force detection of hung controller every watchdog period */
3157 tx_ring->detect_tx_hung = true;
3158 }
Alexander Duyckf7ba2052009-10-27 23:48:51 +00003159
Auke Kok9d5c8242008-01-24 02:22:38 -08003160 /* Cause software interrupt to ensure rx ring is cleaned */
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003161 if (adapter->msix_entries) {
Alexander Duyck047e0032009-10-27 15:49:27 +00003162 u32 eics = 0;
3163 for (i = 0; i < adapter->num_q_vectors; i++) {
3164 struct igb_q_vector *q_vector = adapter->q_vector[i];
3165 eics |= q_vector->eims_value;
3166 }
Alexander Duyck7a6ea552008-08-26 04:25:03 -07003167 wr32(E1000_EICS, eics);
3168 } else {
3169 wr32(E1000_ICS, E1000_ICS_RXDMT0);
3170 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003171
Auke Kok9d5c8242008-01-24 02:22:38 -08003172 /* Reset the timer */
3173 if (!test_bit(__IGB_DOWN, &adapter->state))
3174 mod_timer(&adapter->watchdog_timer,
3175 round_jiffies(jiffies + 2 * HZ));
3176}
3177
3178enum latency_range {
3179 lowest_latency = 0,
3180 low_latency = 1,
3181 bulk_latency = 2,
3182 latency_invalid = 255
3183};
3184
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003185/**
3186 * igb_update_ring_itr - update the dynamic ITR value based on packet size
3187 *
3188 * Stores a new ITR value based on strictly on packet size. This
3189 * algorithm is less sophisticated than that used in igb_update_itr,
3190 * due to the difficulty of synchronizing statistics across multiple
3191 * receive rings. The divisors and thresholds used by this fuction
3192 * were determined based on theoretical maximum wire speed and testing
3193 * data, in order to minimize response time while increasing bulk
3194 * throughput.
3195 * This functionality is controlled by the InterruptThrottleRate module
3196 * parameter (see igb_param.c)
3197 * NOTE: This function is called only when operating in a multiqueue
3198 * receive environment.
Alexander Duyck047e0032009-10-27 15:49:27 +00003199 * @q_vector: pointer to q_vector
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003200 **/
Alexander Duyck047e0032009-10-27 15:49:27 +00003201static void igb_update_ring_itr(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08003202{
Alexander Duyck047e0032009-10-27 15:49:27 +00003203 int new_val = q_vector->itr_val;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003204 int avg_wire_size = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +00003205 struct igb_adapter *adapter = q_vector->adapter;
Auke Kok9d5c8242008-01-24 02:22:38 -08003206
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003207 /* For non-gigabit speeds, just fix the interrupt rate at 4000
3208 * ints/sec - ITR timer value of 120 ticks.
3209 */
3210 if (adapter->link_speed != SPEED_1000) {
Alexander Duyck047e0032009-10-27 15:49:27 +00003211 new_val = 976;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003212 goto set_itr_val;
3213 }
Alexander Duyck047e0032009-10-27 15:49:27 +00003214
3215 if (q_vector->rx_ring && q_vector->rx_ring->total_packets) {
3216 struct igb_ring *ring = q_vector->rx_ring;
3217 avg_wire_size = ring->total_bytes / ring->total_packets;
3218 }
3219
3220 if (q_vector->tx_ring && q_vector->tx_ring->total_packets) {
3221 struct igb_ring *ring = q_vector->tx_ring;
3222 avg_wire_size = max_t(u32, avg_wire_size,
3223 (ring->total_bytes /
3224 ring->total_packets));
3225 }
3226
3227 /* if avg_wire_size isn't set no work was done */
3228 if (!avg_wire_size)
3229 goto clear_counts;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003230
3231 /* Add 24 bytes to size to account for CRC, preamble, and gap */
3232 avg_wire_size += 24;
3233
3234 /* Don't starve jumbo frames */
3235 avg_wire_size = min(avg_wire_size, 3000);
3236
3237 /* Give a little boost to mid-size frames */
3238 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
3239 new_val = avg_wire_size / 3;
3240 else
3241 new_val = avg_wire_size / 2;
3242
3243set_itr_val:
Alexander Duyck047e0032009-10-27 15:49:27 +00003244 if (new_val != q_vector->itr_val) {
3245 q_vector->itr_val = new_val;
3246 q_vector->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08003247 }
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003248clear_counts:
Alexander Duyck047e0032009-10-27 15:49:27 +00003249 if (q_vector->rx_ring) {
3250 q_vector->rx_ring->total_bytes = 0;
3251 q_vector->rx_ring->total_packets = 0;
3252 }
3253 if (q_vector->tx_ring) {
3254 q_vector->tx_ring->total_bytes = 0;
3255 q_vector->tx_ring->total_packets = 0;
3256 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003257}
3258
3259/**
3260 * igb_update_itr - update the dynamic ITR value based on statistics
3261 * Stores a new ITR value based on packets and byte
3262 * counts during the last interrupt. The advantage of per interrupt
3263 * computation is faster updates and more accurate ITR for the current
3264 * traffic pattern. Constants in this function were computed
3265 * based on theoretical maximum wire speed and thresholds were set based
3266 * on testing data as well as attempting to minimize response time
3267 * while increasing bulk throughput.
3268 * this functionality is controlled by the InterruptThrottleRate module
3269 * parameter (see igb_param.c)
3270 * NOTE: These calculations are only valid when operating in a single-
3271 * queue environment.
3272 * @adapter: pointer to adapter
Alexander Duyck047e0032009-10-27 15:49:27 +00003273 * @itr_setting: current q_vector->itr_val
Auke Kok9d5c8242008-01-24 02:22:38 -08003274 * @packets: the number of packets during this measurement interval
3275 * @bytes: the number of bytes during this measurement interval
3276 **/
3277static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
3278 int packets, int bytes)
3279{
3280 unsigned int retval = itr_setting;
3281
3282 if (packets == 0)
3283 goto update_itr_done;
3284
3285 switch (itr_setting) {
3286 case lowest_latency:
3287 /* handle TSO and jumbo frames */
3288 if (bytes/packets > 8000)
3289 retval = bulk_latency;
3290 else if ((packets < 5) && (bytes > 512))
3291 retval = low_latency;
3292 break;
3293 case low_latency: /* 50 usec aka 20000 ints/s */
3294 if (bytes > 10000) {
3295 /* this if handles the TSO accounting */
3296 if (bytes/packets > 8000) {
3297 retval = bulk_latency;
3298 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
3299 retval = bulk_latency;
3300 } else if ((packets > 35)) {
3301 retval = lowest_latency;
3302 }
3303 } else if (bytes/packets > 2000) {
3304 retval = bulk_latency;
3305 } else if (packets <= 2 && bytes < 512) {
3306 retval = lowest_latency;
3307 }
3308 break;
3309 case bulk_latency: /* 250 usec aka 4000 ints/s */
3310 if (bytes > 25000) {
3311 if (packets > 35)
3312 retval = low_latency;
Alexander Duyck1e5c3d22009-02-12 18:17:21 +00003313 } else if (bytes < 1500) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003314 retval = low_latency;
3315 }
3316 break;
3317 }
3318
3319update_itr_done:
3320 return retval;
3321}
3322
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003323static void igb_set_itr(struct igb_adapter *adapter)
Auke Kok9d5c8242008-01-24 02:22:38 -08003324{
Alexander Duyck047e0032009-10-27 15:49:27 +00003325 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08003326 u16 current_itr;
Alexander Duyck047e0032009-10-27 15:49:27 +00003327 u32 new_itr = q_vector->itr_val;
Auke Kok9d5c8242008-01-24 02:22:38 -08003328
3329 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
3330 if (adapter->link_speed != SPEED_1000) {
3331 current_itr = 0;
3332 new_itr = 4000;
3333 goto set_itr_now;
3334 }
3335
3336 adapter->rx_itr = igb_update_itr(adapter,
3337 adapter->rx_itr,
3338 adapter->rx_ring->total_packets,
3339 adapter->rx_ring->total_bytes);
Auke Kok9d5c8242008-01-24 02:22:38 -08003340
Alexander Duyck047e0032009-10-27 15:49:27 +00003341 adapter->tx_itr = igb_update_itr(adapter,
3342 adapter->tx_itr,
3343 adapter->tx_ring->total_packets,
3344 adapter->tx_ring->total_bytes);
3345 current_itr = max(adapter->rx_itr, adapter->tx_itr);
Auke Kok9d5c8242008-01-24 02:22:38 -08003346
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003347 /* conservative mode (itr 3) eliminates the lowest_latency setting */
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00003348 if (adapter->rx_itr_setting == 3 && current_itr == lowest_latency)
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003349 current_itr = low_latency;
3350
Auke Kok9d5c8242008-01-24 02:22:38 -08003351 switch (current_itr) {
3352 /* counts and packets in update_itr are dependent on these numbers */
3353 case lowest_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003354 new_itr = 56; /* aka 70,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003355 break;
3356 case low_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003357 new_itr = 196; /* aka 20,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003358 break;
3359 case bulk_latency:
Alexander Duyck78b1f6072009-04-23 11:20:29 +00003360 new_itr = 980; /* aka 4,000 ints/sec */
Auke Kok9d5c8242008-01-24 02:22:38 -08003361 break;
3362 default:
3363 break;
3364 }
3365
3366set_itr_now:
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003367 adapter->rx_ring->total_bytes = 0;
3368 adapter->rx_ring->total_packets = 0;
Alexander Duyck047e0032009-10-27 15:49:27 +00003369 adapter->tx_ring->total_bytes = 0;
3370 adapter->tx_ring->total_packets = 0;
Alexander Duyck6eb5a7f2008-07-08 15:14:44 -07003371
Alexander Duyck047e0032009-10-27 15:49:27 +00003372 if (new_itr != q_vector->itr_val) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003373 /* this attempts to bias the interrupt rate towards Bulk
3374 * by adding intermediate steps when interrupt rate is
3375 * increasing */
Alexander Duyck047e0032009-10-27 15:49:27 +00003376 new_itr = new_itr > q_vector->itr_val ?
3377 max((new_itr * q_vector->itr_val) /
3378 (new_itr + (q_vector->itr_val >> 2)),
3379 new_itr) :
Auke Kok9d5c8242008-01-24 02:22:38 -08003380 new_itr;
3381 /* Don't write the value here; it resets the adapter's
3382 * internal timer, and causes us to delay far longer than
3383 * we should between interrupts. Instead, we write the ITR
3384 * value at the beginning of the next interrupt so the timing
3385 * ends up being correct.
3386 */
Alexander Duyck047e0032009-10-27 15:49:27 +00003387 q_vector->itr_val = new_itr;
3388 q_vector->set_itr = 1;
Auke Kok9d5c8242008-01-24 02:22:38 -08003389 }
3390
3391 return;
3392}
3393
Auke Kok9d5c8242008-01-24 02:22:38 -08003394#define IGB_TX_FLAGS_CSUM 0x00000001
3395#define IGB_TX_FLAGS_VLAN 0x00000002
3396#define IGB_TX_FLAGS_TSO 0x00000004
3397#define IGB_TX_FLAGS_IPV4 0x00000008
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003398#define IGB_TX_FLAGS_TSTAMP 0x00000010
3399#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
3400#define IGB_TX_FLAGS_VLAN_SHIFT 16
Auke Kok9d5c8242008-01-24 02:22:38 -08003401
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003402static inline int igb_tso_adv(struct igb_ring *tx_ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08003403 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
3404{
3405 struct e1000_adv_tx_context_desc *context_desc;
3406 unsigned int i;
3407 int err;
3408 struct igb_buffer *buffer_info;
3409 u32 info = 0, tu_cmd = 0;
3410 u32 mss_l4len_idx, l4len;
3411 *hdr_len = 0;
3412
3413 if (skb_header_cloned(skb)) {
3414 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3415 if (err)
3416 return err;
3417 }
3418
3419 l4len = tcp_hdrlen(skb);
3420 *hdr_len += l4len;
3421
3422 if (skb->protocol == htons(ETH_P_IP)) {
3423 struct iphdr *iph = ip_hdr(skb);
3424 iph->tot_len = 0;
3425 iph->check = 0;
3426 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3427 iph->daddr, 0,
3428 IPPROTO_TCP,
3429 0);
3430 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3431 ipv6_hdr(skb)->payload_len = 0;
3432 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3433 &ipv6_hdr(skb)->daddr,
3434 0, IPPROTO_TCP, 0);
3435 }
3436
3437 i = tx_ring->next_to_use;
3438
3439 buffer_info = &tx_ring->buffer_info[i];
3440 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
3441 /* VLAN MACLEN IPLEN */
3442 if (tx_flags & IGB_TX_FLAGS_VLAN)
3443 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
3444 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
3445 *hdr_len += skb_network_offset(skb);
3446 info |= skb_network_header_len(skb);
3447 *hdr_len += skb_network_header_len(skb);
3448 context_desc->vlan_macip_lens = cpu_to_le32(info);
3449
3450 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3451 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
3452
3453 if (skb->protocol == htons(ETH_P_IP))
3454 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
3455 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
3456
3457 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
3458
3459 /* MSS L4LEN IDX */
3460 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
3461 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
3462
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003463 /* For 82575, context index must be unique per ring. */
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003464 if (tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX)
3465 mss_l4len_idx |= tx_ring->reg_idx << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08003466
3467 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3468 context_desc->seqnum_seed = 0;
3469
3470 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003471 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003472 buffer_info->dma = 0;
3473 i++;
3474 if (i == tx_ring->count)
3475 i = 0;
3476
3477 tx_ring->next_to_use = i;
3478
3479 return true;
3480}
3481
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003482static inline bool igb_tx_csum_adv(struct igb_ring *tx_ring,
3483 struct sk_buff *skb, u32 tx_flags)
Auke Kok9d5c8242008-01-24 02:22:38 -08003484{
3485 struct e1000_adv_tx_context_desc *context_desc;
Alexander Duyck80785292009-10-27 15:51:47 +00003486 struct pci_dev *pdev = tx_ring->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003487 struct igb_buffer *buffer_info;
3488 u32 info = 0, tu_cmd = 0;
Alexander Duyck80785292009-10-27 15:51:47 +00003489 unsigned int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003490
3491 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
3492 (tx_flags & IGB_TX_FLAGS_VLAN)) {
3493 i = tx_ring->next_to_use;
3494 buffer_info = &tx_ring->buffer_info[i];
3495 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
3496
3497 if (tx_flags & IGB_TX_FLAGS_VLAN)
3498 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003499
Auke Kok9d5c8242008-01-24 02:22:38 -08003500 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
3501 if (skb->ip_summed == CHECKSUM_PARTIAL)
3502 info |= skb_network_header_len(skb);
3503
3504 context_desc->vlan_macip_lens = cpu_to_le32(info);
3505
3506 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
3507
3508 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Arthur Jonesfa4a7ef2009-03-21 16:55:07 -07003509 __be16 protocol;
3510
3511 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) {
3512 const struct vlan_ethhdr *vhdr =
3513 (const struct vlan_ethhdr*)skb->data;
3514
3515 protocol = vhdr->h_vlan_encapsulated_proto;
3516 } else {
3517 protocol = skb->protocol;
3518 }
3519
3520 switch (protocol) {
Harvey Harrison09640e62009-02-01 00:45:17 -08003521 case cpu_to_be16(ETH_P_IP):
Auke Kok9d5c8242008-01-24 02:22:38 -08003522 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
Mitch Williams44b0cda2008-03-07 10:32:13 -08003523 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3524 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburgb9473562009-04-27 22:36:13 +00003525 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
3526 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
Mitch Williams44b0cda2008-03-07 10:32:13 -08003527 break;
Harvey Harrison09640e62009-02-01 00:45:17 -08003528 case cpu_to_be16(ETH_P_IPV6):
Mitch Williams44b0cda2008-03-07 10:32:13 -08003529 /* XXX what about other V6 headers?? */
3530 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3531 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburgb9473562009-04-27 22:36:13 +00003532 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
3533 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
Mitch Williams44b0cda2008-03-07 10:32:13 -08003534 break;
3535 default:
3536 if (unlikely(net_ratelimit()))
Alexander Duyck80785292009-10-27 15:51:47 +00003537 dev_warn(&pdev->dev,
Mitch Williams44b0cda2008-03-07 10:32:13 -08003538 "partial checksum but proto=%x!\n",
3539 skb->protocol);
3540 break;
3541 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003542 }
3543
3544 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
3545 context_desc->seqnum_seed = 0;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003546 if (tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX)
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003547 context_desc->mss_l4len_idx =
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003548 cpu_to_le32(tx_ring->reg_idx << 4);
Auke Kok9d5c8242008-01-24 02:22:38 -08003549
3550 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003551 buffer_info->next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003552 buffer_info->dma = 0;
3553
3554 i++;
3555 if (i == tx_ring->count)
3556 i = 0;
3557 tx_ring->next_to_use = i;
3558
3559 return true;
3560 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003561 return false;
3562}
3563
3564#define IGB_MAX_TXD_PWR 16
3565#define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
3566
Alexander Duyck80785292009-10-27 15:51:47 +00003567static inline int igb_tx_map_adv(struct igb_ring *tx_ring, struct sk_buff *skb,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003568 unsigned int first)
Auke Kok9d5c8242008-01-24 02:22:38 -08003569{
3570 struct igb_buffer *buffer_info;
Alexander Duyck80785292009-10-27 15:51:47 +00003571 struct pci_dev *pdev = tx_ring->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003572 unsigned int len = skb_headlen(skb);
3573 unsigned int count = 0, i;
3574 unsigned int f;
3575
3576 i = tx_ring->next_to_use;
3577
3578 buffer_info = &tx_ring->buffer_info[i];
3579 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
3580 buffer_info->length = len;
3581 /* set time_stamp *before* dma to help avoid a possible race */
3582 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003583 buffer_info->next_to_watch = i;
Alexander Duyck6366ad32009-12-02 16:47:18 +00003584 buffer_info->dma = pci_map_single(pdev, skb->data, len,
3585 PCI_DMA_TODEVICE);
3586 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3587 goto dma_error;
Auke Kok9d5c8242008-01-24 02:22:38 -08003588
3589 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
3590 struct skb_frag_struct *frag;
3591
Alexander Duyck65689fe2009-03-20 00:17:43 +00003592 i++;
3593 if (i == tx_ring->count)
3594 i = 0;
3595
Auke Kok9d5c8242008-01-24 02:22:38 -08003596 frag = &skb_shinfo(skb)->frags[f];
3597 len = frag->size;
3598
3599 buffer_info = &tx_ring->buffer_info[i];
3600 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
3601 buffer_info->length = len;
3602 buffer_info->time_stamp = jiffies;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003603 buffer_info->next_to_watch = i;
Alexander Duyck6366ad32009-12-02 16:47:18 +00003604 buffer_info->mapped_as_page = true;
3605 buffer_info->dma = pci_map_page(pdev,
3606 frag->page,
3607 frag->page_offset,
3608 len,
3609 PCI_DMA_TODEVICE);
3610 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3611 goto dma_error;
3612
Auke Kok9d5c8242008-01-24 02:22:38 -08003613 count++;
Auke Kok9d5c8242008-01-24 02:22:38 -08003614 }
3615
Auke Kok9d5c8242008-01-24 02:22:38 -08003616 tx_ring->buffer_info[i].skb = skb;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003617 tx_ring->buffer_info[first].next_to_watch = i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003618
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003619 return ++count;
Alexander Duyck6366ad32009-12-02 16:47:18 +00003620
3621dma_error:
3622 dev_err(&pdev->dev, "TX DMA map failed\n");
3623
3624 /* clear timestamp and dma mappings for failed buffer_info mapping */
3625 buffer_info->dma = 0;
3626 buffer_info->time_stamp = 0;
3627 buffer_info->length = 0;
3628 buffer_info->next_to_watch = 0;
3629 buffer_info->mapped_as_page = false;
3630 count--;
3631
3632 /* clear timestamp and dma mappings for remaining portion of packet */
3633 while (count >= 0) {
3634 count--;
3635 i--;
3636 if (i < 0)
3637 i += tx_ring->count;
3638 buffer_info = &tx_ring->buffer_info[i];
3639 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3640 }
3641
3642 return 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003643}
3644
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003645static inline void igb_tx_queue_adv(struct igb_ring *tx_ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08003646 int tx_flags, int count, u32 paylen,
3647 u8 hdr_len)
3648{
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003649 union e1000_adv_tx_desc *tx_desc;
Auke Kok9d5c8242008-01-24 02:22:38 -08003650 struct igb_buffer *buffer_info;
3651 u32 olinfo_status = 0, cmd_type_len;
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003652 unsigned int i = tx_ring->next_to_use;
Auke Kok9d5c8242008-01-24 02:22:38 -08003653
3654 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
3655 E1000_ADVTXD_DCMD_DEXT);
3656
3657 if (tx_flags & IGB_TX_FLAGS_VLAN)
3658 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
3659
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003660 if (tx_flags & IGB_TX_FLAGS_TSTAMP)
3661 cmd_type_len |= E1000_ADVTXD_MAC_TSTAMP;
3662
Auke Kok9d5c8242008-01-24 02:22:38 -08003663 if (tx_flags & IGB_TX_FLAGS_TSO) {
3664 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
3665
3666 /* insert tcp checksum */
3667 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
3668
3669 /* insert ip checksum */
3670 if (tx_flags & IGB_TX_FLAGS_IPV4)
3671 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
3672
3673 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
3674 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
3675 }
3676
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003677 if ((tx_ring->flags & IGB_RING_FLAG_TX_CTX_IDX) &&
3678 (tx_flags & (IGB_TX_FLAGS_CSUM |
3679 IGB_TX_FLAGS_TSO |
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07003680 IGB_TX_FLAGS_VLAN)))
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003681 olinfo_status |= tx_ring->reg_idx << 4;
Auke Kok9d5c8242008-01-24 02:22:38 -08003682
3683 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
3684
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003685 do {
Auke Kok9d5c8242008-01-24 02:22:38 -08003686 buffer_info = &tx_ring->buffer_info[i];
3687 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
3688 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
3689 tx_desc->read.cmd_type_len =
3690 cpu_to_le32(cmd_type_len | buffer_info->length);
3691 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003692 count--;
Auke Kok9d5c8242008-01-24 02:22:38 -08003693 i++;
3694 if (i == tx_ring->count)
3695 i = 0;
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003696 } while (count > 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08003697
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003698 tx_desc->read.cmd_type_len |= cpu_to_le32(IGB_ADVTXD_DCMD);
Auke Kok9d5c8242008-01-24 02:22:38 -08003699 /* Force memory writes to complete before letting h/w
3700 * know there are new descriptors to fetch. (Only
3701 * applicable for weak-ordered memory model archs,
3702 * such as IA-64). */
3703 wmb();
3704
3705 tx_ring->next_to_use = i;
Alexander Duyckfce99e32009-10-27 15:51:27 +00003706 writel(i, tx_ring->tail);
Auke Kok9d5c8242008-01-24 02:22:38 -08003707 /* we need this if more than one processor can write to our tail
3708 * at a time, it syncronizes IO on IA64/Altix systems */
3709 mmiowb();
3710}
3711
Alexander Duycke694e962009-10-27 15:53:06 +00003712static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, int size)
Auke Kok9d5c8242008-01-24 02:22:38 -08003713{
Alexander Duycke694e962009-10-27 15:53:06 +00003714 struct net_device *netdev = tx_ring->netdev;
3715
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003716 netif_stop_subqueue(netdev, tx_ring->queue_index);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003717
Auke Kok9d5c8242008-01-24 02:22:38 -08003718 /* Herbert's original patch had:
3719 * smp_mb__after_netif_stop_queue();
3720 * but since that doesn't exist yet, just open code it. */
3721 smp_mb();
3722
3723 /* We need to check again in a case another CPU has just
3724 * made room available. */
Alexander Duyckc493ea42009-03-20 00:16:50 +00003725 if (igb_desc_unused(tx_ring) < size)
Auke Kok9d5c8242008-01-24 02:22:38 -08003726 return -EBUSY;
3727
3728 /* A reprieve! */
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003729 netif_wake_subqueue(netdev, tx_ring->queue_index);
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00003730 tx_ring->tx_stats.restart_queue++;
Auke Kok9d5c8242008-01-24 02:22:38 -08003731 return 0;
3732}
3733
Alexander Duycke694e962009-10-27 15:53:06 +00003734static int igb_maybe_stop_tx(struct igb_ring *tx_ring, int size)
Auke Kok9d5c8242008-01-24 02:22:38 -08003735{
Alexander Duyckc493ea42009-03-20 00:16:50 +00003736 if (igb_desc_unused(tx_ring) >= size)
Auke Kok9d5c8242008-01-24 02:22:38 -08003737 return 0;
Alexander Duycke694e962009-10-27 15:53:06 +00003738 return __igb_maybe_stop_tx(tx_ring, size);
Auke Kok9d5c8242008-01-24 02:22:38 -08003739}
3740
Alexander Duyckb1a436c2009-10-27 15:54:43 +00003741netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb,
3742 struct igb_ring *tx_ring)
Auke Kok9d5c8242008-01-24 02:22:38 -08003743{
Alexander Duycke694e962009-10-27 15:53:06 +00003744 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003745 unsigned int first;
Auke Kok9d5c8242008-01-24 02:22:38 -08003746 unsigned int tx_flags = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08003747 u8 hdr_len = 0;
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003748 int tso = 0, count;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00003749 union skb_shared_tx *shtx = skb_tx(skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08003750
Auke Kok9d5c8242008-01-24 02:22:38 -08003751 /* need: 1 descriptor per page,
3752 * + 2 desc gap to keep tail from touching head,
3753 * + 1 desc for skb->data,
3754 * + 1 desc for context descriptor,
3755 * otherwise try next time */
Alexander Duycke694e962009-10-27 15:53:06 +00003756 if (igb_maybe_stop_tx(tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003757 /* this is a hard error */
Auke Kok9d5c8242008-01-24 02:22:38 -08003758 return NETDEV_TX_BUSY;
3759 }
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003760
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003761 if (unlikely(shtx->hardware)) {
3762 shtx->in_progress = 1;
3763 tx_flags |= IGB_TX_FLAGS_TSTAMP;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00003764 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003765
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003766 if (vlan_tx_tag_present(skb) && adapter->vlgrp) {
Auke Kok9d5c8242008-01-24 02:22:38 -08003767 tx_flags |= IGB_TX_FLAGS_VLAN;
3768 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
3769 }
3770
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003771 if (skb->protocol == htons(ETH_P_IP))
3772 tx_flags |= IGB_TX_FLAGS_IPV4;
3773
Alexander Duyck0e014cb2008-12-26 01:33:18 -08003774 first = tx_ring->next_to_use;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003775 if (skb_is_gso(skb)) {
3776 tso = igb_tso_adv(tx_ring, skb, tx_flags, &hdr_len);
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003777
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003778 if (tso < 0) {
3779 dev_kfree_skb_any(skb);
3780 return NETDEV_TX_OK;
3781 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003782 }
3783
3784 if (tso)
3785 tx_flags |= IGB_TX_FLAGS_TSO;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003786 else if (igb_tx_csum_adv(tx_ring, skb, tx_flags) &&
Alexander Duyckbc1cbd32009-02-13 14:45:17 +00003787 (skb->ip_summed == CHECKSUM_PARTIAL))
3788 tx_flags |= IGB_TX_FLAGS_CSUM;
Auke Kok9d5c8242008-01-24 02:22:38 -08003789
Alexander Duyck65689fe2009-03-20 00:17:43 +00003790 /*
Alexander Duyckcdfd01fc2009-10-27 23:50:57 +00003791 * count reflects descriptors mapped, if 0 or less then mapping error
Alexander Duyck65689fe2009-03-20 00:17:43 +00003792 * has occured and we need to rewind the descriptor queue
3793 */
Alexander Duyck80785292009-10-27 15:51:47 +00003794 count = igb_tx_map_adv(tx_ring, skb, first);
Alexander Duyck6366ad32009-12-02 16:47:18 +00003795 if (!count) {
Alexander Duyck65689fe2009-03-20 00:17:43 +00003796 dev_kfree_skb_any(skb);
3797 tx_ring->buffer_info[first].time_stamp = 0;
3798 tx_ring->next_to_use = first;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003799 return NETDEV_TX_OK;
Alexander Duyck65689fe2009-03-20 00:17:43 +00003800 }
Auke Kok9d5c8242008-01-24 02:22:38 -08003801
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003802 igb_tx_queue_adv(tx_ring, tx_flags, count, skb->len, hdr_len);
3803
3804 /* Make sure there is space in the ring for the next send. */
Alexander Duycke694e962009-10-27 15:53:06 +00003805 igb_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 4);
Alexander Duyck85ad76b2009-10-27 15:52:46 +00003806
Auke Kok9d5c8242008-01-24 02:22:38 -08003807 return NETDEV_TX_OK;
3808}
3809
Stephen Hemminger3b29a562009-08-31 19:50:55 +00003810static netdev_tx_t igb_xmit_frame_adv(struct sk_buff *skb,
3811 struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08003812{
3813 struct igb_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003814 struct igb_ring *tx_ring;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003815 int r_idx = 0;
Alexander Duyckb1a436c2009-10-27 15:54:43 +00003816
3817 if (test_bit(__IGB_DOWN, &adapter->state)) {
3818 dev_kfree_skb_any(skb);
3819 return NETDEV_TX_OK;
3820 }
3821
3822 if (skb->len <= 0) {
3823 dev_kfree_skb_any(skb);
3824 return NETDEV_TX_OK;
3825 }
3826
Alexander Duyck1bfaf072009-02-19 20:39:23 -08003827 r_idx = skb->queue_mapping & (IGB_ABS_MAX_TX_QUEUES - 1);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07003828 tx_ring = adapter->multi_tx_table[r_idx];
Auke Kok9d5c8242008-01-24 02:22:38 -08003829
3830 /* This goes back to the question of how to logically map a tx queue
3831 * to a flow. Right now, performance is impacted slightly negatively
3832 * if using multiple tx queues. If the stack breaks away from a
3833 * single qdisc implementation, we can look at this again. */
Alexander Duycke694e962009-10-27 15:53:06 +00003834 return igb_xmit_frame_ring_adv(skb, tx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08003835}
3836
3837/**
3838 * igb_tx_timeout - Respond to a Tx Hang
3839 * @netdev: network interface device structure
3840 **/
3841static void igb_tx_timeout(struct net_device *netdev)
3842{
3843 struct igb_adapter *adapter = netdev_priv(netdev);
3844 struct e1000_hw *hw = &adapter->hw;
3845
3846 /* Do the reset outside of interrupt context */
3847 adapter->tx_timeout_count++;
Alexander Duyckf7ba2052009-10-27 23:48:51 +00003848
Alexander Duyck55cac242009-11-19 12:42:21 +00003849 if (hw->mac.type == e1000_82580)
3850 hw->dev_spec._82575.global_device_reset = true;
3851
Auke Kok9d5c8242008-01-24 02:22:38 -08003852 schedule_work(&adapter->reset_task);
Alexander Duyck265de402009-02-06 23:22:52 +00003853 wr32(E1000_EICS,
3854 (adapter->eims_enable_mask & ~adapter->eims_other));
Auke Kok9d5c8242008-01-24 02:22:38 -08003855}
3856
3857static void igb_reset_task(struct work_struct *work)
3858{
3859 struct igb_adapter *adapter;
3860 adapter = container_of(work, struct igb_adapter, reset_task);
3861
3862 igb_reinit_locked(adapter);
3863}
3864
3865/**
3866 * igb_get_stats - Get System Network Statistics
3867 * @netdev: network interface device structure
3868 *
3869 * Returns the address of the device statistics structure.
3870 * The statistics are actually updated from the timer callback.
3871 **/
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003872static struct net_device_stats *igb_get_stats(struct net_device *netdev)
Auke Kok9d5c8242008-01-24 02:22:38 -08003873{
Auke Kok9d5c8242008-01-24 02:22:38 -08003874 /* only return the current stats */
Ajit Khaparde8d24e932009-10-07 02:42:56 +00003875 return &netdev->stats;
Auke Kok9d5c8242008-01-24 02:22:38 -08003876}
3877
3878/**
3879 * igb_change_mtu - Change the Maximum Transfer Unit
3880 * @netdev: network interface device structure
3881 * @new_mtu: new value for maximum frame size
3882 *
3883 * Returns 0 on success, negative on failure
3884 **/
3885static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3886{
3887 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck090b1792009-10-27 23:51:55 +00003888 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08003889 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
Alexander Duyck4c844852009-10-27 15:52:07 +00003890 u32 rx_buffer_len, i;
Auke Kok9d5c8242008-01-24 02:22:38 -08003891
Alexander Duyckc809d222009-10-27 23:52:13 +00003892 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
Alexander Duyck090b1792009-10-27 23:51:55 +00003893 dev_err(&pdev->dev, "Invalid MTU setting\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08003894 return -EINVAL;
3895 }
3896
Auke Kok9d5c8242008-01-24 02:22:38 -08003897 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
Alexander Duyck090b1792009-10-27 23:51:55 +00003898 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08003899 return -EINVAL;
3900 }
3901
3902 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3903 msleep(1);
Alexander Duyck73cd78f2009-02-12 18:16:59 +00003904
Auke Kok9d5c8242008-01-24 02:22:38 -08003905 /* igb_down has a dependency on max_frame_size */
3906 adapter->max_frame_size = max_frame;
Alexander Duyck559e9c42009-10-27 23:52:50 +00003907
Auke Kok9d5c8242008-01-24 02:22:38 -08003908 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3909 * means we reserve 2 more, this pushes us to allocate from the next
3910 * larger slab size.
3911 * i.e. RXBUFFER_2048 --> size-4096 slab
3912 */
3913
Alexander Duyck7d95b712009-10-27 15:50:08 +00003914 if (max_frame <= IGB_RXBUFFER_1024)
Alexander Duyck4c844852009-10-27 15:52:07 +00003915 rx_buffer_len = IGB_RXBUFFER_1024;
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00003916 else if (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE)
Alexander Duyck4c844852009-10-27 15:52:07 +00003917 rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00003918 else
Alexander Duyck4c844852009-10-27 15:52:07 +00003919 rx_buffer_len = IGB_RXBUFFER_128;
3920
3921 if (netif_running(netdev))
3922 igb_down(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08003923
Alexander Duyck090b1792009-10-27 23:51:55 +00003924 dev_info(&pdev->dev, "changing MTU from %d to %d\n",
Auke Kok9d5c8242008-01-24 02:22:38 -08003925 netdev->mtu, new_mtu);
3926 netdev->mtu = new_mtu;
3927
Alexander Duyck4c844852009-10-27 15:52:07 +00003928 for (i = 0; i < adapter->num_rx_queues; i++)
3929 adapter->rx_ring[i].rx_buffer_len = rx_buffer_len;
3930
Auke Kok9d5c8242008-01-24 02:22:38 -08003931 if (netif_running(netdev))
3932 igb_up(adapter);
3933 else
3934 igb_reset(adapter);
3935
3936 clear_bit(__IGB_RESETTING, &adapter->state);
3937
3938 return 0;
3939}
3940
3941/**
3942 * igb_update_stats - Update the board statistics counters
3943 * @adapter: board private structure
3944 **/
3945
3946void igb_update_stats(struct igb_adapter *adapter)
3947{
Alexander Duyck128e45e2009-11-12 18:37:38 +00003948 struct net_device_stats *net_stats = igb_get_stats(adapter->netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08003949 struct e1000_hw *hw = &adapter->hw;
3950 struct pci_dev *pdev = adapter->pdev;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003951 u32 rnbc;
Auke Kok9d5c8242008-01-24 02:22:38 -08003952 u16 phy_tmp;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003953 int i;
3954 u64 bytes, packets;
Auke Kok9d5c8242008-01-24 02:22:38 -08003955
3956#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3957
3958 /*
3959 * Prevent stats update while adapter is being reset, or if the pci
3960 * connection is down.
3961 */
3962 if (adapter->link_speed == 0)
3963 return;
3964 if (pci_channel_offline(pdev))
3965 return;
3966
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003967 bytes = 0;
3968 packets = 0;
3969 for (i = 0; i < adapter->num_rx_queues; i++) {
3970 u32 rqdpc_tmp = rd32(E1000_RQDPC(i)) & 0x0FFF;
3971 adapter->rx_ring[i].rx_stats.drops += rqdpc_tmp;
Alexander Duyck128e45e2009-11-12 18:37:38 +00003972 net_stats->rx_fifo_errors += rqdpc_tmp;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003973 bytes += adapter->rx_ring[i].rx_stats.bytes;
3974 packets += adapter->rx_ring[i].rx_stats.packets;
3975 }
3976
Alexander Duyck128e45e2009-11-12 18:37:38 +00003977 net_stats->rx_bytes = bytes;
3978 net_stats->rx_packets = packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003979
3980 bytes = 0;
3981 packets = 0;
3982 for (i = 0; i < adapter->num_tx_queues; i++) {
3983 bytes += adapter->tx_ring[i].tx_stats.bytes;
3984 packets += adapter->tx_ring[i].tx_stats.packets;
3985 }
Alexander Duyck128e45e2009-11-12 18:37:38 +00003986 net_stats->tx_bytes = bytes;
3987 net_stats->tx_packets = packets;
Alexander Duyck3f9c0162009-10-27 23:48:12 +00003988
3989 /* read stats registers */
Auke Kok9d5c8242008-01-24 02:22:38 -08003990 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3991 adapter->stats.gprc += rd32(E1000_GPRC);
3992 adapter->stats.gorc += rd32(E1000_GORCL);
3993 rd32(E1000_GORCH); /* clear GORCL */
3994 adapter->stats.bprc += rd32(E1000_BPRC);
3995 adapter->stats.mprc += rd32(E1000_MPRC);
3996 adapter->stats.roc += rd32(E1000_ROC);
3997
3998 adapter->stats.prc64 += rd32(E1000_PRC64);
3999 adapter->stats.prc127 += rd32(E1000_PRC127);
4000 adapter->stats.prc255 += rd32(E1000_PRC255);
4001 adapter->stats.prc511 += rd32(E1000_PRC511);
4002 adapter->stats.prc1023 += rd32(E1000_PRC1023);
4003 adapter->stats.prc1522 += rd32(E1000_PRC1522);
4004 adapter->stats.symerrs += rd32(E1000_SYMERRS);
4005 adapter->stats.sec += rd32(E1000_SEC);
4006
4007 adapter->stats.mpc += rd32(E1000_MPC);
4008 adapter->stats.scc += rd32(E1000_SCC);
4009 adapter->stats.ecol += rd32(E1000_ECOL);
4010 adapter->stats.mcc += rd32(E1000_MCC);
4011 adapter->stats.latecol += rd32(E1000_LATECOL);
4012 adapter->stats.dc += rd32(E1000_DC);
4013 adapter->stats.rlec += rd32(E1000_RLEC);
4014 adapter->stats.xonrxc += rd32(E1000_XONRXC);
4015 adapter->stats.xontxc += rd32(E1000_XONTXC);
4016 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
4017 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
4018 adapter->stats.fcruc += rd32(E1000_FCRUC);
4019 adapter->stats.gptc += rd32(E1000_GPTC);
4020 adapter->stats.gotc += rd32(E1000_GOTCL);
4021 rd32(E1000_GOTCH); /* clear GOTCL */
Alexander Duyck3f9c0162009-10-27 23:48:12 +00004022 rnbc = rd32(E1000_RNBC);
4023 adapter->stats.rnbc += rnbc;
Alexander Duyck128e45e2009-11-12 18:37:38 +00004024 net_stats->rx_fifo_errors += rnbc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004025 adapter->stats.ruc += rd32(E1000_RUC);
4026 adapter->stats.rfc += rd32(E1000_RFC);
4027 adapter->stats.rjc += rd32(E1000_RJC);
4028 adapter->stats.tor += rd32(E1000_TORH);
4029 adapter->stats.tot += rd32(E1000_TOTH);
4030 adapter->stats.tpr += rd32(E1000_TPR);
4031
4032 adapter->stats.ptc64 += rd32(E1000_PTC64);
4033 adapter->stats.ptc127 += rd32(E1000_PTC127);
4034 adapter->stats.ptc255 += rd32(E1000_PTC255);
4035 adapter->stats.ptc511 += rd32(E1000_PTC511);
4036 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
4037 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
4038
4039 adapter->stats.mptc += rd32(E1000_MPTC);
4040 adapter->stats.bptc += rd32(E1000_BPTC);
4041
4042 /* used for adaptive IFS */
Auke Kok9d5c8242008-01-24 02:22:38 -08004043 hw->mac.tx_packet_delta = rd32(E1000_TPT);
4044 adapter->stats.tpt += hw->mac.tx_packet_delta;
4045 hw->mac.collision_delta = rd32(E1000_COLC);
4046 adapter->stats.colc += hw->mac.collision_delta;
4047
4048 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
4049 adapter->stats.rxerrc += rd32(E1000_RXERRC);
4050 adapter->stats.tncrs += rd32(E1000_TNCRS);
4051 adapter->stats.tsctc += rd32(E1000_TSCTC);
4052 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
4053
4054 adapter->stats.iac += rd32(E1000_IAC);
4055 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
4056 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
4057 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
4058 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
4059 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
4060 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
4061 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
4062 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
4063
4064 /* Fill out the OS statistics structure */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004065 net_stats->multicast = adapter->stats.mprc;
4066 net_stats->collisions = adapter->stats.colc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004067
4068 /* Rx Errors */
4069
4070 /* RLEC on some newer hardware can be incorrect so build
Jesper Dangaard Brouer8c0ab702009-05-26 13:50:31 +00004071 * our own version based on RUC and ROC */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004072 net_stats->rx_errors = adapter->stats.rxerrc +
Auke Kok9d5c8242008-01-24 02:22:38 -08004073 adapter->stats.crcerrs + adapter->stats.algnerrc +
4074 adapter->stats.ruc + adapter->stats.roc +
4075 adapter->stats.cexterr;
Alexander Duyck128e45e2009-11-12 18:37:38 +00004076 net_stats->rx_length_errors = adapter->stats.ruc +
4077 adapter->stats.roc;
4078 net_stats->rx_crc_errors = adapter->stats.crcerrs;
4079 net_stats->rx_frame_errors = adapter->stats.algnerrc;
4080 net_stats->rx_missed_errors = adapter->stats.mpc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004081
4082 /* Tx Errors */
Alexander Duyck128e45e2009-11-12 18:37:38 +00004083 net_stats->tx_errors = adapter->stats.ecol +
4084 adapter->stats.latecol;
4085 net_stats->tx_aborted_errors = adapter->stats.ecol;
4086 net_stats->tx_window_errors = adapter->stats.latecol;
4087 net_stats->tx_carrier_errors = adapter->stats.tncrs;
Auke Kok9d5c8242008-01-24 02:22:38 -08004088
4089 /* Tx Dropped needs to be maintained elsewhere */
4090
4091 /* Phy Stats */
4092 if (hw->phy.media_type == e1000_media_type_copper) {
4093 if ((adapter->link_speed == SPEED_1000) &&
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004094 (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004095 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
4096 adapter->phy_stats.idle_errors += phy_tmp;
4097 }
4098 }
4099
4100 /* Management Stats */
4101 adapter->stats.mgptc += rd32(E1000_MGTPTC);
4102 adapter->stats.mgprc += rd32(E1000_MGTPRC);
4103 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
4104}
4105
Auke Kok9d5c8242008-01-24 02:22:38 -08004106static irqreturn_t igb_msix_other(int irq, void *data)
4107{
Alexander Duyck047e0032009-10-27 15:49:27 +00004108 struct igb_adapter *adapter = data;
Auke Kok9d5c8242008-01-24 02:22:38 -08004109 struct e1000_hw *hw = &adapter->hw;
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004110 u32 icr = rd32(E1000_ICR);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004111 /* reading ICR causes bit 31 of EICR to be cleared */
Alexander Duyckdda0e082009-02-06 23:19:08 +00004112
Alexander Duyck047e0032009-10-27 15:49:27 +00004113 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00004114 /* HW is reporting DMA is out of sync */
4115 adapter->stats.doosync++;
4116 }
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00004117
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004118 /* Check for a mailbox event */
4119 if (icr & E1000_ICR_VMMB)
4120 igb_msg_task(adapter);
4121
4122 if (icr & E1000_ICR_LSC) {
4123 hw->mac.get_link_status = 1;
4124 /* guard against interrupt when we're going down */
4125 if (!test_bit(__IGB_DOWN, &adapter->state))
4126 mod_timer(&adapter->watchdog_timer, jiffies + 1);
4127 }
4128
Alexander Duyck25568a52009-10-27 23:49:59 +00004129 if (adapter->vfs_allocated_count)
4130 wr32(E1000_IMS, E1000_IMS_LSC |
4131 E1000_IMS_VMMB |
4132 E1000_IMS_DOUTSYNC);
4133 else
4134 wr32(E1000_IMS, E1000_IMS_LSC | E1000_IMS_DOUTSYNC);
PJ Waskiewicz844290e2008-06-27 11:00:39 -07004135 wr32(E1000_EIMS, adapter->eims_other);
Auke Kok9d5c8242008-01-24 02:22:38 -08004136
4137 return IRQ_HANDLED;
4138}
4139
Alexander Duyck047e0032009-10-27 15:49:27 +00004140static void igb_write_itr(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08004141{
Alexander Duyck047e0032009-10-27 15:49:27 +00004142 u32 itr_val = q_vector->itr_val & 0x7FFC;
Auke Kok9d5c8242008-01-24 02:22:38 -08004143
Alexander Duyck047e0032009-10-27 15:49:27 +00004144 if (!q_vector->set_itr)
4145 return;
Alexander Duyck73cd78f2009-02-12 18:16:59 +00004146
Alexander Duyck047e0032009-10-27 15:49:27 +00004147 if (!itr_val)
4148 itr_val = 0x4;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004149
Alexander Duyck047e0032009-10-27 15:49:27 +00004150 if (q_vector->itr_shift)
4151 itr_val |= itr_val << q_vector->itr_shift;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004152 else
Alexander Duyck047e0032009-10-27 15:49:27 +00004153 itr_val |= 0x8000000;
4154
4155 writel(itr_val, q_vector->itr_register);
4156 q_vector->set_itr = 0;
4157}
4158
4159static irqreturn_t igb_msix_ring(int irq, void *data)
4160{
4161 struct igb_q_vector *q_vector = data;
4162
4163 /* Write the ITR value calculated from the previous interrupt. */
4164 igb_write_itr(q_vector);
4165
4166 napi_schedule(&q_vector->napi);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004167
Auke Kok9d5c8242008-01-24 02:22:38 -08004168 return IRQ_HANDLED;
4169}
4170
Jeff Kirsher421e02f2008-10-17 11:08:31 -07004171#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +00004172static void igb_update_dca(struct igb_q_vector *q_vector)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004173{
Alexander Duyck047e0032009-10-27 15:49:27 +00004174 struct igb_adapter *adapter = q_vector->adapter;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004175 struct e1000_hw *hw = &adapter->hw;
4176 int cpu = get_cpu();
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004177
Alexander Duyck047e0032009-10-27 15:49:27 +00004178 if (q_vector->cpu == cpu)
4179 goto out_no_update;
4180
4181 if (q_vector->tx_ring) {
4182 int q = q_vector->tx_ring->reg_idx;
4183 u32 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
4184 if (hw->mac.type == e1000_82575) {
4185 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
4186 dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4187 } else {
4188 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
4189 dca_txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
4190 E1000_DCA_TXCTRL_CPUID_SHIFT;
4191 }
4192 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
4193 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
4194 }
4195 if (q_vector->rx_ring) {
4196 int q = q_vector->rx_ring->reg_idx;
4197 u32 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
4198 if (hw->mac.type == e1000_82575) {
4199 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
4200 dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
4201 } else {
Alexander Duyck2d064c02008-07-08 15:10:12 -07004202 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
Maciej Sosnowski92be7912009-03-13 20:40:21 +00004203 dca_rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu) <<
Alexander Duyck2d064c02008-07-08 15:10:12 -07004204 E1000_DCA_RXCTRL_CPUID_SHIFT;
Alexander Duyck2d064c02008-07-08 15:10:12 -07004205 }
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004206 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
4207 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
4208 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
4209 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004210 }
Alexander Duyck047e0032009-10-27 15:49:27 +00004211 q_vector->cpu = cpu;
4212out_no_update:
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004213 put_cpu();
4214}
4215
4216static void igb_setup_dca(struct igb_adapter *adapter)
4217{
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00004218 struct e1000_hw *hw = &adapter->hw;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004219 int i;
4220
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004221 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004222 return;
4223
Alexander Duyck7e0e99e2009-05-21 13:06:56 +00004224 /* Always use CB2 mode, difference is masked in the CB driver. */
4225 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
4226
Alexander Duyck047e0032009-10-27 15:49:27 +00004227 for (i = 0; i < adapter->num_q_vectors; i++) {
4228 struct igb_q_vector *q_vector = adapter->q_vector[i];
4229 q_vector->cpu = -1;
4230 igb_update_dca(q_vector);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004231 }
4232}
4233
4234static int __igb_notify_dca(struct device *dev, void *data)
4235{
4236 struct net_device *netdev = dev_get_drvdata(dev);
4237 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyck090b1792009-10-27 23:51:55 +00004238 struct pci_dev *pdev = adapter->pdev;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004239 struct e1000_hw *hw = &adapter->hw;
4240 unsigned long event = *(unsigned long *)data;
4241
4242 switch (event) {
4243 case DCA_PROVIDER_ADD:
4244 /* if already enabled, don't do it again */
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004245 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004246 break;
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004247 if (dca_add_requester(dev) == 0) {
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08004248 adapter->flags |= IGB_FLAG_DCA_ENABLED;
Alexander Duyck090b1792009-10-27 23:51:55 +00004249 dev_info(&pdev->dev, "DCA enabled\n");
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004250 igb_setup_dca(adapter);
4251 break;
4252 }
4253 /* Fall Through since DCA is disabled. */
4254 case DCA_PROVIDER_REMOVE:
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004255 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004256 /* without this a class_device is left
Alexander Duyck047e0032009-10-27 15:49:27 +00004257 * hanging around in the sysfs model */
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004258 dca_remove_requester(dev);
Alexander Duyck090b1792009-10-27 23:51:55 +00004259 dev_info(&pdev->dev, "DCA disabled\n");
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07004260 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
Alexander Duyckcbd347a2009-02-15 23:59:44 -08004261 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004262 }
4263 break;
4264 }
Alexander Duyckbbd98fe2009-01-31 00:52:30 -08004265
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004266 return 0;
4267}
4268
4269static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
4270 void *p)
4271{
4272 int ret_val;
4273
4274 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
4275 __igb_notify_dca);
4276
4277 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4278}
Jeff Kirsher421e02f2008-10-17 11:08:31 -07004279#endif /* CONFIG_IGB_DCA */
Auke Kok9d5c8242008-01-24 02:22:38 -08004280
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004281static void igb_ping_all_vfs(struct igb_adapter *adapter)
4282{
4283 struct e1000_hw *hw = &adapter->hw;
4284 u32 ping;
4285 int i;
4286
4287 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
4288 ping = E1000_PF_CONTROL_MSG;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004289 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004290 ping |= E1000_VT_MSGTYPE_CTS;
4291 igb_write_mbx(hw, &ping, 1, i);
4292 }
4293}
4294
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004295static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
4296{
4297 struct e1000_hw *hw = &adapter->hw;
4298 u32 vmolr = rd32(E1000_VMOLR(vf));
4299 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
4300
4301 vf_data->flags |= ~(IGB_VF_FLAG_UNI_PROMISC |
4302 IGB_VF_FLAG_MULTI_PROMISC);
4303 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
4304
4305 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
4306 vmolr |= E1000_VMOLR_MPME;
4307 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
4308 } else {
4309 /*
4310 * if we have hashes and we are clearing a multicast promisc
4311 * flag we need to write the hashes to the MTA as this step
4312 * was previously skipped
4313 */
4314 if (vf_data->num_vf_mc_hashes > 30) {
4315 vmolr |= E1000_VMOLR_MPME;
4316 } else if (vf_data->num_vf_mc_hashes) {
4317 int j;
4318 vmolr |= E1000_VMOLR_ROMPE;
4319 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
4320 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
4321 }
4322 }
4323
4324 wr32(E1000_VMOLR(vf), vmolr);
4325
4326 /* there are flags left unprocessed, likely not supported */
4327 if (*msgbuf & E1000_VT_MSGINFO_MASK)
4328 return -EINVAL;
4329
4330 return 0;
4331
4332}
4333
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004334static int igb_set_vf_multicasts(struct igb_adapter *adapter,
4335 u32 *msgbuf, u32 vf)
4336{
4337 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
4338 u16 *hash_list = (u16 *)&msgbuf[1];
4339 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
4340 int i;
4341
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004342 /* salt away the number of multicast addresses assigned
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004343 * to this VF for later use to restore when the PF multi cast
4344 * list changes
4345 */
4346 vf_data->num_vf_mc_hashes = n;
4347
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004348 /* only up to 30 hash values supported */
4349 if (n > 30)
4350 n = 30;
4351
4352 /* store the hashes for later use */
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004353 for (i = 0; i < n; i++)
Joe Perchesa419aef2009-08-18 11:18:35 -07004354 vf_data->vf_mc_hashes[i] = hash_list[i];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004355
4356 /* Flush and reset the mta with the new values */
Alexander Duyckff41f8d2009-09-03 14:48:56 +00004357 igb_set_rx_mode(adapter->netdev);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004358
4359 return 0;
4360}
4361
4362static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
4363{
4364 struct e1000_hw *hw = &adapter->hw;
4365 struct vf_data_storage *vf_data;
4366 int i, j;
4367
4368 for (i = 0; i < adapter->vfs_allocated_count; i++) {
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004369 u32 vmolr = rd32(E1000_VMOLR(i));
4370 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
4371
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004372 vf_data = &adapter->vf_data[i];
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004373
4374 if ((vf_data->num_vf_mc_hashes > 30) ||
4375 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
4376 vmolr |= E1000_VMOLR_MPME;
4377 } else if (vf_data->num_vf_mc_hashes) {
4378 vmolr |= E1000_VMOLR_ROMPE;
4379 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
4380 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
4381 }
4382 wr32(E1000_VMOLR(i), vmolr);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004383 }
4384}
4385
4386static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
4387{
4388 struct e1000_hw *hw = &adapter->hw;
4389 u32 pool_mask, reg, vid;
4390 int i;
4391
4392 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
4393
4394 /* Find the vlan filter for this id */
4395 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
4396 reg = rd32(E1000_VLVF(i));
4397
4398 /* remove the vf from the pool */
4399 reg &= ~pool_mask;
4400
4401 /* if pool is empty then remove entry from vfta */
4402 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
4403 (reg & E1000_VLVF_VLANID_ENABLE)) {
4404 reg = 0;
4405 vid = reg & E1000_VLVF_VLANID_MASK;
4406 igb_vfta_set(hw, vid, false);
4407 }
4408
4409 wr32(E1000_VLVF(i), reg);
4410 }
Alexander Duyckae641bd2009-09-03 14:49:33 +00004411
4412 adapter->vf_data[vf].vlans_enabled = 0;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004413}
4414
4415static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
4416{
4417 struct e1000_hw *hw = &adapter->hw;
4418 u32 reg, i;
4419
Alexander Duyck51466232009-10-27 23:47:35 +00004420 /* The vlvf table only exists on 82576 hardware and newer */
4421 if (hw->mac.type < e1000_82576)
4422 return -1;
4423
4424 /* we only need to do this if VMDq is enabled */
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004425 if (!adapter->vfs_allocated_count)
4426 return -1;
4427
4428 /* Find the vlan filter for this id */
4429 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
4430 reg = rd32(E1000_VLVF(i));
4431 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
4432 vid == (reg & E1000_VLVF_VLANID_MASK))
4433 break;
4434 }
4435
4436 if (add) {
4437 if (i == E1000_VLVF_ARRAY_SIZE) {
4438 /* Did not find a matching VLAN ID entry that was
4439 * enabled. Search for a free filter entry, i.e.
4440 * one without the enable bit set
4441 */
4442 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
4443 reg = rd32(E1000_VLVF(i));
4444 if (!(reg & E1000_VLVF_VLANID_ENABLE))
4445 break;
4446 }
4447 }
4448 if (i < E1000_VLVF_ARRAY_SIZE) {
4449 /* Found an enabled/available entry */
4450 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
4451
4452 /* if !enabled we need to set this up in vfta */
4453 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
Alexander Duyck51466232009-10-27 23:47:35 +00004454 /* add VID to filter table */
4455 igb_vfta_set(hw, vid, true);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004456 reg |= E1000_VLVF_VLANID_ENABLE;
4457 }
Alexander Duyckcad6d052009-03-13 20:41:37 +00004458 reg &= ~E1000_VLVF_VLANID_MASK;
4459 reg |= vid;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004460 wr32(E1000_VLVF(i), reg);
Alexander Duyckae641bd2009-09-03 14:49:33 +00004461
4462 /* do not modify RLPML for PF devices */
4463 if (vf >= adapter->vfs_allocated_count)
4464 return 0;
4465
4466 if (!adapter->vf_data[vf].vlans_enabled) {
4467 u32 size;
4468 reg = rd32(E1000_VMOLR(vf));
4469 size = reg & E1000_VMOLR_RLPML_MASK;
4470 size += 4;
4471 reg &= ~E1000_VMOLR_RLPML_MASK;
4472 reg |= size;
4473 wr32(E1000_VMOLR(vf), reg);
4474 }
Alexander Duyckae641bd2009-09-03 14:49:33 +00004475
Alexander Duyck51466232009-10-27 23:47:35 +00004476 adapter->vf_data[vf].vlans_enabled++;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004477 return 0;
4478 }
4479 } else {
4480 if (i < E1000_VLVF_ARRAY_SIZE) {
4481 /* remove vf from the pool */
4482 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
4483 /* if pool is empty then remove entry from vfta */
4484 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
4485 reg = 0;
4486 igb_vfta_set(hw, vid, false);
4487 }
4488 wr32(E1000_VLVF(i), reg);
Alexander Duyckae641bd2009-09-03 14:49:33 +00004489
4490 /* do not modify RLPML for PF devices */
4491 if (vf >= adapter->vfs_allocated_count)
4492 return 0;
4493
4494 adapter->vf_data[vf].vlans_enabled--;
4495 if (!adapter->vf_data[vf].vlans_enabled) {
4496 u32 size;
4497 reg = rd32(E1000_VMOLR(vf));
4498 size = reg & E1000_VMOLR_RLPML_MASK;
4499 size -= 4;
4500 reg &= ~E1000_VMOLR_RLPML_MASK;
4501 reg |= size;
4502 wr32(E1000_VMOLR(vf), reg);
4503 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004504 return 0;
4505 }
4506 }
4507 return -1;
4508}
4509
4510static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
4511{
4512 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
4513 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
4514
4515 return igb_vlvf_set(adapter, vid, add, vf);
4516}
4517
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004518static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004519{
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004520 /* clear all flags */
4521 adapter->vf_data[vf].flags = 0;
4522 adapter->vf_data[vf].last_nack = jiffies;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004523
4524 /* reset offloads to defaults */
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004525 igb_set_vmolr(adapter, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004526
4527 /* reset vlans for device */
4528 igb_clear_vf_vfta(adapter, vf);
4529
4530 /* reset multicast table array for vf */
4531 adapter->vf_data[vf].num_vf_mc_hashes = 0;
4532
4533 /* Flush and reset the mta with the new values */
Alexander Duyckff41f8d2009-09-03 14:48:56 +00004534 igb_set_rx_mode(adapter->netdev);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004535}
4536
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004537static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
4538{
4539 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
4540
4541 /* generate a new mac address as we were hotplug removed/added */
4542 random_ether_addr(vf_mac);
4543
4544 /* process remaining reset events */
4545 igb_vf_reset(adapter, vf);
4546}
4547
4548static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004549{
4550 struct e1000_hw *hw = &adapter->hw;
4551 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
Alexander Duyckff41f8d2009-09-03 14:48:56 +00004552 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004553 u32 reg, msgbuf[3];
4554 u8 *addr = (u8 *)(&msgbuf[1]);
4555
4556 /* process all the same items cleared in a function level reset */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004557 igb_vf_reset(adapter, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004558
4559 /* set vf mac address */
Alexander Duyck26ad9172009-10-05 06:32:49 +00004560 igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004561
4562 /* enable transmit and receive for vf */
4563 reg = rd32(E1000_VFTE);
4564 wr32(E1000_VFTE, reg | (1 << vf));
4565 reg = rd32(E1000_VFRE);
4566 wr32(E1000_VFRE, reg | (1 << vf));
4567
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004568 adapter->vf_data[vf].flags = IGB_VF_FLAG_CTS;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004569
4570 /* reply to reset with ack and vf mac address */
4571 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
4572 memcpy(addr, vf_mac, 6);
4573 igb_write_mbx(hw, msgbuf, 3, vf);
4574}
4575
4576static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
4577{
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004578 unsigned char *addr = (char *)&msg[1];
4579 int err = -1;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004580
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004581 if (is_valid_ether_addr(addr))
4582 err = igb_set_vf_mac(adapter, vf, addr);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004583
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004584 return err;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004585}
4586
4587static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
4588{
4589 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004590 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004591 u32 msg = E1000_VT_MSGTYPE_NACK;
4592
4593 /* if device isn't clear to send it shouldn't be reading either */
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004594 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
4595 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004596 igb_write_mbx(hw, &msg, 1, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004597 vf_data->last_nack = jiffies;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004598 }
4599}
4600
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004601static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004602{
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004603 struct pci_dev *pdev = adapter->pdev;
4604 u32 msgbuf[E1000_VFMAILBOX_SIZE];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004605 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004606 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004607 s32 retval;
4608
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004609 retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004610
4611 if (retval)
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004612 dev_err(&pdev->dev, "Error receiving message from VF\n");
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004613
4614 /* this is a message we already processed, do nothing */
4615 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004616 return;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004617
4618 /*
4619 * until the vf completes a reset it should not be
4620 * allowed to start any configuration.
4621 */
4622
4623 if (msgbuf[0] == E1000_VF_RESET) {
4624 igb_vf_reset_msg(adapter, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004625 return;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004626 }
4627
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004628 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
4629 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
4630 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
4631 igb_write_mbx(hw, msgbuf, 1, vf);
4632 vf_data->last_nack = jiffies;
4633 }
4634 return;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004635 }
4636
4637 switch ((msgbuf[0] & 0xFFFF)) {
4638 case E1000_VF_SET_MAC_ADDR:
4639 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
4640 break;
Alexander Duyck7d5753f2009-10-27 23:47:16 +00004641 case E1000_VF_SET_PROMISC:
4642 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
4643 break;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004644 case E1000_VF_SET_MULTICAST:
4645 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
4646 break;
4647 case E1000_VF_SET_LPE:
4648 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
4649 break;
4650 case E1000_VF_SET_VLAN:
4651 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
4652 break;
4653 default:
Alexander Duyck090b1792009-10-27 23:51:55 +00004654 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004655 retval = -1;
4656 break;
4657 }
4658
4659 /* notify the VF of the results of what it sent us */
4660 if (retval)
4661 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
4662 else
4663 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
4664
4665 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
4666
4667 igb_write_mbx(hw, msgbuf, 1, vf);
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004668}
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004669
Alexander Duyckf2ca0db2009-10-27 23:46:57 +00004670static void igb_msg_task(struct igb_adapter *adapter)
4671{
4672 struct e1000_hw *hw = &adapter->hw;
4673 u32 vf;
4674
4675 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4676 /* process any reset requests */
4677 if (!igb_check_for_rst(hw, vf))
4678 igb_vf_reset_event(adapter, vf);
4679
4680 /* process any messages pending */
4681 if (!igb_check_for_msg(hw, vf))
4682 igb_rcv_msg_from_vf(adapter, vf);
4683
4684 /* process any acks */
4685 if (!igb_check_for_ack(hw, vf))
4686 igb_rcv_ack_from_vf(adapter, vf);
4687 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08004688}
4689
Auke Kok9d5c8242008-01-24 02:22:38 -08004690/**
Alexander Duyck68d480c2009-10-05 06:33:08 +00004691 * igb_set_uta - Set unicast filter table address
4692 * @adapter: board private structure
4693 *
4694 * The unicast table address is a register array of 32-bit registers.
4695 * The table is meant to be used in a way similar to how the MTA is used
4696 * however due to certain limitations in the hardware it is necessary to
4697 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscous
4698 * enable bit to allow vlan tag stripping when promiscous mode is enabled
4699 **/
4700static void igb_set_uta(struct igb_adapter *adapter)
4701{
4702 struct e1000_hw *hw = &adapter->hw;
4703 int i;
4704
4705 /* The UTA table only exists on 82576 hardware and newer */
4706 if (hw->mac.type < e1000_82576)
4707 return;
4708
4709 /* we only need to do this if VMDq is enabled */
4710 if (!adapter->vfs_allocated_count)
4711 return;
4712
4713 for (i = 0; i < hw->mac.uta_reg_count; i++)
4714 array_wr32(E1000_UTA, i, ~0);
4715}
4716
4717/**
Auke Kok9d5c8242008-01-24 02:22:38 -08004718 * igb_intr_msi - Interrupt Handler
4719 * @irq: interrupt number
4720 * @data: pointer to a network interface device structure
4721 **/
4722static irqreturn_t igb_intr_msi(int irq, void *data)
4723{
Alexander Duyck047e0032009-10-27 15:49:27 +00004724 struct igb_adapter *adapter = data;
4725 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08004726 struct e1000_hw *hw = &adapter->hw;
4727 /* read ICR disables interrupts using IAM */
4728 u32 icr = rd32(E1000_ICR);
4729
Alexander Duyck047e0032009-10-27 15:49:27 +00004730 igb_write_itr(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08004731
Alexander Duyck047e0032009-10-27 15:49:27 +00004732 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00004733 /* HW is reporting DMA is out of sync */
4734 adapter->stats.doosync++;
4735 }
4736
Auke Kok9d5c8242008-01-24 02:22:38 -08004737 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
4738 hw->mac.get_link_status = 1;
4739 if (!test_bit(__IGB_DOWN, &adapter->state))
4740 mod_timer(&adapter->watchdog_timer, jiffies + 1);
4741 }
4742
Alexander Duyck047e0032009-10-27 15:49:27 +00004743 napi_schedule(&q_vector->napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08004744
4745 return IRQ_HANDLED;
4746}
4747
4748/**
Alexander Duyck4a3c6432009-02-06 23:20:49 +00004749 * igb_intr - Legacy Interrupt Handler
Auke Kok9d5c8242008-01-24 02:22:38 -08004750 * @irq: interrupt number
4751 * @data: pointer to a network interface device structure
4752 **/
4753static irqreturn_t igb_intr(int irq, void *data)
4754{
Alexander Duyck047e0032009-10-27 15:49:27 +00004755 struct igb_adapter *adapter = data;
4756 struct igb_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9d5c8242008-01-24 02:22:38 -08004757 struct e1000_hw *hw = &adapter->hw;
4758 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
4759 * need for the IMC write */
4760 u32 icr = rd32(E1000_ICR);
Auke Kok9d5c8242008-01-24 02:22:38 -08004761 if (!icr)
4762 return IRQ_NONE; /* Not our interrupt */
4763
Alexander Duyck047e0032009-10-27 15:49:27 +00004764 igb_write_itr(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08004765
4766 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
4767 * not set, then the adapter didn't send an interrupt */
4768 if (!(icr & E1000_ICR_INT_ASSERTED))
4769 return IRQ_NONE;
4770
Alexander Duyck047e0032009-10-27 15:49:27 +00004771 if (icr & E1000_ICR_DOUTSYNC) {
Alexander Duyckdda0e082009-02-06 23:19:08 +00004772 /* HW is reporting DMA is out of sync */
4773 adapter->stats.doosync++;
4774 }
4775
Auke Kok9d5c8242008-01-24 02:22:38 -08004776 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
4777 hw->mac.get_link_status = 1;
4778 /* guard against interrupt when we're going down */
4779 if (!test_bit(__IGB_DOWN, &adapter->state))
4780 mod_timer(&adapter->watchdog_timer, jiffies + 1);
4781 }
4782
Alexander Duyck047e0032009-10-27 15:49:27 +00004783 napi_schedule(&q_vector->napi);
Auke Kok9d5c8242008-01-24 02:22:38 -08004784
4785 return IRQ_HANDLED;
4786}
4787
Alexander Duyck047e0032009-10-27 15:49:27 +00004788static inline void igb_ring_irq_enable(struct igb_q_vector *q_vector)
Alexander Duyck46544252009-02-19 20:39:04 -08004789{
Alexander Duyck047e0032009-10-27 15:49:27 +00004790 struct igb_adapter *adapter = q_vector->adapter;
Alexander Duyck46544252009-02-19 20:39:04 -08004791 struct e1000_hw *hw = &adapter->hw;
4792
Alexander Duyck4fc82ad2009-10-27 23:45:42 +00004793 if ((q_vector->rx_ring && (adapter->rx_itr_setting & 3)) ||
4794 (!q_vector->rx_ring && (adapter->tx_itr_setting & 3))) {
Alexander Duyck047e0032009-10-27 15:49:27 +00004795 if (!adapter->msix_entries)
Alexander Duyck46544252009-02-19 20:39:04 -08004796 igb_set_itr(adapter);
4797 else
Alexander Duyck047e0032009-10-27 15:49:27 +00004798 igb_update_ring_itr(q_vector);
Alexander Duyck46544252009-02-19 20:39:04 -08004799 }
4800
4801 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4802 if (adapter->msix_entries)
Alexander Duyck047e0032009-10-27 15:49:27 +00004803 wr32(E1000_EIMS, q_vector->eims_value);
Alexander Duyck46544252009-02-19 20:39:04 -08004804 else
4805 igb_irq_enable(adapter);
4806 }
4807}
4808
Auke Kok9d5c8242008-01-24 02:22:38 -08004809/**
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004810 * igb_poll - NAPI Rx polling callback
4811 * @napi: napi polling structure
4812 * @budget: count of how many packets we should handle
Auke Kok9d5c8242008-01-24 02:22:38 -08004813 **/
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004814static int igb_poll(struct napi_struct *napi, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08004815{
Alexander Duyck047e0032009-10-27 15:49:27 +00004816 struct igb_q_vector *q_vector = container_of(napi,
4817 struct igb_q_vector,
4818 napi);
4819 int tx_clean_complete = 1, work_done = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004820
Jeff Kirsher421e02f2008-10-17 11:08:31 -07004821#ifdef CONFIG_IGB_DCA
Alexander Duyck047e0032009-10-27 15:49:27 +00004822 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
4823 igb_update_dca(q_vector);
Jeb Cramerfe4506b2008-07-08 15:07:55 -07004824#endif
Alexander Duyck047e0032009-10-27 15:49:27 +00004825 if (q_vector->tx_ring)
4826 tx_clean_complete = igb_clean_tx_irq(q_vector);
Auke Kok9d5c8242008-01-24 02:22:38 -08004827
Alexander Duyck047e0032009-10-27 15:49:27 +00004828 if (q_vector->rx_ring)
4829 igb_clean_rx_irq_adv(q_vector, &work_done, budget);
4830
4831 if (!tx_clean_complete)
4832 work_done = budget;
Auke Kok9d5c8242008-01-24 02:22:38 -08004833
Alexander Duyck46544252009-02-19 20:39:04 -08004834 /* If not enough Rx work done, exit the polling mode */
Alexander Duyck5e6d5b12009-03-13 20:40:38 +00004835 if (work_done < budget) {
Alexander Duyck46544252009-02-19 20:39:04 -08004836 napi_complete(napi);
Alexander Duyck047e0032009-10-27 15:49:27 +00004837 igb_ring_irq_enable(q_vector);
Alexander Duyck46544252009-02-19 20:39:04 -08004838 }
4839
4840 return work_done;
Auke Kok9d5c8242008-01-24 02:22:38 -08004841}
Al Viro6d8126f2008-03-16 22:23:24 +00004842
Auke Kok9d5c8242008-01-24 02:22:38 -08004843/**
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004844 * igb_systim_to_hwtstamp - convert system time value to hw timestamp
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004845 * @adapter: board private structure
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004846 * @shhwtstamps: timestamp structure to update
4847 * @regval: unsigned 64bit system time value.
4848 *
4849 * We need to convert the system time value stored in the RX/TXSTMP registers
4850 * into a hwtstamp which can be used by the upper level timestamping functions
4851 */
4852static void igb_systim_to_hwtstamp(struct igb_adapter *adapter,
4853 struct skb_shared_hwtstamps *shhwtstamps,
4854 u64 regval)
4855{
4856 u64 ns;
4857
Alexander Duyck55cac242009-11-19 12:42:21 +00004858 /*
4859 * The 82580 starts with 1ns at bit 0 in RX/TXSTMPL, shift this up to
4860 * 24 to match clock shift we setup earlier.
4861 */
4862 if (adapter->hw.mac.type == e1000_82580)
4863 regval <<= IGB_82580_TSYNC_SHIFT;
4864
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004865 ns = timecounter_cyc2time(&adapter->clock, regval);
4866 timecompare_update(&adapter->compare, ns);
4867 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
4868 shhwtstamps->hwtstamp = ns_to_ktime(ns);
4869 shhwtstamps->syststamp = timecompare_transform(&adapter->compare, ns);
4870}
4871
4872/**
4873 * igb_tx_hwtstamp - utility function which checks for TX time stamp
4874 * @q_vector: pointer to q_vector containing needed info
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004875 * @skb: packet that was just sent
4876 *
4877 * If we were asked to do hardware stamping and such a time stamp is
4878 * available, then it must have been for this skb here because we only
4879 * allow only one such packet into the queue.
4880 */
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004881static void igb_tx_hwtstamp(struct igb_q_vector *q_vector, struct sk_buff *skb)
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004882{
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004883 struct igb_adapter *adapter = q_vector->adapter;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004884 union skb_shared_tx *shtx = skb_tx(skb);
4885 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004886 struct skb_shared_hwtstamps shhwtstamps;
4887 u64 regval;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004888
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004889 /* if skb does not support hw timestamp or TX stamp not valid exit */
4890 if (likely(!shtx->hardware) ||
4891 !(rd32(E1000_TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID))
4892 return;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004893
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004894 regval = rd32(E1000_TXSTMPL);
4895 regval |= (u64)rd32(E1000_TXSTMPH) << 32;
4896
4897 igb_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
4898 skb_tstamp_tx(skb, &shhwtstamps);
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004899}
4900
4901/**
Auke Kok9d5c8242008-01-24 02:22:38 -08004902 * igb_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyck047e0032009-10-27 15:49:27 +00004903 * @q_vector: pointer to q_vector containing needed info
Auke Kok9d5c8242008-01-24 02:22:38 -08004904 * returns true if ring is completely cleaned
4905 **/
Alexander Duyck047e0032009-10-27 15:49:27 +00004906static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
Auke Kok9d5c8242008-01-24 02:22:38 -08004907{
Alexander Duyck047e0032009-10-27 15:49:27 +00004908 struct igb_adapter *adapter = q_vector->adapter;
4909 struct igb_ring *tx_ring = q_vector->tx_ring;
Alexander Duycke694e962009-10-27 15:53:06 +00004910 struct net_device *netdev = tx_ring->netdev;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004911 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08004912 struct igb_buffer *buffer_info;
4913 struct sk_buff *skb;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004914 union e1000_adv_tx_desc *tx_desc, *eop_desc;
Auke Kok9d5c8242008-01-24 02:22:38 -08004915 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004916 unsigned int i, eop, count = 0;
4917 bool cleaned = false;
Auke Kok9d5c8242008-01-24 02:22:38 -08004918
Auke Kok9d5c8242008-01-24 02:22:38 -08004919 i = tx_ring->next_to_clean;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004920 eop = tx_ring->buffer_info[i].next_to_watch;
4921 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
4922
4923 while ((eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)) &&
4924 (count < tx_ring->count)) {
4925 for (cleaned = false; !cleaned; count++) {
4926 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
Auke Kok9d5c8242008-01-24 02:22:38 -08004927 buffer_info = &tx_ring->buffer_info[i];
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004928 cleaned = (i == eop);
Auke Kok9d5c8242008-01-24 02:22:38 -08004929 skb = buffer_info->skb;
4930
4931 if (skb) {
4932 unsigned int segs, bytecount;
4933 /* gso_segs is currently only valid for tcp */
4934 segs = skb_shinfo(skb)->gso_segs ?: 1;
4935 /* multiply data chunks by size of headers */
4936 bytecount = ((segs - 1) * skb_headlen(skb)) +
4937 skb->len;
4938 total_packets += segs;
4939 total_bytes += bytecount;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00004940
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00004941 igb_tx_hwtstamp(q_vector, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08004942 }
4943
Alexander Duyck80785292009-10-27 15:51:47 +00004944 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004945 tx_desc->wb.status = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004946
4947 i++;
4948 if (i == tx_ring->count)
4949 i = 0;
Auke Kok9d5c8242008-01-24 02:22:38 -08004950 }
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004951 eop = tx_ring->buffer_info[i].next_to_watch;
4952 eop_desc = E1000_TX_DESC_ADV(*tx_ring, eop);
4953 }
4954
Auke Kok9d5c8242008-01-24 02:22:38 -08004955 tx_ring->next_to_clean = i;
4956
Alexander Duyckfc7d3452008-08-26 04:25:08 -07004957 if (unlikely(count &&
Auke Kok9d5c8242008-01-24 02:22:38 -08004958 netif_carrier_ok(netdev) &&
Alexander Duyckc493ea42009-03-20 00:16:50 +00004959 igb_desc_unused(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004960 /* Make sure that anybody stopping the queue after this
4961 * sees the new next_to_clean.
4962 */
4963 smp_mb();
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004964 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
4965 !(test_bit(__IGB_DOWN, &adapter->state))) {
4966 netif_wake_subqueue(netdev, tx_ring->queue_index);
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00004967 tx_ring->tx_stats.restart_queue++;
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07004968 }
Auke Kok9d5c8242008-01-24 02:22:38 -08004969 }
4970
4971 if (tx_ring->detect_tx_hung) {
4972 /* Detect a transmit hang in hardware, this serializes the
4973 * check with the clearing of time_stamp and movement of i */
4974 tx_ring->detect_tx_hung = false;
4975 if (tx_ring->buffer_info[i].time_stamp &&
4976 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
Joe Perches8e95a202009-12-03 07:58:21 +00004977 (adapter->tx_timeout_factor * HZ)) &&
4978 !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08004979
Auke Kok9d5c8242008-01-24 02:22:38 -08004980 /* detected Tx unit hang */
Alexander Duyck80785292009-10-27 15:51:47 +00004981 dev_err(&tx_ring->pdev->dev,
Auke Kok9d5c8242008-01-24 02:22:38 -08004982 "Detected Tx Unit Hang\n"
Alexander Duyck2d064c02008-07-08 15:10:12 -07004983 " Tx Queue <%d>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08004984 " TDH <%x>\n"
4985 " TDT <%x>\n"
4986 " next_to_use <%x>\n"
4987 " next_to_clean <%x>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08004988 "buffer_info[next_to_clean]\n"
4989 " time_stamp <%lx>\n"
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004990 " next_to_watch <%x>\n"
Auke Kok9d5c8242008-01-24 02:22:38 -08004991 " jiffies <%lx>\n"
4992 " desc.status <%x>\n",
Alexander Duyck2d064c02008-07-08 15:10:12 -07004993 tx_ring->queue_index,
Alexander Duyckfce99e32009-10-27 15:51:27 +00004994 readl(tx_ring->head),
4995 readl(tx_ring->tail),
Auke Kok9d5c8242008-01-24 02:22:38 -08004996 tx_ring->next_to_use,
4997 tx_ring->next_to_clean,
Alexander Duyckf7ba2052009-10-27 23:48:51 +00004998 tx_ring->buffer_info[eop].time_stamp,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08004999 eop,
Auke Kok9d5c8242008-01-24 02:22:38 -08005000 jiffies,
Alexander Duyck0e014cb2008-12-26 01:33:18 -08005001 eop_desc->wb.status);
Peter P Waskiewicz Jr661086d2008-07-08 15:06:51 -07005002 netif_stop_subqueue(netdev, tx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08005003 }
5004 }
5005 tx_ring->total_bytes += total_bytes;
5006 tx_ring->total_packets += total_packets;
Alexander Duycke21ed352008-07-08 15:07:24 -07005007 tx_ring->tx_stats.bytes += total_bytes;
5008 tx_ring->tx_stats.packets += total_packets;
Alexander Duyck0e014cb2008-12-26 01:33:18 -08005009 return (count < tx_ring->count);
Auke Kok9d5c8242008-01-24 02:22:38 -08005010}
5011
Auke Kok9d5c8242008-01-24 02:22:38 -08005012/**
5013 * igb_receive_skb - helper function to handle rx indications
Alexander Duyck047e0032009-10-27 15:49:27 +00005014 * @q_vector: structure containing interrupt and ring information
5015 * @skb: packet to send up
5016 * @vlan_tag: vlan tag for packet
Auke Kok9d5c8242008-01-24 02:22:38 -08005017 **/
Alexander Duyck047e0032009-10-27 15:49:27 +00005018static void igb_receive_skb(struct igb_q_vector *q_vector,
5019 struct sk_buff *skb,
5020 u16 vlan_tag)
Auke Kok9d5c8242008-01-24 02:22:38 -08005021{
Alexander Duyck047e0032009-10-27 15:49:27 +00005022 struct igb_adapter *adapter = q_vector->adapter;
Alexander Duyckd3352522008-07-08 15:12:13 -07005023
Alexander Duyck047e0032009-10-27 15:49:27 +00005024 if (vlan_tag)
5025 vlan_gro_receive(&q_vector->napi, adapter->vlgrp,
5026 vlan_tag, skb);
Alexander Duyck182ff8d2009-04-27 22:35:33 +00005027 else
Alexander Duyck047e0032009-10-27 15:49:27 +00005028 napi_gro_receive(&q_vector->napi, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005029}
5030
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00005031static inline void igb_rx_checksum_adv(struct igb_ring *ring,
Auke Kok9d5c8242008-01-24 02:22:38 -08005032 u32 status_err, struct sk_buff *skb)
5033{
5034 skb->ip_summed = CHECKSUM_NONE;
5035
5036 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005037 if (!(ring->flags & IGB_RING_FLAG_RX_CSUM) ||
5038 (status_err & E1000_RXD_STAT_IXSM))
Auke Kok9d5c8242008-01-24 02:22:38 -08005039 return;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005040
Auke Kok9d5c8242008-01-24 02:22:38 -08005041 /* TCP/UDP checksum error bit is set */
5042 if (status_err &
5043 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
Jesse Brandeburgb9473562009-04-27 22:36:13 +00005044 /*
5045 * work around errata with sctp packets where the TCPE aka
5046 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
5047 * packets, (aka let the stack check the crc32c)
5048 */
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005049 if ((skb->len == 60) &&
5050 (ring->flags & IGB_RING_FLAG_RX_SCTP_CSUM))
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00005051 ring->rx_stats.csum_err++;
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005052
Auke Kok9d5c8242008-01-24 02:22:38 -08005053 /* let the stack verify checksum errors */
Auke Kok9d5c8242008-01-24 02:22:38 -08005054 return;
5055 }
5056 /* It must be a TCP or UDP packet with a valid checksum */
5057 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
5058 skb->ip_summed = CHECKSUM_UNNECESSARY;
5059
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005060 dev_dbg(&ring->pdev->dev, "cksum success: bits %08X\n", status_err);
Auke Kok9d5c8242008-01-24 02:22:38 -08005061}
5062
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005063static inline void igb_rx_hwtstamp(struct igb_q_vector *q_vector, u32 staterr,
5064 struct sk_buff *skb)
5065{
5066 struct igb_adapter *adapter = q_vector->adapter;
5067 struct e1000_hw *hw = &adapter->hw;
5068 u64 regval;
5069
5070 /*
5071 * If this bit is set, then the RX registers contain the time stamp. No
5072 * other packet will be time stamped until we read these registers, so
5073 * read the registers to make them available again. Because only one
5074 * packet can be time stamped at a time, we know that the register
5075 * values must belong to this one here and therefore we don't need to
5076 * compare any of the additional attributes stored for it.
5077 *
5078 * If nothing went wrong, then it should have a skb_shared_tx that we
5079 * can turn into a skb_shared_hwtstamps.
5080 */
5081 if (likely(!(staterr & E1000_RXDADV_STAT_TS)))
5082 return;
5083 if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
5084 return;
5085
5086 regval = rd32(E1000_RXSTMPL);
5087 regval |= (u64)rd32(E1000_RXSTMPH) << 32;
5088
5089 igb_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
5090}
Alexander Duyck4c844852009-10-27 15:52:07 +00005091static inline u16 igb_get_hlen(struct igb_ring *rx_ring,
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005092 union e1000_adv_rx_desc *rx_desc)
5093{
5094 /* HW will not DMA in data larger than the given buffer, even if it
5095 * parses the (NFS, of course) header to be larger. In that case, it
5096 * fills the header buffer and spills the rest into the page.
5097 */
5098 u16 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
5099 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
Alexander Duyck4c844852009-10-27 15:52:07 +00005100 if (hlen > rx_ring->rx_buffer_len)
5101 hlen = rx_ring->rx_buffer_len;
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005102 return hlen;
5103}
5104
Alexander Duyck047e0032009-10-27 15:49:27 +00005105static bool igb_clean_rx_irq_adv(struct igb_q_vector *q_vector,
5106 int *work_done, int budget)
Auke Kok9d5c8242008-01-24 02:22:38 -08005107{
Alexander Duyck047e0032009-10-27 15:49:27 +00005108 struct igb_ring *rx_ring = q_vector->rx_ring;
Alexander Duycke694e962009-10-27 15:53:06 +00005109 struct net_device *netdev = rx_ring->netdev;
Alexander Duyck80785292009-10-27 15:51:47 +00005110 struct pci_dev *pdev = rx_ring->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08005111 union e1000_adv_rx_desc *rx_desc , *next_rxd;
5112 struct igb_buffer *buffer_info , *next_buffer;
5113 struct sk_buff *skb;
Auke Kok9d5c8242008-01-24 02:22:38 -08005114 bool cleaned = false;
5115 int cleaned_count = 0;
Alexander Duyckd1eff352009-11-12 18:38:35 +00005116 int current_node = numa_node_id();
Auke Kok9d5c8242008-01-24 02:22:38 -08005117 unsigned int total_bytes = 0, total_packets = 0;
Alexander Duyck73cd78f2009-02-12 18:16:59 +00005118 unsigned int i;
Alexander Duyck2d94d8a2009-07-23 18:10:06 +00005119 u32 staterr;
5120 u16 length;
Alexander Duyck047e0032009-10-27 15:49:27 +00005121 u16 vlan_tag;
Auke Kok9d5c8242008-01-24 02:22:38 -08005122
5123 i = rx_ring->next_to_clean;
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005124 buffer_info = &rx_ring->buffer_info[i];
Auke Kok9d5c8242008-01-24 02:22:38 -08005125 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
5126 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
5127
5128 while (staterr & E1000_RXD_STAT_DD) {
5129 if (*work_done >= budget)
5130 break;
5131 (*work_done)++;
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005132
5133 skb = buffer_info->skb;
5134 prefetch(skb->data - NET_IP_ALIGN);
5135 buffer_info->skb = NULL;
5136
5137 i++;
5138 if (i == rx_ring->count)
5139 i = 0;
Alexander Duyck42d07812009-10-27 23:51:16 +00005140
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005141 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
5142 prefetch(next_rxd);
5143 next_buffer = &rx_ring->buffer_info[i];
5144
5145 length = le16_to_cpu(rx_desc->wb.upper.length);
5146 cleaned = true;
5147 cleaned_count++;
5148
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00005149 if (buffer_info->dma) {
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005150 pci_unmap_single(pdev, buffer_info->dma,
Alexander Duyck4c844852009-10-27 15:52:07 +00005151 rx_ring->rx_buffer_len,
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005152 PCI_DMA_FROMDEVICE);
Jesse Brandeburg91615f72009-06-30 12:45:15 +00005153 buffer_info->dma = 0;
Alexander Duyck4c844852009-10-27 15:52:07 +00005154 if (rx_ring->rx_buffer_len >= IGB_RXBUFFER_1024) {
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00005155 skb_put(skb, length);
5156 goto send_up;
5157 }
Alexander Duyck4c844852009-10-27 15:52:07 +00005158 skb_put(skb, igb_get_hlen(rx_ring, rx_desc));
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005159 }
5160
5161 if (length) {
Auke Kok9d5c8242008-01-24 02:22:38 -08005162 pci_unmap_page(pdev, buffer_info->page_dma,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005163 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
Auke Kok9d5c8242008-01-24 02:22:38 -08005164 buffer_info->page_dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005165
5166 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
5167 buffer_info->page,
5168 buffer_info->page_offset,
5169 length);
5170
Alexander Duyckd1eff352009-11-12 18:38:35 +00005171 if ((page_count(buffer_info->page) != 1) ||
5172 (page_to_nid(buffer_info->page) != current_node))
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005173 buffer_info->page = NULL;
5174 else
5175 get_page(buffer_info->page);
Auke Kok9d5c8242008-01-24 02:22:38 -08005176
5177 skb->len += length;
5178 skb->data_len += length;
5179 skb->truesize += length;
Auke Kok9d5c8242008-01-24 02:22:38 -08005180 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005181
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005182 if (!(staterr & E1000_RXD_STAT_EOP)) {
Alexander Duyckb2d56532008-11-20 00:47:34 -08005183 buffer_info->skb = next_buffer->skb;
5184 buffer_info->dma = next_buffer->dma;
5185 next_buffer->skb = skb;
5186 next_buffer->dma = 0;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005187 goto next_desc;
5188 }
Alexander Duyck69d3ca52009-02-06 23:15:04 +00005189send_up:
Auke Kok9d5c8242008-01-24 02:22:38 -08005190 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
5191 dev_kfree_skb_irq(skb);
5192 goto next_desc;
5193 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005194
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005195 igb_rx_hwtstamp(q_vector, staterr, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005196 total_bytes += skb->len;
5197 total_packets++;
5198
Alexander Duyck85ad76b2009-10-27 15:52:46 +00005199 igb_rx_checksum_adv(rx_ring, staterr, skb);
Auke Kok9d5c8242008-01-24 02:22:38 -08005200
5201 skb->protocol = eth_type_trans(skb, netdev);
Alexander Duyck047e0032009-10-27 15:49:27 +00005202 skb_record_rx_queue(skb, rx_ring->queue_index);
Auke Kok9d5c8242008-01-24 02:22:38 -08005203
Alexander Duyck047e0032009-10-27 15:49:27 +00005204 vlan_tag = ((staterr & E1000_RXD_STAT_VP) ?
5205 le16_to_cpu(rx_desc->wb.upper.vlan) : 0);
5206
5207 igb_receive_skb(q_vector, skb, vlan_tag);
Auke Kok9d5c8242008-01-24 02:22:38 -08005208
Auke Kok9d5c8242008-01-24 02:22:38 -08005209next_desc:
5210 rx_desc->wb.upper.status_error = 0;
5211
5212 /* return some buffers to hardware, one at a time is too slow */
5213 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
Mitch Williams3b644cf2008-06-27 10:59:48 -07005214 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08005215 cleaned_count = 0;
5216 }
5217
5218 /* use prefetched values */
5219 rx_desc = next_rxd;
5220 buffer_info = next_buffer;
Auke Kok9d5c8242008-01-24 02:22:38 -08005221 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
5222 }
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005223
Auke Kok9d5c8242008-01-24 02:22:38 -08005224 rx_ring->next_to_clean = i;
Alexander Duyckc493ea42009-03-20 00:16:50 +00005225 cleaned_count = igb_desc_unused(rx_ring);
Auke Kok9d5c8242008-01-24 02:22:38 -08005226
5227 if (cleaned_count)
Mitch Williams3b644cf2008-06-27 10:59:48 -07005228 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
Auke Kok9d5c8242008-01-24 02:22:38 -08005229
5230 rx_ring->total_packets += total_packets;
5231 rx_ring->total_bytes += total_bytes;
5232 rx_ring->rx_stats.packets += total_packets;
5233 rx_ring->rx_stats.bytes += total_bytes;
Auke Kok9d5c8242008-01-24 02:22:38 -08005234 return cleaned;
5235}
5236
Auke Kok9d5c8242008-01-24 02:22:38 -08005237/**
5238 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
5239 * @adapter: address of board private structure
5240 **/
Alexander Duyckd7ee5b32009-10-27 15:54:23 +00005241void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring, int cleaned_count)
Auke Kok9d5c8242008-01-24 02:22:38 -08005242{
Alexander Duycke694e962009-10-27 15:53:06 +00005243 struct net_device *netdev = rx_ring->netdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08005244 union e1000_adv_rx_desc *rx_desc;
5245 struct igb_buffer *buffer_info;
5246 struct sk_buff *skb;
5247 unsigned int i;
Alexander Duyckdb761762009-02-06 23:15:25 +00005248 int bufsz;
Auke Kok9d5c8242008-01-24 02:22:38 -08005249
5250 i = rx_ring->next_to_use;
5251 buffer_info = &rx_ring->buffer_info[i];
5252
Alexander Duyck4c844852009-10-27 15:52:07 +00005253 bufsz = rx_ring->rx_buffer_len;
Alexander Duyckdb761762009-02-06 23:15:25 +00005254
Auke Kok9d5c8242008-01-24 02:22:38 -08005255 while (cleaned_count--) {
5256 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
5257
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00005258 if ((bufsz < IGB_RXBUFFER_1024) && !buffer_info->page_dma) {
Auke Kok9d5c8242008-01-24 02:22:38 -08005259 if (!buffer_info->page) {
Alexander Duyck42d07812009-10-27 23:51:16 +00005260 buffer_info->page = netdev_alloc_page(netdev);
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005261 if (!buffer_info->page) {
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00005262 rx_ring->rx_stats.alloc_failed++;
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005263 goto no_buffers;
5264 }
5265 buffer_info->page_offset = 0;
5266 } else {
5267 buffer_info->page_offset ^= PAGE_SIZE / 2;
Auke Kok9d5c8242008-01-24 02:22:38 -08005268 }
5269 buffer_info->page_dma =
Alexander Duyck80785292009-10-27 15:51:47 +00005270 pci_map_page(rx_ring->pdev, buffer_info->page,
Alexander Duyckbf36c1a2008-07-08 15:11:40 -07005271 buffer_info->page_offset,
5272 PAGE_SIZE / 2,
Auke Kok9d5c8242008-01-24 02:22:38 -08005273 PCI_DMA_FROMDEVICE);
Alexander Duyck42d07812009-10-27 23:51:16 +00005274 if (pci_dma_mapping_error(rx_ring->pdev,
5275 buffer_info->page_dma)) {
5276 buffer_info->page_dma = 0;
5277 rx_ring->rx_stats.alloc_failed++;
5278 goto no_buffers;
5279 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005280 }
5281
Alexander Duyck42d07812009-10-27 23:51:16 +00005282 skb = buffer_info->skb;
5283 if (!skb) {
Eric Dumazet89d71a62009-10-13 05:34:20 +00005284 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
Auke Kok9d5c8242008-01-24 02:22:38 -08005285 if (!skb) {
Alexander Duyck04a5fcaa2009-10-27 15:52:27 +00005286 rx_ring->rx_stats.alloc_failed++;
Auke Kok9d5c8242008-01-24 02:22:38 -08005287 goto no_buffers;
5288 }
5289
Auke Kok9d5c8242008-01-24 02:22:38 -08005290 buffer_info->skb = skb;
Alexander Duyck42d07812009-10-27 23:51:16 +00005291 }
5292 if (!buffer_info->dma) {
Alexander Duyck80785292009-10-27 15:51:47 +00005293 buffer_info->dma = pci_map_single(rx_ring->pdev,
5294 skb->data,
Auke Kok9d5c8242008-01-24 02:22:38 -08005295 bufsz,
5296 PCI_DMA_FROMDEVICE);
Alexander Duyck42d07812009-10-27 23:51:16 +00005297 if (pci_dma_mapping_error(rx_ring->pdev,
5298 buffer_info->dma)) {
5299 buffer_info->dma = 0;
5300 rx_ring->rx_stats.alloc_failed++;
5301 goto no_buffers;
5302 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005303 }
5304 /* Refresh the desc even if buffer_addrs didn't change because
5305 * each write-back erases this info. */
Alexander Duyck6ec43fe2009-10-27 15:50:48 +00005306 if (bufsz < IGB_RXBUFFER_1024) {
Auke Kok9d5c8242008-01-24 02:22:38 -08005307 rx_desc->read.pkt_addr =
5308 cpu_to_le64(buffer_info->page_dma);
5309 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
5310 } else {
Alexander Duyck42d07812009-10-27 23:51:16 +00005311 rx_desc->read.pkt_addr = cpu_to_le64(buffer_info->dma);
Auke Kok9d5c8242008-01-24 02:22:38 -08005312 rx_desc->read.hdr_addr = 0;
5313 }
5314
5315 i++;
5316 if (i == rx_ring->count)
5317 i = 0;
5318 buffer_info = &rx_ring->buffer_info[i];
5319 }
5320
5321no_buffers:
5322 if (rx_ring->next_to_use != i) {
5323 rx_ring->next_to_use = i;
5324 if (i == 0)
5325 i = (rx_ring->count - 1);
5326 else
5327 i--;
5328
5329 /* Force memory writes to complete before letting h/w
5330 * know there are new descriptors to fetch. (Only
5331 * applicable for weak-ordered memory model archs,
5332 * such as IA-64). */
5333 wmb();
Alexander Duyckfce99e32009-10-27 15:51:27 +00005334 writel(i, rx_ring->tail);
Auke Kok9d5c8242008-01-24 02:22:38 -08005335 }
5336}
5337
5338/**
5339 * igb_mii_ioctl -
5340 * @netdev:
5341 * @ifreq:
5342 * @cmd:
5343 **/
5344static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5345{
5346 struct igb_adapter *adapter = netdev_priv(netdev);
5347 struct mii_ioctl_data *data = if_mii(ifr);
5348
5349 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5350 return -EOPNOTSUPP;
5351
5352 switch (cmd) {
5353 case SIOCGMIIPHY:
5354 data->phy_id = adapter->hw.phy.addr;
5355 break;
5356 case SIOCGMIIREG:
Alexander Duyckf5f4cf02008-11-21 21:30:24 -08005357 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
5358 &data->val_out))
Auke Kok9d5c8242008-01-24 02:22:38 -08005359 return -EIO;
5360 break;
5361 case SIOCSMIIREG:
5362 default:
5363 return -EOPNOTSUPP;
5364 }
5365 return 0;
5366}
5367
5368/**
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005369 * igb_hwtstamp_ioctl - control hardware time stamping
5370 * @netdev:
5371 * @ifreq:
5372 * @cmd:
5373 *
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005374 * Outgoing time stamping can be enabled and disabled. Play nice and
5375 * disable it when requested, although it shouldn't case any overhead
5376 * when no packet needs it. At most one packet in the queue may be
5377 * marked for time stamping, otherwise it would be impossible to tell
5378 * for sure to which packet the hardware time stamp belongs.
5379 *
5380 * Incoming time stamping has to be configured via the hardware
5381 * filters. Not all combinations are supported, in particular event
5382 * type has to be specified. Matching the kind of event packet is
5383 * not supported, with the exception of "all V2 events regardless of
5384 * level 2 or 4".
5385 *
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005386 **/
5387static int igb_hwtstamp_ioctl(struct net_device *netdev,
5388 struct ifreq *ifr, int cmd)
5389{
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005390 struct igb_adapter *adapter = netdev_priv(netdev);
5391 struct e1000_hw *hw = &adapter->hw;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005392 struct hwtstamp_config config;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005393 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
5394 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005395 u32 tsync_rx_cfg = 0;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005396 bool is_l4 = false;
5397 bool is_l2 = false;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005398 u32 regval;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005399
5400 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5401 return -EFAULT;
5402
5403 /* reserved for future extensions */
5404 if (config.flags)
5405 return -EINVAL;
5406
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005407 switch (config.tx_type) {
5408 case HWTSTAMP_TX_OFF:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005409 tsync_tx_ctl = 0;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005410 case HWTSTAMP_TX_ON:
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005411 break;
5412 default:
5413 return -ERANGE;
5414 }
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005415
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005416 switch (config.rx_filter) {
5417 case HWTSTAMP_FILTER_NONE:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005418 tsync_rx_ctl = 0;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005419 break;
5420 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
5421 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
5422 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
5423 case HWTSTAMP_FILTER_ALL:
5424 /*
5425 * register TSYNCRXCFG must be set, therefore it is not
5426 * possible to time stamp both Sync and Delay_Req messages
5427 * => fall back to time stamping all packets
5428 */
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005429 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005430 config.rx_filter = HWTSTAMP_FILTER_ALL;
5431 break;
5432 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005433 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005434 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005435 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005436 break;
5437 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005438 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005439 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005440 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005441 break;
5442 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
5443 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005444 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005445 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005446 is_l2 = true;
5447 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005448 config.rx_filter = HWTSTAMP_FILTER_SOME;
5449 break;
5450 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
5451 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005452 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005453 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005454 is_l2 = true;
5455 is_l4 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005456 config.rx_filter = HWTSTAMP_FILTER_SOME;
5457 break;
5458 case HWTSTAMP_FILTER_PTP_V2_EVENT:
5459 case HWTSTAMP_FILTER_PTP_V2_SYNC:
5460 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005461 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005462 config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005463 is_l2 = true;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005464 break;
5465 default:
5466 return -ERANGE;
5467 }
5468
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005469 if (hw->mac.type == e1000_82575) {
5470 if (tsync_rx_ctl | tsync_tx_ctl)
5471 return -EINVAL;
5472 return 0;
5473 }
5474
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005475 /* enable/disable TX */
5476 regval = rd32(E1000_TSYNCTXCTL);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005477 regval &= ~E1000_TSYNCTXCTL_ENABLED;
5478 regval |= tsync_tx_ctl;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005479 wr32(E1000_TSYNCTXCTL, regval);
5480
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005481 /* enable/disable RX */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005482 regval = rd32(E1000_TSYNCRXCTL);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005483 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
5484 regval |= tsync_rx_ctl;
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005485 wr32(E1000_TSYNCRXCTL, regval);
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005486
5487 /* define which PTP packets are time stamped */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005488 wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
5489
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005490 /* define ethertype filter for timestamped packets */
5491 if (is_l2)
5492 wr32(E1000_ETQF(3),
5493 (E1000_ETQF_FILTER_ENABLE | /* enable filter */
5494 E1000_ETQF_1588 | /* enable timestamping */
5495 ETH_P_1588)); /* 1588 eth protocol type */
5496 else
5497 wr32(E1000_ETQF(3), 0);
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005498
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005499#define PTP_PORT 319
5500 /* L4 Queue Filter[3]: filter by destination port and protocol */
5501 if (is_l4) {
5502 u32 ftqf = (IPPROTO_UDP /* UDP */
5503 | E1000_FTQF_VF_BP /* VF not compared */
5504 | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
5505 | E1000_FTQF_MASK); /* mask all inputs */
5506 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005507
Alexander Duyckc5b9bd52009-10-27 23:46:01 +00005508 wr32(E1000_IMIR(3), htons(PTP_PORT));
5509 wr32(E1000_IMIREXT(3),
5510 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
5511 if (hw->mac.type == e1000_82576) {
5512 /* enable source port check */
5513 wr32(E1000_SPQF(3), htons(PTP_PORT));
5514 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
5515 }
5516 wr32(E1000_FTQF(3), ftqf);
5517 } else {
5518 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
5519 }
Patrick Ohly33af6bc2009-02-12 05:03:43 +00005520 wrfl();
5521
5522 adapter->hwtstamp_config = config;
5523
5524 /* clear TX/RX time stamp registers, just to be sure */
5525 regval = rd32(E1000_TXSTMPH);
5526 regval = rd32(E1000_RXSTMPH);
5527
5528 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
5529 -EFAULT : 0;
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005530}
5531
5532/**
Auke Kok9d5c8242008-01-24 02:22:38 -08005533 * igb_ioctl -
5534 * @netdev:
5535 * @ifreq:
5536 * @cmd:
5537 **/
5538static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5539{
5540 switch (cmd) {
5541 case SIOCGMIIPHY:
5542 case SIOCGMIIREG:
5543 case SIOCSMIIREG:
5544 return igb_mii_ioctl(netdev, ifr, cmd);
Patrick Ohlyc6cb0902009-02-12 05:03:42 +00005545 case SIOCSHWTSTAMP:
5546 return igb_hwtstamp_ioctl(netdev, ifr, cmd);
Auke Kok9d5c8242008-01-24 02:22:38 -08005547 default:
5548 return -EOPNOTSUPP;
5549 }
5550}
5551
Alexander Duyck009bc062009-07-23 18:08:35 +00005552s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
5553{
5554 struct igb_adapter *adapter = hw->back;
5555 u16 cap_offset;
5556
5557 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
5558 if (!cap_offset)
5559 return -E1000_ERR_CONFIG;
5560
5561 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
5562
5563 return 0;
5564}
5565
5566s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
5567{
5568 struct igb_adapter *adapter = hw->back;
5569 u16 cap_offset;
5570
5571 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
5572 if (!cap_offset)
5573 return -E1000_ERR_CONFIG;
5574
5575 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
5576
5577 return 0;
5578}
5579
Auke Kok9d5c8242008-01-24 02:22:38 -08005580static void igb_vlan_rx_register(struct net_device *netdev,
5581 struct vlan_group *grp)
5582{
5583 struct igb_adapter *adapter = netdev_priv(netdev);
5584 struct e1000_hw *hw = &adapter->hw;
5585 u32 ctrl, rctl;
5586
5587 igb_irq_disable(adapter);
5588 adapter->vlgrp = grp;
5589
5590 if (grp) {
5591 /* enable VLAN tag insert/strip */
5592 ctrl = rd32(E1000_CTRL);
5593 ctrl |= E1000_CTRL_VME;
5594 wr32(E1000_CTRL, ctrl);
5595
Alexander Duyck51466232009-10-27 23:47:35 +00005596 /* Disable CFI check */
Auke Kok9d5c8242008-01-24 02:22:38 -08005597 rctl = rd32(E1000_RCTL);
Auke Kok9d5c8242008-01-24 02:22:38 -08005598 rctl &= ~E1000_RCTL_CFIEN;
5599 wr32(E1000_RCTL, rctl);
Auke Kok9d5c8242008-01-24 02:22:38 -08005600 } else {
5601 /* disable VLAN tag insert/strip */
5602 ctrl = rd32(E1000_CTRL);
5603 ctrl &= ~E1000_CTRL_VME;
5604 wr32(E1000_CTRL, ctrl);
Auke Kok9d5c8242008-01-24 02:22:38 -08005605 }
5606
Alexander Duycke1739522009-02-19 20:39:44 -08005607 igb_rlpml_set(adapter);
5608
Auke Kok9d5c8242008-01-24 02:22:38 -08005609 if (!test_bit(__IGB_DOWN, &adapter->state))
5610 igb_irq_enable(adapter);
5611}
5612
5613static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
5614{
5615 struct igb_adapter *adapter = netdev_priv(netdev);
5616 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005617 int pf_id = adapter->vfs_allocated_count;
Auke Kok9d5c8242008-01-24 02:22:38 -08005618
Alexander Duyck51466232009-10-27 23:47:35 +00005619 /* attempt to add filter to vlvf array */
5620 igb_vlvf_set(adapter, vid, true, pf_id);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005621
Alexander Duyck51466232009-10-27 23:47:35 +00005622 /* add the filter since PF can receive vlans w/o entry in vlvf */
5623 igb_vfta_set(hw, vid, true);
Auke Kok9d5c8242008-01-24 02:22:38 -08005624}
5625
5626static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
5627{
5628 struct igb_adapter *adapter = netdev_priv(netdev);
5629 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005630 int pf_id = adapter->vfs_allocated_count;
Alexander Duyck51466232009-10-27 23:47:35 +00005631 s32 err;
Auke Kok9d5c8242008-01-24 02:22:38 -08005632
5633 igb_irq_disable(adapter);
5634 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5635
5636 if (!test_bit(__IGB_DOWN, &adapter->state))
5637 igb_irq_enable(adapter);
5638
Alexander Duyck51466232009-10-27 23:47:35 +00005639 /* remove vlan from VLVF table array */
5640 err = igb_vlvf_set(adapter, vid, false, pf_id);
Auke Kok9d5c8242008-01-24 02:22:38 -08005641
Alexander Duyck51466232009-10-27 23:47:35 +00005642 /* if vid was not present in VLVF just remove it from table */
5643 if (err)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005644 igb_vfta_set(hw, vid, false);
Auke Kok9d5c8242008-01-24 02:22:38 -08005645}
5646
5647static void igb_restore_vlan(struct igb_adapter *adapter)
5648{
5649 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5650
5651 if (adapter->vlgrp) {
5652 u16 vid;
5653 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5654 if (!vlan_group_get_device(adapter->vlgrp, vid))
5655 continue;
5656 igb_vlan_rx_add_vid(adapter->netdev, vid);
5657 }
5658 }
5659}
5660
5661int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
5662{
Alexander Duyck090b1792009-10-27 23:51:55 +00005663 struct pci_dev *pdev = adapter->pdev;
Auke Kok9d5c8242008-01-24 02:22:38 -08005664 struct e1000_mac_info *mac = &adapter->hw.mac;
5665
5666 mac->autoneg = 0;
5667
Auke Kok9d5c8242008-01-24 02:22:38 -08005668 switch (spddplx) {
5669 case SPEED_10 + DUPLEX_HALF:
5670 mac->forced_speed_duplex = ADVERTISE_10_HALF;
5671 break;
5672 case SPEED_10 + DUPLEX_FULL:
5673 mac->forced_speed_duplex = ADVERTISE_10_FULL;
5674 break;
5675 case SPEED_100 + DUPLEX_HALF:
5676 mac->forced_speed_duplex = ADVERTISE_100_HALF;
5677 break;
5678 case SPEED_100 + DUPLEX_FULL:
5679 mac->forced_speed_duplex = ADVERTISE_100_FULL;
5680 break;
5681 case SPEED_1000 + DUPLEX_FULL:
5682 mac->autoneg = 1;
5683 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
5684 break;
5685 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5686 default:
Alexander Duyck090b1792009-10-27 23:51:55 +00005687 dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
Auke Kok9d5c8242008-01-24 02:22:38 -08005688 return -EINVAL;
5689 }
5690 return 0;
5691}
5692
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00005693static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake)
Auke Kok9d5c8242008-01-24 02:22:38 -08005694{
5695 struct net_device *netdev = pci_get_drvdata(pdev);
5696 struct igb_adapter *adapter = netdev_priv(netdev);
5697 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck2d064c02008-07-08 15:10:12 -07005698 u32 ctrl, rctl, status;
Auke Kok9d5c8242008-01-24 02:22:38 -08005699 u32 wufc = adapter->wol;
5700#ifdef CONFIG_PM
5701 int retval = 0;
5702#endif
5703
5704 netif_device_detach(netdev);
5705
Alexander Duycka88f10e2008-07-08 15:13:38 -07005706 if (netif_running(netdev))
5707 igb_close(netdev);
5708
Alexander Duyck047e0032009-10-27 15:49:27 +00005709 igb_clear_interrupt_scheme(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08005710
5711#ifdef CONFIG_PM
5712 retval = pci_save_state(pdev);
5713 if (retval)
5714 return retval;
5715#endif
5716
5717 status = rd32(E1000_STATUS);
5718 if (status & E1000_STATUS_LU)
5719 wufc &= ~E1000_WUFC_LNKC;
5720
5721 if (wufc) {
5722 igb_setup_rctl(adapter);
Alexander Duyckff41f8d2009-09-03 14:48:56 +00005723 igb_set_rx_mode(netdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08005724
5725 /* turn on all-multi mode if wake on multicast is enabled */
5726 if (wufc & E1000_WUFC_MC) {
5727 rctl = rd32(E1000_RCTL);
5728 rctl |= E1000_RCTL_MPE;
5729 wr32(E1000_RCTL, rctl);
5730 }
5731
5732 ctrl = rd32(E1000_CTRL);
5733 /* advertise wake from D3Cold */
5734 #define E1000_CTRL_ADVD3WUC 0x00100000
5735 /* phy power management enable */
5736 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5737 ctrl |= E1000_CTRL_ADVD3WUC;
5738 wr32(E1000_CTRL, ctrl);
5739
Auke Kok9d5c8242008-01-24 02:22:38 -08005740 /* Allow time for pending master requests to run */
Alexander Duyck330a6d62009-10-27 23:51:35 +00005741 igb_disable_pcie_master(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08005742
5743 wr32(E1000_WUC, E1000_WUC_PME_EN);
5744 wr32(E1000_WUFC, wufc);
Auke Kok9d5c8242008-01-24 02:22:38 -08005745 } else {
5746 wr32(E1000_WUC, 0);
5747 wr32(E1000_WUFC, 0);
Auke Kok9d5c8242008-01-24 02:22:38 -08005748 }
5749
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00005750 *enable_wake = wufc || adapter->en_mng_pt;
5751 if (!*enable_wake)
Alexander Duyck2fb02a22009-09-14 08:22:54 +00005752 igb_shutdown_serdes_link_82575(hw);
Auke Kok9d5c8242008-01-24 02:22:38 -08005753
5754 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5755 * would have already happened in close and is redundant. */
5756 igb_release_hw_control(adapter);
5757
5758 pci_disable_device(pdev);
5759
Auke Kok9d5c8242008-01-24 02:22:38 -08005760 return 0;
5761}
5762
5763#ifdef CONFIG_PM
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00005764static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
5765{
5766 int retval;
5767 bool wake;
5768
5769 retval = __igb_shutdown(pdev, &wake);
5770 if (retval)
5771 return retval;
5772
5773 if (wake) {
5774 pci_prepare_to_sleep(pdev);
5775 } else {
5776 pci_wake_from_d3(pdev, false);
5777 pci_set_power_state(pdev, PCI_D3hot);
5778 }
5779
5780 return 0;
5781}
5782
Auke Kok9d5c8242008-01-24 02:22:38 -08005783static int igb_resume(struct pci_dev *pdev)
5784{
5785 struct net_device *netdev = pci_get_drvdata(pdev);
5786 struct igb_adapter *adapter = netdev_priv(netdev);
5787 struct e1000_hw *hw = &adapter->hw;
5788 u32 err;
5789
5790 pci_set_power_state(pdev, PCI_D0);
5791 pci_restore_state(pdev);
Taku Izumi42bfd33a2008-06-20 12:10:30 +09005792
Alexander Duyckaed5dec2009-02-06 23:16:04 +00005793 err = pci_enable_device_mem(pdev);
Auke Kok9d5c8242008-01-24 02:22:38 -08005794 if (err) {
5795 dev_err(&pdev->dev,
5796 "igb: Cannot enable PCI device from suspend\n");
5797 return err;
5798 }
5799 pci_set_master(pdev);
5800
5801 pci_enable_wake(pdev, PCI_D3hot, 0);
5802 pci_enable_wake(pdev, PCI_D3cold, 0);
5803
Alexander Duyck047e0032009-10-27 15:49:27 +00005804 if (igb_init_interrupt_scheme(adapter)) {
Alexander Duycka88f10e2008-07-08 15:13:38 -07005805 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
5806 return -ENOMEM;
Auke Kok9d5c8242008-01-24 02:22:38 -08005807 }
5808
5809 /* e1000_power_up_phy(adapter); */
5810
5811 igb_reset(adapter);
Alexander Duycka8564f02009-02-06 23:21:10 +00005812
5813 /* let the f/w know that the h/w is now under the control of the
5814 * driver. */
5815 igb_get_hw_control(adapter);
5816
Auke Kok9d5c8242008-01-24 02:22:38 -08005817 wr32(E1000_WUS, ~0);
5818
Alexander Duycka88f10e2008-07-08 15:13:38 -07005819 if (netif_running(netdev)) {
5820 err = igb_open(netdev);
5821 if (err)
5822 return err;
5823 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005824
5825 netif_device_attach(netdev);
5826
Auke Kok9d5c8242008-01-24 02:22:38 -08005827 return 0;
5828}
5829#endif
5830
5831static void igb_shutdown(struct pci_dev *pdev)
5832{
Rafael J. Wysocki3fe7c4c2009-03-31 21:23:50 +00005833 bool wake;
5834
5835 __igb_shutdown(pdev, &wake);
5836
5837 if (system_state == SYSTEM_POWER_OFF) {
5838 pci_wake_from_d3(pdev, wake);
5839 pci_set_power_state(pdev, PCI_D3hot);
5840 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005841}
5842
5843#ifdef CONFIG_NET_POLL_CONTROLLER
5844/*
5845 * Polling 'interrupt' - used by things like netconsole to send skbs
5846 * without having to re-enable interrupts. It's not called while
5847 * the interrupt routine is executing.
5848 */
5849static void igb_netpoll(struct net_device *netdev)
5850{
5851 struct igb_adapter *adapter = netdev_priv(netdev);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00005852 struct e1000_hw *hw = &adapter->hw;
Auke Kok9d5c8242008-01-24 02:22:38 -08005853 int i;
Auke Kok9d5c8242008-01-24 02:22:38 -08005854
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00005855 if (!adapter->msix_entries) {
Alexander Duyck047e0032009-10-27 15:49:27 +00005856 struct igb_q_vector *q_vector = adapter->q_vector[0];
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00005857 igb_irq_disable(adapter);
Alexander Duyck047e0032009-10-27 15:49:27 +00005858 napi_schedule(&q_vector->napi);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00005859 return;
5860 }
Alexander Duyck7dfc16f2008-07-08 15:10:46 -07005861
Alexander Duyck047e0032009-10-27 15:49:27 +00005862 for (i = 0; i < adapter->num_q_vectors; i++) {
5863 struct igb_q_vector *q_vector = adapter->q_vector[i];
5864 wr32(E1000_EIMC, q_vector->eims_value);
5865 napi_schedule(&q_vector->napi);
Alexander Duyckeebbbdb2009-02-06 23:19:29 +00005866 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005867}
5868#endif /* CONFIG_NET_POLL_CONTROLLER */
5869
5870/**
5871 * igb_io_error_detected - called when PCI error is detected
5872 * @pdev: Pointer to PCI device
5873 * @state: The current pci connection state
5874 *
5875 * This function is called after a PCI bus error affecting
5876 * this device has been detected.
5877 */
5878static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
5879 pci_channel_state_t state)
5880{
5881 struct net_device *netdev = pci_get_drvdata(pdev);
5882 struct igb_adapter *adapter = netdev_priv(netdev);
5883
5884 netif_device_detach(netdev);
5885
Alexander Duyck59ed6ee2009-06-30 12:46:34 +00005886 if (state == pci_channel_io_perm_failure)
5887 return PCI_ERS_RESULT_DISCONNECT;
5888
Auke Kok9d5c8242008-01-24 02:22:38 -08005889 if (netif_running(netdev))
5890 igb_down(adapter);
5891 pci_disable_device(pdev);
5892
5893 /* Request a slot slot reset. */
5894 return PCI_ERS_RESULT_NEED_RESET;
5895}
5896
5897/**
5898 * igb_io_slot_reset - called after the pci bus has been reset.
5899 * @pdev: Pointer to PCI device
5900 *
5901 * Restart the card from scratch, as if from a cold-boot. Implementation
5902 * resembles the first-half of the igb_resume routine.
5903 */
5904static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
5905{
5906 struct net_device *netdev = pci_get_drvdata(pdev);
5907 struct igb_adapter *adapter = netdev_priv(netdev);
5908 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck40a914f2008-11-27 00:24:37 -08005909 pci_ers_result_t result;
Taku Izumi42bfd33a2008-06-20 12:10:30 +09005910 int err;
Auke Kok9d5c8242008-01-24 02:22:38 -08005911
Alexander Duyckaed5dec2009-02-06 23:16:04 +00005912 if (pci_enable_device_mem(pdev)) {
Auke Kok9d5c8242008-01-24 02:22:38 -08005913 dev_err(&pdev->dev,
5914 "Cannot re-enable PCI device after reset.\n");
Alexander Duyck40a914f2008-11-27 00:24:37 -08005915 result = PCI_ERS_RESULT_DISCONNECT;
5916 } else {
5917 pci_set_master(pdev);
5918 pci_restore_state(pdev);
5919
5920 pci_enable_wake(pdev, PCI_D3hot, 0);
5921 pci_enable_wake(pdev, PCI_D3cold, 0);
5922
5923 igb_reset(adapter);
5924 wr32(E1000_WUS, ~0);
5925 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9d5c8242008-01-24 02:22:38 -08005926 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005927
Jeff Kirsherea943d42008-12-11 20:34:19 -08005928 err = pci_cleanup_aer_uncorrect_error_status(pdev);
5929 if (err) {
5930 dev_err(&pdev->dev, "pci_cleanup_aer_uncorrect_error_status "
5931 "failed 0x%0x\n", err);
5932 /* non-fatal, continue */
5933 }
Auke Kok9d5c8242008-01-24 02:22:38 -08005934
Alexander Duyck40a914f2008-11-27 00:24:37 -08005935 return result;
Auke Kok9d5c8242008-01-24 02:22:38 -08005936}
5937
5938/**
5939 * igb_io_resume - called when traffic can start flowing again.
5940 * @pdev: Pointer to PCI device
5941 *
5942 * This callback is called when the error recovery driver tells us that
5943 * its OK to resume normal operation. Implementation resembles the
5944 * second-half of the igb_resume routine.
5945 */
5946static void igb_io_resume(struct pci_dev *pdev)
5947{
5948 struct net_device *netdev = pci_get_drvdata(pdev);
5949 struct igb_adapter *adapter = netdev_priv(netdev);
5950
Auke Kok9d5c8242008-01-24 02:22:38 -08005951 if (netif_running(netdev)) {
5952 if (igb_up(adapter)) {
5953 dev_err(&pdev->dev, "igb_up failed after reset\n");
5954 return;
5955 }
5956 }
5957
5958 netif_device_attach(netdev);
5959
5960 /* let the f/w know that the h/w is now under the control of the
5961 * driver. */
5962 igb_get_hw_control(adapter);
Auke Kok9d5c8242008-01-24 02:22:38 -08005963}
5964
Alexander Duyck26ad9172009-10-05 06:32:49 +00005965static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
5966 u8 qsel)
5967{
5968 u32 rar_low, rar_high;
5969 struct e1000_hw *hw = &adapter->hw;
5970
5971 /* HW expects these in little endian so we reverse the byte order
5972 * from network order (big endian) to little endian
5973 */
5974 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
5975 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
5976 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
5977
5978 /* Indicate to hardware the Address is Valid. */
5979 rar_high |= E1000_RAH_AV;
5980
5981 if (hw->mac.type == e1000_82575)
5982 rar_high |= E1000_RAH_POOL_1 * qsel;
5983 else
5984 rar_high |= E1000_RAH_POOL_1 << qsel;
5985
5986 wr32(E1000_RAL(index), rar_low);
5987 wrfl();
5988 wr32(E1000_RAH(index), rar_high);
5989 wrfl();
5990}
5991
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005992static int igb_set_vf_mac(struct igb_adapter *adapter,
5993 int vf, unsigned char *mac_addr)
5994{
5995 struct e1000_hw *hw = &adapter->hw;
Alexander Duyckff41f8d2009-09-03 14:48:56 +00005996 /* VF MAC addresses start at end of receive addresses and moves
5997 * torwards the first, as a result a collision should not be possible */
5998 int rar_entry = hw->mac.rar_entry_count - (vf + 1);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08005999
Alexander Duyck37680112009-02-19 20:40:30 -08006000 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006001
Alexander Duyck26ad9172009-10-05 06:32:49 +00006002 igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006003
6004 return 0;
6005}
6006
6007static void igb_vmm_control(struct igb_adapter *adapter)
6008{
6009 struct e1000_hw *hw = &adapter->hw;
Alexander Duyck10d8e902009-10-27 15:54:04 +00006010 u32 reg;
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006011
Alexander Duyckd4960302009-10-27 15:53:45 +00006012 /* replication is not supported for 82575 */
6013 if (hw->mac.type == e1000_82575)
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006014 return;
6015
Alexander Duyck10d8e902009-10-27 15:54:04 +00006016 /* enable replication vlan tag stripping */
6017 reg = rd32(E1000_RPLOLR);
6018 reg |= E1000_RPLOLR_STRVLAN;
6019 wr32(E1000_RPLOLR, reg);
6020
6021 /* notify HW that the MAC is adding vlan tags */
6022 reg = rd32(E1000_DTXCTL);
6023 reg |= E1000_DTXCTL_VLAN_ADDED;
6024 wr32(E1000_DTXCTL, reg);
6025
Alexander Duyckd4960302009-10-27 15:53:45 +00006026 if (adapter->vfs_allocated_count) {
6027 igb_vmdq_set_loopback_pf(hw, true);
6028 igb_vmdq_set_replication_pf(hw, true);
6029 } else {
6030 igb_vmdq_set_loopback_pf(hw, false);
6031 igb_vmdq_set_replication_pf(hw, false);
6032 }
Alexander Duyck4ae196d2009-02-19 20:40:07 -08006033}
6034
Auke Kok9d5c8242008-01-24 02:22:38 -08006035/* igb_main.c */