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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
Tejun Heo8c3d3d42013-05-14 11:09:50 -07004 * Maintained by: Tejun Heo <tj@kernel.org>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05005 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
Paul Gortmakerbff78322011-07-03 13:41:29 -040038#include <linux/module.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090040#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050041
42#include "libata.h"
43
Tejun Heoc4291372010-05-10 21:41:38 +020044static struct workqueue_struct *ata_sff_wq;
45
Tejun Heo624d5c52008-03-25 22:16:41 +090046const struct ata_port_operations ata_sff_port_ops = {
47 .inherits = &ata_base_port_ops,
48
Tejun Heof47451c2010-05-10 21:41:40 +020049 .qc_prep = ata_noop_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +090050 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090051 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090052
Tejun Heo9363c382008-04-07 22:47:16 +090053 .freeze = ata_sff_freeze,
54 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090055 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090056 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090057 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090058 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090059 .error_handler = ata_sff_error_handler,
Tejun Heo624d5c52008-03-25 22:16:41 +090060
Tejun Heo5682ed32008-04-07 22:47:16 +090061 .sff_dev_select = ata_sff_dev_select,
62 .sff_check_status = ata_sff_check_status,
63 .sff_tf_load = ata_sff_tf_load,
64 .sff_tf_read = ata_sff_tf_read,
65 .sff_exec_command = ata_sff_exec_command,
66 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo8244cd02010-05-10 21:41:36 +020067 .sff_drain_fifo = ata_sff_drain_fifo,
Tejun Heo624d5c52008-03-25 22:16:41 +090068
Alan Coxc96f1732009-03-24 10:23:46 +000069 .lost_interrupt = ata_sff_lost_interrupt,
Tejun Heo624d5c52008-03-25 22:16:41 +090070};
Alan Cox0fe40ff2009-01-05 14:16:13 +000071EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090072
Tejun Heo624d5c52008-03-25 22:16:41 +090073/**
Tejun Heo9363c382008-04-07 22:47:16 +090074 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +090075 * @ap: port where the device is
76 *
77 * Reads ATA taskfile status register for currently-selected device
78 * and return its value. This also clears pending interrupts
79 * from this device
80 *
81 * LOCKING:
82 * Inherited from caller.
83 */
Tejun Heo9363c382008-04-07 22:47:16 +090084u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +090085{
86 return ioread8(ap->ioaddr.status_addr);
87}
Alan Cox0fe40ff2009-01-05 14:16:13 +000088EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +090089
90/**
Tejun Heo9363c382008-04-07 22:47:16 +090091 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +090092 * @ap: port where the device is
93 *
94 * Reads ATA taskfile alternate status register for
95 * currently-selected device and return its value.
96 *
97 * Note: may NOT be used as the check_altstatus() entry in
98 * ata_port_operations.
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100103static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900104{
Tejun Heo5682ed32008-04-07 22:47:16 +0900105 if (ap->ops->sff_check_altstatus)
106 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900107
108 return ioread8(ap->ioaddr.altstatus_addr);
109}
110
111/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100112 * ata_sff_irq_status - Check if the device is busy
113 * @ap: port where the device is
114 *
115 * Determine if the port is currently busy. Uses altstatus
116 * if available in order to avoid clearing shared IRQ status
117 * when finding an IRQ source. Non ctl capable devices don't
118 * share interrupt lines fortunately for us.
119 *
120 * LOCKING:
121 * Inherited from caller.
122 */
123static u8 ata_sff_irq_status(struct ata_port *ap)
124{
125 u8 status;
126
127 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
128 status = ata_sff_altstatus(ap);
129 /* Not us: We are busy */
130 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000131 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100132 }
133 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100134 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100135 return status;
136}
137
138/**
139 * ata_sff_sync - Flush writes
140 * @ap: Port to wait for.
141 *
142 * CAUTION:
143 * If we have an mmio device with no ctl and no altstatus
144 * method this will fail. No such devices are known to exist.
145 *
146 * LOCKING:
147 * Inherited from caller.
148 */
149
150static void ata_sff_sync(struct ata_port *ap)
151{
152 if (ap->ops->sff_check_altstatus)
153 ap->ops->sff_check_altstatus(ap);
154 else if (ap->ioaddr.altstatus_addr)
155 ioread8(ap->ioaddr.altstatus_addr);
156}
157
158/**
159 * ata_sff_pause - Flush writes and wait 400nS
160 * @ap: Port to pause for.
161 *
162 * CAUTION:
163 * If we have an mmio device with no ctl and no altstatus
164 * method this will fail. No such devices are known to exist.
165 *
166 * LOCKING:
167 * Inherited from caller.
168 */
169
170void ata_sff_pause(struct ata_port *ap)
171{
172 ata_sff_sync(ap);
173 ndelay(400);
174}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000175EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100176
177/**
178 * ata_sff_dma_pause - Pause before commencing DMA
179 * @ap: Port to pause for.
180 *
181 * Perform I/O fencing and ensure sufficient cycle delays occur
182 * for the HDMA1:0 transition
183 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000184
Alan Coxa57c1ba2008-05-29 22:10:58 +0100185void ata_sff_dma_pause(struct ata_port *ap)
186{
187 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
188 /* An altstatus read will cause the needed delay without
189 messing up the IRQ status */
190 ata_sff_altstatus(ap);
191 return;
192 }
193 /* There are no DMA controllers without ctl. BUG here to ensure
194 we never violate the HDMA1:0 transition timing and risk
195 corruption. */
196 BUG();
197}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000198EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100199
200/**
Tejun Heo9363c382008-04-07 22:47:16 +0900201 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900202 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900203 * @tmout_pat: impatience timeout in msecs
204 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900205 *
206 * Sleep until ATA Status register bit BSY clears,
207 * or a timeout occurs.
208 *
209 * LOCKING:
210 * Kernel thread context (may sleep).
211 *
212 * RETURNS:
213 * 0 on success, -errno otherwise.
214 */
Tejun Heo9363c382008-04-07 22:47:16 +0900215int ata_sff_busy_sleep(struct ata_port *ap,
216 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900217{
218 unsigned long timer_start, timeout;
219 u8 status;
220
Tejun Heo9363c382008-04-07 22:47:16 +0900221 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900222 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900223 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900224 while (status != 0xff && (status & ATA_BUSY) &&
225 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200226 ata_msleep(ap, 50);
Tejun Heo9363c382008-04-07 22:47:16 +0900227 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900228 }
229
230 if (status != 0xff && (status & ATA_BUSY))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700231 ata_port_warn(ap,
232 "port is slow to respond, please be patient (Status 0x%x)\n",
233 status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900234
Tejun Heo341c2c92008-05-20 02:17:51 +0900235 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236 while (status != 0xff && (status & ATA_BUSY) &&
237 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200238 ata_msleep(ap, 50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900239 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900240 }
241
242 if (status == 0xff)
243 return -ENODEV;
244
245 if (status & ATA_BUSY) {
Joe Perchesa9a79df2011-04-15 15:51:59 -0700246 ata_port_err(ap,
247 "port failed to respond (%lu secs, Status 0x%x)\n",
248 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900249 return -EBUSY;
250 }
251
252 return 0;
253}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000254EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900255
Tejun Heoaa2731a2008-04-07 22:47:19 +0900256static int ata_sff_check_ready(struct ata_link *link)
257{
258 u8 status = link->ap->ops->sff_check_status(link->ap);
259
Tejun Heo78ab88f2008-05-01 23:41:41 +0900260 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900261}
262
Tejun Heo624d5c52008-03-25 22:16:41 +0900263/**
Tejun Heo9363c382008-04-07 22:47:16 +0900264 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900265 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900266 * @deadline: deadline jiffies for the operation
267 *
268 * Sleep until ATA Status register bit BSY clears, or timeout
269 * occurs.
270 *
271 * LOCKING:
272 * Kernel thread context (may sleep).
273 *
274 * RETURNS:
275 * 0 on success, -errno otherwise.
276 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900277int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900278{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900279 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900280}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000281EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900282
283/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400284 * ata_sff_set_devctl - Write device control reg
285 * @ap: port where the device is
286 * @ctl: value to write
287 *
288 * Writes ATA taskfile device control register.
289 *
290 * Note: may NOT be used as the sff_set_devctl() entry in
291 * ata_port_operations.
292 *
293 * LOCKING:
294 * Inherited from caller.
295 */
296static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
297{
298 if (ap->ops->sff_set_devctl)
299 ap->ops->sff_set_devctl(ap, ctl);
300 else
301 iowrite8(ctl, ap->ioaddr.ctl_addr);
302}
303
304/**
Tejun Heo9363c382008-04-07 22:47:16 +0900305 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900306 * @ap: ATA channel to manipulate
307 * @device: ATA device (numbered from zero) to select
308 *
309 * Use the method defined in the ATA specification to
310 * make either device 0, or device 1, active on the
311 * ATA channel. Works with both PIO and MMIO.
312 *
313 * May be used as the dev_select() entry in ata_port_operations.
314 *
315 * LOCKING:
316 * caller.
317 */
Tejun Heo9363c382008-04-07 22:47:16 +0900318void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900319{
320 u8 tmp;
321
322 if (device == 0)
323 tmp = ATA_DEVICE_OBS;
324 else
325 tmp = ATA_DEVICE_OBS | ATA_DEV1;
326
327 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900328 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900329}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000330EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900331
332/**
333 * ata_dev_select - Select device 0/1 on ATA bus
334 * @ap: ATA channel to manipulate
335 * @device: ATA device (numbered from zero) to select
336 * @wait: non-zero to wait for Status register BSY bit to clear
337 * @can_sleep: non-zero if context allows sleeping
338 *
339 * Use the method defined in the ATA specification to
340 * make either device 0, or device 1, active on the
341 * ATA channel.
342 *
Tejun Heo9363c382008-04-07 22:47:16 +0900343 * This is a high-level version of ata_sff_dev_select(), which
344 * additionally provides the services of inserting the proper
345 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900346 *
347 * LOCKING:
348 * caller.
349 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200350static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900351 unsigned int wait, unsigned int can_sleep)
352{
353 if (ata_msg_probe(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700354 ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
355 device, wait);
Tejun Heo624d5c52008-03-25 22:16:41 +0900356
357 if (wait)
358 ata_wait_idle(ap);
359
Tejun Heo5682ed32008-04-07 22:47:16 +0900360 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900361
362 if (wait) {
363 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
Tejun Heo97750ce2010-09-06 17:56:29 +0200364 ata_msleep(ap, 150);
Tejun Heo624d5c52008-03-25 22:16:41 +0900365 ata_wait_idle(ap);
366 }
367}
368
369/**
Tejun Heo9363c382008-04-07 22:47:16 +0900370 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900371 * @ap: Port on which interrupts are enabled.
372 *
373 * Enable interrupts on a legacy IDE device using MMIO or PIO,
374 * wait for idle, clear any pending interrupts.
375 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400376 * Note: may NOT be used as the sff_irq_on() entry in
377 * ata_port_operations.
378 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900379 * LOCKING:
380 * Inherited from caller.
381 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400382void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900383{
384 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400385
386 if (ap->ops->sff_irq_on) {
387 ap->ops->sff_irq_on(ap);
388 return;
389 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900390
391 ap->ctl &= ~ATA_NIEN;
392 ap->last_ctl = ap->ctl;
393
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400394 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
395 ata_sff_set_devctl(ap, ap->ctl);
396 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900397
Tejun Heo37f65b82010-05-19 22:10:20 +0200398 if (ap->ops->sff_irq_clear)
399 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900400}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000401EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900402
403/**
Tejun Heo9363c382008-04-07 22:47:16 +0900404 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500405 * @ap: Port to which output is sent
406 * @tf: ATA taskfile register set
407 *
408 * Outputs ATA taskfile to standard ATA host controller.
409 *
410 * LOCKING:
411 * Inherited from caller.
412 */
Tejun Heo9363c382008-04-07 22:47:16 +0900413void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500414{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900415 struct ata_ioports *ioaddr = &ap->ioaddr;
416 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
417
418 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900419 if (ioaddr->ctl_addr)
420 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900421 ap->last_ctl = tf->ctl;
Tejun Heo40c60232010-09-09 17:13:31 +0200422 ata_wait_idle(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900423 }
424
425 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900426 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900427 iowrite8(tf->hob_feature, ioaddr->feature_addr);
428 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
429 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
430 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
431 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
432 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
433 tf->hob_feature,
434 tf->hob_nsect,
435 tf->hob_lbal,
436 tf->hob_lbam,
437 tf->hob_lbah);
438 }
439
440 if (is_addr) {
441 iowrite8(tf->feature, ioaddr->feature_addr);
442 iowrite8(tf->nsect, ioaddr->nsect_addr);
443 iowrite8(tf->lbal, ioaddr->lbal_addr);
444 iowrite8(tf->lbam, ioaddr->lbam_addr);
445 iowrite8(tf->lbah, ioaddr->lbah_addr);
446 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
447 tf->feature,
448 tf->nsect,
449 tf->lbal,
450 tf->lbam,
451 tf->lbah);
452 }
453
454 if (tf->flags & ATA_TFLAG_DEVICE) {
455 iowrite8(tf->device, ioaddr->device_addr);
456 VPRINTK("device 0x%X\n", tf->device);
457 }
Tejun Heo40c60232010-09-09 17:13:31 +0200458
459 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500460}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000461EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500462
463/**
Tejun Heo9363c382008-04-07 22:47:16 +0900464 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500465 * @ap: Port from which input is read
466 * @tf: ATA taskfile register set for storing input
467 *
468 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000469 * into @tf. Assumes the device has a fully SFF compliant task file
470 * layout and behaviour. If you device does not (eg has a different
471 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500472 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500473 * LOCKING:
474 * Inherited from caller.
475 */
Tejun Heo9363c382008-04-07 22:47:16 +0900476void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500477{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900478 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500479
Tejun Heo9363c382008-04-07 22:47:16 +0900480 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900481 tf->feature = ioread8(ioaddr->error_addr);
482 tf->nsect = ioread8(ioaddr->nsect_addr);
483 tf->lbal = ioread8(ioaddr->lbal_addr);
484 tf->lbam = ioread8(ioaddr->lbam_addr);
485 tf->lbah = ioread8(ioaddr->lbah_addr);
486 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500487
Tejun Heo0d5ff562007-02-01 15:06:36 +0900488 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900489 if (likely(ioaddr->ctl_addr)) {
490 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
491 tf->hob_feature = ioread8(ioaddr->error_addr);
492 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
493 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
494 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
495 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
496 iowrite8(tf->ctl, ioaddr->ctl_addr);
497 ap->last_ctl = tf->ctl;
498 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900499 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900500 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500501}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000502EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500503
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500504/**
Tejun Heo9363c382008-04-07 22:47:16 +0900505 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900506 * @ap: port to which command is being issued
507 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500508 *
Tejun Heo272f7882008-03-25 22:16:40 +0900509 * Issues ATA command, with proper synchronization with interrupt
510 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500511 *
512 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400513 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500514 */
Tejun Heo9363c382008-04-07 22:47:16 +0900515void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500516{
Tejun Heo272f7882008-03-25 22:16:40 +0900517 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500518
Tejun Heo272f7882008-03-25 22:16:40 +0900519 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900520 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500521}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000522EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500523
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900524/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900525 * ata_tf_to_host - issue ATA taskfile to host controller
526 * @ap: port to which command is being issued
527 * @tf: ATA taskfile register set
528 *
529 * Issues ATA taskfile register set to ATA host controller,
530 * with proper synchronization with interrupt handler and
531 * other threads.
532 *
533 * LOCKING:
534 * spin_lock_irqsave(host lock)
535 */
536static inline void ata_tf_to_host(struct ata_port *ap,
537 const struct ata_taskfile *tf)
538{
Tejun Heo5682ed32008-04-07 22:47:16 +0900539 ap->ops->sff_tf_load(ap, tf);
540 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900541}
542
543/**
Tejun Heo9363c382008-04-07 22:47:16 +0900544 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900545 * @dev: device to target
546 * @buf: data buffer
547 * @buflen: buffer length
548 * @rw: read/write
549 *
550 * Transfer data from/to the device data register by PIO.
551 *
552 * LOCKING:
553 * Inherited from caller.
554 *
555 * RETURNS:
556 * Bytes consumed.
557 */
Tejun Heo9363c382008-04-07 22:47:16 +0900558unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
559 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900560{
561 struct ata_port *ap = dev->link->ap;
562 void __iomem *data_addr = ap->ioaddr.data_addr;
563 unsigned int words = buflen >> 1;
564
565 /* Transfer multiple of 2 bytes */
566 if (rw == READ)
567 ioread16_rep(data_addr, buf, words);
568 else
569 iowrite16_rep(data_addr, buf, words);
570
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400571 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900572 if (unlikely(buflen & 0x01)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900573 unsigned char pad[2] = { };
Tejun Heo624d5c52008-03-25 22:16:41 +0900574
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400575 /* Point buf to the tail of buffer */
576 buf += buflen - 1;
577
578 /*
579 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100580 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400581 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900582 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400583 ioread16_rep(data_addr, pad, 1);
584 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900585 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400586 pad[0] = *buf;
587 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900588 }
589 words++;
590 }
591
592 return words << 1;
593}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000594EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900595
596/**
Alan Cox871af122009-01-05 14:16:39 +0000597 * ata_sff_data_xfer32 - Transfer data by PIO
598 * @dev: device to target
599 * @buf: data buffer
600 * @buflen: buffer length
601 * @rw: read/write
602 *
603 * Transfer data from/to the device data register by PIO using 32bit
604 * I/O operations.
605 *
606 * LOCKING:
607 * Inherited from caller.
608 *
609 * RETURNS:
610 * Bytes consumed.
611 */
612
613unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
614 unsigned int buflen, int rw)
615{
616 struct ata_port *ap = dev->link->ap;
617 void __iomem *data_addr = ap->ioaddr.data_addr;
618 unsigned int words = buflen >> 2;
619 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100620
Alan Coxe3cf95d2009-04-09 17:31:17 +0100621 if (!(ap->pflags & ATA_PFLAG_PIO32))
622 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000623
624 /* Transfer multiple of 4 bytes */
625 if (rw == READ)
626 ioread32_rep(data_addr, buf, words);
627 else
628 iowrite32_rep(data_addr, buf, words);
629
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400630 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000631 if (unlikely(slop)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900632 unsigned char pad[4] = { };
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400633
634 /* Point buf to the tail of buffer */
635 buf += buflen - slop;
636
637 /*
638 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100639 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400640 */
Alan Cox871af122009-01-05 14:16:39 +0000641 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400642 if (slop < 3)
643 ioread16_rep(data_addr, pad, 1);
644 else
645 ioread32_rep(data_addr, pad, 1);
646 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000647 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400648 memcpy(pad, buf, slop);
649 if (slop < 3)
650 iowrite16_rep(data_addr, pad, 1);
651 else
652 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000653 }
Alan Cox871af122009-01-05 14:16:39 +0000654 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400655 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000656}
657EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
658
659/**
Tejun Heo9363c382008-04-07 22:47:16 +0900660 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900661 * @dev: device to target
662 * @buf: data buffer
663 * @buflen: buffer length
664 * @rw: read/write
665 *
666 * Transfer data from/to the device data register by PIO. Do the
667 * transfer with interrupts disabled.
668 *
669 * LOCKING:
670 * Inherited from caller.
671 *
672 * RETURNS:
673 * Bytes consumed.
674 */
Tejun Heo9363c382008-04-07 22:47:16 +0900675unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
676 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900677{
678 unsigned long flags;
679 unsigned int consumed;
680
681 local_irq_save(flags);
Bartlomiej Zolnierkiewicz418fae22011-10-13 15:04:43 +0200682 consumed = ata_sff_data_xfer32(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900683 local_irq_restore(flags);
684
685 return consumed;
686}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000687EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900688
689/**
690 * ata_pio_sector - Transfer a sector of data.
691 * @qc: Command on going
692 *
693 * Transfer qc->sect_size bytes of data from/to the ATA device.
694 *
695 * LOCKING:
696 * Inherited from caller.
697 */
698static void ata_pio_sector(struct ata_queued_cmd *qc)
699{
700 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
701 struct ata_port *ap = qc->ap;
702 struct page *page;
703 unsigned int offset;
704 unsigned char *buf;
705
706 if (qc->curbytes == qc->nbytes - qc->sect_size)
707 ap->hsm_task_state = HSM_ST_LAST;
708
709 page = sg_page(qc->cursg);
710 offset = qc->cursg->offset + qc->cursg_ofs;
711
712 /* get the current page and offset */
713 page = nth_page(page, (offset >> PAGE_SHIFT));
714 offset %= PAGE_SIZE;
715
716 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
717
718 if (PageHighMem(page)) {
719 unsigned long flags;
720
721 /* FIXME: use a bounce buffer */
722 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800723 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900724
725 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900726 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
727 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900728
Cong Wang496cda82011-11-25 23:14:18 +0800729 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900730 local_irq_restore(flags);
731 } else {
732 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900733 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
734 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900735 }
736
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100737 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500738 flush_dcache_page(page);
739
Tejun Heo624d5c52008-03-25 22:16:41 +0900740 qc->curbytes += qc->sect_size;
741 qc->cursg_ofs += qc->sect_size;
742
743 if (qc->cursg_ofs == qc->cursg->length) {
744 qc->cursg = sg_next(qc->cursg);
745 qc->cursg_ofs = 0;
746 }
747}
748
749/**
750 * ata_pio_sectors - Transfer one or many sectors.
751 * @qc: Command on going
752 *
753 * Transfer one or many sectors of data from/to the
754 * ATA device for the DRQ request.
755 *
756 * LOCKING:
757 * Inherited from caller.
758 */
759static void ata_pio_sectors(struct ata_queued_cmd *qc)
760{
761 if (is_multi_taskfile(&qc->tf)) {
762 /* READ/WRITE MULTIPLE */
763 unsigned int nsect;
764
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900765 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900766
767 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
768 qc->dev->multi_count);
769 while (nsect--)
770 ata_pio_sector(qc);
771 } else
772 ata_pio_sector(qc);
773
Alan Coxa57c1ba2008-05-29 22:10:58 +0100774 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900775}
776
777/**
778 * atapi_send_cdb - Write CDB bytes to hardware
779 * @ap: Port to which ATAPI device is attached.
780 * @qc: Taskfile currently active
781 *
782 * When device has indicated its readiness to accept
783 * a CDB, this function is called. Send the CDB.
784 *
785 * LOCKING:
786 * caller.
787 */
788static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
789{
790 /* send SCSI cdb */
791 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900792 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900793
Tejun Heo5682ed32008-04-07 22:47:16 +0900794 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100795 ata_sff_sync(ap);
796 /* FIXME: If the CDB is for DMA do we need to do the transition delay
797 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900798 switch (qc->tf.protocol) {
799 case ATAPI_PROT_PIO:
800 ap->hsm_task_state = HSM_ST;
801 break;
802 case ATAPI_PROT_NODATA:
803 ap->hsm_task_state = HSM_ST_LAST;
804 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200805#ifdef CONFIG_ATA_BMDMA
Tejun Heo624d5c52008-03-25 22:16:41 +0900806 case ATAPI_PROT_DMA:
807 ap->hsm_task_state = HSM_ST_LAST;
808 /* initiate bmdma */
809 ap->ops->bmdma_start(qc);
810 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200811#endif /* CONFIG_ATA_BMDMA */
812 default:
813 BUG();
Tejun Heo624d5c52008-03-25 22:16:41 +0900814 }
815}
816
817/**
818 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
819 * @qc: Command on going
820 * @bytes: number of bytes
821 *
822 * Transfer Transfer data from/to the ATAPI device.
823 *
824 * LOCKING:
825 * Inherited from caller.
826 *
827 */
828static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
829{
830 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
831 struct ata_port *ap = qc->ap;
832 struct ata_device *dev = qc->dev;
833 struct ata_eh_info *ehi = &dev->link->eh_info;
834 struct scatterlist *sg;
835 struct page *page;
836 unsigned char *buf;
837 unsigned int offset, count, consumed;
838
839next_sg:
840 sg = qc->cursg;
841 if (unlikely(!sg)) {
842 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
843 "buf=%u cur=%u bytes=%u",
844 qc->nbytes, qc->curbytes, bytes);
845 return -1;
846 }
847
848 page = sg_page(sg);
849 offset = sg->offset + qc->cursg_ofs;
850
851 /* get the current page and offset */
852 page = nth_page(page, (offset >> PAGE_SHIFT));
853 offset %= PAGE_SIZE;
854
855 /* don't overrun current sg */
856 count = min(sg->length - qc->cursg_ofs, bytes);
857
858 /* don't cross page boundaries */
859 count = min(count, (unsigned int)PAGE_SIZE - offset);
860
861 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
862
863 if (PageHighMem(page)) {
864 unsigned long flags;
865
866 /* FIXME: use bounce buffer */
867 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800868 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900869
870 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000871 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
872 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900873
Cong Wang496cda82011-11-25 23:14:18 +0800874 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900875 local_irq_restore(flags);
876 } else {
877 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +0000878 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
879 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900880 }
881
882 bytes -= min(bytes, consumed);
883 qc->curbytes += count;
884 qc->cursg_ofs += count;
885
886 if (qc->cursg_ofs == sg->length) {
887 qc->cursg = sg_next(qc->cursg);
888 qc->cursg_ofs = 0;
889 }
890
Christian Borntraegera0f79f72009-01-13 10:38:36 +0100891 /*
892 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
893 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
894 * check correctly as it doesn't know if it is the last request being
895 * made. Somebody should implement a proper sanity check.
896 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900897 if (bytes)
898 goto next_sg;
899 return 0;
900}
901
902/**
903 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
904 * @qc: Command on going
905 *
906 * Transfer Transfer data from/to the ATAPI device.
907 *
908 * LOCKING:
909 * Inherited from caller.
910 */
911static void atapi_pio_bytes(struct ata_queued_cmd *qc)
912{
913 struct ata_port *ap = qc->ap;
914 struct ata_device *dev = qc->dev;
915 struct ata_eh_info *ehi = &dev->link->eh_info;
916 unsigned int ireason, bc_lo, bc_hi, bytes;
917 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
918
919 /* Abuse qc->result_tf for temp storage of intermediate TF
920 * here to save some kernel stack usage.
921 * For normal completion, qc->result_tf is not relevant. For
922 * error, qc->result_tf is later overwritten by ata_qc_complete().
923 * So, the correctness of qc->result_tf is not affected.
924 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900925 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900926 ireason = qc->result_tf.nsect;
927 bc_lo = qc->result_tf.lbam;
928 bc_hi = qc->result_tf.lbah;
929 bytes = (bc_hi << 8) | bc_lo;
930
931 /* shall be cleared to zero, indicating xfer of data */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300932 if (unlikely(ireason & ATAPI_COD))
Tejun Heo624d5c52008-03-25 22:16:41 +0900933 goto atapi_check;
934
935 /* make sure transfer direction matches expected */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300936 i_write = ((ireason & ATAPI_IO) == 0) ? 1 : 0;
Tejun Heo624d5c52008-03-25 22:16:41 +0900937 if (unlikely(do_write != i_write))
938 goto atapi_check;
939
940 if (unlikely(!bytes))
941 goto atapi_check;
942
943 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
944
945 if (unlikely(__atapi_pio_bytes(qc, bytes)))
946 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100947 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900948
949 return;
950
951 atapi_check:
952 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
953 ireason, bytes);
954 err_out:
955 qc->err_mask |= AC_ERR_HSM;
956 ap->hsm_task_state = HSM_ST_ERR;
957}
958
959/**
960 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
961 * @ap: the target ata_port
962 * @qc: qc on going
963 *
964 * RETURNS:
965 * 1 if ok in workqueue, 0 otherwise.
966 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000967static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
968 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900969{
970 if (qc->tf.flags & ATA_TFLAG_POLLING)
971 return 1;
972
973 if (ap->hsm_task_state == HSM_ST_FIRST) {
974 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000975 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +0900976 return 1;
977
978 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000979 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +0900980 return 1;
981 }
982
983 return 0;
984}
985
986/**
987 * ata_hsm_qc_complete - finish a qc running on standard HSM
988 * @qc: Command to complete
989 * @in_wq: 1 if called from workqueue, 0 otherwise
990 *
991 * Finish @qc which is running on standard HSM.
992 *
993 * LOCKING:
994 * If @in_wq is zero, spin_lock_irqsave(host lock).
995 * Otherwise, none on entry and grabs host lock.
996 */
997static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
998{
999 struct ata_port *ap = qc->ap;
1000 unsigned long flags;
1001
1002 if (ap->ops->error_handler) {
1003 if (in_wq) {
1004 spin_lock_irqsave(ap->lock, flags);
1005
1006 /* EH might have kicked in while host lock is
1007 * released.
1008 */
1009 qc = ata_qc_from_tag(ap, qc->tag);
1010 if (qc) {
1011 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001012 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001013 ata_qc_complete(qc);
1014 } else
1015 ata_port_freeze(ap);
1016 }
1017
1018 spin_unlock_irqrestore(ap->lock, flags);
1019 } else {
1020 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1021 ata_qc_complete(qc);
1022 else
1023 ata_port_freeze(ap);
1024 }
1025 } else {
1026 if (in_wq) {
1027 spin_lock_irqsave(ap->lock, flags);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001028 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001029 ata_qc_complete(qc);
1030 spin_unlock_irqrestore(ap->lock, flags);
1031 } else
1032 ata_qc_complete(qc);
1033 }
1034}
1035
1036/**
Tejun Heo9363c382008-04-07 22:47:16 +09001037 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001038 * @ap: the target ata_port
1039 * @qc: qc on going
1040 * @status: current device status
1041 * @in_wq: 1 if called from workqueue, 0 otherwise
1042 *
1043 * RETURNS:
1044 * 1 when poll next status needed, 0 otherwise.
1045 */
Tejun Heo9363c382008-04-07 22:47:16 +09001046int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1047 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001048{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001049 struct ata_link *link = qc->dev->link;
1050 struct ata_eh_info *ehi = &link->eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001051 unsigned long flags = 0;
1052 int poll_next;
1053
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001054 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001055
Tejun Heo9363c382008-04-07 22:47:16 +09001056 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001057 * like DMA polling into the workqueue. Notice that
1058 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1059 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001060 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001061
1062fsm_start:
1063 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1064 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1065
1066 switch (ap->hsm_task_state) {
1067 case HSM_ST_FIRST:
1068 /* Send first data block or PACKET CDB */
1069
1070 /* If polling, we will stay in the work queue after
1071 * sending the data. Otherwise, interrupt handler
1072 * takes over after sending the data.
1073 */
1074 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1075
1076 /* check device status */
1077 if (unlikely((status & ATA_DRQ) == 0)) {
1078 /* handle BSY=0, DRQ=0 as error */
1079 if (likely(status & (ATA_ERR | ATA_DF)))
1080 /* device stops HSM for abort/error */
1081 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001082 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001083 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001084 ata_ehi_push_desc(ehi,
1085 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001086 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001087 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001088
1089 ap->hsm_task_state = HSM_ST_ERR;
1090 goto fsm_start;
1091 }
1092
1093 /* Device should not ask for data transfer (DRQ=1)
1094 * when it finds something wrong.
1095 * We ignore DRQ here and stop the HSM by
1096 * changing hsm_task_state to HSM_ST_ERR and
1097 * let the EH abort the command or reset the device.
1098 */
1099 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1100 /* Some ATAPI tape drives forget to clear the ERR bit
1101 * when doing the next command (mostly request sense).
1102 * We ignore ERR here to workaround and proceed sending
1103 * the CDB.
1104 */
1105 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001106 ata_ehi_push_desc(ehi, "ST_FIRST: "
1107 "DRQ=1 with device error, "
1108 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001109 qc->err_mask |= AC_ERR_HSM;
1110 ap->hsm_task_state = HSM_ST_ERR;
1111 goto fsm_start;
1112 }
1113 }
1114
1115 /* Send the CDB (atapi) or the first data block (ata pio out).
1116 * During the state transition, interrupt handler shouldn't
1117 * be invoked before the data transfer is complete and
1118 * hsm_task_state is changed. Hence, the following locking.
1119 */
1120 if (in_wq)
1121 spin_lock_irqsave(ap->lock, flags);
1122
1123 if (qc->tf.protocol == ATA_PROT_PIO) {
1124 /* PIO data out protocol.
1125 * send first data block.
1126 */
1127
1128 /* ata_pio_sectors() might change the state
1129 * to HSM_ST_LAST. so, the state is changed here
1130 * before ata_pio_sectors().
1131 */
1132 ap->hsm_task_state = HSM_ST;
1133 ata_pio_sectors(qc);
1134 } else
1135 /* send CDB */
1136 atapi_send_cdb(ap, qc);
1137
1138 if (in_wq)
1139 spin_unlock_irqrestore(ap->lock, flags);
1140
Tejun Heoc4291372010-05-10 21:41:38 +02001141 /* if polling, ata_sff_pio_task() handles the rest.
Tejun Heo624d5c52008-03-25 22:16:41 +09001142 * otherwise, interrupt handler takes over from here.
1143 */
1144 break;
1145
1146 case HSM_ST:
1147 /* complete command or read/write the data register */
1148 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1149 /* ATAPI PIO protocol */
1150 if ((status & ATA_DRQ) == 0) {
1151 /* No more data to transfer or device error.
1152 * Device error will be tagged in HSM_ST_LAST.
1153 */
1154 ap->hsm_task_state = HSM_ST_LAST;
1155 goto fsm_start;
1156 }
1157
1158 /* Device should not ask for data transfer (DRQ=1)
1159 * when it finds something wrong.
1160 * We ignore DRQ here and stop the HSM by
1161 * changing hsm_task_state to HSM_ST_ERR and
1162 * let the EH abort the command or reset the device.
1163 */
1164 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001165 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1166 "DRQ=1 with device error, "
1167 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001168 qc->err_mask |= AC_ERR_HSM;
1169 ap->hsm_task_state = HSM_ST_ERR;
1170 goto fsm_start;
1171 }
1172
1173 atapi_pio_bytes(qc);
1174
1175 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1176 /* bad ireason reported by device */
1177 goto fsm_start;
1178
1179 } else {
1180 /* ATA PIO protocol */
1181 if (unlikely((status & ATA_DRQ) == 0)) {
1182 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001183 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001184 /* device stops HSM for abort/error */
1185 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001186
1187 /* If diagnostic failed and this is
1188 * IDENTIFY, it's likely a phantom
1189 * device. Mark hint.
1190 */
1191 if (qc->dev->horkage &
1192 ATA_HORKAGE_DIAGNOSTIC)
1193 qc->err_mask |=
1194 AC_ERR_NODEV_HINT;
1195 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001196 /* HSM violation. Let EH handle this.
1197 * Phantom devices also trigger this
1198 * condition. Mark hint.
1199 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001200 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001201 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001202 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001203 qc->err_mask |= AC_ERR_HSM |
1204 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001205 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001206
1207 ap->hsm_task_state = HSM_ST_ERR;
1208 goto fsm_start;
1209 }
1210
1211 /* For PIO reads, some devices may ask for
1212 * data transfer (DRQ=1) alone with ERR=1.
1213 * We respect DRQ here and transfer one
1214 * block of junk data before changing the
1215 * hsm_task_state to HSM_ST_ERR.
1216 *
1217 * For PIO writes, ERR=1 DRQ=1 doesn't make
1218 * sense since the data block has been
1219 * transferred to the device.
1220 */
1221 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1222 /* data might be corrputed */
1223 qc->err_mask |= AC_ERR_DEV;
1224
1225 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1226 ata_pio_sectors(qc);
1227 status = ata_wait_idle(ap);
1228 }
1229
Tejun Heoa836d3e2008-06-28 01:39:43 +09001230 if (status & (ATA_BUSY | ATA_DRQ)) {
1231 ata_ehi_push_desc(ehi, "ST-ATA: "
1232 "BUSY|DRQ persists on ERR|DF, "
1233 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001234 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001235 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001236
Tejun Heob9199302009-01-25 10:26:00 +09001237 /* There are oddball controllers with
1238 * status register stuck at 0x7f and
1239 * lbal/m/h at zero which makes it
1240 * pass all other presence detection
1241 * mechanisms we have. Set NODEV_HINT
1242 * for it. Kernel bz#7241.
1243 */
1244 if (status == 0x7f)
1245 qc->err_mask |= AC_ERR_NODEV_HINT;
1246
Tejun Heo624d5c52008-03-25 22:16:41 +09001247 /* ata_pio_sectors() might change the
1248 * state to HSM_ST_LAST. so, the state
1249 * is changed after ata_pio_sectors().
1250 */
1251 ap->hsm_task_state = HSM_ST_ERR;
1252 goto fsm_start;
1253 }
1254
1255 ata_pio_sectors(qc);
1256
1257 if (ap->hsm_task_state == HSM_ST_LAST &&
1258 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1259 /* all data read */
1260 status = ata_wait_idle(ap);
1261 goto fsm_start;
1262 }
1263 }
1264
1265 poll_next = 1;
1266 break;
1267
1268 case HSM_ST_LAST:
1269 if (unlikely(!ata_ok(status))) {
1270 qc->err_mask |= __ac_err_mask(status);
1271 ap->hsm_task_state = HSM_ST_ERR;
1272 goto fsm_start;
1273 }
1274
1275 /* no more data to transfer */
1276 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1277 ap->print_id, qc->dev->devno, status);
1278
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001279 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001280
1281 ap->hsm_task_state = HSM_ST_IDLE;
1282
1283 /* complete taskfile transaction */
1284 ata_hsm_qc_complete(qc, in_wq);
1285
1286 poll_next = 0;
1287 break;
1288
1289 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001290 ap->hsm_task_state = HSM_ST_IDLE;
1291
1292 /* complete taskfile transaction */
1293 ata_hsm_qc_complete(qc, in_wq);
1294
1295 poll_next = 0;
1296 break;
1297 default:
1298 poll_next = 0;
1299 BUG();
1300 }
1301
1302 return poll_next;
1303}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001304EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001305
Viresh Kumar64b97592011-02-22 14:32:38 +05301306void ata_sff_queue_work(struct work_struct *work)
1307{
1308 queue_work(ata_sff_wq, work);
1309}
1310EXPORT_SYMBOL_GPL(ata_sff_queue_work);
1311
1312void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay)
1313{
1314 queue_delayed_work(ata_sff_wq, dwork, delay);
1315}
1316EXPORT_SYMBOL_GPL(ata_sff_queue_delayed_work);
1317
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001318void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay)
Tejun Heoc4291372010-05-10 21:41:38 +02001319{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001320 struct ata_port *ap = link->ap;
1321
1322 WARN_ON((ap->sff_pio_task_link != NULL) &&
1323 (ap->sff_pio_task_link != link));
1324 ap->sff_pio_task_link = link;
1325
Tejun Heoc4291372010-05-10 21:41:38 +02001326 /* may fail if ata_sff_flush_pio_task() in progress */
Viresh Kumar64b97592011-02-22 14:32:38 +05301327 ata_sff_queue_delayed_work(&ap->sff_pio_task, msecs_to_jiffies(delay));
Tejun Heoc4291372010-05-10 21:41:38 +02001328}
1329EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1330
1331void ata_sff_flush_pio_task(struct ata_port *ap)
1332{
1333 DPRINTK("ENTER\n");
1334
Tejun Heoafe2c512010-12-14 16:21:17 +01001335 cancel_delayed_work_sync(&ap->sff_pio_task);
Tejun Heoc4291372010-05-10 21:41:38 +02001336 ap->hsm_task_state = HSM_ST_IDLE;
Gwendal Grignoud4d8eaf2011-07-22 13:48:32 -07001337 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001338
1339 if (ata_msg_ctl(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -07001340 ata_port_dbg(ap, "%s: EXIT\n", __func__);
Tejun Heoc4291372010-05-10 21:41:38 +02001341}
1342
1343static void ata_sff_pio_task(struct work_struct *work)
Tejun Heo624d5c52008-03-25 22:16:41 +09001344{
1345 struct ata_port *ap =
Tejun Heoc4291372010-05-10 21:41:38 +02001346 container_of(work, struct ata_port, sff_pio_task.work);
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001347 struct ata_link *link = ap->sff_pio_task_link;
Tejun Heoc4291372010-05-10 21:41:38 +02001348 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001349 u8 status;
1350 int poll_next;
1351
Jeff Garzik4fca3772011-02-15 01:13:24 -05001352 BUG_ON(ap->sff_pio_task_link == NULL);
Tejun Heoc4291372010-05-10 21:41:38 +02001353 /* qc can be NULL if timeout occurred */
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001354 qc = ata_qc_from_tag(ap, link->active_tag);
1355 if (!qc) {
1356 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001357 return;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001358 }
Tejun Heoc4291372010-05-10 21:41:38 +02001359
Tejun Heo624d5c52008-03-25 22:16:41 +09001360fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001361 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001362
1363 /*
1364 * This is purely heuristic. This is a fast path.
1365 * Sometimes when we enter, BSY will be cleared in
1366 * a chk-status or two. If not, the drive is probably seeking
1367 * or something. Snooze for a couple msecs, then
1368 * chk-status again. If still busy, queue delayed work.
1369 */
Tejun Heo9363c382008-04-07 22:47:16 +09001370 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001371 if (status & ATA_BUSY) {
Tejun Heo97750ce2010-09-06 17:56:29 +02001372 ata_msleep(ap, 2);
Tejun Heo9363c382008-04-07 22:47:16 +09001373 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001374 if (status & ATA_BUSY) {
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001375 ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001376 return;
1377 }
1378 }
1379
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001380 /*
1381 * hsm_move() may trigger another command to be processed.
1382 * clean the link beforehand.
1383 */
1384 ap->sff_pio_task_link = NULL;
Tejun Heo624d5c52008-03-25 22:16:41 +09001385 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001386 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001387
1388 /* another command or interrupt handler
1389 * may be running at this point.
1390 */
1391 if (poll_next)
1392 goto fsm_start;
1393}
1394
1395/**
Tejun Heo360ff782010-05-10 21:41:42 +02001396 * ata_sff_qc_issue - issue taskfile to a SFF controller
Tejun Heo624d5c52008-03-25 22:16:41 +09001397 * @qc: command to issue to device
1398 *
Tejun Heo360ff782010-05-10 21:41:42 +02001399 * This function issues a PIO or NODATA command to a SFF
1400 * controller.
Tejun Heo624d5c52008-03-25 22:16:41 +09001401 *
1402 * LOCKING:
1403 * spin_lock_irqsave(host lock)
1404 *
1405 * RETURNS:
1406 * Zero on success, AC_ERR_* mask on failure
1407 */
Tejun Heo9363c382008-04-07 22:47:16 +09001408unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001409{
1410 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001411 struct ata_link *link = qc->dev->link;
Tejun Heo624d5c52008-03-25 22:16:41 +09001412
1413 /* Use polling pio if the LLD doesn't handle
1414 * interrupt driven pio and atapi CDB interrupt.
1415 */
Tejun Heo360ff782010-05-10 21:41:42 +02001416 if (ap->flags & ATA_FLAG_PIO_POLLING)
1417 qc->tf.flags |= ATA_TFLAG_POLLING;
Tejun Heo624d5c52008-03-25 22:16:41 +09001418
1419 /* select the device */
1420 ata_dev_select(ap, qc->dev->devno, 1, 0);
1421
1422 /* start the command */
1423 switch (qc->tf.protocol) {
1424 case ATA_PROT_NODATA:
1425 if (qc->tf.flags & ATA_TFLAG_POLLING)
1426 ata_qc_set_polling(qc);
1427
1428 ata_tf_to_host(ap, &qc->tf);
1429 ap->hsm_task_state = HSM_ST_LAST;
1430
1431 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001432 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001433
1434 break;
1435
Tejun Heo624d5c52008-03-25 22:16:41 +09001436 case ATA_PROT_PIO:
1437 if (qc->tf.flags & ATA_TFLAG_POLLING)
1438 ata_qc_set_polling(qc);
1439
1440 ata_tf_to_host(ap, &qc->tf);
1441
1442 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1443 /* PIO data out protocol */
1444 ap->hsm_task_state = HSM_ST_FIRST;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001445 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001446
Tejun Heoc4291372010-05-10 21:41:38 +02001447 /* always send first data block using the
1448 * ata_sff_pio_task() codepath.
Tejun Heo624d5c52008-03-25 22:16:41 +09001449 */
1450 } else {
1451 /* PIO data in protocol */
1452 ap->hsm_task_state = HSM_ST;
1453
1454 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001455 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001456
Tejun Heoc4291372010-05-10 21:41:38 +02001457 /* if polling, ata_sff_pio_task() handles the
1458 * rest. otherwise, interrupt handler takes
1459 * over from here.
Tejun Heo624d5c52008-03-25 22:16:41 +09001460 */
1461 }
1462
1463 break;
1464
1465 case ATAPI_PROT_PIO:
1466 case ATAPI_PROT_NODATA:
1467 if (qc->tf.flags & ATA_TFLAG_POLLING)
1468 ata_qc_set_polling(qc);
1469
1470 ata_tf_to_host(ap, &qc->tf);
1471
1472 ap->hsm_task_state = HSM_ST_FIRST;
1473
1474 /* send cdb by polling if no cdb interrupt */
1475 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1476 (qc->tf.flags & ATA_TFLAG_POLLING))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001477 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001478 break;
1479
Tejun Heo624d5c52008-03-25 22:16:41 +09001480 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001481 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001482 return AC_ERR_SYSTEM;
1483 }
1484
1485 return 0;
1486}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001487EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001488
1489/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001490 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1491 * @qc: qc to fill result TF for
1492 *
1493 * @qc is finished and result TF needs to be filled. Fill it
1494 * using ->sff_tf_read.
1495 *
1496 * LOCKING:
1497 * spin_lock_irqsave(host lock)
1498 *
1499 * RETURNS:
1500 * true indicating that result TF is successfully filled.
1501 */
1502bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1503{
1504 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1505 return true;
1506}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001507EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001508
Tejun Heoc3b28892010-05-19 22:10:21 +02001509static unsigned int ata_sff_idle_irq(struct ata_port *ap)
Tejun Heo624d5c52008-03-25 22:16:41 +09001510{
Tejun Heoc3b28892010-05-19 22:10:21 +02001511 ap->stats.idle_irq++;
1512
1513#ifdef ATA_IRQ_TRAP
1514 if ((ap->stats.idle_irq % 1000) == 0) {
1515 ap->ops->sff_check_status(ap);
1516 if (ap->ops->sff_irq_clear)
1517 ap->ops->sff_irq_clear(ap);
Joe Perchesa9a79df2011-04-15 15:51:59 -07001518 ata_port_warn(ap, "irq trap\n");
Tejun Heoc3b28892010-05-19 22:10:21 +02001519 return 1;
1520 }
1521#endif
1522 return 0; /* irq not handled */
1523}
1524
1525static unsigned int __ata_sff_port_intr(struct ata_port *ap,
1526 struct ata_queued_cmd *qc,
1527 bool hsmv_on_idle)
1528{
1529 u8 status;
Tejun Heo624d5c52008-03-25 22:16:41 +09001530
1531 VPRINTK("ata%u: protocol %d task_state %d\n",
1532 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1533
1534 /* Check whether we are expecting interrupt in this state */
1535 switch (ap->hsm_task_state) {
1536 case HSM_ST_FIRST:
1537 /* Some pre-ATAPI-4 devices assert INTRQ
1538 * at this state when ready to receive CDB.
1539 */
1540
1541 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1542 * The flag was turned on only for atapi devices. No
1543 * need to check ata_is_atapi(qc->tf.protocol) again.
1544 */
1545 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heoc3b28892010-05-19 22:10:21 +02001546 return ata_sff_idle_irq(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001547 break;
Tejun Heo687a9932010-12-03 15:19:13 +01001548 case HSM_ST_IDLE:
Tejun Heoc3b28892010-05-19 22:10:21 +02001549 return ata_sff_idle_irq(ap);
Tejun Heo687a9932010-12-03 15:19:13 +01001550 default:
1551 break;
Tejun Heo624d5c52008-03-25 22:16:41 +09001552 }
1553
Alan Coxa57c1ba2008-05-29 22:10:58 +01001554 /* check main status, clearing INTRQ if needed */
1555 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001556 if (status & ATA_BUSY) {
Tejun Heoc3b28892010-05-19 22:10:21 +02001557 if (hsmv_on_idle) {
Tejun Heo332ac7f2010-03-23 12:24:08 +09001558 /* BMDMA engine is already stopped, we're screwed */
1559 qc->err_mask |= AC_ERR_HSM;
1560 ap->hsm_task_state = HSM_ST_ERR;
1561 } else
Tejun Heoc3b28892010-05-19 22:10:21 +02001562 return ata_sff_idle_irq(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001563 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001564
Tejun Heo9f2f7212010-05-10 21:41:32 +02001565 /* clear irq events */
Tejun Heo37f65b82010-05-19 22:10:20 +02001566 if (ap->ops->sff_irq_clear)
1567 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001568
Tejun Heo9363c382008-04-07 22:47:16 +09001569 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001570
Tejun Heo624d5c52008-03-25 22:16:41 +09001571 return 1; /* irq handled */
Tejun Heo624d5c52008-03-25 22:16:41 +09001572}
1573
1574/**
Tejun Heoc3b28892010-05-19 22:10:21 +02001575 * ata_sff_port_intr - Handle SFF port interrupt
1576 * @ap: Port on which interrupt arrived (possibly...)
1577 * @qc: Taskfile currently active in engine
Tejun Heo624d5c52008-03-25 22:16:41 +09001578 *
Tejun Heoc3b28892010-05-19 22:10:21 +02001579 * Handle port interrupt for given queued command.
Tejun Heo624d5c52008-03-25 22:16:41 +09001580 *
1581 * LOCKING:
Tejun Heoc3b28892010-05-19 22:10:21 +02001582 * spin_lock_irqsave(host lock)
Tejun Heo624d5c52008-03-25 22:16:41 +09001583 *
1584 * RETURNS:
Tejun Heoc3b28892010-05-19 22:10:21 +02001585 * One if interrupt was handled, zero if not (shared irq).
Tejun Heo624d5c52008-03-25 22:16:41 +09001586 */
Tejun Heoc3b28892010-05-19 22:10:21 +02001587unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1588{
1589 return __ata_sff_port_intr(ap, qc, false);
1590}
1591EXPORT_SYMBOL_GPL(ata_sff_port_intr);
1592
1593static inline irqreturn_t __ata_sff_interrupt(int irq, void *dev_instance,
1594 unsigned int (*port_intr)(struct ata_port *, struct ata_queued_cmd *))
Tejun Heo624d5c52008-03-25 22:16:41 +09001595{
1596 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001597 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001598 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001599 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001600 unsigned long flags;
1601
1602 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1603 spin_lock_irqsave(&host->lock, flags);
1604
Tejun Heo332ac7f2010-03-23 12:24:08 +09001605retry:
1606 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001607 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001608 struct ata_port *ap = host->ports[i];
1609 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001610
Tejun Heod88ec2e2010-01-19 10:46:32 +09001611 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001612 if (qc) {
1613 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
Tejun Heoc3b28892010-05-19 22:10:21 +02001614 handled |= port_intr(ap, qc);
Tejun Heo27943622010-01-19 10:49:19 +09001615 else
1616 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001617 } else
1618 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001619 }
1620
1621 /*
1622 * If no port was expecting IRQ but the controller is actually
1623 * asserting IRQ line, nobody cared will ensue. Check IRQ
1624 * pending status if available and clear spurious IRQ.
1625 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001626 if (!handled && !retried) {
1627 bool retry = false;
1628
Tejun Heo27943622010-01-19 10:49:19 +09001629 for (i = 0; i < host->n_ports; i++) {
1630 struct ata_port *ap = host->ports[i];
1631
1632 if (polling & (1 << i))
1633 continue;
1634
1635 if (!ap->ops->sff_irq_check ||
1636 !ap->ops->sff_irq_check(ap))
1637 continue;
1638
Tejun Heo332ac7f2010-03-23 12:24:08 +09001639 if (idle & (1 << i)) {
1640 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001641 if (ap->ops->sff_irq_clear)
1642 ap->ops->sff_irq_clear(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001643 } else {
1644 /* clear INTRQ and check if BUSY cleared */
1645 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1646 retry |= true;
1647 /*
1648 * With command in flight, we can't do
1649 * sff_irq_clear() w/o racing with completion.
1650 */
1651 }
1652 }
1653
1654 if (retry) {
1655 retried = true;
1656 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001657 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001658 }
1659
1660 spin_unlock_irqrestore(&host->lock, flags);
1661
1662 return IRQ_RETVAL(handled);
1663}
Tejun Heoc3b28892010-05-19 22:10:21 +02001664
1665/**
1666 * ata_sff_interrupt - Default SFF ATA host interrupt handler
1667 * @irq: irq line (unused)
1668 * @dev_instance: pointer to our ata_host information structure
1669 *
1670 * Default interrupt handler for PCI IDE devices. Calls
1671 * ata_sff_port_intr() for each port that is not disabled.
1672 *
1673 * LOCKING:
1674 * Obtains host lock during operation.
1675 *
1676 * RETURNS:
1677 * IRQ_NONE or IRQ_HANDLED.
1678 */
1679irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1680{
1681 return __ata_sff_interrupt(irq, dev_instance, ata_sff_port_intr);
1682}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001683EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001684
1685/**
Alan Coxc96f1732009-03-24 10:23:46 +00001686 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1687 * @ap: port that appears to have timed out
1688 *
1689 * Called from the libata error handlers when the core code suspects
1690 * an interrupt has been lost. If it has complete anything we can and
1691 * then return. Interface must support altstatus for this faster
1692 * recovery to occur.
1693 *
1694 * Locking:
1695 * Caller holds host lock
1696 */
1697
1698void ata_sff_lost_interrupt(struct ata_port *ap)
1699{
1700 u8 status;
1701 struct ata_queued_cmd *qc;
1702
1703 /* Only one outstanding command per SFF channel */
1704 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001705 /* We cannot lose an interrupt on a non-existent or polled command */
1706 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001707 return;
1708 /* See if the controller thinks it is still busy - if so the command
1709 isn't a lost IRQ but is still in progress */
1710 status = ata_sff_altstatus(ap);
1711 if (status & ATA_BUSY)
1712 return;
1713
1714 /* There was a command running, we are no longer busy and we have
1715 no interrupt. */
Joe Perchesa9a79df2011-04-15 15:51:59 -07001716 ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
Alan Coxc96f1732009-03-24 10:23:46 +00001717 status);
1718 /* Run the host interrupt logic as if the interrupt had not been
1719 lost */
Tejun Heoc3b28892010-05-19 22:10:21 +02001720 ata_sff_port_intr(ap, qc);
Alan Coxc96f1732009-03-24 10:23:46 +00001721}
1722EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1723
1724/**
Tejun Heo9363c382008-04-07 22:47:16 +09001725 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001726 * @ap: port to freeze
1727 *
Tejun Heo9f2f7212010-05-10 21:41:32 +02001728 * Freeze SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001729 *
1730 * LOCKING:
1731 * Inherited from caller.
1732 */
Tejun Heo9363c382008-04-07 22:47:16 +09001733void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001734{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001735 ap->ctl |= ATA_NIEN;
1736 ap->last_ctl = ap->ctl;
1737
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001738 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1739 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001740
1741 /* Under certain circumstances, some controllers raise IRQ on
1742 * ATA_NIEN manipulation. Also, many controllers fail to mask
1743 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1744 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001745 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001746
Tejun Heo37f65b82010-05-19 22:10:20 +02001747 if (ap->ops->sff_irq_clear)
1748 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001749}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001750EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001751
1752/**
Tejun Heo9363c382008-04-07 22:47:16 +09001753 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001754 * @ap: port to thaw
1755 *
Tejun Heo9363c382008-04-07 22:47:16 +09001756 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001757 *
1758 * LOCKING:
1759 * Inherited from caller.
1760 */
Tejun Heo9363c382008-04-07 22:47:16 +09001761void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001762{
1763 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001764 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001765 if (ap->ops->sff_irq_clear)
1766 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001767 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001768}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001769EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001770
1771/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001772 * ata_sff_prereset - prepare SFF link for reset
1773 * @link: SFF link to be reset
1774 * @deadline: deadline jiffies for the operation
1775 *
1776 * SFF link @link is about to be reset. Initialize it. It first
1777 * calls ata_std_prereset() and wait for !BSY if the port is
1778 * being softreset.
1779 *
1780 * LOCKING:
1781 * Kernel thread context (may sleep)
1782 *
1783 * RETURNS:
1784 * 0 on success, -errno otherwise.
1785 */
1786int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1787{
Tejun Heo0aa11132008-04-07 22:47:18 +09001788 struct ata_eh_context *ehc = &link->eh_context;
1789 int rc;
1790
1791 rc = ata_std_prereset(link, deadline);
1792 if (rc)
1793 return rc;
1794
1795 /* if we're about to do hardreset, nothing more to do */
1796 if (ehc->i.action & ATA_EH_HARDRESET)
1797 return 0;
1798
1799 /* wait for !BSY if we don't know that no device is attached */
1800 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001801 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001802 if (rc && rc != -ENODEV) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07001803 ata_link_warn(link,
1804 "device not ready (errno=%d), forcing hardreset\n",
1805 rc);
Tejun Heo0aa11132008-04-07 22:47:18 +09001806 ehc->i.action |= ATA_EH_HARDRESET;
1807 }
1808 }
1809
1810 return 0;
1811}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001812EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001813
1814/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001815 * ata_devchk - PATA device presence detection
1816 * @ap: ATA channel to examine
1817 * @device: Device to examine (starting at zero)
1818 *
1819 * This technique was originally described in
1820 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1821 * later found its way into the ATA/ATAPI spec.
1822 *
1823 * Write a pattern to the ATA shadow registers,
1824 * and if a device is present, it will respond by
1825 * correctly storing and echoing back the
1826 * ATA shadow register contents.
1827 *
1828 * LOCKING:
1829 * caller.
1830 */
1831static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1832{
1833 struct ata_ioports *ioaddr = &ap->ioaddr;
1834 u8 nsect, lbal;
1835
Tejun Heo5682ed32008-04-07 22:47:16 +09001836 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001837
1838 iowrite8(0x55, ioaddr->nsect_addr);
1839 iowrite8(0xaa, ioaddr->lbal_addr);
1840
1841 iowrite8(0xaa, ioaddr->nsect_addr);
1842 iowrite8(0x55, ioaddr->lbal_addr);
1843
1844 iowrite8(0x55, ioaddr->nsect_addr);
1845 iowrite8(0xaa, ioaddr->lbal_addr);
1846
1847 nsect = ioread8(ioaddr->nsect_addr);
1848 lbal = ioread8(ioaddr->lbal_addr);
1849
1850 if ((nsect == 0x55) && (lbal == 0xaa))
1851 return 1; /* we found a device */
1852
1853 return 0; /* nothing found */
1854}
1855
1856/**
Tejun Heo9363c382008-04-07 22:47:16 +09001857 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001858 * @dev: ATA device to classify (starting at zero)
1859 * @present: device seems present
1860 * @r_err: Value of error register on completion
1861 *
1862 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1863 * an ATA/ATAPI-defined set of values is placed in the ATA
1864 * shadow registers, indicating the results of device detection
1865 * and diagnostics.
1866 *
1867 * Select the ATA device, and read the values from the ATA shadow
1868 * registers. Then parse according to the Error register value,
1869 * and the spec-defined values examined by ata_dev_classify().
1870 *
1871 * LOCKING:
1872 * caller.
1873 *
1874 * RETURNS:
1875 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1876 */
Tejun Heo9363c382008-04-07 22:47:16 +09001877unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001878 u8 *r_err)
1879{
1880 struct ata_port *ap = dev->link->ap;
1881 struct ata_taskfile tf;
1882 unsigned int class;
1883 u8 err;
1884
Tejun Heo5682ed32008-04-07 22:47:16 +09001885 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001886
1887 memset(&tf, 0, sizeof(tf));
1888
Tejun Heo5682ed32008-04-07 22:47:16 +09001889 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001890 err = tf.feature;
1891 if (r_err)
1892 *r_err = err;
1893
1894 /* see if device passed diags: continue and warn later */
1895 if (err == 0)
1896 /* diagnostic fail : do nothing _YET_ */
1897 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1898 else if (err == 1)
1899 /* do nothing */ ;
1900 else if ((dev->devno == 0) && (err == 0x81))
1901 /* do nothing */ ;
1902 else
1903 return ATA_DEV_NONE;
1904
1905 /* determine if device is ATA or ATAPI */
1906 class = ata_dev_classify(&tf);
1907
1908 if (class == ATA_DEV_UNKNOWN) {
1909 /* If the device failed diagnostic, it's likely to
1910 * have reported incorrect device signature too.
1911 * Assume ATA device if the device seems present but
1912 * device signature is invalid with diagnostic
1913 * failure.
1914 */
1915 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1916 class = ATA_DEV_ATA;
1917 else
1918 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001919 } else if ((class == ATA_DEV_ATA) &&
1920 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001921 class = ATA_DEV_NONE;
1922
1923 return class;
1924}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001925EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09001926
Tejun Heo705e76b2008-04-07 22:47:19 +09001927/**
1928 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1929 * @link: SFF link which is just reset
1930 * @devmask: mask of present devices
1931 * @deadline: deadline jiffies for the operation
1932 *
1933 * Wait devices attached to SFF @link to become ready after
1934 * reset. It contains preceding 150ms wait to avoid accessing TF
1935 * status register too early.
1936 *
1937 * LOCKING:
1938 * Kernel thread context (may sleep).
1939 *
1940 * RETURNS:
1941 * 0 on success, -ENODEV if some or all of devices in @devmask
1942 * don't seem to exist. -errno on other errors.
1943 */
1944int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1945 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001946{
Tejun Heo705e76b2008-04-07 22:47:19 +09001947 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001948 struct ata_ioports *ioaddr = &ap->ioaddr;
1949 unsigned int dev0 = devmask & (1 << 0);
1950 unsigned int dev1 = devmask & (1 << 1);
1951 int rc, ret = 0;
1952
Tejun Heo97750ce2010-09-06 17:56:29 +02001953 ata_msleep(ap, ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09001954
1955 /* always check readiness of the master device */
1956 rc = ata_sff_wait_ready(link, deadline);
1957 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1958 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001959 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001960 if (rc)
1961 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001962
1963 /* if device 1 was found in ata_devchk, wait for register
1964 * access briefly, then wait for BSY to clear.
1965 */
1966 if (dev1) {
1967 int i;
1968
Tejun Heo5682ed32008-04-07 22:47:16 +09001969 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001970
1971 /* Wait for register access. Some ATAPI devices fail
1972 * to set nsect/lbal after reset, so don't waste too
1973 * much time on it. We're gonna wait for !BSY anyway.
1974 */
1975 for (i = 0; i < 2; i++) {
1976 u8 nsect, lbal;
1977
1978 nsect = ioread8(ioaddr->nsect_addr);
1979 lbal = ioread8(ioaddr->lbal_addr);
1980 if ((nsect == 1) && (lbal == 1))
1981 break;
Tejun Heo97750ce2010-09-06 17:56:29 +02001982 ata_msleep(ap, 50); /* give drive a breather */
Tejun Heo624d5c52008-03-25 22:16:41 +09001983 }
1984
Tejun Heo705e76b2008-04-07 22:47:19 +09001985 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001986 if (rc) {
1987 if (rc != -ENODEV)
1988 return rc;
1989 ret = rc;
1990 }
1991 }
1992
1993 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001994 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001995 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001996 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001997 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001998 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001999
2000 return ret;
2001}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002002EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002003
Tejun Heo624d5c52008-03-25 22:16:41 +09002004static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2005 unsigned long deadline)
2006{
2007 struct ata_ioports *ioaddr = &ap->ioaddr;
2008
2009 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2010
Ondrej Zary6d8ca282014-09-27 00:04:46 +02002011 if (ap->ioaddr.ctl_addr) {
2012 /* software reset. causes dev0 to be selected */
2013 iowrite8(ap->ctl, ioaddr->ctl_addr);
2014 udelay(20); /* FIXME: flush */
2015 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2016 udelay(20); /* FIXME: flush */
2017 iowrite8(ap->ctl, ioaddr->ctl_addr);
2018 ap->last_ctl = ap->ctl;
2019 }
Tejun Heo624d5c52008-03-25 22:16:41 +09002020
Tejun Heo705e76b2008-04-07 22:47:19 +09002021 /* wait the port to become ready */
2022 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002023}
2024
2025/**
Tejun Heo9363c382008-04-07 22:47:16 +09002026 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002027 * @link: ATA link to reset
2028 * @classes: resulting classes of attached devices
2029 * @deadline: deadline jiffies for the operation
2030 *
2031 * Reset host port using ATA SRST.
2032 *
2033 * LOCKING:
2034 * Kernel thread context (may sleep)
2035 *
2036 * RETURNS:
2037 * 0 on success, -errno otherwise.
2038 */
Tejun Heo9363c382008-04-07 22:47:16 +09002039int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002040 unsigned long deadline)
2041{
2042 struct ata_port *ap = link->ap;
2043 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2044 unsigned int devmask = 0;
2045 int rc;
2046 u8 err;
2047
2048 DPRINTK("ENTER\n");
2049
Tejun Heo624d5c52008-03-25 22:16:41 +09002050 /* determine if device 0/1 are present */
2051 if (ata_devchk(ap, 0))
2052 devmask |= (1 << 0);
2053 if (slave_possible && ata_devchk(ap, 1))
2054 devmask |= (1 << 1);
2055
2056 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002057 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002058
2059 /* issue bus reset */
2060 DPRINTK("about to softreset, devmask=%x\n", devmask);
2061 rc = ata_bus_softreset(ap, devmask, deadline);
2062 /* if link is occupied, -ENODEV too is an error */
2063 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07002064 ata_link_err(link, "SRST failed (errno=%d)\n", rc);
Tejun Heo624d5c52008-03-25 22:16:41 +09002065 return rc;
2066 }
2067
2068 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002069 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002070 devmask & (1 << 0), &err);
2071 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002072 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002073 devmask & (1 << 1), &err);
2074
Tejun Heo624d5c52008-03-25 22:16:41 +09002075 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2076 return 0;
2077}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002078EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002079
2080/**
Tejun Heo9363c382008-04-07 22:47:16 +09002081 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002082 * @link: link to reset
2083 * @class: resulting class of attached device
2084 * @deadline: deadline jiffies for the operation
2085 *
2086 * SATA phy-reset host port using DET bits of SControl register,
2087 * wait for !BSY and classify the attached device.
2088 *
2089 * LOCKING:
2090 * Kernel thread context (may sleep)
2091 *
2092 * RETURNS:
2093 * 0 on success, -errno otherwise.
2094 */
Tejun Heo9363c382008-04-07 22:47:16 +09002095int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002096 unsigned long deadline)
2097{
Tejun Heo9dadd452008-04-07 22:47:19 +09002098 struct ata_eh_context *ehc = &link->eh_context;
2099 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2100 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002101 int rc;
2102
Tejun Heo9dadd452008-04-07 22:47:19 +09002103 rc = sata_link_hardreset(link, timing, deadline, &online,
2104 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002105 if (online)
2106 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002107
2108 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002109 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002110}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002111EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002112
2113/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002114 * ata_sff_postreset - SFF postreset callback
2115 * @link: the target SFF ata_link
2116 * @classes: classes of attached devices
2117 *
2118 * This function is invoked after a successful reset. It first
2119 * calls ata_std_postreset() and performs SFF specific postreset
2120 * processing.
2121 *
2122 * LOCKING:
2123 * Kernel thread context (may sleep)
2124 */
2125void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2126{
2127 struct ata_port *ap = link->ap;
2128
2129 ata_std_postreset(link, classes);
2130
2131 /* is double-select really necessary? */
2132 if (classes[0] != ATA_DEV_NONE)
2133 ap->ops->sff_dev_select(ap, 1);
2134 if (classes[1] != ATA_DEV_NONE)
2135 ap->ops->sff_dev_select(ap, 0);
2136
2137 /* bail out if no device is present */
2138 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2139 DPRINTK("EXIT, no device\n");
2140 return;
2141 }
2142
2143 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002144 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2145 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002146 ap->last_ctl = ap->ctl;
2147 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002148}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002149EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002150
2151/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002152 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2153 * @qc: command
2154 *
2155 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002156 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002157 * reset will recover the device.
2158 *
2159 */
2160
2161void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2162{
2163 int count;
2164 struct ata_port *ap;
2165
2166 /* We only need to flush incoming data when a command was running */
2167 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2168 return;
2169
2170 ap = qc->ap;
2171 /* Drain up to 64K of data before we give up this recovery method */
2172 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002173 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002174 ioread16(ap->ioaddr.data_addr);
2175
2176 /* Can become DEBUG later */
2177 if (count)
Joe Perchesa9a79df2011-04-15 15:51:59 -07002178 ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
Alan Cox3d47aa82009-03-24 10:23:19 +00002179
2180}
2181EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2182
2183/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002184 * ata_sff_error_handler - Stock error handler for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002185 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002186 *
Tejun Heo9363c382008-04-07 22:47:16 +09002187 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002188 * PATA and SATA controllers. Many controllers should be able to
2189 * use this EH as-is or with some added handling before and
2190 * after.
2191 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002192 * LOCKING:
2193 * Kernel thread context (may sleep)
2194 */
Tejun Heo9363c382008-04-07 22:47:16 +09002195void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002196{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002197 ata_reset_fn_t softreset = ap->ops->softreset;
2198 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002199 struct ata_queued_cmd *qc;
2200 unsigned long flags;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002201
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002202 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002203 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2204 qc = NULL;
2205
Jeff Garzikba6a1302006-06-22 23:46:10 -04002206 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002207
Tejun Heofe06e5f2010-05-10 21:41:39 +02002208 /*
2209 * We *MUST* do FIFO draining before we issue a reset as
2210 * several devices helpfully clear their internal state and
2211 * will lock solid if we touch the data port post reset. Pass
2212 * qc in case anyone wants to do different PIO/DMA recovery or
2213 * has per command fixups
Alan Cox3d47aa82009-03-24 10:23:19 +00002214 */
Tejun Heo8244cd02010-05-10 21:41:36 +02002215 if (ap->ops->sff_drain_fifo)
2216 ap->ops->sff_drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002217
Jeff Garzikba6a1302006-06-22 23:46:10 -04002218 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002219
Tejun Heofe06e5f2010-05-10 21:41:39 +02002220 /* ignore built-in hardresets if SCR access is not available */
2221 if ((hardreset == sata_std_hardreset ||
2222 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002223 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002224
Tejun Heoa1efdab2008-03-25 12:22:50 +09002225 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2226 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002227}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002228EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002229
2230/**
Tejun Heo9363c382008-04-07 22:47:16 +09002231 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002232 * @ioaddr: IO address structure to be initialized
2233 *
2234 * Utility function which initializes data_addr, error_addr,
2235 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2236 * device_addr, status_addr, and command_addr to standard offsets
2237 * relative to cmd_addr.
2238 *
2239 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2240 */
Tejun Heo9363c382008-04-07 22:47:16 +09002241void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002242{
2243 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2244 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2245 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2246 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2247 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2248 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2249 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2250 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2251 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2252 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2253}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002254EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002255
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002256#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002257
Tejun Heo272f7882008-03-25 22:16:40 +09002258static int ata_resources_present(struct pci_dev *pdev, int port)
2259{
2260 int i;
2261
2262 /* Check the PCI resources for this channel are enabled */
2263 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002264 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002265 if (pci_resource_start(pdev, port + i) == 0 ||
2266 pci_resource_len(pdev, port + i) == 0)
2267 return 0;
2268 }
2269 return 1;
2270}
2271
Tejun Heod491b272007-04-17 23:44:07 +09002272/**
Tejun Heo9363c382008-04-07 22:47:16 +09002273 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002274 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002275 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002276 * Acquire native PCI ATA resources for @host and initialize the
2277 * first two ports of @host accordingly. Ports marked dummy are
2278 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002279 *
Tejun Heod583bc12007-07-04 18:02:07 +09002280 * Note that native PCI resources are valid even for legacy hosts
2281 * as we fix up pdev resources array early in boot, so this
2282 * function can be used for both native and legacy SFF hosts.
2283 *
Tejun Heod491b272007-04-17 23:44:07 +09002284 * LOCKING:
2285 * Inherited from calling layer (may sleep).
2286 *
2287 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002288 * 0 if at least one port is initialized, -ENODEV if no port is
2289 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002290 */
Tejun Heo9363c382008-04-07 22:47:16 +09002291int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002292{
2293 struct device *gdev = host->dev;
2294 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002295 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002296 int i, rc;
2297
Tejun Heod491b272007-04-17 23:44:07 +09002298 /* request, iomap BARs and init port addresses accordingly */
2299 for (i = 0; i < 2; i++) {
2300 struct ata_port *ap = host->ports[i];
2301 int base = i * 2;
2302 void __iomem * const *iomap;
2303
Tejun Heo1626aeb2007-05-04 12:43:58 +02002304 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002305 continue;
2306
Tejun Heo1626aeb2007-05-04 12:43:58 +02002307 /* Discard disabled ports. Some controllers show
2308 * their unused channels this way. Disabled ports are
2309 * made dummy.
2310 */
2311 if (!ata_resources_present(pdev, i)) {
2312 ap->ops = &ata_dummy_port_ops;
2313 continue;
2314 }
2315
Tejun Heo35a10a82008-01-04 18:42:21 +09002316 rc = pcim_iomap_regions(pdev, 0x3 << base,
2317 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002318 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002319 dev_warn(gdev,
2320 "failed to request/iomap BARs for port %d (errno=%d)\n",
2321 i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002322 if (rc == -EBUSY)
2323 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002324 ap->ops = &ata_dummy_port_ops;
2325 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002326 }
2327 host->iomap = iomap = pcim_iomap_table(pdev);
2328
2329 ap->ioaddr.cmd_addr = iomap[base];
2330 ap->ioaddr.altstatus_addr =
2331 ap->ioaddr.ctl_addr = (void __iomem *)
2332 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002333 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002334
Tejun Heocbcdd872007-08-18 13:14:55 +09002335 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2336 (unsigned long long)pci_resource_start(pdev, base),
2337 (unsigned long long)pci_resource_start(pdev, base + 1));
2338
Tejun Heo1626aeb2007-05-04 12:43:58 +02002339 mask |= 1 << i;
2340 }
2341
2342 if (!mask) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002343 dev_err(gdev, "no available native port\n");
Tejun Heo1626aeb2007-05-04 12:43:58 +02002344 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002345 }
2346
2347 return 0;
2348}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002349EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002350
Tejun Heo21b0ad42007-04-17 23:44:07 +09002351/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002352 * ata_pci_sff_prepare_host - helper to prepare PCI PIO-only SFF ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002353 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002354 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002355 * @r_host: out argument for the initialized ATA host
2356 *
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002357 * Helper to allocate PIO-only SFF ATA host for @pdev, acquire
2358 * all PCI resources and initialize it accordingly in one go.
Tejun Heo21b0ad42007-04-17 23:44:07 +09002359 *
2360 * LOCKING:
2361 * Inherited from calling layer (may sleep).
2362 *
2363 * RETURNS:
2364 * 0 on success, -errno otherwise.
2365 */
Tejun Heo9363c382008-04-07 22:47:16 +09002366int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002367 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002368 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002369{
2370 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002371 int rc;
2372
2373 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2374 return -ENOMEM;
2375
2376 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2377 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002378 dev_err(&pdev->dev, "failed to allocate ATA host\n");
Tejun Heo21b0ad42007-04-17 23:44:07 +09002379 rc = -ENOMEM;
2380 goto err_out;
2381 }
2382
Tejun Heo9363c382008-04-07 22:47:16 +09002383 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002384 if (rc)
2385 goto err_out;
2386
Tejun Heo21b0ad42007-04-17 23:44:07 +09002387 devres_remove_group(&pdev->dev, NULL);
2388 *r_host = host;
2389 return 0;
2390
Alan Cox0fe40ff2009-01-05 14:16:13 +00002391err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002392 devres_release_group(&pdev->dev, NULL);
2393 return rc;
2394}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002395EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002396
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002397/**
Tejun Heo9363c382008-04-07 22:47:16 +09002398 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002399 * @host: target SFF ATA host
2400 * @irq_handler: irq_handler used when requesting IRQ(s)
2401 * @sht: scsi_host_template to use when registering the host
2402 *
2403 * This is the counterpart of ata_host_activate() for SFF ATA
2404 * hosts. This separate helper is necessary because SFF hosts
2405 * use two separate interrupts in legacy mode.
2406 *
2407 * LOCKING:
2408 * Inherited from calling layer (may sleep).
2409 *
2410 * RETURNS:
2411 * 0 on success, -errno otherwise.
2412 */
Tejun Heo9363c382008-04-07 22:47:16 +09002413int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002414 irq_handler_t irq_handler,
2415 struct scsi_host_template *sht)
2416{
2417 struct device *dev = host->dev;
2418 struct pci_dev *pdev = to_pci_dev(dev);
2419 const char *drv_name = dev_driver_string(host->dev);
2420 int legacy_mode = 0, rc;
2421
2422 rc = ata_host_start(host);
2423 if (rc)
2424 return rc;
2425
2426 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2427 u8 tmp8, mask;
2428
2429 /* TODO: What if one channel is in native mode ... */
2430 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2431 mask = (1 << 2) | (1 << 0);
2432 if ((tmp8 & mask) != mask)
2433 legacy_mode = 1;
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002434 }
2435
2436 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2437 return -ENOMEM;
2438
2439 if (!legacy_mode && pdev->irq) {
James Bottomleyaf649a12011-04-24 14:31:33 -05002440 int i;
2441
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002442 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2443 IRQF_SHARED, drv_name, host);
2444 if (rc)
2445 goto out;
2446
James Bottomleyaf649a12011-04-24 14:31:33 -05002447 for (i = 0; i < 2; i++) {
2448 if (ata_port_is_dummy(host->ports[i]))
2449 continue;
2450 ata_port_desc(host->ports[i], "irq %d", pdev->irq);
2451 }
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002452 } else if (legacy_mode) {
2453 if (!ata_port_is_dummy(host->ports[0])) {
2454 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2455 irq_handler, IRQF_SHARED,
2456 drv_name, host);
2457 if (rc)
2458 goto out;
2459
2460 ata_port_desc(host->ports[0], "irq %d",
2461 ATA_PRIMARY_IRQ(pdev));
2462 }
2463
2464 if (!ata_port_is_dummy(host->ports[1])) {
2465 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2466 irq_handler, IRQF_SHARED,
2467 drv_name, host);
2468 if (rc)
2469 goto out;
2470
2471 ata_port_desc(host->ports[1], "irq %d",
2472 ATA_SECONDARY_IRQ(pdev));
2473 }
2474 }
2475
2476 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002477out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002478 if (rc == 0)
2479 devres_remove_group(dev, NULL);
2480 else
2481 devres_release_group(dev, NULL);
2482
2483 return rc;
2484}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002485EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002486
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002487static const struct ata_port_info *ata_sff_find_valid_pi(
2488 const struct ata_port_info * const *ppi)
2489{
2490 int i;
2491
2492 /* look up the first valid port_info */
2493 for (i = 0; i < 2 && ppi[i]; i++)
2494 if (ppi[i]->port_ops != &ata_dummy_port_ops)
2495 return ppi[i];
2496
2497 return NULL;
2498}
2499
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002500static int ata_pci_init_one(struct pci_dev *pdev,
2501 const struct ata_port_info * const *ppi,
2502 struct scsi_host_template *sht, void *host_priv,
2503 int hflags, bool bmdma)
2504{
2505 struct device *dev = &pdev->dev;
2506 const struct ata_port_info *pi;
2507 struct ata_host *host = NULL;
2508 int rc;
2509
2510 DPRINTK("ENTER\n");
2511
2512 pi = ata_sff_find_valid_pi(ppi);
2513 if (!pi) {
2514 dev_err(&pdev->dev, "no valid port_info specified\n");
2515 return -EINVAL;
2516 }
2517
2518 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2519 return -ENOMEM;
2520
2521 rc = pcim_enable_device(pdev);
2522 if (rc)
2523 goto out;
2524
Alexander Beregalovaab94402011-11-13 01:30:56 +04002525#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002526 if (bmdma)
2527 /* prepare and activate BMDMA host */
2528 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
2529 else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002530#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002531 /* prepare and activate SFF host */
2532 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
2533 if (rc)
2534 goto out;
2535 host->private_data = host_priv;
2536 host->flags |= hflags;
2537
Alexander Beregalovaab94402011-11-13 01:30:56 +04002538#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002539 if (bmdma) {
2540 pci_set_master(pdev);
2541 rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
2542 } else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002543#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002544 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
2545out:
2546 if (rc == 0)
2547 devres_remove_group(&pdev->dev, NULL);
2548 else
2549 devres_release_group(&pdev->dev, NULL);
2550
2551 return rc;
2552}
2553
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002554/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002555 * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002556 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002557 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002558 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002559 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002560 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002561 *
2562 * This is a helper function which can be called from a driver's
2563 * xxx_init_one() probe function if the hardware uses traditional
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002564 * IDE taskfile registers and is PIO only.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002565 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002566 * ASSUMPTION:
2567 * Nobody makes a single channel controller that appears solely as
2568 * the secondary legacy port on PCI.
2569 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002570 * LOCKING:
2571 * Inherited from PCI layer (may sleep).
2572 *
2573 * RETURNS:
2574 * Zero on success, negative on errno-based value on error.
2575 */
Tejun Heo9363c382008-04-07 22:47:16 +09002576int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05002577 const struct ata_port_info * const *ppi,
2578 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002579{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002580 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflag, 0);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002581}
Tejun Heo9363c382008-04-07 22:47:16 +09002582EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002583
Tejun Heo624d5c52008-03-25 22:16:41 +09002584#endif /* CONFIG_PCI */
Tejun Heo9f2f7212010-05-10 21:41:32 +02002585
Tejun Heo9a7780c2010-05-19 22:10:24 +02002586/*
2587 * BMDMA support
2588 */
2589
2590#ifdef CONFIG_ATA_BMDMA
2591
Tejun Heo9f2f7212010-05-10 21:41:32 +02002592const struct ata_port_operations ata_bmdma_port_ops = {
2593 .inherits = &ata_sff_port_ops,
2594
Tejun Heofe06e5f2010-05-10 21:41:39 +02002595 .error_handler = ata_bmdma_error_handler,
2596 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2597
Tejun Heof47451c2010-05-10 21:41:40 +02002598 .qc_prep = ata_bmdma_qc_prep,
Tejun Heo360ff782010-05-10 21:41:42 +02002599 .qc_issue = ata_bmdma_qc_issue,
Tejun Heof47451c2010-05-10 21:41:40 +02002600
Tejun Heo37f65b82010-05-19 22:10:20 +02002601 .sff_irq_clear = ata_bmdma_irq_clear,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002602 .bmdma_setup = ata_bmdma_setup,
2603 .bmdma_start = ata_bmdma_start,
2604 .bmdma_stop = ata_bmdma_stop,
2605 .bmdma_status = ata_bmdma_status,
Tejun Heoc7087652010-05-10 21:41:34 +02002606
2607 .port_start = ata_bmdma_port_start,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002608};
2609EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2610
2611const struct ata_port_operations ata_bmdma32_port_ops = {
2612 .inherits = &ata_bmdma_port_ops,
2613
2614 .sff_data_xfer = ata_sff_data_xfer32,
Tejun Heoc7087652010-05-10 21:41:34 +02002615 .port_start = ata_bmdma_port_start32,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002616};
2617EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2618
Tejun Heo9f2f7212010-05-10 21:41:32 +02002619/**
Tejun Heof47451c2010-05-10 21:41:40 +02002620 * ata_bmdma_fill_sg - Fill PCI IDE PRD table
2621 * @qc: Metadata associated with taskfile to be transferred
2622 *
2623 * Fill PCI IDE PRD (scatter-gather) table with segments
2624 * associated with the current disk command.
2625 *
2626 * LOCKING:
2627 * spin_lock_irqsave(host lock)
2628 *
2629 */
2630static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2631{
2632 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002633 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002634 struct scatterlist *sg;
2635 unsigned int si, pi;
2636
2637 pi = 0;
2638 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2639 u32 addr, offset;
2640 u32 sg_len, len;
2641
2642 /* determine if physical DMA addr spans 64K boundary.
2643 * Note h/w doesn't support 64-bit, so we unconditionally
2644 * truncate dma_addr_t to u32.
2645 */
2646 addr = (u32) sg_dma_address(sg);
2647 sg_len = sg_dma_len(sg);
2648
2649 while (sg_len) {
2650 offset = addr & 0xffff;
2651 len = sg_len;
2652 if ((offset + sg_len) > 0x10000)
2653 len = 0x10000 - offset;
2654
Tejun Heof60d7012010-05-10 21:41:41 +02002655 prd[pi].addr = cpu_to_le32(addr);
2656 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
Tejun Heof47451c2010-05-10 21:41:40 +02002657 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2658
2659 pi++;
2660 sg_len -= len;
2661 addr += len;
2662 }
2663 }
2664
Tejun Heof60d7012010-05-10 21:41:41 +02002665 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002666}
2667
2668/**
2669 * ata_bmdma_fill_sg_dumb - Fill PCI IDE PRD table
2670 * @qc: Metadata associated with taskfile to be transferred
2671 *
2672 * Fill PCI IDE PRD (scatter-gather) table with segments
2673 * associated with the current disk command. Perform the fill
2674 * so that we avoid writing any length 64K records for
2675 * controllers that don't follow the spec.
2676 *
2677 * LOCKING:
2678 * spin_lock_irqsave(host lock)
2679 *
2680 */
2681static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2682{
2683 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002684 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002685 struct scatterlist *sg;
2686 unsigned int si, pi;
2687
2688 pi = 0;
2689 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2690 u32 addr, offset;
2691 u32 sg_len, len, blen;
2692
2693 /* determine if physical DMA addr spans 64K boundary.
2694 * Note h/w doesn't support 64-bit, so we unconditionally
2695 * truncate dma_addr_t to u32.
2696 */
2697 addr = (u32) sg_dma_address(sg);
2698 sg_len = sg_dma_len(sg);
2699
2700 while (sg_len) {
2701 offset = addr & 0xffff;
2702 len = sg_len;
2703 if ((offset + sg_len) > 0x10000)
2704 len = 0x10000 - offset;
2705
2706 blen = len & 0xffff;
Tejun Heof60d7012010-05-10 21:41:41 +02002707 prd[pi].addr = cpu_to_le32(addr);
Tejun Heof47451c2010-05-10 21:41:40 +02002708 if (blen == 0) {
2709 /* Some PATA chipsets like the CS5530 can't
2710 cope with 0x0000 meaning 64K as the spec
2711 says */
Tejun Heof60d7012010-05-10 21:41:41 +02002712 prd[pi].flags_len = cpu_to_le32(0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002713 blen = 0x8000;
Tejun Heof60d7012010-05-10 21:41:41 +02002714 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002715 }
Tejun Heof60d7012010-05-10 21:41:41 +02002716 prd[pi].flags_len = cpu_to_le32(blen);
Tejun Heof47451c2010-05-10 21:41:40 +02002717 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2718
2719 pi++;
2720 sg_len -= len;
2721 addr += len;
2722 }
2723 }
2724
Tejun Heof60d7012010-05-10 21:41:41 +02002725 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002726}
2727
2728/**
2729 * ata_bmdma_qc_prep - Prepare taskfile for submission
2730 * @qc: Metadata associated with taskfile to be prepared
2731 *
2732 * Prepare ATA taskfile for submission.
2733 *
2734 * LOCKING:
2735 * spin_lock_irqsave(host lock)
2736 */
2737void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2738{
2739 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2740 return;
2741
2742 ata_bmdma_fill_sg(qc);
2743}
2744EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2745
2746/**
2747 * ata_bmdma_dumb_qc_prep - Prepare taskfile for submission
2748 * @qc: Metadata associated with taskfile to be prepared
2749 *
2750 * Prepare ATA taskfile for submission.
2751 *
2752 * LOCKING:
2753 * spin_lock_irqsave(host lock)
2754 */
2755void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2756{
2757 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2758 return;
2759
2760 ata_bmdma_fill_sg_dumb(qc);
2761}
2762EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2763
2764/**
Tejun Heo360ff782010-05-10 21:41:42 +02002765 * ata_bmdma_qc_issue - issue taskfile to a BMDMA controller
2766 * @qc: command to issue to device
2767 *
2768 * This function issues a PIO, NODATA or DMA command to a
2769 * SFF/BMDMA controller. PIO and NODATA are handled by
2770 * ata_sff_qc_issue().
2771 *
2772 * LOCKING:
2773 * spin_lock_irqsave(host lock)
2774 *
2775 * RETURNS:
2776 * Zero on success, AC_ERR_* mask on failure
2777 */
2778unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2779{
2780 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002781 struct ata_link *link = qc->dev->link;
Tejun Heo360ff782010-05-10 21:41:42 +02002782
Tejun Heo360ff782010-05-10 21:41:42 +02002783 /* defer PIO handling to sff_qc_issue */
2784 if (!ata_is_dma(qc->tf.protocol))
2785 return ata_sff_qc_issue(qc);
2786
2787 /* select the device */
2788 ata_dev_select(ap, qc->dev->devno, 1, 0);
2789
2790 /* start the command */
2791 switch (qc->tf.protocol) {
2792 case ATA_PROT_DMA:
2793 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2794
2795 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2796 ap->ops->bmdma_setup(qc); /* set up bmdma */
2797 ap->ops->bmdma_start(qc); /* initiate bmdma */
2798 ap->hsm_task_state = HSM_ST_LAST;
2799 break;
2800
2801 case ATAPI_PROT_DMA:
2802 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2803
2804 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2805 ap->ops->bmdma_setup(qc); /* set up bmdma */
2806 ap->hsm_task_state = HSM_ST_FIRST;
2807
2808 /* send cdb by polling if no cdb interrupt */
2809 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002810 ata_sff_queue_pio_task(link, 0);
Tejun Heo360ff782010-05-10 21:41:42 +02002811 break;
2812
2813 default:
2814 WARN_ON(1);
2815 return AC_ERR_SYSTEM;
2816 }
2817
2818 return 0;
2819}
2820EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2821
2822/**
Tejun Heoc3b28892010-05-19 22:10:21 +02002823 * ata_bmdma_port_intr - Handle BMDMA port interrupt
2824 * @ap: Port on which interrupt arrived (possibly...)
2825 * @qc: Taskfile currently active in engine
2826 *
2827 * Handle port interrupt for given queued command.
2828 *
2829 * LOCKING:
2830 * spin_lock_irqsave(host lock)
2831 *
2832 * RETURNS:
2833 * One if interrupt was handled, zero if not (shared irq).
2834 */
2835unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
2836{
2837 struct ata_eh_info *ehi = &ap->link.eh_info;
2838 u8 host_stat = 0;
2839 bool bmdma_stopped = false;
2840 unsigned int handled;
2841
2842 if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
2843 /* check status of DMA engine */
2844 host_stat = ap->ops->bmdma_status(ap);
2845 VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat);
2846
2847 /* if it's not our irq... */
2848 if (!(host_stat & ATA_DMA_INTR))
2849 return ata_sff_idle_irq(ap);
2850
2851 /* before we do anything else, clear DMA-Start bit */
2852 ap->ops->bmdma_stop(qc);
2853 bmdma_stopped = true;
2854
2855 if (unlikely(host_stat & ATA_DMA_ERR)) {
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002856 /* error when transferring data to/from memory */
Tejun Heoc3b28892010-05-19 22:10:21 +02002857 qc->err_mask |= AC_ERR_HOST_BUS;
2858 ap->hsm_task_state = HSM_ST_ERR;
2859 }
2860 }
2861
2862 handled = __ata_sff_port_intr(ap, qc, bmdma_stopped);
2863
2864 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol))
2865 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
2866
2867 return handled;
2868}
2869EXPORT_SYMBOL_GPL(ata_bmdma_port_intr);
2870
2871/**
2872 * ata_bmdma_interrupt - Default BMDMA ATA host interrupt handler
2873 * @irq: irq line (unused)
2874 * @dev_instance: pointer to our ata_host information structure
2875 *
2876 * Default interrupt handler for PCI IDE devices. Calls
2877 * ata_bmdma_port_intr() for each port that is not disabled.
2878 *
2879 * LOCKING:
2880 * Obtains host lock during operation.
2881 *
2882 * RETURNS:
2883 * IRQ_NONE or IRQ_HANDLED.
2884 */
2885irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance)
2886{
2887 return __ata_sff_interrupt(irq, dev_instance, ata_bmdma_port_intr);
2888}
2889EXPORT_SYMBOL_GPL(ata_bmdma_interrupt);
2890
2891/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002892 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
2893 * @ap: port to handle error for
2894 *
2895 * Stock error handler for BMDMA controller. It can handle both
2896 * PATA and SATA controllers. Most BMDMA controllers should be
2897 * able to use this EH as-is or with some added handling before
2898 * and after.
2899 *
2900 * LOCKING:
2901 * Kernel thread context (may sleep)
2902 */
2903void ata_bmdma_error_handler(struct ata_port *ap)
2904{
2905 struct ata_queued_cmd *qc;
2906 unsigned long flags;
2907 bool thaw = false;
2908
2909 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2910 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2911 qc = NULL;
2912
2913 /* reset PIO HSM and stop DMA engine */
2914 spin_lock_irqsave(ap->lock, flags);
2915
2916 if (qc && ata_is_dma(qc->tf.protocol)) {
2917 u8 host_stat;
2918
2919 host_stat = ap->ops->bmdma_status(ap);
2920
2921 /* BMDMA controllers indicate host bus error by
2922 * setting DMA_ERR bit and timing out. As it wasn't
2923 * really a timeout event, adjust error mask and
2924 * cancel frozen state.
2925 */
2926 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2927 qc->err_mask = AC_ERR_HOST_BUS;
2928 thaw = true;
2929 }
2930
2931 ap->ops->bmdma_stop(qc);
2932
2933 /* if we're gonna thaw, make sure IRQ is clear */
2934 if (thaw) {
2935 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02002936 if (ap->ops->sff_irq_clear)
2937 ap->ops->sff_irq_clear(ap);
Tejun Heofe06e5f2010-05-10 21:41:39 +02002938 }
2939 }
2940
2941 spin_unlock_irqrestore(ap->lock, flags);
2942
2943 if (thaw)
2944 ata_eh_thaw_port(ap);
2945
2946 ata_sff_error_handler(ap);
2947}
2948EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2949
2950/**
2951 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
2952 * @qc: internal command to clean up
2953 *
2954 * LOCKING:
2955 * Kernel thread context (may sleep)
2956 */
2957void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2958{
2959 struct ata_port *ap = qc->ap;
2960 unsigned long flags;
2961
2962 if (ata_is_dma(qc->tf.protocol)) {
2963 spin_lock_irqsave(ap->lock, flags);
2964 ap->ops->bmdma_stop(qc);
2965 spin_unlock_irqrestore(ap->lock, flags);
2966 }
2967}
2968EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2969
2970/**
Tejun Heo37f65b82010-05-19 22:10:20 +02002971 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
2972 * @ap: Port associated with this ATA transaction.
2973 *
2974 * Clear interrupt and error flags in DMA status register.
2975 *
2976 * May be used as the irq_clear() entry in ata_port_operations.
2977 *
2978 * LOCKING:
2979 * spin_lock_irqsave(host lock)
2980 */
2981void ata_bmdma_irq_clear(struct ata_port *ap)
2982{
2983 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2984
2985 if (!mmio)
2986 return;
2987
2988 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
2989}
2990EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
2991
2992/**
Tejun Heo9f2f7212010-05-10 21:41:32 +02002993 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2994 * @qc: Info associated with this ATA transaction.
2995 *
2996 * LOCKING:
2997 * spin_lock_irqsave(host lock)
2998 */
2999void ata_bmdma_setup(struct ata_queued_cmd *qc)
3000{
3001 struct ata_port *ap = qc->ap;
3002 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3003 u8 dmactl;
3004
3005 /* load PRD table addr. */
3006 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +02003007 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Tejun Heo9f2f7212010-05-10 21:41:32 +02003008
3009 /* specify data direction, triple-check start bit is clear */
3010 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3011 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3012 if (!rw)
3013 dmactl |= ATA_DMA_WR;
3014 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3015
3016 /* issue r/w command */
3017 ap->ops->sff_exec_command(ap, &qc->tf);
3018}
3019EXPORT_SYMBOL_GPL(ata_bmdma_setup);
3020
3021/**
3022 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3023 * @qc: Info associated with this ATA transaction.
3024 *
3025 * LOCKING:
3026 * spin_lock_irqsave(host lock)
3027 */
3028void ata_bmdma_start(struct ata_queued_cmd *qc)
3029{
3030 struct ata_port *ap = qc->ap;
3031 u8 dmactl;
3032
3033 /* start host DMA transaction */
3034 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3035 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3036
3037 /* Strictly, one may wish to issue an ioread8() here, to
3038 * flush the mmio write. However, control also passes
3039 * to the hardware at this point, and it will interrupt
3040 * us when we are to resume control. So, in effect,
3041 * we don't care when the mmio write flushes.
3042 * Further, a read of the DMA status register _immediately_
3043 * following the write may not be what certain flaky hardware
3044 * is expected, so I think it is best to not add a readb()
3045 * without first all the MMIO ATA cards/mobos.
3046 * Or maybe I'm just being paranoid.
3047 *
3048 * FIXME: The posting of this write means I/O starts are
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003049 * unnecessarily delayed for MMIO
Tejun Heo9f2f7212010-05-10 21:41:32 +02003050 */
3051}
3052EXPORT_SYMBOL_GPL(ata_bmdma_start);
3053
3054/**
3055 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3056 * @qc: Command we are ending DMA for
3057 *
3058 * Clears the ATA_DMA_START flag in the dma control register
3059 *
3060 * May be used as the bmdma_stop() entry in ata_port_operations.
3061 *
3062 * LOCKING:
3063 * spin_lock_irqsave(host lock)
3064 */
3065void ata_bmdma_stop(struct ata_queued_cmd *qc)
3066{
3067 struct ata_port *ap = qc->ap;
3068 void __iomem *mmio = ap->ioaddr.bmdma_addr;
3069
3070 /* clear start/stop bit */
3071 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3072 mmio + ATA_DMA_CMD);
3073
3074 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3075 ata_sff_dma_pause(ap);
3076}
3077EXPORT_SYMBOL_GPL(ata_bmdma_stop);
3078
3079/**
3080 * ata_bmdma_status - Read PCI IDE BMDMA status
3081 * @ap: Port associated with this ATA transaction.
3082 *
3083 * Read and return BMDMA status register.
3084 *
3085 * May be used as the bmdma_status() entry in ata_port_operations.
3086 *
3087 * LOCKING:
3088 * spin_lock_irqsave(host lock)
3089 */
3090u8 ata_bmdma_status(struct ata_port *ap)
3091{
3092 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3093}
3094EXPORT_SYMBOL_GPL(ata_bmdma_status);
3095
Tejun Heoc7087652010-05-10 21:41:34 +02003096
3097/**
3098 * ata_bmdma_port_start - Set port up for bmdma.
3099 * @ap: Port to initialize
3100 *
3101 * Called just after data structures for each port are
3102 * initialized. Allocates space for PRD table.
3103 *
3104 * May be used as the port_start() entry in ata_port_operations.
3105 *
3106 * LOCKING:
3107 * Inherited from caller.
3108 */
3109int ata_bmdma_port_start(struct ata_port *ap)
3110{
3111 if (ap->mwdma_mask || ap->udma_mask) {
Tejun Heof60d7012010-05-10 21:41:41 +02003112 ap->bmdma_prd =
3113 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3114 &ap->bmdma_prd_dma, GFP_KERNEL);
3115 if (!ap->bmdma_prd)
Tejun Heoc7087652010-05-10 21:41:34 +02003116 return -ENOMEM;
3117 }
3118
3119 return 0;
3120}
3121EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3122
3123/**
3124 * ata_bmdma_port_start32 - Set port up for dma.
3125 * @ap: Port to initialize
3126 *
3127 * Called just after data structures for each port are
3128 * initialized. Enables 32bit PIO and allocates space for PRD
3129 * table.
3130 *
3131 * May be used as the port_start() entry in ata_port_operations for
3132 * devices that are capable of 32bit PIO.
3133 *
3134 * LOCKING:
3135 * Inherited from caller.
3136 */
3137int ata_bmdma_port_start32(struct ata_port *ap)
3138{
3139 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3140 return ata_bmdma_port_start(ap);
3141}
3142EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3143
Tejun Heo9f2f7212010-05-10 21:41:32 +02003144#ifdef CONFIG_PCI
3145
3146/**
3147 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
3148 * @pdev: PCI device
3149 *
3150 * Some PCI ATA devices report simplex mode but in fact can be told to
3151 * enter non simplex mode. This implements the necessary logic to
3152 * perform the task on such devices. Calling it on other devices will
3153 * have -undefined- behaviour.
3154 */
3155int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3156{
3157 unsigned long bmdma = pci_resource_start(pdev, 4);
3158 u8 simplex;
3159
3160 if (bmdma == 0)
3161 return -ENOENT;
3162
3163 simplex = inb(bmdma + 0x02);
3164 outb(simplex & 0x60, bmdma + 0x02);
3165 simplex = inb(bmdma + 0x02);
3166 if (simplex & 0x80)
3167 return -EOPNOTSUPP;
3168 return 0;
3169}
3170EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3171
Tejun Heoc7087652010-05-10 21:41:34 +02003172static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3173{
3174 int i;
3175
Joe Perchesa44fec12011-04-15 15:51:58 -07003176 dev_err(host->dev, "BMDMA: %s, falling back to PIO\n", reason);
Tejun Heoc7087652010-05-10 21:41:34 +02003177
3178 for (i = 0; i < 2; i++) {
3179 host->ports[i]->mwdma_mask = 0;
3180 host->ports[i]->udma_mask = 0;
3181 }
3182}
3183
Tejun Heo9f2f7212010-05-10 21:41:32 +02003184/**
3185 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
3186 * @host: target ATA host
3187 *
3188 * Acquire PCI BMDMA resources and initialize @host accordingly.
3189 *
3190 * LOCKING:
3191 * Inherited from calling layer (may sleep).
Tejun Heo9f2f7212010-05-10 21:41:32 +02003192 */
Tejun Heoc7087652010-05-10 21:41:34 +02003193void ata_pci_bmdma_init(struct ata_host *host)
Tejun Heo9f2f7212010-05-10 21:41:32 +02003194{
3195 struct device *gdev = host->dev;
3196 struct pci_dev *pdev = to_pci_dev(gdev);
3197 int i, rc;
3198
3199 /* No BAR4 allocation: No DMA */
Tejun Heoc7087652010-05-10 21:41:34 +02003200 if (pci_resource_start(pdev, 4) == 0) {
3201 ata_bmdma_nodma(host, "BAR4 is zero");
3202 return;
3203 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003204
Tejun Heoc7087652010-05-10 21:41:34 +02003205 /*
3206 * Some controllers require BMDMA region to be initialized
3207 * even if DMA is not in use to clear IRQ status via
3208 * ->sff_irq_clear method. Try to initialize bmdma_addr
3209 * regardless of dma masks.
3210 */
Tejun Heo9f2f7212010-05-10 21:41:32 +02003211 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
3212 if (rc)
Tejun Heoc7087652010-05-10 21:41:34 +02003213 ata_bmdma_nodma(host, "failed to set dma mask");
3214 if (!rc) {
3215 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
3216 if (rc)
3217 ata_bmdma_nodma(host,
3218 "failed to set consistent dma mask");
3219 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003220
3221 /* request and iomap DMA region */
3222 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3223 if (rc) {
Tejun Heoc7087652010-05-10 21:41:34 +02003224 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3225 return;
Tejun Heo9f2f7212010-05-10 21:41:32 +02003226 }
3227 host->iomap = pcim_iomap_table(pdev);
3228
3229 for (i = 0; i < 2; i++) {
3230 struct ata_port *ap = host->ports[i];
3231 void __iomem *bmdma = host->iomap[4] + 8 * i;
3232
3233 if (ata_port_is_dummy(ap))
3234 continue;
3235
3236 ap->ioaddr.bmdma_addr = bmdma;
3237 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3238 (ioread8(bmdma + 2) & 0x80))
3239 host->flags |= ATA_HOST_SIMPLEX;
3240
3241 ata_port_desc(ap, "bmdma 0x%llx",
3242 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3243 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003244}
3245EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3246
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003247/**
3248 * ata_pci_bmdma_prepare_host - helper to prepare PCI BMDMA ATA host
3249 * @pdev: target PCI device
3250 * @ppi: array of port_info, must be enough for two ports
3251 * @r_host: out argument for the initialized ATA host
3252 *
3253 * Helper to allocate BMDMA ATA host for @pdev, acquire all PCI
3254 * resources and initialize it accordingly in one go.
3255 *
3256 * LOCKING:
3257 * Inherited from calling layer (may sleep).
3258 *
3259 * RETURNS:
3260 * 0 on success, -errno otherwise.
3261 */
3262int ata_pci_bmdma_prepare_host(struct pci_dev *pdev,
3263 const struct ata_port_info * const * ppi,
3264 struct ata_host **r_host)
3265{
3266 int rc;
3267
3268 rc = ata_pci_sff_prepare_host(pdev, ppi, r_host);
3269 if (rc)
3270 return rc;
3271
3272 ata_pci_bmdma_init(*r_host);
3273 return 0;
3274}
3275EXPORT_SYMBOL_GPL(ata_pci_bmdma_prepare_host);
3276
3277/**
3278 * ata_pci_bmdma_init_one - Initialize/register BMDMA PCI IDE controller
3279 * @pdev: Controller to be initialized
3280 * @ppi: array of port_info, must be enough for two ports
3281 * @sht: scsi_host_template to use when registering the host
3282 * @host_priv: host private_data
3283 * @hflags: host flags
3284 *
3285 * This function is similar to ata_pci_sff_init_one() but also
3286 * takes care of BMDMA initialization.
3287 *
3288 * LOCKING:
3289 * Inherited from PCI layer (may sleep).
3290 *
3291 * RETURNS:
3292 * Zero on success, negative on errno-based value on error.
3293 */
3294int ata_pci_bmdma_init_one(struct pci_dev *pdev,
3295 const struct ata_port_info * const * ppi,
3296 struct scsi_host_template *sht, void *host_priv,
3297 int hflags)
3298{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02003299 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflags, 1);
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003300}
3301EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one);
3302
Tejun Heo9f2f7212010-05-10 21:41:32 +02003303#endif /* CONFIG_PCI */
Tejun Heo9a7780c2010-05-19 22:10:24 +02003304#endif /* CONFIG_ATA_BMDMA */
Tejun Heo270390e2010-05-10 21:41:35 +02003305
3306/**
3307 * ata_sff_port_init - Initialize SFF/BMDMA ATA port
3308 * @ap: Port to initialize
3309 *
3310 * Called on port allocation to initialize SFF/BMDMA specific
3311 * fields.
3312 *
3313 * LOCKING:
3314 * None.
3315 */
3316void ata_sff_port_init(struct ata_port *ap)
3317{
Tejun Heoc4291372010-05-10 21:41:38 +02003318 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
Tejun Heo5fe74542010-05-10 21:41:37 +02003319 ap->ctl = ATA_DEVCTL_OBS;
3320 ap->last_ctl = 0xFF;
Tejun Heo270390e2010-05-10 21:41:35 +02003321}
3322
3323int __init ata_sff_init(void)
3324{
Tejun Heo6370a6a2010-10-11 15:12:27 +02003325 ata_sff_wq = alloc_workqueue("ata_sff", WQ_MEM_RECLAIM, WQ_MAX_ACTIVE);
Tejun Heoc4291372010-05-10 21:41:38 +02003326 if (!ata_sff_wq)
3327 return -ENOMEM;
3328
Tejun Heo270390e2010-05-10 21:41:35 +02003329 return 0;
3330}
3331
Luck, Tonyc43d5592010-08-23 13:18:02 -07003332void ata_sff_exit(void)
Tejun Heo270390e2010-05-10 21:41:35 +02003333{
Tejun Heoc4291372010-05-10 21:41:38 +02003334 destroy_workqueue(ata_sff_wq);
Tejun Heo270390e2010-05-10 21:41:35 +02003335}