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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8b4139d2014-07-24 14:05:26 +02009 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
Johannes Berg8ca151b2013-01-24 14:25:36 +010010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020026 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010027 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020034 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8b4139d2014-07-24 14:05:26 +020035 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
Johannes Berg8ca151b2013-01-24 14:25:36 +010036 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020075#include "fw-api-coex.h"
Haim Dreyfusse820c2d2014-04-06 11:19:09 +030076#include "fw-api-scan.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010077
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020078/* maximal number of Tx queues in any platform */
79#define IWL_MVM_MAX_QUEUES 20
80
81/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010082enum {
83 IWL_MVM_OFFCHANNEL_QUEUE = 8,
84 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010085};
86
Johannes Bergb2d81db2014-08-01 20:48:25 +020087enum iwl_mvm_tx_fifo {
88 IWL_MVM_TX_FIFO_BK = 0,
89 IWL_MVM_TX_FIFO_BE,
90 IWL_MVM_TX_FIFO_VI,
91 IWL_MVM_TX_FIFO_VO,
92 IWL_MVM_TX_FIFO_MCAST = 5,
93 IWL_MVM_TX_FIFO_CMD = 7,
94};
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020095
Johannes Berg8ca151b2013-01-24 14:25:36 +010096#define IWL_MVM_STATION_COUNT 16
97
Arik Nemtsovcf7b4912014-05-15 11:44:40 +030098#define IWL_MVM_TDLS_STA_COUNT 4
99
Johannes Berg8ca151b2013-01-24 14:25:36 +0100100/* commands */
101enum {
102 MVM_ALIVE = 0x1,
103 REPLY_ERROR = 0x2,
104
105 INIT_COMPLETE_NOTIF = 0x4,
106
107 /* PHY context commands */
108 PHY_CONTEXT_CMD = 0x8,
109 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +0200110 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100111
112 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300113 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100114 ADD_STA = 0x18,
115 REMOVE_STA = 0x19,
116
117 /* TX */
118 TX_CMD = 0x1c,
119 TXPATH_FLUSH = 0x1e,
120 MGMT_MCAST_KEY = 0x1f,
121
122 /* global key */
123 WEP_KEY = 0x20,
124
125 /* MAC and Binding commands */
126 MAC_CONTEXT_CMD = 0x28,
127 TIME_EVENT_CMD = 0x29, /* both CMD and response */
128 TIME_EVENT_NOTIFICATION = 0x2a,
129 BINDING_CONTEXT_CMD = 0x2b,
130 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200131 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100132
133 LQ_CMD = 0x4e,
134
135 /* Calibration */
136 TEMPERATURE_NOTIFICATION = 0x62,
137 CALIBRATION_CFG_CMD = 0x65,
138 CALIBRATION_RES_NOTIFICATION = 0x66,
139 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
140 RADIO_VERSION_NOTIFICATION = 0x68,
141
142 /* Scan offload */
143 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
144 SCAN_OFFLOAD_ABORT_CMD = 0x52,
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300145 HOT_SPOT_CMD = 0x53,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100146 SCAN_OFFLOAD_COMPLETE = 0x6D,
147 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
148 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300149 MATCH_FOUND_NOTIFICATION = 0xd9,
David Spinadelfb98be52014-05-04 12:51:10 +0300150 SCAN_ITERATION_COMPLETE = 0xe7,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100151
152 /* Phy */
153 PHY_CONFIGURATION_CMD = 0x6a,
154 CALIB_RES_NOTIF_PHY_DB = 0x6b,
155 /* PHY_DB_CMD = 0x6c, */
156
Alexander Bondare811ada2013-03-10 15:29:44 +0200157 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100158 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300159 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100160
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300161 /* Thermal Throttling*/
162 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
163
Johannes Berg8ca151b2013-01-24 14:25:36 +0100164 /* Scanning */
165 SCAN_REQUEST_CMD = 0x80,
166 SCAN_ABORT_CMD = 0x81,
167 SCAN_START_NOTIFICATION = 0x82,
168 SCAN_RESULTS_NOTIFICATION = 0x83,
169 SCAN_COMPLETE_NOTIFICATION = 0x84,
170
171 /* NVM */
172 NVM_ACCESS_CMD = 0x88,
173
174 SET_CALIB_DEFAULT_CMD = 0x8e,
175
Ilan Peer571765c2013-03-05 15:26:03 +0200176 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100177 BEACON_TEMPLATE_CMD = 0x91,
178 TX_ANT_CONFIGURATION_CMD = 0x98,
179 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100180 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300181 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100182
183 /* RF-KILL commands and notifications */
184 CARD_STATE_CMD = 0xa0,
185 CARD_STATE_NOTIFICATION = 0xa1,
186
Hila Gonend64048e2013-03-13 18:00:03 +0200187 MISSED_BEACONS_NOTIFICATION = 0xa2,
188
Alexander Bondare811ada2013-03-10 15:29:44 +0200189 /* Power - new power table command */
190 MAC_PM_POWER_TABLE = 0xa9,
191
Johannes Berg8ca151b2013-01-24 14:25:36 +0100192 REPLY_RX_PHY_CMD = 0xc0,
193 REPLY_RX_MPDU_CMD = 0xc1,
194 BA_NOTIF = 0xc5,
195
Matti Gottlieba2d79c52014-08-25 14:41:23 +0300196 MARKER_CMD = 0xcb,
197
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200198 /* BT Coex */
199 BT_COEX_PRIO_TABLE = 0xcc,
200 BT_COEX_PROT_ENV = 0xcd,
201 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbach430a3bb2014-04-02 09:55:16 +0300202 BT_CONFIG = 0x9b,
203 BT_COEX_UPDATE_SW_BOOST = 0x5a,
204 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
205 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300206 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200207
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200208 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200209 REPLY_BEACON_FILTERING_CMD = 0xd2,
210
Johannes Berg8ca151b2013-01-24 14:25:36 +0100211 REPLY_DEBUG_CMD = 0xf0,
212 DEBUG_LOG_MSG = 0xf7,
213
Eliad Pellerc87163b2014-01-08 10:11:11 +0200214 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300215 MCAST_FILTER_CMD = 0xd0,
216
Johannes Berg8ca151b2013-01-24 14:25:36 +0100217 /* D3 commands/notifications */
218 D3_CONFIG_CMD = 0xd3,
219 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
220 OFFLOADS_QUERY_CMD = 0xd5,
221 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300222 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100223
224 /* for WoWLAN in particular */
225 WOWLAN_PATTERNS = 0xe0,
226 WOWLAN_CONFIGURATION = 0xe1,
227 WOWLAN_TSC_RSC_PARAM = 0xe2,
228 WOWLAN_TKIP_PARAM = 0xe3,
229 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
230 WOWLAN_GET_STATUSES = 0xe5,
231 WOWLAN_TX_POWER_PER_DB = 0xe6,
232
233 /* and for NetDetect */
234 NET_DETECT_CONFIG_CMD = 0x54,
235 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
236 NET_DETECT_PROFILES_CMD = 0x57,
237 NET_DETECT_HOTSPOTS_CMD = 0x58,
238 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
239
240 REPLY_MAX = 0xff,
241};
242
243/**
244 * struct iwl_cmd_response - generic response struct for most commands
245 * @status: status of the command asked, changes for each one
246 */
247struct iwl_cmd_response {
248 __le32 status;
249};
250
251/*
252 * struct iwl_tx_ant_cfg_cmd
253 * @valid: valid antenna configuration
254 */
255struct iwl_tx_ant_cfg_cmd {
256 __le32 valid;
257} __packed;
258
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300259/**
260 * struct iwl_reduce_tx_power_cmd - TX power reduction command
261 * REDUCE_TX_POWER_CMD = 0x9f
262 * @flags: (reserved for future implementation)
263 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
264 * @pwr_restriction: TX power restriction in dBms.
265 */
266struct iwl_reduce_tx_power_cmd {
267 u8 flags;
268 u8 mac_context_id;
269 __le16 pwr_restriction;
270} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
271
Johannes Berg8ca151b2013-01-24 14:25:36 +0100272/*
273 * Calibration control struct.
274 * Sent as part of the phy configuration command.
275 * @flow_trigger: bitmap for which calibrations to perform according to
276 * flow triggers.
277 * @event_trigger: bitmap for which calibrations to perform according to
278 * event triggers.
279 */
280struct iwl_calib_ctrl {
281 __le32 flow_trigger;
282 __le32 event_trigger;
283} __packed;
284
285/* This enum defines the bitmap of various calibrations to enable in both
286 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
287 */
288enum iwl_calib_cfg {
289 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
290 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
291 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
292 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
293 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
294 IWL_CALIB_CFG_DC_IDX = BIT(5),
295 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
296 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
297 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
298 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
299 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
300 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
301 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
302 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
303 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
304 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
305 IWL_CALIB_CFG_DAC_IDX = BIT(16),
306 IWL_CALIB_CFG_ABS_IDX = BIT(17),
307 IWL_CALIB_CFG_AGC_IDX = BIT(18),
308};
309
310/*
311 * Phy configuration command.
312 */
313struct iwl_phy_cfg_cmd {
314 __le32 phy_cfg;
315 struct iwl_calib_ctrl calib_control;
316} __packed;
317
318#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
319#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
320#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
321#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
322#define PHY_CFG_TX_CHAIN_A BIT(8)
323#define PHY_CFG_TX_CHAIN_B BIT(9)
324#define PHY_CFG_TX_CHAIN_C BIT(10)
325#define PHY_CFG_RX_CHAIN_A BIT(12)
326#define PHY_CFG_RX_CHAIN_B BIT(13)
327#define PHY_CFG_RX_CHAIN_C BIT(14)
328
329
330/* Target of the NVM_ACCESS_CMD */
331enum {
332 NVM_ACCESS_TARGET_CACHE = 0,
333 NVM_ACCESS_TARGET_OTP = 1,
334 NVM_ACCESS_TARGET_EEPROM = 2,
335};
336
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200337/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100338enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200339 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200340 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200341 NVM_SECTION_TYPE_CALIBRATION = 4,
342 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200343 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
344 NVM_MAX_NUM_SECTIONS = 12,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100345};
346
347/**
348 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
349 * @op_code: 0 - read, 1 - write
350 * @target: NVM_ACCESS_TARGET_*
351 * @type: NVM_SECTION_TYPE_*
352 * @offset: offset in bytes into the section
353 * @length: in bytes, to read/write
354 * @data: if write operation, the data to write. On read its empty
355 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200356struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100357 u8 op_code;
358 u8 target;
359 __le16 type;
360 __le16 offset;
361 __le16 length;
362 u8 data[];
363} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
364
365/**
366 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
367 * @offset: offset in bytes into the section
368 * @length: in bytes, either how much was written or read
369 * @type: NVM_SECTION_TYPE_*
370 * @status: 0 for success, fail otherwise
371 * @data: if read operation, the data returned. Empty on write.
372 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200373struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100374 __le16 offset;
375 __le16 length;
376 __le16 type;
377 __le16 status;
378 u8 data[];
379} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
380
381/* MVM_ALIVE 0x1 */
382
383/* alive response is_valid values */
384#define ALIVE_RESP_UCODE_OK BIT(0)
385#define ALIVE_RESP_RFKILL BIT(1)
386
387/* alive response ver_type values */
388enum {
389 FW_TYPE_HW = 0,
390 FW_TYPE_PROT = 1,
391 FW_TYPE_AP = 2,
392 FW_TYPE_WOWLAN = 3,
393 FW_TYPE_TIMING = 4,
394 FW_TYPE_WIPAN = 5
395};
396
397/* alive response ver_subtype values */
398enum {
399 FW_SUBTYPE_FULL_FEATURE = 0,
400 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
401 FW_SUBTYPE_REDUCED = 2,
402 FW_SUBTYPE_ALIVE_ONLY = 3,
403 FW_SUBTYPE_WOWLAN = 4,
404 FW_SUBTYPE_AP_SUBTYPE = 5,
405 FW_SUBTYPE_WIPAN = 6,
406 FW_SUBTYPE_INITIALIZE = 9
407};
408
409#define IWL_ALIVE_STATUS_ERR 0xDEAD
410#define IWL_ALIVE_STATUS_OK 0xCAFE
411
412#define IWL_ALIVE_FLG_RFKILL BIT(0)
413
414struct mvm_alive_resp {
415 __le16 status;
416 __le16 flags;
417 u8 ucode_minor;
418 u8 ucode_major;
419 __le16 id;
420 u8 api_minor;
421 u8 api_major;
422 u8 ver_subtype;
423 u8 ver_type;
424 u8 mac;
425 u8 opt;
426 __le16 reserved2;
427 __le32 timestamp;
428 __le32 error_event_table_ptr; /* SRAM address for error log */
429 __le32 log_event_table_ptr; /* SRAM address for event log */
430 __le32 cpu_register_ptr;
431 __le32 dbgm_config_ptr;
432 __le32 alive_counter_ptr;
433 __le32 scd_base_ptr; /* SRAM address for SCD */
434} __packed; /* ALIVE_RES_API_S_VER_1 */
435
Eran Harary01a9ca52014-02-03 09:29:57 +0200436struct mvm_alive_resp_ver2 {
437 __le16 status;
438 __le16 flags;
439 u8 ucode_minor;
440 u8 ucode_major;
441 __le16 id;
442 u8 api_minor;
443 u8 api_major;
444 u8 ver_subtype;
445 u8 ver_type;
446 u8 mac;
447 u8 opt;
448 __le16 reserved2;
449 __le32 timestamp;
450 __le32 error_event_table_ptr; /* SRAM address for error log */
451 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
452 __le32 cpu_register_ptr;
453 __le32 dbgm_config_ptr;
454 __le32 alive_counter_ptr;
455 __le32 scd_base_ptr; /* SRAM address for SCD */
456 __le32 st_fwrd_addr; /* pointer to Store and forward */
457 __le32 st_fwrd_size;
458 u8 umac_minor; /* UMAC version: minor */
459 u8 umac_major; /* UMAC version: major */
460 __le16 umac_id; /* UMAC version: id */
461 __le32 error_info_addr; /* SRAM address for UMAC error log */
462 __le32 dbg_print_buff_addr;
463} __packed; /* ALIVE_RES_API_S_VER_2 */
464
Johannes Berg8ca151b2013-01-24 14:25:36 +0100465/* Error response/notification */
466enum {
467 FW_ERR_UNKNOWN_CMD = 0x0,
468 FW_ERR_INVALID_CMD_PARAM = 0x1,
469 FW_ERR_SERVICE = 0x2,
470 FW_ERR_ARC_MEMORY = 0x3,
471 FW_ERR_ARC_CODE = 0x4,
472 FW_ERR_WATCH_DOG = 0x5,
473 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
474 FW_ERR_WEP_KEY_SIZE = 0x11,
475 FW_ERR_OBSOLETE_FUNC = 0x12,
476 FW_ERR_UNEXPECTED = 0xFE,
477 FW_ERR_FATAL = 0xFF
478};
479
480/**
481 * struct iwl_error_resp - FW error indication
482 * ( REPLY_ERROR = 0x2 )
483 * @error_type: one of FW_ERR_*
484 * @cmd_id: the command ID for which the error occured
485 * @bad_cmd_seq_num: sequence number of the erroneous command
486 * @error_service: which service created the error, applicable only if
487 * error_type = 2, otherwise 0
488 * @timestamp: TSF in usecs.
489 */
490struct iwl_error_resp {
491 __le32 error_type;
492 u8 cmd_id;
493 u8 reserved1;
494 __le16 bad_cmd_seq_num;
495 __le32 error_service;
496 __le64 timestamp;
497} __packed;
498
499
500/* Common PHY, MAC and Bindings definitions */
501
502#define MAX_MACS_IN_BINDING (3)
503#define MAX_BINDINGS (4)
504#define AUX_BINDING_INDEX (3)
505#define MAX_PHYS (4)
506
507/* Used to extract ID and color from the context dword */
508#define FW_CTXT_ID_POS (0)
509#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
510#define FW_CTXT_COLOR_POS (8)
511#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
512#define FW_CTXT_INVALID (0xffffffff)
513
514#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
515 (_color << FW_CTXT_COLOR_POS))
516
517/* Possible actions on PHYs, MACs and Bindings */
518enum {
519 FW_CTXT_ACTION_STUB = 0,
520 FW_CTXT_ACTION_ADD,
521 FW_CTXT_ACTION_MODIFY,
522 FW_CTXT_ACTION_REMOVE,
523 FW_CTXT_ACTION_NUM
524}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
525
526/* Time Events */
527
528/* Time Event types, according to MAC type */
529enum iwl_time_event_type {
530 /* BSS Station Events */
531 TE_BSS_STA_AGGRESSIVE_ASSOC,
532 TE_BSS_STA_ASSOC,
533 TE_BSS_EAP_DHCP_PROT,
534 TE_BSS_QUIET_PERIOD,
535
536 /* P2P Device Events */
537 TE_P2P_DEVICE_DISCOVERABLE,
538 TE_P2P_DEVICE_LISTEN,
539 TE_P2P_DEVICE_ACTION_SCAN,
540 TE_P2P_DEVICE_FULL_SCAN,
541
542 /* P2P Client Events */
543 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
544 TE_P2P_CLIENT_ASSOC,
545 TE_P2P_CLIENT_QUIET_PERIOD,
546
547 /* P2P GO Events */
548 TE_P2P_GO_ASSOC_PROT,
549 TE_P2P_GO_REPETITIVE_NOA,
550 TE_P2P_GO_CT_WINDOW,
551
552 /* WiDi Sync Events */
553 TE_WIDI_TX_SYNC,
554
Andrei Otcheretianski7f0a7c62014-05-04 11:48:12 +0300555 /* Channel Switch NoA */
556 TE_P2P_GO_CSA_NOA,
557
Johannes Berg8ca151b2013-01-24 14:25:36 +0100558 TE_MAX
559}; /* MAC_EVENT_TYPE_API_E_VER_1 */
560
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300561
562
563/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100564
565/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300566 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
567 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
568 * the first fragment is scheduled.
569 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
570 * the first 2 fragments are scheduled.
571 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
572 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100573 *
574 * Other than the constant defined above, specifying a fragmentation value 'x'
575 * means that the event can be fragmented but only the first 'x' will be
576 * scheduled.
577 */
578enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300579 TE_V1_FRAG_NONE = 0,
580 TE_V1_FRAG_SINGLE = 1,
581 TE_V1_FRAG_DUAL = 2,
582 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100583};
584
Johannes Berg8ca151b2013-01-24 14:25:36 +0100585/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300586#define TE_V1_FRAG_MAX_MSK 0x0fffffff
587/* Repeat the time event endlessly (until removed) */
588#define TE_V1_REPEAT_ENDLESS 0xffffffff
589/* If a Time Event has bounded repetitions, this is the maximal value */
590#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
591
592/* Time Event dependencies: none, on another TE, or in a specific time */
593enum {
594 TE_V1_INDEPENDENT = 0,
595 TE_V1_DEP_OTHER = BIT(0),
596 TE_V1_DEP_TSF = BIT(1),
597 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
598}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
599
600/*
601 * @TE_V1_NOTIF_NONE: no notifications
602 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
603 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
604 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
605 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
606 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
607 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
608 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
609 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
610 *
611 * Supported Time event notifications configuration.
612 * A notification (both event and fragment) includes a status indicating weather
613 * the FW was able to schedule the event or not. For fragment start/end
614 * notification the status is always success. There is no start/end fragment
615 * notification for monolithic events.
616 */
617enum {
618 TE_V1_NOTIF_NONE = 0,
619 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
620 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
621 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
622 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
623 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
624 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
625 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
626 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
627}; /* MAC_EVENT_ACTION_API_E_VER_2 */
628
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300629/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300630
631/*
632 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
633 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
634 * the first fragment is scheduled.
635 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
636 * the first 2 fragments are scheduled.
637 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
638 * number of fragments are valid.
639 *
640 * Other than the constant defined above, specifying a fragmentation value 'x'
641 * means that the event can be fragmented but only the first 'x' will be
642 * scheduled.
643 */
644enum {
645 TE_V2_FRAG_NONE = 0,
646 TE_V2_FRAG_SINGLE = 1,
647 TE_V2_FRAG_DUAL = 2,
648 TE_V2_FRAG_MAX = 0xfe,
649 TE_V2_FRAG_ENDLESS = 0xff
650};
651
652/* Repeat the time event endlessly (until removed) */
653#define TE_V2_REPEAT_ENDLESS 0xff
654/* If a Time Event has bounded repetitions, this is the maximal value */
655#define TE_V2_REPEAT_MAX 0xfe
656
657#define TE_V2_PLACEMENT_POS 12
658#define TE_V2_ABSENCE_POS 15
659
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300660/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300661 * A notification (both event and fragment) includes a status indicating weather
662 * the FW was able to schedule the event or not. For fragment start/end
663 * notification the status is always success. There is no start/end fragment
664 * notification for monolithic events.
665 *
666 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
667 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
668 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
669 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
670 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
671 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
672 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
673 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
674 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
675 * @TE_V2_DEP_OTHER: depends on another time event
676 * @TE_V2_DEP_TSF: depends on a specific time
677 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
678 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
679 */
680enum {
681 TE_V2_DEFAULT_POLICY = 0x0,
682
683 /* notifications (event start/stop, fragment start/stop) */
684 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
685 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
686 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
687 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
688
689 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
690 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
691 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
692 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200693 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300694
695 TE_V2_NOTIF_MSK = 0xff,
696
697 /* placement characteristics */
698 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
699 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
700 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
701
702 /* are we present or absent during the Time Event. */
703 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
704};
705
706/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300707 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300708 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
709 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
710 * ( TIME_EVENT_CMD = 0x29 )
711 * @id_and_color: ID and color of the relevant MAC
712 * @action: action to perform, one of FW_CTXT_ACTION_*
713 * @id: this field has two meanings, depending on the action:
714 * If the action is ADD, then it means the type of event to add.
715 * For all other actions it is the unique event ID assigned when the
716 * event was added by the FW.
717 * @apply_time: When to start the Time Event (in GP2)
718 * @max_delay: maximum delay to event's start (apply time), in TU
719 * @depends_on: the unique ID of the event we depend on (if any)
720 * @interval: interval between repetitions, in TU
721 * @duration: duration of event in TU
722 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
723 * @max_frags: maximal number of fragments the Time Event can be divided to
724 * @policy: defines whether uCode shall notify the host or other uCode modules
725 * on event and/or fragment start and/or end
726 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
727 * TE_EVENT_SOCIOPATHIC
728 * using TE_ABSENCE and using TE_NOTIF_*
729 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300730struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300731 /* COMMON_INDEX_HDR_API_S_VER_1 */
732 __le32 id_and_color;
733 __le32 action;
734 __le32 id;
735 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
736 __le32 apply_time;
737 __le32 max_delay;
738 __le32 depends_on;
739 __le32 interval;
740 __le32 duration;
741 u8 repeat;
742 u8 max_frags;
743 __le16 policy;
744} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
745
Johannes Berg8ca151b2013-01-24 14:25:36 +0100746/**
747 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
748 * @status: bit 0 indicates success, all others specify errors
749 * @id: the Time Event type
750 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
751 * @id_and_color: ID and color of the relevant MAC
752 */
753struct iwl_time_event_resp {
754 __le32 status;
755 __le32 id;
756 __le32 unique_id;
757 __le32 id_and_color;
758} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
759
760/**
761 * struct iwl_time_event_notif - notifications of time event start/stop
762 * ( TIME_EVENT_NOTIFICATION = 0x2a )
763 * @timestamp: action timestamp in GP2
764 * @session_id: session's unique id
765 * @unique_id: unique id of the Time Event itself
766 * @id_and_color: ID and color of the relevant MAC
767 * @action: one of TE_NOTIF_START or TE_NOTIF_END
768 * @status: true if scheduled, false otherwise (not executed)
769 */
770struct iwl_time_event_notif {
771 __le32 timestamp;
772 __le32 session_id;
773 __le32 unique_id;
774 __le32 id_and_color;
775 __le32 action;
776 __le32 status;
777} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
778
779
780/* Bindings and Time Quota */
781
782/**
783 * struct iwl_binding_cmd - configuring bindings
784 * ( BINDING_CONTEXT_CMD = 0x2b )
785 * @id_and_color: ID and color of the relevant Binding
786 * @action: action to perform, one of FW_CTXT_ACTION_*
787 * @macs: array of MAC id and colors which belong to the binding
788 * @phy: PHY id and color which belongs to the binding
789 */
790struct iwl_binding_cmd {
791 /* COMMON_INDEX_HDR_API_S_VER_1 */
792 __le32 id_and_color;
793 __le32 action;
794 /* BINDING_DATA_API_S_VER_1 */
795 __le32 macs[MAX_MACS_IN_BINDING];
796 __le32 phy;
797} __packed; /* BINDING_CMD_API_S_VER_1 */
798
Ilan Peer35adfd62013-02-04 13:16:24 +0200799/* The maximal number of fragments in the FW's schedule session */
800#define IWL_MVM_MAX_QUOTA 128
801
Johannes Berg8ca151b2013-01-24 14:25:36 +0100802/**
803 * struct iwl_time_quota_data - configuration of time quota per binding
804 * @id_and_color: ID and color of the relevant Binding
805 * @quota: absolute time quota in TU. The scheduler will try to divide the
806 * remainig quota (after Time Events) according to this quota.
807 * @max_duration: max uninterrupted context duration in TU
808 */
809struct iwl_time_quota_data {
810 __le32 id_and_color;
811 __le32 quota;
812 __le32 max_duration;
813} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
814
815/**
816 * struct iwl_time_quota_cmd - configuration of time quota between bindings
817 * ( TIME_QUOTA_CMD = 0x2c )
818 * @quotas: allocations per binding
819 */
820struct iwl_time_quota_cmd {
821 struct iwl_time_quota_data quotas[MAX_BINDINGS];
822} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
823
824
825/* PHY context */
826
827/* Supported bands */
828#define PHY_BAND_5 (0)
829#define PHY_BAND_24 (1)
830
831/* Supported channel width, vary if there is VHT support */
832#define PHY_VHT_CHANNEL_MODE20 (0x0)
833#define PHY_VHT_CHANNEL_MODE40 (0x1)
834#define PHY_VHT_CHANNEL_MODE80 (0x2)
835#define PHY_VHT_CHANNEL_MODE160 (0x3)
836
837/*
838 * Control channel position:
839 * For legacy set bit means upper channel, otherwise lower.
840 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
841 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
842 * center_freq
843 * |
844 * 40Mhz |_______|_______|
845 * 80Mhz |_______|_______|_______|_______|
846 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
847 * code 011 010 001 000 | 100 101 110 111
848 */
849#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
850#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
851#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
852#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
853#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
854#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
855#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
856#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
857
858/*
859 * @band: PHY_BAND_*
860 * @channel: channel number
861 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
862 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
863 */
864struct iwl_fw_channel_info {
865 u8 band;
866 u8 channel;
867 u8 width;
868 u8 ctrl_pos;
869} __packed;
870
871#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
872#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
873 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
874#define PHY_RX_CHAIN_VALID_POS (1)
875#define PHY_RX_CHAIN_VALID_MSK \
876 (0x7 << PHY_RX_CHAIN_VALID_POS)
877#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
878#define PHY_RX_CHAIN_FORCE_SEL_MSK \
879 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
880#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
881#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
882 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
883#define PHY_RX_CHAIN_CNT_POS (10)
884#define PHY_RX_CHAIN_CNT_MSK \
885 (0x3 << PHY_RX_CHAIN_CNT_POS)
886#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
887#define PHY_RX_CHAIN_MIMO_CNT_MSK \
888 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
889#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
890#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
891 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
892
893/* TODO: fix the value, make it depend on firmware at runtime? */
894#define NUM_PHY_CTX 3
895
896/* TODO: complete missing documentation */
897/**
898 * struct iwl_phy_context_cmd - config of the PHY context
899 * ( PHY_CONTEXT_CMD = 0x8 )
900 * @id_and_color: ID and color of the relevant Binding
901 * @action: action to perform, one of FW_CTXT_ACTION_*
902 * @apply_time: 0 means immediate apply and context switch.
903 * other value means apply new params after X usecs
904 * @tx_param_color: ???
905 * @channel_info:
906 * @txchain_info: ???
907 * @rxchain_info: ???
908 * @acquisition_data: ???
909 * @dsp_cfg_flags: set to 0
910 */
911struct iwl_phy_context_cmd {
912 /* COMMON_INDEX_HDR_API_S_VER_1 */
913 __le32 id_and_color;
914 __le32 action;
915 /* PHY_CONTEXT_DATA_API_S_VER_1 */
916 __le32 apply_time;
917 __le32 tx_param_color;
918 struct iwl_fw_channel_info ci;
919 __le32 txchain_info;
920 __le32 rxchain_info;
921 __le32 acquisition_data;
922 __le32 dsp_cfg_flags;
923} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
924
Ariej Marjieh720befbf2014-07-07 09:04:58 +0300925/*
926 * Aux ROC command
927 *
928 * Command requests the firmware to create a time event for a certain duration
929 * and remain on the given channel. This is done by using the Aux framework in
930 * the FW.
931 * The command was first used for Hot Spot issues - but can be used regardless
932 * to Hot Spot.
933 *
934 * ( HOT_SPOT_CMD 0x53 )
935 *
936 * @id_and_color: ID and color of the MAC
937 * @action: action to perform, one of FW_CTXT_ACTION_*
938 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
939 * event_unique_id should be the id of the time event assigned by ucode.
940 * Otherwise ignore the event_unique_id.
941 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
942 * activity.
943 * @channel_info: channel info
944 * @node_addr: Our MAC Address
945 * @reserved: reserved for alignment
946 * @apply_time: GP2 value to start (should always be the current GP2 value)
947 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
948 * time by which start of the event is allowed to be postponed.
949 * @duration: event duration in TU To calculate event duration:
950 * timeEventDuration = min(duration, remainingQuota)
951 */
952struct iwl_hs20_roc_req {
953 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
954 __le32 id_and_color;
955 __le32 action;
956 __le32 event_unique_id;
957 __le32 sta_id_and_color;
958 struct iwl_fw_channel_info channel_info;
959 u8 node_addr[ETH_ALEN];
960 __le16 reserved;
961 __le32 apply_time;
962 __le32 apply_time_max_delay;
963 __le32 duration;
964} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
965
966/*
967 * values for AUX ROC result values
968 */
969enum iwl_mvm_hot_spot {
970 HOT_SPOT_RSP_STATUS_OK,
971 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
972 HOT_SPOT_MAX_NUM_OF_SESSIONS,
973};
974
975/*
976 * Aux ROC command response
977 *
978 * In response to iwl_hs20_roc_req the FW sends this command to notify the
979 * driver the uid of the timevent.
980 *
981 * ( HOT_SPOT_CMD 0x53 )
982 *
983 * @event_unique_id: Unique ID of time event assigned by ucode
984 * @status: Return status 0 is success, all the rest used for specific errors
985 */
986struct iwl_hs20_roc_res {
987 __le32 event_unique_id;
988 __le32 status;
989} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
990
Johannes Berg8ca151b2013-01-24 14:25:36 +0100991#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300992#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
993#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
994#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
995#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
996#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
997#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
998#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
999
Johannes Berg8ca151b2013-01-24 14:25:36 +01001000#define IWL_RX_INFO_AGC_IDX 1
1001#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001002#define IWL_OFDM_AGC_A_MSK 0x0000007f
1003#define IWL_OFDM_AGC_A_POS 0
1004#define IWL_OFDM_AGC_B_MSK 0x00003f80
1005#define IWL_OFDM_AGC_B_POS 7
1006#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1007#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +01001008#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +01001009#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001010#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1011#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +01001012#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +01001013#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +02001014#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1015#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +01001016
1017/**
1018 * struct iwl_rx_phy_info - phy info
1019 * (REPLY_RX_PHY_CMD = 0xc0)
1020 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1021 * @cfg_phy_cnt: configurable DSP phy data byte count
1022 * @stat_id: configurable DSP phy data set ID
1023 * @reserved1:
1024 * @system_timestamp: GP2 at on air rise
1025 * @timestamp: TSF at on air rise
1026 * @beacon_time_stamp: beacon at on-air rise
1027 * @phy_flags: general phy flags: band, modulation, ...
1028 * @channel: channel number
1029 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1030 * @rate_n_flags: RATE_MCS_*
1031 * @byte_count: frame's byte-count
1032 * @frame_time: frame's time on the air, based on byte count and frame rate
1033 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001034 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +01001035 *
1036 * Before each Rx, the device sends this data. It contains PHY information
1037 * about the reception of the packet.
1038 */
1039struct iwl_rx_phy_info {
1040 u8 non_cfg_phy_cnt;
1041 u8 cfg_phy_cnt;
1042 u8 stat_id;
1043 u8 reserved1;
1044 __le32 system_timestamp;
1045 __le64 timestamp;
1046 __le32 beacon_time_stamp;
1047 __le16 phy_flags;
1048 __le16 channel;
1049 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1050 __le32 rate_n_flags;
1051 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +02001052 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +01001053 __le16 frame_time;
1054} __packed;
1055
1056struct iwl_rx_mpdu_res_start {
1057 __le16 byte_count;
1058 __le16 reserved;
1059} __packed;
1060
1061/**
1062 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1063 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1064 * @RX_RES_PHY_FLAGS_MOD_CCK:
1065 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1066 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1067 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1068 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1069 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1070 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1071 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1072 */
1073enum iwl_rx_phy_flags {
1074 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1075 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1076 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1077 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1078 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1079 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1080 RX_RES_PHY_FLAGS_AGG = BIT(7),
1081 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1082 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1083 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1084};
1085
1086/**
1087 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1088 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1089 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1090 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1091 * @RX_MPDU_RES_STATUS_KEY_VALID:
1092 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1093 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1094 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1095 * in the driver.
1096 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1097 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1098 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1099 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1100 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1101 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1102 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1103 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1104 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1105 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1106 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1107 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1108 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1109 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1110 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1111 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1112 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1113 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1114 * @RX_MPDU_RES_STATUS_RRF_KILL:
1115 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1116 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1117 */
1118enum iwl_mvm_rx_status {
1119 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1120 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1121 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1122 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1123 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1124 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1125 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1126 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1127 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1128 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1129 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1130 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1131 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001132 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001133 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1134 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1135 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1136 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1137 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1138 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1139 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1140 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1141 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1142 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1143 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1144 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1145 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1146};
1147
1148/**
1149 * struct iwl_radio_version_notif - information on the radio version
1150 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1151 * @radio_flavor:
1152 * @radio_step:
1153 * @radio_dash:
1154 */
1155struct iwl_radio_version_notif {
1156 __le32 radio_flavor;
1157 __le32 radio_step;
1158 __le32 radio_dash;
1159} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1160
1161enum iwl_card_state_flags {
1162 CARD_ENABLED = 0x00,
1163 HW_CARD_DISABLED = 0x01,
1164 SW_CARD_DISABLED = 0x02,
1165 CT_KILL_CARD_DISABLED = 0x04,
1166 HALT_CARD_DISABLED = 0x08,
1167 CARD_DISABLED_MSK = 0x0f,
1168 CARD_IS_RX_ON = 0x10,
1169};
1170
1171/**
1172 * struct iwl_radio_version_notif - information on the radio version
1173 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1174 * @flags: %iwl_card_state_flags
1175 */
1176struct iwl_card_state_notif {
1177 __le32 flags;
1178} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1179
1180/**
Hila Gonend64048e2013-03-13 18:00:03 +02001181 * struct iwl_missed_beacons_notif - information on missed beacons
1182 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1183 * @mac_id: interface ID
1184 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1185 * beacons since last RX.
1186 * @consec_missed_beacons: number of consecutive missed beacons
1187 * @num_expected_beacons:
1188 * @num_recvd_beacons:
1189 */
1190struct iwl_missed_beacons_notif {
1191 __le32 mac_id;
1192 __le32 consec_missed_beacons_since_last_rx;
1193 __le32 consec_missed_beacons;
1194 __le32 num_expected_beacons;
1195 __le32 num_recvd_beacons;
1196} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1197
1198/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001199 * struct iwl_set_calib_default_cmd - set default value for calibration.
1200 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1201 * @calib_index: the calibration to set value for
1202 * @length: of data
1203 * @data: the value to set for the calibration result
1204 */
1205struct iwl_set_calib_default_cmd {
1206 __le16 calib_index;
1207 __le16 length;
1208 u8 data[0];
1209} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1210
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001211#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001212#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001213
1214/**
1215 * struct iwl_mcast_filter_cmd - configure multicast filter.
1216 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1217 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1218 * to identify network interface adopted in host-device IF.
1219 * It is used by FW as index in array of addresses. This array has
1220 * MAX_PORT_ID_NUM members.
1221 * @count: Number of MAC addresses in the array
1222 * @pass_all: Set 1 to pass all multicast packets.
1223 * @bssid: current association BSSID.
1224 * @addr_list: Place holder for array of MAC addresses.
1225 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1226 */
1227struct iwl_mcast_filter_cmd {
1228 u8 filter_own;
1229 u8 port_id;
1230 u8 count;
1231 u8 pass_all;
1232 u8 bssid[6];
1233 u8 reserved[2];
1234 u8 addr_list[0];
1235} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1236
Eliad Pellerc87163b2014-01-08 10:11:11 +02001237#define MAX_BCAST_FILTERS 8
1238#define MAX_BCAST_FILTER_ATTRS 2
1239
1240/**
1241 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1242 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1243 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1244 * start of ip payload).
1245 */
1246enum iwl_mvm_bcast_filter_attr_offset {
1247 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1248 BCAST_FILTER_OFFSET_IP_END = 1,
1249};
1250
1251/**
1252 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1253 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1254 * @offset: starting offset of this pattern.
1255 * @val: value to match - big endian (MSB is the first
1256 * byte to match from offset pos).
1257 * @mask: mask to match (big endian).
1258 */
1259struct iwl_fw_bcast_filter_attr {
1260 u8 offset_type;
1261 u8 offset;
1262 __le16 reserved1;
1263 __be32 val;
1264 __be32 mask;
1265} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1266
1267/**
1268 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1269 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1270 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1271 */
1272enum iwl_mvm_bcast_filter_frame_type {
1273 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1274 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1275};
1276
1277/**
1278 * struct iwl_fw_bcast_filter - broadcast filter
1279 * @discard: discard frame (1) or let it pass (0).
1280 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1281 * @num_attrs: number of valid attributes in this filter.
1282 * @attrs: attributes of this filter. a filter is considered matched
1283 * only when all its attributes are matched (i.e. AND relationship)
1284 */
1285struct iwl_fw_bcast_filter {
1286 u8 discard;
1287 u8 frame_type;
1288 u8 num_attrs;
1289 u8 reserved1;
1290 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1291} __packed; /* BCAST_FILTER_S_VER_1 */
1292
1293/**
1294 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1295 * @default_discard: default action for this mac (discard (1) / pass (0)).
1296 * @attached_filters: bitmap of relevant filters for this mac.
1297 */
1298struct iwl_fw_bcast_mac {
1299 u8 default_discard;
1300 u8 reserved1;
1301 __le16 attached_filters;
1302} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1303
1304/**
1305 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1306 * @disable: enable (0) / disable (1)
1307 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1308 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1309 * @filters: broadcast filters
1310 * @macs: broadcast filtering configuration per-mac
1311 */
1312struct iwl_bcast_filter_cmd {
1313 u8 disable;
1314 u8 max_bcast_filters;
1315 u8 max_macs;
1316 u8 reserved1;
1317 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1318 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1319} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1320
Matti Gottlieba2d79c52014-08-25 14:41:23 +03001321/*
1322 * enum iwl_mvm_marker_id - maker ids
1323 *
1324 * The ids for different type of markers to insert into the usniffer logs
1325 */
1326enum iwl_mvm_marker_id {
1327 MARKER_ID_TX_FRAME_LATENCY = 1,
1328}; /* MARKER_ID_API_E_VER_1 */
1329
1330/**
1331 * struct iwl_mvm_marker - mark info into the usniffer logs
1332 *
1333 * (MARKER_CMD = 0xcb)
1334 *
1335 * Mark the UTC time stamp into the usniffer logs together with additional
1336 * metadata, so the usniffer output can be parsed.
1337 * In the command response the ucode will return the GP2 time.
1338 *
1339 * @dw_len: The amount of dwords following this byte including this byte.
1340 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1341 * @reserved: reserved.
1342 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1343 * @metadata: additional meta data that will be written to the unsiffer log
1344 */
1345struct iwl_mvm_marker {
1346 u8 dwLen;
1347 u8 markerId;
1348 __le16 reserved;
1349 __le64 timestamp;
1350 __le32 metadata[0];
1351} __packed; /* MARKER_API_S_VER_1 */
1352
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001353struct mvm_statistics_dbg {
1354 __le32 burst_check;
1355 __le32 burst_count;
1356 __le32 wait_for_silence_timeout_cnt;
1357 __le32 reserved[3];
1358} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1359
1360struct mvm_statistics_div {
1361 __le32 tx_on_a;
1362 __le32 tx_on_b;
1363 __le32 exec_time;
1364 __le32 probe_time;
1365 __le32 rssi_ant;
1366 __le32 reserved2;
1367} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1368
1369struct mvm_statistics_general_common {
1370 __le32 temperature; /* radio temperature */
1371 __le32 temperature_m; /* radio voltage */
1372 struct mvm_statistics_dbg dbg;
1373 __le32 sleep_time;
1374 __le32 slots_out;
1375 __le32 slots_idle;
1376 __le32 ttl_timestamp;
1377 struct mvm_statistics_div div;
1378 __le32 rx_enable_counter;
1379 /*
1380 * num_of_sos_states:
1381 * count the number of times we have to re-tune
1382 * in order to get out of bad PHY status
1383 */
1384 __le32 num_of_sos_states;
1385} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1386
1387struct mvm_statistics_rx_non_phy {
1388 __le32 bogus_cts; /* CTS received when not expecting CTS */
1389 __le32 bogus_ack; /* ACK received when not expecting ACK */
1390 __le32 non_bssid_frames; /* number of frames with BSSID that
1391 * doesn't belong to the STA BSSID */
1392 __le32 filtered_frames; /* count frames that were dumped in the
1393 * filtering process */
1394 __le32 non_channel_beacons; /* beacons with our bss id but not on
1395 * our serving channel */
1396 __le32 channel_beacons; /* beacons with our bss id and in our
1397 * serving channel */
1398 __le32 num_missed_bcon; /* number of missed beacons */
1399 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1400 * ADC was in saturation */
1401 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1402 * for INA */
1403 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1404 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1405 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1406 __le32 interference_data_flag; /* flag for interference data
1407 * availability. 1 when data is
1408 * available. */
1409 __le32 channel_load; /* counts RX Enable time in uSec */
1410 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1411 * and CCK) counter */
1412 __le32 beacon_rssi_a;
1413 __le32 beacon_rssi_b;
1414 __le32 beacon_rssi_c;
1415 __le32 beacon_energy_a;
1416 __le32 beacon_energy_b;
1417 __le32 beacon_energy_c;
1418 __le32 num_bt_kills;
1419 __le32 mac_id;
1420 __le32 directed_data_mpdu;
1421} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1422
1423struct mvm_statistics_rx_phy {
1424 __le32 ina_cnt;
1425 __le32 fina_cnt;
1426 __le32 plcp_err;
1427 __le32 crc32_err;
1428 __le32 overrun_err;
1429 __le32 early_overrun_err;
1430 __le32 crc32_good;
1431 __le32 false_alarm_cnt;
1432 __le32 fina_sync_err_cnt;
1433 __le32 sfd_timeout;
1434 __le32 fina_timeout;
1435 __le32 unresponded_rts;
1436 __le32 rxe_frame_limit_overrun;
1437 __le32 sent_ack_cnt;
1438 __le32 sent_cts_cnt;
1439 __le32 sent_ba_rsp_cnt;
1440 __le32 dsp_self_kill;
1441 __le32 mh_format_err;
1442 __le32 re_acq_main_rssi_sum;
1443 __le32 reserved;
1444} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1445
1446struct mvm_statistics_rx_ht_phy {
1447 __le32 plcp_err;
1448 __le32 overrun_err;
1449 __le32 early_overrun_err;
1450 __le32 crc32_good;
1451 __le32 crc32_err;
1452 __le32 mh_format_err;
1453 __le32 agg_crc32_good;
1454 __le32 agg_mpdu_cnt;
1455 __le32 agg_cnt;
1456 __le32 unsupport_mcs;
1457} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1458
1459#define MAX_CHAINS 3
1460
1461struct mvm_statistics_tx_non_phy_agg {
1462 __le32 ba_timeout;
1463 __le32 ba_reschedule_frames;
1464 __le32 scd_query_agg_frame_cnt;
1465 __le32 scd_query_no_agg;
1466 __le32 scd_query_agg;
1467 __le32 scd_query_mismatch;
1468 __le32 frame_not_ready;
1469 __le32 underrun;
1470 __le32 bt_prio_kill;
1471 __le32 rx_ba_rsp_cnt;
1472 __s8 txpower[MAX_CHAINS];
1473 __s8 reserved;
1474 __le32 reserved2;
1475} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1476
1477struct mvm_statistics_tx_channel_width {
1478 __le32 ext_cca_narrow_ch20[1];
1479 __le32 ext_cca_narrow_ch40[2];
1480 __le32 ext_cca_narrow_ch80[3];
1481 __le32 ext_cca_narrow_ch160[4];
1482 __le32 last_tx_ch_width_indx;
1483 __le32 rx_detected_per_ch_width[4];
1484 __le32 success_per_ch_width[4];
1485 __le32 fail_per_ch_width[4];
1486}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1487
1488struct mvm_statistics_tx {
1489 __le32 preamble_cnt;
1490 __le32 rx_detected_cnt;
1491 __le32 bt_prio_defer_cnt;
1492 __le32 bt_prio_kill_cnt;
1493 __le32 few_bytes_cnt;
1494 __le32 cts_timeout;
1495 __le32 ack_timeout;
1496 __le32 expected_ack_cnt;
1497 __le32 actual_ack_cnt;
1498 __le32 dump_msdu_cnt;
1499 __le32 burst_abort_next_frame_mismatch_cnt;
1500 __le32 burst_abort_missing_next_frame_cnt;
1501 __le32 cts_timeout_collision;
1502 __le32 ack_or_ba_timeout_collision;
1503 struct mvm_statistics_tx_non_phy_agg agg;
1504 struct mvm_statistics_tx_channel_width channel_width;
1505} __packed; /* STATISTICS_TX_API_S_VER_4 */
1506
1507
1508struct mvm_statistics_bt_activity {
1509 __le32 hi_priority_tx_req_cnt;
1510 __le32 hi_priority_tx_denied_cnt;
1511 __le32 lo_priority_tx_req_cnt;
1512 __le32 lo_priority_tx_denied_cnt;
1513 __le32 hi_priority_rx_req_cnt;
1514 __le32 hi_priority_rx_denied_cnt;
1515 __le32 lo_priority_rx_req_cnt;
1516 __le32 lo_priority_rx_denied_cnt;
1517} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1518
1519struct mvm_statistics_general {
1520 struct mvm_statistics_general_common common;
1521 __le32 beacon_filtered;
1522 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001523 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001524 __s8 beacon_filter_reason;
1525 __s8 beacon_filter_current_energy;
1526 __s8 beacon_filter_reserved;
1527 __le32 beacon_filter_delta_time;
1528 struct mvm_statistics_bt_activity bt_activity;
1529} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1530
1531struct mvm_statistics_rx {
1532 struct mvm_statistics_rx_phy ofdm;
1533 struct mvm_statistics_rx_phy cck;
1534 struct mvm_statistics_rx_non_phy general;
1535 struct mvm_statistics_rx_ht_phy ofdm_ht;
1536} __packed; /* STATISTICS_RX_API_S_VER_3 */
1537
1538/*
1539 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1540 *
1541 * By default, uCode issues this notification after receiving a beacon
1542 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1543 * REPLY_STATISTICS_CMD 0x9c, above.
1544 *
1545 * Statistics counters continue to increment beacon after beacon, but are
1546 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1547 * 0x9c with CLEAR_STATS bit set (see above).
1548 *
1549 * uCode also issues this notification during scans. uCode clears statistics
1550 * appropriately so that each notification contains statistics for only the
1551 * one channel that has just been scanned.
1552 */
1553
1554struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1555 __le32 flag;
1556 struct mvm_statistics_rx rx;
1557 struct mvm_statistics_tx tx;
1558 struct mvm_statistics_general general;
1559} __packed;
1560
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001561/***********************************
1562 * Smart Fifo API
1563 ***********************************/
1564/* Smart Fifo state */
1565enum iwl_sf_state {
1566 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1567 SF_FULL_ON,
1568 SF_UNINIT,
1569 SF_INIT_OFF,
1570 SF_HW_NUM_STATES
1571};
1572
1573/* Smart Fifo possible scenario */
1574enum iwl_sf_scenario {
1575 SF_SCENARIO_SINGLE_UNICAST,
1576 SF_SCENARIO_AGG_UNICAST,
1577 SF_SCENARIO_MULTICAST,
1578 SF_SCENARIO_BA_RESP,
1579 SF_SCENARIO_TX_RESP,
1580 SF_NUM_SCENARIO
1581};
1582
1583#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1584#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1585
1586/* smart FIFO default values */
1587#define SF_W_MARK_SISO 4096
1588#define SF_W_MARK_MIMO2 8192
1589#define SF_W_MARK_MIMO3 6144
1590#define SF_W_MARK_LEGACY 4096
1591#define SF_W_MARK_SCAN 4096
1592
1593/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1594#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1595#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1596#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1597#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1598#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1599#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1600#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1601#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1602#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1603#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1604
1605#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1606
1607/**
1608 * Smart Fifo configuration command.
1609 * @state: smart fifo state, types listed in iwl_sf_sate.
1610 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1611 * @long_delay_timeouts: aging and idle timer values for each scenario
1612 * in long delay state.
1613 * @full_on_timeouts: timer values for each scenario in full on state.
1614 */
1615struct iwl_sf_cfg_cmd {
1616 enum iwl_sf_state state;
1617 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1618 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1619 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1620} __packed; /* SF_CFG_API_S_VER_2 */
1621
Johannes Berg8ca151b2013-01-24 14:25:36 +01001622#endif /* __fw_api_h__ */