Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1 | /* |
| 2 | * tps65910.c -- TI tps65910 |
| 3 | * |
| 4 | * Copyright 2010 Texas Instruments Inc. |
| 5 | * |
| 6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> |
| 7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/err.h> |
Geert Uytterhoeven | d16da51 | 2015-03-15 14:03:50 +0100 | [diff] [blame] | 20 | #include <linux/of.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/regulator/driver.h> |
| 23 | #include <linux/regulator/machine.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 24 | #include <linux/slab.h> |
| 25 | #include <linux/gpio.h> |
| 26 | #include <linux/mfd/tps65910.h> |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 27 | #include <linux/regulator/of_regulator.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 28 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 29 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 30 | #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ |
| 31 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 32 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ |
| 33 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 34 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 35 | /* supported VIO voltages in microvolts */ |
| 36 | static const unsigned int VIO_VSEL_table[] = { |
| 37 | 1500000, 1800000, 2500000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 38 | }; |
| 39 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 40 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
| 41 | |
AnilKumar Ch | a9a5659 | 2012-10-15 17:45:58 +0530 | [diff] [blame] | 42 | /* supported VRTC voltages in microvolts */ |
| 43 | static const unsigned int VRTC_VSEL_table[] = { |
| 44 | 1800000, |
| 45 | }; |
| 46 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 47 | /* supported VDD3 voltages in microvolts */ |
| 48 | static const unsigned int VDD3_VSEL_table[] = { |
| 49 | 5000000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 50 | }; |
| 51 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 52 | /* supported VDIG1 voltages in microvolts */ |
| 53 | static const unsigned int VDIG1_VSEL_table[] = { |
| 54 | 1200000, 1500000, 1800000, 2700000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 55 | }; |
| 56 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 57 | /* supported VDIG2 voltages in microvolts */ |
| 58 | static const unsigned int VDIG2_VSEL_table[] = { |
| 59 | 1000000, 1100000, 1200000, 1800000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 60 | }; |
| 61 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 62 | /* supported VPLL voltages in microvolts */ |
| 63 | static const unsigned int VPLL_VSEL_table[] = { |
| 64 | 1000000, 1100000, 1800000, 2500000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 65 | }; |
| 66 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 67 | /* supported VDAC voltages in microvolts */ |
| 68 | static const unsigned int VDAC_VSEL_table[] = { |
| 69 | 1800000, 2600000, 2800000, 2850000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 70 | }; |
| 71 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 72 | /* supported VAUX1 voltages in microvolts */ |
| 73 | static const unsigned int VAUX1_VSEL_table[] = { |
| 74 | 1800000, 2500000, 2800000, 2850000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 75 | }; |
| 76 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 77 | /* supported VAUX2 voltages in microvolts */ |
| 78 | static const unsigned int VAUX2_VSEL_table[] = { |
| 79 | 1800000, 2800000, 2900000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 80 | }; |
| 81 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 82 | /* supported VAUX33 voltages in microvolts */ |
| 83 | static const unsigned int VAUX33_VSEL_table[] = { |
| 84 | 1800000, 2000000, 2800000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 85 | }; |
| 86 | |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 87 | /* supported VMMC voltages in microvolts */ |
| 88 | static const unsigned int VMMC_VSEL_table[] = { |
| 89 | 1800000, 2800000, 3000000, 3300000, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 90 | }; |
| 91 | |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 92 | /* supported BBCH voltages in microvolts */ |
| 93 | static const unsigned int VBB_VSEL_table[] = { |
| 94 | 3000000, 2520000, 3150000, 5000000, |
| 95 | }; |
| 96 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 97 | struct tps_info { |
| 98 | const char *name; |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 99 | const char *vin_name; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 100 | u8 n_voltages; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 101 | const unsigned int *voltage_table; |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 102 | int enable_time_us; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 103 | }; |
| 104 | |
| 105 | static struct tps_info tps65910_regs[] = { |
| 106 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 107 | .name = "vrtc", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 108 | .vin_name = "vcc7", |
AnilKumar Ch | a9a5659 | 2012-10-15 17:45:58 +0530 | [diff] [blame] | 109 | .n_voltages = ARRAY_SIZE(VRTC_VSEL_table), |
| 110 | .voltage_table = VRTC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 111 | .enable_time_us = 2200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 112 | }, |
| 113 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 114 | .name = "vio", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 115 | .vin_name = "vccio", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 116 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 117 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 118 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 119 | }, |
| 120 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 121 | .name = "vdd1", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 122 | .vin_name = "vcc1", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 123 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 124 | }, |
| 125 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 126 | .name = "vdd2", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 127 | .vin_name = "vcc2", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 128 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 129 | }, |
| 130 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 131 | .name = "vdd3", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 132 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
| 133 | .voltage_table = VDD3_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 134 | .enable_time_us = 200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 135 | }, |
| 136 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 137 | .name = "vdig1", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 138 | .vin_name = "vcc6", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 139 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
| 140 | .voltage_table = VDIG1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 141 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 142 | }, |
| 143 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 144 | .name = "vdig2", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 145 | .vin_name = "vcc6", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 146 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
| 147 | .voltage_table = VDIG2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 148 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 149 | }, |
| 150 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 151 | .name = "vpll", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 152 | .vin_name = "vcc5", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 153 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
| 154 | .voltage_table = VPLL_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 155 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 156 | }, |
| 157 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 158 | .name = "vdac", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 159 | .vin_name = "vcc5", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 160 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
| 161 | .voltage_table = VDAC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 162 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 163 | }, |
| 164 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 165 | .name = "vaux1", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 166 | .vin_name = "vcc4", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 167 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
| 168 | .voltage_table = VAUX1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 169 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 170 | }, |
| 171 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 172 | .name = "vaux2", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 173 | .vin_name = "vcc4", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 174 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
| 175 | .voltage_table = VAUX2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 176 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 177 | }, |
| 178 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 179 | .name = "vaux33", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 180 | .vin_name = "vcc3", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 181 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
| 182 | .voltage_table = VAUX33_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 183 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 184 | }, |
| 185 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 186 | .name = "vmmc", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 187 | .vin_name = "vcc3", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 188 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
| 189 | .voltage_table = VMMC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 190 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 191 | }, |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 192 | { |
| 193 | .name = "vbb", |
| 194 | .vin_name = "vcc7", |
| 195 | .n_voltages = ARRAY_SIZE(VBB_VSEL_table), |
| 196 | .voltage_table = VBB_VSEL_table, |
| 197 | }, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 198 | }; |
| 199 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 200 | static struct tps_info tps65911_regs[] = { |
| 201 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 202 | .name = "vrtc", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 203 | .vin_name = "vcc7", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 204 | .enable_time_us = 2200, |
Laxman Dewangan | c2f8efd | 2012-01-18 20:46:56 +0530 | [diff] [blame] | 205 | }, |
| 206 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 207 | .name = "vio", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 208 | .vin_name = "vccio", |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 209 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 210 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 211 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 212 | }, |
| 213 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 214 | .name = "vdd1", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 215 | .vin_name = "vcc1", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 216 | .n_voltages = 0x4C, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 217 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 218 | }, |
| 219 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 220 | .name = "vdd2", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 221 | .vin_name = "vcc2", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 222 | .n_voltages = 0x4C, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 223 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 224 | }, |
| 225 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 226 | .name = "vddctrl", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 227 | .n_voltages = 0x44, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 228 | .enable_time_us = 900, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 229 | }, |
| 230 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 231 | .name = "ldo1", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 232 | .vin_name = "vcc6", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 233 | .n_voltages = 0x33, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 234 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 235 | }, |
| 236 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 237 | .name = "ldo2", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 238 | .vin_name = "vcc6", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 239 | .n_voltages = 0x33, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 240 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 241 | }, |
| 242 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 243 | .name = "ldo3", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 244 | .vin_name = "vcc5", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 245 | .n_voltages = 0x1A, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 246 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 247 | }, |
| 248 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 249 | .name = "ldo4", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 250 | .vin_name = "vcc5", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 251 | .n_voltages = 0x33, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 252 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 253 | }, |
| 254 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 255 | .name = "ldo5", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 256 | .vin_name = "vcc4", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 257 | .n_voltages = 0x1A, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 258 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 259 | }, |
| 260 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 261 | .name = "ldo6", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 262 | .vin_name = "vcc3", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 263 | .n_voltages = 0x1A, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 264 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 265 | }, |
| 266 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 267 | .name = "ldo7", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 268 | .vin_name = "vcc3", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 269 | .n_voltages = 0x1A, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 270 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 271 | }, |
| 272 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 273 | .name = "ldo8", |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 274 | .vin_name = "vcc3", |
Laxman Dewangan | 7be5318 | 2012-07-09 20:27:13 +0530 | [diff] [blame] | 275 | .n_voltages = 0x1A, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 276 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 277 | }, |
| 278 | }; |
| 279 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 280 | #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) |
| 281 | static unsigned int tps65910_ext_sleep_control[] = { |
| 282 | 0, |
| 283 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 284 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 285 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 286 | EXT_CONTROL_REG_BITS(VDD3, 1, 3), |
| 287 | EXT_CONTROL_REG_BITS(VDIG1, 0, 1), |
| 288 | EXT_CONTROL_REG_BITS(VDIG2, 0, 2), |
| 289 | EXT_CONTROL_REG_BITS(VPLL, 0, 6), |
| 290 | EXT_CONTROL_REG_BITS(VDAC, 0, 7), |
| 291 | EXT_CONTROL_REG_BITS(VAUX1, 0, 3), |
| 292 | EXT_CONTROL_REG_BITS(VAUX2, 0, 4), |
| 293 | EXT_CONTROL_REG_BITS(VAUX33, 0, 5), |
| 294 | EXT_CONTROL_REG_BITS(VMMC, 0, 0), |
| 295 | }; |
| 296 | |
| 297 | static unsigned int tps65911_ext_sleep_control[] = { |
| 298 | 0, |
| 299 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 300 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 301 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 302 | EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), |
| 303 | EXT_CONTROL_REG_BITS(LDO1, 0, 1), |
| 304 | EXT_CONTROL_REG_BITS(LDO2, 0, 2), |
| 305 | EXT_CONTROL_REG_BITS(LDO3, 0, 7), |
| 306 | EXT_CONTROL_REG_BITS(LDO4, 0, 6), |
| 307 | EXT_CONTROL_REG_BITS(LDO5, 0, 3), |
| 308 | EXT_CONTROL_REG_BITS(LDO6, 0, 0), |
| 309 | EXT_CONTROL_REG_BITS(LDO7, 0, 5), |
| 310 | EXT_CONTROL_REG_BITS(LDO8, 0, 4), |
| 311 | }; |
| 312 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 313 | struct tps65910_reg { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 314 | struct regulator_desc *desc; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 315 | struct tps65910 *mfd; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 316 | struct regulator_dev **rdev; |
| 317 | struct tps_info **info; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 318 | int num_regulators; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 319 | int mode; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 320 | int (*get_ctrl_reg)(int); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 321 | unsigned int *ext_sleep_control; |
| 322 | unsigned int board_ext_control[TPS65910_NUM_REGS]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 323 | }; |
| 324 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 325 | static int tps65910_get_ctrl_register(int id) |
| 326 | { |
| 327 | switch (id) { |
| 328 | case TPS65910_REG_VRTC: |
| 329 | return TPS65910_VRTC; |
| 330 | case TPS65910_REG_VIO: |
| 331 | return TPS65910_VIO; |
| 332 | case TPS65910_REG_VDD1: |
| 333 | return TPS65910_VDD1; |
| 334 | case TPS65910_REG_VDD2: |
| 335 | return TPS65910_VDD2; |
| 336 | case TPS65910_REG_VDD3: |
| 337 | return TPS65910_VDD3; |
| 338 | case TPS65910_REG_VDIG1: |
| 339 | return TPS65910_VDIG1; |
| 340 | case TPS65910_REG_VDIG2: |
| 341 | return TPS65910_VDIG2; |
| 342 | case TPS65910_REG_VPLL: |
| 343 | return TPS65910_VPLL; |
| 344 | case TPS65910_REG_VDAC: |
| 345 | return TPS65910_VDAC; |
| 346 | case TPS65910_REG_VAUX1: |
| 347 | return TPS65910_VAUX1; |
| 348 | case TPS65910_REG_VAUX2: |
| 349 | return TPS65910_VAUX2; |
| 350 | case TPS65910_REG_VAUX33: |
| 351 | return TPS65910_VAUX33; |
| 352 | case TPS65910_REG_VMMC: |
| 353 | return TPS65910_VMMC; |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 354 | case TPS65910_REG_VBB: |
| 355 | return TPS65910_BBCH; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 356 | default: |
| 357 | return -EINVAL; |
| 358 | } |
| 359 | } |
| 360 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 361 | static int tps65911_get_ctrl_register(int id) |
| 362 | { |
| 363 | switch (id) { |
| 364 | case TPS65910_REG_VRTC: |
| 365 | return TPS65910_VRTC; |
| 366 | case TPS65910_REG_VIO: |
| 367 | return TPS65910_VIO; |
| 368 | case TPS65910_REG_VDD1: |
| 369 | return TPS65910_VDD1; |
| 370 | case TPS65910_REG_VDD2: |
| 371 | return TPS65910_VDD2; |
| 372 | case TPS65911_REG_VDDCTRL: |
| 373 | return TPS65911_VDDCTRL; |
| 374 | case TPS65911_REG_LDO1: |
| 375 | return TPS65911_LDO1; |
| 376 | case TPS65911_REG_LDO2: |
| 377 | return TPS65911_LDO2; |
| 378 | case TPS65911_REG_LDO3: |
| 379 | return TPS65911_LDO3; |
| 380 | case TPS65911_REG_LDO4: |
| 381 | return TPS65911_LDO4; |
| 382 | case TPS65911_REG_LDO5: |
| 383 | return TPS65911_LDO5; |
| 384 | case TPS65911_REG_LDO6: |
| 385 | return TPS65911_LDO6; |
| 386 | case TPS65911_REG_LDO7: |
| 387 | return TPS65911_LDO7; |
| 388 | case TPS65911_REG_LDO8: |
| 389 | return TPS65911_LDO8; |
| 390 | default: |
| 391 | return -EINVAL; |
| 392 | } |
| 393 | } |
| 394 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 395 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) |
| 396 | { |
| 397 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 398 | struct tps65910 *mfd = pmic->mfd; |
| 399 | int reg, value, id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 400 | |
| 401 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 402 | if (reg < 0) |
| 403 | return reg; |
| 404 | |
| 405 | switch (mode) { |
| 406 | case REGULATOR_MODE_NORMAL: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 407 | return tps65910_reg_update_bits(pmic->mfd, reg, |
| 408 | LDO_ST_MODE_BIT | LDO_ST_ON_BIT, |
| 409 | LDO_ST_ON_BIT); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 410 | case REGULATOR_MODE_IDLE: |
| 411 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 412 | return tps65910_reg_set_bits(mfd, reg, value); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 413 | case REGULATOR_MODE_STANDBY: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 414 | return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | return -EINVAL; |
| 418 | } |
| 419 | |
| 420 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) |
| 421 | { |
| 422 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 423 | int ret, reg, value, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 424 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 425 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 426 | if (reg < 0) |
| 427 | return reg; |
| 428 | |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 429 | ret = tps65910_reg_read(pmic->mfd, reg, &value); |
| 430 | if (ret < 0) |
| 431 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 432 | |
Axel Lin | 5859939 | 2012-03-13 07:15:27 +0800 | [diff] [blame] | 433 | if (!(value & LDO_ST_ON_BIT)) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 434 | return REGULATOR_MODE_STANDBY; |
| 435 | else if (value & LDO_ST_MODE_BIT) |
| 436 | return REGULATOR_MODE_IDLE; |
| 437 | else |
| 438 | return REGULATOR_MODE_NORMAL; |
| 439 | } |
| 440 | |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 441 | static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 442 | { |
| 443 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 444 | int ret, id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 445 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 446 | |
| 447 | switch (id) { |
| 448 | case TPS65910_REG_VDD1: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 449 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel); |
| 450 | if (ret < 0) |
| 451 | return ret; |
| 452 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult); |
| 453 | if (ret < 0) |
| 454 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 455 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 456 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel); |
| 457 | if (ret < 0) |
| 458 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 459 | sr = opvsel & VDD1_OP_CMD_MASK; |
| 460 | opvsel &= VDD1_OP_SEL_MASK; |
| 461 | srvsel &= VDD1_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 462 | vselmax = 75; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 463 | break; |
| 464 | case TPS65910_REG_VDD2: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 465 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel); |
| 466 | if (ret < 0) |
| 467 | return ret; |
| 468 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult); |
| 469 | if (ret < 0) |
| 470 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 471 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 472 | ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel); |
| 473 | if (ret < 0) |
| 474 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 475 | sr = opvsel & VDD2_OP_CMD_MASK; |
| 476 | opvsel &= VDD2_OP_SEL_MASK; |
| 477 | srvsel &= VDD2_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 478 | vselmax = 75; |
| 479 | break; |
| 480 | case TPS65911_REG_VDDCTRL: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 481 | ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP, |
| 482 | &opvsel); |
| 483 | if (ret < 0) |
| 484 | return ret; |
| 485 | ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR, |
| 486 | &srvsel); |
| 487 | if (ret < 0) |
| 488 | return ret; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 489 | sr = opvsel & VDDCTRL_OP_CMD_MASK; |
| 490 | opvsel &= VDDCTRL_OP_SEL_MASK; |
| 491 | srvsel &= VDDCTRL_SR_SEL_MASK; |
| 492 | vselmax = 64; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 493 | break; |
| 494 | } |
| 495 | |
| 496 | /* multiplier 0 == 1 but 2,3 normal */ |
| 497 | if (!mult) |
Jingoo Han | 4b57927 | 2013-10-14 17:53:40 +0900 | [diff] [blame] | 498 | mult = 1; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 499 | |
| 500 | if (sr) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 501 | /* normalise to valid range */ |
| 502 | if (srvsel < 3) |
| 503 | srvsel = 3; |
| 504 | if (srvsel > vselmax) |
| 505 | srvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 506 | return srvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 507 | } else { |
| 508 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 509 | /* normalise to valid range*/ |
| 510 | if (opvsel < 3) |
| 511 | opvsel = 3; |
| 512 | if (opvsel > vselmax) |
| 513 | opvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 514 | return opvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 515 | } |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 516 | return -EINVAL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 517 | } |
| 518 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 519 | static int tps65910_get_voltage_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 520 | { |
| 521 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 522 | int ret, reg, value, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 523 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 524 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 525 | if (reg < 0) |
| 526 | return reg; |
| 527 | |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 528 | ret = tps65910_reg_read(pmic->mfd, reg, &value); |
| 529 | if (ret < 0) |
| 530 | return ret; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 531 | |
| 532 | switch (id) { |
| 533 | case TPS65910_REG_VIO: |
| 534 | case TPS65910_REG_VDIG1: |
| 535 | case TPS65910_REG_VDIG2: |
| 536 | case TPS65910_REG_VPLL: |
| 537 | case TPS65910_REG_VDAC: |
| 538 | case TPS65910_REG_VAUX1: |
| 539 | case TPS65910_REG_VAUX2: |
| 540 | case TPS65910_REG_VAUX33: |
| 541 | case TPS65910_REG_VMMC: |
| 542 | value &= LDO_SEL_MASK; |
| 543 | value >>= LDO_SEL_SHIFT; |
| 544 | break; |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 545 | case TPS65910_REG_VBB: |
| 546 | value &= BBCH_BBSEL_MASK; |
| 547 | value >>= BBCH_BBSEL_SHIFT; |
| 548 | break; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 549 | default: |
| 550 | return -EINVAL; |
| 551 | } |
| 552 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 553 | return value; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 554 | } |
| 555 | |
| 556 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) |
| 557 | { |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 558 | return dev->desc->volt_table[0]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 559 | } |
| 560 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 561 | static int tps65911_get_voltage_sel(struct regulator_dev *dev) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 562 | { |
| 563 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 564 | int ret, id = rdev_get_id(dev); |
| 565 | unsigned int value, reg; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 566 | |
| 567 | reg = pmic->get_ctrl_reg(id); |
| 568 | |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 569 | ret = tps65910_reg_read(pmic->mfd, reg, &value); |
| 570 | if (ret < 0) |
| 571 | return ret; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 572 | |
| 573 | switch (id) { |
| 574 | case TPS65911_REG_LDO1: |
| 575 | case TPS65911_REG_LDO2: |
| 576 | case TPS65911_REG_LDO4: |
| 577 | value &= LDO1_SEL_MASK; |
| 578 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 579 | break; |
| 580 | case TPS65911_REG_LDO3: |
| 581 | case TPS65911_REG_LDO5: |
| 582 | case TPS65911_REG_LDO6: |
| 583 | case TPS65911_REG_LDO7: |
| 584 | case TPS65911_REG_LDO8: |
| 585 | value &= LDO3_SEL_MASK; |
| 586 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 587 | break; |
| 588 | case TPS65910_REG_VIO: |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 589 | value &= LDO_SEL_MASK; |
| 590 | value >>= LDO_SEL_SHIFT; |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 591 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 592 | default: |
| 593 | return -EINVAL; |
| 594 | } |
| 595 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 596 | return value; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 597 | } |
| 598 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 599 | static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, |
| 600 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 601 | { |
| 602 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 603 | int id = rdev_get_id(dev), vsel; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 604 | int dcdc_mult = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 605 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 606 | switch (id) { |
| 607 | case TPS65910_REG_VDD1: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 608 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 609 | if (dcdc_mult == 1) |
| 610 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 611 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 612 | |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 613 | tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1, |
| 614 | VDD1_VGAIN_SEL_MASK, |
| 615 | dcdc_mult << VDD1_VGAIN_SEL_SHIFT); |
| 616 | tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 617 | break; |
| 618 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 619 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 620 | if (dcdc_mult == 1) |
| 621 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 622 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 623 | |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 624 | tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2, |
| 625 | VDD1_VGAIN_SEL_MASK, |
| 626 | dcdc_mult << VDD2_VGAIN_SEL_SHIFT); |
| 627 | tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 628 | break; |
| 629 | case TPS65911_REG_VDDCTRL: |
Laxman Dewangan | c4632ae | 2012-03-07 16:39:05 +0530 | [diff] [blame] | 630 | vsel = selector + 3; |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 631 | tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 632 | } |
| 633 | |
| 634 | return 0; |
| 635 | } |
| 636 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 637 | static int tps65910_set_voltage_sel(struct regulator_dev *dev, |
| 638 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 639 | { |
| 640 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 641 | int reg, id = rdev_get_id(dev); |
| 642 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 643 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 644 | if (reg < 0) |
| 645 | return reg; |
| 646 | |
| 647 | switch (id) { |
| 648 | case TPS65910_REG_VIO: |
| 649 | case TPS65910_REG_VDIG1: |
| 650 | case TPS65910_REG_VDIG2: |
| 651 | case TPS65910_REG_VPLL: |
| 652 | case TPS65910_REG_VDAC: |
| 653 | case TPS65910_REG_VAUX1: |
| 654 | case TPS65910_REG_VAUX2: |
| 655 | case TPS65910_REG_VAUX33: |
| 656 | case TPS65910_REG_VMMC: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 657 | return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK, |
| 658 | selector << LDO_SEL_SHIFT); |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 659 | case TPS65910_REG_VBB: |
| 660 | return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK, |
| 661 | selector << BBCH_BBSEL_SHIFT); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 662 | } |
| 663 | |
| 664 | return -EINVAL; |
| 665 | } |
| 666 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 667 | static int tps65911_set_voltage_sel(struct regulator_dev *dev, |
| 668 | unsigned selector) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 669 | { |
| 670 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 671 | int reg, id = rdev_get_id(dev); |
| 672 | |
| 673 | reg = pmic->get_ctrl_reg(id); |
| 674 | if (reg < 0) |
| 675 | return reg; |
| 676 | |
| 677 | switch (id) { |
| 678 | case TPS65911_REG_LDO1: |
| 679 | case TPS65911_REG_LDO2: |
| 680 | case TPS65911_REG_LDO4: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 681 | return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK, |
| 682 | selector << LDO_SEL_SHIFT); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 683 | case TPS65911_REG_LDO3: |
| 684 | case TPS65911_REG_LDO5: |
| 685 | case TPS65911_REG_LDO6: |
| 686 | case TPS65911_REG_LDO7: |
| 687 | case TPS65911_REG_LDO8: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 688 | return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK, |
| 689 | selector << LDO_SEL_SHIFT); |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 690 | case TPS65910_REG_VIO: |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 691 | return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK, |
| 692 | selector << LDO_SEL_SHIFT); |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 693 | case TPS65910_REG_VBB: |
| 694 | return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK, |
| 695 | selector << BBCH_BBSEL_SHIFT); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 696 | } |
| 697 | |
| 698 | return -EINVAL; |
| 699 | } |
| 700 | |
| 701 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 702 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
| 703 | unsigned selector) |
| 704 | { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 705 | int volt, mult = 1, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 706 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 707 | switch (id) { |
| 708 | case TPS65910_REG_VDD1: |
| 709 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 710 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 711 | volt = VDD1_2_MIN_VOLT + |
Jingoo Han | 4b57927 | 2013-10-14 17:53:40 +0900 | [diff] [blame] | 712 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 713 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 714 | case TPS65911_REG_VDDCTRL: |
| 715 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 716 | break; |
| 717 | default: |
| 718 | BUG(); |
| 719 | return -EINVAL; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 720 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 721 | |
| 722 | return volt * 100 * mult; |
| 723 | } |
| 724 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 725 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
| 726 | { |
| 727 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 728 | int step_mv = 0, id = rdev_get_id(dev); |
| 729 | |
Jingoo Han | 4b57927 | 2013-10-14 17:53:40 +0900 | [diff] [blame] | 730 | switch (id) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 731 | case TPS65911_REG_LDO1: |
| 732 | case TPS65911_REG_LDO2: |
| 733 | case TPS65911_REG_LDO4: |
| 734 | /* The first 5 values of the selector correspond to 1V */ |
| 735 | if (selector < 5) |
| 736 | selector = 0; |
| 737 | else |
| 738 | selector -= 4; |
| 739 | |
| 740 | step_mv = 50; |
| 741 | break; |
| 742 | case TPS65911_REG_LDO3: |
| 743 | case TPS65911_REG_LDO5: |
| 744 | case TPS65911_REG_LDO6: |
| 745 | case TPS65911_REG_LDO7: |
| 746 | case TPS65911_REG_LDO8: |
| 747 | /* The first 3 values of the selector correspond to 1V */ |
| 748 | if (selector < 3) |
| 749 | selector = 0; |
| 750 | else |
| 751 | selector -= 2; |
| 752 | |
| 753 | step_mv = 100; |
| 754 | break; |
| 755 | case TPS65910_REG_VIO: |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 756 | return pmic->info[id]->voltage_table[selector]; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 757 | default: |
| 758 | return -EINVAL; |
| 759 | } |
| 760 | |
| 761 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; |
| 762 | } |
| 763 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 764 | /* Regulator ops (except VRTC) */ |
| 765 | static struct regulator_ops tps65910_ops_dcdc = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 766 | .is_enabled = regulator_is_enabled_regmap, |
| 767 | .enable = regulator_enable_regmap, |
| 768 | .disable = regulator_disable_regmap, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 769 | .set_mode = tps65910_set_mode, |
| 770 | .get_mode = tps65910_get_mode, |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 771 | .get_voltage_sel = tps65910_get_voltage_dcdc_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 772 | .set_voltage_sel = tps65910_set_voltage_dcdc_sel, |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 773 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 774 | .list_voltage = tps65910_list_voltage_dcdc, |
Axel Lin | 9fa8175 | 2013-04-20 10:30:17 +0800 | [diff] [blame] | 775 | .map_voltage = regulator_map_voltage_ascend, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 776 | }; |
| 777 | |
| 778 | static struct regulator_ops tps65910_ops_vdd3 = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 779 | .is_enabled = regulator_is_enabled_regmap, |
| 780 | .enable = regulator_enable_regmap, |
| 781 | .disable = regulator_disable_regmap, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 782 | .set_mode = tps65910_set_mode, |
| 783 | .get_mode = tps65910_get_mode, |
| 784 | .get_voltage = tps65910_get_voltage_vdd3, |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 785 | .list_voltage = regulator_list_voltage_table, |
Axel Lin | 9fa8175 | 2013-04-20 10:30:17 +0800 | [diff] [blame] | 786 | .map_voltage = regulator_map_voltage_ascend, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 787 | }; |
| 788 | |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 789 | static struct regulator_ops tps65910_ops_vbb = { |
| 790 | .is_enabled = regulator_is_enabled_regmap, |
| 791 | .enable = regulator_enable_regmap, |
| 792 | .disable = regulator_disable_regmap, |
| 793 | .set_mode = tps65910_set_mode, |
| 794 | .get_mode = tps65910_get_mode, |
| 795 | .get_voltage_sel = tps65910_get_voltage_sel, |
| 796 | .set_voltage_sel = tps65910_set_voltage_sel, |
| 797 | .list_voltage = regulator_list_voltage_table, |
| 798 | .map_voltage = regulator_map_voltage_iterate, |
| 799 | }; |
| 800 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 801 | static struct regulator_ops tps65910_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 802 | .is_enabled = regulator_is_enabled_regmap, |
| 803 | .enable = regulator_enable_regmap, |
| 804 | .disable = regulator_disable_regmap, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 805 | .set_mode = tps65910_set_mode, |
| 806 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 807 | .get_voltage_sel = tps65910_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 808 | .set_voltage_sel = tps65910_set_voltage_sel, |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 809 | .list_voltage = regulator_list_voltage_table, |
Axel Lin | 9fa8175 | 2013-04-20 10:30:17 +0800 | [diff] [blame] | 810 | .map_voltage = regulator_map_voltage_ascend, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 811 | }; |
| 812 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 813 | static struct regulator_ops tps65911_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 814 | .is_enabled = regulator_is_enabled_regmap, |
| 815 | .enable = regulator_enable_regmap, |
| 816 | .disable = regulator_disable_regmap, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 817 | .set_mode = tps65910_set_mode, |
| 818 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 819 | .get_voltage_sel = tps65911_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 820 | .set_voltage_sel = tps65911_set_voltage_sel, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 821 | .list_voltage = tps65911_list_voltage, |
Axel Lin | 9fa8175 | 2013-04-20 10:30:17 +0800 | [diff] [blame] | 822 | .map_voltage = regulator_map_voltage_ascend, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 823 | }; |
| 824 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 825 | static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, |
| 826 | int id, int ext_sleep_config) |
| 827 | { |
| 828 | struct tps65910 *mfd = pmic->mfd; |
| 829 | u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; |
| 830 | u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); |
| 831 | int ret; |
| 832 | |
| 833 | /* |
| 834 | * Regulator can not be control from multiple external input EN1, EN2 |
| 835 | * and EN3 together. |
| 836 | */ |
| 837 | if (ext_sleep_config & EXT_SLEEP_CONTROL) { |
| 838 | int en_count; |
| 839 | en_count = ((ext_sleep_config & |
| 840 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); |
| 841 | en_count += ((ext_sleep_config & |
| 842 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); |
| 843 | en_count += ((ext_sleep_config & |
| 844 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 845 | en_count += ((ext_sleep_config & |
| 846 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 847 | if (en_count > 1) { |
| 848 | dev_err(mfd->dev, |
| 849 | "External sleep control flag is not proper\n"); |
| 850 | return -EINVAL; |
| 851 | } |
| 852 | } |
| 853 | |
| 854 | pmic->board_ext_control[id] = ext_sleep_config; |
| 855 | |
| 856 | /* External EN1 control */ |
| 857 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 858 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 859 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 860 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 861 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 862 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 863 | if (ret < 0) { |
| 864 | dev_err(mfd->dev, |
| 865 | "Error in configuring external control EN1\n"); |
| 866 | return ret; |
| 867 | } |
| 868 | |
| 869 | /* External EN2 control */ |
| 870 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 871 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 872 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 873 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 874 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 875 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 876 | if (ret < 0) { |
| 877 | dev_err(mfd->dev, |
| 878 | "Error in configuring external control EN2\n"); |
| 879 | return ret; |
| 880 | } |
| 881 | |
| 882 | /* External EN3 control for TPS65910 LDO only */ |
| 883 | if ((tps65910_chip_id(mfd) == TPS65910) && |
| 884 | (id >= TPS65910_REG_VDIG1)) { |
| 885 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 886 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 887 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 888 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 889 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 890 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 891 | if (ret < 0) { |
| 892 | dev_err(mfd->dev, |
| 893 | "Error in configuring external control EN3\n"); |
| 894 | return ret; |
| 895 | } |
| 896 | } |
| 897 | |
| 898 | /* Return if no external control is selected */ |
| 899 | if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { |
| 900 | /* Clear all sleep controls */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 901 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 902 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
| 903 | if (!ret) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 904 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 905 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 906 | if (ret < 0) |
| 907 | dev_err(mfd->dev, |
| 908 | "Error in configuring SLEEP register\n"); |
| 909 | return ret; |
| 910 | } |
| 911 | |
| 912 | /* |
| 913 | * For regulator that has separate operational and sleep register make |
| 914 | * sure that operational is used and clear sleep register to turn |
| 915 | * regulator off when external control is inactive |
| 916 | */ |
| 917 | if ((id == TPS65910_REG_VDD1) || |
| 918 | (id == TPS65910_REG_VDD2) || |
| 919 | ((id == TPS65911_REG_VDDCTRL) && |
| 920 | (tps65910_chip_id(mfd) == TPS65911))) { |
| 921 | int op_reg_add = pmic->get_ctrl_reg(id) + 1; |
| 922 | int sr_reg_add = pmic->get_ctrl_reg(id) + 2; |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 923 | int opvsel, srvsel; |
| 924 | |
| 925 | ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel); |
| 926 | if (ret < 0) |
| 927 | return ret; |
| 928 | ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel); |
| 929 | if (ret < 0) |
| 930 | return ret; |
| 931 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 932 | if (opvsel & VDD1_OP_CMD_MASK) { |
| 933 | u8 reg_val = srvsel & VDD1_OP_SEL_MASK; |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 934 | |
| 935 | ret = tps65910_reg_write(pmic->mfd, op_reg_add, |
| 936 | reg_val); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 937 | if (ret < 0) { |
| 938 | dev_err(mfd->dev, |
| 939 | "Error in configuring op register\n"); |
| 940 | return ret; |
| 941 | } |
| 942 | } |
Axel Lin | faa95fd | 2012-07-11 19:44:13 +0800 | [diff] [blame] | 943 | ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 944 | if (ret < 0) { |
Masanari Iida | 6d3be30 | 2013-09-30 23:19:09 +0900 | [diff] [blame] | 945 | dev_err(mfd->dev, "Error in setting sr register\n"); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 946 | return ret; |
| 947 | } |
| 948 | } |
| 949 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 950 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 951 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 952 | if (!ret) { |
| 953 | if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 954 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 955 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 956 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 957 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 958 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 959 | } |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 960 | if (ret < 0) |
| 961 | dev_err(mfd->dev, |
| 962 | "Error in configuring SLEEP register\n"); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 963 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 964 | return ret; |
| 965 | } |
| 966 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 967 | #ifdef CONFIG_OF |
| 968 | |
| 969 | static struct of_regulator_match tps65910_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 970 | { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] }, |
| 971 | { .name = "vio", .driver_data = (void *) &tps65910_regs[1] }, |
| 972 | { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] }, |
| 973 | { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] }, |
| 974 | { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] }, |
| 975 | { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] }, |
| 976 | { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] }, |
| 977 | { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] }, |
| 978 | { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] }, |
| 979 | { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] }, |
| 980 | { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] }, |
| 981 | { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] }, |
| 982 | { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] }, |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 983 | { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 984 | }; |
| 985 | |
| 986 | static struct of_regulator_match tps65911_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 987 | { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] }, |
| 988 | { .name = "vio", .driver_data = (void *) &tps65911_regs[1] }, |
| 989 | { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] }, |
| 990 | { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] }, |
| 991 | { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] }, |
| 992 | { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] }, |
| 993 | { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] }, |
| 994 | { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] }, |
| 995 | { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] }, |
| 996 | { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] }, |
| 997 | { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] }, |
| 998 | { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] }, |
| 999 | { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1000 | }; |
| 1001 | |
| 1002 | static struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1003 | struct platform_device *pdev, |
| 1004 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1005 | { |
| 1006 | struct tps65910_board *pmic_plat_data; |
| 1007 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
Axel Lin | c92f5dd | 2013-01-27 21:16:56 +0800 | [diff] [blame] | 1008 | struct device_node *np, *regulators; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1009 | struct of_regulator_match *matches; |
| 1010 | unsigned int prop; |
| 1011 | int idx = 0, ret, count; |
| 1012 | |
| 1013 | pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data), |
| 1014 | GFP_KERNEL); |
Sachin Kamat | bcb2c0d | 2014-02-20 14:23:18 +0530 | [diff] [blame] | 1015 | if (!pmic_plat_data) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1016 | return NULL; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1017 | |
Guodong Xu | b8b27a4 | 2014-09-10 11:50:39 +0800 | [diff] [blame] | 1018 | np = pdev->dev.parent->of_node; |
Laxman Dewangan | 4ae1ff7 | 2013-10-08 19:31:04 +0530 | [diff] [blame] | 1019 | regulators = of_get_child_by_name(np, "regulators"); |
Laxman Dewangan | 92ab953 | 2012-05-20 21:48:49 +0530 | [diff] [blame] | 1020 | if (!regulators) { |
| 1021 | dev_err(&pdev->dev, "regulator node not found\n"); |
| 1022 | return NULL; |
| 1023 | } |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1024 | |
| 1025 | switch (tps65910_chip_id(tps65910)) { |
| 1026 | case TPS65910: |
| 1027 | count = ARRAY_SIZE(tps65910_matches); |
| 1028 | matches = tps65910_matches; |
| 1029 | break; |
| 1030 | case TPS65911: |
| 1031 | count = ARRAY_SIZE(tps65911_matches); |
| 1032 | matches = tps65911_matches; |
| 1033 | break; |
| 1034 | default: |
Axel Lin | c92f5dd | 2013-01-27 21:16:56 +0800 | [diff] [blame] | 1035 | of_node_put(regulators); |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1036 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1037 | return NULL; |
| 1038 | } |
| 1039 | |
Axel Lin | 08337fd | 2013-01-24 10:31:45 +0800 | [diff] [blame] | 1040 | ret = of_regulator_match(&pdev->dev, regulators, matches, count); |
Axel Lin | c92f5dd | 2013-01-27 21:16:56 +0800 | [diff] [blame] | 1041 | of_node_put(regulators); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1042 | if (ret < 0) { |
| 1043 | dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", |
| 1044 | ret); |
| 1045 | return NULL; |
| 1046 | } |
| 1047 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1048 | *tps65910_reg_matches = matches; |
| 1049 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1050 | for (idx = 0; idx < count; idx++) { |
Axel Lin | 23b1134 | 2014-02-18 21:11:48 +0800 | [diff] [blame] | 1051 | if (!matches[idx].of_node) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1052 | continue; |
| 1053 | |
| 1054 | pmic_plat_data->tps65910_pmic_init_data[idx] = |
| 1055 | matches[idx].init_data; |
| 1056 | |
| 1057 | ret = of_property_read_u32(matches[idx].of_node, |
| 1058 | "ti,regulator-ext-sleep-control", &prop); |
| 1059 | if (!ret) |
| 1060 | pmic_plat_data->regulator_ext_sleep_control[idx] = prop; |
Laxman Dewangan | 19228a6 | 2012-07-06 14:13:12 +0530 | [diff] [blame] | 1061 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1062 | } |
| 1063 | |
| 1064 | return pmic_plat_data; |
| 1065 | } |
| 1066 | #else |
| 1067 | static inline struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1068 | struct platform_device *pdev, |
| 1069 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1070 | { |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1071 | *tps65910_reg_matches = NULL; |
Mark Brown | 74ea0e5 | 2012-06-15 19:04:33 +0100 | [diff] [blame] | 1072 | return NULL; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1073 | } |
| 1074 | #endif |
| 1075 | |
Bill Pemberton | a502357 | 2012-11-19 13:22:22 -0500 | [diff] [blame] | 1076 | static int tps65910_probe(struct platform_device *pdev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1077 | { |
| 1078 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1079 | struct regulator_config config = { }; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1080 | struct tps_info *info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1081 | struct regulator_dev *rdev; |
| 1082 | struct tps65910_reg *pmic; |
| 1083 | struct tps65910_board *pmic_plat_data; |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1084 | struct of_regulator_match *tps65910_reg_matches = NULL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1085 | int i, err; |
| 1086 | |
| 1087 | pmic_plat_data = dev_get_platdata(tps65910->dev); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1088 | if (!pmic_plat_data && tps65910->dev->of_node) |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1089 | pmic_plat_data = tps65910_parse_dt_reg_data(pdev, |
| 1090 | &tps65910_reg_matches); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1091 | |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1092 | if (!pmic_plat_data) { |
| 1093 | dev_err(&pdev->dev, "Platform data not found\n"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1094 | return -EINVAL; |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1095 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1096 | |
Axel Lin | 9eb0c42 | 2012-04-11 14:40:18 +0800 | [diff] [blame] | 1097 | pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); |
Sachin Kamat | bcb2c0d | 2014-02-20 14:23:18 +0530 | [diff] [blame] | 1098 | if (!pmic) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1099 | return -ENOMEM; |
| 1100 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1101 | pmic->mfd = tps65910; |
| 1102 | platform_set_drvdata(pdev, pmic); |
| 1103 | |
| 1104 | /* Give control of all register to control port */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 1105 | tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1106 | DEVCTRL_SR_CTL_I2C_SEL_MASK); |
| 1107 | |
Jingoo Han | 4b57927 | 2013-10-14 17:53:40 +0900 | [diff] [blame] | 1108 | switch (tps65910_chip_id(tps65910)) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1109 | case TPS65910: |
| 1110 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1111 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1112 | pmic->ext_sleep_control = tps65910_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1113 | info = tps65910_regs; |
Jan Remmet | 8f9165c | 2016-09-23 10:52:00 +0200 | [diff] [blame] | 1114 | /* Work around silicon erratum SWCZ010: output programmed |
| 1115 | * voltage level can go higher than expected or crash |
| 1116 | * Workaround: use no synchronization of DCDC clocks |
| 1117 | */ |
| 1118 | tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL, |
| 1119 | DCDCCTRL_DCDCCKSYNC_MASK); |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1120 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1121 | case TPS65911: |
| 1122 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1123 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1124 | pmic->ext_sleep_control = tps65911_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1125 | info = tps65911_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1126 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1127 | default: |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1128 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1129 | return -ENODEV; |
| 1130 | } |
| 1131 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1132 | pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1133 | sizeof(struct regulator_desc), GFP_KERNEL); |
Sachin Kamat | bcb2c0d | 2014-02-20 14:23:18 +0530 | [diff] [blame] | 1134 | if (!pmic->desc) |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1135 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1136 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1137 | pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1138 | sizeof(struct tps_info *), GFP_KERNEL); |
Sachin Kamat | bcb2c0d | 2014-02-20 14:23:18 +0530 | [diff] [blame] | 1139 | if (!pmic->info) |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1140 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1141 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1142 | pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1143 | sizeof(struct regulator_dev *), GFP_KERNEL); |
Sachin Kamat | bcb2c0d | 2014-02-20 14:23:18 +0530 | [diff] [blame] | 1144 | if (!pmic->rdev) |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1145 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1146 | |
Kyle Manna | c1fc148 | 2011-11-03 12:08:06 -0500 | [diff] [blame] | 1147 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
| 1148 | i++, info++) { |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1149 | /* Register the regulators */ |
| 1150 | pmic->info[i] = info; |
| 1151 | |
| 1152 | pmic->desc[i].name = info->name; |
Laxman Dewangan | d2cfdb0 | 2012-07-17 11:34:06 +0530 | [diff] [blame] | 1153 | pmic->desc[i].supply_name = info->vin_name; |
Axel Lin | 77fa44d | 2011-05-12 13:47:50 +0800 | [diff] [blame] | 1154 | pmic->desc[i].id = i; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 1155 | pmic->desc[i].n_voltages = info->n_voltages; |
Axel Lin | 94f48ab | 2012-07-04 09:59:17 +0800 | [diff] [blame] | 1156 | pmic->desc[i].enable_time = info->enable_time_us; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1157 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1158 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1159 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 1160 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
| 1161 | VDD1_2_NUM_VOLT_COARSE; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1162 | pmic->desc[i].ramp_delay = 12500; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1163 | } else if (i == TPS65910_REG_VDD3) { |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1164 | if (tps65910_chip_id(tps65910) == TPS65910) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1165 | pmic->desc[i].ops = &tps65910_ops_vdd3; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 1166 | pmic->desc[i].volt_table = info->voltage_table; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1167 | } else { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1168 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame] | 1169 | pmic->desc[i].ramp_delay = 5000; |
| 1170 | } |
Markus Pargmann | 03746dc | 2013-12-20 12:43:27 +0100 | [diff] [blame] | 1171 | } else if (i == TPS65910_REG_VBB && |
| 1172 | tps65910_chip_id(tps65910) == TPS65910) { |
| 1173 | pmic->desc[i].ops = &tps65910_ops_vbb; |
| 1174 | pmic->desc[i].volt_table = info->voltage_table; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1175 | } else { |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 1176 | if (tps65910_chip_id(tps65910) == TPS65910) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1177 | pmic->desc[i].ops = &tps65910_ops; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 1178 | pmic->desc[i].volt_table = info->voltage_table; |
| 1179 | } else { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1180 | pmic->desc[i].ops = &tps65911_ops; |
Axel Lin | d9fe28f | 2012-06-21 18:48:00 +0800 | [diff] [blame] | 1181 | } |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1182 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1183 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1184 | err = tps65910_set_ext_sleep_config(pmic, i, |
| 1185 | pmic_plat_data->regulator_ext_sleep_control[i]); |
| 1186 | /* |
| 1187 | * Failing on regulator for configuring externally control |
| 1188 | * is not a serious issue, just throw warning. |
| 1189 | */ |
| 1190 | if (err < 0) |
| 1191 | dev_warn(tps65910->dev, |
| 1192 | "Failed to initialise ext control config\n"); |
| 1193 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1194 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
| 1195 | pmic->desc[i].owner = THIS_MODULE; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1196 | pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i); |
Axel Lin | b8903eb | 2013-12-29 17:00:20 +0800 | [diff] [blame] | 1197 | pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1198 | |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1199 | config.dev = tps65910->dev; |
Axel Lin | 23b1134 | 2014-02-18 21:11:48 +0800 | [diff] [blame] | 1200 | config.init_data = pmic_plat_data->tps65910_pmic_init_data[i]; |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1201 | config.driver_data = pmic; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1202 | config.regmap = tps65910->regmap; |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1203 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1204 | if (tps65910_reg_matches) |
| 1205 | config.of_node = tps65910_reg_matches[i].of_node; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1206 | |
Sachin Kamat | 95095e4 | 2013-09-04 17:17:51 +0530 | [diff] [blame] | 1207 | rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i], |
| 1208 | &config); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1209 | if (IS_ERR(rdev)) { |
| 1210 | dev_err(tps65910->dev, |
| 1211 | "failed to register %s regulator\n", |
| 1212 | pdev->name); |
Sachin Kamat | 95095e4 | 2013-09-04 17:17:51 +0530 | [diff] [blame] | 1213 | return PTR_ERR(rdev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1214 | } |
| 1215 | |
| 1216 | /* Save regulator for cleanup */ |
| 1217 | pmic->rdev[i] = rdev; |
| 1218 | } |
| 1219 | return 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1220 | } |
| 1221 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1222 | static void tps65910_shutdown(struct platform_device *pdev) |
| 1223 | { |
| 1224 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
| 1225 | int i; |
| 1226 | |
| 1227 | /* |
| 1228 | * Before bootloader jumps to kernel, it makes sure that required |
| 1229 | * external control signals are in desired state so that given rails |
| 1230 | * can be configure accordingly. |
| 1231 | * If rails are configured to be controlled from external control |
| 1232 | * then before shutting down/rebooting the system, the external |
| 1233 | * control configuration need to be remove from the rails so that |
| 1234 | * its output will be available as per register programming even |
| 1235 | * if external controls are removed. This is require when the POR |
| 1236 | * value of the control signals are not in active state and before |
| 1237 | * bootloader initializes it, the system requires the rail output |
| 1238 | * to be active for booting. |
| 1239 | */ |
| 1240 | for (i = 0; i < pmic->num_regulators; i++) { |
| 1241 | int err; |
| 1242 | if (!pmic->rdev[i]) |
| 1243 | continue; |
| 1244 | |
| 1245 | err = tps65910_set_ext_sleep_config(pmic, i, 0); |
| 1246 | if (err < 0) |
| 1247 | dev_err(&pdev->dev, |
| 1248 | "Error in clearing external control\n"); |
| 1249 | } |
| 1250 | } |
| 1251 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1252 | static struct platform_driver tps65910_driver = { |
| 1253 | .driver = { |
| 1254 | .name = "tps65910-pmic", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1255 | }, |
| 1256 | .probe = tps65910_probe, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1257 | .shutdown = tps65910_shutdown, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1258 | }; |
| 1259 | |
| 1260 | static int __init tps65910_init(void) |
| 1261 | { |
| 1262 | return platform_driver_register(&tps65910_driver); |
| 1263 | } |
| 1264 | subsys_initcall(tps65910_init); |
| 1265 | |
| 1266 | static void __exit tps65910_cleanup(void) |
| 1267 | { |
| 1268 | platform_driver_unregister(&tps65910_driver); |
| 1269 | } |
| 1270 | module_exit(tps65910_cleanup); |
| 1271 | |
| 1272 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); |
Axel Lin | ae0e654 | 2012-02-21 10:14:55 +0800 | [diff] [blame] | 1273 | MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1274 | MODULE_LICENSE("GPL v2"); |
| 1275 | MODULE_ALIAS("platform:tps65910-pmic"); |