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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
Tejun Heo8c3d3d42013-05-14 11:09:50 -07004 * Maintained by: Tejun Heo <tj@kernel.org>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05005 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
Paul Gortmakerbff78322011-07-03 13:41:29 -040038#include <linux/module.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090040#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050041
42#include "libata.h"
43
Tejun Heoc4291372010-05-10 21:41:38 +020044static struct workqueue_struct *ata_sff_wq;
45
Tejun Heo624d5c52008-03-25 22:16:41 +090046const struct ata_port_operations ata_sff_port_ops = {
47 .inherits = &ata_base_port_ops,
48
Tejun Heof47451c2010-05-10 21:41:40 +020049 .qc_prep = ata_noop_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +090050 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090051 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090052
Tejun Heo9363c382008-04-07 22:47:16 +090053 .freeze = ata_sff_freeze,
54 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090055 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090056 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090057 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090058 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090059 .error_handler = ata_sff_error_handler,
Tejun Heo624d5c52008-03-25 22:16:41 +090060
Tejun Heo5682ed32008-04-07 22:47:16 +090061 .sff_dev_select = ata_sff_dev_select,
62 .sff_check_status = ata_sff_check_status,
63 .sff_tf_load = ata_sff_tf_load,
64 .sff_tf_read = ata_sff_tf_read,
65 .sff_exec_command = ata_sff_exec_command,
66 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo8244cd02010-05-10 21:41:36 +020067 .sff_drain_fifo = ata_sff_drain_fifo,
Tejun Heo624d5c52008-03-25 22:16:41 +090068
Alan Coxc96f1732009-03-24 10:23:46 +000069 .lost_interrupt = ata_sff_lost_interrupt,
Tejun Heo624d5c52008-03-25 22:16:41 +090070};
Alan Cox0fe40ff2009-01-05 14:16:13 +000071EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090072
Tejun Heo624d5c52008-03-25 22:16:41 +090073/**
Tejun Heo9363c382008-04-07 22:47:16 +090074 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +090075 * @ap: port where the device is
76 *
77 * Reads ATA taskfile status register for currently-selected device
78 * and return its value. This also clears pending interrupts
79 * from this device
80 *
81 * LOCKING:
82 * Inherited from caller.
83 */
Tejun Heo9363c382008-04-07 22:47:16 +090084u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +090085{
86 return ioread8(ap->ioaddr.status_addr);
87}
Alan Cox0fe40ff2009-01-05 14:16:13 +000088EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +090089
90/**
Tejun Heo9363c382008-04-07 22:47:16 +090091 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +090092 * @ap: port where the device is
93 *
94 * Reads ATA taskfile alternate status register for
95 * currently-selected device and return its value.
96 *
97 * Note: may NOT be used as the check_altstatus() entry in
98 * ata_port_operations.
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100103static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900104{
Tejun Heo5682ed32008-04-07 22:47:16 +0900105 if (ap->ops->sff_check_altstatus)
106 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900107
108 return ioread8(ap->ioaddr.altstatus_addr);
109}
110
111/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100112 * ata_sff_irq_status - Check if the device is busy
113 * @ap: port where the device is
114 *
115 * Determine if the port is currently busy. Uses altstatus
116 * if available in order to avoid clearing shared IRQ status
117 * when finding an IRQ source. Non ctl capable devices don't
118 * share interrupt lines fortunately for us.
119 *
120 * LOCKING:
121 * Inherited from caller.
122 */
123static u8 ata_sff_irq_status(struct ata_port *ap)
124{
125 u8 status;
126
127 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
128 status = ata_sff_altstatus(ap);
129 /* Not us: We are busy */
130 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000131 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100132 }
133 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100134 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100135 return status;
136}
137
138/**
139 * ata_sff_sync - Flush writes
140 * @ap: Port to wait for.
141 *
142 * CAUTION:
143 * If we have an mmio device with no ctl and no altstatus
144 * method this will fail. No such devices are known to exist.
145 *
146 * LOCKING:
147 * Inherited from caller.
148 */
149
150static void ata_sff_sync(struct ata_port *ap)
151{
152 if (ap->ops->sff_check_altstatus)
153 ap->ops->sff_check_altstatus(ap);
154 else if (ap->ioaddr.altstatus_addr)
155 ioread8(ap->ioaddr.altstatus_addr);
156}
157
158/**
159 * ata_sff_pause - Flush writes and wait 400nS
160 * @ap: Port to pause for.
161 *
162 * CAUTION:
163 * If we have an mmio device with no ctl and no altstatus
164 * method this will fail. No such devices are known to exist.
165 *
166 * LOCKING:
167 * Inherited from caller.
168 */
169
170void ata_sff_pause(struct ata_port *ap)
171{
172 ata_sff_sync(ap);
173 ndelay(400);
174}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000175EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100176
177/**
178 * ata_sff_dma_pause - Pause before commencing DMA
179 * @ap: Port to pause for.
180 *
181 * Perform I/O fencing and ensure sufficient cycle delays occur
182 * for the HDMA1:0 transition
183 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000184
Alan Coxa57c1ba2008-05-29 22:10:58 +0100185void ata_sff_dma_pause(struct ata_port *ap)
186{
187 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
188 /* An altstatus read will cause the needed delay without
189 messing up the IRQ status */
190 ata_sff_altstatus(ap);
191 return;
192 }
193 /* There are no DMA controllers without ctl. BUG here to ensure
194 we never violate the HDMA1:0 transition timing and risk
195 corruption. */
196 BUG();
197}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000198EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100199
200/**
Tejun Heo9363c382008-04-07 22:47:16 +0900201 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900202 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900203 * @tmout_pat: impatience timeout in msecs
204 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900205 *
206 * Sleep until ATA Status register bit BSY clears,
207 * or a timeout occurs.
208 *
209 * LOCKING:
210 * Kernel thread context (may sleep).
211 *
212 * RETURNS:
213 * 0 on success, -errno otherwise.
214 */
Tejun Heo9363c382008-04-07 22:47:16 +0900215int ata_sff_busy_sleep(struct ata_port *ap,
216 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900217{
218 unsigned long timer_start, timeout;
219 u8 status;
220
Tejun Heo9363c382008-04-07 22:47:16 +0900221 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900222 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900223 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900224 while (status != 0xff && (status & ATA_BUSY) &&
225 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200226 ata_msleep(ap, 50);
Tejun Heo9363c382008-04-07 22:47:16 +0900227 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900228 }
229
230 if (status != 0xff && (status & ATA_BUSY))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700231 ata_port_warn(ap,
232 "port is slow to respond, please be patient (Status 0x%x)\n",
233 status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900234
Tejun Heo341c2c92008-05-20 02:17:51 +0900235 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236 while (status != 0xff && (status & ATA_BUSY) &&
237 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200238 ata_msleep(ap, 50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900239 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900240 }
241
242 if (status == 0xff)
243 return -ENODEV;
244
245 if (status & ATA_BUSY) {
Joe Perchesa9a79df2011-04-15 15:51:59 -0700246 ata_port_err(ap,
247 "port failed to respond (%lu secs, Status 0x%x)\n",
248 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900249 return -EBUSY;
250 }
251
252 return 0;
253}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000254EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900255
Tejun Heoaa2731a2008-04-07 22:47:19 +0900256static int ata_sff_check_ready(struct ata_link *link)
257{
258 u8 status = link->ap->ops->sff_check_status(link->ap);
259
Tejun Heo78ab88f2008-05-01 23:41:41 +0900260 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900261}
262
Tejun Heo624d5c52008-03-25 22:16:41 +0900263/**
Tejun Heo9363c382008-04-07 22:47:16 +0900264 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900265 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900266 * @deadline: deadline jiffies for the operation
267 *
268 * Sleep until ATA Status register bit BSY clears, or timeout
269 * occurs.
270 *
271 * LOCKING:
272 * Kernel thread context (may sleep).
273 *
274 * RETURNS:
275 * 0 on success, -errno otherwise.
276 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900277int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900278{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900279 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900280}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000281EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900282
283/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400284 * ata_sff_set_devctl - Write device control reg
285 * @ap: port where the device is
286 * @ctl: value to write
287 *
288 * Writes ATA taskfile device control register.
289 *
290 * Note: may NOT be used as the sff_set_devctl() entry in
291 * ata_port_operations.
292 *
293 * LOCKING:
294 * Inherited from caller.
295 */
296static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
297{
298 if (ap->ops->sff_set_devctl)
299 ap->ops->sff_set_devctl(ap, ctl);
300 else
301 iowrite8(ctl, ap->ioaddr.ctl_addr);
302}
303
304/**
Tejun Heo9363c382008-04-07 22:47:16 +0900305 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900306 * @ap: ATA channel to manipulate
307 * @device: ATA device (numbered from zero) to select
308 *
309 * Use the method defined in the ATA specification to
310 * make either device 0, or device 1, active on the
311 * ATA channel. Works with both PIO and MMIO.
312 *
313 * May be used as the dev_select() entry in ata_port_operations.
314 *
315 * LOCKING:
316 * caller.
317 */
Tejun Heo9363c382008-04-07 22:47:16 +0900318void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900319{
320 u8 tmp;
321
322 if (device == 0)
323 tmp = ATA_DEVICE_OBS;
324 else
325 tmp = ATA_DEVICE_OBS | ATA_DEV1;
326
327 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900328 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900329}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000330EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900331
332/**
333 * ata_dev_select - Select device 0/1 on ATA bus
334 * @ap: ATA channel to manipulate
335 * @device: ATA device (numbered from zero) to select
336 * @wait: non-zero to wait for Status register BSY bit to clear
337 * @can_sleep: non-zero if context allows sleeping
338 *
339 * Use the method defined in the ATA specification to
340 * make either device 0, or device 1, active on the
341 * ATA channel.
342 *
Tejun Heo9363c382008-04-07 22:47:16 +0900343 * This is a high-level version of ata_sff_dev_select(), which
344 * additionally provides the services of inserting the proper
345 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900346 *
347 * LOCKING:
348 * caller.
349 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200350static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900351 unsigned int wait, unsigned int can_sleep)
352{
353 if (ata_msg_probe(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700354 ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
355 device, wait);
Tejun Heo624d5c52008-03-25 22:16:41 +0900356
357 if (wait)
358 ata_wait_idle(ap);
359
Tejun Heo5682ed32008-04-07 22:47:16 +0900360 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900361
362 if (wait) {
363 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
Tejun Heo97750ce2010-09-06 17:56:29 +0200364 ata_msleep(ap, 150);
Tejun Heo624d5c52008-03-25 22:16:41 +0900365 ata_wait_idle(ap);
366 }
367}
368
369/**
Tejun Heo9363c382008-04-07 22:47:16 +0900370 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900371 * @ap: Port on which interrupts are enabled.
372 *
373 * Enable interrupts on a legacy IDE device using MMIO or PIO,
374 * wait for idle, clear any pending interrupts.
375 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400376 * Note: may NOT be used as the sff_irq_on() entry in
377 * ata_port_operations.
378 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900379 * LOCKING:
380 * Inherited from caller.
381 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400382void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900383{
384 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400385
386 if (ap->ops->sff_irq_on) {
387 ap->ops->sff_irq_on(ap);
388 return;
389 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900390
391 ap->ctl &= ~ATA_NIEN;
392 ap->last_ctl = ap->ctl;
393
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400394 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
395 ata_sff_set_devctl(ap, ap->ctl);
396 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900397
Tejun Heo37f65b82010-05-19 22:10:20 +0200398 if (ap->ops->sff_irq_clear)
399 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900400}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000401EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900402
403/**
Tejun Heo9363c382008-04-07 22:47:16 +0900404 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500405 * @ap: Port to which output is sent
406 * @tf: ATA taskfile register set
407 *
408 * Outputs ATA taskfile to standard ATA host controller.
409 *
410 * LOCKING:
411 * Inherited from caller.
412 */
Tejun Heo9363c382008-04-07 22:47:16 +0900413void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500414{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900415 struct ata_ioports *ioaddr = &ap->ioaddr;
416 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
417
418 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900419 if (ioaddr->ctl_addr)
420 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900421 ap->last_ctl = tf->ctl;
Tejun Heo40c60232010-09-09 17:13:31 +0200422 ata_wait_idle(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900423 }
424
425 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900426 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900427 iowrite8(tf->hob_feature, ioaddr->feature_addr);
428 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
429 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
430 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
431 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
432 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
433 tf->hob_feature,
434 tf->hob_nsect,
435 tf->hob_lbal,
436 tf->hob_lbam,
437 tf->hob_lbah);
438 }
439
440 if (is_addr) {
441 iowrite8(tf->feature, ioaddr->feature_addr);
442 iowrite8(tf->nsect, ioaddr->nsect_addr);
443 iowrite8(tf->lbal, ioaddr->lbal_addr);
444 iowrite8(tf->lbam, ioaddr->lbam_addr);
445 iowrite8(tf->lbah, ioaddr->lbah_addr);
446 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
447 tf->feature,
448 tf->nsect,
449 tf->lbal,
450 tf->lbam,
451 tf->lbah);
452 }
453
454 if (tf->flags & ATA_TFLAG_DEVICE) {
455 iowrite8(tf->device, ioaddr->device_addr);
456 VPRINTK("device 0x%X\n", tf->device);
457 }
Tejun Heo40c60232010-09-09 17:13:31 +0200458
459 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500460}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000461EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500462
463/**
Tejun Heo9363c382008-04-07 22:47:16 +0900464 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500465 * @ap: Port from which input is read
466 * @tf: ATA taskfile register set for storing input
467 *
468 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000469 * into @tf. Assumes the device has a fully SFF compliant task file
470 * layout and behaviour. If you device does not (eg has a different
471 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500472 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500473 * LOCKING:
474 * Inherited from caller.
475 */
Tejun Heo9363c382008-04-07 22:47:16 +0900476void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500477{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900478 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500479
Tejun Heo9363c382008-04-07 22:47:16 +0900480 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900481 tf->feature = ioread8(ioaddr->error_addr);
482 tf->nsect = ioread8(ioaddr->nsect_addr);
483 tf->lbal = ioread8(ioaddr->lbal_addr);
484 tf->lbam = ioread8(ioaddr->lbam_addr);
485 tf->lbah = ioread8(ioaddr->lbah_addr);
486 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500487
Tejun Heo0d5ff562007-02-01 15:06:36 +0900488 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900489 if (likely(ioaddr->ctl_addr)) {
490 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
491 tf->hob_feature = ioread8(ioaddr->error_addr);
492 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
493 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
494 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
495 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
496 iowrite8(tf->ctl, ioaddr->ctl_addr);
497 ap->last_ctl = tf->ctl;
498 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900499 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900500 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500501}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000502EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500503
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500504/**
Tejun Heo9363c382008-04-07 22:47:16 +0900505 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900506 * @ap: port to which command is being issued
507 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500508 *
Tejun Heo272f7882008-03-25 22:16:40 +0900509 * Issues ATA command, with proper synchronization with interrupt
510 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500511 *
512 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400513 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500514 */
Tejun Heo9363c382008-04-07 22:47:16 +0900515void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500516{
Tejun Heo272f7882008-03-25 22:16:40 +0900517 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500518
Tejun Heo272f7882008-03-25 22:16:40 +0900519 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900520 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500521}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000522EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500523
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900524/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900525 * ata_tf_to_host - issue ATA taskfile to host controller
526 * @ap: port to which command is being issued
527 * @tf: ATA taskfile register set
528 *
529 * Issues ATA taskfile register set to ATA host controller,
530 * with proper synchronization with interrupt handler and
531 * other threads.
532 *
533 * LOCKING:
534 * spin_lock_irqsave(host lock)
535 */
536static inline void ata_tf_to_host(struct ata_port *ap,
537 const struct ata_taskfile *tf)
538{
Tejun Heo5682ed32008-04-07 22:47:16 +0900539 ap->ops->sff_tf_load(ap, tf);
540 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900541}
542
543/**
Tejun Heo9363c382008-04-07 22:47:16 +0900544 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900545 * @dev: device to target
546 * @buf: data buffer
547 * @buflen: buffer length
548 * @rw: read/write
549 *
550 * Transfer data from/to the device data register by PIO.
551 *
552 * LOCKING:
553 * Inherited from caller.
554 *
555 * RETURNS:
556 * Bytes consumed.
557 */
Tejun Heo9363c382008-04-07 22:47:16 +0900558unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
559 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900560{
561 struct ata_port *ap = dev->link->ap;
562 void __iomem *data_addr = ap->ioaddr.data_addr;
563 unsigned int words = buflen >> 1;
564
565 /* Transfer multiple of 2 bytes */
566 if (rw == READ)
567 ioread16_rep(data_addr, buf, words);
568 else
569 iowrite16_rep(data_addr, buf, words);
570
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400571 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900572 if (unlikely(buflen & 0x01)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900573 unsigned char pad[2] = { };
Tejun Heo624d5c52008-03-25 22:16:41 +0900574
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400575 /* Point buf to the tail of buffer */
576 buf += buflen - 1;
577
578 /*
579 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100580 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400581 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900582 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400583 ioread16_rep(data_addr, pad, 1);
584 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900585 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400586 pad[0] = *buf;
587 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900588 }
589 words++;
590 }
591
592 return words << 1;
593}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000594EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900595
596/**
Alan Cox871af122009-01-05 14:16:39 +0000597 * ata_sff_data_xfer32 - Transfer data by PIO
598 * @dev: device to target
599 * @buf: data buffer
600 * @buflen: buffer length
601 * @rw: read/write
602 *
603 * Transfer data from/to the device data register by PIO using 32bit
604 * I/O operations.
605 *
606 * LOCKING:
607 * Inherited from caller.
608 *
609 * RETURNS:
610 * Bytes consumed.
611 */
612
613unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
614 unsigned int buflen, int rw)
615{
616 struct ata_port *ap = dev->link->ap;
617 void __iomem *data_addr = ap->ioaddr.data_addr;
618 unsigned int words = buflen >> 2;
619 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100620
Alan Coxe3cf95d2009-04-09 17:31:17 +0100621 if (!(ap->pflags & ATA_PFLAG_PIO32))
622 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000623
624 /* Transfer multiple of 4 bytes */
625 if (rw == READ)
626 ioread32_rep(data_addr, buf, words);
627 else
628 iowrite32_rep(data_addr, buf, words);
629
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400630 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000631 if (unlikely(slop)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900632 unsigned char pad[4] = { };
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400633
634 /* Point buf to the tail of buffer */
635 buf += buflen - slop;
636
637 /*
638 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100639 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400640 */
Alan Cox871af122009-01-05 14:16:39 +0000641 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400642 if (slop < 3)
643 ioread16_rep(data_addr, pad, 1);
644 else
645 ioread32_rep(data_addr, pad, 1);
646 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000647 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400648 memcpy(pad, buf, slop);
649 if (slop < 3)
650 iowrite16_rep(data_addr, pad, 1);
651 else
652 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000653 }
Alan Cox871af122009-01-05 14:16:39 +0000654 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400655 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000656}
657EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
658
659/**
Tejun Heo9363c382008-04-07 22:47:16 +0900660 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900661 * @dev: device to target
662 * @buf: data buffer
663 * @buflen: buffer length
664 * @rw: read/write
665 *
666 * Transfer data from/to the device data register by PIO. Do the
667 * transfer with interrupts disabled.
668 *
669 * LOCKING:
670 * Inherited from caller.
671 *
672 * RETURNS:
673 * Bytes consumed.
674 */
Tejun Heo9363c382008-04-07 22:47:16 +0900675unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
676 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900677{
678 unsigned long flags;
679 unsigned int consumed;
680
681 local_irq_save(flags);
Bartlomiej Zolnierkiewicz418fae22011-10-13 15:04:43 +0200682 consumed = ata_sff_data_xfer32(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900683 local_irq_restore(flags);
684
685 return consumed;
686}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000687EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900688
689/**
690 * ata_pio_sector - Transfer a sector of data.
691 * @qc: Command on going
692 *
693 * Transfer qc->sect_size bytes of data from/to the ATA device.
694 *
695 * LOCKING:
696 * Inherited from caller.
697 */
698static void ata_pio_sector(struct ata_queued_cmd *qc)
699{
700 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
701 struct ata_port *ap = qc->ap;
702 struct page *page;
703 unsigned int offset;
704 unsigned char *buf;
705
706 if (qc->curbytes == qc->nbytes - qc->sect_size)
707 ap->hsm_task_state = HSM_ST_LAST;
708
709 page = sg_page(qc->cursg);
710 offset = qc->cursg->offset + qc->cursg_ofs;
711
712 /* get the current page and offset */
713 page = nth_page(page, (offset >> PAGE_SHIFT));
714 offset %= PAGE_SIZE;
715
716 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
717
718 if (PageHighMem(page)) {
719 unsigned long flags;
720
721 /* FIXME: use a bounce buffer */
722 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800723 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900724
725 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900726 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
727 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900728
Cong Wang496cda82011-11-25 23:14:18 +0800729 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900730 local_irq_restore(flags);
731 } else {
732 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900733 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
734 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900735 }
736
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100737 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500738 flush_dcache_page(page);
739
Tejun Heo624d5c52008-03-25 22:16:41 +0900740 qc->curbytes += qc->sect_size;
741 qc->cursg_ofs += qc->sect_size;
742
743 if (qc->cursg_ofs == qc->cursg->length) {
744 qc->cursg = sg_next(qc->cursg);
745 qc->cursg_ofs = 0;
746 }
747}
748
749/**
750 * ata_pio_sectors - Transfer one or many sectors.
751 * @qc: Command on going
752 *
753 * Transfer one or many sectors of data from/to the
754 * ATA device for the DRQ request.
755 *
756 * LOCKING:
757 * Inherited from caller.
758 */
759static void ata_pio_sectors(struct ata_queued_cmd *qc)
760{
761 if (is_multi_taskfile(&qc->tf)) {
762 /* READ/WRITE MULTIPLE */
763 unsigned int nsect;
764
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900765 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900766
767 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
768 qc->dev->multi_count);
769 while (nsect--)
770 ata_pio_sector(qc);
771 } else
772 ata_pio_sector(qc);
773
Alan Coxa57c1ba2008-05-29 22:10:58 +0100774 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900775}
776
777/**
778 * atapi_send_cdb - Write CDB bytes to hardware
779 * @ap: Port to which ATAPI device is attached.
780 * @qc: Taskfile currently active
781 *
782 * When device has indicated its readiness to accept
783 * a CDB, this function is called. Send the CDB.
784 *
785 * LOCKING:
786 * caller.
787 */
788static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
789{
790 /* send SCSI cdb */
791 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900792 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900793
Tejun Heo5682ed32008-04-07 22:47:16 +0900794 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100795 ata_sff_sync(ap);
796 /* FIXME: If the CDB is for DMA do we need to do the transition delay
797 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900798 switch (qc->tf.protocol) {
799 case ATAPI_PROT_PIO:
800 ap->hsm_task_state = HSM_ST;
801 break;
802 case ATAPI_PROT_NODATA:
803 ap->hsm_task_state = HSM_ST_LAST;
804 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200805#ifdef CONFIG_ATA_BMDMA
Tejun Heo624d5c52008-03-25 22:16:41 +0900806 case ATAPI_PROT_DMA:
807 ap->hsm_task_state = HSM_ST_LAST;
808 /* initiate bmdma */
809 ap->ops->bmdma_start(qc);
810 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200811#endif /* CONFIG_ATA_BMDMA */
812 default:
813 BUG();
Tejun Heo624d5c52008-03-25 22:16:41 +0900814 }
815}
816
817/**
818 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
819 * @qc: Command on going
820 * @bytes: number of bytes
821 *
822 * Transfer Transfer data from/to the ATAPI device.
823 *
824 * LOCKING:
825 * Inherited from caller.
826 *
827 */
828static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
829{
830 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
831 struct ata_port *ap = qc->ap;
832 struct ata_device *dev = qc->dev;
833 struct ata_eh_info *ehi = &dev->link->eh_info;
834 struct scatterlist *sg;
835 struct page *page;
836 unsigned char *buf;
837 unsigned int offset, count, consumed;
838
839next_sg:
840 sg = qc->cursg;
841 if (unlikely(!sg)) {
842 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
843 "buf=%u cur=%u bytes=%u",
844 qc->nbytes, qc->curbytes, bytes);
845 return -1;
846 }
847
848 page = sg_page(sg);
849 offset = sg->offset + qc->cursg_ofs;
850
851 /* get the current page and offset */
852 page = nth_page(page, (offset >> PAGE_SHIFT));
853 offset %= PAGE_SIZE;
854
855 /* don't overrun current sg */
856 count = min(sg->length - qc->cursg_ofs, bytes);
857
858 /* don't cross page boundaries */
859 count = min(count, (unsigned int)PAGE_SIZE - offset);
860
861 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
862
863 if (PageHighMem(page)) {
864 unsigned long flags;
865
866 /* FIXME: use bounce buffer */
867 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800868 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900869
870 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000871 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
872 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900873
Cong Wang496cda82011-11-25 23:14:18 +0800874 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900875 local_irq_restore(flags);
876 } else {
877 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +0000878 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
879 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900880 }
881
882 bytes -= min(bytes, consumed);
883 qc->curbytes += count;
884 qc->cursg_ofs += count;
885
886 if (qc->cursg_ofs == sg->length) {
887 qc->cursg = sg_next(qc->cursg);
888 qc->cursg_ofs = 0;
889 }
890
Christian Borntraegera0f79f72009-01-13 10:38:36 +0100891 /*
892 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
893 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
894 * check correctly as it doesn't know if it is the last request being
895 * made. Somebody should implement a proper sanity check.
896 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900897 if (bytes)
898 goto next_sg;
899 return 0;
900}
901
902/**
903 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
904 * @qc: Command on going
905 *
906 * Transfer Transfer data from/to the ATAPI device.
907 *
908 * LOCKING:
909 * Inherited from caller.
910 */
911static void atapi_pio_bytes(struct ata_queued_cmd *qc)
912{
913 struct ata_port *ap = qc->ap;
914 struct ata_device *dev = qc->dev;
915 struct ata_eh_info *ehi = &dev->link->eh_info;
916 unsigned int ireason, bc_lo, bc_hi, bytes;
917 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
918
919 /* Abuse qc->result_tf for temp storage of intermediate TF
920 * here to save some kernel stack usage.
921 * For normal completion, qc->result_tf is not relevant. For
922 * error, qc->result_tf is later overwritten by ata_qc_complete().
923 * So, the correctness of qc->result_tf is not affected.
924 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900925 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900926 ireason = qc->result_tf.nsect;
927 bc_lo = qc->result_tf.lbam;
928 bc_hi = qc->result_tf.lbah;
929 bytes = (bc_hi << 8) | bc_lo;
930
931 /* shall be cleared to zero, indicating xfer of data */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300932 if (unlikely(ireason & ATAPI_COD))
Tejun Heo624d5c52008-03-25 22:16:41 +0900933 goto atapi_check;
934
935 /* make sure transfer direction matches expected */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300936 i_write = ((ireason & ATAPI_IO) == 0) ? 1 : 0;
Tejun Heo624d5c52008-03-25 22:16:41 +0900937 if (unlikely(do_write != i_write))
938 goto atapi_check;
939
940 if (unlikely(!bytes))
941 goto atapi_check;
942
943 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
944
945 if (unlikely(__atapi_pio_bytes(qc, bytes)))
946 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100947 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900948
949 return;
950
951 atapi_check:
952 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
953 ireason, bytes);
954 err_out:
955 qc->err_mask |= AC_ERR_HSM;
956 ap->hsm_task_state = HSM_ST_ERR;
957}
958
959/**
960 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
961 * @ap: the target ata_port
962 * @qc: qc on going
963 *
964 * RETURNS:
965 * 1 if ok in workqueue, 0 otherwise.
966 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000967static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
968 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900969{
970 if (qc->tf.flags & ATA_TFLAG_POLLING)
971 return 1;
972
973 if (ap->hsm_task_state == HSM_ST_FIRST) {
974 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000975 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +0900976 return 1;
977
978 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000979 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +0900980 return 1;
981 }
982
983 return 0;
984}
985
986/**
987 * ata_hsm_qc_complete - finish a qc running on standard HSM
988 * @qc: Command to complete
989 * @in_wq: 1 if called from workqueue, 0 otherwise
990 *
991 * Finish @qc which is running on standard HSM.
992 *
993 * LOCKING:
994 * If @in_wq is zero, spin_lock_irqsave(host lock).
995 * Otherwise, none on entry and grabs host lock.
996 */
997static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
998{
999 struct ata_port *ap = qc->ap;
1000 unsigned long flags;
1001
1002 if (ap->ops->error_handler) {
1003 if (in_wq) {
1004 spin_lock_irqsave(ap->lock, flags);
1005
1006 /* EH might have kicked in while host lock is
1007 * released.
1008 */
1009 qc = ata_qc_from_tag(ap, qc->tag);
1010 if (qc) {
1011 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001012 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001013 ata_qc_complete(qc);
1014 } else
1015 ata_port_freeze(ap);
1016 }
1017
1018 spin_unlock_irqrestore(ap->lock, flags);
1019 } else {
1020 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1021 ata_qc_complete(qc);
1022 else
1023 ata_port_freeze(ap);
1024 }
1025 } else {
1026 if (in_wq) {
1027 spin_lock_irqsave(ap->lock, flags);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001028 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001029 ata_qc_complete(qc);
1030 spin_unlock_irqrestore(ap->lock, flags);
1031 } else
1032 ata_qc_complete(qc);
1033 }
1034}
1035
1036/**
Tejun Heo9363c382008-04-07 22:47:16 +09001037 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001038 * @ap: the target ata_port
1039 * @qc: qc on going
1040 * @status: current device status
1041 * @in_wq: 1 if called from workqueue, 0 otherwise
1042 *
1043 * RETURNS:
1044 * 1 when poll next status needed, 0 otherwise.
1045 */
Tejun Heo9363c382008-04-07 22:47:16 +09001046int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1047 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001048{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001049 struct ata_link *link = qc->dev->link;
1050 struct ata_eh_info *ehi = &link->eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001051 unsigned long flags = 0;
1052 int poll_next;
1053
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001054 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001055
Tejun Heo9363c382008-04-07 22:47:16 +09001056 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001057 * like DMA polling into the workqueue. Notice that
1058 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1059 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001060 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001061
1062fsm_start:
1063 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1064 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1065
1066 switch (ap->hsm_task_state) {
1067 case HSM_ST_FIRST:
1068 /* Send first data block or PACKET CDB */
1069
1070 /* If polling, we will stay in the work queue after
1071 * sending the data. Otherwise, interrupt handler
1072 * takes over after sending the data.
1073 */
1074 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1075
1076 /* check device status */
1077 if (unlikely((status & ATA_DRQ) == 0)) {
1078 /* handle BSY=0, DRQ=0 as error */
1079 if (likely(status & (ATA_ERR | ATA_DF)))
1080 /* device stops HSM for abort/error */
1081 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001082 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001083 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001084 ata_ehi_push_desc(ehi,
1085 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001086 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001087 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001088
1089 ap->hsm_task_state = HSM_ST_ERR;
1090 goto fsm_start;
1091 }
1092
1093 /* Device should not ask for data transfer (DRQ=1)
1094 * when it finds something wrong.
1095 * We ignore DRQ here and stop the HSM by
1096 * changing hsm_task_state to HSM_ST_ERR and
1097 * let the EH abort the command or reset the device.
1098 */
1099 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1100 /* Some ATAPI tape drives forget to clear the ERR bit
1101 * when doing the next command (mostly request sense).
1102 * We ignore ERR here to workaround and proceed sending
1103 * the CDB.
1104 */
1105 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001106 ata_ehi_push_desc(ehi, "ST_FIRST: "
1107 "DRQ=1 with device error, "
1108 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001109 qc->err_mask |= AC_ERR_HSM;
1110 ap->hsm_task_state = HSM_ST_ERR;
1111 goto fsm_start;
1112 }
1113 }
1114
1115 /* Send the CDB (atapi) or the first data block (ata pio out).
1116 * During the state transition, interrupt handler shouldn't
1117 * be invoked before the data transfer is complete and
1118 * hsm_task_state is changed. Hence, the following locking.
1119 */
1120 if (in_wq)
1121 spin_lock_irqsave(ap->lock, flags);
1122
1123 if (qc->tf.protocol == ATA_PROT_PIO) {
1124 /* PIO data out protocol.
1125 * send first data block.
1126 */
1127
1128 /* ata_pio_sectors() might change the state
1129 * to HSM_ST_LAST. so, the state is changed here
1130 * before ata_pio_sectors().
1131 */
1132 ap->hsm_task_state = HSM_ST;
1133 ata_pio_sectors(qc);
1134 } else
1135 /* send CDB */
1136 atapi_send_cdb(ap, qc);
1137
1138 if (in_wq)
1139 spin_unlock_irqrestore(ap->lock, flags);
1140
Tejun Heoc4291372010-05-10 21:41:38 +02001141 /* if polling, ata_sff_pio_task() handles the rest.
Tejun Heo624d5c52008-03-25 22:16:41 +09001142 * otherwise, interrupt handler takes over from here.
1143 */
1144 break;
1145
1146 case HSM_ST:
1147 /* complete command or read/write the data register */
1148 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1149 /* ATAPI PIO protocol */
1150 if ((status & ATA_DRQ) == 0) {
1151 /* No more data to transfer or device error.
1152 * Device error will be tagged in HSM_ST_LAST.
1153 */
1154 ap->hsm_task_state = HSM_ST_LAST;
1155 goto fsm_start;
1156 }
1157
1158 /* Device should not ask for data transfer (DRQ=1)
1159 * when it finds something wrong.
1160 * We ignore DRQ here and stop the HSM by
1161 * changing hsm_task_state to HSM_ST_ERR and
1162 * let the EH abort the command or reset the device.
1163 */
1164 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001165 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1166 "DRQ=1 with device error, "
1167 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001168 qc->err_mask |= AC_ERR_HSM;
1169 ap->hsm_task_state = HSM_ST_ERR;
1170 goto fsm_start;
1171 }
1172
1173 atapi_pio_bytes(qc);
1174
1175 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1176 /* bad ireason reported by device */
1177 goto fsm_start;
1178
1179 } else {
1180 /* ATA PIO protocol */
1181 if (unlikely((status & ATA_DRQ) == 0)) {
1182 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001183 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001184 /* device stops HSM for abort/error */
1185 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001186
1187 /* If diagnostic failed and this is
1188 * IDENTIFY, it's likely a phantom
1189 * device. Mark hint.
1190 */
1191 if (qc->dev->horkage &
1192 ATA_HORKAGE_DIAGNOSTIC)
1193 qc->err_mask |=
1194 AC_ERR_NODEV_HINT;
1195 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001196 /* HSM violation. Let EH handle this.
1197 * Phantom devices also trigger this
1198 * condition. Mark hint.
1199 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001200 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001201 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001202 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001203 qc->err_mask |= AC_ERR_HSM |
1204 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001205 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001206
1207 ap->hsm_task_state = HSM_ST_ERR;
1208 goto fsm_start;
1209 }
1210
1211 /* For PIO reads, some devices may ask for
1212 * data transfer (DRQ=1) alone with ERR=1.
1213 * We respect DRQ here and transfer one
1214 * block of junk data before changing the
1215 * hsm_task_state to HSM_ST_ERR.
1216 *
1217 * For PIO writes, ERR=1 DRQ=1 doesn't make
1218 * sense since the data block has been
1219 * transferred to the device.
1220 */
1221 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1222 /* data might be corrputed */
1223 qc->err_mask |= AC_ERR_DEV;
1224
1225 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1226 ata_pio_sectors(qc);
1227 status = ata_wait_idle(ap);
1228 }
1229
Tejun Heoa836d3e2008-06-28 01:39:43 +09001230 if (status & (ATA_BUSY | ATA_DRQ)) {
1231 ata_ehi_push_desc(ehi, "ST-ATA: "
1232 "BUSY|DRQ persists on ERR|DF, "
1233 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001234 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001235 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001236
Tejun Heob9199302009-01-25 10:26:00 +09001237 /* There are oddball controllers with
1238 * status register stuck at 0x7f and
1239 * lbal/m/h at zero which makes it
1240 * pass all other presence detection
1241 * mechanisms we have. Set NODEV_HINT
1242 * for it. Kernel bz#7241.
1243 */
1244 if (status == 0x7f)
1245 qc->err_mask |= AC_ERR_NODEV_HINT;
1246
Tejun Heo624d5c52008-03-25 22:16:41 +09001247 /* ata_pio_sectors() might change the
1248 * state to HSM_ST_LAST. so, the state
1249 * is changed after ata_pio_sectors().
1250 */
1251 ap->hsm_task_state = HSM_ST_ERR;
1252 goto fsm_start;
1253 }
1254
1255 ata_pio_sectors(qc);
1256
1257 if (ap->hsm_task_state == HSM_ST_LAST &&
1258 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1259 /* all data read */
1260 status = ata_wait_idle(ap);
1261 goto fsm_start;
1262 }
1263 }
1264
1265 poll_next = 1;
1266 break;
1267
1268 case HSM_ST_LAST:
1269 if (unlikely(!ata_ok(status))) {
1270 qc->err_mask |= __ac_err_mask(status);
1271 ap->hsm_task_state = HSM_ST_ERR;
1272 goto fsm_start;
1273 }
1274
1275 /* no more data to transfer */
1276 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1277 ap->print_id, qc->dev->devno, status);
1278
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001279 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001280
1281 ap->hsm_task_state = HSM_ST_IDLE;
1282
1283 /* complete taskfile transaction */
1284 ata_hsm_qc_complete(qc, in_wq);
1285
1286 poll_next = 0;
1287 break;
1288
1289 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001290 ap->hsm_task_state = HSM_ST_IDLE;
1291
1292 /* complete taskfile transaction */
1293 ata_hsm_qc_complete(qc, in_wq);
1294
1295 poll_next = 0;
1296 break;
1297 default:
1298 poll_next = 0;
1299 BUG();
1300 }
1301
1302 return poll_next;
1303}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001304EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001305
Viresh Kumar64b97592011-02-22 14:32:38 +05301306void ata_sff_queue_work(struct work_struct *work)
1307{
1308 queue_work(ata_sff_wq, work);
1309}
1310EXPORT_SYMBOL_GPL(ata_sff_queue_work);
1311
1312void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay)
1313{
1314 queue_delayed_work(ata_sff_wq, dwork, delay);
1315}
1316EXPORT_SYMBOL_GPL(ata_sff_queue_delayed_work);
1317
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001318void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay)
Tejun Heoc4291372010-05-10 21:41:38 +02001319{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001320 struct ata_port *ap = link->ap;
1321
1322 WARN_ON((ap->sff_pio_task_link != NULL) &&
1323 (ap->sff_pio_task_link != link));
1324 ap->sff_pio_task_link = link;
1325
Tejun Heoc4291372010-05-10 21:41:38 +02001326 /* may fail if ata_sff_flush_pio_task() in progress */
Viresh Kumar64b97592011-02-22 14:32:38 +05301327 ata_sff_queue_delayed_work(&ap->sff_pio_task, msecs_to_jiffies(delay));
Tejun Heoc4291372010-05-10 21:41:38 +02001328}
1329EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1330
1331void ata_sff_flush_pio_task(struct ata_port *ap)
1332{
1333 DPRINTK("ENTER\n");
1334
Tejun Heoafe2c512010-12-14 16:21:17 +01001335 cancel_delayed_work_sync(&ap->sff_pio_task);
David Jefferyce751452015-01-19 13:03:25 -06001336
1337 /*
1338 * We wanna reset the HSM state to IDLE. If we do so without
1339 * grabbing the port lock, critical sections protected by it which
1340 * expect the HSM state to stay stable may get surprised. For
1341 * example, we may set IDLE in between the time
1342 * __ata_sff_port_intr() checks for HSM_ST_IDLE and before it calls
1343 * ata_sff_hsm_move() causing ata_sff_hsm_move() to BUG().
1344 */
1345 spin_lock_irq(ap->lock);
Tejun Heoc4291372010-05-10 21:41:38 +02001346 ap->hsm_task_state = HSM_ST_IDLE;
David Jefferyce751452015-01-19 13:03:25 -06001347 spin_unlock_irq(ap->lock);
1348
Gwendal Grignoud4d8eaf2011-07-22 13:48:32 -07001349 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001350
1351 if (ata_msg_ctl(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -07001352 ata_port_dbg(ap, "%s: EXIT\n", __func__);
Tejun Heoc4291372010-05-10 21:41:38 +02001353}
1354
1355static void ata_sff_pio_task(struct work_struct *work)
Tejun Heo624d5c52008-03-25 22:16:41 +09001356{
1357 struct ata_port *ap =
Tejun Heoc4291372010-05-10 21:41:38 +02001358 container_of(work, struct ata_port, sff_pio_task.work);
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001359 struct ata_link *link = ap->sff_pio_task_link;
Tejun Heoc4291372010-05-10 21:41:38 +02001360 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001361 u8 status;
1362 int poll_next;
1363
Jeff Garzik4fca3772011-02-15 01:13:24 -05001364 BUG_ON(ap->sff_pio_task_link == NULL);
Tejun Heoc4291372010-05-10 21:41:38 +02001365 /* qc can be NULL if timeout occurred */
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001366 qc = ata_qc_from_tag(ap, link->active_tag);
1367 if (!qc) {
1368 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001369 return;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001370 }
Tejun Heoc4291372010-05-10 21:41:38 +02001371
Tejun Heo624d5c52008-03-25 22:16:41 +09001372fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001373 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001374
1375 /*
1376 * This is purely heuristic. This is a fast path.
1377 * Sometimes when we enter, BSY will be cleared in
1378 * a chk-status or two. If not, the drive is probably seeking
1379 * or something. Snooze for a couple msecs, then
1380 * chk-status again. If still busy, queue delayed work.
1381 */
Tejun Heo9363c382008-04-07 22:47:16 +09001382 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001383 if (status & ATA_BUSY) {
Tejun Heo97750ce2010-09-06 17:56:29 +02001384 ata_msleep(ap, 2);
Tejun Heo9363c382008-04-07 22:47:16 +09001385 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001386 if (status & ATA_BUSY) {
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001387 ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001388 return;
1389 }
1390 }
1391
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001392 /*
1393 * hsm_move() may trigger another command to be processed.
1394 * clean the link beforehand.
1395 */
1396 ap->sff_pio_task_link = NULL;
Tejun Heo624d5c52008-03-25 22:16:41 +09001397 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001398 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001399
1400 /* another command or interrupt handler
1401 * may be running at this point.
1402 */
1403 if (poll_next)
1404 goto fsm_start;
1405}
1406
1407/**
Tejun Heo360ff782010-05-10 21:41:42 +02001408 * ata_sff_qc_issue - issue taskfile to a SFF controller
Tejun Heo624d5c52008-03-25 22:16:41 +09001409 * @qc: command to issue to device
1410 *
Tejun Heo360ff782010-05-10 21:41:42 +02001411 * This function issues a PIO or NODATA command to a SFF
1412 * controller.
Tejun Heo624d5c52008-03-25 22:16:41 +09001413 *
1414 * LOCKING:
1415 * spin_lock_irqsave(host lock)
1416 *
1417 * RETURNS:
1418 * Zero on success, AC_ERR_* mask on failure
1419 */
Tejun Heo9363c382008-04-07 22:47:16 +09001420unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001421{
1422 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001423 struct ata_link *link = qc->dev->link;
Tejun Heo624d5c52008-03-25 22:16:41 +09001424
1425 /* Use polling pio if the LLD doesn't handle
1426 * interrupt driven pio and atapi CDB interrupt.
1427 */
Tejun Heo360ff782010-05-10 21:41:42 +02001428 if (ap->flags & ATA_FLAG_PIO_POLLING)
1429 qc->tf.flags |= ATA_TFLAG_POLLING;
Tejun Heo624d5c52008-03-25 22:16:41 +09001430
1431 /* select the device */
1432 ata_dev_select(ap, qc->dev->devno, 1, 0);
1433
1434 /* start the command */
1435 switch (qc->tf.protocol) {
1436 case ATA_PROT_NODATA:
1437 if (qc->tf.flags & ATA_TFLAG_POLLING)
1438 ata_qc_set_polling(qc);
1439
1440 ata_tf_to_host(ap, &qc->tf);
1441 ap->hsm_task_state = HSM_ST_LAST;
1442
1443 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001444 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001445
1446 break;
1447
Tejun Heo624d5c52008-03-25 22:16:41 +09001448 case ATA_PROT_PIO:
1449 if (qc->tf.flags & ATA_TFLAG_POLLING)
1450 ata_qc_set_polling(qc);
1451
1452 ata_tf_to_host(ap, &qc->tf);
1453
1454 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1455 /* PIO data out protocol */
1456 ap->hsm_task_state = HSM_ST_FIRST;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001457 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001458
Tejun Heoc4291372010-05-10 21:41:38 +02001459 /* always send first data block using the
1460 * ata_sff_pio_task() codepath.
Tejun Heo624d5c52008-03-25 22:16:41 +09001461 */
1462 } else {
1463 /* PIO data in protocol */
1464 ap->hsm_task_state = HSM_ST;
1465
1466 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001467 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001468
Tejun Heoc4291372010-05-10 21:41:38 +02001469 /* if polling, ata_sff_pio_task() handles the
1470 * rest. otherwise, interrupt handler takes
1471 * over from here.
Tejun Heo624d5c52008-03-25 22:16:41 +09001472 */
1473 }
1474
1475 break;
1476
1477 case ATAPI_PROT_PIO:
1478 case ATAPI_PROT_NODATA:
1479 if (qc->tf.flags & ATA_TFLAG_POLLING)
1480 ata_qc_set_polling(qc);
1481
1482 ata_tf_to_host(ap, &qc->tf);
1483
1484 ap->hsm_task_state = HSM_ST_FIRST;
1485
1486 /* send cdb by polling if no cdb interrupt */
1487 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1488 (qc->tf.flags & ATA_TFLAG_POLLING))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001489 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001490 break;
1491
Tejun Heo624d5c52008-03-25 22:16:41 +09001492 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001493 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001494 return AC_ERR_SYSTEM;
1495 }
1496
1497 return 0;
1498}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001499EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001500
1501/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001502 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1503 * @qc: qc to fill result TF for
1504 *
1505 * @qc is finished and result TF needs to be filled. Fill it
1506 * using ->sff_tf_read.
1507 *
1508 * LOCKING:
1509 * spin_lock_irqsave(host lock)
1510 *
1511 * RETURNS:
1512 * true indicating that result TF is successfully filled.
1513 */
1514bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1515{
1516 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1517 return true;
1518}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001519EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001520
Tejun Heoc3b28892010-05-19 22:10:21 +02001521static unsigned int ata_sff_idle_irq(struct ata_port *ap)
Tejun Heo624d5c52008-03-25 22:16:41 +09001522{
Tejun Heoc3b28892010-05-19 22:10:21 +02001523 ap->stats.idle_irq++;
1524
1525#ifdef ATA_IRQ_TRAP
1526 if ((ap->stats.idle_irq % 1000) == 0) {
1527 ap->ops->sff_check_status(ap);
1528 if (ap->ops->sff_irq_clear)
1529 ap->ops->sff_irq_clear(ap);
Joe Perchesa9a79df2011-04-15 15:51:59 -07001530 ata_port_warn(ap, "irq trap\n");
Tejun Heoc3b28892010-05-19 22:10:21 +02001531 return 1;
1532 }
1533#endif
1534 return 0; /* irq not handled */
1535}
1536
1537static unsigned int __ata_sff_port_intr(struct ata_port *ap,
1538 struct ata_queued_cmd *qc,
1539 bool hsmv_on_idle)
1540{
1541 u8 status;
Tejun Heo624d5c52008-03-25 22:16:41 +09001542
1543 VPRINTK("ata%u: protocol %d task_state %d\n",
1544 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1545
1546 /* Check whether we are expecting interrupt in this state */
1547 switch (ap->hsm_task_state) {
1548 case HSM_ST_FIRST:
1549 /* Some pre-ATAPI-4 devices assert INTRQ
1550 * at this state when ready to receive CDB.
1551 */
1552
1553 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1554 * The flag was turned on only for atapi devices. No
1555 * need to check ata_is_atapi(qc->tf.protocol) again.
1556 */
1557 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heoc3b28892010-05-19 22:10:21 +02001558 return ata_sff_idle_irq(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001559 break;
Tejun Heo687a9932010-12-03 15:19:13 +01001560 case HSM_ST_IDLE:
Tejun Heoc3b28892010-05-19 22:10:21 +02001561 return ata_sff_idle_irq(ap);
Tejun Heo687a9932010-12-03 15:19:13 +01001562 default:
1563 break;
Tejun Heo624d5c52008-03-25 22:16:41 +09001564 }
1565
Alan Coxa57c1ba2008-05-29 22:10:58 +01001566 /* check main status, clearing INTRQ if needed */
1567 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001568 if (status & ATA_BUSY) {
Tejun Heoc3b28892010-05-19 22:10:21 +02001569 if (hsmv_on_idle) {
Tejun Heo332ac7f2010-03-23 12:24:08 +09001570 /* BMDMA engine is already stopped, we're screwed */
1571 qc->err_mask |= AC_ERR_HSM;
1572 ap->hsm_task_state = HSM_ST_ERR;
1573 } else
Tejun Heoc3b28892010-05-19 22:10:21 +02001574 return ata_sff_idle_irq(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001575 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001576
Tejun Heo9f2f7212010-05-10 21:41:32 +02001577 /* clear irq events */
Tejun Heo37f65b82010-05-19 22:10:20 +02001578 if (ap->ops->sff_irq_clear)
1579 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001580
Tejun Heo9363c382008-04-07 22:47:16 +09001581 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001582
Tejun Heo624d5c52008-03-25 22:16:41 +09001583 return 1; /* irq handled */
Tejun Heo624d5c52008-03-25 22:16:41 +09001584}
1585
1586/**
Tejun Heoc3b28892010-05-19 22:10:21 +02001587 * ata_sff_port_intr - Handle SFF port interrupt
1588 * @ap: Port on which interrupt arrived (possibly...)
1589 * @qc: Taskfile currently active in engine
Tejun Heo624d5c52008-03-25 22:16:41 +09001590 *
Tejun Heoc3b28892010-05-19 22:10:21 +02001591 * Handle port interrupt for given queued command.
Tejun Heo624d5c52008-03-25 22:16:41 +09001592 *
1593 * LOCKING:
Tejun Heoc3b28892010-05-19 22:10:21 +02001594 * spin_lock_irqsave(host lock)
Tejun Heo624d5c52008-03-25 22:16:41 +09001595 *
1596 * RETURNS:
Tejun Heoc3b28892010-05-19 22:10:21 +02001597 * One if interrupt was handled, zero if not (shared irq).
Tejun Heo624d5c52008-03-25 22:16:41 +09001598 */
Tejun Heoc3b28892010-05-19 22:10:21 +02001599unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1600{
1601 return __ata_sff_port_intr(ap, qc, false);
1602}
1603EXPORT_SYMBOL_GPL(ata_sff_port_intr);
1604
1605static inline irqreturn_t __ata_sff_interrupt(int irq, void *dev_instance,
1606 unsigned int (*port_intr)(struct ata_port *, struct ata_queued_cmd *))
Tejun Heo624d5c52008-03-25 22:16:41 +09001607{
1608 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001609 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001610 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001611 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001612 unsigned long flags;
1613
1614 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1615 spin_lock_irqsave(&host->lock, flags);
1616
Tejun Heo332ac7f2010-03-23 12:24:08 +09001617retry:
1618 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001619 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001620 struct ata_port *ap = host->ports[i];
1621 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001622
Tejun Heod88ec2e2010-01-19 10:46:32 +09001623 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001624 if (qc) {
1625 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
Tejun Heoc3b28892010-05-19 22:10:21 +02001626 handled |= port_intr(ap, qc);
Tejun Heo27943622010-01-19 10:49:19 +09001627 else
1628 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001629 } else
1630 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001631 }
1632
1633 /*
1634 * If no port was expecting IRQ but the controller is actually
1635 * asserting IRQ line, nobody cared will ensue. Check IRQ
1636 * pending status if available and clear spurious IRQ.
1637 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001638 if (!handled && !retried) {
1639 bool retry = false;
1640
Tejun Heo27943622010-01-19 10:49:19 +09001641 for (i = 0; i < host->n_ports; i++) {
1642 struct ata_port *ap = host->ports[i];
1643
1644 if (polling & (1 << i))
1645 continue;
1646
1647 if (!ap->ops->sff_irq_check ||
1648 !ap->ops->sff_irq_check(ap))
1649 continue;
1650
Tejun Heo332ac7f2010-03-23 12:24:08 +09001651 if (idle & (1 << i)) {
1652 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001653 if (ap->ops->sff_irq_clear)
1654 ap->ops->sff_irq_clear(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001655 } else {
1656 /* clear INTRQ and check if BUSY cleared */
1657 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1658 retry |= true;
1659 /*
1660 * With command in flight, we can't do
1661 * sff_irq_clear() w/o racing with completion.
1662 */
1663 }
1664 }
1665
1666 if (retry) {
1667 retried = true;
1668 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001669 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001670 }
1671
1672 spin_unlock_irqrestore(&host->lock, flags);
1673
1674 return IRQ_RETVAL(handled);
1675}
Tejun Heoc3b28892010-05-19 22:10:21 +02001676
1677/**
1678 * ata_sff_interrupt - Default SFF ATA host interrupt handler
1679 * @irq: irq line (unused)
1680 * @dev_instance: pointer to our ata_host information structure
1681 *
1682 * Default interrupt handler for PCI IDE devices. Calls
1683 * ata_sff_port_intr() for each port that is not disabled.
1684 *
1685 * LOCKING:
1686 * Obtains host lock during operation.
1687 *
1688 * RETURNS:
1689 * IRQ_NONE or IRQ_HANDLED.
1690 */
1691irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1692{
1693 return __ata_sff_interrupt(irq, dev_instance, ata_sff_port_intr);
1694}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001695EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001696
1697/**
Alan Coxc96f1732009-03-24 10:23:46 +00001698 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1699 * @ap: port that appears to have timed out
1700 *
1701 * Called from the libata error handlers when the core code suspects
1702 * an interrupt has been lost. If it has complete anything we can and
1703 * then return. Interface must support altstatus for this faster
1704 * recovery to occur.
1705 *
1706 * Locking:
1707 * Caller holds host lock
1708 */
1709
1710void ata_sff_lost_interrupt(struct ata_port *ap)
1711{
1712 u8 status;
1713 struct ata_queued_cmd *qc;
1714
1715 /* Only one outstanding command per SFF channel */
1716 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001717 /* We cannot lose an interrupt on a non-existent or polled command */
1718 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001719 return;
1720 /* See if the controller thinks it is still busy - if so the command
1721 isn't a lost IRQ but is still in progress */
1722 status = ata_sff_altstatus(ap);
1723 if (status & ATA_BUSY)
1724 return;
1725
1726 /* There was a command running, we are no longer busy and we have
1727 no interrupt. */
Joe Perchesa9a79df2011-04-15 15:51:59 -07001728 ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
Alan Coxc96f1732009-03-24 10:23:46 +00001729 status);
1730 /* Run the host interrupt logic as if the interrupt had not been
1731 lost */
Tejun Heoc3b28892010-05-19 22:10:21 +02001732 ata_sff_port_intr(ap, qc);
Alan Coxc96f1732009-03-24 10:23:46 +00001733}
1734EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1735
1736/**
Tejun Heo9363c382008-04-07 22:47:16 +09001737 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001738 * @ap: port to freeze
1739 *
Tejun Heo9f2f7212010-05-10 21:41:32 +02001740 * Freeze SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001741 *
1742 * LOCKING:
1743 * Inherited from caller.
1744 */
Tejun Heo9363c382008-04-07 22:47:16 +09001745void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001746{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001747 ap->ctl |= ATA_NIEN;
1748 ap->last_ctl = ap->ctl;
1749
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001750 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1751 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001752
1753 /* Under certain circumstances, some controllers raise IRQ on
1754 * ATA_NIEN manipulation. Also, many controllers fail to mask
1755 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1756 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001757 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001758
Tejun Heo37f65b82010-05-19 22:10:20 +02001759 if (ap->ops->sff_irq_clear)
1760 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001761}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001762EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001763
1764/**
Tejun Heo9363c382008-04-07 22:47:16 +09001765 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001766 * @ap: port to thaw
1767 *
Tejun Heo9363c382008-04-07 22:47:16 +09001768 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001769 *
1770 * LOCKING:
1771 * Inherited from caller.
1772 */
Tejun Heo9363c382008-04-07 22:47:16 +09001773void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001774{
1775 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001776 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001777 if (ap->ops->sff_irq_clear)
1778 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001779 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001780}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001781EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001782
1783/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001784 * ata_sff_prereset - prepare SFF link for reset
1785 * @link: SFF link to be reset
1786 * @deadline: deadline jiffies for the operation
1787 *
1788 * SFF link @link is about to be reset. Initialize it. It first
1789 * calls ata_std_prereset() and wait for !BSY if the port is
1790 * being softreset.
1791 *
1792 * LOCKING:
1793 * Kernel thread context (may sleep)
1794 *
1795 * RETURNS:
1796 * 0 on success, -errno otherwise.
1797 */
1798int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1799{
Tejun Heo0aa11132008-04-07 22:47:18 +09001800 struct ata_eh_context *ehc = &link->eh_context;
1801 int rc;
1802
1803 rc = ata_std_prereset(link, deadline);
1804 if (rc)
1805 return rc;
1806
1807 /* if we're about to do hardreset, nothing more to do */
1808 if (ehc->i.action & ATA_EH_HARDRESET)
1809 return 0;
1810
1811 /* wait for !BSY if we don't know that no device is attached */
1812 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001813 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001814 if (rc && rc != -ENODEV) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07001815 ata_link_warn(link,
1816 "device not ready (errno=%d), forcing hardreset\n",
1817 rc);
Tejun Heo0aa11132008-04-07 22:47:18 +09001818 ehc->i.action |= ATA_EH_HARDRESET;
1819 }
1820 }
1821
1822 return 0;
1823}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001824EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001825
1826/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001827 * ata_devchk - PATA device presence detection
1828 * @ap: ATA channel to examine
1829 * @device: Device to examine (starting at zero)
1830 *
1831 * This technique was originally described in
1832 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1833 * later found its way into the ATA/ATAPI spec.
1834 *
1835 * Write a pattern to the ATA shadow registers,
1836 * and if a device is present, it will respond by
1837 * correctly storing and echoing back the
1838 * ATA shadow register contents.
1839 *
1840 * LOCKING:
1841 * caller.
1842 */
1843static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1844{
1845 struct ata_ioports *ioaddr = &ap->ioaddr;
1846 u8 nsect, lbal;
1847
Tejun Heo5682ed32008-04-07 22:47:16 +09001848 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001849
1850 iowrite8(0x55, ioaddr->nsect_addr);
1851 iowrite8(0xaa, ioaddr->lbal_addr);
1852
1853 iowrite8(0xaa, ioaddr->nsect_addr);
1854 iowrite8(0x55, ioaddr->lbal_addr);
1855
1856 iowrite8(0x55, ioaddr->nsect_addr);
1857 iowrite8(0xaa, ioaddr->lbal_addr);
1858
1859 nsect = ioread8(ioaddr->nsect_addr);
1860 lbal = ioread8(ioaddr->lbal_addr);
1861
1862 if ((nsect == 0x55) && (lbal == 0xaa))
1863 return 1; /* we found a device */
1864
1865 return 0; /* nothing found */
1866}
1867
1868/**
Tejun Heo9363c382008-04-07 22:47:16 +09001869 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001870 * @dev: ATA device to classify (starting at zero)
1871 * @present: device seems present
1872 * @r_err: Value of error register on completion
1873 *
1874 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1875 * an ATA/ATAPI-defined set of values is placed in the ATA
1876 * shadow registers, indicating the results of device detection
1877 * and diagnostics.
1878 *
1879 * Select the ATA device, and read the values from the ATA shadow
1880 * registers. Then parse according to the Error register value,
1881 * and the spec-defined values examined by ata_dev_classify().
1882 *
1883 * LOCKING:
1884 * caller.
1885 *
1886 * RETURNS:
1887 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1888 */
Tejun Heo9363c382008-04-07 22:47:16 +09001889unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001890 u8 *r_err)
1891{
1892 struct ata_port *ap = dev->link->ap;
1893 struct ata_taskfile tf;
1894 unsigned int class;
1895 u8 err;
1896
Tejun Heo5682ed32008-04-07 22:47:16 +09001897 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001898
1899 memset(&tf, 0, sizeof(tf));
1900
Tejun Heo5682ed32008-04-07 22:47:16 +09001901 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001902 err = tf.feature;
1903 if (r_err)
1904 *r_err = err;
1905
1906 /* see if device passed diags: continue and warn later */
1907 if (err == 0)
1908 /* diagnostic fail : do nothing _YET_ */
1909 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1910 else if (err == 1)
1911 /* do nothing */ ;
1912 else if ((dev->devno == 0) && (err == 0x81))
1913 /* do nothing */ ;
1914 else
1915 return ATA_DEV_NONE;
1916
1917 /* determine if device is ATA or ATAPI */
1918 class = ata_dev_classify(&tf);
1919
1920 if (class == ATA_DEV_UNKNOWN) {
1921 /* If the device failed diagnostic, it's likely to
1922 * have reported incorrect device signature too.
1923 * Assume ATA device if the device seems present but
1924 * device signature is invalid with diagnostic
1925 * failure.
1926 */
1927 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1928 class = ATA_DEV_ATA;
1929 else
1930 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001931 } else if ((class == ATA_DEV_ATA) &&
1932 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001933 class = ATA_DEV_NONE;
1934
1935 return class;
1936}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001937EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09001938
Tejun Heo705e76b2008-04-07 22:47:19 +09001939/**
1940 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1941 * @link: SFF link which is just reset
1942 * @devmask: mask of present devices
1943 * @deadline: deadline jiffies for the operation
1944 *
1945 * Wait devices attached to SFF @link to become ready after
1946 * reset. It contains preceding 150ms wait to avoid accessing TF
1947 * status register too early.
1948 *
1949 * LOCKING:
1950 * Kernel thread context (may sleep).
1951 *
1952 * RETURNS:
1953 * 0 on success, -ENODEV if some or all of devices in @devmask
1954 * don't seem to exist. -errno on other errors.
1955 */
1956int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1957 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001958{
Tejun Heo705e76b2008-04-07 22:47:19 +09001959 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001960 struct ata_ioports *ioaddr = &ap->ioaddr;
1961 unsigned int dev0 = devmask & (1 << 0);
1962 unsigned int dev1 = devmask & (1 << 1);
1963 int rc, ret = 0;
1964
Tejun Heo97750ce2010-09-06 17:56:29 +02001965 ata_msleep(ap, ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09001966
1967 /* always check readiness of the master device */
1968 rc = ata_sff_wait_ready(link, deadline);
1969 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1970 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001971 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001972 if (rc)
1973 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001974
1975 /* if device 1 was found in ata_devchk, wait for register
1976 * access briefly, then wait for BSY to clear.
1977 */
1978 if (dev1) {
1979 int i;
1980
Tejun Heo5682ed32008-04-07 22:47:16 +09001981 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001982
1983 /* Wait for register access. Some ATAPI devices fail
1984 * to set nsect/lbal after reset, so don't waste too
1985 * much time on it. We're gonna wait for !BSY anyway.
1986 */
1987 for (i = 0; i < 2; i++) {
1988 u8 nsect, lbal;
1989
1990 nsect = ioread8(ioaddr->nsect_addr);
1991 lbal = ioread8(ioaddr->lbal_addr);
1992 if ((nsect == 1) && (lbal == 1))
1993 break;
Tejun Heo97750ce2010-09-06 17:56:29 +02001994 ata_msleep(ap, 50); /* give drive a breather */
Tejun Heo624d5c52008-03-25 22:16:41 +09001995 }
1996
Tejun Heo705e76b2008-04-07 22:47:19 +09001997 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001998 if (rc) {
1999 if (rc != -ENODEV)
2000 return rc;
2001 ret = rc;
2002 }
2003 }
2004
2005 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09002006 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002007 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09002008 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002009 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09002010 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002011
2012 return ret;
2013}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002014EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002015
Tejun Heo624d5c52008-03-25 22:16:41 +09002016static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2017 unsigned long deadline)
2018{
2019 struct ata_ioports *ioaddr = &ap->ioaddr;
2020
2021 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2022
Ondrej Zary6d8ca282014-09-27 00:04:46 +02002023 if (ap->ioaddr.ctl_addr) {
2024 /* software reset. causes dev0 to be selected */
2025 iowrite8(ap->ctl, ioaddr->ctl_addr);
2026 udelay(20); /* FIXME: flush */
2027 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2028 udelay(20); /* FIXME: flush */
2029 iowrite8(ap->ctl, ioaddr->ctl_addr);
2030 ap->last_ctl = ap->ctl;
2031 }
Tejun Heo624d5c52008-03-25 22:16:41 +09002032
Tejun Heo705e76b2008-04-07 22:47:19 +09002033 /* wait the port to become ready */
2034 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002035}
2036
2037/**
Tejun Heo9363c382008-04-07 22:47:16 +09002038 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002039 * @link: ATA link to reset
2040 * @classes: resulting classes of attached devices
2041 * @deadline: deadline jiffies for the operation
2042 *
2043 * Reset host port using ATA SRST.
2044 *
2045 * LOCKING:
2046 * Kernel thread context (may sleep)
2047 *
2048 * RETURNS:
2049 * 0 on success, -errno otherwise.
2050 */
Tejun Heo9363c382008-04-07 22:47:16 +09002051int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002052 unsigned long deadline)
2053{
2054 struct ata_port *ap = link->ap;
2055 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2056 unsigned int devmask = 0;
2057 int rc;
2058 u8 err;
2059
2060 DPRINTK("ENTER\n");
2061
Tejun Heo624d5c52008-03-25 22:16:41 +09002062 /* determine if device 0/1 are present */
2063 if (ata_devchk(ap, 0))
2064 devmask |= (1 << 0);
2065 if (slave_possible && ata_devchk(ap, 1))
2066 devmask |= (1 << 1);
2067
2068 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002069 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002070
2071 /* issue bus reset */
2072 DPRINTK("about to softreset, devmask=%x\n", devmask);
2073 rc = ata_bus_softreset(ap, devmask, deadline);
2074 /* if link is occupied, -ENODEV too is an error */
2075 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07002076 ata_link_err(link, "SRST failed (errno=%d)\n", rc);
Tejun Heo624d5c52008-03-25 22:16:41 +09002077 return rc;
2078 }
2079
2080 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002081 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002082 devmask & (1 << 0), &err);
2083 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002084 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002085 devmask & (1 << 1), &err);
2086
Tejun Heo624d5c52008-03-25 22:16:41 +09002087 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2088 return 0;
2089}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002090EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002091
2092/**
Tejun Heo9363c382008-04-07 22:47:16 +09002093 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002094 * @link: link to reset
2095 * @class: resulting class of attached device
2096 * @deadline: deadline jiffies for the operation
2097 *
2098 * SATA phy-reset host port using DET bits of SControl register,
2099 * wait for !BSY and classify the attached device.
2100 *
2101 * LOCKING:
2102 * Kernel thread context (may sleep)
2103 *
2104 * RETURNS:
2105 * 0 on success, -errno otherwise.
2106 */
Tejun Heo9363c382008-04-07 22:47:16 +09002107int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002108 unsigned long deadline)
2109{
Tejun Heo9dadd452008-04-07 22:47:19 +09002110 struct ata_eh_context *ehc = &link->eh_context;
2111 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2112 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002113 int rc;
2114
Tejun Heo9dadd452008-04-07 22:47:19 +09002115 rc = sata_link_hardreset(link, timing, deadline, &online,
2116 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002117 if (online)
2118 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002119
2120 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002121 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002122}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002123EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002124
2125/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002126 * ata_sff_postreset - SFF postreset callback
2127 * @link: the target SFF ata_link
2128 * @classes: classes of attached devices
2129 *
2130 * This function is invoked after a successful reset. It first
2131 * calls ata_std_postreset() and performs SFF specific postreset
2132 * processing.
2133 *
2134 * LOCKING:
2135 * Kernel thread context (may sleep)
2136 */
2137void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2138{
2139 struct ata_port *ap = link->ap;
2140
2141 ata_std_postreset(link, classes);
2142
2143 /* is double-select really necessary? */
2144 if (classes[0] != ATA_DEV_NONE)
2145 ap->ops->sff_dev_select(ap, 1);
2146 if (classes[1] != ATA_DEV_NONE)
2147 ap->ops->sff_dev_select(ap, 0);
2148
2149 /* bail out if no device is present */
2150 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2151 DPRINTK("EXIT, no device\n");
2152 return;
2153 }
2154
2155 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002156 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2157 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002158 ap->last_ctl = ap->ctl;
2159 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002160}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002161EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002162
2163/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002164 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2165 * @qc: command
2166 *
2167 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002168 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002169 * reset will recover the device.
2170 *
2171 */
2172
2173void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2174{
2175 int count;
2176 struct ata_port *ap;
2177
2178 /* We only need to flush incoming data when a command was running */
2179 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2180 return;
2181
2182 ap = qc->ap;
2183 /* Drain up to 64K of data before we give up this recovery method */
2184 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002185 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002186 ioread16(ap->ioaddr.data_addr);
2187
2188 /* Can become DEBUG later */
2189 if (count)
Joe Perchesa9a79df2011-04-15 15:51:59 -07002190 ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
Alan Cox3d47aa82009-03-24 10:23:19 +00002191
2192}
2193EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2194
2195/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002196 * ata_sff_error_handler - Stock error handler for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002197 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002198 *
Tejun Heo9363c382008-04-07 22:47:16 +09002199 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002200 * PATA and SATA controllers. Many controllers should be able to
2201 * use this EH as-is or with some added handling before and
2202 * after.
2203 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002204 * LOCKING:
2205 * Kernel thread context (may sleep)
2206 */
Tejun Heo9363c382008-04-07 22:47:16 +09002207void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002208{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002209 ata_reset_fn_t softreset = ap->ops->softreset;
2210 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002211 struct ata_queued_cmd *qc;
2212 unsigned long flags;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002213
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002214 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002215 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2216 qc = NULL;
2217
Jeff Garzikba6a1302006-06-22 23:46:10 -04002218 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002219
Tejun Heofe06e5f2010-05-10 21:41:39 +02002220 /*
2221 * We *MUST* do FIFO draining before we issue a reset as
2222 * several devices helpfully clear their internal state and
2223 * will lock solid if we touch the data port post reset. Pass
2224 * qc in case anyone wants to do different PIO/DMA recovery or
2225 * has per command fixups
Alan Cox3d47aa82009-03-24 10:23:19 +00002226 */
Tejun Heo8244cd02010-05-10 21:41:36 +02002227 if (ap->ops->sff_drain_fifo)
2228 ap->ops->sff_drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002229
Jeff Garzikba6a1302006-06-22 23:46:10 -04002230 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002231
Tejun Heofe06e5f2010-05-10 21:41:39 +02002232 /* ignore built-in hardresets if SCR access is not available */
2233 if ((hardreset == sata_std_hardreset ||
2234 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002235 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002236
Tejun Heoa1efdab2008-03-25 12:22:50 +09002237 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2238 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002239}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002240EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002241
2242/**
Tejun Heo9363c382008-04-07 22:47:16 +09002243 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002244 * @ioaddr: IO address structure to be initialized
2245 *
2246 * Utility function which initializes data_addr, error_addr,
2247 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2248 * device_addr, status_addr, and command_addr to standard offsets
2249 * relative to cmd_addr.
2250 *
2251 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2252 */
Tejun Heo9363c382008-04-07 22:47:16 +09002253void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002254{
2255 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2256 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2257 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2258 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2259 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2260 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2261 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2262 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2263 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2264 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2265}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002266EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002267
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002268#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002269
Tejun Heo272f7882008-03-25 22:16:40 +09002270static int ata_resources_present(struct pci_dev *pdev, int port)
2271{
2272 int i;
2273
2274 /* Check the PCI resources for this channel are enabled */
2275 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002276 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002277 if (pci_resource_start(pdev, port + i) == 0 ||
2278 pci_resource_len(pdev, port + i) == 0)
2279 return 0;
2280 }
2281 return 1;
2282}
2283
Tejun Heod491b272007-04-17 23:44:07 +09002284/**
Tejun Heo9363c382008-04-07 22:47:16 +09002285 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002286 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002287 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002288 * Acquire native PCI ATA resources for @host and initialize the
2289 * first two ports of @host accordingly. Ports marked dummy are
2290 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002291 *
Tejun Heod583bc12007-07-04 18:02:07 +09002292 * Note that native PCI resources are valid even for legacy hosts
2293 * as we fix up pdev resources array early in boot, so this
2294 * function can be used for both native and legacy SFF hosts.
2295 *
Tejun Heod491b272007-04-17 23:44:07 +09002296 * LOCKING:
2297 * Inherited from calling layer (may sleep).
2298 *
2299 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002300 * 0 if at least one port is initialized, -ENODEV if no port is
2301 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002302 */
Tejun Heo9363c382008-04-07 22:47:16 +09002303int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002304{
2305 struct device *gdev = host->dev;
2306 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002307 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002308 int i, rc;
2309
Tejun Heod491b272007-04-17 23:44:07 +09002310 /* request, iomap BARs and init port addresses accordingly */
2311 for (i = 0; i < 2; i++) {
2312 struct ata_port *ap = host->ports[i];
2313 int base = i * 2;
2314 void __iomem * const *iomap;
2315
Tejun Heo1626aeb2007-05-04 12:43:58 +02002316 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002317 continue;
2318
Tejun Heo1626aeb2007-05-04 12:43:58 +02002319 /* Discard disabled ports. Some controllers show
2320 * their unused channels this way. Disabled ports are
2321 * made dummy.
2322 */
2323 if (!ata_resources_present(pdev, i)) {
2324 ap->ops = &ata_dummy_port_ops;
2325 continue;
2326 }
2327
Tejun Heo35a10a82008-01-04 18:42:21 +09002328 rc = pcim_iomap_regions(pdev, 0x3 << base,
2329 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002330 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002331 dev_warn(gdev,
2332 "failed to request/iomap BARs for port %d (errno=%d)\n",
2333 i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002334 if (rc == -EBUSY)
2335 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002336 ap->ops = &ata_dummy_port_ops;
2337 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002338 }
2339 host->iomap = iomap = pcim_iomap_table(pdev);
2340
2341 ap->ioaddr.cmd_addr = iomap[base];
2342 ap->ioaddr.altstatus_addr =
2343 ap->ioaddr.ctl_addr = (void __iomem *)
2344 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002345 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002346
Tejun Heocbcdd872007-08-18 13:14:55 +09002347 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2348 (unsigned long long)pci_resource_start(pdev, base),
2349 (unsigned long long)pci_resource_start(pdev, base + 1));
2350
Tejun Heo1626aeb2007-05-04 12:43:58 +02002351 mask |= 1 << i;
2352 }
2353
2354 if (!mask) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002355 dev_err(gdev, "no available native port\n");
Tejun Heo1626aeb2007-05-04 12:43:58 +02002356 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002357 }
2358
2359 return 0;
2360}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002361EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002362
Tejun Heo21b0ad42007-04-17 23:44:07 +09002363/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002364 * ata_pci_sff_prepare_host - helper to prepare PCI PIO-only SFF ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002365 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002366 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002367 * @r_host: out argument for the initialized ATA host
2368 *
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002369 * Helper to allocate PIO-only SFF ATA host for @pdev, acquire
2370 * all PCI resources and initialize it accordingly in one go.
Tejun Heo21b0ad42007-04-17 23:44:07 +09002371 *
2372 * LOCKING:
2373 * Inherited from calling layer (may sleep).
2374 *
2375 * RETURNS:
2376 * 0 on success, -errno otherwise.
2377 */
Tejun Heo9363c382008-04-07 22:47:16 +09002378int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002379 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002380 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002381{
2382 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002383 int rc;
2384
2385 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2386 return -ENOMEM;
2387
2388 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2389 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002390 dev_err(&pdev->dev, "failed to allocate ATA host\n");
Tejun Heo21b0ad42007-04-17 23:44:07 +09002391 rc = -ENOMEM;
2392 goto err_out;
2393 }
2394
Tejun Heo9363c382008-04-07 22:47:16 +09002395 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002396 if (rc)
2397 goto err_out;
2398
Tejun Heo21b0ad42007-04-17 23:44:07 +09002399 devres_remove_group(&pdev->dev, NULL);
2400 *r_host = host;
2401 return 0;
2402
Alan Cox0fe40ff2009-01-05 14:16:13 +00002403err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002404 devres_release_group(&pdev->dev, NULL);
2405 return rc;
2406}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002407EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002408
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002409/**
Tejun Heo9363c382008-04-07 22:47:16 +09002410 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002411 * @host: target SFF ATA host
2412 * @irq_handler: irq_handler used when requesting IRQ(s)
2413 * @sht: scsi_host_template to use when registering the host
2414 *
2415 * This is the counterpart of ata_host_activate() for SFF ATA
2416 * hosts. This separate helper is necessary because SFF hosts
2417 * use two separate interrupts in legacy mode.
2418 *
2419 * LOCKING:
2420 * Inherited from calling layer (may sleep).
2421 *
2422 * RETURNS:
2423 * 0 on success, -errno otherwise.
2424 */
Tejun Heo9363c382008-04-07 22:47:16 +09002425int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002426 irq_handler_t irq_handler,
2427 struct scsi_host_template *sht)
2428{
2429 struct device *dev = host->dev;
2430 struct pci_dev *pdev = to_pci_dev(dev);
2431 const char *drv_name = dev_driver_string(host->dev);
2432 int legacy_mode = 0, rc;
2433
2434 rc = ata_host_start(host);
2435 if (rc)
2436 return rc;
2437
2438 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2439 u8 tmp8, mask;
2440
2441 /* TODO: What if one channel is in native mode ... */
2442 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2443 mask = (1 << 2) | (1 << 0);
2444 if ((tmp8 & mask) != mask)
2445 legacy_mode = 1;
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002446 }
2447
2448 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2449 return -ENOMEM;
2450
2451 if (!legacy_mode && pdev->irq) {
James Bottomleyaf649a12011-04-24 14:31:33 -05002452 int i;
2453
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002454 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2455 IRQF_SHARED, drv_name, host);
2456 if (rc)
2457 goto out;
2458
James Bottomleyaf649a12011-04-24 14:31:33 -05002459 for (i = 0; i < 2; i++) {
2460 if (ata_port_is_dummy(host->ports[i]))
2461 continue;
2462 ata_port_desc(host->ports[i], "irq %d", pdev->irq);
2463 }
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002464 } else if (legacy_mode) {
2465 if (!ata_port_is_dummy(host->ports[0])) {
2466 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2467 irq_handler, IRQF_SHARED,
2468 drv_name, host);
2469 if (rc)
2470 goto out;
2471
2472 ata_port_desc(host->ports[0], "irq %d",
2473 ATA_PRIMARY_IRQ(pdev));
2474 }
2475
2476 if (!ata_port_is_dummy(host->ports[1])) {
2477 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2478 irq_handler, IRQF_SHARED,
2479 drv_name, host);
2480 if (rc)
2481 goto out;
2482
2483 ata_port_desc(host->ports[1], "irq %d",
2484 ATA_SECONDARY_IRQ(pdev));
2485 }
2486 }
2487
2488 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002489out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002490 if (rc == 0)
2491 devres_remove_group(dev, NULL);
2492 else
2493 devres_release_group(dev, NULL);
2494
2495 return rc;
2496}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002497EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002498
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002499static const struct ata_port_info *ata_sff_find_valid_pi(
2500 const struct ata_port_info * const *ppi)
2501{
2502 int i;
2503
2504 /* look up the first valid port_info */
2505 for (i = 0; i < 2 && ppi[i]; i++)
2506 if (ppi[i]->port_ops != &ata_dummy_port_ops)
2507 return ppi[i];
2508
2509 return NULL;
2510}
2511
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002512static int ata_pci_init_one(struct pci_dev *pdev,
2513 const struct ata_port_info * const *ppi,
2514 struct scsi_host_template *sht, void *host_priv,
2515 int hflags, bool bmdma)
2516{
2517 struct device *dev = &pdev->dev;
2518 const struct ata_port_info *pi;
2519 struct ata_host *host = NULL;
2520 int rc;
2521
2522 DPRINTK("ENTER\n");
2523
2524 pi = ata_sff_find_valid_pi(ppi);
2525 if (!pi) {
2526 dev_err(&pdev->dev, "no valid port_info specified\n");
2527 return -EINVAL;
2528 }
2529
2530 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2531 return -ENOMEM;
2532
2533 rc = pcim_enable_device(pdev);
2534 if (rc)
2535 goto out;
2536
Alexander Beregalovaab94402011-11-13 01:30:56 +04002537#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002538 if (bmdma)
2539 /* prepare and activate BMDMA host */
2540 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
2541 else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002542#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002543 /* prepare and activate SFF host */
2544 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
2545 if (rc)
2546 goto out;
2547 host->private_data = host_priv;
2548 host->flags |= hflags;
2549
Alexander Beregalovaab94402011-11-13 01:30:56 +04002550#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002551 if (bmdma) {
2552 pci_set_master(pdev);
2553 rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
2554 } else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002555#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002556 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
2557out:
2558 if (rc == 0)
2559 devres_remove_group(&pdev->dev, NULL);
2560 else
2561 devres_release_group(&pdev->dev, NULL);
2562
2563 return rc;
2564}
2565
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002566/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002567 * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002568 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002569 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002570 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002571 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002572 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002573 *
2574 * This is a helper function which can be called from a driver's
2575 * xxx_init_one() probe function if the hardware uses traditional
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002576 * IDE taskfile registers and is PIO only.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002577 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002578 * ASSUMPTION:
2579 * Nobody makes a single channel controller that appears solely as
2580 * the secondary legacy port on PCI.
2581 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002582 * LOCKING:
2583 * Inherited from PCI layer (may sleep).
2584 *
2585 * RETURNS:
2586 * Zero on success, negative on errno-based value on error.
2587 */
Tejun Heo9363c382008-04-07 22:47:16 +09002588int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05002589 const struct ata_port_info * const *ppi,
2590 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002591{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002592 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflag, 0);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002593}
Tejun Heo9363c382008-04-07 22:47:16 +09002594EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002595
Tejun Heo624d5c52008-03-25 22:16:41 +09002596#endif /* CONFIG_PCI */
Tejun Heo9f2f7212010-05-10 21:41:32 +02002597
Tejun Heo9a7780c2010-05-19 22:10:24 +02002598/*
2599 * BMDMA support
2600 */
2601
2602#ifdef CONFIG_ATA_BMDMA
2603
Tejun Heo9f2f7212010-05-10 21:41:32 +02002604const struct ata_port_operations ata_bmdma_port_ops = {
2605 .inherits = &ata_sff_port_ops,
2606
Tejun Heofe06e5f2010-05-10 21:41:39 +02002607 .error_handler = ata_bmdma_error_handler,
2608 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2609
Tejun Heof47451c2010-05-10 21:41:40 +02002610 .qc_prep = ata_bmdma_qc_prep,
Tejun Heo360ff782010-05-10 21:41:42 +02002611 .qc_issue = ata_bmdma_qc_issue,
Tejun Heof47451c2010-05-10 21:41:40 +02002612
Tejun Heo37f65b82010-05-19 22:10:20 +02002613 .sff_irq_clear = ata_bmdma_irq_clear,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002614 .bmdma_setup = ata_bmdma_setup,
2615 .bmdma_start = ata_bmdma_start,
2616 .bmdma_stop = ata_bmdma_stop,
2617 .bmdma_status = ata_bmdma_status,
Tejun Heoc7087652010-05-10 21:41:34 +02002618
2619 .port_start = ata_bmdma_port_start,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002620};
2621EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2622
2623const struct ata_port_operations ata_bmdma32_port_ops = {
2624 .inherits = &ata_bmdma_port_ops,
2625
2626 .sff_data_xfer = ata_sff_data_xfer32,
Tejun Heoc7087652010-05-10 21:41:34 +02002627 .port_start = ata_bmdma_port_start32,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002628};
2629EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2630
Tejun Heo9f2f7212010-05-10 21:41:32 +02002631/**
Tejun Heof47451c2010-05-10 21:41:40 +02002632 * ata_bmdma_fill_sg - Fill PCI IDE PRD table
2633 * @qc: Metadata associated with taskfile to be transferred
2634 *
2635 * Fill PCI IDE PRD (scatter-gather) table with segments
2636 * associated with the current disk command.
2637 *
2638 * LOCKING:
2639 * spin_lock_irqsave(host lock)
2640 *
2641 */
2642static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2643{
2644 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002645 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002646 struct scatterlist *sg;
2647 unsigned int si, pi;
2648
2649 pi = 0;
2650 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2651 u32 addr, offset;
2652 u32 sg_len, len;
2653
2654 /* determine if physical DMA addr spans 64K boundary.
2655 * Note h/w doesn't support 64-bit, so we unconditionally
2656 * truncate dma_addr_t to u32.
2657 */
2658 addr = (u32) sg_dma_address(sg);
2659 sg_len = sg_dma_len(sg);
2660
2661 while (sg_len) {
2662 offset = addr & 0xffff;
2663 len = sg_len;
2664 if ((offset + sg_len) > 0x10000)
2665 len = 0x10000 - offset;
2666
Tejun Heof60d7012010-05-10 21:41:41 +02002667 prd[pi].addr = cpu_to_le32(addr);
2668 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
Tejun Heof47451c2010-05-10 21:41:40 +02002669 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2670
2671 pi++;
2672 sg_len -= len;
2673 addr += len;
2674 }
2675 }
2676
Tejun Heof60d7012010-05-10 21:41:41 +02002677 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002678}
2679
2680/**
2681 * ata_bmdma_fill_sg_dumb - Fill PCI IDE PRD table
2682 * @qc: Metadata associated with taskfile to be transferred
2683 *
2684 * Fill PCI IDE PRD (scatter-gather) table with segments
2685 * associated with the current disk command. Perform the fill
2686 * so that we avoid writing any length 64K records for
2687 * controllers that don't follow the spec.
2688 *
2689 * LOCKING:
2690 * spin_lock_irqsave(host lock)
2691 *
2692 */
2693static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2694{
2695 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002696 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002697 struct scatterlist *sg;
2698 unsigned int si, pi;
2699
2700 pi = 0;
2701 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2702 u32 addr, offset;
2703 u32 sg_len, len, blen;
2704
2705 /* determine if physical DMA addr spans 64K boundary.
2706 * Note h/w doesn't support 64-bit, so we unconditionally
2707 * truncate dma_addr_t to u32.
2708 */
2709 addr = (u32) sg_dma_address(sg);
2710 sg_len = sg_dma_len(sg);
2711
2712 while (sg_len) {
2713 offset = addr & 0xffff;
2714 len = sg_len;
2715 if ((offset + sg_len) > 0x10000)
2716 len = 0x10000 - offset;
2717
2718 blen = len & 0xffff;
Tejun Heof60d7012010-05-10 21:41:41 +02002719 prd[pi].addr = cpu_to_le32(addr);
Tejun Heof47451c2010-05-10 21:41:40 +02002720 if (blen == 0) {
2721 /* Some PATA chipsets like the CS5530 can't
2722 cope with 0x0000 meaning 64K as the spec
2723 says */
Tejun Heof60d7012010-05-10 21:41:41 +02002724 prd[pi].flags_len = cpu_to_le32(0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002725 blen = 0x8000;
Tejun Heof60d7012010-05-10 21:41:41 +02002726 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002727 }
Tejun Heof60d7012010-05-10 21:41:41 +02002728 prd[pi].flags_len = cpu_to_le32(blen);
Tejun Heof47451c2010-05-10 21:41:40 +02002729 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2730
2731 pi++;
2732 sg_len -= len;
2733 addr += len;
2734 }
2735 }
2736
Tejun Heof60d7012010-05-10 21:41:41 +02002737 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002738}
2739
2740/**
2741 * ata_bmdma_qc_prep - Prepare taskfile for submission
2742 * @qc: Metadata associated with taskfile to be prepared
2743 *
2744 * Prepare ATA taskfile for submission.
2745 *
2746 * LOCKING:
2747 * spin_lock_irqsave(host lock)
2748 */
2749void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2750{
2751 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2752 return;
2753
2754 ata_bmdma_fill_sg(qc);
2755}
2756EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2757
2758/**
2759 * ata_bmdma_dumb_qc_prep - Prepare taskfile for submission
2760 * @qc: Metadata associated with taskfile to be prepared
2761 *
2762 * Prepare ATA taskfile for submission.
2763 *
2764 * LOCKING:
2765 * spin_lock_irqsave(host lock)
2766 */
2767void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2768{
2769 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2770 return;
2771
2772 ata_bmdma_fill_sg_dumb(qc);
2773}
2774EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2775
2776/**
Tejun Heo360ff782010-05-10 21:41:42 +02002777 * ata_bmdma_qc_issue - issue taskfile to a BMDMA controller
2778 * @qc: command to issue to device
2779 *
2780 * This function issues a PIO, NODATA or DMA command to a
2781 * SFF/BMDMA controller. PIO and NODATA are handled by
2782 * ata_sff_qc_issue().
2783 *
2784 * LOCKING:
2785 * spin_lock_irqsave(host lock)
2786 *
2787 * RETURNS:
2788 * Zero on success, AC_ERR_* mask on failure
2789 */
2790unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2791{
2792 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002793 struct ata_link *link = qc->dev->link;
Tejun Heo360ff782010-05-10 21:41:42 +02002794
Tejun Heo360ff782010-05-10 21:41:42 +02002795 /* defer PIO handling to sff_qc_issue */
2796 if (!ata_is_dma(qc->tf.protocol))
2797 return ata_sff_qc_issue(qc);
2798
2799 /* select the device */
2800 ata_dev_select(ap, qc->dev->devno, 1, 0);
2801
2802 /* start the command */
2803 switch (qc->tf.protocol) {
2804 case ATA_PROT_DMA:
2805 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2806
2807 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2808 ap->ops->bmdma_setup(qc); /* set up bmdma */
2809 ap->ops->bmdma_start(qc); /* initiate bmdma */
2810 ap->hsm_task_state = HSM_ST_LAST;
2811 break;
2812
2813 case ATAPI_PROT_DMA:
2814 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2815
2816 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2817 ap->ops->bmdma_setup(qc); /* set up bmdma */
2818 ap->hsm_task_state = HSM_ST_FIRST;
2819
2820 /* send cdb by polling if no cdb interrupt */
2821 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002822 ata_sff_queue_pio_task(link, 0);
Tejun Heo360ff782010-05-10 21:41:42 +02002823 break;
2824
2825 default:
2826 WARN_ON(1);
2827 return AC_ERR_SYSTEM;
2828 }
2829
2830 return 0;
2831}
2832EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2833
2834/**
Tejun Heoc3b28892010-05-19 22:10:21 +02002835 * ata_bmdma_port_intr - Handle BMDMA port interrupt
2836 * @ap: Port on which interrupt arrived (possibly...)
2837 * @qc: Taskfile currently active in engine
2838 *
2839 * Handle port interrupt for given queued command.
2840 *
2841 * LOCKING:
2842 * spin_lock_irqsave(host lock)
2843 *
2844 * RETURNS:
2845 * One if interrupt was handled, zero if not (shared irq).
2846 */
2847unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
2848{
2849 struct ata_eh_info *ehi = &ap->link.eh_info;
2850 u8 host_stat = 0;
2851 bool bmdma_stopped = false;
2852 unsigned int handled;
2853
2854 if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
2855 /* check status of DMA engine */
2856 host_stat = ap->ops->bmdma_status(ap);
2857 VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat);
2858
2859 /* if it's not our irq... */
2860 if (!(host_stat & ATA_DMA_INTR))
2861 return ata_sff_idle_irq(ap);
2862
2863 /* before we do anything else, clear DMA-Start bit */
2864 ap->ops->bmdma_stop(qc);
2865 bmdma_stopped = true;
2866
2867 if (unlikely(host_stat & ATA_DMA_ERR)) {
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002868 /* error when transferring data to/from memory */
Tejun Heoc3b28892010-05-19 22:10:21 +02002869 qc->err_mask |= AC_ERR_HOST_BUS;
2870 ap->hsm_task_state = HSM_ST_ERR;
2871 }
2872 }
2873
2874 handled = __ata_sff_port_intr(ap, qc, bmdma_stopped);
2875
2876 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol))
2877 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
2878
2879 return handled;
2880}
2881EXPORT_SYMBOL_GPL(ata_bmdma_port_intr);
2882
2883/**
2884 * ata_bmdma_interrupt - Default BMDMA ATA host interrupt handler
2885 * @irq: irq line (unused)
2886 * @dev_instance: pointer to our ata_host information structure
2887 *
2888 * Default interrupt handler for PCI IDE devices. Calls
2889 * ata_bmdma_port_intr() for each port that is not disabled.
2890 *
2891 * LOCKING:
2892 * Obtains host lock during operation.
2893 *
2894 * RETURNS:
2895 * IRQ_NONE or IRQ_HANDLED.
2896 */
2897irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance)
2898{
2899 return __ata_sff_interrupt(irq, dev_instance, ata_bmdma_port_intr);
2900}
2901EXPORT_SYMBOL_GPL(ata_bmdma_interrupt);
2902
2903/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002904 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
2905 * @ap: port to handle error for
2906 *
2907 * Stock error handler for BMDMA controller. It can handle both
2908 * PATA and SATA controllers. Most BMDMA controllers should be
2909 * able to use this EH as-is or with some added handling before
2910 * and after.
2911 *
2912 * LOCKING:
2913 * Kernel thread context (may sleep)
2914 */
2915void ata_bmdma_error_handler(struct ata_port *ap)
2916{
2917 struct ata_queued_cmd *qc;
2918 unsigned long flags;
2919 bool thaw = false;
2920
2921 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2922 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2923 qc = NULL;
2924
2925 /* reset PIO HSM and stop DMA engine */
2926 spin_lock_irqsave(ap->lock, flags);
2927
2928 if (qc && ata_is_dma(qc->tf.protocol)) {
2929 u8 host_stat;
2930
2931 host_stat = ap->ops->bmdma_status(ap);
2932
2933 /* BMDMA controllers indicate host bus error by
2934 * setting DMA_ERR bit and timing out. As it wasn't
2935 * really a timeout event, adjust error mask and
2936 * cancel frozen state.
2937 */
2938 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2939 qc->err_mask = AC_ERR_HOST_BUS;
2940 thaw = true;
2941 }
2942
2943 ap->ops->bmdma_stop(qc);
2944
2945 /* if we're gonna thaw, make sure IRQ is clear */
2946 if (thaw) {
2947 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02002948 if (ap->ops->sff_irq_clear)
2949 ap->ops->sff_irq_clear(ap);
Tejun Heofe06e5f2010-05-10 21:41:39 +02002950 }
2951 }
2952
2953 spin_unlock_irqrestore(ap->lock, flags);
2954
2955 if (thaw)
2956 ata_eh_thaw_port(ap);
2957
2958 ata_sff_error_handler(ap);
2959}
2960EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2961
2962/**
2963 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
2964 * @qc: internal command to clean up
2965 *
2966 * LOCKING:
2967 * Kernel thread context (may sleep)
2968 */
2969void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2970{
2971 struct ata_port *ap = qc->ap;
2972 unsigned long flags;
2973
2974 if (ata_is_dma(qc->tf.protocol)) {
2975 spin_lock_irqsave(ap->lock, flags);
2976 ap->ops->bmdma_stop(qc);
2977 spin_unlock_irqrestore(ap->lock, flags);
2978 }
2979}
2980EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2981
2982/**
Tejun Heo37f65b82010-05-19 22:10:20 +02002983 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
2984 * @ap: Port associated with this ATA transaction.
2985 *
2986 * Clear interrupt and error flags in DMA status register.
2987 *
2988 * May be used as the irq_clear() entry in ata_port_operations.
2989 *
2990 * LOCKING:
2991 * spin_lock_irqsave(host lock)
2992 */
2993void ata_bmdma_irq_clear(struct ata_port *ap)
2994{
2995 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2996
2997 if (!mmio)
2998 return;
2999
3000 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
3001}
3002EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
3003
3004/**
Tejun Heo9f2f7212010-05-10 21:41:32 +02003005 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3006 * @qc: Info associated with this ATA transaction.
3007 *
3008 * LOCKING:
3009 * spin_lock_irqsave(host lock)
3010 */
3011void ata_bmdma_setup(struct ata_queued_cmd *qc)
3012{
3013 struct ata_port *ap = qc->ap;
3014 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3015 u8 dmactl;
3016
3017 /* load PRD table addr. */
3018 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +02003019 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Tejun Heo9f2f7212010-05-10 21:41:32 +02003020
3021 /* specify data direction, triple-check start bit is clear */
3022 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3023 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3024 if (!rw)
3025 dmactl |= ATA_DMA_WR;
3026 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3027
3028 /* issue r/w command */
3029 ap->ops->sff_exec_command(ap, &qc->tf);
3030}
3031EXPORT_SYMBOL_GPL(ata_bmdma_setup);
3032
3033/**
3034 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3035 * @qc: Info associated with this ATA transaction.
3036 *
3037 * LOCKING:
3038 * spin_lock_irqsave(host lock)
3039 */
3040void ata_bmdma_start(struct ata_queued_cmd *qc)
3041{
3042 struct ata_port *ap = qc->ap;
3043 u8 dmactl;
3044
3045 /* start host DMA transaction */
3046 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3047 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3048
3049 /* Strictly, one may wish to issue an ioread8() here, to
3050 * flush the mmio write. However, control also passes
3051 * to the hardware at this point, and it will interrupt
3052 * us when we are to resume control. So, in effect,
3053 * we don't care when the mmio write flushes.
3054 * Further, a read of the DMA status register _immediately_
3055 * following the write may not be what certain flaky hardware
3056 * is expected, so I think it is best to not add a readb()
3057 * without first all the MMIO ATA cards/mobos.
3058 * Or maybe I'm just being paranoid.
3059 *
3060 * FIXME: The posting of this write means I/O starts are
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003061 * unnecessarily delayed for MMIO
Tejun Heo9f2f7212010-05-10 21:41:32 +02003062 */
3063}
3064EXPORT_SYMBOL_GPL(ata_bmdma_start);
3065
3066/**
3067 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3068 * @qc: Command we are ending DMA for
3069 *
3070 * Clears the ATA_DMA_START flag in the dma control register
3071 *
3072 * May be used as the bmdma_stop() entry in ata_port_operations.
3073 *
3074 * LOCKING:
3075 * spin_lock_irqsave(host lock)
3076 */
3077void ata_bmdma_stop(struct ata_queued_cmd *qc)
3078{
3079 struct ata_port *ap = qc->ap;
3080 void __iomem *mmio = ap->ioaddr.bmdma_addr;
3081
3082 /* clear start/stop bit */
3083 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3084 mmio + ATA_DMA_CMD);
3085
3086 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3087 ata_sff_dma_pause(ap);
3088}
3089EXPORT_SYMBOL_GPL(ata_bmdma_stop);
3090
3091/**
3092 * ata_bmdma_status - Read PCI IDE BMDMA status
3093 * @ap: Port associated with this ATA transaction.
3094 *
3095 * Read and return BMDMA status register.
3096 *
3097 * May be used as the bmdma_status() entry in ata_port_operations.
3098 *
3099 * LOCKING:
3100 * spin_lock_irqsave(host lock)
3101 */
3102u8 ata_bmdma_status(struct ata_port *ap)
3103{
3104 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3105}
3106EXPORT_SYMBOL_GPL(ata_bmdma_status);
3107
Tejun Heoc7087652010-05-10 21:41:34 +02003108
3109/**
3110 * ata_bmdma_port_start - Set port up for bmdma.
3111 * @ap: Port to initialize
3112 *
3113 * Called just after data structures for each port are
3114 * initialized. Allocates space for PRD table.
3115 *
3116 * May be used as the port_start() entry in ata_port_operations.
3117 *
3118 * LOCKING:
3119 * Inherited from caller.
3120 */
3121int ata_bmdma_port_start(struct ata_port *ap)
3122{
3123 if (ap->mwdma_mask || ap->udma_mask) {
Tejun Heof60d7012010-05-10 21:41:41 +02003124 ap->bmdma_prd =
3125 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3126 &ap->bmdma_prd_dma, GFP_KERNEL);
3127 if (!ap->bmdma_prd)
Tejun Heoc7087652010-05-10 21:41:34 +02003128 return -ENOMEM;
3129 }
3130
3131 return 0;
3132}
3133EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3134
3135/**
3136 * ata_bmdma_port_start32 - Set port up for dma.
3137 * @ap: Port to initialize
3138 *
3139 * Called just after data structures for each port are
3140 * initialized. Enables 32bit PIO and allocates space for PRD
3141 * table.
3142 *
3143 * May be used as the port_start() entry in ata_port_operations for
3144 * devices that are capable of 32bit PIO.
3145 *
3146 * LOCKING:
3147 * Inherited from caller.
3148 */
3149int ata_bmdma_port_start32(struct ata_port *ap)
3150{
3151 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3152 return ata_bmdma_port_start(ap);
3153}
3154EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3155
Tejun Heo9f2f7212010-05-10 21:41:32 +02003156#ifdef CONFIG_PCI
3157
3158/**
3159 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
3160 * @pdev: PCI device
3161 *
3162 * Some PCI ATA devices report simplex mode but in fact can be told to
3163 * enter non simplex mode. This implements the necessary logic to
3164 * perform the task on such devices. Calling it on other devices will
3165 * have -undefined- behaviour.
3166 */
3167int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3168{
3169 unsigned long bmdma = pci_resource_start(pdev, 4);
3170 u8 simplex;
3171
3172 if (bmdma == 0)
3173 return -ENOENT;
3174
3175 simplex = inb(bmdma + 0x02);
3176 outb(simplex & 0x60, bmdma + 0x02);
3177 simplex = inb(bmdma + 0x02);
3178 if (simplex & 0x80)
3179 return -EOPNOTSUPP;
3180 return 0;
3181}
3182EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3183
Tejun Heoc7087652010-05-10 21:41:34 +02003184static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3185{
3186 int i;
3187
Joe Perchesa44fec12011-04-15 15:51:58 -07003188 dev_err(host->dev, "BMDMA: %s, falling back to PIO\n", reason);
Tejun Heoc7087652010-05-10 21:41:34 +02003189
3190 for (i = 0; i < 2; i++) {
3191 host->ports[i]->mwdma_mask = 0;
3192 host->ports[i]->udma_mask = 0;
3193 }
3194}
3195
Tejun Heo9f2f7212010-05-10 21:41:32 +02003196/**
3197 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
3198 * @host: target ATA host
3199 *
3200 * Acquire PCI BMDMA resources and initialize @host accordingly.
3201 *
3202 * LOCKING:
3203 * Inherited from calling layer (may sleep).
Tejun Heo9f2f7212010-05-10 21:41:32 +02003204 */
Tejun Heoc7087652010-05-10 21:41:34 +02003205void ata_pci_bmdma_init(struct ata_host *host)
Tejun Heo9f2f7212010-05-10 21:41:32 +02003206{
3207 struct device *gdev = host->dev;
3208 struct pci_dev *pdev = to_pci_dev(gdev);
3209 int i, rc;
3210
3211 /* No BAR4 allocation: No DMA */
Tejun Heoc7087652010-05-10 21:41:34 +02003212 if (pci_resource_start(pdev, 4) == 0) {
3213 ata_bmdma_nodma(host, "BAR4 is zero");
3214 return;
3215 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003216
Tejun Heoc7087652010-05-10 21:41:34 +02003217 /*
3218 * Some controllers require BMDMA region to be initialized
3219 * even if DMA is not in use to clear IRQ status via
3220 * ->sff_irq_clear method. Try to initialize bmdma_addr
3221 * regardless of dma masks.
3222 */
Tejun Heo9f2f7212010-05-10 21:41:32 +02003223 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
3224 if (rc)
Tejun Heoc7087652010-05-10 21:41:34 +02003225 ata_bmdma_nodma(host, "failed to set dma mask");
3226 if (!rc) {
3227 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
3228 if (rc)
3229 ata_bmdma_nodma(host,
3230 "failed to set consistent dma mask");
3231 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003232
3233 /* request and iomap DMA region */
3234 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3235 if (rc) {
Tejun Heoc7087652010-05-10 21:41:34 +02003236 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3237 return;
Tejun Heo9f2f7212010-05-10 21:41:32 +02003238 }
3239 host->iomap = pcim_iomap_table(pdev);
3240
3241 for (i = 0; i < 2; i++) {
3242 struct ata_port *ap = host->ports[i];
3243 void __iomem *bmdma = host->iomap[4] + 8 * i;
3244
3245 if (ata_port_is_dummy(ap))
3246 continue;
3247
3248 ap->ioaddr.bmdma_addr = bmdma;
3249 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3250 (ioread8(bmdma + 2) & 0x80))
3251 host->flags |= ATA_HOST_SIMPLEX;
3252
3253 ata_port_desc(ap, "bmdma 0x%llx",
3254 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3255 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003256}
3257EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3258
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003259/**
3260 * ata_pci_bmdma_prepare_host - helper to prepare PCI BMDMA ATA host
3261 * @pdev: target PCI device
3262 * @ppi: array of port_info, must be enough for two ports
3263 * @r_host: out argument for the initialized ATA host
3264 *
3265 * Helper to allocate BMDMA ATA host for @pdev, acquire all PCI
3266 * resources and initialize it accordingly in one go.
3267 *
3268 * LOCKING:
3269 * Inherited from calling layer (may sleep).
3270 *
3271 * RETURNS:
3272 * 0 on success, -errno otherwise.
3273 */
3274int ata_pci_bmdma_prepare_host(struct pci_dev *pdev,
3275 const struct ata_port_info * const * ppi,
3276 struct ata_host **r_host)
3277{
3278 int rc;
3279
3280 rc = ata_pci_sff_prepare_host(pdev, ppi, r_host);
3281 if (rc)
3282 return rc;
3283
3284 ata_pci_bmdma_init(*r_host);
3285 return 0;
3286}
3287EXPORT_SYMBOL_GPL(ata_pci_bmdma_prepare_host);
3288
3289/**
3290 * ata_pci_bmdma_init_one - Initialize/register BMDMA PCI IDE controller
3291 * @pdev: Controller to be initialized
3292 * @ppi: array of port_info, must be enough for two ports
3293 * @sht: scsi_host_template to use when registering the host
3294 * @host_priv: host private_data
3295 * @hflags: host flags
3296 *
3297 * This function is similar to ata_pci_sff_init_one() but also
3298 * takes care of BMDMA initialization.
3299 *
3300 * LOCKING:
3301 * Inherited from PCI layer (may sleep).
3302 *
3303 * RETURNS:
3304 * Zero on success, negative on errno-based value on error.
3305 */
3306int ata_pci_bmdma_init_one(struct pci_dev *pdev,
3307 const struct ata_port_info * const * ppi,
3308 struct scsi_host_template *sht, void *host_priv,
3309 int hflags)
3310{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02003311 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflags, 1);
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003312}
3313EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one);
3314
Tejun Heo9f2f7212010-05-10 21:41:32 +02003315#endif /* CONFIG_PCI */
Tejun Heo9a7780c2010-05-19 22:10:24 +02003316#endif /* CONFIG_ATA_BMDMA */
Tejun Heo270390e2010-05-10 21:41:35 +02003317
3318/**
3319 * ata_sff_port_init - Initialize SFF/BMDMA ATA port
3320 * @ap: Port to initialize
3321 *
3322 * Called on port allocation to initialize SFF/BMDMA specific
3323 * fields.
3324 *
3325 * LOCKING:
3326 * None.
3327 */
3328void ata_sff_port_init(struct ata_port *ap)
3329{
Tejun Heoc4291372010-05-10 21:41:38 +02003330 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
Tejun Heo5fe74542010-05-10 21:41:37 +02003331 ap->ctl = ATA_DEVCTL_OBS;
3332 ap->last_ctl = 0xFF;
Tejun Heo270390e2010-05-10 21:41:35 +02003333}
3334
3335int __init ata_sff_init(void)
3336{
Tejun Heo6370a6a2010-10-11 15:12:27 +02003337 ata_sff_wq = alloc_workqueue("ata_sff", WQ_MEM_RECLAIM, WQ_MAX_ACTIVE);
Tejun Heoc4291372010-05-10 21:41:38 +02003338 if (!ata_sff_wq)
3339 return -ENOMEM;
3340
Tejun Heo270390e2010-05-10 21:41:35 +02003341 return 0;
3342}
3343
Luck, Tonyc43d5592010-08-23 13:18:02 -07003344void ata_sff_exit(void)
Tejun Heo270390e2010-05-10 21:41:35 +02003345{
Tejun Heoc4291372010-05-10 21:41:38 +02003346 destroy_workqueue(ata_sff_wq);
Tejun Heo270390e2010-05-10 21:41:35 +02003347}