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Govindraj.Rb6126332010-09-27 20:20:49 +05301/*
2 * Driver for OMAP-UART controller.
3 * Based on drivers/serial/8250.c
4 *
5 * Copyright (C) 2010 Texas Instruments.
6 *
7 * Authors:
8 * Govindraj R <govindraj.raja@ti.com>
9 * Thara Gopinath <thara@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
Lucas De Marchi25985ed2011-03-30 22:57:33 -030016 * Note: This driver is made separate from 8250 driver as we cannot
Govindraj.Rb6126332010-09-27 20:20:49 +053017 * over load 8250 driver with omap platform specific configuration for
18 * features like DMA, it makes easier to implement features like DMA and
19 * hardware flow control and software flow control configuration with
20 * this driver as required for the omap-platform.
21 */
22
Thomas Weber364a6ec2011-02-01 08:30:41 +010023#if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
Govindraj.Rb6126332010-09-27 20:20:49 +053027#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/console.h>
30#include <linux/serial_reg.h>
31#include <linux/delay.h>
32#include <linux/slab.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
Felipe Balbid21e4002012-09-06 15:45:38 +030035#include <linux/platform_device.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053036#include <linux/io.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053037#include <linux/clk.h>
38#include <linux/serial_core.h>
39#include <linux/irq.h>
Govindraj.Rfcdca752011-02-28 18:12:23 +053040#include <linux/pm_runtime.h>
Rajendra Nayakd92b0df2011-12-14 17:25:45 +053041#include <linux/of.h>
NeilBrown9574f362012-07-30 10:30:26 +100042#include <linux/gpio.h>
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -070043#include <linux/pinctrl/consumer.h>
Tony Lindgrend9ba5732012-12-14 09:09:11 -080044#include <linux/platform_data/serial-omap.h>
Govindraj.Rb6126332010-09-27 20:20:49 +053045
Russell Kingf91b55ab2012-10-06 10:50:58 +010046#define OMAP_MAX_HSUART_PORTS 6
47
Govindraj.R7c77c8d2012-04-03 19:12:34 +053048#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
49
50#define OMAP_UART_REV_42 0x0402
51#define OMAP_UART_REV_46 0x0406
52#define OMAP_UART_REV_52 0x0502
53#define OMAP_UART_REV_63 0x0603
54
Russell Kingf91b55ab2012-10-06 10:50:58 +010055#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
56#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
57
Rajendra Nayak8fe789d2011-12-14 17:25:44 +053058#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
59
Paul Walmsley0ba5f662012-01-25 19:50:36 -070060/* SCR register bitmasks */
61#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
Alexey Pelykh1776fd02013-02-04 12:19:46 -050062#define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6)
Russell Kingf91b55ab2012-10-06 10:50:58 +010063#define OMAP_UART_SCR_TX_EMPTY (1 << 3)
Paul Walmsley0ba5f662012-01-25 19:50:36 -070064
65/* FCR register bitmasks */
Paul Walmsley0ba5f662012-01-25 19:50:36 -070066#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
Felipe Balbi6721ab72012-09-06 15:45:40 +030067#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
Paul Walmsley0ba5f662012-01-25 19:50:36 -070068
Govindraj.R7c77c8d2012-04-03 19:12:34 +053069/* MVR register bitmasks */
70#define OMAP_UART_MVR_SCHEME_SHIFT 30
71
72#define OMAP_UART_LEGACY_MVR_MAJ_MASK 0xf0
73#define OMAP_UART_LEGACY_MVR_MAJ_SHIFT 4
74#define OMAP_UART_LEGACY_MVR_MIN_MASK 0x0f
75
76#define OMAP_UART_MVR_MAJ_MASK 0x700
77#define OMAP_UART_MVR_MAJ_SHIFT 8
78#define OMAP_UART_MVR_MIN_MASK 0x3f
79
Russell Kingf91b55ab2012-10-06 10:50:58 +010080#define OMAP_UART_DMA_CH_FREE -1
81
82#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
83#define OMAP_MODE13X_SPEED 230400
84
85/* WER = 0x7F
86 * Enable module level wakeup in WER reg
87 */
88#define OMAP_UART_WER_MOD_WKUP 0X7F
89
90/* Enable XON/XOFF flow control on output */
Russell King3af08bd2012-10-05 13:32:08 +010091#define OMAP_UART_SW_TX 0x08
Russell Kingf91b55ab2012-10-06 10:50:58 +010092
93/* Enable XON/XOFF flow control on input */
Russell King3af08bd2012-10-05 13:32:08 +010094#define OMAP_UART_SW_RX 0x02
Russell Kingf91b55ab2012-10-06 10:50:58 +010095
96#define OMAP_UART_SW_CLR 0xF0
97
98#define OMAP_UART_TCR_TRIG 0x0F
99
100struct uart_omap_dma {
101 u8 uart_dma_tx;
102 u8 uart_dma_rx;
103 int rx_dma_channel;
104 int tx_dma_channel;
105 dma_addr_t rx_buf_dma_phys;
106 dma_addr_t tx_buf_dma_phys;
107 unsigned int uart_base;
108 /*
109 * Buffer for rx dma.It is not required for tx because the buffer
110 * comes from port structure.
111 */
112 unsigned char *rx_buf;
113 unsigned int prev_rx_dma_pos;
114 int tx_buf_size;
115 int tx_dma_used;
116 int rx_dma_used;
117 spinlock_t tx_lock;
118 spinlock_t rx_lock;
119 /* timer to poll activity on rx dma */
120 struct timer_list rx_timer;
121 unsigned int rx_buf_size;
122 unsigned int rx_poll_rate;
123 unsigned int rx_timeout;
124};
125
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300126struct uart_omap_port {
127 struct uart_port port;
128 struct uart_omap_dma uart_dma;
129 struct device *dev;
130
131 unsigned char ier;
132 unsigned char lcr;
133 unsigned char mcr;
134 unsigned char fcr;
135 unsigned char efr;
136 unsigned char dll;
137 unsigned char dlh;
138 unsigned char mdr1;
139 unsigned char scr;
140
141 int use_dma;
142 /*
143 * Some bits in registers are cleared on a read, so they must
144 * be saved whenever the register is read but the bits will not
145 * be immediately processed.
146 */
147 unsigned int lsr_break_flag;
148 unsigned char msr_saved_flags;
149 char name[20];
150 unsigned long port_activity;
Shubhrajyoti D39aee512012-10-03 17:24:36 +0530151 int context_loss_cnt;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300152 u32 errata;
153 u8 wakeups_enabled;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300154
Felipe Balbie36851d2012-09-07 18:34:19 +0300155 int DTR_gpio;
156 int DTR_inverted;
157 int DTR_active;
158
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300159 struct pm_qos_request pm_qos_request;
160 u32 latency;
161 u32 calc_latency;
162 struct work_struct qos_work;
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -0700163 struct pinctrl *pins;
Sourav Poddarddd85e22013-05-15 21:05:38 +0530164 bool is_suspending;
Felipe Balbid37c6ce2012-09-06 15:45:39 +0300165};
166
167#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
168
Govindraj.Rb6126332010-09-27 20:20:49 +0530169static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
170
171/* Forward declaration of functions */
Govindraj.R94734742011-11-07 19:00:33 +0530172static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
Govindraj.Rb6126332010-09-27 20:20:49 +0530173
Govindraj.R2fd14962011-11-09 17:41:21 +0530174static struct workqueue_struct *serial_omap_uart_wq;
Govindraj.Rb6126332010-09-27 20:20:49 +0530175
176static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
177{
178 offset <<= up->port.regshift;
179 return readw(up->port.membase + offset);
180}
181
182static inline void serial_out(struct uart_omap_port *up, int offset, int value)
183{
184 offset <<= up->port.regshift;
185 writew(value, up->port.membase + offset);
186}
187
188static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
189{
190 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
191 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
192 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
193 serial_out(up, UART_FCR, 0);
194}
195
Felipe Balbie5b57c02012-08-23 13:32:42 +0300196static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
197{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300198 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300199
Felipe Balbice2f08d2012-09-07 21:10:33 +0300200 if (!pdata || !pdata->get_context_loss_count)
Felipe Balbie5b57c02012-08-23 13:32:42 +0300201 return 0;
202
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300203 return pdata->get_context_loss_count(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300204}
205
206static void serial_omap_set_forceidle(struct uart_omap_port *up)
207{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300208 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300209
Felipe Balbice2f08d2012-09-07 21:10:33 +0300210 if (!pdata || !pdata->set_forceidle)
211 return;
212
213 pdata->set_forceidle(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300214}
215
216static void serial_omap_set_noidle(struct uart_omap_port *up)
217{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300218 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300219
Felipe Balbice2f08d2012-09-07 21:10:33 +0300220 if (!pdata || !pdata->set_noidle)
221 return;
222
223 pdata->set_noidle(up->dev);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300224}
225
226static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
227{
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300228 struct omap_uart_port_info *pdata = up->dev->platform_data;
Felipe Balbie5b57c02012-08-23 13:32:42 +0300229
Felipe Balbice2f08d2012-09-07 21:10:33 +0300230 if (!pdata || !pdata->enable_wakeup)
231 return;
232
233 pdata->enable_wakeup(up->dev, enable);
Felipe Balbie5b57c02012-08-23 13:32:42 +0300234}
235
Govindraj.Rb6126332010-09-27 20:20:49 +0530236/*
Alexey Pelykh5fe21232013-01-16 05:08:06 -0500237 * serial_omap_baud_is_mode16 - check if baud rate is MODE16X
238 * @port: uart port info
239 * @baud: baudrate for which mode needs to be determined
240 *
241 * Returns true if baud rate is MODE16X and false if MODE13X
242 * Original table in OMAP TRM named "UART Mode Baud Rates, Divisor Values,
243 * and Error Rates" determines modes not for all common baud rates.
244 * E.g. for 1000000 baud rate mode must be 16x, but according to that
245 * table it's determined as 13x.
246 */
247static bool
248serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud)
249{
250 unsigned int n13 = port->uartclk / (13 * baud);
251 unsigned int n16 = port->uartclk / (16 * baud);
252 int baudAbsDiff13 = baud - (port->uartclk / (13 * n13));
253 int baudAbsDiff16 = baud - (port->uartclk / (16 * n16));
254 if(baudAbsDiff13 < 0)
255 baudAbsDiff13 = -baudAbsDiff13;
256 if(baudAbsDiff16 < 0)
257 baudAbsDiff16 = -baudAbsDiff16;
258
259 return (baudAbsDiff13 > baudAbsDiff16);
260}
261
262/*
Govindraj.Rb6126332010-09-27 20:20:49 +0530263 * serial_omap_get_divisor - calculate divisor value
264 * @port: uart port info
265 * @baud: baudrate for which divisor needs to be calculated.
Govindraj.Rb6126332010-09-27 20:20:49 +0530266 */
267static unsigned int
268serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
269{
270 unsigned int divisor;
271
Alexey Pelykh5fe21232013-01-16 05:08:06 -0500272 if (!serial_omap_baud_is_mode16(port, baud))
Govindraj.Rb6126332010-09-27 20:20:49 +0530273 divisor = 13;
274 else
275 divisor = 16;
276 return port->uartclk/(baud * divisor);
277}
278
Govindraj.Rb6126332010-09-27 20:20:49 +0530279static void serial_omap_enable_ms(struct uart_port *port)
280{
Felipe Balbic990f352012-08-23 13:32:41 +0300281 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530282
Rajendra Nayakba774332011-12-14 17:25:43 +0530283 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530284
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300285 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530286 up->ier |= UART_IER_MSI;
287 serial_out(up, UART_IER, up->ier);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300288 pm_runtime_mark_last_busy(up->dev);
289 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530290}
291
292static void serial_omap_stop_tx(struct uart_port *port)
293{
Felipe Balbic990f352012-08-23 13:32:41 +0300294 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530295
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300296 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530297 if (up->ier & UART_IER_THRI) {
298 up->ier &= ~UART_IER_THRI;
299 serial_out(up, UART_IER, up->ier);
300 }
Govindraj.Rfcdca752011-02-28 18:12:23 +0530301
Felipe Balbi49457432012-09-06 15:45:21 +0300302 serial_omap_set_forceidle(up);
Paul Walmsleybe4b0282012-01-25 19:50:52 -0700303
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300304 pm_runtime_mark_last_busy(up->dev);
305 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530306}
307
308static void serial_omap_stop_rx(struct uart_port *port)
309{
Felipe Balbic990f352012-08-23 13:32:41 +0300310 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530311
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300312 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530313 up->ier &= ~UART_IER_RLSI;
314 up->port.read_status_mask &= ~UART_LSR_DR;
315 serial_out(up, UART_IER, up->ier);
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300316 pm_runtime_mark_last_busy(up->dev);
317 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530318}
319
Felipe Balbibf63a082012-09-06 15:45:25 +0300320static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
Govindraj.Rb6126332010-09-27 20:20:49 +0530321{
322 struct circ_buf *xmit = &up->port.state->xmit;
323 int count;
324
325 if (up->port.x_char) {
326 serial_out(up, UART_TX, up->port.x_char);
327 up->port.icount.tx++;
328 up->port.x_char = 0;
329 return;
330 }
331 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
332 serial_omap_stop_tx(&up->port);
333 return;
334 }
Greg Kroah-Hartmanaf681ca2012-01-26 11:14:42 -0800335 count = up->port.fifosize / 4;
Govindraj.Rb6126332010-09-27 20:20:49 +0530336 do {
337 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
338 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
339 up->port.icount.tx++;
340 if (uart_circ_empty(xmit))
341 break;
342 } while (--count > 0);
343
Ruchika Kharwar0324a822012-09-06 15:45:34 +0300344 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
345 spin_unlock(&up->port.lock);
Govindraj.Rb6126332010-09-27 20:20:49 +0530346 uart_write_wakeup(&up->port);
Ruchika Kharwar0324a822012-09-06 15:45:34 +0300347 spin_lock(&up->port.lock);
348 }
Govindraj.Rb6126332010-09-27 20:20:49 +0530349
350 if (uart_circ_empty(xmit))
351 serial_omap_stop_tx(&up->port);
352}
353
354static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
355{
356 if (!(up->ier & UART_IER_THRI)) {
357 up->ier |= UART_IER_THRI;
358 serial_out(up, UART_IER, up->ier);
359 }
360}
361
362static void serial_omap_start_tx(struct uart_port *port)
363{
Felipe Balbic990f352012-08-23 13:32:41 +0300364 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530365
Felipe Balbi49457432012-09-06 15:45:21 +0300366 pm_runtime_get_sync(up->dev);
367 serial_omap_enable_ier_thri(up);
368 serial_omap_set_noidle(up);
369 pm_runtime_mark_last_busy(up->dev);
370 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530371}
372
Russell King3af08bd2012-10-05 13:32:08 +0100373static void serial_omap_throttle(struct uart_port *port)
374{
375 struct uart_omap_port *up = to_uart_omap_port(port);
376 unsigned long flags;
377
378 pm_runtime_get_sync(up->dev);
379 spin_lock_irqsave(&up->port.lock, flags);
380 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
381 serial_out(up, UART_IER, up->ier);
382 spin_unlock_irqrestore(&up->port.lock, flags);
383 pm_runtime_mark_last_busy(up->dev);
384 pm_runtime_put_autosuspend(up->dev);
385}
386
387static void serial_omap_unthrottle(struct uart_port *port)
388{
389 struct uart_omap_port *up = to_uart_omap_port(port);
390 unsigned long flags;
391
392 pm_runtime_get_sync(up->dev);
393 spin_lock_irqsave(&up->port.lock, flags);
394 up->ier |= UART_IER_RLSI | UART_IER_RDI;
395 serial_out(up, UART_IER, up->ier);
396 spin_unlock_irqrestore(&up->port.lock, flags);
397 pm_runtime_mark_last_busy(up->dev);
398 pm_runtime_put_autosuspend(up->dev);
399}
400
Govindraj.Rb6126332010-09-27 20:20:49 +0530401static unsigned int check_modem_status(struct uart_omap_port *up)
402{
403 unsigned int status;
404
405 status = serial_in(up, UART_MSR);
406 status |= up->msr_saved_flags;
407 up->msr_saved_flags = 0;
408 if ((status & UART_MSR_ANY_DELTA) == 0)
409 return status;
410
411 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
412 up->port.state != NULL) {
413 if (status & UART_MSR_TERI)
414 up->port.icount.rng++;
415 if (status & UART_MSR_DDSR)
416 up->port.icount.dsr++;
417 if (status & UART_MSR_DDCD)
418 uart_handle_dcd_change
419 (&up->port, status & UART_MSR_DCD);
420 if (status & UART_MSR_DCTS)
421 uart_handle_cts_change
422 (&up->port, status & UART_MSR_CTS);
423 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
424 }
425
426 return status;
427}
428
Felipe Balbi72256cb2012-09-06 15:45:24 +0300429static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr)
430{
431 unsigned int flag;
Shubhrajyoti D9a12fcf2012-09-21 20:07:19 +0530432 unsigned char ch = 0;
433
434 if (likely(lsr & UART_LSR_DR))
435 ch = serial_in(up, UART_RX);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300436
437 up->port.icount.rx++;
438 flag = TTY_NORMAL;
439
440 if (lsr & UART_LSR_BI) {
441 flag = TTY_BREAK;
442 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
443 up->port.icount.brk++;
444 /*
445 * We do the SysRQ and SAK checking
446 * here because otherwise the break
447 * may get masked by ignore_status_mask
448 * or read_status_mask.
449 */
450 if (uart_handle_break(&up->port))
451 return;
452
453 }
454
455 if (lsr & UART_LSR_PE) {
456 flag = TTY_PARITY;
457 up->port.icount.parity++;
458 }
459
460 if (lsr & UART_LSR_FE) {
461 flag = TTY_FRAME;
462 up->port.icount.frame++;
463 }
464
465 if (lsr & UART_LSR_OE)
466 up->port.icount.overrun++;
467
468#ifdef CONFIG_SERIAL_OMAP_CONSOLE
469 if (up->port.line == up->port.cons->index) {
470 /* Recover the break flag from console xmit */
471 lsr |= up->lsr_break_flag;
472 }
473#endif
474 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag);
475}
476
477static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr)
478{
479 unsigned char ch = 0;
480 unsigned int flag;
481
482 if (!(lsr & UART_LSR_DR))
483 return;
484
485 ch = serial_in(up, UART_RX);
486 flag = TTY_NORMAL;
487 up->port.icount.rx++;
488
489 if (uart_handle_sysrq_char(&up->port, ch))
490 return;
491
492 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
493}
494
Govindraj.Rb6126332010-09-27 20:20:49 +0530495/**
496 * serial_omap_irq() - This handles the interrupt from one port
497 * @irq: uart port irq number
498 * @dev_id: uart port info
499 */
Felipe Balbi52c55132012-09-06 15:45:33 +0300500static irqreturn_t serial_omap_irq(int irq, void *dev_id)
Govindraj.Rb6126332010-09-27 20:20:49 +0530501{
502 struct uart_omap_port *up = dev_id;
503 unsigned int iir, lsr;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300504 unsigned int type;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300505 irqreturn_t ret = IRQ_NONE;
Felipe Balbi72256cb2012-09-06 15:45:24 +0300506 int max_count = 256;
Govindraj.Rb6126332010-09-27 20:20:49 +0530507
Felipe Balbi6c3a30c2012-09-06 15:45:30 +0300508 spin_lock(&up->port.lock);
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300509 pm_runtime_get_sync(up->dev);
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300510
Felipe Balbi72256cb2012-09-06 15:45:24 +0300511 do {
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300512 iir = serial_in(up, UART_IIR);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300513 if (iir & UART_IIR_NO_INT)
514 break;
Govindraj.Rb6126332010-09-27 20:20:49 +0530515
Felipe Balbi72256cb2012-09-06 15:45:24 +0300516 ret = IRQ_HANDLED;
517 lsr = serial_in(up, UART_LSR);
518
519 /* extract IRQ type from IIR register */
520 type = iir & 0x3e;
521
522 switch (type) {
523 case UART_IIR_MSI:
524 check_modem_status(up);
525 break;
526 case UART_IIR_THRI:
Felipe Balbibf63a082012-09-06 15:45:25 +0300527 transmit_chars(up, lsr);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300528 break;
529 case UART_IIR_RX_TIMEOUT:
530 /* FALLTHROUGH */
531 case UART_IIR_RDI:
532 serial_omap_rdi(up, lsr);
533 break;
534 case UART_IIR_RLSI:
535 serial_omap_rlsi(up, lsr);
536 break;
537 case UART_IIR_CTS_RTS_DSR:
538 /* simply try again */
539 break;
540 case UART_IIR_XOFF:
541 /* FALLTHROUGH */
542 default:
543 break;
544 }
545 } while (!(iir & UART_IIR_NO_INT) && max_count--);
546
Felipe Balbi6c3a30c2012-09-06 15:45:30 +0300547 spin_unlock(&up->port.lock);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300548
Jiri Slaby2e124b42013-01-03 15:53:06 +0100549 tty_flip_buffer_push(&up->port.state->port);
Felipe Balbi72256cb2012-09-06 15:45:24 +0300550
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300551 pm_runtime_mark_last_busy(up->dev);
552 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530553 up->port_activity = jiffies;
Felipe Balbi81b75ae2012-09-06 15:45:23 +0300554
555 return ret;
Govindraj.Rb6126332010-09-27 20:20:49 +0530556}
557
558static unsigned int serial_omap_tx_empty(struct uart_port *port)
559{
Felipe Balbic990f352012-08-23 13:32:41 +0300560 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530561 unsigned long flags = 0;
562 unsigned int ret = 0;
563
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300564 pm_runtime_get_sync(up->dev);
Rajendra Nayakba774332011-12-14 17:25:43 +0530565 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530566 spin_lock_irqsave(&up->port.lock, flags);
567 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
568 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300569 pm_runtime_mark_last_busy(up->dev);
570 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530571 return ret;
572}
573
574static unsigned int serial_omap_get_mctrl(struct uart_port *port)
575{
Felipe Balbic990f352012-08-23 13:32:41 +0300576 struct uart_omap_port *up = to_uart_omap_port(port);
Shubhrajyoti D514f31d2011-11-21 15:43:28 +0530577 unsigned int status;
Govindraj.Rb6126332010-09-27 20:20:49 +0530578 unsigned int ret = 0;
579
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300580 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530581 status = check_modem_status(up);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300582 pm_runtime_mark_last_busy(up->dev);
583 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530584
Rajendra Nayakba774332011-12-14 17:25:43 +0530585 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530586
587 if (status & UART_MSR_DCD)
588 ret |= TIOCM_CAR;
589 if (status & UART_MSR_RI)
590 ret |= TIOCM_RNG;
591 if (status & UART_MSR_DSR)
592 ret |= TIOCM_DSR;
593 if (status & UART_MSR_CTS)
594 ret |= TIOCM_CTS;
595 return ret;
596}
597
598static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
599{
Felipe Balbic990f352012-08-23 13:32:41 +0300600 struct uart_omap_port *up = to_uart_omap_port(port);
Russell King9363f8f2012-10-05 12:23:28 +0100601 unsigned char mcr = 0, old_mcr;
Govindraj.Rb6126332010-09-27 20:20:49 +0530602
Rajendra Nayakba774332011-12-14 17:25:43 +0530603 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530604 if (mctrl & TIOCM_RTS)
605 mcr |= UART_MCR_RTS;
606 if (mctrl & TIOCM_DTR)
607 mcr |= UART_MCR_DTR;
608 if (mctrl & TIOCM_OUT1)
609 mcr |= UART_MCR_OUT1;
610 if (mctrl & TIOCM_OUT2)
611 mcr |= UART_MCR_OUT2;
612 if (mctrl & TIOCM_LOOP)
613 mcr |= UART_MCR_LOOP;
614
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300615 pm_runtime_get_sync(up->dev);
Russell King9363f8f2012-10-05 12:23:28 +0100616 old_mcr = serial_in(up, UART_MCR);
617 old_mcr &= ~(UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_OUT1 |
618 UART_MCR_DTR | UART_MCR_RTS);
619 up->mcr = old_mcr | mcr;
Govindraj.Rc538d202011-11-07 18:57:03 +0530620 serial_out(up, UART_MCR, up->mcr);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300621 pm_runtime_mark_last_busy(up->dev);
622 pm_runtime_put_autosuspend(up->dev);
NeilBrown9574f362012-07-30 10:30:26 +1000623
624 if (gpio_is_valid(up->DTR_gpio) &&
625 !!(mctrl & TIOCM_DTR) != up->DTR_active) {
626 up->DTR_active = !up->DTR_active;
627 if (gpio_cansleep(up->DTR_gpio))
628 schedule_work(&up->qos_work);
629 else
630 gpio_set_value(up->DTR_gpio,
631 up->DTR_active != up->DTR_inverted);
632 }
Govindraj.Rb6126332010-09-27 20:20:49 +0530633}
634
635static void serial_omap_break_ctl(struct uart_port *port, int break_state)
636{
Felipe Balbic990f352012-08-23 13:32:41 +0300637 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530638 unsigned long flags = 0;
639
Rajendra Nayakba774332011-12-14 17:25:43 +0530640 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300641 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530642 spin_lock_irqsave(&up->port.lock, flags);
643 if (break_state == -1)
644 up->lcr |= UART_LCR_SBC;
645 else
646 up->lcr &= ~UART_LCR_SBC;
647 serial_out(up, UART_LCR, up->lcr);
648 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300649 pm_runtime_mark_last_busy(up->dev);
650 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530651}
652
653static int serial_omap_startup(struct uart_port *port)
654{
Felipe Balbic990f352012-08-23 13:32:41 +0300655 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530656 unsigned long flags = 0;
657 int retval;
658
659 /*
660 * Allocate the IRQ
661 */
662 retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
663 up->name, up);
664 if (retval)
665 return retval;
666
Rajendra Nayakba774332011-12-14 17:25:43 +0530667 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +0530668
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300669 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530670 /*
671 * Clear the FIFO buffers and disable them.
672 * (they will be reenabled in set_termios())
673 */
674 serial_omap_clear_fifos(up);
675 /* For Hardware flow control */
676 serial_out(up, UART_MCR, UART_MCR_RTS);
677
678 /*
679 * Clear the interrupt registers.
680 */
681 (void) serial_in(up, UART_LSR);
682 if (serial_in(up, UART_LSR) & UART_LSR_DR)
683 (void) serial_in(up, UART_RX);
684 (void) serial_in(up, UART_IIR);
685 (void) serial_in(up, UART_MSR);
686
687 /*
688 * Now, initialize the UART
689 */
690 serial_out(up, UART_LCR, UART_LCR_WLEN8);
691 spin_lock_irqsave(&up->port.lock, flags);
692 /*
693 * Most PC uarts need OUT2 raised to enable interrupts.
694 */
695 up->port.mctrl |= TIOCM_OUT2;
696 serial_omap_set_mctrl(&up->port, up->port.mctrl);
697 spin_unlock_irqrestore(&up->port.lock, flags);
698
699 up->msr_saved_flags = 0;
Govindraj.Rb6126332010-09-27 20:20:49 +0530700 /*
701 * Finally, enable interrupts. Note: Modem status interrupts
702 * are set via set_termios(), which will be occurring imminently
703 * anyway, so we don't enable them here.
704 */
705 up->ier = UART_IER_RLSI | UART_IER_RDI;
706 serial_out(up, UART_IER, up->ier);
707
Jarkko Nikula78841462011-01-24 17:51:22 +0200708 /* Enable module level wake up */
709 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
710
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300711 pm_runtime_mark_last_busy(up->dev);
712 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530713 up->port_activity = jiffies;
714 return 0;
715}
716
717static void serial_omap_shutdown(struct uart_port *port)
718{
Felipe Balbic990f352012-08-23 13:32:41 +0300719 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530720 unsigned long flags = 0;
721
Rajendra Nayakba774332011-12-14 17:25:43 +0530722 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530723
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300724 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530725 /*
726 * Disable interrupts from this port
727 */
728 up->ier = 0;
729 serial_out(up, UART_IER, 0);
730
731 spin_lock_irqsave(&up->port.lock, flags);
732 up->port.mctrl &= ~TIOCM_OUT2;
733 serial_omap_set_mctrl(&up->port, up->port.mctrl);
734 spin_unlock_irqrestore(&up->port.lock, flags);
735
736 /*
737 * Disable break condition and FIFOs
738 */
739 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
740 serial_omap_clear_fifos(up);
741
742 /*
743 * Read data port to reset things, and then free the irq
744 */
745 if (serial_in(up, UART_LSR) & UART_LSR_DR)
746 (void) serial_in(up, UART_RX);
Govindraj.Rfcdca752011-02-28 18:12:23 +0530747
Felipe Balbi660ac5f2012-09-06 15:45:26 +0300748 pm_runtime_mark_last_busy(up->dev);
749 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530750 free_irq(up->port.irq, up);
751}
752
Govindraj.R2fd14962011-11-09 17:41:21 +0530753static void serial_omap_uart_qos_work(struct work_struct *work)
754{
755 struct uart_omap_port *up = container_of(work, struct uart_omap_port,
756 qos_work);
757
758 pm_qos_update_request(&up->pm_qos_request, up->latency);
NeilBrown9574f362012-07-30 10:30:26 +1000759 if (gpio_is_valid(up->DTR_gpio))
760 gpio_set_value_cansleep(up->DTR_gpio,
761 up->DTR_active != up->DTR_inverted);
Govindraj.R2fd14962011-11-09 17:41:21 +0530762}
763
Govindraj.Rb6126332010-09-27 20:20:49 +0530764static void
765serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
766 struct ktermios *old)
767{
Felipe Balbic990f352012-08-23 13:32:41 +0300768 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +0530769 unsigned char cval = 0;
Govindraj.Rb6126332010-09-27 20:20:49 +0530770 unsigned long flags = 0;
771 unsigned int baud, quot;
772
773 switch (termios->c_cflag & CSIZE) {
774 case CS5:
775 cval = UART_LCR_WLEN5;
776 break;
777 case CS6:
778 cval = UART_LCR_WLEN6;
779 break;
780 case CS7:
781 cval = UART_LCR_WLEN7;
782 break;
783 default:
784 case CS8:
785 cval = UART_LCR_WLEN8;
786 break;
787 }
788
789 if (termios->c_cflag & CSTOPB)
790 cval |= UART_LCR_STOP;
791 if (termios->c_cflag & PARENB)
792 cval |= UART_LCR_PARITY;
793 if (!(termios->c_cflag & PARODD))
794 cval |= UART_LCR_EPAR;
Enric Balletbo i Serrafdbc7352012-12-06 09:45:04 +0100795 if (termios->c_cflag & CMSPAR)
796 cval |= UART_LCR_SPAR;
Govindraj.Rb6126332010-09-27 20:20:49 +0530797
798 /*
799 * Ask the core to calculate the divisor for us.
800 */
801
802 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
803 quot = serial_omap_get_divisor(port, baud);
804
Govindraj.R2fd14962011-11-09 17:41:21 +0530805 /* calculate wakeup latency constraint */
Paul Walmsley19723452012-01-25 19:50:56 -0700806 up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8);
Govindraj.R2fd14962011-11-09 17:41:21 +0530807 up->latency = up->calc_latency;
808 schedule_work(&up->qos_work);
809
Govindraj.Rc538d202011-11-07 18:57:03 +0530810 up->dll = quot & 0xff;
811 up->dlh = quot >> 8;
812 up->mdr1 = UART_OMAP_MDR1_DISABLE;
813
Govindraj.Rb6126332010-09-27 20:20:49 +0530814 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
815 UART_FCR_ENABLE_FIFO;
Govindraj.Rb6126332010-09-27 20:20:49 +0530816
817 /*
818 * Ok, we're now changing the port state. Do it with
819 * interrupts disabled.
820 */
Felipe Balbid8ee4ea2012-09-06 15:45:20 +0300821 pm_runtime_get_sync(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +0530822 spin_lock_irqsave(&up->port.lock, flags);
823
824 /*
825 * Update the per-port timeout.
826 */
827 uart_update_timeout(port, termios->c_cflag, baud);
828
829 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
830 if (termios->c_iflag & INPCK)
831 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
832 if (termios->c_iflag & (BRKINT | PARMRK))
833 up->port.read_status_mask |= UART_LSR_BI;
834
835 /*
836 * Characters to ignore
837 */
838 up->port.ignore_status_mask = 0;
839 if (termios->c_iflag & IGNPAR)
840 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
841 if (termios->c_iflag & IGNBRK) {
842 up->port.ignore_status_mask |= UART_LSR_BI;
843 /*
844 * If we're ignoring parity and break indicators,
845 * ignore overruns too (for real raw support).
846 */
847 if (termios->c_iflag & IGNPAR)
848 up->port.ignore_status_mask |= UART_LSR_OE;
849 }
850
851 /*
852 * ignore all characters if CREAD is not set
853 */
854 if ((termios->c_cflag & CREAD) == 0)
855 up->port.ignore_status_mask |= UART_LSR_DR;
856
857 /*
858 * Modem status interrupts
859 */
860 up->ier &= ~UART_IER_MSI;
861 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
862 up->ier |= UART_IER_MSI;
863 serial_out(up, UART_IER, up->ier);
864 serial_out(up, UART_LCR, cval); /* reset DLAB */
Govindraj.Rc538d202011-11-07 18:57:03 +0530865 up->lcr = cval;
Alexey Pelykh1776fd02013-02-04 12:19:46 -0500866 up->scr = 0;
Govindraj.Rb6126332010-09-27 20:20:49 +0530867
868 /* FIFOs and DMA Settings */
869
870 /* FCR can be changed only when the
871 * baud clock is not running
872 * DLL_REG and DLH_REG set to 0.
873 */
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800874 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530875 serial_out(up, UART_DLL, 0);
876 serial_out(up, UART_DLM, 0);
877 serial_out(up, UART_LCR, 0);
878
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800879 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530880
Russell King08bd4902012-10-05 13:54:53 +0100881 up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB;
Russell Kingd864c032012-10-06 00:51:17 +0100882 up->efr &= ~UART_EFR_SCD;
Govindraj.Rb6126332010-09-27 20:20:49 +0530883 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
884
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800885 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Russell King08bd4902012-10-05 13:54:53 +0100886 up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR;
Govindraj.Rb6126332010-09-27 20:20:49 +0530887 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
888 /* FIFO ENABLE, DMA MODE */
Paul Walmsley0ba5f662012-01-25 19:50:36 -0700889
Alexey Pelykh1f663962013-04-03 14:31:46 -0400890 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
891 /*
892 * NOTE: Setting OMAP_UART_SCR_RX_TRIG_GRANU1_MASK
893 * sets Enables the granularity of 1 for TRIGGER RX
894 * level. Along with setting RX FIFO trigger level
895 * to 1 (as noted below, 16 characters) and TLR[3:0]
896 * to zero this will result RX FIFO threshold level
897 * to 1 character, instead of 16 as noted in comment
898 * below.
899 */
900
Felipe Balbi6721ab72012-09-06 15:45:40 +0300901 /* Set receive FIFO threshold to 16 characters and
902 * transmit FIFO threshold to 16 spaces
903 */
Felipe Balbi49457432012-09-06 15:45:21 +0300904 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
Felipe Balbi6721ab72012-09-06 15:45:40 +0300905 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
906 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
907 UART_FCR_ENABLE_FIFO;
Greg Kroah-Hartman8a74e9f2012-01-26 11:15:18 -0800908
Paul Walmsley0ba5f662012-01-25 19:50:36 -0700909 serial_out(up, UART_FCR, up->fcr);
910 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
911
Govindraj.Rc538d202011-11-07 18:57:03 +0530912 serial_out(up, UART_OMAP_SCR, up->scr);
913
Russell King08bd4902012-10-05 13:54:53 +0100914 /* Reset UART_MCR_TCRTLR: this must be done with the EFR_ECB bit set */
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800915 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530916 serial_out(up, UART_MCR, up->mcr);
Russell King08bd4902012-10-05 13:54:53 +0100917 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
918 serial_out(up, UART_EFR, up->efr);
919 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
Govindraj.Rb6126332010-09-27 20:20:49 +0530920
921 /* Protocol, Baud Rate, and Interrupt Settings */
922
Govindraj.R94734742011-11-07 19:00:33 +0530923 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
924 serial_omap_mdr1_errataset(up, up->mdr1);
925 else
926 serial_out(up, UART_OMAP_MDR1, up->mdr1);
927
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800928 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530929 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
930
931 serial_out(up, UART_LCR, 0);
932 serial_out(up, UART_IER, 0);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800933 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530934
Govindraj.Rc538d202011-11-07 18:57:03 +0530935 serial_out(up, UART_DLL, up->dll); /* LS of divisor */
936 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
Govindraj.Rb6126332010-09-27 20:20:49 +0530937
938 serial_out(up, UART_LCR, 0);
939 serial_out(up, UART_IER, up->ier);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -0800940 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530941
942 serial_out(up, UART_EFR, up->efr);
943 serial_out(up, UART_LCR, cval);
944
Alexey Pelykh5fe21232013-01-16 05:08:06 -0500945 if (!serial_omap_baud_is_mode16(port, baud))
Govindraj.Rc538d202011-11-07 18:57:03 +0530946 up->mdr1 = UART_OMAP_MDR1_13X_MODE;
Govindraj.Rb6126332010-09-27 20:20:49 +0530947 else
Govindraj.Rc538d202011-11-07 18:57:03 +0530948 up->mdr1 = UART_OMAP_MDR1_16X_MODE;
949
Govindraj.R94734742011-11-07 19:00:33 +0530950 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
951 serial_omap_mdr1_errataset(up, up->mdr1);
952 else
953 serial_out(up, UART_OMAP_MDR1, up->mdr1);
Govindraj.Rb6126332010-09-27 20:20:49 +0530954
Russell Kingc533e512012-10-06 09:34:36 +0100955 /* Configure flow control */
Russell Kingc7d059c2012-10-06 09:12:44 +0100956 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +0530957
Russell Kingc533e512012-10-06 09:34:36 +0100958 /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */
959 serial_out(up, UART_XON1, termios->c_cc[VSTART]);
960 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
Govindraj.Rb6126332010-09-27 20:20:49 +0530961
Russell Kingc533e512012-10-06 09:34:36 +0100962 /* Enable access to TCR/TLR */
Russell Kingc7d059c2012-10-06 09:12:44 +0100963 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
964 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
965 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
Govindraj.Rb6126332010-09-27 20:20:49 +0530966
Russell Kingc7d059c2012-10-06 09:12:44 +0100967 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
Govindraj.Rb6126332010-09-27 20:20:49 +0530968
Russell King08bd4902012-10-05 13:54:53 +0100969 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) {
Russell King08bd4902012-10-05 13:54:53 +0100970 /* Enable AUTORTS and AUTOCTS */
971 up->efr |= UART_EFR_CTS | UART_EFR_RTS;
972
Russell King1fe8aa82012-10-06 09:04:03 +0100973 /* Ensure MCR RTS is asserted */
974 up->mcr |= UART_MCR_RTS;
Russell King0d5b1662012-10-05 23:48:28 +0100975 } else {
976 /* Disable AUTORTS and AUTOCTS */
977 up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS);
Govindraj.Rb6126332010-09-27 20:20:49 +0530978 }
979
Russell King01d70bb2012-10-15 16:50:59 +0100980 if (up->port.flags & UPF_SOFT_FLOW) {
Russell King01d70bb2012-10-15 16:50:59 +0100981 /* clear SW control mode bits */
982 up->efr &= OMAP_UART_SW_CLR;
983
984 /*
985 * IXON Flag:
Russell King01d70bb2012-10-15 16:50:59 +0100986 * Enable XON/XOFF flow control on input.
987 * Receiver compares XON1, XOFF1.
988 */
Russell King3af08bd2012-10-05 13:32:08 +0100989 if (termios->c_iflag & IXON)
Russell King01d70bb2012-10-15 16:50:59 +0100990 up->efr |= OMAP_UART_SW_RX;
991
Russell King01d70bb2012-10-15 16:50:59 +0100992 /*
Russell King3af08bd2012-10-05 13:32:08 +0100993 * IXOFF Flag:
994 * Enable XON/XOFF flow control on output.
995 * Transmit XON1, XOFF1
996 */
997 if (termios->c_iflag & IXOFF)
998 up->efr |= OMAP_UART_SW_TX;
999
1000 /*
Russell King01d70bb2012-10-15 16:50:59 +01001001 * IXANY Flag:
1002 * Enable any character to restart output.
1003 * Operation resumes after receiving any
1004 * character after recognition of the XOFF character
1005 */
1006 if (termios->c_iflag & IXANY)
1007 up->mcr |= UART_MCR_XONANY;
1008 else
1009 up->mcr &= ~UART_MCR_XONANY;
Russell King01d70bb2012-10-15 16:50:59 +01001010 }
Russell Kingc7d059c2012-10-06 09:12:44 +01001011 serial_out(up, UART_MCR, up->mcr);
Russell King18f360f2012-10-06 09:08:20 +01001012 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1013 serial_out(up, UART_EFR, up->efr);
1014 serial_out(up, UART_LCR, up->lcr);
1015
Govindraj.Rb6126332010-09-27 20:20:49 +05301016 serial_omap_set_mctrl(&up->port, up->port.mctrl);
Govindraj.Rb6126332010-09-27 20:20:49 +05301017
1018 spin_unlock_irqrestore(&up->port.lock, flags);
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001019 pm_runtime_mark_last_busy(up->dev);
1020 pm_runtime_put_autosuspend(up->dev);
Rajendra Nayakba774332011-12-14 17:25:43 +05301021 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +05301022}
1023
Felipe Balbi9727faf2012-09-06 15:45:35 +03001024static int serial_omap_set_wake(struct uart_port *port, unsigned int state)
1025{
1026 struct uart_omap_port *up = to_uart_omap_port(port);
1027
1028 serial_omap_enable_wakeup(up, state);
1029
1030 return 0;
1031}
1032
Govindraj.Rb6126332010-09-27 20:20:49 +05301033static void
1034serial_omap_pm(struct uart_port *port, unsigned int state,
1035 unsigned int oldstate)
1036{
Felipe Balbic990f352012-08-23 13:32:41 +03001037 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301038 unsigned char efr;
1039
Rajendra Nayakba774332011-12-14 17:25:43 +05301040 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301041
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001042 pm_runtime_get_sync(up->dev);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -08001043 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +05301044 efr = serial_in(up, UART_EFR);
1045 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
1046 serial_out(up, UART_LCR, 0);
1047
1048 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
Andrei Emeltchenko662b083a2010-11-30 14:11:49 -08001049 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
Govindraj.Rb6126332010-09-27 20:20:49 +05301050 serial_out(up, UART_EFR, efr);
1051 serial_out(up, UART_LCR, 0);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301052
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001053 if (!device_may_wakeup(up->dev)) {
Govindraj.Rfcdca752011-02-28 18:12:23 +05301054 if (!state)
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001055 pm_runtime_forbid(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301056 else
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001057 pm_runtime_allow(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301058 }
1059
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001060 pm_runtime_mark_last_busy(up->dev);
1061 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301062}
1063
1064static void serial_omap_release_port(struct uart_port *port)
1065{
1066 dev_dbg(port->dev, "serial_omap_release_port+\n");
1067}
1068
1069static int serial_omap_request_port(struct uart_port *port)
1070{
1071 dev_dbg(port->dev, "serial_omap_request_port+\n");
1072 return 0;
1073}
1074
1075static void serial_omap_config_port(struct uart_port *port, int flags)
1076{
Felipe Balbic990f352012-08-23 13:32:41 +03001077 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301078
1079 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
Rajendra Nayakba774332011-12-14 17:25:43 +05301080 up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +05301081 up->port.type = PORT_OMAP;
Russell King3af08bd2012-10-05 13:32:08 +01001082 up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW;
Govindraj.Rb6126332010-09-27 20:20:49 +05301083}
1084
1085static int
1086serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
1087{
1088 /* we don't want the core code to modify any port params */
1089 dev_dbg(port->dev, "serial_omap_verify_port+\n");
1090 return -EINVAL;
1091}
1092
1093static const char *
1094serial_omap_type(struct uart_port *port)
1095{
Felipe Balbic990f352012-08-23 13:32:41 +03001096 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301097
Rajendra Nayakba774332011-12-14 17:25:43 +05301098 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
Govindraj.Rb6126332010-09-27 20:20:49 +05301099 return up->name;
1100}
1101
Govindraj.Rb6126332010-09-27 20:20:49 +05301102#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1103
1104static inline void wait_for_xmitr(struct uart_omap_port *up)
1105{
1106 unsigned int status, tmout = 10000;
1107
1108 /* Wait up to 10ms for the character(s) to be sent. */
1109 do {
1110 status = serial_in(up, UART_LSR);
1111
1112 if (status & UART_LSR_BI)
1113 up->lsr_break_flag = UART_LSR_BI;
1114
1115 if (--tmout == 0)
1116 break;
1117 udelay(1);
1118 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1119
1120 /* Wait up to 1s for flow control if necessary */
1121 if (up->port.flags & UPF_CONS_FLOW) {
1122 tmout = 1000000;
1123 for (tmout = 1000000; tmout; tmout--) {
1124 unsigned int msr = serial_in(up, UART_MSR);
1125
1126 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1127 if (msr & UART_MSR_CTS)
1128 break;
1129
1130 udelay(1);
1131 }
1132 }
1133}
1134
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001135#ifdef CONFIG_CONSOLE_POLL
1136
1137static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
1138{
Felipe Balbic990f352012-08-23 13:32:41 +03001139 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301140
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001141 pm_runtime_get_sync(up->dev);
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001142 wait_for_xmitr(up);
1143 serial_out(up, UART_TX, ch);
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001144 pm_runtime_mark_last_busy(up->dev);
1145 pm_runtime_put_autosuspend(up->dev);
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001146}
1147
1148static int serial_omap_poll_get_char(struct uart_port *port)
1149{
Felipe Balbic990f352012-08-23 13:32:41 +03001150 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301151 unsigned int status;
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001152
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001153 pm_runtime_get_sync(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301154 status = serial_in(up, UART_LSR);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001155 if (!(status & UART_LSR_DR)) {
1156 status = NO_POLL_CHAR;
1157 goto out;
1158 }
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001159
Govindraj.Rfcdca752011-02-28 18:12:23 +05301160 status = serial_in(up, UART_RX);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001161
1162out:
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001163 pm_runtime_mark_last_busy(up->dev);
1164 pm_runtime_put_autosuspend(up->dev);
Felipe Balbia6b19c32012-09-06 15:45:36 +03001165
Govindraj.Rfcdca752011-02-28 18:12:23 +05301166 return status;
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001167}
1168
1169#endif /* CONFIG_CONSOLE_POLL */
1170
1171#ifdef CONFIG_SERIAL_OMAP_CONSOLE
1172
Shubhrajyoti D40477d02012-10-03 17:24:38 +05301173static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS];
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001174
1175static struct uart_driver serial_omap_reg;
1176
Govindraj.Rb6126332010-09-27 20:20:49 +05301177static void serial_omap_console_putchar(struct uart_port *port, int ch)
1178{
Felipe Balbic990f352012-08-23 13:32:41 +03001179 struct uart_omap_port *up = to_uart_omap_port(port);
Govindraj.Rb6126332010-09-27 20:20:49 +05301180
1181 wait_for_xmitr(up);
1182 serial_out(up, UART_TX, ch);
1183}
1184
1185static void
1186serial_omap_console_write(struct console *co, const char *s,
1187 unsigned int count)
1188{
1189 struct uart_omap_port *up = serial_omap_console_ports[co->index];
1190 unsigned long flags;
1191 unsigned int ier;
1192 int locked = 1;
1193
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001194 pm_runtime_get_sync(up->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301195
Govindraj.Rb6126332010-09-27 20:20:49 +05301196 local_irq_save(flags);
1197 if (up->port.sysrq)
1198 locked = 0;
1199 else if (oops_in_progress)
1200 locked = spin_trylock(&up->port.lock);
1201 else
1202 spin_lock(&up->port.lock);
1203
1204 /*
1205 * First save the IER then disable the interrupts
1206 */
1207 ier = serial_in(up, UART_IER);
1208 serial_out(up, UART_IER, 0);
1209
1210 uart_console_write(&up->port, s, count, serial_omap_console_putchar);
1211
1212 /*
1213 * Finally, wait for transmitter to become empty
1214 * and restore the IER
1215 */
1216 wait_for_xmitr(up);
1217 serial_out(up, UART_IER, ier);
1218 /*
1219 * The receive handling will happen properly because the
1220 * receive ready bit will still be set; it is not cleared
1221 * on read. However, modem control will not, we must
1222 * call it if we have saved something in the saved flags
1223 * while processing with interrupts off.
1224 */
1225 if (up->msr_saved_flags)
1226 check_modem_status(up);
1227
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001228 pm_runtime_mark_last_busy(up->dev);
1229 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301230 if (locked)
1231 spin_unlock(&up->port.lock);
1232 local_irq_restore(flags);
1233}
1234
1235static int __init
1236serial_omap_console_setup(struct console *co, char *options)
1237{
1238 struct uart_omap_port *up;
1239 int baud = 115200;
1240 int bits = 8;
1241 int parity = 'n';
1242 int flow = 'n';
1243
1244 if (serial_omap_console_ports[co->index] == NULL)
1245 return -ENODEV;
1246 up = serial_omap_console_ports[co->index];
1247
1248 if (options)
1249 uart_parse_options(options, &baud, &parity, &bits, &flow);
1250
1251 return uart_set_options(&up->port, co, baud, parity, bits, flow);
1252}
1253
1254static struct console serial_omap_console = {
1255 .name = OMAP_SERIAL_NAME,
1256 .write = serial_omap_console_write,
1257 .device = uart_console_device,
1258 .setup = serial_omap_console_setup,
1259 .flags = CON_PRINTBUFFER,
1260 .index = -1,
1261 .data = &serial_omap_reg,
1262};
1263
1264static void serial_omap_add_console_port(struct uart_omap_port *up)
1265{
Rajendra Nayakba774332011-12-14 17:25:43 +05301266 serial_omap_console_ports[up->port.line] = up;
Govindraj.Rb6126332010-09-27 20:20:49 +05301267}
1268
1269#define OMAP_CONSOLE (&serial_omap_console)
1270
1271#else
1272
1273#define OMAP_CONSOLE NULL
1274
1275static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1276{}
1277
1278#endif
1279
1280static struct uart_ops serial_omap_pops = {
1281 .tx_empty = serial_omap_tx_empty,
1282 .set_mctrl = serial_omap_set_mctrl,
1283 .get_mctrl = serial_omap_get_mctrl,
1284 .stop_tx = serial_omap_stop_tx,
1285 .start_tx = serial_omap_start_tx,
Russell King3af08bd2012-10-05 13:32:08 +01001286 .throttle = serial_omap_throttle,
1287 .unthrottle = serial_omap_unthrottle,
Govindraj.Rb6126332010-09-27 20:20:49 +05301288 .stop_rx = serial_omap_stop_rx,
1289 .enable_ms = serial_omap_enable_ms,
1290 .break_ctl = serial_omap_break_ctl,
1291 .startup = serial_omap_startup,
1292 .shutdown = serial_omap_shutdown,
1293 .set_termios = serial_omap_set_termios,
1294 .pm = serial_omap_pm,
Felipe Balbi9727faf2012-09-06 15:45:35 +03001295 .set_wake = serial_omap_set_wake,
Govindraj.Rb6126332010-09-27 20:20:49 +05301296 .type = serial_omap_type,
1297 .release_port = serial_omap_release_port,
1298 .request_port = serial_omap_request_port,
1299 .config_port = serial_omap_config_port,
1300 .verify_port = serial_omap_verify_port,
Cosmin Cojocar1b41dbc2010-12-05 16:15:10 +01001301#ifdef CONFIG_CONSOLE_POLL
1302 .poll_put_char = serial_omap_poll_put_char,
1303 .poll_get_char = serial_omap_poll_get_char,
1304#endif
Govindraj.Rb6126332010-09-27 20:20:49 +05301305};
1306
1307static struct uart_driver serial_omap_reg = {
1308 .owner = THIS_MODULE,
1309 .driver_name = "OMAP-SERIAL",
1310 .dev_name = OMAP_SERIAL_NAME,
1311 .nr = OMAP_MAX_HSUART_PORTS,
1312 .cons = OMAP_CONSOLE,
1313};
1314
Shubhrajyoti D3bc4f0d2012-01-16 15:52:36 +05301315#ifdef CONFIG_PM_SLEEP
Sourav Poddarddd85e22013-05-15 21:05:38 +05301316static int serial_omap_prepare(struct device *dev)
1317{
1318 struct uart_omap_port *up = dev_get_drvdata(dev);
1319
1320 up->is_suspending = true;
1321
1322 return 0;
1323}
1324
1325static void serial_omap_complete(struct device *dev)
1326{
1327 struct uart_omap_port *up = dev_get_drvdata(dev);
1328
1329 up->is_suspending = false;
1330}
1331
Govindraj.Rfcdca752011-02-28 18:12:23 +05301332static int serial_omap_suspend(struct device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301333{
Govindraj.Rfcdca752011-02-28 18:12:23 +05301334 struct uart_omap_port *up = dev_get_drvdata(dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301335
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301336 uart_suspend_port(&serial_omap_reg, &up->port);
Linus Torvalds033d9952012-10-02 09:54:49 -07001337 flush_work(&up->qos_work);
Govindraj.R2fd14962011-11-09 17:41:21 +05301338
Govindraj.Rb6126332010-09-27 20:20:49 +05301339 return 0;
1340}
1341
Govindraj.Rfcdca752011-02-28 18:12:23 +05301342static int serial_omap_resume(struct device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301343{
Govindraj.Rfcdca752011-02-28 18:12:23 +05301344 struct uart_omap_port *up = dev_get_drvdata(dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301345
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301346 uart_resume_port(&serial_omap_reg, &up->port);
1347
Govindraj.Rb6126332010-09-27 20:20:49 +05301348 return 0;
1349}
Sourav Poddarddd85e22013-05-15 21:05:38 +05301350#else
1351#define serial_omap_prepare NULL
1352#define serial_omap_prepare NULL
1353#endif /* CONFIG_PM_SLEEP */
Govindraj.Rb6126332010-09-27 20:20:49 +05301354
Bill Pemberton9671f092012-11-19 13:21:50 -05001355static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301356{
1357 u32 mvr, scheme;
1358 u16 revision, major, minor;
1359
1360 mvr = serial_in(up, UART_OMAP_MVER);
1361
1362 /* Check revision register scheme */
1363 scheme = mvr >> OMAP_UART_MVR_SCHEME_SHIFT;
1364
1365 switch (scheme) {
1366 case 0: /* Legacy Scheme: OMAP2/3 */
1367 /* MINOR_REV[0:4], MAJOR_REV[4:7] */
1368 major = (mvr & OMAP_UART_LEGACY_MVR_MAJ_MASK) >>
1369 OMAP_UART_LEGACY_MVR_MAJ_SHIFT;
1370 minor = (mvr & OMAP_UART_LEGACY_MVR_MIN_MASK);
1371 break;
1372 case 1:
1373 /* New Scheme: OMAP4+ */
1374 /* MINOR_REV[0:5], MAJOR_REV[8:10] */
1375 major = (mvr & OMAP_UART_MVR_MAJ_MASK) >>
1376 OMAP_UART_MVR_MAJ_SHIFT;
1377 minor = (mvr & OMAP_UART_MVR_MIN_MASK);
1378 break;
1379 default:
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001380 dev_warn(up->dev,
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301381 "Unknown %s revision, defaulting to highest\n",
1382 up->name);
1383 /* highest possible revision */
1384 major = 0xff;
1385 minor = 0xff;
1386 }
1387
1388 /* normalize revision for the driver */
1389 revision = UART_BUILD_REVISION(major, minor);
1390
1391 switch (revision) {
1392 case OMAP_UART_REV_46:
1393 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1394 UART_ERRATA_i291_DMA_FORCEIDLE);
1395 break;
1396 case OMAP_UART_REV_52:
1397 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS |
1398 UART_ERRATA_i291_DMA_FORCEIDLE);
1399 break;
1400 case OMAP_UART_REV_63:
1401 up->errata |= UART_ERRATA_i202_MDR1_ACCESS;
1402 break;
1403 default:
1404 break;
1405 }
1406}
1407
Bill Pemberton9671f092012-11-19 13:21:50 -05001408static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301409{
1410 struct omap_uart_port_info *omap_up_info;
1411
1412 omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
1413 if (!omap_up_info)
1414 return NULL; /* out of memory */
1415
1416 of_property_read_u32(dev->of_node, "clock-frequency",
1417 &omap_up_info->uartclk);
1418 return omap_up_info;
1419}
1420
Bill Pemberton9671f092012-11-19 13:21:50 -05001421static int serial_omap_probe(struct platform_device *pdev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301422{
1423 struct uart_omap_port *up;
Felipe Balbi49457432012-09-06 15:45:21 +03001424 struct resource *mem, *irq;
Govindraj.Rb6126332010-09-27 20:20:49 +05301425 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
NeilBrown9574f362012-07-30 10:30:26 +10001426 int ret;
Govindraj.Rb6126332010-09-27 20:20:49 +05301427
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301428 if (pdev->dev.of_node)
1429 omap_up_info = of_get_uart_port_info(&pdev->dev);
1430
Govindraj.Rb6126332010-09-27 20:20:49 +05301431 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1432 if (!mem) {
1433 dev_err(&pdev->dev, "no mem resource?\n");
1434 return -ENODEV;
1435 }
1436
1437 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1438 if (!irq) {
1439 dev_err(&pdev->dev, "no irq resource?\n");
1440 return -ENODEV;
1441 }
1442
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301443 if (!devm_request_mem_region(&pdev->dev, mem->start, resource_size(mem),
Joe Perches28f65c112011-06-09 09:13:32 -07001444 pdev->dev.driver->name)) {
Govindraj.Rb6126332010-09-27 20:20:49 +05301445 dev_err(&pdev->dev, "memory region already claimed\n");
1446 return -EBUSY;
1447 }
1448
NeilBrown9574f362012-07-30 10:30:26 +10001449 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1450 omap_up_info->DTR_present) {
1451 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial");
1452 if (ret < 0)
1453 return ret;
1454 ret = gpio_direction_output(omap_up_info->DTR_gpio,
1455 omap_up_info->DTR_inverted);
1456 if (ret < 0)
1457 return ret;
1458 }
1459
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301460 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL);
1461 if (!up)
1462 return -ENOMEM;
1463
NeilBrown9574f362012-07-30 10:30:26 +10001464 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1465 omap_up_info->DTR_present) {
1466 up->DTR_gpio = omap_up_info->DTR_gpio;
1467 up->DTR_inverted = omap_up_info->DTR_inverted;
1468 } else
1469 up->DTR_gpio = -EINVAL;
1470 up->DTR_active = 0;
1471
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001472 up->dev = &pdev->dev;
Govindraj.Rb6126332010-09-27 20:20:49 +05301473 up->port.dev = &pdev->dev;
1474 up->port.type = PORT_OMAP;
1475 up->port.iotype = UPIO_MEM;
1476 up->port.irq = irq->start;
1477
1478 up->port.regshift = 2;
1479 up->port.fifosize = 64;
1480 up->port.ops = &serial_omap_pops;
Govindraj.Rb6126332010-09-27 20:20:49 +05301481
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301482 if (pdev->dev.of_node)
1483 up->port.line = of_alias_get_id(pdev->dev.of_node, "serial");
1484 else
1485 up->port.line = pdev->id;
1486
1487 if (up->port.line < 0) {
1488 dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
1489 up->port.line);
1490 ret = -ENODEV;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301491 goto err_port_line;
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301492 }
1493
Tony Lindgren3dbc5ce2012-09-07 10:59:40 -07001494 up->pins = devm_pinctrl_get_select_default(&pdev->dev);
1495 if (IS_ERR(up->pins)) {
1496 dev_warn(&pdev->dev, "did not get pins for uart%i error: %li\n",
1497 up->port.line, PTR_ERR(up->pins));
1498 up->pins = NULL;
1499 }
1500
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301501 sprintf(up->name, "OMAP UART%d", up->port.line);
Govindraj.Redd70ad2011-10-11 14:55:41 +05301502 up->port.mapbase = mem->start;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301503 up->port.membase = devm_ioremap(&pdev->dev, mem->start,
1504 resource_size(mem));
Govindraj.Redd70ad2011-10-11 14:55:41 +05301505 if (!up->port.membase) {
1506 dev_err(&pdev->dev, "can't ioremap UART\n");
1507 ret = -ENOMEM;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301508 goto err_ioremap;
Govindraj.Redd70ad2011-10-11 14:55:41 +05301509 }
1510
Govindraj.Rb6126332010-09-27 20:20:49 +05301511 up->port.flags = omap_up_info->flags;
Govindraj.Rb6126332010-09-27 20:20:49 +05301512 up->port.uartclk = omap_up_info->uartclk;
Rajendra Nayak8fe789d2011-12-14 17:25:44 +05301513 if (!up->port.uartclk) {
1514 up->port.uartclk = DEFAULT_CLK_SPEED;
1515 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1516 "%d\n", DEFAULT_CLK_SPEED);
1517 }
Govindraj.Rb6126332010-09-27 20:20:49 +05301518
Govindraj.R2fd14962011-11-09 17:41:21 +05301519 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1520 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1521 pm_qos_add_request(&up->pm_qos_request,
1522 PM_QOS_CPU_DMA_LATENCY, up->latency);
1523 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1524 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1525
Felipe Balbi93220dc2012-09-06 15:45:27 +03001526 platform_set_drvdata(pdev, up);
Ruchika Kharwar856e35b2012-09-06 15:45:31 +03001527 pm_runtime_enable(&pdev->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301528 pm_runtime_use_autosuspend(&pdev->dev);
1529 pm_runtime_set_autosuspend_delay(&pdev->dev,
Deepak Kc86845db2011-11-09 17:33:38 +05301530 omap_up_info->autosuspend_timeout);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301531
1532 pm_runtime_irq_safe(&pdev->dev);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301533 pm_runtime_get_sync(&pdev->dev);
1534
Govindraj.R7c77c8d2012-04-03 19:12:34 +05301535 omap_serial_fill_features_erratas(up);
1536
Rajendra Nayakba774332011-12-14 17:25:43 +05301537 ui[up->port.line] = up;
Govindraj.Rb6126332010-09-27 20:20:49 +05301538 serial_omap_add_console_port(up);
1539
1540 ret = uart_add_one_port(&serial_omap_reg, &up->port);
1541 if (ret != 0)
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301542 goto err_add_port;
Govindraj.Rb6126332010-09-27 20:20:49 +05301543
Felipe Balbi660ac5f2012-09-06 15:45:26 +03001544 pm_runtime_mark_last_busy(up->dev);
1545 pm_runtime_put_autosuspend(up->dev);
Govindraj.Rb6126332010-09-27 20:20:49 +05301546 return 0;
Shubhrajyoti D388bc262012-03-21 17:22:22 +05301547
1548err_add_port:
1549 pm_runtime_put(&pdev->dev);
1550 pm_runtime_disable(&pdev->dev);
1551err_ioremap:
1552err_port_line:
Govindraj.Rb6126332010-09-27 20:20:49 +05301553 dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1554 pdev->id, __func__, ret);
Govindraj.Rb6126332010-09-27 20:20:49 +05301555 return ret;
1556}
1557
Bill Pembertonae8d8a12012-11-19 13:26:18 -05001558static int serial_omap_remove(struct platform_device *dev)
Govindraj.Rb6126332010-09-27 20:20:49 +05301559{
1560 struct uart_omap_port *up = platform_get_drvdata(dev);
1561
Felipe Balbi7e9c8e72012-09-06 15:45:29 +03001562 pm_runtime_put_sync(up->dev);
Felipe Balbi1b42c8b2012-09-06 15:45:28 +03001563 pm_runtime_disable(up->dev);
1564 uart_remove_one_port(&serial_omap_reg, &up->port);
1565 pm_qos_remove_request(&up->pm_qos_request);
Govindraj.Rfcdca752011-02-28 18:12:23 +05301566
Govindraj.Rb6126332010-09-27 20:20:49 +05301567 return 0;
1568}
1569
Govindraj.R94734742011-11-07 19:00:33 +05301570/*
1571 * Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
1572 * The access to uart register after MDR1 Access
1573 * causes UART to corrupt data.
1574 *
1575 * Need a delay =
1576 * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
1577 * give 10 times as much
1578 */
1579static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1580{
1581 u8 timeout = 255;
1582
1583 serial_out(up, UART_OMAP_MDR1, mdr1);
1584 udelay(2);
1585 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
1586 UART_FCR_CLEAR_RCVR);
1587 /*
1588 * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
1589 * TX_FIFO_E bit is 1.
1590 */
1591 while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
1592 (UART_LSR_THRE | UART_LSR_DR))) {
1593 timeout--;
1594 if (!timeout) {
1595 /* Should *never* happen. we warn and carry on */
Felipe Balbid8ee4ea2012-09-06 15:45:20 +03001596 dev_crit(up->dev, "Errata i202: timedout %x\n",
Govindraj.R94734742011-11-07 19:00:33 +05301597 serial_in(up, UART_LSR));
1598 break;
1599 }
1600 udelay(1);
1601 }
1602}
1603
Shubhrajyoti Db5148852012-01-16 15:52:37 +05301604#ifdef CONFIG_PM_RUNTIME
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301605static void serial_omap_restore_context(struct uart_omap_port *up)
1606{
Govindraj.R94734742011-11-07 19:00:33 +05301607 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1608 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
1609 else
1610 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
1611
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301612 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
1613 serial_out(up, UART_EFR, UART_EFR_ECB);
1614 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1615 serial_out(up, UART_IER, 0x0);
1616 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
Govindraj.Rc538d202011-11-07 18:57:03 +05301617 serial_out(up, UART_DLL, up->dll);
1618 serial_out(up, UART_DLM, up->dlh);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301619 serial_out(up, UART_LCR, 0x0); /* Operational mode */
1620 serial_out(up, UART_IER, up->ier);
1621 serial_out(up, UART_FCR, up->fcr);
1622 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1623 serial_out(up, UART_MCR, up->mcr);
1624 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
Govindraj.Rc538d202011-11-07 18:57:03 +05301625 serial_out(up, UART_OMAP_SCR, up->scr);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301626 serial_out(up, UART_EFR, up->efr);
1627 serial_out(up, UART_LCR, up->lcr);
Govindraj.R94734742011-11-07 19:00:33 +05301628 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
1629 serial_omap_mdr1_errataset(up, up->mdr1);
1630 else
1631 serial_out(up, UART_OMAP_MDR1, up->mdr1);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301632}
1633
Govindraj.Rfcdca752011-02-28 18:12:23 +05301634static int serial_omap_runtime_suspend(struct device *dev)
1635{
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301636 struct uart_omap_port *up = dev_get_drvdata(dev);
1637 struct omap_uart_port_info *pdata = dev->platform_data;
1638
Sourav Poddarddd85e22013-05-15 21:05:38 +05301639 /*
1640 * When using 'no_console_suspend', the console UART must not be
1641 * suspended. Since driver suspend is managed by runtime suspend,
1642 * preventing runtime suspend (by returning error) will keep device
1643 * active during suspend.
1644 */
1645 if (up->is_suspending && !console_suspend_enabled &&
1646 uart_console(&up->port))
1647 return -EBUSY;
1648
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301649 if (!up)
1650 return -EINVAL;
1651
Felipe Balbie5b57c02012-08-23 13:32:42 +03001652 if (!pdata)
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301653 return 0;
1654
Felipe Balbie5b57c02012-08-23 13:32:42 +03001655 up->context_loss_cnt = serial_omap_get_context_loss_count(up);
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301656
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301657 if (device_may_wakeup(dev)) {
1658 if (!up->wakeups_enabled) {
Felipe Balbie5b57c02012-08-23 13:32:42 +03001659 serial_omap_enable_wakeup(up, true);
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301660 up->wakeups_enabled = true;
1661 }
1662 } else {
1663 if (up->wakeups_enabled) {
Felipe Balbie5b57c02012-08-23 13:32:42 +03001664 serial_omap_enable_wakeup(up, false);
Govindraj.R62f3ec5f2011-10-13 14:11:09 +05301665 up->wakeups_enabled = false;
1666 }
1667 }
1668
Govindraj.R2fd14962011-11-09 17:41:21 +05301669 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1670 schedule_work(&up->qos_work);
1671
Govindraj.Rfcdca752011-02-28 18:12:23 +05301672 return 0;
1673}
1674
1675static int serial_omap_runtime_resume(struct device *dev)
1676{
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301677 struct uart_omap_port *up = dev_get_drvdata(dev);
1678
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301679 int loss_cnt = serial_omap_get_context_loss_count(up);
Govindraj.Rec3bebc2011-10-11 19:11:27 +05301680
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301681 if (loss_cnt < 0) {
1682 dev_err(dev, "serial_omap_get_context_loss_count failed : %d\n",
1683 loss_cnt);
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301684 serial_omap_restore_context(up);
Shubhrajyoti D39aee512012-10-03 17:24:36 +05301685 } else if (up->context_loss_cnt != loss_cnt) {
1686 serial_omap_restore_context(up);
1687 }
Sourav Poddarac57e7f2012-09-18 17:05:54 +05301688 up->latency = up->calc_latency;
1689 schedule_work(&up->qos_work);
Govindraj.R9f9ac1e2011-11-07 18:56:12 +05301690
Govindraj.Rfcdca752011-02-28 18:12:23 +05301691 return 0;
1692}
1693#endif
1694
1695static const struct dev_pm_ops serial_omap_dev_pm_ops = {
1696 SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
1697 SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
1698 serial_omap_runtime_resume, NULL)
Sourav Poddarddd85e22013-05-15 21:05:38 +05301699 .prepare = serial_omap_prepare,
1700 .complete = serial_omap_complete,
Govindraj.Rfcdca752011-02-28 18:12:23 +05301701};
1702
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301703#if defined(CONFIG_OF)
1704static const struct of_device_id omap_serial_of_match[] = {
1705 { .compatible = "ti,omap2-uart" },
1706 { .compatible = "ti,omap3-uart" },
1707 { .compatible = "ti,omap4-uart" },
1708 {},
1709};
1710MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1711#endif
1712
Govindraj.Rb6126332010-09-27 20:20:49 +05301713static struct platform_driver serial_omap_driver = {
1714 .probe = serial_omap_probe,
Bill Pemberton2d47b712012-11-19 13:21:34 -05001715 .remove = serial_omap_remove,
Govindraj.Rb6126332010-09-27 20:20:49 +05301716 .driver = {
1717 .name = DRIVER_NAME,
Govindraj.Rfcdca752011-02-28 18:12:23 +05301718 .pm = &serial_omap_dev_pm_ops,
Rajendra Nayakd92b0df2011-12-14 17:25:45 +05301719 .of_match_table = of_match_ptr(omap_serial_of_match),
Govindraj.Rb6126332010-09-27 20:20:49 +05301720 },
1721};
1722
1723static int __init serial_omap_init(void)
1724{
1725 int ret;
1726
1727 ret = uart_register_driver(&serial_omap_reg);
1728 if (ret != 0)
1729 return ret;
1730 ret = platform_driver_register(&serial_omap_driver);
1731 if (ret != 0)
1732 uart_unregister_driver(&serial_omap_reg);
1733 return ret;
1734}
1735
1736static void __exit serial_omap_exit(void)
1737{
1738 platform_driver_unregister(&serial_omap_driver);
1739 uart_unregister_driver(&serial_omap_reg);
1740}
1741
1742module_init(serial_omap_init);
1743module_exit(serial_omap_exit);
1744
1745MODULE_DESCRIPTION("OMAP High Speed UART driver");
1746MODULE_LICENSE("GPL");
1747MODULE_AUTHOR("Texas Instruments Inc");