blob: 99805fd3d1109ee7490ecc2aee50eb2986e180c0 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
273 span_entry->ref_count++;
274 return span_entry;
275 }
276
277 return mlxsw_sp_span_entry_create(port);
278}
279
280static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
282{
283 if (--span_entry->ref_count == 0)
284 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
285 return 0;
286}
287
288static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
289{
290 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
291 struct mlxsw_sp_span_inspected_port *p;
292 int i;
293
294 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
295 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
296
297 list_for_each_entry(p, &curr->bound_ports_list, list)
298 if (p->local_port == port->local_port &&
299 p->type == MLXSW_SP_SPAN_EGRESS)
300 return true;
301 }
302
303 return false;
304}
305
306static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
307{
308 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
309}
310
311static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
312{
313 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
314 char sbib_pl[MLXSW_REG_SBIB_LEN];
315 int err;
316
317 /* If port is egress mirrored, the shared buffer size should be
318 * updated according to the mtu value
319 */
320 if (mlxsw_sp_span_is_egress_mirror(port)) {
321 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
322 mlxsw_sp_span_mtu_to_buffsize(mtu));
323 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
324 if (err) {
325 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
326 return err;
327 }
328 }
329
330 return 0;
331}
332
333static struct mlxsw_sp_span_inspected_port *
334mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
335 struct mlxsw_sp_span_entry *span_entry)
336{
337 struct mlxsw_sp_span_inspected_port *p;
338
339 list_for_each_entry(p, &span_entry->bound_ports_list, list)
340 if (port->local_port == p->local_port)
341 return p;
342 return NULL;
343}
344
345static int
346mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
347 struct mlxsw_sp_span_entry *span_entry,
348 enum mlxsw_sp_span_type type)
349{
350 struct mlxsw_sp_span_inspected_port *inspected_port;
351 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
352 char mpar_pl[MLXSW_REG_MPAR_LEN];
353 char sbib_pl[MLXSW_REG_SBIB_LEN];
354 int pa_id = span_entry->id;
355 int err;
356
357 /* if it is an egress SPAN, bind a shared buffer to it */
358 if (type == MLXSW_SP_SPAN_EGRESS) {
359 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
360 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
361 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
362 if (err) {
363 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
364 return err;
365 }
366 }
367
368 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200369 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
370 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200371 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
372 if (err)
373 goto err_mpar_reg_write;
374
375 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
376 if (!inspected_port) {
377 err = -ENOMEM;
378 goto err_inspected_port_alloc;
379 }
380 inspected_port->local_port = port->local_port;
381 inspected_port->type = type;
382 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
383
384 return 0;
385
386err_mpar_reg_write:
387err_inspected_port_alloc:
388 if (type == MLXSW_SP_SPAN_EGRESS) {
389 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
390 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
391 }
392 return err;
393}
394
395static void
396mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
397 struct mlxsw_sp_span_entry *span_entry,
398 enum mlxsw_sp_span_type type)
399{
400 struct mlxsw_sp_span_inspected_port *inspected_port;
401 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
402 char mpar_pl[MLXSW_REG_MPAR_LEN];
403 char sbib_pl[MLXSW_REG_SBIB_LEN];
404 int pa_id = span_entry->id;
405
406 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
407 if (!inspected_port)
408 return;
409
410 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200411 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
412 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
414
415 /* remove the SBIB buffer if it was egress SPAN */
416 if (type == MLXSW_SP_SPAN_EGRESS) {
417 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
418 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
419 }
420
421 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
422
423 list_del(&inspected_port->list);
424 kfree(inspected_port);
425}
426
427static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
428 struct mlxsw_sp_port *to,
429 enum mlxsw_sp_span_type type)
430{
431 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
432 struct mlxsw_sp_span_entry *span_entry;
433 int err;
434
435 span_entry = mlxsw_sp_span_entry_get(to);
436 if (!span_entry)
437 return -ENOENT;
438
439 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
440 span_entry->id);
441
442 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
443 if (err)
444 goto err_port_bind;
445
446 return 0;
447
448err_port_bind:
449 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
450 return err;
451}
452
453static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
454 struct mlxsw_sp_port *to,
455 enum mlxsw_sp_span_type type)
456{
457 struct mlxsw_sp_span_entry *span_entry;
458
459 span_entry = mlxsw_sp_span_entry_find(to);
460 if (!span_entry) {
461 netdev_err(from->dev, "no span entry found\n");
462 return;
463 }
464
465 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
466 span_entry->id);
467 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
468}
469
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200470static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
471 bool is_up)
472{
473 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
474 char paos_pl[MLXSW_REG_PAOS_LEN];
475
476 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
477 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
478 MLXSW_PORT_ADMIN_STATUS_DOWN);
479 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
480}
481
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200482static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
483 unsigned char *addr)
484{
485 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
486 char ppad_pl[MLXSW_REG_PPAD_LEN];
487
488 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
489 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
491}
492
493static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
494{
495 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
496 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
497
498 ether_addr_copy(addr, mlxsw_sp->base_mac);
499 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
500 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
501}
502
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200503static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
504{
505 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
506 char pmtu_pl[MLXSW_REG_PMTU_LEN];
507 int max_mtu;
508 int err;
509
510 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
511 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
512 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
513 if (err)
514 return err;
515 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
516
517 if (mtu > max_mtu)
518 return -EINVAL;
519
520 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
521 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
522}
523
Ido Schimmelbe945352016-06-09 09:51:39 +0200524static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
525 u8 swid)
526{
527 char pspa_pl[MLXSW_REG_PSPA_LEN];
528
529 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
530 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
531}
532
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200533static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
534{
535 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200536
Ido Schimmelbe945352016-06-09 09:51:39 +0200537 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
538 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200539}
540
541static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
542 bool enable)
543{
544 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
545 char svpe_pl[MLXSW_REG_SVPE_LEN];
546
547 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
548 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
549}
550
551int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
552 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
553 u16 vid)
554{
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svfa_pl[MLXSW_REG_SVFA_LEN];
557
558 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
559 fid, vid);
560 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
561}
562
Ido Schimmel584d73d2016-08-24 12:00:26 +0200563int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
564 u16 vid_begin, u16 vid_end,
565 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200566{
567 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
568 char *spvmlr_pl;
569 int err;
570
571 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
572 if (!spvmlr_pl)
573 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200574 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
575 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200576 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
577 kfree(spvmlr_pl);
578 return err;
579}
580
Ido Schimmel584d73d2016-08-24 12:00:26 +0200581static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
582 u16 vid, bool learn_enable)
583{
584 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
585 learn_enable);
586}
587
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588static int
589mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
590{
591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
592 char sspr_pl[MLXSW_REG_SSPR_LEN];
593
594 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
595 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
596}
597
Ido Schimmeld664b412016-06-09 09:51:40 +0200598static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
599 u8 local_port, u8 *p_module,
600 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200601{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 char pmlp_pl[MLXSW_REG_PMLP_LEN];
603 int err;
604
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200606 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
607 if (err)
608 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100609 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
610 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200611 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200612 return 0;
613}
614
Ido Schimmel18f1e702016-02-26 17:32:31 +0100615static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
616 u8 module, u8 width, u8 lane)
617{
618 char pmlp_pl[MLXSW_REG_PMLP_LEN];
619 int i;
620
621 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
622 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
623 for (i = 0; i < width; i++) {
624 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
625 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
626 }
627
628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
629}
630
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100631static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
632{
633 char pmlp_pl[MLXSW_REG_PMLP_LEN];
634
635 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
636 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
637 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
638}
639
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200640static int mlxsw_sp_port_open(struct net_device *dev)
641{
642 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
643 int err;
644
645 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
646 if (err)
647 return err;
648 netif_start_queue(dev);
649 return 0;
650}
651
652static int mlxsw_sp_port_stop(struct net_device *dev)
653{
654 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
655
656 netif_stop_queue(dev);
657 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
658}
659
660static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
661 struct net_device *dev)
662{
663 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
664 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
665 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
666 const struct mlxsw_tx_info tx_info = {
667 .local_port = mlxsw_sp_port->local_port,
668 .is_emad = false,
669 };
670 u64 len;
671 int err;
672
Jiri Pirko307c2432016-04-08 19:11:22 +0200673 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200674 return NETDEV_TX_BUSY;
675
676 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
677 struct sk_buff *skb_orig = skb;
678
679 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
680 if (!skb) {
681 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
682 dev_kfree_skb_any(skb_orig);
683 return NETDEV_TX_OK;
684 }
685 }
686
687 if (eth_skb_pad(skb)) {
688 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
689 return NETDEV_TX_OK;
690 }
691
692 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200693 /* TX header is consumed by HW on the way so we shouldn't count its
694 * bytes as being sent.
695 */
696 len = skb->len - MLXSW_TXHDR_LEN;
697
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698 /* Due to a race we might fail here because of a full queue. In that
699 * unlikely case we simply drop the packet.
700 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200701 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200702
703 if (!err) {
704 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
705 u64_stats_update_begin(&pcpu_stats->syncp);
706 pcpu_stats->tx_packets++;
707 pcpu_stats->tx_bytes += len;
708 u64_stats_update_end(&pcpu_stats->syncp);
709 } else {
710 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
711 dev_kfree_skb_any(skb);
712 }
713 return NETDEV_TX_OK;
714}
715
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100716static void mlxsw_sp_set_rx_mode(struct net_device *dev)
717{
718}
719
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200720static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
721{
722 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
723 struct sockaddr *addr = p;
724 int err;
725
726 if (!is_valid_ether_addr(addr->sa_data))
727 return -EADDRNOTAVAIL;
728
729 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
730 if (err)
731 return err;
732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
733 return 0;
734}
735
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200736static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200738{
739 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
740
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200741 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
742 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200743
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200744 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200745 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200746 pg_size + delay, pg_size);
747 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200748 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200749}
750
751int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 *prio_tc, bool pause_en,
753 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754{
755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
757 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200758 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200759 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200760
761 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
762 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
763 if (err)
764 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
767 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769
770 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
771 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200772 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200773 configure = true;
774 break;
775 }
776 }
777
778 if (!configure)
779 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200780 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781 }
782
Ido Schimmelff6551e2016-04-06 17:10:03 +0200783 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
784}
785
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200786static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200787 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788{
789 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
790 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792 u8 *prio_tc;
793
794 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200795 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200796
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200797 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200798 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200799}
800
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
802{
803 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200804 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200805 int err;
806
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200807 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200808 if (err)
809 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200810 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
811 if (err)
812 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200813 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
814 if (err)
815 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200816 dev->mtu = mtu;
817 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200818
819err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200820 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
821err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200822 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200823 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200824}
825
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300826static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200827mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
828 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200829{
830 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
831 struct mlxsw_sp_port_pcpu_stats *p;
832 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
833 u32 tx_dropped = 0;
834 unsigned int start;
835 int i;
836
837 for_each_possible_cpu(i) {
838 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
839 do {
840 start = u64_stats_fetch_begin_irq(&p->syncp);
841 rx_packets = p->rx_packets;
842 rx_bytes = p->rx_bytes;
843 tx_packets = p->tx_packets;
844 tx_bytes = p->tx_bytes;
845 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
846
847 stats->rx_packets += rx_packets;
848 stats->rx_bytes += rx_bytes;
849 stats->tx_packets += tx_packets;
850 stats->tx_bytes += tx_bytes;
851 /* tx_dropped is u32, updated without syncp protection. */
852 tx_dropped += p->tx_dropped;
853 }
854 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200855 return 0;
856}
857
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300858static bool mlxsw_sp_port_has_offload_stats(int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200859{
860 switch (attr_id) {
861 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
862 return true;
863 }
864
865 return false;
866}
867
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300868static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
869 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200870{
871 switch (attr_id) {
872 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
873 return mlxsw_sp_port_get_sw_stats64(dev, sp);
874 }
875
876 return -EINVAL;
877}
878
879static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
880 int prio, char *ppcnt_pl)
881{
882 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
883 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
884
885 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
886 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
887}
888
889static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
890 struct rtnl_link_stats64 *stats)
891{
892 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
893 int err;
894
895 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
896 0, ppcnt_pl);
897 if (err)
898 goto out;
899
900 stats->tx_packets =
901 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
902 stats->rx_packets =
903 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
904 stats->tx_bytes =
905 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
906 stats->rx_bytes =
907 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
908 stats->multicast =
909 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
910
911 stats->rx_crc_errors =
912 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
913 stats->rx_frame_errors =
914 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
915
916 stats->rx_length_errors = (
917 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
918 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
919 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
920
921 stats->rx_errors = (stats->rx_crc_errors +
922 stats->rx_frame_errors + stats->rx_length_errors);
923
924out:
925 return err;
926}
927
928static void update_stats_cache(struct work_struct *work)
929{
930 struct mlxsw_sp_port *mlxsw_sp_port =
931 container_of(work, struct mlxsw_sp_port,
932 hw_stats.update_dw.work);
933
934 if (!netif_carrier_ok(mlxsw_sp_port->dev))
935 goto out;
936
937 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
938 mlxsw_sp_port->hw_stats.cache);
939
940out:
941 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
942 MLXSW_HW_STATS_UPDATE_TIME);
943}
944
945/* Return the stats from a cache that is updated periodically,
946 * as this function might get called in an atomic context.
947 */
948static struct rtnl_link_stats64 *
949mlxsw_sp_port_get_stats64(struct net_device *dev,
950 struct rtnl_link_stats64 *stats)
951{
952 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
953
954 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
955
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956 return stats;
957}
958
959int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
960 u16 vid_end, bool is_member, bool untagged)
961{
962 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
963 char *spvm_pl;
964 int err;
965
966 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
967 if (!spvm_pl)
968 return -ENOMEM;
969
970 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
971 vid_end, is_member, untagged);
972 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
973 kfree(spvm_pl);
974 return err;
975}
976
977static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
978{
979 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
980 u16 vid, last_visited_vid;
981 int err;
982
983 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
984 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
985 vid);
986 if (err) {
987 last_visited_vid = vid;
988 goto err_port_vid_to_fid_set;
989 }
990 }
991
992 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
993 if (err) {
994 last_visited_vid = VLAN_N_VID;
995 goto err_port_vid_to_fid_set;
996 }
997
998 return 0;
999
1000err_port_vid_to_fid_set:
1001 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1002 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1003 vid);
1004 return err;
1005}
1006
1007static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1008{
1009 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1010 u16 vid;
1011 int err;
1012
1013 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1014 if (err)
1015 return err;
1016
1017 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1018 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1019 vid, vid);
1020 if (err)
1021 return err;
1022 }
1023
1024 return 0;
1025}
1026
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001027static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001028mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001029{
1030 struct mlxsw_sp_port *mlxsw_sp_vport;
1031
1032 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1033 if (!mlxsw_sp_vport)
1034 return NULL;
1035
1036 /* dev will be set correctly after the VLAN device is linked
1037 * with the real device. In case of bridge SELF invocation, dev
1038 * will remain as is.
1039 */
1040 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1041 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1042 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1043 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001044 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1045 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001046 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001047
1048 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1049
1050 return mlxsw_sp_vport;
1051}
1052
1053static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1054{
1055 list_del(&mlxsw_sp_vport->vport.list);
1056 kfree(mlxsw_sp_vport);
1057}
1058
Ido Schimmel05978482016-08-17 16:39:30 +02001059static int mlxsw_sp_port_add_vid(struct net_device *dev,
1060 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061{
1062 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001063 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001064 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001065 int err;
1066
1067 /* VLAN 0 is added to HW filter when device goes up, but it is
1068 * reserved in our case, so simply return.
1069 */
1070 if (!vid)
1071 return 0;
1072
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001073 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001074 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075
Ido Schimmel0355b592016-06-20 23:04:13 +02001076 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001077 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001078 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001079
1080 /* When adding the first VLAN interface on a bridged port we need to
1081 * transition all the active 802.1Q bridge VLANs to use explicit
1082 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1083 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001084 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001086 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001087 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001088 }
1089
Ido Schimmel52697a92016-07-02 11:00:09 +02001090 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001091 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094 return 0;
1095
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 if (list_is_singular(&mlxsw_sp_port->vports_list))
1098 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1099err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001100 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001101 return err;
1102}
1103
Ido Schimmel32d863f2016-07-02 11:00:10 +02001104static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1105 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106{
1107 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001108 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001109 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001110
1111 /* VLAN 0 is removed from HW filter when device goes down, but
1112 * it is reserved in our case, so simply return.
1113 */
1114 if (!vid)
1115 return 0;
1116
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001117 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001118 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001119 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
Ido Schimmel7a355832016-08-17 16:39:28 +02001121 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001122
Ido Schimmel1c800752016-06-20 23:04:20 +02001123 /* Drop FID reference. If this was the last reference the
1124 * resources will be freed.
1125 */
1126 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1127 if (f && !WARN_ON(!f->leave))
1128 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129
1130 /* When removing the last VLAN interface on a bridged port we need to
1131 * transition all active 802.1Q bridge VLANs to use VID to FID
1132 * mappings and set port's mode to VLAN mode.
1133 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001134 if (list_is_singular(&mlxsw_sp_port->vports_list))
1135 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001136
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001137 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1138
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139 return 0;
1140}
1141
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001142static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1143 size_t len)
1144{
1145 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001146 u8 module = mlxsw_sp_port->mapping.module;
1147 u8 width = mlxsw_sp_port->mapping.width;
1148 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001149 int err;
1150
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001151 if (!mlxsw_sp_port->split)
1152 err = snprintf(name, len, "p%d", module + 1);
1153 else
1154 err = snprintf(name, len, "p%ds%d", module + 1,
1155 lane / width);
1156
1157 if (err >= len)
1158 return -EINVAL;
1159
1160 return 0;
1161}
1162
Yotam Gigi763b4b72016-07-21 12:03:17 +02001163static struct mlxsw_sp_port_mall_tc_entry *
1164mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1165 unsigned long cookie) {
1166 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1167
1168 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1169 if (mall_tc_entry->cookie == cookie)
1170 return mall_tc_entry;
1171
1172 return NULL;
1173}
1174
1175static int
1176mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1177 struct tc_cls_matchall_offload *cls,
1178 const struct tc_action *a,
1179 bool ingress)
1180{
1181 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1182 struct net *net = dev_net(mlxsw_sp_port->dev);
1183 enum mlxsw_sp_span_type span_type;
1184 struct mlxsw_sp_port *to_port;
1185 struct net_device *to_dev;
1186 int ifindex;
1187 int err;
1188
1189 ifindex = tcf_mirred_ifindex(a);
1190 to_dev = __dev_get_by_index(net, ifindex);
1191 if (!to_dev) {
1192 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1193 return -EINVAL;
1194 }
1195
1196 if (!mlxsw_sp_port_dev_check(to_dev)) {
1197 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1198 return -ENOTSUPP;
1199 }
1200 to_port = netdev_priv(to_dev);
1201
1202 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1203 if (!mall_tc_entry)
1204 return -ENOMEM;
1205
1206 mall_tc_entry->cookie = cls->cookie;
1207 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1208 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1209 mall_tc_entry->mirror.ingress = ingress;
1210 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1211
1212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1213 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214 if (err)
1215 goto err_mirror_add;
1216 return 0;
1217
1218err_mirror_add:
1219 list_del(&mall_tc_entry->list);
1220 kfree(mall_tc_entry);
1221 return err;
1222}
1223
1224static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1225 __be16 protocol,
1226 struct tc_cls_matchall_offload *cls,
1227 bool ingress)
1228{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001229 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001230 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001231 int err;
1232
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001233 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001234 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1235 return -ENOTSUPP;
1236 }
1237
WANG Cong22dc13c2016-08-13 22:35:00 -07001238 tcf_exts_to_list(cls->exts, &actions);
1239 list_for_each_entry(a, &actions, list) {
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001240 if (!is_tcf_mirred_egress_mirror(a) ||
1241 protocol != htons(ETH_P_ALL)) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001242 return -ENOTSUPP;
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001243 }
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001244
Yotam Gigi763b4b72016-07-21 12:03:17 +02001245 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1246 a, ingress);
1247 if (err)
1248 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001249 }
1250
1251 return 0;
1252}
1253
1254static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1255 struct tc_cls_matchall_offload *cls)
1256{
1257 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1258 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1259 enum mlxsw_sp_span_type span_type;
1260 struct mlxsw_sp_port *to_port;
1261
1262 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1263 cls->cookie);
1264 if (!mall_tc_entry) {
1265 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1266 return;
1267 }
1268
1269 switch (mall_tc_entry->type) {
1270 case MLXSW_SP_PORT_MALL_MIRROR:
1271 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1272 span_type = mall_tc_entry->mirror.ingress ?
1273 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1274
1275 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1276 break;
1277 default:
1278 WARN_ON(1);
1279 }
1280
1281 list_del(&mall_tc_entry->list);
1282 kfree(mall_tc_entry);
1283}
1284
1285static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1286 __be16 proto, struct tc_to_netdev *tc)
1287{
1288 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1289 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1290
1291 if (tc->type == TC_SETUP_MATCHALL) {
1292 switch (tc->cls_mall->command) {
1293 case TC_CLSMATCHALL_REPLACE:
1294 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1295 proto,
1296 tc->cls_mall,
1297 ingress);
1298 case TC_CLSMATCHALL_DESTROY:
1299 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1300 tc->cls_mall);
1301 return 0;
1302 default:
1303 return -EINVAL;
1304 }
1305 }
1306
1307 return -ENOTSUPP;
1308}
1309
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001310static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1311 .ndo_open = mlxsw_sp_port_open,
1312 .ndo_stop = mlxsw_sp_port_stop,
1313 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001314 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001315 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001316 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1317 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1318 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001319 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1320 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001321 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1322 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001323 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1324 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001325 .ndo_fdb_add = switchdev_port_fdb_add,
1326 .ndo_fdb_del = switchdev_port_fdb_del,
1327 .ndo_fdb_dump = switchdev_port_fdb_dump,
1328 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1329 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1330 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001331 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001332};
1333
1334static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1335 struct ethtool_drvinfo *drvinfo)
1336{
1337 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1338 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1339
1340 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1341 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1342 sizeof(drvinfo->version));
1343 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1344 "%d.%d.%d",
1345 mlxsw_sp->bus_info->fw_rev.major,
1346 mlxsw_sp->bus_info->fw_rev.minor,
1347 mlxsw_sp->bus_info->fw_rev.subminor);
1348 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1349 sizeof(drvinfo->bus_info));
1350}
1351
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001352static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1353 struct ethtool_pauseparam *pause)
1354{
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356
1357 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1358 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1359}
1360
1361static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1362 struct ethtool_pauseparam *pause)
1363{
1364 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1365
1366 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1367 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1368 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1369
1370 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1371 pfcc_pl);
1372}
1373
1374static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1375 struct ethtool_pauseparam *pause)
1376{
1377 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1378 bool pause_en = pause->tx_pause || pause->rx_pause;
1379 int err;
1380
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001381 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1382 netdev_err(dev, "PFC already enabled on port\n");
1383 return -EINVAL;
1384 }
1385
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001386 if (pause->autoneg) {
1387 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1388 return -EINVAL;
1389 }
1390
1391 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1392 if (err) {
1393 netdev_err(dev, "Failed to configure port's headroom\n");
1394 return err;
1395 }
1396
1397 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1398 if (err) {
1399 netdev_err(dev, "Failed to set PAUSE parameters\n");
1400 goto err_port_pause_configure;
1401 }
1402
1403 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1404 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1405
1406 return 0;
1407
1408err_port_pause_configure:
1409 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1410 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1411 return err;
1412}
1413
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001414struct mlxsw_sp_port_hw_stats {
1415 char str[ETH_GSTRING_LEN];
1416 u64 (*getter)(char *payload);
1417};
1418
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001419static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001420 {
1421 .str = "a_frames_transmitted_ok",
1422 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1423 },
1424 {
1425 .str = "a_frames_received_ok",
1426 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1427 },
1428 {
1429 .str = "a_frame_check_sequence_errors",
1430 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1431 },
1432 {
1433 .str = "a_alignment_errors",
1434 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1435 },
1436 {
1437 .str = "a_octets_transmitted_ok",
1438 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1439 },
1440 {
1441 .str = "a_octets_received_ok",
1442 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1443 },
1444 {
1445 .str = "a_multicast_frames_xmitted_ok",
1446 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1447 },
1448 {
1449 .str = "a_broadcast_frames_xmitted_ok",
1450 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1451 },
1452 {
1453 .str = "a_multicast_frames_received_ok",
1454 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1455 },
1456 {
1457 .str = "a_broadcast_frames_received_ok",
1458 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1459 },
1460 {
1461 .str = "a_in_range_length_errors",
1462 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1463 },
1464 {
1465 .str = "a_out_of_range_length_field",
1466 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1467 },
1468 {
1469 .str = "a_frame_too_long_errors",
1470 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1471 },
1472 {
1473 .str = "a_symbol_error_during_carrier",
1474 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1475 },
1476 {
1477 .str = "a_mac_control_frames_transmitted",
1478 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1479 },
1480 {
1481 .str = "a_mac_control_frames_received",
1482 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1483 },
1484 {
1485 .str = "a_unsupported_opcodes_received",
1486 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1487 },
1488 {
1489 .str = "a_pause_mac_ctrl_frames_received",
1490 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1491 },
1492 {
1493 .str = "a_pause_mac_ctrl_frames_xmitted",
1494 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1495 },
1496};
1497
1498#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1499
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001500static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1501 {
1502 .str = "rx_octets_prio",
1503 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1504 },
1505 {
1506 .str = "rx_frames_prio",
1507 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1508 },
1509 {
1510 .str = "tx_octets_prio",
1511 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1512 },
1513 {
1514 .str = "tx_frames_prio",
1515 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1516 },
1517 {
1518 .str = "rx_pause_prio",
1519 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1520 },
1521 {
1522 .str = "rx_pause_duration_prio",
1523 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1524 },
1525 {
1526 .str = "tx_pause_prio",
1527 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1528 },
1529 {
1530 .str = "tx_pause_duration_prio",
1531 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1532 },
1533};
1534
1535#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1536
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001537static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1538{
1539 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1540
1541 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1542}
1543
1544static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1545 {
1546 .str = "tc_transmit_queue_tc",
1547 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1548 },
1549 {
1550 .str = "tc_no_buffer_discard_uc_tc",
1551 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1552 },
1553};
1554
1555#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001558 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1559 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001560 IEEE_8021QAZ_MAX_TCS)
1561
1562static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1563{
1564 int i;
1565
1566 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1567 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1568 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1569 *p += ETH_GSTRING_LEN;
1570 }
1571}
1572
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001573static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1574{
1575 int i;
1576
1577 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1578 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1579 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1580 *p += ETH_GSTRING_LEN;
1581 }
1582}
1583
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001584static void mlxsw_sp_port_get_strings(struct net_device *dev,
1585 u32 stringset, u8 *data)
1586{
1587 u8 *p = data;
1588 int i;
1589
1590 switch (stringset) {
1591 case ETH_SS_STATS:
1592 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1593 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1594 ETH_GSTRING_LEN);
1595 p += ETH_GSTRING_LEN;
1596 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001597
1598 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1599 mlxsw_sp_port_get_prio_strings(&p, i);
1600
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001601 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1602 mlxsw_sp_port_get_tc_strings(&p, i);
1603
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001604 break;
1605 }
1606}
1607
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001608static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1609 enum ethtool_phys_id_state state)
1610{
1611 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1612 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1613 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1614 bool active;
1615
1616 switch (state) {
1617 case ETHTOOL_ID_ACTIVE:
1618 active = true;
1619 break;
1620 case ETHTOOL_ID_INACTIVE:
1621 active = false;
1622 break;
1623 default:
1624 return -EOPNOTSUPP;
1625 }
1626
1627 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1629}
1630
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001631static int
1632mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1633 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1634{
1635 switch (grp) {
1636 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1637 *p_hw_stats = mlxsw_sp_port_hw_stats;
1638 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1639 break;
1640 case MLXSW_REG_PPCNT_PRIO_CNT:
1641 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1642 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1643 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001644 case MLXSW_REG_PPCNT_TC_CNT:
1645 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1646 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1647 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001648 default:
1649 WARN_ON(1);
1650 return -ENOTSUPP;
1651 }
1652 return 0;
1653}
1654
1655static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1656 enum mlxsw_reg_ppcnt_grp grp, int prio,
1657 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001658{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001659 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001660 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001661 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001662 int err;
1663
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001664 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1665 if (err)
1666 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001667 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001668 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001669 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001670}
1671
1672static void mlxsw_sp_port_get_stats(struct net_device *dev,
1673 struct ethtool_stats *stats, u64 *data)
1674{
1675 int i, data_index = 0;
1676
1677 /* IEEE 802.3 Counters */
1678 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1679 data, data_index);
1680 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1681
1682 /* Per-Priority Counters */
1683 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1684 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1685 data, data_index);
1686 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1687 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001688
1689 /* Per-TC Counters */
1690 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1691 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1692 data, data_index);
1693 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1694 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001695}
1696
1697static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1698{
1699 switch (sset) {
1700 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001701 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001702 default:
1703 return -EOPNOTSUPP;
1704 }
1705}
1706
1707struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001708 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001709 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001710 u32 speed;
1711};
1712
1713static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1714 {
1715 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001716 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1717 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001718 },
1719 {
1720 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001722 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1723 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001724 },
1725 {
1726 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001727 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1728 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001729 },
1730 {
1731 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1732 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001733 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1734 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001735 },
1736 {
1737 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1738 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1739 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001741 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1742 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001743 },
1744 {
1745 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001746 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1747 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001748 },
1749 {
1750 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001751 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1752 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001753 },
1754 {
1755 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001756 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1757 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001758 },
1759 {
1760 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001761 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1762 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001763 },
1764 {
1765 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001766 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1767 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001768 },
1769 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001770 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1771 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1772 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001773 },
1774 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001775 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1776 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1777 .speed = SPEED_25000,
1778 },
1779 {
1780 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1781 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1782 .speed = SPEED_25000,
1783 },
1784 {
1785 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1786 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1787 .speed = SPEED_25000,
1788 },
1789 {
1790 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1791 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1792 .speed = SPEED_50000,
1793 },
1794 {
1795 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1796 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1797 .speed = SPEED_50000,
1798 },
1799 {
1800 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1801 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1802 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001803 },
1804 {
1805 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001806 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1807 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001808 },
1809 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001810 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1811 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1812 .speed = SPEED_56000,
1813 },
1814 {
1815 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1816 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1817 .speed = SPEED_56000,
1818 },
1819 {
1820 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1821 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1822 .speed = SPEED_56000,
1823 },
1824 {
1825 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1826 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1827 .speed = SPEED_100000,
1828 },
1829 {
1830 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1831 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1832 .speed = SPEED_100000,
1833 },
1834 {
1835 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1836 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1837 .speed = SPEED_100000,
1838 },
1839 {
1840 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1841 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1842 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001843 },
1844};
1845
1846#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1847
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001848static void
1849mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1850 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001851{
1852 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1853 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1854 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1855 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001858 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001859
1860 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1861 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1862 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001865 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001866}
1867
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001868static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001869{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870 int i;
1871
1872 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1873 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001874 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1875 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001876 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877}
1878
1879static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001880 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001881{
1882 u32 speed = SPEED_UNKNOWN;
1883 u8 duplex = DUPLEX_UNKNOWN;
1884 int i;
1885
1886 if (!carrier_ok)
1887 goto out;
1888
1889 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1890 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1891 speed = mlxsw_sp_port_link_mode[i].speed;
1892 duplex = DUPLEX_FULL;
1893 break;
1894 }
1895 }
1896out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001897 cmd->base.speed = speed;
1898 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001899}
1900
1901static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1902{
1903 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1904 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1905 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1906 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1907 return PORT_FIBRE;
1908
1909 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1910 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1911 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1912 return PORT_DA;
1913
1914 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1915 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1916 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1918 return PORT_NONE;
1919
1920 return PORT_OTHER;
1921}
1922
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001923static u32
1924mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001925{
1926 u32 ptys_proto = 0;
1927 int i;
1928
1929 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001930 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1931 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001932 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1933 }
1934 return ptys_proto;
1935}
1936
1937static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1938{
1939 u32 ptys_proto = 0;
1940 int i;
1941
1942 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1943 if (speed == mlxsw_sp_port_link_mode[i].speed)
1944 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1945 }
1946 return ptys_proto;
1947}
1948
Ido Schimmel18f1e702016-02-26 17:32:31 +01001949static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1950{
1951 u32 ptys_proto = 0;
1952 int i;
1953
1954 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1955 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1956 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1957 }
1958 return ptys_proto;
1959}
1960
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001961static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1962 struct ethtool_link_ksettings *cmd)
1963{
1964 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1965 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1967
1968 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1969 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1970}
1971
1972static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1973 struct ethtool_link_ksettings *cmd)
1974{
1975 if (!autoneg)
1976 return;
1977
1978 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1979 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1980}
1981
1982static void
1983mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1984 struct ethtool_link_ksettings *cmd)
1985{
1986 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1987 return;
1988
1989 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1990 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1991}
1992
1993static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1994 struct ethtool_link_ksettings *cmd)
1995{
1996 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1997 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1998 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1999 char ptys_pl[MLXSW_REG_PTYS_LEN];
2000 u8 autoneg_status;
2001 bool autoneg;
2002 int err;
2003
2004 autoneg = mlxsw_sp_port->link.autoneg;
2005 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2006 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2007 if (err)
2008 return err;
2009 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2010 &eth_proto_oper);
2011
2012 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2013
2014 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2015
2016 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2017 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2018 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2019
2020 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2021 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2022 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2023 cmd);
2024
2025 return 0;
2026}
2027
2028static int
2029mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2030 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002031{
2032 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2033 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2034 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002035 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002036 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002037 int err;
2038
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002039 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2040 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002041 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002042 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002043 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2044
2045 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2046 eth_proto_new = autoneg ?
2047 mlxsw_sp_to_ptys_advert_link(cmd) :
2048 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002049
2050 eth_proto_new = eth_proto_new & eth_proto_cap;
2051 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002052 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002053 return -EINVAL;
2054 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002055
2056 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
2057 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002058 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002059 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060
Ido Schimmel6277d462016-07-15 11:14:58 +02002061 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002062 return 0;
2063
Ido Schimmel0c83f882016-09-12 13:26:23 +02002064 mlxsw_sp_port->link.autoneg = autoneg;
2065
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002066 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2067 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002068
2069 return 0;
2070}
2071
2072static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2073 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2074 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002075 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2076 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002077 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002078 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002079 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2080 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002081 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2082 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002083};
2084
Ido Schimmel18f1e702016-02-26 17:32:31 +01002085static int
2086mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2087{
2088 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2089 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2090 char ptys_pl[MLXSW_REG_PTYS_LEN];
2091 u32 eth_proto_admin;
2092
2093 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2094 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
2095 eth_proto_admin);
2096 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2097}
2098
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002099int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2100 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2101 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002102{
2103 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2104 char qeec_pl[MLXSW_REG_QEEC_LEN];
2105
2106 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2107 next_index);
2108 mlxsw_reg_qeec_de_set(qeec_pl, true);
2109 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2110 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2111 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2112}
2113
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002114int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2115 enum mlxsw_reg_qeec_hr hr, u8 index,
2116 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002117{
2118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2119 char qeec_pl[MLXSW_REG_QEEC_LEN];
2120
2121 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2122 next_index);
2123 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2124 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2125 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2126}
2127
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002128int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2129 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002130{
2131 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2132 char qtct_pl[MLXSW_REG_QTCT_LEN];
2133
2134 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2135 tclass);
2136 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2137}
2138
2139static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2140{
2141 int err, i;
2142
2143 /* Setup the elements hierarcy, so that each TC is linked to
2144 * one subgroup, which are all member in the same group.
2145 */
2146 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2147 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2148 0);
2149 if (err)
2150 return err;
2151 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2152 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2153 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2154 0, false, 0);
2155 if (err)
2156 return err;
2157 }
2158 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2159 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2160 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2161 false, 0);
2162 if (err)
2163 return err;
2164 }
2165
2166 /* Make sure the max shaper is disabled in all hierarcies that
2167 * support it.
2168 */
2169 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2170 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2171 MLXSW_REG_QEEC_MAS_DIS);
2172 if (err)
2173 return err;
2174 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2175 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2176 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2177 i, 0,
2178 MLXSW_REG_QEEC_MAS_DIS);
2179 if (err)
2180 return err;
2181 }
2182 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2183 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2184 MLXSW_REG_QEEC_HIERARCY_TC,
2185 i, i,
2186 MLXSW_REG_QEEC_MAS_DIS);
2187 if (err)
2188 return err;
2189 }
2190
2191 /* Map all priorities to traffic class 0. */
2192 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2193 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2194 if (err)
2195 return err;
2196 }
2197
2198 return 0;
2199}
2200
Ido Schimmel05978482016-08-17 16:39:30 +02002201static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2202{
2203 mlxsw_sp_port->pvid = 1;
2204
2205 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2206}
2207
2208static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2209{
2210 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2211}
2212
Ido Schimmelbe945352016-06-09 09:51:39 +02002213static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002214 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002215{
2216 struct mlxsw_sp_port *mlxsw_sp_port;
2217 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002218 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002219 int err;
2220
2221 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2222 if (!dev)
2223 return -ENOMEM;
2224 mlxsw_sp_port = netdev_priv(dev);
2225 mlxsw_sp_port->dev = dev;
2226 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2227 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002228 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002229 mlxsw_sp_port->mapping.module = module;
2230 mlxsw_sp_port->mapping.width = width;
2231 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002232 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002233 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2234 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2235 if (!mlxsw_sp_port->active_vlans) {
2236 err = -ENOMEM;
2237 goto err_port_active_vlans_alloc;
2238 }
Elad Razfc1273a2016-01-06 13:01:11 +01002239 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2240 if (!mlxsw_sp_port->untagged_vlans) {
2241 err = -ENOMEM;
2242 goto err_port_untagged_vlans_alloc;
2243 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002244 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002245 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002246
2247 mlxsw_sp_port->pcpu_stats =
2248 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2249 if (!mlxsw_sp_port->pcpu_stats) {
2250 err = -ENOMEM;
2251 goto err_alloc_stats;
2252 }
2253
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002254 mlxsw_sp_port->hw_stats.cache =
2255 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2256
2257 if (!mlxsw_sp_port->hw_stats.cache) {
2258 err = -ENOMEM;
2259 goto err_alloc_hw_stats;
2260 }
2261 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2262 &update_stats_cache);
2263
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002264 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2265 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2266
Ido Schimmel3247ff22016-09-08 08:16:02 +02002267 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2268 if (err) {
2269 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2270 mlxsw_sp_port->local_port);
2271 goto err_port_swid_set;
2272 }
2273
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002274 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2275 if (err) {
2276 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2277 mlxsw_sp_port->local_port);
2278 goto err_dev_addr_init;
2279 }
2280
2281 netif_carrier_off(dev);
2282
2283 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002284 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2285 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002286
2287 /* Each packet needs to have a Tx header (metadata) on top all other
2288 * headers.
2289 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002290 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002291
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2293 if (err) {
2294 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2295 mlxsw_sp_port->local_port);
2296 goto err_port_system_port_mapping_set;
2297 }
2298
Ido Schimmel18f1e702016-02-26 17:32:31 +01002299 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2300 if (err) {
2301 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2302 mlxsw_sp_port->local_port);
2303 goto err_port_speed_by_width_set;
2304 }
2305
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002306 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2307 if (err) {
2308 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2309 mlxsw_sp_port->local_port);
2310 goto err_port_mtu_set;
2311 }
2312
2313 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2314 if (err)
2315 goto err_port_admin_status_set;
2316
2317 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2318 if (err) {
2319 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2320 mlxsw_sp_port->local_port);
2321 goto err_port_buffers_init;
2322 }
2323
Ido Schimmel90183b92016-04-06 17:10:08 +02002324 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2325 if (err) {
2326 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2327 mlxsw_sp_port->local_port);
2328 goto err_port_ets_init;
2329 }
2330
Ido Schimmelf00817d2016-04-06 17:10:09 +02002331 /* ETS and buffers must be initialized before DCB. */
2332 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2333 if (err) {
2334 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2335 mlxsw_sp_port->local_port);
2336 goto err_port_dcb_init;
2337 }
2338
Ido Schimmel05978482016-08-17 16:39:30 +02002339 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2340 if (err) {
2341 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2342 mlxsw_sp_port->local_port);
2343 goto err_port_pvid_vport_create;
2344 }
2345
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002346 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002347 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002348 err = register_netdev(dev);
2349 if (err) {
2350 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2351 mlxsw_sp_port->local_port);
2352 goto err_register_netdev;
2353 }
2354
Jiri Pirko932762b2016-04-08 19:11:21 +02002355 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2356 mlxsw_sp_port->local_port, dev,
2357 mlxsw_sp_port->split, module);
2358 if (err) {
2359 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2360 mlxsw_sp_port->local_port);
2361 goto err_core_port_init;
2362 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002363
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002364 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002365 return 0;
2366
Jiri Pirko932762b2016-04-08 19:11:21 +02002367err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002368 unregister_netdev(dev);
2369err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002370 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002371 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002372 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2373err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002374 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002375err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002376err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002377err_port_buffers_init:
2378err_port_admin_status_set:
2379err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002380err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002381err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002382err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002383 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2384err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002385 kfree(mlxsw_sp_port->hw_stats.cache);
2386err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002387 free_percpu(mlxsw_sp_port->pcpu_stats);
2388err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002389 kfree(mlxsw_sp_port->untagged_vlans);
2390err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002391 kfree(mlxsw_sp_port->active_vlans);
2392err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002393 free_netdev(dev);
2394 return err;
2395}
2396
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002397static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2398{
2399 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2400
2401 if (!mlxsw_sp_port)
2402 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002403 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko932762b2016-04-08 19:11:21 +02002404 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002405 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002406 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002407 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002408 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002409 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002410 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2411 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002412 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002413 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002414 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002415 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002416 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002417 free_netdev(mlxsw_sp_port->dev);
2418}
2419
2420static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2421{
2422 int i;
2423
2424 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2425 mlxsw_sp_port_remove(mlxsw_sp, i);
2426 kfree(mlxsw_sp->ports);
2427}
2428
2429static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2430{
Ido Schimmeld664b412016-06-09 09:51:40 +02002431 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002432 size_t alloc_size;
2433 int i;
2434 int err;
2435
2436 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2437 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2438 if (!mlxsw_sp->ports)
2439 return -ENOMEM;
2440
2441 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002442 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002443 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002444 if (err)
2445 goto err_port_module_info_get;
2446 if (!width)
2447 continue;
2448 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002449 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2450 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002451 if (err)
2452 goto err_port_create;
2453 }
2454 return 0;
2455
2456err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002457err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002458 for (i--; i >= 1; i--)
2459 mlxsw_sp_port_remove(mlxsw_sp, i);
2460 kfree(mlxsw_sp->ports);
2461 return err;
2462}
2463
Ido Schimmel18f1e702016-02-26 17:32:31 +01002464static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2465{
2466 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2467
2468 return local_port - offset;
2469}
2470
Ido Schimmelbe945352016-06-09 09:51:39 +02002471static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2472 u8 module, unsigned int count)
2473{
2474 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2475 int err, i;
2476
2477 for (i = 0; i < count; i++) {
2478 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2479 width, i * width);
2480 if (err)
2481 goto err_port_module_map;
2482 }
2483
2484 for (i = 0; i < count; i++) {
2485 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2486 if (err)
2487 goto err_port_swid_set;
2488 }
2489
2490 for (i = 0; i < count; i++) {
2491 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002492 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002493 if (err)
2494 goto err_port_create;
2495 }
2496
2497 return 0;
2498
2499err_port_create:
2500 for (i--; i >= 0; i--)
2501 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2502 i = count;
2503err_port_swid_set:
2504 for (i--; i >= 0; i--)
2505 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2506 MLXSW_PORT_SWID_DISABLED_PORT);
2507 i = count;
2508err_port_module_map:
2509 for (i--; i >= 0; i--)
2510 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2511 return err;
2512}
2513
2514static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2515 u8 base_port, unsigned int count)
2516{
2517 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2518 int i;
2519
2520 /* Split by four means we need to re-create two ports, otherwise
2521 * only one.
2522 */
2523 count = count / 2;
2524
2525 for (i = 0; i < count; i++) {
2526 local_port = base_port + i * 2;
2527 module = mlxsw_sp->port_to_module[local_port];
2528
2529 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2530 0);
2531 }
2532
2533 for (i = 0; i < count; i++)
2534 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2535
2536 for (i = 0; i < count; i++) {
2537 local_port = base_port + i * 2;
2538 module = mlxsw_sp->port_to_module[local_port];
2539
2540 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002541 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002542 }
2543}
2544
Jiri Pirkob2f10572016-04-08 19:11:23 +02002545static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2546 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002547{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002548 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002549 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002550 u8 module, cur_width, base_port;
2551 int i;
2552 int err;
2553
2554 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2555 if (!mlxsw_sp_port) {
2556 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2557 local_port);
2558 return -EINVAL;
2559 }
2560
Ido Schimmeld664b412016-06-09 09:51:40 +02002561 module = mlxsw_sp_port->mapping.module;
2562 cur_width = mlxsw_sp_port->mapping.width;
2563
Ido Schimmel18f1e702016-02-26 17:32:31 +01002564 if (count != 2 && count != 4) {
2565 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2566 return -EINVAL;
2567 }
2568
Ido Schimmel18f1e702016-02-26 17:32:31 +01002569 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2570 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2571 return -EINVAL;
2572 }
2573
2574 /* Make sure we have enough slave (even) ports for the split. */
2575 if (count == 2) {
2576 base_port = local_port;
2577 if (mlxsw_sp->ports[base_port + 1]) {
2578 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2579 return -EINVAL;
2580 }
2581 } else {
2582 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2583 if (mlxsw_sp->ports[base_port + 1] ||
2584 mlxsw_sp->ports[base_port + 3]) {
2585 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2586 return -EINVAL;
2587 }
2588 }
2589
2590 for (i = 0; i < count; i++)
2591 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2592
Ido Schimmelbe945352016-06-09 09:51:39 +02002593 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2594 if (err) {
2595 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2596 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002597 }
2598
2599 return 0;
2600
Ido Schimmelbe945352016-06-09 09:51:39 +02002601err_port_split_create:
2602 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002603 return err;
2604}
2605
Jiri Pirkob2f10572016-04-08 19:11:23 +02002606static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002607{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002608 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002609 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002610 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002611 unsigned int count;
2612 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002613
2614 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2615 if (!mlxsw_sp_port) {
2616 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2617 local_port);
2618 return -EINVAL;
2619 }
2620
2621 if (!mlxsw_sp_port->split) {
2622 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2623 return -EINVAL;
2624 }
2625
Ido Schimmeld664b412016-06-09 09:51:40 +02002626 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002627 count = cur_width == 1 ? 4 : 2;
2628
2629 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2630
2631 /* Determine which ports to remove. */
2632 if (count == 2 && local_port >= base_port + 2)
2633 base_port = base_port + 2;
2634
2635 for (i = 0; i < count; i++)
2636 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2637
Ido Schimmelbe945352016-06-09 09:51:39 +02002638 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002639
2640 return 0;
2641}
2642
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002643static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2644 char *pude_pl, void *priv)
2645{
2646 struct mlxsw_sp *mlxsw_sp = priv;
2647 struct mlxsw_sp_port *mlxsw_sp_port;
2648 enum mlxsw_reg_pude_oper_status status;
2649 u8 local_port;
2650
2651 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2652 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002653 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002654 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002655
2656 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2657 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2658 netdev_info(mlxsw_sp_port->dev, "link up\n");
2659 netif_carrier_on(mlxsw_sp_port->dev);
2660 } else {
2661 netdev_info(mlxsw_sp_port->dev, "link down\n");
2662 netif_carrier_off(mlxsw_sp_port->dev);
2663 }
2664}
2665
2666static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2667 .func = mlxsw_sp_pude_event_func,
2668 .trap_id = MLXSW_TRAP_ID_PUDE,
2669};
2670
2671static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2672 enum mlxsw_event_trap_id trap_id)
2673{
2674 struct mlxsw_event_listener *el;
2675 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2676 int err;
2677
2678 switch (trap_id) {
2679 case MLXSW_TRAP_ID_PUDE:
2680 el = &mlxsw_sp_pude_event;
2681 break;
2682 }
2683 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2684 if (err)
2685 return err;
2686
2687 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2688 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2689 if (err)
2690 goto err_event_trap_set;
2691
2692 return 0;
2693
2694err_event_trap_set:
2695 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2696 return err;
2697}
2698
2699static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2700 enum mlxsw_event_trap_id trap_id)
2701{
2702 struct mlxsw_event_listener *el;
2703
2704 switch (trap_id) {
2705 case MLXSW_TRAP_ID_PUDE:
2706 el = &mlxsw_sp_pude_event;
2707 break;
2708 }
2709 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2710}
2711
2712static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2713 void *priv)
2714{
2715 struct mlxsw_sp *mlxsw_sp = priv;
2716 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2717 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2718
2719 if (unlikely(!mlxsw_sp_port)) {
2720 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2721 local_port);
2722 return;
2723 }
2724
2725 skb->dev = mlxsw_sp_port->dev;
2726
2727 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2728 u64_stats_update_begin(&pcpu_stats->syncp);
2729 pcpu_stats->rx_packets++;
2730 pcpu_stats->rx_bytes += skb->len;
2731 u64_stats_update_end(&pcpu_stats->syncp);
2732
2733 skb->protocol = eth_type_trans(skb, skb->dev);
2734 netif_receive_skb(skb);
2735}
2736
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002737static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2738 void *priv)
2739{
2740 skb->offload_fwd_mark = 1;
2741 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2742}
2743
Ido Schimmel63a81142016-08-25 18:42:39 +02002744#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2745 { \
2746 .func = _func, \
2747 .local_port = MLXSW_PORT_DONT_CARE, \
2748 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2749 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002750 }
2751
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002752static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002753 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002754 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002755 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2756 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2757 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2758 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2759 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2760 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2761 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002762 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2763 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002764 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2766 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002768 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002770 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2772 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2773 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002774 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002775 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2776 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2777 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002778};
2779
2780static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2781{
2782 char htgt_pl[MLXSW_REG_HTGT_LEN];
2783 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2784 int i;
2785 int err;
2786
2787 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2788 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2789 if (err)
2790 return err;
2791
2792 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2793 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2794 if (err)
2795 return err;
2796
2797 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2798 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2799 &mlxsw_sp_rx_listener[i],
2800 mlxsw_sp);
2801 if (err)
2802 goto err_rx_listener_register;
2803
Ido Schimmel63a81142016-08-25 18:42:39 +02002804 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002805 mlxsw_sp_rx_listener[i].trap_id);
2806 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2807 if (err)
2808 goto err_rx_trap_set;
2809 }
2810 return 0;
2811
2812err_rx_trap_set:
2813 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2814 &mlxsw_sp_rx_listener[i],
2815 mlxsw_sp);
2816err_rx_listener_register:
2817 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002818 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002819 mlxsw_sp_rx_listener[i].trap_id);
2820 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2821
2822 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2823 &mlxsw_sp_rx_listener[i],
2824 mlxsw_sp);
2825 }
2826 return err;
2827}
2828
2829static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2830{
2831 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2832 int i;
2833
2834 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002835 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002836 mlxsw_sp_rx_listener[i].trap_id);
2837 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2838
2839 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2840 &mlxsw_sp_rx_listener[i],
2841 mlxsw_sp);
2842 }
2843}
2844
2845static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2846 enum mlxsw_reg_sfgc_type type,
2847 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2848{
2849 enum mlxsw_flood_table_type table_type;
2850 enum mlxsw_sp_flood_table flood_table;
2851 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2852
Ido Schimmel19ae6122015-12-15 16:03:39 +01002853 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002854 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002855 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002856 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002857
2858 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2859 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2860 else
2861 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002862
2863 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2864 flood_table);
2865 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2866}
2867
2868static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2869{
2870 int type, err;
2871
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002872 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2873 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2874 continue;
2875
2876 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2877 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2878 if (err)
2879 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002880
2881 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2882 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2883 if (err)
2884 return err;
2885 }
2886
2887 return 0;
2888}
2889
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002890static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2891{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002892 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002893 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002894 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002895
2896 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2897 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2898 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2899 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2900 MLXSW_REG_SLCR_LAG_HASH_SIP |
2901 MLXSW_REG_SLCR_LAG_HASH_DIP |
2902 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2903 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2904 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002905 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2906 if (err)
2907 return err;
2908
2909 resources = mlxsw_core_resources_get(mlxsw_sp->core);
2910 if (!(resources->max_lag_valid && resources->max_ports_in_lag_valid))
2911 return -EIO;
2912
2913 mlxsw_sp->lags = kcalloc(resources->max_lag,
2914 sizeof(struct mlxsw_sp_upper),
2915 GFP_KERNEL);
2916 if (!mlxsw_sp->lags)
2917 return -ENOMEM;
2918
2919 return 0;
2920}
2921
2922static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
2923{
2924 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002925}
2926
Jiri Pirkob2f10572016-04-08 19:11:23 +02002927static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002928 const struct mlxsw_bus_info *mlxsw_bus_info)
2929{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002930 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002931 int err;
2932
2933 mlxsw_sp->core = mlxsw_core;
2934 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002935 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002936 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002937 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002938
2939 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2940 if (err) {
2941 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2942 return err;
2943 }
2944
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002945 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2946 if (err) {
2947 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002948 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002949 }
2950
2951 err = mlxsw_sp_traps_init(mlxsw_sp);
2952 if (err) {
2953 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2954 goto err_rx_listener_register;
2955 }
2956
2957 err = mlxsw_sp_flood_init(mlxsw_sp);
2958 if (err) {
2959 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2960 goto err_flood_init;
2961 }
2962
2963 err = mlxsw_sp_buffers_init(mlxsw_sp);
2964 if (err) {
2965 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2966 goto err_buffers_init;
2967 }
2968
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002969 err = mlxsw_sp_lag_init(mlxsw_sp);
2970 if (err) {
2971 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2972 goto err_lag_init;
2973 }
2974
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002975 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2976 if (err) {
2977 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2978 goto err_switchdev_init;
2979 }
2980
Ido Schimmel464dce12016-07-02 11:00:15 +02002981 err = mlxsw_sp_router_init(mlxsw_sp);
2982 if (err) {
2983 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2984 goto err_router_init;
2985 }
2986
Yotam Gigi763b4b72016-07-21 12:03:17 +02002987 err = mlxsw_sp_span_init(mlxsw_sp);
2988 if (err) {
2989 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2990 goto err_span_init;
2991 }
2992
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002993 err = mlxsw_sp_ports_create(mlxsw_sp);
2994 if (err) {
2995 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2996 goto err_ports_create;
2997 }
2998
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002999 return 0;
3000
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003001err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003002 mlxsw_sp_span_fini(mlxsw_sp);
3003err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003004 mlxsw_sp_router_fini(mlxsw_sp);
3005err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003006 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003007err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003008 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003009err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003010 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003011err_buffers_init:
3012err_flood_init:
3013 mlxsw_sp_traps_fini(mlxsw_sp);
3014err_rx_listener_register:
3015 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003016 return err;
3017}
3018
Jiri Pirkob2f10572016-04-08 19:11:23 +02003019static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003020{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003021 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003022
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003023 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003024 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003025 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003026 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003027 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003028 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003029 mlxsw_sp_traps_fini(mlxsw_sp);
3030 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003031 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003032 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003033}
3034
3035static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3036 .used_max_vepa_channels = 1,
3037 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003038 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003039 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003040 .used_max_pgt = 1,
3041 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003042 .used_flood_tables = 1,
3043 .used_flood_mode = 1,
3044 .flood_mode = 3,
3045 .max_fid_offset_flood_tables = 2,
3046 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003047 .max_fid_flood_tables = 2,
3048 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003049 .used_max_ib_mc = 1,
3050 .max_ib_mc = 0,
3051 .used_max_pkey = 1,
3052 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003053 .used_kvd_split_data = 1,
3054 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3055 .kvd_hash_single_parts = 2,
3056 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003057 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003058 .swid_config = {
3059 {
3060 .used_type = 1,
3061 .type = MLXSW_PORT_SWID_TYPE_ETH,
3062 }
3063 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003064 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003065};
3066
3067static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003068 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
3069 .owner = THIS_MODULE,
3070 .priv_size = sizeof(struct mlxsw_sp),
3071 .init = mlxsw_sp_init,
3072 .fini = mlxsw_sp_fini,
3073 .port_split = mlxsw_sp_port_split,
3074 .port_unsplit = mlxsw_sp_port_unsplit,
3075 .sb_pool_get = mlxsw_sp_sb_pool_get,
3076 .sb_pool_set = mlxsw_sp_sb_pool_set,
3077 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3078 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3079 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3080 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3081 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3082 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3083 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3084 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3085 .txhdr_construct = mlxsw_sp_txhdr_construct,
3086 .txhdr_len = MLXSW_TXHDR_LEN,
3087 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003088};
3089
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003090static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3091{
3092 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3093}
3094
David Aherndd823642016-10-17 19:15:49 -07003095static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3096{
3097 struct mlxsw_sp_port **port = data;
3098 int ret = 0;
3099
3100 if (mlxsw_sp_port_dev_check(lower_dev)) {
3101 *port = netdev_priv(lower_dev);
3102 ret = 1;
3103 }
3104
3105 return ret;
3106}
3107
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003108static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3109{
David Aherndd823642016-10-17 19:15:49 -07003110 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003111
3112 if (mlxsw_sp_port_dev_check(dev))
3113 return netdev_priv(dev);
3114
David Aherndd823642016-10-17 19:15:49 -07003115 port = NULL;
3116 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3117
3118 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003119}
3120
3121static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3122{
3123 struct mlxsw_sp_port *mlxsw_sp_port;
3124
3125 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3126 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3127}
3128
3129static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3130{
David Aherndd823642016-10-17 19:15:49 -07003131 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003132
3133 if (mlxsw_sp_port_dev_check(dev))
3134 return netdev_priv(dev);
3135
David Aherndd823642016-10-17 19:15:49 -07003136 port = NULL;
3137 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3138
3139 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003140}
3141
3142struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3143{
3144 struct mlxsw_sp_port *mlxsw_sp_port;
3145
3146 rcu_read_lock();
3147 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3148 if (mlxsw_sp_port)
3149 dev_hold(mlxsw_sp_port->dev);
3150 rcu_read_unlock();
3151 return mlxsw_sp_port;
3152}
3153
3154void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3155{
3156 dev_put(mlxsw_sp_port->dev);
3157}
3158
Ido Schimmel99724c12016-07-04 08:23:14 +02003159static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3160 unsigned long event)
3161{
3162 switch (event) {
3163 case NETDEV_UP:
3164 if (!r)
3165 return true;
3166 r->ref_count++;
3167 return false;
3168 case NETDEV_DOWN:
3169 if (r && --r->ref_count == 0)
3170 return true;
3171 /* It is possible we already removed the RIF ourselves
3172 * if it was assigned to a netdev that is now a bridge
3173 * or LAG slave.
3174 */
3175 return false;
3176 }
3177
3178 return false;
3179}
3180
3181static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3182{
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003183 struct mlxsw_resources *resources;
Ido Schimmel99724c12016-07-04 08:23:14 +02003184 int i;
3185
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003186 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3187 for (i = 0; i < resources->max_rif; i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003188 if (!mlxsw_sp->rifs[i])
3189 return i;
3190
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003191 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003192}
3193
3194static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3195 bool *p_lagged, u16 *p_system_port)
3196{
3197 u8 local_port = mlxsw_sp_vport->local_port;
3198
3199 *p_lagged = mlxsw_sp_vport->lagged;
3200 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3201}
3202
3203static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3204 struct net_device *l3_dev, u16 rif,
3205 bool create)
3206{
3207 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3208 bool lagged = mlxsw_sp_vport->lagged;
3209 char ritr_pl[MLXSW_REG_RITR_LEN];
3210 u16 system_port;
3211
3212 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3213 l3_dev->mtu, l3_dev->dev_addr);
3214
3215 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3216 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3217 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3218
3219 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3220}
3221
3222static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3223
3224static struct mlxsw_sp_fid *
3225mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3226{
3227 struct mlxsw_sp_fid *f;
3228
3229 f = kzalloc(sizeof(*f), GFP_KERNEL);
3230 if (!f)
3231 return NULL;
3232
3233 f->leave = mlxsw_sp_vport_rif_sp_leave;
3234 f->ref_count = 0;
3235 f->dev = l3_dev;
3236 f->fid = fid;
3237
3238 return f;
3239}
3240
3241static struct mlxsw_sp_rif *
3242mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3243{
3244 struct mlxsw_sp_rif *r;
3245
3246 r = kzalloc(sizeof(*r), GFP_KERNEL);
3247 if (!r)
3248 return NULL;
3249
3250 ether_addr_copy(r->addr, l3_dev->dev_addr);
3251 r->mtu = l3_dev->mtu;
3252 r->ref_count = 1;
3253 r->dev = l3_dev;
3254 r->rif = rif;
3255 r->f = f;
3256
3257 return r;
3258}
3259
3260static struct mlxsw_sp_rif *
3261mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3262 struct net_device *l3_dev)
3263{
3264 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3265 struct mlxsw_sp_fid *f;
3266 struct mlxsw_sp_rif *r;
3267 u16 fid, rif;
3268 int err;
3269
3270 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003271 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003272 return ERR_PTR(-ERANGE);
3273
3274 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3275 if (err)
3276 return ERR_PTR(err);
3277
3278 fid = mlxsw_sp_rif_sp_to_fid(rif);
3279 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3280 if (err)
3281 goto err_rif_fdb_op;
3282
3283 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3284 if (!f) {
3285 err = -ENOMEM;
3286 goto err_rfid_alloc;
3287 }
3288
3289 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3290 if (!r) {
3291 err = -ENOMEM;
3292 goto err_rif_alloc;
3293 }
3294
3295 f->r = r;
3296 mlxsw_sp->rifs[rif] = r;
3297
3298 return r;
3299
3300err_rif_alloc:
3301 kfree(f);
3302err_rfid_alloc:
3303 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3304err_rif_fdb_op:
3305 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3306 return ERR_PTR(err);
3307}
3308
3309static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3310 struct mlxsw_sp_rif *r)
3311{
3312 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3313 struct net_device *l3_dev = r->dev;
3314 struct mlxsw_sp_fid *f = r->f;
3315 u16 fid = f->fid;
3316 u16 rif = r->rif;
3317
3318 mlxsw_sp->rifs[rif] = NULL;
3319 f->r = NULL;
3320
3321 kfree(r);
3322
3323 kfree(f);
3324
3325 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3326
3327 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3328}
3329
3330static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3331 struct net_device *l3_dev)
3332{
3333 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3334 struct mlxsw_sp_rif *r;
3335
3336 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3337 if (!r) {
3338 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3339 if (IS_ERR(r))
3340 return PTR_ERR(r);
3341 }
3342
3343 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3344 r->f->ref_count++;
3345
3346 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3347
3348 return 0;
3349}
3350
3351static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3352{
3353 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3354
3355 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3356
3357 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3358 if (--f->ref_count == 0)
3359 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3360}
3361
3362static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3363 struct net_device *port_dev,
3364 unsigned long event, u16 vid)
3365{
3366 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3367 struct mlxsw_sp_port *mlxsw_sp_vport;
3368
3369 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3370 if (WARN_ON(!mlxsw_sp_vport))
3371 return -EINVAL;
3372
3373 switch (event) {
3374 case NETDEV_UP:
3375 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3376 case NETDEV_DOWN:
3377 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3378 break;
3379 }
3380
3381 return 0;
3382}
3383
3384static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3385 unsigned long event)
3386{
3387 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3388 return 0;
3389
3390 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3391}
3392
3393static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3394 struct net_device *lag_dev,
3395 unsigned long event, u16 vid)
3396{
3397 struct net_device *port_dev;
3398 struct list_head *iter;
3399 int err;
3400
3401 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3402 if (mlxsw_sp_port_dev_check(port_dev)) {
3403 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3404 event, vid);
3405 if (err)
3406 return err;
3407 }
3408 }
3409
3410 return 0;
3411}
3412
3413static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3414 unsigned long event)
3415{
3416 if (netif_is_bridge_port(lag_dev))
3417 return 0;
3418
3419 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3420}
3421
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003422static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3423 struct net_device *l3_dev)
3424{
3425 u16 fid;
3426
3427 if (is_vlan_dev(l3_dev))
3428 fid = vlan_dev_vlan_id(l3_dev);
3429 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3430 fid = 1;
3431 else
3432 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3433
3434 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3435}
3436
Ido Schimmelf888f582016-08-24 11:18:51 +02003437static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3438{
3439 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3440 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3441}
3442
3443static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3444{
3445 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3446}
3447
3448static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3449 bool set)
3450{
3451 enum mlxsw_flood_table_type table_type;
3452 char *sftr_pl;
3453 u16 index;
3454 int err;
3455
3456 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3457 if (!sftr_pl)
3458 return -ENOMEM;
3459
3460 table_type = mlxsw_sp_flood_table_type_get(fid);
3461 index = mlxsw_sp_flood_table_index_get(fid);
3462 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3463 1, MLXSW_PORT_ROUTER_PORT, set);
3464 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3465
3466 kfree(sftr_pl);
3467 return err;
3468}
3469
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003470static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3471{
3472 if (mlxsw_sp_fid_is_vfid(fid))
3473 return MLXSW_REG_RITR_FID_IF;
3474 else
3475 return MLXSW_REG_RITR_VLAN_IF;
3476}
3477
3478static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3479 struct net_device *l3_dev,
3480 u16 fid, u16 rif,
3481 bool create)
3482{
3483 enum mlxsw_reg_ritr_if_type rif_type;
3484 char ritr_pl[MLXSW_REG_RITR_LEN];
3485
3486 rif_type = mlxsw_sp_rif_type_get(fid);
3487 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3488 l3_dev->dev_addr);
3489 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3490
3491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3492}
3493
3494static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3495 struct net_device *l3_dev,
3496 struct mlxsw_sp_fid *f)
3497{
3498 struct mlxsw_sp_rif *r;
3499 u16 rif;
3500 int err;
3501
3502 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003503 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003504 return -ERANGE;
3505
Ido Schimmelf888f582016-08-24 11:18:51 +02003506 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003507 if (err)
3508 return err;
3509
Ido Schimmelf888f582016-08-24 11:18:51 +02003510 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3511 if (err)
3512 goto err_rif_bridge_op;
3513
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3515 if (err)
3516 goto err_rif_fdb_op;
3517
3518 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3519 if (!r) {
3520 err = -ENOMEM;
3521 goto err_rif_alloc;
3522 }
3523
3524 f->r = r;
3525 mlxsw_sp->rifs[rif] = r;
3526
3527 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3528
3529 return 0;
3530
3531err_rif_alloc:
3532 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3533err_rif_fdb_op:
3534 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003535err_rif_bridge_op:
3536 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003537 return err;
3538}
3539
3540void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3541 struct mlxsw_sp_rif *r)
3542{
3543 struct net_device *l3_dev = r->dev;
3544 struct mlxsw_sp_fid *f = r->f;
3545 u16 rif = r->rif;
3546
3547 mlxsw_sp->rifs[rif] = NULL;
3548 f->r = NULL;
3549
3550 kfree(r);
3551
3552 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3553
3554 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3555
Ido Schimmelf888f582016-08-24 11:18:51 +02003556 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3557
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003558 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3559}
3560
3561static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3562 struct net_device *br_dev,
3563 unsigned long event)
3564{
3565 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3566 struct mlxsw_sp_fid *f;
3567
3568 /* FID can either be an actual FID if the L3 device is the
3569 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3570 * L3 device is a VLAN-unaware bridge and we get a vFID.
3571 */
3572 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3573 if (WARN_ON(!f))
3574 return -EINVAL;
3575
3576 switch (event) {
3577 case NETDEV_UP:
3578 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3579 case NETDEV_DOWN:
3580 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3581 break;
3582 }
3583
3584 return 0;
3585}
3586
Ido Schimmel99724c12016-07-04 08:23:14 +02003587static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3588 unsigned long event)
3589{
3590 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003592 u16 vid = vlan_dev_vlan_id(vlan_dev);
3593
3594 if (mlxsw_sp_port_dev_check(real_dev))
3595 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3596 vid);
3597 else if (netif_is_lag_master(real_dev))
3598 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3599 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003600 else if (netif_is_bridge_master(real_dev) &&
3601 mlxsw_sp->master_bridge.dev == real_dev)
3602 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3603 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003604
3605 return 0;
3606}
3607
3608static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3609 unsigned long event, void *ptr)
3610{
3611 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3612 struct net_device *dev = ifa->ifa_dev->dev;
3613 struct mlxsw_sp *mlxsw_sp;
3614 struct mlxsw_sp_rif *r;
3615 int err = 0;
3616
3617 mlxsw_sp = mlxsw_sp_lower_get(dev);
3618 if (!mlxsw_sp)
3619 goto out;
3620
3621 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3622 if (!mlxsw_sp_rif_should_config(r, event))
3623 goto out;
3624
3625 if (mlxsw_sp_port_dev_check(dev))
3626 err = mlxsw_sp_inetaddr_port_event(dev, event);
3627 else if (netif_is_lag_master(dev))
3628 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003629 else if (netif_is_bridge_master(dev))
3630 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003631 else if (is_vlan_dev(dev))
3632 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3633
3634out:
3635 return notifier_from_errno(err);
3636}
3637
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003638static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3639 const char *mac, int mtu)
3640{
3641 char ritr_pl[MLXSW_REG_RITR_LEN];
3642 int err;
3643
3644 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3645 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3646 if (err)
3647 return err;
3648
3649 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3650 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3651 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3652 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3653}
3654
3655static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3656{
3657 struct mlxsw_sp *mlxsw_sp;
3658 struct mlxsw_sp_rif *r;
3659 int err;
3660
3661 mlxsw_sp = mlxsw_sp_lower_get(dev);
3662 if (!mlxsw_sp)
3663 return 0;
3664
3665 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3666 if (!r)
3667 return 0;
3668
3669 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3670 if (err)
3671 return err;
3672
3673 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3674 if (err)
3675 goto err_rif_edit;
3676
3677 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3678 if (err)
3679 goto err_rif_fdb_op;
3680
3681 ether_addr_copy(r->addr, dev->dev_addr);
3682 r->mtu = dev->mtu;
3683
3684 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3685
3686 return 0;
3687
3688err_rif_fdb_op:
3689 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3690err_rif_edit:
3691 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3692 return err;
3693}
3694
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003695static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3696 u16 fid)
3697{
3698 if (mlxsw_sp_fid_is_vfid(fid))
3699 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3700 else
3701 return test_bit(fid, lag_port->active_vlans);
3702}
3703
3704static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3705 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003706{
3707 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003708 u8 local_port = mlxsw_sp_port->local_port;
3709 u16 lag_id = mlxsw_sp_port->lag_id;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003710 struct mlxsw_resources *resources;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003711 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003712
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003713 if (!mlxsw_sp_port->lagged)
3714 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003715
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003716 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3717 for (i = 0; i < resources->max_ports_in_lag; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003718 struct mlxsw_sp_port *lag_port;
3719
3720 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3721 if (!lag_port || lag_port->local_port == local_port)
3722 continue;
3723 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3724 count++;
3725 }
3726
3727 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003728}
3729
3730static int
3731mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3732 u16 fid)
3733{
3734 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3735 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3736
3737 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3738 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3739 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3740 mlxsw_sp_port->local_port);
3741
Ido Schimmel22305372016-06-20 23:04:21 +02003742 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3743 mlxsw_sp_port->local_port, fid);
3744
Ido Schimmel039c49a2016-01-27 15:20:18 +01003745 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3746}
3747
3748static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003749mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3750 u16 fid)
3751{
3752 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3753 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3754
3755 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3756 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3757 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3758
Ido Schimmel22305372016-06-20 23:04:21 +02003759 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3760 mlxsw_sp_port->lag_id, fid);
3761
Ido Schimmel039c49a2016-01-27 15:20:18 +01003762 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3763}
3764
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003765int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003766{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003767 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3768 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003769
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003770 if (mlxsw_sp_port->lagged)
3771 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003772 fid);
3773 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003774 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003775}
3776
Ido Schimmel701b1862016-07-04 08:23:16 +02003777static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3778{
3779 struct mlxsw_sp_fid *f, *tmp;
3780
3781 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3782 if (--f->ref_count == 0)
3783 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3784 else
3785 WARN_ON_ONCE(1);
3786}
3787
Ido Schimmel7117a572016-06-20 23:04:06 +02003788static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3789 struct net_device *br_dev)
3790{
3791 return !mlxsw_sp->master_bridge.dev ||
3792 mlxsw_sp->master_bridge.dev == br_dev;
3793}
3794
3795static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3796 struct net_device *br_dev)
3797{
3798 mlxsw_sp->master_bridge.dev = br_dev;
3799 mlxsw_sp->master_bridge.ref_count++;
3800}
3801
3802static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3803{
Ido Schimmel701b1862016-07-04 08:23:16 +02003804 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003805 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003806 /* It's possible upper VLAN devices are still holding
3807 * references to underlying FIDs. Drop the reference
3808 * and release the resources if it was the last one.
3809 * If it wasn't, then something bad happened.
3810 */
3811 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3812 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003813}
3814
3815static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3816 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003817{
3818 struct net_device *dev = mlxsw_sp_port->dev;
3819 int err;
3820
3821 /* When port is not bridged untagged packets are tagged with
3822 * PVID=VID=1, thereby creating an implicit VLAN interface in
3823 * the device. Remove it and let bridge code take care of its
3824 * own VLANs.
3825 */
3826 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003827 if (err)
3828 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003829
Ido Schimmel7117a572016-06-20 23:04:06 +02003830 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3831
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003832 mlxsw_sp_port->learning = 1;
3833 mlxsw_sp_port->learning_sync = 1;
3834 mlxsw_sp_port->uc_flood = 1;
3835 mlxsw_sp_port->bridged = 1;
3836
3837 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003838}
3839
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003840static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003841{
3842 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003843
Ido Schimmel28a01d22016-02-18 11:30:02 +01003844 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3845
Ido Schimmel7117a572016-06-20 23:04:06 +02003846 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3847
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003848 mlxsw_sp_port->learning = 0;
3849 mlxsw_sp_port->learning_sync = 0;
3850 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003851 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003852
3853 /* Add implicit VLAN interface in the device, so that untagged
3854 * packets will be classified to the default vFID.
3855 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003856 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003857}
3858
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003859static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003860{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003861 char sldr_pl[MLXSW_REG_SLDR_LEN];
3862
3863 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3864 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3865}
3866
3867static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3868{
3869 char sldr_pl[MLXSW_REG_SLDR_LEN];
3870
3871 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3872 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3873}
3874
3875static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3876 u16 lag_id, u8 port_index)
3877{
3878 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3879 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3880
3881 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3882 lag_id, port_index);
3883 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3884}
3885
3886static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3887 u16 lag_id)
3888{
3889 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3890 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3891
3892 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3893 lag_id);
3894 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3895}
3896
3897static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3898 u16 lag_id)
3899{
3900 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3901 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3902
3903 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3904 lag_id);
3905 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3906}
3907
3908static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3909 u16 lag_id)
3910{
3911 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3912 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3913
3914 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3915 lag_id);
3916 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3917}
3918
3919static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3920 struct net_device *lag_dev,
3921 u16 *p_lag_id)
3922{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003923 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003924 struct mlxsw_sp_upper *lag;
3925 int free_lag_id = -1;
3926 int i;
3927
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003928 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3929 for (i = 0; i < resources->max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003930 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3931 if (lag->ref_count) {
3932 if (lag->dev == lag_dev) {
3933 *p_lag_id = i;
3934 return 0;
3935 }
3936 } else if (free_lag_id < 0) {
3937 free_lag_id = i;
3938 }
3939 }
3940 if (free_lag_id < 0)
3941 return -EBUSY;
3942 *p_lag_id = free_lag_id;
3943 return 0;
3944}
3945
3946static bool
3947mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3948 struct net_device *lag_dev,
3949 struct netdev_lag_upper_info *lag_upper_info)
3950{
3951 u16 lag_id;
3952
3953 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3954 return false;
3955 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3956 return false;
3957 return true;
3958}
3959
3960static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3961 u16 lag_id, u8 *p_port_index)
3962{
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003963 struct mlxsw_resources *resources;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003964 int i;
3965
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003966 resources = mlxsw_core_resources_get(mlxsw_sp->core);
3967 for (i = 0; i < resources->max_ports_in_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003968 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3969 *p_port_index = i;
3970 return 0;
3971 }
3972 }
3973 return -EBUSY;
3974}
3975
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003976static void
3977mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3978 u16 lag_id)
3979{
3980 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003981 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003982
3983 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3984 if (WARN_ON(!mlxsw_sp_vport))
3985 return;
3986
Ido Schimmel11943ff2016-07-02 11:00:12 +02003987 /* If vPort is assigned a RIF, then leave it since it's no
3988 * longer valid.
3989 */
3990 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3991 if (f)
3992 f->leave(mlxsw_sp_vport);
3993
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003994 mlxsw_sp_vport->lag_id = lag_id;
3995 mlxsw_sp_vport->lagged = 1;
3996}
3997
3998static void
3999mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4000{
4001 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004002 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004003
4004 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4005 if (WARN_ON(!mlxsw_sp_vport))
4006 return;
4007
Ido Schimmel11943ff2016-07-02 11:00:12 +02004008 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4009 if (f)
4010 f->leave(mlxsw_sp_vport);
4011
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004012 mlxsw_sp_vport->lagged = 0;
4013}
4014
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004015static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4016 struct net_device *lag_dev)
4017{
4018 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4019 struct mlxsw_sp_upper *lag;
4020 u16 lag_id;
4021 u8 port_index;
4022 int err;
4023
4024 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4025 if (err)
4026 return err;
4027 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4028 if (!lag->ref_count) {
4029 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4030 if (err)
4031 return err;
4032 lag->dev = lag_dev;
4033 }
4034
4035 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4036 if (err)
4037 return err;
4038 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4039 if (err)
4040 goto err_col_port_add;
4041 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4042 if (err)
4043 goto err_col_port_enable;
4044
4045 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4046 mlxsw_sp_port->local_port);
4047 mlxsw_sp_port->lag_id = lag_id;
4048 mlxsw_sp_port->lagged = 1;
4049 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004050
4051 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4052
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004053 return 0;
4054
Ido Schimmel51554db2016-05-06 22:18:39 +02004055err_col_port_enable:
4056 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004057err_col_port_add:
4058 if (!lag->ref_count)
4059 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004060 return err;
4061}
4062
Ido Schimmel82e6db02016-06-20 23:04:04 +02004063static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4064 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004065{
4066 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004067 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004068 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004069
4070 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004071 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004072 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4073 WARN_ON(lag->ref_count == 0);
4074
Ido Schimmel82e6db02016-06-20 23:04:04 +02004075 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4076 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004077
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004078 if (mlxsw_sp_port->bridged) {
4079 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004080 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004081 }
4082
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004083 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004084 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004085
4086 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4087 mlxsw_sp_port->local_port);
4088 mlxsw_sp_port->lagged = 0;
4089 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004090
4091 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004092}
4093
Jiri Pirko74581202015-12-03 12:12:30 +01004094static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4095 u16 lag_id)
4096{
4097 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4098 char sldr_pl[MLXSW_REG_SLDR_LEN];
4099
4100 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4101 mlxsw_sp_port->local_port);
4102 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4103}
4104
4105static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4106 u16 lag_id)
4107{
4108 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4109 char sldr_pl[MLXSW_REG_SLDR_LEN];
4110
4111 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4112 mlxsw_sp_port->local_port);
4113 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4114}
4115
4116static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4117 bool lag_tx_enabled)
4118{
4119 if (lag_tx_enabled)
4120 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4121 mlxsw_sp_port->lag_id);
4122 else
4123 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4124 mlxsw_sp_port->lag_id);
4125}
4126
4127static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4128 struct netdev_lag_lower_state_info *info)
4129{
4130 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4131}
4132
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004133static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4134 struct net_device *vlan_dev)
4135{
4136 struct mlxsw_sp_port *mlxsw_sp_vport;
4137 u16 vid = vlan_dev_vlan_id(vlan_dev);
4138
4139 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004140 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004141 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004142
4143 mlxsw_sp_vport->dev = vlan_dev;
4144
4145 return 0;
4146}
4147
Ido Schimmel82e6db02016-06-20 23:04:04 +02004148static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4149 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004150{
4151 struct mlxsw_sp_port *mlxsw_sp_vport;
4152 u16 vid = vlan_dev_vlan_id(vlan_dev);
4153
4154 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004155 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004156 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004157
4158 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004159}
4160
Jiri Pirko74581202015-12-03 12:12:30 +01004161static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4162 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004163{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004164 struct netdev_notifier_changeupper_info *info;
4165 struct mlxsw_sp_port *mlxsw_sp_port;
4166 struct net_device *upper_dev;
4167 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004168 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004169
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004170 mlxsw_sp_port = netdev_priv(dev);
4171 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4172 info = ptr;
4173
4174 switch (event) {
4175 case NETDEV_PRECHANGEUPPER:
4176 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004177 if (!is_vlan_dev(upper_dev) &&
4178 !netif_is_lag_master(upper_dev) &&
4179 !netif_is_bridge_master(upper_dev))
4180 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004181 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004182 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004183 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004184 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004185 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004186 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004187 if (netif_is_lag_master(upper_dev) &&
4188 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4189 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004190 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004191 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4192 return -EINVAL;
4193 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4194 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4195 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004196 break;
4197 case NETDEV_CHANGEUPPER:
4198 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004199 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004200 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004201 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4202 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004203 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004204 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4205 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004206 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004207 if (info->linking)
4208 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4209 upper_dev);
4210 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004211 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004212 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004213 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004214 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4215 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004216 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004217 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4218 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004219 } else {
4220 err = -EINVAL;
4221 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004222 }
4223 break;
4224 }
4225
Ido Schimmel80bedf12016-06-20 23:03:59 +02004226 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004227}
4228
Jiri Pirko74581202015-12-03 12:12:30 +01004229static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4230 unsigned long event, void *ptr)
4231{
4232 struct netdev_notifier_changelowerstate_info *info;
4233 struct mlxsw_sp_port *mlxsw_sp_port;
4234 int err;
4235
4236 mlxsw_sp_port = netdev_priv(dev);
4237 info = ptr;
4238
4239 switch (event) {
4240 case NETDEV_CHANGELOWERSTATE:
4241 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4242 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4243 info->lower_state_info);
4244 if (err)
4245 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4246 }
4247 break;
4248 }
4249
Ido Schimmel80bedf12016-06-20 23:03:59 +02004250 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004251}
4252
4253static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4254 unsigned long event, void *ptr)
4255{
4256 switch (event) {
4257 case NETDEV_PRECHANGEUPPER:
4258 case NETDEV_CHANGEUPPER:
4259 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4260 case NETDEV_CHANGELOWERSTATE:
4261 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4262 }
4263
Ido Schimmel80bedf12016-06-20 23:03:59 +02004264 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004265}
4266
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004267static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4268 unsigned long event, void *ptr)
4269{
4270 struct net_device *dev;
4271 struct list_head *iter;
4272 int ret;
4273
4274 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4275 if (mlxsw_sp_port_dev_check(dev)) {
4276 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004277 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004278 return ret;
4279 }
4280 }
4281
Ido Schimmel80bedf12016-06-20 23:03:59 +02004282 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004283}
4284
Ido Schimmel701b1862016-07-04 08:23:16 +02004285static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4286 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004287{
Ido Schimmel701b1862016-07-04 08:23:16 +02004288 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004289 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004290
Ido Schimmel701b1862016-07-04 08:23:16 +02004291 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4292 if (!f) {
4293 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4294 if (IS_ERR(f))
4295 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004296 }
4297
Ido Schimmel701b1862016-07-04 08:23:16 +02004298 f->ref_count++;
4299
4300 return 0;
4301}
4302
4303static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4304 struct net_device *vlan_dev)
4305{
4306 u16 fid = vlan_dev_vlan_id(vlan_dev);
4307 struct mlxsw_sp_fid *f;
4308
4309 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004310 if (f && f->r)
4311 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004312 if (f && --f->ref_count == 0)
4313 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4314}
4315
4316static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4317 unsigned long event, void *ptr)
4318{
4319 struct netdev_notifier_changeupper_info *info;
4320 struct net_device *upper_dev;
4321 struct mlxsw_sp *mlxsw_sp;
4322 int err;
4323
4324 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4325 if (!mlxsw_sp)
4326 return 0;
4327 if (br_dev != mlxsw_sp->master_bridge.dev)
4328 return 0;
4329
4330 info = ptr;
4331
4332 switch (event) {
4333 case NETDEV_CHANGEUPPER:
4334 upper_dev = info->upper_dev;
4335 if (!is_vlan_dev(upper_dev))
4336 break;
4337 if (info->linking) {
4338 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4339 upper_dev);
4340 if (err)
4341 return err;
4342 } else {
4343 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4344 }
4345 break;
4346 }
4347
4348 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004349}
4350
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004351static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004352{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004353 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004354 MLXSW_SP_VFID_MAX);
4355}
4356
4357static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4358{
4359 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4360
4361 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4362 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004363}
4364
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004365static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004366
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004367static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4368 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004369{
4370 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004371 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004372 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004373 int err;
4374
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004375 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004376 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004377 dev_err(dev, "No available vFIDs\n");
4378 return ERR_PTR(-ERANGE);
4379 }
4380
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004381 fid = mlxsw_sp_vfid_to_fid(vfid);
4382 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004383 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004384 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004385 return ERR_PTR(err);
4386 }
4387
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004388 f = kzalloc(sizeof(*f), GFP_KERNEL);
4389 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004390 goto err_allocate_vfid;
4391
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004392 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004393 f->fid = fid;
4394 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004395
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004396 list_add(&f->list, &mlxsw_sp->vfids.list);
4397 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004398
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004399 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004400
4401err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004402 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004403 return ERR_PTR(-ENOMEM);
4404}
4405
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004406static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4407 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004409 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004410 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004411
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004412 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004413 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004414
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004415 if (f->r)
4416 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004417
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004418 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004419
4420 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004421}
4422
Ido Schimmel99724c12016-07-04 08:23:14 +02004423static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4424 bool valid)
4425{
4426 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4427 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4428
4429 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4430 vid);
4431}
4432
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004433static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4434 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004435{
Ido Schimmel0355b592016-06-20 23:04:13 +02004436 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004437 int err;
4438
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004439 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004440 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004441 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004442 if (IS_ERR(f))
4443 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004444 }
4445
Ido Schimmel0355b592016-06-20 23:04:13 +02004446 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4447 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004448 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004449
Ido Schimmel0355b592016-06-20 23:04:13 +02004450 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4451 if (err)
4452 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004453
Ido Schimmel41b996c2016-06-20 23:04:17 +02004454 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004455 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004456
Ido Schimmel22305372016-06-20 23:04:21 +02004457 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4458
Ido Schimmel0355b592016-06-20 23:04:13 +02004459 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004460
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004461err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004462 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4463err_vport_flood_set:
4464 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004465 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004466 return err;
4467}
4468
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004469static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004470{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004471 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004472
Ido Schimmel22305372016-06-20 23:04:21 +02004473 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4474
Ido Schimmel0355b592016-06-20 23:04:13 +02004475 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4476
4477 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4478
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004479 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4480
Ido Schimmel41b996c2016-06-20 23:04:17 +02004481 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004482 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004483 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004484}
4485
4486static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4487 struct net_device *br_dev)
4488{
Ido Schimmel99724c12016-07-04 08:23:14 +02004489 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004490 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4491 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004492 int err;
4493
Ido Schimmel99724c12016-07-04 08:23:14 +02004494 if (f && !WARN_ON(!f->leave))
4495 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004496
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004497 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004498 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004499 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004500 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004501 }
4502
4503 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4504 if (err) {
4505 netdev_err(dev, "Failed to enable learning\n");
4506 goto err_port_vid_learning_set;
4507 }
4508
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004509 mlxsw_sp_vport->learning = 1;
4510 mlxsw_sp_vport->learning_sync = 1;
4511 mlxsw_sp_vport->uc_flood = 1;
4512 mlxsw_sp_vport->bridged = 1;
4513
4514 return 0;
4515
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004516err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004517 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004518 return err;
4519}
4520
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004521static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004522{
4523 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004524
4525 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4526
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004527 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004528
Ido Schimmel0355b592016-06-20 23:04:13 +02004529 mlxsw_sp_vport->learning = 0;
4530 mlxsw_sp_vport->learning_sync = 0;
4531 mlxsw_sp_vport->uc_flood = 0;
4532 mlxsw_sp_vport->bridged = 0;
4533}
4534
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004535static bool
4536mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4537 const struct net_device *br_dev)
4538{
4539 struct mlxsw_sp_port *mlxsw_sp_vport;
4540
4541 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4542 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004543 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004544
4545 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004546 return false;
4547 }
4548
4549 return true;
4550}
4551
4552static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4553 unsigned long event, void *ptr,
4554 u16 vid)
4555{
4556 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4557 struct netdev_notifier_changeupper_info *info = ptr;
4558 struct mlxsw_sp_port *mlxsw_sp_vport;
4559 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004560 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004561
4562 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4563
4564 switch (event) {
4565 case NETDEV_PRECHANGEUPPER:
4566 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004567 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004568 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004569 if (!info->linking)
4570 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004571 /* We can't have multiple VLAN interfaces configured on
4572 * the same port and being members in the same bridge.
4573 */
4574 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4575 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004576 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004577 break;
4578 case NETDEV_CHANGEUPPER:
4579 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004580 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004581 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004582 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004583 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4584 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004585 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004586 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004587 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004588 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004589 }
4590 }
4591
Ido Schimmel80bedf12016-06-20 23:03:59 +02004592 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004593}
4594
Ido Schimmel272c4472015-12-15 16:03:47 +01004595static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4596 unsigned long event, void *ptr,
4597 u16 vid)
4598{
4599 struct net_device *dev;
4600 struct list_head *iter;
4601 int ret;
4602
4603 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4604 if (mlxsw_sp_port_dev_check(dev)) {
4605 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4606 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004607 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004608 return ret;
4609 }
4610 }
4611
Ido Schimmel80bedf12016-06-20 23:03:59 +02004612 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004613}
4614
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004615static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4616 unsigned long event, void *ptr)
4617{
4618 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4619 u16 vid = vlan_dev_vlan_id(vlan_dev);
4620
Ido Schimmel272c4472015-12-15 16:03:47 +01004621 if (mlxsw_sp_port_dev_check(real_dev))
4622 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4623 vid);
4624 else if (netif_is_lag_master(real_dev))
4625 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4626 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004627
Ido Schimmel80bedf12016-06-20 23:03:59 +02004628 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004629}
4630
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004631static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4632 unsigned long event, void *ptr)
4633{
4634 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004635 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004636
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004637 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4638 err = mlxsw_sp_netdevice_router_port_event(dev);
4639 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004640 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4641 else if (netif_is_lag_master(dev))
4642 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004643 else if (netif_is_bridge_master(dev))
4644 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004645 else if (is_vlan_dev(dev))
4646 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004647
Ido Schimmel80bedf12016-06-20 23:03:59 +02004648 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004649}
4650
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004651static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4652 .notifier_call = mlxsw_sp_netdevice_event,
4653};
4654
Ido Schimmel99724c12016-07-04 08:23:14 +02004655static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4656 .notifier_call = mlxsw_sp_inetaddr_event,
4657 .priority = 10, /* Must be called before FIB notifier block */
4658};
4659
Jiri Pirkoe7322632016-09-01 10:37:43 +02004660static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4661 .notifier_call = mlxsw_sp_router_netevent_event,
4662};
4663
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004664static int __init mlxsw_sp_module_init(void)
4665{
4666 int err;
4667
4668 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004669 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004670 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4671
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004672 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4673 if (err)
4674 goto err_core_driver_register;
4675 return 0;
4676
4677err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004678 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004679 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004680 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4681 return err;
4682}
4683
4684static void __exit mlxsw_sp_module_exit(void)
4685{
4686 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004687 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004688 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004689 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4690}
4691
4692module_init(mlxsw_sp_module_init);
4693module_exit(mlxsw_sp_module_exit);
4694
4695MODULE_LICENSE("Dual BSD/GPL");
4696MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4697MODULE_DESCRIPTION("Mellanox Spectrum driver");
4698MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);