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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200150 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300298 u8 reserved_at_40[0x17];
299 u8 outer_esp_spi[0x1];
300 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300303 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304};
305
306struct mlx5_ifc_flow_table_prop_layout_bits {
307 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000308 u8 reserved_at_1[0x1];
309 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200310 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200311 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200312 u8 identified_miss_table_mode[0x1];
313 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300314 u8 encap[0x1];
315 u8 decap[0x1];
316 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317
Matan Barakb4ff3a32016-02-09 14:57:42 +0200318 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300319 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200320 u8 log_max_modify_header_context[0x8];
321 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300322 u8 max_ft_level[0x8];
323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300325
Matan Barakb4ff3a32016-02-09 14:57:42 +0200326 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200327 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328
Matan Barakb4ff3a32016-02-09 14:57:42 +0200329 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200330 u8 log_max_destination[0x8];
331
Raed Salem16f1c5b2017-07-30 11:02:51 +0300332 u8 log_max_flow_counter[0x8];
333 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334 u8 log_max_flow[0x8];
335
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
339
340 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
341};
342
343struct mlx5_ifc_odp_per_transport_service_cap_bits {
344 u8 send[0x1];
345 u8 receive[0x1];
346 u8 write[0x1];
347 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200348 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200350 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300351};
352
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200355
356 u8 ipv4[0x20];
357};
358
359struct mlx5_ifc_ipv6_layout_bits {
360 u8 ipv6[16][0x8];
361};
362
363union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
364 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
365 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200366 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200367};
368
Saeed Mahameede2816822015-05-28 22:28:40 +0300369struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
370 u8 smac_47_16[0x20];
371
372 u8 smac_15_0[0x10];
373 u8 ethertype[0x10];
374
375 u8 dmac_47_16[0x20];
376
377 u8 dmac_15_0[0x10];
378 u8 first_prio[0x3];
379 u8 first_cfi[0x1];
380 u8 first_vid[0xc];
381
382 u8 ip_protocol[0x8];
383 u8 ip_dscp[0x6];
384 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300385 u8 cvlan_tag[0x1];
386 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300388 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300389 u8 tcp_flags[0x9];
390
391 u8 tcp_sport[0x10];
392 u8 tcp_dport[0x10];
393
Or Gerlitza8ade552017-06-07 17:49:56 +0300394 u8 reserved_at_c0[0x18];
395 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300396
397 u8 udp_sport[0x10];
398 u8 udp_dport[0x10];
399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200402 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300403};
404
405struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300406 u8 reserved_at_0[0x8];
407 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408
Matan Barakb4ff3a32016-02-09 14:57:42 +0200409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300410 u8 source_port[0x10];
411
412 u8 outer_second_prio[0x3];
413 u8 outer_second_cfi[0x1];
414 u8 outer_second_vid[0xc];
415 u8 inner_second_prio[0x3];
416 u8 inner_second_cfi[0x1];
417 u8 inner_second_vid[0xc];
418
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300419 u8 outer_second_cvlan_tag[0x1];
420 u8 inner_second_cvlan_tag[0x1];
421 u8 outer_second_svlan_tag[0x1];
422 u8 inner_second_svlan_tag[0x1];
423 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300424 u8 gre_protocol[0x10];
425
426 u8 gre_key_h[0x18];
427 u8 gre_key_l[0x8];
428
429 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 outer_ipv6_flow_label[0x14];
436
Matan Barakb4ff3a32016-02-09 14:57:42 +0200437 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300438 u8 inner_ipv6_flow_label[0x14];
439
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300440 u8 reserved_at_120[0x28];
441 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300442 u8 reserved_at_160[0x20];
443 u8 outer_esp_spi[0x20];
444 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300445};
446
447struct mlx5_ifc_cmd_pas_bits {
448 u8 pa_h[0x20];
449
450 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200451 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300452};
453
454struct mlx5_ifc_uint64_bits {
455 u8 hi[0x20];
456
457 u8 lo[0x20];
458};
459
460enum {
461 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
462 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
463 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
464 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
465 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
466 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
467 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
468 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
469 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
470 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
471};
472
473struct mlx5_ifc_ads_bits {
474 u8 fl[0x1];
475 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200476 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300477 u8 pkey_index[0x10];
478
Matan Barakb4ff3a32016-02-09 14:57:42 +0200479 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300480 u8 grh[0x1];
481 u8 mlid[0x7];
482 u8 rlid[0x10];
483
484 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200485 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300486 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 stat_rate[0x4];
489 u8 hop_limit[0x8];
490
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 tclass[0x8];
493 u8 flow_label[0x14];
494
495 u8 rgid_rip[16][0x8];
496
Matan Barakb4ff3a32016-02-09 14:57:42 +0200497 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498 u8 f_dscp[0x1];
499 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200500 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501 u8 f_eth_prio[0x1];
502 u8 ecn[0x2];
503 u8 dscp[0x6];
504 u8 udp_sport[0x10];
505
506 u8 dei_cfi[0x1];
507 u8 eth_prio[0x3];
508 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200509 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510 u8 rmac_47_32[0x10];
511
512 u8 rmac_31_0[0x20];
513};
514
515struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200516 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300517 u8 nic_rx_multi_path_tirs_fts[0x1];
518 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
519 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534};
535
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
544
Matan Barakb4ff3a32016-02-09 14:57:42 +0200545 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200546};
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548struct mlx5_ifc_e_switch_cap_bits {
549 u8 vport_svlan_strip[0x1];
550 u8 vport_cvlan_strip[0x1];
551 u8 vport_svlan_insert[0x1];
552 u8 vport_cvlan_insert_if_not_exist[0x1];
553 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300554 u8 reserved_at_5[0x19];
555 u8 nic_vport_node_guid_modify[0x1];
556 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300558 u8 vxlan_encap_decap[0x1];
559 u8 nvgre_encap_decap[0x1];
560 u8 reserved_at_22[0x9];
561 u8 log_max_encap_headers[0x5];
562 u8 reserved_2b[0x6];
563 u8 max_encap_header_size[0xa];
564
565 u8 reserved_40[0x7c0];
566
Saeed Mahameedd6666752015-12-01 18:03:22 +0200567};
568
Saeed Mahameed74862162016-06-09 15:11:34 +0300569struct mlx5_ifc_qos_cap_bits {
570 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200572 u8 esw_bw_share[0x1];
573 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200574 u8 reserved_at_4[0x1];
575 u8 packet_pacing_burst_bound[0x1];
576 u8 packet_pacing_typical_size[0x1];
577 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300578
579 u8 reserved_at_20[0x20];
580
Saeed Mahameed74862162016-06-09 15:11:34 +0300581 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300582
Saeed Mahameed74862162016-06-09 15:11:34 +0300583 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300584
585 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300586 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300587
588 u8 esw_element_type[0x10];
589 u8 esw_tsar_type[0x10];
590
591 u8 reserved_at_c0[0x10];
592 u8 max_qos_para_vport[0x10];
593
594 u8 max_tsar_bw_share[0x20];
595
596 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300597};
598
Saeed Mahameede2816822015-05-28 22:28:40 +0300599struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
600 u8 csum_cap[0x1];
601 u8 vlan_cap[0x1];
602 u8 lro_cap[0x1];
603 u8 lro_psh_flag[0x1];
604 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200605 u8 reserved_at_5[0x2];
606 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200607 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200608 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200610 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300611 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300613 u8 reg_umr_sq[0x1];
614 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300615 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300618 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 tunnel_stateless_vxlan[0x1];
620
Ilan Tayari547eede2017-04-18 16:04:28 +0300621 u8 swp[0x1];
622 u8 swp_csum[0x1];
623 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300624 u8 reserved_at_23[0x1b];
625 u8 max_geneve_opt_len[0x1];
626 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 lro_min_mss_size[0x10];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632
633 u8 lro_timer_supported_periods[4][0x20];
634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636};
637
638struct mlx5_ifc_roce_cap_bits {
639 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643
Matan Barakb4ff3a32016-02-09 14:57:42 +0200644 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 roce_version[0x8];
648
Matan Barakb4ff3a32016-02-09 14:57:42 +0200649 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300650 u8 r_roce_dest_udp_port[0x10];
651
652 u8 r_roce_max_src_udp_port[0x10];
653 u8 r_roce_min_src_udp_port[0x10];
654
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656 u8 roce_address_table_size[0x10];
657
Matan Barakb4ff3a32016-02-09 14:57:42 +0200658 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300659};
660
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300661struct mlx5_ifc_device_mem_cap_bits {
662 u8 memic[0x1];
663 u8 reserved_at_1[0x1f];
664
665 u8 reserved_at_20[0xb];
666 u8 log_min_memic_alloc_size[0x5];
667 u8 reserved_at_30[0x8];
668 u8 log_max_memic_addr_alignment[0x8];
669
670 u8 memic_bar_start_addr[0x40];
671
672 u8 memic_bar_size[0x20];
673
674 u8 max_memic_size[0x20];
675
676 u8 reserved_at_c0[0x740];
677};
678
Saeed Mahameede2816822015-05-28 22:28:40 +0300679enum {
680 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
689};
690
691enum {
692 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
693 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
694 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
695 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
696 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
697 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
698 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
699 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
700 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
701};
702
703struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200704 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300705
Or Gerlitzbd108382017-05-28 15:24:17 +0300706 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300708 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709
Matan Barakb4ff3a32016-02-09 14:57:42 +0200710 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300711
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713
Matan Barakb4ff3a32016-02-09 14:57:42 +0200714 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200715 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716
Matan Barakb4ff3a32016-02-09 14:57:42 +0200717 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200718 u8 atomic_size_qp[0x10];
719
Matan Barakb4ff3a32016-02-09 14:57:42 +0200720 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300721 u8 atomic_size_dc[0x10];
722
Matan Barakb4ff3a32016-02-09 14:57:42 +0200723 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300724};
725
726struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200727 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300728
729 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200730 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300731
Matan Barakb4ff3a32016-02-09 14:57:42 +0200732 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300733
734 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
735
736 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
737
738 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
739
Matan Barakb4ff3a32016-02-09 14:57:42 +0200740 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200743struct mlx5_ifc_calc_op {
744 u8 reserved_at_0[0x10];
745 u8 reserved_at_10[0x9];
746 u8 op_swap_endianness[0x1];
747 u8 op_min[0x1];
748 u8 op_xor[0x1];
749 u8 op_or[0x1];
750 u8 op_and[0x1];
751 u8 op_max[0x1];
752 u8 op_add[0x1];
753};
754
755struct mlx5_ifc_vector_calc_cap_bits {
756 u8 calc_matrix[0x1];
757 u8 reserved_at_1[0x1f];
758 u8 reserved_at_20[0x8];
759 u8 max_vec_count[0x8];
760 u8 reserved_at_30[0xd];
761 u8 max_chunk_size[0x3];
762 struct mlx5_ifc_calc_op calc0;
763 struct mlx5_ifc_calc_op calc1;
764 struct mlx5_ifc_calc_op calc2;
765 struct mlx5_ifc_calc_op calc3;
766
767 u8 reserved_at_e0[0x720];
768};
769
Saeed Mahameede2816822015-05-28 22:28:40 +0300770enum {
771 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
772 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300773 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300774 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300775};
776
777enum {
778 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
779 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
780};
781
782enum {
783 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
784 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
785 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
786 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
787 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
788};
789
790enum {
791 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
792 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
793 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
794 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
795 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
796 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
797};
798
799enum {
800 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
801 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
802};
803
804enum {
805 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
806 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
807 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
808};
809
810enum {
811 MLX5_CAP_PORT_TYPE_IB = 0x0,
812 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300813};
814
Max Gurtovoy1410a902017-05-28 10:53:10 +0300815enum {
816 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
817 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
818 MLX5_CAP_UMR_FENCE_NONE = 0x2,
819};
820
Eli Cohenb7755162014-10-02 12:19:44 +0300821struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200822 u8 reserved_at_0[0x30];
823 u8 vhca_id[0x10];
824
825 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300826
827 u8 log_max_srq_sz[0x8];
828 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_qp[0x5];
831
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300833 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300835
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200838 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300839 u8 log_max_cq[0x5];
840
841 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200842 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300843 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200844 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_eq[0x4];
846
847 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200848 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300849 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200850 u8 force_teardown[0x1];
851 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300852 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200853 u8 umr_extended_translation_offset[0x1];
854 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300855 u8 log_max_klm_list_size[0x6];
856
Matan Barakb4ff3a32016-02-09 14:57:42 +0200857 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200859 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300860 u8 log_max_ra_res_dc[0x6];
861
Matan Barakb4ff3a32016-02-09 14:57:42 +0200862 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200864 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300865 u8 log_max_ra_res_qp[0x6];
866
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200867 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300868 u8 cc_query_allowed[0x1];
869 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200870 u8 start_pad[0x1];
871 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500872 u8 reserved_at_165[0xa];
873 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300874 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300875
Saeed Mahameede2816822015-05-28 22:28:40 +0300876 u8 out_of_seq_cnt[0x1];
877 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300878 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300879 u8 reserved_at_183[0x1];
880 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300881 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300882 u8 max_qp_cnt[0xa];
883 u8 pkey_table_size[0x10];
884
Saeed Mahameede2816822015-05-28 22:28:40 +0300885 u8 vport_group_manager[0x1];
886 u8 vhca_group_manager[0x1];
887 u8 ib_virt[0x1];
888 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200889 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300890 u8 ets[0x1];
891 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200892 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300893 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200894 u8 mcam_reg[0x1];
895 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300896 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200897 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300898 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300899 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200900 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300901 u8 disable_link_up[0x1];
902 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300903 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300904 u8 num_ports[0x8];
905
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300906 u8 reserved_at_1c0[0x1];
907 u8 pps[0x1];
908 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300909 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300910 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200911 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300912 u8 reserved_at_1d0[0x1];
913 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300914 u8 general_notification_event[0x1];
915 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200916 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200917 u8 rol_s[0x1];
918 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300919 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200920 u8 wol_s[0x1];
921 u8 wol_g[0x1];
922 u8 wol_a[0x1];
923 u8 wol_b[0x1];
924 u8 wol_m[0x1];
925 u8 wol_u[0x1];
926 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300927
928 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300930 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300931
Saeed Mahameede2816822015-05-28 22:28:40 +0300932 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300933 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300934 u8 reserved_at_202[0x1];
935 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200936 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200937 u8 reserved_at_205[0x1];
938 u8 repeated_block_disabled[0x1];
939 u8 umr_modify_entity_size_disabled[0x1];
940 u8 umr_modify_atomic_disabled[0x1];
941 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300942 u8 umr_fence[0x2];
943 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300944 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300945 u8 cmdif_checksum[0x2];
946 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 wq_signature[0x1];
949 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 sho[0x1];
952 u8 tph[0x1];
953 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300954 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300955 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300956 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 roce[0x1];
958 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300959 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300960
961 u8 cq_oi[0x1];
962 u8 cq_resize[0x1];
963 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300965 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300966 u8 pg[0x1];
967 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300968 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300969 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300970 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200974 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300975 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200976 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 qkv[0x1];
979 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200980 u8 set_deth_sqpn[0x1];
981 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300982 u8 xrc[0x1];
983 u8 ud[0x1];
984 u8 uc[0x1];
985 u8 rc[0x1];
986
Eli Cohena6d51b62017-01-03 23:55:23 +0200987 u8 uar_4k[0x1];
988 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_pg_sz[0x8];
992
993 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200994 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300995 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300997 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300998
999 u8 reserved_at_270[0xb];
1000 u8 lag_master[0x1];
1001 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001002
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 max_wqe_sz_sq[0x10];
1005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001007 u8 max_wqe_sz_rq[0x10];
1008
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001009 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 max_wqe_sz_sq_dc[0x10];
1011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001013 u8 max_qp_mcg[0x19];
1014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001016 u8 log_max_mcg[0x8];
1017
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001021 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001023 u8 log_max_xrcd[0x5];
1024
Amir Vadaia351a1b02016-07-14 10:32:38 +03001025 u8 reserved_at_340[0x8];
1026 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001027 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001028
Eli Cohenb7755162014-10-02 12:19:44 +03001029
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001031 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001033 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001035 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 log_max_tis[0x5];
1038
Saeed Mahameede2816822015-05-28 22:28:40 +03001039 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001043 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001047 u8 log_max_tis_per_sq[0x5];
1048
Tariq Toukane1c9c622016-04-11 23:10:21 +03001049 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001050 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001052 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001053 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001054 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001055 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001057
Or Gerlitz40817cd2017-06-25 12:38:45 +03001058 u8 hairpin[0x1];
1059 u8 reserved_at_3c1[0x2];
1060 u8 log_max_hairpin_queues[0x5];
1061 u8 reserved_at_3c8[0x3];
1062 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001063 u8 reserved_at_3d0[0x3];
1064 u8 log_max_hairpin_num_packets[0x5];
1065 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001066 u8 log_max_wq_sz[0x5];
1067
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001068 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001069 u8 disable_local_lb_uc[0x1];
1070 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001071 u8 log_min_hairpin_wq_data_sz[0x5];
1072 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001073 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001074 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001075 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001076 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001077 u8 log_max_current_uc_list[0x5];
1078
Tariq Toukane1c9c622016-04-11 23:10:21 +03001079 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001080
Tariq Toukane1c9c622016-04-11 23:10:21 +03001081 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001082 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001083 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001084 u8 log_uar_page_sz[0x10];
1085
Tariq Toukane1c9c622016-04-11 23:10:21 +03001086 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001087 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001088 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001089
Eli Cohena6d51b62017-01-03 23:55:23 +02001090 u8 reserved_at_500[0x20];
1091 u8 num_of_uars_per_page[0x20];
1092 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001093
Guy Levi0ff8e792017-10-19 08:25:51 +03001094 u8 reserved_at_580[0x3d];
1095 u8 cqe_128_always[0x1];
1096 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001097 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001098
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001099 u8 cqe_compression_timeout[0x10];
1100 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001101
Saeed Mahameed74862162016-06-09 15:11:34 +03001102 u8 reserved_at_5e0[0x10];
1103 u8 tag_matching[0x1];
1104 u8 rndv_offload_rc[0x1];
1105 u8 rndv_offload_dc[0x1];
1106 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001107 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001108 u8 log_max_xrq[0x5];
1109
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001110 u8 affiliate_nic_vport_criteria[0x8];
1111 u8 native_port_num[0x8];
1112 u8 num_vhca_ports[0x8];
1113 u8 reserved_at_618[0x6];
1114 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001115 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001116};
1117
Saeed Mahameed81848732015-12-01 18:03:20 +02001118enum mlx5_flow_destination_type {
1119 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1120 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1121 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001122
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001123 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001124 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001125};
1126
1127struct mlx5_ifc_dest_format_struct_bits {
1128 u8 destination_type[0x8];
1129 u8 destination_id[0x18];
1130
Matan Barakb4ff3a32016-02-09 14:57:42 +02001131 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001132};
1133
Amir Vadai9dc0b282016-05-13 12:55:39 +00001134struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001135 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001136
1137 u8 reserved_at_20[0x20];
1138};
1139
1140union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1141 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1142 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1143 u8 reserved_at_0[0x40];
1144};
1145
Saeed Mahameede2816822015-05-28 22:28:40 +03001146struct mlx5_ifc_fte_match_param_bits {
1147 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1148
1149 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1150
1151 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1152
Matan Barakb4ff3a32016-02-09 14:57:42 +02001153 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154};
1155
1156enum {
1157 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1158 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1159 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1160 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1161 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1162};
1163
1164struct mlx5_ifc_rx_hash_field_select_bits {
1165 u8 l3_prot_type[0x1];
1166 u8 l4_prot_type[0x1];
1167 u8 selected_fields[0x1e];
1168};
1169
1170enum {
1171 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1172 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1173};
1174
1175enum {
1176 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1177 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1178};
1179
1180struct mlx5_ifc_wq_bits {
1181 u8 wq_type[0x4];
1182 u8 wq_signature[0x1];
1183 u8 end_padding_mode[0x2];
1184 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001186
1187 u8 hds_skip_first_sge[0x1];
1188 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190 u8 page_offset[0x5];
1191 u8 lwm[0x10];
1192
Matan Barakb4ff3a32016-02-09 14:57:42 +02001193 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001194 u8 pd[0x18];
1195
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197 u8 uar_page[0x18];
1198
1199 u8 dbr_addr[0x40];
1200
1201 u8 hw_counter[0x20];
1202
1203 u8 sw_counter[0x20];
1204
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 log_wq_sz[0x5];
1211
Or Gerlitz4d533e02018-01-04 12:26:21 +02001212 u8 reserved_at_120[0x3];
1213 u8 log_hairpin_num_packets[0x5];
1214 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001215 u8 log_hairpin_data_sz[0x5];
1216 u8 reserved_at_130[0x5];
1217
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001218 u8 log_wqe_num_of_strides[0x3];
1219 u8 two_byte_shift_en[0x1];
1220 u8 reserved_at_139[0x4];
1221 u8 log_wqe_stride_size[0x3];
1222
1223 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224
1225 struct mlx5_ifc_cmd_pas_bits pas[0];
1226};
1227
1228struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001229 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001230 u8 rq_num[0x18];
1231};
1232
1233struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001234 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001235 u8 mac_addr_47_32[0x10];
1236
1237 u8 mac_addr_31_0[0x20];
1238};
1239
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001240struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001242 u8 vlan[0x0c];
1243
Matan Barakb4ff3a32016-02-09 14:57:42 +02001244 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001245};
1246
Saeed Mahameede2816822015-05-28 22:28:40 +03001247struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001248 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001249
1250 u8 min_time_between_cnps[0x20];
1251
Matan Barakb4ff3a32016-02-09 14:57:42 +02001252 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001253 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001254 u8 reserved_at_d8[0x4];
1255 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256 u8 cnp_802p_prio[0x3];
1257
Matan Barakb4ff3a32016-02-09 14:57:42 +02001258 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001259};
1260
1261struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001262 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001263
Matan Barakb4ff3a32016-02-09 14:57:42 +02001264 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001265 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001266 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001267 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001268 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001269
Matan Barakb4ff3a32016-02-09 14:57:42 +02001270 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001271
1272 u8 rpg_time_reset[0x20];
1273
1274 u8 rpg_byte_reset[0x20];
1275
1276 u8 rpg_threshold[0x20];
1277
1278 u8 rpg_max_rate[0x20];
1279
1280 u8 rpg_ai_rate[0x20];
1281
1282 u8 rpg_hai_rate[0x20];
1283
1284 u8 rpg_gd[0x20];
1285
1286 u8 rpg_min_dec_fac[0x20];
1287
1288 u8 rpg_min_rate[0x20];
1289
Matan Barakb4ff3a32016-02-09 14:57:42 +02001290 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001291
1292 u8 rate_to_set_on_first_cnp[0x20];
1293
1294 u8 dce_tcp_g[0x20];
1295
1296 u8 dce_tcp_rtt[0x20];
1297
1298 u8 rate_reduce_monitor_period[0x20];
1299
Matan Barakb4ff3a32016-02-09 14:57:42 +02001300 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001301
1302 u8 initial_alpha_value[0x20];
1303
Matan Barakb4ff3a32016-02-09 14:57:42 +02001304 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001305};
1306
1307struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001308 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001309
1310 u8 rppp_max_rps[0x20];
1311
1312 u8 rpg_time_reset[0x20];
1313
1314 u8 rpg_byte_reset[0x20];
1315
1316 u8 rpg_threshold[0x20];
1317
1318 u8 rpg_max_rate[0x20];
1319
1320 u8 rpg_ai_rate[0x20];
1321
1322 u8 rpg_hai_rate[0x20];
1323
1324 u8 rpg_gd[0x20];
1325
1326 u8 rpg_min_dec_fac[0x20];
1327
1328 u8 rpg_min_rate[0x20];
1329
Matan Barakb4ff3a32016-02-09 14:57:42 +02001330 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001331};
1332
1333enum {
1334 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1335 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1336 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1337};
1338
1339struct mlx5_ifc_resize_field_select_bits {
1340 u8 resize_field_select[0x20];
1341};
1342
1343enum {
1344 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1345 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1346 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1347 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1348};
1349
1350struct mlx5_ifc_modify_field_select_bits {
1351 u8 modify_field_select[0x20];
1352};
1353
1354struct mlx5_ifc_field_select_r_roce_np_bits {
1355 u8 field_select_r_roce_np[0x20];
1356};
1357
1358struct mlx5_ifc_field_select_r_roce_rp_bits {
1359 u8 field_select_r_roce_rp[0x20];
1360};
1361
1362enum {
1363 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1364 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1365 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1366 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1367 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1368 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1369 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1370 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1371 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1372 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1373};
1374
1375struct mlx5_ifc_field_select_802_1qau_rp_bits {
1376 u8 field_select_8021qaurp[0x20];
1377};
1378
1379struct mlx5_ifc_phys_layer_cntrs_bits {
1380 u8 time_since_last_clear_high[0x20];
1381
1382 u8 time_since_last_clear_low[0x20];
1383
1384 u8 symbol_errors_high[0x20];
1385
1386 u8 symbol_errors_low[0x20];
1387
1388 u8 sync_headers_errors_high[0x20];
1389
1390 u8 sync_headers_errors_low[0x20];
1391
1392 u8 edpl_bip_errors_lane0_high[0x20];
1393
1394 u8 edpl_bip_errors_lane0_low[0x20];
1395
1396 u8 edpl_bip_errors_lane1_high[0x20];
1397
1398 u8 edpl_bip_errors_lane1_low[0x20];
1399
1400 u8 edpl_bip_errors_lane2_high[0x20];
1401
1402 u8 edpl_bip_errors_lane2_low[0x20];
1403
1404 u8 edpl_bip_errors_lane3_high[0x20];
1405
1406 u8 edpl_bip_errors_lane3_low[0x20];
1407
1408 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1409
1410 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1411
1412 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1413
1414 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1415
1416 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1417
1418 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1419
1420 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1421
1422 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1423
1424 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1425
1426 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1427
1428 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1429
1430 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1431
1432 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1433
1434 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1435
1436 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1437
1438 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1439
1440 u8 rs_fec_corrected_blocks_high[0x20];
1441
1442 u8 rs_fec_corrected_blocks_low[0x20];
1443
1444 u8 rs_fec_uncorrectable_blocks_high[0x20];
1445
1446 u8 rs_fec_uncorrectable_blocks_low[0x20];
1447
1448 u8 rs_fec_no_errors_blocks_high[0x20];
1449
1450 u8 rs_fec_no_errors_blocks_low[0x20];
1451
1452 u8 rs_fec_single_error_blocks_high[0x20];
1453
1454 u8 rs_fec_single_error_blocks_low[0x20];
1455
1456 u8 rs_fec_corrected_symbols_total_high[0x20];
1457
1458 u8 rs_fec_corrected_symbols_total_low[0x20];
1459
1460 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1461
1462 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1463
1464 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1465
1466 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1467
1468 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1469
1470 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1471
1472 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1473
1474 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1475
1476 u8 link_down_events[0x20];
1477
1478 u8 successful_recovery_events[0x20];
1479
Matan Barakb4ff3a32016-02-09 14:57:42 +02001480 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001481};
1482
Gal Pressmand8dc0502016-09-27 17:04:51 +03001483struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1484 u8 time_since_last_clear_high[0x20];
1485
1486 u8 time_since_last_clear_low[0x20];
1487
1488 u8 phy_received_bits_high[0x20];
1489
1490 u8 phy_received_bits_low[0x20];
1491
1492 u8 phy_symbol_errors_high[0x20];
1493
1494 u8 phy_symbol_errors_low[0x20];
1495
1496 u8 phy_corrected_bits_high[0x20];
1497
1498 u8 phy_corrected_bits_low[0x20];
1499
1500 u8 phy_corrected_bits_lane0_high[0x20];
1501
1502 u8 phy_corrected_bits_lane0_low[0x20];
1503
1504 u8 phy_corrected_bits_lane1_high[0x20];
1505
1506 u8 phy_corrected_bits_lane1_low[0x20];
1507
1508 u8 phy_corrected_bits_lane2_high[0x20];
1509
1510 u8 phy_corrected_bits_lane2_low[0x20];
1511
1512 u8 phy_corrected_bits_lane3_high[0x20];
1513
1514 u8 phy_corrected_bits_lane3_low[0x20];
1515
1516 u8 reserved_at_200[0x5c0];
1517};
1518
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001519struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1520 u8 symbol_error_counter[0x10];
1521
1522 u8 link_error_recovery_counter[0x8];
1523
1524 u8 link_downed_counter[0x8];
1525
1526 u8 port_rcv_errors[0x10];
1527
1528 u8 port_rcv_remote_physical_errors[0x10];
1529
1530 u8 port_rcv_switch_relay_errors[0x10];
1531
1532 u8 port_xmit_discards[0x10];
1533
1534 u8 port_xmit_constraint_errors[0x8];
1535
1536 u8 port_rcv_constraint_errors[0x8];
1537
1538 u8 reserved_at_70[0x8];
1539
1540 u8 link_overrun_errors[0x8];
1541
1542 u8 reserved_at_80[0x10];
1543
1544 u8 vl_15_dropped[0x10];
1545
Tim Wright133bea02017-05-01 17:30:08 +01001546 u8 reserved_at_a0[0x80];
1547
1548 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001549};
1550
Saeed Mahameede2816822015-05-28 22:28:40 +03001551struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1552 u8 transmit_queue_high[0x20];
1553
1554 u8 transmit_queue_low[0x20];
1555
Matan Barakb4ff3a32016-02-09 14:57:42 +02001556 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001557};
1558
1559struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1560 u8 rx_octets_high[0x20];
1561
1562 u8 rx_octets_low[0x20];
1563
Matan Barakb4ff3a32016-02-09 14:57:42 +02001564 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001565
1566 u8 rx_frames_high[0x20];
1567
1568 u8 rx_frames_low[0x20];
1569
1570 u8 tx_octets_high[0x20];
1571
1572 u8 tx_octets_low[0x20];
1573
Matan Barakb4ff3a32016-02-09 14:57:42 +02001574 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001575
1576 u8 tx_frames_high[0x20];
1577
1578 u8 tx_frames_low[0x20];
1579
1580 u8 rx_pause_high[0x20];
1581
1582 u8 rx_pause_low[0x20];
1583
1584 u8 rx_pause_duration_high[0x20];
1585
1586 u8 rx_pause_duration_low[0x20];
1587
1588 u8 tx_pause_high[0x20];
1589
1590 u8 tx_pause_low[0x20];
1591
1592 u8 tx_pause_duration_high[0x20];
1593
1594 u8 tx_pause_duration_low[0x20];
1595
1596 u8 rx_pause_transition_high[0x20];
1597
1598 u8 rx_pause_transition_low[0x20];
1599
Matan Barakb4ff3a32016-02-09 14:57:42 +02001600 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001601};
1602
1603struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1604 u8 port_transmit_wait_high[0x20];
1605
1606 u8 port_transmit_wait_low[0x20];
1607
Gal Pressman2dba0792017-06-18 14:56:45 +03001608 u8 reserved_at_40[0x100];
1609
1610 u8 rx_buffer_almost_full_high[0x20];
1611
1612 u8 rx_buffer_almost_full_low[0x20];
1613
1614 u8 rx_buffer_full_high[0x20];
1615
1616 u8 rx_buffer_full_low[0x20];
1617
1618 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001619};
1620
1621struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1622 u8 dot3stats_alignment_errors_high[0x20];
1623
1624 u8 dot3stats_alignment_errors_low[0x20];
1625
1626 u8 dot3stats_fcs_errors_high[0x20];
1627
1628 u8 dot3stats_fcs_errors_low[0x20];
1629
1630 u8 dot3stats_single_collision_frames_high[0x20];
1631
1632 u8 dot3stats_single_collision_frames_low[0x20];
1633
1634 u8 dot3stats_multiple_collision_frames_high[0x20];
1635
1636 u8 dot3stats_multiple_collision_frames_low[0x20];
1637
1638 u8 dot3stats_sqe_test_errors_high[0x20];
1639
1640 u8 dot3stats_sqe_test_errors_low[0x20];
1641
1642 u8 dot3stats_deferred_transmissions_high[0x20];
1643
1644 u8 dot3stats_deferred_transmissions_low[0x20];
1645
1646 u8 dot3stats_late_collisions_high[0x20];
1647
1648 u8 dot3stats_late_collisions_low[0x20];
1649
1650 u8 dot3stats_excessive_collisions_high[0x20];
1651
1652 u8 dot3stats_excessive_collisions_low[0x20];
1653
1654 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1655
1656 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1657
1658 u8 dot3stats_carrier_sense_errors_high[0x20];
1659
1660 u8 dot3stats_carrier_sense_errors_low[0x20];
1661
1662 u8 dot3stats_frame_too_longs_high[0x20];
1663
1664 u8 dot3stats_frame_too_longs_low[0x20];
1665
1666 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1667
1668 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1669
1670 u8 dot3stats_symbol_errors_high[0x20];
1671
1672 u8 dot3stats_symbol_errors_low[0x20];
1673
1674 u8 dot3control_in_unknown_opcodes_high[0x20];
1675
1676 u8 dot3control_in_unknown_opcodes_low[0x20];
1677
1678 u8 dot3in_pause_frames_high[0x20];
1679
1680 u8 dot3in_pause_frames_low[0x20];
1681
1682 u8 dot3out_pause_frames_high[0x20];
1683
1684 u8 dot3out_pause_frames_low[0x20];
1685
Matan Barakb4ff3a32016-02-09 14:57:42 +02001686 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001687};
1688
1689struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1690 u8 ether_stats_drop_events_high[0x20];
1691
1692 u8 ether_stats_drop_events_low[0x20];
1693
1694 u8 ether_stats_octets_high[0x20];
1695
1696 u8 ether_stats_octets_low[0x20];
1697
1698 u8 ether_stats_pkts_high[0x20];
1699
1700 u8 ether_stats_pkts_low[0x20];
1701
1702 u8 ether_stats_broadcast_pkts_high[0x20];
1703
1704 u8 ether_stats_broadcast_pkts_low[0x20];
1705
1706 u8 ether_stats_multicast_pkts_high[0x20];
1707
1708 u8 ether_stats_multicast_pkts_low[0x20];
1709
1710 u8 ether_stats_crc_align_errors_high[0x20];
1711
1712 u8 ether_stats_crc_align_errors_low[0x20];
1713
1714 u8 ether_stats_undersize_pkts_high[0x20];
1715
1716 u8 ether_stats_undersize_pkts_low[0x20];
1717
1718 u8 ether_stats_oversize_pkts_high[0x20];
1719
1720 u8 ether_stats_oversize_pkts_low[0x20];
1721
1722 u8 ether_stats_fragments_high[0x20];
1723
1724 u8 ether_stats_fragments_low[0x20];
1725
1726 u8 ether_stats_jabbers_high[0x20];
1727
1728 u8 ether_stats_jabbers_low[0x20];
1729
1730 u8 ether_stats_collisions_high[0x20];
1731
1732 u8 ether_stats_collisions_low[0x20];
1733
1734 u8 ether_stats_pkts64octets_high[0x20];
1735
1736 u8 ether_stats_pkts64octets_low[0x20];
1737
1738 u8 ether_stats_pkts65to127octets_high[0x20];
1739
1740 u8 ether_stats_pkts65to127octets_low[0x20];
1741
1742 u8 ether_stats_pkts128to255octets_high[0x20];
1743
1744 u8 ether_stats_pkts128to255octets_low[0x20];
1745
1746 u8 ether_stats_pkts256to511octets_high[0x20];
1747
1748 u8 ether_stats_pkts256to511octets_low[0x20];
1749
1750 u8 ether_stats_pkts512to1023octets_high[0x20];
1751
1752 u8 ether_stats_pkts512to1023octets_low[0x20];
1753
1754 u8 ether_stats_pkts1024to1518octets_high[0x20];
1755
1756 u8 ether_stats_pkts1024to1518octets_low[0x20];
1757
1758 u8 ether_stats_pkts1519to2047octets_high[0x20];
1759
1760 u8 ether_stats_pkts1519to2047octets_low[0x20];
1761
1762 u8 ether_stats_pkts2048to4095octets_high[0x20];
1763
1764 u8 ether_stats_pkts2048to4095octets_low[0x20];
1765
1766 u8 ether_stats_pkts4096to8191octets_high[0x20];
1767
1768 u8 ether_stats_pkts4096to8191octets_low[0x20];
1769
1770 u8 ether_stats_pkts8192to10239octets_high[0x20];
1771
1772 u8 ether_stats_pkts8192to10239octets_low[0x20];
1773
Matan Barakb4ff3a32016-02-09 14:57:42 +02001774 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001775};
1776
1777struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1778 u8 if_in_octets_high[0x20];
1779
1780 u8 if_in_octets_low[0x20];
1781
1782 u8 if_in_ucast_pkts_high[0x20];
1783
1784 u8 if_in_ucast_pkts_low[0x20];
1785
1786 u8 if_in_discards_high[0x20];
1787
1788 u8 if_in_discards_low[0x20];
1789
1790 u8 if_in_errors_high[0x20];
1791
1792 u8 if_in_errors_low[0x20];
1793
1794 u8 if_in_unknown_protos_high[0x20];
1795
1796 u8 if_in_unknown_protos_low[0x20];
1797
1798 u8 if_out_octets_high[0x20];
1799
1800 u8 if_out_octets_low[0x20];
1801
1802 u8 if_out_ucast_pkts_high[0x20];
1803
1804 u8 if_out_ucast_pkts_low[0x20];
1805
1806 u8 if_out_discards_high[0x20];
1807
1808 u8 if_out_discards_low[0x20];
1809
1810 u8 if_out_errors_high[0x20];
1811
1812 u8 if_out_errors_low[0x20];
1813
1814 u8 if_in_multicast_pkts_high[0x20];
1815
1816 u8 if_in_multicast_pkts_low[0x20];
1817
1818 u8 if_in_broadcast_pkts_high[0x20];
1819
1820 u8 if_in_broadcast_pkts_low[0x20];
1821
1822 u8 if_out_multicast_pkts_high[0x20];
1823
1824 u8 if_out_multicast_pkts_low[0x20];
1825
1826 u8 if_out_broadcast_pkts_high[0x20];
1827
1828 u8 if_out_broadcast_pkts_low[0x20];
1829
Matan Barakb4ff3a32016-02-09 14:57:42 +02001830 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001831};
1832
1833struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1834 u8 a_frames_transmitted_ok_high[0x20];
1835
1836 u8 a_frames_transmitted_ok_low[0x20];
1837
1838 u8 a_frames_received_ok_high[0x20];
1839
1840 u8 a_frames_received_ok_low[0x20];
1841
1842 u8 a_frame_check_sequence_errors_high[0x20];
1843
1844 u8 a_frame_check_sequence_errors_low[0x20];
1845
1846 u8 a_alignment_errors_high[0x20];
1847
1848 u8 a_alignment_errors_low[0x20];
1849
1850 u8 a_octets_transmitted_ok_high[0x20];
1851
1852 u8 a_octets_transmitted_ok_low[0x20];
1853
1854 u8 a_octets_received_ok_high[0x20];
1855
1856 u8 a_octets_received_ok_low[0x20];
1857
1858 u8 a_multicast_frames_xmitted_ok_high[0x20];
1859
1860 u8 a_multicast_frames_xmitted_ok_low[0x20];
1861
1862 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1863
1864 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1865
1866 u8 a_multicast_frames_received_ok_high[0x20];
1867
1868 u8 a_multicast_frames_received_ok_low[0x20];
1869
1870 u8 a_broadcast_frames_received_ok_high[0x20];
1871
1872 u8 a_broadcast_frames_received_ok_low[0x20];
1873
1874 u8 a_in_range_length_errors_high[0x20];
1875
1876 u8 a_in_range_length_errors_low[0x20];
1877
1878 u8 a_out_of_range_length_field_high[0x20];
1879
1880 u8 a_out_of_range_length_field_low[0x20];
1881
1882 u8 a_frame_too_long_errors_high[0x20];
1883
1884 u8 a_frame_too_long_errors_low[0x20];
1885
1886 u8 a_symbol_error_during_carrier_high[0x20];
1887
1888 u8 a_symbol_error_during_carrier_low[0x20];
1889
1890 u8 a_mac_control_frames_transmitted_high[0x20];
1891
1892 u8 a_mac_control_frames_transmitted_low[0x20];
1893
1894 u8 a_mac_control_frames_received_high[0x20];
1895
1896 u8 a_mac_control_frames_received_low[0x20];
1897
1898 u8 a_unsupported_opcodes_received_high[0x20];
1899
1900 u8 a_unsupported_opcodes_received_low[0x20];
1901
1902 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1903
1904 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1905
1906 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1907
1908 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1909
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911};
1912
Gal Pressman8ed1a632016-11-17 13:46:01 +02001913struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1914 u8 life_time_counter_high[0x20];
1915
1916 u8 life_time_counter_low[0x20];
1917
1918 u8 rx_errors[0x20];
1919
1920 u8 tx_errors[0x20];
1921
1922 u8 l0_to_recovery_eieos[0x20];
1923
1924 u8 l0_to_recovery_ts[0x20];
1925
1926 u8 l0_to_recovery_framing[0x20];
1927
1928 u8 l0_to_recovery_retrain[0x20];
1929
1930 u8 crc_error_dllp[0x20];
1931
1932 u8 crc_error_tlp[0x20];
1933
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001934 u8 tx_overflow_buffer_pkt_high[0x20];
1935
1936 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001937
1938 u8 outbound_stalled_reads[0x20];
1939
1940 u8 outbound_stalled_writes[0x20];
1941
1942 u8 outbound_stalled_reads_events[0x20];
1943
1944 u8 outbound_stalled_writes_events[0x20];
1945
1946 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001947};
1948
Saeed Mahameede2816822015-05-28 22:28:40 +03001949struct mlx5_ifc_cmd_inter_comp_event_bits {
1950 u8 command_completion_vector[0x20];
1951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953};
1954
1955struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959 u8 vl[0x4];
1960
Matan Barakb4ff3a32016-02-09 14:57:42 +02001961 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001962};
1963
1964struct mlx5_ifc_db_bf_congestion_event_bits {
1965 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969
Matan Barakb4ff3a32016-02-09 14:57:42 +02001970 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001971};
1972
1973struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975
1976 u8 gpio_event_hi[0x20];
1977
1978 u8 gpio_event_lo[0x20];
1979
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981};
1982
1983struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985
1986 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990};
1991
1992struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001993 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001994};
1995
1996enum {
1997 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1998 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1999};
2000
2001struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002002 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002003 u8 cqn[0x18];
2004
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006
Matan Barakb4ff3a32016-02-09 14:57:42 +02002007 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002008 u8 syndrome[0x8];
2009
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011};
2012
2013struct mlx5_ifc_rdma_page_fault_event_bits {
2014 u8 bytes_committed[0x20];
2015
2016 u8 r_key[0x20];
2017
Matan Barakb4ff3a32016-02-09 14:57:42 +02002018 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002019 u8 packet_len[0x10];
2020
2021 u8 rdma_op_len[0x20];
2022
2023 u8 rdma_va[0x40];
2024
Matan Barakb4ff3a32016-02-09 14:57:42 +02002025 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002026 u8 rdma[0x1];
2027 u8 write[0x1];
2028 u8 requestor[0x1];
2029 u8 qp_number[0x18];
2030};
2031
2032struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2033 u8 bytes_committed[0x20];
2034
Matan Barakb4ff3a32016-02-09 14:57:42 +02002035 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002036 u8 wqe_index[0x10];
2037
Matan Barakb4ff3a32016-02-09 14:57:42 +02002038 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002039 u8 len[0x10];
2040
Matan Barakb4ff3a32016-02-09 14:57:42 +02002041 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002042
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044 u8 rdma[0x1];
2045 u8 write_read[0x1];
2046 u8 requestor[0x1];
2047 u8 qpn[0x18];
2048};
2049
2050struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002051 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002052
2053 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002054 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002055
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 qpn_rqn_sqn[0x18];
2058};
2059
2060struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002061 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002062
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064 u8 dct_number[0x18];
2065};
2066
2067struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002068 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 cq_number[0x18];
2072};
2073
2074enum {
2075 MLX5_QPC_STATE_RST = 0x0,
2076 MLX5_QPC_STATE_INIT = 0x1,
2077 MLX5_QPC_STATE_RTR = 0x2,
2078 MLX5_QPC_STATE_RTS = 0x3,
2079 MLX5_QPC_STATE_SQER = 0x4,
2080 MLX5_QPC_STATE_ERR = 0x6,
2081 MLX5_QPC_STATE_SQD = 0x7,
2082 MLX5_QPC_STATE_SUSPENDED = 0x9,
2083};
2084
2085enum {
2086 MLX5_QPC_ST_RC = 0x0,
2087 MLX5_QPC_ST_UC = 0x1,
2088 MLX5_QPC_ST_UD = 0x2,
2089 MLX5_QPC_ST_XRC = 0x3,
2090 MLX5_QPC_ST_DCI = 0x5,
2091 MLX5_QPC_ST_QP0 = 0x7,
2092 MLX5_QPC_ST_QP1 = 0x8,
2093 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2094 MLX5_QPC_ST_REG_UMR = 0xc,
2095};
2096
2097enum {
2098 MLX5_QPC_PM_STATE_ARMED = 0x0,
2099 MLX5_QPC_PM_STATE_REARM = 0x1,
2100 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2101 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2102};
2103
2104enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002105 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2106};
2107
2108enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002109 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2110 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2111};
2112
2113enum {
2114 MLX5_QPC_MTU_256_BYTES = 0x1,
2115 MLX5_QPC_MTU_512_BYTES = 0x2,
2116 MLX5_QPC_MTU_1K_BYTES = 0x3,
2117 MLX5_QPC_MTU_2K_BYTES = 0x4,
2118 MLX5_QPC_MTU_4K_BYTES = 0x5,
2119 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2120};
2121
2122enum {
2123 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2124 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2125 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2126 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2127 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2128 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2129 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2130 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2131};
2132
2133enum {
2134 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2135 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2136 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2137};
2138
2139enum {
2140 MLX5_QPC_CS_RES_DISABLE = 0x0,
2141 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2142 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2143};
2144
2145struct mlx5_ifc_qpc_bits {
2146 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002147 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002151 u8 reserved_at_15[0x3];
2152 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002153 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155
2156 u8 wq_signature[0x1];
2157 u8 block_lb_mc[0x1];
2158 u8 atomic_like_write_en[0x1];
2159 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002160 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 pd[0x18];
2164
2165 u8 mtu[0x3];
2166 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002167 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002168 u8 log_rq_size[0x4];
2169 u8 log_rq_stride[0x3];
2170 u8 no_sq[0x1];
2171 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002174 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175
2176 u8 counter_set_id[0x8];
2177 u8 uar_page[0x18];
2178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180 u8 user_index[0x18];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 log_page_size[0x5];
2184 u8 remote_qpn[0x18];
2185
2186 struct mlx5_ifc_ads_bits primary_address_path;
2187
2188 struct mlx5_ifc_ads_bits secondary_address_path;
2189
2190 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002191 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002192 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 retry_count[0x3];
2195 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 fre[0x1];
2198 u8 cur_rnr_retry[0x3];
2199 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203
Matan Barakb4ff3a32016-02-09 14:57:42 +02002204 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002205 u8 next_send_psn[0x18];
2206
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208 u8 cqn_snd[0x18];
2209
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002210 u8 reserved_at_400[0x8];
2211 u8 deth_sqpn[0x18];
2212
2213 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002214
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216 u8 last_acked_psn[0x18];
2217
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219 u8 ssn[0x18];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 atomic_mode[0x4];
2225 u8 rre[0x1];
2226 u8 rwe[0x1];
2227 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 cd_slave_receive[0x1];
2232 u8 cd_slave_send[0x1];
2233 u8 cd_master[0x1];
2234
Matan Barakb4ff3a32016-02-09 14:57:42 +02002235 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002236 u8 min_rnr_nak[0x5];
2237 u8 next_rcv_psn[0x18];
2238
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 xrcd[0x18];
2241
Matan Barakb4ff3a32016-02-09 14:57:42 +02002242 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002243 u8 cqn_rcv[0x18];
2244
2245 u8 dbr_addr[0x40];
2246
2247 u8 q_key[0x20];
2248
Matan Barakb4ff3a32016-02-09 14:57:42 +02002249 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002251 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252
Matan Barakb4ff3a32016-02-09 14:57:42 +02002253 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254 u8 rmsn[0x18];
2255
2256 u8 hw_sq_wqebb_counter[0x10];
2257 u8 sw_sq_wqebb_counter[0x10];
2258
2259 u8 hw_rq_counter[0x20];
2260
2261 u8 sw_rq_counter[0x20];
2262
Matan Barakb4ff3a32016-02-09 14:57:42 +02002263 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002264
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266 u8 cgs[0x1];
2267 u8 cs_req[0x8];
2268 u8 cs_res[0x8];
2269
2270 u8 dc_access_key[0x40];
2271
Matan Barakb4ff3a32016-02-09 14:57:42 +02002272 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002273};
2274
2275struct mlx5_ifc_roce_addr_layout_bits {
2276 u8 source_l3_address[16][0x8];
2277
Matan Barakb4ff3a32016-02-09 14:57:42 +02002278 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002279 u8 vlan_valid[0x1];
2280 u8 vlan_id[0xc];
2281 u8 source_mac_47_32[0x10];
2282
2283 u8 source_mac_31_0[0x20];
2284
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286 u8 roce_l3_type[0x4];
2287 u8 roce_version[0x8];
2288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290};
2291
2292union mlx5_ifc_hca_cap_union_bits {
2293 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2294 struct mlx5_ifc_odp_cap_bits odp_cap;
2295 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2296 struct mlx5_ifc_roce_cap_bits roce_cap;
2297 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2298 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002299 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002300 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002301 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002302 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002303 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002304 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002305};
2306
2307enum {
2308 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2309 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2310 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002311 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002312 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2313 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002314 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002315};
2316
2317struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319
2320 u8 group_id[0x20];
2321
Matan Barakb4ff3a32016-02-09 14:57:42 +02002322 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002323 u8 flow_tag[0x18];
2324
Matan Barakb4ff3a32016-02-09 14:57:42 +02002325 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326 u8 action[0x10];
2327
Matan Barakb4ff3a32016-02-09 14:57:42 +02002328 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002329 u8 destination_list_size[0x18];
2330
Amir Vadai9dc0b282016-05-13 12:55:39 +00002331 u8 reserved_at_a0[0x8];
2332 u8 flow_counter_list_size[0x18];
2333
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002334 u8 encap_id[0x20];
2335
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002336 u8 modify_header_id[0x20];
2337
2338 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002339
2340 struct mlx5_ifc_fte_match_param_bits match_value;
2341
Matan Barakb4ff3a32016-02-09 14:57:42 +02002342 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002343
Amir Vadai9dc0b282016-05-13 12:55:39 +00002344 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002345};
2346
2347enum {
2348 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2349 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2350};
2351
2352struct mlx5_ifc_xrc_srqc_bits {
2353 u8 state[0x4];
2354 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356
2357 u8 wq_signature[0x1];
2358 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002359 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002360 u8 rlky[0x1];
2361 u8 basic_cyclic_rcv_wqe[0x1];
2362 u8 log_rq_stride[0x3];
2363 u8 xrcd[0x18];
2364
2365 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 cqn[0x18];
2368
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370
2371 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373 u8 log_page_size[0x6];
2374 u8 user_index[0x18];
2375
Matan Barakb4ff3a32016-02-09 14:57:42 +02002376 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002377
Matan Barakb4ff3a32016-02-09 14:57:42 +02002378 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002379 u8 pd[0x18];
2380
2381 u8 lwm[0x10];
2382 u8 wqe_cnt[0x10];
2383
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
2386 u8 db_record_addr_h[0x20];
2387
2388 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392};
2393
2394struct mlx5_ifc_traffic_counter_bits {
2395 u8 packets[0x40];
2396
2397 u8 octets[0x40];
2398};
2399
2400struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002401 u8 strict_lag_tx_port_affinity[0x1];
2402 u8 reserved_at_1[0x3];
2403 u8 lag_tx_port_affinity[0x04];
2404
2405 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002406 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412 u8 transport_domain[0x18];
2413
Erez Shitrit500a3d02017-04-13 06:36:51 +03002414 u8 reserved_at_140[0x8];
2415 u8 underlay_qpn[0x18];
2416 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417};
2418
2419enum {
2420 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2421 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2422};
2423
2424enum {
2425 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2426 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2427};
2428
2429enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002430 MLX5_RX_HASH_FN_NONE = 0x0,
2431 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2432 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002433};
2434
2435enum {
2436 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2437 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2438};
2439
2440struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442
2443 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002444 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449 u8 lro_timeout_period_usecs[0x10];
2450 u8 lro_enable_mask[0x4];
2451 u8 lro_max_ip_payload_size[0x8];
2452
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456 u8 inline_rqn[0x18];
2457
2458 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002459 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462 u8 indirect_table[0x18];
2463
2464 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466 u8 self_lb_block[0x2];
2467 u8 transport_domain[0x18];
2468
2469 u8 rx_hash_toeplitz_key[10][0x20];
2470
2471 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2472
2473 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2474
Matan Barakb4ff3a32016-02-09 14:57:42 +02002475 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476};
2477
2478enum {
2479 MLX5_SRQC_STATE_GOOD = 0x0,
2480 MLX5_SRQC_STATE_ERROR = 0x1,
2481};
2482
2483struct mlx5_ifc_srqc_bits {
2484 u8 state[0x4];
2485 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002486 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487
2488 u8 wq_signature[0x1];
2489 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493 u8 log_rq_stride[0x3];
2494 u8 xrcd[0x18];
2495
2496 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002497 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002498 u8 cqn[0x18];
2499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501
Matan Barakb4ff3a32016-02-09 14:57:42 +02002502 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002503 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505
Matan Barakb4ff3a32016-02-09 14:57:42 +02002506 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002507
Matan Barakb4ff3a32016-02-09 14:57:42 +02002508 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509 u8 pd[0x18];
2510
2511 u8 lwm[0x10];
2512 u8 wqe_cnt[0x10];
2513
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002516 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002517
Matan Barakb4ff3a32016-02-09 14:57:42 +02002518 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519};
2520
2521enum {
2522 MLX5_SQC_STATE_RST = 0x0,
2523 MLX5_SQC_STATE_RDY = 0x1,
2524 MLX5_SQC_STATE_ERR = 0x3,
2525};
2526
2527struct mlx5_ifc_sqc_bits {
2528 u8 rlky[0x1];
2529 u8 cd_master[0x1];
2530 u8 fre[0x1];
2531 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002532 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002533 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002535 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002536 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002537 u8 hairpin[0x1];
2538 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541 u8 user_index[0x18];
2542
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544 u8 cqn[0x18];
2545
Or Gerlitz40817cd2017-06-25 12:38:45 +03002546 u8 reserved_at_60[0x8];
2547 u8 hairpin_peer_rq[0x18];
2548
2549 u8 reserved_at_80[0x10];
2550 u8 hairpin_peer_vhca[0x10];
2551
2552 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002553
Saeed Mahameed74862162016-06-09 15:11:34 +03002554 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002556 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561 u8 tis_num_0[0x18];
2562
2563 struct mlx5_ifc_wq_bits wq;
2564};
2565
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002566enum {
2567 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2568 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2569 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2570 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2571};
2572
2573struct mlx5_ifc_scheduling_context_bits {
2574 u8 element_type[0x8];
2575 u8 reserved_at_8[0x18];
2576
2577 u8 element_attributes[0x20];
2578
2579 u8 parent_element_id[0x20];
2580
2581 u8 reserved_at_60[0x40];
2582
2583 u8 bw_share[0x20];
2584
2585 u8 max_average_bw[0x20];
2586
2587 u8 reserved_at_e0[0x120];
2588};
2589
Saeed Mahameede2816822015-05-28 22:28:40 +03002590struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592
Matan Barakb4ff3a32016-02-09 14:57:42 +02002593 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594 u8 rqt_max_size[0x10];
2595
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597 u8 rqt_actual_size[0x10];
2598
Matan Barakb4ff3a32016-02-09 14:57:42 +02002599 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002600
2601 struct mlx5_ifc_rq_num_bits rq_num[0];
2602};
2603
2604enum {
2605 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2606 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2607};
2608
2609enum {
2610 MLX5_RQC_STATE_RST = 0x0,
2611 MLX5_RQC_STATE_RDY = 0x1,
2612 MLX5_RQC_STATE_ERR = 0x3,
2613};
2614
2615struct mlx5_ifc_rqc_bits {
2616 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002617 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002618 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619 u8 vsd[0x1];
2620 u8 mem_rq_type[0x4];
2621 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002624 u8 hairpin[0x1];
2625 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002626
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628 u8 user_index[0x18];
2629
Matan Barakb4ff3a32016-02-09 14:57:42 +02002630 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002631 u8 cqn[0x18];
2632
2633 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637 u8 rmpn[0x18];
2638
Or Gerlitz40817cd2017-06-25 12:38:45 +03002639 u8 reserved_at_a0[0x8];
2640 u8 hairpin_peer_sq[0x18];
2641
2642 u8 reserved_at_c0[0x10];
2643 u8 hairpin_peer_vhca[0x10];
2644
2645 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002646
2647 struct mlx5_ifc_wq_bits wq;
2648};
2649
2650enum {
2651 MLX5_RMPC_STATE_RDY = 0x1,
2652 MLX5_RMPC_STATE_ERR = 0x3,
2653};
2654
2655struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659
2660 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002661 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002662
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664
2665 struct mlx5_ifc_wq_bits wq;
2666};
2667
Saeed Mahameede2816822015-05-28 22:28:40 +03002668struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002669 u8 reserved_at_0[0x5];
2670 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002671 u8 reserved_at_8[0x15];
2672 u8 disable_mc_local_lb[0x1];
2673 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 roce_en[0x1];
2675
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002676 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002677 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002678 u8 event_on_mtu[0x1];
2679 u8 event_on_promisc_change[0x1];
2680 u8 event_on_vlan_change[0x1];
2681 u8 event_on_mc_address_change[0x1];
2682 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002683
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002684 u8 reserved_at_40[0xc];
2685
2686 u8 affiliation_criteria[0x4];
2687 u8 affiliated_vhca_id[0x10];
2688
2689 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002690
2691 u8 mtu[0x10];
2692
Achiad Shochat9efa7522015-12-23 18:47:20 +02002693 u8 system_image_guid[0x40];
2694 u8 port_guid[0x40];
2695 u8 node_guid[0x40];
2696
Matan Barakb4ff3a32016-02-09 14:57:42 +02002697 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002698 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002700
2701 u8 promisc_uc[0x1];
2702 u8 promisc_mc[0x1];
2703 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002704 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002705 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707 u8 allowed_list_size[0xc];
2708
2709 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2710
Matan Barakb4ff3a32016-02-09 14:57:42 +02002711 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002712
2713 u8 current_uc_mac_address[0][0x40];
2714};
2715
2716enum {
2717 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2718 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2719 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002720 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002721};
2722
2723struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002725 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002726 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002727 u8 small_fence_on_rdma_read_response[0x1];
2728 u8 umr_en[0x1];
2729 u8 a[0x1];
2730 u8 rw[0x1];
2731 u8 rr[0x1];
2732 u8 lw[0x1];
2733 u8 lr[0x1];
2734 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736
2737 u8 qpn[0x18];
2738 u8 mkey_7_0[0x8];
2739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741
2742 u8 length64[0x1];
2743 u8 bsf_en[0x1];
2744 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748 u8 en_rinval[0x1];
2749 u8 pd[0x18];
2750
2751 u8 start_addr[0x40];
2752
2753 u8 len[0x40];
2754
2755 u8 bsf_octword_size[0x20];
2756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758
2759 u8 translations_octword_size[0x20];
2760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762 u8 log_page_size[0x5];
2763
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765};
2766
2767struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 pkey[0x10];
2770};
2771
2772struct mlx5_ifc_array128_auto_bits {
2773 u8 array128_auto[16][0x8];
2774};
2775
2776struct mlx5_ifc_hca_vport_context_bits {
2777 u8 field_select[0x20];
2778
Matan Barakb4ff3a32016-02-09 14:57:42 +02002779 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002780
2781 u8 sm_virt_aware[0x1];
2782 u8 has_smi[0x1];
2783 u8 has_raw[0x1];
2784 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002786 u8 port_physical_state[0x4];
2787 u8 vport_state_policy[0x4];
2788 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789 u8 vport_state[0x4];
2790
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002792
2793 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794
2795 u8 port_guid[0x40];
2796
2797 u8 node_guid[0x40];
2798
2799 u8 cap_mask1[0x20];
2800
2801 u8 cap_mask1_field_select[0x20];
2802
2803 u8 cap_mask2[0x20];
2804
2805 u8 cap_mask2_field_select[0x20];
2806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808
2809 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002810 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811 u8 init_type_reply[0x4];
2812 u8 lmc[0x3];
2813 u8 subnet_timeout[0x5];
2814
2815 u8 sm_lid[0x10];
2816 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818
2819 u8 qkey_violation_counter[0x10];
2820 u8 pkey_violation_counter[0x10];
2821
Matan Barakb4ff3a32016-02-09 14:57:42 +02002822 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823};
2824
Saeed Mahameedd6666752015-12-01 18:03:22 +02002825struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002827 u8 vport_svlan_strip[0x1];
2828 u8 vport_cvlan_strip[0x1];
2829 u8 vport_svlan_insert[0x1];
2830 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002831 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002832
Matan Barakb4ff3a32016-02-09 14:57:42 +02002833 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002834
2835 u8 svlan_cfi[0x1];
2836 u8 svlan_pcp[0x3];
2837 u8 svlan_id[0xc];
2838 u8 cvlan_cfi[0x1];
2839 u8 cvlan_pcp[0x3];
2840 u8 cvlan_id[0xc];
2841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002843};
2844
Saeed Mahameede2816822015-05-28 22:28:40 +03002845enum {
2846 MLX5_EQC_STATUS_OK = 0x0,
2847 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2848};
2849
2850enum {
2851 MLX5_EQC_ST_ARMED = 0x9,
2852 MLX5_EQC_ST_FIRED = 0xa,
2853};
2854
2855struct mlx5_ifc_eqc_bits {
2856 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002857 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002858 u8 ec[0x1];
2859 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002860 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002861 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002862 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002863
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871 u8 log_eq_size[0x5];
2872 u8 uar_page[0x18];
2873
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002877 u8 intr[0x8];
2878
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002880 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886 u8 consumer_counter[0x18];
2887
Matan Barakb4ff3a32016-02-09 14:57:42 +02002888 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002889 u8 producer_counter[0x18];
2890
Matan Barakb4ff3a32016-02-09 14:57:42 +02002891 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002892};
2893
2894enum {
2895 MLX5_DCTC_STATE_ACTIVE = 0x0,
2896 MLX5_DCTC_STATE_DRAINING = 0x1,
2897 MLX5_DCTC_STATE_DRAINED = 0x2,
2898};
2899
2900enum {
2901 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2902 MLX5_DCTC_CS_RES_NA = 0x1,
2903 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2904};
2905
2906enum {
2907 MLX5_DCTC_MTU_256_BYTES = 0x1,
2908 MLX5_DCTC_MTU_512_BYTES = 0x2,
2909 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2910 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2911 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2912};
2913
2914struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920 u8 user_index[0x18];
2921
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923 u8 cqn[0x18];
2924
2925 u8 counter_set_id[0x8];
2926 u8 atomic_mode[0x4];
2927 u8 rre[0x1];
2928 u8 rwe[0x1];
2929 u8 rae[0x1];
2930 u8 atomic_like_write_en[0x1];
2931 u8 latency_sensitive[0x1];
2932 u8 rlky[0x1];
2933 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002943 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946 u8 pd[0x18];
2947
2948 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950 u8 flow_label[0x14];
2951
2952 u8 dc_access_key[0x40];
2953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955 u8 mtu[0x3];
2956 u8 port[0x8];
2957 u8 pkey_index[0x10];
2958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962 u8 hop_limit[0x8];
2963
2964 u8 dc_access_key_violation_count[0x20];
2965
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967 u8 dei_cfi[0x1];
2968 u8 eth_prio[0x3];
2969 u8 ecn[0x2];
2970 u8 dscp[0x6];
2971
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973};
2974
2975enum {
2976 MLX5_CQC_STATUS_OK = 0x0,
2977 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2978 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2979};
2980
2981enum {
2982 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2983 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2984};
2985
2986enum {
2987 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2988 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2989 MLX5_CQC_ST_FIRED = 0xa,
2990};
2991
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002992enum {
2993 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2994 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002995 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002996};
2997
Saeed Mahameede2816822015-05-28 22:28:40 +03002998struct mlx5_ifc_cqc_bits {
2999 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 cqe_sz[0x3];
3002 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003003 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003004 u8 scqe_break_moderation_en[0x1];
3005 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003006 u8 cq_period_mode[0x2];
3007 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008 u8 mini_cqe_res_format[0x2];
3009 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003010 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003011
Matan Barakb4ff3a32016-02-09 14:57:42 +02003012 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003013
Matan Barakb4ff3a32016-02-09 14:57:42 +02003014 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003015 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017
Matan Barakb4ff3a32016-02-09 14:57:42 +02003018 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003019 u8 log_cq_size[0x5];
3020 u8 uar_page[0x18];
3021
Matan Barakb4ff3a32016-02-09 14:57:42 +02003022 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003023 u8 cq_period[0xc];
3024 u8 cq_max_count[0x10];
3025
Matan Barakb4ff3a32016-02-09 14:57:42 +02003026 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003027 u8 c_eqn[0x8];
3028
Matan Barakb4ff3a32016-02-09 14:57:42 +02003029 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003030 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034
Matan Barakb4ff3a32016-02-09 14:57:42 +02003035 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003036 u8 last_notified_index[0x18];
3037
Matan Barakb4ff3a32016-02-09 14:57:42 +02003038 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003039 u8 last_solicit_index[0x18];
3040
Matan Barakb4ff3a32016-02-09 14:57:42 +02003041 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003042 u8 consumer_counter[0x18];
3043
Matan Barakb4ff3a32016-02-09 14:57:42 +02003044 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003045 u8 producer_counter[0x18];
3046
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048
3049 u8 dbr_addr[0x40];
3050};
3051
3052union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3053 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3054 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3055 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003056 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003057};
3058
3059struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003063 u8 ieee_vendor_id[0x18];
3064
Matan Barakb4ff3a32016-02-09 14:57:42 +02003065 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003066 u8 vsd_vendor_id[0x10];
3067
3068 u8 vsd[208][0x8];
3069
3070 u8 vsd_contd_psid[16][0x8];
3071};
3072
Saeed Mahameed74862162016-06-09 15:11:34 +03003073enum {
3074 MLX5_XRQC_STATE_GOOD = 0x0,
3075 MLX5_XRQC_STATE_ERROR = 0x1,
3076};
3077
3078enum {
3079 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3080 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3081};
3082
3083enum {
3084 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3085};
3086
3087struct mlx5_ifc_tag_matching_topology_context_bits {
3088 u8 log_matching_list_sz[0x4];
3089 u8 reserved_at_4[0xc];
3090 u8 append_next_index[0x10];
3091
3092 u8 sw_phase_cnt[0x10];
3093 u8 hw_phase_cnt[0x10];
3094
3095 u8 reserved_at_40[0x40];
3096};
3097
3098struct mlx5_ifc_xrqc_bits {
3099 u8 state[0x4];
3100 u8 rlkey[0x1];
3101 u8 reserved_at_5[0xf];
3102 u8 topology[0x4];
3103 u8 reserved_at_18[0x4];
3104 u8 offload[0x4];
3105
3106 u8 reserved_at_20[0x8];
3107 u8 user_index[0x18];
3108
3109 u8 reserved_at_40[0x8];
3110 u8 cqn[0x18];
3111
3112 u8 reserved_at_60[0xa0];
3113
3114 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3115
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003116 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003117
3118 struct mlx5_ifc_wq_bits wq;
3119};
3120
Saeed Mahameede2816822015-05-28 22:28:40 +03003121union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3122 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3123 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003124 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003125};
3126
3127union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3128 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3129 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3130 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003131 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003132};
3133
3134union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3135 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3136 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3137 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3138 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3139 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3140 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3141 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003142 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003143 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003144 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003145 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003146};
3147
Gal Pressman8ed1a632016-11-17 13:46:01 +02003148union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3149 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3150 u8 reserved_at_0[0x7c0];
3151};
3152
Saeed Mahameede2816822015-05-28 22:28:40 +03003153union mlx5_ifc_event_auto_bits {
3154 struct mlx5_ifc_comp_event_bits comp_event;
3155 struct mlx5_ifc_dct_events_bits dct_events;
3156 struct mlx5_ifc_qp_events_bits qp_events;
3157 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3158 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3159 struct mlx5_ifc_cq_error_bits cq_error;
3160 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3161 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3162 struct mlx5_ifc_gpio_event_bits gpio_event;
3163 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3164 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3165 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003166 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003167};
3168
3169struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171
3172 u8 assert_existptr[0x20];
3173
3174 u8 assert_callra[0x20];
3175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177
3178 u8 fw_version[0x20];
3179
3180 u8 hw_id[0x20];
3181
Matan Barakb4ff3a32016-02-09 14:57:42 +02003182 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003183
3184 u8 irisc_index[0x8];
3185 u8 synd[0x8];
3186 u8 ext_synd[0x10];
3187};
3188
3189struct mlx5_ifc_register_loopback_control_bits {
3190 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003198struct mlx5_ifc_vport_tc_element_bits {
3199 u8 traffic_class[0x4];
3200 u8 reserved_at_4[0xc];
3201 u8 vport_number[0x10];
3202};
3203
3204struct mlx5_ifc_vport_element_bits {
3205 u8 reserved_at_0[0x10];
3206 u8 vport_number[0x10];
3207};
3208
3209enum {
3210 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3211 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3212 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3213};
3214
3215struct mlx5_ifc_tsar_element_bits {
3216 u8 reserved_at_0[0x8];
3217 u8 tsar_type[0x8];
3218 u8 reserved_at_10[0x10];
3219};
3220
Majd Dibbiny8812c242017-02-09 14:20:12 +02003221enum {
3222 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3223 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3224};
3225
Saeed Mahameede2816822015-05-28 22:28:40 +03003226struct mlx5_ifc_teardown_hca_out_bits {
3227 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229
3230 u8 syndrome[0x20];
3231
Majd Dibbiny8812c242017-02-09 14:20:12 +02003232 u8 reserved_at_40[0x3f];
3233
3234 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235};
3236
3237enum {
3238 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003239 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003240};
3241
3242struct mlx5_ifc_teardown_hca_in_bits {
3243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003245
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247 u8 op_mod[0x10];
3248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250 u8 profile[0x10];
3251
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253};
3254
3255struct mlx5_ifc_sqerr2rts_qp_out_bits {
3256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
3259 u8 syndrome[0x20];
3260
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262};
3263
3264struct mlx5_ifc_sqerr2rts_qp_in_bits {
3265 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269 u8 op_mod[0x10];
3270
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272 u8 qpn[0x18];
3273
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
3276 u8 opt_param_mask[0x20];
3277
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279
3280 struct mlx5_ifc_qpc_bits qpc;
3281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283};
3284
3285struct mlx5_ifc_sqd2rts_qp_out_bits {
3286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288
3289 u8 syndrome[0x20];
3290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292};
3293
3294struct mlx5_ifc_sqd2rts_qp_in_bits {
3295 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299 u8 op_mod[0x10];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302 u8 qpn[0x18];
3303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305
3306 u8 opt_param_mask[0x20];
3307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
3310 struct mlx5_ifc_qpc_bits qpc;
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313};
3314
3315struct mlx5_ifc_set_roce_address_out_bits {
3316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
3319 u8 syndrome[0x20];
3320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322};
3323
3324struct mlx5_ifc_set_roce_address_in_bits {
3325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329 u8 op_mod[0x10];
3330
3331 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003332 u8 reserved_at_50[0xc];
3333 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336
3337 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3338};
3339
3340struct mlx5_ifc_set_mad_demux_out_bits {
3341 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343
3344 u8 syndrome[0x20];
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347};
3348
3349enum {
3350 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3351 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3352};
3353
3354struct mlx5_ifc_set_mad_demux_in_bits {
3355 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359 u8 op_mod[0x10];
3360
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366};
3367
3368struct mlx5_ifc_set_l2_table_entry_out_bits {
3369 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003370 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003371
3372 u8 syndrome[0x20];
3373
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375};
3376
3377struct mlx5_ifc_set_l2_table_entry_in_bits {
3378 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382 u8 op_mod[0x10];
3383
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387 u8 table_index[0x18];
3388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392 u8 vlan_valid[0x1];
3393 u8 vlan[0xc];
3394
3395 struct mlx5_ifc_mac_address_layout_bits mac_address;
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398};
3399
3400struct mlx5_ifc_set_issi_out_bits {
3401 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
3404 u8 syndrome[0x20];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407};
3408
3409struct mlx5_ifc_set_issi_in_bits {
3410 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414 u8 op_mod[0x10];
3415
Matan Barakb4ff3a32016-02-09 14:57:42 +02003416 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003417 u8 current_issi[0x10];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420};
3421
3422struct mlx5_ifc_set_hca_cap_out_bits {
3423 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425
3426 u8 syndrome[0x20];
3427
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003429};
3430
3431struct mlx5_ifc_set_hca_cap_in_bits {
3432 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003436 u8 op_mod[0x10];
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003439
Saeed Mahameede2816822015-05-28 22:28:40 +03003440 union mlx5_ifc_hca_cap_union_bits capability;
3441};
3442
Maor Gottlieb26a81452015-12-10 17:12:39 +02003443enum {
3444 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3445 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3446 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3447 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3448};
3449
Saeed Mahameede2816822015-05-28 22:28:40 +03003450struct mlx5_ifc_set_fte_out_bits {
3451 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453
3454 u8 syndrome[0x20];
3455
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457};
3458
3459struct mlx5_ifc_set_fte_in_bits {
3460 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003461 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003462
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464 u8 op_mod[0x10];
3465
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003466 u8 other_vport[0x1];
3467 u8 reserved_at_41[0xf];
3468 u8 vport_number[0x10];
3469
3470 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471
3472 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003474
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476 u8 table_id[0x18];
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003479 u8 modify_enable_mask[0x8];
3480
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003482
3483 u8 flow_index[0x20];
3484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003486
3487 struct mlx5_ifc_flow_context_bits flow_context;
3488};
3489
3490struct mlx5_ifc_rts2rts_qp_out_bits {
3491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493
3494 u8 syndrome[0x20];
3495
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497};
3498
3499struct mlx5_ifc_rts2rts_qp_in_bits {
3500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003502
Matan Barakb4ff3a32016-02-09 14:57:42 +02003503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003504 u8 op_mod[0x10];
3505
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507 u8 qpn[0x18];
3508
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510
3511 u8 opt_param_mask[0x20];
3512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514
3515 struct mlx5_ifc_qpc_bits qpc;
3516
Matan Barakb4ff3a32016-02-09 14:57:42 +02003517 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003518};
3519
3520struct mlx5_ifc_rtr2rts_qp_out_bits {
3521 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523
3524 u8 syndrome[0x20];
3525
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003527};
3528
3529struct mlx5_ifc_rtr2rts_qp_in_bits {
3530 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534 u8 op_mod[0x10];
3535
Matan Barakb4ff3a32016-02-09 14:57:42 +02003536 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003537 u8 qpn[0x18];
3538
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
3541 u8 opt_param_mask[0x20];
3542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
3545 struct mlx5_ifc_qpc_bits qpc;
3546
Matan Barakb4ff3a32016-02-09 14:57:42 +02003547 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003548};
3549
3550struct mlx5_ifc_rst2init_qp_out_bits {
3551 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553
3554 u8 syndrome[0x20];
3555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557};
3558
3559struct mlx5_ifc_rst2init_qp_in_bits {
3560 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564 u8 op_mod[0x10];
3565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567 u8 qpn[0x18];
3568
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570
3571 u8 opt_param_mask[0x20];
3572
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
3575 struct mlx5_ifc_qpc_bits qpc;
3576
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578};
3579
Saeed Mahameed74862162016-06-09 15:11:34 +03003580struct mlx5_ifc_query_xrq_out_bits {
3581 u8 status[0x8];
3582 u8 reserved_at_8[0x18];
3583
3584 u8 syndrome[0x20];
3585
3586 u8 reserved_at_40[0x40];
3587
3588 struct mlx5_ifc_xrqc_bits xrq_context;
3589};
3590
3591struct mlx5_ifc_query_xrq_in_bits {
3592 u8 opcode[0x10];
3593 u8 reserved_at_10[0x10];
3594
3595 u8 reserved_at_20[0x10];
3596 u8 op_mod[0x10];
3597
3598 u8 reserved_at_40[0x8];
3599 u8 xrqn[0x18];
3600
3601 u8 reserved_at_60[0x20];
3602};
3603
Saeed Mahameede2816822015-05-28 22:28:40 +03003604struct mlx5_ifc_query_xrc_srq_out_bits {
3605 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607
3608 u8 syndrome[0x20];
3609
Matan Barakb4ff3a32016-02-09 14:57:42 +02003610 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003611
3612 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3613
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615
3616 u8 pas[0][0x40];
3617};
3618
3619struct mlx5_ifc_query_xrc_srq_in_bits {
3620 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624 u8 op_mod[0x10];
3625
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627 u8 xrc_srqn[0x18];
3628
Matan Barakb4ff3a32016-02-09 14:57:42 +02003629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003630};
3631
3632enum {
3633 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3634 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3635};
3636
3637struct mlx5_ifc_query_vport_state_out_bits {
3638 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640
3641 u8 syndrome[0x20];
3642
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646 u8 admin_state[0x4];
3647 u8 state[0x4];
3648};
3649
3650enum {
3651 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003652 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003653};
3654
3655struct mlx5_ifc_query_vport_state_in_bits {
3656 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660 u8 op_mod[0x10];
3661
3662 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664 u8 vport_number[0x10];
3665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667};
3668
3669struct mlx5_ifc_query_vport_counter_out_bits {
3670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672
3673 u8 syndrome[0x20];
3674
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676
3677 struct mlx5_ifc_traffic_counter_bits received_errors;
3678
3679 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3680
3681 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3682
3683 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3684
3685 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3686
3687 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3688
3689 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3690
3691 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3692
3693 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3694
3695 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3696
3697 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3698
3699 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702};
3703
3704enum {
3705 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3706};
3707
3708struct mlx5_ifc_query_vport_counter_in_bits {
3709 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003710 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003711
Matan Barakb4ff3a32016-02-09 14:57:42 +02003712 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713 u8 op_mod[0x10];
3714
3715 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003716 u8 reserved_at_41[0xb];
3717 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003718 u8 vport_number[0x10];
3719
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721
3722 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726};
3727
3728struct mlx5_ifc_query_tis_out_bits {
3729 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731
3732 u8 syndrome[0x20];
3733
Matan Barakb4ff3a32016-02-09 14:57:42 +02003734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003735
3736 struct mlx5_ifc_tisc_bits tis_context;
3737};
3738
3739struct mlx5_ifc_query_tis_in_bits {
3740 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003741 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742
Matan Barakb4ff3a32016-02-09 14:57:42 +02003743 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003744 u8 op_mod[0x10];
3745
Matan Barakb4ff3a32016-02-09 14:57:42 +02003746 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747 u8 tisn[0x18];
3748
Matan Barakb4ff3a32016-02-09 14:57:42 +02003749 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003750};
3751
3752struct mlx5_ifc_query_tir_out_bits {
3753 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003754 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003755
3756 u8 syndrome[0x20];
3757
Matan Barakb4ff3a32016-02-09 14:57:42 +02003758 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003759
3760 struct mlx5_ifc_tirc_bits tir_context;
3761};
3762
3763struct mlx5_ifc_query_tir_in_bits {
3764 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003765 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003766
Matan Barakb4ff3a32016-02-09 14:57:42 +02003767 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768 u8 op_mod[0x10];
3769
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771 u8 tirn[0x18];
3772
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774};
3775
3776struct mlx5_ifc_query_srq_out_bits {
3777 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779
3780 u8 syndrome[0x20];
3781
Matan Barakb4ff3a32016-02-09 14:57:42 +02003782 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003783
3784 struct mlx5_ifc_srqc_bits srq_context_entry;
3785
Matan Barakb4ff3a32016-02-09 14:57:42 +02003786 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003787
3788 u8 pas[0][0x40];
3789};
3790
3791struct mlx5_ifc_query_srq_in_bits {
3792 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794
Matan Barakb4ff3a32016-02-09 14:57:42 +02003795 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796 u8 op_mod[0x10];
3797
Matan Barakb4ff3a32016-02-09 14:57:42 +02003798 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003799 u8 srqn[0x18];
3800
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802};
3803
3804struct mlx5_ifc_query_sq_out_bits {
3805 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003806 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003807
3808 u8 syndrome[0x20];
3809
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811
3812 struct mlx5_ifc_sqc_bits sq_context;
3813};
3814
3815struct mlx5_ifc_query_sq_in_bits {
3816 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820 u8 op_mod[0x10];
3821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823 u8 sqn[0x18];
3824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826};
3827
3828struct mlx5_ifc_query_special_contexts_out_bits {
3829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003831
3832 u8 syndrome[0x20];
3833
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003834 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
3836 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003837
3838 u8 null_mkey[0x20];
3839
3840 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841};
3842
3843struct mlx5_ifc_query_special_contexts_in_bits {
3844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848 u8 op_mod[0x10];
3849
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851};
3852
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003853struct mlx5_ifc_query_scheduling_element_out_bits {
3854 u8 opcode[0x10];
3855 u8 reserved_at_10[0x10];
3856
3857 u8 reserved_at_20[0x10];
3858 u8 op_mod[0x10];
3859
3860 u8 reserved_at_40[0xc0];
3861
3862 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3863
3864 u8 reserved_at_300[0x100];
3865};
3866
3867enum {
3868 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3869};
3870
3871struct mlx5_ifc_query_scheduling_element_in_bits {
3872 u8 opcode[0x10];
3873 u8 reserved_at_10[0x10];
3874
3875 u8 reserved_at_20[0x10];
3876 u8 op_mod[0x10];
3877
3878 u8 scheduling_hierarchy[0x8];
3879 u8 reserved_at_48[0x18];
3880
3881 u8 scheduling_element_id[0x20];
3882
3883 u8 reserved_at_80[0x180];
3884};
3885
Saeed Mahameede2816822015-05-28 22:28:40 +03003886struct mlx5_ifc_query_rqt_out_bits {
3887 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 u8 syndrome[0x20];
3891
Matan Barakb4ff3a32016-02-09 14:57:42 +02003892 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 struct mlx5_ifc_rqtc_bits rqt_context;
3895};
3896
3897struct mlx5_ifc_query_rqt_in_bits {
3898 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902 u8 op_mod[0x10];
3903
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905 u8 rqtn[0x18];
3906
Matan Barakb4ff3a32016-02-09 14:57:42 +02003907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003908};
3909
3910struct mlx5_ifc_query_rq_out_bits {
3911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913
3914 u8 syndrome[0x20];
3915
Matan Barakb4ff3a32016-02-09 14:57:42 +02003916 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003917
3918 struct mlx5_ifc_rqc_bits rq_context;
3919};
3920
3921struct mlx5_ifc_query_rq_in_bits {
3922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926 u8 op_mod[0x10];
3927
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929 u8 rqn[0x18];
3930
Matan Barakb4ff3a32016-02-09 14:57:42 +02003931 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003932};
3933
3934struct mlx5_ifc_query_roce_address_out_bits {
3935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937
3938 u8 syndrome[0x20];
3939
Matan Barakb4ff3a32016-02-09 14:57:42 +02003940 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003941
3942 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3943};
3944
3945struct mlx5_ifc_query_roce_address_in_bits {
3946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
Matan Barakb4ff3a32016-02-09 14:57:42 +02003949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950 u8 op_mod[0x10];
3951
3952 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003953 u8 reserved_at_50[0xc];
3954 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003955
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957};
3958
3959struct mlx5_ifc_query_rmp_out_bits {
3960 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962
3963 u8 syndrome[0x20];
3964
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966
3967 struct mlx5_ifc_rmpc_bits rmp_context;
3968};
3969
3970struct mlx5_ifc_query_rmp_in_bits {
3971 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003972 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003973
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975 u8 op_mod[0x10];
3976
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978 u8 rmpn[0x18];
3979
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981};
3982
3983struct mlx5_ifc_query_qp_out_bits {
3984 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003985 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003986
3987 u8 syndrome[0x20];
3988
Matan Barakb4ff3a32016-02-09 14:57:42 +02003989 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003990
3991 u8 opt_param_mask[0x20];
3992
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994
3995 struct mlx5_ifc_qpc_bits qpc;
3996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998
3999 u8 pas[0][0x40];
4000};
4001
4002struct mlx5_ifc_query_qp_in_bits {
4003 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004004 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004005
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007 u8 op_mod[0x10];
4008
Matan Barakb4ff3a32016-02-09 14:57:42 +02004009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004010 u8 qpn[0x18];
4011
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013};
4014
4015struct mlx5_ifc_query_q_counter_out_bits {
4016 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004017 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004018
4019 u8 syndrome[0x20];
4020
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022
4023 u8 rx_write_requests[0x20];
4024
Matan Barakb4ff3a32016-02-09 14:57:42 +02004025 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004026
4027 u8 rx_read_requests[0x20];
4028
Matan Barakb4ff3a32016-02-09 14:57:42 +02004029 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004030
4031 u8 rx_atomic_requests[0x20];
4032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
4035 u8 rx_dct_connect[0x20];
4036
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
4039 u8 out_of_buffer[0x20];
4040
Matan Barakb4ff3a32016-02-09 14:57:42 +02004041 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004042
4043 u8 out_of_sequence[0x20];
4044
Saeed Mahameed74862162016-06-09 15:11:34 +03004045 u8 reserved_at_1e0[0x20];
4046
4047 u8 duplicate_request[0x20];
4048
4049 u8 reserved_at_220[0x20];
4050
4051 u8 rnr_nak_retry_err[0x20];
4052
4053 u8 reserved_at_260[0x20];
4054
4055 u8 packet_seq_err[0x20];
4056
4057 u8 reserved_at_2a0[0x20];
4058
4059 u8 implied_nak_seq_err[0x20];
4060
4061 u8 reserved_at_2e0[0x20];
4062
4063 u8 local_ack_timeout_err[0x20];
4064
Parav Pandit58dcb602017-06-19 07:19:37 +03004065 u8 reserved_at_320[0xa0];
4066
4067 u8 resp_local_length_error[0x20];
4068
4069 u8 req_local_length_error[0x20];
4070
4071 u8 resp_local_qp_error[0x20];
4072
4073 u8 local_operation_error[0x20];
4074
4075 u8 resp_local_protection[0x20];
4076
4077 u8 req_local_protection[0x20];
4078
4079 u8 resp_cqe_error[0x20];
4080
4081 u8 req_cqe_error[0x20];
4082
4083 u8 req_mw_binding[0x20];
4084
4085 u8 req_bad_response[0x20];
4086
4087 u8 req_remote_invalid_request[0x20];
4088
4089 u8 resp_remote_invalid_request[0x20];
4090
4091 u8 req_remote_access_errors[0x20];
4092
4093 u8 resp_remote_access_errors[0x20];
4094
4095 u8 req_remote_operation_errors[0x20];
4096
4097 u8 req_transport_retries_exceeded[0x20];
4098
4099 u8 cq_overflow[0x20];
4100
4101 u8 resp_cqe_flush_error[0x20];
4102
4103 u8 req_cqe_flush_error[0x20];
4104
4105 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106};
4107
4108struct mlx5_ifc_query_q_counter_in_bits {
4109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113 u8 op_mod[0x10];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116
4117 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121 u8 counter_set_id[0x8];
4122};
4123
4124struct mlx5_ifc_query_pages_out_bits {
4125 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
4128 u8 syndrome[0x20];
4129
Matan Barakb4ff3a32016-02-09 14:57:42 +02004130 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131 u8 function_id[0x10];
4132
4133 u8 num_pages[0x20];
4134};
4135
4136enum {
4137 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4138 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4139 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4140};
4141
4142struct mlx5_ifc_query_pages_in_bits {
4143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004145
Matan Barakb4ff3a32016-02-09 14:57:42 +02004146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004147 u8 op_mod[0x10];
4148
Matan Barakb4ff3a32016-02-09 14:57:42 +02004149 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004150 u8 function_id[0x10];
4151
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153};
4154
4155struct mlx5_ifc_query_nic_vport_context_out_bits {
4156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158
4159 u8 syndrome[0x20];
4160
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162
4163 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4164};
4165
4166struct mlx5_ifc_query_nic_vport_context_in_bits {
4167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171 u8 op_mod[0x10];
4172
4173 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175 u8 vport_number[0x10];
4176
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180};
4181
4182struct mlx5_ifc_query_mkey_out_bits {
4183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185
4186 u8 syndrome[0x20];
4187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189
4190 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4191
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004193
4194 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4195
4196 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4197};
4198
4199struct mlx5_ifc_query_mkey_in_bits {
4200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204 u8 op_mod[0x10];
4205
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004207 u8 mkey_index[0x18];
4208
4209 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211};
4212
4213struct mlx5_ifc_query_mad_demux_out_bits {
4214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216
4217 u8 syndrome[0x20];
4218
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220
4221 u8 mad_dumux_parameters_block[0x20];
4222};
4223
4224struct mlx5_ifc_query_mad_demux_in_bits {
4225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229 u8 op_mod[0x10];
4230
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232};
4233
4234struct mlx5_ifc_query_l2_table_entry_out_bits {
4235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004237
4238 u8 syndrome[0x20];
4239
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243 u8 vlan_valid[0x1];
4244 u8 vlan[0xc];
4245
4246 struct mlx5_ifc_mac_address_layout_bits mac_address;
4247
Matan Barakb4ff3a32016-02-09 14:57:42 +02004248 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004249};
4250
4251struct mlx5_ifc_query_l2_table_entry_in_bits {
4252 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256 u8 op_mod[0x10];
4257
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261 u8 table_index[0x18];
4262
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004264};
4265
4266struct mlx5_ifc_query_issi_out_bits {
4267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004269
4270 u8 syndrome[0x20];
4271
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273 u8 current_issi[0x10];
4274
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278 u8 supported_issi_dw0[0x20];
4279};
4280
4281struct mlx5_ifc_query_issi_in_bits {
4282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286 u8 op_mod[0x10];
4287
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289};
4290
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004291struct mlx5_ifc_set_driver_version_out_bits {
4292 u8 status[0x8];
4293 u8 reserved_0[0x18];
4294
4295 u8 syndrome[0x20];
4296 u8 reserved_1[0x40];
4297};
4298
4299struct mlx5_ifc_set_driver_version_in_bits {
4300 u8 opcode[0x10];
4301 u8 reserved_0[0x10];
4302
4303 u8 reserved_1[0x10];
4304 u8 op_mod[0x10];
4305
4306 u8 reserved_2[0x40];
4307 u8 driver_version[64][0x8];
4308};
4309
Saeed Mahameede2816822015-05-28 22:28:40 +03004310struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4311 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
4314 u8 syndrome[0x20];
4315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317
4318 struct mlx5_ifc_pkey_bits pkey[0];
4319};
4320
4321struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4322 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326 u8 op_mod[0x10];
4327
4328 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004330 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331 u8 vport_number[0x10];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334 u8 pkey_index[0x10];
4335};
4336
Eli Coheneff901d2016-03-11 22:58:42 +02004337enum {
4338 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4339 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4340 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4341};
4342
Saeed Mahameede2816822015-05-28 22:28:40 +03004343struct mlx5_ifc_query_hca_vport_gid_out_bits {
4344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004346
4347 u8 syndrome[0x20];
4348
Matan Barakb4ff3a32016-02-09 14:57:42 +02004349 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004350
4351 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004353
4354 struct mlx5_ifc_array128_auto_bits gid[0];
4355};
4356
4357struct mlx5_ifc_query_hca_vport_gid_in_bits {
4358 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004360
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362 u8 op_mod[0x10];
4363
4364 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004366 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004367 u8 vport_number[0x10];
4368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370 u8 gid_index[0x10];
4371};
4372
4373struct mlx5_ifc_query_hca_vport_context_out_bits {
4374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376
4377 u8 syndrome[0x20];
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380
4381 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4382};
4383
4384struct mlx5_ifc_query_hca_vport_context_in_bits {
4385 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004386 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004387
Matan Barakb4ff3a32016-02-09 14:57:42 +02004388 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389 u8 op_mod[0x10];
4390
4391 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004393 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004394 u8 vport_number[0x10];
4395
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004397};
4398
4399struct mlx5_ifc_query_hca_cap_out_bits {
4400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004402
4403 u8 syndrome[0x20];
4404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406
4407 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004408};
4409
4410struct mlx5_ifc_query_hca_cap_in_bits {
4411 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004413
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004415 u8 op_mod[0x10];
4416
Matan Barakb4ff3a32016-02-09 14:57:42 +02004417 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004418};
4419
Saeed Mahameede2816822015-05-28 22:28:40 +03004420struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004423
4424 u8 syndrome[0x20];
4425
Matan Barakb4ff3a32016-02-09 14:57:42 +02004426 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004429 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431 u8 log_size[0x8];
4432
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004434};
4435
Saeed Mahameede2816822015-05-28 22:28:40 +03004436struct mlx5_ifc_query_flow_table_in_bits {
4437 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004441 u8 op_mod[0x10];
4442
Matan Barakb4ff3a32016-02-09 14:57:42 +02004443 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004444
4445 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004449 u8 table_id[0x18];
4450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452};
4453
4454struct mlx5_ifc_query_fte_out_bits {
4455 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004457
4458 u8 syndrome[0x20];
4459
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004461
4462 struct mlx5_ifc_flow_context_bits flow_context;
4463};
4464
4465struct mlx5_ifc_query_fte_in_bits {
4466 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004467 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004468
Matan Barakb4ff3a32016-02-09 14:57:42 +02004469 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004470 u8 op_mod[0x10];
4471
Matan Barakb4ff3a32016-02-09 14:57:42 +02004472 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004473
4474 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476
Matan Barakb4ff3a32016-02-09 14:57:42 +02004477 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004478 u8 table_id[0x18];
4479
Matan Barakb4ff3a32016-02-09 14:57:42 +02004480 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004481
4482 u8 flow_index[0x20];
4483
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004485};
4486
4487enum {
4488 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4489 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4490 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4491};
4492
4493struct mlx5_ifc_query_flow_group_out_bits {
4494 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004495 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004496
4497 u8 syndrome[0x20];
4498
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004500
4501 u8 start_flow_index[0x20];
4502
Matan Barakb4ff3a32016-02-09 14:57:42 +02004503 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004504
4505 u8 end_flow_index[0x20];
4506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004508
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510 u8 match_criteria_enable[0x8];
4511
4512 struct mlx5_ifc_fte_match_param_bits match_criteria;
4513
Matan Barakb4ff3a32016-02-09 14:57:42 +02004514 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004515};
4516
4517struct mlx5_ifc_query_flow_group_in_bits {
4518 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004522 u8 op_mod[0x10];
4523
Matan Barakb4ff3a32016-02-09 14:57:42 +02004524 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004525
4526 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004527 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004528
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004530 u8 table_id[0x18];
4531
4532 u8 group_id[0x20];
4533
Matan Barakb4ff3a32016-02-09 14:57:42 +02004534 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004535};
4536
Amir Vadai9dc0b282016-05-13 12:55:39 +00004537struct mlx5_ifc_query_flow_counter_out_bits {
4538 u8 status[0x8];
4539 u8 reserved_at_8[0x18];
4540
4541 u8 syndrome[0x20];
4542
4543 u8 reserved_at_40[0x40];
4544
4545 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4546};
4547
4548struct mlx5_ifc_query_flow_counter_in_bits {
4549 u8 opcode[0x10];
4550 u8 reserved_at_10[0x10];
4551
4552 u8 reserved_at_20[0x10];
4553 u8 op_mod[0x10];
4554
4555 u8 reserved_at_40[0x80];
4556
4557 u8 clear[0x1];
4558 u8 reserved_at_c1[0xf];
4559 u8 num_of_counters[0x10];
4560
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004561 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004562};
4563
Saeed Mahameedd6666752015-12-01 18:03:22 +02004564struct mlx5_ifc_query_esw_vport_context_out_bits {
4565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004566 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004567
4568 u8 syndrome[0x20];
4569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004571
4572 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4573};
4574
4575struct mlx5_ifc_query_esw_vport_context_in_bits {
4576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004578
Matan Barakb4ff3a32016-02-09 14:57:42 +02004579 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004580 u8 op_mod[0x10];
4581
4582 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004583 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004584 u8 vport_number[0x10];
4585
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004587};
4588
4589struct mlx5_ifc_modify_esw_vport_context_out_bits {
4590 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004591 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004592
4593 u8 syndrome[0x20];
4594
Matan Barakb4ff3a32016-02-09 14:57:42 +02004595 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004596};
4597
4598struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004599 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004600 u8 vport_cvlan_insert[0x1];
4601 u8 vport_svlan_insert[0x1];
4602 u8 vport_cvlan_strip[0x1];
4603 u8 vport_svlan_strip[0x1];
4604};
4605
4606struct mlx5_ifc_modify_esw_vport_context_in_bits {
4607 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004608 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004609
Matan Barakb4ff3a32016-02-09 14:57:42 +02004610 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004611 u8 op_mod[0x10];
4612
4613 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004614 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004615 u8 vport_number[0x10];
4616
4617 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4618
4619 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4620};
4621
Saeed Mahameede2816822015-05-28 22:28:40 +03004622struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004623 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004624 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004625
4626 u8 syndrome[0x20];
4627
Matan Barakb4ff3a32016-02-09 14:57:42 +02004628 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004629
4630 struct mlx5_ifc_eqc_bits eq_context_entry;
4631
Matan Barakb4ff3a32016-02-09 14:57:42 +02004632 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004633
4634 u8 event_bitmask[0x40];
4635
Matan Barakb4ff3a32016-02-09 14:57:42 +02004636 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004637
4638 u8 pas[0][0x40];
4639};
4640
4641struct mlx5_ifc_query_eq_in_bits {
4642 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004643 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004644
Matan Barakb4ff3a32016-02-09 14:57:42 +02004645 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004646 u8 op_mod[0x10];
4647
Matan Barakb4ff3a32016-02-09 14:57:42 +02004648 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004649 u8 eq_number[0x8];
4650
Matan Barakb4ff3a32016-02-09 14:57:42 +02004651 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004652};
4653
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004654struct mlx5_ifc_encap_header_in_bits {
4655 u8 reserved_at_0[0x5];
4656 u8 header_type[0x3];
4657 u8 reserved_at_8[0xe];
4658 u8 encap_header_size[0xa];
4659
4660 u8 reserved_at_20[0x10];
4661 u8 encap_header[2][0x8];
4662
4663 u8 more_encap_header[0][0x8];
4664};
4665
4666struct mlx5_ifc_query_encap_header_out_bits {
4667 u8 status[0x8];
4668 u8 reserved_at_8[0x18];
4669
4670 u8 syndrome[0x20];
4671
4672 u8 reserved_at_40[0xa0];
4673
4674 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4675};
4676
4677struct mlx5_ifc_query_encap_header_in_bits {
4678 u8 opcode[0x10];
4679 u8 reserved_at_10[0x10];
4680
4681 u8 reserved_at_20[0x10];
4682 u8 op_mod[0x10];
4683
4684 u8 encap_id[0x20];
4685
4686 u8 reserved_at_60[0xa0];
4687};
4688
4689struct mlx5_ifc_alloc_encap_header_out_bits {
4690 u8 status[0x8];
4691 u8 reserved_at_8[0x18];
4692
4693 u8 syndrome[0x20];
4694
4695 u8 encap_id[0x20];
4696
4697 u8 reserved_at_60[0x20];
4698};
4699
4700struct mlx5_ifc_alloc_encap_header_in_bits {
4701 u8 opcode[0x10];
4702 u8 reserved_at_10[0x10];
4703
4704 u8 reserved_at_20[0x10];
4705 u8 op_mod[0x10];
4706
4707 u8 reserved_at_40[0xa0];
4708
4709 struct mlx5_ifc_encap_header_in_bits encap_header;
4710};
4711
4712struct mlx5_ifc_dealloc_encap_header_out_bits {
4713 u8 status[0x8];
4714 u8 reserved_at_8[0x18];
4715
4716 u8 syndrome[0x20];
4717
4718 u8 reserved_at_40[0x40];
4719};
4720
4721struct mlx5_ifc_dealloc_encap_header_in_bits {
4722 u8 opcode[0x10];
4723 u8 reserved_at_10[0x10];
4724
4725 u8 reserved_20[0x10];
4726 u8 op_mod[0x10];
4727
4728 u8 encap_id[0x20];
4729
4730 u8 reserved_60[0x20];
4731};
4732
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004733struct mlx5_ifc_set_action_in_bits {
4734 u8 action_type[0x4];
4735 u8 field[0xc];
4736 u8 reserved_at_10[0x3];
4737 u8 offset[0x5];
4738 u8 reserved_at_18[0x3];
4739 u8 length[0x5];
4740
4741 u8 data[0x20];
4742};
4743
4744struct mlx5_ifc_add_action_in_bits {
4745 u8 action_type[0x4];
4746 u8 field[0xc];
4747 u8 reserved_at_10[0x10];
4748
4749 u8 data[0x20];
4750};
4751
4752union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4753 struct mlx5_ifc_set_action_in_bits set_action_in;
4754 struct mlx5_ifc_add_action_in_bits add_action_in;
4755 u8 reserved_at_0[0x40];
4756};
4757
4758enum {
4759 MLX5_ACTION_TYPE_SET = 0x1,
4760 MLX5_ACTION_TYPE_ADD = 0x2,
4761};
4762
4763enum {
4764 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4765 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4766 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4767 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4768 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4769 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4770 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4771 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4772 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4773 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4774 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4775 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4776 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4777 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4778 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4779 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4780 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4781 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4782 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4783 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4784 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4785 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004786 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004787};
4788
4789struct mlx5_ifc_alloc_modify_header_context_out_bits {
4790 u8 status[0x8];
4791 u8 reserved_at_8[0x18];
4792
4793 u8 syndrome[0x20];
4794
4795 u8 modify_header_id[0x20];
4796
4797 u8 reserved_at_60[0x20];
4798};
4799
4800struct mlx5_ifc_alloc_modify_header_context_in_bits {
4801 u8 opcode[0x10];
4802 u8 reserved_at_10[0x10];
4803
4804 u8 reserved_at_20[0x10];
4805 u8 op_mod[0x10];
4806
4807 u8 reserved_at_40[0x20];
4808
4809 u8 table_type[0x8];
4810 u8 reserved_at_68[0x10];
4811 u8 num_of_actions[0x8];
4812
4813 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4814};
4815
4816struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4817 u8 status[0x8];
4818 u8 reserved_at_8[0x18];
4819
4820 u8 syndrome[0x20];
4821
4822 u8 reserved_at_40[0x40];
4823};
4824
4825struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4826 u8 opcode[0x10];
4827 u8 reserved_at_10[0x10];
4828
4829 u8 reserved_at_20[0x10];
4830 u8 op_mod[0x10];
4831
4832 u8 modify_header_id[0x20];
4833
4834 u8 reserved_at_60[0x20];
4835};
4836
Saeed Mahameede2816822015-05-28 22:28:40 +03004837struct mlx5_ifc_query_dct_out_bits {
4838 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840
4841 u8 syndrome[0x20];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844
4845 struct mlx5_ifc_dctc_bits dct_context_entry;
4846
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848};
4849
4850struct mlx5_ifc_query_dct_in_bits {
4851 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
Matan Barakb4ff3a32016-02-09 14:57:42 +02004854 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855 u8 op_mod[0x10];
4856
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858 u8 dctn[0x18];
4859
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861};
4862
4863struct mlx5_ifc_query_cq_out_bits {
4864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866
4867 u8 syndrome[0x20];
4868
Matan Barakb4ff3a32016-02-09 14:57:42 +02004869 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004870
4871 struct mlx5_ifc_cqc_bits cq_context;
4872
Matan Barakb4ff3a32016-02-09 14:57:42 +02004873 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874
4875 u8 pas[0][0x40];
4876};
4877
4878struct mlx5_ifc_query_cq_in_bits {
4879 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883 u8 op_mod[0x10];
4884
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886 u8 cqn[0x18];
4887
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889};
4890
4891struct mlx5_ifc_query_cong_status_out_bits {
4892 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894
4895 u8 syndrome[0x20];
4896
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898
4899 u8 enable[0x1];
4900 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902};
4903
4904struct mlx5_ifc_query_cong_status_in_bits {
4905 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909 u8 op_mod[0x10];
4910
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912 u8 priority[0x4];
4913 u8 cong_protocol[0x4];
4914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916};
4917
4918struct mlx5_ifc_query_cong_statistics_out_bits {
4919 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004920 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004921
4922 u8 syndrome[0x20];
4923
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925
Parav Pandite1f24a72017-04-16 07:29:29 +03004926 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
4928 u8 sum_flows[0x20];
4929
Parav Pandite1f24a72017-04-16 07:29:29 +03004930 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004931
Parav Pandite1f24a72017-04-16 07:29:29 +03004932 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
Parav Pandite1f24a72017-04-16 07:29:29 +03004934 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935
Parav Pandite1f24a72017-04-16 07:29:29 +03004936 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
4940 u8 time_stamp_high[0x20];
4941
4942 u8 time_stamp_low[0x20];
4943
4944 u8 accumulators_period[0x20];
4945
Parav Pandite1f24a72017-04-16 07:29:29 +03004946 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947
Parav Pandite1f24a72017-04-16 07:29:29 +03004948 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949
Parav Pandite1f24a72017-04-16 07:29:29 +03004950 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951
Parav Pandite1f24a72017-04-16 07:29:29 +03004952 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955};
4956
4957struct mlx5_ifc_query_cong_statistics_in_bits {
4958 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962 u8 op_mod[0x10];
4963
4964 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968};
4969
4970struct mlx5_ifc_query_cong_params_out_bits {
4971 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973
4974 u8 syndrome[0x20];
4975
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977
4978 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4979};
4980
4981struct mlx5_ifc_query_cong_params_in_bits {
4982 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986 u8 op_mod[0x10];
4987
Matan Barakb4ff3a32016-02-09 14:57:42 +02004988 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989 u8 cong_protocol[0x4];
4990
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992};
4993
4994struct mlx5_ifc_query_adapter_out_bits {
4995 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
4998 u8 syndrome[0x20];
4999
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001
5002 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5003};
5004
5005struct mlx5_ifc_query_adapter_in_bits {
5006 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010 u8 op_mod[0x10];
5011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013};
5014
5015struct mlx5_ifc_qp_2rst_out_bits {
5016 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
5019 u8 syndrome[0x20];
5020
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022};
5023
5024struct mlx5_ifc_qp_2rst_in_bits {
5025 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029 u8 op_mod[0x10];
5030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032 u8 qpn[0x18];
5033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035};
5036
5037struct mlx5_ifc_qp_2err_out_bits {
5038 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005039 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005040
5041 u8 syndrome[0x20];
5042
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044};
5045
5046struct mlx5_ifc_qp_2err_in_bits {
5047 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005049
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051 u8 op_mod[0x10];
5052
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054 u8 qpn[0x18];
5055
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057};
5058
5059struct mlx5_ifc_page_fault_resume_out_bits {
5060 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062
5063 u8 syndrome[0x20];
5064
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066};
5067
5068struct mlx5_ifc_page_fault_resume_in_bits {
5069 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073 u8 op_mod[0x10];
5074
5075 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005077 u8 page_fault_type[0x3];
5078 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005080 u8 reserved_at_60[0x8];
5081 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082};
5083
5084struct mlx5_ifc_nop_out_bits {
5085 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087
5088 u8 syndrome[0x20];
5089
Matan Barakb4ff3a32016-02-09 14:57:42 +02005090 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005091};
5092
5093struct mlx5_ifc_nop_in_bits {
5094 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005096
Matan Barakb4ff3a32016-02-09 14:57:42 +02005097 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005098 u8 op_mod[0x10];
5099
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101};
5102
5103struct mlx5_ifc_modify_vport_state_out_bits {
5104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106
5107 u8 syndrome[0x20];
5108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110};
5111
5112struct mlx5_ifc_modify_vport_state_in_bits {
5113 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117 u8 op_mod[0x10];
5118
5119 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121 u8 vport_number[0x10];
5122
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126};
5127
5128struct mlx5_ifc_modify_tis_out_bits {
5129 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131
5132 u8 syndrome[0x20];
5133
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005135};
5136
majd@mellanox.com75850d02016-01-14 19:13:06 +02005137struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005139
Aviv Heller84df61e2016-05-10 13:47:50 +03005140 u8 reserved_at_20[0x1d];
5141 u8 lag_tx_port_affinity[0x1];
5142 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005143 u8 prio[0x1];
5144};
5145
Saeed Mahameede2816822015-05-28 22:28:40 +03005146struct mlx5_ifc_modify_tis_in_bits {
5147 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005149
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151 u8 op_mod[0x10];
5152
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154 u8 tisn[0x18];
5155
Matan Barakb4ff3a32016-02-09 14:57:42 +02005156 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005157
majd@mellanox.com75850d02016-01-14 19:13:06 +02005158 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005159
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161
5162 struct mlx5_ifc_tisc_bits ctx;
5163};
5164
Achiad Shochatd9eea402015-08-04 14:05:42 +03005165struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005166 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005169 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005170 u8 reserved_at_3c[0x1];
5171 u8 hash[0x1];
5172 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005173 u8 lro[0x1];
5174};
5175
Saeed Mahameede2816822015-05-28 22:28:40 +03005176struct mlx5_ifc_modify_tir_out_bits {
5177 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005179
5180 u8 syndrome[0x20];
5181
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183};
5184
5185struct mlx5_ifc_modify_tir_in_bits {
5186 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190 u8 op_mod[0x10];
5191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193 u8 tirn[0x18];
5194
Matan Barakb4ff3a32016-02-09 14:57:42 +02005195 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005196
Achiad Shochatd9eea402015-08-04 14:05:42 +03005197 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005198
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
5201 struct mlx5_ifc_tirc_bits ctx;
5202};
5203
5204struct mlx5_ifc_modify_sq_out_bits {
5205 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207
5208 u8 syndrome[0x20];
5209
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211};
5212
5213struct mlx5_ifc_modify_sq_in_bits {
5214 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218 u8 op_mod[0x10];
5219
5220 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005221 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005222 u8 sqn[0x18];
5223
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225
5226 u8 modify_bitmask[0x40];
5227
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229
5230 struct mlx5_ifc_sqc_bits ctx;
5231};
5232
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005233struct mlx5_ifc_modify_scheduling_element_out_bits {
5234 u8 status[0x8];
5235 u8 reserved_at_8[0x18];
5236
5237 u8 syndrome[0x20];
5238
5239 u8 reserved_at_40[0x1c0];
5240};
5241
5242enum {
5243 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5244 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5245};
5246
5247struct mlx5_ifc_modify_scheduling_element_in_bits {
5248 u8 opcode[0x10];
5249 u8 reserved_at_10[0x10];
5250
5251 u8 reserved_at_20[0x10];
5252 u8 op_mod[0x10];
5253
5254 u8 scheduling_hierarchy[0x8];
5255 u8 reserved_at_48[0x18];
5256
5257 u8 scheduling_element_id[0x20];
5258
5259 u8 reserved_at_80[0x20];
5260
5261 u8 modify_bitmask[0x20];
5262
5263 u8 reserved_at_c0[0x40];
5264
5265 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5266
5267 u8 reserved_at_300[0x100];
5268};
5269
Saeed Mahameede2816822015-05-28 22:28:40 +03005270struct mlx5_ifc_modify_rqt_out_bits {
5271 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273
5274 u8 syndrome[0x20];
5275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277};
5278
Achiad Shochat5c503682015-08-04 14:05:43 +03005279struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005281
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005283 u8 rqn_list[0x1];
5284};
5285
Saeed Mahameede2816822015-05-28 22:28:40 +03005286struct mlx5_ifc_modify_rqt_in_bits {
5287 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005288 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005289
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291 u8 op_mod[0x10];
5292
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294 u8 rqtn[0x18];
5295
Matan Barakb4ff3a32016-02-09 14:57:42 +02005296 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005297
Achiad Shochat5c503682015-08-04 14:05:43 +03005298 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005299
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301
5302 struct mlx5_ifc_rqtc_bits ctx;
5303};
5304
5305struct mlx5_ifc_modify_rq_out_bits {
5306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005308
5309 u8 syndrome[0x20];
5310
Matan Barakb4ff3a32016-02-09 14:57:42 +02005311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005312};
5313
Alex Vesker83b502a2016-08-04 17:32:02 +03005314enum {
5315 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005316 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005317 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005318};
5319
Saeed Mahameede2816822015-05-28 22:28:40 +03005320struct mlx5_ifc_modify_rq_in_bits {
5321 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325 u8 op_mod[0x10];
5326
5327 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005328 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005329 u8 rqn[0x18];
5330
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332
5333 u8 modify_bitmask[0x40];
5334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336
5337 struct mlx5_ifc_rqc_bits ctx;
5338};
5339
5340struct mlx5_ifc_modify_rmp_out_bits {
5341 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343
5344 u8 syndrome[0x20];
5345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347};
5348
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005349struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005350 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005353 u8 lwm[0x1];
5354};
5355
Saeed Mahameede2816822015-05-28 22:28:40 +03005356struct mlx5_ifc_modify_rmp_in_bits {
5357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361 u8 op_mod[0x10];
5362
5363 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005364 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005365 u8 rmpn[0x18];
5366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005369 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005370
Matan Barakb4ff3a32016-02-09 14:57:42 +02005371 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372
5373 struct mlx5_ifc_rmpc_bits ctx;
5374};
5375
5376struct mlx5_ifc_modify_nic_vport_context_out_bits {
5377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005379
5380 u8 syndrome[0x20];
5381
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383};
5384
5385struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005386 u8 reserved_at_0[0x12];
5387 u8 affiliation[0x1];
5388 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005389 u8 disable_uc_local_lb[0x1];
5390 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005391 u8 node_guid[0x1];
5392 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005393 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005394 u8 mtu[0x1];
5395 u8 change_event[0x1];
5396 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397 u8 permanent_address[0x1];
5398 u8 addresses_list[0x1];
5399 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401};
5402
5403struct mlx5_ifc_modify_nic_vport_context_in_bits {
5404 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408 u8 op_mod[0x10];
5409
5410 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005412 u8 vport_number[0x10];
5413
5414 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5415
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417
5418 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5419};
5420
5421struct mlx5_ifc_modify_hca_vport_context_out_bits {
5422 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424
5425 u8 syndrome[0x20];
5426
Matan Barakb4ff3a32016-02-09 14:57:42 +02005427 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005428};
5429
5430struct mlx5_ifc_modify_hca_vport_context_in_bits {
5431 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435 u8 op_mod[0x10];
5436
5437 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005439 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440 u8 vport_number[0x10];
5441
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443
5444 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5445};
5446
5447struct mlx5_ifc_modify_cq_out_bits {
5448 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005449 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005450
5451 u8 syndrome[0x20];
5452
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454};
5455
5456enum {
5457 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5458 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5459};
5460
5461struct mlx5_ifc_modify_cq_in_bits {
5462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466 u8 op_mod[0x10];
5467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469 u8 cqn[0x18];
5470
5471 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5472
5473 struct mlx5_ifc_cqc_bits cq_context;
5474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476
5477 u8 pas[0][0x40];
5478};
5479
5480struct mlx5_ifc_modify_cong_status_out_bits {
5481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
5484 u8 syndrome[0x20];
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487};
5488
5489struct mlx5_ifc_modify_cong_status_in_bits {
5490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494 u8 op_mod[0x10];
5495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497 u8 priority[0x4];
5498 u8 cong_protocol[0x4];
5499
5500 u8 enable[0x1];
5501 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503};
5504
5505struct mlx5_ifc_modify_cong_params_out_bits {
5506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508
5509 u8 syndrome[0x20];
5510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512};
5513
5514struct mlx5_ifc_modify_cong_params_in_bits {
5515 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519 u8 op_mod[0x10];
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522 u8 cong_protocol[0x4];
5523
5524 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5525
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527
5528 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5529};
5530
5531struct mlx5_ifc_manage_pages_out_bits {
5532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
5535 u8 syndrome[0x20];
5536
5537 u8 output_num_entries[0x20];
5538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540
5541 u8 pas[0][0x40];
5542};
5543
5544enum {
5545 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5546 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5547 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5548};
5549
5550struct mlx5_ifc_manage_pages_in_bits {
5551 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555 u8 op_mod[0x10];
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558 u8 function_id[0x10];
5559
5560 u8 input_num_entries[0x20];
5561
5562 u8 pas[0][0x40];
5563};
5564
5565struct mlx5_ifc_mad_ifc_out_bits {
5566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568
5569 u8 syndrome[0x20];
5570
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572
5573 u8 response_mad_packet[256][0x8];
5574};
5575
5576struct mlx5_ifc_mad_ifc_in_bits {
5577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 op_mod[0x10];
5582
5583 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585 u8 port[0x8];
5586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588
5589 u8 mad[256][0x8];
5590};
5591
5592struct mlx5_ifc_init_hca_out_bits {
5593 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595
5596 u8 syndrome[0x20];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599};
5600
5601struct mlx5_ifc_init_hca_in_bits {
5602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606 u8 op_mod[0x10];
5607
Matan Barakb4ff3a32016-02-09 14:57:42 +02005608 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005609 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610};
5611
5612struct mlx5_ifc_init2rtr_qp_out_bits {
5613 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615
5616 u8 syndrome[0x20];
5617
Matan Barakb4ff3a32016-02-09 14:57:42 +02005618 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005619};
5620
5621struct mlx5_ifc_init2rtr_qp_in_bits {
5622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626 u8 op_mod[0x10];
5627
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629 u8 qpn[0x18];
5630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632
5633 u8 opt_param_mask[0x20];
5634
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636
5637 struct mlx5_ifc_qpc_bits qpc;
5638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640};
5641
5642struct mlx5_ifc_init2init_qp_out_bits {
5643 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645
5646 u8 syndrome[0x20];
5647
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649};
5650
5651struct mlx5_ifc_init2init_qp_in_bits {
5652 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656 u8 op_mod[0x10];
5657
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659 u8 qpn[0x18];
5660
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662
5663 u8 opt_param_mask[0x20];
5664
Matan Barakb4ff3a32016-02-09 14:57:42 +02005665 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005666
5667 struct mlx5_ifc_qpc_bits qpc;
5668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670};
5671
5672struct mlx5_ifc_get_dropped_packet_log_out_bits {
5673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675
5676 u8 syndrome[0x20];
5677
Matan Barakb4ff3a32016-02-09 14:57:42 +02005678 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005679
5680 u8 packet_headers_log[128][0x8];
5681
5682 u8 packet_syndrome[64][0x8];
5683};
5684
5685struct mlx5_ifc_get_dropped_packet_log_in_bits {
5686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690 u8 op_mod[0x10];
5691
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693};
5694
5695struct mlx5_ifc_gen_eqe_in_bits {
5696 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700 u8 op_mod[0x10];
5701
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703 u8 eq_number[0x8];
5704
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706
5707 u8 eqe[64][0x8];
5708};
5709
5710struct mlx5_ifc_gen_eq_out_bits {
5711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
5714 u8 syndrome[0x20];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717};
5718
5719struct mlx5_ifc_enable_hca_out_bits {
5720 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722
5723 u8 syndrome[0x20];
5724
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726};
5727
5728struct mlx5_ifc_enable_hca_in_bits {
5729 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005730 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733 u8 op_mod[0x10];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 function_id[0x10];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739};
5740
5741struct mlx5_ifc_drain_dct_out_bits {
5742 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744
5745 u8 syndrome[0x20];
5746
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748};
5749
5750struct mlx5_ifc_drain_dct_in_bits {
5751 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005752 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755 u8 op_mod[0x10];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758 u8 dctn[0x18];
5759
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761};
5762
5763struct mlx5_ifc_disable_hca_out_bits {
5764 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766
5767 u8 syndrome[0x20];
5768
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770};
5771
5772struct mlx5_ifc_disable_hca_in_bits {
5773 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777 u8 op_mod[0x10];
5778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780 u8 function_id[0x10];
5781
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783};
5784
5785struct mlx5_ifc_detach_from_mcg_out_bits {
5786 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788
5789 u8 syndrome[0x20];
5790
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792};
5793
5794struct mlx5_ifc_detach_from_mcg_in_bits {
5795 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799 u8 op_mod[0x10];
5800
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802 u8 qpn[0x18];
5803
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805
5806 u8 multicast_gid[16][0x8];
5807};
5808
Saeed Mahameed74862162016-06-09 15:11:34 +03005809struct mlx5_ifc_destroy_xrq_out_bits {
5810 u8 status[0x8];
5811 u8 reserved_at_8[0x18];
5812
5813 u8 syndrome[0x20];
5814
5815 u8 reserved_at_40[0x40];
5816};
5817
5818struct mlx5_ifc_destroy_xrq_in_bits {
5819 u8 opcode[0x10];
5820 u8 reserved_at_10[0x10];
5821
5822 u8 reserved_at_20[0x10];
5823 u8 op_mod[0x10];
5824
5825 u8 reserved_at_40[0x8];
5826 u8 xrqn[0x18];
5827
5828 u8 reserved_at_60[0x20];
5829};
5830
Saeed Mahameede2816822015-05-28 22:28:40 +03005831struct mlx5_ifc_destroy_xrc_srq_out_bits {
5832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834
5835 u8 syndrome[0x20];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838};
5839
5840struct mlx5_ifc_destroy_xrc_srq_in_bits {
5841 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 op_mod[0x10];
5846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 xrc_srqn[0x18];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851};
5852
5853struct mlx5_ifc_destroy_tis_out_bits {
5854 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856
5857 u8 syndrome[0x20];
5858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860};
5861
5862struct mlx5_ifc_destroy_tis_in_bits {
5863 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005864 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867 u8 op_mod[0x10];
5868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870 u8 tisn[0x18];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873};
5874
5875struct mlx5_ifc_destroy_tir_out_bits {
5876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878
5879 u8 syndrome[0x20];
5880
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882};
5883
5884struct mlx5_ifc_destroy_tir_in_bits {
5885 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889 u8 op_mod[0x10];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 tirn[0x18];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895};
5896
5897struct mlx5_ifc_destroy_srq_out_bits {
5898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900
5901 u8 syndrome[0x20];
5902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904};
5905
5906struct mlx5_ifc_destroy_srq_in_bits {
5907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911 u8 op_mod[0x10];
5912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914 u8 srqn[0x18];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917};
5918
5919struct mlx5_ifc_destroy_sq_out_bits {
5920 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922
5923 u8 syndrome[0x20];
5924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926};
5927
5928struct mlx5_ifc_destroy_sq_in_bits {
5929 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933 u8 op_mod[0x10];
5934
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936 u8 sqn[0x18];
5937
Matan Barakb4ff3a32016-02-09 14:57:42 +02005938 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005939};
5940
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005941struct mlx5_ifc_destroy_scheduling_element_out_bits {
5942 u8 status[0x8];
5943 u8 reserved_at_8[0x18];
5944
5945 u8 syndrome[0x20];
5946
5947 u8 reserved_at_40[0x1c0];
5948};
5949
5950struct mlx5_ifc_destroy_scheduling_element_in_bits {
5951 u8 opcode[0x10];
5952 u8 reserved_at_10[0x10];
5953
5954 u8 reserved_at_20[0x10];
5955 u8 op_mod[0x10];
5956
5957 u8 scheduling_hierarchy[0x8];
5958 u8 reserved_at_48[0x18];
5959
5960 u8 scheduling_element_id[0x20];
5961
5962 u8 reserved_at_80[0x180];
5963};
5964
Saeed Mahameede2816822015-05-28 22:28:40 +03005965struct mlx5_ifc_destroy_rqt_out_bits {
5966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968
5969 u8 syndrome[0x20];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972};
5973
5974struct mlx5_ifc_destroy_rqt_in_bits {
5975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005977
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979 u8 op_mod[0x10];
5980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 rqtn[0x18];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985};
5986
5987struct mlx5_ifc_destroy_rq_out_bits {
5988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
5991 u8 syndrome[0x20];
5992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994};
5995
5996struct mlx5_ifc_destroy_rq_in_bits {
5997 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001 u8 op_mod[0x10];
6002
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004 u8 rqn[0x18];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007};
6008
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006009struct mlx5_ifc_set_delay_drop_params_in_bits {
6010 u8 opcode[0x10];
6011 u8 reserved_at_10[0x10];
6012
6013 u8 reserved_at_20[0x10];
6014 u8 op_mod[0x10];
6015
6016 u8 reserved_at_40[0x20];
6017
6018 u8 reserved_at_60[0x10];
6019 u8 delay_drop_timeout[0x10];
6020};
6021
6022struct mlx5_ifc_set_delay_drop_params_out_bits {
6023 u8 status[0x8];
6024 u8 reserved_at_8[0x18];
6025
6026 u8 syndrome[0x20];
6027
6028 u8 reserved_at_40[0x40];
6029};
6030
Saeed Mahameede2816822015-05-28 22:28:40 +03006031struct mlx5_ifc_destroy_rmp_out_bits {
6032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034
6035 u8 syndrome[0x20];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038};
6039
6040struct mlx5_ifc_destroy_rmp_in_bits {
6041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045 u8 op_mod[0x10];
6046
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048 u8 rmpn[0x18];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_destroy_qp_out_bits {
6054 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
6057 u8 syndrome[0x20];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060};
6061
6062struct mlx5_ifc_destroy_qp_in_bits {
6063 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067 u8 op_mod[0x10];
6068
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070 u8 qpn[0x18];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_destroy_psv_out_bits {
6076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
6079 u8 syndrome[0x20];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082};
6083
6084struct mlx5_ifc_destroy_psv_in_bits {
6085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089 u8 op_mod[0x10];
6090
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092 u8 psvn[0x18];
6093
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095};
6096
6097struct mlx5_ifc_destroy_mkey_out_bits {
6098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100
6101 u8 syndrome[0x20];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104};
6105
6106struct mlx5_ifc_destroy_mkey_in_bits {
6107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111 u8 op_mod[0x10];
6112
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114 u8 mkey_index[0x18];
6115
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117};
6118
6119struct mlx5_ifc_destroy_flow_table_out_bits {
6120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
6123 u8 syndrome[0x20];
6124
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126};
6127
6128struct mlx5_ifc_destroy_flow_table_in_bits {
6129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133 u8 op_mod[0x10];
6134
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006135 u8 other_vport[0x1];
6136 u8 reserved_at_41[0xf];
6137 u8 vport_number[0x10];
6138
6139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140
6141 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145 u8 table_id[0x18];
6146
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148};
6149
6150struct mlx5_ifc_destroy_flow_group_out_bits {
6151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153
6154 u8 syndrome[0x20];
6155
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157};
6158
6159struct mlx5_ifc_destroy_flow_group_in_bits {
6160 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164 u8 op_mod[0x10];
6165
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006166 u8 other_vport[0x1];
6167 u8 reserved_at_41[0xf];
6168 u8 vport_number[0x10];
6169
6170 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006171
6172 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006173 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176 u8 table_id[0x18];
6177
6178 u8 group_id[0x20];
6179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181};
6182
6183struct mlx5_ifc_destroy_eq_out_bits {
6184 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
6187 u8 syndrome[0x20];
6188
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190};
6191
6192struct mlx5_ifc_destroy_eq_in_bits {
6193 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197 u8 op_mod[0x10];
6198
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200 u8 eq_number[0x8];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203};
6204
6205struct mlx5_ifc_destroy_dct_out_bits {
6206 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208
6209 u8 syndrome[0x20];
6210
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212};
6213
6214struct mlx5_ifc_destroy_dct_in_bits {
6215 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219 u8 op_mod[0x10];
6220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222 u8 dctn[0x18];
6223
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225};
6226
6227struct mlx5_ifc_destroy_cq_out_bits {
6228 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230
6231 u8 syndrome[0x20];
6232
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234};
6235
6236struct mlx5_ifc_destroy_cq_in_bits {
6237 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241 u8 op_mod[0x10];
6242
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244 u8 cqn[0x18];
6245
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247};
6248
6249struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6250 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006251 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006252
6253 u8 syndrome[0x20];
6254
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256};
6257
6258struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263 u8 op_mod[0x10];
6264
Matan Barakb4ff3a32016-02-09 14:57:42 +02006265 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268 u8 vxlan_udp_port[0x10];
6269};
6270
6271struct mlx5_ifc_delete_l2_table_entry_out_bits {
6272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274
6275 u8 syndrome[0x20];
6276
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278};
6279
6280struct mlx5_ifc_delete_l2_table_entry_in_bits {
6281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285 u8 op_mod[0x10];
6286
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290 u8 table_index[0x18];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293};
6294
6295struct mlx5_ifc_delete_fte_out_bits {
6296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298
6299 u8 syndrome[0x20];
6300
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302};
6303
6304struct mlx5_ifc_delete_fte_in_bits {
6305 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006306 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006307
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309 u8 op_mod[0x10];
6310
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006311 u8 other_vport[0x1];
6312 u8 reserved_at_41[0xf];
6313 u8 vport_number[0x10];
6314
6315 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316
6317 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321 u8 table_id[0x18];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
6325 u8 flow_index[0x20];
6326
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328};
6329
6330struct mlx5_ifc_dealloc_xrcd_out_bits {
6331 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333
6334 u8 syndrome[0x20];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337};
6338
6339struct mlx5_ifc_dealloc_xrcd_in_bits {
6340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344 u8 op_mod[0x10];
6345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347 u8 xrcd[0x18];
6348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350};
6351
6352struct mlx5_ifc_dealloc_uar_out_bits {
6353 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355
6356 u8 syndrome[0x20];
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359};
6360
6361struct mlx5_ifc_dealloc_uar_in_bits {
6362 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366 u8 op_mod[0x10];
6367
Matan Barakb4ff3a32016-02-09 14:57:42 +02006368 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006369 u8 uar[0x18];
6370
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372};
6373
6374struct mlx5_ifc_dealloc_transport_domain_out_bits {
6375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
6378 u8 syndrome[0x20];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381};
6382
6383struct mlx5_ifc_dealloc_transport_domain_in_bits {
6384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388 u8 op_mod[0x10];
6389
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391 u8 transport_domain[0x18];
6392
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394};
6395
6396struct mlx5_ifc_dealloc_q_counter_out_bits {
6397 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006398 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006399
6400 u8 syndrome[0x20];
6401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403};
6404
6405struct mlx5_ifc_dealloc_q_counter_in_bits {
6406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410 u8 op_mod[0x10];
6411
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413 u8 counter_set_id[0x8];
6414
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416};
6417
6418struct mlx5_ifc_dealloc_pd_out_bits {
6419 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006420 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006421
6422 u8 syndrome[0x20];
6423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425};
6426
6427struct mlx5_ifc_dealloc_pd_in_bits {
6428 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432 u8 op_mod[0x10];
6433
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435 u8 pd[0x18];
6436
Matan Barakb4ff3a32016-02-09 14:57:42 +02006437 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006438};
6439
Amir Vadai9dc0b282016-05-13 12:55:39 +00006440struct mlx5_ifc_dealloc_flow_counter_out_bits {
6441 u8 status[0x8];
6442 u8 reserved_at_8[0x18];
6443
6444 u8 syndrome[0x20];
6445
6446 u8 reserved_at_40[0x40];
6447};
6448
6449struct mlx5_ifc_dealloc_flow_counter_in_bits {
6450 u8 opcode[0x10];
6451 u8 reserved_at_10[0x10];
6452
6453 u8 reserved_at_20[0x10];
6454 u8 op_mod[0x10];
6455
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006456 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006457
6458 u8 reserved_at_60[0x20];
6459};
6460
Saeed Mahameed74862162016-06-09 15:11:34 +03006461struct mlx5_ifc_create_xrq_out_bits {
6462 u8 status[0x8];
6463 u8 reserved_at_8[0x18];
6464
6465 u8 syndrome[0x20];
6466
6467 u8 reserved_at_40[0x8];
6468 u8 xrqn[0x18];
6469
6470 u8 reserved_at_60[0x20];
6471};
6472
6473struct mlx5_ifc_create_xrq_in_bits {
6474 u8 opcode[0x10];
6475 u8 reserved_at_10[0x10];
6476
6477 u8 reserved_at_20[0x10];
6478 u8 op_mod[0x10];
6479
6480 u8 reserved_at_40[0x40];
6481
6482 struct mlx5_ifc_xrqc_bits xrq_context;
6483};
6484
Saeed Mahameede2816822015-05-28 22:28:40 +03006485struct mlx5_ifc_create_xrc_srq_out_bits {
6486 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488
6489 u8 syndrome[0x20];
6490
Matan Barakb4ff3a32016-02-09 14:57:42 +02006491 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006492 u8 xrc_srqn[0x18];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495};
6496
6497struct mlx5_ifc_create_xrc_srq_in_bits {
6498 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502 u8 op_mod[0x10];
6503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505
6506 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6507
Matan Barakb4ff3a32016-02-09 14:57:42 +02006508 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006509
6510 u8 pas[0][0x40];
6511};
6512
6513struct mlx5_ifc_create_tis_out_bits {
6514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006516
6517 u8 syndrome[0x20];
6518
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520 u8 tisn[0x18];
6521
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523};
6524
6525struct mlx5_ifc_create_tis_in_bits {
6526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528
Matan Barakb4ff3a32016-02-09 14:57:42 +02006529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006530 u8 op_mod[0x10];
6531
Matan Barakb4ff3a32016-02-09 14:57:42 +02006532 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006533
6534 struct mlx5_ifc_tisc_bits ctx;
6535};
6536
6537struct mlx5_ifc_create_tir_out_bits {
6538 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006539 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006540
6541 u8 syndrome[0x20];
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544 u8 tirn[0x18];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547};
6548
6549struct mlx5_ifc_create_tir_in_bits {
6550 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552
Matan Barakb4ff3a32016-02-09 14:57:42 +02006553 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006554 u8 op_mod[0x10];
6555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557
6558 struct mlx5_ifc_tirc_bits ctx;
6559};
6560
6561struct mlx5_ifc_create_srq_out_bits {
6562 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006563 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
6565 u8 syndrome[0x20];
6566
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568 u8 srqn[0x18];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571};
6572
6573struct mlx5_ifc_create_srq_in_bits {
6574 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 op_mod[0x10];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
6582 struct mlx5_ifc_srqc_bits srq_context_entry;
6583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585
6586 u8 pas[0][0x40];
6587};
6588
6589struct mlx5_ifc_create_sq_out_bits {
6590 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592
6593 u8 syndrome[0x20];
6594
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596 u8 sqn[0x18];
6597
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599};
6600
6601struct mlx5_ifc_create_sq_in_bits {
6602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606 u8 op_mod[0x10];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
6610 struct mlx5_ifc_sqc_bits ctx;
6611};
6612
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006613struct mlx5_ifc_create_scheduling_element_out_bits {
6614 u8 status[0x8];
6615 u8 reserved_at_8[0x18];
6616
6617 u8 syndrome[0x20];
6618
6619 u8 reserved_at_40[0x40];
6620
6621 u8 scheduling_element_id[0x20];
6622
6623 u8 reserved_at_a0[0x160];
6624};
6625
6626struct mlx5_ifc_create_scheduling_element_in_bits {
6627 u8 opcode[0x10];
6628 u8 reserved_at_10[0x10];
6629
6630 u8 reserved_at_20[0x10];
6631 u8 op_mod[0x10];
6632
6633 u8 scheduling_hierarchy[0x8];
6634 u8 reserved_at_48[0x18];
6635
6636 u8 reserved_at_60[0xa0];
6637
6638 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6639
6640 u8 reserved_at_300[0x100];
6641};
6642
Saeed Mahameede2816822015-05-28 22:28:40 +03006643struct mlx5_ifc_create_rqt_out_bits {
6644 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006645 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006646
6647 u8 syndrome[0x20];
6648
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650 u8 rqtn[0x18];
6651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653};
6654
6655struct mlx5_ifc_create_rqt_in_bits {
6656 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
Matan Barakb4ff3a32016-02-09 14:57:42 +02006659 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006660 u8 op_mod[0x10];
6661
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
6664 struct mlx5_ifc_rqtc_bits rqt_context;
6665};
6666
6667struct mlx5_ifc_create_rq_out_bits {
6668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006670
6671 u8 syndrome[0x20];
6672
Matan Barakb4ff3a32016-02-09 14:57:42 +02006673 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006674 u8 rqn[0x18];
6675
Matan Barakb4ff3a32016-02-09 14:57:42 +02006676 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006677};
6678
6679struct mlx5_ifc_create_rq_in_bits {
6680 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006681 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006682
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684 u8 op_mod[0x10];
6685
Matan Barakb4ff3a32016-02-09 14:57:42 +02006686 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006687
6688 struct mlx5_ifc_rqc_bits ctx;
6689};
6690
6691struct mlx5_ifc_create_rmp_out_bits {
6692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694
6695 u8 syndrome[0x20];
6696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698 u8 rmpn[0x18];
6699
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701};
6702
6703struct mlx5_ifc_create_rmp_in_bits {
6704 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006705 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708 u8 op_mod[0x10];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711
6712 struct mlx5_ifc_rmpc_bits ctx;
6713};
6714
6715struct mlx5_ifc_create_qp_out_bits {
6716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718
6719 u8 syndrome[0x20];
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722 u8 qpn[0x18];
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725};
6726
6727struct mlx5_ifc_create_qp_in_bits {
6728 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732 u8 op_mod[0x10];
6733
Matan Barakb4ff3a32016-02-09 14:57:42 +02006734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006735
6736 u8 opt_param_mask[0x20];
6737
Matan Barakb4ff3a32016-02-09 14:57:42 +02006738 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006739
6740 struct mlx5_ifc_qpc_bits qpc;
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743
6744 u8 pas[0][0x40];
6745};
6746
6747struct mlx5_ifc_create_psv_out_bits {
6748 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750
6751 u8 syndrome[0x20];
6752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756 u8 psv0_index[0x18];
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759 u8 psv1_index[0x18];
6760
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762 u8 psv2_index[0x18];
6763
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765 u8 psv3_index[0x18];
6766};
6767
6768struct mlx5_ifc_create_psv_in_bits {
6769 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773 u8 op_mod[0x10];
6774
6775 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777 u8 pd[0x18];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780};
6781
6782struct mlx5_ifc_create_mkey_out_bits {
6783 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
6786 u8 syndrome[0x20];
6787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789 u8 mkey_index[0x18];
6790
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792};
6793
6794struct mlx5_ifc_create_mkey_in_bits {
6795 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799 u8 op_mod[0x10];
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006804 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006805
6806 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809
6810 u8 translations_octword_actual_size[0x20];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
6814 u8 klm_pas_mtt[0][0x20];
6815};
6816
6817struct mlx5_ifc_create_flow_table_out_bits {
6818 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
6821 u8 syndrome[0x20];
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824 u8 table_id[0x18];
6825
Matan Barakb4ff3a32016-02-09 14:57:42 +02006826 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006827};
6828
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006829struct mlx5_ifc_flow_table_context_bits {
6830 u8 encap_en[0x1];
6831 u8 decap_en[0x1];
6832 u8 reserved_at_2[0x2];
6833 u8 table_miss_action[0x4];
6834 u8 level[0x8];
6835 u8 reserved_at_10[0x8];
6836 u8 log_size[0x8];
6837
6838 u8 reserved_at_20[0x8];
6839 u8 table_miss_id[0x18];
6840
6841 u8 reserved_at_40[0x8];
6842 u8 lag_master_next_table_id[0x18];
6843
6844 u8 reserved_at_60[0xe0];
6845};
6846
Saeed Mahameede2816822015-05-28 22:28:40 +03006847struct mlx5_ifc_create_flow_table_in_bits {
6848 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852 u8 op_mod[0x10];
6853
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006854 u8 other_vport[0x1];
6855 u8 reserved_at_41[0xf];
6856 u8 vport_number[0x10];
6857
6858 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859
6860 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006865 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006866};
6867
6868struct mlx5_ifc_create_flow_group_out_bits {
6869 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871
6872 u8 syndrome[0x20];
6873
Matan Barakb4ff3a32016-02-09 14:57:42 +02006874 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006875 u8 group_id[0x18];
6876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878};
6879
6880enum {
6881 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6882 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6883 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6884};
6885
6886struct mlx5_ifc_create_flow_group_in_bits {
6887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006889
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891 u8 op_mod[0x10];
6892
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006893 u8 other_vport[0x1];
6894 u8 reserved_at_41[0xf];
6895 u8 vport_number[0x10];
6896
6897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898
6899 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006900 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006901
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903 u8 table_id[0x18];
6904
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906
6907 u8 start_flow_index[0x20];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
6911 u8 end_flow_index[0x20];
6912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916 u8 match_criteria_enable[0x8];
6917
6918 struct mlx5_ifc_fte_match_param_bits match_criteria;
6919
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921};
6922
6923struct mlx5_ifc_create_eq_out_bits {
6924 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926
6927 u8 syndrome[0x20];
6928
Matan Barakb4ff3a32016-02-09 14:57:42 +02006929 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006930 u8 eq_number[0x8];
6931
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933};
6934
6935struct mlx5_ifc_create_eq_in_bits {
6936 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940 u8 op_mod[0x10];
6941
Matan Barakb4ff3a32016-02-09 14:57:42 +02006942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006943
6944 struct mlx5_ifc_eqc_bits eq_context_entry;
6945
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
6948 u8 event_bitmask[0x40];
6949
Matan Barakb4ff3a32016-02-09 14:57:42 +02006950 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006951
6952 u8 pas[0][0x40];
6953};
6954
6955struct mlx5_ifc_create_dct_out_bits {
6956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958
6959 u8 syndrome[0x20];
6960
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962 u8 dctn[0x18];
6963
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965};
6966
6967struct mlx5_ifc_create_dct_in_bits {
6968 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972 u8 op_mod[0x10];
6973
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975
6976 struct mlx5_ifc_dctc_bits dct_context_entry;
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979};
6980
6981struct mlx5_ifc_create_cq_out_bits {
6982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 syndrome[0x20];
6986
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988 u8 cqn[0x18];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991};
6992
6993struct mlx5_ifc_create_cq_in_bits {
6994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 op_mod[0x10];
6999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001
7002 struct mlx5_ifc_cqc_bits cq_context;
7003
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
7006 u8 pas[0][0x40];
7007};
7008
7009struct mlx5_ifc_config_int_moderation_out_bits {
7010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
7013 u8 syndrome[0x20];
7014
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016 u8 min_delay[0xc];
7017 u8 int_vector[0x10];
7018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020};
7021
7022enum {
7023 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7024 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7025};
7026
7027struct mlx5_ifc_config_int_moderation_in_bits {
7028 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 op_mod[0x10];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035 u8 min_delay[0xc];
7036 u8 int_vector[0x10];
7037
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039};
7040
7041struct mlx5_ifc_attach_to_mcg_out_bits {
7042 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044
7045 u8 syndrome[0x20];
7046
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048};
7049
7050struct mlx5_ifc_attach_to_mcg_in_bits {
7051 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055 u8 op_mod[0x10];
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 qpn[0x18];
7059
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061
7062 u8 multicast_gid[16][0x8];
7063};
7064
Saeed Mahameed74862162016-06-09 15:11:34 +03007065struct mlx5_ifc_arm_xrq_out_bits {
7066 u8 status[0x8];
7067 u8 reserved_at_8[0x18];
7068
7069 u8 syndrome[0x20];
7070
7071 u8 reserved_at_40[0x40];
7072};
7073
7074struct mlx5_ifc_arm_xrq_in_bits {
7075 u8 opcode[0x10];
7076 u8 reserved_at_10[0x10];
7077
7078 u8 reserved_at_20[0x10];
7079 u8 op_mod[0x10];
7080
7081 u8 reserved_at_40[0x8];
7082 u8 xrqn[0x18];
7083
7084 u8 reserved_at_60[0x10];
7085 u8 lwm[0x10];
7086};
7087
Saeed Mahameede2816822015-05-28 22:28:40 +03007088struct mlx5_ifc_arm_xrc_srq_out_bits {
7089 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091
7092 u8 syndrome[0x20];
7093
Matan Barakb4ff3a32016-02-09 14:57:42 +02007094 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007095};
7096
7097enum {
7098 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7099};
7100
7101struct mlx5_ifc_arm_xrc_srq_in_bits {
7102 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106 u8 op_mod[0x10];
7107
Matan Barakb4ff3a32016-02-09 14:57:42 +02007108 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007109 u8 xrc_srqn[0x18];
7110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112 u8 lwm[0x10];
7113};
7114
7115struct mlx5_ifc_arm_rq_out_bits {
7116 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118
7119 u8 syndrome[0x20];
7120
Matan Barakb4ff3a32016-02-09 14:57:42 +02007121 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007122};
7123
7124enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007125 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7126 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007127};
7128
7129struct mlx5_ifc_arm_rq_in_bits {
7130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134 u8 op_mod[0x10];
7135
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137 u8 srq_number[0x18];
7138
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140 u8 lwm[0x10];
7141};
7142
7143struct mlx5_ifc_arm_dct_out_bits {
7144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007146
7147 u8 syndrome[0x20];
7148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150};
7151
7152struct mlx5_ifc_arm_dct_in_bits {
7153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157 u8 op_mod[0x10];
7158
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160 u8 dct_number[0x18];
7161
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163};
7164
7165struct mlx5_ifc_alloc_xrcd_out_bits {
7166 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007168
7169 u8 syndrome[0x20];
7170
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172 u8 xrcd[0x18];
7173
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175};
7176
7177struct mlx5_ifc_alloc_xrcd_in_bits {
7178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182 u8 op_mod[0x10];
7183
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185};
7186
7187struct mlx5_ifc_alloc_uar_out_bits {
7188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007190
7191 u8 syndrome[0x20];
7192
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194 u8 uar[0x18];
7195
Matan Barakb4ff3a32016-02-09 14:57:42 +02007196 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007197};
7198
7199struct mlx5_ifc_alloc_uar_in_bits {
7200 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204 u8 op_mod[0x10];
7205
Matan Barakb4ff3a32016-02-09 14:57:42 +02007206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007207};
7208
7209struct mlx5_ifc_alloc_transport_domain_out_bits {
7210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212
7213 u8 syndrome[0x20];
7214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216 u8 transport_domain[0x18];
7217
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219};
7220
7221struct mlx5_ifc_alloc_transport_domain_in_bits {
7222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226 u8 op_mod[0x10];
7227
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229};
7230
7231struct mlx5_ifc_alloc_q_counter_out_bits {
7232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234
7235 u8 syndrome[0x20];
7236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238 u8 counter_set_id[0x8];
7239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241};
7242
7243struct mlx5_ifc_alloc_q_counter_in_bits {
7244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007246
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248 u8 op_mod[0x10];
7249
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251};
7252
7253struct mlx5_ifc_alloc_pd_out_bits {
7254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256
7257 u8 syndrome[0x20];
7258
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260 u8 pd[0x18];
7261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263};
7264
7265struct mlx5_ifc_alloc_pd_in_bits {
7266 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268
Matan Barakb4ff3a32016-02-09 14:57:42 +02007269 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007270 u8 op_mod[0x10];
7271
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273};
7274
Amir Vadai9dc0b282016-05-13 12:55:39 +00007275struct mlx5_ifc_alloc_flow_counter_out_bits {
7276 u8 status[0x8];
7277 u8 reserved_at_8[0x18];
7278
7279 u8 syndrome[0x20];
7280
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007281 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007282
7283 u8 reserved_at_60[0x20];
7284};
7285
7286struct mlx5_ifc_alloc_flow_counter_in_bits {
7287 u8 opcode[0x10];
7288 u8 reserved_at_10[0x10];
7289
7290 u8 reserved_at_20[0x10];
7291 u8 op_mod[0x10];
7292
7293 u8 reserved_at_40[0x40];
7294};
7295
Saeed Mahameede2816822015-05-28 22:28:40 +03007296struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7297 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299
7300 u8 syndrome[0x20];
7301
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303};
7304
7305struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7306 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310 u8 op_mod[0x10];
7311
Matan Barakb4ff3a32016-02-09 14:57:42 +02007312 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007313
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315 u8 vxlan_udp_port[0x10];
7316};
7317
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007318struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007319 u8 status[0x8];
7320 u8 reserved_at_8[0x18];
7321
7322 u8 syndrome[0x20];
7323
7324 u8 reserved_at_40[0x40];
7325};
7326
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007327struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007328 u8 opcode[0x10];
7329 u8 reserved_at_10[0x10];
7330
7331 u8 reserved_at_20[0x10];
7332 u8 op_mod[0x10];
7333
7334 u8 reserved_at_40[0x10];
7335 u8 rate_limit_index[0x10];
7336
7337 u8 reserved_at_60[0x20];
7338
7339 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007340
Bodong Wang05d3ac92018-03-19 15:10:29 +02007341 u8 burst_upper_bound[0x20];
7342
7343 u8 reserved_at_c0[0x10];
7344 u8 typical_packet_size[0x10];
7345
7346 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007347};
7348
Saeed Mahameede2816822015-05-28 22:28:40 +03007349struct mlx5_ifc_access_register_out_bits {
7350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352
7353 u8 syndrome[0x20];
7354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356
7357 u8 register_data[0][0x20];
7358};
7359
7360enum {
7361 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7362 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7363};
7364
7365struct mlx5_ifc_access_register_in_bits {
7366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 op_mod[0x10];
7371
Matan Barakb4ff3a32016-02-09 14:57:42 +02007372 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007373 u8 register_id[0x10];
7374
7375 u8 argument[0x20];
7376
7377 u8 register_data[0][0x20];
7378};
7379
7380struct mlx5_ifc_sltp_reg_bits {
7381 u8 status[0x4];
7382 u8 version[0x4];
7383 u8 local_port[0x8];
7384 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392 u8 polarity[0x1];
7393 u8 ob_tap0[0x8];
7394 u8 ob_tap1[0x8];
7395 u8 ob_tap2[0x8];
7396
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 ob_preemp_mode[0x4];
7399 u8 ob_reg[0x8];
7400 u8 ob_bias[0x8];
7401
Matan Barakb4ff3a32016-02-09 14:57:42 +02007402 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007403};
7404
7405struct mlx5_ifc_slrg_reg_bits {
7406 u8 status[0x4];
7407 u8 version[0x4];
7408 u8 local_port[0x8];
7409 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413
7414 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007415 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007416 u8 grade_lane_speed[0x4];
7417
7418 u8 grade_version[0x8];
7419 u8 grade[0x18];
7420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422 u8 height_grade_type[0x4];
7423 u8 height_grade[0x18];
7424
7425 u8 height_dz[0x10];
7426 u8 height_dv[0x10];
7427
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429 u8 height_sigma[0x10];
7430
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434 u8 phase_grade_type[0x4];
7435 u8 phase_grade[0x18];
7436
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 phase_eo_neg[0x8];
7441
7442 u8 ffe_set_tested[0x10];
7443 u8 test_errors_per_lane[0x10];
7444};
7445
7446struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007449 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 vl_hw_cap[0x4];
7453
Matan Barakb4ff3a32016-02-09 14:57:42 +02007454 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007455 u8 vl_admin[0x4];
7456
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458 u8 vl_operational[0x4];
7459};
7460
7461struct mlx5_ifc_pude_reg_bits {
7462 u8 swid[0x8];
7463 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467 u8 oper_status[0x4];
7468
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470};
7471
7472struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007473 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007474 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007475 u8 an_disable_cap[0x1];
7476 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007477 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 proto_mask[0x3];
7480
Saeed Mahameed74862162016-06-09 15:11:34 +03007481 u8 an_status[0x4];
7482 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483
7484 u8 eth_proto_capability[0x20];
7485
7486 u8 ib_link_width_capability[0x10];
7487 u8 ib_proto_capability[0x10];
7488
Matan Barakb4ff3a32016-02-09 14:57:42 +02007489 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007490
7491 u8 eth_proto_admin[0x20];
7492
7493 u8 ib_link_width_admin[0x10];
7494 u8 ib_proto_admin[0x10];
7495
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497
7498 u8 eth_proto_oper[0x20];
7499
7500 u8 ib_link_width_oper[0x10];
7501 u8 ib_proto_oper[0x10];
7502
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007503 u8 reserved_at_160[0x1c];
7504 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505
7506 u8 eth_proto_lp_advertise[0x20];
7507
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509};
7510
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007511struct mlx5_ifc_mlcr_reg_bits {
7512 u8 reserved_at_0[0x8];
7513 u8 local_port[0x8];
7514 u8 reserved_at_10[0x20];
7515
7516 u8 beacon_duration[0x10];
7517 u8 reserved_at_40[0x10];
7518
7519 u8 beacon_remain[0x10];
7520};
7521
Saeed Mahameede2816822015-05-28 22:28:40 +03007522struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524
7525 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527 u8 repetitions_mode[0x4];
7528 u8 num_of_repetitions[0x8];
7529
7530 u8 grade_version[0x8];
7531 u8 height_grade_type[0x4];
7532 u8 phase_grade_type[0x4];
7533 u8 height_grade_weight[0x8];
7534 u8 phase_grade_weight[0x8];
7535
7536 u8 gisim_measure_bits[0x10];
7537 u8 adaptive_tap_measure_bits[0x10];
7538
7539 u8 ber_bath_high_error_threshold[0x10];
7540 u8 ber_bath_mid_error_threshold[0x10];
7541
7542 u8 ber_bath_low_error_threshold[0x10];
7543 u8 one_ratio_high_threshold[0x10];
7544
7545 u8 one_ratio_high_mid_threshold[0x10];
7546 u8 one_ratio_low_mid_threshold[0x10];
7547
7548 u8 one_ratio_low_threshold[0x10];
7549 u8 ndeo_error_threshold[0x10];
7550
7551 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553 u8 mix90_phase_for_voltage_bath[0x8];
7554
7555 u8 mixer_offset_start[0x10];
7556 u8 mixer_offset_end[0x10];
7557
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559 u8 ber_test_time[0xb];
7560};
7561
7562struct mlx5_ifc_pspa_reg_bits {
7563 u8 swid[0x8];
7564 u8 local_port[0x8];
7565 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007566 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007567
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569};
7570
7571struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007572 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007573 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 mode[0x2];
7578
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580
Matan Barakb4ff3a32016-02-09 14:57:42 +02007581 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007582 u8 min_threshold[0x10];
7583
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585 u8 max_threshold[0x10];
7586
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588 u8 mark_probability_denominator[0x10];
7589
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591};
7592
7593struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601 u8 wrps_admin[0x4];
7602
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604 u8 wrps_status[0x4];
7605
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 down_threshold[0x8];
7610
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 srps_admin[0x4];
7615
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 srps_status[0x4];
7618
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620};
7621
7622struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 lb_en[0x8];
7631};
7632
7633struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639
7640 u8 port_profile_mode[0x8];
7641 u8 static_port_profile[0x8];
7642 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644
7645 u8 retransmission_active[0x8];
7646 u8 fec_mode_active[0x18];
7647
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649};
7650
7651struct mlx5_ifc_ppcnt_reg_bits {
7652 u8 swid[0x8];
7653 u8 local_port[0x8];
7654 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656 u8 grp[0x6];
7657
7658 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660 u8 prio_tc[0x3];
7661
7662 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7663};
7664
Gal Pressman8ed1a632016-11-17 13:46:01 +02007665struct mlx5_ifc_mpcnt_reg_bits {
7666 u8 reserved_at_0[0x8];
7667 u8 pcie_index[0x8];
7668 u8 reserved_at_10[0xa];
7669 u8 grp[0x6];
7670
7671 u8 clr[0x1];
7672 u8 reserved_at_21[0x1f];
7673
7674 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7675};
7676
Saeed Mahameede2816822015-05-28 22:28:40 +03007677struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007678 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007679 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 local_port[0x8];
7682 u8 mac_47_32[0x10];
7683
7684 u8 mac_31_0[0x20];
7685
Matan Barakb4ff3a32016-02-09 14:57:42 +02007686 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007687};
7688
7689struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693
7694 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696
7697 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699
7700 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702};
7703
7704struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 attenuation_5g[0x8];
7711
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713 u8 attenuation_7g[0x8];
7714
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 attenuation_12g[0x8];
7717};
7718
7719struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007720 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007721 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723 u8 module_status[0x4];
7724
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726};
7727
7728struct mlx5_ifc_pmpc_reg_bits {
7729 u8 module_state_updated[32][0x8];
7730};
7731
7732struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 mlpn_status[0x4];
7735 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737
7738 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740};
7741
7742struct mlx5_ifc_pmlp_reg_bits {
7743 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 width[0x8];
7748
7749 u8 lane0_module_mapping[0x20];
7750
7751 u8 lane1_module_mapping[0x20];
7752
7753 u8 lane2_module_mapping[0x20];
7754
7755 u8 lane3_module_mapping[0x20];
7756
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758};
7759
7760struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 oper_status[0x4];
7767
7768 u8 ase[0x1];
7769 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007770 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007771 u8 e[0x2];
7772
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774};
7775
7776struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782
Matan Barakb4ff3a32016-02-09 14:57:42 +02007783 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007784 u8 lane_speed[0x10];
7785
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787 u8 lpbf[0x1];
7788 u8 fec_mode_policy[0x8];
7789
7790 u8 retransmission_capability[0x8];
7791 u8 fec_mode_capability[0x18];
7792
7793 u8 retransmission_support_admin[0x8];
7794 u8 fec_mode_support_admin[0x18];
7795
7796 u8 retransmission_request_admin[0x8];
7797 u8 fec_mode_request_admin[0x18];
7798
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800};
7801
7802struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007803 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007804 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806 u8 ib_port[0x8];
7807
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809};
7810
7811struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 lbf_mode[0x3];
7816
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818};
7819
7820struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007821 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007822 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824
7825 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007828 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007829};
7830
7831struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837
7838 u8 port_filter[8][0x20];
7839
7840 u8 port_filter_update_en[8][0x20];
7841};
7842
7843struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847
7848 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007851 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007852 u8 prio_mask_rx[0x8];
7853
7854 u8 pptx[0x1];
7855 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859
7860 u8 pprx[0x1];
7861 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867};
7868
7869struct mlx5_ifc_pelc_reg_bits {
7870 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874
7875 u8 op_admin[0x8];
7876 u8 op_capability[0x8];
7877 u8 op_request[0x8];
7878 u8 op_active[0x8];
7879
7880 u8 admin[0x40];
7881
7882 u8 capability[0x40];
7883
7884 u8 request[0x40];
7885
7886 u8 active[0x40];
7887
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889};
7890
7891struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899
Matan Barakb4ff3a32016-02-09 14:57:42 +02007900 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007901 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903 u8 error_type[0x8];
7904};
7905
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007906struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007907 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007908
Gal Pressman2dba0792017-06-18 14:56:45 +03007909 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007910 u8 ptys_connector_type[0x1];
7911 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007912 u8 ppcnt_discard_group[0x1];
7913 u8 ppcnt_statistical_group[0x1];
7914};
7915
7916struct mlx5_ifc_pcam_reg_bits {
7917 u8 reserved_at_0[0x8];
7918 u8 feature_group[0x8];
7919 u8 reserved_at_10[0x8];
7920 u8 access_reg_group[0x8];
7921
7922 u8 reserved_at_20[0x20];
7923
7924 union {
7925 u8 reserved_at_0[0x80];
7926 } port_access_reg_cap_mask;
7927
7928 u8 reserved_at_c0[0x80];
7929
7930 union {
7931 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7932 u8 reserved_at_0[0x80];
7933 } feature_cap_mask;
7934
7935 u8 reserved_at_1c0[0xc0];
7936};
7937
7938struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007939 u8 reserved_at_0[0x7b];
7940 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007941 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007942 u8 mtpps_enh_out_per_adj[0x1];
7943 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007944 u8 pcie_performance_group[0x1];
7945};
7946
Or Gerlitz0ab87742017-06-11 15:25:38 +03007947struct mlx5_ifc_mcam_access_reg_bits {
7948 u8 reserved_at_0[0x1c];
7949 u8 mcda[0x1];
7950 u8 mcc[0x1];
7951 u8 mcqi[0x1];
7952 u8 reserved_at_1f[0x1];
7953
7954 u8 regs_95_to_64[0x20];
7955 u8 regs_63_to_32[0x20];
7956 u8 regs_31_to_0[0x20];
7957};
7958
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007959struct mlx5_ifc_mcam_reg_bits {
7960 u8 reserved_at_0[0x8];
7961 u8 feature_group[0x8];
7962 u8 reserved_at_10[0x8];
7963 u8 access_reg_group[0x8];
7964
7965 u8 reserved_at_20[0x20];
7966
7967 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007968 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007969 u8 reserved_at_0[0x80];
7970 } mng_access_reg_cap_mask;
7971
7972 u8 reserved_at_c0[0x80];
7973
7974 union {
7975 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7976 u8 reserved_at_0[0x80];
7977 } mng_feature_cap_mask;
7978
7979 u8 reserved_at_1c0[0x80];
7980};
7981
Huy Nguyenc02762e2017-07-18 16:03:17 -05007982struct mlx5_ifc_qcam_access_reg_cap_mask {
7983 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7984 u8 qpdpm[0x1];
7985 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7986 u8 qdpm[0x1];
7987 u8 qpts[0x1];
7988 u8 qcap[0x1];
7989 u8 qcam_access_reg_cap_mask_0[0x1];
7990};
7991
7992struct mlx5_ifc_qcam_qos_feature_cap_mask {
7993 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7994 u8 qpts_trust_both[0x1];
7995};
7996
7997struct mlx5_ifc_qcam_reg_bits {
7998 u8 reserved_at_0[0x8];
7999 u8 feature_group[0x8];
8000 u8 reserved_at_10[0x8];
8001 u8 access_reg_group[0x8];
8002 u8 reserved_at_20[0x20];
8003
8004 union {
8005 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8006 u8 reserved_at_0[0x80];
8007 } qos_access_reg_cap_mask;
8008
8009 u8 reserved_at_c0[0x80];
8010
8011 union {
8012 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8013 u8 reserved_at_0[0x80];
8014 } qos_feature_cap_mask;
8015
8016 u8 reserved_at_1c0[0x80];
8017};
8018
Saeed Mahameede2816822015-05-28 22:28:40 +03008019struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008020 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008021 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023
8024 u8 port_capability_mask[4][0x20];
8025};
8026
8027struct mlx5_ifc_paos_reg_bits {
8028 u8 swid[0x8];
8029 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008030 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008031 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008032 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008033 u8 oper_status[0x4];
8034
8035 u8 ase[0x1];
8036 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008037 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008038 u8 e[0x2];
8039
Matan Barakb4ff3a32016-02-09 14:57:42 +02008040 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008041};
8042
8043struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008044 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008045 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008046 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008047 u8 opamp_group_type[0x4];
8048
8049 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008050 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008051 u8 num_of_indices[0xc];
8052
8053 u8 index_data[18][0x10];
8054};
8055
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008056struct mlx5_ifc_pcmr_reg_bits {
8057 u8 reserved_at_0[0x8];
8058 u8 local_port[0x8];
8059 u8 reserved_at_10[0x2e];
8060 u8 fcs_cap[0x1];
8061 u8 reserved_at_3f[0x1f];
8062 u8 fcs_chk[0x1];
8063 u8 reserved_at_5f[0x1];
8064};
8065
Saeed Mahameede2816822015-05-28 22:28:40 +03008066struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008067 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008068 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008069 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008070 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072 u8 module[0x8];
8073};
8074
8075struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077 u8 lossy[0x1];
8078 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008079 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008080 u8 size[0xc];
8081
8082 u8 xoff_threshold[0x10];
8083 u8 xon_threshold[0x10];
8084};
8085
8086struct mlx5_ifc_set_node_in_bits {
8087 u8 node_description[64][0x8];
8088};
8089
8090struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008091 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008092 u8 power_settings_level[0x8];
8093
Matan Barakb4ff3a32016-02-09 14:57:42 +02008094 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008095};
8096
8097struct mlx5_ifc_register_host_endianness_bits {
8098 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008099 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008100
Matan Barakb4ff3a32016-02-09 14:57:42 +02008101 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008102};
8103
8104struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008105 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008106
8107 u8 mkey[0x20];
8108
8109 u8 addressh_63_32[0x20];
8110
8111 u8 addressl_31_0[0x20];
8112};
8113
8114struct mlx5_ifc_ud_adrs_vector_bits {
8115 u8 dc_key[0x40];
8116
8117 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008118 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008119 u8 destination_qp_dct[0x18];
8120
8121 u8 static_rate[0x4];
8122 u8 sl_eth_prio[0x4];
8123 u8 fl[0x1];
8124 u8 mlid[0x7];
8125 u8 rlid_udp_sport[0x10];
8126
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008128
8129 u8 rmac_47_16[0x20];
8130
8131 u8 rmac_15_0[0x10];
8132 u8 tclass[0x8];
8133 u8 hop_limit[0x8];
8134
Matan Barakb4ff3a32016-02-09 14:57:42 +02008135 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008136 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008137 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008138 u8 src_addr_index[0x8];
8139 u8 flow_label[0x14];
8140
8141 u8 rgid_rip[16][0x8];
8142};
8143
8144struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008145 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008146 u8 function_id[0x10];
8147
8148 u8 num_pages[0x20];
8149
Matan Barakb4ff3a32016-02-09 14:57:42 +02008150 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008151};
8152
8153struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008154 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008155 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008156 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008157 u8 event_sub_type[0x8];
8158
Matan Barakb4ff3a32016-02-09 14:57:42 +02008159 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008160
8161 union mlx5_ifc_event_auto_bits event_data;
8162
Matan Barakb4ff3a32016-02-09 14:57:42 +02008163 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008164 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008165 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008166 u8 owner[0x1];
8167};
8168
8169enum {
8170 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8171};
8172
8173struct mlx5_ifc_cmd_queue_entry_bits {
8174 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008175 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008176
8177 u8 input_length[0x20];
8178
8179 u8 input_mailbox_pointer_63_32[0x20];
8180
8181 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008182 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008183
8184 u8 command_input_inline_data[16][0x8];
8185
8186 u8 command_output_inline_data[16][0x8];
8187
8188 u8 output_mailbox_pointer_63_32[0x20];
8189
8190 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008191 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008192
8193 u8 output_length[0x20];
8194
8195 u8 token[0x8];
8196 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008197 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008198 u8 status[0x7];
8199 u8 ownership[0x1];
8200};
8201
8202struct mlx5_ifc_cmd_out_bits {
8203 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008204 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008205
8206 u8 syndrome[0x20];
8207
8208 u8 command_output[0x20];
8209};
8210
8211struct mlx5_ifc_cmd_in_bits {
8212 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008213 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008214
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216 u8 op_mod[0x10];
8217
8218 u8 command[0][0x20];
8219};
8220
8221struct mlx5_ifc_cmd_if_box_bits {
8222 u8 mailbox_data[512][0x8];
8223
Matan Barakb4ff3a32016-02-09 14:57:42 +02008224 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008225
8226 u8 next_pointer_63_32[0x20];
8227
8228 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008229 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008230
8231 u8 block_number[0x20];
8232
Matan Barakb4ff3a32016-02-09 14:57:42 +02008233 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008234 u8 token[0x8];
8235 u8 ctrl_signature[0x8];
8236 u8 signature[0x8];
8237};
8238
8239struct mlx5_ifc_mtt_bits {
8240 u8 ptag_63_32[0x20];
8241
8242 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008243 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008244 u8 wr_en[0x1];
8245 u8 rd_en[0x1];
8246};
8247
Tariq Toukan928cfe82016-02-22 18:17:29 +02008248struct mlx5_ifc_query_wol_rol_out_bits {
8249 u8 status[0x8];
8250 u8 reserved_at_8[0x18];
8251
8252 u8 syndrome[0x20];
8253
8254 u8 reserved_at_40[0x10];
8255 u8 rol_mode[0x8];
8256 u8 wol_mode[0x8];
8257
8258 u8 reserved_at_60[0x20];
8259};
8260
8261struct mlx5_ifc_query_wol_rol_in_bits {
8262 u8 opcode[0x10];
8263 u8 reserved_at_10[0x10];
8264
8265 u8 reserved_at_20[0x10];
8266 u8 op_mod[0x10];
8267
8268 u8 reserved_at_40[0x40];
8269};
8270
8271struct mlx5_ifc_set_wol_rol_out_bits {
8272 u8 status[0x8];
8273 u8 reserved_at_8[0x18];
8274
8275 u8 syndrome[0x20];
8276
8277 u8 reserved_at_40[0x40];
8278};
8279
8280struct mlx5_ifc_set_wol_rol_in_bits {
8281 u8 opcode[0x10];
8282 u8 reserved_at_10[0x10];
8283
8284 u8 reserved_at_20[0x10];
8285 u8 op_mod[0x10];
8286
8287 u8 rol_mode_valid[0x1];
8288 u8 wol_mode_valid[0x1];
8289 u8 reserved_at_42[0xe];
8290 u8 rol_mode[0x8];
8291 u8 wol_mode[0x8];
8292
8293 u8 reserved_at_60[0x20];
8294};
8295
Saeed Mahameede2816822015-05-28 22:28:40 +03008296enum {
8297 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8298 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8299 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8300};
8301
8302enum {
8303 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8304 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8305 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8306};
8307
8308enum {
8309 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8310 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8311 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8312 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8313 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8314 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8315 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8316 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8317 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8318 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8319 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8320};
8321
8322struct mlx5_ifc_initial_seg_bits {
8323 u8 fw_rev_minor[0x10];
8324 u8 fw_rev_major[0x10];
8325
8326 u8 cmd_interface_rev[0x10];
8327 u8 fw_rev_subminor[0x10];
8328
Matan Barakb4ff3a32016-02-09 14:57:42 +02008329 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008330
8331 u8 cmdq_phy_addr_63_32[0x20];
8332
8333 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008334 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008335 u8 nic_interface[0x2];
8336 u8 log_cmdq_size[0x4];
8337 u8 log_cmdq_stride[0x4];
8338
8339 u8 command_doorbell_vector[0x20];
8340
Matan Barakb4ff3a32016-02-09 14:57:42 +02008341 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008342
8343 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008344 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008345 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008346 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008347
8348 struct mlx5_ifc_health_buffer_bits health_buffer;
8349
8350 u8 no_dram_nic_offset[0x20];
8351
Matan Barakb4ff3a32016-02-09 14:57:42 +02008352 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008353
Matan Barakb4ff3a32016-02-09 14:57:42 +02008354 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008355 u8 clear_int[0x1];
8356
8357 u8 health_syndrome[0x8];
8358 u8 health_counter[0x18];
8359
Matan Barakb4ff3a32016-02-09 14:57:42 +02008360 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008361};
8362
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008363struct mlx5_ifc_mtpps_reg_bits {
8364 u8 reserved_at_0[0xc];
8365 u8 cap_number_of_pps_pins[0x4];
8366 u8 reserved_at_10[0x4];
8367 u8 cap_max_num_of_pps_in_pins[0x4];
8368 u8 reserved_at_18[0x4];
8369 u8 cap_max_num_of_pps_out_pins[0x4];
8370
8371 u8 reserved_at_20[0x24];
8372 u8 cap_pin_3_mode[0x4];
8373 u8 reserved_at_48[0x4];
8374 u8 cap_pin_2_mode[0x4];
8375 u8 reserved_at_50[0x4];
8376 u8 cap_pin_1_mode[0x4];
8377 u8 reserved_at_58[0x4];
8378 u8 cap_pin_0_mode[0x4];
8379
8380 u8 reserved_at_60[0x4];
8381 u8 cap_pin_7_mode[0x4];
8382 u8 reserved_at_68[0x4];
8383 u8 cap_pin_6_mode[0x4];
8384 u8 reserved_at_70[0x4];
8385 u8 cap_pin_5_mode[0x4];
8386 u8 reserved_at_78[0x4];
8387 u8 cap_pin_4_mode[0x4];
8388
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008389 u8 field_select[0x20];
8390 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008391
8392 u8 enable[0x1];
8393 u8 reserved_at_101[0xb];
8394 u8 pattern[0x4];
8395 u8 reserved_at_110[0x4];
8396 u8 pin_mode[0x4];
8397 u8 pin[0x8];
8398
8399 u8 reserved_at_120[0x20];
8400
8401 u8 time_stamp[0x40];
8402
8403 u8 out_pulse_duration[0x10];
8404 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008405 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008406
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008407 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008408};
8409
8410struct mlx5_ifc_mtppse_reg_bits {
8411 u8 reserved_at_0[0x18];
8412 u8 pin[0x8];
8413 u8 event_arm[0x1];
8414 u8 reserved_at_21[0x1b];
8415 u8 event_generation_mode[0x4];
8416 u8 reserved_at_40[0x40];
8417};
8418
Or Gerlitz47176282017-04-18 13:35:39 +03008419struct mlx5_ifc_mcqi_cap_bits {
8420 u8 supported_info_bitmask[0x20];
8421
8422 u8 component_size[0x20];
8423
8424 u8 max_component_size[0x20];
8425
8426 u8 log_mcda_word_size[0x4];
8427 u8 reserved_at_64[0xc];
8428 u8 mcda_max_write_size[0x10];
8429
8430 u8 rd_en[0x1];
8431 u8 reserved_at_81[0x1];
8432 u8 match_chip_id[0x1];
8433 u8 match_psid[0x1];
8434 u8 check_user_timestamp[0x1];
8435 u8 match_base_guid_mac[0x1];
8436 u8 reserved_at_86[0x1a];
8437};
8438
8439struct mlx5_ifc_mcqi_reg_bits {
8440 u8 read_pending_component[0x1];
8441 u8 reserved_at_1[0xf];
8442 u8 component_index[0x10];
8443
8444 u8 reserved_at_20[0x20];
8445
8446 u8 reserved_at_40[0x1b];
8447 u8 info_type[0x5];
8448
8449 u8 info_size[0x20];
8450
8451 u8 offset[0x20];
8452
8453 u8 reserved_at_a0[0x10];
8454 u8 data_size[0x10];
8455
8456 u8 data[0][0x20];
8457};
8458
8459struct mlx5_ifc_mcc_reg_bits {
8460 u8 reserved_at_0[0x4];
8461 u8 time_elapsed_since_last_cmd[0xc];
8462 u8 reserved_at_10[0x8];
8463 u8 instruction[0x8];
8464
8465 u8 reserved_at_20[0x10];
8466 u8 component_index[0x10];
8467
8468 u8 reserved_at_40[0x8];
8469 u8 update_handle[0x18];
8470
8471 u8 handle_owner_type[0x4];
8472 u8 handle_owner_host_id[0x4];
8473 u8 reserved_at_68[0x1];
8474 u8 control_progress[0x7];
8475 u8 error_code[0x8];
8476 u8 reserved_at_78[0x4];
8477 u8 control_state[0x4];
8478
8479 u8 component_size[0x20];
8480
8481 u8 reserved_at_a0[0x60];
8482};
8483
8484struct mlx5_ifc_mcda_reg_bits {
8485 u8 reserved_at_0[0x8];
8486 u8 update_handle[0x18];
8487
8488 u8 offset[0x20];
8489
8490 u8 reserved_at_40[0x10];
8491 u8 size[0x10];
8492
8493 u8 reserved_at_60[0x20];
8494
8495 u8 data[0][0x20];
8496};
8497
Saeed Mahameede2816822015-05-28 22:28:40 +03008498union mlx5_ifc_ports_control_registers_document_bits {
8499 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8500 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8501 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8502 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8503 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8504 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8505 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8506 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8507 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8508 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8509 struct mlx5_ifc_paos_reg_bits paos_reg;
8510 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8511 struct mlx5_ifc_peir_reg_bits peir_reg;
8512 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8513 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008514 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008515 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8516 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8517 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8518 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8519 struct mlx5_ifc_plib_reg_bits plib_reg;
8520 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8521 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8522 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8523 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8524 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8525 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8526 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8527 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8528 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8529 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008530 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008531 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8532 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8533 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8534 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8535 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8536 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8537 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008538 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008539 struct mlx5_ifc_pude_reg_bits pude_reg;
8540 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8541 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8542 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008543 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8544 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008545 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008546 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8547 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008548 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8549 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8550 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008551 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008552};
8553
8554union mlx5_ifc_debug_enhancements_document_bits {
8555 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008556 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008557};
8558
8559union mlx5_ifc_uplink_pci_interface_document_bits {
8560 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008561 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008562};
8563
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008564struct mlx5_ifc_set_flow_table_root_out_bits {
8565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008566 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008567
8568 u8 syndrome[0x20];
8569
Matan Barakb4ff3a32016-02-09 14:57:42 +02008570 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008571};
8572
8573struct mlx5_ifc_set_flow_table_root_in_bits {
8574 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008575 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008576
Matan Barakb4ff3a32016-02-09 14:57:42 +02008577 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008578 u8 op_mod[0x10];
8579
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008580 u8 other_vport[0x1];
8581 u8 reserved_at_41[0xf];
8582 u8 vport_number[0x10];
8583
8584 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008585
8586 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008587 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008588
Matan Barakb4ff3a32016-02-09 14:57:42 +02008589 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008590 u8 table_id[0x18];
8591
Erez Shitrit500a3d02017-04-13 06:36:51 +03008592 u8 reserved_at_c0[0x8];
8593 u8 underlay_qpn[0x18];
8594 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008595};
8596
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008597enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008598 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8599 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008600};
8601
8602struct mlx5_ifc_modify_flow_table_out_bits {
8603 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008604 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008605
8606 u8 syndrome[0x20];
8607
Matan Barakb4ff3a32016-02-09 14:57:42 +02008608 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008609};
8610
8611struct mlx5_ifc_modify_flow_table_in_bits {
8612 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008613 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008614
Matan Barakb4ff3a32016-02-09 14:57:42 +02008615 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008616 u8 op_mod[0x10];
8617
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008618 u8 other_vport[0x1];
8619 u8 reserved_at_41[0xf];
8620 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008621
Matan Barakb4ff3a32016-02-09 14:57:42 +02008622 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008623 u8 modify_field_select[0x10];
8624
8625 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008626 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008627
Matan Barakb4ff3a32016-02-09 14:57:42 +02008628 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008629 u8 table_id[0x18];
8630
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008631 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008632};
8633
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008634struct mlx5_ifc_ets_tcn_config_reg_bits {
8635 u8 g[0x1];
8636 u8 b[0x1];
8637 u8 r[0x1];
8638 u8 reserved_at_3[0x9];
8639 u8 group[0x4];
8640 u8 reserved_at_10[0x9];
8641 u8 bw_allocation[0x7];
8642
8643 u8 reserved_at_20[0xc];
8644 u8 max_bw_units[0x4];
8645 u8 reserved_at_30[0x8];
8646 u8 max_bw_value[0x8];
8647};
8648
8649struct mlx5_ifc_ets_global_config_reg_bits {
8650 u8 reserved_at_0[0x2];
8651 u8 r[0x1];
8652 u8 reserved_at_3[0x1d];
8653
8654 u8 reserved_at_20[0xc];
8655 u8 max_bw_units[0x4];
8656 u8 reserved_at_30[0x8];
8657 u8 max_bw_value[0x8];
8658};
8659
8660struct mlx5_ifc_qetc_reg_bits {
8661 u8 reserved_at_0[0x8];
8662 u8 port_number[0x8];
8663 u8 reserved_at_10[0x30];
8664
8665 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8666 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8667};
8668
Huy Nguyen415a64a2017-07-18 16:08:46 -05008669struct mlx5_ifc_qpdpm_dscp_reg_bits {
8670 u8 e[0x1];
8671 u8 reserved_at_01[0x0b];
8672 u8 prio[0x04];
8673};
8674
8675struct mlx5_ifc_qpdpm_reg_bits {
8676 u8 reserved_at_0[0x8];
8677 u8 local_port[0x8];
8678 u8 reserved_at_10[0x10];
8679 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8680};
8681
8682struct mlx5_ifc_qpts_reg_bits {
8683 u8 reserved_at_0[0x8];
8684 u8 local_port[0x8];
8685 u8 reserved_at_10[0x2d];
8686 u8 trust_state[0x3];
8687};
8688
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008689struct mlx5_ifc_qtct_reg_bits {
8690 u8 reserved_at_0[0x8];
8691 u8 port_number[0x8];
8692 u8 reserved_at_10[0xd];
8693 u8 prio[0x3];
8694
8695 u8 reserved_at_20[0x1d];
8696 u8 tclass[0x3];
8697};
8698
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008699struct mlx5_ifc_mcia_reg_bits {
8700 u8 l[0x1];
8701 u8 reserved_at_1[0x7];
8702 u8 module[0x8];
8703 u8 reserved_at_10[0x8];
8704 u8 status[0x8];
8705
8706 u8 i2c_device_address[0x8];
8707 u8 page_number[0x8];
8708 u8 device_address[0x10];
8709
8710 u8 reserved_at_40[0x10];
8711 u8 size[0x10];
8712
8713 u8 reserved_at_60[0x20];
8714
8715 u8 dword_0[0x20];
8716 u8 dword_1[0x20];
8717 u8 dword_2[0x20];
8718 u8 dword_3[0x20];
8719 u8 dword_4[0x20];
8720 u8 dword_5[0x20];
8721 u8 dword_6[0x20];
8722 u8 dword_7[0x20];
8723 u8 dword_8[0x20];
8724 u8 dword_9[0x20];
8725 u8 dword_10[0x20];
8726 u8 dword_11[0x20];
8727};
8728
Saeed Mahameed74862162016-06-09 15:11:34 +03008729struct mlx5_ifc_dcbx_param_bits {
8730 u8 dcbx_cee_cap[0x1];
8731 u8 dcbx_ieee_cap[0x1];
8732 u8 dcbx_standby_cap[0x1];
8733 u8 reserved_at_0[0x5];
8734 u8 port_number[0x8];
8735 u8 reserved_at_10[0xa];
8736 u8 max_application_table_size[6];
8737 u8 reserved_at_20[0x15];
8738 u8 version_oper[0x3];
8739 u8 reserved_at_38[5];
8740 u8 version_admin[0x3];
8741 u8 willing_admin[0x1];
8742 u8 reserved_at_41[0x3];
8743 u8 pfc_cap_oper[0x4];
8744 u8 reserved_at_48[0x4];
8745 u8 pfc_cap_admin[0x4];
8746 u8 reserved_at_50[0x4];
8747 u8 num_of_tc_oper[0x4];
8748 u8 reserved_at_58[0x4];
8749 u8 num_of_tc_admin[0x4];
8750 u8 remote_willing[0x1];
8751 u8 reserved_at_61[3];
8752 u8 remote_pfc_cap[4];
8753 u8 reserved_at_68[0x14];
8754 u8 remote_num_of_tc[0x4];
8755 u8 reserved_at_80[0x18];
8756 u8 error[0x8];
8757 u8 reserved_at_a0[0x160];
8758};
Aviv Heller84df61e2016-05-10 13:47:50 +03008759
8760struct mlx5_ifc_lagc_bits {
8761 u8 reserved_at_0[0x1d];
8762 u8 lag_state[0x3];
8763
8764 u8 reserved_at_20[0x14];
8765 u8 tx_remap_affinity_2[0x4];
8766 u8 reserved_at_38[0x4];
8767 u8 tx_remap_affinity_1[0x4];
8768};
8769
8770struct mlx5_ifc_create_lag_out_bits {
8771 u8 status[0x8];
8772 u8 reserved_at_8[0x18];
8773
8774 u8 syndrome[0x20];
8775
8776 u8 reserved_at_40[0x40];
8777};
8778
8779struct mlx5_ifc_create_lag_in_bits {
8780 u8 opcode[0x10];
8781 u8 reserved_at_10[0x10];
8782
8783 u8 reserved_at_20[0x10];
8784 u8 op_mod[0x10];
8785
8786 struct mlx5_ifc_lagc_bits ctx;
8787};
8788
8789struct mlx5_ifc_modify_lag_out_bits {
8790 u8 status[0x8];
8791 u8 reserved_at_8[0x18];
8792
8793 u8 syndrome[0x20];
8794
8795 u8 reserved_at_40[0x40];
8796};
8797
8798struct mlx5_ifc_modify_lag_in_bits {
8799 u8 opcode[0x10];
8800 u8 reserved_at_10[0x10];
8801
8802 u8 reserved_at_20[0x10];
8803 u8 op_mod[0x10];
8804
8805 u8 reserved_at_40[0x20];
8806 u8 field_select[0x20];
8807
8808 struct mlx5_ifc_lagc_bits ctx;
8809};
8810
8811struct mlx5_ifc_query_lag_out_bits {
8812 u8 status[0x8];
8813 u8 reserved_at_8[0x18];
8814
8815 u8 syndrome[0x20];
8816
8817 u8 reserved_at_40[0x40];
8818
8819 struct mlx5_ifc_lagc_bits ctx;
8820};
8821
8822struct mlx5_ifc_query_lag_in_bits {
8823 u8 opcode[0x10];
8824 u8 reserved_at_10[0x10];
8825
8826 u8 reserved_at_20[0x10];
8827 u8 op_mod[0x10];
8828
8829 u8 reserved_at_40[0x40];
8830};
8831
8832struct mlx5_ifc_destroy_lag_out_bits {
8833 u8 status[0x8];
8834 u8 reserved_at_8[0x18];
8835
8836 u8 syndrome[0x20];
8837
8838 u8 reserved_at_40[0x40];
8839};
8840
8841struct mlx5_ifc_destroy_lag_in_bits {
8842 u8 opcode[0x10];
8843 u8 reserved_at_10[0x10];
8844
8845 u8 reserved_at_20[0x10];
8846 u8 op_mod[0x10];
8847
8848 u8 reserved_at_40[0x40];
8849};
8850
8851struct mlx5_ifc_create_vport_lag_out_bits {
8852 u8 status[0x8];
8853 u8 reserved_at_8[0x18];
8854
8855 u8 syndrome[0x20];
8856
8857 u8 reserved_at_40[0x40];
8858};
8859
8860struct mlx5_ifc_create_vport_lag_in_bits {
8861 u8 opcode[0x10];
8862 u8 reserved_at_10[0x10];
8863
8864 u8 reserved_at_20[0x10];
8865 u8 op_mod[0x10];
8866
8867 u8 reserved_at_40[0x40];
8868};
8869
8870struct mlx5_ifc_destroy_vport_lag_out_bits {
8871 u8 status[0x8];
8872 u8 reserved_at_8[0x18];
8873
8874 u8 syndrome[0x20];
8875
8876 u8 reserved_at_40[0x40];
8877};
8878
8879struct mlx5_ifc_destroy_vport_lag_in_bits {
8880 u8 opcode[0x10];
8881 u8 reserved_at_10[0x10];
8882
8883 u8 reserved_at_20[0x10];
8884 u8 op_mod[0x10];
8885
8886 u8 reserved_at_40[0x40];
8887};
8888
Eli Cohend29b7962014-10-02 12:19:43 +03008889#endif /* MLX5_IFC_H */