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gerrit-public.fairphone.software / kernel / msm / 55f97d27d78c369713bb891a91f0052cd7267e29 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 483aad1bc18a2606890c5989d7215bf2aa0df6a4 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]24 sdhc3 = &sdhc_3; /* SDC3 SDIO slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]25 };
26
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]27 memory {
28 secure_mem: secure_region {
29 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]30 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]31 label = "secure_mem";
32 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]33
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]34 adsp_mem: adsp_region {
35 linux,contiguous-region;
Maheshwar Ajjac5c35a82013-09-04 15:04:54 +0530[diff] [blame]36 reg = <0 0x2a00000>;
Krupal Divvela756ee0f2013-06-12 03:42:55 +0530[diff] [blame]37 label = "adsp_mem";
38 };
39
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]40 qsecom_mem: qsecom_region {
41 linux,contiguous-region;
42 reg = <0 0x780000>;
43 label = "qsecom_mem";
44 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]45 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]46
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]47 soc: soc { };
48};
49
50/include/ "msm8226-ion.dtsi"
51/include/ "msm8226-camera.dtsi"
52/include/ "msm-gdsc.dtsi"
53/include/ "msm8226-iommu.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]54/include/ "msm8226-smp2p.dtsi"
55/include/ "msm8226-gpu.dtsi"
56/include/ "msm8226-bus.dtsi"
57/include/ "msm8226-mdss.dtsi"
58/include/ "msm8226-coresight.dtsi"
59/include/ "msm8226-iommu-domains.dtsi"
60
61&soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 ranges;
65
66 intc: interrupt-controller@f9000000 {
67 compatible = "qcom,msm-qgic2";
68 interrupt-controller;
69 #interrupt-cells = <3>;
70 reg = <0xF9000000 0x1000>,
71 <0xF9002000 0x1000>;
72 };
73
74 msmgpio: gpio@fd510000 {
75 compatible = "qcom,msm-gpio";
76 interrupt-controller;
77 #interrupt-cells = <2>;
78 reg = <0xfd510000 0x4000>;
79 gpio-controller;
80 #gpio-cells = <2>;
81 ngpio = <117>;
82 interrupts = <0 208 0>;
83 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]84 };
85
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]86 qcom,mpm2-sleep-counter@fc4a3000 {
87 compatible = "qcom,mpm2-sleep-counter";
88 reg = <0xfc4a3000 0x1000>;
89 clock-frequency = <32768>;
90 };
91
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]92 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]93 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]94 interrupts = <1 2 0 1 3 0>;
95 clock-frequency = <19200000>;
96 };
97
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]98 timer@f9020000 {
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges;
102 compatible = "arm,armv7-timer-mem";
103 reg = <0xf9020000 0x1000>;
104 clock-frequency = <19200000>;
105
106 frame@f9021000 {
107 frame-number = <0>;
108 interrupts = <0 8 0x4>,
109 <0 7 0x4>;
110 reg = <0xf9021000 0x1000>,
111 <0xf9022000 0x1000>;
112 };
113
114 frame@f9023000 {
115 frame-number = <1>;
116 interrupts = <0 9 0x4>;
117 reg = <0xf9023000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9024000 {
122 frame-number = <2>;
123 interrupts = <0 10 0x4>;
124 reg = <0xf9024000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9025000 {
129 frame-number = <3>;
130 interrupts = <0 11 0x4>;
131 reg = <0xf9025000 0x1000>;
132 status = "disabled";
133 };
134
135 frame@f9026000 {
136 frame-number = <4>;
137 interrupts = <0 12 0x4>;
138 reg = <0xf9026000 0x1000>;
139 status = "disabled";
140 };
141
142 frame@f9027000 {
143 frame-number = <5>;
144 interrupts = <0 13 0x4>;
145 reg = <0xf9027000 0x1000>;
146 status = "disabled";
147 };
148
149 frame@f9028000 {
150 frame-number = <6>;
151 interrupts = <0 14 0x4>;
152 reg = <0xf9028000 0x1000>;
153 status = "disabled";
154 };
155 };
156
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]157 qcom,vidc@fdc00000 {
158 compatible = "qcom,msm-vidc";
159 reg = <0xfdc00000 0xff000>;
160 interrupts = <0 44 0>;
Sachin Shah2863bbf2013-09-12 14:27:52 -0700[diff] [blame]161 vdd-supply = <&gdsc_venus>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]162 qcom,load-freq-tbl = <352800 160000000>,
163 <244800 133330000>,
164 <108000 66700000>;
165 qcom,hfi = "venus";
166 qcom,bus-ports = <1>;
167 qcom,reg-presets = <0xE0024 0x0>,
168 <0x80124 0x3>,
169 <0xE0020 0x5555556>,
170 <0x800B0 0x10101001>,
171 <0x800B4 0x00101010>,
172 <0x800C0 0x1010100f>,
173 <0x800C4 0x00101010>,
174 <0x800D0 0x00000010>,
175 <0x800D4 0x00000010>,
176 <0x800D8 0x00000707>;
177 qcom,enc-ddr-ab-ib = <0 0>,
178 <129000 142000>,
179 <384000 422000>,
180 <866000 953000>;
181 qcom,dec-ddr-ab-ib = <0 0>,
182 <103000 134000>,
183 <268000 348000>,
184 <505000 657000>;
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]185 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]186 <0x2 0x2>,
187 <0x1f0 0x3>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]188 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700[diff] [blame]189 qcom,vidc-iommu-domains {
190 qcom,domain-ns {
191 qcom,vidc-domain-phandle = <&venus_domain_ns>;
192 qcom,vidc-partition-buffer-types = <0x1ff>,
193 <0x200>;
194 };
195
196 qcom,domain-cp {
197 qcom,vidc-domain-phandle = <&venus_domain_cp>;
198 qcom,vidc-partition-buffer-types = <0x2>,
199 <0x1f1>;
200 };
201 };
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]202 };
203
Maheshwar Ajjac5c35a82013-09-04 15:04:54 +0530[diff] [blame]204 qcom,vidc {
205 compatible = "qcom,msm-vidc";
206 qcom,hfi = "q6";
207 qcom,max-hw-load = <108000>; /* 720p @ 30 * 1 */
208 };
209
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]210 qcom,wfd {
211 compatible = "qcom,msm-wfd";
212 };
213
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]214 serial@f991f000 {
215 compatible = "qcom,msm-lsuart-v14";
216 reg = <0xf991f000 0x1000>;
217 interrupts = <0 109 0>;
218 status = "disabled";
219 };
220
221 serial@f995e000 {
222 compatible = "qcom,msm-lsuart-v14";
223 reg = <0xf995e000 0x1000>;
224 interrupts = <0 114 0>;
225 status = "disabled";
226 };
227
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]228 qcom,msm-imem@fe805000 {
229 compatible = "qcom,msm-imem";
230 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
231 };
232
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]233 qcom,sps@f9984000 {
234 compatible = "qcom,msm_sps";
235 reg = <0xf9984000 0x15000>,
236 <0xf9999000 0xb000>;
237 interrupts = <0 94 0>;
238 };
239
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]240 qcom,usbbam@f9a44000 {
241 compatible = "qcom,usb-bam-msm";
242 reg = <0xf9a44000 0x11000>;
243 reg-names = "hsusb";
244 interrupts = <0 135 0>;
245 interrupt-names = "hsusb";
246 qcom,usb-bam-num-pipes = <16>;
247 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
248 qcom,ignore-core-reset-ack;
249 qcom,disable-clk-gating;
250
251 qcom,pipe0 {
252 label = "hsusb-qdss-in-0";
253 qcom,usb-bam-mem-type = <3>;
254 qcom,bam-type = <1>;
255 qcom,dir = <1>;
256 qcom,pipe-num = <0>;
257 qcom,peer-bam = <1>;
258 qcom,src-bam-physical-address = <0xfc37c000>;
259 qcom,src-bam-pipe-index = <0>;
260 qcom,dst-bam-physical-address = <0xf9a44000>;
261 qcom,dst-bam-pipe-index = <2>;
262 qcom,data-fifo-offset = <0x0>;
263 qcom,data-fifo-size = <0x600>;
264 qcom,descriptor-fifo-offset = <0x600>;
265 qcom,descriptor-fifo-size = <0x200>;
266 };
267 };
268
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]269 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]270 compatible = "qcom,hsusb-otg";
271 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]272 interrupts = <0 134 0>, <0 140 0>;
273 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]274 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]275 HSUSB_1p8-supply = <&pm8226_l10>;
276 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]277 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]278
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]279 qcom,hsusb-otg-phy-init-seq =
280 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]281 qcom,hsusb-otg-phy-type = <2>;
282 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]283 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]284 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]285 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]286
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame]287 qcom,msm-bus,name = "usb";
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]288 qcom,msm-bus,num-cases = <3>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]289 qcom,msm-bus,num-paths = <1>;
290 qcom,msm-bus,vectors-KBps =
291 <87 512 0 0>,
Manu Gautam861c5852013-06-20 16:21:05 +0530[diff] [blame]292 <87 512 60000 960000>,
293 <87 512 6000 6000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]294 };
295
Mayank Ranaf8bfadb2013-07-25 12:01:25 +0530[diff] [blame]296 android_usb: android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]297 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]298 reg = <0xfe8050c8 0xc8>;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]299 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]300 };
301
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]302 wcd9xxx_intc: wcd9xxx-irq {
303 compatible = "qcom,wcd9xxx-irq";
304 interrupt-controller;
305 #interrupt-cells = <1>;
306 interrupt-parent = <&msmgpio>;
307 interrupts = <68 0>;
308 interrupt-names = "cdc-int";
309 };
310
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]311 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]312 cell-index = <1>;
313 compatible = "qcom,slim-ngd";
314 reg = <0xfe12f000 0x35000>,
315 <0xfe104000 0x20000>;
316 reg-names = "slimbus_physical", "slimbus_bam_physical";
317 interrupts = <0 163 0>, <0 164 0>;
318 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]319
320 tapan_codec {
321 compatible = "qcom,tapan-slim-pgd";
322 elemental-addr = [00 01 E0 00 17 02];
323
324 interrupt-parent = <&wcd9xxx_intc>;
325 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
326 17 18 19 20 21 22 23 24 25 26 27 28>;
327 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
328
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]329 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare482ef672013-06-20 15:28:59 -0700[diff] [blame]330 qcom,cdc-vdd-buck-voltage = <1800000 2150000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]331 qcom,cdc-vdd-buck-current = <650000>;
332
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]333 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]334 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
335 qcom,cdc-vdd-h-current = <25000>;
336
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]337 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]338 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
339 qcom,cdc-vdd-px-current = <25000>;
340
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]341 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]342 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
Bhalchandra Gajare4962c6e2013-08-15 13:02:49 -0700[diff] [blame]343 qcom,cdc-vdd-cx-current = <2000>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]344
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]345 cdc-vdd-buckhelper-supply = <&pm8226_l25>;
346 qcom,cdc-vdd-buckhelper-voltage = <1775000 2125000>;
347 qcom,cdc-vdd-buckhelper-current = <10000>;
348
349 qcom,cdc-static-supplies = "cdc-vdd-h",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]350 "cdc-vdd-px",
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]351 "cdc-vdd-cx";
352
Bhalchandra Gajare075e9c52013-07-03 14:23:48 -0700[diff] [blame]353 qcom,cdc-cp-supplies = "cdc-vdd-buck",
354 "cdc-vdd-buckhelper";
355
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]356 qcom,cdc-micbias-ldoh-v = <0x3>;
357 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]358 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]359 qcom,cdc-micbias-cfilt3-mv = <1800>;
360
361 qcom,cdc-micbias1-cfilt-sel = <0x0>;
362 qcom,cdc-micbias2-cfilt-sel = <0x1>;
363 qcom,cdc-micbias3-cfilt-sel = <0x2>;
364
365 qcom,cdc-mclk-clk-rate = <9600000>;
366 qcom,cdc-slim-ifd = "tapan-slim-ifd";
367 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
368 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]369 };
370
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]371 qcom,msm-adsp-loader {
372 compatible = "qcom,adsp-loader";
373 qcom,adsp-state = <0>;
374 };
375
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]376 sound {
377 compatible = "qcom,msm8226-audio-tapan";
378 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]379 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]380 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
381 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
382 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
383 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
384 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]385 };
386
Phani Kumar Uppalapatic2f9c222013-05-09 19:17:58 -0700[diff] [blame]387 sound-9302 {
388 compatible = "qcom,msm8226-audio-tapan";
389 qcom,model = "msm8226-tapan9302-snd-card";
390 qcom,tapan-mclk-clk-freq = <9600000>;
391 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
392 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
393 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
394 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
395 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
396 qcom,tapan-codec-9302;
397 };
398
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]399 qcom,msm-pcm {
400 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]401 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]402 };
403
404 qcom,msm-pcm-routing {
405 compatible = "qcom,msm-pcm-routing";
406 };
407
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]408 qcom,msm-pcm-low-latency {
409 compatible = "qcom,msm-pcm-dsp";
410 qcom,msm-pcm-dsp-id = <1>;
411 qcom,msm-pcm-low-latency;
412 };
413
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]414 qcom,msm-pcm-lpa {
415 compatible = "qcom,msm-pcm-lpa";
416 };
417
418 qcom,msm-compr-dsp {
419 compatible = "qcom,msm-compr-dsp";
420 };
421
422 qcom,msm-voip-dsp {
423 compatible = "qcom,msm-voip-dsp";
424 };
425
426 qcom,msm-pcm-voice {
427 compatible = "qcom,msm-pcm-voice";
428 };
429
430 qcom,msm-stub-codec {
431 compatible = "qcom,msm-stub-codec";
432 };
433
434 qcom,msm-dai-fe {
435 compatible = "qcom,msm-dai-fe";
436 };
437
438 qcom,msm-pcm-afe {
439 compatible = "qcom,msm-pcm-afe";
440 };
441
442 qcom,msm-dai-q6-hdmi {
443 compatible = "qcom,msm-dai-q6-hdmi";
444 qcom,msm-dai-q6-dev-id = <8>;
445 };
446
Venkat Sudhir178d1ae2013-09-11 14:05:09 -0700[diff] [blame]447 qcom,msm-lsm-client {
448 compatible = "qcom,msm-lsm-client";
449 };
450
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]451 qcom,msm-dai-q6 {
452 compatible = "qcom,msm-dai-q6";
453 qcom,msm-dai-q6-sb-0-rx {
454 compatible = "qcom,msm-dai-q6-dev";
455 qcom,msm-dai-q6-dev-id = <16384>;
456 };
457
458 qcom,msm-dai-q6-sb-0-tx {
459 compatible = "qcom,msm-dai-q6-dev";
460 qcom,msm-dai-q6-dev-id = <16385>;
461 };
462
463 qcom,msm-dai-q6-sb-1-rx {
464 compatible = "qcom,msm-dai-q6-dev";
465 qcom,msm-dai-q6-dev-id = <16386>;
466 };
467
468 qcom,msm-dai-q6-sb-1-tx {
469 compatible = "qcom,msm-dai-q6-dev";
470 qcom,msm-dai-q6-dev-id = <16387>;
471 };
472
473 qcom,msm-dai-q6-sb-3-rx {
474 compatible = "qcom,msm-dai-q6-dev";
475 qcom,msm-dai-q6-dev-id = <16390>;
476 };
477
478 qcom,msm-dai-q6-sb-3-tx {
479 compatible = "qcom,msm-dai-q6-dev";
480 qcom,msm-dai-q6-dev-id = <16391>;
481 };
482
483 qcom,msm-dai-q6-sb-4-rx {
484 compatible = "qcom,msm-dai-q6-dev";
485 qcom,msm-dai-q6-dev-id = <16392>;
486 };
487
488 qcom,msm-dai-q6-sb-4-tx {
489 compatible = "qcom,msm-dai-q6-dev";
490 qcom,msm-dai-q6-dev-id = <16393>;
491 };
492
Venkat Sudhir178d1ae2013-09-11 14:05:09 -0700[diff] [blame]493 qcom,msm-dai-q6-sb-5-tx {
494 compatible = "qcom,msm-dai-q6-dev";
495 qcom,msm-dai-q6-dev-id = <16395>;
496 };
497
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]498 qcom,msm-dai-q6-bt-sco-rx {
499 compatible = "qcom,msm-dai-q6-dev";
500 qcom,msm-dai-q6-dev-id = <12288>;
501 };
502
503 qcom,msm-dai-q6-bt-sco-tx {
504 compatible = "qcom,msm-dai-q6-dev";
505 qcom,msm-dai-q6-dev-id = <12289>;
506 };
507
508 qcom,msm-dai-q6-int-fm-rx {
509 compatible = "qcom,msm-dai-q6-dev";
510 qcom,msm-dai-q6-dev-id = <12292>;
511 };
512
513 qcom,msm-dai-q6-int-fm-tx {
514 compatible = "qcom,msm-dai-q6-dev";
515 qcom,msm-dai-q6-dev-id = <12293>;
516 };
517
518 qcom,msm-dai-q6-be-afe-pcm-rx {
519 compatible = "qcom,msm-dai-q6-dev";
520 qcom,msm-dai-q6-dev-id = <224>;
521 };
522
523 qcom,msm-dai-q6-be-afe-pcm-tx {
524 compatible = "qcom,msm-dai-q6-dev";
525 qcom,msm-dai-q6-dev-id = <225>;
526 };
527
528 qcom,msm-dai-q6-afe-proxy-rx {
529 compatible = "qcom,msm-dai-q6-dev";
530 qcom,msm-dai-q6-dev-id = <241>;
531 };
532
533 qcom,msm-dai-q6-afe-proxy-tx {
534 compatible = "qcom,msm-dai-q6-dev";
535 qcom,msm-dai-q6-dev-id = <240>;
536 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]537
538 qcom,msm-dai-q6-incall-record-rx {
539 compatible = "qcom,msm-dai-q6-dev";
540 qcom,msm-dai-q6-dev-id = <32771>;
541 };
542
543 qcom,msm-dai-q6-incall-record-tx {
544 compatible = "qcom,msm-dai-q6-dev";
545 qcom,msm-dai-q6-dev-id = <32772>;
546 };
547
548 qcom,msm-dai-q6-incall-music-rx {
549 compatible = "qcom,msm-dai-q6-dev";
550 qcom,msm-dai-q6-dev-id = <32773>;
551 };
Vicky Sehrawat5ac670f2013-05-17 16:32:13 -0700[diff] [blame]552
553 qcom,msm-dai-q6-incall-music-2-rx {
554 compatible = "qcom,msm-dai-q6-dev";
555 qcom,msm-dai-q6-dev-id = <32770>;
556 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]557 };
558
559 qcom,msm-pcm-hostless {
560 compatible = "qcom,msm-pcm-hostless";
561 };
562
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]563 qcom,msm-pri-auxpcm {
564 compatible = "qcom,msm-auxpcm-dev";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]565 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
566 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
567 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
568 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
569 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
570 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
571 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
Patrick Laiafd82122013-06-15 22:50:04 -0700[diff] [blame]572 qcom,msm-auxpcm-interface = "primary";
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]573 };
574
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]575 qcom,wcnss-wlan@fb000000 {
576 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]577 reg = <0xfb000000 0x280000>,
578 <0xf9011008 0x04>;
579 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]580 interrupts = <0 145 0 0 146 0>;
581 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
582
583 qcom,pronto-vddmx-supply = <&pm8226_l3>;
584 qcom,pronto-vddcx-supply = <&pm8226_s1>;
585 qcom,pronto-vddpx-supply = <&pm8226_l6>;
586 qcom,iris-vddxo-supply = <&pm8226_l10>;
587 qcom,iris-vddrfa-supply = <&pm8226_l24>;
588 qcom,iris-vddpa-supply = <&pm8226_l16>;
589 qcom,iris-vdddig-supply = <&pm8226_l24>;
590
591 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]592 qcom,has-pronto-hw;
593 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]594 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]595
596 qcom,msm-adsp-sensors {
597 compatible = "qcom,msm-adsp-sensors";
598 qcom,src-id = <11>;
599 qcom,dst-id = <604>;
600 qcom,ab = <32505856>;
601 qcom,ib = <32505856>;
602 };
603
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]604 qcom,wdt@f9017000 {
605 compatible = "qcom,msm-watchdog";
606 reg = <0xf9017000 0x1000>;
607 interrupts = <0 3 0>, <0 4 0>;
608 qcom,bark-time = <11000>;
609 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]610 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]611 };
612
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]613 qcom,smem@fa00000 {
614 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]615 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]616 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]617 <0xfc428000 0x4000>;
618 reg-names = "smem", "irq-reg-base", "aux-mem1";
619
620 qcom,smd-modem {
621 compatible = "qcom,smd";
622 qcom,smd-edge = <0>;
623 qcom,smd-irq-offset = <0x8>;
624 qcom,smd-irq-bitmask = <0x1000>;
625 qcom,pil-string = "modem";
626 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]627 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]628
629 qcom,smsm-modem {
630 compatible = "qcom,smsm";
631 qcom,smsm-edge = <0>;
632 qcom,smsm-irq-offset = <0x8>;
633 qcom,smsm-irq-bitmask = <0x2000>;
634 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]635 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]636
637 qcom,smd-adsp {
638 compatible = "qcom,smd";
639 qcom,smd-edge = <1>;
640 qcom,smd-irq-offset = <0x8>;
641 qcom,smd-irq-bitmask = <0x100>;
642 qcom,pil-string = "adsp";
643 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]644 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]645
646 qcom,smsm-adsp {
647 compatible = "qcom,smsm";
648 qcom,smsm-edge = <1>;
649 qcom,smsm-irq-offset = <0x8>;
650 qcom,smsm-irq-bitmask = <0x200>;
651 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]652 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]653
654 qcom,smd-wcnss {
655 compatible = "qcom,smd";
656 qcom,smd-edge = <6>;
657 qcom,smd-irq-offset = <0x8>;
658 qcom,smd-irq-bitmask = <0x20000>;
659 qcom,pil-string = "wcnss";
660 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]661 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]662
663 qcom,smsm-wcnss {
664 compatible = "qcom,smsm";
665 qcom,smsm-edge = <6>;
666 qcom,smsm-irq-offset = <0x8>;
667 qcom,smsm-irq-bitmask = <0x80000>;
668 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]669 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]670
671 qcom,smd-rpm {
672 compatible = "qcom,smd";
673 qcom,smd-edge = <15>;
674 qcom,smd-irq-offset = <0x8>;
675 qcom,smd-irq-bitmask = <0x1>;
676 interrupts = <0 168 1>;
677 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]678 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]679 };
680
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]681 rpm_bus: qcom,rpm-smd {
682 compatible = "qcom,rpm-smd";
683 rpm-channel-name = "rpm_requests";
684 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]685 };
686
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]687 qcom,bcl {
688 compatible = "qcom,bcl";
689 };
690
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]691 sdcc1: qcom,sdcc@f9824000 {
692 cell-index = <1>; /* SDC1 eMMC slot */
693 compatible = "qcom,msm-sdcc";
694
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]695 reg = <0xf9824000 0x800>,
696 <0xf9824800 0x100>,
697 <0xf9804000 0x7000>;
698 reg-names = "core_mem", "dml_mem", "bam_mem";
699 interrupts = <0 123 0>, <0 137 0>;
700 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]701
702 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]703
704 qcom,msm-bus,name = "sdcc1";
705 qcom,msm-bus,num-cases = <8>;
706 qcom,msm-bus,num-paths = <1>;
707 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
708 <78 512 1600 3200>, /* 400 KB/s*/
709 <78 512 80000 160000>, /* 20 MB/s */
710 <78 512 100000 200000>, /* 25 MB/s */
711 <78 512 200000 400000>, /* 50 MB/s */
712 <78 512 400000 800000>, /* 100 MB/s */
713 <78 512 400000 800000>, /* 200 MB/s */
714 <78 512 2048000 4096000>; /* Max. bandwidth */
715 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
716 100000000 200000000 4294967295>;
717
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]718 status = "disabled";
719 };
720
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]721 sdhc_1: sdhci@f9824900 {
722 compatible = "qcom,sdhci-msm";
723 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
724 reg-names = "hc_mem", "core_mem";
725
726 interrupts = <0 123 0>, <0 138 0>;
727 interrupt-names = "hc_irq", "pwr_irq";
728
729 qcom,bus-width = <8>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]730
731 qcom,msm-bus,name = "sdhc1";
732 qcom,msm-bus,num-cases = <8>;
733 qcom,msm-bus,num-paths = <1>;
734 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
735 <78 512 1600 3200>, /* 400 KB/s*/
736 <78 512 80000 160000>, /* 20 MB/s */
737 <78 512 100000 200000>, /* 25 MB/s */
738 <78 512 200000 400000>, /* 50 MB/s */
739 <78 512 400000 800000>, /* 100 MB/s */
740 <78 512 400000 800000>, /* 200 MB/s */
741 <78 512 2048000 4096000>; /* Max. bandwidth */
742 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
743 100000000 200000000 4294967295>;
744
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]745 status = "disabled";
746 };
747
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]748 sdcc2: qcom,sdcc@f98a4000 {
749 cell-index = <2>; /* SDC2 SD card slot */
750 compatible = "qcom,msm-sdcc";
751
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]752 reg = <0xf98a4000 0x800>,
753 <0xf98a4800 0x100>,
754 <0xf9884000 0x7000>;
755 reg-names = "core_mem", "dml_mem", "bam_mem";
756 interrupts = <0 125 0>, <0 220 0>;
757 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]758
759 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]760
761 qcom,msm-bus,name = "sdcc2";
762 qcom,msm-bus,num-cases = <8>;
763 qcom,msm-bus,num-paths = <1>;
764 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
765 <81 512 1600 3200>, /* 400 KB/s*/
766 <81 512 80000 160000>, /* 20 MB/s */
767 <81 512 100000 200000>, /* 25 MB/s */
768 <81 512 200000 400000>, /* 50 MB/s */
769 <81 512 400000 800000>, /* 100 MB/s */
770 <81 512 400000 800000>, /* 200 MB/s */
771 <81 512 2048000 4096000>; /* Max. bandwidth */
772 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
773 100000000 200000000 4294967295>;
774
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]775 status = "disabled";
776 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]777
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]778 sdhc_2: sdhci@f98a4900 {
779 compatible = "qcom,sdhci-msm";
780 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
781 reg-names = "hc_mem", "core_mem";
782
783 interrupts = <0 125 0>, <0 221 0>;
784 interrupt-names = "hc_irq", "pwr_irq";
785
786 qcom,bus-width = <4>;
Krishna Konda9fc6aeb2013-06-11 20:26:16 -0700[diff] [blame]787
788 qcom,msm-bus,name = "sdhc2";
789 qcom,msm-bus,num-cases = <8>;
790 qcom,msm-bus,num-paths = <1>;
791 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
792 <81 512 1600 3200>, /* 400 KB/s*/
793 <81 512 80000 160000>, /* 20 MB/s */
794 <81 512 100000 200000>, /* 25 MB/s */
795 <81 512 200000 400000>, /* 50 MB/s */
796 <81 512 400000 800000>, /* 100 MB/s */
797 <81 512 400000 800000>, /* 200 MB/s */
798 <81 512 2048000 4096000>; /* Max. bandwidth */
799 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
800 100000000 200000000 4294967295>;
801
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]802 status = "disabled";
803 };
804
Krishna Kondaf92e4262013-07-08 16:21:57 -0700[diff] [blame]805 sdcc3: qcom,sdcc@f9864000 {
806 cell-index = <3>;
807 compatible = "qcom,msm-sdcc";
808 reg = <0xf9864000 0x800>,
809 <0xf9864800 0x100>,
810 <0xf9844000 0x7000>;
811 reg-names = "core_mem", "dml_mem", "bam_mem";
812
813 qcom,bus-width = <4>;
814 gpios = <&msmgpio 44 0>, /* CLK */
815 <&msmgpio 43 0>, /* CMD */
816 <&msmgpio 42 0>, /* DATA0 */
817 <&msmgpio 41 0>, /* DATA1 */
818 <&msmgpio 40 0>, /* DATA2 */
819 <&msmgpio 39 0>; /* DATA3 */
820 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
821
822 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
823
824 qcom,msm-bus,name = "sdcc3";
825 qcom,msm-bus,num-cases = <8>;
826 qcom,msm-bus,num-paths = <1>;
827 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
828 <79 512 1600 3200>, /* 400 KB/s*/
829 <79 512 80000 160000>, /* 20 MB/s */
830 <79 512 100000 200000>, /* 25 MB/s */
831 <79 512 200000 400000>, /* 50 MB/s */
832 <79 512 400000 800000>, /* 100 MB/s */
833 <79 512 400000 800000>, /* 200 MB/s */
834 <79 512 2048000 4096000>; /* Max. bandwidth */
835 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
836 100000000 200000000 4294967295>;
837
838 #address-cells = <0>;
839 interrupt-parent = <&sdcc3>;
840 interrupts = <0 1 2>;
841 #interrupt-cells = <1>;
842 interrupt-map-mask = <0xffffffff>;
843 interrupt-map = <0 &intc 0 127 0
844 1 &intc 0 223 0
845 2 &msmgpio 41 0x8>;
846 interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq";
847
848 status = "disabled";
849 };
850
851 sdhc_3: sdhci@f9864900 {
852 compatible = "qcom,sdhci-msm";
853 reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
854 reg-names = "hc_mem", "core_mem";
855
856 qcom,bus-width = <4>;
857 gpios = <&msmgpio 44 0>, /* CLK */
858 <&msmgpio 43 0>, /* CMD */
859 <&msmgpio 42 0>, /* DATA0 */
860 <&msmgpio 41 0>, /* DATA1 */
861 <&msmgpio 40 0>, /* DATA2 */
862 <&msmgpio 39 0>; /* DATA3 */
863 qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";
864
865 qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>;
866
867 qcom,msm-bus,name = "sdhc3";
868 qcom,msm-bus,num-cases = <8>;
869 qcom,msm-bus,num-paths = <1>;
870 qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */
871 <79 512 1600 3200>, /* 400 KB/s*/
872 <79 512 80000 160000>, /* 20 MB/s */
873 <79 512 100000 200000>, /* 25 MB/s */
874 <79 512 200000 400000>, /* 50 MB/s */
875 <79 512 400000 800000>, /* 100 MB/s */
876 <79 512 400000 800000>, /* 200 MB/s */
877 <79 512 2048000 4096000>; /* Max. bandwidth */
878 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
879 100000000 200000000 4294967295>;
880
881 #address-cells = <0>;
882 interrupt-parent = <&sdhc_3>;
883 interrupts = <0 1 2>;
884 #interrupt-cells = <1>;
885 interrupt-map-mask = <0xffffffff>;
886 interrupt-map = <0 &intc 0 127 0
887 1 &intc 0 224 0
888 2 &msmgpio 41 0x8>;
889 interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";
890
891 status = "disabled";
892 };
893
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]894 spmi_bus: qcom,spmi@fc4c0000 {
895 cell-index = <0>;
896 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]897 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]898 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]899 <0Xfc4cb000 0x1000>,
900 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]901 /* 190,ee0_krait_hlos_spmi_periph_irq */
902 /* 187,channel_0_krait_hlos_trans_done_irq */
903 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]904 qcom,pmic-arb-ee = <0>;
905 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]906 };
907
Madan Mohan Koyyalamudi2d7c6f52013-06-19 17:49:45 -0700[diff] [blame]908 i2c@f9925000 { /* BLSP-1 QUP-3 */
909 cell-index = <2>;
910 compatible = "qcom,i2c-qup";
911 reg = <0xf9925000 0x1000>;
912 #address-cells = <1>;
913 #size-cells = <0>;
914 reg-names = "qup_phys_addr";
915 interrupts = <0 97 0>;
916 interrupt-names = "qup_err_intr";
917 qcom,i2c-bus-freq = <400000>;
918 qcom,i2c-src-freq = <19200000>;
919 };
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]920 i2c@f9926000 { /* BLSP-1 QUP-4 */
921 cell-index = <0>;
922 compatible = "qcom,i2c-qup";
923 reg = <0xf9926000 0x1000>;
924 #address-cells = <1>;
925 #size-cells = <0>;
926 reg-names = "qup_phys_addr";
927 interrupts = <0 98 0>;
928 interrupt-names = "qup_err_intr";
929 qcom,i2c-bus-freq = <100000>;
930 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]931
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]932 i2c@f9927000 { /* BLSP1 QUP5 */
933 cell-index = <5>;
934 compatible = "qcom,i2c-qup";
935 #address-cells = <1>;
936 #size-cells = <0>;
937 reg-names = "qup_phys_addr";
938 reg = <0xf9927000 0x1000>;
939 interrupt-names = "qup_err_intr";
940 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]941 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]942 qcom,i2c-src-freq = <19200000>;
Amy Malochebf346092013-07-31 12:57:28 -0700[diff] [blame]943 qcom,sda-gpio = <&msmgpio 18 0>;
944 qcom,scl-gpio = <&msmgpio 19 0>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]945 };
946
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]947 qcom,acpuclk@f9011050 {
948 compatible = "qcom,acpuclk-a7";
Patrick Daly4fd80f42013-06-18 11:09:15 -0700[diff] [blame]949 reg = <0xf9011050 0x8>;
950 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]951 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]952 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]953
954 qcom,ocmem@fdd00000 {
955 compatible = "qcom,msm-ocmem";
956 reg = <0xfdd00000 0x2000>,
957 <0xfdd02000 0x2000>,
958 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]959 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]960 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
961 interrupts = <0 76 0 0 77 0>;
962 interrupt-names = "ocmem_irq", "dm_irq";
963 qcom,ocmem-num-regions = <0x1>;
964 qcom,ocmem-num-macros = <0x2>;
965 qcom,resource-type = <0x706d636f>;
966 #address-cells = <1>;
967 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]968 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]969
970 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]971 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]972 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]973 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]974 };
975 };
976
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]977 qcom,venus@fdce0000 {
978 compatible = "qcom,pil-venus";
979 reg = <0xfdce0000 0x4000>,
980 <0xfdc80000 0x400>;
981 reg-names = "wrapper_base", "vbif_base";
982 vdd-supply = <&gdsc_venus>;
983
984 qcom,firmware-name = "venus";
985 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]986
987 qcom,pronto@fb21b000 {
988 compatible = "qcom,pil-pronto";
989 reg = <0xfb21b000 0x3000>,
990 <0xfc401700 0x4>,
991 <0xfd485300 0xc>;
992 reg-names = "pmu_base", "clk_base", "halt_base";
993 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]994 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]995
996 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]997
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]998 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]999 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]1000 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]1001 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]1002
1003 /* GPIO output to wcnss */
1004 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]1005 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1006
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]1007 qcom,iris-fm {
1008 compatible = "qcom,iris_fm";
1009 };
1010
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1011 qcom,lpass@fe200000 {
1012 compatible = "qcom,pil-q6v5-lpass";
1013 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]1014 <0xfd485100 0x00010>,
1015 <0xfc4016c0 0x00004>;
1016 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]1017 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1018 interrupts = <0 162 1>;
1019
1020 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1021
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1022 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1023 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]1024 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]1025 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]1026
1027 /* GPIO output to lpass */
1028 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]1029 };
1030
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1031 qcom,mss@fc880000 {
1032 compatible = "qcom,pil-q6v5-mss";
1033 reg = <0xfc880000 0x100>,
1034 <0xfd485000 0x400>,
1035 <0xfc820000 0x020>,
1036 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1037 <0xfd485194 0x4>;
1038 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]1039 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1040
1041 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1042 vdd_cx-supply = <&pm8226_s1_corner>;
1043 vdd_mx-supply = <&pm8226_l3>;
1044 vdd_pll-supply = <&pm8226_l8>;
1045 qcom,vdd_pll = <1800000>;
1046
1047 qcom,is-loadable;
1048 qcom,firmware-name = "mba";
1049 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1050
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1051 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1052 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]1053 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]1054 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700[diff] [blame]1055 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]1056
1057 /* GPIO output to mss */
1058 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]1059 };
1060
Neeti Desaif82314e2013-08-09 15:59:54 -0700[diff] [blame]1061 memory_hole: qcom,msm-mem-hole {
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1062 compatible = "qcom,msm-mem-hole";
Neeti Desai183b33d2013-08-09 14:58:38 -0700[diff] [blame]1063 qcom,memblock-remove = <0x08400000 0x4000000
1064 0x0d200000 0x2300000
1065 0x0fa00000 0x500000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]1066 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1067
1068 tsens: tsens@fc4a8000 {
1069 compatible = "qcom,msm-tsens";
1070 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700[diff] [blame]1071 <0xfc4bc000 0x1000>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1072 reg-names = "tsens_physical", "tsens_eeprom_physical";
1073 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]1074 qcom,sensors = <4>;
1075 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]1076 qcom,calib-mode = "fuse_map2";
1077 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1078
1079 qcom,msm-thermal {
1080 compatible = "qcom,msm-thermal";
1081 qcom,sensor-id = <0>;
1082 qcom,poll-ms = <250>;
1083 qcom,limit-temp = <60>;
1084 qcom,temp-hysteresis = <10>;
1085 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]1086 qcom,freq-control-mask = <0xf>;
Jennifer Liu003438d2013-06-21 11:24:20 -0700[diff] [blame]1087 qcom,core-limit-temp = <80>;
1088 qcom,core-temp-hysteresis = <10>;
1089 qcom,core-control-mask = <0xe>;
Jennifer Liu53bb5642013-06-26 10:42:42 -0700[diff] [blame]1090 qcom,vdd-restriction-temp = <5>;
1091 qcom,vdd-restriction-temp-hysteresis = <10>;
1092 vdd-dig-supply = <&pm8226_s1_floor_corner>;
1093
1094 qcom,vdd-dig-rstr{
1095 qcom,vdd-rstr-reg = "vdd-dig";
1096 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
1097 qcom,min-level = <1>; /* No Request */
1098 };
1099
1100 qcom,vdd-apps-rstr{
1101 qcom,vdd-rstr-reg = "vdd-apps";
1102 qcom,levels = <600000 787200 998400>;
1103 qcom,freq-req;
1104 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]1105 };
1106
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1107 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
1108 compatible = "qcom,spi-qup-v2";
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1111 reg-names = "spi_physical", "spi_bam_physical";
1112 reg = <0xf9923000 0x1000>,
1113 <0xf9904000 0xF000>;
1114 interrupt-names = "spi_irq", "spi_bam_irq";
1115 interrupts = <0 95 0>, <0 238 0>;
1116 spi-max-frequency = <19200000>;
1117
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1118 qcom,gpio-mosi = <&msmgpio 0 0>;
1119 qcom,gpio-miso = <&msmgpio 1 0>;
1120 qcom,gpio-clk = <&msmgpio 3 0>;
1121 qcom,gpio-cs0 = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1122
1123 qcom,infinite-mode = <0>;
1124 qcom,use-bam;
1125 qcom,ver-reg-exists;
1126 qcom,bam-consumer-pipe-index = <12>;
1127 qcom,bam-producer-pipe-index = <13>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600[diff] [blame]1128 qcom,master-id = <86>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]1129 };
1130
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]1131 qcom,bam_dmux@fc834000 {
1132 compatible = "qcom,bam_dmux";
1133 reg = <0xfc834000 0x7000>;
1134 interrupts = <0 29 1>;
1135 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]1136
1137 qcom,msm-rtb {
1138 compatible = "qcom,msm-rtb";
1139 qcom,memory-reservation-type = "EBI1";
1140 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
1141 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1142
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1143 qcom,msm-rng@f9bff000 {
1144 compatible = "qcom,msm-rng";
1145 reg = <0xf9bff000 0x200>;
1146 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700[diff] [blame]1147 qcom,msm-bus,name = "msm-rng-noc";
1148 qcom,msm-bus,num-cases = <2>;
1149 qcom,msm-bus,num-paths = <1>;
1150 qcom,msm-bus,vectors-KBps =
1151 <1 618 0 0>,
1152 <1 618 0 800>;
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]1153 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1154
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1155 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1156 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]1157 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]1158 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1159
Pratik Patelf2945ef2013-06-13 23:52:05 -0700[diff] [blame]1160 jtag_fuse: jtagfuse@fc4be024 {
1161 compatible = "qcom,jtag-fuse";
1162 reg = <0xfc4be024 0x8>;
1163 reg-names = "fuse-base";
1164 };
1165
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]1166 jtag_mm0: jtagmm@fc33c000 {
1167 compatible = "qcom,jtag-mm";
1168 reg = <0xfc33c000 0x1000>,
1169 <0xfc330000 0x1000>;
1170 reg-names = "etm-base","debug-base";
1171 };
1172
1173 jtag_mm1: jtagmm@fc33d000 {
1174 compatible = "qcom,jtag-mm";
1175 reg = <0xfc33d000 0x1000>,
1176 <0xfc332000 0x1000>;
1177 reg-names = "etm-base","debug-base";
1178 };
1179
1180 jtag_mm2: jtagmm@fc33e000 {
1181 compatible = "qcom,jtag-mm";
1182 reg = <0xfc33e000 0x1000>,
1183 <0xfc334000 0x1000>;
1184 reg-names = "etm-base","debug-base";
1185 };
1186
1187 jtag_mm3: jtagmm@fc33f000 {
1188 compatible = "qcom,jtag-mm";
1189 reg = <0xfc33f000 0x1000>,
1190 <0xfc336000 0x1000>;
1191 reg-names = "etm-base","debug-base";
1192 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]1193
1194 qcom,ipc-spinlock@fd484000 {
1195 compatible = "qcom,ipc-spinlock-sfpb";
1196 reg = <0xfd484000 0x400>;
1197 qcom,num-locks = <8>;
1198 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]1199
1200 qcom,qseecom@d980000 {
1201 compatible = "qcom,qseecom";
1202 reg = <0xd980000 0x256000>;
1203 reg-names = "secapp-region";
1204 qcom,disk-encrypt-pipe-pair = <2>;
1205 qcom,hlos-ce-hw-instance = <0>;
1206 qcom,qsee-ce-hw-instance = <0>;
1207 qcom,msm-bus,name = "qseecom-noc";
1208 qcom,msm-bus,num-cases = <4>;
1209 qcom,msm-bus,active-only = <0>;
1210 qcom,msm-bus,num-paths = <1>;
1211 qcom,msm-bus,vectors-KBps =
1212 <55 512 0 0>,
1213 <55 512 3936000 393600>,
1214 <55 512 3936000 393600>,
1215 <55 512 3936000 393600>;
1216 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1217
1218 qcom,qcrypto@fd404000 {
1219 compatible = "qcom,qcrypto";
1220 reg = <0xfd400000 0x20000>,
1221 <0xfd404000 0x8000>;
1222 reg-names = "crypto-base","crypto-bam-base";
1223 interrupts = <0 207 0>;
1224 qcom,bam-pipe-pair = <2>;
1225 qcom,ce-hw-instance = <0>;
1226 qcom,ce-hw-shared;
1227 qcom,msm-bus,name = "qcrypto-noc";
1228 qcom,msm-bus,num-cases = <2>;
1229 qcom,msm-bus,active-only = <0>;
1230 qcom,msm-bus,num-paths = <1>;
1231 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1232 <55 512 0 0>,
1233 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1234 };
1235
1236 qcom,qcedev@fd400000 {
1237 compatible = "qcom,qcedev";
1238 reg = <0xfd400000 0x20000>,
1239 <0xfd404000 0x8000>;
1240 reg-names = "crypto-base","crypto-bam-base";
1241 interrupts = <0 207 0>;
1242 qcom,bam-pipe-pair = <1>;
1243 qcom,ce-hw-instance = <0>;
1244 qcom,ce-hw-shared;
1245 qcom,msm-bus,name = "qcedev-noc";
1246 qcom,msm-bus,num-cases = <2>;
1247 qcom,msm-bus,active-only = <0>;
1248 qcom,msm-bus,num-paths = <1>;
1249 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1250 <55 512 0 0>,
1251 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1252 };
Neil Leeder45fb9f62013-06-04 10:46:41 -0400[diff] [blame]1253
1254 cpu-pmu {
1255 compatible = "arm,cortex-a7-pmu";
1256 qcom,irq-is-percpu;
1257 interrupts = <1 7 0xf00>;
1258 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1259};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1260
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1261&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1262 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1263 status = "ok";
1264};
1265
1266&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1267 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1268 status = "ok";
1269};
1270
1271&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1272 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1273 status = "ok";
1274};
1275
1276&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1277 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1278 status = "ok";
1279};
1280
1281&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1282 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1283 status = "ok";
1284};
1285
1286&gdsc_usb_hsic {
1287 status = "ok";
1288};
1289
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1290/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1291/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1292/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1293
1294&pm8226_vadc {
1295 chan@0 {
1296 label = "usb_in";
1297 reg = <0>;
1298 qcom,decimation = <0>;
1299 qcom,pre-div-channel-scaling = <4>;
1300 qcom,calibration-type = "absolute";
1301 qcom,scale-function = <0>;
1302 qcom,hw-settle-time = <0>;
1303 qcom,fast-avg-setup = <0>;
1304 };
1305
1306 chan@2 {
1307 label = "vchg_sns";
1308 reg = <2>;
1309 qcom,decimation = <0>;
1310 qcom,pre-div-channel-scaling = <3>;
1311 qcom,calibration-type = "absolute";
1312 qcom,scale-function = <0>;
1313 qcom,hw-settle-time = <0>;
1314 qcom,fast-avg-setup = <0>;
1315 };
1316
1317 chan@5 {
1318 label = "vcoin";
1319 reg = <5>;
1320 qcom,decimation = <0>;
1321 qcom,pre-div-channel-scaling = <1>;
1322 qcom,calibration-type = "absolute";
1323 qcom,scale-function = <0>;
1324 qcom,hw-settle-time = <0>;
1325 qcom,fast-avg-setup = <0>;
1326 };
1327
1328 chan@6 {
1329 label = "vbat_sns";
1330 reg = <6>;
1331 qcom,decimation = <0>;
1332 qcom,pre-div-channel-scaling = <1>;
1333 qcom,calibration-type = "absolute";
1334 qcom,scale-function = <0>;
1335 qcom,hw-settle-time = <0>;
1336 qcom,fast-avg-setup = <0>;
1337 };
1338
1339 chan@7 {
1340 label = "vph_pwr";
1341 reg = <7>;
1342 qcom,decimation = <0>;
1343 qcom,pre-div-channel-scaling = <1>;
1344 qcom,calibration-type = "absolute";
1345 qcom,scale-function = <0>;
1346 qcom,hw-settle-time = <0>;
1347 qcom,fast-avg-setup = <0>;
1348 };
1349
1350 chan@30 {
1351 label = "batt_therm";
1352 reg = <0x30>;
1353 qcom,decimation = <0>;
1354 qcom,pre-div-channel-scaling = <0>;
1355 qcom,calibration-type = "ratiometric";
1356 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1357 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1358 qcom,fast-avg-setup = <0>;
1359 };
1360
1361 chan@31 {
1362 label = "batt_id";
1363 reg = <0x31>;
1364 qcom,decimation = <0>;
1365 qcom,pre-div-channel-scaling = <0>;
1366 qcom,calibration-type = "ratiometric";
1367 qcom,scale-function = <0>;
1368 qcom,hw-settle-time = <2>;
1369 qcom,fast-avg-setup = <0>;
1370 };
1371
1372 chan@b2 {
1373 label = "xo_therm_pu2";
1374 reg = <0xb2>;
1375 qcom,decimation = <0>;
1376 qcom,pre-div-channel-scaling = <0>;
1377 qcom,calibration-type = "ratiometric";
1378 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1379 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1380 qcom,fast-avg-setup = <0>;
1381 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1382
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1383 chan@39 {
1384 label = "usb_id_nopull";
1385 reg = <0x39>;
1386 qcom,decimation = <0>;
1387 qcom,pre-div-channel-scaling = <0>;
1388 qcom,calibration-type = "ratiometric";
1389 qcom,scale-function = <0>;
1390 qcom,hw-settle-time = <2>;
1391 qcom,fast-avg-setup = <0>;
1392 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1393};
1394
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1395&pm8226_adc_tm {
1396 /* Channel Node */
1397 chan@30 {
1398 label = "batt_therm";
1399 reg = <0x30>;
1400 qcom,decimation = <0>;
1401 qcom,pre-div-channel-scaling = <0>;
1402 qcom,calibration-type = "ratiometric";
1403 qcom,scale-function = <1>;
1404 qcom,hw-settle-time = <2>;
1405 qcom,fast-avg-setup = <3>;
1406 qcom,btm-channel-number = <0x48>;
1407 };
1408
1409 chan@8 {
1410 label = "die_temp";
1411 reg = <8>;
1412 qcom,decimation = <0>;
1413 qcom,pre-div-channel-scaling = <0>;
1414 qcom,calibration-type = "absolute";
1415 qcom,scale-function = <3>;
1416 qcom,hw-settle-time = <0>;
1417 qcom,fast-avg-setup = <3>;
1418 qcom,btm-channel-number = <0x68>;
1419 };
1420
1421 chan@6 {
1422 label = "vbat_sns";
1423 reg = <6>;
1424 qcom,decimation = <0>;
1425 qcom,pre-div-channel-scaling = <1>;
1426 qcom,calibration-type = "absolute";
1427 qcom,scale-function = <0>;
1428 qcom,hw-settle-time = <0>;
1429 qcom,fast-avg-setup = <3>;
1430 qcom,btm-channel-number = <0x70>;
1431 };
1432
1433 chan@14 {
1434 label = "pa_therm0";
1435 reg = <0x14>;
1436 qcom,decimation = <0>;
1437 qcom,pre-div-channel-scaling = <0>;
1438 qcom,calibration-type = "ratiometric";
1439 qcom,scale-function = <2>;
1440 qcom,hw-settle-time = <2>;
1441 qcom,fast-avg-setup = <0>;
1442 qcom,btm-channel-number = <0x78>;
1443 qcom,thermal-node;
1444 };
1445
1446 chan@17 {
1447 label = "pa_therm1";
1448 reg = <0x17>;
1449 qcom,decimation = <0>;
1450 qcom,pre-div-channel-scaling = <0>;
1451 qcom,calibration-type = "ratiometric";
1452 qcom,scale-function = <2>;
1453 qcom,hw-settle-time = <2>;
1454 qcom,fast-avg-setup = <0>;
1455 qcom,btm-channel-number = <0x80>;
1456 qcom,thermal-node;
1457 };
1458};
1459
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1460&pm8226_chg {
1461 status = "ok";
1462
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1463 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1464 status = "ok";
1465 };
1466
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1467 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1468 status = "ok";
1469 };
1470
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1471 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1472 status = "ok";
1473 };
1474
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1475 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1476 status = "ok";
1477 };
1478
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1479 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1480 status = "ok";
1481 };
1482
1483 qcom,chg-misc@1600 {
1484 status = "ok";
1485 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1486};