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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
51
52
53/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000054/*--- Globals ---*/
55/*------------------------------------------------------------*/
56
57/* The IRSB* into which we're generating code. */
58static IRSB *irsb;
59
60/* The guest address for the instruction currently being
61 translated. */
62static Addr64 guest_IA_curr_instr;
63
64/* The guest address for the instruction following the current instruction. */
65static Addr64 guest_IA_next_instr;
66
67/* Result of disassembly step. */
68static DisResult *dis_res;
69
floriana64c2432011-07-16 02:11:50 +000070/* Resteer function and callback data */
71static Bool (*resteer_fn)(void *, Addr64);
72static void *resteer_data;
73
sewardj2019a972011-03-07 16:04:07 +000074/* The last seen execute target instruction */
75ULong last_execute_target;
76
77/* The possible outcomes of a decoding operation */
78typedef enum {
79 S390_DECODE_OK,
80 S390_DECODE_UNKNOWN_INSN,
81 S390_DECODE_UNIMPLEMENTED_INSN,
82 S390_DECODE_UNKNOWN_SPECIAL_INSN,
83 S390_DECODE_ERROR
84} s390_decode_t;
85
florian428dfdd2012-03-27 03:09:49 +000086
sewardj2019a972011-03-07 16:04:07 +000087/*------------------------------------------------------------*/
88/*--- Helpers for constructing IR. ---*/
89/*------------------------------------------------------------*/
90
91/* Sign extend a value with the given number of bits. This is a
92 macro because it allows us to overload the type of the value.
93 Note that VALUE must have a signed type! */
94#undef sign_extend
95#define sign_extend(value,num_bits) \
96(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
97 (sizeof(__typeof__(value)) * 8 - (num_bits)))
98
99
100/* Add a statement to the current irsb. */
101static __inline__ void
102stmt(IRStmt *st)
103{
104 addStmtToIRSB(irsb, st);
105}
106
107/* Allocate a new temporary of the given type. */
108static __inline__ IRTemp
109newTemp(IRType type)
110{
111 vassert(isPlausibleIRType(type));
112
113 return newIRTemp(irsb->tyenv, type);
114}
115
116/* Create an expression node for a temporary */
117static __inline__ IRExpr *
118mkexpr(IRTemp tmp)
119{
120 return IRExpr_RdTmp(tmp);
121}
122
florian8844a632012-04-13 04:04:06 +0000123/* Generate an expression node for an address. */
124static __inline__ IRExpr *
125mkaddr_expr(Addr64 addr)
126{
127 return IRExpr_Const(IRConst_U64(addr));
128}
129
sewardj2019a972011-03-07 16:04:07 +0000130/* Add a statement that assigns to a temporary */
131static __inline__ void
132assign(IRTemp dst, IRExpr *expr)
133{
134 stmt(IRStmt_WrTmp(dst, expr));
135}
136
florian8844a632012-04-13 04:04:06 +0000137/* Write an address into the guest_IA */
138static __inline__ void
139put_IA(IRExpr *address)
140{
141 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
142}
143
144/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
145 that wants the last statement in an IRSB to be a put to the guest_IA.
146 Mostly used for insns that use the "counter" pseudo guest reg. */
147static __inline__ void
148dummy_put_IA(void)
149{
150 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
151}
152
sewardj2019a972011-03-07 16:04:07 +0000153/* Create a temporary of the given type and assign the expression to it */
154static __inline__ IRTemp
155mktemp(IRType type, IRExpr *expr)
156{
157 IRTemp temp = newTemp(type);
158
159 assign(temp, expr);
160
161 return temp;
162}
163
164/* Create a unary expression */
165static __inline__ IRExpr *
166unop(IROp kind, IRExpr *op)
167{
168 return IRExpr_Unop(kind, op);
169}
170
171/* Create a binary expression */
172static __inline__ IRExpr *
173binop(IROp kind, IRExpr *op1, IRExpr *op2)
174{
175 return IRExpr_Binop(kind, op1, op2);
176}
177
178/* Create a ternary expression */
179static __inline__ IRExpr *
180triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
181{
182 return IRExpr_Triop(kind, op1, op2, op3);
183}
184
185/* Create a quaternary expression */
186static __inline__ IRExpr *
187qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
188{
189 return IRExpr_Qop(kind, op1, op2, op3, op4);
190}
191
192/* Create an expression node for an 8-bit integer constant */
193static __inline__ IRExpr *
194mkU8(UInt value)
195{
196 vassert(value < 256);
197
198 return IRExpr_Const(IRConst_U8((UChar)value));
199}
200
201/* Create an expression node for a 16-bit integer constant */
202static __inline__ IRExpr *
203mkU16(UInt value)
204{
205 vassert(value < 65536);
206
207 return IRExpr_Const(IRConst_U16((UShort)value));
208}
209
210/* Create an expression node for a 32-bit integer constant */
211static __inline__ IRExpr *
212mkU32(UInt value)
213{
214 return IRExpr_Const(IRConst_U32(value));
215}
216
217/* Create an expression node for a 64-bit integer constant */
218static __inline__ IRExpr *
219mkU64(ULong value)
220{
221 return IRExpr_Const(IRConst_U64(value));
222}
223
224/* Create an expression node for a 32-bit floating point constant
225 whose value is given by a bit pattern. */
226static __inline__ IRExpr *
227mkF32i(UInt value)
228{
229 return IRExpr_Const(IRConst_F32i(value));
230}
231
232/* Create an expression node for a 32-bit floating point constant
233 whose value is given by a bit pattern. */
234static __inline__ IRExpr *
235mkF64i(ULong value)
236{
237 return IRExpr_Const(IRConst_F64i(value));
238}
239
240/* Little helper function for my sanity. ITE = if-then-else */
241static IRExpr *
242mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
243{
244 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
245
246 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
247}
248
249/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
250static void __inline__
251store(IRExpr *addr, IRExpr *data)
252{
253 stmt(IRStmt_Store(Iend_BE, addr, data));
254}
255
256/* Create an expression that loads a TYPE sized value from ADDR.
257 This is a big-endian machine. */
258static __inline__ IRExpr *
259load(IRType type, IRExpr *addr)
260{
261 return IRExpr_Load(Iend_BE, type, addr);
262}
263
264/* Function call */
265static void
266call_function(IRExpr *callee_address)
267{
florian8844a632012-04-13 04:04:06 +0000268 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000269
florian8844a632012-04-13 04:04:06 +0000270 dis_res->whatNext = Dis_StopHere;
271 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000272}
273
floriana64c2432011-07-16 02:11:50 +0000274/* Function call with known target. */
275static void
276call_function_and_chase(Addr64 callee_address)
277{
278 if (resteer_fn(resteer_data, callee_address)) {
279 dis_res->whatNext = Dis_ResteerU;
280 dis_res->continueAt = callee_address;
281 } else {
florian8844a632012-04-13 04:04:06 +0000282 put_IA(mkaddr_expr(callee_address));
283
floriana64c2432011-07-16 02:11:50 +0000284 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000285 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000286 }
287}
288
sewardj2019a972011-03-07 16:04:07 +0000289/* Function return sequence */
290static void
291return_from_function(IRExpr *return_address)
292{
florian8844a632012-04-13 04:04:06 +0000293 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000294
florian8844a632012-04-13 04:04:06 +0000295 dis_res->whatNext = Dis_StopHere;
296 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000297}
298
299/* A conditional branch whose target is not known at instrumentation time.
300
301 if (condition) goto computed_target;
302
303 Needs to be represented as:
304
305 if (! condition) goto next_instruction;
306 goto computed_target;
307
308 This inversion is being handled at code generation time. So we just
309 take the condition here as is.
310*/
311static void
312if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
313{
314 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
315
florian8844a632012-04-13 04:04:06 +0000316 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
317 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000318
florian8844a632012-04-13 04:04:06 +0000319 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000320
florian8844a632012-04-13 04:04:06 +0000321 dis_res->whatNext = Dis_StopHere;
322 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000323}
324
325/* A conditional branch whose target is known at instrumentation time. */
326static void
327if_condition_goto(IRExpr *condition, Addr64 target)
328{
329 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
330
florian8844a632012-04-13 04:04:06 +0000331 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
332 S390X_GUEST_OFFSET(guest_IA)));
333
florian7346c7a2012-04-13 21:14:24 +0000334 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +0000335
336 dis_res->whatNext = Dis_StopHere;
337 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000338}
339
340/* An unconditional branch. Target may or may not be known at instrumentation
341 time. */
342static void
343always_goto(IRExpr *target)
344{
florian8844a632012-04-13 04:04:06 +0000345 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000346
florian8844a632012-04-13 04:04:06 +0000347 dis_res->whatNext = Dis_StopHere;
348 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000349}
350
florian8844a632012-04-13 04:04:06 +0000351
floriana64c2432011-07-16 02:11:50 +0000352/* An unconditional branch to a known target. */
353static void
354always_goto_and_chase(Addr64 target)
355{
356 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000357 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000358 dis_res->whatNext = Dis_ResteerU;
359 dis_res->continueAt = target;
360 } else {
florian8844a632012-04-13 04:04:06 +0000361 put_IA(mkaddr_expr(target));
362
363 dis_res->whatNext = Dis_StopHere;
364 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000365 }
366}
367
sewardj2019a972011-03-07 16:04:07 +0000368/* A system call */
369static void
370system_call(IRExpr *sysno)
371{
372 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000373 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000374
sewardj69007022011-04-28 20:13:45 +0000375 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000376 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
377 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000378
florian8844a632012-04-13 04:04:06 +0000379 put_IA(mkaddr_expr(guest_IA_next_instr));
380
sewardj2019a972011-03-07 16:04:07 +0000381 /* It's important that all ArchRegs carry their up-to-date value
382 at this point. So we declare an end-of-block here, which
383 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000384 dis_res->whatNext = Dis_StopHere;
385 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000386}
387
388/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
389 instructions to VEX's IRRoundingMode. */
390static IRRoundingMode
391encode_rounding_mode(UChar mode)
392{
393 switch (mode) {
394 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
395 case S390_ROUND_ZERO: return Irrm_ZERO;
396 case S390_ROUND_POSINF: return Irrm_PosINF;
397 case S390_ROUND_NEGINF: return Irrm_NegINF;
398 }
399 vpanic("encode_rounding_mode");
400}
401
402static __inline__ IRExpr *get_fpr_dw0(UInt);
403static __inline__ void put_fpr_dw0(UInt, IRExpr *);
404
405/* Read a floating point register pair and combine their contents into a
406 128-bit value */
407static IRExpr *
408get_fpr_pair(UInt archreg)
409{
410 IRExpr *high = get_fpr_dw0(archreg);
411 IRExpr *low = get_fpr_dw0(archreg + 2);
412
413 return binop(Iop_F64HLtoF128, high, low);
414}
415
416/* Write a 128-bit floating point value into a register pair. */
417static void
418put_fpr_pair(UInt archreg, IRExpr *expr)
419{
420 IRExpr *high = unop(Iop_F128HItoF64, expr);
421 IRExpr *low = unop(Iop_F128LOtoF64, expr);
422
423 put_fpr_dw0(archreg, high);
424 put_fpr_dw0(archreg + 2, low);
425}
426
427
sewardj2019a972011-03-07 16:04:07 +0000428/*------------------------------------------------------------*/
429/*--- Build the flags thunk. ---*/
430/*------------------------------------------------------------*/
431
432/* Completely fill the flags thunk. We're always filling all fields.
433 Apparently, that is better for redundant PUT elimination. */
434static void
435s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
436{
437 UInt op_off, dep1_off, dep2_off, ndep_off;
438
florian428dfdd2012-03-27 03:09:49 +0000439 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
440 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
441 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
442 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000443
444 stmt(IRStmt_Put(op_off, op));
445 stmt(IRStmt_Put(dep1_off, dep1));
446 stmt(IRStmt_Put(dep2_off, dep2));
447 stmt(IRStmt_Put(ndep_off, ndep));
448}
449
450
451/* Create an expression for V and widen the result to 64 bit. */
452static IRExpr *
453s390_cc_widen(IRTemp v, Bool sign_extend)
454{
455 IRExpr *expr;
456
457 expr = mkexpr(v);
458
459 switch (typeOfIRTemp(irsb->tyenv, v)) {
460 case Ity_I64:
461 break;
462 case Ity_I32:
463 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
464 break;
465 case Ity_I16:
466 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
467 break;
468 case Ity_I8:
469 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
470 break;
471 default:
472 vpanic("s390_cc_widen");
473 }
474
475 return expr;
476}
477
478static void
479s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
480{
481 IRExpr *op, *dep1, *dep2, *ndep;
482
483 op = mkU64(opc);
484 dep1 = s390_cc_widen(d1, sign_extend);
485 dep2 = mkU64(0);
486 ndep = mkU64(0);
487
488 s390_cc_thunk_fill(op, dep1, dep2, ndep);
489}
490
491
492static void
493s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
494{
495 IRExpr *op, *dep1, *dep2, *ndep;
496
497 op = mkU64(opc);
498 dep1 = s390_cc_widen(d1, sign_extend);
499 dep2 = s390_cc_widen(d2, sign_extend);
500 ndep = mkU64(0);
501
502 s390_cc_thunk_fill(op, dep1, dep2, ndep);
503}
504
505
506/* memcheck believes that the NDEP field in the flags thunk is always
507 defined. But for some flag computations (e.g. add with carry) that is
508 just not true. We therefore need to convey to memcheck that the value
509 of the ndep field does matter and therefore we make the DEP2 field
510 depend on it:
511
512 DEP2 = original_DEP2 ^ NDEP
513
514 In s390_calculate_cc we exploit that (a^b)^b == a
515 I.e. we xor the DEP2 value with the NDEP value to recover the
516 original_DEP2 value. */
517static void
518s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
519{
520 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
521
522 op = mkU64(opc);
523 dep1 = s390_cc_widen(d1, sign_extend);
524 dep2 = s390_cc_widen(d2, sign_extend);
525 ndep = s390_cc_widen(nd, sign_extend);
526
527 dep2x = binop(Iop_Xor64, dep2, ndep);
528
529 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
530}
531
532
533/* Write one floating point value into the flags thunk */
534static void
535s390_cc_thunk_put1f(UInt opc, IRTemp d1)
536{
537 IRExpr *op, *dep1, *dep2, *ndep;
538
539 op = mkU64(opc);
540 dep1 = mkexpr(d1);
541 dep2 = mkU64(0);
542 ndep = mkU64(0);
543
544 s390_cc_thunk_fill(op, dep1, dep2, ndep);
545}
546
547
548/* Write a floating point value and an integer into the flags thunk. The
549 integer value is zero-extended first. */
550static void
551s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
552{
553 IRExpr *op, *dep1, *dep2, *ndep;
554
555 op = mkU64(opc);
556 dep1 = mkexpr(d1);
557 dep2 = s390_cc_widen(d2, False);
558 ndep = mkU64(0);
559
560 s390_cc_thunk_fill(op, dep1, dep2, ndep);
561}
562
563
564/* Write a 128-bit floating point value into the flags thunk. This is
565 done by splitting the value into two 64-bits values. */
566static void
567s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
568{
569 IRExpr *op, *hi, *lo, *ndep;
570
571 op = mkU64(opc);
572 hi = unop(Iop_F128HItoF64, mkexpr(d1));
573 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
574 ndep = mkU64(0);
575
576 s390_cc_thunk_fill(op, hi, lo, ndep);
577}
578
579
580/* Write a 128-bit floating point value and an integer into the flags thunk.
581 The integer value is zero-extended first. */
582static void
583s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
584{
585 IRExpr *op, *hi, *lo, *lox, *ndep;
586
587 op = mkU64(opc);
588 hi = unop(Iop_F128HItoF64, mkexpr(d1));
589 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
590 ndep = s390_cc_widen(nd, False);
591
592 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
593
594 s390_cc_thunk_fill(op, hi, lox, ndep);
595}
596
597
598static void
599s390_cc_set(UInt val)
600{
601 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
602 mkU64(val), mkU64(0), mkU64(0));
603}
604
605/* Build IR to calculate the condition code from flags thunk.
606 Returns an expression of type Ity_I32 */
607static IRExpr *
608s390_call_calculate_cc(void)
609{
610 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
611
florian428dfdd2012-03-27 03:09:49 +0000612 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
613 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
614 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
615 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000616
617 args = mkIRExprVec_4(op, dep1, dep2, ndep);
618 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
619 "s390_calculate_cc", &s390_calculate_cc, args);
620
621 /* Exclude OP and NDEP from definedness checking. We're only
622 interested in DEP1 and DEP2. */
623 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
624
625 return call;
626}
627
628/* Build IR to calculate the internal condition code for a "compare and branch"
629 insn. Returns an expression of type Ity_I32 */
630static IRExpr *
631s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
632{
633 IRExpr **args, *call, *op, *dep1, *dep2;
634
635 op = mkU64(opc);
636 dep1 = s390_cc_widen(op1, sign_extend);
637 dep2 = s390_cc_widen(op2, sign_extend);
638
639 args = mkIRExprVec_3(op, dep1, dep2);
640 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
641 "s390_calculate_icc", &s390_calculate_icc, args);
642
643 /* Exclude OP from definedness checking. We're only
644 interested in DEP1 and DEP2. */
645 call->Iex.CCall.cee->mcx_mask = (1<<0);
646
647 return call;
648}
649
650/* Build IR to calculate the condition code from flags thunk.
651 Returns an expression of type Ity_I32 */
652static IRExpr *
653s390_call_calculate_cond(UInt m)
654{
655 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
656
657 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000658 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
659 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
660 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
661 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000662
663 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
664 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
665 "s390_calculate_cond", &s390_calculate_cond, args);
666
667 /* Exclude the requested condition, OP and NDEP from definedness
668 checking. We're only interested in DEP1 and DEP2. */
669 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
670
671 return call;
672}
673
674#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
675#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
676#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
677#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
678#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
679#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
680#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
681 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
682#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
683 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
684#define s390_call_calculate_iccZZ(op,dep1,dep2) \
685 s390_call_calculate_icc(op,dep1,dep2,False)
686#define s390_call_calculate_iccSS(op,dep1,dep2) \
687 s390_call_calculate_icc(op,dep1,dep2,True)
688
689
sewardj2019a972011-03-07 16:04:07 +0000690
691
692/*------------------------------------------------------------*/
693/*--- Guest register access ---*/
694/*------------------------------------------------------------*/
695
696
697/*------------------------------------------------------------*/
698/*--- ar registers ---*/
699/*------------------------------------------------------------*/
700
701/* Return the guest state offset of a ar register. */
702static UInt
703ar_offset(UInt archreg)
704{
705 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000706 S390X_GUEST_OFFSET(guest_a0),
707 S390X_GUEST_OFFSET(guest_a1),
708 S390X_GUEST_OFFSET(guest_a2),
709 S390X_GUEST_OFFSET(guest_a3),
710 S390X_GUEST_OFFSET(guest_a4),
711 S390X_GUEST_OFFSET(guest_a5),
712 S390X_GUEST_OFFSET(guest_a6),
713 S390X_GUEST_OFFSET(guest_a7),
714 S390X_GUEST_OFFSET(guest_a8),
715 S390X_GUEST_OFFSET(guest_a9),
716 S390X_GUEST_OFFSET(guest_a10),
717 S390X_GUEST_OFFSET(guest_a11),
718 S390X_GUEST_OFFSET(guest_a12),
719 S390X_GUEST_OFFSET(guest_a13),
720 S390X_GUEST_OFFSET(guest_a14),
721 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000722 };
723
724 vassert(archreg < 16);
725
726 return offset[archreg];
727}
728
729
730/* Return the guest state offset of word #0 of a ar register. */
731static __inline__ UInt
732ar_w0_offset(UInt archreg)
733{
734 return ar_offset(archreg) + 0;
735}
736
737/* Write word #0 of a ar to the guest state. */
738static __inline__ void
739put_ar_w0(UInt archreg, IRExpr *expr)
740{
741 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
742
743 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
744}
745
746/* Read word #0 of a ar register. */
747static __inline__ IRExpr *
748get_ar_w0(UInt archreg)
749{
750 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
751}
752
753
754/*------------------------------------------------------------*/
755/*--- fpr registers ---*/
756/*------------------------------------------------------------*/
757
758/* Return the guest state offset of a fpr register. */
759static UInt
760fpr_offset(UInt archreg)
761{
762 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000763 S390X_GUEST_OFFSET(guest_f0),
764 S390X_GUEST_OFFSET(guest_f1),
765 S390X_GUEST_OFFSET(guest_f2),
766 S390X_GUEST_OFFSET(guest_f3),
767 S390X_GUEST_OFFSET(guest_f4),
768 S390X_GUEST_OFFSET(guest_f5),
769 S390X_GUEST_OFFSET(guest_f6),
770 S390X_GUEST_OFFSET(guest_f7),
771 S390X_GUEST_OFFSET(guest_f8),
772 S390X_GUEST_OFFSET(guest_f9),
773 S390X_GUEST_OFFSET(guest_f10),
774 S390X_GUEST_OFFSET(guest_f11),
775 S390X_GUEST_OFFSET(guest_f12),
776 S390X_GUEST_OFFSET(guest_f13),
777 S390X_GUEST_OFFSET(guest_f14),
778 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000779 };
780
781 vassert(archreg < 16);
782
783 return offset[archreg];
784}
785
786
787/* Return the guest state offset of word #0 of a fpr register. */
788static __inline__ UInt
789fpr_w0_offset(UInt archreg)
790{
791 return fpr_offset(archreg) + 0;
792}
793
794/* Write word #0 of a fpr to the guest state. */
795static __inline__ void
796put_fpr_w0(UInt archreg, IRExpr *expr)
797{
798 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
799
800 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
801}
802
803/* Read word #0 of a fpr register. */
804static __inline__ IRExpr *
805get_fpr_w0(UInt archreg)
806{
807 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
808}
809
810/* Return the guest state offset of double word #0 of a fpr register. */
811static __inline__ UInt
812fpr_dw0_offset(UInt archreg)
813{
814 return fpr_offset(archreg) + 0;
815}
816
817/* Write double word #0 of a fpr to the guest state. */
818static __inline__ void
819put_fpr_dw0(UInt archreg, IRExpr *expr)
820{
821 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
822
823 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
824}
825
826/* Read double word #0 of a fpr register. */
827static __inline__ IRExpr *
828get_fpr_dw0(UInt archreg)
829{
830 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
831}
832
833
834/*------------------------------------------------------------*/
835/*--- gpr registers ---*/
836/*------------------------------------------------------------*/
837
838/* Return the guest state offset of a gpr register. */
839static UInt
840gpr_offset(UInt archreg)
841{
842 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000843 S390X_GUEST_OFFSET(guest_r0),
844 S390X_GUEST_OFFSET(guest_r1),
845 S390X_GUEST_OFFSET(guest_r2),
846 S390X_GUEST_OFFSET(guest_r3),
847 S390X_GUEST_OFFSET(guest_r4),
848 S390X_GUEST_OFFSET(guest_r5),
849 S390X_GUEST_OFFSET(guest_r6),
850 S390X_GUEST_OFFSET(guest_r7),
851 S390X_GUEST_OFFSET(guest_r8),
852 S390X_GUEST_OFFSET(guest_r9),
853 S390X_GUEST_OFFSET(guest_r10),
854 S390X_GUEST_OFFSET(guest_r11),
855 S390X_GUEST_OFFSET(guest_r12),
856 S390X_GUEST_OFFSET(guest_r13),
857 S390X_GUEST_OFFSET(guest_r14),
858 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000859 };
860
861 vassert(archreg < 16);
862
863 return offset[archreg];
864}
865
866
867/* Return the guest state offset of word #0 of a gpr register. */
868static __inline__ UInt
869gpr_w0_offset(UInt archreg)
870{
871 return gpr_offset(archreg) + 0;
872}
873
874/* Write word #0 of a gpr to the guest state. */
875static __inline__ void
876put_gpr_w0(UInt archreg, IRExpr *expr)
877{
878 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
879
880 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
881}
882
883/* Read word #0 of a gpr register. */
884static __inline__ IRExpr *
885get_gpr_w0(UInt archreg)
886{
887 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
888}
889
890/* Return the guest state offset of double word #0 of a gpr register. */
891static __inline__ UInt
892gpr_dw0_offset(UInt archreg)
893{
894 return gpr_offset(archreg) + 0;
895}
896
897/* Write double word #0 of a gpr to the guest state. */
898static __inline__ void
899put_gpr_dw0(UInt archreg, IRExpr *expr)
900{
901 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
902
903 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
904}
905
906/* Read double word #0 of a gpr register. */
907static __inline__ IRExpr *
908get_gpr_dw0(UInt archreg)
909{
910 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
911}
912
913/* Return the guest state offset of half word #1 of a gpr register. */
914static __inline__ UInt
915gpr_hw1_offset(UInt archreg)
916{
917 return gpr_offset(archreg) + 2;
918}
919
920/* Write half word #1 of a gpr to the guest state. */
921static __inline__ void
922put_gpr_hw1(UInt archreg, IRExpr *expr)
923{
924 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
925
926 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
927}
928
929/* Read half word #1 of a gpr register. */
930static __inline__ IRExpr *
931get_gpr_hw1(UInt archreg)
932{
933 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
934}
935
936/* Return the guest state offset of byte #6 of a gpr register. */
937static __inline__ UInt
938gpr_b6_offset(UInt archreg)
939{
940 return gpr_offset(archreg) + 6;
941}
942
943/* Write byte #6 of a gpr to the guest state. */
944static __inline__ void
945put_gpr_b6(UInt archreg, IRExpr *expr)
946{
947 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
948
949 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
950}
951
952/* Read byte #6 of a gpr register. */
953static __inline__ IRExpr *
954get_gpr_b6(UInt archreg)
955{
956 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
957}
958
959/* Return the guest state offset of byte #3 of a gpr register. */
960static __inline__ UInt
961gpr_b3_offset(UInt archreg)
962{
963 return gpr_offset(archreg) + 3;
964}
965
966/* Write byte #3 of a gpr to the guest state. */
967static __inline__ void
968put_gpr_b3(UInt archreg, IRExpr *expr)
969{
970 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
971
972 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
973}
974
975/* Read byte #3 of a gpr register. */
976static __inline__ IRExpr *
977get_gpr_b3(UInt archreg)
978{
979 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
980}
981
982/* Return the guest state offset of byte #0 of a gpr register. */
983static __inline__ UInt
984gpr_b0_offset(UInt archreg)
985{
986 return gpr_offset(archreg) + 0;
987}
988
989/* Write byte #0 of a gpr to the guest state. */
990static __inline__ void
991put_gpr_b0(UInt archreg, IRExpr *expr)
992{
993 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
994
995 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
996}
997
998/* Read byte #0 of a gpr register. */
999static __inline__ IRExpr *
1000get_gpr_b0(UInt archreg)
1001{
1002 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1003}
1004
1005/* Return the guest state offset of word #1 of a gpr register. */
1006static __inline__ UInt
1007gpr_w1_offset(UInt archreg)
1008{
1009 return gpr_offset(archreg) + 4;
1010}
1011
1012/* Write word #1 of a gpr to the guest state. */
1013static __inline__ void
1014put_gpr_w1(UInt archreg, IRExpr *expr)
1015{
1016 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1017
1018 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1019}
1020
1021/* Read word #1 of a gpr register. */
1022static __inline__ IRExpr *
1023get_gpr_w1(UInt archreg)
1024{
1025 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1026}
1027
1028/* Return the guest state offset of half word #3 of a gpr register. */
1029static __inline__ UInt
1030gpr_hw3_offset(UInt archreg)
1031{
1032 return gpr_offset(archreg) + 6;
1033}
1034
1035/* Write half word #3 of a gpr to the guest state. */
1036static __inline__ void
1037put_gpr_hw3(UInt archreg, IRExpr *expr)
1038{
1039 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1040
1041 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1042}
1043
1044/* Read half word #3 of a gpr register. */
1045static __inline__ IRExpr *
1046get_gpr_hw3(UInt archreg)
1047{
1048 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1049}
1050
1051/* Return the guest state offset of byte #7 of a gpr register. */
1052static __inline__ UInt
1053gpr_b7_offset(UInt archreg)
1054{
1055 return gpr_offset(archreg) + 7;
1056}
1057
1058/* Write byte #7 of a gpr to the guest state. */
1059static __inline__ void
1060put_gpr_b7(UInt archreg, IRExpr *expr)
1061{
1062 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1063
1064 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1065}
1066
1067/* Read byte #7 of a gpr register. */
1068static __inline__ IRExpr *
1069get_gpr_b7(UInt archreg)
1070{
1071 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1072}
1073
1074/* Return the guest state offset of half word #0 of a gpr register. */
1075static __inline__ UInt
1076gpr_hw0_offset(UInt archreg)
1077{
1078 return gpr_offset(archreg) + 0;
1079}
1080
1081/* Write half word #0 of a gpr to the guest state. */
1082static __inline__ void
1083put_gpr_hw0(UInt archreg, IRExpr *expr)
1084{
1085 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1086
1087 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1088}
1089
1090/* Read half word #0 of a gpr register. */
1091static __inline__ IRExpr *
1092get_gpr_hw0(UInt archreg)
1093{
1094 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1095}
1096
1097/* Return the guest state offset of byte #4 of a gpr register. */
1098static __inline__ UInt
1099gpr_b4_offset(UInt archreg)
1100{
1101 return gpr_offset(archreg) + 4;
1102}
1103
1104/* Write byte #4 of a gpr to the guest state. */
1105static __inline__ void
1106put_gpr_b4(UInt archreg, IRExpr *expr)
1107{
1108 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1109
1110 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1111}
1112
1113/* Read byte #4 of a gpr register. */
1114static __inline__ IRExpr *
1115get_gpr_b4(UInt archreg)
1116{
1117 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1118}
1119
1120/* Return the guest state offset of byte #1 of a gpr register. */
1121static __inline__ UInt
1122gpr_b1_offset(UInt archreg)
1123{
1124 return gpr_offset(archreg) + 1;
1125}
1126
1127/* Write byte #1 of a gpr to the guest state. */
1128static __inline__ void
1129put_gpr_b1(UInt archreg, IRExpr *expr)
1130{
1131 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1132
1133 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1134}
1135
1136/* Read byte #1 of a gpr register. */
1137static __inline__ IRExpr *
1138get_gpr_b1(UInt archreg)
1139{
1140 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1141}
1142
1143/* Return the guest state offset of half word #2 of a gpr register. */
1144static __inline__ UInt
1145gpr_hw2_offset(UInt archreg)
1146{
1147 return gpr_offset(archreg) + 4;
1148}
1149
1150/* Write half word #2 of a gpr to the guest state. */
1151static __inline__ void
1152put_gpr_hw2(UInt archreg, IRExpr *expr)
1153{
1154 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1155
1156 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1157}
1158
1159/* Read half word #2 of a gpr register. */
1160static __inline__ IRExpr *
1161get_gpr_hw2(UInt archreg)
1162{
1163 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1164}
1165
1166/* Return the guest state offset of byte #5 of a gpr register. */
1167static __inline__ UInt
1168gpr_b5_offset(UInt archreg)
1169{
1170 return gpr_offset(archreg) + 5;
1171}
1172
1173/* Write byte #5 of a gpr to the guest state. */
1174static __inline__ void
1175put_gpr_b5(UInt archreg, IRExpr *expr)
1176{
1177 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1178
1179 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1180}
1181
1182/* Read byte #5 of a gpr register. */
1183static __inline__ IRExpr *
1184get_gpr_b5(UInt archreg)
1185{
1186 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1187}
1188
1189/* Return the guest state offset of byte #2 of a gpr register. */
1190static __inline__ UInt
1191gpr_b2_offset(UInt archreg)
1192{
1193 return gpr_offset(archreg) + 2;
1194}
1195
1196/* Write byte #2 of a gpr to the guest state. */
1197static __inline__ void
1198put_gpr_b2(UInt archreg, IRExpr *expr)
1199{
1200 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1201
1202 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1203}
1204
1205/* Read byte #2 of a gpr register. */
1206static __inline__ IRExpr *
1207get_gpr_b2(UInt archreg)
1208{
1209 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1210}
1211
1212/* Return the guest state offset of the counter register. */
1213static UInt
1214counter_offset(void)
1215{
floriane88b3c92011-07-05 02:48:39 +00001216 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001217}
1218
1219/* Return the guest state offset of double word #0 of the counter register. */
1220static __inline__ UInt
1221counter_dw0_offset(void)
1222{
1223 return counter_offset() + 0;
1224}
1225
1226/* Write double word #0 of the counter to the guest state. */
1227static __inline__ void
1228put_counter_dw0(IRExpr *expr)
1229{
1230 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1231
1232 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1233}
1234
1235/* Read double word #0 of the counter register. */
1236static __inline__ IRExpr *
1237get_counter_dw0(void)
1238{
1239 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1240}
1241
1242/* Return the guest state offset of word #0 of the counter register. */
1243static __inline__ UInt
1244counter_w0_offset(void)
1245{
1246 return counter_offset() + 0;
1247}
1248
1249/* Return the guest state offset of word #1 of the counter register. */
1250static __inline__ UInt
1251counter_w1_offset(void)
1252{
1253 return counter_offset() + 4;
1254}
1255
1256/* Write word #0 of the counter to the guest state. */
1257static __inline__ void
1258put_counter_w0(IRExpr *expr)
1259{
1260 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1261
1262 stmt(IRStmt_Put(counter_w0_offset(), expr));
1263}
1264
1265/* Read word #0 of the counter register. */
1266static __inline__ IRExpr *
1267get_counter_w0(void)
1268{
1269 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1270}
1271
1272/* Write word #1 of the counter to the guest state. */
1273static __inline__ void
1274put_counter_w1(IRExpr *expr)
1275{
1276 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1277
1278 stmt(IRStmt_Put(counter_w1_offset(), expr));
1279}
1280
1281/* Read word #1 of the counter register. */
1282static __inline__ IRExpr *
1283get_counter_w1(void)
1284{
1285 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1286}
1287
1288/* Return the guest state offset of the fpc register. */
1289static UInt
1290fpc_offset(void)
1291{
floriane88b3c92011-07-05 02:48:39 +00001292 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001293}
1294
1295/* Return the guest state offset of word #0 of the fpc register. */
1296static __inline__ UInt
1297fpc_w0_offset(void)
1298{
1299 return fpc_offset() + 0;
1300}
1301
1302/* Write word #0 of the fpc to the guest state. */
1303static __inline__ void
1304put_fpc_w0(IRExpr *expr)
1305{
1306 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1307
1308 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1309}
1310
1311/* Read word #0 of the fpc register. */
1312static __inline__ IRExpr *
1313get_fpc_w0(void)
1314{
1315 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1316}
1317
1318
1319/*------------------------------------------------------------*/
1320/*--- Build IR for formats ---*/
1321/*------------------------------------------------------------*/
1322static void
1323s390_format_I(HChar *(*irgen)(UChar i),
1324 UChar i)
1325{
1326 HChar *mnm = irgen(i);
1327
sewardj7ee97522011-05-09 21:45:04 +00001328 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001329 s390_disasm(ENC2(MNM, UINT), mnm, i);
1330}
1331
1332static void
1333s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1334 UChar r1, UShort i2)
1335{
1336 irgen(r1, i2);
1337}
1338
1339static void
1340s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1341 UChar r1, UShort i2)
1342{
1343 HChar *mnm = irgen(r1, i2);
1344
sewardj7ee97522011-05-09 21:45:04 +00001345 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001346 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1347}
1348
1349static void
1350s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1351 UChar r1, UShort i2)
1352{
1353 HChar *mnm = irgen(r1, i2);
1354
sewardj7ee97522011-05-09 21:45:04 +00001355 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001356 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1357}
1358
1359static void
1360s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1361 UChar r1, UShort i2)
1362{
1363 HChar *mnm = irgen(r1, i2);
1364
sewardj7ee97522011-05-09 21:45:04 +00001365 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001366 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1367}
1368
1369static void
1370s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1371 UChar r1, UChar r3, UShort i2)
1372{
1373 HChar *mnm = irgen(r1, r3, i2);
1374
sewardj7ee97522011-05-09 21:45:04 +00001375 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001376 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1377}
1378
1379static void
1380s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1381 UChar r1, UChar r3, UShort i2)
1382{
1383 HChar *mnm = irgen(r1, r3, i2);
1384
sewardj7ee97522011-05-09 21:45:04 +00001385 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001386 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1387}
1388
1389static void
1390s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1391 UChar i5),
1392 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1393{
1394 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1395
sewardj7ee97522011-05-09 21:45:04 +00001396 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001397 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1398 i5);
1399}
1400
1401static void
1402s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1403 UChar r1, UChar r2, UShort i4, UChar m3)
1404{
1405 HChar *mnm = irgen(r1, r2, i4, m3);
1406
sewardj7ee97522011-05-09 21:45:04 +00001407 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001408 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1409 r2, m3, (Int)(Short)i4);
1410}
1411
1412static void
1413s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1414 UChar r1, UChar m3, UShort i4, UChar i2)
1415{
1416 HChar *mnm = irgen(r1, m3, i4, i2);
1417
sewardj7ee97522011-05-09 21:45:04 +00001418 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001419 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1420 r1, i2, m3, (Int)(Short)i4);
1421}
1422
1423static void
1424s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1425 UChar r1, UChar m3, UShort i4, UChar i2)
1426{
1427 HChar *mnm = irgen(r1, m3, i4, i2);
1428
sewardj7ee97522011-05-09 21:45:04 +00001429 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001430 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1431 (Int)(Char)i2, m3, (Int)(Short)i4);
1432}
1433
1434static void
1435s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1436 UChar r1, UInt i2)
1437{
1438 irgen(r1, i2);
1439}
1440
1441static void
1442s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1443 UChar r1, UInt i2)
1444{
1445 HChar *mnm = irgen(r1, i2);
1446
sewardj7ee97522011-05-09 21:45:04 +00001447 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001448 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1449}
1450
1451static void
1452s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1453 UChar r1, UInt i2)
1454{
1455 HChar *mnm = irgen(r1, i2);
1456
sewardj7ee97522011-05-09 21:45:04 +00001457 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001458 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1459}
1460
1461static void
1462s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1463 UChar r1, UInt i2)
1464{
1465 HChar *mnm = irgen(r1, i2);
1466
sewardj7ee97522011-05-09 21:45:04 +00001467 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001468 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1469}
1470
1471static void
1472s390_format_RIL_UP(HChar *(*irgen)(void),
1473 UChar r1, UInt i2)
1474{
1475 HChar *mnm = irgen();
1476
sewardj7ee97522011-05-09 21:45:04 +00001477 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001478 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1479}
1480
1481static void
1482s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1483 IRTemp op4addr),
1484 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1485{
1486 HChar *mnm;
1487 IRTemp op4addr = newTemp(Ity_I64);
1488
1489 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1490 mkU64(0)));
1491
1492 mnm = irgen(r1, m3, i2, op4addr);
1493
sewardj7ee97522011-05-09 21:45:04 +00001494 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001495 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1496 (Int)(Char)i2, m3, d4, 0, b4);
1497}
1498
1499static void
1500s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1501 IRTemp op4addr),
1502 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1503{
1504 HChar *mnm;
1505 IRTemp op4addr = newTemp(Ity_I64);
1506
1507 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1508 mkU64(0)));
1509
1510 mnm = irgen(r1, m3, i2, op4addr);
1511
sewardj7ee97522011-05-09 21:45:04 +00001512 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001513 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1514 i2, m3, d4, 0, b4);
1515}
1516
1517static void
1518s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1519 UChar r1, UChar r2)
1520{
1521 irgen(r1, r2);
1522}
1523
1524static void
1525s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1526 UChar r1, UChar r2)
1527{
1528 HChar *mnm = irgen(r1, r2);
1529
sewardj7ee97522011-05-09 21:45:04 +00001530 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001531 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1532}
1533
1534static void
1535s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1536 UChar r1, UChar r2)
1537{
1538 HChar *mnm = irgen(r1, r2);
1539
sewardj7ee97522011-05-09 21:45:04 +00001540 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001541 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1542}
1543
1544static void
1545s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1546 UChar r1, UChar r2)
1547{
1548 irgen(r1, r2);
1549}
1550
1551static void
1552s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1553 UChar r1, UChar r2)
1554{
1555 HChar *mnm = irgen(r1, r2);
1556
sewardj7ee97522011-05-09 21:45:04 +00001557 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001558 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1559}
1560
1561static void
1562s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1563 UChar r1, UChar r2)
1564{
1565 HChar *mnm = irgen(r1, r2);
1566
sewardj7ee97522011-05-09 21:45:04 +00001567 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001568 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1569}
1570
1571static void
1572s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1573 UChar r1, UChar r2)
1574{
1575 HChar *mnm = irgen(r1, r2);
1576
sewardj7ee97522011-05-09 21:45:04 +00001577 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001578 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1579}
1580
1581static void
1582s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1583 UChar r1, UChar r2)
1584{
1585 HChar *mnm = irgen(r1, r2);
1586
sewardj7ee97522011-05-09 21:45:04 +00001587 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001588 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1589}
1590
1591static void
1592s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1593 UChar r1)
1594{
1595 HChar *mnm = irgen(r1);
1596
sewardj7ee97522011-05-09 21:45:04 +00001597 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001598 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1599}
1600
1601static void
1602s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1603 UChar r1)
1604{
1605 HChar *mnm = irgen(r1);
1606
sewardj7ee97522011-05-09 21:45:04 +00001607 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001608 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1609}
1610
1611static void
florian9af37692012-01-15 21:01:16 +00001612s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1613 UChar m3, UChar r1, UChar r2)
1614{
1615 irgen(m3, r1, r2);
1616
1617 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1618 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1619}
1620
1621static void
sewardj2019a972011-03-07 16:04:07 +00001622s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1623 UChar r1, UChar r3, UChar r2)
1624{
1625 HChar *mnm = irgen(r1, r3, r2);
1626
sewardj7ee97522011-05-09 21:45:04 +00001627 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001628 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1629}
1630
1631static void
sewardjd7bde722011-04-05 13:19:33 +00001632s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1633 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1634{
1635 irgen(m3, r1, r2);
1636
sewardj7ee97522011-05-09 21:45:04 +00001637 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001638 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1639}
1640
1641static void
sewardj2019a972011-03-07 16:04:07 +00001642s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1643 UChar r3, UChar r1, UChar r2)
1644{
1645 HChar *mnm = irgen(r3, r1, r2);
1646
sewardj7ee97522011-05-09 21:45:04 +00001647 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001648 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1649}
1650
1651static void
1652s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1653 UChar r3, UChar r1, UChar r2)
1654{
1655 HChar *mnm = irgen(r3, r1, r2);
1656
sewardj7ee97522011-05-09 21:45:04 +00001657 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001658 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1659}
1660
1661static void
1662s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1663 UChar r3, UChar r1, UChar r2)
1664{
1665 HChar *mnm = irgen(r3, r1, r2);
1666
sewardj7ee97522011-05-09 21:45:04 +00001667 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001668 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1669}
1670
1671static void
1672s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1673 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1674{
1675 HChar *mnm;
1676 IRTemp op4addr = newTemp(Ity_I64);
1677
1678 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1679 mkU64(0)));
1680
1681 mnm = irgen(r1, r2, m3, op4addr);
1682
sewardj7ee97522011-05-09 21:45:04 +00001683 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001684 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1685 r2, m3, d4, 0, b4);
1686}
1687
1688static void
1689s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1690 UChar r1, UChar b2, UShort d2)
1691{
1692 HChar *mnm;
1693 IRTemp op2addr = newTemp(Ity_I64);
1694
1695 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1696 mkU64(0)));
1697
1698 mnm = irgen(r1, op2addr);
1699
sewardj7ee97522011-05-09 21:45:04 +00001700 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001701 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1702}
1703
1704static void
1705s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1706 UChar r1, UChar r3, UChar b2, UShort d2)
1707{
1708 HChar *mnm;
1709 IRTemp op2addr = newTemp(Ity_I64);
1710
1711 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1712 mkU64(0)));
1713
1714 mnm = irgen(r1, r3, op2addr);
1715
sewardj7ee97522011-05-09 21:45:04 +00001716 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001717 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1718}
1719
1720static void
1721s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1722 UChar r1, UChar r3, UChar b2, UShort d2)
1723{
1724 HChar *mnm;
1725 IRTemp op2addr = newTemp(Ity_I64);
1726
1727 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1728 mkU64(0)));
1729
1730 mnm = irgen(r1, r3, op2addr);
1731
sewardj7ee97522011-05-09 21:45:04 +00001732 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001733 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1734}
1735
1736static void
1737s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1738 UChar r1, UChar r3, UChar b2, UShort d2)
1739{
1740 HChar *mnm;
1741 IRTemp op2addr = newTemp(Ity_I64);
1742
1743 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1744 mkU64(0)));
1745
1746 mnm = irgen(r1, r3, op2addr);
1747
sewardj7ee97522011-05-09 21:45:04 +00001748 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001749 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1750}
1751
1752static void
1753s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1754 UChar r1, UChar r3, UShort i2)
1755{
1756 HChar *mnm = irgen(r1, r3, i2);
1757
sewardj7ee97522011-05-09 21:45:04 +00001758 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001759 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1760}
1761
1762static void
1763s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1764 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1765{
1766 HChar *mnm;
1767 IRTemp op2addr = newTemp(Ity_I64);
1768 IRTemp d2 = newTemp(Ity_I64);
1769
1770 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1771 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1772 mkU64(0)));
1773
1774 mnm = irgen(r1, r3, op2addr);
1775
sewardj7ee97522011-05-09 21:45:04 +00001776 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001777 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1778}
1779
1780static void
1781s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1782 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1783{
1784 HChar *mnm;
1785 IRTemp op2addr = newTemp(Ity_I64);
1786 IRTemp d2 = newTemp(Ity_I64);
1787
1788 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1789 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1790 mkU64(0)));
1791
1792 mnm = irgen(r1, r3, op2addr);
1793
sewardj7ee97522011-05-09 21:45:04 +00001794 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001795 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1796}
1797
1798static void
1799s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1800 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1801{
1802 HChar *mnm;
1803 IRTemp op2addr = newTemp(Ity_I64);
1804 IRTemp d2 = newTemp(Ity_I64);
1805
1806 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1807 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1808 mkU64(0)));
1809
1810 mnm = irgen(r1, r3, op2addr);
1811
sewardj7ee97522011-05-09 21:45:04 +00001812 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001813 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1814}
1815
1816static void
sewardjd7bde722011-04-05 13:19:33 +00001817s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1818 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1819 Int xmnm_kind)
1820{
1821 IRTemp op2addr = newTemp(Ity_I64);
1822 IRTemp d2 = newTemp(Ity_I64);
1823
1824 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1825 guest_IA_next_instr);
1826 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1827 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1828 mkU64(0)));
1829
1830 irgen(r1, op2addr);
florianf9e1ed72012-04-17 02:41:56 +00001831 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00001832
sewardj7ee97522011-05-09 21:45:04 +00001833 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001834 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1835}
1836
1837static void
sewardj2019a972011-03-07 16:04:07 +00001838s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1839 IRTemp op2addr),
1840 UChar r1, UChar x2, UChar b2, UShort d2)
1841{
1842 IRTemp op2addr = newTemp(Ity_I64);
1843
1844 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1845 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1846 mkU64(0)));
1847
1848 irgen(r1, x2, b2, d2, op2addr);
1849}
1850
1851static void
1852s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1853 UChar r1, UChar x2, UChar b2, UShort d2)
1854{
1855 HChar *mnm;
1856 IRTemp op2addr = newTemp(Ity_I64);
1857
1858 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1859 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1860 mkU64(0)));
1861
1862 mnm = irgen(r1, op2addr);
1863
sewardj7ee97522011-05-09 21:45:04 +00001864 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001865 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1866}
1867
1868static void
1869s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1870 UChar r1, UChar x2, UChar b2, UShort d2)
1871{
1872 HChar *mnm;
1873 IRTemp op2addr = newTemp(Ity_I64);
1874
1875 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1876 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1877 mkU64(0)));
1878
1879 mnm = irgen(r1, op2addr);
1880
sewardj7ee97522011-05-09 21:45:04 +00001881 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001882 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1883}
1884
1885static void
1886s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1887 UChar r1, UChar x2, UChar b2, UShort d2)
1888{
1889 HChar *mnm;
1890 IRTemp op2addr = newTemp(Ity_I64);
1891
1892 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1893 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1894 mkU64(0)));
1895
1896 mnm = irgen(r1, op2addr);
1897
sewardj7ee97522011-05-09 21:45:04 +00001898 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001899 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1900}
1901
1902static void
1903s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1904 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1905{
1906 HChar *mnm;
1907 IRTemp op2addr = newTemp(Ity_I64);
1908
1909 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1910 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1911 mkU64(0)));
1912
1913 mnm = irgen(r3, op2addr, r1);
1914
sewardj7ee97522011-05-09 21:45:04 +00001915 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001916 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1917}
1918
1919static void
1920s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1921 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1922{
1923 HChar *mnm;
1924 IRTemp op2addr = newTemp(Ity_I64);
1925 IRTemp d2 = newTemp(Ity_I64);
1926
1927 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1928 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1929 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1930 mkU64(0)));
1931
1932 mnm = irgen(r1, op2addr);
1933
sewardj7ee97522011-05-09 21:45:04 +00001934 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001935 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1936}
1937
1938static void
1939s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1940 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1941{
1942 HChar *mnm;
1943 IRTemp op2addr = newTemp(Ity_I64);
1944 IRTemp d2 = newTemp(Ity_I64);
1945
1946 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1947 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1948 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1949 mkU64(0)));
1950
1951 mnm = irgen(r1, op2addr);
1952
sewardj7ee97522011-05-09 21:45:04 +00001953 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001954 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1955}
1956
1957static void
1958s390_format_RXY_URRD(HChar *(*irgen)(void),
1959 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1960{
1961 HChar *mnm;
1962 IRTemp op2addr = newTemp(Ity_I64);
1963 IRTemp d2 = newTemp(Ity_I64);
1964
1965 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1966 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1967 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1968 mkU64(0)));
1969
1970 mnm = irgen();
1971
sewardj7ee97522011-05-09 21:45:04 +00001972 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001973 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1974}
1975
1976static void
1977s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1978 UChar b2, UShort d2)
1979{
1980 HChar *mnm;
1981 IRTemp op2addr = newTemp(Ity_I64);
1982
1983 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1984 mkU64(0)));
1985
1986 mnm = irgen(op2addr);
1987
sewardj7ee97522011-05-09 21:45:04 +00001988 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001989 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1990}
1991
1992static void
1993s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1994 UChar i2, UChar b1, UShort d1)
1995{
1996 HChar *mnm;
1997 IRTemp op1addr = newTemp(Ity_I64);
1998
1999 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2000 mkU64(0)));
2001
2002 mnm = irgen(i2, op1addr);
2003
sewardj7ee97522011-05-09 21:45:04 +00002004 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002005 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2006}
2007
2008static void
2009s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2010 UChar i2, UChar b1, UShort dl1, UChar dh1)
2011{
2012 HChar *mnm;
2013 IRTemp op1addr = newTemp(Ity_I64);
2014 IRTemp d1 = newTemp(Ity_I64);
2015
2016 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2017 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2018 mkU64(0)));
2019
2020 mnm = irgen(i2, op1addr);
2021
sewardj7ee97522011-05-09 21:45:04 +00002022 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002023 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2024}
2025
2026static void
2027s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2028 UChar i2, UChar b1, UShort dl1, UChar dh1)
2029{
2030 HChar *mnm;
2031 IRTemp op1addr = newTemp(Ity_I64);
2032 IRTemp d1 = newTemp(Ity_I64);
2033
2034 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2035 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2036 mkU64(0)));
2037
2038 mnm = irgen(i2, op1addr);
2039
sewardj7ee97522011-05-09 21:45:04 +00002040 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002041 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2042}
2043
2044static void
2045s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2046 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2047{
2048 HChar *mnm;
2049 IRTemp op1addr = newTemp(Ity_I64);
2050 IRTemp op2addr = newTemp(Ity_I64);
2051
2052 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2053 mkU64(0)));
2054 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2055 mkU64(0)));
2056
2057 mnm = irgen(l, op1addr, op2addr);
2058
sewardj7ee97522011-05-09 21:45:04 +00002059 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002060 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2061}
2062
2063static void
2064s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2065 UChar b1, UShort d1, UShort i2)
2066{
2067 HChar *mnm;
2068 IRTemp op1addr = newTemp(Ity_I64);
2069
2070 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2071 mkU64(0)));
2072
2073 mnm = irgen(i2, op1addr);
2074
sewardj7ee97522011-05-09 21:45:04 +00002075 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002076 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2077}
2078
2079static void
2080s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2081 UChar b1, UShort d1, UShort i2)
2082{
2083 HChar *mnm;
2084 IRTemp op1addr = newTemp(Ity_I64);
2085
2086 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2087 mkU64(0)));
2088
2089 mnm = irgen(i2, op1addr);
2090
sewardj7ee97522011-05-09 21:45:04 +00002091 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002092 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2093}
2094
2095
2096
2097/*------------------------------------------------------------*/
2098/*--- Build IR for opcodes ---*/
2099/*------------------------------------------------------------*/
2100
2101static HChar *
florian30e89012011-08-08 18:22:58 +00002102s390_irgen_00(UChar r1 __attribute__((unused)),
2103 UChar r2 __attribute__((unused)))
2104{
2105 IRDirty *d;
2106
2107 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2108 mkIRExprVec_0());
2109 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2110
2111 d->fxState[0].fx = Ifx_Modify; /* read then write */
2112 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2113 d->fxState[0].size = sizeof(ULong);
2114 d->nFxState = 1;
2115
2116 stmt(IRStmt_Dirty(d));
2117
2118 return "00";
2119}
2120
2121static HChar *
sewardj2019a972011-03-07 16:04:07 +00002122s390_irgen_AR(UChar r1, UChar r2)
2123{
2124 IRTemp op1 = newTemp(Ity_I32);
2125 IRTemp op2 = newTemp(Ity_I32);
2126 IRTemp result = newTemp(Ity_I32);
2127
2128 assign(op1, get_gpr_w1(r1));
2129 assign(op2, get_gpr_w1(r2));
2130 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2131 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2132 put_gpr_w1(r1, mkexpr(result));
2133
2134 return "ar";
2135}
2136
2137static HChar *
2138s390_irgen_AGR(UChar r1, UChar r2)
2139{
2140 IRTemp op1 = newTemp(Ity_I64);
2141 IRTemp op2 = newTemp(Ity_I64);
2142 IRTemp result = newTemp(Ity_I64);
2143
2144 assign(op1, get_gpr_dw0(r1));
2145 assign(op2, get_gpr_dw0(r2));
2146 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2147 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2148 put_gpr_dw0(r1, mkexpr(result));
2149
2150 return "agr";
2151}
2152
2153static HChar *
2154s390_irgen_AGFR(UChar r1, UChar r2)
2155{
2156 IRTemp op1 = newTemp(Ity_I64);
2157 IRTemp op2 = newTemp(Ity_I64);
2158 IRTemp result = newTemp(Ity_I64);
2159
2160 assign(op1, get_gpr_dw0(r1));
2161 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2162 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2163 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2164 put_gpr_dw0(r1, mkexpr(result));
2165
2166 return "agfr";
2167}
2168
2169static HChar *
2170s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2171{
2172 IRTemp op2 = newTemp(Ity_I32);
2173 IRTemp op3 = newTemp(Ity_I32);
2174 IRTemp result = newTemp(Ity_I32);
2175
2176 assign(op2, get_gpr_w1(r2));
2177 assign(op3, get_gpr_w1(r3));
2178 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2179 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2180 put_gpr_w1(r1, mkexpr(result));
2181
2182 return "ark";
2183}
2184
2185static HChar *
2186s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2187{
2188 IRTemp op2 = newTemp(Ity_I64);
2189 IRTemp op3 = newTemp(Ity_I64);
2190 IRTemp result = newTemp(Ity_I64);
2191
2192 assign(op2, get_gpr_dw0(r2));
2193 assign(op3, get_gpr_dw0(r3));
2194 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2195 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2196 put_gpr_dw0(r1, mkexpr(result));
2197
2198 return "agrk";
2199}
2200
2201static HChar *
2202s390_irgen_A(UChar r1, IRTemp op2addr)
2203{
2204 IRTemp op1 = newTemp(Ity_I32);
2205 IRTemp op2 = newTemp(Ity_I32);
2206 IRTemp result = newTemp(Ity_I32);
2207
2208 assign(op1, get_gpr_w1(r1));
2209 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2210 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2211 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2212 put_gpr_w1(r1, mkexpr(result));
2213
2214 return "a";
2215}
2216
2217static HChar *
2218s390_irgen_AY(UChar r1, IRTemp op2addr)
2219{
2220 IRTemp op1 = newTemp(Ity_I32);
2221 IRTemp op2 = newTemp(Ity_I32);
2222 IRTemp result = newTemp(Ity_I32);
2223
2224 assign(op1, get_gpr_w1(r1));
2225 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2226 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2227 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2228 put_gpr_w1(r1, mkexpr(result));
2229
2230 return "ay";
2231}
2232
2233static HChar *
2234s390_irgen_AG(UChar r1, IRTemp op2addr)
2235{
2236 IRTemp op1 = newTemp(Ity_I64);
2237 IRTemp op2 = newTemp(Ity_I64);
2238 IRTemp result = newTemp(Ity_I64);
2239
2240 assign(op1, get_gpr_dw0(r1));
2241 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2242 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2243 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2244 put_gpr_dw0(r1, mkexpr(result));
2245
2246 return "ag";
2247}
2248
2249static HChar *
2250s390_irgen_AGF(UChar r1, IRTemp op2addr)
2251{
2252 IRTemp op1 = newTemp(Ity_I64);
2253 IRTemp op2 = newTemp(Ity_I64);
2254 IRTemp result = newTemp(Ity_I64);
2255
2256 assign(op1, get_gpr_dw0(r1));
2257 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2258 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2259 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2260 put_gpr_dw0(r1, mkexpr(result));
2261
2262 return "agf";
2263}
2264
2265static HChar *
2266s390_irgen_AFI(UChar r1, UInt i2)
2267{
2268 IRTemp op1 = newTemp(Ity_I32);
2269 Int op2;
2270 IRTemp result = newTemp(Ity_I32);
2271
2272 assign(op1, get_gpr_w1(r1));
2273 op2 = (Int)i2;
2274 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2275 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2276 mkU32((UInt)op2)));
2277 put_gpr_w1(r1, mkexpr(result));
2278
2279 return "afi";
2280}
2281
2282static HChar *
2283s390_irgen_AGFI(UChar r1, UInt i2)
2284{
2285 IRTemp op1 = newTemp(Ity_I64);
2286 Long op2;
2287 IRTemp result = newTemp(Ity_I64);
2288
2289 assign(op1, get_gpr_dw0(r1));
2290 op2 = (Long)(Int)i2;
2291 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2292 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2293 mkU64((ULong)op2)));
2294 put_gpr_dw0(r1, mkexpr(result));
2295
2296 return "agfi";
2297}
2298
2299static HChar *
2300s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2301{
2302 Int op2;
2303 IRTemp op3 = newTemp(Ity_I32);
2304 IRTemp result = newTemp(Ity_I32);
2305
2306 op2 = (Int)(Short)i2;
2307 assign(op3, get_gpr_w1(r3));
2308 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2309 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2310 op2)), op3);
2311 put_gpr_w1(r1, mkexpr(result));
2312
2313 return "ahik";
2314}
2315
2316static HChar *
2317s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2318{
2319 Long op2;
2320 IRTemp op3 = newTemp(Ity_I64);
2321 IRTemp result = newTemp(Ity_I64);
2322
2323 op2 = (Long)(Short)i2;
2324 assign(op3, get_gpr_dw0(r3));
2325 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2326 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2327 op2)), op3);
2328 put_gpr_dw0(r1, mkexpr(result));
2329
2330 return "aghik";
2331}
2332
2333static HChar *
2334s390_irgen_ASI(UChar i2, IRTemp op1addr)
2335{
2336 IRTemp op1 = newTemp(Ity_I32);
2337 Int op2;
2338 IRTemp result = newTemp(Ity_I32);
2339
2340 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2341 op2 = (Int)(Char)i2;
2342 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2343 store(mkexpr(op1addr), mkexpr(result));
2344 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2345 mkU32((UInt)op2)));
2346
2347 return "asi";
2348}
2349
2350static HChar *
2351s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2352{
2353 IRTemp op1 = newTemp(Ity_I64);
2354 Long op2;
2355 IRTemp result = newTemp(Ity_I64);
2356
2357 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2358 op2 = (Long)(Char)i2;
2359 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2360 store(mkexpr(op1addr), mkexpr(result));
2361 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2362 mkU64((ULong)op2)));
2363
2364 return "agsi";
2365}
2366
2367static HChar *
2368s390_irgen_AH(UChar r1, IRTemp op2addr)
2369{
2370 IRTemp op1 = newTemp(Ity_I32);
2371 IRTemp op2 = newTemp(Ity_I32);
2372 IRTemp result = newTemp(Ity_I32);
2373
2374 assign(op1, get_gpr_w1(r1));
2375 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2376 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2377 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2378 put_gpr_w1(r1, mkexpr(result));
2379
2380 return "ah";
2381}
2382
2383static HChar *
2384s390_irgen_AHY(UChar r1, IRTemp op2addr)
2385{
2386 IRTemp op1 = newTemp(Ity_I32);
2387 IRTemp op2 = newTemp(Ity_I32);
2388 IRTemp result = newTemp(Ity_I32);
2389
2390 assign(op1, get_gpr_w1(r1));
2391 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2392 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2393 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2394 put_gpr_w1(r1, mkexpr(result));
2395
2396 return "ahy";
2397}
2398
2399static HChar *
2400s390_irgen_AHI(UChar r1, UShort i2)
2401{
2402 IRTemp op1 = newTemp(Ity_I32);
2403 Int op2;
2404 IRTemp result = newTemp(Ity_I32);
2405
2406 assign(op1, get_gpr_w1(r1));
2407 op2 = (Int)(Short)i2;
2408 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2409 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2410 mkU32((UInt)op2)));
2411 put_gpr_w1(r1, mkexpr(result));
2412
2413 return "ahi";
2414}
2415
2416static HChar *
2417s390_irgen_AGHI(UChar r1, UShort i2)
2418{
2419 IRTemp op1 = newTemp(Ity_I64);
2420 Long op2;
2421 IRTemp result = newTemp(Ity_I64);
2422
2423 assign(op1, get_gpr_dw0(r1));
2424 op2 = (Long)(Short)i2;
2425 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2426 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2427 mkU64((ULong)op2)));
2428 put_gpr_dw0(r1, mkexpr(result));
2429
2430 return "aghi";
2431}
2432
2433static HChar *
2434s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2435{
2436 IRTemp op2 = newTemp(Ity_I32);
2437 IRTemp op3 = newTemp(Ity_I32);
2438 IRTemp result = newTemp(Ity_I32);
2439
2440 assign(op2, get_gpr_w0(r2));
2441 assign(op3, get_gpr_w0(r3));
2442 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2443 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2444 put_gpr_w0(r1, mkexpr(result));
2445
2446 return "ahhhr";
2447}
2448
2449static HChar *
2450s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2451{
2452 IRTemp op2 = newTemp(Ity_I32);
2453 IRTemp op3 = newTemp(Ity_I32);
2454 IRTemp result = newTemp(Ity_I32);
2455
2456 assign(op2, get_gpr_w0(r2));
2457 assign(op3, get_gpr_w1(r3));
2458 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2459 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2460 put_gpr_w0(r1, mkexpr(result));
2461
2462 return "ahhlr";
2463}
2464
2465static HChar *
2466s390_irgen_AIH(UChar r1, UInt i2)
2467{
2468 IRTemp op1 = newTemp(Ity_I32);
2469 Int op2;
2470 IRTemp result = newTemp(Ity_I32);
2471
2472 assign(op1, get_gpr_w0(r1));
2473 op2 = (Int)i2;
2474 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2475 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2476 mkU32((UInt)op2)));
2477 put_gpr_w0(r1, mkexpr(result));
2478
2479 return "aih";
2480}
2481
2482static HChar *
2483s390_irgen_ALR(UChar r1, UChar r2)
2484{
2485 IRTemp op1 = newTemp(Ity_I32);
2486 IRTemp op2 = newTemp(Ity_I32);
2487 IRTemp result = newTemp(Ity_I32);
2488
2489 assign(op1, get_gpr_w1(r1));
2490 assign(op2, get_gpr_w1(r2));
2491 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2492 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2493 put_gpr_w1(r1, mkexpr(result));
2494
2495 return "alr";
2496}
2497
2498static HChar *
2499s390_irgen_ALGR(UChar r1, UChar r2)
2500{
2501 IRTemp op1 = newTemp(Ity_I64);
2502 IRTemp op2 = newTemp(Ity_I64);
2503 IRTemp result = newTemp(Ity_I64);
2504
2505 assign(op1, get_gpr_dw0(r1));
2506 assign(op2, get_gpr_dw0(r2));
2507 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2508 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2509 put_gpr_dw0(r1, mkexpr(result));
2510
2511 return "algr";
2512}
2513
2514static HChar *
2515s390_irgen_ALGFR(UChar r1, UChar r2)
2516{
2517 IRTemp op1 = newTemp(Ity_I64);
2518 IRTemp op2 = newTemp(Ity_I64);
2519 IRTemp result = newTemp(Ity_I64);
2520
2521 assign(op1, get_gpr_dw0(r1));
2522 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2523 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2524 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2525 put_gpr_dw0(r1, mkexpr(result));
2526
2527 return "algfr";
2528}
2529
2530static HChar *
2531s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2532{
2533 IRTemp op2 = newTemp(Ity_I32);
2534 IRTemp op3 = newTemp(Ity_I32);
2535 IRTemp result = newTemp(Ity_I32);
2536
2537 assign(op2, get_gpr_w1(r2));
2538 assign(op3, get_gpr_w1(r3));
2539 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2540 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2541 put_gpr_w1(r1, mkexpr(result));
2542
2543 return "alrk";
2544}
2545
2546static HChar *
2547s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2548{
2549 IRTemp op2 = newTemp(Ity_I64);
2550 IRTemp op3 = newTemp(Ity_I64);
2551 IRTemp result = newTemp(Ity_I64);
2552
2553 assign(op2, get_gpr_dw0(r2));
2554 assign(op3, get_gpr_dw0(r3));
2555 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2556 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2557 put_gpr_dw0(r1, mkexpr(result));
2558
2559 return "algrk";
2560}
2561
2562static HChar *
2563s390_irgen_AL(UChar r1, IRTemp op2addr)
2564{
2565 IRTemp op1 = newTemp(Ity_I32);
2566 IRTemp op2 = newTemp(Ity_I32);
2567 IRTemp result = newTemp(Ity_I32);
2568
2569 assign(op1, get_gpr_w1(r1));
2570 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2571 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2572 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2573 put_gpr_w1(r1, mkexpr(result));
2574
2575 return "al";
2576}
2577
2578static HChar *
2579s390_irgen_ALY(UChar r1, IRTemp op2addr)
2580{
2581 IRTemp op1 = newTemp(Ity_I32);
2582 IRTemp op2 = newTemp(Ity_I32);
2583 IRTemp result = newTemp(Ity_I32);
2584
2585 assign(op1, get_gpr_w1(r1));
2586 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2587 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2588 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2589 put_gpr_w1(r1, mkexpr(result));
2590
2591 return "aly";
2592}
2593
2594static HChar *
2595s390_irgen_ALG(UChar r1, IRTemp op2addr)
2596{
2597 IRTemp op1 = newTemp(Ity_I64);
2598 IRTemp op2 = newTemp(Ity_I64);
2599 IRTemp result = newTemp(Ity_I64);
2600
2601 assign(op1, get_gpr_dw0(r1));
2602 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2603 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2604 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2605 put_gpr_dw0(r1, mkexpr(result));
2606
2607 return "alg";
2608}
2609
2610static HChar *
2611s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2612{
2613 IRTemp op1 = newTemp(Ity_I64);
2614 IRTemp op2 = newTemp(Ity_I64);
2615 IRTemp result = newTemp(Ity_I64);
2616
2617 assign(op1, get_gpr_dw0(r1));
2618 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2619 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2620 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2621 put_gpr_dw0(r1, mkexpr(result));
2622
2623 return "algf";
2624}
2625
2626static HChar *
2627s390_irgen_ALFI(UChar r1, UInt i2)
2628{
2629 IRTemp op1 = newTemp(Ity_I32);
2630 UInt op2;
2631 IRTemp result = newTemp(Ity_I32);
2632
2633 assign(op1, get_gpr_w1(r1));
2634 op2 = i2;
2635 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2636 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2637 mkU32(op2)));
2638 put_gpr_w1(r1, mkexpr(result));
2639
2640 return "alfi";
2641}
2642
2643static HChar *
2644s390_irgen_ALGFI(UChar r1, UInt i2)
2645{
2646 IRTemp op1 = newTemp(Ity_I64);
2647 ULong op2;
2648 IRTemp result = newTemp(Ity_I64);
2649
2650 assign(op1, get_gpr_dw0(r1));
2651 op2 = (ULong)i2;
2652 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2653 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2654 mkU64(op2)));
2655 put_gpr_dw0(r1, mkexpr(result));
2656
2657 return "algfi";
2658}
2659
2660static HChar *
2661s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2662{
2663 IRTemp op2 = newTemp(Ity_I32);
2664 IRTemp op3 = newTemp(Ity_I32);
2665 IRTemp result = newTemp(Ity_I32);
2666
2667 assign(op2, get_gpr_w0(r2));
2668 assign(op3, get_gpr_w0(r3));
2669 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2670 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2671 put_gpr_w0(r1, mkexpr(result));
2672
2673 return "alhhhr";
2674}
2675
2676static HChar *
2677s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2678{
2679 IRTemp op2 = newTemp(Ity_I32);
2680 IRTemp op3 = newTemp(Ity_I32);
2681 IRTemp result = newTemp(Ity_I32);
2682
2683 assign(op2, get_gpr_w0(r2));
2684 assign(op3, get_gpr_w1(r3));
2685 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2686 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2687 put_gpr_w0(r1, mkexpr(result));
2688
2689 return "alhhlr";
2690}
2691
2692static HChar *
2693s390_irgen_ALCR(UChar r1, UChar r2)
2694{
2695 IRTemp op1 = newTemp(Ity_I32);
2696 IRTemp op2 = newTemp(Ity_I32);
2697 IRTemp result = newTemp(Ity_I32);
2698 IRTemp carry_in = newTemp(Ity_I32);
2699
2700 assign(op1, get_gpr_w1(r1));
2701 assign(op2, get_gpr_w1(r2));
2702 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2703 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2704 mkexpr(carry_in)));
2705 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2706 put_gpr_w1(r1, mkexpr(result));
2707
2708 return "alcr";
2709}
2710
2711static HChar *
2712s390_irgen_ALCGR(UChar r1, UChar r2)
2713{
2714 IRTemp op1 = newTemp(Ity_I64);
2715 IRTemp op2 = newTemp(Ity_I64);
2716 IRTemp result = newTemp(Ity_I64);
2717 IRTemp carry_in = newTemp(Ity_I64);
2718
2719 assign(op1, get_gpr_dw0(r1));
2720 assign(op2, get_gpr_dw0(r2));
2721 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2722 mkU8(1))));
2723 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2724 mkexpr(carry_in)));
2725 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2726 put_gpr_dw0(r1, mkexpr(result));
2727
2728 return "alcgr";
2729}
2730
2731static HChar *
2732s390_irgen_ALC(UChar r1, IRTemp op2addr)
2733{
2734 IRTemp op1 = newTemp(Ity_I32);
2735 IRTemp op2 = newTemp(Ity_I32);
2736 IRTemp result = newTemp(Ity_I32);
2737 IRTemp carry_in = newTemp(Ity_I32);
2738
2739 assign(op1, get_gpr_w1(r1));
2740 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2741 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2742 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2743 mkexpr(carry_in)));
2744 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2745 put_gpr_w1(r1, mkexpr(result));
2746
2747 return "alc";
2748}
2749
2750static HChar *
2751s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2752{
2753 IRTemp op1 = newTemp(Ity_I64);
2754 IRTemp op2 = newTemp(Ity_I64);
2755 IRTemp result = newTemp(Ity_I64);
2756 IRTemp carry_in = newTemp(Ity_I64);
2757
2758 assign(op1, get_gpr_dw0(r1));
2759 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2760 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2761 mkU8(1))));
2762 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2763 mkexpr(carry_in)));
2764 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2765 put_gpr_dw0(r1, mkexpr(result));
2766
2767 return "alcg";
2768}
2769
2770static HChar *
2771s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2772{
2773 IRTemp op1 = newTemp(Ity_I32);
2774 UInt op2;
2775 IRTemp result = newTemp(Ity_I32);
2776
2777 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2778 op2 = (UInt)(Int)(Char)i2;
2779 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2780 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2781 mkU32(op2)));
2782 store(mkexpr(op1addr), mkexpr(result));
2783
2784 return "alsi";
2785}
2786
2787static HChar *
2788s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2789{
2790 IRTemp op1 = newTemp(Ity_I64);
2791 ULong op2;
2792 IRTemp result = newTemp(Ity_I64);
2793
2794 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2795 op2 = (ULong)(Long)(Char)i2;
2796 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2797 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2798 mkU64(op2)));
2799 store(mkexpr(op1addr), mkexpr(result));
2800
2801 return "algsi";
2802}
2803
2804static HChar *
2805s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2806{
2807 UInt op2;
2808 IRTemp op3 = newTemp(Ity_I32);
2809 IRTemp result = newTemp(Ity_I32);
2810
2811 op2 = (UInt)(Int)(Short)i2;
2812 assign(op3, get_gpr_w1(r3));
2813 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2814 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2815 op3);
2816 put_gpr_w1(r1, mkexpr(result));
2817
2818 return "alhsik";
2819}
2820
2821static HChar *
2822s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2823{
2824 ULong op2;
2825 IRTemp op3 = newTemp(Ity_I64);
2826 IRTemp result = newTemp(Ity_I64);
2827
2828 op2 = (ULong)(Long)(Short)i2;
2829 assign(op3, get_gpr_dw0(r3));
2830 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2831 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2832 op3);
2833 put_gpr_dw0(r1, mkexpr(result));
2834
2835 return "alghsik";
2836}
2837
2838static HChar *
2839s390_irgen_ALSIH(UChar r1, UInt i2)
2840{
2841 IRTemp op1 = newTemp(Ity_I32);
2842 UInt op2;
2843 IRTemp result = newTemp(Ity_I32);
2844
2845 assign(op1, get_gpr_w0(r1));
2846 op2 = i2;
2847 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2848 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2849 mkU32(op2)));
2850 put_gpr_w0(r1, mkexpr(result));
2851
2852 return "alsih";
2853}
2854
2855static HChar *
2856s390_irgen_ALSIHN(UChar r1, UInt i2)
2857{
2858 IRTemp op1 = newTemp(Ity_I32);
2859 UInt op2;
2860 IRTemp result = newTemp(Ity_I32);
2861
2862 assign(op1, get_gpr_w0(r1));
2863 op2 = i2;
2864 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2865 put_gpr_w0(r1, mkexpr(result));
2866
2867 return "alsihn";
2868}
2869
2870static HChar *
2871s390_irgen_NR(UChar r1, UChar r2)
2872{
2873 IRTemp op1 = newTemp(Ity_I32);
2874 IRTemp op2 = newTemp(Ity_I32);
2875 IRTemp result = newTemp(Ity_I32);
2876
2877 assign(op1, get_gpr_w1(r1));
2878 assign(op2, get_gpr_w1(r2));
2879 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2880 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2881 put_gpr_w1(r1, mkexpr(result));
2882
2883 return "nr";
2884}
2885
2886static HChar *
2887s390_irgen_NGR(UChar r1, UChar r2)
2888{
2889 IRTemp op1 = newTemp(Ity_I64);
2890 IRTemp op2 = newTemp(Ity_I64);
2891 IRTemp result = newTemp(Ity_I64);
2892
2893 assign(op1, get_gpr_dw0(r1));
2894 assign(op2, get_gpr_dw0(r2));
2895 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2896 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2897 put_gpr_dw0(r1, mkexpr(result));
2898
2899 return "ngr";
2900}
2901
2902static HChar *
2903s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2904{
2905 IRTemp op2 = newTemp(Ity_I32);
2906 IRTemp op3 = newTemp(Ity_I32);
2907 IRTemp result = newTemp(Ity_I32);
2908
2909 assign(op2, get_gpr_w1(r2));
2910 assign(op3, get_gpr_w1(r3));
2911 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2912 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2913 put_gpr_w1(r1, mkexpr(result));
2914
2915 return "nrk";
2916}
2917
2918static HChar *
2919s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2920{
2921 IRTemp op2 = newTemp(Ity_I64);
2922 IRTemp op3 = newTemp(Ity_I64);
2923 IRTemp result = newTemp(Ity_I64);
2924
2925 assign(op2, get_gpr_dw0(r2));
2926 assign(op3, get_gpr_dw0(r3));
2927 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2928 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2929 put_gpr_dw0(r1, mkexpr(result));
2930
2931 return "ngrk";
2932}
2933
2934static HChar *
2935s390_irgen_N(UChar r1, IRTemp op2addr)
2936{
2937 IRTemp op1 = newTemp(Ity_I32);
2938 IRTemp op2 = newTemp(Ity_I32);
2939 IRTemp result = newTemp(Ity_I32);
2940
2941 assign(op1, get_gpr_w1(r1));
2942 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2943 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2944 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2945 put_gpr_w1(r1, mkexpr(result));
2946
2947 return "n";
2948}
2949
2950static HChar *
2951s390_irgen_NY(UChar r1, IRTemp op2addr)
2952{
2953 IRTemp op1 = newTemp(Ity_I32);
2954 IRTemp op2 = newTemp(Ity_I32);
2955 IRTemp result = newTemp(Ity_I32);
2956
2957 assign(op1, get_gpr_w1(r1));
2958 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2959 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2960 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2961 put_gpr_w1(r1, mkexpr(result));
2962
2963 return "ny";
2964}
2965
2966static HChar *
2967s390_irgen_NG(UChar r1, IRTemp op2addr)
2968{
2969 IRTemp op1 = newTemp(Ity_I64);
2970 IRTemp op2 = newTemp(Ity_I64);
2971 IRTemp result = newTemp(Ity_I64);
2972
2973 assign(op1, get_gpr_dw0(r1));
2974 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2975 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2976 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2977 put_gpr_dw0(r1, mkexpr(result));
2978
2979 return "ng";
2980}
2981
2982static HChar *
2983s390_irgen_NI(UChar i2, IRTemp op1addr)
2984{
2985 IRTemp op1 = newTemp(Ity_I8);
2986 UChar op2;
2987 IRTemp result = newTemp(Ity_I8);
2988
2989 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2990 op2 = i2;
2991 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2992 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2993 store(mkexpr(op1addr), mkexpr(result));
2994
2995 return "ni";
2996}
2997
2998static HChar *
2999s390_irgen_NIY(UChar i2, IRTemp op1addr)
3000{
3001 IRTemp op1 = newTemp(Ity_I8);
3002 UChar op2;
3003 IRTemp result = newTemp(Ity_I8);
3004
3005 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3006 op2 = i2;
3007 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3008 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3009 store(mkexpr(op1addr), mkexpr(result));
3010
3011 return "niy";
3012}
3013
3014static HChar *
3015s390_irgen_NIHF(UChar r1, UInt i2)
3016{
3017 IRTemp op1 = newTemp(Ity_I32);
3018 UInt op2;
3019 IRTemp result = newTemp(Ity_I32);
3020
3021 assign(op1, get_gpr_w0(r1));
3022 op2 = i2;
3023 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3024 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3025 put_gpr_w0(r1, mkexpr(result));
3026
3027 return "nihf";
3028}
3029
3030static HChar *
3031s390_irgen_NIHH(UChar r1, UShort i2)
3032{
3033 IRTemp op1 = newTemp(Ity_I16);
3034 UShort op2;
3035 IRTemp result = newTemp(Ity_I16);
3036
3037 assign(op1, get_gpr_hw0(r1));
3038 op2 = i2;
3039 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3040 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3041 put_gpr_hw0(r1, mkexpr(result));
3042
3043 return "nihh";
3044}
3045
3046static HChar *
3047s390_irgen_NIHL(UChar r1, UShort i2)
3048{
3049 IRTemp op1 = newTemp(Ity_I16);
3050 UShort op2;
3051 IRTemp result = newTemp(Ity_I16);
3052
3053 assign(op1, get_gpr_hw1(r1));
3054 op2 = i2;
3055 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3056 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3057 put_gpr_hw1(r1, mkexpr(result));
3058
3059 return "nihl";
3060}
3061
3062static HChar *
3063s390_irgen_NILF(UChar r1, UInt i2)
3064{
3065 IRTemp op1 = newTemp(Ity_I32);
3066 UInt op2;
3067 IRTemp result = newTemp(Ity_I32);
3068
3069 assign(op1, get_gpr_w1(r1));
3070 op2 = i2;
3071 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3072 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3073 put_gpr_w1(r1, mkexpr(result));
3074
3075 return "nilf";
3076}
3077
3078static HChar *
3079s390_irgen_NILH(UChar r1, UShort i2)
3080{
3081 IRTemp op1 = newTemp(Ity_I16);
3082 UShort op2;
3083 IRTemp result = newTemp(Ity_I16);
3084
3085 assign(op1, get_gpr_hw2(r1));
3086 op2 = i2;
3087 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3088 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3089 put_gpr_hw2(r1, mkexpr(result));
3090
3091 return "nilh";
3092}
3093
3094static HChar *
3095s390_irgen_NILL(UChar r1, UShort i2)
3096{
3097 IRTemp op1 = newTemp(Ity_I16);
3098 UShort op2;
3099 IRTemp result = newTemp(Ity_I16);
3100
3101 assign(op1, get_gpr_hw3(r1));
3102 op2 = i2;
3103 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3104 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3105 put_gpr_hw3(r1, mkexpr(result));
3106
3107 return "nill";
3108}
3109
3110static HChar *
3111s390_irgen_BASR(UChar r1, UChar r2)
3112{
3113 IRTemp target = newTemp(Ity_I64);
3114
3115 if (r2 == 0) {
3116 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3117 } else {
3118 if (r1 != r2) {
3119 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3120 call_function(get_gpr_dw0(r2));
3121 } else {
3122 assign(target, get_gpr_dw0(r2));
3123 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3124 call_function(mkexpr(target));
3125 }
3126 }
3127
3128 return "basr";
3129}
3130
3131static HChar *
3132s390_irgen_BAS(UChar r1, IRTemp op2addr)
3133{
3134 IRTemp target = newTemp(Ity_I64);
3135
3136 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3137 assign(target, mkexpr(op2addr));
3138 call_function(mkexpr(target));
3139
3140 return "bas";
3141}
3142
3143static HChar *
3144s390_irgen_BCR(UChar r1, UChar r2)
3145{
3146 IRTemp cond = newTemp(Ity_I32);
3147
sewardja52e37e2011-04-28 18:48:06 +00003148 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3149 stmt(IRStmt_MBE(Imbe_Fence));
3150 }
3151
sewardj2019a972011-03-07 16:04:07 +00003152 if ((r2 == 0) || (r1 == 0)) {
3153 } else {
3154 if (r1 == 15) {
3155 return_from_function(get_gpr_dw0(r2));
3156 } else {
3157 assign(cond, s390_call_calculate_cond(r1));
3158 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3159 mkU32(0)), get_gpr_dw0(r2));
3160 }
3161 }
sewardj7ee97522011-05-09 21:45:04 +00003162 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003163 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3164
3165 return "bcr";
3166}
3167
3168static HChar *
3169s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3170{
3171 IRTemp cond = newTemp(Ity_I32);
3172
3173 if (r1 == 0) {
3174 } else {
3175 if (r1 == 15) {
3176 always_goto(mkexpr(op2addr));
3177 } else {
3178 assign(cond, s390_call_calculate_cond(r1));
3179 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3180 mkU32(0)), mkexpr(op2addr));
3181 }
3182 }
sewardj7ee97522011-05-09 21:45:04 +00003183 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003184 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3185
3186 return "bc";
3187}
3188
3189static HChar *
3190s390_irgen_BCTR(UChar r1, UChar r2)
3191{
3192 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3193 if (r2 != 0) {
3194 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3195 ), get_gpr_dw0(r2));
3196 }
3197
3198 return "bctr";
3199}
3200
3201static HChar *
3202s390_irgen_BCTGR(UChar r1, UChar r2)
3203{
3204 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3205 if (r2 != 0) {
3206 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3207 mkU64(0)), get_gpr_dw0(r2));
3208 }
3209
3210 return "bctgr";
3211}
3212
3213static HChar *
3214s390_irgen_BCT(UChar r1, IRTemp op2addr)
3215{
3216 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3217 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3218 mkexpr(op2addr));
3219
3220 return "bct";
3221}
3222
3223static HChar *
3224s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3225{
3226 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3227 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3228 mkexpr(op2addr));
3229
3230 return "bctg";
3231}
3232
3233static HChar *
3234s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3235{
3236 IRTemp value = newTemp(Ity_I32);
3237
3238 assign(value, get_gpr_w1(r3 | 1));
3239 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3240 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3241 mkexpr(value)), mkexpr(op2addr));
3242
3243 return "bxh";
3244}
3245
3246static HChar *
3247s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3248{
3249 IRTemp value = newTemp(Ity_I64);
3250
3251 assign(value, get_gpr_dw0(r3 | 1));
3252 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3253 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3254 mkexpr(value)), mkexpr(op2addr));
3255
3256 return "bxhg";
3257}
3258
3259static HChar *
3260s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3261{
3262 IRTemp value = newTemp(Ity_I32);
3263
3264 assign(value, get_gpr_w1(r3 | 1));
3265 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3266 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3267 get_gpr_w1(r1)), mkexpr(op2addr));
3268
3269 return "bxle";
3270}
3271
3272static HChar *
3273s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3274{
3275 IRTemp value = newTemp(Ity_I64);
3276
3277 assign(value, get_gpr_dw0(r3 | 1));
3278 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3279 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3280 get_gpr_dw0(r1)), mkexpr(op2addr));
3281
3282 return "bxleg";
3283}
3284
3285static HChar *
3286s390_irgen_BRAS(UChar r1, UShort i2)
3287{
3288 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003289 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003290
3291 return "bras";
3292}
3293
3294static HChar *
3295s390_irgen_BRASL(UChar r1, UInt i2)
3296{
3297 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003298 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003299
3300 return "brasl";
3301}
3302
3303static HChar *
3304s390_irgen_BRC(UChar r1, UShort i2)
3305{
3306 IRTemp cond = newTemp(Ity_I32);
3307
3308 if (r1 == 0) {
3309 } else {
3310 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003311 always_goto_and_chase(
3312 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003313 } else {
3314 assign(cond, s390_call_calculate_cond(r1));
3315 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3316 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3317
3318 }
3319 }
sewardj7ee97522011-05-09 21:45:04 +00003320 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003321 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3322
3323 return "brc";
3324}
3325
3326static HChar *
3327s390_irgen_BRCL(UChar r1, UInt i2)
3328{
3329 IRTemp cond = newTemp(Ity_I32);
3330
3331 if (r1 == 0) {
3332 } else {
3333 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003334 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003335 } else {
3336 assign(cond, s390_call_calculate_cond(r1));
3337 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3338 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3339 }
3340 }
sewardj7ee97522011-05-09 21:45:04 +00003341 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003342 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3343
3344 return "brcl";
3345}
3346
3347static HChar *
3348s390_irgen_BRCT(UChar r1, UShort i2)
3349{
3350 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3351 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3352 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3353
3354 return "brct";
3355}
3356
3357static HChar *
3358s390_irgen_BRCTG(UChar r1, UShort i2)
3359{
3360 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3361 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3362 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3363
3364 return "brctg";
3365}
3366
3367static HChar *
3368s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3369{
3370 IRTemp value = newTemp(Ity_I32);
3371
3372 assign(value, get_gpr_w1(r3 | 1));
3373 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3374 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3375 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3376
3377 return "brxh";
3378}
3379
3380static HChar *
3381s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3382{
3383 IRTemp value = newTemp(Ity_I64);
3384
3385 assign(value, get_gpr_dw0(r3 | 1));
3386 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3387 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3388 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3389
3390 return "brxhg";
3391}
3392
3393static HChar *
3394s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3395{
3396 IRTemp value = newTemp(Ity_I32);
3397
3398 assign(value, get_gpr_w1(r3 | 1));
3399 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3400 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3401 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3402
3403 return "brxle";
3404}
3405
3406static HChar *
3407s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3408{
3409 IRTemp value = newTemp(Ity_I64);
3410
3411 assign(value, get_gpr_dw0(r3 | 1));
3412 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3413 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3414 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3415
3416 return "brxlg";
3417}
3418
3419static HChar *
3420s390_irgen_CR(UChar r1, UChar r2)
3421{
3422 IRTemp op1 = newTemp(Ity_I32);
3423 IRTemp op2 = newTemp(Ity_I32);
3424
3425 assign(op1, get_gpr_w1(r1));
3426 assign(op2, get_gpr_w1(r2));
3427 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3428
3429 return "cr";
3430}
3431
3432static HChar *
3433s390_irgen_CGR(UChar r1, UChar r2)
3434{
3435 IRTemp op1 = newTemp(Ity_I64);
3436 IRTemp op2 = newTemp(Ity_I64);
3437
3438 assign(op1, get_gpr_dw0(r1));
3439 assign(op2, get_gpr_dw0(r2));
3440 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3441
3442 return "cgr";
3443}
3444
3445static HChar *
3446s390_irgen_CGFR(UChar r1, UChar r2)
3447{
3448 IRTemp op1 = newTemp(Ity_I64);
3449 IRTemp op2 = newTemp(Ity_I64);
3450
3451 assign(op1, get_gpr_dw0(r1));
3452 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3453 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3454
3455 return "cgfr";
3456}
3457
3458static HChar *
3459s390_irgen_C(UChar r1, IRTemp op2addr)
3460{
3461 IRTemp op1 = newTemp(Ity_I32);
3462 IRTemp op2 = newTemp(Ity_I32);
3463
3464 assign(op1, get_gpr_w1(r1));
3465 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3466 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3467
3468 return "c";
3469}
3470
3471static HChar *
3472s390_irgen_CY(UChar r1, IRTemp op2addr)
3473{
3474 IRTemp op1 = newTemp(Ity_I32);
3475 IRTemp op2 = newTemp(Ity_I32);
3476
3477 assign(op1, get_gpr_w1(r1));
3478 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3479 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3480
3481 return "cy";
3482}
3483
3484static HChar *
3485s390_irgen_CG(UChar r1, IRTemp op2addr)
3486{
3487 IRTemp op1 = newTemp(Ity_I64);
3488 IRTemp op2 = newTemp(Ity_I64);
3489
3490 assign(op1, get_gpr_dw0(r1));
3491 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3492 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3493
3494 return "cg";
3495}
3496
3497static HChar *
3498s390_irgen_CGF(UChar r1, IRTemp op2addr)
3499{
3500 IRTemp op1 = newTemp(Ity_I64);
3501 IRTemp op2 = newTemp(Ity_I64);
3502
3503 assign(op1, get_gpr_dw0(r1));
3504 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3505 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3506
3507 return "cgf";
3508}
3509
3510static HChar *
3511s390_irgen_CFI(UChar r1, UInt i2)
3512{
3513 IRTemp op1 = newTemp(Ity_I32);
3514 Int op2;
3515
3516 assign(op1, get_gpr_w1(r1));
3517 op2 = (Int)i2;
3518 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3519 mkU32((UInt)op2)));
3520
3521 return "cfi";
3522}
3523
3524static HChar *
3525s390_irgen_CGFI(UChar r1, UInt i2)
3526{
3527 IRTemp op1 = newTemp(Ity_I64);
3528 Long op2;
3529
3530 assign(op1, get_gpr_dw0(r1));
3531 op2 = (Long)(Int)i2;
3532 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3533 mkU64((ULong)op2)));
3534
3535 return "cgfi";
3536}
3537
3538static HChar *
3539s390_irgen_CRL(UChar r1, UInt i2)
3540{
3541 IRTemp op1 = newTemp(Ity_I32);
3542 IRTemp op2 = newTemp(Ity_I32);
3543
3544 assign(op1, get_gpr_w1(r1));
3545 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3546 i2 << 1))));
3547 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3548
3549 return "crl";
3550}
3551
3552static HChar *
3553s390_irgen_CGRL(UChar r1, UInt i2)
3554{
3555 IRTemp op1 = newTemp(Ity_I64);
3556 IRTemp op2 = newTemp(Ity_I64);
3557
3558 assign(op1, get_gpr_dw0(r1));
3559 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3560 i2 << 1))));
3561 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3562
3563 return "cgrl";
3564}
3565
3566static HChar *
3567s390_irgen_CGFRL(UChar r1, UInt i2)
3568{
3569 IRTemp op1 = newTemp(Ity_I64);
3570 IRTemp op2 = newTemp(Ity_I64);
3571
3572 assign(op1, get_gpr_dw0(r1));
3573 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3574 ((ULong)(Long)(Int)i2 << 1)))));
3575 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3576
3577 return "cgfrl";
3578}
3579
3580static HChar *
3581s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3582{
3583 IRTemp op1 = newTemp(Ity_I32);
3584 IRTemp op2 = newTemp(Ity_I32);
3585 IRTemp icc = newTemp(Ity_I32);
3586 IRTemp cond = newTemp(Ity_I32);
3587
3588 if (m3 == 0) {
3589 } else {
3590 if (m3 == 14) {
3591 always_goto(mkexpr(op4addr));
3592 } else {
3593 assign(op1, get_gpr_w1(r1));
3594 assign(op2, get_gpr_w1(r2));
3595 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3596 op2));
3597 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3598 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3599 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3600 mkU32(0)), mkexpr(op4addr));
3601 }
3602 }
3603
3604 return "crb";
3605}
3606
3607static HChar *
3608s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3609{
3610 IRTemp op1 = newTemp(Ity_I64);
3611 IRTemp op2 = newTemp(Ity_I64);
3612 IRTemp icc = newTemp(Ity_I32);
3613 IRTemp cond = newTemp(Ity_I32);
3614
3615 if (m3 == 0) {
3616 } else {
3617 if (m3 == 14) {
3618 always_goto(mkexpr(op4addr));
3619 } else {
3620 assign(op1, get_gpr_dw0(r1));
3621 assign(op2, get_gpr_dw0(r2));
3622 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3623 op2));
3624 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3625 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3626 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3627 mkU32(0)), mkexpr(op4addr));
3628 }
3629 }
3630
3631 return "cgrb";
3632}
3633
3634static HChar *
3635s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3636{
3637 IRTemp op1 = newTemp(Ity_I32);
3638 IRTemp op2 = newTemp(Ity_I32);
3639 IRTemp icc = newTemp(Ity_I32);
3640 IRTemp cond = newTemp(Ity_I32);
3641
3642 if (m3 == 0) {
3643 } else {
3644 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003645 always_goto_and_chase(
3646 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003647 } else {
3648 assign(op1, get_gpr_w1(r1));
3649 assign(op2, get_gpr_w1(r2));
3650 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3651 op2));
3652 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3653 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3654 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3655 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3656
3657 }
3658 }
3659
3660 return "crj";
3661}
3662
3663static HChar *
3664s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3665{
3666 IRTemp op1 = newTemp(Ity_I64);
3667 IRTemp op2 = newTemp(Ity_I64);
3668 IRTemp icc = newTemp(Ity_I32);
3669 IRTemp cond = newTemp(Ity_I32);
3670
3671 if (m3 == 0) {
3672 } else {
3673 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003674 always_goto_and_chase(
3675 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003676 } else {
3677 assign(op1, get_gpr_dw0(r1));
3678 assign(op2, get_gpr_dw0(r2));
3679 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3680 op2));
3681 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3682 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3683 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3684 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3685
3686 }
3687 }
3688
3689 return "cgrj";
3690}
3691
3692static HChar *
3693s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3694{
3695 IRTemp op1 = newTemp(Ity_I32);
3696 Int op2;
3697 IRTemp icc = newTemp(Ity_I32);
3698 IRTemp cond = newTemp(Ity_I32);
3699
3700 if (m3 == 0) {
3701 } else {
3702 if (m3 == 14) {
3703 always_goto(mkexpr(op4addr));
3704 } else {
3705 assign(op1, get_gpr_w1(r1));
3706 op2 = (Int)(Char)i2;
3707 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3708 mktemp(Ity_I32, mkU32((UInt)op2))));
3709 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3710 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3711 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3712 mkU32(0)), mkexpr(op4addr));
3713 }
3714 }
3715
3716 return "cib";
3717}
3718
3719static HChar *
3720s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3721{
3722 IRTemp op1 = newTemp(Ity_I64);
3723 Long op2;
3724 IRTemp icc = newTemp(Ity_I32);
3725 IRTemp cond = newTemp(Ity_I32);
3726
3727 if (m3 == 0) {
3728 } else {
3729 if (m3 == 14) {
3730 always_goto(mkexpr(op4addr));
3731 } else {
3732 assign(op1, get_gpr_dw0(r1));
3733 op2 = (Long)(Char)i2;
3734 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3735 mktemp(Ity_I64, mkU64((ULong)op2))));
3736 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3737 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3738 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3739 mkU32(0)), mkexpr(op4addr));
3740 }
3741 }
3742
3743 return "cgib";
3744}
3745
3746static HChar *
3747s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3748{
3749 IRTemp op1 = newTemp(Ity_I32);
3750 Int op2;
3751 IRTemp icc = newTemp(Ity_I32);
3752 IRTemp cond = newTemp(Ity_I32);
3753
3754 if (m3 == 0) {
3755 } else {
3756 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003757 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003758 } else {
3759 assign(op1, get_gpr_w1(r1));
3760 op2 = (Int)(Char)i2;
3761 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3762 mktemp(Ity_I32, mkU32((UInt)op2))));
3763 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3764 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3765 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3766 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3767
3768 }
3769 }
3770
3771 return "cij";
3772}
3773
3774static HChar *
3775s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3776{
3777 IRTemp op1 = newTemp(Ity_I64);
3778 Long op2;
3779 IRTemp icc = newTemp(Ity_I32);
3780 IRTemp cond = newTemp(Ity_I32);
3781
3782 if (m3 == 0) {
3783 } else {
3784 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003785 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003786 } else {
3787 assign(op1, get_gpr_dw0(r1));
3788 op2 = (Long)(Char)i2;
3789 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3790 mktemp(Ity_I64, mkU64((ULong)op2))));
3791 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3792 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3793 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3794 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3795
3796 }
3797 }
3798
3799 return "cgij";
3800}
3801
3802static HChar *
3803s390_irgen_CH(UChar r1, IRTemp op2addr)
3804{
3805 IRTemp op1 = newTemp(Ity_I32);
3806 IRTemp op2 = newTemp(Ity_I32);
3807
3808 assign(op1, get_gpr_w1(r1));
3809 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3810 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3811
3812 return "ch";
3813}
3814
3815static HChar *
3816s390_irgen_CHY(UChar r1, IRTemp op2addr)
3817{
3818 IRTemp op1 = newTemp(Ity_I32);
3819 IRTemp op2 = newTemp(Ity_I32);
3820
3821 assign(op1, get_gpr_w1(r1));
3822 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3823 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3824
3825 return "chy";
3826}
3827
3828static HChar *
3829s390_irgen_CGH(UChar r1, IRTemp op2addr)
3830{
3831 IRTemp op1 = newTemp(Ity_I64);
3832 IRTemp op2 = newTemp(Ity_I64);
3833
3834 assign(op1, get_gpr_dw0(r1));
3835 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3836 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3837
3838 return "cgh";
3839}
3840
3841static HChar *
3842s390_irgen_CHI(UChar r1, UShort i2)
3843{
3844 IRTemp op1 = newTemp(Ity_I32);
3845 Int op2;
3846
3847 assign(op1, get_gpr_w1(r1));
3848 op2 = (Int)(Short)i2;
3849 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3850 mkU32((UInt)op2)));
3851
3852 return "chi";
3853}
3854
3855static HChar *
3856s390_irgen_CGHI(UChar r1, UShort i2)
3857{
3858 IRTemp op1 = newTemp(Ity_I64);
3859 Long op2;
3860
3861 assign(op1, get_gpr_dw0(r1));
3862 op2 = (Long)(Short)i2;
3863 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3864 mkU64((ULong)op2)));
3865
3866 return "cghi";
3867}
3868
3869static HChar *
3870s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3871{
3872 IRTemp op1 = newTemp(Ity_I16);
3873 Short op2;
3874
3875 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3876 op2 = (Short)i2;
3877 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3878 mkU16((UShort)op2)));
3879
3880 return "chhsi";
3881}
3882
3883static HChar *
3884s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3885{
3886 IRTemp op1 = newTemp(Ity_I32);
3887 Int op2;
3888
3889 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3890 op2 = (Int)(Short)i2;
3891 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3892 mkU32((UInt)op2)));
3893
3894 return "chsi";
3895}
3896
3897static HChar *
3898s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3899{
3900 IRTemp op1 = newTemp(Ity_I64);
3901 Long op2;
3902
3903 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3904 op2 = (Long)(Short)i2;
3905 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3906 mkU64((ULong)op2)));
3907
3908 return "cghsi";
3909}
3910
3911static HChar *
3912s390_irgen_CHRL(UChar r1, UInt i2)
3913{
3914 IRTemp op1 = newTemp(Ity_I32);
3915 IRTemp op2 = newTemp(Ity_I32);
3916
3917 assign(op1, get_gpr_w1(r1));
3918 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3919 ((ULong)(Long)(Int)i2 << 1)))));
3920 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3921
3922 return "chrl";
3923}
3924
3925static HChar *
3926s390_irgen_CGHRL(UChar r1, UInt i2)
3927{
3928 IRTemp op1 = newTemp(Ity_I64);
3929 IRTemp op2 = newTemp(Ity_I64);
3930
3931 assign(op1, get_gpr_dw0(r1));
3932 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3933 ((ULong)(Long)(Int)i2 << 1)))));
3934 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3935
3936 return "cghrl";
3937}
3938
3939static HChar *
3940s390_irgen_CHHR(UChar r1, UChar r2)
3941{
3942 IRTemp op1 = newTemp(Ity_I32);
3943 IRTemp op2 = newTemp(Ity_I32);
3944
3945 assign(op1, get_gpr_w0(r1));
3946 assign(op2, get_gpr_w0(r2));
3947 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3948
3949 return "chhr";
3950}
3951
3952static HChar *
3953s390_irgen_CHLR(UChar r1, UChar r2)
3954{
3955 IRTemp op1 = newTemp(Ity_I32);
3956 IRTemp op2 = newTemp(Ity_I32);
3957
3958 assign(op1, get_gpr_w0(r1));
3959 assign(op2, get_gpr_w1(r2));
3960 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3961
3962 return "chlr";
3963}
3964
3965static HChar *
3966s390_irgen_CHF(UChar r1, IRTemp op2addr)
3967{
3968 IRTemp op1 = newTemp(Ity_I32);
3969 IRTemp op2 = newTemp(Ity_I32);
3970
3971 assign(op1, get_gpr_w0(r1));
3972 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3973 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3974
3975 return "chf";
3976}
3977
3978static HChar *
3979s390_irgen_CIH(UChar r1, UInt i2)
3980{
3981 IRTemp op1 = newTemp(Ity_I32);
3982 Int op2;
3983
3984 assign(op1, get_gpr_w0(r1));
3985 op2 = (Int)i2;
3986 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3987 mkU32((UInt)op2)));
3988
3989 return "cih";
3990}
3991
3992static HChar *
3993s390_irgen_CLR(UChar r1, UChar r2)
3994{
3995 IRTemp op1 = newTemp(Ity_I32);
3996 IRTemp op2 = newTemp(Ity_I32);
3997
3998 assign(op1, get_gpr_w1(r1));
3999 assign(op2, get_gpr_w1(r2));
4000 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4001
4002 return "clr";
4003}
4004
4005static HChar *
4006s390_irgen_CLGR(UChar r1, UChar r2)
4007{
4008 IRTemp op1 = newTemp(Ity_I64);
4009 IRTemp op2 = newTemp(Ity_I64);
4010
4011 assign(op1, get_gpr_dw0(r1));
4012 assign(op2, get_gpr_dw0(r2));
4013 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4014
4015 return "clgr";
4016}
4017
4018static HChar *
4019s390_irgen_CLGFR(UChar r1, UChar r2)
4020{
4021 IRTemp op1 = newTemp(Ity_I64);
4022 IRTemp op2 = newTemp(Ity_I64);
4023
4024 assign(op1, get_gpr_dw0(r1));
4025 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4026 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4027
4028 return "clgfr";
4029}
4030
4031static HChar *
4032s390_irgen_CL(UChar r1, IRTemp op2addr)
4033{
4034 IRTemp op1 = newTemp(Ity_I32);
4035 IRTemp op2 = newTemp(Ity_I32);
4036
4037 assign(op1, get_gpr_w1(r1));
4038 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4039 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4040
4041 return "cl";
4042}
4043
4044static HChar *
4045s390_irgen_CLY(UChar r1, IRTemp op2addr)
4046{
4047 IRTemp op1 = newTemp(Ity_I32);
4048 IRTemp op2 = newTemp(Ity_I32);
4049
4050 assign(op1, get_gpr_w1(r1));
4051 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4052 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4053
4054 return "cly";
4055}
4056
4057static HChar *
4058s390_irgen_CLG(UChar r1, IRTemp op2addr)
4059{
4060 IRTemp op1 = newTemp(Ity_I64);
4061 IRTemp op2 = newTemp(Ity_I64);
4062
4063 assign(op1, get_gpr_dw0(r1));
4064 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4065 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4066
4067 return "clg";
4068}
4069
4070static HChar *
4071s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4072{
4073 IRTemp op1 = newTemp(Ity_I64);
4074 IRTemp op2 = newTemp(Ity_I64);
4075
4076 assign(op1, get_gpr_dw0(r1));
4077 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4078 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4079
4080 return "clgf";
4081}
4082
4083static HChar *
4084s390_irgen_CLFI(UChar r1, UInt i2)
4085{
4086 IRTemp op1 = newTemp(Ity_I32);
4087 UInt op2;
4088
4089 assign(op1, get_gpr_w1(r1));
4090 op2 = i2;
4091 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4092 mkU32(op2)));
4093
4094 return "clfi";
4095}
4096
4097static HChar *
4098s390_irgen_CLGFI(UChar r1, UInt i2)
4099{
4100 IRTemp op1 = newTemp(Ity_I64);
4101 ULong op2;
4102
4103 assign(op1, get_gpr_dw0(r1));
4104 op2 = (ULong)i2;
4105 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4106 mkU64(op2)));
4107
4108 return "clgfi";
4109}
4110
4111static HChar *
4112s390_irgen_CLI(UChar i2, IRTemp op1addr)
4113{
4114 IRTemp op1 = newTemp(Ity_I8);
4115 UChar op2;
4116
4117 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4118 op2 = i2;
4119 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4120 mkU8(op2)));
4121
4122 return "cli";
4123}
4124
4125static HChar *
4126s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4127{
4128 IRTemp op1 = newTemp(Ity_I8);
4129 UChar op2;
4130
4131 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4132 op2 = i2;
4133 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4134 mkU8(op2)));
4135
4136 return "cliy";
4137}
4138
4139static HChar *
4140s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4141{
4142 IRTemp op1 = newTemp(Ity_I32);
4143 UInt op2;
4144
4145 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4146 op2 = (UInt)i2;
4147 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4148 mkU32(op2)));
4149
4150 return "clfhsi";
4151}
4152
4153static HChar *
4154s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4155{
4156 IRTemp op1 = newTemp(Ity_I64);
4157 ULong op2;
4158
4159 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4160 op2 = (ULong)i2;
4161 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4162 mkU64(op2)));
4163
4164 return "clghsi";
4165}
4166
4167static HChar *
4168s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4169{
4170 IRTemp op1 = newTemp(Ity_I16);
4171 UShort op2;
4172
4173 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4174 op2 = i2;
4175 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4176 mkU16(op2)));
4177
4178 return "clhhsi";
4179}
4180
4181static HChar *
4182s390_irgen_CLRL(UChar r1, UInt i2)
4183{
4184 IRTemp op1 = newTemp(Ity_I32);
4185 IRTemp op2 = newTemp(Ity_I32);
4186
4187 assign(op1, get_gpr_w1(r1));
4188 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4189 i2 << 1))));
4190 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4191
4192 return "clrl";
4193}
4194
4195static HChar *
4196s390_irgen_CLGRL(UChar r1, UInt i2)
4197{
4198 IRTemp op1 = newTemp(Ity_I64);
4199 IRTemp op2 = newTemp(Ity_I64);
4200
4201 assign(op1, get_gpr_dw0(r1));
4202 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4203 i2 << 1))));
4204 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4205
4206 return "clgrl";
4207}
4208
4209static HChar *
4210s390_irgen_CLGFRL(UChar r1, UInt i2)
4211{
4212 IRTemp op1 = newTemp(Ity_I64);
4213 IRTemp op2 = newTemp(Ity_I64);
4214
4215 assign(op1, get_gpr_dw0(r1));
4216 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4217 ((ULong)(Long)(Int)i2 << 1)))));
4218 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4219
4220 return "clgfrl";
4221}
4222
4223static HChar *
4224s390_irgen_CLHRL(UChar r1, UInt i2)
4225{
4226 IRTemp op1 = newTemp(Ity_I32);
4227 IRTemp op2 = newTemp(Ity_I32);
4228
4229 assign(op1, get_gpr_w1(r1));
4230 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4231 ((ULong)(Long)(Int)i2 << 1)))));
4232 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4233
4234 return "clhrl";
4235}
4236
4237static HChar *
4238s390_irgen_CLGHRL(UChar r1, UInt i2)
4239{
4240 IRTemp op1 = newTemp(Ity_I64);
4241 IRTemp op2 = newTemp(Ity_I64);
4242
4243 assign(op1, get_gpr_dw0(r1));
4244 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4245 ((ULong)(Long)(Int)i2 << 1)))));
4246 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4247
4248 return "clghrl";
4249}
4250
4251static HChar *
4252s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4253{
4254 IRTemp op1 = newTemp(Ity_I32);
4255 IRTemp op2 = newTemp(Ity_I32);
4256 IRTemp icc = newTemp(Ity_I32);
4257 IRTemp cond = newTemp(Ity_I32);
4258
4259 if (m3 == 0) {
4260 } else {
4261 if (m3 == 14) {
4262 always_goto(mkexpr(op4addr));
4263 } else {
4264 assign(op1, get_gpr_w1(r1));
4265 assign(op2, get_gpr_w1(r2));
4266 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4267 op2));
4268 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4269 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4270 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4271 mkU32(0)), mkexpr(op4addr));
4272 }
4273 }
4274
4275 return "clrb";
4276}
4277
4278static HChar *
4279s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4280{
4281 IRTemp op1 = newTemp(Ity_I64);
4282 IRTemp op2 = newTemp(Ity_I64);
4283 IRTemp icc = newTemp(Ity_I32);
4284 IRTemp cond = newTemp(Ity_I32);
4285
4286 if (m3 == 0) {
4287 } else {
4288 if (m3 == 14) {
4289 always_goto(mkexpr(op4addr));
4290 } else {
4291 assign(op1, get_gpr_dw0(r1));
4292 assign(op2, get_gpr_dw0(r2));
4293 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4294 op2));
4295 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4296 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4297 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4298 mkU32(0)), mkexpr(op4addr));
4299 }
4300 }
4301
4302 return "clgrb";
4303}
4304
4305static HChar *
4306s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4307{
4308 IRTemp op1 = newTemp(Ity_I32);
4309 IRTemp op2 = newTemp(Ity_I32);
4310 IRTemp icc = newTemp(Ity_I32);
4311 IRTemp cond = newTemp(Ity_I32);
4312
4313 if (m3 == 0) {
4314 } else {
4315 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004316 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004317 } else {
4318 assign(op1, get_gpr_w1(r1));
4319 assign(op2, get_gpr_w1(r2));
4320 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4321 op2));
4322 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4323 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4324 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4325 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4326
4327 }
4328 }
4329
4330 return "clrj";
4331}
4332
4333static HChar *
4334s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4335{
4336 IRTemp op1 = newTemp(Ity_I64);
4337 IRTemp op2 = newTemp(Ity_I64);
4338 IRTemp icc = newTemp(Ity_I32);
4339 IRTemp cond = newTemp(Ity_I32);
4340
4341 if (m3 == 0) {
4342 } else {
4343 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004344 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004345 } else {
4346 assign(op1, get_gpr_dw0(r1));
4347 assign(op2, get_gpr_dw0(r2));
4348 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4349 op2));
4350 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4351 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4352 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4353 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4354
4355 }
4356 }
4357
4358 return "clgrj";
4359}
4360
4361static HChar *
4362s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4363{
4364 IRTemp op1 = newTemp(Ity_I32);
4365 UInt op2;
4366 IRTemp icc = newTemp(Ity_I32);
4367 IRTemp cond = newTemp(Ity_I32);
4368
4369 if (m3 == 0) {
4370 } else {
4371 if (m3 == 14) {
4372 always_goto(mkexpr(op4addr));
4373 } else {
4374 assign(op1, get_gpr_w1(r1));
4375 op2 = (UInt)i2;
4376 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4377 mktemp(Ity_I32, mkU32(op2))));
4378 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4379 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4380 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4381 mkU32(0)), mkexpr(op4addr));
4382 }
4383 }
4384
4385 return "clib";
4386}
4387
4388static HChar *
4389s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4390{
4391 IRTemp op1 = newTemp(Ity_I64);
4392 ULong op2;
4393 IRTemp icc = newTemp(Ity_I32);
4394 IRTemp cond = newTemp(Ity_I32);
4395
4396 if (m3 == 0) {
4397 } else {
4398 if (m3 == 14) {
4399 always_goto(mkexpr(op4addr));
4400 } else {
4401 assign(op1, get_gpr_dw0(r1));
4402 op2 = (ULong)i2;
4403 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4404 mktemp(Ity_I64, mkU64(op2))));
4405 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4406 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4407 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4408 mkU32(0)), mkexpr(op4addr));
4409 }
4410 }
4411
4412 return "clgib";
4413}
4414
4415static HChar *
4416s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4417{
4418 IRTemp op1 = newTemp(Ity_I32);
4419 UInt op2;
4420 IRTemp icc = newTemp(Ity_I32);
4421 IRTemp cond = newTemp(Ity_I32);
4422
4423 if (m3 == 0) {
4424 } else {
4425 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004426 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004427 } else {
4428 assign(op1, get_gpr_w1(r1));
4429 op2 = (UInt)i2;
4430 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4431 mktemp(Ity_I32, mkU32(op2))));
4432 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4433 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4434 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4435 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4436
4437 }
4438 }
4439
4440 return "clij";
4441}
4442
4443static HChar *
4444s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4445{
4446 IRTemp op1 = newTemp(Ity_I64);
4447 ULong op2;
4448 IRTemp icc = newTemp(Ity_I32);
4449 IRTemp cond = newTemp(Ity_I32);
4450
4451 if (m3 == 0) {
4452 } else {
4453 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004454 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004455 } else {
4456 assign(op1, get_gpr_dw0(r1));
4457 op2 = (ULong)i2;
4458 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4459 mktemp(Ity_I64, mkU64(op2))));
4460 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4461 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4462 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4463 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4464
4465 }
4466 }
4467
4468 return "clgij";
4469}
4470
4471static HChar *
4472s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4473{
4474 IRTemp op1 = newTemp(Ity_I32);
4475 IRTemp op2 = newTemp(Ity_I32);
4476 IRTemp b0 = newTemp(Ity_I32);
4477 IRTemp b1 = newTemp(Ity_I32);
4478 IRTemp b2 = newTemp(Ity_I32);
4479 IRTemp b3 = newTemp(Ity_I32);
4480 IRTemp c0 = newTemp(Ity_I32);
4481 IRTemp c1 = newTemp(Ity_I32);
4482 IRTemp c2 = newTemp(Ity_I32);
4483 IRTemp c3 = newTemp(Ity_I32);
4484 UChar n;
4485
4486 n = 0;
4487 if ((r3 & 8) != 0) {
4488 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4489 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4490 n = n + 1;
4491 } else {
4492 assign(b0, mkU32(0));
4493 assign(c0, mkU32(0));
4494 }
4495 if ((r3 & 4) != 0) {
4496 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4497 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4498 mkU64(n)))));
4499 n = n + 1;
4500 } else {
4501 assign(b1, mkU32(0));
4502 assign(c1, mkU32(0));
4503 }
4504 if ((r3 & 2) != 0) {
4505 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4506 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4507 mkU64(n)))));
4508 n = n + 1;
4509 } else {
4510 assign(b2, mkU32(0));
4511 assign(c2, mkU32(0));
4512 }
4513 if ((r3 & 1) != 0) {
4514 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4515 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4516 mkU64(n)))));
4517 n = n + 1;
4518 } else {
4519 assign(b3, mkU32(0));
4520 assign(c3, mkU32(0));
4521 }
4522 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4523 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4524 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4525 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4526 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4527 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4528 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4529
4530 return "clm";
4531}
4532
4533static HChar *
4534s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4535{
4536 IRTemp op1 = newTemp(Ity_I32);
4537 IRTemp op2 = newTemp(Ity_I32);
4538 IRTemp b0 = newTemp(Ity_I32);
4539 IRTemp b1 = newTemp(Ity_I32);
4540 IRTemp b2 = newTemp(Ity_I32);
4541 IRTemp b3 = newTemp(Ity_I32);
4542 IRTemp c0 = newTemp(Ity_I32);
4543 IRTemp c1 = newTemp(Ity_I32);
4544 IRTemp c2 = newTemp(Ity_I32);
4545 IRTemp c3 = newTemp(Ity_I32);
4546 UChar n;
4547
4548 n = 0;
4549 if ((r3 & 8) != 0) {
4550 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4551 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4552 n = n + 1;
4553 } else {
4554 assign(b0, mkU32(0));
4555 assign(c0, mkU32(0));
4556 }
4557 if ((r3 & 4) != 0) {
4558 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4559 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4560 mkU64(n)))));
4561 n = n + 1;
4562 } else {
4563 assign(b1, mkU32(0));
4564 assign(c1, mkU32(0));
4565 }
4566 if ((r3 & 2) != 0) {
4567 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4568 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4569 mkU64(n)))));
4570 n = n + 1;
4571 } else {
4572 assign(b2, mkU32(0));
4573 assign(c2, mkU32(0));
4574 }
4575 if ((r3 & 1) != 0) {
4576 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4577 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4578 mkU64(n)))));
4579 n = n + 1;
4580 } else {
4581 assign(b3, mkU32(0));
4582 assign(c3, mkU32(0));
4583 }
4584 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4585 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4586 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4587 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4588 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4589 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4590 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4591
4592 return "clmy";
4593}
4594
4595static HChar *
4596s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4597{
4598 IRTemp op1 = newTemp(Ity_I32);
4599 IRTemp op2 = newTemp(Ity_I32);
4600 IRTemp b0 = newTemp(Ity_I32);
4601 IRTemp b1 = newTemp(Ity_I32);
4602 IRTemp b2 = newTemp(Ity_I32);
4603 IRTemp b3 = newTemp(Ity_I32);
4604 IRTemp c0 = newTemp(Ity_I32);
4605 IRTemp c1 = newTemp(Ity_I32);
4606 IRTemp c2 = newTemp(Ity_I32);
4607 IRTemp c3 = newTemp(Ity_I32);
4608 UChar n;
4609
4610 n = 0;
4611 if ((r3 & 8) != 0) {
4612 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4613 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4614 n = n + 1;
4615 } else {
4616 assign(b0, mkU32(0));
4617 assign(c0, mkU32(0));
4618 }
4619 if ((r3 & 4) != 0) {
4620 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4621 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4622 mkU64(n)))));
4623 n = n + 1;
4624 } else {
4625 assign(b1, mkU32(0));
4626 assign(c1, mkU32(0));
4627 }
4628 if ((r3 & 2) != 0) {
4629 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4630 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4631 mkU64(n)))));
4632 n = n + 1;
4633 } else {
4634 assign(b2, mkU32(0));
4635 assign(c2, mkU32(0));
4636 }
4637 if ((r3 & 1) != 0) {
4638 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4639 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4640 mkU64(n)))));
4641 n = n + 1;
4642 } else {
4643 assign(b3, mkU32(0));
4644 assign(c3, mkU32(0));
4645 }
4646 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4647 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4648 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4649 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4650 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4651 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4652 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4653
4654 return "clmh";
4655}
4656
4657static HChar *
4658s390_irgen_CLHHR(UChar r1, UChar r2)
4659{
4660 IRTemp op1 = newTemp(Ity_I32);
4661 IRTemp op2 = newTemp(Ity_I32);
4662
4663 assign(op1, get_gpr_w0(r1));
4664 assign(op2, get_gpr_w0(r2));
4665 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4666
4667 return "clhhr";
4668}
4669
4670static HChar *
4671s390_irgen_CLHLR(UChar r1, UChar r2)
4672{
4673 IRTemp op1 = newTemp(Ity_I32);
4674 IRTemp op2 = newTemp(Ity_I32);
4675
4676 assign(op1, get_gpr_w0(r1));
4677 assign(op2, get_gpr_w1(r2));
4678 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4679
4680 return "clhlr";
4681}
4682
4683static HChar *
4684s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4685{
4686 IRTemp op1 = newTemp(Ity_I32);
4687 IRTemp op2 = newTemp(Ity_I32);
4688
4689 assign(op1, get_gpr_w0(r1));
4690 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4691 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4692
4693 return "clhf";
4694}
4695
4696static HChar *
4697s390_irgen_CLIH(UChar r1, UInt i2)
4698{
4699 IRTemp op1 = newTemp(Ity_I32);
4700 UInt op2;
4701
4702 assign(op1, get_gpr_w0(r1));
4703 op2 = i2;
4704 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4705 mkU32(op2)));
4706
4707 return "clih";
4708}
4709
4710static HChar *
4711s390_irgen_CPYA(UChar r1, UChar r2)
4712{
4713 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004714 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004715 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4716
4717 return "cpya";
4718}
4719
4720static HChar *
4721s390_irgen_XR(UChar r1, UChar r2)
4722{
4723 IRTemp op1 = newTemp(Ity_I32);
4724 IRTemp op2 = newTemp(Ity_I32);
4725 IRTemp result = newTemp(Ity_I32);
4726
4727 if (r1 == r2) {
4728 assign(result, mkU32(0));
4729 } else {
4730 assign(op1, get_gpr_w1(r1));
4731 assign(op2, get_gpr_w1(r2));
4732 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4733 }
4734 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4735 put_gpr_w1(r1, mkexpr(result));
4736
4737 return "xr";
4738}
4739
4740static HChar *
4741s390_irgen_XGR(UChar r1, UChar r2)
4742{
4743 IRTemp op1 = newTemp(Ity_I64);
4744 IRTemp op2 = newTemp(Ity_I64);
4745 IRTemp result = newTemp(Ity_I64);
4746
4747 if (r1 == r2) {
4748 assign(result, mkU64(0));
4749 } else {
4750 assign(op1, get_gpr_dw0(r1));
4751 assign(op2, get_gpr_dw0(r2));
4752 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4753 }
4754 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4755 put_gpr_dw0(r1, mkexpr(result));
4756
4757 return "xgr";
4758}
4759
4760static HChar *
4761s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4762{
4763 IRTemp op2 = newTemp(Ity_I32);
4764 IRTemp op3 = newTemp(Ity_I32);
4765 IRTemp result = newTemp(Ity_I32);
4766
4767 assign(op2, get_gpr_w1(r2));
4768 assign(op3, get_gpr_w1(r3));
4769 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4770 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4771 put_gpr_w1(r1, mkexpr(result));
4772
4773 return "xrk";
4774}
4775
4776static HChar *
4777s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4778{
4779 IRTemp op2 = newTemp(Ity_I64);
4780 IRTemp op3 = newTemp(Ity_I64);
4781 IRTemp result = newTemp(Ity_I64);
4782
4783 assign(op2, get_gpr_dw0(r2));
4784 assign(op3, get_gpr_dw0(r3));
4785 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4786 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4787 put_gpr_dw0(r1, mkexpr(result));
4788
4789 return "xgrk";
4790}
4791
4792static HChar *
4793s390_irgen_X(UChar r1, IRTemp op2addr)
4794{
4795 IRTemp op1 = newTemp(Ity_I32);
4796 IRTemp op2 = newTemp(Ity_I32);
4797 IRTemp result = newTemp(Ity_I32);
4798
4799 assign(op1, get_gpr_w1(r1));
4800 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4801 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4802 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4803 put_gpr_w1(r1, mkexpr(result));
4804
4805 return "x";
4806}
4807
4808static HChar *
4809s390_irgen_XY(UChar r1, IRTemp op2addr)
4810{
4811 IRTemp op1 = newTemp(Ity_I32);
4812 IRTemp op2 = newTemp(Ity_I32);
4813 IRTemp result = newTemp(Ity_I32);
4814
4815 assign(op1, get_gpr_w1(r1));
4816 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4817 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4818 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4819 put_gpr_w1(r1, mkexpr(result));
4820
4821 return "xy";
4822}
4823
4824static HChar *
4825s390_irgen_XG(UChar r1, IRTemp op2addr)
4826{
4827 IRTemp op1 = newTemp(Ity_I64);
4828 IRTemp op2 = newTemp(Ity_I64);
4829 IRTemp result = newTemp(Ity_I64);
4830
4831 assign(op1, get_gpr_dw0(r1));
4832 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4833 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4834 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4835 put_gpr_dw0(r1, mkexpr(result));
4836
4837 return "xg";
4838}
4839
4840static HChar *
4841s390_irgen_XI(UChar i2, IRTemp op1addr)
4842{
4843 IRTemp op1 = newTemp(Ity_I8);
4844 UChar op2;
4845 IRTemp result = newTemp(Ity_I8);
4846
4847 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4848 op2 = i2;
4849 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4850 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4851 store(mkexpr(op1addr), mkexpr(result));
4852
4853 return "xi";
4854}
4855
4856static HChar *
4857s390_irgen_XIY(UChar i2, IRTemp op1addr)
4858{
4859 IRTemp op1 = newTemp(Ity_I8);
4860 UChar op2;
4861 IRTemp result = newTemp(Ity_I8);
4862
4863 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4864 op2 = i2;
4865 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4866 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4867 store(mkexpr(op1addr), mkexpr(result));
4868
4869 return "xiy";
4870}
4871
4872static HChar *
4873s390_irgen_XIHF(UChar r1, UInt i2)
4874{
4875 IRTemp op1 = newTemp(Ity_I32);
4876 UInt op2;
4877 IRTemp result = newTemp(Ity_I32);
4878
4879 assign(op1, get_gpr_w0(r1));
4880 op2 = i2;
4881 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4882 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4883 put_gpr_w0(r1, mkexpr(result));
4884
4885 return "xihf";
4886}
4887
4888static HChar *
4889s390_irgen_XILF(UChar r1, UInt i2)
4890{
4891 IRTemp op1 = newTemp(Ity_I32);
4892 UInt op2;
4893 IRTemp result = newTemp(Ity_I32);
4894
4895 assign(op1, get_gpr_w1(r1));
4896 op2 = i2;
4897 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4898 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4899 put_gpr_w1(r1, mkexpr(result));
4900
4901 return "xilf";
4902}
4903
4904static HChar *
4905s390_irgen_EAR(UChar r1, UChar r2)
4906{
4907 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004908 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004909 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4910
4911 return "ear";
4912}
4913
4914static HChar *
4915s390_irgen_IC(UChar r1, IRTemp op2addr)
4916{
4917 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4918
4919 return "ic";
4920}
4921
4922static HChar *
4923s390_irgen_ICY(UChar r1, IRTemp op2addr)
4924{
4925 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4926
4927 return "icy";
4928}
4929
4930static HChar *
4931s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4932{
4933 UChar n;
4934 IRTemp result = newTemp(Ity_I32);
4935 UInt mask;
4936
4937 n = 0;
4938 mask = (UInt)r3;
4939 if ((mask & 8) != 0) {
4940 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4941 n = n + 1;
4942 }
4943 if ((mask & 4) != 0) {
4944 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4945
4946 n = n + 1;
4947 }
4948 if ((mask & 2) != 0) {
4949 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4950
4951 n = n + 1;
4952 }
4953 if ((mask & 1) != 0) {
4954 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4955
4956 n = n + 1;
4957 }
4958 assign(result, get_gpr_w1(r1));
4959 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4960 mkU32(mask)));
4961
4962 return "icm";
4963}
4964
4965static HChar *
4966s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4967{
4968 UChar n;
4969 IRTemp result = newTemp(Ity_I32);
4970 UInt mask;
4971
4972 n = 0;
4973 mask = (UInt)r3;
4974 if ((mask & 8) != 0) {
4975 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4976 n = n + 1;
4977 }
4978 if ((mask & 4) != 0) {
4979 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4980
4981 n = n + 1;
4982 }
4983 if ((mask & 2) != 0) {
4984 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4985
4986 n = n + 1;
4987 }
4988 if ((mask & 1) != 0) {
4989 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4990
4991 n = n + 1;
4992 }
4993 assign(result, get_gpr_w1(r1));
4994 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4995 mkU32(mask)));
4996
4997 return "icmy";
4998}
4999
5000static HChar *
5001s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
5002{
5003 UChar n;
5004 IRTemp result = newTemp(Ity_I32);
5005 UInt mask;
5006
5007 n = 0;
5008 mask = (UInt)r3;
5009 if ((mask & 8) != 0) {
5010 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
5011 n = n + 1;
5012 }
5013 if ((mask & 4) != 0) {
5014 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5015
5016 n = n + 1;
5017 }
5018 if ((mask & 2) != 0) {
5019 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5020
5021 n = n + 1;
5022 }
5023 if ((mask & 1) != 0) {
5024 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5025
5026 n = n + 1;
5027 }
5028 assign(result, get_gpr_w0(r1));
5029 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
5030 mkU32(mask)));
5031
5032 return "icmh";
5033}
5034
5035static HChar *
5036s390_irgen_IIHF(UChar r1, UInt i2)
5037{
5038 put_gpr_w0(r1, mkU32(i2));
5039
5040 return "iihf";
5041}
5042
5043static HChar *
5044s390_irgen_IIHH(UChar r1, UShort i2)
5045{
5046 put_gpr_hw0(r1, mkU16(i2));
5047
5048 return "iihh";
5049}
5050
5051static HChar *
5052s390_irgen_IIHL(UChar r1, UShort i2)
5053{
5054 put_gpr_hw1(r1, mkU16(i2));
5055
5056 return "iihl";
5057}
5058
5059static HChar *
5060s390_irgen_IILF(UChar r1, UInt i2)
5061{
5062 put_gpr_w1(r1, mkU32(i2));
5063
5064 return "iilf";
5065}
5066
5067static HChar *
5068s390_irgen_IILH(UChar r1, UShort i2)
5069{
5070 put_gpr_hw2(r1, mkU16(i2));
5071
5072 return "iilh";
5073}
5074
5075static HChar *
5076s390_irgen_IILL(UChar r1, UShort i2)
5077{
5078 put_gpr_hw3(r1, mkU16(i2));
5079
5080 return "iill";
5081}
5082
5083static HChar *
5084s390_irgen_LR(UChar r1, UChar r2)
5085{
5086 put_gpr_w1(r1, get_gpr_w1(r2));
5087
5088 return "lr";
5089}
5090
5091static HChar *
5092s390_irgen_LGR(UChar r1, UChar r2)
5093{
5094 put_gpr_dw0(r1, get_gpr_dw0(r2));
5095
5096 return "lgr";
5097}
5098
5099static HChar *
5100s390_irgen_LGFR(UChar r1, UChar r2)
5101{
5102 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5103
5104 return "lgfr";
5105}
5106
5107static HChar *
5108s390_irgen_L(UChar r1, IRTemp op2addr)
5109{
5110 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5111
5112 return "l";
5113}
5114
5115static HChar *
5116s390_irgen_LY(UChar r1, IRTemp op2addr)
5117{
5118 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5119
5120 return "ly";
5121}
5122
5123static HChar *
5124s390_irgen_LG(UChar r1, IRTemp op2addr)
5125{
5126 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5127
5128 return "lg";
5129}
5130
5131static HChar *
5132s390_irgen_LGF(UChar r1, IRTemp op2addr)
5133{
5134 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5135
5136 return "lgf";
5137}
5138
5139static HChar *
5140s390_irgen_LGFI(UChar r1, UInt i2)
5141{
5142 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5143
5144 return "lgfi";
5145}
5146
5147static HChar *
5148s390_irgen_LRL(UChar r1, UInt i2)
5149{
5150 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5151 i2 << 1))));
5152
5153 return "lrl";
5154}
5155
5156static HChar *
5157s390_irgen_LGRL(UChar r1, UInt i2)
5158{
5159 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5160 i2 << 1))));
5161
5162 return "lgrl";
5163}
5164
5165static HChar *
5166s390_irgen_LGFRL(UChar r1, UInt i2)
5167{
5168 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5169 ((ULong)(Long)(Int)i2 << 1)))));
5170
5171 return "lgfrl";
5172}
5173
5174static HChar *
5175s390_irgen_LA(UChar r1, IRTemp op2addr)
5176{
5177 put_gpr_dw0(r1, mkexpr(op2addr));
5178
5179 return "la";
5180}
5181
5182static HChar *
5183s390_irgen_LAY(UChar r1, IRTemp op2addr)
5184{
5185 put_gpr_dw0(r1, mkexpr(op2addr));
5186
5187 return "lay";
5188}
5189
5190static HChar *
5191s390_irgen_LAE(UChar r1, IRTemp op2addr)
5192{
5193 put_gpr_dw0(r1, mkexpr(op2addr));
5194
5195 return "lae";
5196}
5197
5198static HChar *
5199s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5200{
5201 put_gpr_dw0(r1, mkexpr(op2addr));
5202
5203 return "laey";
5204}
5205
5206static HChar *
5207s390_irgen_LARL(UChar r1, UInt i2)
5208{
5209 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5210
5211 return "larl";
5212}
5213
5214static HChar *
5215s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5216{
5217 IRTemp op2 = newTemp(Ity_I32);
5218 IRTemp op3 = newTemp(Ity_I32);
5219 IRTemp result = newTemp(Ity_I32);
5220
5221 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5222 assign(op3, get_gpr_w1(r3));
5223 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5224 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5225 store(mkexpr(op2addr), mkexpr(result));
5226 put_gpr_w1(r1, mkexpr(op2));
5227
5228 return "laa";
5229}
5230
5231static HChar *
5232s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5233{
5234 IRTemp op2 = newTemp(Ity_I64);
5235 IRTemp op3 = newTemp(Ity_I64);
5236 IRTemp result = newTemp(Ity_I64);
5237
5238 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5239 assign(op3, get_gpr_dw0(r3));
5240 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5241 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5242 store(mkexpr(op2addr), mkexpr(result));
5243 put_gpr_dw0(r1, mkexpr(op2));
5244
5245 return "laag";
5246}
5247
5248static HChar *
5249s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5250{
5251 IRTemp op2 = newTemp(Ity_I32);
5252 IRTemp op3 = newTemp(Ity_I32);
5253 IRTemp result = newTemp(Ity_I32);
5254
5255 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5256 assign(op3, get_gpr_w1(r3));
5257 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5258 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5259 store(mkexpr(op2addr), mkexpr(result));
5260 put_gpr_w1(r1, mkexpr(op2));
5261
5262 return "laal";
5263}
5264
5265static HChar *
5266s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5267{
5268 IRTemp op2 = newTemp(Ity_I64);
5269 IRTemp op3 = newTemp(Ity_I64);
5270 IRTemp result = newTemp(Ity_I64);
5271
5272 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5273 assign(op3, get_gpr_dw0(r3));
5274 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5275 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5276 store(mkexpr(op2addr), mkexpr(result));
5277 put_gpr_dw0(r1, mkexpr(op2));
5278
5279 return "laalg";
5280}
5281
5282static HChar *
5283s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5284{
5285 IRTemp op2 = newTemp(Ity_I32);
5286 IRTemp op3 = newTemp(Ity_I32);
5287 IRTemp result = newTemp(Ity_I32);
5288
5289 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5290 assign(op3, get_gpr_w1(r3));
5291 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5292 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5293 store(mkexpr(op2addr), mkexpr(result));
5294 put_gpr_w1(r1, mkexpr(op2));
5295
5296 return "lan";
5297}
5298
5299static HChar *
5300s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5301{
5302 IRTemp op2 = newTemp(Ity_I64);
5303 IRTemp op3 = newTemp(Ity_I64);
5304 IRTemp result = newTemp(Ity_I64);
5305
5306 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5307 assign(op3, get_gpr_dw0(r3));
5308 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5309 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5310 store(mkexpr(op2addr), mkexpr(result));
5311 put_gpr_dw0(r1, mkexpr(op2));
5312
5313 return "lang";
5314}
5315
5316static HChar *
5317s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5318{
5319 IRTemp op2 = newTemp(Ity_I32);
5320 IRTemp op3 = newTemp(Ity_I32);
5321 IRTemp result = newTemp(Ity_I32);
5322
5323 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5324 assign(op3, get_gpr_w1(r3));
5325 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5326 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5327 store(mkexpr(op2addr), mkexpr(result));
5328 put_gpr_w1(r1, mkexpr(op2));
5329
5330 return "lax";
5331}
5332
5333static HChar *
5334s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5335{
5336 IRTemp op2 = newTemp(Ity_I64);
5337 IRTemp op3 = newTemp(Ity_I64);
5338 IRTemp result = newTemp(Ity_I64);
5339
5340 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5341 assign(op3, get_gpr_dw0(r3));
5342 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5343 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5344 store(mkexpr(op2addr), mkexpr(result));
5345 put_gpr_dw0(r1, mkexpr(op2));
5346
5347 return "laxg";
5348}
5349
5350static HChar *
5351s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5352{
5353 IRTemp op2 = newTemp(Ity_I32);
5354 IRTemp op3 = newTemp(Ity_I32);
5355 IRTemp result = newTemp(Ity_I32);
5356
5357 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5358 assign(op3, get_gpr_w1(r3));
5359 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5360 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5361 store(mkexpr(op2addr), mkexpr(result));
5362 put_gpr_w1(r1, mkexpr(op2));
5363
5364 return "lao";
5365}
5366
5367static HChar *
5368s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5369{
5370 IRTemp op2 = newTemp(Ity_I64);
5371 IRTemp op3 = newTemp(Ity_I64);
5372 IRTemp result = newTemp(Ity_I64);
5373
5374 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5375 assign(op3, get_gpr_dw0(r3));
5376 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5377 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5378 store(mkexpr(op2addr), mkexpr(result));
5379 put_gpr_dw0(r1, mkexpr(op2));
5380
5381 return "laog";
5382}
5383
5384static HChar *
5385s390_irgen_LTR(UChar r1, UChar r2)
5386{
5387 IRTemp op2 = newTemp(Ity_I32);
5388
5389 assign(op2, get_gpr_w1(r2));
5390 put_gpr_w1(r1, mkexpr(op2));
5391 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5392
5393 return "ltr";
5394}
5395
5396static HChar *
5397s390_irgen_LTGR(UChar r1, UChar r2)
5398{
5399 IRTemp op2 = newTemp(Ity_I64);
5400
5401 assign(op2, get_gpr_dw0(r2));
5402 put_gpr_dw0(r1, mkexpr(op2));
5403 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5404
5405 return "ltgr";
5406}
5407
5408static HChar *
5409s390_irgen_LTGFR(UChar r1, UChar r2)
5410{
5411 IRTemp op2 = newTemp(Ity_I64);
5412
5413 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5414 put_gpr_dw0(r1, mkexpr(op2));
5415 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5416
5417 return "ltgfr";
5418}
5419
5420static HChar *
5421s390_irgen_LT(UChar r1, IRTemp op2addr)
5422{
5423 IRTemp op2 = newTemp(Ity_I32);
5424
5425 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5426 put_gpr_w1(r1, mkexpr(op2));
5427 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5428
5429 return "lt";
5430}
5431
5432static HChar *
5433s390_irgen_LTG(UChar r1, IRTemp op2addr)
5434{
5435 IRTemp op2 = newTemp(Ity_I64);
5436
5437 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5438 put_gpr_dw0(r1, mkexpr(op2));
5439 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5440
5441 return "ltg";
5442}
5443
5444static HChar *
5445s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5446{
5447 IRTemp op2 = newTemp(Ity_I64);
5448
5449 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5450 put_gpr_dw0(r1, mkexpr(op2));
5451 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5452
5453 return "ltgf";
5454}
5455
5456static HChar *
5457s390_irgen_LBR(UChar r1, UChar r2)
5458{
5459 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5460
5461 return "lbr";
5462}
5463
5464static HChar *
5465s390_irgen_LGBR(UChar r1, UChar r2)
5466{
5467 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5468
5469 return "lgbr";
5470}
5471
5472static HChar *
5473s390_irgen_LB(UChar r1, IRTemp op2addr)
5474{
5475 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5476
5477 return "lb";
5478}
5479
5480static HChar *
5481s390_irgen_LGB(UChar r1, IRTemp op2addr)
5482{
5483 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5484
5485 return "lgb";
5486}
5487
5488static HChar *
5489s390_irgen_LBH(UChar r1, IRTemp op2addr)
5490{
5491 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5492
5493 return "lbh";
5494}
5495
5496static HChar *
5497s390_irgen_LCR(UChar r1, UChar r2)
5498{
5499 Int op1;
5500 IRTemp op2 = newTemp(Ity_I32);
5501 IRTemp result = newTemp(Ity_I32);
5502
5503 op1 = 0;
5504 assign(op2, get_gpr_w1(r2));
5505 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5506 put_gpr_w1(r1, mkexpr(result));
5507 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5508 op1)), op2);
5509
5510 return "lcr";
5511}
5512
5513static HChar *
5514s390_irgen_LCGR(UChar r1, UChar r2)
5515{
5516 Long op1;
5517 IRTemp op2 = newTemp(Ity_I64);
5518 IRTemp result = newTemp(Ity_I64);
5519
5520 op1 = 0ULL;
5521 assign(op2, get_gpr_dw0(r2));
5522 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5523 put_gpr_dw0(r1, mkexpr(result));
5524 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5525 op1)), op2);
5526
5527 return "lcgr";
5528}
5529
5530static HChar *
5531s390_irgen_LCGFR(UChar r1, UChar r2)
5532{
5533 Long op1;
5534 IRTemp op2 = newTemp(Ity_I64);
5535 IRTemp result = newTemp(Ity_I64);
5536
5537 op1 = 0ULL;
5538 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5539 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5540 put_gpr_dw0(r1, mkexpr(result));
5541 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5542 op1)), op2);
5543
5544 return "lcgfr";
5545}
5546
5547static HChar *
5548s390_irgen_LHR(UChar r1, UChar r2)
5549{
5550 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5551
5552 return "lhr";
5553}
5554
5555static HChar *
5556s390_irgen_LGHR(UChar r1, UChar r2)
5557{
5558 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5559
5560 return "lghr";
5561}
5562
5563static HChar *
5564s390_irgen_LH(UChar r1, IRTemp op2addr)
5565{
5566 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5567
5568 return "lh";
5569}
5570
5571static HChar *
5572s390_irgen_LHY(UChar r1, IRTemp op2addr)
5573{
5574 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5575
5576 return "lhy";
5577}
5578
5579static HChar *
5580s390_irgen_LGH(UChar r1, IRTemp op2addr)
5581{
5582 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5583
5584 return "lgh";
5585}
5586
5587static HChar *
5588s390_irgen_LHI(UChar r1, UShort i2)
5589{
5590 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5591
5592 return "lhi";
5593}
5594
5595static HChar *
5596s390_irgen_LGHI(UChar r1, UShort i2)
5597{
5598 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5599
5600 return "lghi";
5601}
5602
5603static HChar *
5604s390_irgen_LHRL(UChar r1, UInt i2)
5605{
5606 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5607 ((ULong)(Long)(Int)i2 << 1)))));
5608
5609 return "lhrl";
5610}
5611
5612static HChar *
5613s390_irgen_LGHRL(UChar r1, UInt i2)
5614{
5615 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5616 ((ULong)(Long)(Int)i2 << 1)))));
5617
5618 return "lghrl";
5619}
5620
5621static HChar *
5622s390_irgen_LHH(UChar r1, IRTemp op2addr)
5623{
5624 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5625
5626 return "lhh";
5627}
5628
5629static HChar *
5630s390_irgen_LFH(UChar r1, IRTemp op2addr)
5631{
5632 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5633
5634 return "lfh";
5635}
5636
5637static HChar *
5638s390_irgen_LLGFR(UChar r1, UChar r2)
5639{
5640 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5641
5642 return "llgfr";
5643}
5644
5645static HChar *
5646s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5647{
5648 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5649
5650 return "llgf";
5651}
5652
5653static HChar *
5654s390_irgen_LLGFRL(UChar r1, UInt i2)
5655{
5656 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5657 ((ULong)(Long)(Int)i2 << 1)))));
5658
5659 return "llgfrl";
5660}
5661
5662static HChar *
5663s390_irgen_LLCR(UChar r1, UChar r2)
5664{
5665 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5666
5667 return "llcr";
5668}
5669
5670static HChar *
5671s390_irgen_LLGCR(UChar r1, UChar r2)
5672{
5673 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5674
5675 return "llgcr";
5676}
5677
5678static HChar *
5679s390_irgen_LLC(UChar r1, IRTemp op2addr)
5680{
5681 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5682
5683 return "llc";
5684}
5685
5686static HChar *
5687s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5688{
5689 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5690
5691 return "llgc";
5692}
5693
5694static HChar *
5695s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5696{
5697 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5698
5699 return "llch";
5700}
5701
5702static HChar *
5703s390_irgen_LLHR(UChar r1, UChar r2)
5704{
5705 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5706
5707 return "llhr";
5708}
5709
5710static HChar *
5711s390_irgen_LLGHR(UChar r1, UChar r2)
5712{
5713 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5714
5715 return "llghr";
5716}
5717
5718static HChar *
5719s390_irgen_LLH(UChar r1, IRTemp op2addr)
5720{
5721 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5722
5723 return "llh";
5724}
5725
5726static HChar *
5727s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5728{
5729 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5730
5731 return "llgh";
5732}
5733
5734static HChar *
5735s390_irgen_LLHRL(UChar r1, UInt i2)
5736{
5737 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5738 ((ULong)(Long)(Int)i2 << 1)))));
5739
5740 return "llhrl";
5741}
5742
5743static HChar *
5744s390_irgen_LLGHRL(UChar r1, UInt i2)
5745{
5746 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5747 ((ULong)(Long)(Int)i2 << 1)))));
5748
5749 return "llghrl";
5750}
5751
5752static HChar *
5753s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5754{
5755 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5756
5757 return "llhh";
5758}
5759
5760static HChar *
5761s390_irgen_LLIHF(UChar r1, UInt i2)
5762{
5763 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5764
5765 return "llihf";
5766}
5767
5768static HChar *
5769s390_irgen_LLIHH(UChar r1, UShort i2)
5770{
5771 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5772
5773 return "llihh";
5774}
5775
5776static HChar *
5777s390_irgen_LLIHL(UChar r1, UShort i2)
5778{
5779 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5780
5781 return "llihl";
5782}
5783
5784static HChar *
5785s390_irgen_LLILF(UChar r1, UInt i2)
5786{
5787 put_gpr_dw0(r1, mkU64(i2));
5788
5789 return "llilf";
5790}
5791
5792static HChar *
5793s390_irgen_LLILH(UChar r1, UShort i2)
5794{
5795 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5796
5797 return "llilh";
5798}
5799
5800static HChar *
5801s390_irgen_LLILL(UChar r1, UShort i2)
5802{
5803 put_gpr_dw0(r1, mkU64(i2));
5804
5805 return "llill";
5806}
5807
5808static HChar *
5809s390_irgen_LLGTR(UChar r1, UChar r2)
5810{
5811 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5812 mkU32(2147483647))));
5813
5814 return "llgtr";
5815}
5816
5817static HChar *
5818s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5819{
5820 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5821 mkexpr(op2addr)), mkU32(2147483647))));
5822
5823 return "llgt";
5824}
5825
5826static HChar *
5827s390_irgen_LNR(UChar r1, UChar r2)
5828{
5829 IRTemp op2 = newTemp(Ity_I32);
5830 IRTemp result = newTemp(Ity_I32);
5831
5832 assign(op2, get_gpr_w1(r2));
5833 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5834 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5835 put_gpr_w1(r1, mkexpr(result));
5836 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5837
5838 return "lnr";
5839}
5840
5841static HChar *
5842s390_irgen_LNGR(UChar r1, UChar r2)
5843{
5844 IRTemp op2 = newTemp(Ity_I64);
5845 IRTemp result = newTemp(Ity_I64);
5846
5847 assign(op2, get_gpr_dw0(r2));
5848 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5849 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5850 put_gpr_dw0(r1, mkexpr(result));
5851 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5852
5853 return "lngr";
5854}
5855
5856static HChar *
5857s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5858{
5859 IRTemp op2 = newTemp(Ity_I64);
5860 IRTemp result = newTemp(Ity_I64);
5861
5862 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5863 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5864 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5865 put_gpr_dw0(r1, mkexpr(result));
5866 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5867
5868 return "lngfr";
5869}
5870
5871static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005872s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5873{
5874 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5875 guest_IA_next_instr);
5876 put_gpr_w1(r1, get_gpr_w1(r2));
florianf9e1ed72012-04-17 02:41:56 +00005877 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005878
5879 return "locr";
5880}
5881
5882static HChar *
5883s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5884{
5885 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5886 guest_IA_next_instr);
5887 put_gpr_dw0(r1, get_gpr_dw0(r2));
florianf9e1ed72012-04-17 02:41:56 +00005888 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005889
5890 return "locgr";
5891}
5892
5893static HChar *
5894s390_irgen_LOC(UChar r1, IRTemp op2addr)
5895{
5896 /* condition is checked in format handler */
5897 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5898
5899 return "loc";
5900}
5901
5902static HChar *
5903s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5904{
5905 /* condition is checked in format handler */
5906 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5907
5908 return "locg";
5909}
5910
5911static HChar *
sewardj2019a972011-03-07 16:04:07 +00005912s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5913{
5914 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5915 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5916 ));
5917
5918 return "lpq";
5919}
5920
5921static HChar *
5922s390_irgen_LPR(UChar r1, UChar r2)
5923{
5924 IRTemp op2 = newTemp(Ity_I32);
5925 IRTemp result = newTemp(Ity_I32);
5926
5927 assign(op2, get_gpr_w1(r2));
5928 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5929 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5930 put_gpr_w1(r1, mkexpr(result));
5931 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5932
5933 return "lpr";
5934}
5935
5936static HChar *
5937s390_irgen_LPGR(UChar r1, UChar r2)
5938{
5939 IRTemp op2 = newTemp(Ity_I64);
5940 IRTemp result = newTemp(Ity_I64);
5941
5942 assign(op2, get_gpr_dw0(r2));
5943 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5944 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5945 put_gpr_dw0(r1, mkexpr(result));
5946 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5947
5948 return "lpgr";
5949}
5950
5951static HChar *
5952s390_irgen_LPGFR(UChar r1, UChar r2)
5953{
5954 IRTemp op2 = newTemp(Ity_I64);
5955 IRTemp result = newTemp(Ity_I64);
5956
5957 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5958 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5959 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5960 put_gpr_dw0(r1, mkexpr(result));
5961 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5962
5963 return "lpgfr";
5964}
5965
5966static HChar *
5967s390_irgen_LRVR(UChar r1, UChar r2)
5968{
5969 IRTemp b0 = newTemp(Ity_I8);
5970 IRTemp b1 = newTemp(Ity_I8);
5971 IRTemp b2 = newTemp(Ity_I8);
5972 IRTemp b3 = newTemp(Ity_I8);
5973
5974 assign(b3, get_gpr_b7(r2));
5975 assign(b2, get_gpr_b6(r2));
5976 assign(b1, get_gpr_b5(r2));
5977 assign(b0, get_gpr_b4(r2));
5978 put_gpr_b4(r1, mkexpr(b3));
5979 put_gpr_b5(r1, mkexpr(b2));
5980 put_gpr_b6(r1, mkexpr(b1));
5981 put_gpr_b7(r1, mkexpr(b0));
5982
5983 return "lrvr";
5984}
5985
5986static HChar *
5987s390_irgen_LRVGR(UChar r1, UChar r2)
5988{
5989 IRTemp b0 = newTemp(Ity_I8);
5990 IRTemp b1 = newTemp(Ity_I8);
5991 IRTemp b2 = newTemp(Ity_I8);
5992 IRTemp b3 = newTemp(Ity_I8);
5993 IRTemp b4 = newTemp(Ity_I8);
5994 IRTemp b5 = newTemp(Ity_I8);
5995 IRTemp b6 = newTemp(Ity_I8);
5996 IRTemp b7 = newTemp(Ity_I8);
5997
5998 assign(b7, get_gpr_b7(r2));
5999 assign(b6, get_gpr_b6(r2));
6000 assign(b5, get_gpr_b5(r2));
6001 assign(b4, get_gpr_b4(r2));
6002 assign(b3, get_gpr_b3(r2));
6003 assign(b2, get_gpr_b2(r2));
6004 assign(b1, get_gpr_b1(r2));
6005 assign(b0, get_gpr_b0(r2));
6006 put_gpr_b0(r1, mkexpr(b7));
6007 put_gpr_b1(r1, mkexpr(b6));
6008 put_gpr_b2(r1, mkexpr(b5));
6009 put_gpr_b3(r1, mkexpr(b4));
6010 put_gpr_b4(r1, mkexpr(b3));
6011 put_gpr_b5(r1, mkexpr(b2));
6012 put_gpr_b6(r1, mkexpr(b1));
6013 put_gpr_b7(r1, mkexpr(b0));
6014
6015 return "lrvgr";
6016}
6017
6018static HChar *
6019s390_irgen_LRVH(UChar r1, IRTemp op2addr)
6020{
6021 IRTemp op2 = newTemp(Ity_I16);
6022
6023 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6024 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
6025 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
6026
6027 return "lrvh";
6028}
6029
6030static HChar *
6031s390_irgen_LRV(UChar r1, IRTemp op2addr)
6032{
6033 IRTemp op2 = newTemp(Ity_I32);
6034
6035 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6036 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6037 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6038 mkU8(8)), mkU32(255))));
6039 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6040 mkU8(16)), mkU32(255))));
6041 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6042 mkU8(24)), mkU32(255))));
6043
6044 return "lrv";
6045}
6046
6047static HChar *
6048s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6049{
6050 IRTemp op2 = newTemp(Ity_I64);
6051
6052 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6053 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6054 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6055 mkU8(8)), mkU64(255))));
6056 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6057 mkU8(16)), mkU64(255))));
6058 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6059 mkU8(24)), mkU64(255))));
6060 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6061 mkU8(32)), mkU64(255))));
6062 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6063 mkU8(40)), mkU64(255))));
6064 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6065 mkU8(48)), mkU64(255))));
6066 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6067 mkU8(56)), mkU64(255))));
6068
6069 return "lrvg";
6070}
6071
6072static HChar *
6073s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6074{
6075 store(mkexpr(op1addr), mkU16(i2));
6076
6077 return "mvhhi";
6078}
6079
6080static HChar *
6081s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6082{
6083 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6084
6085 return "mvhi";
6086}
6087
6088static HChar *
6089s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6090{
6091 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6092
6093 return "mvghi";
6094}
6095
6096static HChar *
6097s390_irgen_MVI(UChar i2, IRTemp op1addr)
6098{
6099 store(mkexpr(op1addr), mkU8(i2));
6100
6101 return "mvi";
6102}
6103
6104static HChar *
6105s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6106{
6107 store(mkexpr(op1addr), mkU8(i2));
6108
6109 return "mviy";
6110}
6111
6112static HChar *
6113s390_irgen_MR(UChar r1, UChar r2)
6114{
6115 IRTemp op1 = newTemp(Ity_I32);
6116 IRTemp op2 = newTemp(Ity_I32);
6117 IRTemp result = newTemp(Ity_I64);
6118
6119 assign(op1, get_gpr_w1(r1 + 1));
6120 assign(op2, get_gpr_w1(r2));
6121 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6122 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6123 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6124
6125 return "mr";
6126}
6127
6128static HChar *
6129s390_irgen_M(UChar r1, IRTemp op2addr)
6130{
6131 IRTemp op1 = newTemp(Ity_I32);
6132 IRTemp op2 = newTemp(Ity_I32);
6133 IRTemp result = newTemp(Ity_I64);
6134
6135 assign(op1, get_gpr_w1(r1 + 1));
6136 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6137 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6138 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6139 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6140
6141 return "m";
6142}
6143
6144static HChar *
6145s390_irgen_MFY(UChar r1, IRTemp op2addr)
6146{
6147 IRTemp op1 = newTemp(Ity_I32);
6148 IRTemp op2 = newTemp(Ity_I32);
6149 IRTemp result = newTemp(Ity_I64);
6150
6151 assign(op1, get_gpr_w1(r1 + 1));
6152 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6153 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6154 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6155 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6156
6157 return "mfy";
6158}
6159
6160static HChar *
6161s390_irgen_MH(UChar r1, IRTemp op2addr)
6162{
6163 IRTemp op1 = newTemp(Ity_I32);
6164 IRTemp op2 = newTemp(Ity_I16);
6165 IRTemp result = newTemp(Ity_I64);
6166
6167 assign(op1, get_gpr_w1(r1));
6168 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6169 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6170 ));
6171 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6172
6173 return "mh";
6174}
6175
6176static HChar *
6177s390_irgen_MHY(UChar r1, IRTemp op2addr)
6178{
6179 IRTemp op1 = newTemp(Ity_I32);
6180 IRTemp op2 = newTemp(Ity_I16);
6181 IRTemp result = newTemp(Ity_I64);
6182
6183 assign(op1, get_gpr_w1(r1));
6184 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6185 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6186 ));
6187 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6188
6189 return "mhy";
6190}
6191
6192static HChar *
6193s390_irgen_MHI(UChar r1, UShort i2)
6194{
6195 IRTemp op1 = newTemp(Ity_I32);
6196 Short op2;
6197 IRTemp result = newTemp(Ity_I64);
6198
6199 assign(op1, get_gpr_w1(r1));
6200 op2 = (Short)i2;
6201 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6202 mkU16((UShort)op2))));
6203 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6204
6205 return "mhi";
6206}
6207
6208static HChar *
6209s390_irgen_MGHI(UChar r1, UShort i2)
6210{
6211 IRTemp op1 = newTemp(Ity_I64);
6212 Short op2;
6213 IRTemp result = newTemp(Ity_I128);
6214
6215 assign(op1, get_gpr_dw0(r1));
6216 op2 = (Short)i2;
6217 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6218 mkU16((UShort)op2))));
6219 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6220
6221 return "mghi";
6222}
6223
6224static HChar *
6225s390_irgen_MLR(UChar r1, UChar r2)
6226{
6227 IRTemp op1 = newTemp(Ity_I32);
6228 IRTemp op2 = newTemp(Ity_I32);
6229 IRTemp result = newTemp(Ity_I64);
6230
6231 assign(op1, get_gpr_w1(r1 + 1));
6232 assign(op2, get_gpr_w1(r2));
6233 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6234 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6235 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6236
6237 return "mlr";
6238}
6239
6240static HChar *
6241s390_irgen_MLGR(UChar r1, UChar r2)
6242{
6243 IRTemp op1 = newTemp(Ity_I64);
6244 IRTemp op2 = newTemp(Ity_I64);
6245 IRTemp result = newTemp(Ity_I128);
6246
6247 assign(op1, get_gpr_dw0(r1 + 1));
6248 assign(op2, get_gpr_dw0(r2));
6249 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6250 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6251 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6252
6253 return "mlgr";
6254}
6255
6256static HChar *
6257s390_irgen_ML(UChar r1, IRTemp op2addr)
6258{
6259 IRTemp op1 = newTemp(Ity_I32);
6260 IRTemp op2 = newTemp(Ity_I32);
6261 IRTemp result = newTemp(Ity_I64);
6262
6263 assign(op1, get_gpr_w1(r1 + 1));
6264 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6265 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6266 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6267 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6268
6269 return "ml";
6270}
6271
6272static HChar *
6273s390_irgen_MLG(UChar r1, IRTemp op2addr)
6274{
6275 IRTemp op1 = newTemp(Ity_I64);
6276 IRTemp op2 = newTemp(Ity_I64);
6277 IRTemp result = newTemp(Ity_I128);
6278
6279 assign(op1, get_gpr_dw0(r1 + 1));
6280 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6281 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6282 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6283 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6284
6285 return "mlg";
6286}
6287
6288static HChar *
6289s390_irgen_MSR(UChar r1, UChar r2)
6290{
6291 IRTemp op1 = newTemp(Ity_I32);
6292 IRTemp op2 = newTemp(Ity_I32);
6293 IRTemp result = newTemp(Ity_I64);
6294
6295 assign(op1, get_gpr_w1(r1));
6296 assign(op2, get_gpr_w1(r2));
6297 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6298 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6299
6300 return "msr";
6301}
6302
6303static HChar *
6304s390_irgen_MSGR(UChar r1, UChar r2)
6305{
6306 IRTemp op1 = newTemp(Ity_I64);
6307 IRTemp op2 = newTemp(Ity_I64);
6308 IRTemp result = newTemp(Ity_I128);
6309
6310 assign(op1, get_gpr_dw0(r1));
6311 assign(op2, get_gpr_dw0(r2));
6312 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6313 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6314
6315 return "msgr";
6316}
6317
6318static HChar *
6319s390_irgen_MSGFR(UChar r1, UChar r2)
6320{
6321 IRTemp op1 = newTemp(Ity_I64);
6322 IRTemp op2 = newTemp(Ity_I32);
6323 IRTemp result = newTemp(Ity_I128);
6324
6325 assign(op1, get_gpr_dw0(r1));
6326 assign(op2, get_gpr_w1(r2));
6327 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6328 ));
6329 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6330
6331 return "msgfr";
6332}
6333
6334static HChar *
6335s390_irgen_MS(UChar r1, IRTemp op2addr)
6336{
6337 IRTemp op1 = newTemp(Ity_I32);
6338 IRTemp op2 = newTemp(Ity_I32);
6339 IRTemp result = newTemp(Ity_I64);
6340
6341 assign(op1, get_gpr_w1(r1));
6342 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6343 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6344 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6345
6346 return "ms";
6347}
6348
6349static HChar *
6350s390_irgen_MSY(UChar r1, IRTemp op2addr)
6351{
6352 IRTemp op1 = newTemp(Ity_I32);
6353 IRTemp op2 = newTemp(Ity_I32);
6354 IRTemp result = newTemp(Ity_I64);
6355
6356 assign(op1, get_gpr_w1(r1));
6357 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6358 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6359 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6360
6361 return "msy";
6362}
6363
6364static HChar *
6365s390_irgen_MSG(UChar r1, IRTemp op2addr)
6366{
6367 IRTemp op1 = newTemp(Ity_I64);
6368 IRTemp op2 = newTemp(Ity_I64);
6369 IRTemp result = newTemp(Ity_I128);
6370
6371 assign(op1, get_gpr_dw0(r1));
6372 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6373 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6374 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6375
6376 return "msg";
6377}
6378
6379static HChar *
6380s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6381{
6382 IRTemp op1 = newTemp(Ity_I64);
6383 IRTemp op2 = newTemp(Ity_I32);
6384 IRTemp result = newTemp(Ity_I128);
6385
6386 assign(op1, get_gpr_dw0(r1));
6387 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6388 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6389 ));
6390 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6391
6392 return "msgf";
6393}
6394
6395static HChar *
6396s390_irgen_MSFI(UChar r1, UInt i2)
6397{
6398 IRTemp op1 = newTemp(Ity_I32);
6399 Int op2;
6400 IRTemp result = newTemp(Ity_I64);
6401
6402 assign(op1, get_gpr_w1(r1));
6403 op2 = (Int)i2;
6404 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6405 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6406
6407 return "msfi";
6408}
6409
6410static HChar *
6411s390_irgen_MSGFI(UChar r1, UInt i2)
6412{
6413 IRTemp op1 = newTemp(Ity_I64);
6414 Int op2;
6415 IRTemp result = newTemp(Ity_I128);
6416
6417 assign(op1, get_gpr_dw0(r1));
6418 op2 = (Int)i2;
6419 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6420 op2))));
6421 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6422
6423 return "msgfi";
6424}
6425
6426static HChar *
6427s390_irgen_OR(UChar r1, UChar r2)
6428{
6429 IRTemp op1 = newTemp(Ity_I32);
6430 IRTemp op2 = newTemp(Ity_I32);
6431 IRTemp result = newTemp(Ity_I32);
6432
6433 assign(op1, get_gpr_w1(r1));
6434 assign(op2, get_gpr_w1(r2));
6435 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6436 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6437 put_gpr_w1(r1, mkexpr(result));
6438
6439 return "or";
6440}
6441
6442static HChar *
6443s390_irgen_OGR(UChar r1, UChar r2)
6444{
6445 IRTemp op1 = newTemp(Ity_I64);
6446 IRTemp op2 = newTemp(Ity_I64);
6447 IRTemp result = newTemp(Ity_I64);
6448
6449 assign(op1, get_gpr_dw0(r1));
6450 assign(op2, get_gpr_dw0(r2));
6451 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6452 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6453 put_gpr_dw0(r1, mkexpr(result));
6454
6455 return "ogr";
6456}
6457
6458static HChar *
6459s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6460{
6461 IRTemp op2 = newTemp(Ity_I32);
6462 IRTemp op3 = newTemp(Ity_I32);
6463 IRTemp result = newTemp(Ity_I32);
6464
6465 assign(op2, get_gpr_w1(r2));
6466 assign(op3, get_gpr_w1(r3));
6467 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6468 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6469 put_gpr_w1(r1, mkexpr(result));
6470
6471 return "ork";
6472}
6473
6474static HChar *
6475s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6476{
6477 IRTemp op2 = newTemp(Ity_I64);
6478 IRTemp op3 = newTemp(Ity_I64);
6479 IRTemp result = newTemp(Ity_I64);
6480
6481 assign(op2, get_gpr_dw0(r2));
6482 assign(op3, get_gpr_dw0(r3));
6483 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6484 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6485 put_gpr_dw0(r1, mkexpr(result));
6486
6487 return "ogrk";
6488}
6489
6490static HChar *
6491s390_irgen_O(UChar r1, IRTemp op2addr)
6492{
6493 IRTemp op1 = newTemp(Ity_I32);
6494 IRTemp op2 = newTemp(Ity_I32);
6495 IRTemp result = newTemp(Ity_I32);
6496
6497 assign(op1, get_gpr_w1(r1));
6498 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6499 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6500 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6501 put_gpr_w1(r1, mkexpr(result));
6502
6503 return "o";
6504}
6505
6506static HChar *
6507s390_irgen_OY(UChar r1, IRTemp op2addr)
6508{
6509 IRTemp op1 = newTemp(Ity_I32);
6510 IRTemp op2 = newTemp(Ity_I32);
6511 IRTemp result = newTemp(Ity_I32);
6512
6513 assign(op1, get_gpr_w1(r1));
6514 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6515 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6516 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6517 put_gpr_w1(r1, mkexpr(result));
6518
6519 return "oy";
6520}
6521
6522static HChar *
6523s390_irgen_OG(UChar r1, IRTemp op2addr)
6524{
6525 IRTemp op1 = newTemp(Ity_I64);
6526 IRTemp op2 = newTemp(Ity_I64);
6527 IRTemp result = newTemp(Ity_I64);
6528
6529 assign(op1, get_gpr_dw0(r1));
6530 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6531 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6532 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6533 put_gpr_dw0(r1, mkexpr(result));
6534
6535 return "og";
6536}
6537
6538static HChar *
6539s390_irgen_OI(UChar i2, IRTemp op1addr)
6540{
6541 IRTemp op1 = newTemp(Ity_I8);
6542 UChar op2;
6543 IRTemp result = newTemp(Ity_I8);
6544
6545 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6546 op2 = i2;
6547 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6548 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6549 store(mkexpr(op1addr), mkexpr(result));
6550
6551 return "oi";
6552}
6553
6554static HChar *
6555s390_irgen_OIY(UChar i2, IRTemp op1addr)
6556{
6557 IRTemp op1 = newTemp(Ity_I8);
6558 UChar op2;
6559 IRTemp result = newTemp(Ity_I8);
6560
6561 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6562 op2 = i2;
6563 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6564 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6565 store(mkexpr(op1addr), mkexpr(result));
6566
6567 return "oiy";
6568}
6569
6570static HChar *
6571s390_irgen_OIHF(UChar r1, UInt i2)
6572{
6573 IRTemp op1 = newTemp(Ity_I32);
6574 UInt op2;
6575 IRTemp result = newTemp(Ity_I32);
6576
6577 assign(op1, get_gpr_w0(r1));
6578 op2 = i2;
6579 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6580 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6581 put_gpr_w0(r1, mkexpr(result));
6582
6583 return "oihf";
6584}
6585
6586static HChar *
6587s390_irgen_OIHH(UChar r1, UShort i2)
6588{
6589 IRTemp op1 = newTemp(Ity_I16);
6590 UShort op2;
6591 IRTemp result = newTemp(Ity_I16);
6592
6593 assign(op1, get_gpr_hw0(r1));
6594 op2 = i2;
6595 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6596 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6597 put_gpr_hw0(r1, mkexpr(result));
6598
6599 return "oihh";
6600}
6601
6602static HChar *
6603s390_irgen_OIHL(UChar r1, UShort i2)
6604{
6605 IRTemp op1 = newTemp(Ity_I16);
6606 UShort op2;
6607 IRTemp result = newTemp(Ity_I16);
6608
6609 assign(op1, get_gpr_hw1(r1));
6610 op2 = i2;
6611 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6612 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6613 put_gpr_hw1(r1, mkexpr(result));
6614
6615 return "oihl";
6616}
6617
6618static HChar *
6619s390_irgen_OILF(UChar r1, UInt i2)
6620{
6621 IRTemp op1 = newTemp(Ity_I32);
6622 UInt op2;
6623 IRTemp result = newTemp(Ity_I32);
6624
6625 assign(op1, get_gpr_w1(r1));
6626 op2 = i2;
6627 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6628 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6629 put_gpr_w1(r1, mkexpr(result));
6630
6631 return "oilf";
6632}
6633
6634static HChar *
6635s390_irgen_OILH(UChar r1, UShort i2)
6636{
6637 IRTemp op1 = newTemp(Ity_I16);
6638 UShort op2;
6639 IRTemp result = newTemp(Ity_I16);
6640
6641 assign(op1, get_gpr_hw2(r1));
6642 op2 = i2;
6643 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6644 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6645 put_gpr_hw2(r1, mkexpr(result));
6646
6647 return "oilh";
6648}
6649
6650static HChar *
6651s390_irgen_OILL(UChar r1, UShort i2)
6652{
6653 IRTemp op1 = newTemp(Ity_I16);
6654 UShort op2;
6655 IRTemp result = newTemp(Ity_I16);
6656
6657 assign(op1, get_gpr_hw3(r1));
6658 op2 = i2;
6659 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6660 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6661 put_gpr_hw3(r1, mkexpr(result));
6662
6663 return "oill";
6664}
6665
6666static HChar *
6667s390_irgen_PFD(void)
6668{
6669
6670 return "pfd";
6671}
6672
6673static HChar *
6674s390_irgen_PFDRL(void)
6675{
6676
6677 return "pfdrl";
6678}
6679
6680static HChar *
6681s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6682{
6683 IRTemp amount = newTemp(Ity_I64);
6684 IRTemp op = newTemp(Ity_I32);
6685
6686 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6687 assign(op, get_gpr_w1(r3));
6688 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6689 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6690 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6691
6692 return "rll";
6693}
6694
6695static HChar *
6696s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6697{
6698 IRTemp amount = newTemp(Ity_I64);
6699 IRTemp op = newTemp(Ity_I64);
6700
6701 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6702 assign(op, get_gpr_dw0(r3));
6703 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6704 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6705 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6706
6707 return "rllg";
6708}
6709
6710static HChar *
6711s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6712{
6713 UChar from;
6714 UChar to;
6715 UChar rot;
6716 UChar t_bit;
6717 ULong mask;
6718 ULong maskc;
6719 IRTemp result = newTemp(Ity_I64);
6720 IRTemp op2 = newTemp(Ity_I64);
6721
6722 from = i3 & 63;
6723 to = i4 & 63;
6724 rot = i5 & 63;
6725 t_bit = i3 & 128;
6726 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6727 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6728 mkU8(64 - rot))));
6729 if (from <= to) {
6730 mask = ~0ULL;
6731 mask = (mask >> from) & (mask << (63 - to));
6732 maskc = ~mask;
6733 } else {
6734 maskc = ~0ULL;
6735 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6736 mask = ~maskc;
6737 }
6738 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6739 ), mkU64(mask)));
6740 if (t_bit == 0) {
6741 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6742 mkU64(maskc)), mkexpr(result)));
6743 }
6744 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6745
6746 return "rnsbg";
6747}
6748
6749static HChar *
6750s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6751{
6752 UChar from;
6753 UChar to;
6754 UChar rot;
6755 UChar t_bit;
6756 ULong mask;
6757 ULong maskc;
6758 IRTemp result = newTemp(Ity_I64);
6759 IRTemp op2 = newTemp(Ity_I64);
6760
6761 from = i3 & 63;
6762 to = i4 & 63;
6763 rot = i5 & 63;
6764 t_bit = i3 & 128;
6765 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6766 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6767 mkU8(64 - rot))));
6768 if (from <= to) {
6769 mask = ~0ULL;
6770 mask = (mask >> from) & (mask << (63 - to));
6771 maskc = ~mask;
6772 } else {
6773 maskc = ~0ULL;
6774 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6775 mask = ~maskc;
6776 }
6777 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6778 ), mkU64(mask)));
6779 if (t_bit == 0) {
6780 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6781 mkU64(maskc)), mkexpr(result)));
6782 }
6783 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6784
6785 return "rxsbg";
6786}
6787
6788static HChar *
6789s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6790{
6791 UChar from;
6792 UChar to;
6793 UChar rot;
6794 UChar t_bit;
6795 ULong mask;
6796 ULong maskc;
6797 IRTemp result = newTemp(Ity_I64);
6798 IRTemp op2 = newTemp(Ity_I64);
6799
6800 from = i3 & 63;
6801 to = i4 & 63;
6802 rot = i5 & 63;
6803 t_bit = i3 & 128;
6804 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6805 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6806 mkU8(64 - rot))));
6807 if (from <= to) {
6808 mask = ~0ULL;
6809 mask = (mask >> from) & (mask << (63 - to));
6810 maskc = ~mask;
6811 } else {
6812 maskc = ~0ULL;
6813 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6814 mask = ~maskc;
6815 }
6816 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6817 ), mkU64(mask)));
6818 if (t_bit == 0) {
6819 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6820 mkU64(maskc)), mkexpr(result)));
6821 }
6822 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6823
6824 return "rosbg";
6825}
6826
6827static HChar *
6828s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6829{
6830 UChar from;
6831 UChar to;
6832 UChar rot;
6833 UChar z_bit;
6834 ULong mask;
6835 ULong maskc;
6836 IRTemp op2 = newTemp(Ity_I64);
6837 IRTemp result = newTemp(Ity_I64);
6838
6839 from = i3 & 63;
6840 to = i4 & 63;
6841 rot = i5 & 63;
6842 z_bit = i4 & 128;
6843 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6844 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6845 mkU8(64 - rot))));
6846 if (from <= to) {
6847 mask = ~0ULL;
6848 mask = (mask >> from) & (mask << (63 - to));
6849 maskc = ~mask;
6850 } else {
6851 maskc = ~0ULL;
6852 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6853 mask = ~maskc;
6854 }
6855 if (z_bit == 0) {
6856 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6857 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6858 } else {
6859 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6860 }
6861 assign(result, get_gpr_dw0(r1));
6862 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6863
6864 return "risbg";
6865}
6866
6867static HChar *
6868s390_irgen_SAR(UChar r1, UChar r2)
6869{
6870 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006871 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006872 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6873
6874 return "sar";
6875}
6876
6877static HChar *
6878s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6879{
6880 IRTemp p1 = newTemp(Ity_I64);
6881 IRTemp p2 = newTemp(Ity_I64);
6882 IRTemp op = newTemp(Ity_I64);
6883 IRTemp result = newTemp(Ity_I64);
6884 Long sign_mask;
6885 IRTemp shift_amount = newTemp(Ity_I64);
6886
6887 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6888 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6889 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6890 ));
6891 sign_mask = 1ULL << 63;
6892 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6893 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6894 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6895 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6896 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6897 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6898 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6899
6900 return "slda";
6901}
6902
6903static HChar *
6904s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6905{
6906 IRTemp p1 = newTemp(Ity_I64);
6907 IRTemp p2 = newTemp(Ity_I64);
6908 IRTemp result = newTemp(Ity_I64);
6909
6910 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6911 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6912 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6913 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6914 mkexpr(op2addr), mkU64(63)))));
6915 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6916 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6917
6918 return "sldl";
6919}
6920
6921static HChar *
6922s390_irgen_SLA(UChar r1, IRTemp op2addr)
6923{
6924 IRTemp uop = newTemp(Ity_I32);
6925 IRTemp result = newTemp(Ity_I32);
6926 UInt sign_mask;
6927 IRTemp shift_amount = newTemp(Ity_I64);
6928 IRTemp op = newTemp(Ity_I32);
6929
6930 assign(op, get_gpr_w1(r1));
6931 assign(uop, get_gpr_w1(r1));
6932 sign_mask = 2147483648U;
6933 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6934 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6935 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6936 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6937 put_gpr_w1(r1, mkexpr(result));
6938 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6939
6940 return "sla";
6941}
6942
6943static HChar *
6944s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6945{
6946 IRTemp uop = newTemp(Ity_I32);
6947 IRTemp result = newTemp(Ity_I32);
6948 UInt sign_mask;
6949 IRTemp shift_amount = newTemp(Ity_I64);
6950 IRTemp op = newTemp(Ity_I32);
6951
6952 assign(op, get_gpr_w1(r3));
6953 assign(uop, get_gpr_w1(r3));
6954 sign_mask = 2147483648U;
6955 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6956 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6957 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6958 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6959 put_gpr_w1(r1, mkexpr(result));
6960 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6961
6962 return "slak";
6963}
6964
6965static HChar *
6966s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6967{
6968 IRTemp uop = newTemp(Ity_I64);
6969 IRTemp result = newTemp(Ity_I64);
6970 ULong sign_mask;
6971 IRTemp shift_amount = newTemp(Ity_I64);
6972 IRTemp op = newTemp(Ity_I64);
6973
6974 assign(op, get_gpr_dw0(r3));
6975 assign(uop, get_gpr_dw0(r3));
6976 sign_mask = 9223372036854775808ULL;
6977 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6978 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6979 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6980 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6981 put_gpr_dw0(r1, mkexpr(result));
6982 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6983
6984 return "slag";
6985}
6986
6987static HChar *
6988s390_irgen_SLL(UChar r1, IRTemp op2addr)
6989{
6990 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6991 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6992
6993 return "sll";
6994}
6995
6996static HChar *
6997s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6998{
6999 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
7000 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7001
7002 return "sllk";
7003}
7004
7005static HChar *
7006s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
7007{
7008 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
7009 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7010
7011 return "sllg";
7012}
7013
7014static HChar *
7015s390_irgen_SRDA(UChar r1, IRTemp op2addr)
7016{
7017 IRTemp p1 = newTemp(Ity_I64);
7018 IRTemp p2 = newTemp(Ity_I64);
7019 IRTemp result = newTemp(Ity_I64);
7020
7021 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7022 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7023 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7024 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7025 mkexpr(op2addr), mkU64(63)))));
7026 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7027 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7028 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7029
7030 return "srda";
7031}
7032
7033static HChar *
7034s390_irgen_SRDL(UChar r1, IRTemp op2addr)
7035{
7036 IRTemp p1 = newTemp(Ity_I64);
7037 IRTemp p2 = newTemp(Ity_I64);
7038 IRTemp result = newTemp(Ity_I64);
7039
7040 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7041 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7042 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7043 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7044 mkexpr(op2addr), mkU64(63)))));
7045 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7046 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7047
7048 return "srdl";
7049}
7050
7051static HChar *
7052s390_irgen_SRA(UChar r1, IRTemp op2addr)
7053{
7054 IRTemp result = newTemp(Ity_I32);
7055 IRTemp op = newTemp(Ity_I32);
7056
7057 assign(op, get_gpr_w1(r1));
7058 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7059 mkexpr(op2addr), mkU64(63)))));
7060 put_gpr_w1(r1, mkexpr(result));
7061 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7062
7063 return "sra";
7064}
7065
7066static HChar *
7067s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7068{
7069 IRTemp result = newTemp(Ity_I32);
7070 IRTemp op = newTemp(Ity_I32);
7071
7072 assign(op, get_gpr_w1(r3));
7073 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7074 mkexpr(op2addr), mkU64(63)))));
7075 put_gpr_w1(r1, mkexpr(result));
7076 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7077
7078 return "srak";
7079}
7080
7081static HChar *
7082s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7083{
7084 IRTemp result = newTemp(Ity_I64);
7085 IRTemp op = newTemp(Ity_I64);
7086
7087 assign(op, get_gpr_dw0(r3));
7088 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7089 mkexpr(op2addr), mkU64(63)))));
7090 put_gpr_dw0(r1, mkexpr(result));
7091 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7092
7093 return "srag";
7094}
7095
7096static HChar *
7097s390_irgen_SRL(UChar r1, IRTemp op2addr)
7098{
7099 IRTemp op = newTemp(Ity_I32);
7100
7101 assign(op, get_gpr_w1(r1));
7102 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7103 mkexpr(op2addr), mkU64(63)))));
7104
7105 return "srl";
7106}
7107
7108static HChar *
7109s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7110{
7111 IRTemp op = newTemp(Ity_I32);
7112
7113 assign(op, get_gpr_w1(r3));
7114 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7115 mkexpr(op2addr), mkU64(63)))));
7116
7117 return "srlk";
7118}
7119
7120static HChar *
7121s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7122{
7123 IRTemp op = newTemp(Ity_I64);
7124
7125 assign(op, get_gpr_dw0(r3));
7126 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7127 mkexpr(op2addr), mkU64(63)))));
7128
7129 return "srlg";
7130}
7131
7132static HChar *
7133s390_irgen_ST(UChar r1, IRTemp op2addr)
7134{
7135 store(mkexpr(op2addr), get_gpr_w1(r1));
7136
7137 return "st";
7138}
7139
7140static HChar *
7141s390_irgen_STY(UChar r1, IRTemp op2addr)
7142{
7143 store(mkexpr(op2addr), get_gpr_w1(r1));
7144
7145 return "sty";
7146}
7147
7148static HChar *
7149s390_irgen_STG(UChar r1, IRTemp op2addr)
7150{
7151 store(mkexpr(op2addr), get_gpr_dw0(r1));
7152
7153 return "stg";
7154}
7155
7156static HChar *
7157s390_irgen_STRL(UChar r1, UInt i2)
7158{
7159 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7160 get_gpr_w1(r1));
7161
7162 return "strl";
7163}
7164
7165static HChar *
7166s390_irgen_STGRL(UChar r1, UInt i2)
7167{
7168 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7169 get_gpr_dw0(r1));
7170
7171 return "stgrl";
7172}
7173
7174static HChar *
7175s390_irgen_STC(UChar r1, IRTemp op2addr)
7176{
7177 store(mkexpr(op2addr), get_gpr_b7(r1));
7178
7179 return "stc";
7180}
7181
7182static HChar *
7183s390_irgen_STCY(UChar r1, IRTemp op2addr)
7184{
7185 store(mkexpr(op2addr), get_gpr_b7(r1));
7186
7187 return "stcy";
7188}
7189
7190static HChar *
7191s390_irgen_STCH(UChar r1, IRTemp op2addr)
7192{
7193 store(mkexpr(op2addr), get_gpr_b3(r1));
7194
7195 return "stch";
7196}
7197
7198static HChar *
7199s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7200{
7201 UChar mask;
7202 UChar n;
7203
7204 mask = (UChar)r3;
7205 n = 0;
7206 if ((mask & 8) != 0) {
7207 store(mkexpr(op2addr), get_gpr_b4(r1));
7208 n = n + 1;
7209 }
7210 if ((mask & 4) != 0) {
7211 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7212 n = n + 1;
7213 }
7214 if ((mask & 2) != 0) {
7215 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7216 n = n + 1;
7217 }
7218 if ((mask & 1) != 0) {
7219 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7220 }
7221
7222 return "stcm";
7223}
7224
7225static HChar *
7226s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7227{
7228 UChar mask;
7229 UChar n;
7230
7231 mask = (UChar)r3;
7232 n = 0;
7233 if ((mask & 8) != 0) {
7234 store(mkexpr(op2addr), get_gpr_b4(r1));
7235 n = n + 1;
7236 }
7237 if ((mask & 4) != 0) {
7238 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7239 n = n + 1;
7240 }
7241 if ((mask & 2) != 0) {
7242 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7243 n = n + 1;
7244 }
7245 if ((mask & 1) != 0) {
7246 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7247 }
7248
7249 return "stcmy";
7250}
7251
7252static HChar *
7253s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7254{
7255 UChar mask;
7256 UChar n;
7257
7258 mask = (UChar)r3;
7259 n = 0;
7260 if ((mask & 8) != 0) {
7261 store(mkexpr(op2addr), get_gpr_b0(r1));
7262 n = n + 1;
7263 }
7264 if ((mask & 4) != 0) {
7265 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7266 n = n + 1;
7267 }
7268 if ((mask & 2) != 0) {
7269 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7270 n = n + 1;
7271 }
7272 if ((mask & 1) != 0) {
7273 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7274 }
7275
7276 return "stcmh";
7277}
7278
7279static HChar *
7280s390_irgen_STH(UChar r1, IRTemp op2addr)
7281{
7282 store(mkexpr(op2addr), get_gpr_hw3(r1));
7283
7284 return "sth";
7285}
7286
7287static HChar *
7288s390_irgen_STHY(UChar r1, IRTemp op2addr)
7289{
7290 store(mkexpr(op2addr), get_gpr_hw3(r1));
7291
7292 return "sthy";
7293}
7294
7295static HChar *
7296s390_irgen_STHRL(UChar r1, UInt i2)
7297{
7298 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7299 get_gpr_hw3(r1));
7300
7301 return "sthrl";
7302}
7303
7304static HChar *
7305s390_irgen_STHH(UChar r1, IRTemp op2addr)
7306{
7307 store(mkexpr(op2addr), get_gpr_hw1(r1));
7308
7309 return "sthh";
7310}
7311
7312static HChar *
7313s390_irgen_STFH(UChar r1, IRTemp op2addr)
7314{
7315 store(mkexpr(op2addr), get_gpr_w0(r1));
7316
7317 return "stfh";
7318}
7319
7320static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007321s390_irgen_STOC(UChar r1, IRTemp op2addr)
7322{
7323 /* condition is checked in format handler */
7324 store(mkexpr(op2addr), get_gpr_w1(r1));
7325
7326 return "stoc";
7327}
7328
7329static HChar *
7330s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7331{
7332 /* condition is checked in format handler */
7333 store(mkexpr(op2addr), get_gpr_dw0(r1));
7334
7335 return "stocg";
7336}
7337
7338static HChar *
sewardj2019a972011-03-07 16:04:07 +00007339s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7340{
7341 store(mkexpr(op2addr), get_gpr_dw0(r1));
7342 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7343
7344 return "stpq";
7345}
7346
7347static HChar *
7348s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7349{
7350 store(mkexpr(op2addr), get_gpr_b7(r1));
7351 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7352
7353 return "strvh";
7354}
7355
7356static HChar *
7357s390_irgen_STRV(UChar r1, IRTemp op2addr)
7358{
7359 store(mkexpr(op2addr), get_gpr_b7(r1));
7360 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7361 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7362 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7363
7364 return "strv";
7365}
7366
7367static HChar *
7368s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7369{
7370 store(mkexpr(op2addr), get_gpr_b7(r1));
7371 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7372 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7373 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7374 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7375 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7376 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7377 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7378
7379 return "strvg";
7380}
7381
7382static HChar *
7383s390_irgen_SR(UChar r1, UChar r2)
7384{
7385 IRTemp op1 = newTemp(Ity_I32);
7386 IRTemp op2 = newTemp(Ity_I32);
7387 IRTemp result = newTemp(Ity_I32);
7388
7389 assign(op1, get_gpr_w1(r1));
7390 assign(op2, get_gpr_w1(r2));
7391 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7392 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7393 put_gpr_w1(r1, mkexpr(result));
7394
7395 return "sr";
7396}
7397
7398static HChar *
7399s390_irgen_SGR(UChar r1, UChar r2)
7400{
7401 IRTemp op1 = newTemp(Ity_I64);
7402 IRTemp op2 = newTemp(Ity_I64);
7403 IRTemp result = newTemp(Ity_I64);
7404
7405 assign(op1, get_gpr_dw0(r1));
7406 assign(op2, get_gpr_dw0(r2));
7407 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7408 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7409 put_gpr_dw0(r1, mkexpr(result));
7410
7411 return "sgr";
7412}
7413
7414static HChar *
7415s390_irgen_SGFR(UChar r1, UChar r2)
7416{
7417 IRTemp op1 = newTemp(Ity_I64);
7418 IRTemp op2 = newTemp(Ity_I64);
7419 IRTemp result = newTemp(Ity_I64);
7420
7421 assign(op1, get_gpr_dw0(r1));
7422 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7423 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7424 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7425 put_gpr_dw0(r1, mkexpr(result));
7426
7427 return "sgfr";
7428}
7429
7430static HChar *
7431s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7432{
7433 IRTemp op2 = newTemp(Ity_I32);
7434 IRTemp op3 = newTemp(Ity_I32);
7435 IRTemp result = newTemp(Ity_I32);
7436
7437 assign(op2, get_gpr_w1(r2));
7438 assign(op3, get_gpr_w1(r3));
7439 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7440 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7441 put_gpr_w1(r1, mkexpr(result));
7442
7443 return "srk";
7444}
7445
7446static HChar *
7447s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7448{
7449 IRTemp op2 = newTemp(Ity_I64);
7450 IRTemp op3 = newTemp(Ity_I64);
7451 IRTemp result = newTemp(Ity_I64);
7452
7453 assign(op2, get_gpr_dw0(r2));
7454 assign(op3, get_gpr_dw0(r3));
7455 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7456 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7457 put_gpr_dw0(r1, mkexpr(result));
7458
7459 return "sgrk";
7460}
7461
7462static HChar *
7463s390_irgen_S(UChar r1, IRTemp op2addr)
7464{
7465 IRTemp op1 = newTemp(Ity_I32);
7466 IRTemp op2 = newTemp(Ity_I32);
7467 IRTemp result = newTemp(Ity_I32);
7468
7469 assign(op1, get_gpr_w1(r1));
7470 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7471 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7472 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7473 put_gpr_w1(r1, mkexpr(result));
7474
7475 return "s";
7476}
7477
7478static HChar *
7479s390_irgen_SY(UChar r1, IRTemp op2addr)
7480{
7481 IRTemp op1 = newTemp(Ity_I32);
7482 IRTemp op2 = newTemp(Ity_I32);
7483 IRTemp result = newTemp(Ity_I32);
7484
7485 assign(op1, get_gpr_w1(r1));
7486 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7487 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7488 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7489 put_gpr_w1(r1, mkexpr(result));
7490
7491 return "sy";
7492}
7493
7494static HChar *
7495s390_irgen_SG(UChar r1, IRTemp op2addr)
7496{
7497 IRTemp op1 = newTemp(Ity_I64);
7498 IRTemp op2 = newTemp(Ity_I64);
7499 IRTemp result = newTemp(Ity_I64);
7500
7501 assign(op1, get_gpr_dw0(r1));
7502 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7503 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7504 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7505 put_gpr_dw0(r1, mkexpr(result));
7506
7507 return "sg";
7508}
7509
7510static HChar *
7511s390_irgen_SGF(UChar r1, IRTemp op2addr)
7512{
7513 IRTemp op1 = newTemp(Ity_I64);
7514 IRTemp op2 = newTemp(Ity_I64);
7515 IRTemp result = newTemp(Ity_I64);
7516
7517 assign(op1, get_gpr_dw0(r1));
7518 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7519 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7520 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7521 put_gpr_dw0(r1, mkexpr(result));
7522
7523 return "sgf";
7524}
7525
7526static HChar *
7527s390_irgen_SH(UChar r1, IRTemp op2addr)
7528{
7529 IRTemp op1 = newTemp(Ity_I32);
7530 IRTemp op2 = newTemp(Ity_I32);
7531 IRTemp result = newTemp(Ity_I32);
7532
7533 assign(op1, get_gpr_w1(r1));
7534 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7535 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7536 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7537 put_gpr_w1(r1, mkexpr(result));
7538
7539 return "sh";
7540}
7541
7542static HChar *
7543s390_irgen_SHY(UChar r1, IRTemp op2addr)
7544{
7545 IRTemp op1 = newTemp(Ity_I32);
7546 IRTemp op2 = newTemp(Ity_I32);
7547 IRTemp result = newTemp(Ity_I32);
7548
7549 assign(op1, get_gpr_w1(r1));
7550 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7551 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7552 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7553 put_gpr_w1(r1, mkexpr(result));
7554
7555 return "shy";
7556}
7557
7558static HChar *
7559s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7560{
7561 IRTemp op2 = newTemp(Ity_I32);
7562 IRTemp op3 = newTemp(Ity_I32);
7563 IRTemp result = newTemp(Ity_I32);
7564
7565 assign(op2, get_gpr_w0(r1));
7566 assign(op3, get_gpr_w0(r2));
7567 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7568 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7569 put_gpr_w0(r1, mkexpr(result));
7570
7571 return "shhhr";
7572}
7573
7574static HChar *
7575s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7576{
7577 IRTemp op2 = newTemp(Ity_I32);
7578 IRTemp op3 = newTemp(Ity_I32);
7579 IRTemp result = newTemp(Ity_I32);
7580
7581 assign(op2, get_gpr_w0(r1));
7582 assign(op3, get_gpr_w1(r2));
7583 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7584 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7585 put_gpr_w0(r1, mkexpr(result));
7586
7587 return "shhlr";
7588}
7589
7590static HChar *
7591s390_irgen_SLR(UChar r1, UChar r2)
7592{
7593 IRTemp op1 = newTemp(Ity_I32);
7594 IRTemp op2 = newTemp(Ity_I32);
7595 IRTemp result = newTemp(Ity_I32);
7596
7597 assign(op1, get_gpr_w1(r1));
7598 assign(op2, get_gpr_w1(r2));
7599 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7600 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7601 put_gpr_w1(r1, mkexpr(result));
7602
7603 return "slr";
7604}
7605
7606static HChar *
7607s390_irgen_SLGR(UChar r1, UChar r2)
7608{
7609 IRTemp op1 = newTemp(Ity_I64);
7610 IRTemp op2 = newTemp(Ity_I64);
7611 IRTemp result = newTemp(Ity_I64);
7612
7613 assign(op1, get_gpr_dw0(r1));
7614 assign(op2, get_gpr_dw0(r2));
7615 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7616 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7617 put_gpr_dw0(r1, mkexpr(result));
7618
7619 return "slgr";
7620}
7621
7622static HChar *
7623s390_irgen_SLGFR(UChar r1, UChar r2)
7624{
7625 IRTemp op1 = newTemp(Ity_I64);
7626 IRTemp op2 = newTemp(Ity_I64);
7627 IRTemp result = newTemp(Ity_I64);
7628
7629 assign(op1, get_gpr_dw0(r1));
7630 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7631 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7632 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7633 put_gpr_dw0(r1, mkexpr(result));
7634
7635 return "slgfr";
7636}
7637
7638static HChar *
7639s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7640{
7641 IRTemp op2 = newTemp(Ity_I32);
7642 IRTemp op3 = newTemp(Ity_I32);
7643 IRTemp result = newTemp(Ity_I32);
7644
7645 assign(op2, get_gpr_w1(r2));
7646 assign(op3, get_gpr_w1(r3));
7647 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7648 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7649 put_gpr_w1(r1, mkexpr(result));
7650
7651 return "slrk";
7652}
7653
7654static HChar *
7655s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7656{
7657 IRTemp op2 = newTemp(Ity_I64);
7658 IRTemp op3 = newTemp(Ity_I64);
7659 IRTemp result = newTemp(Ity_I64);
7660
7661 assign(op2, get_gpr_dw0(r2));
7662 assign(op3, get_gpr_dw0(r3));
7663 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7664 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7665 put_gpr_dw0(r1, mkexpr(result));
7666
7667 return "slgrk";
7668}
7669
7670static HChar *
7671s390_irgen_SL(UChar r1, IRTemp op2addr)
7672{
7673 IRTemp op1 = newTemp(Ity_I32);
7674 IRTemp op2 = newTemp(Ity_I32);
7675 IRTemp result = newTemp(Ity_I32);
7676
7677 assign(op1, get_gpr_w1(r1));
7678 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7679 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7680 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7681 put_gpr_w1(r1, mkexpr(result));
7682
7683 return "sl";
7684}
7685
7686static HChar *
7687s390_irgen_SLY(UChar r1, IRTemp op2addr)
7688{
7689 IRTemp op1 = newTemp(Ity_I32);
7690 IRTemp op2 = newTemp(Ity_I32);
7691 IRTemp result = newTemp(Ity_I32);
7692
7693 assign(op1, get_gpr_w1(r1));
7694 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7695 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7696 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7697 put_gpr_w1(r1, mkexpr(result));
7698
7699 return "sly";
7700}
7701
7702static HChar *
7703s390_irgen_SLG(UChar r1, IRTemp op2addr)
7704{
7705 IRTemp op1 = newTemp(Ity_I64);
7706 IRTemp op2 = newTemp(Ity_I64);
7707 IRTemp result = newTemp(Ity_I64);
7708
7709 assign(op1, get_gpr_dw0(r1));
7710 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7711 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7712 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7713 put_gpr_dw0(r1, mkexpr(result));
7714
7715 return "slg";
7716}
7717
7718static HChar *
7719s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7720{
7721 IRTemp op1 = newTemp(Ity_I64);
7722 IRTemp op2 = newTemp(Ity_I64);
7723 IRTemp result = newTemp(Ity_I64);
7724
7725 assign(op1, get_gpr_dw0(r1));
7726 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7727 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7728 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7729 put_gpr_dw0(r1, mkexpr(result));
7730
7731 return "slgf";
7732}
7733
7734static HChar *
7735s390_irgen_SLFI(UChar r1, UInt i2)
7736{
7737 IRTemp op1 = newTemp(Ity_I32);
7738 UInt op2;
7739 IRTemp result = newTemp(Ity_I32);
7740
7741 assign(op1, get_gpr_w1(r1));
7742 op2 = i2;
7743 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7744 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7745 mkU32(op2)));
7746 put_gpr_w1(r1, mkexpr(result));
7747
7748 return "slfi";
7749}
7750
7751static HChar *
7752s390_irgen_SLGFI(UChar r1, UInt i2)
7753{
7754 IRTemp op1 = newTemp(Ity_I64);
7755 ULong op2;
7756 IRTemp result = newTemp(Ity_I64);
7757
7758 assign(op1, get_gpr_dw0(r1));
7759 op2 = (ULong)i2;
7760 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7761 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7762 mkU64(op2)));
7763 put_gpr_dw0(r1, mkexpr(result));
7764
7765 return "slgfi";
7766}
7767
7768static HChar *
7769s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7770{
7771 IRTemp op2 = newTemp(Ity_I32);
7772 IRTemp op3 = newTemp(Ity_I32);
7773 IRTemp result = newTemp(Ity_I32);
7774
7775 assign(op2, get_gpr_w0(r1));
7776 assign(op3, get_gpr_w0(r2));
7777 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7778 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7779 put_gpr_w0(r1, mkexpr(result));
7780
7781 return "slhhhr";
7782}
7783
7784static HChar *
7785s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7786{
7787 IRTemp op2 = newTemp(Ity_I32);
7788 IRTemp op3 = newTemp(Ity_I32);
7789 IRTemp result = newTemp(Ity_I32);
7790
7791 assign(op2, get_gpr_w0(r1));
7792 assign(op3, get_gpr_w1(r2));
7793 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7794 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7795 put_gpr_w0(r1, mkexpr(result));
7796
7797 return "slhhlr";
7798}
7799
7800static HChar *
7801s390_irgen_SLBR(UChar r1, UChar r2)
7802{
7803 IRTemp op1 = newTemp(Ity_I32);
7804 IRTemp op2 = newTemp(Ity_I32);
7805 IRTemp result = newTemp(Ity_I32);
7806 IRTemp borrow_in = newTemp(Ity_I32);
7807
7808 assign(op1, get_gpr_w1(r1));
7809 assign(op2, get_gpr_w1(r2));
7810 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7811 s390_call_calculate_cc(), mkU8(1))));
7812 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7813 mkexpr(borrow_in)));
7814 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7815 put_gpr_w1(r1, mkexpr(result));
7816
7817 return "slbr";
7818}
7819
7820static HChar *
7821s390_irgen_SLBGR(UChar r1, UChar r2)
7822{
7823 IRTemp op1 = newTemp(Ity_I64);
7824 IRTemp op2 = newTemp(Ity_I64);
7825 IRTemp result = newTemp(Ity_I64);
7826 IRTemp borrow_in = newTemp(Ity_I64);
7827
7828 assign(op1, get_gpr_dw0(r1));
7829 assign(op2, get_gpr_dw0(r2));
7830 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7831 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7832 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7833 mkexpr(borrow_in)));
7834 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7835 put_gpr_dw0(r1, mkexpr(result));
7836
7837 return "slbgr";
7838}
7839
7840static HChar *
7841s390_irgen_SLB(UChar r1, IRTemp op2addr)
7842{
7843 IRTemp op1 = newTemp(Ity_I32);
7844 IRTemp op2 = newTemp(Ity_I32);
7845 IRTemp result = newTemp(Ity_I32);
7846 IRTemp borrow_in = newTemp(Ity_I32);
7847
7848 assign(op1, get_gpr_w1(r1));
7849 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7850 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7851 s390_call_calculate_cc(), mkU8(1))));
7852 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7853 mkexpr(borrow_in)));
7854 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7855 put_gpr_w1(r1, mkexpr(result));
7856
7857 return "slb";
7858}
7859
7860static HChar *
7861s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7862{
7863 IRTemp op1 = newTemp(Ity_I64);
7864 IRTemp op2 = newTemp(Ity_I64);
7865 IRTemp result = newTemp(Ity_I64);
7866 IRTemp borrow_in = newTemp(Ity_I64);
7867
7868 assign(op1, get_gpr_dw0(r1));
7869 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7870 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7871 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7872 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7873 mkexpr(borrow_in)));
7874 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7875 put_gpr_dw0(r1, mkexpr(result));
7876
7877 return "slbg";
7878}
7879
7880static HChar *
7881s390_irgen_SVC(UChar i)
7882{
7883 IRTemp sysno = newTemp(Ity_I64);
7884
7885 if (i != 0) {
7886 assign(sysno, mkU64(i));
7887 } else {
7888 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7889 }
7890 system_call(mkexpr(sysno));
7891
7892 return "svc";
7893}
7894
7895static HChar *
sewardj2019a972011-03-07 16:04:07 +00007896s390_irgen_TM(UChar i2, IRTemp op1addr)
7897{
7898 UChar mask;
7899 IRTemp value = newTemp(Ity_I8);
7900
7901 mask = i2;
7902 assign(value, load(Ity_I8, mkexpr(op1addr)));
7903 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7904 mkU8(mask)));
7905
7906 return "tm";
7907}
7908
7909static HChar *
7910s390_irgen_TMY(UChar i2, IRTemp op1addr)
7911{
7912 UChar mask;
7913 IRTemp value = newTemp(Ity_I8);
7914
7915 mask = i2;
7916 assign(value, load(Ity_I8, mkexpr(op1addr)));
7917 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7918 mkU8(mask)));
7919
7920 return "tmy";
7921}
7922
7923static HChar *
7924s390_irgen_TMHH(UChar r1, UShort i2)
7925{
7926 UShort mask;
7927 IRTemp value = newTemp(Ity_I16);
7928
7929 mask = i2;
7930 assign(value, get_gpr_hw0(r1));
7931 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7932 mkU16(mask)));
7933
7934 return "tmhh";
7935}
7936
7937static HChar *
7938s390_irgen_TMHL(UChar r1, UShort i2)
7939{
7940 UShort mask;
7941 IRTemp value = newTemp(Ity_I16);
7942
7943 mask = i2;
7944 assign(value, get_gpr_hw1(r1));
7945 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7946 mkU16(mask)));
7947
7948 return "tmhl";
7949}
7950
7951static HChar *
7952s390_irgen_TMLH(UChar r1, UShort i2)
7953{
7954 UShort mask;
7955 IRTemp value = newTemp(Ity_I16);
7956
7957 mask = i2;
7958 assign(value, get_gpr_hw2(r1));
7959 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7960 mkU16(mask)));
7961
7962 return "tmlh";
7963}
7964
7965static HChar *
7966s390_irgen_TMLL(UChar r1, UShort i2)
7967{
7968 UShort mask;
7969 IRTemp value = newTemp(Ity_I16);
7970
7971 mask = i2;
7972 assign(value, get_gpr_hw3(r1));
7973 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7974 mkU16(mask)));
7975
7976 return "tmll";
7977}
7978
7979static HChar *
7980s390_irgen_EFPC(UChar r1)
7981{
7982 put_gpr_w1(r1, get_fpc_w0());
7983
7984 return "efpc";
7985}
7986
7987static HChar *
7988s390_irgen_LER(UChar r1, UChar r2)
7989{
7990 put_fpr_w0(r1, get_fpr_w0(r2));
7991
7992 return "ler";
7993}
7994
7995static HChar *
7996s390_irgen_LDR(UChar r1, UChar r2)
7997{
7998 put_fpr_dw0(r1, get_fpr_dw0(r2));
7999
8000 return "ldr";
8001}
8002
8003static HChar *
8004s390_irgen_LXR(UChar r1, UChar r2)
8005{
8006 put_fpr_dw0(r1, get_fpr_dw0(r2));
8007 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
8008
8009 return "lxr";
8010}
8011
8012static HChar *
8013s390_irgen_LE(UChar r1, IRTemp op2addr)
8014{
8015 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8016
8017 return "le";
8018}
8019
8020static HChar *
8021s390_irgen_LD(UChar r1, IRTemp op2addr)
8022{
8023 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8024
8025 return "ld";
8026}
8027
8028static HChar *
8029s390_irgen_LEY(UChar r1, IRTemp op2addr)
8030{
8031 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8032
8033 return "ley";
8034}
8035
8036static HChar *
8037s390_irgen_LDY(UChar r1, IRTemp op2addr)
8038{
8039 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8040
8041 return "ldy";
8042}
8043
8044static HChar *
8045s390_irgen_LFPC(IRTemp op2addr)
8046{
8047 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8048
8049 return "lfpc";
8050}
8051
8052static HChar *
8053s390_irgen_LZER(UChar r1)
8054{
8055 put_fpr_w0(r1, mkF32i(0x0));
8056
8057 return "lzer";
8058}
8059
8060static HChar *
8061s390_irgen_LZDR(UChar r1)
8062{
8063 put_fpr_dw0(r1, mkF64i(0x0));
8064
8065 return "lzdr";
8066}
8067
8068static HChar *
8069s390_irgen_LZXR(UChar r1)
8070{
8071 put_fpr_dw0(r1, mkF64i(0x0));
8072 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8073
8074 return "lzxr";
8075}
8076
8077static HChar *
8078s390_irgen_SRNM(IRTemp op2addr)
8079{
8080 UInt mask;
8081
8082 mask = 3;
8083 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8084 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8085 );
8086
8087 return "srnm";
8088}
8089
8090static HChar *
8091s390_irgen_SFPC(UChar r1)
8092{
8093 put_fpc_w0(get_gpr_w1(r1));
8094
8095 return "sfpc";
8096}
8097
8098static HChar *
8099s390_irgen_STE(UChar r1, IRTemp op2addr)
8100{
8101 store(mkexpr(op2addr), get_fpr_w0(r1));
8102
8103 return "ste";
8104}
8105
8106static HChar *
8107s390_irgen_STD(UChar r1, IRTemp op2addr)
8108{
8109 store(mkexpr(op2addr), get_fpr_dw0(r1));
8110
8111 return "std";
8112}
8113
8114static HChar *
8115s390_irgen_STEY(UChar r1, IRTemp op2addr)
8116{
8117 store(mkexpr(op2addr), get_fpr_w0(r1));
8118
8119 return "stey";
8120}
8121
8122static HChar *
8123s390_irgen_STDY(UChar r1, IRTemp op2addr)
8124{
8125 store(mkexpr(op2addr), get_fpr_dw0(r1));
8126
8127 return "stdy";
8128}
8129
8130static HChar *
8131s390_irgen_STFPC(IRTemp op2addr)
8132{
8133 store(mkexpr(op2addr), get_fpc_w0());
8134
8135 return "stfpc";
8136}
8137
8138static HChar *
8139s390_irgen_AEBR(UChar r1, UChar r2)
8140{
8141 IRTemp op1 = newTemp(Ity_F32);
8142 IRTemp op2 = newTemp(Ity_F32);
8143 IRTemp result = newTemp(Ity_F32);
8144
8145 assign(op1, get_fpr_w0(r1));
8146 assign(op2, get_fpr_w0(r2));
8147 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8148 mkexpr(op2)));
8149 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8150 put_fpr_w0(r1, mkexpr(result));
8151
8152 return "aebr";
8153}
8154
8155static HChar *
8156s390_irgen_ADBR(UChar r1, UChar r2)
8157{
8158 IRTemp op1 = newTemp(Ity_F64);
8159 IRTemp op2 = newTemp(Ity_F64);
8160 IRTemp result = newTemp(Ity_F64);
8161
8162 assign(op1, get_fpr_dw0(r1));
8163 assign(op2, get_fpr_dw0(r2));
8164 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8165 mkexpr(op2)));
8166 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8167 put_fpr_dw0(r1, mkexpr(result));
8168
8169 return "adbr";
8170}
8171
8172static HChar *
8173s390_irgen_AEB(UChar r1, IRTemp op2addr)
8174{
8175 IRTemp op1 = newTemp(Ity_F32);
8176 IRTemp op2 = newTemp(Ity_F32);
8177 IRTemp result = newTemp(Ity_F32);
8178
8179 assign(op1, get_fpr_w0(r1));
8180 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8181 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8182 mkexpr(op2)));
8183 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8184 put_fpr_w0(r1, mkexpr(result));
8185
8186 return "aeb";
8187}
8188
8189static HChar *
8190s390_irgen_ADB(UChar r1, IRTemp op2addr)
8191{
8192 IRTemp op1 = newTemp(Ity_F64);
8193 IRTemp op2 = newTemp(Ity_F64);
8194 IRTemp result = newTemp(Ity_F64);
8195
8196 assign(op1, get_fpr_dw0(r1));
8197 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8198 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8199 mkexpr(op2)));
8200 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8201 put_fpr_dw0(r1, mkexpr(result));
8202
8203 return "adb";
8204}
8205
8206static HChar *
8207s390_irgen_CEFBR(UChar r1, UChar r2)
8208{
8209 IRTemp op2 = newTemp(Ity_I32);
8210
8211 assign(op2, get_gpr_w1(r2));
8212 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8213
8214 return "cefbr";
8215}
8216
8217static HChar *
8218s390_irgen_CDFBR(UChar r1, UChar r2)
8219{
8220 IRTemp op2 = newTemp(Ity_I32);
8221
8222 assign(op2, get_gpr_w1(r2));
8223 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8224
8225 return "cdfbr";
8226}
8227
8228static HChar *
8229s390_irgen_CEGBR(UChar r1, UChar r2)
8230{
8231 IRTemp op2 = newTemp(Ity_I64);
8232
8233 assign(op2, get_gpr_dw0(r2));
8234 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8235
8236 return "cegbr";
8237}
8238
8239static HChar *
8240s390_irgen_CDGBR(UChar r1, UChar r2)
8241{
8242 IRTemp op2 = newTemp(Ity_I64);
8243
8244 assign(op2, get_gpr_dw0(r2));
8245 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8246
8247 return "cdgbr";
8248}
8249
8250static HChar *
8251s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8252{
8253 IRTemp op = newTemp(Ity_F32);
8254 IRTemp result = newTemp(Ity_I32);
8255
8256 assign(op, get_fpr_w0(r2));
8257 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8258 mkexpr(op)));
8259 put_gpr_w1(r1, mkexpr(result));
8260 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8261
8262 return "cfebr";
8263}
8264
8265static HChar *
8266s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8267{
8268 IRTemp op = newTemp(Ity_F64);
8269 IRTemp result = newTemp(Ity_I32);
8270
8271 assign(op, get_fpr_dw0(r2));
8272 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8273 mkexpr(op)));
8274 put_gpr_w1(r1, mkexpr(result));
8275 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8276
8277 return "cfdbr";
8278}
8279
8280static HChar *
8281s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8282{
8283 IRTemp op = newTemp(Ity_F32);
8284 IRTemp result = newTemp(Ity_I64);
8285
8286 assign(op, get_fpr_w0(r2));
8287 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8288 mkexpr(op)));
8289 put_gpr_dw0(r1, mkexpr(result));
8290 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8291
8292 return "cgebr";
8293}
8294
8295static HChar *
8296s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8297{
8298 IRTemp op = newTemp(Ity_F64);
8299 IRTemp result = newTemp(Ity_I64);
8300
8301 assign(op, get_fpr_dw0(r2));
8302 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8303 mkexpr(op)));
8304 put_gpr_dw0(r1, mkexpr(result));
8305 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8306
8307 return "cgdbr";
8308}
8309
8310static HChar *
8311s390_irgen_DEBR(UChar r1, UChar r2)
8312{
8313 IRTemp op1 = newTemp(Ity_F32);
8314 IRTemp op2 = newTemp(Ity_F32);
8315 IRTemp result = newTemp(Ity_F32);
8316
8317 assign(op1, get_fpr_w0(r1));
8318 assign(op2, get_fpr_w0(r2));
8319 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8320 mkexpr(op2)));
8321 put_fpr_w0(r1, mkexpr(result));
8322
8323 return "debr";
8324}
8325
8326static HChar *
8327s390_irgen_DDBR(UChar r1, UChar r2)
8328{
8329 IRTemp op1 = newTemp(Ity_F64);
8330 IRTemp op2 = newTemp(Ity_F64);
8331 IRTemp result = newTemp(Ity_F64);
8332
8333 assign(op1, get_fpr_dw0(r1));
8334 assign(op2, get_fpr_dw0(r2));
8335 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8336 mkexpr(op2)));
8337 put_fpr_dw0(r1, mkexpr(result));
8338
8339 return "ddbr";
8340}
8341
8342static HChar *
8343s390_irgen_DEB(UChar r1, IRTemp op2addr)
8344{
8345 IRTemp op1 = newTemp(Ity_F32);
8346 IRTemp op2 = newTemp(Ity_F32);
8347 IRTemp result = newTemp(Ity_F32);
8348
8349 assign(op1, get_fpr_w0(r1));
8350 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8351 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8352 mkexpr(op2)));
8353 put_fpr_w0(r1, mkexpr(result));
8354
8355 return "deb";
8356}
8357
8358static HChar *
8359s390_irgen_DDB(UChar r1, IRTemp op2addr)
8360{
8361 IRTemp op1 = newTemp(Ity_F64);
8362 IRTemp op2 = newTemp(Ity_F64);
8363 IRTemp result = newTemp(Ity_F64);
8364
8365 assign(op1, get_fpr_dw0(r1));
8366 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8367 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8368 mkexpr(op2)));
8369 put_fpr_dw0(r1, mkexpr(result));
8370
8371 return "ddb";
8372}
8373
8374static HChar *
8375s390_irgen_LTEBR(UChar r1, UChar r2)
8376{
8377 IRTemp result = newTemp(Ity_F32);
8378
8379 assign(result, get_fpr_w0(r2));
8380 put_fpr_w0(r1, mkexpr(result));
8381 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8382
8383 return "ltebr";
8384}
8385
8386static HChar *
8387s390_irgen_LTDBR(UChar r1, UChar r2)
8388{
8389 IRTemp result = newTemp(Ity_F64);
8390
8391 assign(result, get_fpr_dw0(r2));
8392 put_fpr_dw0(r1, mkexpr(result));
8393 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8394
8395 return "ltdbr";
8396}
8397
8398static HChar *
8399s390_irgen_LCEBR(UChar r1, UChar r2)
8400{
8401 IRTemp result = newTemp(Ity_F32);
8402
8403 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8404 put_fpr_w0(r1, mkexpr(result));
8405 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8406
8407 return "lcebr";
8408}
8409
8410static HChar *
8411s390_irgen_LCDBR(UChar r1, UChar r2)
8412{
8413 IRTemp result = newTemp(Ity_F64);
8414
8415 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8416 put_fpr_dw0(r1, mkexpr(result));
8417 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8418
8419 return "lcdbr";
8420}
8421
8422static HChar *
8423s390_irgen_LDEBR(UChar r1, UChar r2)
8424{
8425 IRTemp op = newTemp(Ity_F32);
8426
8427 assign(op, get_fpr_w0(r2));
8428 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8429
8430 return "ldebr";
8431}
8432
8433static HChar *
8434s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8435{
8436 IRTemp op = newTemp(Ity_F32);
8437
8438 assign(op, load(Ity_F32, mkexpr(op2addr)));
8439 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8440
8441 return "ldeb";
8442}
8443
8444static HChar *
8445s390_irgen_LEDBR(UChar r1, UChar r2)
8446{
8447 IRTemp op = newTemp(Ity_F64);
8448
8449 assign(op, get_fpr_dw0(r2));
8450 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8451
8452 return "ledbr";
8453}
8454
8455static HChar *
8456s390_irgen_MEEBR(UChar r1, UChar r2)
8457{
8458 IRTemp op1 = newTemp(Ity_F32);
8459 IRTemp op2 = newTemp(Ity_F32);
8460 IRTemp result = newTemp(Ity_F32);
8461
8462 assign(op1, get_fpr_w0(r1));
8463 assign(op2, get_fpr_w0(r2));
8464 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8465 mkexpr(op2)));
8466 put_fpr_w0(r1, mkexpr(result));
8467
8468 return "meebr";
8469}
8470
8471static HChar *
8472s390_irgen_MDBR(UChar r1, UChar r2)
8473{
8474 IRTemp op1 = newTemp(Ity_F64);
8475 IRTemp op2 = newTemp(Ity_F64);
8476 IRTemp result = newTemp(Ity_F64);
8477
8478 assign(op1, get_fpr_dw0(r1));
8479 assign(op2, get_fpr_dw0(r2));
8480 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8481 mkexpr(op2)));
8482 put_fpr_dw0(r1, mkexpr(result));
8483
8484 return "mdbr";
8485}
8486
8487static HChar *
8488s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8489{
8490 IRTemp op1 = newTemp(Ity_F32);
8491 IRTemp op2 = newTemp(Ity_F32);
8492 IRTemp result = newTemp(Ity_F32);
8493
8494 assign(op1, get_fpr_w0(r1));
8495 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8496 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8497 mkexpr(op2)));
8498 put_fpr_w0(r1, mkexpr(result));
8499
8500 return "meeb";
8501}
8502
8503static HChar *
8504s390_irgen_MDB(UChar r1, IRTemp op2addr)
8505{
8506 IRTemp op1 = newTemp(Ity_F64);
8507 IRTemp op2 = newTemp(Ity_F64);
8508 IRTemp result = newTemp(Ity_F64);
8509
8510 assign(op1, get_fpr_dw0(r1));
8511 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8512 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8513 mkexpr(op2)));
8514 put_fpr_dw0(r1, mkexpr(result));
8515
8516 return "mdb";
8517}
8518
8519static HChar *
8520s390_irgen_SEBR(UChar r1, UChar r2)
8521{
8522 IRTemp op1 = newTemp(Ity_F32);
8523 IRTemp op2 = newTemp(Ity_F32);
8524 IRTemp result = newTemp(Ity_F32);
8525
8526 assign(op1, get_fpr_w0(r1));
8527 assign(op2, get_fpr_w0(r2));
8528 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8529 mkexpr(op2)));
8530 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8531 put_fpr_w0(r1, mkexpr(result));
8532
8533 return "sebr";
8534}
8535
8536static HChar *
8537s390_irgen_SDBR(UChar r1, UChar r2)
8538{
8539 IRTemp op1 = newTemp(Ity_F64);
8540 IRTemp op2 = newTemp(Ity_F64);
8541 IRTemp result = newTemp(Ity_F64);
8542
8543 assign(op1, get_fpr_dw0(r1));
8544 assign(op2, get_fpr_dw0(r2));
8545 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8546 mkexpr(op2)));
8547 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8548 put_fpr_dw0(r1, mkexpr(result));
8549
8550 return "sdbr";
8551}
8552
8553static HChar *
8554s390_irgen_SEB(UChar r1, IRTemp op2addr)
8555{
8556 IRTemp op1 = newTemp(Ity_F32);
8557 IRTemp op2 = newTemp(Ity_F32);
8558 IRTemp result = newTemp(Ity_F32);
8559
8560 assign(op1, get_fpr_w0(r1));
8561 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8562 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8563 mkexpr(op2)));
8564 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8565 put_fpr_w0(r1, mkexpr(result));
8566
8567 return "seb";
8568}
8569
8570static HChar *
8571s390_irgen_SDB(UChar r1, IRTemp op2addr)
8572{
8573 IRTemp op1 = newTemp(Ity_F64);
8574 IRTemp op2 = newTemp(Ity_F64);
8575 IRTemp result = newTemp(Ity_F64);
8576
8577 assign(op1, get_fpr_dw0(r1));
8578 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8579 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8580 mkexpr(op2)));
8581 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8582 put_fpr_dw0(r1, mkexpr(result));
8583
8584 return "sdb";
8585}
8586
8587
8588static HChar *
8589s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8590{
8591 IRTemp current1 = newTemp(Ity_I8);
8592 IRTemp current2 = newTemp(Ity_I8);
8593 IRTemp counter = newTemp(Ity_I64);
8594
8595 assign(counter, get_counter_dw0());
8596 put_counter_dw0(mkU64(0));
8597
8598 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8599 mkexpr(counter))));
8600 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8601 mkexpr(counter))));
8602 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8603 False);
8604
8605 /* Both fields differ ? */
8606 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8607 guest_IA_next_instr);
8608
8609 /* Check for end of field */
8610 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8611 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8612 guest_IA_curr_instr);
8613 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00008614 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008615
8616 return "clc";
8617}
8618
8619static HChar *
florianb0c9a132011-09-08 15:37:39 +00008620s390_irgen_CLCL(UChar r1, UChar r2)
8621{
8622 IRTemp addr1 = newTemp(Ity_I64);
8623 IRTemp addr2 = newTemp(Ity_I64);
8624 IRTemp addr1_load = newTemp(Ity_I64);
8625 IRTemp addr2_load = newTemp(Ity_I64);
8626 IRTemp len1 = newTemp(Ity_I32);
8627 IRTemp len2 = newTemp(Ity_I32);
8628 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8629 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8630 IRTemp single1 = newTemp(Ity_I8);
8631 IRTemp single2 = newTemp(Ity_I8);
8632 IRTemp pad = newTemp(Ity_I8);
8633
8634 assign(addr1, get_gpr_dw0(r1));
8635 assign(r1p1, get_gpr_w1(r1 + 1));
8636 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8637 assign(addr2, get_gpr_dw0(r2));
8638 assign(r2p1, get_gpr_w1(r2 + 1));
8639 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8640 assign(pad, get_gpr_b4(r2 + 1));
8641
8642 /* len1 == 0 and len2 == 0? Exit */
8643 s390_cc_set(0);
8644 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8645 mkexpr(len2)), mkU32(0)),
8646 guest_IA_next_instr);
8647
8648 /* Because mkite evaluates both the then-clause and the else-clause
8649 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8650 may be NULL and loading from there would segfault. So we provide a
8651 valid dummy address in that case. Loading from there does no harm and
8652 the value will be discarded at runtime. */
8653 assign(addr1_load,
8654 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8655 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8656 assign(single1,
8657 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8658 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8659
8660 assign(addr2_load,
8661 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8662 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8663 assign(single2,
8664 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8665 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8666
8667 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8668 /* Fields differ ? */
8669 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8670 guest_IA_next_instr);
8671
8672 /* Update len1 and addr1, unless len1 == 0. */
8673 put_gpr_dw0(r1,
8674 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8675 mkexpr(addr1),
8676 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8677
8678 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8679 put_gpr_w1(r1 + 1,
8680 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8681 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8682 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8683
8684 /* Update len2 and addr2, unless len2 == 0. */
8685 put_gpr_dw0(r2,
8686 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8687 mkexpr(addr2),
8688 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8689
8690 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8691 put_gpr_w1(r2 + 1,
8692 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8693 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8694 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8695
8696 always_goto_and_chase(guest_IA_curr_instr);
8697
8698 return "clcl";
8699}
8700
8701static HChar *
sewardj2019a972011-03-07 16:04:07 +00008702s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8703{
8704 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8705
8706 addr1 = newTemp(Ity_I64);
8707 addr3 = newTemp(Ity_I64);
8708 addr1_load = newTemp(Ity_I64);
8709 addr3_load = newTemp(Ity_I64);
8710 len1 = newTemp(Ity_I64);
8711 len3 = newTemp(Ity_I64);
8712 single1 = newTemp(Ity_I8);
8713 single3 = newTemp(Ity_I8);
8714
8715 assign(addr1, get_gpr_dw0(r1));
8716 assign(len1, get_gpr_dw0(r1 + 1));
8717 assign(addr3, get_gpr_dw0(r3));
8718 assign(len3, get_gpr_dw0(r3 + 1));
8719
8720 /* len1 == 0 and len3 == 0? Exit */
8721 s390_cc_set(0);
8722 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8723 mkexpr(len3)), mkU64(0)),
8724 guest_IA_next_instr);
8725
8726 /* A mux requires both ways to be possible. This is a way to prevent clcle
8727 from reading from addr1 if it should read from the pad. Since the pad
8728 has no address, just read from the instruction, we discard that anyway */
8729 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008730 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8731 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008732
8733 /* same for addr3 */
8734 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008735 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8736 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008737
8738 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008739 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8740 unop(Iop_64to8, mkexpr(pad2)),
8741 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008742
8743 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008744 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8745 unop(Iop_64to8, mkexpr(pad2)),
8746 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008747
8748 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8749 /* Both fields differ ? */
8750 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8751 guest_IA_next_instr);
8752
8753 /* If a length in 0 we must not change this length and the address */
8754 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008755 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8756 mkexpr(addr1),
8757 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008758
8759 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008760 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8761 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008762
8763 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008764 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8765 mkexpr(addr3),
8766 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008767
8768 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008769 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8770 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008771
8772 /* The architecture requires that we exit with CC3 after a machine specific
8773 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8774 s390_cc_set(3);
8775 if_condition_goto(binop(Iop_CmpEQ64,
8776 binop(Iop_And64,
8777 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8778 mkU64(0xfff)),
8779 mkU64(0)),
8780 guest_IA_next_instr);
8781
floriana64c2432011-07-16 02:11:50 +00008782 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008783
8784 return "clcle";
8785}
floriana64c2432011-07-16 02:11:50 +00008786
sewardj2019a972011-03-07 16:04:07 +00008787static void
8788s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8789{
8790 IRTemp old1 = newTemp(Ity_I8);
8791 IRTemp old2 = newTemp(Ity_I8);
8792 IRTemp new1 = newTemp(Ity_I8);
8793 IRTemp counter = newTemp(Ity_I32);
8794 IRTemp addr1 = newTemp(Ity_I64);
8795
8796 assign(counter, get_counter_w0());
8797
8798 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8799 unop(Iop_32Uto64, mkexpr(counter))));
8800
8801 assign(old1, load(Ity_I8, mkexpr(addr1)));
8802 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8803 unop(Iop_32Uto64,mkexpr(counter)))));
8804 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8805
8806 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00008807 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
8808 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00008809 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8810 get_counter_w1()));
8811
8812 /* Check for end of field */
8813 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8814 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8815 guest_IA_curr_instr);
8816 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8817 False);
8818 put_counter_dw0(mkU64(0));
8819}
8820
8821
8822static void
8823s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8824{
8825 IRTemp current1 = newTemp(Ity_I8);
8826 IRTemp current2 = newTemp(Ity_I8);
8827 IRTemp counter = newTemp(Ity_I64);
8828
8829 assign(counter, get_counter_dw0());
8830 put_counter_dw0(mkU64(0));
8831
8832 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8833 mkexpr(counter))));
8834 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8835 mkexpr(counter))));
8836 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8837 False);
8838
8839 /* Both fields differ ? */
8840 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8841 guest_IA_next_instr);
8842
8843 /* Check for end of field */
8844 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8845 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8846 guest_IA_curr_instr);
8847 put_counter_dw0(mkU64(0));
8848}
8849
8850static void
8851s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8852{
8853 IRTemp counter = newTemp(Ity_I64);
8854
8855 assign(counter, get_counter_dw0());
8856
8857 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8858 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8859
8860 /* Check for end of field */
8861 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8862 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8863 guest_IA_curr_instr);
8864 put_counter_dw0(mkU64(0));
8865}
8866
8867
8868
8869static void
8870s390_irgen_EX_SS(UChar r, IRTemp addr2,
8871void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8872{
8873 struct SS {
8874 unsigned int op : 8;
8875 unsigned int l : 8;
8876 unsigned int b1 : 4;
8877 unsigned int d1 : 12;
8878 unsigned int b2 : 4;
8879 unsigned int d2 : 12;
8880 };
8881 union {
8882 struct SS dec;
8883 unsigned long bytes;
8884 } ss;
8885 IRTemp cond;
8886 IRDirty *d;
8887 IRTemp torun;
8888
8889 IRTemp start1 = newTemp(Ity_I64);
8890 IRTemp start2 = newTemp(Ity_I64);
8891 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8892 cond = newTemp(Ity_I1);
8893 torun = newTemp(Ity_I64);
8894
8895 assign(torun, load(Ity_I64, mkexpr(addr2)));
8896 /* Start with a check that the saved code is still correct */
8897 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8898 /* If not, save the new value */
8899 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8900 mkIRExprVec_1(mkexpr(torun)));
8901 d->guard = mkexpr(cond);
8902 stmt(IRStmt_Dirty(d));
8903
8904 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008905 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8906 mkU64(guest_IA_curr_instr)));
8907 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008908 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8909 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008910
8911 ss.bytes = last_execute_target;
8912 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8913 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8914 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8915 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8916 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8917 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8918 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008919 dummy_put_IA();
8920
sewardj2019a972011-03-07 16:04:07 +00008921 last_execute_target = 0;
8922}
8923
8924static HChar *
8925s390_irgen_EX(UChar r1, IRTemp addr2)
8926{
8927 switch(last_execute_target & 0xff00000000000000ULL) {
8928 case 0:
8929 {
8930 /* no code information yet */
8931 IRDirty *d;
8932
8933 /* so safe the code... */
8934 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8935 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8936 stmt(IRStmt_Dirty(d));
8937 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008938 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8939 mkU64(guest_IA_curr_instr)));
8940 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008941 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8942 IRConst_U64(guest_IA_curr_instr),
8943 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008944 /* we know that this will be invalidated */
florianf9e1ed72012-04-17 02:41:56 +00008945 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +00008946 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +00008947 dis_res->jk_StopHere = Ijk_TInval;
sewardj2019a972011-03-07 16:04:07 +00008948 break;
8949 }
8950
8951 case 0xd200000000000000ULL:
8952 /* special case MVC */
8953 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8954 return "mvc via ex";
8955
8956 case 0xd500000000000000ULL:
8957 /* special case CLC */
8958 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8959 return "clc via ex";
8960
8961 case 0xd700000000000000ULL:
8962 /* special case XC */
8963 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8964 return "xc via ex";
8965
8966
8967 default:
8968 {
8969 /* everything else will get a self checking prefix that also checks the
8970 register content */
8971 IRDirty *d;
8972 UChar *bytes;
8973 IRTemp cond;
8974 IRTemp orperand;
8975 IRTemp torun;
8976
8977 cond = newTemp(Ity_I1);
8978 orperand = newTemp(Ity_I64);
8979 torun = newTemp(Ity_I64);
8980
8981 if (r1 == 0)
8982 assign(orperand, mkU64(0));
8983 else
8984 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8985 /* This code is going to be translated */
8986 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8987 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8988
8989 /* Start with a check that saved code is still correct */
8990 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8991 mkU64(last_execute_target)));
8992 /* If not, save the new value */
8993 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8994 mkIRExprVec_1(mkexpr(torun)));
8995 d->guard = mkexpr(cond);
8996 stmt(IRStmt_Dirty(d));
8997
8998 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008999 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
9000 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00009001 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
9002 IRConst_U64(guest_IA_curr_instr),
9003 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009004
9005 /* Now comes the actual translation */
9006 bytes = (UChar *) &last_execute_target;
9007 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
9008 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00009009 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00009010 vex_printf(" which was executed by\n");
9011 /* dont make useless translations in the next execute */
9012 last_execute_target = 0;
florianf9e1ed72012-04-17 02:41:56 +00009013 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009014 }
9015 }
9016 return "ex";
9017}
9018
9019static HChar *
9020s390_irgen_EXRL(UChar r1, UInt offset)
9021{
9022 IRTemp addr = newTemp(Ity_I64);
9023 /* we might save one round trip because we know the target */
9024 if (!last_execute_target)
9025 last_execute_target = *(ULong *)(HWord)
9026 (guest_IA_curr_instr + offset * 2UL);
9027 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9028 s390_irgen_EX(r1, addr);
9029 return "exrl";
9030}
9031
9032static HChar *
9033s390_irgen_IPM(UChar r1)
9034{
9035 // As long as we dont support SPM, lets just assume 0 as program mask
9036 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9037 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9038
9039 return "ipm";
9040}
9041
9042
9043static HChar *
9044s390_irgen_SRST(UChar r1, UChar r2)
9045{
9046 IRTemp address = newTemp(Ity_I64);
9047 IRTemp next = newTemp(Ity_I64);
9048 IRTemp delim = newTemp(Ity_I8);
9049 IRTemp counter = newTemp(Ity_I64);
9050 IRTemp byte = newTemp(Ity_I8);
9051
9052 assign(address, get_gpr_dw0(r2));
9053 assign(next, get_gpr_dw0(r1));
9054
9055 assign(counter, get_counter_dw0());
9056 put_counter_dw0(mkU64(0));
9057
9058 // start = next? CC=2 and out r1 and r2 unchanged
9059 s390_cc_set(2);
9060 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9061 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9062 guest_IA_next_instr);
9063
9064 assign(byte, load(Ity_I8, mkexpr(address)));
9065 assign(delim, get_gpr_b7(0));
9066
9067 // byte = delim? CC=1, R1=address
9068 s390_cc_set(1);
9069 put_gpr_dw0(r1, mkexpr(address));
9070 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9071 guest_IA_next_instr);
9072
9073 // else: all equal, no end yet, loop
9074 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9075 put_gpr_dw0(r1, mkexpr(next));
9076 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009077 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9078 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9079 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009080 // >= 256 bytes done CC=3
9081 s390_cc_set(3);
9082 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009083 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009084
9085 return "srst";
9086}
9087
9088static HChar *
9089s390_irgen_CLST(UChar r1, UChar r2)
9090{
9091 IRTemp address1 = newTemp(Ity_I64);
9092 IRTemp address2 = newTemp(Ity_I64);
9093 IRTemp end = newTemp(Ity_I8);
9094 IRTemp counter = newTemp(Ity_I64);
9095 IRTemp byte1 = newTemp(Ity_I8);
9096 IRTemp byte2 = newTemp(Ity_I8);
9097
9098 assign(address1, get_gpr_dw0(r1));
9099 assign(address2, get_gpr_dw0(r2));
9100 assign(end, get_gpr_b7(0));
9101 assign(counter, get_counter_dw0());
9102 put_counter_dw0(mkU64(0));
9103 assign(byte1, load(Ity_I8, mkexpr(address1)));
9104 assign(byte2, load(Ity_I8, mkexpr(address2)));
9105
9106 // end in both? all equal, reset r1 and r2 to start values
9107 s390_cc_set(0);
9108 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9109 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9110 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9111 binop(Iop_Or8,
9112 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9113 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9114 guest_IA_next_instr);
9115
9116 put_gpr_dw0(r1, mkexpr(address1));
9117 put_gpr_dw0(r2, mkexpr(address2));
9118
9119 // End found in string1
9120 s390_cc_set(1);
9121 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9122 guest_IA_next_instr);
9123
9124 // End found in string2
9125 s390_cc_set(2);
9126 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9127 guest_IA_next_instr);
9128
9129 // string1 < string2
9130 s390_cc_set(1);
9131 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9132 unop(Iop_8Uto32, mkexpr(byte2))),
9133 guest_IA_next_instr);
9134
9135 // string2 < string1
9136 s390_cc_set(2);
9137 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9138 unop(Iop_8Uto32, mkexpr(byte1))),
9139 guest_IA_next_instr);
9140
9141 // else: all equal, no end yet, loop
9142 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9143 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9144 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009145 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9146 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9147 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009148 // >= 256 bytes done CC=3
9149 s390_cc_set(3);
9150 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009151 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009152
9153 return "clst";
9154}
9155
9156static void
9157s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9158{
9159 UChar reg;
9160 IRTemp addr = newTemp(Ity_I64);
9161
9162 assign(addr, mkexpr(op2addr));
9163 reg = r1;
9164 do {
9165 IRTemp old = addr;
9166
9167 reg %= 16;
9168 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9169 addr = newTemp(Ity_I64);
9170 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9171 reg++;
9172 } while (reg != (r3 + 1));
9173}
9174
9175static HChar *
9176s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9177{
9178 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9179
9180 return "lm";
9181}
9182
9183static HChar *
9184s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9185{
9186 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9187
9188 return "lmy";
9189}
9190
9191static HChar *
9192s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9193{
9194 UChar reg;
9195 IRTemp addr = newTemp(Ity_I64);
9196
9197 assign(addr, mkexpr(op2addr));
9198 reg = r1;
9199 do {
9200 IRTemp old = addr;
9201
9202 reg %= 16;
9203 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9204 addr = newTemp(Ity_I64);
9205 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9206 reg++;
9207 } while (reg != (r3 + 1));
9208
9209 return "lmh";
9210}
9211
9212static HChar *
9213s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9214{
9215 UChar reg;
9216 IRTemp addr = newTemp(Ity_I64);
9217
9218 assign(addr, mkexpr(op2addr));
9219 reg = r1;
9220 do {
9221 IRTemp old = addr;
9222
9223 reg %= 16;
9224 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9225 addr = newTemp(Ity_I64);
9226 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9227 reg++;
9228 } while (reg != (r3 + 1));
9229
9230 return "lmg";
9231}
9232
9233static void
9234s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9235{
9236 UChar reg;
9237 IRTemp addr = newTemp(Ity_I64);
9238
9239 assign(addr, mkexpr(op2addr));
9240 reg = r1;
9241 do {
9242 IRTemp old = addr;
9243
9244 reg %= 16;
9245 store(mkexpr(addr), get_gpr_w1(reg));
9246 addr = newTemp(Ity_I64);
9247 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9248 reg++;
9249 } while( reg != (r3 + 1));
9250}
9251
9252static HChar *
9253s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9254{
9255 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9256
9257 return "stm";
9258}
9259
9260static HChar *
9261s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9262{
9263 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9264
9265 return "stmy";
9266}
9267
9268static HChar *
9269s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9270{
9271 UChar reg;
9272 IRTemp addr = newTemp(Ity_I64);
9273
9274 assign(addr, mkexpr(op2addr));
9275 reg = r1;
9276 do {
9277 IRTemp old = addr;
9278
9279 reg %= 16;
9280 store(mkexpr(addr), get_gpr_w0(reg));
9281 addr = newTemp(Ity_I64);
9282 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9283 reg++;
9284 } while( reg != (r3 + 1));
9285
9286 return "stmh";
9287}
9288
9289static HChar *
9290s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9291{
9292 UChar reg;
9293 IRTemp addr = newTemp(Ity_I64);
9294
9295 assign(addr, mkexpr(op2addr));
9296 reg = r1;
9297 do {
9298 IRTemp old = addr;
9299
9300 reg %= 16;
9301 store(mkexpr(addr), get_gpr_dw0(reg));
9302 addr = newTemp(Ity_I64);
9303 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9304 reg++;
9305 } while( reg != (r3 + 1));
9306
9307 return "stmg";
9308}
9309
9310static void
florian7e8c6922012-03-17 23:38:39 +00009311s390_irgen_xonc(IROp op, UChar length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009312{
9313 IRTemp old1 = newTemp(Ity_I8);
9314 IRTemp old2 = newTemp(Ity_I8);
9315 IRTemp new1 = newTemp(Ity_I8);
9316 IRTemp counter = newTemp(Ity_I32);
9317 IRTemp addr1 = newTemp(Ity_I64);
9318
9319 assign(counter, get_counter_w0());
9320
9321 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9322 unop(Iop_32Uto64, mkexpr(counter))));
9323
9324 assign(old1, load(Ity_I8, mkexpr(addr1)));
9325 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9326 unop(Iop_32Uto64,mkexpr(counter)))));
9327 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9328
9329 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009330 if (op == Iop_Xor8) {
9331 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009332 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9333 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009334 } else
9335 store(mkexpr(addr1), mkexpr(new1));
9336 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9337 get_counter_w1()));
9338
9339 /* Check for end of field */
9340 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9341 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9342 guest_IA_curr_instr);
9343 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9344 False);
9345 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009346 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009347}
9348
9349static HChar *
9350s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9351{
florian7e8c6922012-03-17 23:38:39 +00009352 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009353
9354 return "xc";
9355}
9356
sewardjb63967e2011-03-24 08:50:04 +00009357static void
9358s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9359{
9360 IRTemp counter = newTemp(Ity_I32);
9361 IRTemp start = newTemp(Ity_I64);
9362 IRTemp addr = newTemp(Ity_I64);
9363
9364 assign(start,
9365 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9366
9367 if (length < 8) {
9368 UInt i;
9369
9370 for (i = 0; i <= length; ++i) {
9371 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9372 }
9373 } else {
9374 assign(counter, get_counter_w0());
9375
9376 assign(addr, binop(Iop_Add64, mkexpr(start),
9377 unop(Iop_32Uto64, mkexpr(counter))));
9378
9379 store(mkexpr(addr), mkU8(0));
9380
9381 /* Check for end of field */
9382 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9383 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9384 guest_IA_curr_instr);
9385
9386 /* Reset counter */
9387 put_counter_dw0(mkU64(0));
9388 }
9389
9390 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
florianf9e1ed72012-04-17 02:41:56 +00009391 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009392
sewardj7ee97522011-05-09 21:45:04 +00009393 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009394 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9395}
9396
sewardj2019a972011-03-07 16:04:07 +00009397static HChar *
9398s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9399{
florian7e8c6922012-03-17 23:38:39 +00009400 s390_irgen_xonc(Iop_And8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009401
9402 return "nc";
9403}
9404
9405static HChar *
9406s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9407{
florian7e8c6922012-03-17 23:38:39 +00009408 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009409
9410 return "oc";
9411}
9412
9413
9414static HChar *
9415s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9416{
9417 IRTemp counter = newTemp(Ity_I64);
9418
9419 assign(counter, get_counter_dw0());
9420
9421 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9422 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9423
9424 /* Check for end of field */
9425 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9426 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9427 guest_IA_curr_instr);
9428 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009429 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009430
9431 return "mvc";
9432}
9433
9434static HChar *
florianb0c9a132011-09-08 15:37:39 +00009435s390_irgen_MVCL(UChar r1, UChar r2)
9436{
9437 IRTemp addr1 = newTemp(Ity_I64);
9438 IRTemp addr2 = newTemp(Ity_I64);
9439 IRTemp addr2_load = newTemp(Ity_I64);
9440 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9441 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9442 IRTemp len1 = newTemp(Ity_I32);
9443 IRTemp len2 = newTemp(Ity_I32);
9444 IRTemp pad = newTemp(Ity_I8);
9445 IRTemp single = newTemp(Ity_I8);
9446
9447 assign(addr1, get_gpr_dw0(r1));
9448 assign(r1p1, get_gpr_w1(r1 + 1));
9449 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9450 assign(addr2, get_gpr_dw0(r2));
9451 assign(r2p1, get_gpr_w1(r2 + 1));
9452 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9453 assign(pad, get_gpr_b4(r2 + 1));
9454
9455 /* len1 == 0 ? */
9456 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9457 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9458 guest_IA_next_instr);
9459
9460 /* Check for destructive overlap:
9461 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9462 s390_cc_set(3);
9463 IRTemp cond1 = newTemp(Ity_I32);
9464 assign(cond1, unop(Iop_1Uto32,
9465 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9466 IRTemp cond2 = newTemp(Ity_I32);
9467 assign(cond2, unop(Iop_1Uto32,
9468 binop(Iop_CmpLT64U, mkexpr(addr1),
9469 binop(Iop_Add64, mkexpr(addr2),
9470 unop(Iop_32Uto64, mkexpr(len1))))));
9471 IRTemp cond3 = newTemp(Ity_I32);
9472 assign(cond3, unop(Iop_1Uto32,
9473 binop(Iop_CmpLT64U,
9474 mkexpr(addr1),
9475 binop(Iop_Add64, mkexpr(addr2),
9476 unop(Iop_32Uto64, mkexpr(len2))))));
9477
9478 if_condition_goto(binop(Iop_CmpEQ32,
9479 binop(Iop_And32,
9480 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9481 mkexpr(cond3)),
9482 mkU32(1)),
9483 guest_IA_next_instr);
9484
9485 /* See s390_irgen_CLCL for explanation why we cannot load directly
9486 and need two steps. */
9487 assign(addr2_load,
9488 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9489 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9490 assign(single,
9491 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9492 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9493
9494 store(mkexpr(addr1), mkexpr(single));
9495
9496 /* Update addr1 and len1 */
9497 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9498 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9499
9500 /* Update addr2 and len2 */
9501 put_gpr_dw0(r2,
9502 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9503 mkexpr(addr2),
9504 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9505
9506 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9507 put_gpr_w1(r2 + 1,
9508 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9509 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9510 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9511
9512 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9513 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9514 guest_IA_curr_instr);
9515
9516 return "mvcl";
9517}
9518
9519
9520static HChar *
sewardj2019a972011-03-07 16:04:07 +00009521s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9522{
9523 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9524
9525 addr1 = newTemp(Ity_I64);
9526 addr3 = newTemp(Ity_I64);
9527 addr3_load = newTemp(Ity_I64);
9528 len1 = newTemp(Ity_I64);
9529 len3 = newTemp(Ity_I64);
9530 single = newTemp(Ity_I8);
9531
9532 assign(addr1, get_gpr_dw0(r1));
9533 assign(len1, get_gpr_dw0(r1 + 1));
9534 assign(addr3, get_gpr_dw0(r3));
9535 assign(len3, get_gpr_dw0(r3 + 1));
9536
9537 // len1 == 0 ?
9538 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9539 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9540 guest_IA_next_instr);
9541
9542 /* This is a hack to prevent mvcle from reading from addr3 if it
9543 should read from the pad. Since the pad has no address, just
9544 read from the instruction, we discard that anyway */
9545 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009546 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9547 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009548
9549 assign(single,
florian6ad49522011-09-09 02:38:55 +00009550 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9551 unop(Iop_64to8, mkexpr(pad2)),
9552 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009553 store(mkexpr(addr1), mkexpr(single));
9554
9555 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9556
9557 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9558
9559 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009560 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9561 mkexpr(addr3),
9562 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009563
9564 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009565 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9566 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009567
9568 /* We should set CC=3 (faked by overflow add) and leave after
9569 a maximum of ~4096 bytes have been processed. This is simpler:
9570 we leave whenever (len1 % 4096) == 0 */
9571 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009572 mktemp(Ity_I64, mkU64(-1ULL)), False);
9573 if_condition_goto(binop(Iop_CmpEQ64,
9574 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9575 mkU64(0)),
9576 guest_IA_next_instr);
9577
9578 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9579 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9580 guest_IA_curr_instr);
9581
9582 return "mvcle";
9583}
9584
9585static HChar *
9586s390_irgen_MVST(UChar r1, UChar r2)
9587{
9588 IRTemp addr1 = newTemp(Ity_I64);
9589 IRTemp addr2 = newTemp(Ity_I64);
9590 IRTemp end = newTemp(Ity_I8);
9591 IRTemp byte = newTemp(Ity_I8);
9592 IRTemp counter = newTemp(Ity_I64);
9593
9594 assign(addr1, get_gpr_dw0(r1));
9595 assign(addr2, get_gpr_dw0(r2));
9596 assign(counter, get_counter_dw0());
9597 assign(end, get_gpr_b7(0));
9598 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9599 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9600
9601 // We use unlimited as cpu-determined number
9602 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9603 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9604 guest_IA_curr_instr);
9605
9606 // and always set cc=1 at the end + update r1
9607 s390_cc_set(1);
9608 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9609 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009610 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009611
9612 return "mvst";
9613}
9614
9615static void
9616s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9617{
9618 IRTemp op1 = newTemp(Ity_I64);
9619 IRTemp result = newTemp(Ity_I64);
9620
9621 assign(op1, binop(Iop_32HLto64,
9622 get_gpr_w1(r1), // high 32 bits
9623 get_gpr_w1(r1 + 1))); // low 32 bits
9624 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9625 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9626 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9627}
9628
9629static void
9630s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9631{
9632 IRTemp op1 = newTemp(Ity_I128);
9633 IRTemp result = newTemp(Ity_I128);
9634
9635 assign(op1, binop(Iop_64HLto128,
9636 get_gpr_dw0(r1), // high 64 bits
9637 get_gpr_dw0(r1 + 1))); // low 64 bits
9638 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9639 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9640 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9641}
9642
9643static void
9644s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9645{
9646 IRTemp op1 = newTemp(Ity_I64);
9647 IRTemp result = newTemp(Ity_I128);
9648
9649 assign(op1, get_gpr_dw0(r1 + 1));
9650 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9651 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9652 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9653}
9654
9655static HChar *
9656s390_irgen_DR(UChar r1, UChar r2)
9657{
9658 IRTemp op2 = newTemp(Ity_I32);
9659
9660 assign(op2, get_gpr_w1(r2));
9661
9662 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9663
9664 return "dr";
9665}
9666
9667static HChar *
9668s390_irgen_D(UChar r1, IRTemp op2addr)
9669{
9670 IRTemp op2 = newTemp(Ity_I32);
9671
9672 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9673
9674 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9675
9676 return "d";
9677}
9678
9679static HChar *
9680s390_irgen_DLR(UChar r1, UChar r2)
9681{
9682 IRTemp op2 = newTemp(Ity_I32);
9683
9684 assign(op2, get_gpr_w1(r2));
9685
9686 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9687
9688 return "dr";
9689}
9690
9691static HChar *
9692s390_irgen_DL(UChar r1, IRTemp op2addr)
9693{
9694 IRTemp op2 = newTemp(Ity_I32);
9695
9696 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9697
9698 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9699
9700 return "dl";
9701}
9702
9703static HChar *
9704s390_irgen_DLG(UChar r1, IRTemp op2addr)
9705{
9706 IRTemp op2 = newTemp(Ity_I64);
9707
9708 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9709
9710 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9711
9712 return "dlg";
9713}
9714
9715static HChar *
9716s390_irgen_DLGR(UChar r1, UChar r2)
9717{
9718 IRTemp op2 = newTemp(Ity_I64);
9719
9720 assign(op2, get_gpr_dw0(r2));
9721
9722 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9723
9724 return "dlgr";
9725}
9726
9727static HChar *
9728s390_irgen_DSGR(UChar r1, UChar r2)
9729{
9730 IRTemp op2 = newTemp(Ity_I64);
9731
9732 assign(op2, get_gpr_dw0(r2));
9733
9734 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9735
9736 return "dsgr";
9737}
9738
9739static HChar *
9740s390_irgen_DSG(UChar r1, IRTemp op2addr)
9741{
9742 IRTemp op2 = newTemp(Ity_I64);
9743
9744 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9745
9746 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9747
9748 return "dsg";
9749}
9750
9751static HChar *
9752s390_irgen_DSGFR(UChar r1, UChar r2)
9753{
9754 IRTemp op2 = newTemp(Ity_I64);
9755
9756 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9757
9758 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9759
9760 return "dsgfr";
9761}
9762
9763static HChar *
9764s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9765{
9766 IRTemp op2 = newTemp(Ity_I64);
9767
9768 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9769
9770 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9771
9772 return "dsgf";
9773}
9774
9775static void
9776s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9777{
9778 UChar reg;
9779 IRTemp addr = newTemp(Ity_I64);
9780
9781 assign(addr, mkexpr(op2addr));
9782 reg = r1;
9783 do {
9784 IRTemp old = addr;
9785
9786 reg %= 16;
9787 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9788 addr = newTemp(Ity_I64);
9789 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9790 reg++;
9791 } while (reg != (r3 + 1));
9792}
9793
9794static HChar *
9795s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9796{
9797 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9798
9799 return "lam";
9800}
9801
9802static HChar *
9803s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9804{
9805 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9806
9807 return "lamy";
9808}
9809
9810static void
9811s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9812{
9813 UChar reg;
9814 IRTemp addr = newTemp(Ity_I64);
9815
9816 assign(addr, mkexpr(op2addr));
9817 reg = r1;
9818 do {
9819 IRTemp old = addr;
9820
9821 reg %= 16;
9822 store(mkexpr(addr), get_ar_w0(reg));
9823 addr = newTemp(Ity_I64);
9824 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9825 reg++;
9826 } while (reg != (r3 + 1));
9827}
9828
9829static HChar *
9830s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9831{
9832 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9833
9834 return "stam";
9835}
9836
9837static HChar *
9838s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9839{
9840 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9841
9842 return "stamy";
9843}
9844
9845
9846/* Implementation for 32-bit compare-and-swap */
9847static void
9848s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9849{
9850 IRCAS *cas;
9851 IRTemp op1 = newTemp(Ity_I32);
9852 IRTemp old_mem = newTemp(Ity_I32);
9853 IRTemp op3 = newTemp(Ity_I32);
9854 IRTemp result = newTemp(Ity_I32);
9855 IRTemp nequal = newTemp(Ity_I1);
9856
9857 assign(op1, get_gpr_w1(r1));
9858 assign(op3, get_gpr_w1(r3));
9859
9860 /* The first and second operands are compared. If they are equal,
9861 the third operand is stored at the second- operand location. */
9862 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9863 Iend_BE, mkexpr(op2addr),
9864 NULL, mkexpr(op1), /* expected value */
9865 NULL, mkexpr(op3) /* new value */);
9866 stmt(IRStmt_CAS(cas));
9867
9868 /* Set CC. Operands compared equal -> 0, else 1. */
9869 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9870 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9871
9872 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9873 Otherwise, store the old_value from memory in r1 and yield. */
9874 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9875 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009876 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9877 IRConst_U64(guest_IA_next_instr),
9878 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009879}
9880
9881static HChar *
9882s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9883{
9884 s390_irgen_cas_32(r1, r3, op2addr);
9885
9886 return "cs";
9887}
9888
9889static HChar *
9890s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9891{
9892 s390_irgen_cas_32(r1, r3, op2addr);
9893
9894 return "csy";
9895}
9896
9897static HChar *
9898s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9899{
9900 IRCAS *cas;
9901 IRTemp op1 = newTemp(Ity_I64);
9902 IRTemp old_mem = newTemp(Ity_I64);
9903 IRTemp op3 = newTemp(Ity_I64);
9904 IRTemp result = newTemp(Ity_I64);
9905 IRTemp nequal = newTemp(Ity_I1);
9906
9907 assign(op1, get_gpr_dw0(r1));
9908 assign(op3, get_gpr_dw0(r3));
9909
9910 /* The first and second operands are compared. If they are equal,
9911 the third operand is stored at the second- operand location. */
9912 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9913 Iend_BE, mkexpr(op2addr),
9914 NULL, mkexpr(op1), /* expected value */
9915 NULL, mkexpr(op3) /* new value */);
9916 stmt(IRStmt_CAS(cas));
9917
9918 /* Set CC. Operands compared equal -> 0, else 1. */
9919 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9920 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9921
9922 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9923 Otherwise, store the old_value from memory in r1 and yield. */
9924 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9925 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009926 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9927 IRConst_U64(guest_IA_next_instr),
9928 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009929
9930 return "csg";
9931}
9932
9933
9934/* Binary floating point */
9935
9936static HChar *
9937s390_irgen_AXBR(UChar r1, UChar r2)
9938{
9939 IRTemp op1 = newTemp(Ity_F128);
9940 IRTemp op2 = newTemp(Ity_F128);
9941 IRTemp result = newTemp(Ity_F128);
9942
9943 assign(op1, get_fpr_pair(r1));
9944 assign(op2, get_fpr_pair(r2));
9945 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9946 mkexpr(op2)));
9947 put_fpr_pair(r1, mkexpr(result));
9948
9949 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9950
9951 return "axbr";
9952}
9953
9954/* The result of a Iop_CmdFxx operation is a condition code. It is
9955 encoded using the values defined in type IRCmpFxxResult.
9956 Before we can store the condition code into the guest state (or do
9957 anything else with it for that matter) we need to convert it to
9958 the encoding that s390 uses. This is what this function does.
9959
9960 s390 VEX b6 b2 b0 cc.1 cc.0
9961 0 0x40 EQ 1 0 0 0 0
9962 1 0x01 LT 0 0 1 0 1
9963 2 0x00 GT 0 0 0 1 0
9964 3 0x45 Unordered 1 1 1 1 1
9965
9966 The following bits from the VEX encoding are interesting:
9967 b0, b2, b6 with b0 being the LSB. We observe:
9968
9969 cc.0 = b0;
9970 cc.1 = b2 | (~b0 & ~b6)
9971
9972 with cc being the s390 condition code.
9973*/
9974static IRExpr *
9975convert_vex_fpcc_to_s390(IRTemp vex_cc)
9976{
9977 IRTemp cc0 = newTemp(Ity_I32);
9978 IRTemp cc1 = newTemp(Ity_I32);
9979 IRTemp b0 = newTemp(Ity_I32);
9980 IRTemp b2 = newTemp(Ity_I32);
9981 IRTemp b6 = newTemp(Ity_I32);
9982
9983 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9984 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9985 mkU32(1)));
9986 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9987 mkU32(1)));
9988
9989 assign(cc0, mkexpr(b0));
9990 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9991 binop(Iop_And32,
9992 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9993 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9994 )));
9995
9996 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9997}
9998
9999static HChar *
10000s390_irgen_CEBR(UChar r1, UChar r2)
10001{
10002 IRTemp op1 = newTemp(Ity_F32);
10003 IRTemp op2 = newTemp(Ity_F32);
10004 IRTemp cc_vex = newTemp(Ity_I32);
10005 IRTemp cc_s390 = newTemp(Ity_I32);
10006
10007 assign(op1, get_fpr_w0(r1));
10008 assign(op2, get_fpr_w0(r2));
10009 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10010
10011 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10012 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10013
10014 return "cebr";
10015}
10016
10017static HChar *
10018s390_irgen_CDBR(UChar r1, UChar r2)
10019{
10020 IRTemp op1 = newTemp(Ity_F64);
10021 IRTemp op2 = newTemp(Ity_F64);
10022 IRTemp cc_vex = newTemp(Ity_I32);
10023 IRTemp cc_s390 = newTemp(Ity_I32);
10024
10025 assign(op1, get_fpr_dw0(r1));
10026 assign(op2, get_fpr_dw0(r2));
10027 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10028
10029 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10030 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10031
10032 return "cdbr";
10033}
10034
10035static HChar *
10036s390_irgen_CXBR(UChar r1, UChar r2)
10037{
10038 IRTemp op1 = newTemp(Ity_F128);
10039 IRTemp op2 = newTemp(Ity_F128);
10040 IRTemp cc_vex = newTemp(Ity_I32);
10041 IRTemp cc_s390 = newTemp(Ity_I32);
10042
10043 assign(op1, get_fpr_pair(r1));
10044 assign(op2, get_fpr_pair(r2));
10045 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10046
10047 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10048 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10049
10050 return "cxbr";
10051}
10052
10053static HChar *
10054s390_irgen_CEB(UChar r1, IRTemp op2addr)
10055{
10056 IRTemp op1 = newTemp(Ity_F32);
10057 IRTemp op2 = newTemp(Ity_F32);
10058 IRTemp cc_vex = newTemp(Ity_I32);
10059 IRTemp cc_s390 = newTemp(Ity_I32);
10060
10061 assign(op1, get_fpr_w0(r1));
10062 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10063 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10064
10065 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10066 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10067
10068 return "ceb";
10069}
10070
10071static HChar *
10072s390_irgen_CDB(UChar r1, IRTemp op2addr)
10073{
10074 IRTemp op1 = newTemp(Ity_F64);
10075 IRTemp op2 = newTemp(Ity_F64);
10076 IRTemp cc_vex = newTemp(Ity_I32);
10077 IRTemp cc_s390 = newTemp(Ity_I32);
10078
10079 assign(op1, get_fpr_dw0(r1));
10080 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10081 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10082
10083 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10084 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10085
10086 return "cdb";
10087}
10088
10089static HChar *
10090s390_irgen_CXFBR(UChar r1, UChar r2)
10091{
10092 IRTemp op2 = newTemp(Ity_I32);
10093
10094 assign(op2, get_gpr_w1(r2));
10095 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10096
10097 return "cxfbr";
10098}
10099
10100static HChar *
10101s390_irgen_CXGBR(UChar r1, UChar r2)
10102{
10103 IRTemp op2 = newTemp(Ity_I64);
10104
10105 assign(op2, get_gpr_dw0(r2));
10106 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10107
10108 return "cxgbr";
10109}
10110
10111static HChar *
10112s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10113{
10114 IRTemp op = newTemp(Ity_F128);
10115 IRTemp result = newTemp(Ity_I32);
10116
10117 assign(op, get_fpr_pair(r2));
10118 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10119 mkexpr(op)));
10120 put_gpr_w1(r1, mkexpr(result));
10121 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10122
10123 return "cfxbr";
10124}
10125
10126static HChar *
10127s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10128{
10129 IRTemp op = newTemp(Ity_F128);
10130 IRTemp result = newTemp(Ity_I64);
10131
10132 assign(op, get_fpr_pair(r2));
10133 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10134 mkexpr(op)));
10135 put_gpr_dw0(r1, mkexpr(result));
10136 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10137
10138 return "cgxbr";
10139}
10140
10141static HChar *
10142s390_irgen_DXBR(UChar r1, UChar r2)
10143{
10144 IRTemp op1 = newTemp(Ity_F128);
10145 IRTemp op2 = newTemp(Ity_F128);
10146 IRTemp result = newTemp(Ity_F128);
10147
10148 assign(op1, get_fpr_pair(r1));
10149 assign(op2, get_fpr_pair(r2));
10150 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10151 mkexpr(op2)));
10152 put_fpr_pair(r1, mkexpr(result));
10153
10154 return "dxbr";
10155}
10156
10157static HChar *
10158s390_irgen_LTXBR(UChar r1, UChar r2)
10159{
10160 IRTemp result = newTemp(Ity_F128);
10161
10162 assign(result, get_fpr_pair(r2));
10163 put_fpr_pair(r1, mkexpr(result));
10164 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10165
10166 return "ltxbr";
10167}
10168
10169static HChar *
10170s390_irgen_LCXBR(UChar r1, UChar r2)
10171{
10172 IRTemp result = newTemp(Ity_F128);
10173
10174 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10175 put_fpr_pair(r1, mkexpr(result));
10176 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10177
10178 return "lcxbr";
10179}
10180
10181static HChar *
10182s390_irgen_LXDBR(UChar r1, UChar r2)
10183{
10184 IRTemp op = newTemp(Ity_F64);
10185
10186 assign(op, get_fpr_dw0(r2));
10187 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10188
10189 return "lxdbr";
10190}
10191
10192static HChar *
10193s390_irgen_LXEBR(UChar r1, UChar r2)
10194{
10195 IRTemp op = newTemp(Ity_F32);
10196
10197 assign(op, get_fpr_w0(r2));
10198 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10199
10200 return "lxebr";
10201}
10202
10203static HChar *
10204s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10205{
10206 IRTemp op = newTemp(Ity_F64);
10207
10208 assign(op, load(Ity_F64, mkexpr(op2addr)));
10209 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10210
10211 return "lxdb";
10212}
10213
10214static HChar *
10215s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10216{
10217 IRTemp op = newTemp(Ity_F32);
10218
10219 assign(op, load(Ity_F32, mkexpr(op2addr)));
10220 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10221
10222 return "lxeb";
10223}
10224
10225static HChar *
10226s390_irgen_LNEBR(UChar r1, UChar r2)
10227{
10228 IRTemp result = newTemp(Ity_F32);
10229
10230 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10231 put_fpr_w0(r1, mkexpr(result));
10232 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10233
10234 return "lnebr";
10235}
10236
10237static HChar *
10238s390_irgen_LNDBR(UChar r1, UChar r2)
10239{
10240 IRTemp result = newTemp(Ity_F64);
10241
10242 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10243 put_fpr_dw0(r1, mkexpr(result));
10244 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10245
10246 return "lndbr";
10247}
10248
10249static HChar *
10250s390_irgen_LNXBR(UChar r1, UChar r2)
10251{
10252 IRTemp result = newTemp(Ity_F128);
10253
10254 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10255 put_fpr_pair(r1, mkexpr(result));
10256 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10257
10258 return "lnxbr";
10259}
10260
10261static HChar *
10262s390_irgen_LPEBR(UChar r1, UChar r2)
10263{
10264 IRTemp result = newTemp(Ity_F32);
10265
10266 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10267 put_fpr_w0(r1, mkexpr(result));
10268 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10269
10270 return "lpebr";
10271}
10272
10273static HChar *
10274s390_irgen_LPDBR(UChar r1, UChar r2)
10275{
10276 IRTemp result = newTemp(Ity_F64);
10277
10278 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10279 put_fpr_dw0(r1, mkexpr(result));
10280 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10281
10282 return "lpdbr";
10283}
10284
10285static HChar *
10286s390_irgen_LPXBR(UChar r1, UChar r2)
10287{
10288 IRTemp result = newTemp(Ity_F128);
10289
10290 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10291 put_fpr_pair(r1, mkexpr(result));
10292 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10293
10294 return "lpxbr";
10295}
10296
10297static HChar *
10298s390_irgen_LDXBR(UChar r1, UChar r2)
10299{
10300 IRTemp result = newTemp(Ity_F64);
10301
10302 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10303 put_fpr_dw0(r1, mkexpr(result));
10304
10305 return "ldxbr";
10306}
10307
10308static HChar *
10309s390_irgen_LEXBR(UChar r1, UChar r2)
10310{
10311 IRTemp result = newTemp(Ity_F32);
10312
10313 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10314 put_fpr_w0(r1, mkexpr(result));
10315
10316 return "lexbr";
10317}
10318
10319static HChar *
10320s390_irgen_MXBR(UChar r1, UChar r2)
10321{
10322 IRTemp op1 = newTemp(Ity_F128);
10323 IRTemp op2 = newTemp(Ity_F128);
10324 IRTemp result = newTemp(Ity_F128);
10325
10326 assign(op1, get_fpr_pair(r1));
10327 assign(op2, get_fpr_pair(r2));
10328 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10329 mkexpr(op2)));
10330 put_fpr_pair(r1, mkexpr(result));
10331
10332 return "mxbr";
10333}
10334
10335static HChar *
10336s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10337{
10338 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10339 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10340
10341 return "maebr";
10342}
10343
10344static HChar *
10345s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10346{
10347 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10348 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10349
10350 return "madbr";
10351}
10352
10353static HChar *
10354s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10355{
10356 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10357
10358 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10359 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10360
10361 return "maeb";
10362}
10363
10364static HChar *
10365s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10366{
10367 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10368
10369 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10370 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10371
10372 return "madb";
10373}
10374
10375static HChar *
10376s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10377{
10378 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10379 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10380
10381 return "msebr";
10382}
10383
10384static HChar *
10385s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10386{
10387 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10388 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10389
10390 return "msdbr";
10391}
10392
10393static HChar *
10394s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10395{
10396 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10397
10398 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10399 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10400
10401 return "mseb";
10402}
10403
10404static HChar *
10405s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10406{
10407 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10408
10409 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10410 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10411
10412 return "msdb";
10413}
10414
10415static HChar *
10416s390_irgen_SQEBR(UChar r1, UChar r2)
10417{
10418 IRTemp result = newTemp(Ity_F32);
10419
10420 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10421 put_fpr_w0(r1, mkexpr(result));
10422
10423 return "sqebr";
10424}
10425
10426static HChar *
10427s390_irgen_SQDBR(UChar r1, UChar r2)
10428{
10429 IRTemp result = newTemp(Ity_F64);
10430
10431 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10432 put_fpr_dw0(r1, mkexpr(result));
10433
10434 return "sqdbr";
10435}
10436
10437static HChar *
10438s390_irgen_SQXBR(UChar r1, UChar r2)
10439{
10440 IRTemp result = newTemp(Ity_F128);
10441
10442 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10443 put_fpr_pair(r1, mkexpr(result));
10444
10445 return "sqxbr";
10446}
10447
10448static HChar *
10449s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10450{
10451 IRTemp op = newTemp(Ity_F32);
10452
10453 assign(op, load(Ity_F32, mkexpr(op2addr)));
10454 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10455
10456 return "sqeb";
10457}
10458
10459static HChar *
10460s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10461{
10462 IRTemp op = newTemp(Ity_F64);
10463
10464 assign(op, load(Ity_F64, mkexpr(op2addr)));
10465 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10466
10467 return "sqdb";
10468}
10469
10470static HChar *
10471s390_irgen_SXBR(UChar r1, UChar r2)
10472{
10473 IRTemp op1 = newTemp(Ity_F128);
10474 IRTemp op2 = newTemp(Ity_F128);
10475 IRTemp result = newTemp(Ity_F128);
10476
10477 assign(op1, get_fpr_pair(r1));
10478 assign(op2, get_fpr_pair(r2));
10479 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10480 mkexpr(op2)));
10481 put_fpr_pair(r1, mkexpr(result));
10482 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10483
10484 return "sxbr";
10485}
10486
10487static HChar *
10488s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10489{
10490 IRTemp value = newTemp(Ity_F32);
10491
10492 assign(value, get_fpr_w0(r1));
10493
10494 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10495
10496 return "tceb";
10497}
10498
10499static HChar *
10500s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10501{
10502 IRTemp value = newTemp(Ity_F64);
10503
10504 assign(value, get_fpr_dw0(r1));
10505
10506 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10507
10508 return "tcdb";
10509}
10510
10511static HChar *
10512s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10513{
10514 IRTemp value = newTemp(Ity_F128);
10515
10516 assign(value, get_fpr_pair(r1));
10517
10518 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10519
10520 return "tcxb";
10521}
10522
10523static HChar *
10524s390_irgen_LCDFR(UChar r1, UChar r2)
10525{
10526 IRTemp result = newTemp(Ity_F64);
10527
10528 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10529 put_fpr_dw0(r1, mkexpr(result));
10530
10531 return "lcdfr";
10532}
10533
10534static HChar *
10535s390_irgen_LNDFR(UChar r1, UChar r2)
10536{
10537 IRTemp result = newTemp(Ity_F64);
10538
10539 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10540 put_fpr_dw0(r1, mkexpr(result));
10541
10542 return "lndfr";
10543}
10544
10545static HChar *
10546s390_irgen_LPDFR(UChar r1, UChar r2)
10547{
10548 IRTemp result = newTemp(Ity_F64);
10549
10550 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10551 put_fpr_dw0(r1, mkexpr(result));
10552
10553 return "lpdfr";
10554}
10555
10556static HChar *
10557s390_irgen_LDGR(UChar r1, UChar r2)
10558{
10559 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10560
10561 return "ldgr";
10562}
10563
10564static HChar *
10565s390_irgen_LGDR(UChar r1, UChar r2)
10566{
10567 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10568
10569 return "lgdr";
10570}
10571
10572
10573static HChar *
10574s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10575{
10576 IRTemp sign = newTemp(Ity_I64);
10577 IRTemp value = newTemp(Ity_I64);
10578
10579 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10580 mkU64(1ULL << 63)));
10581 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10582 mkU64((1ULL << 63) - 1)));
10583 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10584 mkexpr(sign))));
10585
10586 return "cpsdr";
10587}
10588
10589
10590static UInt
10591s390_do_cvb(ULong decimal)
10592{
10593#if defined(VGA_s390x)
10594 UInt binary;
10595
10596 __asm__ volatile (
10597 "cvb %[result],%[input]\n\t"
10598 : [result] "=d"(binary)
10599 : [input] "m"(decimal)
10600 );
10601
10602 return binary;
10603#else
10604 return 0;
10605#endif
10606}
10607
10608static IRExpr *
10609s390_call_cvb(IRExpr *in)
10610{
10611 IRExpr **args, *call;
10612
10613 args = mkIRExprVec_1(in);
10614 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10615 "s390_do_cvb", &s390_do_cvb, args);
10616
10617 /* Nothing is excluded from definedness checking. */
10618 call->Iex.CCall.cee->mcx_mask = 0;
10619
10620 return call;
10621}
10622
10623static HChar *
10624s390_irgen_CVB(UChar r1, IRTemp op2addr)
10625{
10626 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10627
10628 return "cvb";
10629}
10630
10631static HChar *
10632s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10633{
10634 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10635
10636 return "cvby";
10637}
10638
10639
10640static ULong
10641s390_do_cvd(ULong binary_in)
10642{
10643#if defined(VGA_s390x)
10644 UInt binary = binary_in & 0xffffffffULL;
10645 ULong decimal;
10646
10647 __asm__ volatile (
10648 "cvd %[input],%[result]\n\t"
10649 : [result] "=m"(decimal)
10650 : [input] "d"(binary)
10651 );
10652
10653 return decimal;
10654#else
10655 return 0;
10656#endif
10657}
10658
10659static IRExpr *
10660s390_call_cvd(IRExpr *in)
10661{
10662 IRExpr **args, *call;
10663
10664 args = mkIRExprVec_1(in);
10665 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10666 "s390_do_cvd", &s390_do_cvd, args);
10667
10668 /* Nothing is excluded from definedness checking. */
10669 call->Iex.CCall.cee->mcx_mask = 0;
10670
10671 return call;
10672}
10673
10674static HChar *
10675s390_irgen_CVD(UChar r1, IRTemp op2addr)
10676{
10677 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10678
10679 return "cvd";
10680}
10681
10682static HChar *
10683s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10684{
10685 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10686
10687 return "cvdy";
10688}
10689
10690static HChar *
10691s390_irgen_FLOGR(UChar r1, UChar r2)
10692{
10693 IRTemp input = newTemp(Ity_I64);
10694 IRTemp not_zero = newTemp(Ity_I64);
10695 IRTemp tmpnum = newTemp(Ity_I64);
10696 IRTemp num = newTemp(Ity_I64);
10697 IRTemp shift_amount = newTemp(Ity_I8);
10698
10699 /* We use the "count leading zeroes" operator because the number of
10700 leading zeroes is identical with the bit position of the first '1' bit.
10701 However, that operator does not work when the input value is zero.
10702 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10703 the modified value. If input == 0, then the result is 64. Otherwise,
10704 the result of Clz64 is what we want. */
10705
10706 assign(input, get_gpr_dw0(r2));
10707 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10708 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10709
10710 /* num = (input == 0) ? 64 : tmpnum */
10711 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10712 /* == 0 */ mkU64(64),
10713 /* != 0 */ mkexpr(tmpnum)));
10714
10715 put_gpr_dw0(r1, mkexpr(num));
10716
10717 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10718 is to first shift the input value by NUM + 1 bits to the left which
10719 causes the leftmost '1' bit to disappear. Then we shift logically to
10720 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10721 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10722 the width of the value-to-be-shifted, we need to special case
10723 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10724 For both such INPUT values the result will be 0. */
10725
10726 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10727 mkU64(1))));
10728
10729 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010730 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10731 /* == 0 || == 1*/ mkU64(0),
10732 /* otherwise */
10733 binop(Iop_Shr64,
10734 binop(Iop_Shl64, mkexpr(input),
10735 mkexpr(shift_amount)),
10736 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010737
10738 /* Compare the original value as an unsigned integer with 0. */
10739 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10740 mktemp(Ity_I64, mkU64(0)), False);
10741
10742 return "flogr";
10743}
10744
sewardj1e5fea62011-05-17 16:18:36 +000010745static HChar *
10746s390_irgen_STCK(IRTemp op2addr)
10747{
10748 IRDirty *d;
10749 IRTemp cc = newTemp(Ity_I64);
10750
10751 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10752 &s390x_dirtyhelper_STCK,
10753 mkIRExprVec_1(mkexpr(op2addr)));
10754 d->mFx = Ifx_Write;
10755 d->mAddr = mkexpr(op2addr);
10756 d->mSize = 8;
10757 stmt(IRStmt_Dirty(d));
10758 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10759 mkexpr(cc), mkU64(0), mkU64(0));
10760 return "stck";
10761}
10762
10763static HChar *
10764s390_irgen_STCKF(IRTemp op2addr)
10765{
10766 IRDirty *d;
10767 IRTemp cc = newTemp(Ity_I64);
10768
10769 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10770 &s390x_dirtyhelper_STCKF,
10771 mkIRExprVec_1(mkexpr(op2addr)));
10772 d->mFx = Ifx_Write;
10773 d->mAddr = mkexpr(op2addr);
10774 d->mSize = 8;
10775 stmt(IRStmt_Dirty(d));
10776 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10777 mkexpr(cc), mkU64(0), mkU64(0));
10778 return "stckf";
10779}
10780
10781static HChar *
10782s390_irgen_STCKE(IRTemp op2addr)
10783{
10784 IRDirty *d;
10785 IRTemp cc = newTemp(Ity_I64);
10786
10787 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10788 &s390x_dirtyhelper_STCKE,
10789 mkIRExprVec_1(mkexpr(op2addr)));
10790 d->mFx = Ifx_Write;
10791 d->mAddr = mkexpr(op2addr);
10792 d->mSize = 16;
10793 stmt(IRStmt_Dirty(d));
10794 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10795 mkexpr(cc), mkU64(0), mkU64(0));
10796 return "stcke";
10797}
10798
florian933065d2011-07-11 01:48:02 +000010799static HChar *
10800s390_irgen_STFLE(IRTemp op2addr)
10801{
10802 IRDirty *d;
10803 IRTemp cc = newTemp(Ity_I64);
10804
10805 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10806 &s390x_dirtyhelper_STFLE,
10807 mkIRExprVec_1(mkexpr(op2addr)));
10808
10809 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10810
10811 d->fxState[0].fx = Ifx_Modify; /* read then write */
10812 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10813 d->fxState[0].size = sizeof(ULong);
10814 d->nFxState = 1;
10815
10816 d->mAddr = mkexpr(op2addr);
10817 /* Pretend all double words are written */
10818 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10819 d->mFx = Ifx_Write;
10820
10821 stmt(IRStmt_Dirty(d));
10822
10823 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10824
10825 return "stfle";
10826}
10827
floriana4384a32011-08-11 16:58:45 +000010828static HChar *
10829s390_irgen_CKSM(UChar r1,UChar r2)
10830{
10831 IRTemp addr = newTemp(Ity_I64);
10832 IRTemp op = newTemp(Ity_I32);
10833 IRTemp len = newTemp(Ity_I64);
10834 IRTemp oldval = newTemp(Ity_I32);
10835 IRTemp mask = newTemp(Ity_I32);
10836 IRTemp newop = newTemp(Ity_I32);
10837 IRTemp result = newTemp(Ity_I32);
10838 IRTemp result1 = newTemp(Ity_I32);
10839 IRTemp inc = newTemp(Ity_I64);
10840
10841 assign(oldval, get_gpr_w1(r1));
10842 assign(addr, get_gpr_dw0(r2));
10843 assign(len, get_gpr_dw0(r2+1));
10844
10845 /* Condition code is always zero. */
10846 s390_cc_set(0);
10847
10848 /* If length is zero, there is no need to calculate the checksum */
10849 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10850 guest_IA_next_instr);
10851
10852 /* Assiging the increment variable to adjust address and length
10853 later on. */
10854 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10855 mkexpr(len), mkU64(4)));
10856
10857 /* If length < 4 the final 4-byte 2nd operand value is computed by
10858 appending the remaining bytes to the right with 0. This is done
10859 by AND'ing the 4 bytes loaded from memory with an appropriate
10860 mask. If length >= 4, that mask is simply 0xffffffff. */
10861
10862 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10863 /* Mask computation when len < 4:
10864 0xffffffff << (32 - (len % 4)*8) */
10865 binop(Iop_Shl32, mkU32(0xffffffff),
10866 unop(Iop_32to8,
10867 binop(Iop_Sub32, mkU32(32),
10868 binop(Iop_Shl32,
10869 unop(Iop_64to32,
10870 binop(Iop_And64,
10871 mkexpr(len), mkU64(3))),
10872 mkU8(3))))),
10873 mkU32(0xffffffff)));
10874
10875 assign(op, load(Ity_I32, mkexpr(addr)));
10876 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10877 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10878
10879 /* Checking for carry */
10880 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10881 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10882 mkexpr(result)));
10883
10884 put_gpr_w1(r1, mkexpr(result1));
10885 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10886 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10887
10888 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10889 guest_IA_curr_instr);
10890
10891 return "cksm";
10892}
10893
florian9af37692012-01-15 21:01:16 +000010894static HChar *
10895s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10896{
10897 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10898 src_addr = newTemp(Ity_I64);
10899 des_addr = newTemp(Ity_I64);
10900 tab_addr = newTemp(Ity_I64);
10901 test_byte = newTemp(Ity_I8);
10902 src_len = newTemp(Ity_I64);
10903
10904 assign(src_addr, get_gpr_dw0(r2));
10905 assign(des_addr, get_gpr_dw0(r1));
10906 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010907 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010908 assign(test_byte, get_gpr_b7(0));
10909
10910 IRTemp op = newTemp(Ity_I8);
10911 IRTemp op1 = newTemp(Ity_I8);
10912 IRTemp result = newTemp(Ity_I64);
10913
10914 /* End of source string? We're done; proceed to next insn */
10915 s390_cc_set(0);
10916 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10917 guest_IA_next_instr);
10918
10919 /* Load character from source string, index translation table and
10920 store translated character in op1. */
10921 assign(op, load(Ity_I8, mkexpr(src_addr)));
10922
10923 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10924 mkexpr(tab_addr)));
10925 assign(op1, load(Ity_I8, mkexpr(result)));
10926
10927 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10928 s390_cc_set(1);
10929 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10930 guest_IA_next_instr);
10931 }
10932 store(get_gpr_dw0(r1), mkexpr(op1));
10933
10934 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10935 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10936 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10937
10938 always_goto_and_chase(guest_IA_curr_instr);
10939
10940 return "troo";
10941}
10942
florian730448f2012-02-04 17:07:07 +000010943static HChar *
10944s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10945{
10946 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10947 src_addr = newTemp(Ity_I64);
10948 des_addr = newTemp(Ity_I64);
10949 tab_addr = newTemp(Ity_I64);
10950 test_byte = newTemp(Ity_I8);
10951 src_len = newTemp(Ity_I64);
10952
10953 assign(src_addr, get_gpr_dw0(r2));
10954 assign(des_addr, get_gpr_dw0(r1));
10955 assign(tab_addr, get_gpr_dw0(1));
10956 assign(src_len, get_gpr_dw0(r1+1));
10957 assign(test_byte, get_gpr_b7(0));
10958
10959 IRTemp op = newTemp(Ity_I16);
10960 IRTemp op1 = newTemp(Ity_I8);
10961 IRTemp result = newTemp(Ity_I64);
10962
10963 /* End of source string? We're done; proceed to next insn */
10964 s390_cc_set(0);
10965 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10966 guest_IA_next_instr);
10967
10968 /* Load character from source string, index translation table and
10969 store translated character in op1. */
10970 assign(op, load(Ity_I16, mkexpr(src_addr)));
10971
10972 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10973 mkexpr(tab_addr)));
10974
10975 assign(op1, load(Ity_I8, mkexpr(result)));
10976
10977 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10978 s390_cc_set(1);
10979 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10980 guest_IA_next_instr);
10981 }
10982 store(get_gpr_dw0(r1), mkexpr(op1));
10983
10984 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10985 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10986 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10987
10988 always_goto_and_chase(guest_IA_curr_instr);
10989
10990 return "trto";
10991}
10992
10993static HChar *
10994s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
10995{
10996 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10997 src_addr = newTemp(Ity_I64);
10998 des_addr = newTemp(Ity_I64);
10999 tab_addr = newTemp(Ity_I64);
11000 test_byte = newTemp(Ity_I16);
11001 src_len = newTemp(Ity_I64);
11002
11003 assign(src_addr, get_gpr_dw0(r2));
11004 assign(des_addr, get_gpr_dw0(r1));
11005 assign(tab_addr, get_gpr_dw0(1));
11006 assign(src_len, get_gpr_dw0(r1+1));
11007 assign(test_byte, get_gpr_hw3(0));
11008
11009 IRTemp op = newTemp(Ity_I8);
11010 IRTemp op1 = newTemp(Ity_I16);
11011 IRTemp result = newTemp(Ity_I64);
11012
11013 /* End of source string? We're done; proceed to next insn */
11014 s390_cc_set(0);
11015 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11016 guest_IA_next_instr);
11017
11018 /* Load character from source string, index translation table and
11019 store translated character in op1. */
11020 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
11021
11022 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11023 mkexpr(tab_addr)));
11024 assign(op1, load(Ity_I16, mkexpr(result)));
11025
11026 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11027 s390_cc_set(1);
11028 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11029 guest_IA_next_instr);
11030 }
11031 store(get_gpr_dw0(r1), mkexpr(op1));
11032
11033 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11034 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11035 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11036
11037 always_goto_and_chase(guest_IA_curr_instr);
11038
11039 return "trot";
11040}
11041
11042static HChar *
11043s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11044{
11045 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11046 src_addr = newTemp(Ity_I64);
11047 des_addr = newTemp(Ity_I64);
11048 tab_addr = newTemp(Ity_I64);
11049 test_byte = newTemp(Ity_I16);
11050 src_len = newTemp(Ity_I64);
11051
11052 assign(src_addr, get_gpr_dw0(r2));
11053 assign(des_addr, get_gpr_dw0(r1));
11054 assign(tab_addr, get_gpr_dw0(1));
11055 assign(src_len, get_gpr_dw0(r1+1));
11056 assign(test_byte, get_gpr_hw3(0));
11057
11058 IRTemp op = newTemp(Ity_I16);
11059 IRTemp op1 = newTemp(Ity_I16);
11060 IRTemp result = newTemp(Ity_I64);
11061
11062 /* End of source string? We're done; proceed to next insn */
11063 s390_cc_set(0);
11064 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11065 guest_IA_next_instr);
11066
11067 /* Load character from source string, index translation table and
11068 store translated character in op1. */
11069 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11070
11071 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11072 mkexpr(tab_addr)));
11073 assign(op1, load(Ity_I16, mkexpr(result)));
11074
11075 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11076 s390_cc_set(1);
11077 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11078 guest_IA_next_instr);
11079 }
11080
11081 store(get_gpr_dw0(r1), mkexpr(op1));
11082
11083 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11084 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11085 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11086
11087 always_goto_and_chase(guest_IA_curr_instr);
11088
11089 return "trtt";
11090}
11091
11092static HChar *
11093s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11094{
11095 IRTemp op = newTemp(Ity_I8);
11096 IRTemp op1 = newTemp(Ity_I8);
11097 IRTemp result = newTemp(Ity_I64);
11098 IRTemp counter = newTemp(Ity_I64);
11099
11100 assign(counter, get_counter_dw0());
11101
11102 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
11103
11104 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
11105
11106 assign(op1, load(Ity_I8, mkexpr(result)));
11107 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
11108
11109 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
11110 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
11111 guest_IA_curr_instr);
11112
11113 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +000011114 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011115
11116 return "tr";
11117}
11118
11119static HChar *
11120s390_irgen_TRE(UChar r1,UChar r2)
11121{
11122 IRTemp src_addr, tab_addr, src_len, test_byte;
11123 src_addr = newTemp(Ity_I64);
11124 tab_addr = newTemp(Ity_I64);
11125 src_len = newTemp(Ity_I64);
11126 test_byte = newTemp(Ity_I8);
11127
11128 assign(src_addr, get_gpr_dw0(r1));
11129 assign(src_len, get_gpr_dw0(r1+1));
11130 assign(tab_addr, get_gpr_dw0(r2));
11131 assign(test_byte, get_gpr_b7(0));
11132
11133 IRTemp op = newTemp(Ity_I8);
11134 IRTemp op1 = newTemp(Ity_I8);
11135 IRTemp result = newTemp(Ity_I64);
11136
11137 /* End of source string? We're done; proceed to next insn */
11138 s390_cc_set(0);
11139 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11140 guest_IA_next_instr);
11141
11142 /* Load character from source string and compare with test byte */
11143 assign(op, load(Ity_I8, mkexpr(src_addr)));
11144
11145 s390_cc_set(1);
11146 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11147 guest_IA_next_instr);
11148
11149 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11150 mkexpr(tab_addr)));
11151
11152 assign(op1, load(Ity_I8, mkexpr(result)));
11153
11154 store(get_gpr_dw0(r1), mkexpr(op1));
11155 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11156 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11157
11158 always_goto(mkU64(guest_IA_curr_instr));
11159
11160 return "tre";
11161}
11162
floriana4384a32011-08-11 16:58:45 +000011163
sewardj2019a972011-03-07 16:04:07 +000011164/*------------------------------------------------------------*/
11165/*--- Build IR for special instructions ---*/
11166/*------------------------------------------------------------*/
11167
florianb4df7682011-07-05 02:09:01 +000011168static void
sewardj2019a972011-03-07 16:04:07 +000011169s390_irgen_client_request(void)
11170{
11171 if (0)
11172 vex_printf("%%R3 = client_request ( %%R2 )\n");
11173
florianf9e1ed72012-04-17 02:41:56 +000011174 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11175 + S390_SPECIAL_OP_SIZE;
sewardj2019a972011-03-07 16:04:07 +000011176
florianf9e1ed72012-04-17 02:41:56 +000011177 dis_res->jk_StopHere = Ijk_ClientReq;
sewardj2019a972011-03-07 16:04:07 +000011178 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011179
11180 put_IA(mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011181}
11182
florianb4df7682011-07-05 02:09:01 +000011183static void
sewardj2019a972011-03-07 16:04:07 +000011184s390_irgen_guest_NRADDR(void)
11185{
11186 if (0)
11187 vex_printf("%%R3 = guest_NRADDR\n");
11188
floriane88b3c92011-07-05 02:48:39 +000011189 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011190}
11191
florianb4df7682011-07-05 02:09:01 +000011192static void
sewardj2019a972011-03-07 16:04:07 +000011193s390_irgen_call_noredir(void)
11194{
florianf9e1ed72012-04-17 02:41:56 +000011195 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11196 + S390_SPECIAL_OP_SIZE;
11197
sewardj2019a972011-03-07 16:04:07 +000011198 /* Continue after special op */
florianf9e1ed72012-04-17 02:41:56 +000011199 put_gpr_dw0(14, mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011200
11201 /* The address is in REG1, all parameters are in the right (guest) places */
florianf9e1ed72012-04-17 02:41:56 +000011202 put_IA(get_gpr_dw0(1));
sewardj2019a972011-03-07 16:04:07 +000011203
11204 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011205 dis_res->jk_StopHere = Ijk_NoRedir;
sewardj2019a972011-03-07 16:04:07 +000011206}
11207
11208/* Force proper alignment for the structures below. */
11209#pragma pack(1)
11210
11211
11212static s390_decode_t
11213s390_decode_2byte_and_irgen(UChar *bytes)
11214{
11215 typedef union {
11216 struct {
11217 unsigned int op : 16;
11218 } E;
11219 struct {
11220 unsigned int op : 8;
11221 unsigned int i : 8;
11222 } I;
11223 struct {
11224 unsigned int op : 8;
11225 unsigned int r1 : 4;
11226 unsigned int r2 : 4;
11227 } RR;
11228 } formats;
11229 union {
11230 formats fmt;
11231 UShort value;
11232 } ovl;
11233
11234 vassert(sizeof(formats) == 2);
11235
11236 ((char *)(&ovl.value))[0] = bytes[0];
11237 ((char *)(&ovl.value))[1] = bytes[1];
11238
11239 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000011240 case 0x0000: /* invalid opcode */
11241 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011242 case 0x0101: /* PR */ goto unimplemented;
11243 case 0x0102: /* UPT */ goto unimplemented;
11244 case 0x0104: /* PTFF */ goto unimplemented;
11245 case 0x0107: /* SCKPF */ goto unimplemented;
11246 case 0x010a: /* PFPO */ goto unimplemented;
11247 case 0x010b: /* TAM */ goto unimplemented;
11248 case 0x010c: /* SAM24 */ goto unimplemented;
11249 case 0x010d: /* SAM31 */ goto unimplemented;
11250 case 0x010e: /* SAM64 */ goto unimplemented;
11251 case 0x01ff: /* TRAP2 */ goto unimplemented;
11252 }
11253
11254 switch ((ovl.value & 0xff00) >> 8) {
11255 case 0x04: /* SPM */ goto unimplemented;
11256 case 0x05: /* BALR */ goto unimplemented;
11257 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11258 goto ok;
11259 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11260 goto ok;
11261 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11262 case 0x0b: /* BSM */ goto unimplemented;
11263 case 0x0c: /* BASSM */ goto unimplemented;
11264 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11265 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011266 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11267 goto ok;
11268 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11269 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011270 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11271 goto ok;
11272 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11273 goto ok;
11274 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11275 goto ok;
11276 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11277 goto ok;
11278 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11279 goto ok;
11280 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11281 goto ok;
11282 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11283 goto ok;
11284 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11285 goto ok;
11286 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11287 goto ok;
11288 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11289 goto ok;
11290 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11291 goto ok;
11292 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11293 goto ok;
11294 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11295 goto ok;
11296 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11297 goto ok;
11298 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11299 goto ok;
11300 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11301 goto ok;
11302 case 0x20: /* LPDR */ goto unimplemented;
11303 case 0x21: /* LNDR */ goto unimplemented;
11304 case 0x22: /* LTDR */ goto unimplemented;
11305 case 0x23: /* LCDR */ goto unimplemented;
11306 case 0x24: /* HDR */ goto unimplemented;
11307 case 0x25: /* LDXR */ goto unimplemented;
11308 case 0x26: /* MXR */ goto unimplemented;
11309 case 0x27: /* MXDR */ goto unimplemented;
11310 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11311 goto ok;
11312 case 0x29: /* CDR */ goto unimplemented;
11313 case 0x2a: /* ADR */ goto unimplemented;
11314 case 0x2b: /* SDR */ goto unimplemented;
11315 case 0x2c: /* MDR */ goto unimplemented;
11316 case 0x2d: /* DDR */ goto unimplemented;
11317 case 0x2e: /* AWR */ goto unimplemented;
11318 case 0x2f: /* SWR */ goto unimplemented;
11319 case 0x30: /* LPER */ goto unimplemented;
11320 case 0x31: /* LNER */ goto unimplemented;
11321 case 0x32: /* LTER */ goto unimplemented;
11322 case 0x33: /* LCER */ goto unimplemented;
11323 case 0x34: /* HER */ goto unimplemented;
11324 case 0x35: /* LEDR */ goto unimplemented;
11325 case 0x36: /* AXR */ goto unimplemented;
11326 case 0x37: /* SXR */ goto unimplemented;
11327 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11328 goto ok;
11329 case 0x39: /* CER */ goto unimplemented;
11330 case 0x3a: /* AER */ goto unimplemented;
11331 case 0x3b: /* SER */ goto unimplemented;
11332 case 0x3c: /* MDER */ goto unimplemented;
11333 case 0x3d: /* DER */ goto unimplemented;
11334 case 0x3e: /* AUR */ goto unimplemented;
11335 case 0x3f: /* SUR */ goto unimplemented;
11336 }
11337
11338 return S390_DECODE_UNKNOWN_INSN;
11339
11340ok:
11341 return S390_DECODE_OK;
11342
11343unimplemented:
11344 return S390_DECODE_UNIMPLEMENTED_INSN;
11345}
11346
11347static s390_decode_t
11348s390_decode_4byte_and_irgen(UChar *bytes)
11349{
11350 typedef union {
11351 struct {
11352 unsigned int op1 : 8;
11353 unsigned int r1 : 4;
11354 unsigned int op2 : 4;
11355 unsigned int i2 : 16;
11356 } RI;
11357 struct {
11358 unsigned int op : 16;
11359 unsigned int : 8;
11360 unsigned int r1 : 4;
11361 unsigned int r2 : 4;
11362 } RRE;
11363 struct {
11364 unsigned int op : 16;
11365 unsigned int r1 : 4;
11366 unsigned int : 4;
11367 unsigned int r3 : 4;
11368 unsigned int r2 : 4;
11369 } RRF;
11370 struct {
11371 unsigned int op : 16;
11372 unsigned int r3 : 4;
11373 unsigned int m4 : 4;
11374 unsigned int r1 : 4;
11375 unsigned int r2 : 4;
11376 } RRF2;
11377 struct {
11378 unsigned int op : 16;
11379 unsigned int r3 : 4;
11380 unsigned int : 4;
11381 unsigned int r1 : 4;
11382 unsigned int r2 : 4;
11383 } RRF3;
11384 struct {
11385 unsigned int op : 16;
11386 unsigned int r3 : 4;
11387 unsigned int : 4;
11388 unsigned int r1 : 4;
11389 unsigned int r2 : 4;
11390 } RRR;
11391 struct {
11392 unsigned int op : 16;
11393 unsigned int r3 : 4;
11394 unsigned int : 4;
11395 unsigned int r1 : 4;
11396 unsigned int r2 : 4;
11397 } RRF4;
11398 struct {
11399 unsigned int op : 8;
11400 unsigned int r1 : 4;
11401 unsigned int r3 : 4;
11402 unsigned int b2 : 4;
11403 unsigned int d2 : 12;
11404 } RS;
11405 struct {
11406 unsigned int op : 8;
11407 unsigned int r1 : 4;
11408 unsigned int r3 : 4;
11409 unsigned int i2 : 16;
11410 } RSI;
11411 struct {
11412 unsigned int op : 8;
11413 unsigned int r1 : 4;
11414 unsigned int x2 : 4;
11415 unsigned int b2 : 4;
11416 unsigned int d2 : 12;
11417 } RX;
11418 struct {
11419 unsigned int op : 16;
11420 unsigned int b2 : 4;
11421 unsigned int d2 : 12;
11422 } S;
11423 struct {
11424 unsigned int op : 8;
11425 unsigned int i2 : 8;
11426 unsigned int b1 : 4;
11427 unsigned int d1 : 12;
11428 } SI;
11429 } formats;
11430 union {
11431 formats fmt;
11432 UInt value;
11433 } ovl;
11434
11435 vassert(sizeof(formats) == 4);
11436
11437 ((char *)(&ovl.value))[0] = bytes[0];
11438 ((char *)(&ovl.value))[1] = bytes[1];
11439 ((char *)(&ovl.value))[2] = bytes[2];
11440 ((char *)(&ovl.value))[3] = bytes[3];
11441
11442 switch ((ovl.value & 0xff0f0000) >> 16) {
11443 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11444 ovl.fmt.RI.i2); goto ok;
11445 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11446 ovl.fmt.RI.i2); goto ok;
11447 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11448 ovl.fmt.RI.i2); goto ok;
11449 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11450 ovl.fmt.RI.i2); goto ok;
11451 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11452 ovl.fmt.RI.i2); goto ok;
11453 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11454 ovl.fmt.RI.i2); goto ok;
11455 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11456 ovl.fmt.RI.i2); goto ok;
11457 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11458 ovl.fmt.RI.i2); goto ok;
11459 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11460 ovl.fmt.RI.i2); goto ok;
11461 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11462 ovl.fmt.RI.i2); goto ok;
11463 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11464 ovl.fmt.RI.i2); goto ok;
11465 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11466 ovl.fmt.RI.i2); goto ok;
11467 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11468 ovl.fmt.RI.i2); goto ok;
11469 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11470 ovl.fmt.RI.i2); goto ok;
11471 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11472 ovl.fmt.RI.i2); goto ok;
11473 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11474 ovl.fmt.RI.i2); goto ok;
11475 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11476 ovl.fmt.RI.i2); goto ok;
11477 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11478 ovl.fmt.RI.i2); goto ok;
11479 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11480 ovl.fmt.RI.i2); goto ok;
11481 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11482 ovl.fmt.RI.i2); goto ok;
11483 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11484 goto ok;
11485 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11486 ovl.fmt.RI.i2); goto ok;
11487 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11488 ovl.fmt.RI.i2); goto ok;
11489 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11490 ovl.fmt.RI.i2); goto ok;
11491 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11492 goto ok;
11493 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11494 ovl.fmt.RI.i2); goto ok;
11495 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11496 goto ok;
11497 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11498 ovl.fmt.RI.i2); goto ok;
11499 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11500 goto ok;
11501 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11502 ovl.fmt.RI.i2); goto ok;
11503 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11504 goto ok;
11505 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11506 ovl.fmt.RI.i2); goto ok;
11507 }
11508
11509 switch ((ovl.value & 0xffff0000) >> 16) {
11510 case 0x8000: /* SSM */ goto unimplemented;
11511 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011512 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011513 case 0xb202: /* STIDP */ goto unimplemented;
11514 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011515 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11516 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011517 case 0xb206: /* SCKC */ goto unimplemented;
11518 case 0xb207: /* STCKC */ goto unimplemented;
11519 case 0xb208: /* SPT */ goto unimplemented;
11520 case 0xb209: /* STPT */ goto unimplemented;
11521 case 0xb20a: /* SPKA */ goto unimplemented;
11522 case 0xb20b: /* IPK */ goto unimplemented;
11523 case 0xb20d: /* PTLB */ goto unimplemented;
11524 case 0xb210: /* SPX */ goto unimplemented;
11525 case 0xb211: /* STPX */ goto unimplemented;
11526 case 0xb212: /* STAP */ goto unimplemented;
11527 case 0xb214: /* SIE */ goto unimplemented;
11528 case 0xb218: /* PC */ goto unimplemented;
11529 case 0xb219: /* SAC */ goto unimplemented;
11530 case 0xb21a: /* CFC */ goto unimplemented;
11531 case 0xb221: /* IPTE */ goto unimplemented;
11532 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11533 case 0xb223: /* IVSK */ goto unimplemented;
11534 case 0xb224: /* IAC */ goto unimplemented;
11535 case 0xb225: /* SSAR */ goto unimplemented;
11536 case 0xb226: /* EPAR */ goto unimplemented;
11537 case 0xb227: /* ESAR */ goto unimplemented;
11538 case 0xb228: /* PT */ goto unimplemented;
11539 case 0xb229: /* ISKE */ goto unimplemented;
11540 case 0xb22a: /* RRBE */ goto unimplemented;
11541 case 0xb22b: /* SSKE */ goto unimplemented;
11542 case 0xb22c: /* TB */ goto unimplemented;
11543 case 0xb22d: /* DXR */ goto unimplemented;
11544 case 0xb22e: /* PGIN */ goto unimplemented;
11545 case 0xb22f: /* PGOUT */ goto unimplemented;
11546 case 0xb230: /* CSCH */ goto unimplemented;
11547 case 0xb231: /* HSCH */ goto unimplemented;
11548 case 0xb232: /* MSCH */ goto unimplemented;
11549 case 0xb233: /* SSCH */ goto unimplemented;
11550 case 0xb234: /* STSCH */ goto unimplemented;
11551 case 0xb235: /* TSCH */ goto unimplemented;
11552 case 0xb236: /* TPI */ goto unimplemented;
11553 case 0xb237: /* SAL */ goto unimplemented;
11554 case 0xb238: /* RSCH */ goto unimplemented;
11555 case 0xb239: /* STCRW */ goto unimplemented;
11556 case 0xb23a: /* STCPS */ goto unimplemented;
11557 case 0xb23b: /* RCHP */ goto unimplemented;
11558 case 0xb23c: /* SCHM */ goto unimplemented;
11559 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011560 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11561 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011562 case 0xb244: /* SQDR */ goto unimplemented;
11563 case 0xb245: /* SQER */ goto unimplemented;
11564 case 0xb246: /* STURA */ goto unimplemented;
11565 case 0xb247: /* MSTA */ goto unimplemented;
11566 case 0xb248: /* PALB */ goto unimplemented;
11567 case 0xb249: /* EREG */ goto unimplemented;
11568 case 0xb24a: /* ESTA */ goto unimplemented;
11569 case 0xb24b: /* LURA */ goto unimplemented;
11570 case 0xb24c: /* TAR */ goto unimplemented;
11571 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11572 ovl.fmt.RRE.r2); goto ok;
11573 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11574 goto ok;
11575 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11576 goto ok;
11577 case 0xb250: /* CSP */ goto unimplemented;
11578 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11579 ovl.fmt.RRE.r2); goto ok;
11580 case 0xb254: /* MVPG */ goto unimplemented;
11581 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11582 ovl.fmt.RRE.r2); goto ok;
11583 case 0xb257: /* CUSE */ goto unimplemented;
11584 case 0xb258: /* BSG */ goto unimplemented;
11585 case 0xb25a: /* BSA */ goto unimplemented;
11586 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11587 ovl.fmt.RRE.r2); goto ok;
11588 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11589 ovl.fmt.RRE.r2); goto ok;
11590 case 0xb263: /* CMPSC */ goto unimplemented;
11591 case 0xb274: /* SIGA */ goto unimplemented;
11592 case 0xb276: /* XSCH */ goto unimplemented;
11593 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011594 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011595 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011596 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011597 case 0xb27d: /* STSI */ goto unimplemented;
11598 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11599 goto ok;
11600 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11601 goto ok;
11602 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11603 goto ok;
florian730448f2012-02-04 17:07:07 +000011604 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011605 case 0xb2a6: /* CU21 */ goto unimplemented;
11606 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011607 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11608 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011609 case 0xb2b1: /* STFL */ goto unimplemented;
11610 case 0xb2b2: /* LPSWE */ goto unimplemented;
11611 case 0xb2b8: /* SRNMB */ goto unimplemented;
11612 case 0xb2b9: /* SRNMT */ goto unimplemented;
11613 case 0xb2bd: /* LFAS */ goto unimplemented;
11614 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11615 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11616 ovl.fmt.RRE.r2); goto ok;
11617 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11618 ovl.fmt.RRE.r2); goto ok;
11619 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11620 ovl.fmt.RRE.r2); goto ok;
11621 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11622 ovl.fmt.RRE.r2); goto ok;
11623 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11624 ovl.fmt.RRE.r2); goto ok;
11625 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11626 ovl.fmt.RRE.r2); goto ok;
11627 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11628 ovl.fmt.RRE.r2); goto ok;
11629 case 0xb307: /* MXDBR */ goto unimplemented;
11630 case 0xb308: /* KEBR */ goto unimplemented;
11631 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11632 ovl.fmt.RRE.r2); goto ok;
11633 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11634 ovl.fmt.RRE.r2); goto ok;
11635 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11636 ovl.fmt.RRE.r2); goto ok;
11637 case 0xb30c: /* MDEBR */ goto unimplemented;
11638 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11639 ovl.fmt.RRE.r2); goto ok;
11640 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11641 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11642 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11643 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11644 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11645 ovl.fmt.RRE.r2); goto ok;
11646 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11647 ovl.fmt.RRE.r2); goto ok;
11648 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11649 ovl.fmt.RRE.r2); goto ok;
11650 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11651 ovl.fmt.RRE.r2); goto ok;
11652 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11653 ovl.fmt.RRE.r2); goto ok;
11654 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11659 ovl.fmt.RRE.r2); goto ok;
11660 case 0xb318: /* KDBR */ goto unimplemented;
11661 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11662 ovl.fmt.RRE.r2); goto ok;
11663 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11664 ovl.fmt.RRE.r2); goto ok;
11665 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11666 ovl.fmt.RRE.r2); goto ok;
11667 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11668 ovl.fmt.RRE.r2); goto ok;
11669 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11670 ovl.fmt.RRE.r2); goto ok;
11671 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11672 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11673 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11674 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11675 case 0xb324: /* LDER */ goto unimplemented;
11676 case 0xb325: /* LXDR */ goto unimplemented;
11677 case 0xb326: /* LXER */ goto unimplemented;
11678 case 0xb32e: /* MAER */ goto unimplemented;
11679 case 0xb32f: /* MSER */ goto unimplemented;
11680 case 0xb336: /* SQXR */ goto unimplemented;
11681 case 0xb337: /* MEER */ goto unimplemented;
11682 case 0xb338: /* MAYLR */ goto unimplemented;
11683 case 0xb339: /* MYLR */ goto unimplemented;
11684 case 0xb33a: /* MAYR */ goto unimplemented;
11685 case 0xb33b: /* MYR */ goto unimplemented;
11686 case 0xb33c: /* MAYHR */ goto unimplemented;
11687 case 0xb33d: /* MYHR */ goto unimplemented;
11688 case 0xb33e: /* MADR */ goto unimplemented;
11689 case 0xb33f: /* MSDR */ goto unimplemented;
11690 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11691 ovl.fmt.RRE.r2); goto ok;
11692 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11693 ovl.fmt.RRE.r2); goto ok;
11694 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11695 ovl.fmt.RRE.r2); goto ok;
11696 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11697 ovl.fmt.RRE.r2); goto ok;
11698 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11699 ovl.fmt.RRE.r2); goto ok;
11700 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11701 ovl.fmt.RRE.r2); goto ok;
11702 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11703 ovl.fmt.RRE.r2); goto ok;
11704 case 0xb347: /* FIXBR */ goto unimplemented;
11705 case 0xb348: /* KXBR */ goto unimplemented;
11706 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11707 ovl.fmt.RRE.r2); goto ok;
11708 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11709 ovl.fmt.RRE.r2); goto ok;
11710 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11711 ovl.fmt.RRE.r2); goto ok;
11712 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11713 ovl.fmt.RRE.r2); goto ok;
11714 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11715 ovl.fmt.RRE.r2); goto ok;
11716 case 0xb350: /* TBEDR */ goto unimplemented;
11717 case 0xb351: /* TBDR */ goto unimplemented;
11718 case 0xb353: /* DIEBR */ goto unimplemented;
11719 case 0xb357: /* FIEBR */ goto unimplemented;
11720 case 0xb358: /* THDER */ goto unimplemented;
11721 case 0xb359: /* THDR */ goto unimplemented;
11722 case 0xb35b: /* DIDBR */ goto unimplemented;
11723 case 0xb35f: /* FIDBR */ goto unimplemented;
11724 case 0xb360: /* LPXR */ goto unimplemented;
11725 case 0xb361: /* LNXR */ goto unimplemented;
11726 case 0xb362: /* LTXR */ goto unimplemented;
11727 case 0xb363: /* LCXR */ goto unimplemented;
11728 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11729 ovl.fmt.RRE.r2); goto ok;
11730 case 0xb366: /* LEXR */ goto unimplemented;
11731 case 0xb367: /* FIXR */ goto unimplemented;
11732 case 0xb369: /* CXR */ goto unimplemented;
11733 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11734 ovl.fmt.RRE.r2); goto ok;
11735 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11736 ovl.fmt.RRE.r2); goto ok;
11737 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11738 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11739 goto ok;
11740 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11741 ovl.fmt.RRE.r2); goto ok;
11742 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11743 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11744 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11745 case 0xb377: /* FIER */ goto unimplemented;
11746 case 0xb37f: /* FIDR */ goto unimplemented;
11747 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11748 case 0xb385: /* SFASR */ goto unimplemented;
11749 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11750 case 0xb390: /* CELFBR */ goto unimplemented;
11751 case 0xb391: /* CDLFBR */ goto unimplemented;
11752 case 0xb392: /* CXLFBR */ goto unimplemented;
11753 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11754 ovl.fmt.RRE.r2); goto ok;
11755 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11756 ovl.fmt.RRE.r2); goto ok;
11757 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11758 ovl.fmt.RRE.r2); goto ok;
11759 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11760 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11761 goto ok;
11762 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11763 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11764 goto ok;
11765 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11766 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11767 goto ok;
11768 case 0xb3a0: /* CELGBR */ goto unimplemented;
11769 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11770 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11771 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11772 ovl.fmt.RRE.r2); goto ok;
11773 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11774 ovl.fmt.RRE.r2); goto ok;
11775 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11776 ovl.fmt.RRE.r2); goto ok;
11777 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11778 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11779 goto ok;
11780 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11781 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11782 goto ok;
11783 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11784 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11785 goto ok;
11786 case 0xb3b4: /* CEFR */ goto unimplemented;
11787 case 0xb3b5: /* CDFR */ goto unimplemented;
11788 case 0xb3b6: /* CXFR */ goto unimplemented;
11789 case 0xb3b8: /* CFER */ goto unimplemented;
11790 case 0xb3b9: /* CFDR */ goto unimplemented;
11791 case 0xb3ba: /* CFXR */ goto unimplemented;
11792 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11793 ovl.fmt.RRE.r2); goto ok;
11794 case 0xb3c4: /* CEGR */ goto unimplemented;
11795 case 0xb3c5: /* CDGR */ goto unimplemented;
11796 case 0xb3c6: /* CXGR */ goto unimplemented;
11797 case 0xb3c8: /* CGER */ goto unimplemented;
11798 case 0xb3c9: /* CGDR */ goto unimplemented;
11799 case 0xb3ca: /* CGXR */ goto unimplemented;
11800 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11801 ovl.fmt.RRE.r2); goto ok;
11802 case 0xb3d0: /* MDTR */ goto unimplemented;
11803 case 0xb3d1: /* DDTR */ goto unimplemented;
11804 case 0xb3d2: /* ADTR */ goto unimplemented;
11805 case 0xb3d3: /* SDTR */ goto unimplemented;
11806 case 0xb3d4: /* LDETR */ goto unimplemented;
11807 case 0xb3d5: /* LEDTR */ goto unimplemented;
11808 case 0xb3d6: /* LTDTR */ goto unimplemented;
11809 case 0xb3d7: /* FIDTR */ goto unimplemented;
11810 case 0xb3d8: /* MXTR */ goto unimplemented;
11811 case 0xb3d9: /* DXTR */ goto unimplemented;
11812 case 0xb3da: /* AXTR */ goto unimplemented;
11813 case 0xb3db: /* SXTR */ goto unimplemented;
11814 case 0xb3dc: /* LXDTR */ goto unimplemented;
11815 case 0xb3dd: /* LDXTR */ goto unimplemented;
11816 case 0xb3de: /* LTXTR */ goto unimplemented;
11817 case 0xb3df: /* FIXTR */ goto unimplemented;
11818 case 0xb3e0: /* KDTR */ goto unimplemented;
11819 case 0xb3e1: /* CGDTR */ goto unimplemented;
11820 case 0xb3e2: /* CUDTR */ goto unimplemented;
11821 case 0xb3e3: /* CSDTR */ goto unimplemented;
11822 case 0xb3e4: /* CDTR */ goto unimplemented;
11823 case 0xb3e5: /* EEDTR */ goto unimplemented;
11824 case 0xb3e7: /* ESDTR */ goto unimplemented;
11825 case 0xb3e8: /* KXTR */ goto unimplemented;
11826 case 0xb3e9: /* CGXTR */ goto unimplemented;
11827 case 0xb3ea: /* CUXTR */ goto unimplemented;
11828 case 0xb3eb: /* CSXTR */ goto unimplemented;
11829 case 0xb3ec: /* CXTR */ goto unimplemented;
11830 case 0xb3ed: /* EEXTR */ goto unimplemented;
11831 case 0xb3ef: /* ESXTR */ goto unimplemented;
11832 case 0xb3f1: /* CDGTR */ goto unimplemented;
11833 case 0xb3f2: /* CDUTR */ goto unimplemented;
11834 case 0xb3f3: /* CDSTR */ goto unimplemented;
11835 case 0xb3f4: /* CEDTR */ goto unimplemented;
11836 case 0xb3f5: /* QADTR */ goto unimplemented;
11837 case 0xb3f6: /* IEDTR */ goto unimplemented;
11838 case 0xb3f7: /* RRDTR */ goto unimplemented;
11839 case 0xb3f9: /* CXGTR */ goto unimplemented;
11840 case 0xb3fa: /* CXUTR */ goto unimplemented;
11841 case 0xb3fb: /* CXSTR */ goto unimplemented;
11842 case 0xb3fc: /* CEXTR */ goto unimplemented;
11843 case 0xb3fd: /* QAXTR */ goto unimplemented;
11844 case 0xb3fe: /* IEXTR */ goto unimplemented;
11845 case 0xb3ff: /* RRXTR */ goto unimplemented;
11846 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11847 ovl.fmt.RRE.r2); goto ok;
11848 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11849 ovl.fmt.RRE.r2); goto ok;
11850 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11851 ovl.fmt.RRE.r2); goto ok;
11852 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11853 ovl.fmt.RRE.r2); goto ok;
11854 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11855 ovl.fmt.RRE.r2); goto ok;
11856 case 0xb905: /* LURAG */ goto unimplemented;
11857 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11858 ovl.fmt.RRE.r2); goto ok;
11859 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11860 ovl.fmt.RRE.r2); goto ok;
11861 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11862 ovl.fmt.RRE.r2); goto ok;
11863 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11864 ovl.fmt.RRE.r2); goto ok;
11865 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11866 ovl.fmt.RRE.r2); goto ok;
11867 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11868 ovl.fmt.RRE.r2); goto ok;
11869 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11870 ovl.fmt.RRE.r2); goto ok;
11871 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11872 ovl.fmt.RRE.r2); goto ok;
11873 case 0xb90e: /* EREGG */ goto unimplemented;
11874 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11875 ovl.fmt.RRE.r2); goto ok;
11876 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11877 ovl.fmt.RRE.r2); goto ok;
11878 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11879 ovl.fmt.RRE.r2); goto ok;
11880 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11881 ovl.fmt.RRE.r2); goto ok;
11882 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11883 ovl.fmt.RRE.r2); goto ok;
11884 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11885 ovl.fmt.RRE.r2); goto ok;
11886 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11887 ovl.fmt.RRE.r2); goto ok;
11888 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11889 ovl.fmt.RRE.r2); goto ok;
11890 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11891 ovl.fmt.RRE.r2); goto ok;
11892 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11893 ovl.fmt.RRE.r2); goto ok;
11894 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11895 ovl.fmt.RRE.r2); goto ok;
11896 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11897 ovl.fmt.RRE.r2); goto ok;
11898 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11899 ovl.fmt.RRE.r2); goto ok;
11900 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11901 ovl.fmt.RRE.r2); goto ok;
11902 case 0xb91e: /* KMAC */ goto unimplemented;
11903 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11904 ovl.fmt.RRE.r2); goto ok;
11905 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11906 ovl.fmt.RRE.r2); goto ok;
11907 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11908 ovl.fmt.RRE.r2); goto ok;
11909 case 0xb925: /* STURG */ goto unimplemented;
11910 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11911 ovl.fmt.RRE.r2); goto ok;
11912 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11913 ovl.fmt.RRE.r2); goto ok;
11914 case 0xb928: /* PCKMO */ goto unimplemented;
11915 case 0xb92b: /* KMO */ goto unimplemented;
11916 case 0xb92c: /* PCC */ goto unimplemented;
11917 case 0xb92d: /* KMCTR */ goto unimplemented;
11918 case 0xb92e: /* KM */ goto unimplemented;
11919 case 0xb92f: /* KMC */ goto unimplemented;
11920 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11921 ovl.fmt.RRE.r2); goto ok;
11922 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11923 ovl.fmt.RRE.r2); goto ok;
11924 case 0xb93e: /* KIMD */ goto unimplemented;
11925 case 0xb93f: /* KLMD */ goto unimplemented;
11926 case 0xb941: /* CFDTR */ goto unimplemented;
11927 case 0xb942: /* CLGDTR */ goto unimplemented;
11928 case 0xb943: /* CLFDTR */ goto unimplemented;
11929 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11930 ovl.fmt.RRE.r2); goto ok;
11931 case 0xb949: /* CFXTR */ goto unimplemented;
11932 case 0xb94a: /* CLGXTR */ goto unimplemented;
11933 case 0xb94b: /* CLFXTR */ goto unimplemented;
11934 case 0xb951: /* CDFTR */ goto unimplemented;
11935 case 0xb952: /* CDLGTR */ goto unimplemented;
11936 case 0xb953: /* CDLFTR */ goto unimplemented;
11937 case 0xb959: /* CXFTR */ goto unimplemented;
11938 case 0xb95a: /* CXLGTR */ goto unimplemented;
11939 case 0xb95b: /* CXLFTR */ goto unimplemented;
11940 case 0xb960: /* CGRT */ goto unimplemented;
11941 case 0xb961: /* CLGRT */ goto unimplemented;
11942 case 0xb972: /* CRT */ goto unimplemented;
11943 case 0xb973: /* CLRT */ goto unimplemented;
11944 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11945 ovl.fmt.RRE.r2); goto ok;
11946 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11947 ovl.fmt.RRE.r2); goto ok;
11948 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11949 ovl.fmt.RRE.r2); goto ok;
11950 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11951 ovl.fmt.RRE.r2); goto ok;
11952 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11953 ovl.fmt.RRE.r2); goto ok;
11954 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11955 ovl.fmt.RRE.r2); goto ok;
11956 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11957 ovl.fmt.RRE.r2); goto ok;
11958 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11959 ovl.fmt.RRE.r2); goto ok;
11960 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11961 ovl.fmt.RRE.r2); goto ok;
11962 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11963 ovl.fmt.RRE.r2); goto ok;
11964 case 0xb98a: /* CSPG */ goto unimplemented;
11965 case 0xb98d: /* EPSW */ goto unimplemented;
11966 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000011967 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
11968 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11969 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
11970 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11971 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
11972 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000011973 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11974 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011975 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11976 ovl.fmt.RRE.r2); goto ok;
11977 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11978 ovl.fmt.RRE.r2); goto ok;
11979 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11980 ovl.fmt.RRE.r2); goto ok;
11981 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11982 ovl.fmt.RRE.r2); goto ok;
11983 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11984 ovl.fmt.RRE.r2); goto ok;
11985 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11986 ovl.fmt.RRE.r2); goto ok;
11987 case 0xb99a: /* EPAIR */ goto unimplemented;
11988 case 0xb99b: /* ESAIR */ goto unimplemented;
11989 case 0xb99d: /* ESEA */ goto unimplemented;
11990 case 0xb99e: /* PTI */ goto unimplemented;
11991 case 0xb99f: /* SSAIR */ goto unimplemented;
11992 case 0xb9a2: /* PTF */ goto unimplemented;
11993 case 0xb9aa: /* LPTEA */ goto unimplemented;
11994 case 0xb9ae: /* RRBM */ goto unimplemented;
11995 case 0xb9af: /* PFMF */ goto unimplemented;
11996 case 0xb9b0: /* CU14 */ goto unimplemented;
11997 case 0xb9b1: /* CU24 */ goto unimplemented;
11998 case 0xb9b2: /* CU41 */ goto unimplemented;
11999 case 0xb9b3: /* CU42 */ goto unimplemented;
12000 case 0xb9bd: /* TRTRE */ goto unimplemented;
12001 case 0xb9be: /* SRSTU */ goto unimplemented;
12002 case 0xb9bf: /* TRTE */ goto unimplemented;
12003 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
12004 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12005 goto ok;
12006 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
12007 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12008 goto ok;
12009 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
12010 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12011 goto ok;
12012 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
12013 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12014 goto ok;
12015 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
12016 ovl.fmt.RRE.r2); goto ok;
12017 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
12018 ovl.fmt.RRE.r2); goto ok;
12019 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
12020 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12021 goto ok;
12022 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
12023 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12024 goto ok;
12025 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
12026 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12027 goto ok;
12028 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
12029 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12030 goto ok;
12031 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
12032 ovl.fmt.RRE.r2); goto ok;
12033 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
12034 ovl.fmt.RRE.r2); goto ok;
12035 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000012036 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
12037 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12038 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012039 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
12040 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12041 goto ok;
12042 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
12043 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12044 goto ok;
12045 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12046 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12047 goto ok;
12048 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12049 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12050 goto ok;
12051 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12052 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12053 goto ok;
12054 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12055 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12056 goto ok;
12057 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12058 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12059 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012060 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12061 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12062 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012063 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12064 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12065 goto ok;
12066 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12067 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12068 goto ok;
12069 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12070 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12071 goto ok;
12072 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12073 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12074 goto ok;
12075 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12076 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12077 goto ok;
12078 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12079 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12080 goto ok;
12081 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12082 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12083 goto ok;
12084 }
12085
12086 switch ((ovl.value & 0xff000000) >> 24) {
12087 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12088 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12089 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12090 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12091 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12092 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12093 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12094 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12095 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12096 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12097 case 0x45: /* BAL */ goto unimplemented;
12098 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12099 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12100 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12101 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12102 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12103 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12104 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12105 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12106 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12107 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12108 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12109 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12110 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12111 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12112 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12113 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12114 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12115 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12116 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12117 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12118 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12119 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12120 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12121 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12122 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12123 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12124 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12125 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12126 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12127 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12128 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12129 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12130 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12131 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12132 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12133 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12134 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12135 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12136 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12137 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12138 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12139 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12140 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12141 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12142 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12143 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12144 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12145 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12146 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12147 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12148 case 0x67: /* MXD */ goto unimplemented;
12149 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12150 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12151 case 0x69: /* CD */ goto unimplemented;
12152 case 0x6a: /* AD */ goto unimplemented;
12153 case 0x6b: /* SD */ goto unimplemented;
12154 case 0x6c: /* MD */ goto unimplemented;
12155 case 0x6d: /* DD */ goto unimplemented;
12156 case 0x6e: /* AW */ goto unimplemented;
12157 case 0x6f: /* SW */ goto unimplemented;
12158 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12159 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12160 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12161 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12162 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12163 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12164 case 0x79: /* CE */ goto unimplemented;
12165 case 0x7a: /* AE */ goto unimplemented;
12166 case 0x7b: /* SE */ goto unimplemented;
12167 case 0x7c: /* MDE */ goto unimplemented;
12168 case 0x7d: /* DE */ goto unimplemented;
12169 case 0x7e: /* AU */ goto unimplemented;
12170 case 0x7f: /* SU */ goto unimplemented;
12171 case 0x83: /* DIAG */ goto unimplemented;
12172 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12173 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12174 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12175 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12176 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12177 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12178 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12179 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12180 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12181 ovl.fmt.RS.d2); goto ok;
12182 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12183 ovl.fmt.RS.d2); goto ok;
12184 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12185 ovl.fmt.RS.d2); goto ok;
12186 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12187 ovl.fmt.RS.d2); goto ok;
12188 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12189 ovl.fmt.RS.d2); goto ok;
12190 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12191 ovl.fmt.RS.d2); goto ok;
12192 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12193 ovl.fmt.RS.d2); goto ok;
12194 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12195 ovl.fmt.RS.d2); goto ok;
12196 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12197 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12198 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12199 ovl.fmt.SI.d1); goto ok;
12200 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12201 ovl.fmt.SI.d1); goto ok;
12202 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12203 ovl.fmt.SI.d1); goto ok;
12204 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12205 ovl.fmt.SI.d1); goto ok;
12206 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12207 ovl.fmt.SI.d1); goto ok;
12208 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12209 ovl.fmt.SI.d1); goto ok;
12210 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12211 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12212 case 0x99: /* TRACE */ goto unimplemented;
12213 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12214 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12215 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12216 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12217 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12218 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12219 goto ok;
12220 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12221 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12222 goto ok;
12223 case 0xac: /* STNSM */ goto unimplemented;
12224 case 0xad: /* STOSM */ goto unimplemented;
12225 case 0xae: /* SIGP */ goto unimplemented;
12226 case 0xaf: /* MC */ goto unimplemented;
12227 case 0xb1: /* LRA */ goto unimplemented;
12228 case 0xb6: /* STCTL */ goto unimplemented;
12229 case 0xb7: /* LCTL */ goto unimplemented;
12230 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12231 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12232 case 0xbb: /* CDS */ goto unimplemented;
12233 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12234 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12235 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12236 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12237 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12238 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12239 }
12240
12241 return S390_DECODE_UNKNOWN_INSN;
12242
12243ok:
12244 return S390_DECODE_OK;
12245
12246unimplemented:
12247 return S390_DECODE_UNIMPLEMENTED_INSN;
12248}
12249
12250static s390_decode_t
12251s390_decode_6byte_and_irgen(UChar *bytes)
12252{
12253 typedef union {
12254 struct {
12255 unsigned int op1 : 8;
12256 unsigned int r1 : 4;
12257 unsigned int r3 : 4;
12258 unsigned int i2 : 16;
12259 unsigned int : 8;
12260 unsigned int op2 : 8;
12261 } RIE;
12262 struct {
12263 unsigned int op1 : 8;
12264 unsigned int r1 : 4;
12265 unsigned int r2 : 4;
12266 unsigned int i3 : 8;
12267 unsigned int i4 : 8;
12268 unsigned int i5 : 8;
12269 unsigned int op2 : 8;
12270 } RIE_RRUUU;
12271 struct {
12272 unsigned int op1 : 8;
12273 unsigned int r1 : 4;
12274 unsigned int : 4;
12275 unsigned int i2 : 16;
12276 unsigned int m3 : 4;
12277 unsigned int : 4;
12278 unsigned int op2 : 8;
12279 } RIEv1;
12280 struct {
12281 unsigned int op1 : 8;
12282 unsigned int r1 : 4;
12283 unsigned int r2 : 4;
12284 unsigned int i4 : 16;
12285 unsigned int m3 : 4;
12286 unsigned int : 4;
12287 unsigned int op2 : 8;
12288 } RIE_RRPU;
12289 struct {
12290 unsigned int op1 : 8;
12291 unsigned int r1 : 4;
12292 unsigned int m3 : 4;
12293 unsigned int i4 : 16;
12294 unsigned int i2 : 8;
12295 unsigned int op2 : 8;
12296 } RIEv3;
12297 struct {
12298 unsigned int op1 : 8;
12299 unsigned int r1 : 4;
12300 unsigned int op2 : 4;
12301 unsigned int i2 : 32;
12302 } RIL;
12303 struct {
12304 unsigned int op1 : 8;
12305 unsigned int r1 : 4;
12306 unsigned int m3 : 4;
12307 unsigned int b4 : 4;
12308 unsigned int d4 : 12;
12309 unsigned int i2 : 8;
12310 unsigned int op2 : 8;
12311 } RIS;
12312 struct {
12313 unsigned int op1 : 8;
12314 unsigned int r1 : 4;
12315 unsigned int r2 : 4;
12316 unsigned int b4 : 4;
12317 unsigned int d4 : 12;
12318 unsigned int m3 : 4;
12319 unsigned int : 4;
12320 unsigned int op2 : 8;
12321 } RRS;
12322 struct {
12323 unsigned int op1 : 8;
12324 unsigned int l1 : 4;
12325 unsigned int : 4;
12326 unsigned int b1 : 4;
12327 unsigned int d1 : 12;
12328 unsigned int : 8;
12329 unsigned int op2 : 8;
12330 } RSL;
12331 struct {
12332 unsigned int op1 : 8;
12333 unsigned int r1 : 4;
12334 unsigned int r3 : 4;
12335 unsigned int b2 : 4;
12336 unsigned int dl2 : 12;
12337 unsigned int dh2 : 8;
12338 unsigned int op2 : 8;
12339 } RSY;
12340 struct {
12341 unsigned int op1 : 8;
12342 unsigned int r1 : 4;
12343 unsigned int x2 : 4;
12344 unsigned int b2 : 4;
12345 unsigned int d2 : 12;
12346 unsigned int : 8;
12347 unsigned int op2 : 8;
12348 } RXE;
12349 struct {
12350 unsigned int op1 : 8;
12351 unsigned int r3 : 4;
12352 unsigned int x2 : 4;
12353 unsigned int b2 : 4;
12354 unsigned int d2 : 12;
12355 unsigned int r1 : 4;
12356 unsigned int : 4;
12357 unsigned int op2 : 8;
12358 } RXF;
12359 struct {
12360 unsigned int op1 : 8;
12361 unsigned int r1 : 4;
12362 unsigned int x2 : 4;
12363 unsigned int b2 : 4;
12364 unsigned int dl2 : 12;
12365 unsigned int dh2 : 8;
12366 unsigned int op2 : 8;
12367 } RXY;
12368 struct {
12369 unsigned int op1 : 8;
12370 unsigned int i2 : 8;
12371 unsigned int b1 : 4;
12372 unsigned int dl1 : 12;
12373 unsigned int dh1 : 8;
12374 unsigned int op2 : 8;
12375 } SIY;
12376 struct {
12377 unsigned int op : 8;
12378 unsigned int l : 8;
12379 unsigned int b1 : 4;
12380 unsigned int d1 : 12;
12381 unsigned int b2 : 4;
12382 unsigned int d2 : 12;
12383 } SS;
12384 struct {
12385 unsigned int op : 8;
12386 unsigned int l1 : 4;
12387 unsigned int l2 : 4;
12388 unsigned int b1 : 4;
12389 unsigned int d1 : 12;
12390 unsigned int b2 : 4;
12391 unsigned int d2 : 12;
12392 } SS_LLRDRD;
12393 struct {
12394 unsigned int op : 8;
12395 unsigned int r1 : 4;
12396 unsigned int r3 : 4;
12397 unsigned int b2 : 4;
12398 unsigned int d2 : 12;
12399 unsigned int b4 : 4;
12400 unsigned int d4 : 12;
12401 } SS_RRRDRD2;
12402 struct {
12403 unsigned int op : 16;
12404 unsigned int b1 : 4;
12405 unsigned int d1 : 12;
12406 unsigned int b2 : 4;
12407 unsigned int d2 : 12;
12408 } SSE;
12409 struct {
12410 unsigned int op1 : 8;
12411 unsigned int r3 : 4;
12412 unsigned int op2 : 4;
12413 unsigned int b1 : 4;
12414 unsigned int d1 : 12;
12415 unsigned int b2 : 4;
12416 unsigned int d2 : 12;
12417 } SSF;
12418 struct {
12419 unsigned int op : 16;
12420 unsigned int b1 : 4;
12421 unsigned int d1 : 12;
12422 unsigned int i2 : 16;
12423 } SIL;
12424 } formats;
12425 union {
12426 formats fmt;
12427 ULong value;
12428 } ovl;
12429
12430 vassert(sizeof(formats) == 6);
12431
12432 ((char *)(&ovl.value))[0] = bytes[0];
12433 ((char *)(&ovl.value))[1] = bytes[1];
12434 ((char *)(&ovl.value))[2] = bytes[2];
12435 ((char *)(&ovl.value))[3] = bytes[3];
12436 ((char *)(&ovl.value))[4] = bytes[4];
12437 ((char *)(&ovl.value))[5] = bytes[5];
12438 ((char *)(&ovl.value))[6] = 0x0;
12439 ((char *)(&ovl.value))[7] = 0x0;
12440
12441 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12442 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12443 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12444 ovl.fmt.RXY.dl2,
12445 ovl.fmt.RXY.dh2); goto ok;
12446 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12447 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12448 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12449 ovl.fmt.RXY.dl2,
12450 ovl.fmt.RXY.dh2); goto ok;
12451 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12452 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12453 ovl.fmt.RXY.dl2,
12454 ovl.fmt.RXY.dh2); goto ok;
12455 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12456 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12457 ovl.fmt.RXY.dl2,
12458 ovl.fmt.RXY.dh2); goto ok;
12459 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12460 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12461 ovl.fmt.RXY.dl2,
12462 ovl.fmt.RXY.dh2); goto ok;
12463 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12464 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12465 ovl.fmt.RXY.dl2,
12466 ovl.fmt.RXY.dh2); goto ok;
12467 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12468 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12469 ovl.fmt.RXY.dl2,
12470 ovl.fmt.RXY.dh2); goto ok;
12471 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12472 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12473 ovl.fmt.RXY.dl2,
12474 ovl.fmt.RXY.dh2); goto ok;
12475 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12476 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12477 ovl.fmt.RXY.dl2,
12478 ovl.fmt.RXY.dh2); goto ok;
12479 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12480 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12481 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12482 ovl.fmt.RXY.dl2,
12483 ovl.fmt.RXY.dh2); goto ok;
12484 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12485 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12486 ovl.fmt.RXY.dl2,
12487 ovl.fmt.RXY.dh2); goto ok;
12488 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12489 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12490 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12491 ovl.fmt.RXY.dl2,
12492 ovl.fmt.RXY.dh2); goto ok;
12493 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12494 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12495 ovl.fmt.RXY.dl2,
12496 ovl.fmt.RXY.dh2); goto ok;
12497 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12498 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12499 ovl.fmt.RXY.dl2,
12500 ovl.fmt.RXY.dh2); goto ok;
12501 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12502 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12503 ovl.fmt.RXY.dl2,
12504 ovl.fmt.RXY.dh2); goto ok;
12505 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12506 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12507 ovl.fmt.RXY.dl2,
12508 ovl.fmt.RXY.dh2); goto ok;
12509 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12510 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12511 ovl.fmt.RXY.dl2,
12512 ovl.fmt.RXY.dh2); goto ok;
12513 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12514 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12515 ovl.fmt.RXY.dl2,
12516 ovl.fmt.RXY.dh2); goto ok;
12517 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12518 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12519 ovl.fmt.RXY.dl2,
12520 ovl.fmt.RXY.dh2); goto ok;
12521 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12522 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12523 ovl.fmt.RXY.dl2,
12524 ovl.fmt.RXY.dh2); goto ok;
12525 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12526 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12527 ovl.fmt.RXY.dl2,
12528 ovl.fmt.RXY.dh2); goto ok;
12529 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12530 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12531 ovl.fmt.RXY.dl2,
12532 ovl.fmt.RXY.dh2); goto ok;
12533 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12534 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12535 ovl.fmt.RXY.dl2,
12536 ovl.fmt.RXY.dh2); goto ok;
12537 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12538 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12539 ovl.fmt.RXY.dl2,
12540 ovl.fmt.RXY.dh2); goto ok;
12541 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12542 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12543 ovl.fmt.RXY.dl2,
12544 ovl.fmt.RXY.dh2); goto ok;
12545 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12546 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12547 ovl.fmt.RXY.dl2,
12548 ovl.fmt.RXY.dh2); goto ok;
12549 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12550 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12551 ovl.fmt.RXY.dl2,
12552 ovl.fmt.RXY.dh2); goto ok;
12553 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12554 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12555 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12556 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12557 ovl.fmt.RXY.dh2); goto ok;
12558 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12559 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12560 ovl.fmt.RXY.dl2,
12561 ovl.fmt.RXY.dh2); goto ok;
12562 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12563 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12564 ovl.fmt.RXY.dl2,
12565 ovl.fmt.RXY.dh2); goto ok;
12566 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12567 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12568 ovl.fmt.RXY.dl2,
12569 ovl.fmt.RXY.dh2); goto ok;
12570 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12571 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12572 ovl.fmt.RXY.dl2,
12573 ovl.fmt.RXY.dh2); goto ok;
12574 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12575 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12576 ovl.fmt.RXY.dl2,
12577 ovl.fmt.RXY.dh2); goto ok;
12578 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12579 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12580 ovl.fmt.RXY.dl2,
12581 ovl.fmt.RXY.dh2); goto ok;
12582 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12583 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12584 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12585 ovl.fmt.RXY.dh2); goto ok;
12586 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12587 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12588 ovl.fmt.RXY.dl2,
12589 ovl.fmt.RXY.dh2); goto ok;
12590 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12591 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12592 ovl.fmt.RXY.dl2,
12593 ovl.fmt.RXY.dh2); goto ok;
12594 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12595 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12596 ovl.fmt.RXY.dl2,
12597 ovl.fmt.RXY.dh2); goto ok;
12598 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12599 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12600 ovl.fmt.RXY.dl2,
12601 ovl.fmt.RXY.dh2); goto ok;
12602 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12603 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12604 ovl.fmt.RXY.dl2,
12605 ovl.fmt.RXY.dh2); goto ok;
12606 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12607 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12608 ovl.fmt.RXY.dl2,
12609 ovl.fmt.RXY.dh2); goto ok;
12610 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12611 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12612 ovl.fmt.RXY.dl2,
12613 ovl.fmt.RXY.dh2); goto ok;
12614 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12615 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12616 ovl.fmt.RXY.dl2,
12617 ovl.fmt.RXY.dh2); goto ok;
12618 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12619 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12620 ovl.fmt.RXY.dl2,
12621 ovl.fmt.RXY.dh2); goto ok;
12622 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12623 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12624 ovl.fmt.RXY.dl2,
12625 ovl.fmt.RXY.dh2); goto ok;
12626 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12627 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12628 ovl.fmt.RXY.dl2,
12629 ovl.fmt.RXY.dh2); goto ok;
12630 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12631 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12632 ovl.fmt.RXY.dl2,
12633 ovl.fmt.RXY.dh2); goto ok;
12634 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12635 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12636 ovl.fmt.RXY.dl2,
12637 ovl.fmt.RXY.dh2); goto ok;
12638 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12639 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12640 ovl.fmt.RXY.dl2,
12641 ovl.fmt.RXY.dh2); goto ok;
12642 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12643 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12644 ovl.fmt.RXY.dl2,
12645 ovl.fmt.RXY.dh2); goto ok;
12646 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12647 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12648 ovl.fmt.RXY.dl2,
12649 ovl.fmt.RXY.dh2); goto ok;
12650 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12651 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12652 ovl.fmt.RXY.dl2,
12653 ovl.fmt.RXY.dh2); goto ok;
12654 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12655 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12656 ovl.fmt.RXY.dl2,
12657 ovl.fmt.RXY.dh2); goto ok;
12658 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12659 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12660 ovl.fmt.RXY.dl2,
12661 ovl.fmt.RXY.dh2); goto ok;
12662 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12663 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12664 ovl.fmt.RXY.dl2,
12665 ovl.fmt.RXY.dh2); goto ok;
12666 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12667 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12668 ovl.fmt.RXY.dl2,
12669 ovl.fmt.RXY.dh2); goto ok;
12670 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12671 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12672 ovl.fmt.RXY.dl2,
12673 ovl.fmt.RXY.dh2); goto ok;
12674 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12675 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12676 ovl.fmt.RXY.dl2,
12677 ovl.fmt.RXY.dh2); goto ok;
12678 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12679 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12680 ovl.fmt.RXY.dl2,
12681 ovl.fmt.RXY.dh2); goto ok;
12682 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12683 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12684 ovl.fmt.RXY.dl2,
12685 ovl.fmt.RXY.dh2); goto ok;
12686 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12687 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12688 ovl.fmt.RXY.dl2,
12689 ovl.fmt.RXY.dh2); goto ok;
12690 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12691 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12692 ovl.fmt.RXY.dl2,
12693 ovl.fmt.RXY.dh2); goto ok;
12694 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12695 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12696 ovl.fmt.RXY.dl2,
12697 ovl.fmt.RXY.dh2); goto ok;
12698 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12699 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12700 ovl.fmt.RXY.dl2,
12701 ovl.fmt.RXY.dh2); goto ok;
12702 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12703 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12704 ovl.fmt.RXY.dl2,
12705 ovl.fmt.RXY.dh2); goto ok;
12706 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12707 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12708 ovl.fmt.RXY.dl2,
12709 ovl.fmt.RXY.dh2); goto ok;
12710 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12711 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12712 ovl.fmt.RXY.dl2,
12713 ovl.fmt.RXY.dh2); goto ok;
12714 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12715 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12716 ovl.fmt.RXY.dl2,
12717 ovl.fmt.RXY.dh2); goto ok;
12718 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12719 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12720 ovl.fmt.RXY.dl2,
12721 ovl.fmt.RXY.dh2); goto ok;
12722 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12723 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12724 ovl.fmt.RXY.dl2,
12725 ovl.fmt.RXY.dh2); goto ok;
12726 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12727 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12728 ovl.fmt.RXY.dl2,
12729 ovl.fmt.RXY.dh2); goto ok;
12730 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12731 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12732 ovl.fmt.RXY.dl2,
12733 ovl.fmt.RXY.dh2); goto ok;
12734 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12735 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12736 ovl.fmt.RXY.dl2,
12737 ovl.fmt.RXY.dh2); goto ok;
12738 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12739 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12740 ovl.fmt.RXY.dl2,
12741 ovl.fmt.RXY.dh2); goto ok;
12742 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12743 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12744 ovl.fmt.RXY.dl2,
12745 ovl.fmt.RXY.dh2); goto ok;
12746 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12747 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12748 ovl.fmt.RXY.dl2,
12749 ovl.fmt.RXY.dh2); goto ok;
12750 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12751 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12752 ovl.fmt.RXY.dl2,
12753 ovl.fmt.RXY.dh2); goto ok;
12754 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12755 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12756 ovl.fmt.RXY.dl2,
12757 ovl.fmt.RXY.dh2); goto ok;
12758 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12759 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12760 ovl.fmt.RXY.dl2,
12761 ovl.fmt.RXY.dh2); goto ok;
12762 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12763 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12764 ovl.fmt.RXY.dl2,
12765 ovl.fmt.RXY.dh2); goto ok;
12766 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12767 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12768 ovl.fmt.RXY.dl2,
12769 ovl.fmt.RXY.dh2); goto ok;
12770 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12771 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12772 ovl.fmt.RXY.dl2,
12773 ovl.fmt.RXY.dh2); goto ok;
12774 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12775 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12776 ovl.fmt.RXY.dl2,
12777 ovl.fmt.RXY.dh2); goto ok;
12778 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12779 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12780 ovl.fmt.RXY.dl2,
12781 ovl.fmt.RXY.dh2); goto ok;
12782 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12783 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12784 ovl.fmt.RXY.dl2,
12785 ovl.fmt.RXY.dh2); goto ok;
12786 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12787 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12788 ovl.fmt.RXY.dl2,
12789 ovl.fmt.RXY.dh2); goto ok;
12790 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12791 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12792 ovl.fmt.RXY.dl2,
12793 ovl.fmt.RXY.dh2); goto ok;
12794 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12795 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12796 ovl.fmt.RXY.dl2,
12797 ovl.fmt.RXY.dh2); goto ok;
12798 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12799 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12800 ovl.fmt.RSY.dl2,
12801 ovl.fmt.RSY.dh2); goto ok;
12802 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12803 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12804 ovl.fmt.RSY.dl2,
12805 ovl.fmt.RSY.dh2); goto ok;
12806 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12807 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12808 ovl.fmt.RSY.dl2,
12809 ovl.fmt.RSY.dh2); goto ok;
12810 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12811 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12812 ovl.fmt.RSY.dl2,
12813 ovl.fmt.RSY.dh2); goto ok;
12814 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12815 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12816 ovl.fmt.RSY.dl2,
12817 ovl.fmt.RSY.dh2); goto ok;
12818 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12819 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12820 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12821 ovl.fmt.RSY.dl2,
12822 ovl.fmt.RSY.dh2); goto ok;
12823 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12824 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12825 ovl.fmt.RSY.dl2,
12826 ovl.fmt.RSY.dh2); goto ok;
12827 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12828 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12829 ovl.fmt.RSY.dl2,
12830 ovl.fmt.RSY.dh2); goto ok;
12831 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12832 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12833 ovl.fmt.RSY.dl2,
12834 ovl.fmt.RSY.dh2); goto ok;
12835 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12836 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12837 ovl.fmt.RSY.dl2,
12838 ovl.fmt.RSY.dh2); goto ok;
12839 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12840 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12841 ovl.fmt.RSY.dl2,
12842 ovl.fmt.RSY.dh2); goto ok;
12843 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12844 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12845 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12846 ovl.fmt.RSY.dl2,
12847 ovl.fmt.RSY.dh2); goto ok;
12848 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12849 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12850 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12851 ovl.fmt.RSY.dh2); goto ok;
12852 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12853 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12854 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12855 ovl.fmt.RSY.dh2); goto ok;
12856 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12857 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12858 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12859 ovl.fmt.RSY.dl2,
12860 ovl.fmt.RSY.dh2); goto ok;
12861 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12862 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12863 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12864 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12865 ovl.fmt.RSY.dl2,
12866 ovl.fmt.RSY.dh2); goto ok;
12867 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12868 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12869 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12870 ovl.fmt.RSY.dh2); goto ok;
12871 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12872 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12873 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12874 ovl.fmt.SIY.dh1); goto ok;
12875 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12876 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12877 ovl.fmt.SIY.dh1); goto ok;
12878 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12879 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12880 ovl.fmt.SIY.dh1); goto ok;
12881 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12882 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12883 ovl.fmt.SIY.dh1); goto ok;
12884 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12885 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12886 ovl.fmt.SIY.dh1); goto ok;
12887 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12888 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12889 ovl.fmt.SIY.dh1); goto ok;
12890 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12891 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12892 ovl.fmt.SIY.dh1); goto ok;
12893 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12894 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12895 ovl.fmt.SIY.dh1); goto ok;
12896 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12897 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12898 ovl.fmt.SIY.dh1); goto ok;
12899 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12900 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12901 ovl.fmt.SIY.dh1); goto ok;
12902 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12903 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12904 ovl.fmt.RSY.dl2,
12905 ovl.fmt.RSY.dh2); goto ok;
12906 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12907 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12908 ovl.fmt.RSY.dl2,
12909 ovl.fmt.RSY.dh2); goto ok;
12910 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12911 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12912 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12913 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12914 ovl.fmt.RSY.dl2,
12915 ovl.fmt.RSY.dh2); goto ok;
12916 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12917 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12918 ovl.fmt.RSY.dl2,
12919 ovl.fmt.RSY.dh2); goto ok;
12920 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12921 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12922 ovl.fmt.RSY.dl2,
12923 ovl.fmt.RSY.dh2); goto ok;
12924 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12925 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12926 ovl.fmt.RSY.dl2,
12927 ovl.fmt.RSY.dh2); goto ok;
12928 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12929 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12930 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12931 ovl.fmt.RSY.dh2); goto ok;
12932 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12933 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12934 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12935 ovl.fmt.RSY.dl2,
12936 ovl.fmt.RSY.dh2); goto ok;
12937 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12938 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12939 ovl.fmt.RSY.dl2,
12940 ovl.fmt.RSY.dh2); goto ok;
12941 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12942 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12943 ovl.fmt.RSY.dl2,
12944 ovl.fmt.RSY.dh2); goto ok;
12945 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12946 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12947 ovl.fmt.RSY.dl2,
12948 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012949 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12950 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12951 ovl.fmt.RSY.dl2,
12952 ovl.fmt.RSY.dh2,
12953 S390_XMNM_LOCG); goto ok;
12954 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12955 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12956 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12957 ovl.fmt.RSY.dh2,
12958 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012959 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12960 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12961 ovl.fmt.RSY.dl2,
12962 ovl.fmt.RSY.dh2); goto ok;
12963 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12964 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12965 ovl.fmt.RSY.dl2,
12966 ovl.fmt.RSY.dh2); goto ok;
12967 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12968 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12969 ovl.fmt.RSY.dl2,
12970 ovl.fmt.RSY.dh2); goto ok;
12971 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12972 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12973 ovl.fmt.RSY.dl2,
12974 ovl.fmt.RSY.dh2); goto ok;
12975 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12976 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12977 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12978 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012979 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12980 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12981 ovl.fmt.RSY.dl2,
12982 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12983 goto ok;
12984 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12985 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12986 ovl.fmt.RSY.dl2,
12987 ovl.fmt.RSY.dh2,
12988 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012989 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12990 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12991 ovl.fmt.RSY.dl2,
12992 ovl.fmt.RSY.dh2); goto ok;
12993 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12994 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12995 ovl.fmt.RSY.dl2,
12996 ovl.fmt.RSY.dh2); goto ok;
12997 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12998 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12999 ovl.fmt.RSY.dl2,
13000 ovl.fmt.RSY.dh2); goto ok;
13001 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
13002 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13003 ovl.fmt.RSY.dl2,
13004 ovl.fmt.RSY.dh2); goto ok;
13005 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
13006 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13007 ovl.fmt.RSY.dl2,
13008 ovl.fmt.RSY.dh2); goto ok;
13009 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
13010 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13011 goto ok;
13012 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
13013 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13014 goto ok;
13015 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
13016 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
13017 ovl.fmt.RIE_RRUUU.r1,
13018 ovl.fmt.RIE_RRUUU.r2,
13019 ovl.fmt.RIE_RRUUU.i3,
13020 ovl.fmt.RIE_RRUUU.i4,
13021 ovl.fmt.RIE_RRUUU.i5);
13022 goto ok;
13023 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
13024 ovl.fmt.RIE_RRUUU.r1,
13025 ovl.fmt.RIE_RRUUU.r2,
13026 ovl.fmt.RIE_RRUUU.i3,
13027 ovl.fmt.RIE_RRUUU.i4,
13028 ovl.fmt.RIE_RRUUU.i5);
13029 goto ok;
13030 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
13031 ovl.fmt.RIE_RRUUU.r1,
13032 ovl.fmt.RIE_RRUUU.r2,
13033 ovl.fmt.RIE_RRUUU.i3,
13034 ovl.fmt.RIE_RRUUU.i4,
13035 ovl.fmt.RIE_RRUUU.i5);
13036 goto ok;
13037 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
13038 ovl.fmt.RIE_RRUUU.r1,
13039 ovl.fmt.RIE_RRUUU.r2,
13040 ovl.fmt.RIE_RRUUU.i3,
13041 ovl.fmt.RIE_RRUUU.i4,
13042 ovl.fmt.RIE_RRUUU.i5);
13043 goto ok;
13044 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13045 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13046 ovl.fmt.RIE_RRPU.r1,
13047 ovl.fmt.RIE_RRPU.r2,
13048 ovl.fmt.RIE_RRPU.i4,
13049 ovl.fmt.RIE_RRPU.m3); goto ok;
13050 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13051 ovl.fmt.RIE_RRPU.r1,
13052 ovl.fmt.RIE_RRPU.r2,
13053 ovl.fmt.RIE_RRPU.i4,
13054 ovl.fmt.RIE_RRPU.m3); goto ok;
13055 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13056 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13057 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13058 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13059 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13060 ovl.fmt.RIE_RRPU.r1,
13061 ovl.fmt.RIE_RRPU.r2,
13062 ovl.fmt.RIE_RRPU.i4,
13063 ovl.fmt.RIE_RRPU.m3); goto ok;
13064 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13065 ovl.fmt.RIE_RRPU.r1,
13066 ovl.fmt.RIE_RRPU.r2,
13067 ovl.fmt.RIE_RRPU.i4,
13068 ovl.fmt.RIE_RRPU.m3); goto ok;
13069 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13070 ovl.fmt.RIEv3.r1,
13071 ovl.fmt.RIEv3.m3,
13072 ovl.fmt.RIEv3.i4,
13073 ovl.fmt.RIEv3.i2); goto ok;
13074 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13075 ovl.fmt.RIEv3.r1,
13076 ovl.fmt.RIEv3.m3,
13077 ovl.fmt.RIEv3.i4,
13078 ovl.fmt.RIEv3.i2); goto ok;
13079 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13080 ovl.fmt.RIEv3.r1,
13081 ovl.fmt.RIEv3.m3,
13082 ovl.fmt.RIEv3.i4,
13083 ovl.fmt.RIEv3.i2); goto ok;
13084 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13085 ovl.fmt.RIEv3.r1,
13086 ovl.fmt.RIEv3.m3,
13087 ovl.fmt.RIEv3.i4,
13088 ovl.fmt.RIEv3.i2); goto ok;
13089 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13090 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13091 goto ok;
13092 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13093 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13094 ovl.fmt.RIE.i2); goto ok;
13095 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13096 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13097 ovl.fmt.RIE.i2); goto ok;
13098 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13099 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13100 ovl.fmt.RIE.i2); goto ok;
13101 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13102 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13103 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13104 goto ok;
13105 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13106 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13107 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13108 goto ok;
13109 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13110 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13111 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13112 goto ok;
13113 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13114 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13115 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13116 goto ok;
13117 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13118 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13119 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13120 ovl.fmt.RIS.i2); goto ok;
13121 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13122 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13123 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13124 ovl.fmt.RIS.i2); goto ok;
13125 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13126 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13127 ovl.fmt.RIS.d4,
13128 ovl.fmt.RIS.i2); goto ok;
13129 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13130 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13131 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13132 ovl.fmt.RIS.i2); goto ok;
13133 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13134 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13135 ovl.fmt.RXE.d2); goto ok;
13136 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13137 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13138 ovl.fmt.RXE.d2); goto ok;
13139 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13140 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13141 ovl.fmt.RXE.d2); goto ok;
13142 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13143 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13144 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13145 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13146 ovl.fmt.RXE.d2); goto ok;
13147 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13148 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13149 ovl.fmt.RXE.d2); goto ok;
13150 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13151 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13152 ovl.fmt.RXE.d2); goto ok;
13153 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13154 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13155 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13156 ovl.fmt.RXE.d2); goto ok;
13157 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13158 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13159 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13160 ovl.fmt.RXF.r1); goto ok;
13161 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13162 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13163 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13164 ovl.fmt.RXF.r1); goto ok;
13165 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13166 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13167 ovl.fmt.RXE.d2); goto ok;
13168 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13169 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13170 ovl.fmt.RXE.d2); goto ok;
13171 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13172 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13173 ovl.fmt.RXE.d2); goto ok;
13174 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13175 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13176 ovl.fmt.RXE.d2); goto ok;
13177 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13178 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13179 ovl.fmt.RXE.d2); goto ok;
13180 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13181 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13182 ovl.fmt.RXE.d2); goto ok;
13183 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13184 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13185 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13186 ovl.fmt.RXE.d2); goto ok;
13187 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13188 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13189 ovl.fmt.RXE.d2); goto ok;
13190 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13191 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13192 ovl.fmt.RXE.d2); goto ok;
13193 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13194 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13195 ovl.fmt.RXE.d2); goto ok;
13196 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13197 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13198 ovl.fmt.RXE.d2); goto ok;
13199 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13200 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13201 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13202 ovl.fmt.RXF.r1); goto ok;
13203 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13204 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13205 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13206 ovl.fmt.RXF.r1); goto ok;
13207 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13208 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13209 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13210 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13211 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13212 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13213 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13214 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13215 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13216 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13217 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13218 case 0xed000000003bULL: /* MY */ goto unimplemented;
13219 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13220 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13221 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13222 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13223 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13224 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13225 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13226 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13227 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13228 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13229 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13230 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13231 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13232 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13233 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13234 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13235 ovl.fmt.RXY.dl2,
13236 ovl.fmt.RXY.dh2); goto ok;
13237 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13238 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13239 ovl.fmt.RXY.dl2,
13240 ovl.fmt.RXY.dh2); goto ok;
13241 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13242 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13243 ovl.fmt.RXY.dl2,
13244 ovl.fmt.RXY.dh2); goto ok;
13245 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13246 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13247 ovl.fmt.RXY.dl2,
13248 ovl.fmt.RXY.dh2); goto ok;
13249 }
13250
13251 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13252 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13253 ovl.fmt.RIL.i2); goto ok;
13254 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13255 ovl.fmt.RIL.i2); goto ok;
13256 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13257 ovl.fmt.RIL.i2); goto ok;
13258 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13259 ovl.fmt.RIL.i2); goto ok;
13260 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13261 ovl.fmt.RIL.i2); goto ok;
13262 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13263 ovl.fmt.RIL.i2); goto ok;
13264 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13265 ovl.fmt.RIL.i2); goto ok;
13266 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13267 ovl.fmt.RIL.i2); goto ok;
13268 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13269 ovl.fmt.RIL.i2); goto ok;
13270 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13271 ovl.fmt.RIL.i2); goto ok;
13272 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13273 ovl.fmt.RIL.i2); goto ok;
13274 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13275 ovl.fmt.RIL.i2); goto ok;
13276 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13277 ovl.fmt.RIL.i2); goto ok;
13278 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13279 ovl.fmt.RIL.i2); goto ok;
13280 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13281 ovl.fmt.RIL.i2); goto ok;
13282 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13283 ovl.fmt.RIL.i2); goto ok;
13284 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13285 ovl.fmt.RIL.i2); goto ok;
13286 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13287 ovl.fmt.RIL.i2); goto ok;
13288 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13289 ovl.fmt.RIL.i2); goto ok;
13290 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13291 ovl.fmt.RIL.i2); goto ok;
13292 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13293 ovl.fmt.RIL.i2); goto ok;
13294 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13295 ovl.fmt.RIL.i2); goto ok;
13296 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13297 ovl.fmt.RIL.i2); goto ok;
13298 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13299 ovl.fmt.RIL.i2); goto ok;
13300 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13301 ovl.fmt.RIL.i2); goto ok;
13302 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13303 ovl.fmt.RIL.i2); goto ok;
13304 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13305 ovl.fmt.RIL.i2); goto ok;
13306 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13307 ovl.fmt.RIL.i2); goto ok;
13308 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13309 ovl.fmt.RIL.i2); goto ok;
13310 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13311 ovl.fmt.RIL.i2); goto ok;
13312 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13313 ovl.fmt.RIL.i2); goto ok;
13314 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13315 ovl.fmt.RIL.i2); goto ok;
13316 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13317 ovl.fmt.RIL.i2); goto ok;
13318 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13319 ovl.fmt.RIL.i2); goto ok;
13320 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13321 ovl.fmt.RIL.i2); goto ok;
13322 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13323 ovl.fmt.RIL.i2); goto ok;
13324 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13325 ovl.fmt.RIL.i2); goto ok;
13326 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13327 ovl.fmt.RIL.i2); goto ok;
13328 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13329 ovl.fmt.RIL.i2); goto ok;
13330 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13331 ovl.fmt.RIL.i2); goto ok;
13332 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13333 ovl.fmt.RIL.i2); goto ok;
13334 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13335 ovl.fmt.RIL.i2); goto ok;
13336 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13337 ovl.fmt.RIL.i2); goto ok;
13338 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13339 ovl.fmt.RIL.i2); goto ok;
13340 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13341 ovl.fmt.RIL.i2); goto ok;
13342 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13343 ovl.fmt.RIL.i2); goto ok;
13344 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13345 ovl.fmt.RIL.i2); goto ok;
13346 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13347 ovl.fmt.RIL.i2); goto ok;
13348 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13349 ovl.fmt.RIL.i2); goto ok;
13350 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13351 case 0xc801ULL: /* ECTG */ goto unimplemented;
13352 case 0xc802ULL: /* CSST */ goto unimplemented;
13353 case 0xc804ULL: /* LPD */ goto unimplemented;
13354 case 0xc805ULL: /* LPDG */ goto unimplemented;
13355 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13356 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13357 ovl.fmt.RIL.i2); goto ok;
13358 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13359 ovl.fmt.RIL.i2); goto ok;
13360 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13361 ovl.fmt.RIL.i2); goto ok;
13362 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13363 ovl.fmt.RIL.i2); goto ok;
13364 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13365 ovl.fmt.RIL.i2); goto ok;
13366 }
13367
13368 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13369 case 0xd0ULL: /* TRTR */ goto unimplemented;
13370 case 0xd1ULL: /* MVN */ goto unimplemented;
13371 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13372 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13373 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13374 case 0xd3ULL: /* MVZ */ goto unimplemented;
13375 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13376 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13377 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13378 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13379 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13380 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13381 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13382 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13383 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013384 case 0xd7ULL:
13385 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13386 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13387 else
13388 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13389 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13390 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13391 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013392 case 0xd9ULL: /* MVCK */ goto unimplemented;
13393 case 0xdaULL: /* MVCP */ goto unimplemented;
13394 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013395 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13396 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13397 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013398 case 0xddULL: /* TRT */ goto unimplemented;
13399 case 0xdeULL: /* ED */ goto unimplemented;
13400 case 0xdfULL: /* EDMK */ goto unimplemented;
13401 case 0xe1ULL: /* PKU */ goto unimplemented;
13402 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13403 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13404 case 0xe9ULL: /* PKA */ goto unimplemented;
13405 case 0xeaULL: /* UNPKA */ goto unimplemented;
13406 case 0xeeULL: /* PLO */ goto unimplemented;
13407 case 0xefULL: /* LMD */ goto unimplemented;
13408 case 0xf0ULL: /* SRP */ goto unimplemented;
13409 case 0xf1ULL: /* MVO */ goto unimplemented;
13410 case 0xf2ULL: /* PACK */ goto unimplemented;
13411 case 0xf3ULL: /* UNPK */ goto unimplemented;
13412 case 0xf8ULL: /* ZAP */ goto unimplemented;
13413 case 0xf9ULL: /* CP */ goto unimplemented;
13414 case 0xfaULL: /* AP */ goto unimplemented;
13415 case 0xfbULL: /* SP */ goto unimplemented;
13416 case 0xfcULL: /* MP */ goto unimplemented;
13417 case 0xfdULL: /* DP */ goto unimplemented;
13418 }
13419
13420 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13421 case 0xe500ULL: /* LASP */ goto unimplemented;
13422 case 0xe501ULL: /* TPROT */ goto unimplemented;
13423 case 0xe502ULL: /* STRAG */ goto unimplemented;
13424 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13425 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13426 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13427 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13428 goto ok;
13429 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13430 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13431 goto ok;
13432 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13433 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13434 goto ok;
13435 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13436 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13437 goto ok;
13438 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13439 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13440 goto ok;
13441 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13442 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13443 goto ok;
13444 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13445 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13446 goto ok;
13447 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13448 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13449 goto ok;
13450 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13451 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13452 goto ok;
13453 }
13454
13455 return S390_DECODE_UNKNOWN_INSN;
13456
13457ok:
13458 return S390_DECODE_OK;
13459
13460unimplemented:
13461 return S390_DECODE_UNIMPLEMENTED_INSN;
13462}
13463
13464/* Handle "special" instructions. */
13465static s390_decode_t
13466s390_decode_special_and_irgen(UChar *bytes)
13467{
13468 s390_decode_t status = S390_DECODE_OK;
13469
13470 /* Got a "Special" instruction preamble. Which one is it? */
13471 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13472 s390_irgen_client_request();
13473 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13474 s390_irgen_guest_NRADDR();
13475 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13476 s390_irgen_call_noredir();
13477 } else {
13478 /* We don't know what it is. */
13479 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13480 }
13481
13482 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13483
13484 return status;
13485}
13486
13487
13488/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013489static UInt
sewardj2019a972011-03-07 16:04:07 +000013490s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13491{
13492 s390_decode_t status;
13493
13494 dis_res = dres;
13495
13496 /* Spot the 8-byte preamble: 18ff lr r15,r15
13497 1811 lr r1,r1
13498 1822 lr r2,r2
13499 1833 lr r3,r3 */
13500 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13501 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13502 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13503
13504 /* Handle special instruction that follows that preamble. */
13505 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013506
13507 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13508 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13509
13510 status =
13511 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013512 } else {
13513 /* Handle normal instructions. */
13514 switch (insn_length) {
13515 case 2:
13516 status = s390_decode_2byte_and_irgen(bytes);
13517 break;
13518
13519 case 4:
13520 status = s390_decode_4byte_and_irgen(bytes);
13521 break;
13522
13523 case 6:
13524 status = s390_decode_6byte_and_irgen(bytes);
13525 break;
13526
13527 default:
13528 status = S390_DECODE_ERROR;
13529 break;
13530 }
13531 }
florian5fcbba22011-07-27 20:40:22 +000013532 /* If next instruction is execute, stop here */
florianf9e1ed72012-04-17 02:41:56 +000013533 if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) {
13534 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013535 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000013536 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +000013537 }
13538
13539 if (status == S390_DECODE_OK) return insn_length; /* OK */
13540
13541 /* Decoding failed somehow */
13542 vex_printf("vex s390->IR: ");
13543 switch (status) {
13544 case S390_DECODE_UNKNOWN_INSN:
13545 vex_printf("unknown insn: ");
13546 break;
13547
13548 case S390_DECODE_UNIMPLEMENTED_INSN:
13549 vex_printf("unimplemented insn: ");
13550 break;
13551
13552 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13553 vex_printf("unimplemented special insn: ");
13554 break;
13555
13556 default:
13557 case S390_DECODE_ERROR:
13558 vex_printf("decoding error: ");
13559 break;
13560 }
13561
13562 vex_printf("%02x%02x", bytes[0], bytes[1]);
13563 if (insn_length > 2) {
13564 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13565 }
13566 if (insn_length > 4) {
13567 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13568 }
13569 vex_printf("\n");
13570
13571 return 0; /* Failed */
13572}
13573
13574
sewardj2019a972011-03-07 16:04:07 +000013575/* Disassemble a single instruction INSN into IR. */
13576static DisResult
florian420c5012011-07-22 02:12:28 +000013577disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013578{
13579 UChar byte;
13580 UInt insn_length;
13581 DisResult dres;
13582
13583 /* ---------------------------------------------------- */
13584 /* --- Compute instruction length -- */
13585 /* ---------------------------------------------------- */
13586
13587 /* Get the first byte of the insn. */
13588 byte = insn[0];
13589
13590 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13591 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13592 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13593
13594 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13595
13596 /* ---------------------------------------------------- */
13597 /* --- Initialise the DisResult data -- */
13598 /* ---------------------------------------------------- */
13599 dres.whatNext = Dis_Continue;
13600 dres.len = insn_length;
13601 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013602 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013603
floriana99f20e2011-07-17 14:16:41 +000013604 /* fixs390: consider chasing of conditional jumps */
13605
sewardj2019a972011-03-07 16:04:07 +000013606 /* Normal and special instruction handling starts here. */
13607 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13608 /* All decode failures end up here. The decoder has already issued an
13609 error message.
13610 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013611 not been executed, and (is currently) the next to be executed. */
13612 put_IA(mkaddr_expr(guest_IA_curr_instr));
sewardj2019a972011-03-07 16:04:07 +000013613
florian8844a632012-04-13 04:04:06 +000013614 dres.whatNext = Dis_StopHere;
13615 dres.jk_StopHere = Ijk_NoDecode;
13616 dres.continueAt = 0;
13617 dres.len = 0;
13618 } else {
13619 /* Decode success */
13620 switch (dres.whatNext) {
13621 case Dis_Continue:
13622 put_IA(mkaddr_expr(guest_IA_curr_instr));
13623 break;
13624 case Dis_ResteerU:
13625 case Dis_ResteerC:
13626 put_IA(mkaddr_expr(dres.continueAt));
13627 break;
13628 case Dis_StopHere:
13629 break;
13630 default:
13631 vassert(0);
13632 }
sewardj2019a972011-03-07 16:04:07 +000013633 }
13634
13635 return dres;
13636}
13637
13638
13639/*------------------------------------------------------------*/
13640/*--- Top-level fn ---*/
13641/*------------------------------------------------------------*/
13642
13643/* Disassemble a single instruction into IR. The instruction
13644 is located in host memory at &guest_code[delta]. */
13645
13646DisResult
13647disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013648 Bool (*resteerOkFn)(void *, Addr64),
13649 Bool resteerCisOk,
13650 void *callback_opaque,
13651 UChar *guest_code,
13652 Long delta,
13653 Addr64 guest_IP,
13654 VexArch guest_arch,
13655 VexArchInfo *archinfo,
13656 VexAbiInfo *abiinfo,
13657 Bool host_bigendian)
13658{
13659 vassert(guest_arch == VexArchS390X);
13660
13661 /* The instruction decoder requires a big-endian machine. */
13662 vassert(host_bigendian == True);
13663
13664 /* Set globals (see top of this file) */
13665 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013666 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013667 resteer_fn = resteerOkFn;
13668 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013669
florian420c5012011-07-22 02:12:28 +000013670 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013671}
13672
13673/*---------------------------------------------------------------*/
13674/*--- end guest_s390_toIR.c ---*/
13675/*---------------------------------------------------------------*/