Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 83e6ee1c40c74fd1f3f2986a108a9498d0ec7da9 / . / asoc / sm6150.c
blob: c7dc1f21e062f544fbf514bde52e0adbd1bd80fc [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]2/*
Vatsal Bucha83e6ee12018-11-30 18:58:31 +0530[diff] [blame^]3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]17#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]24#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]25#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Meng Wang11a25cf2018-10-31 14:11:26 +0800[diff] [blame]30#include <asoc/msm-cdc-pinctrl.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]31#include "codecs/wcd934x/wcd934x.h"
32#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]34#include "codecs/wsa881x.h"
35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]37#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]38#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]39
40#define DRV_NAME "sm6150-asoc-snd"
41
42#define __CHIPSET__ "SM6150 "
43#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
44
45#define SAMPLING_RATE_8KHZ 8000
46#define SAMPLING_RATE_11P025KHZ 11025
47#define SAMPLING_RATE_16KHZ 16000
48#define SAMPLING_RATE_22P05KHZ 22050
49#define SAMPLING_RATE_32KHZ 32000
50#define SAMPLING_RATE_44P1KHZ 44100
51#define SAMPLING_RATE_48KHZ 48000
52#define SAMPLING_RATE_88P2KHZ 88200
53#define SAMPLING_RATE_96KHZ 96000
54#define SAMPLING_RATE_176P4KHZ 176400
55#define SAMPLING_RATE_192KHZ 192000
56#define SAMPLING_RATE_352P8KHZ 352800
57#define SAMPLING_RATE_384KHZ 384000
58
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define CODEC_EXT_CLK_RATE 9600000
62#define ADSP_STATE_READY_TIMEOUT_MS 3000
63#define DEV_NAME_STR_LEN 32
64
65#define WSA8810_NAME_1 "wsa881x.20170211"
66#define WSA8810_NAME_2 "wsa881x.20170212"
67#define WCN_CDC_SLIM_RX_CH_MAX 2
68#define WCN_CDC_SLIM_TX_CH_MAX 3
69#define TDM_CHANNEL_MAX 8
70
71#define ADSP_STATE_READY_TIMEOUT_MS 3000
72#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
73#define MSM_HIFI_ON 1
74
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]75#define SM6150_SOC_VERSION_1_0 0x00010000
76#define SM6150_SOC_MSM_ID 0x163
77
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]78enum {
79 SLIM_RX_0 = 0,
80 SLIM_RX_1,
81 SLIM_RX_2,
82 SLIM_RX_3,
83 SLIM_RX_4,
84 SLIM_RX_5,
85 SLIM_RX_6,
86 SLIM_RX_7,
87 SLIM_RX_MAX,
88};
89enum {
90 SLIM_TX_0 = 0,
91 SLIM_TX_1,
92 SLIM_TX_2,
93 SLIM_TX_3,
94 SLIM_TX_4,
95 SLIM_TX_5,
96 SLIM_TX_6,
97 SLIM_TX_7,
98 SLIM_TX_8,
99 SLIM_TX_MAX,
100};
101
102enum {
103 PRIM_MI2S = 0,
104 SEC_MI2S,
105 TERT_MI2S,
106 QUAT_MI2S,
107 QUIN_MI2S,
108 MI2S_MAX,
109};
110
111enum {
112 PRIM_AUX_PCM = 0,
113 SEC_AUX_PCM,
114 TERT_AUX_PCM,
115 QUAT_AUX_PCM,
116 QUIN_AUX_PCM,
117 AUX_PCM_MAX,
118};
119
120enum {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]121 TDM_0 = 0,
122 TDM_1,
123 TDM_2,
124 TDM_3,
125 TDM_4,
126 TDM_5,
127 TDM_6,
128 TDM_7,
129 TDM_PORT_MAX,
130};
131
132enum {
133 TDM_PRI = 0,
134 TDM_SEC,
135 TDM_TERT,
136 TDM_QUAT,
137 TDM_QUIN,
138 TDM_INTERFACE_MAX,
139};
140
141struct tdm_port {
142 u32 mode;
143 u32 channel;
144};
145
146enum {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]147 WSA_CDC_DMA_RX_0 = 0,
148 WSA_CDC_DMA_RX_1,
149 RX_CDC_DMA_RX_0,
150 RX_CDC_DMA_RX_1,
151 RX_CDC_DMA_RX_2,
152 RX_CDC_DMA_RX_3,
153 RX_CDC_DMA_RX_5,
154 CDC_DMA_RX_MAX,
155};
156
157enum {
158 WSA_CDC_DMA_TX_0 = 0,
159 WSA_CDC_DMA_TX_1,
160 WSA_CDC_DMA_TX_2,
161 TX_CDC_DMA_TX_0,
162 TX_CDC_DMA_TX_3,
163 TX_CDC_DMA_TX_4,
164 CDC_DMA_TX_MAX,
165};
166
167struct mi2s_conf {
168 struct mutex lock;
169 u32 ref_cnt;
170 u32 msm_is_mi2s_master;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]171 u32 msm_is_ext_mclk;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]172};
173
174static u32 mi2s_ebit_clk[MI2S_MAX] = {
175 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
176 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
177 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
178 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
179 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
180};
181
182struct dev_config {
183 u32 sample_rate;
184 u32 bit_format;
185 u32 channels;
186};
187
188enum {
189 DP_RX_IDX = 0,
190 EXT_DISP_RX_IDX_MAX,
191};
192
193struct msm_wsa881x_dev_info {
194 struct device_node *of_node;
195 u32 index;
196};
197
198struct aux_codec_dev_info {
199 struct device_node *of_node;
200 u32 index;
201};
202
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]203struct msm_asoc_mach_data {
204 struct snd_info_entry *codec_root;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]205 int usbc_en2_gpio; /* used by gpio driver API */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]206 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]207 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
208 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
209 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
210 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
211 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
212 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]213 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]214 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]215};
216
217struct msm_asoc_wcd93xx_codec {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]218 void* (*get_afe_config_fn)(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]219 enum afe_config_type config_type);
220};
221
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]222static struct snd_soc_card snd_soc_card_sm6150_msm;
223
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]224/* TDM default config */
225static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
226 { /* PRI TDM */
227 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
228 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
229 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
230 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
231 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
232 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
233 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
234 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
235 },
236 { /* SEC TDM */
237 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
238 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
239 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
240 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
241 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
242 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
245 },
246 { /* TERT TDM */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
255 },
256 { /* QUAT TDM */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
265 },
266 { /* QUIN TDM */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
275 }
276
277};
278
279/* TDM default config */
280static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
281 { /* PRI TDM */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
290 },
291 { /* SEC TDM */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
300 },
301 { /* TERT TDM */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
310 },
311 { /* QUAT TDM */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
320 },
321 { /* QUIN TDM */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
330 }
331};
332
333
334/* Default configuration of slimbus channels */
335static struct dev_config slim_rx_cfg[] = {
336 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
337 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
338 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
339 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
340 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
341 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
342 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
343 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
344};
345
346static struct dev_config slim_tx_cfg[] = {
347 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
348 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
349 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
350 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
351 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
352 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
356};
357
358/* Default configuration of Codec DMA Interface Tx */
359static struct dev_config cdc_dma_rx_cfg[] = {
360 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
361 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
362 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
363 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
364 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
365 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
366 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
367};
368
369/* Default configuration of Codec DMA Interface Rx */
370static struct dev_config cdc_dma_tx_cfg[] = {
371 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377};
378
379/* Default configuration of external display BE */
380static struct dev_config ext_disp_rx_cfg[] = {
381 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382};
383
384static struct dev_config usb_rx_cfg = {
385 .sample_rate = SAMPLING_RATE_48KHZ,
386 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
387 .channels = 2,
388};
389
390static struct dev_config usb_tx_cfg = {
391 .sample_rate = SAMPLING_RATE_48KHZ,
392 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
393 .channels = 1,
394};
395
396static struct dev_config proxy_rx_cfg = {
397 .sample_rate = SAMPLING_RATE_48KHZ,
398 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
399 .channels = 2,
400};
401
402/* Default configuration of MI2S channels */
403static struct dev_config mi2s_rx_cfg[] = {
404 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
405 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
406 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
407 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
408 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
409};
410
411static struct dev_config mi2s_tx_cfg[] = {
412 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
413 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
414 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
415 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
416 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
417};
418
419static struct dev_config aux_pcm_rx_cfg[] = {
420 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
421 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
422 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
423 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
424 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
425};
426
427static struct dev_config aux_pcm_tx_cfg[] = {
428 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433};
434static int msm_vi_feed_tx_ch = 2;
435static const char *const slim_rx_ch_text[] = {"One", "Two"};
436static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
437 "Five", "Six", "Seven",
438 "Eight"};
439static const char *const vi_feed_ch_text[] = {"One", "Two"};
440static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
441 "S32_LE"};
442static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
443 "S24_3LE"};
444static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
445 "KHZ_32", "KHZ_44P1", "KHZ_48",
446 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
447 "KHZ_192", "KHZ_352P8", "KHZ_384"};
448static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
449 "KHZ_44P1", "KHZ_48",
450 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]451static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
452 "KHZ_44P1", "KHZ_48",
453 "KHZ_88P2", "KHZ_96"};
454static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
455 "KHZ_44P1", "KHZ_48",
456 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]457static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
458 "Five", "Six", "Seven",
459 "Eight"};
460static char const *ch_text[] = {"Two", "Three", "Four", "Five",
461 "Six", "Seven", "Eight"};
462static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
463 "KHZ_16", "KHZ_22P05",
464 "KHZ_32", "KHZ_44P1", "KHZ_48",
465 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
466 "KHZ_192", "KHZ_352P8", "KHZ_384"};
467static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
468 "KHZ_192", "KHZ_32", "KHZ_44P1",
469 "KHZ_88P2", "KHZ_176P4" };
470static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
471 "Five", "Six", "Seven", "Eight"};
472static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
473static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
474 "KHZ_48", "KHZ_176P4",
475 "KHZ_352P8"};
476static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
477static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
478 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
479 "KHZ_48", "KHZ_96", "KHZ_192"};
480static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
481 "Five", "Six", "Seven",
482 "Eight"};
483static const char *const hifi_text[] = {"Off", "On"};
484static const char *const qos_text[] = {"Disable", "Enable"};
485
486static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
487static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
488 "Five", "Six", "Seven",
489 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]490static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
491 "KHZ_16", "KHZ_22P05",
492 "KHZ_32", "KHZ_44P1", "KHZ_48",
493 "KHZ_88P2", "KHZ_96",
494 "KHZ_176P4", "KHZ_192",
495 "KHZ_352P8", "KHZ_384"};
496
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]497
498static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
510static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
517static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
518static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
521static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]522static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
523static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]524static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
527 ext_disp_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
529static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
530static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
555static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
556static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
557static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
559static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
565static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
566static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
567static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
568static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
569static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
583static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
588static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
589static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
590static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
595 cdc_dma_sample_rate_text);
596static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
597 cdc_dma_sample_rate_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
599 cdc_dma_sample_rate_text);
600static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
601 cdc_dma_sample_rate_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
603 cdc_dma_sample_rate_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
619 cdc_dma_sample_rate_text);
620
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]621static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]622static bool codec_reg_done;
623static struct snd_soc_aux_dev *msm_aux_dev;
624static struct snd_soc_codec_conf *msm_codec_conf;
625static struct msm_asoc_wcd93xx_codec msm_codec_fn;
626
627static int dmic_0_1_gpio_cnt;
628static int dmic_2_3_gpio_cnt;
629
630static void *def_wcd_mbhc_cal(void);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]631static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]632 int enable, bool dapm);
633static int msm_wsa881x_init(struct snd_soc_component *component);
634static int msm_aux_codec_init(struct snd_soc_component *component);
635
636/*
637 * Need to report LINEIN
638 * if R/L channel impedance is larger than 5K ohm
639 */
640static struct wcd_mbhc_config wcd_mbhc_cfg = {
641 .read_fw_bin = false,
642 .calibration = NULL,
643 .detect_extn_cable = true,
644 .mono_stero_detection = false,
645 .swap_gnd_mic = NULL,
646 .hs_ext_micbias = true,
647 .key_code[0] = KEY_MEDIA,
648 .key_code[1] = KEY_VOICECOMMAND,
649 .key_code[2] = KEY_VOLUMEUP,
650 .key_code[3] = KEY_VOLUMEDOWN,
651 .key_code[4] = 0,
652 .key_code[5] = 0,
653 .key_code[6] = 0,
654 .key_code[7] = 0,
655 .linein_th = 5000,
656 .moisture_en = true,
657 .mbhc_micbias = MIC_BIAS_2,
658 .anc_micbias = MIC_BIAS_2,
659 .enable_anc_mic_detect = false,
660};
661
662static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
663 {"MIC BIAS1", NULL, "MCLK TX"},
664 {"MIC BIAS2", NULL, "MCLK TX"},
665 {"MIC BIAS3", NULL, "MCLK TX"},
666 {"MIC BIAS4", NULL, "MCLK TX"},
667};
668
669static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
670 {
671 AFE_API_VERSION_I2S_CONFIG,
672 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
673 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
674 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
675 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
676 0,
677 },
678 {
679 AFE_API_VERSION_I2S_CONFIG,
680 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
681 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
682 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
683 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
684 0,
685 },
686 {
687 AFE_API_VERSION_I2S_CONFIG,
688 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
689 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
690 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
691 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
692 0,
693 },
694 {
695 AFE_API_VERSION_I2S_CONFIG,
696 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
697 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
698 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
699 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
700 0,
701 },
702 {
703 AFE_API_VERSION_I2S_CONFIG,
704 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
705 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
706 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
707 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
708 0,
709 }
710
711};
712
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]713static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
714 {
715 AFE_API_VERSION_I2S_CONFIG,
716 Q6AFE_LPASS_CLK_ID_MCLK_3,
717 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
718 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
719 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
720 0,
721 },
722 {
723 AFE_API_VERSION_I2S_CONFIG,
724 Q6AFE_LPASS_CLK_ID_MCLK_2,
725 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
726 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
727 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
728 0,
729 },
730 {
731 AFE_API_VERSION_I2S_CONFIG,
732 Q6AFE_LPASS_CLK_ID_MCLK_1,
733 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
734 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
735 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
736 0,
737 },
738 {
739 AFE_API_VERSION_I2S_CONFIG,
740 Q6AFE_LPASS_CLK_ID_MCLK_1,
741 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
742 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
743 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
744 0,
745 },
746 {
747 AFE_API_VERSION_I2S_CONFIG,
748 Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
749 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
750 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
751 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
752 0,
753 }
754};
755
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]756static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
757
758static int slim_get_sample_rate_val(int sample_rate)
759{
760 int sample_rate_val = 0;
761
762 switch (sample_rate) {
763 case SAMPLING_RATE_8KHZ:
764 sample_rate_val = 0;
765 break;
766 case SAMPLING_RATE_16KHZ:
767 sample_rate_val = 1;
768 break;
769 case SAMPLING_RATE_32KHZ:
770 sample_rate_val = 2;
771 break;
772 case SAMPLING_RATE_44P1KHZ:
773 sample_rate_val = 3;
774 break;
775 case SAMPLING_RATE_48KHZ:
776 sample_rate_val = 4;
777 break;
778 case SAMPLING_RATE_88P2KHZ:
779 sample_rate_val = 5;
780 break;
781 case SAMPLING_RATE_96KHZ:
782 sample_rate_val = 6;
783 break;
784 case SAMPLING_RATE_176P4KHZ:
785 sample_rate_val = 7;
786 break;
787 case SAMPLING_RATE_192KHZ:
788 sample_rate_val = 8;
789 break;
790 case SAMPLING_RATE_352P8KHZ:
791 sample_rate_val = 9;
792 break;
793 case SAMPLING_RATE_384KHZ:
794 sample_rate_val = 10;
795 break;
796 default:
797 sample_rate_val = 4;
798 break;
799 }
800 return sample_rate_val;
801}
802
803static int slim_get_sample_rate(int value)
804{
805 int sample_rate = 0;
806
807 switch (value) {
808 case 0:
809 sample_rate = SAMPLING_RATE_8KHZ;
810 break;
811 case 1:
812 sample_rate = SAMPLING_RATE_16KHZ;
813 break;
814 case 2:
815 sample_rate = SAMPLING_RATE_32KHZ;
816 break;
817 case 3:
818 sample_rate = SAMPLING_RATE_44P1KHZ;
819 break;
820 case 4:
821 sample_rate = SAMPLING_RATE_48KHZ;
822 break;
823 case 5:
824 sample_rate = SAMPLING_RATE_88P2KHZ;
825 break;
826 case 6:
827 sample_rate = SAMPLING_RATE_96KHZ;
828 break;
829 case 7:
830 sample_rate = SAMPLING_RATE_176P4KHZ;
831 break;
832 case 8:
833 sample_rate = SAMPLING_RATE_192KHZ;
834 break;
835 case 9:
836 sample_rate = SAMPLING_RATE_352P8KHZ;
837 break;
838 case 10:
839 sample_rate = SAMPLING_RATE_384KHZ;
840 break;
841 default:
842 sample_rate = SAMPLING_RATE_48KHZ;
843 break;
844 }
845 return sample_rate;
846}
847
848static int slim_get_bit_format_val(int bit_format)
849{
850 int val = 0;
851
852 switch (bit_format) {
853 case SNDRV_PCM_FORMAT_S32_LE:
854 val = 3;
855 break;
856 case SNDRV_PCM_FORMAT_S24_3LE:
857 val = 2;
858 break;
859 case SNDRV_PCM_FORMAT_S24_LE:
860 val = 1;
861 break;
862 case SNDRV_PCM_FORMAT_S16_LE:
863 default:
864 val = 0;
865 break;
866 }
867 return val;
868}
869
870static int slim_get_bit_format(int val)
871{
872 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
873
874 switch (val) {
875 case 0:
876 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
877 break;
878 case 1:
879 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
880 break;
881 case 2:
882 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
883 break;
884 case 3:
885 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
886 break;
887 default:
888 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
889 break;
890 }
891 return bit_fmt;
892}
893
894static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
895{
896 int port_id = 0;
897
898 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
899 port_id = SLIM_RX_0;
900 } else if (strnstr(kcontrol->id.name,
901 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
902 port_id = SLIM_RX_2;
903 } else if (strnstr(kcontrol->id.name,
904 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
905 port_id = SLIM_RX_5;
906 } else if (strnstr(kcontrol->id.name,
907 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
908 port_id = SLIM_RX_6;
909 } else if (strnstr(kcontrol->id.name,
910 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
911 port_id = SLIM_TX_0;
912 } else if (strnstr(kcontrol->id.name,
913 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
914 port_id = SLIM_TX_1;
915 } else {
916 pr_err("%s: unsupported channel: %s\n",
917 __func__, kcontrol->id.name);
918 return -EINVAL;
919 }
920
921 return port_id;
922}
923
924static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
926{
927 int ch_num = slim_get_port_idx(kcontrol);
928
929 if (ch_num < 0)
930 return ch_num;
931
932 ucontrol->value.enumerated.item[0] =
933 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
934
935 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
936 ch_num, slim_rx_cfg[ch_num].sample_rate,
937 ucontrol->value.enumerated.item[0]);
938
939 return 0;
940}
941
942static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
943 struct snd_ctl_elem_value *ucontrol)
944{
945 int ch_num = slim_get_port_idx(kcontrol);
946
947 if (ch_num < 0)
948 return ch_num;
949
950 slim_rx_cfg[ch_num].sample_rate =
951 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
952
953 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
954 ch_num, slim_rx_cfg[ch_num].sample_rate,
955 ucontrol->value.enumerated.item[0]);
956
957 return 0;
958}
959
960static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_value *ucontrol)
962{
963 int ch_num = slim_get_port_idx(kcontrol);
964
965 if (ch_num < 0)
966 return ch_num;
967
968 ucontrol->value.enumerated.item[0] =
969 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
970
971 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
972 ch_num, slim_tx_cfg[ch_num].sample_rate,
973 ucontrol->value.enumerated.item[0]);
974
975 return 0;
976}
977
978static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
979 struct snd_ctl_elem_value *ucontrol)
980{
981 int sample_rate = 0;
982 int ch_num = slim_get_port_idx(kcontrol);
983
984 if (ch_num < 0)
985 return ch_num;
986
987 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
988 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
989 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
990 __func__, sample_rate);
991 return -EINVAL;
992 }
993 slim_tx_cfg[ch_num].sample_rate = sample_rate;
994
995 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
996 ch_num, slim_tx_cfg[ch_num].sample_rate,
997 ucontrol->value.enumerated.item[0]);
998
999 return 0;
1000}
1001
1002static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
1003 struct snd_ctl_elem_value *ucontrol)
1004{
1005 int ch_num = slim_get_port_idx(kcontrol);
1006
1007 if (ch_num < 0)
1008 return ch_num;
1009
1010 ucontrol->value.enumerated.item[0] =
1011 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
1012
1013 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1014 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1015 ucontrol->value.enumerated.item[0]);
1016
1017 return 0;
1018}
1019
1020static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1021 struct snd_ctl_elem_value *ucontrol)
1022{
1023 int ch_num = slim_get_port_idx(kcontrol);
1024
1025 if (ch_num < 0)
1026 return ch_num;
1027
1028 slim_rx_cfg[ch_num].bit_format =
1029 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1030
1031 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1032 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1033 ucontrol->value.enumerated.item[0]);
1034
1035 return 0;
1036}
1037
1038static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1039 struct snd_ctl_elem_value *ucontrol)
1040{
1041 int ch_num = slim_get_port_idx(kcontrol);
1042
1043 if (ch_num < 0)
1044 return ch_num;
1045
1046 ucontrol->value.enumerated.item[0] =
1047 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1048
1049 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1050 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1051 ucontrol->value.enumerated.item[0]);
1052
1053 return 0;
1054}
1055
1056static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_value *ucontrol)
1058{
1059 int ch_num = slim_get_port_idx(kcontrol);
1060
1061 if (ch_num < 0)
1062 return ch_num;
1063
1064 slim_tx_cfg[ch_num].bit_format =
1065 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1066
1067 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1068 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1069 ucontrol->value.enumerated.item[0]);
1070
1071 return 0;
1072}
1073
1074static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1075 struct snd_ctl_elem_value *ucontrol)
1076{
1077 int ch_num = slim_get_port_idx(kcontrol);
1078
1079 if (ch_num < 0)
1080 return ch_num;
1081
1082 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1083 ch_num, slim_rx_cfg[ch_num].channels);
1084 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1085
1086 return 0;
1087}
1088
1089static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1090 struct snd_ctl_elem_value *ucontrol)
1091{
1092 int ch_num = slim_get_port_idx(kcontrol);
1093
1094 if (ch_num < 0)
1095 return ch_num;
1096
1097 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1098 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1099 ch_num, slim_rx_cfg[ch_num].channels);
1100
1101 return 1;
1102}
1103
1104static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_value *ucontrol)
1106{
1107 int ch_num = slim_get_port_idx(kcontrol);
1108
1109 if (ch_num < 0)
1110 return ch_num;
1111
1112 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1113 ch_num, slim_tx_cfg[ch_num].channels);
1114 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1115
1116 return 0;
1117}
1118
1119static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1120 struct snd_ctl_elem_value *ucontrol)
1121{
1122 int ch_num = slim_get_port_idx(kcontrol);
1123
1124 if (ch_num < 0)
1125 return ch_num;
1126
1127 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1128 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1129 ch_num, slim_tx_cfg[ch_num].channels);
1130
1131 return 1;
1132}
1133
1134static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1135 struct snd_ctl_elem_value *ucontrol)
1136{
1137 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1138 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1139 ucontrol->value.integer.value[0]);
1140 return 0;
1141}
1142
1143static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1144 struct snd_ctl_elem_value *ucontrol)
1145{
1146 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1147
1148 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1149 return 1;
1150}
1151
1152static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1153 struct snd_ctl_elem_value *ucontrol)
1154{
1155 /*
1156 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1157 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1158 * value.
1159 */
1160 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1161 case SAMPLING_RATE_96KHZ:
1162 ucontrol->value.integer.value[0] = 5;
1163 break;
1164 case SAMPLING_RATE_88P2KHZ:
1165 ucontrol->value.integer.value[0] = 4;
1166 break;
1167 case SAMPLING_RATE_48KHZ:
1168 ucontrol->value.integer.value[0] = 3;
1169 break;
1170 case SAMPLING_RATE_44P1KHZ:
1171 ucontrol->value.integer.value[0] = 2;
1172 break;
1173 case SAMPLING_RATE_16KHZ:
1174 ucontrol->value.integer.value[0] = 1;
1175 break;
1176 case SAMPLING_RATE_8KHZ:
1177 default:
1178 ucontrol->value.integer.value[0] = 0;
1179 break;
1180 }
1181 pr_debug("%s: sample rate = %d\n", __func__,
1182 slim_rx_cfg[SLIM_RX_7].sample_rate);
1183
1184 return 0;
1185}
1186
1187static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1188 struct snd_ctl_elem_value *ucontrol)
1189{
1190 switch (ucontrol->value.integer.value[0]) {
1191 case 1:
1192 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1193 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1194 break;
1195 case 2:
1196 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1197 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1198 break;
1199 case 3:
1200 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1201 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1202 break;
1203 case 4:
1204 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1205 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1206 break;
1207 case 5:
1208 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1209 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1210 break;
1211 case 0:
1212 default:
1213 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1214 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1215 break;
1216 }
1217 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1218 __func__,
1219 slim_rx_cfg[SLIM_RX_7].sample_rate,
1220 slim_tx_cfg[SLIM_TX_7].sample_rate,
1221 ucontrol->value.enumerated.item[0]);
1222
1223 return 0;
1224}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1225static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1226 struct snd_ctl_elem_value *ucontrol)
1227{
1228 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1229 case SAMPLING_RATE_96KHZ:
1230 ucontrol->value.integer.value[0] = 5;
1231 break;
1232 case SAMPLING_RATE_88P2KHZ:
1233 ucontrol->value.integer.value[0] = 4;
1234 break;
1235 case SAMPLING_RATE_48KHZ:
1236 ucontrol->value.integer.value[0] = 3;
1237 break;
1238 case SAMPLING_RATE_44P1KHZ:
1239 ucontrol->value.integer.value[0] = 2;
1240 break;
1241 case SAMPLING_RATE_16KHZ:
1242 ucontrol->value.integer.value[0] = 1;
1243 break;
1244 case SAMPLING_RATE_8KHZ:
1245 default:
1246 ucontrol->value.integer.value[0] = 0;
1247 break;
1248 }
1249 pr_debug("%s: sample rate rx = %d", __func__,
1250 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1251
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1252 return 0;
1253}
1254
1255static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1256 struct snd_ctl_elem_value *ucontrol)
1257{
1258 switch (ucontrol->value.integer.value[0]) {
1259 case 1:
1260 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1261 break;
1262 case 2:
1263 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1264 break;
1265 case 3:
1266 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1267 break;
1268 case 4:
1269 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1270 break;
1271 case 5:
1272 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1273 break;
1274 case 0:
1275 default:
1276 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1277 break;
1278 }
1279 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1280 __func__,
1281 slim_rx_cfg[SLIM_RX_7].sample_rate,
1282 ucontrol->value.enumerated.item[0]);
1283
1284 return 0;
1285}
1286
1287static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1289{
1290 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1291 case SAMPLING_RATE_96KHZ:
1292 ucontrol->value.integer.value[0] = 5;
1293 break;
1294 case SAMPLING_RATE_88P2KHZ:
1295 ucontrol->value.integer.value[0] = 4;
1296 break;
1297 case SAMPLING_RATE_48KHZ:
1298 ucontrol->value.integer.value[0] = 3;
1299 break;
1300 case SAMPLING_RATE_44P1KHZ:
1301 ucontrol->value.integer.value[0] = 2;
1302 break;
1303 case SAMPLING_RATE_16KHZ:
1304 ucontrol->value.integer.value[0] = 1;
1305 break;
1306 case SAMPLING_RATE_8KHZ:
1307 default:
1308 ucontrol->value.integer.value[0] = 0;
1309 break;
1310 }
1311 pr_debug("%s: sample rate tx = %d", __func__,
1312 slim_tx_cfg[SLIM_TX_7].sample_rate);
1313
1314 return 0;
1315}
1316
1317static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1318 struct snd_ctl_elem_value *ucontrol)
1319{
1320 switch (ucontrol->value.integer.value[0]) {
1321 case 1:
1322 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1323 break;
1324 case 2:
1325 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1326 break;
1327 case 3:
1328 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1329 break;
1330 case 4:
1331 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1332 break;
1333 case 5:
1334 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1335 break;
1336 case 0:
1337 default:
1338 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1339 break;
1340 }
1341 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1342 __func__,
1343 slim_tx_cfg[SLIM_TX_7].sample_rate,
1344 ucontrol->value.enumerated.item[0]);
1345
1346 return 0;
1347}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1348static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1349{
1350 int idx = 0;
1351
1352 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1353 sizeof("WSA_CDC_DMA_RX_0")))
1354 idx = WSA_CDC_DMA_RX_0;
1355 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1356 sizeof("WSA_CDC_DMA_RX_0")))
1357 idx = WSA_CDC_DMA_RX_1;
1358 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1359 sizeof("RX_CDC_DMA_RX_0")))
1360 idx = RX_CDC_DMA_RX_0;
1361 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1362 sizeof("RX_CDC_DMA_RX_1")))
1363 idx = RX_CDC_DMA_RX_1;
1364 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1365 sizeof("RX_CDC_DMA_RX_2")))
1366 idx = RX_CDC_DMA_RX_2;
1367 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1368 sizeof("RX_CDC_DMA_RX_3")))
1369 idx = RX_CDC_DMA_RX_3;
1370 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1371 sizeof("RX_CDC_DMA_RX_5")))
1372 idx = RX_CDC_DMA_RX_5;
1373 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1374 sizeof("WSA_CDC_DMA_TX_0")))
1375 idx = WSA_CDC_DMA_TX_0;
1376 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1377 sizeof("WSA_CDC_DMA_TX_1")))
1378 idx = WSA_CDC_DMA_TX_1;
1379 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1380 sizeof("WSA_CDC_DMA_TX_2")))
1381 idx = WSA_CDC_DMA_TX_2;
1382 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1383 sizeof("TX_CDC_DMA_TX_0")))
1384 idx = TX_CDC_DMA_TX_0;
1385 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1386 sizeof("TX_CDC_DMA_TX_3")))
1387 idx = TX_CDC_DMA_TX_3;
1388 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1389 sizeof("TX_CDC_DMA_TX_4")))
1390 idx = TX_CDC_DMA_TX_4;
1391 else {
1392 pr_err("%s: unsupported channel: %s\n",
1393 __func__, kcontrol->id.name);
1394 return -EINVAL;
1395 }
1396
1397 return idx;
1398}
1399
1400static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1401 struct snd_ctl_elem_value *ucontrol)
1402{
1403 int ch_num = cdc_dma_get_port_idx(kcontrol);
1404
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1405 if (ch_num < 0) {
1406 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1407 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1408 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1409
1410 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1411 cdc_dma_rx_cfg[ch_num].channels - 1);
1412 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1413 return 0;
1414}
1415
1416static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1417 struct snd_ctl_elem_value *ucontrol)
1418{
1419 int ch_num = cdc_dma_get_port_idx(kcontrol);
1420
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1421 if (ch_num < 0) {
1422 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1423 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1424 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1425
1426 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1427
1428 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1429 cdc_dma_rx_cfg[ch_num].channels);
1430 return 1;
1431}
1432
1433static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1434 struct snd_ctl_elem_value *ucontrol)
1435{
1436 int ch_num = cdc_dma_get_port_idx(kcontrol);
1437
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1438 if (ch_num < 0) {
1439 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1440 return ch_num;
1441 }
1442
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1443 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1444 case SNDRV_PCM_FORMAT_S32_LE:
1445 ucontrol->value.integer.value[0] = 3;
1446 break;
1447 case SNDRV_PCM_FORMAT_S24_3LE:
1448 ucontrol->value.integer.value[0] = 2;
1449 break;
1450 case SNDRV_PCM_FORMAT_S24_LE:
1451 ucontrol->value.integer.value[0] = 1;
1452 break;
1453 case SNDRV_PCM_FORMAT_S16_LE:
1454 default:
1455 ucontrol->value.integer.value[0] = 0;
1456 break;
1457 }
1458
1459 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1460 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1461 ucontrol->value.integer.value[0]);
1462 return 0;
1463}
1464
1465static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1466 struct snd_ctl_elem_value *ucontrol)
1467{
1468 int rc = 0;
1469 int ch_num = cdc_dma_get_port_idx(kcontrol);
1470
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1471 if (ch_num < 0) {
1472 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1473 return ch_num;
1474 }
1475
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1476 switch (ucontrol->value.integer.value[0]) {
1477 case 3:
1478 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1479 break;
1480 case 2:
1481 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1482 break;
1483 case 1:
1484 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1485 break;
1486 case 0:
1487 default:
1488 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1489 break;
1490 }
1491 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1492 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1493 ucontrol->value.integer.value[0]);
1494
1495 return rc;
1496}
1497
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1498
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1499static int cdc_dma_get_sample_rate_val(int sample_rate)
1500{
1501 int sample_rate_val = 0;
1502
1503 switch (sample_rate) {
1504 case SAMPLING_RATE_8KHZ:
1505 sample_rate_val = 0;
1506 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1507 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1508 sample_rate_val = 1;
1509 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1510 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1511 sample_rate_val = 2;
1512 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1513 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1514 sample_rate_val = 3;
1515 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1516 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1517 sample_rate_val = 4;
1518 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1519 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1520 sample_rate_val = 5;
1521 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1522 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1523 sample_rate_val = 6;
1524 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1525 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1526 sample_rate_val = 7;
1527 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1528 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1529 sample_rate_val = 8;
1530 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1531 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1532 sample_rate_val = 9;
1533 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1534 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1535 sample_rate_val = 10;
1536 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1537 case SAMPLING_RATE_352P8KHZ:
1538 sample_rate_val = 11;
1539 break;
1540 case SAMPLING_RATE_384KHZ:
1541 sample_rate_val = 12;
1542 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1543 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1544 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1545 break;
1546 }
1547 return sample_rate_val;
1548}
1549
1550static int cdc_dma_get_sample_rate(int value)
1551{
1552 int sample_rate = 0;
1553
1554 switch (value) {
1555 case 0:
1556 sample_rate = SAMPLING_RATE_8KHZ;
1557 break;
1558 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1559 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1560 break;
1561 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1562 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1563 break;
1564 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1565 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1566 break;
1567 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1568 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1569 break;
1570 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1571 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1572 break;
1573 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1574 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1575 break;
1576 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1577 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1578 break;
1579 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1580 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1581 break;
1582 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1583 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1584 break;
1585 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1586 sample_rate = SAMPLING_RATE_192KHZ;
1587 break;
1588 case 11:
1589 sample_rate = SAMPLING_RATE_352P8KHZ;
1590 break;
1591 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1592 sample_rate = SAMPLING_RATE_384KHZ;
1593 break;
1594 default:
1595 sample_rate = SAMPLING_RATE_48KHZ;
1596 break;
1597 }
1598 return sample_rate;
1599}
1600
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1601static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1602 struct snd_ctl_elem_value *ucontrol)
1603{
1604 int ch_num = cdc_dma_get_port_idx(kcontrol);
1605
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1606 if (ch_num < 0) {
1607 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1608 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1609 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1610
1611 ucontrol->value.enumerated.item[0] =
1612 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1613
1614 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1615 cdc_dma_rx_cfg[ch_num].sample_rate);
1616 return 0;
1617}
1618
1619static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1620 struct snd_ctl_elem_value *ucontrol)
1621{
1622 int ch_num = cdc_dma_get_port_idx(kcontrol);
1623
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1624 if (ch_num < 0) {
1625 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1626 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1627 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1628
1629 cdc_dma_rx_cfg[ch_num].sample_rate =
1630 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1631
1632
1633 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1634 __func__, ucontrol->value.enumerated.item[0],
1635 cdc_dma_rx_cfg[ch_num].sample_rate);
1636 return 0;
1637}
1638
1639static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1640 struct snd_ctl_elem_value *ucontrol)
1641{
1642 int ch_num = cdc_dma_get_port_idx(kcontrol);
1643
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1644 if (ch_num < 0) {
1645 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1646 return ch_num;
1647 }
1648
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1649 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1650 cdc_dma_tx_cfg[ch_num].channels);
1651 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1652 return 0;
1653}
1654
1655static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1656 struct snd_ctl_elem_value *ucontrol)
1657{
1658 int ch_num = cdc_dma_get_port_idx(kcontrol);
1659
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1660 if (ch_num < 0) {
1661 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1662 return ch_num;
1663 }
1664
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1665 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1666
1667 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1668 cdc_dma_tx_cfg[ch_num].channels);
1669 return 1;
1670}
1671
1672static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1673 struct snd_ctl_elem_value *ucontrol)
1674{
1675 int sample_rate_val;
1676 int ch_num = cdc_dma_get_port_idx(kcontrol);
1677
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1678 if (ch_num < 0) {
1679 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1680 return ch_num;
1681 }
1682
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1683 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1684 case SAMPLING_RATE_384KHZ:
1685 sample_rate_val = 12;
1686 break;
1687 case SAMPLING_RATE_352P8KHZ:
1688 sample_rate_val = 11;
1689 break;
1690 case SAMPLING_RATE_192KHZ:
1691 sample_rate_val = 10;
1692 break;
1693 case SAMPLING_RATE_176P4KHZ:
1694 sample_rate_val = 9;
1695 break;
1696 case SAMPLING_RATE_96KHZ:
1697 sample_rate_val = 8;
1698 break;
1699 case SAMPLING_RATE_88P2KHZ:
1700 sample_rate_val = 7;
1701 break;
1702 case SAMPLING_RATE_48KHZ:
1703 sample_rate_val = 6;
1704 break;
1705 case SAMPLING_RATE_44P1KHZ:
1706 sample_rate_val = 5;
1707 break;
1708 case SAMPLING_RATE_32KHZ:
1709 sample_rate_val = 4;
1710 break;
1711 case SAMPLING_RATE_22P05KHZ:
1712 sample_rate_val = 3;
1713 break;
1714 case SAMPLING_RATE_16KHZ:
1715 sample_rate_val = 2;
1716 break;
1717 case SAMPLING_RATE_11P025KHZ:
1718 sample_rate_val = 1;
1719 break;
1720 case SAMPLING_RATE_8KHZ:
1721 sample_rate_val = 0;
1722 break;
1723 default:
1724 sample_rate_val = 6;
1725 break;
1726 }
1727
1728 ucontrol->value.integer.value[0] = sample_rate_val;
1729 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1730 cdc_dma_tx_cfg[ch_num].sample_rate);
1731 return 0;
1732}
1733
1734static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1735 struct snd_ctl_elem_value *ucontrol)
1736{
1737 int ch_num = cdc_dma_get_port_idx(kcontrol);
1738
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1739 if (ch_num < 0) {
1740 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1741 return ch_num;
1742 }
1743
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1744 switch (ucontrol->value.integer.value[0]) {
1745 case 12:
1746 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1747 break;
1748 case 11:
1749 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1750 break;
1751 case 10:
1752 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1753 break;
1754 case 9:
1755 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1756 break;
1757 case 8:
1758 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1759 break;
1760 case 7:
1761 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1762 break;
1763 case 6:
1764 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1765 break;
1766 case 5:
1767 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1768 break;
1769 case 4:
1770 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1771 break;
1772 case 3:
1773 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1774 break;
1775 case 2:
1776 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1777 break;
1778 case 1:
1779 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1780 break;
1781 case 0:
1782 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1783 break;
1784 default:
1785 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1786 break;
1787 }
1788
1789 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1790 __func__, ucontrol->value.integer.value[0],
1791 cdc_dma_tx_cfg[ch_num].sample_rate);
1792 return 0;
1793}
1794
1795static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1796 struct snd_ctl_elem_value *ucontrol)
1797{
1798 int ch_num = cdc_dma_get_port_idx(kcontrol);
1799
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1800 if (ch_num < 0) {
1801 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1802 return ch_num;
1803 }
1804
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1805 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1806 case SNDRV_PCM_FORMAT_S32_LE:
1807 ucontrol->value.integer.value[0] = 3;
1808 break;
1809 case SNDRV_PCM_FORMAT_S24_3LE:
1810 ucontrol->value.integer.value[0] = 2;
1811 break;
1812 case SNDRV_PCM_FORMAT_S24_LE:
1813 ucontrol->value.integer.value[0] = 1;
1814 break;
1815 case SNDRV_PCM_FORMAT_S16_LE:
1816 default:
1817 ucontrol->value.integer.value[0] = 0;
1818 break;
1819 }
1820
1821 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1822 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1823 ucontrol->value.integer.value[0]);
1824 return 0;
1825}
1826
1827static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1828 struct snd_ctl_elem_value *ucontrol)
1829{
1830 int rc = 0;
1831 int ch_num = cdc_dma_get_port_idx(kcontrol);
1832
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1833 if (ch_num < 0) {
1834 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1835 return ch_num;
1836 }
1837
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1838 switch (ucontrol->value.integer.value[0]) {
1839 case 3:
1840 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1841 break;
1842 case 2:
1843 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1844 break;
1845 case 1:
1846 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1847 break;
1848 case 0:
1849 default:
1850 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1851 break;
1852 }
1853 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1854 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1855 ucontrol->value.integer.value[0]);
1856
1857 return rc;
1858}
1859
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1860static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1861 struct snd_ctl_elem_value *ucontrol)
1862{
1863 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1864 usb_rx_cfg.channels);
1865 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1866 return 0;
1867}
1868
1869static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1870 struct snd_ctl_elem_value *ucontrol)
1871{
1872 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1873
1874 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1875 return 1;
1876}
1877
1878static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1879 struct snd_ctl_elem_value *ucontrol)
1880{
1881 int sample_rate_val;
1882
1883 switch (usb_rx_cfg.sample_rate) {
1884 case SAMPLING_RATE_384KHZ:
1885 sample_rate_val = 12;
1886 break;
1887 case SAMPLING_RATE_352P8KHZ:
1888 sample_rate_val = 11;
1889 break;
1890 case SAMPLING_RATE_192KHZ:
1891 sample_rate_val = 10;
1892 break;
1893 case SAMPLING_RATE_176P4KHZ:
1894 sample_rate_val = 9;
1895 break;
1896 case SAMPLING_RATE_96KHZ:
1897 sample_rate_val = 8;
1898 break;
1899 case SAMPLING_RATE_88P2KHZ:
1900 sample_rate_val = 7;
1901 break;
1902 case SAMPLING_RATE_48KHZ:
1903 sample_rate_val = 6;
1904 break;
1905 case SAMPLING_RATE_44P1KHZ:
1906 sample_rate_val = 5;
1907 break;
1908 case SAMPLING_RATE_32KHZ:
1909 sample_rate_val = 4;
1910 break;
1911 case SAMPLING_RATE_22P05KHZ:
1912 sample_rate_val = 3;
1913 break;
1914 case SAMPLING_RATE_16KHZ:
1915 sample_rate_val = 2;
1916 break;
1917 case SAMPLING_RATE_11P025KHZ:
1918 sample_rate_val = 1;
1919 break;
1920 case SAMPLING_RATE_8KHZ:
1921 default:
1922 sample_rate_val = 0;
1923 break;
1924 }
1925
1926 ucontrol->value.integer.value[0] = sample_rate_val;
1927 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1928 usb_rx_cfg.sample_rate);
1929 return 0;
1930}
1931
1932static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1933 struct snd_ctl_elem_value *ucontrol)
1934{
1935 switch (ucontrol->value.integer.value[0]) {
1936 case 12:
1937 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1938 break;
1939 case 11:
1940 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1941 break;
1942 case 10:
1943 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1944 break;
1945 case 9:
1946 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1947 break;
1948 case 8:
1949 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1950 break;
1951 case 7:
1952 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1953 break;
1954 case 6:
1955 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1956 break;
1957 case 5:
1958 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1959 break;
1960 case 4:
1961 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1962 break;
1963 case 3:
1964 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1965 break;
1966 case 2:
1967 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1968 break;
1969 case 1:
1970 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1971 break;
1972 case 0:
1973 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1974 break;
1975 default:
1976 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1977 break;
1978 }
1979
1980 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1981 __func__, ucontrol->value.integer.value[0],
1982 usb_rx_cfg.sample_rate);
1983 return 0;
1984}
1985
1986static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1987 struct snd_ctl_elem_value *ucontrol)
1988{
1989 switch (usb_rx_cfg.bit_format) {
1990 case SNDRV_PCM_FORMAT_S32_LE:
1991 ucontrol->value.integer.value[0] = 3;
1992 break;
1993 case SNDRV_PCM_FORMAT_S24_3LE:
1994 ucontrol->value.integer.value[0] = 2;
1995 break;
1996 case SNDRV_PCM_FORMAT_S24_LE:
1997 ucontrol->value.integer.value[0] = 1;
1998 break;
1999 case SNDRV_PCM_FORMAT_S16_LE:
2000 default:
2001 ucontrol->value.integer.value[0] = 0;
2002 break;
2003 }
2004
2005 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2006 __func__, usb_rx_cfg.bit_format,
2007 ucontrol->value.integer.value[0]);
2008 return 0;
2009}
2010
2011static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
2012 struct snd_ctl_elem_value *ucontrol)
2013{
2014 int rc = 0;
2015
2016 switch (ucontrol->value.integer.value[0]) {
2017 case 3:
2018 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2019 break;
2020 case 2:
2021 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2022 break;
2023 case 1:
2024 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2025 break;
2026 case 0:
2027 default:
2028 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2029 break;
2030 }
2031 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2032 __func__, usb_rx_cfg.bit_format,
2033 ucontrol->value.integer.value[0]);
2034
2035 return rc;
2036}
2037
2038static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2039 struct snd_ctl_elem_value *ucontrol)
2040{
2041 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2042 usb_tx_cfg.channels);
2043 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2044 return 0;
2045}
2046
2047static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2048 struct snd_ctl_elem_value *ucontrol)
2049{
2050 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2051
2052 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2053 return 1;
2054}
2055
2056static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2057 struct snd_ctl_elem_value *ucontrol)
2058{
2059 int sample_rate_val;
2060
2061 switch (usb_tx_cfg.sample_rate) {
2062 case SAMPLING_RATE_384KHZ:
2063 sample_rate_val = 12;
2064 break;
2065 case SAMPLING_RATE_352P8KHZ:
2066 sample_rate_val = 11;
2067 break;
2068 case SAMPLING_RATE_192KHZ:
2069 sample_rate_val = 10;
2070 break;
2071 case SAMPLING_RATE_176P4KHZ:
2072 sample_rate_val = 9;
2073 break;
2074 case SAMPLING_RATE_96KHZ:
2075 sample_rate_val = 8;
2076 break;
2077 case SAMPLING_RATE_88P2KHZ:
2078 sample_rate_val = 7;
2079 break;
2080 case SAMPLING_RATE_48KHZ:
2081 sample_rate_val = 6;
2082 break;
2083 case SAMPLING_RATE_44P1KHZ:
2084 sample_rate_val = 5;
2085 break;
2086 case SAMPLING_RATE_32KHZ:
2087 sample_rate_val = 4;
2088 break;
2089 case SAMPLING_RATE_22P05KHZ:
2090 sample_rate_val = 3;
2091 break;
2092 case SAMPLING_RATE_16KHZ:
2093 sample_rate_val = 2;
2094 break;
2095 case SAMPLING_RATE_11P025KHZ:
2096 sample_rate_val = 1;
2097 break;
2098 case SAMPLING_RATE_8KHZ:
2099 sample_rate_val = 0;
2100 break;
2101 default:
2102 sample_rate_val = 6;
2103 break;
2104 }
2105
2106 ucontrol->value.integer.value[0] = sample_rate_val;
2107 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2108 usb_tx_cfg.sample_rate);
2109 return 0;
2110}
2111
2112static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2113 struct snd_ctl_elem_value *ucontrol)
2114{
2115 switch (ucontrol->value.integer.value[0]) {
2116 case 12:
2117 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2118 break;
2119 case 11:
2120 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2121 break;
2122 case 10:
2123 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2124 break;
2125 case 9:
2126 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2127 break;
2128 case 8:
2129 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2130 break;
2131 case 7:
2132 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2133 break;
2134 case 6:
2135 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2136 break;
2137 case 5:
2138 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2139 break;
2140 case 4:
2141 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2142 break;
2143 case 3:
2144 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2145 break;
2146 case 2:
2147 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2148 break;
2149 case 1:
2150 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2151 break;
2152 case 0:
2153 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2154 break;
2155 default:
2156 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2157 break;
2158 }
2159
2160 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2161 __func__, ucontrol->value.integer.value[0],
2162 usb_tx_cfg.sample_rate);
2163 return 0;
2164}
2165
2166static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2167 struct snd_ctl_elem_value *ucontrol)
2168{
2169 switch (usb_tx_cfg.bit_format) {
2170 case SNDRV_PCM_FORMAT_S32_LE:
2171 ucontrol->value.integer.value[0] = 3;
2172 break;
2173 case SNDRV_PCM_FORMAT_S24_3LE:
2174 ucontrol->value.integer.value[0] = 2;
2175 break;
2176 case SNDRV_PCM_FORMAT_S24_LE:
2177 ucontrol->value.integer.value[0] = 1;
2178 break;
2179 case SNDRV_PCM_FORMAT_S16_LE:
2180 default:
2181 ucontrol->value.integer.value[0] = 0;
2182 break;
2183 }
2184
2185 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2186 __func__, usb_tx_cfg.bit_format,
2187 ucontrol->value.integer.value[0]);
2188 return 0;
2189}
2190
2191static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2192 struct snd_ctl_elem_value *ucontrol)
2193{
2194 int rc = 0;
2195
2196 switch (ucontrol->value.integer.value[0]) {
2197 case 3:
2198 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2199 break;
2200 case 2:
2201 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2202 break;
2203 case 1:
2204 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2205 break;
2206 case 0:
2207 default:
2208 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2209 break;
2210 }
2211 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2212 __func__, usb_tx_cfg.bit_format,
2213 ucontrol->value.integer.value[0]);
2214
2215 return rc;
2216}
2217
2218static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2219{
2220 int idx;
2221
2222 if (strnstr(kcontrol->id.name, "Display Port RX",
2223 sizeof("Display Port RX"))) {
2224 idx = DP_RX_IDX;
2225 } else {
2226 pr_err("%s: unsupported BE: %s\n",
2227 __func__, kcontrol->id.name);
2228 idx = -EINVAL;
2229 }
2230
2231 return idx;
2232}
2233
2234static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2235 struct snd_ctl_elem_value *ucontrol)
2236{
2237 int idx = ext_disp_get_port_idx(kcontrol);
2238
2239 if (idx < 0)
2240 return idx;
2241
2242 switch (ext_disp_rx_cfg[idx].bit_format) {
2243 case SNDRV_PCM_FORMAT_S24_3LE:
2244 ucontrol->value.integer.value[0] = 2;
2245 break;
2246 case SNDRV_PCM_FORMAT_S24_LE:
2247 ucontrol->value.integer.value[0] = 1;
2248 break;
2249 case SNDRV_PCM_FORMAT_S16_LE:
2250 default:
2251 ucontrol->value.integer.value[0] = 0;
2252 break;
2253 }
2254
2255 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2256 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2257 ucontrol->value.integer.value[0]);
2258 return 0;
2259}
2260
2261static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2262 struct snd_ctl_elem_value *ucontrol)
2263{
2264 int idx = ext_disp_get_port_idx(kcontrol);
2265
2266 if (idx < 0)
2267 return idx;
2268
2269 switch (ucontrol->value.integer.value[0]) {
2270 case 2:
2271 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2272 break;
2273 case 1:
2274 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2275 break;
2276 case 0:
2277 default:
2278 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2279 break;
2280 }
2281 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2282 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2283 ucontrol->value.integer.value[0]);
2284
2285 return 0;
2286}
2287
2288static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2289 struct snd_ctl_elem_value *ucontrol)
2290{
2291 int idx = ext_disp_get_port_idx(kcontrol);
2292
2293 if (idx < 0)
2294 return idx;
2295
2296 ucontrol->value.integer.value[0] =
2297 ext_disp_rx_cfg[idx].channels - 2;
2298
2299 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2300 idx, ext_disp_rx_cfg[idx].channels);
2301
2302 return 0;
2303}
2304
2305static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2306 struct snd_ctl_elem_value *ucontrol)
2307{
2308 int idx = ext_disp_get_port_idx(kcontrol);
2309
2310 if (idx < 0)
2311 return idx;
2312
2313 ext_disp_rx_cfg[idx].channels =
2314 ucontrol->value.integer.value[0] + 2;
2315
2316 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2317 idx, ext_disp_rx_cfg[idx].channels);
2318 return 1;
2319}
2320
2321static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2322 struct snd_ctl_elem_value *ucontrol)
2323{
2324 int sample_rate_val;
2325 int idx = ext_disp_get_port_idx(kcontrol);
2326
2327 if (idx < 0)
2328 return idx;
2329
2330 switch (ext_disp_rx_cfg[idx].sample_rate) {
2331 case SAMPLING_RATE_176P4KHZ:
2332 sample_rate_val = 6;
2333 break;
2334
2335 case SAMPLING_RATE_88P2KHZ:
2336 sample_rate_val = 5;
2337 break;
2338
2339 case SAMPLING_RATE_44P1KHZ:
2340 sample_rate_val = 4;
2341 break;
2342
2343 case SAMPLING_RATE_32KHZ:
2344 sample_rate_val = 3;
2345 break;
2346
2347 case SAMPLING_RATE_192KHZ:
2348 sample_rate_val = 2;
2349 break;
2350
2351 case SAMPLING_RATE_96KHZ:
2352 sample_rate_val = 1;
2353 break;
2354
2355 case SAMPLING_RATE_48KHZ:
2356 default:
2357 sample_rate_val = 0;
2358 break;
2359 }
2360
2361 ucontrol->value.integer.value[0] = sample_rate_val;
2362 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2363 idx, ext_disp_rx_cfg[idx].sample_rate);
2364
2365 return 0;
2366}
2367
2368static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2369 struct snd_ctl_elem_value *ucontrol)
2370{
2371 int idx = ext_disp_get_port_idx(kcontrol);
2372
2373 if (idx < 0)
2374 return idx;
2375
2376 switch (ucontrol->value.integer.value[0]) {
2377 case 6:
2378 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2379 break;
2380 case 5:
2381 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2382 break;
2383 case 4:
2384 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2385 break;
2386 case 3:
2387 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2388 break;
2389 case 2:
2390 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2391 break;
2392 case 1:
2393 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2394 break;
2395 case 0:
2396 default:
2397 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2398 break;
2399 }
2400
2401 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2402 __func__, ucontrol->value.integer.value[0], idx,
2403 ext_disp_rx_cfg[idx].sample_rate);
2404 return 0;
2405}
2406
2407static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2408 struct snd_ctl_elem_value *ucontrol)
2409{
2410 pr_debug("%s: proxy_rx channels = %d\n",
2411 __func__, proxy_rx_cfg.channels);
2412 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2413
2414 return 0;
2415}
2416
2417static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2418 struct snd_ctl_elem_value *ucontrol)
2419{
2420 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2421 pr_debug("%s: proxy_rx channels = %d\n",
2422 __func__, proxy_rx_cfg.channels);
2423
2424 return 1;
2425}
2426
2427static int tdm_get_sample_rate(int value)
2428{
2429 int sample_rate = 0;
2430
2431 switch (value) {
2432 case 0:
2433 sample_rate = SAMPLING_RATE_8KHZ;
2434 break;
2435 case 1:
2436 sample_rate = SAMPLING_RATE_16KHZ;
2437 break;
2438 case 2:
2439 sample_rate = SAMPLING_RATE_32KHZ;
2440 break;
2441 case 3:
2442 sample_rate = SAMPLING_RATE_48KHZ;
2443 break;
2444 case 4:
2445 sample_rate = SAMPLING_RATE_176P4KHZ;
2446 break;
2447 case 5:
2448 sample_rate = SAMPLING_RATE_352P8KHZ;
2449 break;
2450 default:
2451 sample_rate = SAMPLING_RATE_48KHZ;
2452 break;
2453 }
2454 return sample_rate;
2455}
2456
2457static int aux_pcm_get_sample_rate(int value)
2458{
2459 int sample_rate;
2460
2461 switch (value) {
2462 case 1:
2463 sample_rate = SAMPLING_RATE_16KHZ;
2464 break;
2465 case 0:
2466 default:
2467 sample_rate = SAMPLING_RATE_8KHZ;
2468 break;
2469 }
2470 return sample_rate;
2471}
2472
2473static int tdm_get_sample_rate_val(int sample_rate)
2474{
2475 int sample_rate_val = 0;
2476
2477 switch (sample_rate) {
2478 case SAMPLING_RATE_8KHZ:
2479 sample_rate_val = 0;
2480 break;
2481 case SAMPLING_RATE_16KHZ:
2482 sample_rate_val = 1;
2483 break;
2484 case SAMPLING_RATE_32KHZ:
2485 sample_rate_val = 2;
2486 break;
2487 case SAMPLING_RATE_48KHZ:
2488 sample_rate_val = 3;
2489 break;
2490 case SAMPLING_RATE_176P4KHZ:
2491 sample_rate_val = 4;
2492 break;
2493 case SAMPLING_RATE_352P8KHZ:
2494 sample_rate_val = 5;
2495 break;
2496 default:
2497 sample_rate_val = 3;
2498 break;
2499 }
2500 return sample_rate_val;
2501}
2502
2503static int aux_pcm_get_sample_rate_val(int sample_rate)
2504{
2505 int sample_rate_val;
2506
2507 switch (sample_rate) {
2508 case SAMPLING_RATE_16KHZ:
2509 sample_rate_val = 1;
2510 break;
2511 case SAMPLING_RATE_8KHZ:
2512 default:
2513 sample_rate_val = 0;
2514 break;
2515 }
2516 return sample_rate_val;
2517}
2518
2519static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2520 struct tdm_port *port)
2521{
2522 if (port) {
2523 if (strnstr(kcontrol->id.name, "PRI",
2524 sizeof(kcontrol->id.name))) {
2525 port->mode = TDM_PRI;
2526 } else if (strnstr(kcontrol->id.name, "SEC",
2527 sizeof(kcontrol->id.name))) {
2528 port->mode = TDM_SEC;
2529 } else if (strnstr(kcontrol->id.name, "TERT",
2530 sizeof(kcontrol->id.name))) {
2531 port->mode = TDM_TERT;
2532 } else if (strnstr(kcontrol->id.name, "QUAT",
2533 sizeof(kcontrol->id.name))) {
2534 port->mode = TDM_QUAT;
2535 } else if (strnstr(kcontrol->id.name, "QUIN",
2536 sizeof(kcontrol->id.name))) {
2537 port->mode = TDM_QUIN;
2538 } else {
2539 pr_err("%s: unsupported mode in: %s\n",
2540 __func__, kcontrol->id.name);
2541 return -EINVAL;
2542 }
2543
2544 if (strnstr(kcontrol->id.name, "RX_0",
2545 sizeof(kcontrol->id.name)) ||
2546 strnstr(kcontrol->id.name, "TX_0",
2547 sizeof(kcontrol->id.name))) {
2548 port->channel = TDM_0;
2549 } else if (strnstr(kcontrol->id.name, "RX_1",
2550 sizeof(kcontrol->id.name)) ||
2551 strnstr(kcontrol->id.name, "TX_1",
2552 sizeof(kcontrol->id.name))) {
2553 port->channel = TDM_1;
2554 } else if (strnstr(kcontrol->id.name, "RX_2",
2555 sizeof(kcontrol->id.name)) ||
2556 strnstr(kcontrol->id.name, "TX_2",
2557 sizeof(kcontrol->id.name))) {
2558 port->channel = TDM_2;
2559 } else if (strnstr(kcontrol->id.name, "RX_3",
2560 sizeof(kcontrol->id.name)) ||
2561 strnstr(kcontrol->id.name, "TX_3",
2562 sizeof(kcontrol->id.name))) {
2563 port->channel = TDM_3;
2564 } else if (strnstr(kcontrol->id.name, "RX_4",
2565 sizeof(kcontrol->id.name)) ||
2566 strnstr(kcontrol->id.name, "TX_4",
2567 sizeof(kcontrol->id.name))) {
2568 port->channel = TDM_4;
2569 } else if (strnstr(kcontrol->id.name, "RX_5",
2570 sizeof(kcontrol->id.name)) ||
2571 strnstr(kcontrol->id.name, "TX_5",
2572 sizeof(kcontrol->id.name))) {
2573 port->channel = TDM_5;
2574 } else if (strnstr(kcontrol->id.name, "RX_6",
2575 sizeof(kcontrol->id.name)) ||
2576 strnstr(kcontrol->id.name, "TX_6",
2577 sizeof(kcontrol->id.name))) {
2578 port->channel = TDM_6;
2579 } else if (strnstr(kcontrol->id.name, "RX_7",
2580 sizeof(kcontrol->id.name)) ||
2581 strnstr(kcontrol->id.name, "TX_7",
2582 sizeof(kcontrol->id.name))) {
2583 port->channel = TDM_7;
2584 } else {
2585 pr_err("%s: unsupported channel in: %s\n",
2586 __func__, kcontrol->id.name);
2587 return -EINVAL;
2588 }
2589 } else {
2590 return -EINVAL;
2591 }
2592 return 0;
2593}
2594
2595static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct tdm_port port;
2599 int ret = tdm_get_port_idx(kcontrol, &port);
2600
2601 if (ret) {
2602 pr_err("%s: unsupported control: %s\n",
2603 __func__, kcontrol->id.name);
2604 } else {
2605 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2606 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2607
2608 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2609 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2610 ucontrol->value.enumerated.item[0]);
2611 }
2612 return ret;
2613}
2614
2615static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2616 struct snd_ctl_elem_value *ucontrol)
2617{
2618 struct tdm_port port;
2619 int ret = tdm_get_port_idx(kcontrol, &port);
2620
2621 if (ret) {
2622 pr_err("%s: unsupported control: %s\n",
2623 __func__, kcontrol->id.name);
2624 } else {
2625 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2626 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2627
2628 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2629 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2630 ucontrol->value.enumerated.item[0]);
2631 }
2632 return ret;
2633}
2634
2635static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2636 struct snd_ctl_elem_value *ucontrol)
2637{
2638 struct tdm_port port;
2639 int ret = tdm_get_port_idx(kcontrol, &port);
2640
2641 if (ret) {
2642 pr_err("%s: unsupported control: %s\n",
2643 __func__, kcontrol->id.name);
2644 } else {
2645 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2646 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2647
2648 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2649 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2650 ucontrol->value.enumerated.item[0]);
2651 }
2652 return ret;
2653}
2654
2655static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2656 struct snd_ctl_elem_value *ucontrol)
2657{
2658 struct tdm_port port;
2659 int ret = tdm_get_port_idx(kcontrol, &port);
2660
2661 if (ret) {
2662 pr_err("%s: unsupported control: %s\n",
2663 __func__, kcontrol->id.name);
2664 } else {
2665 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2666 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2667
2668 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2669 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2670 ucontrol->value.enumerated.item[0]);
2671 }
2672 return ret;
2673}
2674
2675static int tdm_get_format(int value)
2676{
2677 int format = 0;
2678
2679 switch (value) {
2680 case 0:
2681 format = SNDRV_PCM_FORMAT_S16_LE;
2682 break;
2683 case 1:
2684 format = SNDRV_PCM_FORMAT_S24_LE;
2685 break;
2686 case 2:
2687 format = SNDRV_PCM_FORMAT_S32_LE;
2688 break;
2689 default:
2690 format = SNDRV_PCM_FORMAT_S16_LE;
2691 break;
2692 }
2693 return format;
2694}
2695
2696static int tdm_get_format_val(int format)
2697{
2698 int value = 0;
2699
2700 switch (format) {
2701 case SNDRV_PCM_FORMAT_S16_LE:
2702 value = 0;
2703 break;
2704 case SNDRV_PCM_FORMAT_S24_LE:
2705 value = 1;
2706 break;
2707 case SNDRV_PCM_FORMAT_S32_LE:
2708 value = 2;
2709 break;
2710 default:
2711 value = 0;
2712 break;
2713 }
2714 return value;
2715}
2716
2717static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2718 struct snd_ctl_elem_value *ucontrol)
2719{
2720 struct tdm_port port;
2721 int ret = tdm_get_port_idx(kcontrol, &port);
2722
2723 if (ret) {
2724 pr_err("%s: unsupported control: %s\n",
2725 __func__, kcontrol->id.name);
2726 } else {
2727 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2728 tdm_rx_cfg[port.mode][port.channel].bit_format);
2729
2730 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2731 tdm_rx_cfg[port.mode][port.channel].bit_format,
2732 ucontrol->value.enumerated.item[0]);
2733 }
2734 return ret;
2735}
2736
2737static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2738 struct snd_ctl_elem_value *ucontrol)
2739{
2740 struct tdm_port port;
2741 int ret = tdm_get_port_idx(kcontrol, &port);
2742
2743 if (ret) {
2744 pr_err("%s: unsupported control: %s\n",
2745 __func__, kcontrol->id.name);
2746 } else {
2747 tdm_rx_cfg[port.mode][port.channel].bit_format =
2748 tdm_get_format(ucontrol->value.enumerated.item[0]);
2749
2750 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2751 tdm_rx_cfg[port.mode][port.channel].bit_format,
2752 ucontrol->value.enumerated.item[0]);
2753 }
2754 return ret;
2755}
2756
2757static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2758 struct snd_ctl_elem_value *ucontrol)
2759{
2760 struct tdm_port port;
2761 int ret = tdm_get_port_idx(kcontrol, &port);
2762
2763 if (ret) {
2764 pr_err("%s: unsupported control: %s\n",
2765 __func__, kcontrol->id.name);
2766 } else {
2767 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2768 tdm_tx_cfg[port.mode][port.channel].bit_format);
2769
2770 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2771 tdm_tx_cfg[port.mode][port.channel].bit_format,
2772 ucontrol->value.enumerated.item[0]);
2773 }
2774 return ret;
2775}
2776
2777static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2778 struct snd_ctl_elem_value *ucontrol)
2779{
2780 struct tdm_port port;
2781 int ret = tdm_get_port_idx(kcontrol, &port);
2782
2783 if (ret) {
2784 pr_err("%s: unsupported control: %s\n",
2785 __func__, kcontrol->id.name);
2786 } else {
2787 tdm_tx_cfg[port.mode][port.channel].bit_format =
2788 tdm_get_format(ucontrol->value.enumerated.item[0]);
2789
2790 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2791 tdm_tx_cfg[port.mode][port.channel].bit_format,
2792 ucontrol->value.enumerated.item[0]);
2793 }
2794 return ret;
2795}
2796
2797static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2798 struct snd_ctl_elem_value *ucontrol)
2799{
2800 struct tdm_port port;
2801 int ret = tdm_get_port_idx(kcontrol, &port);
2802
2803 if (ret) {
2804 pr_err("%s: unsupported control: %s\n",
2805 __func__, kcontrol->id.name);
2806 } else {
2807
2808 ucontrol->value.enumerated.item[0] =
2809 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2810
2811 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2812 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2813 ucontrol->value.enumerated.item[0]);
2814 }
2815 return ret;
2816}
2817
2818static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2819 struct snd_ctl_elem_value *ucontrol)
2820{
2821 struct tdm_port port;
2822 int ret = tdm_get_port_idx(kcontrol, &port);
2823
2824 if (ret) {
2825 pr_err("%s: unsupported control: %s\n",
2826 __func__, kcontrol->id.name);
2827 } else {
2828 tdm_rx_cfg[port.mode][port.channel].channels =
2829 ucontrol->value.enumerated.item[0] + 1;
2830
2831 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2832 tdm_rx_cfg[port.mode][port.channel].channels,
2833 ucontrol->value.enumerated.item[0] + 1);
2834 }
2835 return ret;
2836}
2837
2838static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2839 struct snd_ctl_elem_value *ucontrol)
2840{
2841 struct tdm_port port;
2842 int ret = tdm_get_port_idx(kcontrol, &port);
2843
2844 if (ret) {
2845 pr_err("%s: unsupported control: %s\n",
2846 __func__, kcontrol->id.name);
2847 } else {
2848 ucontrol->value.enumerated.item[0] =
2849 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2850
2851 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2852 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2853 ucontrol->value.enumerated.item[0]);
2854 }
2855 return ret;
2856}
2857
2858static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2859 struct snd_ctl_elem_value *ucontrol)
2860{
2861 struct tdm_port port;
2862 int ret = tdm_get_port_idx(kcontrol, &port);
2863
2864 if (ret) {
2865 pr_err("%s: unsupported control: %s\n",
2866 __func__, kcontrol->id.name);
2867 } else {
2868 tdm_tx_cfg[port.mode][port.channel].channels =
2869 ucontrol->value.enumerated.item[0] + 1;
2870
2871 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2872 tdm_tx_cfg[port.mode][port.channel].channels,
2873 ucontrol->value.enumerated.item[0] + 1);
2874 }
2875 return ret;
2876}
2877
2878static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2879{
2880 int idx;
2881
2882 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2883 sizeof("PRIM_AUX_PCM"))) {
2884 idx = PRIM_AUX_PCM;
2885 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2886 sizeof("SEC_AUX_PCM"))) {
2887 idx = SEC_AUX_PCM;
2888 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2889 sizeof("TERT_AUX_PCM"))) {
2890 idx = TERT_AUX_PCM;
2891 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2892 sizeof("QUAT_AUX_PCM"))) {
2893 idx = QUAT_AUX_PCM;
2894 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2895 sizeof("QUIN_AUX_PCM"))) {
2896 idx = QUIN_AUX_PCM;
2897 } else {
2898 pr_err("%s: unsupported port: %s\n",
2899 __func__, kcontrol->id.name);
2900 idx = -EINVAL;
2901 }
2902
2903 return idx;
2904}
2905
2906static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2907 struct snd_ctl_elem_value *ucontrol)
2908{
2909 int idx = aux_pcm_get_port_idx(kcontrol);
2910
2911 if (idx < 0)
2912 return idx;
2913
2914 aux_pcm_rx_cfg[idx].sample_rate =
2915 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2916
2917 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2918 idx, aux_pcm_rx_cfg[idx].sample_rate,
2919 ucontrol->value.enumerated.item[0]);
2920
2921 return 0;
2922}
2923
2924static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2925 struct snd_ctl_elem_value *ucontrol)
2926{
2927 int idx = aux_pcm_get_port_idx(kcontrol);
2928
2929 if (idx < 0)
2930 return idx;
2931
2932 ucontrol->value.enumerated.item[0] =
2933 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2934
2935 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2936 idx, aux_pcm_rx_cfg[idx].sample_rate,
2937 ucontrol->value.enumerated.item[0]);
2938
2939 return 0;
2940}
2941
2942static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2943 struct snd_ctl_elem_value *ucontrol)
2944{
2945 int idx = aux_pcm_get_port_idx(kcontrol);
2946
2947 if (idx < 0)
2948 return idx;
2949
2950 aux_pcm_tx_cfg[idx].sample_rate =
2951 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2952
2953 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2954 idx, aux_pcm_tx_cfg[idx].sample_rate,
2955 ucontrol->value.enumerated.item[0]);
2956
2957 return 0;
2958}
2959
2960static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2961 struct snd_ctl_elem_value *ucontrol)
2962{
2963 int idx = aux_pcm_get_port_idx(kcontrol);
2964
2965 if (idx < 0)
2966 return idx;
2967
2968 ucontrol->value.enumerated.item[0] =
2969 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2970
2971 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2972 idx, aux_pcm_tx_cfg[idx].sample_rate,
2973 ucontrol->value.enumerated.item[0]);
2974
2975 return 0;
2976}
2977
2978static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2979{
2980 int idx;
2981
2982 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2983 sizeof("PRIM_MI2S_RX"))) {
2984 idx = PRIM_MI2S;
2985 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2986 sizeof("SEC_MI2S_RX"))) {
2987 idx = SEC_MI2S;
2988 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2989 sizeof("TERT_MI2S_RX"))) {
2990 idx = TERT_MI2S;
2991 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2992 sizeof("QUAT_MI2S_RX"))) {
2993 idx = QUAT_MI2S;
2994 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2995 sizeof("QUIN_MI2S_RX"))) {
2996 idx = QUIN_MI2S;
2997 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2998 sizeof("PRIM_MI2S_TX"))) {
2999 idx = PRIM_MI2S;
3000 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
3001 sizeof("SEC_MI2S_TX"))) {
3002 idx = SEC_MI2S;
3003 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
3004 sizeof("TERT_MI2S_TX"))) {
3005 idx = TERT_MI2S;
3006 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
3007 sizeof("QUAT_MI2S_TX"))) {
3008 idx = QUAT_MI2S;
3009 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
3010 sizeof("QUIN_MI2S_TX"))) {
3011 idx = QUIN_MI2S;
3012 } else {
3013 pr_err("%s: unsupported channel: %s\n",
3014 __func__, kcontrol->id.name);
3015 idx = -EINVAL;
3016 }
3017
3018 return idx;
3019}
3020
3021static int mi2s_get_sample_rate_val(int sample_rate)
3022{
3023 int sample_rate_val;
3024
3025 switch (sample_rate) {
3026 case SAMPLING_RATE_8KHZ:
3027 sample_rate_val = 0;
3028 break;
3029 case SAMPLING_RATE_11P025KHZ:
3030 sample_rate_val = 1;
3031 break;
3032 case SAMPLING_RATE_16KHZ:
3033 sample_rate_val = 2;
3034 break;
3035 case SAMPLING_RATE_22P05KHZ:
3036 sample_rate_val = 3;
3037 break;
3038 case SAMPLING_RATE_32KHZ:
3039 sample_rate_val = 4;
3040 break;
3041 case SAMPLING_RATE_44P1KHZ:
3042 sample_rate_val = 5;
3043 break;
3044 case SAMPLING_RATE_48KHZ:
3045 sample_rate_val = 6;
3046 break;
3047 case SAMPLING_RATE_96KHZ:
3048 sample_rate_val = 7;
3049 break;
3050 case SAMPLING_RATE_192KHZ:
3051 sample_rate_val = 8;
3052 break;
3053 default:
3054 sample_rate_val = 6;
3055 break;
3056 }
3057 return sample_rate_val;
3058}
3059
3060static int mi2s_get_sample_rate(int value)
3061{
3062 int sample_rate;
3063
3064 switch (value) {
3065 case 0:
3066 sample_rate = SAMPLING_RATE_8KHZ;
3067 break;
3068 case 1:
3069 sample_rate = SAMPLING_RATE_11P025KHZ;
3070 break;
3071 case 2:
3072 sample_rate = SAMPLING_RATE_16KHZ;
3073 break;
3074 case 3:
3075 sample_rate = SAMPLING_RATE_22P05KHZ;
3076 break;
3077 case 4:
3078 sample_rate = SAMPLING_RATE_32KHZ;
3079 break;
3080 case 5:
3081 sample_rate = SAMPLING_RATE_44P1KHZ;
3082 break;
3083 case 6:
3084 sample_rate = SAMPLING_RATE_48KHZ;
3085 break;
3086 case 7:
3087 sample_rate = SAMPLING_RATE_96KHZ;
3088 break;
3089 case 8:
3090 sample_rate = SAMPLING_RATE_192KHZ;
3091 break;
3092 default:
3093 sample_rate = SAMPLING_RATE_48KHZ;
3094 break;
3095 }
3096 return sample_rate;
3097}
3098
3099static int mi2s_auxpcm_get_format(int value)
3100{
3101 int format;
3102
3103 switch (value) {
3104 case 0:
3105 format = SNDRV_PCM_FORMAT_S16_LE;
3106 break;
3107 case 1:
3108 format = SNDRV_PCM_FORMAT_S24_LE;
3109 break;
3110 case 2:
3111 format = SNDRV_PCM_FORMAT_S24_3LE;
3112 break;
3113 case 3:
3114 format = SNDRV_PCM_FORMAT_S32_LE;
3115 break;
3116 default:
3117 format = SNDRV_PCM_FORMAT_S16_LE;
3118 break;
3119 }
3120 return format;
3121}
3122
3123static int mi2s_auxpcm_get_format_value(int format)
3124{
3125 int value;
3126
3127 switch (format) {
3128 case SNDRV_PCM_FORMAT_S16_LE:
3129 value = 0;
3130 break;
3131 case SNDRV_PCM_FORMAT_S24_LE:
3132 value = 1;
3133 break;
3134 case SNDRV_PCM_FORMAT_S24_3LE:
3135 value = 2;
3136 break;
3137 case SNDRV_PCM_FORMAT_S32_LE:
3138 value = 3;
3139 break;
3140 default:
3141 value = 0;
3142 break;
3143 }
3144 return value;
3145}
3146
3147static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3148 struct snd_ctl_elem_value *ucontrol)
3149{
3150 int idx = mi2s_get_port_idx(kcontrol);
3151
3152 if (idx < 0)
3153 return idx;
3154
3155 mi2s_rx_cfg[idx].sample_rate =
3156 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3157
3158 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3159 idx, mi2s_rx_cfg[idx].sample_rate,
3160 ucontrol->value.enumerated.item[0]);
3161
3162 return 0;
3163}
3164
3165static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3166 struct snd_ctl_elem_value *ucontrol)
3167{
3168 int idx = mi2s_get_port_idx(kcontrol);
3169
3170 if (idx < 0)
3171 return idx;
3172
3173 ucontrol->value.enumerated.item[0] =
3174 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3175
3176 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3177 idx, mi2s_rx_cfg[idx].sample_rate,
3178 ucontrol->value.enumerated.item[0]);
3179
3180 return 0;
3181}
3182
3183static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3184 struct snd_ctl_elem_value *ucontrol)
3185{
3186 int idx = mi2s_get_port_idx(kcontrol);
3187
3188 if (idx < 0)
3189 return idx;
3190
3191 mi2s_tx_cfg[idx].sample_rate =
3192 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3193
3194 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3195 idx, mi2s_tx_cfg[idx].sample_rate,
3196 ucontrol->value.enumerated.item[0]);
3197
3198 return 0;
3199}
3200
3201static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3202 struct snd_ctl_elem_value *ucontrol)
3203{
3204 int idx = mi2s_get_port_idx(kcontrol);
3205
3206 if (idx < 0)
3207 return idx;
3208
3209 ucontrol->value.enumerated.item[0] =
3210 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3211
3212 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3213 idx, mi2s_tx_cfg[idx].sample_rate,
3214 ucontrol->value.enumerated.item[0]);
3215
3216 return 0;
3217}
3218
3219static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3220 struct snd_ctl_elem_value *ucontrol)
3221{
3222 int idx = mi2s_get_port_idx(kcontrol);
3223
3224 if (idx < 0)
3225 return idx;
3226
3227 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3228 idx, mi2s_rx_cfg[idx].channels);
3229 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3230
3231 return 0;
3232}
3233
3234static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3235 struct snd_ctl_elem_value *ucontrol)
3236{
3237 int idx = mi2s_get_port_idx(kcontrol);
3238
3239 if (idx < 0)
3240 return idx;
3241
3242 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3243 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3244 idx, mi2s_rx_cfg[idx].channels);
3245
3246 return 1;
3247}
3248
3249static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3250 struct snd_ctl_elem_value *ucontrol)
3251{
3252 int idx = mi2s_get_port_idx(kcontrol);
3253
3254 if (idx < 0)
3255 return idx;
3256
3257 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3258 idx, mi2s_tx_cfg[idx].channels);
3259 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3260
3261 return 0;
3262}
3263
3264static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3265 struct snd_ctl_elem_value *ucontrol)
3266{
3267 int idx = mi2s_get_port_idx(kcontrol);
3268
3269 if (idx < 0)
3270 return idx;
3271
3272 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3273 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3274 idx, mi2s_tx_cfg[idx].channels);
3275
3276 return 1;
3277}
3278
3279static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3280 struct snd_ctl_elem_value *ucontrol)
3281{
3282 int idx = mi2s_get_port_idx(kcontrol);
3283
3284 if (idx < 0)
3285 return idx;
3286
3287 ucontrol->value.enumerated.item[0] =
3288 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3289
3290 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3291 idx, mi2s_rx_cfg[idx].bit_format,
3292 ucontrol->value.enumerated.item[0]);
3293
3294 return 0;
3295}
3296
3297static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3298 struct snd_ctl_elem_value *ucontrol)
3299{
3300 int idx = mi2s_get_port_idx(kcontrol);
3301
3302 if (idx < 0)
3303 return idx;
3304
3305 mi2s_rx_cfg[idx].bit_format =
3306 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3307
3308 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3309 idx, mi2s_rx_cfg[idx].bit_format,
3310 ucontrol->value.enumerated.item[0]);
3311
3312 return 0;
3313}
3314
3315static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3316 struct snd_ctl_elem_value *ucontrol)
3317{
3318 int idx = mi2s_get_port_idx(kcontrol);
3319
3320 if (idx < 0)
3321 return idx;
3322
3323 ucontrol->value.enumerated.item[0] =
3324 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3325
3326 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3327 idx, mi2s_tx_cfg[idx].bit_format,
3328 ucontrol->value.enumerated.item[0]);
3329
3330 return 0;
3331}
3332
3333static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3334 struct snd_ctl_elem_value *ucontrol)
3335{
3336 int idx = mi2s_get_port_idx(kcontrol);
3337
3338 if (idx < 0)
3339 return idx;
3340
3341 mi2s_tx_cfg[idx].bit_format =
3342 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3343
3344 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3345 idx, mi2s_tx_cfg[idx].bit_format,
3346 ucontrol->value.enumerated.item[0]);
3347
3348 return 0;
3349}
3350
3351static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3352 struct snd_ctl_elem_value *ucontrol)
3353{
3354 int idx = aux_pcm_get_port_idx(kcontrol);
3355
3356 if (idx < 0)
3357 return idx;
3358
3359 ucontrol->value.enumerated.item[0] =
3360 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3361
3362 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3363 idx, aux_pcm_rx_cfg[idx].bit_format,
3364 ucontrol->value.enumerated.item[0]);
3365
3366 return 0;
3367}
3368
3369static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3370 struct snd_ctl_elem_value *ucontrol)
3371{
3372 int idx = aux_pcm_get_port_idx(kcontrol);
3373
3374 if (idx < 0)
3375 return idx;
3376
3377 aux_pcm_rx_cfg[idx].bit_format =
3378 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3379
3380 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3381 idx, aux_pcm_rx_cfg[idx].bit_format,
3382 ucontrol->value.enumerated.item[0]);
3383
3384 return 0;
3385}
3386
3387static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3388 struct snd_ctl_elem_value *ucontrol)
3389{
3390 int idx = aux_pcm_get_port_idx(kcontrol);
3391
3392 if (idx < 0)
3393 return idx;
3394
3395 ucontrol->value.enumerated.item[0] =
3396 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3397
3398 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3399 idx, aux_pcm_tx_cfg[idx].bit_format,
3400 ucontrol->value.enumerated.item[0]);
3401
3402 return 0;
3403}
3404
3405static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3406 struct snd_ctl_elem_value *ucontrol)
3407{
3408 int idx = aux_pcm_get_port_idx(kcontrol);
3409
3410 if (idx < 0)
3411 return idx;
3412
3413 aux_pcm_tx_cfg[idx].bit_format =
3414 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3415
3416 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3417 idx, aux_pcm_tx_cfg[idx].bit_format,
3418 ucontrol->value.enumerated.item[0]);
3419
3420 return 0;
3421}
3422
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3423static int msm_hifi_ctrl(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3424{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3425 struct snd_soc_dapm_context *dapm =
3426 snd_soc_component_get_dapm(component);
3427 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3428 struct msm_asoc_mach_data *pdata =
3429 snd_soc_card_get_drvdata(card);
3430
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3431 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3432 msm_hifi_control);
3433
3434 if (!pdata || !pdata->hph_en1_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3435 dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
3436 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3437 return -EINVAL;
3438 }
3439 if (msm_hifi_control == MSM_HIFI_ON) {
3440 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3441 /* 5msec delay needed as per HW requirement */
3442 usleep_range(5000, 5010);
3443 } else {
3444 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3445 }
3446 snd_soc_dapm_sync(dapm);
3447
3448 return 0;
3449}
3450
3451static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3452 struct snd_ctl_elem_value *ucontrol)
3453{
3454 pr_debug("%s: msm_hifi_control = %d\n",
3455 __func__, msm_hifi_control);
3456 ucontrol->value.integer.value[0] = msm_hifi_control;
3457
3458 return 0;
3459}
3460
3461static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3462 struct snd_ctl_elem_value *ucontrol)
3463{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3464 struct snd_soc_component *component =
3465 snd_soc_kcontrol_component(kcontrol);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3466
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3467 dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3468 __func__, ucontrol->value.integer.value[0]);
3469
3470 msm_hifi_control = ucontrol->value.integer.value[0];
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3471 msm_hifi_ctrl(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3472
3473 return 0;
3474}
3475
3476static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3477 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3478 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3479 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3480 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3481 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3482 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3483 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3484 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3485 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3486 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3487 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3488 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3489 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3490 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3491 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3492 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3493 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3494 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3495 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3496 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3497 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3498 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3499 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3500 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3501 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3502 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3503 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3504 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3505 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3506 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3507 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3508 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3509 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3510 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3511 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3512 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3513 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3514 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3515 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3516 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3517 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3518 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3519 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3520 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3521 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3522 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3523 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3524 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3525 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3526 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3527 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3528 wsa_cdc_dma_rx_0_sample_rate,
3529 cdc_dma_rx_sample_rate_get,
3530 cdc_dma_rx_sample_rate_put),
3531 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3532 wsa_cdc_dma_rx_1_sample_rate,
3533 cdc_dma_rx_sample_rate_get,
3534 cdc_dma_rx_sample_rate_put),
3535 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3536 rx_cdc_dma_rx_0_sample_rate,
3537 cdc_dma_rx_sample_rate_get,
3538 cdc_dma_rx_sample_rate_put),
3539 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3540 rx_cdc_dma_rx_1_sample_rate,
3541 cdc_dma_rx_sample_rate_get,
3542 cdc_dma_rx_sample_rate_put),
3543 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3544 rx_cdc_dma_rx_2_sample_rate,
3545 cdc_dma_rx_sample_rate_get,
3546 cdc_dma_rx_sample_rate_put),
3547 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3548 rx_cdc_dma_rx_3_sample_rate,
3549 cdc_dma_rx_sample_rate_get,
3550 cdc_dma_rx_sample_rate_put),
3551 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3552 rx_cdc_dma_rx_5_sample_rate,
3553 cdc_dma_rx_sample_rate_get,
3554 cdc_dma_rx_sample_rate_put),
3555 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3556 wsa_cdc_dma_tx_0_sample_rate,
3557 cdc_dma_tx_sample_rate_get,
3558 cdc_dma_tx_sample_rate_put),
3559 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3560 wsa_cdc_dma_tx_1_sample_rate,
3561 cdc_dma_tx_sample_rate_get,
3562 cdc_dma_tx_sample_rate_put),
3563 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3564 wsa_cdc_dma_tx_2_sample_rate,
3565 cdc_dma_tx_sample_rate_get,
3566 cdc_dma_tx_sample_rate_put),
3567 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3568 tx_cdc_dma_tx_0_sample_rate,
3569 cdc_dma_tx_sample_rate_get,
3570 cdc_dma_tx_sample_rate_put),
3571 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3572 tx_cdc_dma_tx_3_sample_rate,
3573 cdc_dma_tx_sample_rate_get,
3574 cdc_dma_tx_sample_rate_put),
3575 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3576 tx_cdc_dma_tx_4_sample_rate,
3577 cdc_dma_tx_sample_rate_get,
3578 cdc_dma_tx_sample_rate_put),
3579};
3580
3581static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3582 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3583 slim_rx_ch_get, slim_rx_ch_put),
3584 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3585 slim_rx_ch_get, slim_rx_ch_put),
3586 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3587 slim_tx_ch_get, slim_tx_ch_put),
3588 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3589 slim_tx_ch_get, slim_tx_ch_put),
3590 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3591 slim_rx_ch_get, slim_rx_ch_put),
3592 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3593 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3594 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3595 slim_rx_bit_format_get, slim_rx_bit_format_put),
3596 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3597 slim_rx_bit_format_get, slim_rx_bit_format_put),
3598 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3599 slim_rx_bit_format_get, slim_rx_bit_format_put),
3600 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3601 slim_tx_bit_format_get, slim_tx_bit_format_put),
3602 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3603 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3604 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3605 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3606 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3607 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3608 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3609 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3610 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3611 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3612};
3613
3614static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3615 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3616 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3617 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3618 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3619 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3620 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3621 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3622 proxy_rx_ch_get, proxy_rx_ch_put),
3623 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3624 usb_audio_rx_format_get, usb_audio_rx_format_put),
3625 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3626 usb_audio_tx_format_get, usb_audio_tx_format_put),
3627 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3628 ext_disp_rx_format_get, ext_disp_rx_format_put),
3629 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3630 usb_audio_rx_sample_rate_get,
3631 usb_audio_rx_sample_rate_put),
3632 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3633 usb_audio_tx_sample_rate_get,
3634 usb_audio_tx_sample_rate_put),
3635 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3636 ext_disp_rx_sample_rate_get,
3637 ext_disp_rx_sample_rate_put),
3638 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3639 tdm_rx_sample_rate_get,
3640 tdm_rx_sample_rate_put),
3641 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3642 tdm_tx_sample_rate_get,
3643 tdm_tx_sample_rate_put),
3644 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3645 tdm_rx_format_get,
3646 tdm_rx_format_put),
3647 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3648 tdm_tx_format_get,
3649 tdm_tx_format_put),
3650 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3651 tdm_rx_ch_get,
3652 tdm_rx_ch_put),
3653 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3654 tdm_tx_ch_get,
3655 tdm_tx_ch_put),
3656 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3657 tdm_rx_sample_rate_get,
3658 tdm_rx_sample_rate_put),
3659 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3660 tdm_tx_sample_rate_get,
3661 tdm_tx_sample_rate_put),
3662 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3663 tdm_rx_format_get,
3664 tdm_rx_format_put),
3665 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3666 tdm_tx_format_get,
3667 tdm_tx_format_put),
3668 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3669 tdm_rx_ch_get,
3670 tdm_rx_ch_put),
3671 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3672 tdm_tx_ch_get,
3673 tdm_tx_ch_put),
3674 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3675 tdm_rx_sample_rate_get,
3676 tdm_rx_sample_rate_put),
3677 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3678 tdm_tx_sample_rate_get,
3679 tdm_tx_sample_rate_put),
3680 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3681 tdm_rx_format_get,
3682 tdm_rx_format_put),
3683 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3684 tdm_tx_format_get,
3685 tdm_tx_format_put),
3686 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3687 tdm_rx_ch_get,
3688 tdm_rx_ch_put),
3689 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3690 tdm_tx_ch_get,
3691 tdm_tx_ch_put),
3692 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3693 tdm_rx_sample_rate_get,
3694 tdm_rx_sample_rate_put),
3695 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3696 tdm_tx_sample_rate_get,
3697 tdm_tx_sample_rate_put),
3698 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3699 tdm_rx_format_get,
3700 tdm_rx_format_put),
3701 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3702 tdm_tx_format_get,
3703 tdm_tx_format_put),
3704 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3705 tdm_rx_ch_get,
3706 tdm_rx_ch_put),
3707 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3708 tdm_tx_ch_get,
3709 tdm_tx_ch_put),
3710 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3711 tdm_rx_sample_rate_get,
3712 tdm_rx_sample_rate_put),
3713 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3714 tdm_tx_sample_rate_get,
3715 tdm_tx_sample_rate_put),
3716 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3717 tdm_rx_format_get,
3718 tdm_rx_format_put),
3719 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3720 tdm_tx_format_get,
3721 tdm_tx_format_put),
3722 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3723 tdm_rx_ch_get,
3724 tdm_rx_ch_put),
3725 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3726 tdm_tx_ch_get,
3727 tdm_tx_ch_put),
3728 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3729 aux_pcm_rx_sample_rate_get,
3730 aux_pcm_rx_sample_rate_put),
3731 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3732 aux_pcm_rx_sample_rate_get,
3733 aux_pcm_rx_sample_rate_put),
3734 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3735 aux_pcm_rx_sample_rate_get,
3736 aux_pcm_rx_sample_rate_put),
3737 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3738 aux_pcm_rx_sample_rate_get,
3739 aux_pcm_rx_sample_rate_put),
3740 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3741 aux_pcm_rx_sample_rate_get,
3742 aux_pcm_rx_sample_rate_put),
3743 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3744 aux_pcm_tx_sample_rate_get,
3745 aux_pcm_tx_sample_rate_put),
3746 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3747 aux_pcm_tx_sample_rate_get,
3748 aux_pcm_tx_sample_rate_put),
3749 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3750 aux_pcm_tx_sample_rate_get,
3751 aux_pcm_tx_sample_rate_put),
3752 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3753 aux_pcm_tx_sample_rate_get,
3754 aux_pcm_tx_sample_rate_put),
3755 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3756 aux_pcm_tx_sample_rate_get,
3757 aux_pcm_tx_sample_rate_put),
3758 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3759 mi2s_rx_sample_rate_get,
3760 mi2s_rx_sample_rate_put),
3761 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3762 mi2s_rx_sample_rate_get,
3763 mi2s_rx_sample_rate_put),
3764 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3765 mi2s_rx_sample_rate_get,
3766 mi2s_rx_sample_rate_put),
3767 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3768 mi2s_rx_sample_rate_get,
3769 mi2s_rx_sample_rate_put),
3770 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3771 mi2s_rx_sample_rate_get,
3772 mi2s_rx_sample_rate_put),
3773 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3774 mi2s_tx_sample_rate_get,
3775 mi2s_tx_sample_rate_put),
3776 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3777 mi2s_tx_sample_rate_get,
3778 mi2s_tx_sample_rate_put),
3779 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3780 mi2s_tx_sample_rate_get,
3781 mi2s_tx_sample_rate_put),
3782 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3783 mi2s_tx_sample_rate_get,
3784 mi2s_tx_sample_rate_put),
3785 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3786 mi2s_tx_sample_rate_get,
3787 mi2s_tx_sample_rate_put),
3788 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3789 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3790 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3791 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3792 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3793 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3794 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3795 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3796 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3797 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3798 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3799 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3800 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3801 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3802 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3803 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3804 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3805 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3806 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3807 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3808 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3809 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3810 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3811 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3812 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3813 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3814 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3815 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3816 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3817 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3818 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3819 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3820 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3821 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3822 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3823 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3824 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3825 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3826 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3827 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3828 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3829 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3830 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3831 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3832 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3833 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3834 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3835 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3836 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3837 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3838 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3839 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3840 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3841 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3842 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3843 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3844 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3845 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3846 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3847 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3848 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3849 msm_hifi_put),
3850 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3851 msm_bt_sample_rate_get,
3852 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3853 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3854 msm_bt_sample_rate_rx_get,
3855 msm_bt_sample_rate_rx_put),
3856 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3857 msm_bt_sample_rate_tx_get,
3858 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3859 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3860 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3861};
3862
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3863static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3864 int enable, bool dapm)
3865{
3866 int ret = 0;
3867
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3868 if (!strcmp(component->name, "tavil_codec")) {
3869 ret = tavil_cdc_mclk_enable(component, enable);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3870 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3871 dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3872 __func__);
3873 ret = -EINVAL;
3874 }
3875 return ret;
3876}
3877
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3878static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3879 int enable, bool dapm)
3880{
3881 int ret = 0;
3882
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3883 if (!strcmp(component->name, "tavil_codec")) {
3884 ret = tavil_cdc_mclk_tx_enable(component, enable);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3885 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3886 dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3887 __func__);
3888 ret = -EINVAL;
3889 }
3890
3891 return ret;
3892}
3893
3894static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3895 struct snd_kcontrol *kcontrol, int event)
3896{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3897 struct snd_soc_component *component =
3898 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3899
3900 pr_debug("%s: event = %d\n", __func__, event);
3901
3902 switch (event) {
3903 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3904 return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3905 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3906 return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3907 }
3908 return 0;
3909}
3910
3911static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3912 struct snd_kcontrol *kcontrol, int event)
3913{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3914 struct snd_soc_component *component =
3915 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3916
3917 pr_debug("%s: event = %d\n", __func__, event);
3918
3919 switch (event) {
3920 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3921 return msm_snd_enable_codec_ext_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3922 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3923 return msm_snd_enable_codec_ext_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3924 }
3925 return 0;
3926}
3927
3928static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3929 struct snd_kcontrol *k, int event)
3930{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3931 struct snd_soc_component *component =
3932 snd_soc_dapm_to_component(w->dapm);
3933 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3934 struct msm_asoc_mach_data *pdata =
3935 snd_soc_card_get_drvdata(card);
3936
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3937 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3938 __func__, msm_hifi_control);
3939
3940 if (!pdata || !pdata->hph_en0_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3941 dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
3942 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3943 return -EINVAL;
3944 }
3945
3946 if (msm_hifi_control != MSM_HIFI_ON) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3947 dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3948 __func__);
3949 return 0;
3950 }
3951
3952 switch (event) {
3953 case SND_SOC_DAPM_POST_PMU:
3954 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3955 break;
3956 case SND_SOC_DAPM_PRE_PMD:
3957 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3958 break;
3959 }
3960
3961 return 0;
3962}
3963
3964static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3965
3966 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3967 msm_mclk_event,
3968 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3969
3970 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3971 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3972
3973 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3974 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3975 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3976 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3977 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3978 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3979 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3980 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3981
3982 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3983 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3984 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3985 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3986 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3987 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3988};
3989
3990static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3991 struct snd_kcontrol *kcontrol, int event)
3992{
3993 struct msm_asoc_mach_data *pdata = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3994 struct snd_soc_component *component =
3995 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3996 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3997 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3998 int *dmic_gpio_cnt;
3999 struct device_node *dmic_gpio;
4000 char *wname;
4001
4002 wname = strpbrk(w->name, "0123");
4003 if (!wname) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4004 dev_err(component->dev, "%s: widget not found\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4005 return -EINVAL;
4006 }
4007
4008 ret = kstrtouint(wname, 10, &dmic_idx);
4009 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4010 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4011 __func__);
4012 return -EINVAL;
4013 }
4014
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4015 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4016
4017 switch (dmic_idx) {
4018 case 0:
4019 case 1:
4020 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4021 dmic_gpio = pdata->dmic01_gpio_p;
4022 break;
4023 case 2:
4024 case 3:
4025 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4026 dmic_gpio = pdata->dmic23_gpio_p;
4027 break;
4028 default:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4029 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4030 __func__);
4031 return -EINVAL;
4032 }
4033
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4034 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4035 __func__, event, dmic_idx, *dmic_gpio_cnt);
4036
4037 switch (event) {
4038 case SND_SOC_DAPM_PRE_PMU:
4039 (*dmic_gpio_cnt)++;
4040 if (*dmic_gpio_cnt == 1) {
4041 ret = msm_cdc_pinctrl_select_active_state(
4042 dmic_gpio);
4043 if (ret < 0) {
4044 pr_err("%s: gpio set cannot be activated %sd",
4045 __func__, "dmic_gpio");
4046 return ret;
4047 }
4048 }
4049
4050 break;
4051 case SND_SOC_DAPM_POST_PMD:
4052 (*dmic_gpio_cnt)--;
4053 if (*dmic_gpio_cnt == 0) {
4054 ret = msm_cdc_pinctrl_select_sleep_state(
4055 dmic_gpio);
4056 if (ret < 0) {
4057 pr_err("%s: gpio set cannot be de-activated %sd",
4058 __func__, "dmic_gpio");
4059 return ret;
4060 }
4061 }
4062 break;
4063 default:
4064 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4065 return -EINVAL;
4066 }
4067 return 0;
4068}
4069
4070static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4071 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4072 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4073 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4074 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4075 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4076 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4077 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4078 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4079};
4080
4081static inline int param_is_mask(int p)
4082{
4083 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4084 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4085}
4086
4087static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4088 int n)
4089{
4090 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4091}
4092
4093static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4094 unsigned int bit)
4095{
4096 if (bit >= SNDRV_MASK_MAX)
4097 return;
4098 if (param_is_mask(n)) {
4099 struct snd_mask *m = param_to_mask(p, n);
4100
4101 m->bits[0] = 0;
4102 m->bits[1] = 0;
4103 m->bits[bit >> 5] |= (1 << (bit & 31));
4104 }
4105}
4106
4107static int msm_slim_get_ch_from_beid(int32_t be_id)
4108{
4109 int ch_id = 0;
4110
4111 switch (be_id) {
4112 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4113 ch_id = SLIM_RX_0;
4114 break;
4115 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4116 ch_id = SLIM_RX_1;
4117 break;
4118 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4119 ch_id = SLIM_RX_2;
4120 break;
4121 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4122 ch_id = SLIM_RX_3;
4123 break;
4124 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4125 ch_id = SLIM_RX_4;
4126 break;
4127 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4128 ch_id = SLIM_RX_6;
4129 break;
4130 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4131 ch_id = SLIM_TX_0;
4132 break;
4133 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4134 ch_id = SLIM_TX_3;
4135 break;
4136 default:
4137 ch_id = SLIM_RX_0;
4138 break;
4139 }
4140
4141 return ch_id;
4142}
4143
4144static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4145{
4146 int idx = 0;
4147
4148 switch (be_id) {
4149 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4150 idx = WSA_CDC_DMA_RX_0;
4151 break;
4152 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4153 idx = WSA_CDC_DMA_TX_0;
4154 break;
4155 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4156 idx = WSA_CDC_DMA_RX_1;
4157 break;
4158 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4159 idx = WSA_CDC_DMA_TX_1;
4160 break;
4161 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4162 idx = WSA_CDC_DMA_TX_2;
4163 break;
4164 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4165 idx = RX_CDC_DMA_RX_0;
4166 break;
4167 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4168 idx = RX_CDC_DMA_RX_1;
4169 break;
4170 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4171 idx = RX_CDC_DMA_RX_2;
4172 break;
4173 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4174 idx = RX_CDC_DMA_RX_3;
4175 break;
4176 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4177 idx = RX_CDC_DMA_RX_5;
4178 break;
4179 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4180 idx = TX_CDC_DMA_TX_0;
4181 break;
4182 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4183 idx = TX_CDC_DMA_TX_3;
4184 break;
4185 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4186 idx = TX_CDC_DMA_TX_4;
4187 break;
4188 default:
4189 idx = RX_CDC_DMA_RX_0;
4190 break;
4191 }
4192
4193 return idx;
4194}
4195
4196static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4197{
4198 int idx = -EINVAL;
4199
4200 switch (be_id) {
4201 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4202 idx = DP_RX_IDX;
4203 break;
4204 default:
4205 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4206 idx = -EINVAL;
4207 break;
4208 }
4209
4210 return idx;
4211}
4212
4213static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4214 struct snd_pcm_hw_params *params)
4215{
4216 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4217 struct snd_interval *rate = hw_param_interval(params,
4218 SNDRV_PCM_HW_PARAM_RATE);
4219 struct snd_interval *channels = hw_param_interval(params,
4220 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4221 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4222
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4223 int rc = 0;
4224 int idx;
4225 void *config = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4226 struct snd_soc_component *component = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4227
4228 pr_debug("%s: format = %d, rate = %d\n",
4229 __func__, params_format(params), params_rate(params));
4230
4231 switch (dai_link->id) {
4232 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4233 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4234 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4235 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4236 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4237 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4238 idx = msm_slim_get_ch_from_beid(dai_link->id);
4239 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4240 slim_rx_cfg[idx].bit_format);
4241 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4242 channels->min = channels->max = slim_rx_cfg[idx].channels;
4243 break;
4244
4245 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4246 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4247 idx = msm_slim_get_ch_from_beid(dai_link->id);
4248 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4249 slim_tx_cfg[idx].bit_format);
4250 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4251 channels->min = channels->max = slim_tx_cfg[idx].channels;
4252 break;
4253
4254 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4255 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4256 slim_tx_cfg[1].bit_format);
4257 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4258 channels->min = channels->max = slim_tx_cfg[1].channels;
4259 break;
4260
4261 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4263 SNDRV_PCM_FORMAT_S32_LE);
4264 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4265 channels->min = channels->max = msm_vi_feed_tx_ch;
4266 break;
4267
4268 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4269 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4270 slim_rx_cfg[5].bit_format);
4271 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4272 channels->min = channels->max = slim_rx_cfg[5].channels;
4273 break;
4274
4275 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4276 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4277 if (!component) {
4278 pr_err("%s: component is NULL\n", __func__);
4279 rc = -EINVAL;
4280 goto done;
4281 }
4282
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4283 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4284 channels->min = channels->max = 1;
4285
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4286 config = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4287 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4288 if (config) {
4289 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4290 config, SLIMBUS_5_TX);
4291 if (rc)
4292 pr_err("%s: Failed to set slimbus slave port config %d\n",
4293 __func__, rc);
4294 }
4295 break;
4296
4297 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4299 slim_rx_cfg[SLIM_RX_7].bit_format);
4300 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4301 channels->min = channels->max =
4302 slim_rx_cfg[SLIM_RX_7].channels;
4303 break;
4304
4305 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4306 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4307 channels->min = channels->max =
4308 slim_tx_cfg[SLIM_TX_7].channels;
4309 break;
4310
4311 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4312 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4313 channels->min = channels->max =
4314 slim_tx_cfg[SLIM_TX_8].channels;
4315 break;
4316
4317 case MSM_BACKEND_DAI_USB_RX:
4318 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4319 usb_rx_cfg.bit_format);
4320 rate->min = rate->max = usb_rx_cfg.sample_rate;
4321 channels->min = channels->max = usb_rx_cfg.channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_USB_TX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 usb_tx_cfg.bit_format);
4327 rate->min = rate->max = usb_tx_cfg.sample_rate;
4328 channels->min = channels->max = usb_tx_cfg.channels;
4329 break;
4330
4331 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4332 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4333 if (idx < 0) {
4334 pr_err("%s: Incorrect ext disp idx %d\n",
4335 __func__, idx);
4336 rc = idx;
4337 goto done;
4338 }
4339
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 ext_disp_rx_cfg[idx].bit_format);
4342 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4343 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_AFE_PCM_RX:
4347 channels->min = channels->max = proxy_rx_cfg.channels;
4348 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4349 break;
4350
4351 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4352 channels->min = channels->max =
4353 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4354 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4355 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4356 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4357 break;
4358
4359 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4360 channels->min = channels->max =
4361 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4362 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4363 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4364 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4365 break;
4366
4367 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4368 channels->min = channels->max =
4369 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4370 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4371 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4372 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4373 break;
4374
4375 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4376 channels->min = channels->max =
4377 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4378 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4379 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4380 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4381 break;
4382
4383 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4384 channels->min = channels->max =
4385 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4386 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4387 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4388 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4389 break;
4390
4391 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4392 channels->min = channels->max =
4393 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4394 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4395 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4396 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4397 break;
4398
4399 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4400 channels->min = channels->max =
4401 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4402 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4403 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4404 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4405 break;
4406
4407 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4408 channels->min = channels->max =
4409 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4410 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4411 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4412 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4413 break;
4414
4415 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4416 channels->min = channels->max =
4417 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4418 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4419 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4420 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4421 break;
4422
4423 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4424 channels->min = channels->max =
4425 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4426 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4427 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4428 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4429 break;
4430
4431
4432 case MSM_BACKEND_DAI_AUXPCM_RX:
4433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4434 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4435 rate->min = rate->max =
4436 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4437 channels->min = channels->max =
4438 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4439 break;
4440
4441 case MSM_BACKEND_DAI_AUXPCM_TX:
4442 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4443 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4444 rate->min = rate->max =
4445 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4446 channels->min = channels->max =
4447 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4448 break;
4449
4450 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4451 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4452 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4453 rate->min = rate->max =
4454 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4455 channels->min = channels->max =
4456 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4457 break;
4458
4459 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4460 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4461 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4462 rate->min = rate->max =
4463 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4464 channels->min = channels->max =
4465 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4466 break;
4467
4468 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4469 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4470 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4471 rate->min = rate->max =
4472 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4473 channels->min = channels->max =
4474 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4475 break;
4476
4477 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4478 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4479 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4480 rate->min = rate->max =
4481 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4482 channels->min = channels->max =
4483 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4484 break;
4485
4486 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4487 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4488 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4489 rate->min = rate->max =
4490 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4491 channels->min = channels->max =
4492 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4493 break;
4494
4495 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4496 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4497 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4498 rate->min = rate->max =
4499 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4500 channels->min = channels->max =
4501 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4502 break;
4503
4504 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4505 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4506 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4507 rate->min = rate->max =
4508 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4509 channels->min = channels->max =
4510 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4511 break;
4512
4513 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4514 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4515 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4516 rate->min = rate->max =
4517 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4518 channels->min = channels->max =
4519 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4520 break;
4521
4522 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4523 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4524 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4525 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4526 channels->min = channels->max =
4527 mi2s_rx_cfg[PRIM_MI2S].channels;
4528 break;
4529
4530 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4531 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4532 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4533 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4534 channels->min = channels->max =
4535 mi2s_tx_cfg[PRIM_MI2S].channels;
4536 break;
4537
4538 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4539 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4540 mi2s_rx_cfg[SEC_MI2S].bit_format);
4541 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4542 channels->min = channels->max =
4543 mi2s_rx_cfg[SEC_MI2S].channels;
4544 break;
4545
4546 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4547 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4548 mi2s_tx_cfg[SEC_MI2S].bit_format);
4549 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4550 channels->min = channels->max =
4551 mi2s_tx_cfg[SEC_MI2S].channels;
4552 break;
4553
4554 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4555 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4556 mi2s_rx_cfg[TERT_MI2S].bit_format);
4557 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4558 channels->min = channels->max =
4559 mi2s_rx_cfg[TERT_MI2S].channels;
4560 break;
4561
4562 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4563 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4564 mi2s_tx_cfg[TERT_MI2S].bit_format);
4565 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4566 channels->min = channels->max =
4567 mi2s_tx_cfg[TERT_MI2S].channels;
4568 break;
4569
4570 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4571 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4572 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4573 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4574 channels->min = channels->max =
4575 mi2s_rx_cfg[QUAT_MI2S].channels;
4576 break;
4577
4578 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4579 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4580 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4581 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4582 channels->min = channels->max =
4583 mi2s_tx_cfg[QUAT_MI2S].channels;
4584 break;
4585
4586 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4587 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4588 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4589 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4590 channels->min = channels->max =
4591 mi2s_rx_cfg[QUIN_MI2S].channels;
4592 break;
4593
4594 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4595 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4596 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4597 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4598 channels->min = channels->max =
4599 mi2s_tx_cfg[QUIN_MI2S].channels;
4600 break;
4601
4602 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4603 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4604 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4605 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4606 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4607 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4608 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4609 cdc_dma_rx_cfg[idx].bit_format);
4610 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4611 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4612 break;
4613
4614 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4615 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4616 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4617 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4618 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4619 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4620 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4621 cdc_dma_tx_cfg[idx].bit_format);
4622 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4623 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4624 break;
4625
4626 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4627 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4628 SNDRV_PCM_FORMAT_S32_LE);
4629 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4630 channels->min = channels->max = msm_vi_feed_tx_ch;
4631 break;
4632
4633 default:
4634 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4635 break;
4636 }
4637
4638done:
4639 return rc;
4640}
4641
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4642static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
4643 bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4644{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4645 struct snd_soc_card *card = component->card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4646 struct msm_asoc_mach_data *pdata =
4647 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4648
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4649 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4650 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4651
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4652 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4653}
4654
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4655static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4656{
4657 int value = 0;
4658 bool ret = false;
4659 struct snd_soc_card *card;
4660 struct msm_asoc_mach_data *pdata;
4661
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4662 if (!component) {
4663 pr_err("%s component is NULL\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4664 return false;
4665 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4666 card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4667 pdata = snd_soc_card_get_drvdata(card);
4668
4669 if (!pdata)
4670 return false;
4671
4672 if (wcd_mbhc_cfg.enable_usbc_analog)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4673 return msm_usbc_swap_gnd_mic(component, active);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4674
4675 /* if usbc is not defined, swap using us_euro_gpio_p */
4676 if (pdata->us_euro_gpio_p) {
4677 value = msm_cdc_pinctrl_get_state(
4678 pdata->us_euro_gpio_p);
4679 if (value)
4680 msm_cdc_pinctrl_select_sleep_state(
4681 pdata->us_euro_gpio_p);
4682 else
4683 msm_cdc_pinctrl_select_active_state(
4684 pdata->us_euro_gpio_p);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4685 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4686 __func__, value, !value);
4687 ret = true;
4688 }
4689 return ret;
4690}
4691
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4692static int msm_afe_set_config(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4693{
4694 int ret = 0;
4695 void *config_data = NULL;
4696
4697 if (!msm_codec_fn.get_afe_config_fn) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4698 dev_err(component->dev, "%s: codec get afe config not init'ed\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4699 __func__);
4700 return -EINVAL;
4701 }
4702
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4703 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4704 AFE_CDC_REGISTERS_CONFIG);
4705 if (config_data) {
4706 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4707 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4708 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4709 "%s: Failed to set codec registers config %d\n",
4710 __func__, ret);
4711 return ret;
4712 }
4713 }
4714
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4715 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4716 AFE_CDC_REGISTER_PAGE_CONFIG);
4717 if (config_data) {
4718 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4719 0);
4720 if (ret)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4721 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4722 "%s: Failed to set cdc register page config\n",
4723 __func__);
4724 }
4725
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4726 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4727 AFE_SLIMBUS_SLAVE_CONFIG);
4728 if (config_data) {
4729 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4730 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4731 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4732 "%s: Failed to set slimbus slave config %d\n",
4733 __func__, ret);
4734 return ret;
4735 }
4736 }
4737
4738 return 0;
4739}
4740
4741static void msm_afe_clear_config(void)
4742{
4743 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4744 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4745}
4746
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4747static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4748{
4749 int ret = 0;
4750 void *config_data;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4751 struct snd_soc_component *component = NULL;
4752 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4753 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4754 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4755 struct snd_soc_component *aux_comp;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4756 struct snd_card *card = rtd->card->snd_card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4757 struct snd_info_entry *entry;
4758 struct msm_asoc_mach_data *pdata =
4759 snd_soc_card_get_drvdata(rtd->card);
4760
4761 /*
4762 * Codec SLIMBUS configuration
4763 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4764 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4765 * TX14, TX15, TX16
4766 */
4767 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4768 150, 151};
4769 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4770 134, 135, 136, 137, 138, 139,
4771 140, 141, 142, 143};
4772
4773 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4774
4775 rtd->pmdown_time = 0;
4776
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4777 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4778 if (!component) {
4779 pr_err("%s: component is NULL\n", __func__);
4780 return -EINVAL;
4781 }
4782 dapm = snd_soc_component_get_dapm(component);
4783
4784 ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4785 ARRAY_SIZE(msm_tavil_snd_controls));
4786 if (ret < 0) {
4787 pr_err("%s: add_codec_controls failed, err %d\n",
4788 __func__, ret);
4789 return ret;
4790 }
4791
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4792 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4793 ARRAY_SIZE(msm_common_snd_controls));
4794 if (ret < 0) {
4795 pr_err("%s: add_codec_controls failed, err %d\n",
4796 __func__, ret);
4797 return ret;
4798 }
4799
4800 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4801 ARRAY_SIZE(msm_dapm_widgets_tavil));
4802
4803 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4804 ARRAY_SIZE(wcd_audio_paths_tavil));
4805
4806 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4807 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4808 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4809 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4810 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4811 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4812 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4813 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4814 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4815 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4816 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4817 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4818 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4819 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4820 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4821 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4822 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4823 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4824 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4825 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4826 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4827 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4828 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4829 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4830 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4831 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4832 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4833
4834 snd_soc_dapm_sync(dapm);
4835
4836 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4837 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4838
4839 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4840
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4841 ret = msm_afe_set_config(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4842 if (ret) {
4843 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4844 goto err;
4845 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4846 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4847
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4848 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4849 AFE_AANC_VERSION);
4850 if (config_data) {
4851 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4852 if (ret) {
4853 pr_err("%s: Failed to set aanc version %d\n",
4854 __func__, ret);
4855 goto err;
4856 }
4857 }
4858
4859 /*
4860 * Send speaker configuration only for WSA8810.
4861 * Default configuration is for WSA8815.
4862 */
4863 pr_debug("%s: Number of aux devices: %d\n",
4864 __func__, rtd->card->num_aux_devs);
4865 if (rtd->card->num_aux_devs &&
4866 !list_empty(&rtd->card->aux_comp_list)) {
4867 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4868 struct snd_soc_component, card_aux_list);
4869 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4870 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4871 tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
4872 tavil_set_spkr_gain_offset(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4873 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4874 }
4875 }
4876
4877 card = rtd->card->snd_card;
4878 entry = snd_info_create_subdir(card->module, "codecs",
4879 card->proc_root);
4880 if (!entry) {
4881 pr_debug("%s: Cannot create codecs module entry\n",
4882 __func__);
4883 ret = 0;
4884 goto err;
4885 }
4886 pdata->codec_root = entry;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4887 tavil_codec_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4888
4889 codec_reg_done = true;
4890 return 0;
4891err:
4892 return ret;
4893}
4894
4895static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4896{
4897 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4898 struct snd_soc_component *component;
4899 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4900 struct snd_card *card;
4901 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4902 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4903 struct msm_asoc_mach_data *pdata =
4904 snd_soc_card_get_drvdata(rtd->card);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4905 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4906
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4907 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4908 if (!component) {
4909 pr_err("%s: component is NULL\n", __func__);
4910 return -EINVAL;
4911 }
4912 dapm = snd_soc_component_get_dapm(component);
4913
4914 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4915 ARRAY_SIZE(msm_int_snd_controls));
4916 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4917 pr_err("%s: add_component_controls failed: %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4918 __func__, ret);
4919 return ret;
4920 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4921 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4922 ARRAY_SIZE(msm_common_snd_controls));
4923 if (ret < 0) {
4924 pr_err("%s: add common snd controls failed: %d\n",
4925 __func__, ret);
4926 return ret;
4927 }
4928
4929 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4930 ARRAY_SIZE(msm_int_dapm_widgets));
4931
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4932 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4933 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4934 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4935 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4936
4937 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4938 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4939 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4940 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4941
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4942 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4943 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4944 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4945 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4946
4947 snd_soc_dapm_sync(dapm);
4948
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4949 /*
4950 * Send speaker configuration only for WSA8810.
4951 * Default configuration is for WSA8815.
4952 */
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4953 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4954 __func__, rtd->card->num_aux_devs);
4955 if (rtd->card->num_aux_devs &&
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]4956 !list_empty(&rtd->card->aux_comp_list)) {
4957 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4958 struct snd_soc_component, card_aux_list);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4959 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4960 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4961 wsa_macro_set_spkr_mode(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4962 WSA_MACRO_SPKR_MODE_1);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4963 wsa_macro_set_spkr_gain_offset(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4964 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4965 }
4966 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4967 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4968 if (!pdata->codec_root) {
4969 entry = snd_info_create_subdir(card->module, "codecs",
4970 card->proc_root);
4971 if (!entry) {
4972 pr_debug("%s: Cannot create codecs module entry\n",
4973 __func__);
4974 ret = 0;
4975 goto err;
4976 }
4977 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4978 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4979 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4980 /*
4981 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
4982 * from AOSS to APSS. So, it uses SW workaround and listens to
4983 * interrupt from AFE over IPC.
4984 * Check for MSM version and MSM ID and register wake irq
4985 * accordingly to provide compatibility to all chipsets.
4986 */
4987 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
4988 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4989 bolero_register_wake_irq(component, true);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4990 else
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4991 bolero_register_wake_irq(component, false);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4992
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4993 codec_reg_done = true;
4994 return 0;
4995err:
4996 return ret;
4997}
4998
4999static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5000{
5001 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5002 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
5003 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5004
5005 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5006 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5007}
5008
5009static void *def_wcd_mbhc_cal(void)
5010{
5011 void *wcd_mbhc_cal;
5012 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5013 u16 *btn_high;
5014
5015 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5016 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5017 if (!wcd_mbhc_cal)
5018 return NULL;
5019
5020#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5021 S(v_hs_max, 1600);
5022#undef S
5023#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5024 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5025#undef S
5026
5027 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5028 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5029 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5030
5031 btn_high[0] = 75;
5032 btn_high[1] = 150;
5033 btn_high[2] = 237;
5034 btn_high[3] = 500;
5035 btn_high[4] = 500;
5036 btn_high[5] = 500;
5037 btn_high[6] = 500;
5038 btn_high[7] = 500;
5039
5040 return wcd_mbhc_cal;
5041}
5042
5043static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5044 struct snd_pcm_hw_params *params)
5045{
5046 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5047 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5048 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5049 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5050
5051 int ret = 0;
5052 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5053 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5054 u32 user_set_tx_ch = 0;
5055 u32 rx_ch_count;
5056
5057 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5058 ret = snd_soc_dai_get_channel_map(codec_dai,
5059 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5060 if (ret < 0) {
5061 pr_err("%s: failed to get codec chan map, err:%d\n",
5062 __func__, ret);
5063 goto err;
5064 }
5065 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5066 pr_debug("%s: rx_5_ch=%d\n", __func__,
5067 slim_rx_cfg[5].channels);
5068 rx_ch_count = slim_rx_cfg[5].channels;
5069 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5070 pr_debug("%s: rx_2_ch=%d\n", __func__,
5071 slim_rx_cfg[2].channels);
5072 rx_ch_count = slim_rx_cfg[2].channels;
5073 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5074 pr_debug("%s: rx_6_ch=%d\n", __func__,
5075 slim_rx_cfg[6].channels);
5076 rx_ch_count = slim_rx_cfg[6].channels;
5077 } else {
5078 pr_debug("%s: rx_0_ch=%d\n", __func__,
5079 slim_rx_cfg[0].channels);
5080 rx_ch_count = slim_rx_cfg[0].channels;
5081 }
5082 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5083 rx_ch_count, rx_ch);
5084 if (ret < 0) {
5085 pr_err("%s: failed to set cpu chan map, err:%d\n",
5086 __func__, ret);
5087 goto err;
5088 }
5089 } else {
5090
5091 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5092 codec_dai->name, codec_dai->id, user_set_tx_ch);
5093 ret = snd_soc_dai_get_channel_map(codec_dai,
5094 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5095 if (ret < 0) {
5096 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5097 __func__, ret);
5098 goto err;
5099 }
5100 /* For <codec>_tx1 case */
5101 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5102 user_set_tx_ch = slim_tx_cfg[0].channels;
5103 /* For <codec>_tx3 case */
5104 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5105 user_set_tx_ch = slim_tx_cfg[1].channels;
5106 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5107 user_set_tx_ch = msm_vi_feed_tx_ch;
5108 else
5109 user_set_tx_ch = tx_ch_cnt;
5110
5111 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5112 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5113 tx_ch_cnt, dai_link->id);
5114
5115 ret = snd_soc_dai_set_channel_map(cpu_dai,
5116 user_set_tx_ch, tx_ch, 0, 0);
5117 if (ret < 0)
5118 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5119 __func__, ret);
5120 }
5121
5122err:
5123 return ret;
5124}
5125
5126
5127static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5128 struct snd_pcm_hw_params *params)
5129{
5130 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5131 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5132 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5133 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5134
5135 int ret = 0;
5136 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5137 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5138 u32 user_set_tx_ch = 0;
5139 u32 user_set_rx_ch = 0;
5140 u32 ch_id;
5141
5142 ret = snd_soc_dai_get_channel_map(codec_dai,
5143 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5144 &rx_ch_cdc_dma);
5145 if (ret < 0) {
5146 pr_err("%s: failed to get codec chan map, err:%d\n",
5147 __func__, ret);
5148 goto err;
5149 }
5150
5151 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5152 switch (dai_link->id) {
5153 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5154 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5155 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5156 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5157 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5158 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5159 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5160 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5161 {
5162 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5163 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5164 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5165 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5166 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5167 user_set_rx_ch, &rx_ch_cdc_dma);
5168 if (ret < 0) {
5169 pr_err("%s: failed to set cpu chan map, err:%d\n",
5170 __func__, ret);
5171 goto err;
5172 }
5173
5174 }
5175 break;
5176 }
5177 } else {
5178 switch (dai_link->id) {
5179 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5180 {
5181 user_set_tx_ch = msm_vi_feed_tx_ch;
5182 }
5183 break;
5184 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5185 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5186 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5187 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5188 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5189 {
5190 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5191 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5192 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5193 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5194 }
5195 break;
5196 }
5197
5198 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5199 &tx_ch_cdc_dma, 0, 0);
5200 if (ret < 0) {
5201 pr_err("%s: failed to set cpu chan map, err:%d\n",
5202 __func__, ret);
5203 goto err;
5204 }
5205 }
5206
5207err:
5208 return ret;
5209}
5210
5211static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5212 struct snd_pcm_hw_params *params)
5213{
5214 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5215 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5216 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5217 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5218 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5219 unsigned int num_tx_ch = 0;
5220 unsigned int num_rx_ch = 0;
5221 int ret = 0;
5222
5223 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5224 num_rx_ch = params_channels(params);
5225 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5226 codec_dai->name, codec_dai->id, num_rx_ch);
5227 ret = snd_soc_dai_get_channel_map(codec_dai,
5228 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5229 if (ret < 0) {
5230 pr_err("%s: failed to get codec chan map, err:%d\n",
5231 __func__, ret);
5232 goto err;
5233 }
5234 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5235 num_rx_ch, rx_ch);
5236 if (ret < 0) {
5237 pr_err("%s: failed to set cpu chan map, err:%d\n",
5238 __func__, ret);
5239 goto err;
5240 }
5241 } else {
5242 num_tx_ch = params_channels(params);
5243 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5244 codec_dai->name, codec_dai->id, num_tx_ch);
5245 ret = snd_soc_dai_get_channel_map(codec_dai,
5246 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5247 if (ret < 0) {
5248 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5249 __func__, ret);
5250 goto err;
5251 }
5252 ret = snd_soc_dai_set_channel_map(cpu_dai,
5253 num_tx_ch, tx_ch, 0, 0);
5254 if (ret < 0) {
5255 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5256 __func__, ret);
5257 goto err;
5258 }
5259 }
5260
5261err:
5262 return ret;
5263}
5264
5265static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5266 struct snd_pcm_hw_params *params)
5267{
5268 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5269 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5270 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5271 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5272 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5273 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5274 int ret;
5275
5276 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5277 codec_dai->name, codec_dai->id);
5278 ret = snd_soc_dai_get_channel_map(codec_dai,
5279 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5280 if (ret) {
5281 dev_err(rtd->dev,
5282 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5283 __func__, ret);
5284 goto err;
5285 }
5286
5287 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5288 __func__, tx_ch_cnt, dai_link->id);
5289
5290 ret = snd_soc_dai_set_channel_map(cpu_dai,
5291 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5292 if (ret)
5293 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5294 __func__, ret);
5295
5296err:
5297 return ret;
5298}
5299
5300static int msm_get_port_id(int be_id)
5301{
5302 int afe_port_id;
5303
5304 switch (be_id) {
5305 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5306 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5307 break;
5308 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5309 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5310 break;
5311 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5312 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5313 break;
5314 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5315 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5316 break;
5317 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5318 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5319 break;
5320 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5321 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5322 break;
5323 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5324 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5325 break;
5326 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5327 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5328 break;
5329 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5330 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5331 break;
5332 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5333 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5334 break;
5335 default:
5336 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5337 afe_port_id = -EINVAL;
5338 }
5339
5340 return afe_port_id;
5341}
5342
5343static u32 get_mi2s_bits_per_sample(u32 bit_format)
5344{
5345 u32 bit_per_sample;
5346
5347 switch (bit_format) {
5348 case SNDRV_PCM_FORMAT_S32_LE:
5349 case SNDRV_PCM_FORMAT_S24_3LE:
5350 case SNDRV_PCM_FORMAT_S24_LE:
5351 bit_per_sample = 32;
5352 break;
5353 case SNDRV_PCM_FORMAT_S16_LE:
5354 default:
5355 bit_per_sample = 16;
5356 break;
5357 }
5358
5359 return bit_per_sample;
5360}
5361
5362static void update_mi2s_clk_val(int dai_id, int stream)
5363{
5364 u32 bit_per_sample;
5365
5366 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5367 bit_per_sample =
5368 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5369 mi2s_clk[dai_id].clk_freq_in_hz =
5370 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5371 } else {
5372 bit_per_sample =
5373 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5374 mi2s_clk[dai_id].clk_freq_in_hz =
5375 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5376 }
5377}
5378
5379static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5380{
5381 int ret = 0;
5382 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5383 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5384 int port_id = 0;
5385 int index = cpu_dai->id;
5386
5387 port_id = msm_get_port_id(rtd->dai_link->id);
5388 if (port_id < 0) {
5389 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5390 ret = port_id;
5391 goto err;
5392 }
5393
5394 if (enable) {
5395 update_mi2s_clk_val(index, substream->stream);
5396 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5397 mi2s_clk[index].clk_freq_in_hz);
5398 }
5399
5400 mi2s_clk[index].enable = enable;
5401 ret = afe_set_lpass_clock_v2(port_id,
5402 &mi2s_clk[index]);
5403 if (ret < 0) {
5404 dev_err(rtd->card->dev,
5405 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5406 __func__, port_id, ret);
5407 goto err;
5408 }
5409
5410err:
5411 return ret;
5412}
5413
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5414static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5415 struct snd_pcm_hw_params *params)
5416{
5417 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5418 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5419 int ret = 0;
5420 int slot_width = 32;
5421 int channels, slots;
5422 unsigned int slot_mask, rate, clk_freq;
5423 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5424
5425 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5426
5427 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5428 switch (cpu_dai->id) {
5429 case AFE_PORT_ID_PRIMARY_TDM_RX:
5430 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5431 break;
5432 case AFE_PORT_ID_SECONDARY_TDM_RX:
5433 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5434 break;
5435 case AFE_PORT_ID_TERTIARY_TDM_RX:
5436 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5437 break;
5438 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5439 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5440 break;
5441 case AFE_PORT_ID_QUINARY_TDM_RX:
5442 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5443 break;
5444 case AFE_PORT_ID_PRIMARY_TDM_TX:
5445 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5446 break;
5447 case AFE_PORT_ID_SECONDARY_TDM_TX:
5448 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5449 break;
5450 case AFE_PORT_ID_TERTIARY_TDM_TX:
5451 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5452 break;
5453 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5454 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5455 break;
5456 case AFE_PORT_ID_QUINARY_TDM_TX:
5457 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5458 break;
5459
5460 default:
5461 pr_err("%s: dai id 0x%x not supported\n",
5462 __func__, cpu_dai->id);
5463 return -EINVAL;
5464 }
5465
5466 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5467 /*2 slot config - bits 0 and 1 set for the first two slots */
5468 slot_mask = 0x0000FFFF >> (16-slots);
5469 channels = slots;
5470
5471 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5472 __func__, slot_width, slots);
5473
5474 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5475 slots, slot_width);
5476 if (ret < 0) {
5477 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5478 __func__, ret);
5479 goto end;
5480 }
5481
5482 ret = snd_soc_dai_set_channel_map(cpu_dai,
5483 0, NULL, channels, slot_offset);
5484 if (ret < 0) {
5485 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5486 __func__, ret);
5487 goto end;
5488 }
5489 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5490 /*2 slot config - bits 0 and 1 set for the first two slots */
5491 slot_mask = 0x0000FFFF >> (16-slots);
5492 channels = slots;
5493
5494 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5495 __func__, slot_width, slots);
5496
5497 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5498 slots, slot_width);
5499 if (ret < 0) {
5500 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5501 __func__, ret);
5502 goto end;
5503 }
5504
5505 ret = snd_soc_dai_set_channel_map(cpu_dai,
5506 channels, slot_offset, 0, NULL);
5507 if (ret < 0) {
5508 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5509 __func__, ret);
5510 goto end;
5511 }
5512 } else {
5513 ret = -EINVAL;
5514 pr_err("%s: invalid use case, err:%d\n",
5515 __func__, ret);
5516 goto end;
5517 }
5518
5519 rate = params_rate(params);
5520 clk_freq = rate * slot_width * slots;
5521 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5522 if (ret < 0)
5523 pr_err("%s: failed to set tdm clk, err:%d\n",
5524 __func__, ret);
5525
5526end:
5527 return ret;
5528}
5529
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5530static int msm_get_tdm_mode(u32 port_id)
5531{
5532 int tdm_mode;
5533
5534 switch (port_id) {
5535 case AFE_PORT_ID_PRIMARY_TDM_RX:
5536 case AFE_PORT_ID_PRIMARY_TDM_TX:
5537 tdm_mode = TDM_PRI;
5538 break;
5539 case AFE_PORT_ID_SECONDARY_TDM_RX:
5540 case AFE_PORT_ID_SECONDARY_TDM_TX:
5541 tdm_mode = TDM_SEC;
5542 break;
5543 case AFE_PORT_ID_TERTIARY_TDM_RX:
5544 case AFE_PORT_ID_TERTIARY_TDM_TX:
5545 tdm_mode = TDM_TERT;
5546 break;
5547 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5548 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5549 tdm_mode = TDM_QUAT;
5550 break;
5551 case AFE_PORT_ID_QUINARY_TDM_RX:
5552 case AFE_PORT_ID_QUINARY_TDM_TX:
5553 tdm_mode = TDM_QUIN;
5554 break;
5555 default:
5556 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
5557 tdm_mode = -EINVAL;
5558 }
5559 return tdm_mode;
5560}
5561
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5562static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5563{
5564 int ret = 0;
5565 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5566 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5567 struct snd_soc_card *card = rtd->card;
5568 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5569 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5570
5571 if (tdm_mode < 0) {
5572 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5573 return tdm_mode;
5574 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5575
5576 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5577 if (pdata->mi2s_gpio_p[tdm_mode])
5578 ret = msm_cdc_pinctrl_select_active_state(
5579 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5580
5581 return ret;
5582}
5583
5584static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5585{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5586 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5587 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5588 struct snd_soc_card *card = rtd->card;
5589 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5590 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5591
5592 if (tdm_mode < 0) {
5593 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5594 return;
5595 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5596
5597 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5598 if (pdata->mi2s_gpio_p[tdm_mode])
5599 msm_cdc_pinctrl_select_sleep_state(
5600 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5601}
5602
5603static struct snd_soc_ops sm6150_tdm_be_ops = {
5604 .hw_params = sm6150_tdm_snd_hw_params,
5605 .startup = sm6150_tdm_snd_startup,
5606 .shutdown = sm6150_tdm_snd_shutdown
5607};
5608
5609static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5610{
5611 cpumask_t mask;
5612
5613 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5614 pm_qos_remove_request(&substream->latency_pm_qos_req);
5615
5616 cpumask_clear(&mask);
5617 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5618 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5619 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5620
5621 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5622
5623 pm_qos_add_request(&substream->latency_pm_qos_req,
5624 PM_QOS_CPU_DMA_LATENCY,
5625 MSM_LL_QOS_VALUE);
5626 return 0;
5627}
5628
5629static struct snd_soc_ops msm_fe_qos_ops = {
5630 .prepare = msm_fe_qos_prepare,
5631};
5632
5633static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5634{
5635 int ret = 0;
5636 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5637 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5638 int index = cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5639 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5640 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5641 struct snd_soc_card *card = rtd->card;
5642 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5643
5644 dev_dbg(rtd->card->dev,
5645 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5646 __func__, substream->name, substream->stream,
5647 cpu_dai->name, cpu_dai->id);
5648
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5649 if (port_id < 0) {
5650 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5651 ret = port_id;
5652 goto err;
5653 }
5654
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5655 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5656 ret = -EINVAL;
5657 dev_err(rtd->card->dev,
5658 "%s: CPU DAI id (%d) out of range\n",
5659 __func__, cpu_dai->id);
5660 goto err;
5661 }
5662 /*
5663 * Mutex protection in case the same MI2S
5664 * interface using for both TX and RX so
5665 * that the same clock won't be enable twice.
5666 */
5667 mutex_lock(&mi2s_intf_conf[index].lock);
5668 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5669 /* Check if msm needs to provide the clock to the interface */
5670 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5671 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5672 fmt = SND_SOC_DAIFMT_CBM_CFM;
5673 }
5674 ret = msm_mi2s_set_sclk(substream, true);
5675 if (ret < 0) {
5676 dev_err(rtd->card->dev,
5677 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5678 __func__, ret);
5679 goto clean_up;
5680 }
5681
5682 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5683 if (ret < 0) {
5684 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5685 __func__, index, ret);
5686 goto clk_off;
5687 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5688 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5689 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
5690 __func__, mi2s_mclk[index].clk_freq_in_hz);
5691 ret = afe_set_lpass_clock_v2(port_id,
5692 &mi2s_mclk[index]);
5693 if (ret < 0) {
5694 pr_err("%s: afe lpass mclk failed, err:%d\n",
5695 __func__, ret);
5696 goto clk_off;
5697 }
5698 mi2s_mclk[index].enable = 1;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5699 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5700 if (pdata->mi2s_gpio_p[index])
5701 msm_cdc_pinctrl_select_active_state(
5702 pdata->mi2s_gpio_p[index]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5703 }
5704clk_off:
5705 if (ret < 0)
5706 msm_mi2s_set_sclk(substream, false);
5707clean_up:
5708 if (ret < 0)
5709 mi2s_intf_conf[index].ref_cnt--;
5710 mutex_unlock(&mi2s_intf_conf[index].lock);
5711err:
5712 return ret;
5713}
5714
5715static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5716{
5717 int ret;
5718 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5719 int index = rtd->cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5720 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5721 struct snd_soc_card *card = rtd->card;
5722 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5723
5724 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5725 substream->name, substream->stream);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5726
5727 if (port_id < 0) {
5728 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5729 return;
5730 }
5731
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5732 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5733 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5734 return;
5735 }
5736
5737 mutex_lock(&mi2s_intf_conf[index].lock);
5738 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5739 if (pdata->mi2s_gpio_p[index])
5740 msm_cdc_pinctrl_select_sleep_state(
5741 pdata->mi2s_gpio_p[index]);
5742
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5743 ret = msm_mi2s_set_sclk(substream, false);
5744 if (ret < 0)
5745 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5746 __func__, index, ret);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5747
5748 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5749 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
5750 __func__, mi2s_mclk[index].clk_freq_in_hz);
5751 ret = afe_set_lpass_clock_v2(port_id,
5752 &mi2s_mclk[index]);
5753 if (ret < 0)
5754 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
5755 __func__, index, ret);
5756 mi2s_mclk[index].enable = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5757 }
5758 }
5759 mutex_unlock(&mi2s_intf_conf[index].lock);
5760}
5761
5762static struct snd_soc_ops msm_mi2s_be_ops = {
5763 .startup = msm_mi2s_snd_startup,
5764 .shutdown = msm_mi2s_snd_shutdown,
5765};
5766
5767static struct snd_soc_ops msm_cdc_dma_be_ops = {
5768 .hw_params = msm_snd_cdc_dma_hw_params,
5769};
5770
5771static struct snd_soc_ops msm_be_ops = {
5772 .hw_params = msm_snd_hw_params,
5773};
5774
5775static struct snd_soc_ops msm_slimbus_2_be_ops = {
5776 .hw_params = msm_slimbus_2_hw_params,
5777};
5778
5779static struct snd_soc_ops msm_wcn_ops = {
5780 .hw_params = msm_wcn_hw_params,
5781};
5782
5783
5784/* Digital audio interface glue - connects codec <---> CPU */
5785static struct snd_soc_dai_link msm_common_dai_links[] = {
5786 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5787 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5788 .name = MSM_DAILINK_NAME(Media1),
5789 .stream_name = "MultiMedia1",
5790 .cpu_dai_name = "MultiMedia1",
5791 .platform_name = "msm-pcm-dsp.0",
5792 .dynamic = 1,
5793 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5794 .dpcm_playback = 1,
5795 .dpcm_capture = 1,
5796 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5797 SND_SOC_DPCM_TRIGGER_POST},
5798 .codec_dai_name = "snd-soc-dummy-dai",
5799 .codec_name = "snd-soc-dummy",
5800 .ignore_suspend = 1,
5801 /* this dainlink has playback support */
5802 .ignore_pmdown_time = 1,
5803 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5804 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5805 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5806 .name = MSM_DAILINK_NAME(Media2),
5807 .stream_name = "MultiMedia2",
5808 .cpu_dai_name = "MultiMedia2",
5809 .platform_name = "msm-pcm-dsp.0",
5810 .dynamic = 1,
5811 .dpcm_playback = 1,
5812 .dpcm_capture = 1,
5813 .codec_dai_name = "snd-soc-dummy-dai",
5814 .codec_name = "snd-soc-dummy",
5815 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5816 SND_SOC_DPCM_TRIGGER_POST},
5817 .ignore_suspend = 1,
5818 /* this dainlink has playback support */
5819 .ignore_pmdown_time = 1,
5820 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5821 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5822 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5823 .name = "VoiceMMode1",
5824 .stream_name = "VoiceMMode1",
5825 .cpu_dai_name = "VoiceMMode1",
5826 .platform_name = "msm-pcm-voice",
5827 .dynamic = 1,
5828 .dpcm_playback = 1,
5829 .dpcm_capture = 1,
5830 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5831 SND_SOC_DPCM_TRIGGER_POST},
5832 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5833 .ignore_suspend = 1,
5834 .ignore_pmdown_time = 1,
5835 .codec_dai_name = "snd-soc-dummy-dai",
5836 .codec_name = "snd-soc-dummy",
5837 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5838 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5839 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5840 .name = "MSM VoIP",
5841 .stream_name = "VoIP",
5842 .cpu_dai_name = "VoIP",
5843 .platform_name = "msm-voip-dsp",
5844 .dynamic = 1,
5845 .dpcm_playback = 1,
5846 .dpcm_capture = 1,
5847 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5848 SND_SOC_DPCM_TRIGGER_POST},
5849 .codec_dai_name = "snd-soc-dummy-dai",
5850 .codec_name = "snd-soc-dummy",
5851 .ignore_suspend = 1,
5852 /* this dainlink has playback support */
5853 .ignore_pmdown_time = 1,
5854 .id = MSM_FRONTEND_DAI_VOIP,
5855 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5856 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5857 .name = MSM_DAILINK_NAME(ULL),
5858 .stream_name = "MultiMedia3",
5859 .cpu_dai_name = "MultiMedia3",
5860 .platform_name = "msm-pcm-dsp.2",
5861 .dynamic = 1,
5862 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5863 .dpcm_playback = 1,
5864 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5865 SND_SOC_DPCM_TRIGGER_POST},
5866 .codec_dai_name = "snd-soc-dummy-dai",
5867 .codec_name = "snd-soc-dummy",
5868 .ignore_suspend = 1,
5869 /* this dainlink has playback support */
5870 .ignore_pmdown_time = 1,
5871 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5872 },
5873 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5874 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5875 .name = "SLIMBUS_0 Hostless",
5876 .stream_name = "SLIMBUS_0 Hostless",
5877 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5878 .platform_name = "msm-pcm-hostless",
5879 .dynamic = 1,
5880 .dpcm_playback = 1,
5881 .dpcm_capture = 1,
5882 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5883 SND_SOC_DPCM_TRIGGER_POST},
5884 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5885 .ignore_suspend = 1,
5886 /* this dailink has playback support */
5887 .ignore_pmdown_time = 1,
5888 .codec_dai_name = "snd-soc-dummy-dai",
5889 .codec_name = "snd-soc-dummy",
5890 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5891 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5892 .name = "MSM AFE-PCM RX",
5893 .stream_name = "AFE-PROXY RX",
5894 .cpu_dai_name = "msm-dai-q6-dev.241",
5895 .codec_name = "msm-stub-codec.1",
5896 .codec_dai_name = "msm-stub-rx",
5897 .platform_name = "msm-pcm-afe",
5898 .dpcm_playback = 1,
5899 .ignore_suspend = 1,
5900 /* this dainlink has playback support */
5901 .ignore_pmdown_time = 1,
5902 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5903 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5904 .name = "MSM AFE-PCM TX",
5905 .stream_name = "AFE-PROXY TX",
5906 .cpu_dai_name = "msm-dai-q6-dev.240",
5907 .codec_name = "msm-stub-codec.1",
5908 .codec_dai_name = "msm-stub-tx",
5909 .platform_name = "msm-pcm-afe",
5910 .dpcm_capture = 1,
5911 .ignore_suspend = 1,
5912 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5913 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5914 .name = MSM_DAILINK_NAME(Compress1),
5915 .stream_name = "Compress1",
5916 .cpu_dai_name = "MultiMedia4",
5917 .platform_name = "msm-compress-dsp",
5918 .dynamic = 1,
5919 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5920 .dpcm_playback = 1,
5921 .dpcm_capture = 1,
5922 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5923 SND_SOC_DPCM_TRIGGER_POST},
5924 .codec_dai_name = "snd-soc-dummy-dai",
5925 .codec_name = "snd-soc-dummy",
5926 .ignore_suspend = 1,
5927 .ignore_pmdown_time = 1,
5928 /* this dainlink has playback support */
5929 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5930 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5931 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5932 .name = "AUXPCM Hostless",
5933 .stream_name = "AUXPCM Hostless",
5934 .cpu_dai_name = "AUXPCM_HOSTLESS",
5935 .platform_name = "msm-pcm-hostless",
5936 .dynamic = 1,
5937 .dpcm_playback = 1,
5938 .dpcm_capture = 1,
5939 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5940 SND_SOC_DPCM_TRIGGER_POST},
5941 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5942 .ignore_suspend = 1,
5943 /* this dainlink has playback support */
5944 .ignore_pmdown_time = 1,
5945 .codec_dai_name = "snd-soc-dummy-dai",
5946 .codec_name = "snd-soc-dummy",
5947 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5948 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5949 .name = "SLIMBUS_1 Hostless",
5950 .stream_name = "SLIMBUS_1 Hostless",
5951 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
5952 .platform_name = "msm-pcm-hostless",
5953 .dynamic = 1,
5954 .dpcm_playback = 1,
5955 .dpcm_capture = 1,
5956 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5957 SND_SOC_DPCM_TRIGGER_POST},
5958 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5959 .ignore_suspend = 1,
5960 /* this dailink has playback support */
5961 .ignore_pmdown_time = 1,
5962 .codec_dai_name = "snd-soc-dummy-dai",
5963 .codec_name = "snd-soc-dummy",
5964 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5965 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5966 .name = "SLIMBUS_3 Hostless",
5967 .stream_name = "SLIMBUS_3 Hostless",
5968 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
5969 .platform_name = "msm-pcm-hostless",
5970 .dynamic = 1,
5971 .dpcm_playback = 1,
5972 .dpcm_capture = 1,
5973 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5974 SND_SOC_DPCM_TRIGGER_POST},
5975 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5976 .ignore_suspend = 1,
5977 /* this dailink has playback support */
5978 .ignore_pmdown_time = 1,
5979 .codec_dai_name = "snd-soc-dummy-dai",
5980 .codec_name = "snd-soc-dummy",
5981 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5982 {/* hw:x,12 */
5983 .name = "SLIMBUS_7 Hostless",
5984 .stream_name = "SLIMBUS_7 Hostless",
5985 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5986 .platform_name = "msm-pcm-hostless",
5987 .dynamic = 1,
5988 .dpcm_playback = 1,
5989 .dpcm_capture = 1,
5990 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5991 SND_SOC_DPCM_TRIGGER_POST},
5992 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5993 .ignore_suspend = 1,
5994 /* this dailink has playback support */
5995 .ignore_pmdown_time = 1,
5996 .codec_dai_name = "snd-soc-dummy-dai",
5997 .codec_name = "snd-soc-dummy",
5998 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5999 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6000 .name = MSM_DAILINK_NAME(LowLatency),
6001 .stream_name = "MultiMedia5",
6002 .cpu_dai_name = "MultiMedia5",
6003 .platform_name = "msm-pcm-dsp.1",
6004 .dynamic = 1,
6005 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6006 .dpcm_playback = 1,
6007 .dpcm_capture = 1,
6008 .codec_dai_name = "snd-soc-dummy-dai",
6009 .codec_name = "snd-soc-dummy",
6010 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6011 SND_SOC_DPCM_TRIGGER_POST},
6012 .ignore_suspend = 1,
6013 /* this dainlink has playback support */
6014 .ignore_pmdown_time = 1,
6015 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6016 .ops = &msm_fe_qos_ops,
6017 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6018 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6019 .name = "Listen 1 Audio Service",
6020 .stream_name = "Listen 1 Audio Service",
6021 .cpu_dai_name = "LSM1",
6022 .platform_name = "msm-lsm-client",
6023 .dynamic = 1,
6024 .dpcm_capture = 1,
6025 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6026 SND_SOC_DPCM_TRIGGER_POST },
6027 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6028 .ignore_suspend = 1,
6029 .codec_dai_name = "snd-soc-dummy-dai",
6030 .codec_name = "snd-soc-dummy",
6031 .id = MSM_FRONTEND_DAI_LSM1,
6032 },
6033 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6034 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6035 .name = MSM_DAILINK_NAME(Compress2),
6036 .stream_name = "Compress2",
6037 .cpu_dai_name = "MultiMedia7",
6038 .platform_name = "msm-compress-dsp",
6039 .dynamic = 1,
6040 .dpcm_playback = 1,
6041 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6042 SND_SOC_DPCM_TRIGGER_POST},
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 .ignore_suspend = 1,
6046 .ignore_pmdown_time = 1,
6047 /* this dainlink has playback support */
6048 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6049 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6050 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6051 .name = MSM_DAILINK_NAME(MultiMedia10),
6052 .stream_name = "MultiMedia10",
6053 .cpu_dai_name = "MultiMedia10",
6054 .platform_name = "msm-pcm-dsp.1",
6055 .dynamic = 1,
6056 .dpcm_playback = 1,
6057 .dpcm_capture = 1,
6058 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6059 SND_SOC_DPCM_TRIGGER_POST},
6060 .codec_dai_name = "snd-soc-dummy-dai",
6061 .codec_name = "snd-soc-dummy",
6062 .ignore_suspend = 1,
6063 .ignore_pmdown_time = 1,
6064 /* this dainlink has playback support */
6065 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6066 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6067 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6068 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6069 .stream_name = "MM_NOIRQ",
6070 .cpu_dai_name = "MultiMedia8",
6071 .platform_name = "msm-pcm-dsp-noirq",
6072 .dynamic = 1,
6073 .dpcm_playback = 1,
6074 .dpcm_capture = 1,
6075 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6076 SND_SOC_DPCM_TRIGGER_POST},
6077 .codec_dai_name = "snd-soc-dummy-dai",
6078 .codec_name = "snd-soc-dummy",
6079 .ignore_suspend = 1,
6080 .ignore_pmdown_time = 1,
6081 /* this dainlink has playback support */
6082 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6083 .ops = &msm_fe_qos_ops,
6084 },
6085 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6086 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6087 .name = "HDMI_RX_HOSTLESS",
6088 .stream_name = "HDMI_RX_HOSTLESS",
6089 .cpu_dai_name = "HDMI_HOSTLESS",
6090 .platform_name = "msm-pcm-hostless",
6091 .dynamic = 1,
6092 .dpcm_playback = 1,
6093 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6094 SND_SOC_DPCM_TRIGGER_POST},
6095 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6096 .ignore_suspend = 1,
6097 .ignore_pmdown_time = 1,
6098 .codec_dai_name = "snd-soc-dummy-dai",
6099 .codec_name = "snd-soc-dummy",
6100 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6101 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6102 .name = "VoiceMMode2",
6103 .stream_name = "VoiceMMode2",
6104 .cpu_dai_name = "VoiceMMode2",
6105 .platform_name = "msm-pcm-voice",
6106 .dynamic = 1,
6107 .dpcm_playback = 1,
6108 .dpcm_capture = 1,
6109 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6110 SND_SOC_DPCM_TRIGGER_POST},
6111 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6112 .ignore_suspend = 1,
6113 .ignore_pmdown_time = 1,
6114 .codec_dai_name = "snd-soc-dummy-dai",
6115 .codec_name = "snd-soc-dummy",
6116 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6117 },
6118 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6119 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6120 .name = "Listen 2 Audio Service",
6121 .stream_name = "Listen 2 Audio Service",
6122 .cpu_dai_name = "LSM2",
6123 .platform_name = "msm-lsm-client",
6124 .dynamic = 1,
6125 .dpcm_capture = 1,
6126 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6127 SND_SOC_DPCM_TRIGGER_POST },
6128 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6129 .ignore_suspend = 1,
6130 .codec_dai_name = "snd-soc-dummy-dai",
6131 .codec_name = "snd-soc-dummy",
6132 .id = MSM_FRONTEND_DAI_LSM2,
6133 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6134 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6135 .name = "Listen 3 Audio Service",
6136 .stream_name = "Listen 3 Audio Service",
6137 .cpu_dai_name = "LSM3",
6138 .platform_name = "msm-lsm-client",
6139 .dynamic = 1,
6140 .dpcm_capture = 1,
6141 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6142 SND_SOC_DPCM_TRIGGER_POST },
6143 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6144 .ignore_suspend = 1,
6145 .codec_dai_name = "snd-soc-dummy-dai",
6146 .codec_name = "snd-soc-dummy",
6147 .id = MSM_FRONTEND_DAI_LSM3,
6148 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6149 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6150 .name = "Listen 4 Audio Service",
6151 .stream_name = "Listen 4 Audio Service",
6152 .cpu_dai_name = "LSM4",
6153 .platform_name = "msm-lsm-client",
6154 .dynamic = 1,
6155 .dpcm_capture = 1,
6156 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6157 SND_SOC_DPCM_TRIGGER_POST },
6158 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6159 .ignore_suspend = 1,
6160 .codec_dai_name = "snd-soc-dummy-dai",
6161 .codec_name = "snd-soc-dummy",
6162 .id = MSM_FRONTEND_DAI_LSM4,
6163 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6164 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6165 .name = "Listen 5 Audio Service",
6166 .stream_name = "Listen 5 Audio Service",
6167 .cpu_dai_name = "LSM5",
6168 .platform_name = "msm-lsm-client",
6169 .dynamic = 1,
6170 .dpcm_capture = 1,
6171 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6172 SND_SOC_DPCM_TRIGGER_POST },
6173 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6174 .ignore_suspend = 1,
6175 .codec_dai_name = "snd-soc-dummy-dai",
6176 .codec_name = "snd-soc-dummy",
6177 .id = MSM_FRONTEND_DAI_LSM5,
6178 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6179 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6180 .name = "Listen 6 Audio Service",
6181 .stream_name = "Listen 6 Audio Service",
6182 .cpu_dai_name = "LSM6",
6183 .platform_name = "msm-lsm-client",
6184 .dynamic = 1,
6185 .dpcm_capture = 1,
6186 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6187 SND_SOC_DPCM_TRIGGER_POST },
6188 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6189 .ignore_suspend = 1,
6190 .codec_dai_name = "snd-soc-dummy-dai",
6191 .codec_name = "snd-soc-dummy",
6192 .id = MSM_FRONTEND_DAI_LSM6,
6193 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6194 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6195 .name = "Listen 7 Audio Service",
6196 .stream_name = "Listen 7 Audio Service",
6197 .cpu_dai_name = "LSM7",
6198 .platform_name = "msm-lsm-client",
6199 .dynamic = 1,
6200 .dpcm_capture = 1,
6201 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6202 SND_SOC_DPCM_TRIGGER_POST },
6203 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6204 .ignore_suspend = 1,
6205 .codec_dai_name = "snd-soc-dummy-dai",
6206 .codec_name = "snd-soc-dummy",
6207 .id = MSM_FRONTEND_DAI_LSM7,
6208 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6209 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6210 .name = "Listen 8 Audio Service",
6211 .stream_name = "Listen 8 Audio Service",
6212 .cpu_dai_name = "LSM8",
6213 .platform_name = "msm-lsm-client",
6214 .dynamic = 1,
6215 .dpcm_capture = 1,
6216 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6217 SND_SOC_DPCM_TRIGGER_POST },
6218 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6219 .ignore_suspend = 1,
6220 .codec_dai_name = "snd-soc-dummy-dai",
6221 .codec_name = "snd-soc-dummy",
6222 .id = MSM_FRONTEND_DAI_LSM8,
6223 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6224 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6225 .name = MSM_DAILINK_NAME(Media9),
6226 .stream_name = "MultiMedia9",
6227 .cpu_dai_name = "MultiMedia9",
6228 .platform_name = "msm-pcm-dsp.0",
6229 .dynamic = 1,
6230 .dpcm_playback = 1,
6231 .dpcm_capture = 1,
6232 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6233 SND_SOC_DPCM_TRIGGER_POST},
6234 .codec_dai_name = "snd-soc-dummy-dai",
6235 .codec_name = "snd-soc-dummy",
6236 .ignore_suspend = 1,
6237 /* this dainlink has playback support */
6238 .ignore_pmdown_time = 1,
6239 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6240 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6241 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6242 .name = MSM_DAILINK_NAME(Compress4),
6243 .stream_name = "Compress4",
6244 .cpu_dai_name = "MultiMedia11",
6245 .platform_name = "msm-compress-dsp",
6246 .dynamic = 1,
6247 .dpcm_playback = 1,
6248 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6249 SND_SOC_DPCM_TRIGGER_POST},
6250 .codec_dai_name = "snd-soc-dummy-dai",
6251 .codec_name = "snd-soc-dummy",
6252 .ignore_suspend = 1,
6253 .ignore_pmdown_time = 1,
6254 /* this dainlink has playback support */
6255 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6256 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6257 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6258 .name = MSM_DAILINK_NAME(Compress5),
6259 .stream_name = "Compress5",
6260 .cpu_dai_name = "MultiMedia12",
6261 .platform_name = "msm-compress-dsp",
6262 .dynamic = 1,
6263 .dpcm_playback = 1,
6264 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6265 SND_SOC_DPCM_TRIGGER_POST},
6266 .codec_dai_name = "snd-soc-dummy-dai",
6267 .codec_name = "snd-soc-dummy",
6268 .ignore_suspend = 1,
6269 .ignore_pmdown_time = 1,
6270 /* this dainlink has playback support */
6271 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6272 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6273 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6274 .name = MSM_DAILINK_NAME(Compress6),
6275 .stream_name = "Compress6",
6276 .cpu_dai_name = "MultiMedia13",
6277 .platform_name = "msm-compress-dsp",
6278 .dynamic = 1,
6279 .dpcm_playback = 1,
6280 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6281 SND_SOC_DPCM_TRIGGER_POST},
6282 .codec_dai_name = "snd-soc-dummy-dai",
6283 .codec_name = "snd-soc-dummy",
6284 .ignore_suspend = 1,
6285 .ignore_pmdown_time = 1,
6286 /* this dainlink has playback support */
6287 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6288 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6289 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6290 .name = MSM_DAILINK_NAME(Compress7),
6291 .stream_name = "Compress7",
6292 .cpu_dai_name = "MultiMedia14",
6293 .platform_name = "msm-compress-dsp",
6294 .dynamic = 1,
6295 .dpcm_playback = 1,
6296 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6297 SND_SOC_DPCM_TRIGGER_POST},
6298 .codec_dai_name = "snd-soc-dummy-dai",
6299 .codec_name = "snd-soc-dummy",
6300 .ignore_suspend = 1,
6301 .ignore_pmdown_time = 1,
6302 /* this dainlink has playback support */
6303 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6305 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6306 .name = MSM_DAILINK_NAME(Compress8),
6307 .stream_name = "Compress8",
6308 .cpu_dai_name = "MultiMedia15",
6309 .platform_name = "msm-compress-dsp",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6313 SND_SOC_DPCM_TRIGGER_POST},
6314 .codec_dai_name = "snd-soc-dummy-dai",
6315 .codec_name = "snd-soc-dummy",
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 /* this dainlink has playback support */
6319 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6320 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6321 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6322 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6323 .stream_name = "MM_NOIRQ_2",
6324 .cpu_dai_name = "MultiMedia16",
6325 .platform_name = "msm-pcm-dsp-noirq",
6326 .dynamic = 1,
6327 .dpcm_playback = 1,
6328 .dpcm_capture = 1,
6329 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6330 SND_SOC_DPCM_TRIGGER_POST},
6331 .codec_dai_name = "snd-soc-dummy-dai",
6332 .codec_name = "snd-soc-dummy",
6333 .ignore_suspend = 1,
6334 .ignore_pmdown_time = 1,
6335 /* this dainlink has playback support */
6336 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6337 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6338 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6339 .name = "SLIMBUS_8 Hostless",
6340 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6341 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6342 .platform_name = "msm-pcm-hostless",
6343 .dynamic = 1,
6344 .dpcm_capture = 1,
6345 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6346 SND_SOC_DPCM_TRIGGER_POST},
6347 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6348 .ignore_suspend = 1,
6349 .codec_dai_name = "snd-soc-dummy-dai",
6350 .codec_name = "snd-soc-dummy",
6351 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6352 {/* hw:x,35 */
6353 .name = "CDC_DMA Hostless",
6354 .stream_name = "CDC_DMA Hostless",
6355 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6356 .platform_name = "msm-pcm-hostless",
6357 .dynamic = 1,
6358 .dpcm_playback = 1,
6359 .dpcm_capture = 1,
6360 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6361 SND_SOC_DPCM_TRIGGER_POST},
6362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6363 .ignore_suspend = 1,
6364 /* this dailink has playback support */
6365 .ignore_pmdown_time = 1,
6366 .codec_dai_name = "snd-soc-dummy-dai",
6367 .codec_name = "snd-soc-dummy",
6368 },
6369 {/* hw:x,36 */
6370 .name = "TX3_CDC_DMA Hostless",
6371 .stream_name = "TX3_CDC_DMA Hostless",
6372 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6373 .platform_name = "msm-pcm-hostless",
6374 .dynamic = 1,
6375 .dpcm_capture = 1,
6376 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6377 SND_SOC_DPCM_TRIGGER_POST},
6378 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6379 .ignore_suspend = 1,
6380 .codec_dai_name = "snd-soc-dummy-dai",
6381 .codec_name = "snd-soc-dummy",
6382 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6383};
6384
6385
6386static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6387 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6388 .name = LPASS_BE_SLIMBUS_4_TX,
6389 .stream_name = "Slimbus4 Capture",
6390 .cpu_dai_name = "msm-dai-q6-dev.16393",
6391 .platform_name = "msm-pcm-hostless",
6392 .codec_name = "tavil_codec",
6393 .codec_dai_name = "tavil_vifeedback",
6394 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6395 .be_hw_params_fixup = msm_be_hw_params_fixup,
6396 .ops = &msm_be_ops,
6397 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6398 .ignore_suspend = 1,
6399 },
6400 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6401 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6402 .name = "SLIMBUS_2 Hostless Playback",
6403 .stream_name = "SLIMBUS_2 Hostless Playback",
6404 .cpu_dai_name = "msm-dai-q6-dev.16388",
6405 .platform_name = "msm-pcm-hostless",
6406 .codec_name = "tavil_codec",
6407 .codec_dai_name = "tavil_rx2",
6408 .ignore_suspend = 1,
6409 .ignore_pmdown_time = 1,
6410 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6411 .ops = &msm_slimbus_2_be_ops,
6412 },
6413 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6414 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6415 .name = "SLIMBUS_2 Hostless Capture",
6416 .stream_name = "SLIMBUS_2 Hostless Capture",
6417 .cpu_dai_name = "msm-dai-q6-dev.16389",
6418 .platform_name = "msm-pcm-hostless",
6419 .codec_name = "tavil_codec",
6420 .codec_dai_name = "tavil_tx2",
6421 .ignore_suspend = 1,
6422 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6423 .ops = &msm_slimbus_2_be_ops,
6424 },
6425};
6426
6427static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6428 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6429 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6430 .stream_name = "WSA CDC DMA0 Capture",
6431 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6432 .platform_name = "msm-pcm-hostless",
6433 .codec_name = "bolero_codec",
6434 .codec_dai_name = "wsa_macro_vifeedback",
6435 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6436 .be_hw_params_fixup = msm_be_hw_params_fixup,
6437 .ignore_suspend = 1,
6438 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6439 .ops = &msm_cdc_dma_be_ops,
6440 },
6441};
6442
6443static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6444 {
6445 .name = MSM_DAILINK_NAME(ASM Loopback),
6446 .stream_name = "MultiMedia6",
6447 .cpu_dai_name = "MultiMedia6",
6448 .platform_name = "msm-pcm-loopback",
6449 .dynamic = 1,
6450 .dpcm_playback = 1,
6451 .dpcm_capture = 1,
6452 .codec_dai_name = "snd-soc-dummy-dai",
6453 .codec_name = "snd-soc-dummy",
6454 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6455 SND_SOC_DPCM_TRIGGER_POST},
6456 .ignore_suspend = 1,
6457 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6458 .ignore_pmdown_time = 1,
6459 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6460 },
6461 {
6462 .name = "USB Audio Hostless",
6463 .stream_name = "USB Audio Hostless",
6464 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6465 .platform_name = "msm-pcm-hostless",
6466 .dynamic = 1,
6467 .dpcm_playback = 1,
6468 .dpcm_capture = 1,
6469 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6470 SND_SOC_DPCM_TRIGGER_POST},
6471 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6472 .ignore_suspend = 1,
6473 .ignore_pmdown_time = 1,
6474 .codec_dai_name = "snd-soc-dummy-dai",
6475 .codec_name = "snd-soc-dummy",
6476 },
6477};
6478
6479static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6480 /* Backend AFE DAI Links */
6481 {
6482 .name = LPASS_BE_AFE_PCM_RX,
6483 .stream_name = "AFE Playback",
6484 .cpu_dai_name = "msm-dai-q6-dev.224",
6485 .platform_name = "msm-pcm-routing",
6486 .codec_name = "msm-stub-codec.1",
6487 .codec_dai_name = "msm-stub-rx",
6488 .no_pcm = 1,
6489 .dpcm_playback = 1,
6490 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6491 .be_hw_params_fixup = msm_be_hw_params_fixup,
6492 /* this dainlink has playback support */
6493 .ignore_pmdown_time = 1,
6494 .ignore_suspend = 1,
6495 },
6496 {
6497 .name = LPASS_BE_AFE_PCM_TX,
6498 .stream_name = "AFE Capture",
6499 .cpu_dai_name = "msm-dai-q6-dev.225",
6500 .platform_name = "msm-pcm-routing",
6501 .codec_name = "msm-stub-codec.1",
6502 .codec_dai_name = "msm-stub-tx",
6503 .no_pcm = 1,
6504 .dpcm_capture = 1,
6505 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6506 .be_hw_params_fixup = msm_be_hw_params_fixup,
6507 .ignore_suspend = 1,
6508 },
6509 /* Incall Record Uplink BACK END DAI Link */
6510 {
6511 .name = LPASS_BE_INCALL_RECORD_TX,
6512 .stream_name = "Voice Uplink Capture",
6513 .cpu_dai_name = "msm-dai-q6-dev.32772",
6514 .platform_name = "msm-pcm-routing",
6515 .codec_name = "msm-stub-codec.1",
6516 .codec_dai_name = "msm-stub-tx",
6517 .no_pcm = 1,
6518 .dpcm_capture = 1,
6519 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6520 .be_hw_params_fixup = msm_be_hw_params_fixup,
6521 .ignore_suspend = 1,
6522 },
6523 /* Incall Record Downlink BACK END DAI Link */
6524 {
6525 .name = LPASS_BE_INCALL_RECORD_RX,
6526 .stream_name = "Voice Downlink Capture",
6527 .cpu_dai_name = "msm-dai-q6-dev.32771",
6528 .platform_name = "msm-pcm-routing",
6529 .codec_name = "msm-stub-codec.1",
6530 .codec_dai_name = "msm-stub-tx",
6531 .no_pcm = 1,
6532 .dpcm_capture = 1,
6533 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6534 .be_hw_params_fixup = msm_be_hw_params_fixup,
6535 .ignore_suspend = 1,
6536 },
6537 /* Incall Music BACK END DAI Link */
6538 {
6539 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6540 .stream_name = "Voice Farend Playback",
6541 .cpu_dai_name = "msm-dai-q6-dev.32773",
6542 .platform_name = "msm-pcm-routing",
6543 .codec_name = "msm-stub-codec.1",
6544 .codec_dai_name = "msm-stub-rx",
6545 .no_pcm = 1,
6546 .dpcm_playback = 1,
6547 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6548 .be_hw_params_fixup = msm_be_hw_params_fixup,
6549 .ignore_suspend = 1,
6550 .ignore_pmdown_time = 1,
6551 },
6552 /* Incall Music 2 BACK END DAI Link */
6553 {
6554 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6555 .stream_name = "Voice2 Farend Playback",
6556 .cpu_dai_name = "msm-dai-q6-dev.32770",
6557 .platform_name = "msm-pcm-routing",
6558 .codec_name = "msm-stub-codec.1",
6559 .codec_dai_name = "msm-stub-rx",
6560 .no_pcm = 1,
6561 .dpcm_playback = 1,
6562 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6563 .be_hw_params_fixup = msm_be_hw_params_fixup,
6564 .ignore_suspend = 1,
6565 .ignore_pmdown_time = 1,
6566 },
6567 {
6568 .name = LPASS_BE_USB_AUDIO_RX,
6569 .stream_name = "USB Audio Playback",
6570 .cpu_dai_name = "msm-dai-q6-dev.28672",
6571 .platform_name = "msm-pcm-routing",
6572 .codec_name = "msm-stub-codec.1",
6573 .codec_dai_name = "msm-stub-rx",
6574 .no_pcm = 1,
6575 .dpcm_playback = 1,
6576 .id = MSM_BACKEND_DAI_USB_RX,
6577 .be_hw_params_fixup = msm_be_hw_params_fixup,
6578 .ignore_pmdown_time = 1,
6579 .ignore_suspend = 1,
6580 },
6581 {
6582 .name = LPASS_BE_USB_AUDIO_TX,
6583 .stream_name = "USB Audio Capture",
6584 .cpu_dai_name = "msm-dai-q6-dev.28673",
6585 .platform_name = "msm-pcm-routing",
6586 .codec_name = "msm-stub-codec.1",
6587 .codec_dai_name = "msm-stub-tx",
6588 .no_pcm = 1,
6589 .dpcm_capture = 1,
6590 .id = MSM_BACKEND_DAI_USB_TX,
6591 .be_hw_params_fixup = msm_be_hw_params_fixup,
6592 .ignore_suspend = 1,
6593 },
6594 {
6595 .name = LPASS_BE_PRI_TDM_RX_0,
6596 .stream_name = "Primary TDM0 Playback",
6597 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6598 .platform_name = "msm-pcm-routing",
6599 .codec_name = "msm-stub-codec.1",
6600 .codec_dai_name = "msm-stub-rx",
6601 .no_pcm = 1,
6602 .dpcm_playback = 1,
6603 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6604 .be_hw_params_fixup = msm_be_hw_params_fixup,
6605 .ops = &sm6150_tdm_be_ops,
6606 .ignore_suspend = 1,
6607 .ignore_pmdown_time = 1,
6608 },
6609 {
6610 .name = LPASS_BE_PRI_TDM_TX_0,
6611 .stream_name = "Primary TDM0 Capture",
6612 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6613 .platform_name = "msm-pcm-routing",
6614 .codec_name = "msm-stub-codec.1",
6615 .codec_dai_name = "msm-stub-tx",
6616 .no_pcm = 1,
6617 .dpcm_capture = 1,
6618 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6619 .be_hw_params_fixup = msm_be_hw_params_fixup,
6620 .ops = &sm6150_tdm_be_ops,
6621 .ignore_suspend = 1,
6622 },
6623 {
6624 .name = LPASS_BE_SEC_TDM_RX_0,
6625 .stream_name = "Secondary TDM0 Playback",
6626 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6627 .platform_name = "msm-pcm-routing",
6628 .codec_name = "msm-stub-codec.1",
6629 .codec_dai_name = "msm-stub-rx",
6630 .no_pcm = 1,
6631 .dpcm_playback = 1,
6632 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6633 .be_hw_params_fixup = msm_be_hw_params_fixup,
6634 .ops = &sm6150_tdm_be_ops,
6635 .ignore_suspend = 1,
6636 .ignore_pmdown_time = 1,
6637 },
6638 {
6639 .name = LPASS_BE_SEC_TDM_TX_0,
6640 .stream_name = "Secondary TDM0 Capture",
6641 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6642 .platform_name = "msm-pcm-routing",
6643 .codec_name = "msm-stub-codec.1",
6644 .codec_dai_name = "msm-stub-tx",
6645 .no_pcm = 1,
6646 .dpcm_capture = 1,
6647 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6648 .be_hw_params_fixup = msm_be_hw_params_fixup,
6649 .ops = &sm6150_tdm_be_ops,
6650 .ignore_suspend = 1,
6651 },
6652 {
6653 .name = LPASS_BE_TERT_TDM_RX_0,
6654 .stream_name = "Tertiary TDM0 Playback",
6655 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6656 .platform_name = "msm-pcm-routing",
6657 .codec_name = "msm-stub-codec.1",
6658 .codec_dai_name = "msm-stub-rx",
6659 .no_pcm = 1,
6660 .dpcm_playback = 1,
6661 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6662 .be_hw_params_fixup = msm_be_hw_params_fixup,
6663 .ops = &sm6150_tdm_be_ops,
6664 .ignore_suspend = 1,
6665 .ignore_pmdown_time = 1,
6666 },
6667 {
6668 .name = LPASS_BE_TERT_TDM_TX_0,
6669 .stream_name = "Tertiary TDM0 Capture",
6670 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6671 .platform_name = "msm-pcm-routing",
6672 .codec_name = "msm-stub-codec.1",
6673 .codec_dai_name = "msm-stub-tx",
6674 .no_pcm = 1,
6675 .dpcm_capture = 1,
6676 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6677 .be_hw_params_fixup = msm_be_hw_params_fixup,
6678 .ops = &sm6150_tdm_be_ops,
6679 .ignore_suspend = 1,
6680 },
6681 {
6682 .name = LPASS_BE_QUAT_TDM_RX_0,
6683 .stream_name = "Quaternary TDM0 Playback",
6684 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6685 .platform_name = "msm-pcm-routing",
6686 .codec_name = "msm-stub-codec.1",
6687 .codec_dai_name = "msm-stub-rx",
6688 .no_pcm = 1,
6689 .dpcm_playback = 1,
6690 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]6691 .be_hw_params_fixup = msm_be_hw_params_fixup,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6692 .ops = &sm6150_tdm_be_ops,
6693 .ignore_suspend = 1,
6694 .ignore_pmdown_time = 1,
6695 },
6696 {
6697 .name = LPASS_BE_QUAT_TDM_TX_0,
6698 .stream_name = "Quaternary TDM0 Capture",
6699 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6700 .platform_name = "msm-pcm-routing",
6701 .codec_name = "msm-stub-codec.1",
6702 .codec_dai_name = "msm-stub-tx",
6703 .no_pcm = 1,
6704 .dpcm_capture = 1,
6705 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6706 .be_hw_params_fixup = msm_be_hw_params_fixup,
6707 .ops = &sm6150_tdm_be_ops,
6708 .ignore_suspend = 1,
6709 },
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]6710 {
6711 .name = LPASS_BE_QUIN_TDM_RX_0,
6712 .stream_name = "Quinary TDM0 Playback",
6713 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6714 .platform_name = "msm-pcm-routing",
6715 .codec_name = "msm-stub-codec.1",
6716 .codec_dai_name = "msm-stub-rx",
6717 .no_pcm = 1,
6718 .dpcm_playback = 1,
6719 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6720 .be_hw_params_fixup = msm_be_hw_params_fixup,
6721 .ops = &sm6150_tdm_be_ops,
6722 .ignore_suspend = 1,
6723 .ignore_pmdown_time = 1,
6724 },
6725 {
6726 .name = LPASS_BE_QUIN_TDM_TX_0,
6727 .stream_name = "Quinary TDM0 Capture",
6728 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6729 .platform_name = "msm-pcm-routing",
6730 .codec_name = "msm-stub-codec.1",
6731 .codec_dai_name = "msm-stub-tx",
6732 .no_pcm = 1,
6733 .dpcm_capture = 1,
6734 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6735 .be_hw_params_fixup = msm_be_hw_params_fixup,
6736 .ops = &sm6150_tdm_be_ops,
6737 .ignore_suspend = 1,
6738 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6739};
6740
6741static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6742 {
6743 .name = LPASS_BE_SLIMBUS_0_RX,
6744 .stream_name = "Slimbus Playback",
6745 .cpu_dai_name = "msm-dai-q6-dev.16384",
6746 .platform_name = "msm-pcm-routing",
6747 .codec_name = "tavil_codec",
6748 .codec_dai_name = "tavil_rx1",
6749 .no_pcm = 1,
6750 .dpcm_playback = 1,
6751 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6752 .init = &msm_audrx_tavil_init,
6753 .be_hw_params_fixup = msm_be_hw_params_fixup,
6754 /* this dainlink has playback support */
6755 .ignore_pmdown_time = 1,
6756 .ignore_suspend = 1,
6757 .ops = &msm_be_ops,
6758 },
6759 {
6760 .name = LPASS_BE_SLIMBUS_0_TX,
6761 .stream_name = "Slimbus Capture",
6762 .cpu_dai_name = "msm-dai-q6-dev.16385",
6763 .platform_name = "msm-pcm-routing",
6764 .codec_name = "tavil_codec",
6765 .codec_dai_name = "tavil_tx1",
6766 .no_pcm = 1,
6767 .dpcm_capture = 1,
6768 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6769 .be_hw_params_fixup = msm_be_hw_params_fixup,
6770 .ignore_suspend = 1,
6771 .ops = &msm_be_ops,
6772 },
6773 {
6774 .name = LPASS_BE_SLIMBUS_1_RX,
6775 .stream_name = "Slimbus1 Playback",
6776 .cpu_dai_name = "msm-dai-q6-dev.16386",
6777 .platform_name = "msm-pcm-routing",
6778 .codec_name = "tavil_codec",
6779 .codec_dai_name = "tavil_rx1",
6780 .no_pcm = 1,
6781 .dpcm_playback = 1,
6782 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6783 .be_hw_params_fixup = msm_be_hw_params_fixup,
6784 .ops = &msm_be_ops,
6785 /* dai link has playback support */
6786 .ignore_pmdown_time = 1,
6787 .ignore_suspend = 1,
6788 },
6789 {
6790 .name = LPASS_BE_SLIMBUS_1_TX,
6791 .stream_name = "Slimbus1 Capture",
6792 .cpu_dai_name = "msm-dai-q6-dev.16387",
6793 .platform_name = "msm-pcm-routing",
6794 .codec_name = "tavil_codec",
6795 .codec_dai_name = "tavil_tx3",
6796 .no_pcm = 1,
6797 .dpcm_capture = 1,
6798 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6799 .be_hw_params_fixup = msm_be_hw_params_fixup,
6800 .ops = &msm_be_ops,
6801 .ignore_suspend = 1,
6802 },
6803 {
6804 .name = LPASS_BE_SLIMBUS_2_RX,
6805 .stream_name = "Slimbus2 Playback",
6806 .cpu_dai_name = "msm-dai-q6-dev.16388",
6807 .platform_name = "msm-pcm-routing",
6808 .codec_name = "tavil_codec",
6809 .codec_dai_name = "tavil_rx2",
6810 .no_pcm = 1,
6811 .dpcm_playback = 1,
6812 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6813 .be_hw_params_fixup = msm_be_hw_params_fixup,
6814 .ops = &msm_be_ops,
6815 .ignore_pmdown_time = 1,
6816 .ignore_suspend = 1,
6817 },
6818 {
6819 .name = LPASS_BE_SLIMBUS_3_RX,
6820 .stream_name = "Slimbus3 Playback",
6821 .cpu_dai_name = "msm-dai-q6-dev.16390",
6822 .platform_name = "msm-pcm-routing",
6823 .codec_name = "tavil_codec",
6824 .codec_dai_name = "tavil_rx1",
6825 .no_pcm = 1,
6826 .dpcm_playback = 1,
6827 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6828 .be_hw_params_fixup = msm_be_hw_params_fixup,
6829 .ops = &msm_be_ops,
6830 /* dai link has playback support */
6831 .ignore_pmdown_time = 1,
6832 .ignore_suspend = 1,
6833 },
6834 {
6835 .name = LPASS_BE_SLIMBUS_3_TX,
6836 .stream_name = "Slimbus3 Capture",
6837 .cpu_dai_name = "msm-dai-q6-dev.16391",
6838 .platform_name = "msm-pcm-routing",
6839 .codec_name = "tavil_codec",
6840 .codec_dai_name = "tavil_tx1",
6841 .no_pcm = 1,
6842 .dpcm_capture = 1,
6843 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6844 .be_hw_params_fixup = msm_be_hw_params_fixup,
6845 .ops = &msm_be_ops,
6846 .ignore_suspend = 1,
6847 },
6848 {
6849 .name = LPASS_BE_SLIMBUS_4_RX,
6850 .stream_name = "Slimbus4 Playback",
6851 .cpu_dai_name = "msm-dai-q6-dev.16392",
6852 .platform_name = "msm-pcm-routing",
6853 .codec_name = "tavil_codec",
6854 .codec_dai_name = "tavil_rx1",
6855 .no_pcm = 1,
6856 .dpcm_playback = 1,
6857 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6858 .be_hw_params_fixup = msm_be_hw_params_fixup,
6859 .ops = &msm_be_ops,
6860 /* dai link has playback support */
6861 .ignore_pmdown_time = 1,
6862 .ignore_suspend = 1,
6863 },
6864 {
6865 .name = LPASS_BE_SLIMBUS_5_RX,
6866 .stream_name = "Slimbus5 Playback",
6867 .cpu_dai_name = "msm-dai-q6-dev.16394",
6868 .platform_name = "msm-pcm-routing",
6869 .codec_name = "tavil_codec",
6870 .codec_dai_name = "tavil_rx3",
6871 .no_pcm = 1,
6872 .dpcm_playback = 1,
6873 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6874 .be_hw_params_fixup = msm_be_hw_params_fixup,
6875 .ops = &msm_be_ops,
6876 /* dai link has playback support */
6877 .ignore_pmdown_time = 1,
6878 .ignore_suspend = 1,
6879 },
6880 /* MAD BE */
6881 {
6882 .name = LPASS_BE_SLIMBUS_5_TX,
6883 .stream_name = "Slimbus5 Capture",
6884 .cpu_dai_name = "msm-dai-q6-dev.16395",
6885 .platform_name = "msm-pcm-routing",
6886 .codec_name = "tavil_codec",
6887 .codec_dai_name = "tavil_mad1",
6888 .no_pcm = 1,
6889 .dpcm_capture = 1,
6890 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6891 .be_hw_params_fixup = msm_be_hw_params_fixup,
6892 .ops = &msm_be_ops,
6893 .ignore_suspend = 1,
6894 },
6895 {
6896 .name = LPASS_BE_SLIMBUS_6_RX,
6897 .stream_name = "Slimbus6 Playback",
6898 .cpu_dai_name = "msm-dai-q6-dev.16396",
6899 .platform_name = "msm-pcm-routing",
6900 .codec_name = "tavil_codec",
6901 .codec_dai_name = "tavil_rx4",
6902 .no_pcm = 1,
6903 .dpcm_playback = 1,
6904 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6905 .be_hw_params_fixup = msm_be_hw_params_fixup,
6906 .ops = &msm_be_ops,
6907 /* dai link has playback support */
6908 .ignore_pmdown_time = 1,
6909 .ignore_suspend = 1,
6910 },
6911 /* Slimbus VI Recording */
6912 {
6913 .name = LPASS_BE_SLIMBUS_TX_VI,
6914 .stream_name = "Slimbus4 Capture",
6915 .cpu_dai_name = "msm-dai-q6-dev.16393",
6916 .platform_name = "msm-pcm-routing",
6917 .codec_name = "tavil_codec",
6918 .codec_dai_name = "tavil_vifeedback",
6919 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6920 .be_hw_params_fixup = msm_be_hw_params_fixup,
6921 .ops = &msm_be_ops,
6922 .ignore_suspend = 1,
6923 .no_pcm = 1,
6924 .dpcm_capture = 1,
6925 },
6926};
6927
6928static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6929 {
6930 .name = LPASS_BE_SLIMBUS_7_RX,
6931 .stream_name = "Slimbus7 Playback",
6932 .cpu_dai_name = "msm-dai-q6-dev.16398",
6933 .platform_name = "msm-pcm-routing",
6934 .codec_name = "btfmslim_slave",
6935 /* BT codec driver determines capabilities based on
6936 * dai name, bt codecdai name should always contains
6937 * supported usecase information
6938 */
6939 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6940 .no_pcm = 1,
6941 .dpcm_playback = 1,
6942 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6943 .be_hw_params_fixup = msm_be_hw_params_fixup,
6944 .ops = &msm_wcn_ops,
6945 /* dai link has playback support */
6946 .ignore_pmdown_time = 1,
6947 .ignore_suspend = 1,
6948 },
6949 {
6950 .name = LPASS_BE_SLIMBUS_7_TX,
6951 .stream_name = "Slimbus7 Capture",
6952 .cpu_dai_name = "msm-dai-q6-dev.16399",
6953 .platform_name = "msm-pcm-routing",
6954 .codec_name = "btfmslim_slave",
6955 .codec_dai_name = "btfm_bt_sco_slim_tx",
6956 .no_pcm = 1,
6957 .dpcm_capture = 1,
6958 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6959 .be_hw_params_fixup = msm_be_hw_params_fixup,
6960 .ops = &msm_wcn_ops,
6961 .ignore_suspend = 1,
6962 },
6963 {
6964 .name = LPASS_BE_SLIMBUS_8_TX,
6965 .stream_name = "Slimbus8 Capture",
6966 .cpu_dai_name = "msm-dai-q6-dev.16401",
6967 .platform_name = "msm-pcm-routing",
6968 .codec_name = "btfmslim_slave",
6969 .codec_dai_name = "btfm_fm_slim_tx",
6970 .no_pcm = 1,
6971 .dpcm_capture = 1,
6972 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6973 .be_hw_params_fixup = msm_be_hw_params_fixup,
6974 .init = &msm_wcn_init,
6975 .ops = &msm_wcn_ops,
6976 .ignore_suspend = 1,
6977 },
6978};
6979
6980static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6981 /* DISP PORT BACK END DAI Link */
6982 {
6983 .name = LPASS_BE_DISPLAY_PORT,
6984 .stream_name = "Display Port Playback",
6985 .cpu_dai_name = "msm-dai-q6-dp.24608",
6986 .platform_name = "msm-pcm-routing",
6987 .codec_name = "msm-ext-disp-audio-codec-rx",
6988 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6989 .no_pcm = 1,
6990 .dpcm_playback = 1,
6991 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6992 .be_hw_params_fixup = msm_be_hw_params_fixup,
6993 .ignore_pmdown_time = 1,
6994 .ignore_suspend = 1,
6995 },
6996};
6997
6998static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6999 {
7000 .name = LPASS_BE_PRI_MI2S_RX,
7001 .stream_name = "Primary MI2S Playback",
7002 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7003 .platform_name = "msm-pcm-routing",
7004 .codec_name = "msm-stub-codec.1",
7005 .codec_dai_name = "msm-stub-rx",
7006 .no_pcm = 1,
7007 .dpcm_playback = 1,
7008 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7009 .be_hw_params_fixup = msm_be_hw_params_fixup,
7010 .ops = &msm_mi2s_be_ops,
7011 .ignore_suspend = 1,
7012 .ignore_pmdown_time = 1,
7013 },
7014 {
7015 .name = LPASS_BE_PRI_MI2S_TX,
7016 .stream_name = "Primary MI2S Capture",
7017 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7018 .platform_name = "msm-pcm-routing",
7019 .codec_name = "msm-stub-codec.1",
7020 .codec_dai_name = "msm-stub-tx",
7021 .no_pcm = 1,
7022 .dpcm_capture = 1,
7023 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7024 .be_hw_params_fixup = msm_be_hw_params_fixup,
7025 .ops = &msm_mi2s_be_ops,
7026 .ignore_suspend = 1,
7027 },
7028 {
7029 .name = LPASS_BE_SEC_MI2S_RX,
7030 .stream_name = "Secondary MI2S Playback",
7031 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7032 .platform_name = "msm-pcm-routing",
7033 .codec_name = "msm-stub-codec.1",
7034 .codec_dai_name = "msm-stub-rx",
7035 .no_pcm = 1,
7036 .dpcm_playback = 1,
7037 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7038 .be_hw_params_fixup = msm_be_hw_params_fixup,
7039 .ops = &msm_mi2s_be_ops,
7040 .ignore_suspend = 1,
7041 .ignore_pmdown_time = 1,
7042 },
7043 {
7044 .name = LPASS_BE_SEC_MI2S_TX,
7045 .stream_name = "Secondary MI2S Capture",
7046 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7047 .platform_name = "msm-pcm-routing",
7048 .codec_name = "msm-stub-codec.1",
7049 .codec_dai_name = "msm-stub-tx",
7050 .no_pcm = 1,
7051 .dpcm_capture = 1,
7052 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7053 .be_hw_params_fixup = msm_be_hw_params_fixup,
7054 .ops = &msm_mi2s_be_ops,
7055 .ignore_suspend = 1,
7056 },
7057 {
7058 .name = LPASS_BE_TERT_MI2S_RX,
7059 .stream_name = "Tertiary MI2S Playback",
7060 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7061 .platform_name = "msm-pcm-routing",
7062 .codec_name = "msm-stub-codec.1",
7063 .codec_dai_name = "msm-stub-rx",
7064 .no_pcm = 1,
7065 .dpcm_playback = 1,
7066 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7067 .be_hw_params_fixup = msm_be_hw_params_fixup,
7068 .ops = &msm_mi2s_be_ops,
7069 .ignore_suspend = 1,
7070 .ignore_pmdown_time = 1,
7071 },
7072 {
7073 .name = LPASS_BE_TERT_MI2S_TX,
7074 .stream_name = "Tertiary MI2S Capture",
7075 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7076 .platform_name = "msm-pcm-routing",
7077 .codec_name = "msm-stub-codec.1",
7078 .codec_dai_name = "msm-stub-tx",
7079 .no_pcm = 1,
7080 .dpcm_capture = 1,
7081 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7082 .be_hw_params_fixup = msm_be_hw_params_fixup,
7083 .ops = &msm_mi2s_be_ops,
7084 .ignore_suspend = 1,
7085 },
7086 {
7087 .name = LPASS_BE_QUAT_MI2S_RX,
7088 .stream_name = "Quaternary MI2S Playback",
7089 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7090 .platform_name = "msm-pcm-routing",
7091 .codec_name = "msm-stub-codec.1",
7092 .codec_dai_name = "msm-stub-rx",
7093 .no_pcm = 1,
7094 .dpcm_playback = 1,
7095 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7096 .be_hw_params_fixup = msm_be_hw_params_fixup,
7097 .ops = &msm_mi2s_be_ops,
7098 .ignore_suspend = 1,
7099 .ignore_pmdown_time = 1,
7100 },
7101 {
7102 .name = LPASS_BE_QUAT_MI2S_TX,
7103 .stream_name = "Quaternary MI2S Capture",
7104 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7105 .platform_name = "msm-pcm-routing",
7106 .codec_name = "msm-stub-codec.1",
7107 .codec_dai_name = "msm-stub-tx",
7108 .no_pcm = 1,
7109 .dpcm_capture = 1,
7110 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7111 .be_hw_params_fixup = msm_be_hw_params_fixup,
7112 .ops = &msm_mi2s_be_ops,
7113 .ignore_suspend = 1,
7114 },
7115 {
7116 .name = LPASS_BE_QUIN_MI2S_RX,
7117 .stream_name = "Quinary MI2S Playback",
7118 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7119 .platform_name = "msm-pcm-routing",
7120 .codec_name = "msm-stub-codec.1",
7121 .codec_dai_name = "msm-stub-rx",
7122 .no_pcm = 1,
7123 .dpcm_playback = 1,
7124 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7125 .be_hw_params_fixup = msm_be_hw_params_fixup,
7126 .ops = &msm_mi2s_be_ops,
7127 .ignore_suspend = 1,
7128 .ignore_pmdown_time = 1,
7129 },
7130 {
7131 .name = LPASS_BE_QUIN_MI2S_TX,
7132 .stream_name = "Quinary MI2S Capture",
7133 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7134 .platform_name = "msm-pcm-routing",
7135 .codec_name = "msm-stub-codec.1",
7136 .codec_dai_name = "msm-stub-tx",
7137 .no_pcm = 1,
7138 .dpcm_capture = 1,
7139 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7140 .be_hw_params_fixup = msm_be_hw_params_fixup,
7141 .ops = &msm_mi2s_be_ops,
7142 .ignore_suspend = 1,
7143 },
7144
7145};
7146
7147static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7148 /* Primary AUX PCM Backend DAI Links */
7149 {
7150 .name = LPASS_BE_AUXPCM_RX,
7151 .stream_name = "AUX PCM Playback",
7152 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7153 .platform_name = "msm-pcm-routing",
7154 .codec_name = "msm-stub-codec.1",
7155 .codec_dai_name = "msm-stub-rx",
7156 .no_pcm = 1,
7157 .dpcm_playback = 1,
7158 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7159 .be_hw_params_fixup = msm_be_hw_params_fixup,
7160 .ignore_pmdown_time = 1,
7161 .ignore_suspend = 1,
7162 },
7163 {
7164 .name = LPASS_BE_AUXPCM_TX,
7165 .stream_name = "AUX PCM Capture",
7166 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7167 .platform_name = "msm-pcm-routing",
7168 .codec_name = "msm-stub-codec.1",
7169 .codec_dai_name = "msm-stub-tx",
7170 .no_pcm = 1,
7171 .dpcm_capture = 1,
7172 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7173 .be_hw_params_fixup = msm_be_hw_params_fixup,
7174 .ignore_suspend = 1,
7175 },
7176 /* Secondary AUX PCM Backend DAI Links */
7177 {
7178 .name = LPASS_BE_SEC_AUXPCM_RX,
7179 .stream_name = "Sec AUX PCM Playback",
7180 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7181 .platform_name = "msm-pcm-routing",
7182 .codec_name = "msm-stub-codec.1",
7183 .codec_dai_name = "msm-stub-rx",
7184 .no_pcm = 1,
7185 .dpcm_playback = 1,
7186 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7187 .be_hw_params_fixup = msm_be_hw_params_fixup,
7188 .ignore_pmdown_time = 1,
7189 .ignore_suspend = 1,
7190 },
7191 {
7192 .name = LPASS_BE_SEC_AUXPCM_TX,
7193 .stream_name = "Sec AUX PCM Capture",
7194 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7195 .platform_name = "msm-pcm-routing",
7196 .codec_name = "msm-stub-codec.1",
7197 .codec_dai_name = "msm-stub-tx",
7198 .no_pcm = 1,
7199 .dpcm_capture = 1,
7200 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7201 .be_hw_params_fixup = msm_be_hw_params_fixup,
7202 .ignore_suspend = 1,
7203 },
7204 /* Tertiary AUX PCM Backend DAI Links */
7205 {
7206 .name = LPASS_BE_TERT_AUXPCM_RX,
7207 .stream_name = "Tert AUX PCM Playback",
7208 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7209 .platform_name = "msm-pcm-routing",
7210 .codec_name = "msm-stub-codec.1",
7211 .codec_dai_name = "msm-stub-rx",
7212 .no_pcm = 1,
7213 .dpcm_playback = 1,
7214 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7215 .be_hw_params_fixup = msm_be_hw_params_fixup,
7216 .ignore_suspend = 1,
7217 },
7218 {
7219 .name = LPASS_BE_TERT_AUXPCM_TX,
7220 .stream_name = "Tert AUX PCM Capture",
7221 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7222 .platform_name = "msm-pcm-routing",
7223 .codec_name = "msm-stub-codec.1",
7224 .codec_dai_name = "msm-stub-tx",
7225 .no_pcm = 1,
7226 .dpcm_capture = 1,
7227 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7228 .be_hw_params_fixup = msm_be_hw_params_fixup,
7229 .ignore_suspend = 1,
7230 },
7231 /* Quaternary AUX PCM Backend DAI Links */
7232 {
7233 .name = LPASS_BE_QUAT_AUXPCM_RX,
7234 .stream_name = "Quat AUX PCM Playback",
7235 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7236 .platform_name = "msm-pcm-routing",
7237 .codec_name = "msm-stub-codec.1",
7238 .codec_dai_name = "msm-stub-rx",
7239 .no_pcm = 1,
7240 .dpcm_playback = 1,
7241 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7242 .be_hw_params_fixup = msm_be_hw_params_fixup,
7243 .ignore_pmdown_time = 1,
7244 .ignore_suspend = 1,
7245 },
7246 {
7247 .name = LPASS_BE_QUAT_AUXPCM_TX,
7248 .stream_name = "Quat AUX PCM Capture",
7249 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7250 .platform_name = "msm-pcm-routing",
7251 .codec_name = "msm-stub-codec.1",
7252 .codec_dai_name = "msm-stub-tx",
7253 .no_pcm = 1,
7254 .dpcm_capture = 1,
7255 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7256 .be_hw_params_fixup = msm_be_hw_params_fixup,
7257 .ignore_suspend = 1,
7258 },
7259 /* Quinary AUX PCM Backend DAI Links */
7260 {
7261 .name = LPASS_BE_QUIN_AUXPCM_RX,
7262 .stream_name = "Quin AUX PCM Playback",
7263 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7264 .platform_name = "msm-pcm-routing",
7265 .codec_name = "msm-stub-codec.1",
7266 .codec_dai_name = "msm-stub-rx",
7267 .no_pcm = 1,
7268 .dpcm_playback = 1,
7269 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7270 .be_hw_params_fixup = msm_be_hw_params_fixup,
7271 .ignore_pmdown_time = 1,
7272 .ignore_suspend = 1,
7273 },
7274 {
7275 .name = LPASS_BE_QUIN_AUXPCM_TX,
7276 .stream_name = "Quin AUX PCM Capture",
7277 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7278 .platform_name = "msm-pcm-routing",
7279 .codec_name = "msm-stub-codec.1",
7280 .codec_dai_name = "msm-stub-tx",
7281 .no_pcm = 1,
7282 .dpcm_capture = 1,
7283 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7284 .be_hw_params_fixup = msm_be_hw_params_fixup,
7285 .ignore_suspend = 1,
7286 },
7287};
7288
7289static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7290 /* WSA CDC DMA Backend DAI Links */
7291 {
7292 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7293 .stream_name = "WSA CDC DMA0 Playback",
7294 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7295 .platform_name = "msm-pcm-routing",
7296 .codec_name = "bolero_codec",
7297 .codec_dai_name = "wsa_macro_rx1",
7298 .no_pcm = 1,
7299 .dpcm_playback = 1,
7300 .init = &msm_int_audrx_init,
7301 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7302 .be_hw_params_fixup = msm_be_hw_params_fixup,
7303 .ignore_pmdown_time = 1,
7304 .ignore_suspend = 1,
7305 .ops = &msm_cdc_dma_be_ops,
7306 },
7307 {
7308 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7309 .stream_name = "WSA CDC DMA1 Playback",
7310 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7311 .platform_name = "msm-pcm-routing",
7312 .codec_name = "bolero_codec",
7313 .codec_dai_name = "wsa_macro_rx_mix",
7314 .no_pcm = 1,
7315 .dpcm_playback = 1,
7316 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7317 .be_hw_params_fixup = msm_be_hw_params_fixup,
7318 .ignore_pmdown_time = 1,
7319 .ignore_suspend = 1,
7320 .ops = &msm_cdc_dma_be_ops,
7321 },
7322 {
7323 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7324 .stream_name = "WSA CDC DMA1 Capture",
7325 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7326 .platform_name = "msm-pcm-routing",
7327 .codec_name = "bolero_codec",
7328 .codec_dai_name = "wsa_macro_echo",
7329 .no_pcm = 1,
7330 .dpcm_capture = 1,
7331 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7332 .be_hw_params_fixup = msm_be_hw_params_fixup,
7333 .ignore_suspend = 1,
7334 .ops = &msm_cdc_dma_be_ops,
7335 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7336};
7337
7338static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7339 /* RX CDC DMA Backend DAI Links */
7340 {
7341 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7342 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7343 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7344 .platform_name = "msm-pcm-routing",
7345 .codec_name = "bolero_codec",
7346 .codec_dai_name = "rx_macro_rx1",
7347 .no_pcm = 1,
7348 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7349 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7350 .be_hw_params_fixup = msm_be_hw_params_fixup,
7351 .ignore_pmdown_time = 1,
7352 .ignore_suspend = 1,
7353 .ops = &msm_cdc_dma_be_ops,
7354 },
7355 {
7356 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7357 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7358 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7359 .platform_name = "msm-pcm-routing",
7360 .codec_name = "bolero_codec",
7361 .codec_dai_name = "rx_macro_rx2",
7362 .no_pcm = 1,
7363 .dpcm_playback = 1,
7364 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7365 .be_hw_params_fixup = msm_be_hw_params_fixup,
7366 .ignore_pmdown_time = 1,
7367 .ignore_suspend = 1,
7368 .ops = &msm_cdc_dma_be_ops,
7369 },
7370 {
7371 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7372 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7373 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7374 .platform_name = "msm-pcm-routing",
7375 .codec_name = "bolero_codec",
7376 .codec_dai_name = "rx_macro_rx3",
7377 .no_pcm = 1,
7378 .dpcm_playback = 1,
7379 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7380 .be_hw_params_fixup = msm_be_hw_params_fixup,
7381 .ignore_pmdown_time = 1,
7382 .ignore_suspend = 1,
7383 .ops = &msm_cdc_dma_be_ops,
7384 },
7385 {
7386 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7387 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7388 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7389 .platform_name = "msm-pcm-routing",
7390 .codec_name = "bolero_codec",
7391 .codec_dai_name = "rx_macro_rx4",
7392 .no_pcm = 1,
7393 .dpcm_playback = 1,
7394 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7395 .be_hw_params_fixup = msm_be_hw_params_fixup,
7396 .ignore_pmdown_time = 1,
7397 .ignore_suspend = 1,
7398 .ops = &msm_cdc_dma_be_ops,
7399 },
7400 /* TX CDC DMA Backend DAI Links */
7401 {
Vatsal Bucha83e6ee12018-11-30 18:58:31 +0530[diff] [blame^]7402 .name = LPASS_BE_TX_CDC_DMA_TX_0,
7403 .stream_name = "TX CDC DMA0 Capture",
7404 .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
7405 .platform_name = "msm-pcm-routing",
7406 .codec_name = "bolero_codec",
7407 .codec_dai_name = "rx_macro_echo",
7408 .no_pcm = 1,
7409 .dpcm_capture = 1,
7410 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
7411 .be_hw_params_fixup = msm_be_hw_params_fixup,
7412 .ignore_suspend = 1,
7413 .ops = &msm_cdc_dma_be_ops,
7414 },
7415 {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7416 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7417 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7418 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7419 .platform_name = "msm-pcm-routing",
7420 .codec_name = "bolero_codec",
7421 .codec_dai_name = "tx_macro_tx1",
7422 .no_pcm = 1,
7423 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7424 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7425 .be_hw_params_fixup = msm_be_hw_params_fixup,
7426 .ignore_suspend = 1,
7427 .ops = &msm_cdc_dma_be_ops,
7428 },
7429 {
7430 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7431 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7432 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7433 .platform_name = "msm-pcm-routing",
7434 .codec_name = "bolero_codec",
7435 .codec_dai_name = "tx_macro_tx2",
7436 .no_pcm = 1,
7437 .dpcm_capture = 1,
7438 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7439 .be_hw_params_fixup = msm_be_hw_params_fixup,
7440 .ignore_suspend = 1,
7441 .ops = &msm_cdc_dma_be_ops,
7442 },
7443};
7444
7445static struct snd_soc_dai_link msm_sm6150_dai_links[
7446 ARRAY_SIZE(msm_common_dai_links) +
7447 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7448 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7449 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7450 ARRAY_SIZE(msm_common_be_dai_links) +
7451 ARRAY_SIZE(msm_tavil_be_dai_links) +
7452 ARRAY_SIZE(msm_wcn_be_dai_links) +
7453 ARRAY_SIZE(ext_disp_be_dai_link) +
7454 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7455 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7456 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7457 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7458
7459static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7460{
7461 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7462 struct snd_soc_pcm_runtime *rtd;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7463 struct snd_soc_component *component;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7464 int ret = 0;
7465 void *mbhc_calibration;
7466
7467 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7468 if (!rtd) {
7469 dev_err(card->dev,
7470 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7471 __func__, be_dl_name);
7472 ret = -EINVAL;
7473 goto err_pcm_runtime;
7474 }
7475
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7476 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
7477 if (!component) {
7478 pr_err("%s: component is NULL\n", __func__);
7479 ret = -EINVAL;
7480 goto err_pcm_runtime;
7481 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7482 mbhc_calibration = def_wcd_mbhc_cal();
7483 if (!mbhc_calibration) {
7484 ret = -ENOMEM;
7485 goto err_mbhc_cal;
7486 }
7487 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7488 ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7489 if (ret) {
7490 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7491 __func__, ret);
7492 goto err_hs_detect;
7493 }
7494 return 0;
7495
7496err_hs_detect:
7497 kfree(mbhc_calibration);
7498err_mbhc_cal:
7499err_pcm_runtime:
7500 return ret;
7501}
7502
7503
7504static int msm_populate_dai_link_component_of_node(
7505 struct snd_soc_card *card)
7506{
7507 int i, index, ret = 0;
7508 struct device *cdev = card->dev;
7509 struct snd_soc_dai_link *dai_link = card->dai_link;
7510 struct device_node *np;
7511
7512 if (!cdev) {
7513 pr_err("%s: Sound card device memory NULL\n", __func__);
7514 return -ENODEV;
7515 }
7516
7517 for (i = 0; i < card->num_links; i++) {
7518 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7519 continue;
7520
7521 /* populate platform_of_node for snd card dai links */
7522 if (dai_link[i].platform_name &&
7523 !dai_link[i].platform_of_node) {
7524 index = of_property_match_string(cdev->of_node,
7525 "asoc-platform-names",
7526 dai_link[i].platform_name);
7527 if (index < 0) {
7528 pr_err("%s: No match found for platform name: %s\n",
7529 __func__, dai_link[i].platform_name);
7530 ret = index;
7531 goto err;
7532 }
7533 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7534 index);
7535 if (!np) {
7536 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7537 __func__, dai_link[i].platform_name,
7538 index);
7539 ret = -ENODEV;
7540 goto err;
7541 }
7542 dai_link[i].platform_of_node = np;
7543 dai_link[i].platform_name = NULL;
7544 }
7545
7546 /* populate cpu_of_node for snd card dai links */
7547 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7548 index = of_property_match_string(cdev->of_node,
7549 "asoc-cpu-names",
7550 dai_link[i].cpu_dai_name);
7551 if (index >= 0) {
7552 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7553 index);
7554 if (!np) {
7555 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7556 __func__,
7557 dai_link[i].cpu_dai_name);
7558 ret = -ENODEV;
7559 goto err;
7560 }
7561 dai_link[i].cpu_of_node = np;
7562 dai_link[i].cpu_dai_name = NULL;
7563 }
7564 }
7565
7566 /* populate codec_of_node for snd card dai links */
7567 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7568 index = of_property_match_string(cdev->of_node,
7569 "asoc-codec-names",
7570 dai_link[i].codec_name);
7571 if (index < 0)
7572 continue;
7573 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7574 index);
7575 if (!np) {
7576 pr_err("%s: retrieving phandle for codec %s failed\n",
7577 __func__, dai_link[i].codec_name);
7578 ret = -ENODEV;
7579 goto err;
7580 }
7581 dai_link[i].codec_of_node = np;
7582 dai_link[i].codec_name = NULL;
7583 }
7584 }
7585
7586err:
7587 return ret;
7588}
7589
7590static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7591{
7592 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7593 struct snd_soc_component *component =
7594 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7595
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7596 ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7597 ARRAY_SIZE(msm_tavil_snd_controls));
7598 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7599 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7600 "%s: add_codec_controls failed, err = %d\n",
7601 __func__, ret);
7602 return ret;
7603 }
7604
7605 return 0;
7606}
7607
7608static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7609 struct snd_pcm_hw_params *params)
7610{
7611 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7612 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7613
7614 int ret = 0;
7615 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7616 151};
7617 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7618 134, 135, 136, 137, 138, 139,
7619 140, 141, 142, 143};
7620
7621 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7622 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7623 slim_rx_cfg[SLIM_RX_0].channels,
7624 rx_ch);
7625 if (ret < 0)
7626 pr_err("%s: RX failed to set cpu chan map error %d\n",
7627 __func__, ret);
7628 } else {
7629 ret = snd_soc_dai_set_channel_map(cpu_dai,
7630 slim_tx_cfg[SLIM_TX_0].channels,
7631 tx_ch, 0, 0);
7632 if (ret < 0)
7633 pr_err("%s: TX failed to set cpu chan map error %d\n",
7634 __func__, ret);
7635 }
7636
7637 return ret;
7638}
7639
7640static struct snd_soc_ops msm_stub_be_ops = {
7641 .hw_params = msm_snd_stub_hw_params,
7642};
7643
7644static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7645
7646 /* FrontEnd DAI Links */
7647 {
7648 .name = "MSMSTUB Media1",
7649 .stream_name = "MultiMedia1",
7650 .cpu_dai_name = "MultiMedia1",
7651 .platform_name = "msm-pcm-dsp.0",
7652 .dynamic = 1,
7653 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7654 .dpcm_playback = 1,
7655 .dpcm_capture = 1,
7656 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7657 SND_SOC_DPCM_TRIGGER_POST},
7658 .codec_dai_name = "snd-soc-dummy-dai",
7659 .codec_name = "snd-soc-dummy",
7660 .ignore_suspend = 1,
7661 /* this dainlink has playback support */
7662 .ignore_pmdown_time = 1,
7663 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7664 },
7665};
7666
7667static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7668
7669 /* Backend DAI Links */
7670 {
7671 .name = LPASS_BE_SLIMBUS_0_RX,
7672 .stream_name = "Slimbus Playback",
7673 .cpu_dai_name = "msm-dai-q6-dev.16384",
7674 .platform_name = "msm-pcm-routing",
7675 .codec_name = "msm-stub-codec.1",
7676 .codec_dai_name = "msm-stub-rx",
7677 .no_pcm = 1,
7678 .dpcm_playback = 1,
7679 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7680 .init = &msm_audrx_stub_init,
7681 .be_hw_params_fixup = msm_be_hw_params_fixup,
7682 .ignore_pmdown_time = 1, /* dai link has playback support */
7683 .ignore_suspend = 1,
7684 .ops = &msm_stub_be_ops,
7685 },
7686 {
7687 .name = LPASS_BE_SLIMBUS_0_TX,
7688 .stream_name = "Slimbus Capture",
7689 .cpu_dai_name = "msm-dai-q6-dev.16385",
7690 .platform_name = "msm-pcm-routing",
7691 .codec_name = "msm-stub-codec.1",
7692 .codec_dai_name = "msm-stub-tx",
7693 .no_pcm = 1,
7694 .dpcm_capture = 1,
7695 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7696 .be_hw_params_fixup = msm_be_hw_params_fixup,
7697 .ignore_suspend = 1,
7698 .ops = &msm_stub_be_ops,
7699 },
7700};
7701
7702static struct snd_soc_dai_link msm_stub_dai_links[
7703 ARRAY_SIZE(msm_stub_fe_dai_links) +
7704 ARRAY_SIZE(msm_stub_be_dai_links)];
7705
7706struct snd_soc_card snd_soc_card_stub_msm = {
7707 .name = "sm6150-stub-snd-card",
7708};
7709
7710static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7711 { .compatible = "qcom,sm6150-asoc-snd",
7712 .data = "codec"},
7713 { .compatible = "qcom,sm6150-asoc-snd-stub",
7714 .data = "stub_codec"},
7715 {},
7716};
7717
7718static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7719{
7720 struct snd_soc_card *card = NULL;
7721 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7722 int total_links = 0, rc = 0;
7723 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7724 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7725 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7726 const struct of_device_id *match;
7727
7728 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7729 if (!match) {
7730 dev_err(dev, "%s: No DT match found for sound card\n",
7731 __func__);
7732 return NULL;
7733 }
7734
7735 if (!strcmp(match->data, "codec")) {
7736 card = &snd_soc_card_sm6150_msm;
7737 memcpy(msm_sm6150_dai_links + total_links,
7738 msm_common_dai_links,
7739 sizeof(msm_common_dai_links));
7740
7741 total_links += ARRAY_SIZE(msm_common_dai_links);
7742
7743 memcpy(msm_sm6150_dai_links + total_links,
7744 msm_common_misc_fe_dai_links,
7745 sizeof(msm_common_misc_fe_dai_links));
7746
7747 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7748
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7749 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7750 &tavil_codec);
7751 if (rc) {
7752 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7753 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7754 } else {
7755 if (tavil_codec) {
7756 card->late_probe =
7757 msm_snd_card_tavil_late_probe;
7758 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7759 msm_tavil_fe_dai_links,
7760 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7761 total_links +=
7762 ARRAY_SIZE(msm_tavil_fe_dai_links);
7763 }
7764 }
7765
7766 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7767 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7768 msm_bolero_fe_dai_links,
7769 sizeof(msm_bolero_fe_dai_links));
7770 total_links +=
7771 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7772 }
7773
7774 memcpy(msm_sm6150_dai_links + total_links,
7775 msm_common_be_dai_links,
7776 sizeof(msm_common_be_dai_links));
7777
7778 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7779
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7780 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7781 memcpy(msm_sm6150_dai_links + total_links,
7782 msm_tavil_be_dai_links,
7783 sizeof(msm_tavil_be_dai_links));
7784 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7785 } else {
7786 memcpy(msm_sm6150_dai_links + total_links,
7787 msm_wsa_cdc_dma_be_dai_links,
7788 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7789 total_links +=
7790 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7791
7792 memcpy(msm_sm6150_dai_links + total_links,
7793 msm_rx_tx_cdc_dma_be_dai_links,
7794 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7795 total_links +=
7796 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7797 }
7798
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7799 rc = of_property_read_u32(dev->of_node,
7800 "qcom,ext-disp-audio-rx",
7801 &ext_disp_audio_intf);
7802 if (rc) {
7803 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7804 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7805 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]7806 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7807 memcpy(msm_sm6150_dai_links + total_links,
7808 ext_disp_be_dai_link,
7809 sizeof(ext_disp_be_dai_link));
7810 total_links +=
7811 ARRAY_SIZE(ext_disp_be_dai_link);
7812 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7813 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7814
7815 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7816 &mi2s_audio_intf);
7817 if (rc) {
7818 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7819 __func__);
7820 } else {
7821 if (mi2s_audio_intf) {
7822 memcpy(msm_sm6150_dai_links + total_links,
7823 msm_mi2s_be_dai_links,
7824 sizeof(msm_mi2s_be_dai_links));
7825 total_links +=
7826 ARRAY_SIZE(msm_mi2s_be_dai_links);
7827 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7828 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7829
7830
7831 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7832 &wcn_btfm_intf);
7833 if (rc) {
7834 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7835 __func__);
7836 } else {
7837 if (wcn_btfm_intf) {
7838 memcpy(msm_sm6150_dai_links + total_links,
7839 msm_wcn_be_dai_links,
7840 sizeof(msm_wcn_be_dai_links));
7841 total_links +=
7842 ARRAY_SIZE(msm_wcn_be_dai_links);
7843 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7844 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7845
7846 rc = of_property_read_u32(dev->of_node,
7847 "qcom,auxpcm-audio-intf",
7848 &auxpcm_audio_intf);
7849 if (rc) {
7850 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7851 __func__);
7852 } else {
7853 if (auxpcm_audio_intf) {
7854 memcpy(msm_sm6150_dai_links + total_links,
7855 msm_auxpcm_be_dai_links,
7856 sizeof(msm_auxpcm_be_dai_links));
7857 total_links +=
7858 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7859 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7860 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7861
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7862 dailink = msm_sm6150_dai_links;
7863 } else if (!strcmp(match->data, "stub_codec")) {
7864 card = &snd_soc_card_stub_msm;
7865
7866 memcpy(msm_stub_dai_links + total_links,
7867 msm_stub_fe_dai_links,
7868 sizeof(msm_stub_fe_dai_links));
7869 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7870
7871 memcpy(msm_stub_dai_links + total_links,
7872 msm_stub_be_dai_links,
7873 sizeof(msm_stub_be_dai_links));
7874 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7875
7876 dailink = msm_stub_dai_links;
7877 }
7878
7879 if (card) {
7880 card->dai_link = dailink;
7881 card->num_links = total_links;
7882 }
7883
7884 return card;
7885}
7886
7887static int msm_wsa881x_init(struct snd_soc_component *component)
7888{
7889 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7890 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7891 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7892 SPKR_L_BOOST, SPKR_L_VI};
7893 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7894 SPKR_R_BOOST, SPKR_R_VI};
7895 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7896 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7897 struct msm_asoc_mach_data *pdata;
7898 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7899 struct snd_card *card = component->card->snd_card;
7900 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7901 int ret = 0;
7902
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7903 if (!component) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7904 pr_err("%s codec is NULL\n", __func__);
7905 return -EINVAL;
7906 }
7907
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7908 dapm = snd_soc_component_get_dapm(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7909
7910 if (!strcmp(component->name_prefix, "SpkrLeft")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7911 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7912 __func__, component->name);
7913 wsa881x_set_channel_map(component, &spkleft_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7914 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7915 &ch_rate[0], &spkleft_port_types[0]);
7916 if (dapm->component) {
7917 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7918 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7919 }
7920 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7921 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7922 __func__, component->name);
7923 wsa881x_set_channel_map(component, &spkright_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7924 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7925 &ch_rate[0], &spkright_port_types[0]);
7926 if (dapm->component) {
7927 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7928 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7929 }
7930 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7931 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7932 component->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7933 ret = -EINVAL;
7934 goto err;
7935 }
7936 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7937 if (!pdata->codec_root) {
7938 entry = snd_info_create_subdir(card->module, "codecs",
7939 card->proc_root);
7940 if (!entry) {
7941 pr_err("%s: Cannot create codecs module entry\n",
7942 __func__);
7943 ret = 0;
7944 goto err;
7945 }
7946 pdata->codec_root = entry;
7947 }
7948 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7949 component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7950err:
7951 return ret;
7952}
7953
7954static int msm_aux_codec_init(struct snd_soc_component *component)
7955{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7956 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7957 int ret = 0;
7958 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7959 struct snd_info_entry *entry;
7960 struct snd_card *card = component->card->snd_card;
7961 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7962
7963 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7964 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7965 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7966 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7967 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7968 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7969 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7970 snd_soc_dapm_sync(dapm);
7971
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7972 pdata = snd_soc_card_get_drvdata(component->card);
7973 if (!pdata->codec_root) {
7974 entry = snd_info_create_subdir(card->module, "codecs",
7975 card->proc_root);
7976 if (!entry) {
7977 pr_err("%s: Cannot create codecs module entry\n",
7978 __func__);
7979 ret = 0;
7980 goto codec_root_err;
7981 }
7982 pdata->codec_root = entry;
7983 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7984 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7985codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7986 mbhc_calibration = def_wcd_mbhc_cal();
7987 if (!mbhc_calibration) {
7988 return -ENOMEM;
7989 }
7990 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7991 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7992
7993 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7994}
7995
7996static int msm_init_aux_dev(struct platform_device *pdev,
7997 struct snd_soc_card *card)
7998{
7999 struct device_node *wsa_of_node;
8000 struct device_node *aux_codec_of_node;
8001 u32 wsa_max_devs;
8002 u32 wsa_dev_cnt;
Aditya Bavanari32b3e5e2018-12-04 17:19:56 +0530[diff] [blame]8003 u32 codec_max_aux_devs = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8004 u32 codec_aux_dev_cnt = 0;
8005 int i;
Md Mansoor Ahmed2382aaa2018-11-20 11:06:32 +0530[diff] [blame]8006 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8007 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8008 const char *auxdev_name_prefix[1];
8009 char *dev_name_str = NULL;
8010 int found = 0;
8011 int codecs_found = 0;
8012 int ret = 0;
8013
8014 /* Get maximum WSA device count for this platform */
8015 ret = of_property_read_u32(pdev->dev.of_node,
8016 "qcom,wsa-max-devs", &wsa_max_devs);
8017 if (ret) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8018 dev_err(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8019 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8020 __func__, pdev->dev.of_node->full_name, ret);
8021 wsa_max_devs = 0;
8022 goto codec_aux_dev;
8023 }
8024 if (wsa_max_devs == 0) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8025 dev_dbg(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8026 "%s: Max WSA devices is 0 for this target?\n",
8027 __func__);
8028 goto codec_aux_dev;
8029 }
8030
8031 /* Get count of WSA device phandles for this platform */
8032 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8033 "qcom,wsa-devs", NULL);
8034 if (wsa_dev_cnt == -ENOENT) {
8035 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8036 __func__);
8037 goto err;
8038 } else if (wsa_dev_cnt <= 0) {
8039 dev_err(&pdev->dev,
8040 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8041 __func__, wsa_dev_cnt);
8042 ret = -EINVAL;
8043 goto err;
8044 }
8045
8046 /*
8047 * Expect total phandles count to be NOT less than maximum possible
8048 * WSA count. However, if it is less, then assign same value to
8049 * max count as well.
8050 */
8051 if (wsa_dev_cnt < wsa_max_devs) {
8052 dev_dbg(&pdev->dev,
8053 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8054 __func__, wsa_max_devs, wsa_dev_cnt);
8055 wsa_max_devs = wsa_dev_cnt;
8056 }
8057
8058 /* Make sure prefix string passed for each WSA device */
8059 ret = of_property_count_strings(pdev->dev.of_node,
8060 "qcom,wsa-aux-dev-prefix");
8061 if (ret != wsa_dev_cnt) {
8062 dev_err(&pdev->dev,
8063 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8064 __func__, wsa_dev_cnt, ret);
8065 ret = -EINVAL;
8066 goto err;
8067 }
8068
8069 /*
8070 * Alloc mem to store phandle and index info of WSA device, if already
8071 * registered with ALSA core
8072 */
8073 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8074 sizeof(struct msm_wsa881x_dev_info),
8075 GFP_KERNEL);
8076 if (!wsa881x_dev_info) {
8077 ret = -ENOMEM;
8078 goto err;
8079 }
8080
8081 /*
8082 * search and check whether all WSA devices are already
8083 * registered with ALSA core or not. If found a node, store
8084 * the node and the index in a local array of struct for later
8085 * use.
8086 */
8087 for (i = 0; i < wsa_dev_cnt; i++) {
8088 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8089 "qcom,wsa-devs", i);
8090 if (unlikely(!wsa_of_node)) {
8091 /* we should not be here */
8092 dev_err(&pdev->dev,
8093 "%s: wsa dev node is not present\n",
8094 __func__);
8095 ret = -EINVAL;
8096 goto err;
8097 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8098 if (soc_find_component_locked(wsa_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8099 /* WSA device registered with ALSA core */
8100 wsa881x_dev_info[found].of_node = wsa_of_node;
8101 wsa881x_dev_info[found].index = i;
8102 found++;
8103 if (found == wsa_max_devs)
8104 break;
8105 }
8106 }
8107
8108 if (found < wsa_max_devs) {
8109 dev_dbg(&pdev->dev,
8110 "%s: failed to find %d components. Found only %d\n",
8111 __func__, wsa_max_devs, found);
8112 return -EPROBE_DEFER;
8113 }
8114 dev_info(&pdev->dev,
8115 "%s: found %d wsa881x devices registered with ALSA core\n",
8116 __func__, found);
8117
8118codec_aux_dev:
8119 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8120 /* Get maximum aux codec device count for this platform */
8121 ret = of_property_read_u32(pdev->dev.of_node,
8122 "qcom,codec-max-aux-devs",
8123 &codec_max_aux_devs);
8124 if (ret) {
8125 dev_err(&pdev->dev,
8126 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8127 __func__, pdev->dev.of_node->full_name, ret);
8128 codec_max_aux_devs = 0;
8129 goto aux_dev_register;
8130 }
8131 if (codec_max_aux_devs == 0) {
8132 dev_dbg(&pdev->dev,
8133 "%s: Max aux codec devices is 0 for this target?\n",
8134 __func__);
8135 goto aux_dev_register;
8136 }
8137
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8138 /* Get count of aux codec device phandles for this platform */
8139 codec_aux_dev_cnt = of_count_phandle_with_args(
8140 pdev->dev.of_node,
8141 "qcom,codec-aux-devs", NULL);
8142 if (codec_aux_dev_cnt == -ENOENT) {
8143 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8144 __func__);
8145 goto err;
8146 } else if (codec_aux_dev_cnt <= 0) {
8147 dev_err(&pdev->dev,
8148 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8149 __func__, codec_aux_dev_cnt);
8150 ret = -EINVAL;
8151 goto err;
8152 }
8153
8154 /*
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8155 * Expect total phandles count to be NOT less than maximum possible
8156 * AUX device count. However, if it is less, then assign same value to
8157 * max count as well.
8158 */
8159 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8160 dev_dbg(&pdev->dev,
8161 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8162 __func__, codec_max_aux_devs,
8163 codec_aux_dev_cnt);
8164 codec_max_aux_devs = codec_aux_dev_cnt;
8165 }
8166
8167 /*
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8168 * Alloc mem to store phandle and index info of aux codec
8169 * if already registered with ALSA core
8170 */
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8171 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8172 sizeof(struct aux_codec_dev_info),
8173 GFP_KERNEL);
8174 if (!aux_cdc_dev_info) {
8175 ret = -ENOMEM;
8176 goto err;
8177 }
8178
8179 /*
8180 * search and check whether all aux codecs are already
8181 * registered with ALSA core or not. If found a node, store
8182 * the node and the index in a local array of struct for later
8183 * use.
8184 */
8185 for (i = 0; i < codec_aux_dev_cnt; i++) {
8186 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8187 "qcom,codec-aux-devs", i);
8188 if (unlikely(!aux_codec_of_node)) {
8189 /* we should not be here */
8190 dev_err(&pdev->dev,
8191 "%s: aux codec dev node is not present\n",
8192 __func__);
8193 ret = -EINVAL;
8194 goto err;
8195 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8196 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8197 /* AUX codec registered with ALSA core */
8198 aux_cdc_dev_info[codecs_found].of_node =
8199 aux_codec_of_node;
8200 aux_cdc_dev_info[codecs_found].index = i;
8201 codecs_found++;
8202 }
8203 }
8204
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8205 if (codecs_found < codec_max_aux_devs) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8206 dev_dbg(&pdev->dev,
8207 "%s: failed to find %d components. Found only %d\n",
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8208 __func__, codec_max_aux_devs, codecs_found);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8209 return -EPROBE_DEFER;
8210 }
8211 dev_info(&pdev->dev,
8212 "%s: found %d AUX codecs registered with ALSA core\n",
8213 __func__, codecs_found);
8214
8215 }
8216
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8217aux_dev_register:
8218 card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
8219 card->num_configs = wsa_max_devs + codec_max_aux_devs;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8220
8221 /* Alloc array of AUX devs struct */
8222 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8223 sizeof(struct snd_soc_aux_dev),
8224 GFP_KERNEL);
8225 if (!msm_aux_dev) {
8226 ret = -ENOMEM;
8227 goto err;
8228 }
8229
8230 /* Alloc array of codec conf struct */
8231 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8232 sizeof(struct snd_soc_codec_conf),
8233 GFP_KERNEL);
8234 if (!msm_codec_conf) {
8235 ret = -ENOMEM;
8236 goto err;
8237 }
8238
8239 for (i = 0; i < wsa_max_devs; i++) {
8240 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8241 GFP_KERNEL);
8242 if (!dev_name_str) {
8243 ret = -ENOMEM;
8244 goto err;
8245 }
8246
8247 ret = of_property_read_string_index(pdev->dev.of_node,
8248 "qcom,wsa-aux-dev-prefix",
8249 wsa881x_dev_info[i].index,
8250 auxdev_name_prefix);
8251 if (ret) {
8252 dev_err(&pdev->dev,
8253 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8254 __func__, ret);
8255 ret = -EINVAL;
8256 goto err;
8257 }
8258
8259 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8260 msm_aux_dev[i].name = dev_name_str;
8261 msm_aux_dev[i].codec_name = NULL;
8262 msm_aux_dev[i].codec_of_node =
8263 wsa881x_dev_info[i].of_node;
8264 msm_aux_dev[i].init = msm_wsa881x_init;
8265 msm_codec_conf[i].dev_name = NULL;
8266 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8267 msm_codec_conf[i].of_node =
8268 wsa881x_dev_info[i].of_node;
8269 }
8270
8271 for (i = 0; i < codec_aux_dev_cnt; i++) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8272 msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8273 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8274 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8275 aux_cdc_dev_info[i].of_node;
8276 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8277 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8278 msm_codec_conf[wsa_max_devs + i].name_prefix =
8279 NULL;
8280 msm_codec_conf[wsa_max_devs + i].of_node =
8281 aux_cdc_dev_info[i].of_node;
8282 }
8283
8284 card->codec_conf = msm_codec_conf;
8285 card->aux_dev = msm_aux_dev;
8286err:
8287 return ret;
8288}
8289
8290static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8291{
8292 int count;
8293 u32 mi2s_master_slave[MI2S_MAX];
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8294 u32 mi2s_ext_mclk[MI2S_MAX];
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8295 int ret;
8296
8297 for (count = 0; count < MI2S_MAX; count++) {
8298 mutex_init(&mi2s_intf_conf[count].lock);
8299 mi2s_intf_conf[count].ref_cnt = 0;
8300 }
8301
8302 ret = of_property_read_u32_array(pdev->dev.of_node,
8303 "qcom,msm-mi2s-master",
8304 mi2s_master_slave, MI2S_MAX);
8305 if (ret) {
8306 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8307 __func__);
8308 } else {
8309 for (count = 0; count < MI2S_MAX; count++) {
8310 mi2s_intf_conf[count].msm_is_mi2s_master =
8311 mi2s_master_slave[count];
8312 }
8313 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8314
8315 ret = of_property_read_u32_array(pdev->dev.of_node,
8316 "qcom,msm-mi2s-ext-mclk",
8317 mi2s_ext_mclk, MI2S_MAX);
8318 if (ret) {
8319 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
8320 __func__);
8321 } else {
8322 for (count = 0; count < MI2S_MAX; count++)
8323 mi2s_intf_conf[count].msm_is_ext_mclk =
8324 mi2s_ext_mclk[count];
8325 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8326}
8327
8328static void msm_i2s_auxpcm_deinit(void)
8329{
8330 int count;
8331
8332 for (count = 0; count < MI2S_MAX; count++) {
8333 mutex_destroy(&mi2s_intf_conf[count].lock);
8334 mi2s_intf_conf[count].ref_cnt = 0;
8335 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8336 mi2s_intf_conf[count].msm_is_ext_mclk = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8337 }
8338}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8339
8340static int sm6150_ssr_enable(struct device *dev, void *data)
8341{
8342 struct platform_device *pdev = to_platform_device(dev);
8343 struct snd_soc_card *card = platform_get_drvdata(pdev);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8344 struct msm_asoc_mach_data *pdata = NULL;
8345 struct snd_soc_component *component = NULL;
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8346 int ret = 0;
8347
8348 if (!card) {
8349 dev_err(dev, "%s: card is NULL\n", __func__);
8350 ret = -EINVAL;
8351 goto err;
8352 }
8353
8354 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8355 pdata = snd_soc_card_get_drvdata(card);
8356 if (!pdata->is_afe_config_done) {
8357 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8358 struct snd_soc_pcm_runtime *rtd;
8359
8360 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8361 if (!rtd) {
8362 dev_err(dev,
8363 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8364 __func__, be_dl_name);
8365 ret = -EINVAL;
8366 goto err;
8367 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8368 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
8369 if (!component) {
8370 dev_err(dev, "%s: component is NULL\n",
8371 __func__);
8372 ret = -EINVAL;
8373 goto err;
8374 }
8375 ret = msm_afe_set_config(component);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8376 if (ret)
8377 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8378 __func__, ret);
8379 else
8380 pdata->is_afe_config_done = true;
8381 }
8382 }
8383 snd_soc_card_change_online_state(card, 1);
8384 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8385
8386err:
8387 return ret;
8388}
8389
8390static void sm6150_ssr_disable(struct device *dev, void *data)
8391{
8392 struct platform_device *pdev = to_platform_device(dev);
8393 struct snd_soc_card *card = platform_get_drvdata(pdev);
8394 struct msm_asoc_mach_data *pdata;
8395
8396 if (!card) {
8397 dev_err(dev, "%s: card is NULL\n", __func__);
8398 return;
8399 }
8400
8401 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8402 snd_soc_card_change_online_state(card, 0);
8403
8404 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8405 pdata = snd_soc_card_get_drvdata(card);
8406 msm_afe_clear_config();
8407 pdata->is_afe_config_done = false;
8408 }
8409}
8410
8411static const struct snd_event_ops sm6150_ssr_ops = {
8412 .enable = sm6150_ssr_enable,
8413 .disable = sm6150_ssr_disable,
8414};
8415
8416static int msm_audio_ssr_compare(struct device *dev, void *data)
8417{
8418 struct device_node *node = data;
8419
8420 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8421 __func__, dev->of_node, node);
8422 return (dev->of_node && dev->of_node == node);
8423}
8424
8425static int msm_audio_ssr_register(struct device *dev)
8426{
8427 struct device_node *np = dev->of_node;
8428 struct snd_event_clients *ssr_clients = NULL;
8429 struct device_node *node;
8430 int ret;
8431 int i;
8432
8433 for (i = 0; ; i++) {
8434 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8435 if (!node)
8436 break;
8437 snd_event_mstr_add_client(&ssr_clients,
8438 msm_audio_ssr_compare, node);
8439 }
8440
8441 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8442 ssr_clients, NULL);
8443 if (!ret)
8444 snd_event_notify(dev, SND_EVENT_UP);
8445
8446 return ret;
8447}
8448
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8449static int msm_asoc_machine_probe(struct platform_device *pdev)
8450{
8451 struct snd_soc_card *card;
8452 struct msm_asoc_mach_data *pdata;
8453 const char *mbhc_audio_jack_type = NULL;
8454 int ret;
8455
8456 if (!pdev->dev.of_node) {
8457 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8458 return -EINVAL;
8459 }
8460
8461 pdata = devm_kzalloc(&pdev->dev,
8462 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8463 if (!pdata)
8464 return -ENOMEM;
8465
8466 card = populate_snd_card_dailinks(&pdev->dev);
8467 if (!card) {
8468 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8469 ret = -EINVAL;
8470 goto err;
8471 }
8472 card->dev = &pdev->dev;
8473 platform_set_drvdata(pdev, card);
8474 snd_soc_card_set_drvdata(card, pdata);
8475
8476 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8477 if (ret) {
8478 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8479 ret);
8480 goto err;
8481 }
8482
8483 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8484 if (ret) {
8485 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8486 ret);
8487 goto err;
8488 }
8489
8490 ret = msm_populate_dai_link_component_of_node(card);
8491 if (ret) {
8492 ret = -EPROBE_DEFER;
8493 goto err;
8494 }
8495
8496 ret = msm_init_aux_dev(pdev, card);
8497 if (ret)
8498 goto err;
8499
8500 ret = devm_snd_soc_register_card(&pdev->dev, card);
8501 if (ret == -EPROBE_DEFER) {
8502 if (codec_reg_done)
8503 ret = -EINVAL;
8504 goto err;
8505 } else if (ret) {
8506 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8507 ret);
8508 goto err;
8509 }
8510 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8511
8512 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8513 "qcom,hph-en1-gpio", 0);
8514 if (!pdata->hph_en1_gpio_p) {
8515 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8516 "qcom,hph-en1-gpio",
8517 pdev->dev.of_node->full_name);
8518 }
8519
8520 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8521 "qcom,hph-en0-gpio", 0);
8522 if (!pdata->hph_en0_gpio_p) {
8523 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8524 "qcom,hph-en0-gpio",
8525 pdev->dev.of_node->full_name);
8526 }
8527
8528 ret = of_property_read_string(pdev->dev.of_node,
8529 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8530 if (ret) {
8531 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8532 "qcom,mbhc-audio-jack-type",
8533 pdev->dev.of_node->full_name);
8534 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8535 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8536 } else {
8537 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8538 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8539 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8540 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8541 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8542 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8543 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8544 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8545 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8546 } else {
8547 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8548 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8549 }
8550 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8551
8552 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8553 "qcom,pri-mi2s-gpios", 0);
8554 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8555 "qcom,sec-mi2s-gpios", 0);
8556 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8557 "qcom,tert-mi2s-gpios", 0);
8558 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8559 "qcom,quat-mi2s-gpios", 0);
8560 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8561 "qcom,quin-mi2s-gpios", 0);
8562
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8563 /*
8564 * Parse US-Euro gpio info from DT. Report no error if us-euro
8565 * entry is not found in DT file as some targets do not support
8566 * US-Euro detection
8567 */
8568 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8569 "qcom,us-euro-gpios", 0);
8570 if (!pdata->us_euro_gpio_p) {
8571 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8572 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8573 } else {
8574 dev_dbg(&pdev->dev, "%s detected\n",
8575 "qcom,us-euro-gpios");
8576 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8577 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]8578
8579 if (wcd_mbhc_cfg.enable_usbc_analog) {
8580 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8581
8582 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8583 "fsa4480-i2c-handle", 0);
8584 if (!pdata->fsa_handle)
8585 dev_err(&pdev->dev,
8586 "property %s not detected in node %s\n",
8587 "fsa4480-i2c-handle",
8588 pdev->dev.of_node->full_name);
8589 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8590
8591 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8592 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8593 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8594 "qcom,cdc-dmic01-gpios",
8595 0);
8596 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8597 "qcom,cdc-dmic23-gpios",
8598 0);
8599 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8600
8601 ret = msm_audio_ssr_register(&pdev->dev);
8602 if (ret)
8603 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8604 __func__, ret);
8605
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8606err:
8607 return ret;
8608}
8609
8610static int msm_asoc_machine_remove(struct platform_device *pdev)
8611{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8612 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8613 msm_i2s_auxpcm_deinit();
8614
8615 return 0;
8616}
8617
8618static struct platform_driver sm6150_asoc_machine_driver = {
8619 .driver = {
8620 .name = DRV_NAME,
8621 .owner = THIS_MODULE,
8622 .pm = &snd_soc_pm_ops,
8623 .of_match_table = sm6150_asoc_machine_of_match,
8624 },
8625 .probe = msm_asoc_machine_probe,
8626 .remove = msm_asoc_machine_remove,
8627};
8628module_platform_driver(sm6150_asoc_machine_driver);
8629
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8630MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8631MODULE_LICENSE("GPL v2");
8632MODULE_ALIAS("platform:" DRV_NAME);
8633MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);