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Meng Wang688a8672019-01-29 13:43:33 +08001// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002/*
Xiao Lid8bb93c2020-01-07 12:59:05 +08003 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080016#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070017#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070023#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070024#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -080025#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070026#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070030#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080032#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070033#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +053034#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080035#include "codecs/wcd938x/wcd938x.h"
Kunlei Zhangf61a2312020-02-11 15:37:03 +080036#include "codecs/wcd937x/wcd937x-mbhc.h"
37#include "codecs/wcd937x/wcd937x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070038#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053041#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070042
43#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070044#define __CHIPSET__ "KONA "
45#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
46
47#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070048#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070049#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070050#define SAMPLING_RATE_22P05KHZ 22050
51#define SAMPLING_RATE_32KHZ 32000
52#define SAMPLING_RATE_44P1KHZ 44100
53#define SAMPLING_RATE_48KHZ 48000
54#define SAMPLING_RATE_88P2KHZ 88200
55#define SAMPLING_RATE_96KHZ 96000
56#define SAMPLING_RATE_176P4KHZ 176400
57#define SAMPLING_RATE_192KHZ 192000
58#define SAMPLING_RATE_352P8KHZ 352800
59#define SAMPLING_RATE_384KHZ 384000
60
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -070061#define IS_FRACTIONAL(x) \
62((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
63(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
64(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
65
66#define IS_MSM_INTERFACE_MI2S(x) \
67((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
68
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080069#define WCD9XXX_MBHC_DEF_RLOADS 5
70#define WCD9XXX_MBHC_DEF_BUTTONS 8
71#define CODEC_EXT_CLK_RATE 9600000
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define DEV_NAME_STR_LEN 32
74#define WCD_MBHC_HS_V_MAX 1600
75
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070076#define TDM_CHANNEL_MAX 8
77#define DEV_NAME_STR_LEN 32
78
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80
81#define ADSP_STATE_READY_TIMEOUT_MS 3000
82
Laxminath Kasamd3621032020-04-01 18:14:05 +053083#define WSA8810_NAME_1 "wsa881x.1020170211"
84#define WSA8810_NAME_2 "wsa881x.1020170212"
85#define WSA8815_NAME_1 "wsa881x.1021170213"
86#define WSA8815_NAME_2 "wsa881x.1021170214"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -080087#define WCN_CDC_SLIM_RX_CH_MAX 2
88#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053089#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070090
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +053091#define SWR_MAX_SLAVE_DEVICES 6
92
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070093enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -070094 RX_PATH = 0,
95 TX_PATH,
96 MAX_PATH,
97};
98
99enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700100 TDM_0 = 0,
101 TDM_1,
102 TDM_2,
103 TDM_3,
104 TDM_4,
105 TDM_5,
106 TDM_6,
107 TDM_7,
108 TDM_PORT_MAX,
109};
110
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700111#define TDM_MAX_SLOTS 8
112#define TDM_SLOT_WIDTH_BITS 32
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800113#define TDM_SLOT_WIDTH_BYTES TDM_SLOT_WIDTH_BITS/8
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700114
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700115enum {
116 TDM_PRI = 0,
117 TDM_SEC,
118 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800119 TDM_QUAT,
120 TDM_QUIN,
121 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700122 TDM_INTERFACE_MAX,
123};
124
125enum {
126 PRIM_AUX_PCM = 0,
127 SEC_AUX_PCM,
128 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800129 QUAT_AUX_PCM,
130 QUIN_AUX_PCM,
131 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700132 AUX_PCM_MAX,
133};
134
135enum {
136 PRIM_MI2S = 0,
137 SEC_MI2S,
138 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800139 QUAT_MI2S,
140 QUIN_MI2S,
141 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700142 MI2S_MAX,
143};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700144
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700145enum {
146 WSA_CDC_DMA_RX_0 = 0,
147 WSA_CDC_DMA_RX_1,
148 RX_CDC_DMA_RX_0,
149 RX_CDC_DMA_RX_1,
150 RX_CDC_DMA_RX_2,
151 RX_CDC_DMA_RX_3,
152 RX_CDC_DMA_RX_5,
153 CDC_DMA_RX_MAX,
154};
155
156enum {
157 WSA_CDC_DMA_TX_0 = 0,
158 WSA_CDC_DMA_TX_1,
159 WSA_CDC_DMA_TX_2,
160 TX_CDC_DMA_TX_0,
161 TX_CDC_DMA_TX_3,
162 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800163 VA_CDC_DMA_TX_0,
164 VA_CDC_DMA_TX_1,
165 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700166 CDC_DMA_TX_MAX,
167};
168
Banajit Goswami83a370d2019-03-05 16:15:21 -0800169enum {
170 SLIM_RX_7 = 0,
171 SLIM_RX_MAX,
172};
173enum {
174 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530175 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800176 SLIM_TX_MAX,
177};
178
Meng Wange8e53822019-03-18 10:49:50 +0800179enum {
180 AFE_LOOPBACK_TX_IDX = 0,
181 AFE_LOOPBACK_TX_IDX_MAX,
182};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700183struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700184 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700185 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530186 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700187 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
188 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
189 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800190 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
191 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700192 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
193 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
194 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
195 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
196 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800197 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700198 struct clk *lpass_audio_hw_vote;
199 int core_audio_vote_count;
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +0530200 u32 wsa_max_devs;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -0800201 u32 tdm_max_slots; /* Max TDM slots used */
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +0530202 int (*get_wsa_dev_num)(struct snd_soc_component*);
203 struct afe_cps_hw_intf_cfg cps_config;
lintaopeie0a48bc2020-12-11 11:13:13 +0800204#ifdef CONFIG_T2M_SND_FP4
205 struct device_node *hac_pa_gpio_p;
206#endif
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700207};
208
209struct tdm_port {
210 u32 mode;
211 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700212};
213
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700214struct tdm_dev_config {
215 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
216};
217
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800218enum {
219 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700220 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800221 EXT_DISP_RX_IDX_MAX,
222};
223
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700224struct msm_wsa881x_dev_info {
225 struct device_node *of_node;
226 u32 index;
227};
228
229struct aux_codec_dev_info {
230 struct device_node *of_node;
231 u32 index;
232};
233
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700234struct dev_config {
235 u32 sample_rate;
236 u32 bit_format;
237 u32 channels;
238};
239
Banajit Goswami83a370d2019-03-05 16:15:21 -0800240/* Default configuration of slimbus channels */
241static struct dev_config slim_rx_cfg[] = {
242 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
243};
244
245static struct dev_config slim_tx_cfg[] = {
246 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530247 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800248};
249
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800250/* Default configuration of external display BE */
251static struct dev_config ext_disp_rx_cfg[] = {
252 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700253 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800254};
255
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700256static struct dev_config usb_rx_cfg = {
257 .sample_rate = SAMPLING_RATE_48KHZ,
258 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
259 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700260};
261
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700262static struct dev_config usb_tx_cfg = {
263 .sample_rate = SAMPLING_RATE_48KHZ,
264 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
265 .channels = 1,
266};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700267
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700268static struct dev_config proxy_rx_cfg = {
269 .sample_rate = SAMPLING_RATE_48KHZ,
270 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
271 .channels = 2,
272};
273
274static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
275 {
276 AFE_API_VERSION_I2S_CONFIG,
277 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
278 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
279 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
280 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
281 0,
282 },
283 {
284 AFE_API_VERSION_I2S_CONFIG,
285 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
286 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
287 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
288 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
289 0,
290 },
291 {
292 AFE_API_VERSION_I2S_CONFIG,
293 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
294 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
295 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
296 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
297 0,
298 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800299 {
300 AFE_API_VERSION_I2S_CONFIG,
301 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
302 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
303 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
304 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
305 0,
306 },
307 {
308 AFE_API_VERSION_I2S_CONFIG,
309 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
310 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
311 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
312 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
313 0,
314 },
315 {
316 AFE_API_VERSION_I2S_CONFIG,
317 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
318 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
319 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
320 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
321 0,
322 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700323};
324
325struct mi2s_conf {
326 struct mutex lock;
327 u32 ref_cnt;
328 u32 msm_is_mi2s_master;
329};
330
331static u32 mi2s_ebit_clk[MI2S_MAX] = {
332 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
333 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
334 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
335};
336
337static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
338
339/* Default configuration of TDM channels */
340static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
341 { /* PRI TDM */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
350 },
351 { /* SEC TDM */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
360 },
361 { /* TERT TDM */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
370 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800371 { /* QUAT TDM */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
380 },
381 { /* QUIN TDM */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
390 },
391 { /* SEN TDM */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
400 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700401};
402
403static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
404 { /* PRI TDM */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
413 },
414 { /* SEC TDM */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
423 },
424 { /* TERT TDM */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
429 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
433 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800434 { /* QUAT TDM */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
439 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
443 },
444 { /* QUIN TDM */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
449 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
450 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
451 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
452 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
453 },
454 { /* SEN TDM */
455 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
456 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
457 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
458 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
459 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
460 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
461 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
462 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
463 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700464};
465
466/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700467static struct dev_config aux_pcm_rx_cfg[] = {
468 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700469 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
470 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800471 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
472 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
473 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700474};
475
476static struct dev_config aux_pcm_tx_cfg[] = {
477 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700478 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
479 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800480 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
481 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
482 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700483};
484
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700485/* Default configuration of MI2S channels */
486static struct dev_config mi2s_rx_cfg[] = {
487 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
488 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
489 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800490 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
491 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
492 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700493};
494
495static struct dev_config mi2s_tx_cfg[] = {
496 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
497 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
498 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800499 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
lintaopeie0a48bc2020-12-11 11:13:13 +0800500 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800501 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700502};
503
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700504static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
505 { /* PRI TDM */
506 { {0, 4, 0xFFFF} }, /* RX_0 */
507 { {8, 12, 0xFFFF} }, /* RX_1 */
508 { {16, 20, 0xFFFF} }, /* RX_2 */
509 { {24, 28, 0xFFFF} }, /* RX_3 */
510 { {0xFFFF} }, /* RX_4 */
511 { {0xFFFF} }, /* RX_5 */
512 { {0xFFFF} }, /* RX_6 */
513 { {0xFFFF} }, /* RX_7 */
514 },
515 {
516 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
517 { {8, 12, 0xFFFF} }, /* TX_1 */
518 { {16, 20, 0xFFFF} }, /* TX_2 */
519 { {24, 28, 0xFFFF} }, /* TX_3 */
520 { {0xFFFF} }, /* TX_4 */
521 { {0xFFFF} }, /* TX_5 */
522 { {0xFFFF} }, /* TX_6 */
523 { {0xFFFF} }, /* TX_7 */
524 },
525};
526
527static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
528 { /* SEC TDM */
529 { {0, 4, 0xFFFF} }, /* RX_0 */
530 { {8, 12, 0xFFFF} }, /* RX_1 */
531 { {16, 20, 0xFFFF} }, /* RX_2 */
532 { {24, 28, 0xFFFF} }, /* RX_3 */
533 { {0xFFFF} }, /* RX_4 */
534 { {0xFFFF} }, /* RX_5 */
535 { {0xFFFF} }, /* RX_6 */
536 { {0xFFFF} }, /* RX_7 */
537 },
538 {
539 { {0, 4, 0xFFFF} }, /* TX_0 */
540 { {8, 12, 0xFFFF} }, /* TX_1 */
541 { {16, 20, 0xFFFF} }, /* TX_2 */
542 { {24, 28, 0xFFFF} }, /* TX_3 */
543 { {0xFFFF} }, /* TX_4 */
544 { {0xFFFF} }, /* TX_5 */
545 { {0xFFFF} }, /* TX_6 */
546 { {0xFFFF} }, /* TX_7 */
547 },
548};
549
550static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
551 { /* TERT TDM */
552 { {0, 4, 0xFFFF} }, /* RX_0 */
553 { {8, 12, 0xFFFF} }, /* RX_1 */
554 { {16, 20, 0xFFFF} }, /* RX_2 */
555 { {24, 28, 0xFFFF} }, /* RX_3 */
556 { {0xFFFF} }, /* RX_4 */
557 { {0xFFFF} }, /* RX_5 */
558 { {0xFFFF} }, /* RX_6 */
559 { {0xFFFF} }, /* RX_7 */
560 },
561 {
562 { {0, 4, 0xFFFF} }, /* TX_0 */
563 { {8, 12, 0xFFFF} }, /* TX_1 */
564 { {16, 20, 0xFFFF} }, /* TX_2 */
565 { {24, 28, 0xFFFF} }, /* TX_3 */
566 { {0xFFFF} }, /* TX_4 */
567 { {0xFFFF} }, /* TX_5 */
568 { {0xFFFF} }, /* TX_6 */
569 { {0xFFFF} }, /* TX_7 */
570 },
571};
572
573static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
574 { /* QUAT TDM */
575 { {0, 4, 0xFFFF} }, /* RX_0 */
576 { {8, 12, 0xFFFF} }, /* RX_1 */
577 { {16, 20, 0xFFFF} }, /* RX_2 */
578 { {24, 28, 0xFFFF} }, /* RX_3 */
579 { {0xFFFF} }, /* RX_4 */
580 { {0xFFFF} }, /* RX_5 */
581 { {0xFFFF} }, /* RX_6 */
582 { {0xFFFF} }, /* RX_7 */
583 },
584 {
585 { {0, 4, 0xFFFF} }, /* TX_0 */
586 { {8, 12, 0xFFFF} }, /* TX_1 */
587 { {16, 20, 0xFFFF} }, /* TX_2 */
588 { {24, 28, 0xFFFF} }, /* TX_3 */
589 { {0xFFFF} }, /* TX_4 */
590 { {0xFFFF} }, /* TX_5 */
591 { {0xFFFF} }, /* TX_6 */
592 { {0xFFFF} }, /* TX_7 */
593 },
594};
595
596static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
597 { /* QUIN TDM */
598 { {0, 4, 0xFFFF} }, /* RX_0 */
599 { {8, 12, 0xFFFF} }, /* RX_1 */
600 { {16, 20, 0xFFFF} }, /* RX_2 */
601 { {24, 28, 0xFFFF} }, /* RX_3 */
602 { {0xFFFF} }, /* RX_4 */
603 { {0xFFFF} }, /* RX_5 */
604 { {0xFFFF} }, /* RX_6 */
605 { {0xFFFF} }, /* RX_7 */
606 },
607 {
608 { {0, 4, 0xFFFF} }, /* TX_0 */
609 { {8, 12, 0xFFFF} }, /* TX_1 */
610 { {16, 20, 0xFFFF} }, /* TX_2 */
611 { {24, 28, 0xFFFF} }, /* TX_3 */
612 { {0xFFFF} }, /* TX_4 */
613 { {0xFFFF} }, /* TX_5 */
614 { {0xFFFF} }, /* TX_6 */
615 { {0xFFFF} }, /* TX_7 */
616 },
617};
618
619static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
620 { /* SEN TDM */
621 { {0, 4, 0xFFFF} }, /* RX_0 */
622 { {8, 12, 0xFFFF} }, /* RX_1 */
623 { {16, 20, 0xFFFF} }, /* RX_2 */
624 { {24, 28, 0xFFFF} }, /* RX_3 */
625 { {0xFFFF} }, /* RX_4 */
626 { {0xFFFF} }, /* RX_5 */
627 { {0xFFFF} }, /* RX_6 */
628 { {0xFFFF} }, /* RX_7 */
629 },
630 {
631 { {0, 4, 0xFFFF} }, /* TX_0 */
632 { {8, 12, 0xFFFF} }, /* TX_1 */
633 { {16, 20, 0xFFFF} }, /* TX_2 */
634 { {24, 28, 0xFFFF} }, /* TX_3 */
635 { {0xFFFF} }, /* TX_4 */
636 { {0xFFFF} }, /* TX_5 */
637 { {0xFFFF} }, /* TX_6 */
638 { {0xFFFF} }, /* TX_7 */
639 },
640};
641
642static void *tdm_cfg[TDM_INTERFACE_MAX] = {
643 pri_tdm_dev_config,
644 sec_tdm_dev_config,
645 tert_tdm_dev_config,
646 quat_tdm_dev_config,
647 quin_tdm_dev_config,
648 sen_tdm_dev_config,
649};
650
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700651/* Default configuration of Codec DMA Interface RX */
652static struct dev_config cdc_dma_rx_cfg[] = {
653 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
655 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
656 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
657 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
658 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
659 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
660};
661
662/* Default configuration of Codec DMA Interface TX */
663static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530664 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700665 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
666 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
667 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
668 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
669 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800670 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
671 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
672 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700673};
674
Meng Wange8e53822019-03-18 10:49:50 +0800675static struct dev_config afe_loopback_tx_cfg[] = {
676 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
677};
678
Meng Wangd1db67c2019-04-17 12:41:34 +0800679static int msm_vi_feed_tx_ch = 2;
680static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700681static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
682 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700683static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700684static char const *ch_text[] = {"Two", "Three", "Four", "Five",
685 "Six", "Seven", "Eight"};
686static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
687 "KHZ_16", "KHZ_22P05",
688 "KHZ_32", "KHZ_44P1", "KHZ_48",
689 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
690 "KHZ_192", "KHZ_352P8", "KHZ_384"};
691static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
692 "Five", "Six", "Seven",
693 "Eight"};
694static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
695 "KHZ_48", "KHZ_176P4",
696 "KHZ_352P8"};
697static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
698static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
699 "Five", "Six", "Seven", "Eight"};
700static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
701static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
702 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700703 "KHZ_48", "KHZ_88P2", "KHZ_96",
704 "KHZ_176P4", "KHZ_192","KHZ_352P8",
705 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700706static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
707 "Five", "Six", "Seven",
708 "Eight"};
709
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700710static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
711static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
712 "Five", "Six", "Seven",
713 "Eight"};
714static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
715 "KHZ_16", "KHZ_22P05",
716 "KHZ_32", "KHZ_44P1", "KHZ_48",
717 "KHZ_88P2", "KHZ_96",
718 "KHZ_176P4", "KHZ_192",
719 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700720static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
721 "KHZ_16", "KHZ_22P05",
722 "KHZ_32", "KHZ_44P1", "KHZ_48",
723 "KHZ_88P2", "KHZ_96",
724 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800725static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
726 "S24_3LE"};
727static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
728 "KHZ_192", "KHZ_32", "KHZ_44P1",
729 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800730static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
731 "KHZ_44P1", "KHZ_48",
732 "KHZ_88P2", "KHZ_96"};
733static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
734 "KHZ_44P1", "KHZ_48",
735 "KHZ_88P2", "KHZ_96"};
736static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
737 "KHZ_44P1", "KHZ_48",
738 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800739static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700740
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700741static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
742static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
743static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
744static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
745static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
746static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800747static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700748static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
749static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
750static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
752static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
753static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
754static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700755static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700756static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
757static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800758static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
760static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700761static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700762static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800764static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
766static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700767static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
768static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700769static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
770static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
771static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800772static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
773static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
774static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700775static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
776static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
777static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800778static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
779static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
780static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700781static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
782static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
783static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800786static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700789static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800792static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700795static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
797static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
798static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
799static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
800static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
801static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
802static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
803static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
804static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
805static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
806static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
807static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800808static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
809static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
810static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
812static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
814static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
815static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
816static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
817static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800818static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
819static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
820static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700821static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
822 cdc_dma_sample_rate_text);
823static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
824 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700825static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
826 cdc_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
828 cdc_dma_sample_rate_text);
829static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
830 cdc_dma_sample_rate_text);
831static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
832 cdc_dma_sample_rate_text);
833static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
834 cdc_dma_sample_rate_text);
835static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
836 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800837static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
838 cdc_dma_sample_rate_text);
839static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
840 cdc_dma_sample_rate_text);
841static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
842 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700843
844/* WCD9380 */
845static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
851 cdc80_dma_sample_rate_text);
852static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
853 cdc80_dma_sample_rate_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
855 cdc80_dma_sample_rate_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
857 cdc80_dma_sample_rate_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
859 cdc80_dma_sample_rate_text);
860/* WCD9385 */
861static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
862static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
863static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
864static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
865static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
866static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
867 cdc_dma_sample_rate_text);
868static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
869 cdc_dma_sample_rate_text);
870static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
871 cdc_dma_sample_rate_text);
872static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
873 cdc_dma_sample_rate_text);
874static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
875 cdc_dma_sample_rate_text);
876
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800877/* WCD937x */
878static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
879static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
880static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
881static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
882static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
883static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
884 cdc_dma_sample_rate_text);
885static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
886 cdc_dma_sample_rate_text);
887static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
888 cdc_dma_sample_rate_text);
889static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
890 cdc_dma_sample_rate_text);
891static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
892 cdc_dma_sample_rate_text);
893
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800894static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
895static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
896static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
897 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800898static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
899static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
900static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800901static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700902
903static bool is_initial_boot;
904static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700905static struct snd_soc_aux_dev *msm_aux_dev;
906static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700907static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700908static int dmic_0_1_gpio_cnt;
909static int dmic_2_3_gpio_cnt;
910static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700911
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800912static void *def_wcd_mbhc_cal(void);
913
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700914/*
915 * Need to report LINEIN
916 * if R/L channel impedance is larger than 5K ohm
917 */
918static struct wcd_mbhc_config wcd_mbhc_cfg = {
919 .read_fw_bin = false,
920 .calibration = NULL,
921 .detect_extn_cable = true,
922 .mono_stero_detection = false,
923 .swap_gnd_mic = NULL,
924 .hs_ext_micbias = true,
925 .key_code[0] = KEY_MEDIA,
926 .key_code[1] = KEY_VOICECOMMAND,
927 .key_code[2] = KEY_VOLUMEUP,
928 .key_code[3] = KEY_VOLUMEDOWN,
929 .key_code[4] = 0,
930 .key_code[5] = 0,
931 .key_code[6] = 0,
932 .key_code[7] = 0,
933 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530934 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700935 .mbhc_micbias = MIC_BIAS_2,
936 .anc_micbias = MIC_BIAS_2,
937 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530938 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700939};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700940
lintaopeie0a48bc2020-12-11 11:13:13 +0800941#ifdef CONFIG_T2M_SND_FP4
942static int msm_enable_hac_pa(struct snd_soc_dapm_widget *w,
943 struct snd_kcontrol *kcontrol,
944 int event);
945
946static const struct snd_kcontrol_new hac_pa_switch[] = {
947 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
948};
949
950static const struct snd_soc_dapm_widget msm_hac_dapm_widgets[] = {
951 SND_SOC_DAPM_MIXER("HAC_PA", SND_SOC_NOPM, 0, 0,
952 hac_pa_switch, ARRAY_SIZE(hac_pa_switch)),
953 SND_SOC_DAPM_PGA_E("HAC PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
954 msm_enable_hac_pa,
955 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
956 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
957
958
959 SND_SOC_DAPM_INPUT("HAC_RX"),
960 SND_SOC_DAPM_OUTPUT("HAC"),
961};
962
963static const struct snd_soc_dapm_route msm_hac_audio_map[] = {
964 {"HAC_PA", "Switch", "HAC_RX"},
965 {"HAC PGA", NULL, "HAC_PA"},
966 {"HAC", NULL, "HAC PGA"},
967};
968#endif
969
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700970static inline int param_is_mask(int p)
971{
972 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
973 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
974}
975
976static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
977 int n)
978{
979 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
980}
981
982static void param_set_mask(struct snd_pcm_hw_params *p, int n,
983 unsigned int bit)
984{
985 if (bit >= SNDRV_MASK_MAX)
986 return;
987 if (param_is_mask(n)) {
988 struct snd_mask *m = param_to_mask(p, n);
989
990 m->bits[0] = 0;
991 m->bits[1] = 0;
992 m->bits[bit >> 5] |= (1 << (bit & 31));
993 }
994}
995
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700996static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
997 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700998{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700999 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001001 switch (usb_rx_cfg.sample_rate) {
1002 case SAMPLING_RATE_384KHZ:
1003 sample_rate_val = 12;
1004 break;
1005 case SAMPLING_RATE_352P8KHZ:
1006 sample_rate_val = 11;
1007 break;
1008 case SAMPLING_RATE_192KHZ:
1009 sample_rate_val = 10;
1010 break;
1011 case SAMPLING_RATE_176P4KHZ:
1012 sample_rate_val = 9;
1013 break;
1014 case SAMPLING_RATE_96KHZ:
1015 sample_rate_val = 8;
1016 break;
1017 case SAMPLING_RATE_88P2KHZ:
1018 sample_rate_val = 7;
1019 break;
1020 case SAMPLING_RATE_48KHZ:
1021 sample_rate_val = 6;
1022 break;
1023 case SAMPLING_RATE_44P1KHZ:
1024 sample_rate_val = 5;
1025 break;
1026 case SAMPLING_RATE_32KHZ:
1027 sample_rate_val = 4;
1028 break;
1029 case SAMPLING_RATE_22P05KHZ:
1030 sample_rate_val = 3;
1031 break;
1032 case SAMPLING_RATE_16KHZ:
1033 sample_rate_val = 2;
1034 break;
1035 case SAMPLING_RATE_11P025KHZ:
1036 sample_rate_val = 1;
1037 break;
1038 case SAMPLING_RATE_8KHZ:
1039 default:
1040 sample_rate_val = 0;
1041 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001042 }
1043
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001044 ucontrol->value.integer.value[0] = sample_rate_val;
1045 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1046 usb_rx_cfg.sample_rate);
1047 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001048}
1049
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001050static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1052{
1053 switch (ucontrol->value.integer.value[0]) {
1054 case 12:
1055 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1056 break;
1057 case 11:
1058 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1059 break;
1060 case 10:
1061 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1062 break;
1063 case 9:
1064 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1065 break;
1066 case 8:
1067 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1068 break;
1069 case 7:
1070 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1071 break;
1072 case 6:
1073 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1074 break;
1075 case 5:
1076 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1077 break;
1078 case 4:
1079 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1080 break;
1081 case 3:
1082 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1083 break;
1084 case 2:
1085 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1086 break;
1087 case 1:
1088 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1089 break;
1090 case 0:
1091 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1092 break;
1093 default:
1094 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1095 break;
1096 }
1097
1098 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1099 __func__, ucontrol->value.integer.value[0],
1100 usb_rx_cfg.sample_rate);
1101 return 0;
1102}
1103
1104static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_value *ucontrol)
1106{
1107 int sample_rate_val = 0;
1108
1109 switch (usb_tx_cfg.sample_rate) {
1110 case SAMPLING_RATE_384KHZ:
1111 sample_rate_val = 12;
1112 break;
1113 case SAMPLING_RATE_352P8KHZ:
1114 sample_rate_val = 11;
1115 break;
1116 case SAMPLING_RATE_192KHZ:
1117 sample_rate_val = 10;
1118 break;
1119 case SAMPLING_RATE_176P4KHZ:
1120 sample_rate_val = 9;
1121 break;
1122 case SAMPLING_RATE_96KHZ:
1123 sample_rate_val = 8;
1124 break;
1125 case SAMPLING_RATE_88P2KHZ:
1126 sample_rate_val = 7;
1127 break;
1128 case SAMPLING_RATE_48KHZ:
1129 sample_rate_val = 6;
1130 break;
1131 case SAMPLING_RATE_44P1KHZ:
1132 sample_rate_val = 5;
1133 break;
1134 case SAMPLING_RATE_32KHZ:
1135 sample_rate_val = 4;
1136 break;
1137 case SAMPLING_RATE_22P05KHZ:
1138 sample_rate_val = 3;
1139 break;
1140 case SAMPLING_RATE_16KHZ:
1141 sample_rate_val = 2;
1142 break;
1143 case SAMPLING_RATE_11P025KHZ:
1144 sample_rate_val = 1;
1145 break;
1146 case SAMPLING_RATE_8KHZ:
1147 sample_rate_val = 0;
1148 break;
1149 default:
1150 sample_rate_val = 6;
1151 break;
1152 }
1153
1154 ucontrol->value.integer.value[0] = sample_rate_val;
1155 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1156 usb_tx_cfg.sample_rate);
1157 return 0;
1158}
1159
1160static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1161 struct snd_ctl_elem_value *ucontrol)
1162{
1163 switch (ucontrol->value.integer.value[0]) {
1164 case 12:
1165 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1166 break;
1167 case 11:
1168 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1169 break;
1170 case 10:
1171 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1172 break;
1173 case 9:
1174 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1175 break;
1176 case 8:
1177 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1178 break;
1179 case 7:
1180 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1181 break;
1182 case 6:
1183 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1184 break;
1185 case 5:
1186 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1187 break;
1188 case 4:
1189 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1190 break;
1191 case 3:
1192 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1193 break;
1194 case 2:
1195 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1196 break;
1197 case 1:
1198 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1199 break;
1200 case 0:
1201 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1202 break;
1203 default:
1204 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1205 break;
1206 }
1207
1208 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1209 __func__, ucontrol->value.integer.value[0],
1210 usb_tx_cfg.sample_rate);
1211 return 0;
1212}
Meng Wange8e53822019-03-18 10:49:50 +08001213static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1214 struct snd_ctl_elem_value *ucontrol)
1215{
1216 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1217 afe_loopback_tx_cfg[0].channels);
1218 ucontrol->value.enumerated.item[0] =
1219 afe_loopback_tx_cfg[0].channels - 1;
1220
1221 return 0;
1222}
1223
1224static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1225 struct snd_ctl_elem_value *ucontrol)
1226{
1227 afe_loopback_tx_cfg[0].channels =
1228 ucontrol->value.enumerated.item[0] + 1;
1229 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1230 afe_loopback_tx_cfg[0].channels);
1231
1232 return 1;
1233}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001234
1235static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1236 struct snd_ctl_elem_value *ucontrol)
1237{
1238 switch (usb_rx_cfg.bit_format) {
1239 case SNDRV_PCM_FORMAT_S32_LE:
1240 ucontrol->value.integer.value[0] = 3;
1241 break;
1242 case SNDRV_PCM_FORMAT_S24_3LE:
1243 ucontrol->value.integer.value[0] = 2;
1244 break;
1245 case SNDRV_PCM_FORMAT_S24_LE:
1246 ucontrol->value.integer.value[0] = 1;
1247 break;
1248 case SNDRV_PCM_FORMAT_S16_LE:
1249 default:
1250 ucontrol->value.integer.value[0] = 0;
1251 break;
1252 }
1253
1254 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1255 __func__, usb_rx_cfg.bit_format,
1256 ucontrol->value.integer.value[0]);
1257 return 0;
1258}
1259
1260static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1261 struct snd_ctl_elem_value *ucontrol)
1262{
1263 int rc = 0;
1264
1265 switch (ucontrol->value.integer.value[0]) {
1266 case 3:
1267 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1268 break;
1269 case 2:
1270 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1271 break;
1272 case 1:
1273 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1274 break;
1275 case 0:
1276 default:
1277 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1278 break;
1279 }
1280 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1281 __func__, usb_rx_cfg.bit_format,
1282 ucontrol->value.integer.value[0]);
1283
1284 return rc;
1285}
1286
1287static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1289{
1290 switch (usb_tx_cfg.bit_format) {
1291 case SNDRV_PCM_FORMAT_S32_LE:
1292 ucontrol->value.integer.value[0] = 3;
1293 break;
1294 case SNDRV_PCM_FORMAT_S24_3LE:
1295 ucontrol->value.integer.value[0] = 2;
1296 break;
1297 case SNDRV_PCM_FORMAT_S24_LE:
1298 ucontrol->value.integer.value[0] = 1;
1299 break;
1300 case SNDRV_PCM_FORMAT_S16_LE:
1301 default:
1302 ucontrol->value.integer.value[0] = 0;
1303 break;
1304 }
1305
1306 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1307 __func__, usb_tx_cfg.bit_format,
1308 ucontrol->value.integer.value[0]);
1309 return 0;
1310}
1311
1312static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1313 struct snd_ctl_elem_value *ucontrol)
1314{
1315 int rc = 0;
1316
1317 switch (ucontrol->value.integer.value[0]) {
1318 case 3:
1319 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1320 break;
1321 case 2:
1322 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1323 break;
1324 case 1:
1325 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1326 break;
1327 case 0:
1328 default:
1329 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1330 break;
1331 }
1332 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1333 __func__, usb_tx_cfg.bit_format,
1334 ucontrol->value.integer.value[0]);
1335
1336 return rc;
1337}
1338
1339static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1340 struct snd_ctl_elem_value *ucontrol)
1341{
1342 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1343 usb_rx_cfg.channels);
1344 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1345 return 0;
1346}
1347
1348static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1349 struct snd_ctl_elem_value *ucontrol)
1350{
1351 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1352
1353 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1354 return 1;
1355}
1356
1357static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1358 struct snd_ctl_elem_value *ucontrol)
1359{
1360 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1361 usb_tx_cfg.channels);
1362 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1363 return 0;
1364}
1365
1366static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1367 struct snd_ctl_elem_value *ucontrol)
1368{
1369 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1370
1371 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1372 return 1;
1373}
1374
Meng Wangd1db67c2019-04-17 12:41:34 +08001375static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1376 struct snd_ctl_elem_value *ucontrol)
1377{
1378 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1379 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1380 ucontrol->value.integer.value[0]);
1381 return 0;
1382}
1383
1384static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1385 struct snd_ctl_elem_value *ucontrol)
1386{
1387 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1388 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1389 return 1;
1390}
1391
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001392static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1393{
1394 int idx = 0;
1395
1396 if (strnstr(kcontrol->id.name, "Display Port RX",
1397 sizeof("Display Port RX"))) {
1398 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07001399 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1400 sizeof("Display Port1 RX"))) {
1401 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001402 } else {
1403 pr_err("%s: unsupported BE: %s\n",
1404 __func__, kcontrol->id.name);
1405 idx = -EINVAL;
1406 }
1407
1408 return idx;
1409}
1410
1411static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1412 struct snd_ctl_elem_value *ucontrol)
1413{
1414 int idx = ext_disp_get_port_idx(kcontrol);
1415
1416 if (idx < 0)
1417 return idx;
1418
1419 switch (ext_disp_rx_cfg[idx].bit_format) {
1420 case SNDRV_PCM_FORMAT_S24_3LE:
1421 ucontrol->value.integer.value[0] = 2;
1422 break;
1423 case SNDRV_PCM_FORMAT_S24_LE:
1424 ucontrol->value.integer.value[0] = 1;
1425 break;
1426 case SNDRV_PCM_FORMAT_S16_LE:
1427 default:
1428 ucontrol->value.integer.value[0] = 0;
1429 break;
1430 }
1431
1432 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1433 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1434 ucontrol->value.integer.value[0]);
1435 return 0;
1436}
1437
1438static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1440{
1441 int idx = ext_disp_get_port_idx(kcontrol);
1442
1443 if (idx < 0)
1444 return idx;
1445
1446 switch (ucontrol->value.integer.value[0]) {
1447 case 2:
1448 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1449 break;
1450 case 1:
1451 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1452 break;
1453 case 0:
1454 default:
1455 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1456 break;
1457 }
1458 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1459 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1460 ucontrol->value.integer.value[0]);
1461
1462 return 0;
1463}
1464
1465static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1466 struct snd_ctl_elem_value *ucontrol)
1467{
1468 int idx = ext_disp_get_port_idx(kcontrol);
1469
1470 if (idx < 0)
1471 return idx;
1472
1473 ucontrol->value.integer.value[0] =
1474 ext_disp_rx_cfg[idx].channels - 2;
1475
1476 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1477 idx, ext_disp_rx_cfg[idx].channels);
1478
1479 return 0;
1480}
1481
1482static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1483 struct snd_ctl_elem_value *ucontrol)
1484{
1485 int idx = ext_disp_get_port_idx(kcontrol);
1486
1487 if (idx < 0)
1488 return idx;
1489
1490 ext_disp_rx_cfg[idx].channels =
1491 ucontrol->value.integer.value[0] + 2;
1492
1493 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1494 idx, ext_disp_rx_cfg[idx].channels);
1495 return 1;
1496}
1497
1498static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1499 struct snd_ctl_elem_value *ucontrol)
1500{
1501 int sample_rate_val;
1502 int idx = ext_disp_get_port_idx(kcontrol);
1503
1504 if (idx < 0)
1505 return idx;
1506
1507 switch (ext_disp_rx_cfg[idx].sample_rate) {
1508 case SAMPLING_RATE_176P4KHZ:
1509 sample_rate_val = 6;
1510 break;
1511
1512 case SAMPLING_RATE_88P2KHZ:
1513 sample_rate_val = 5;
1514 break;
1515
1516 case SAMPLING_RATE_44P1KHZ:
1517 sample_rate_val = 4;
1518 break;
1519
1520 case SAMPLING_RATE_32KHZ:
1521 sample_rate_val = 3;
1522 break;
1523
1524 case SAMPLING_RATE_192KHZ:
1525 sample_rate_val = 2;
1526 break;
1527
1528 case SAMPLING_RATE_96KHZ:
1529 sample_rate_val = 1;
1530 break;
1531
1532 case SAMPLING_RATE_48KHZ:
1533 default:
1534 sample_rate_val = 0;
1535 break;
1536 }
1537
1538 ucontrol->value.integer.value[0] = sample_rate_val;
1539 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1540 idx, ext_disp_rx_cfg[idx].sample_rate);
1541
1542 return 0;
1543}
1544
1545static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1546 struct snd_ctl_elem_value *ucontrol)
1547{
1548 int idx = ext_disp_get_port_idx(kcontrol);
1549
1550 if (idx < 0)
1551 return idx;
1552
1553 switch (ucontrol->value.integer.value[0]) {
1554 case 6:
1555 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1556 break;
1557 case 5:
1558 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1559 break;
1560 case 4:
1561 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1562 break;
1563 case 3:
1564 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1565 break;
1566 case 2:
1567 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1568 break;
1569 case 1:
1570 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1571 break;
1572 case 0:
1573 default:
1574 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1575 break;
1576 }
1577
1578 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1579 __func__, ucontrol->value.integer.value[0], idx,
1580 ext_disp_rx_cfg[idx].sample_rate);
1581 return 0;
1582}
1583
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001584static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1585 struct snd_ctl_elem_value *ucontrol)
1586{
1587 pr_debug("%s: proxy_rx channels = %d\n",
1588 __func__, proxy_rx_cfg.channels);
1589 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1590
1591 return 0;
1592}
1593
1594static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1595 struct snd_ctl_elem_value *ucontrol)
1596{
1597 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1598 pr_debug("%s: proxy_rx channels = %d\n",
1599 __func__, proxy_rx_cfg.channels);
1600
1601 return 1;
1602}
1603
1604static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1605 struct tdm_port *port)
1606{
1607 if (port) {
1608 if (strnstr(kcontrol->id.name, "PRI",
1609 sizeof(kcontrol->id.name))) {
1610 port->mode = TDM_PRI;
1611 } else if (strnstr(kcontrol->id.name, "SEC",
1612 sizeof(kcontrol->id.name))) {
1613 port->mode = TDM_SEC;
1614 } else if (strnstr(kcontrol->id.name, "TERT",
1615 sizeof(kcontrol->id.name))) {
1616 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001617 } else if (strnstr(kcontrol->id.name, "QUAT",
1618 sizeof(kcontrol->id.name))) {
1619 port->mode = TDM_QUAT;
1620 } else if (strnstr(kcontrol->id.name, "QUIN",
1621 sizeof(kcontrol->id.name))) {
1622 port->mode = TDM_QUIN;
1623 } else if (strnstr(kcontrol->id.name, "SEN",
1624 sizeof(kcontrol->id.name))) {
1625 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001626 } else {
1627 pr_err("%s: unsupported mode in: %s\n",
1628 __func__, kcontrol->id.name);
1629 return -EINVAL;
1630 }
1631
1632 if (strnstr(kcontrol->id.name, "RX_0",
1633 sizeof(kcontrol->id.name)) ||
1634 strnstr(kcontrol->id.name, "TX_0",
1635 sizeof(kcontrol->id.name))) {
1636 port->channel = TDM_0;
1637 } else if (strnstr(kcontrol->id.name, "RX_1",
1638 sizeof(kcontrol->id.name)) ||
1639 strnstr(kcontrol->id.name, "TX_1",
1640 sizeof(kcontrol->id.name))) {
1641 port->channel = TDM_1;
1642 } else if (strnstr(kcontrol->id.name, "RX_2",
1643 sizeof(kcontrol->id.name)) ||
1644 strnstr(kcontrol->id.name, "TX_2",
1645 sizeof(kcontrol->id.name))) {
1646 port->channel = TDM_2;
1647 } else if (strnstr(kcontrol->id.name, "RX_3",
1648 sizeof(kcontrol->id.name)) ||
1649 strnstr(kcontrol->id.name, "TX_3",
1650 sizeof(kcontrol->id.name))) {
1651 port->channel = TDM_3;
1652 } else if (strnstr(kcontrol->id.name, "RX_4",
1653 sizeof(kcontrol->id.name)) ||
1654 strnstr(kcontrol->id.name, "TX_4",
1655 sizeof(kcontrol->id.name))) {
1656 port->channel = TDM_4;
1657 } else if (strnstr(kcontrol->id.name, "RX_5",
1658 sizeof(kcontrol->id.name)) ||
1659 strnstr(kcontrol->id.name, "TX_5",
1660 sizeof(kcontrol->id.name))) {
1661 port->channel = TDM_5;
1662 } else if (strnstr(kcontrol->id.name, "RX_6",
1663 sizeof(kcontrol->id.name)) ||
1664 strnstr(kcontrol->id.name, "TX_6",
1665 sizeof(kcontrol->id.name))) {
1666 port->channel = TDM_6;
1667 } else if (strnstr(kcontrol->id.name, "RX_7",
1668 sizeof(kcontrol->id.name)) ||
1669 strnstr(kcontrol->id.name, "TX_7",
1670 sizeof(kcontrol->id.name))) {
1671 port->channel = TDM_7;
1672 } else {
1673 pr_err("%s: unsupported channel in: %s\n",
1674 __func__, kcontrol->id.name);
1675 return -EINVAL;
1676 }
1677 } else {
1678 return -EINVAL;
1679 }
1680 return 0;
1681}
1682
1683static int tdm_get_sample_rate(int value)
1684{
1685 int sample_rate = 0;
1686
1687 switch (value) {
1688 case 0:
1689 sample_rate = SAMPLING_RATE_8KHZ;
1690 break;
1691 case 1:
1692 sample_rate = SAMPLING_RATE_16KHZ;
1693 break;
1694 case 2:
1695 sample_rate = SAMPLING_RATE_32KHZ;
1696 break;
1697 case 3:
1698 sample_rate = SAMPLING_RATE_48KHZ;
1699 break;
1700 case 4:
1701 sample_rate = SAMPLING_RATE_176P4KHZ;
1702 break;
1703 case 5:
1704 sample_rate = SAMPLING_RATE_352P8KHZ;
1705 break;
1706 default:
1707 sample_rate = SAMPLING_RATE_48KHZ;
1708 break;
1709 }
1710 return sample_rate;
1711}
1712
1713static int tdm_get_sample_rate_val(int sample_rate)
1714{
1715 int sample_rate_val = 0;
1716
1717 switch (sample_rate) {
1718 case SAMPLING_RATE_8KHZ:
1719 sample_rate_val = 0;
1720 break;
1721 case SAMPLING_RATE_16KHZ:
1722 sample_rate_val = 1;
1723 break;
1724 case SAMPLING_RATE_32KHZ:
1725 sample_rate_val = 2;
1726 break;
1727 case SAMPLING_RATE_48KHZ:
1728 sample_rate_val = 3;
1729 break;
1730 case SAMPLING_RATE_176P4KHZ:
1731 sample_rate_val = 4;
1732 break;
1733 case SAMPLING_RATE_352P8KHZ:
1734 sample_rate_val = 5;
1735 break;
1736 default:
1737 sample_rate_val = 3;
1738 break;
1739 }
1740 return sample_rate_val;
1741}
1742
1743static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1744 struct snd_ctl_elem_value *ucontrol)
1745{
1746 struct tdm_port port;
1747 int ret = tdm_get_port_idx(kcontrol, &port);
1748
1749 if (ret) {
1750 pr_err("%s: unsupported control: %s\n",
1751 __func__, kcontrol->id.name);
1752 } else {
1753 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1754 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1755
1756 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1757 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1758 ucontrol->value.enumerated.item[0]);
1759 }
1760 return ret;
1761}
1762
1763static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1764 struct snd_ctl_elem_value *ucontrol)
1765{
1766 struct tdm_port port;
1767 int ret = tdm_get_port_idx(kcontrol, &port);
1768
1769 if (ret) {
1770 pr_err("%s: unsupported control: %s\n",
1771 __func__, kcontrol->id.name);
1772 } else {
1773 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1774 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1775
1776 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1777 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1778 ucontrol->value.enumerated.item[0]);
1779 }
1780 return ret;
1781}
1782
1783static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1784 struct snd_ctl_elem_value *ucontrol)
1785{
1786 struct tdm_port port;
1787 int ret = tdm_get_port_idx(kcontrol, &port);
1788
1789 if (ret) {
1790 pr_err("%s: unsupported control: %s\n",
1791 __func__, kcontrol->id.name);
1792 } else {
1793 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1794 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1795
1796 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1797 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1798 ucontrol->value.enumerated.item[0]);
1799 }
1800 return ret;
1801}
1802
1803static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1804 struct snd_ctl_elem_value *ucontrol)
1805{
1806 struct tdm_port port;
1807 int ret = tdm_get_port_idx(kcontrol, &port);
1808
1809 if (ret) {
1810 pr_err("%s: unsupported control: %s\n",
1811 __func__, kcontrol->id.name);
1812 } else {
1813 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1814 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1815
1816 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1817 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1818 ucontrol->value.enumerated.item[0]);
1819 }
1820 return ret;
1821}
1822
1823static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001824{
1825 int format = 0;
1826
1827 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001828 case 0:
1829 format = SNDRV_PCM_FORMAT_S16_LE;
1830 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001831 case 1:
1832 format = SNDRV_PCM_FORMAT_S24_LE;
1833 break;
1834 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001835 format = SNDRV_PCM_FORMAT_S32_LE;
1836 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001837 default:
1838 format = SNDRV_PCM_FORMAT_S16_LE;
1839 break;
1840 }
1841 return format;
1842}
1843
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001844static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001845{
1846 int value = 0;
1847
1848 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001849 case SNDRV_PCM_FORMAT_S16_LE:
1850 value = 0;
1851 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001852 case SNDRV_PCM_FORMAT_S24_LE:
1853 value = 1;
1854 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001855 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001856 value = 2;
1857 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001858 default:
1859 value = 0;
1860 break;
1861 }
1862 return value;
1863}
1864
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001865static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1866 struct snd_ctl_elem_value *ucontrol)
1867{
1868 struct tdm_port port;
1869 int ret = tdm_get_port_idx(kcontrol, &port);
1870
1871 if (ret) {
1872 pr_err("%s: unsupported control: %s\n",
1873 __func__, kcontrol->id.name);
1874 } else {
1875 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1876 tdm_rx_cfg[port.mode][port.channel].bit_format);
1877
1878 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1879 tdm_rx_cfg[port.mode][port.channel].bit_format,
1880 ucontrol->value.enumerated.item[0]);
1881 }
1882 return ret;
1883}
1884
1885static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1886 struct snd_ctl_elem_value *ucontrol)
1887{
1888 struct tdm_port port;
1889 int ret = tdm_get_port_idx(kcontrol, &port);
1890
1891 if (ret) {
1892 pr_err("%s: unsupported control: %s\n",
1893 __func__, kcontrol->id.name);
1894 } else {
1895 tdm_rx_cfg[port.mode][port.channel].bit_format =
1896 tdm_get_format(ucontrol->value.enumerated.item[0]);
1897
1898 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1899 tdm_rx_cfg[port.mode][port.channel].bit_format,
1900 ucontrol->value.enumerated.item[0]);
1901 }
1902 return ret;
1903}
1904
1905static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1906 struct snd_ctl_elem_value *ucontrol)
1907{
1908 struct tdm_port port;
1909 int ret = tdm_get_port_idx(kcontrol, &port);
1910
1911 if (ret) {
1912 pr_err("%s: unsupported control: %s\n",
1913 __func__, kcontrol->id.name);
1914 } else {
1915 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1916 tdm_tx_cfg[port.mode][port.channel].bit_format);
1917
1918 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1919 tdm_tx_cfg[port.mode][port.channel].bit_format,
1920 ucontrol->value.enumerated.item[0]);
1921 }
1922 return ret;
1923}
1924
1925static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct tdm_port port;
1929 int ret = tdm_get_port_idx(kcontrol, &port);
1930
1931 if (ret) {
1932 pr_err("%s: unsupported control: %s\n",
1933 __func__, kcontrol->id.name);
1934 } else {
1935 tdm_tx_cfg[port.mode][port.channel].bit_format =
1936 tdm_get_format(ucontrol->value.enumerated.item[0]);
1937
1938 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1939 tdm_tx_cfg[port.mode][port.channel].bit_format,
1940 ucontrol->value.enumerated.item[0]);
1941 }
1942 return ret;
1943}
1944
1945static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 struct tdm_port port;
1949 int ret = tdm_get_port_idx(kcontrol, &port);
1950
1951 if (ret) {
1952 pr_err("%s: unsupported control: %s\n",
1953 __func__, kcontrol->id.name);
1954 } else {
1955
1956 ucontrol->value.enumerated.item[0] =
1957 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1958
1959 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1960 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1961 ucontrol->value.enumerated.item[0]);
1962 }
1963 return ret;
1964}
1965
1966static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968{
1969 struct tdm_port port;
1970 int ret = tdm_get_port_idx(kcontrol, &port);
1971
1972 if (ret) {
1973 pr_err("%s: unsupported control: %s\n",
1974 __func__, kcontrol->id.name);
1975 } else {
1976 tdm_rx_cfg[port.mode][port.channel].channels =
1977 ucontrol->value.enumerated.item[0] + 1;
1978
1979 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1980 tdm_rx_cfg[port.mode][port.channel].channels,
1981 ucontrol->value.enumerated.item[0] + 1);
1982 }
1983 return ret;
1984}
1985
1986static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1987 struct snd_ctl_elem_value *ucontrol)
1988{
1989 struct tdm_port port;
1990 int ret = tdm_get_port_idx(kcontrol, &port);
1991
1992 if (ret) {
1993 pr_err("%s: unsupported control: %s\n",
1994 __func__, kcontrol->id.name);
1995 } else {
1996 ucontrol->value.enumerated.item[0] =
1997 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1998
1999 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2000 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2001 ucontrol->value.enumerated.item[0]);
2002 }
2003 return ret;
2004}
2005
2006static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2007 struct snd_ctl_elem_value *ucontrol)
2008{
2009 struct tdm_port port;
2010 int ret = tdm_get_port_idx(kcontrol, &port);
2011
2012 if (ret) {
2013 pr_err("%s: unsupported control: %s\n",
2014 __func__, kcontrol->id.name);
2015 } else {
2016 tdm_tx_cfg[port.mode][port.channel].channels =
2017 ucontrol->value.enumerated.item[0] + 1;
2018
2019 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2020 tdm_tx_cfg[port.mode][port.channel].channels,
2021 ucontrol->value.enumerated.item[0] + 1);
2022 }
2023 return ret;
2024}
2025
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002026static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
2027 struct snd_ctl_elem_value *ucontrol)
2028{
2029 int slot_index = 0;
2030 int interface = ucontrol->value.integer.value[0];
2031 int channel = ucontrol->value.integer.value[1];
2032 unsigned int offset_val = 0;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002033 unsigned int max_slot_offset = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002034 unsigned int *slot_offset = NULL;
2035 struct tdm_dev_config *config = NULL;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002036 struct msm_asoc_mach_data *pdata = NULL;
2037 struct snd_soc_component *component = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002038
2039 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
2040 pr_err("%s: incorrect interface = %d\n", __func__, interface);
2041 return -EINVAL;
2042 }
2043 if (channel < 0 || channel >= TDM_PORT_MAX) {
2044 pr_err("%s: incorrect channel = %d\n", __func__, channel);
2045 return -EINVAL;
2046 }
2047
2048 pr_debug("%s: interface = %d, channel = %d\n", __func__,
2049 interface, channel);
2050
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002051 component = snd_soc_kcontrol_component(kcontrol);
2052 pdata = snd_soc_card_get_drvdata(component->card);
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002053 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
2054 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002055 if (!config) {
2056 pr_err("%s: tdm config is NULL\n", __func__);
2057 return -EINVAL;
2058 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002059
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002060 slot_offset = config->tdm_slot_offset;
2061 if (!slot_offset) {
2062 pr_err("%s: slot offset is NULL\n", __func__);
2063 return -EINVAL;
2064 }
2065
2066 max_slot_offset = TDM_SLOT_WIDTH_BYTES * (pdata->tdm_max_slots - 1);
2067
2068 for (slot_index = 0; slot_index < pdata->tdm_max_slots; slot_index++) {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002069 offset_val = ucontrol->value.integer.value[MAX_PATH +
2070 slot_index];
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08002071 /* Offset value can only be 0, 4, 8, .. */
2072 if (offset_val % 4 == 0 && offset_val <= max_slot_offset)
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07002073 slot_offset[slot_index] = offset_val;
2074 pr_debug("%s: slot offset[%d] = %d\n", __func__,
2075 slot_index, slot_offset[slot_index]);
2076 }
2077
2078 return 0;
2079}
2080
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002081static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2082{
2083 int idx = 0;
2084
2085 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2086 sizeof("PRIM_AUX_PCM"))) {
2087 idx = PRIM_AUX_PCM;
2088 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2089 sizeof("SEC_AUX_PCM"))) {
2090 idx = SEC_AUX_PCM;
2091 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2092 sizeof("TERT_AUX_PCM"))) {
2093 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002094 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2095 sizeof("QUAT_AUX_PCM"))) {
2096 idx = QUAT_AUX_PCM;
2097 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2098 sizeof("QUIN_AUX_PCM"))) {
2099 idx = QUIN_AUX_PCM;
2100 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2101 sizeof("SEN_AUX_PCM"))) {
2102 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002103 } else {
2104 pr_err("%s: unsupported port: %s\n",
2105 __func__, kcontrol->id.name);
2106 idx = -EINVAL;
2107 }
2108
2109 return idx;
2110}
2111
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002112static int aux_pcm_get_sample_rate(int value)
2113{
2114 int sample_rate = 0;
2115
2116 switch (value) {
2117 case 1:
2118 sample_rate = SAMPLING_RATE_16KHZ;
2119 break;
2120 case 0:
2121 default:
2122 sample_rate = SAMPLING_RATE_8KHZ;
2123 break;
2124 }
2125 return sample_rate;
2126}
2127
2128static int aux_pcm_get_sample_rate_val(int sample_rate)
2129{
2130 int sample_rate_val = 0;
2131
2132 switch (sample_rate) {
2133 case SAMPLING_RATE_16KHZ:
2134 sample_rate_val = 1;
2135 break;
2136 case SAMPLING_RATE_8KHZ:
2137 default:
2138 sample_rate_val = 0;
2139 break;
2140 }
2141 return sample_rate_val;
2142}
2143
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002144static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002145{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002146 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002147
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002148 switch (value) {
2149 case 0:
2150 format = SNDRV_PCM_FORMAT_S16_LE;
2151 break;
2152 case 1:
2153 format = SNDRV_PCM_FORMAT_S24_LE;
2154 break;
2155 case 2:
2156 format = SNDRV_PCM_FORMAT_S24_3LE;
2157 break;
2158 case 3:
2159 format = SNDRV_PCM_FORMAT_S32_LE;
2160 break;
2161 default:
2162 format = SNDRV_PCM_FORMAT_S16_LE;
2163 break;
2164 }
2165 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002166}
2167
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002168static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002169{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002170 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002171
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002172 switch (format) {
2173 case SNDRV_PCM_FORMAT_S16_LE:
2174 value = 0;
2175 break;
2176 case SNDRV_PCM_FORMAT_S24_LE:
2177 value = 1;
2178 break;
2179 case SNDRV_PCM_FORMAT_S24_3LE:
2180 value = 2;
2181 break;
2182 case SNDRV_PCM_FORMAT_S32_LE:
2183 value = 3;
2184 break;
2185 default:
2186 value = 0;
2187 break;
2188 }
2189 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002190}
2191
2192static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2193 struct snd_ctl_elem_value *ucontrol)
2194{
2195 int idx = aux_pcm_get_port_idx(kcontrol);
2196
2197 if (idx < 0)
2198 return idx;
2199
2200 ucontrol->value.enumerated.item[0] =
2201 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2202
2203 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2204 idx, aux_pcm_rx_cfg[idx].sample_rate,
2205 ucontrol->value.enumerated.item[0]);
2206
2207 return 0;
2208}
2209
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002210static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002211 struct snd_ctl_elem_value *ucontrol)
2212{
2213 int idx = aux_pcm_get_port_idx(kcontrol);
2214
2215 if (idx < 0)
2216 return idx;
2217
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002218 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002219 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2220
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002221 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2222 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002223 ucontrol->value.enumerated.item[0]);
2224
2225 return 0;
2226}
2227
2228static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2229 struct snd_ctl_elem_value *ucontrol)
2230{
2231 int idx = aux_pcm_get_port_idx(kcontrol);
2232
2233 if (idx < 0)
2234 return idx;
2235
2236 ucontrol->value.enumerated.item[0] =
2237 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2238
2239 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2240 idx, aux_pcm_tx_cfg[idx].sample_rate,
2241 ucontrol->value.enumerated.item[0]);
2242
2243 return 0;
2244}
2245
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002246static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2247 struct snd_ctl_elem_value *ucontrol)
2248{
2249 int idx = aux_pcm_get_port_idx(kcontrol);
2250
2251 if (idx < 0)
2252 return idx;
2253
2254 aux_pcm_tx_cfg[idx].sample_rate =
2255 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2256
2257 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2258 idx, aux_pcm_tx_cfg[idx].sample_rate,
2259 ucontrol->value.enumerated.item[0]);
2260
2261 return 0;
2262}
2263
2264static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2265 struct snd_ctl_elem_value *ucontrol)
2266{
2267 int idx = aux_pcm_get_port_idx(kcontrol);
2268
2269 if (idx < 0)
2270 return idx;
2271
2272 ucontrol->value.enumerated.item[0] =
2273 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2274
2275 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2276 idx, aux_pcm_rx_cfg[idx].bit_format,
2277 ucontrol->value.enumerated.item[0]);
2278
2279 return 0;
2280}
2281
2282static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2283 struct snd_ctl_elem_value *ucontrol)
2284{
2285 int idx = aux_pcm_get_port_idx(kcontrol);
2286
2287 if (idx < 0)
2288 return idx;
2289
2290 aux_pcm_rx_cfg[idx].bit_format =
2291 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2292
2293 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2294 idx, aux_pcm_rx_cfg[idx].bit_format,
2295 ucontrol->value.enumerated.item[0]);
2296
2297 return 0;
2298}
2299
2300static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2301 struct snd_ctl_elem_value *ucontrol)
2302{
2303 int idx = aux_pcm_get_port_idx(kcontrol);
2304
2305 if (idx < 0)
2306 return idx;
2307
2308 ucontrol->value.enumerated.item[0] =
2309 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2310
2311 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2312 idx, aux_pcm_tx_cfg[idx].bit_format,
2313 ucontrol->value.enumerated.item[0]);
2314
2315 return 0;
2316}
2317
2318static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2319 struct snd_ctl_elem_value *ucontrol)
2320{
2321 int idx = aux_pcm_get_port_idx(kcontrol);
2322
2323 if (idx < 0)
2324 return idx;
2325
2326 aux_pcm_tx_cfg[idx].bit_format =
2327 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2328
2329 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2330 idx, aux_pcm_tx_cfg[idx].bit_format,
2331 ucontrol->value.enumerated.item[0]);
2332
2333 return 0;
2334}
2335
2336static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2337{
2338 int idx = 0;
2339
2340 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2341 sizeof("PRIM_MI2S_RX"))) {
2342 idx = PRIM_MI2S;
2343 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2344 sizeof("SEC_MI2S_RX"))) {
2345 idx = SEC_MI2S;
2346 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2347 sizeof("TERT_MI2S_RX"))) {
2348 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002349 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2350 sizeof("QUAT_MI2S_RX"))) {
2351 idx = QUAT_MI2S;
2352 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2353 sizeof("QUIN_MI2S_RX"))) {
2354 idx = QUIN_MI2S;
2355 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2356 sizeof("SEN_MI2S_RX"))) {
2357 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002358 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2359 sizeof("PRIM_MI2S_TX"))) {
2360 idx = PRIM_MI2S;
2361 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2362 sizeof("SEC_MI2S_TX"))) {
2363 idx = SEC_MI2S;
2364 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2365 sizeof("TERT_MI2S_TX"))) {
2366 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002367 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2368 sizeof("QUAT_MI2S_TX"))) {
2369 idx = QUAT_MI2S;
2370 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2371 sizeof("QUIN_MI2S_TX"))) {
2372 idx = QUIN_MI2S;
2373 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2374 sizeof("SEN_MI2S_TX"))) {
2375 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002376 } else {
2377 pr_err("%s: unsupported channel: %s\n",
2378 __func__, kcontrol->id.name);
2379 idx = -EINVAL;
2380 }
2381
2382 return idx;
2383}
2384
2385static int mi2s_get_sample_rate(int value)
2386{
2387 int sample_rate = 0;
2388
2389 switch (value) {
2390 case 0:
2391 sample_rate = SAMPLING_RATE_8KHZ;
2392 break;
2393 case 1:
2394 sample_rate = SAMPLING_RATE_11P025KHZ;
2395 break;
2396 case 2:
2397 sample_rate = SAMPLING_RATE_16KHZ;
2398 break;
2399 case 3:
2400 sample_rate = SAMPLING_RATE_22P05KHZ;
2401 break;
2402 case 4:
2403 sample_rate = SAMPLING_RATE_32KHZ;
2404 break;
2405 case 5:
2406 sample_rate = SAMPLING_RATE_44P1KHZ;
2407 break;
2408 case 6:
2409 sample_rate = SAMPLING_RATE_48KHZ;
2410 break;
2411 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002412 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002413 break;
2414 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002415 sample_rate = SAMPLING_RATE_96KHZ;
2416 break;
2417 case 9:
2418 sample_rate = SAMPLING_RATE_176P4KHZ;
2419 break;
2420 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002421 sample_rate = SAMPLING_RATE_192KHZ;
2422 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002423 case 11:
2424 sample_rate = SAMPLING_RATE_352P8KHZ;
2425 break;
2426 case 12:
2427 sample_rate = SAMPLING_RATE_384KHZ;
2428 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002429 default:
2430 sample_rate = SAMPLING_RATE_48KHZ;
2431 break;
2432 }
2433 return sample_rate;
2434}
2435
2436static int mi2s_get_sample_rate_val(int sample_rate)
2437{
2438 int sample_rate_val = 0;
2439
2440 switch (sample_rate) {
2441 case SAMPLING_RATE_8KHZ:
2442 sample_rate_val = 0;
2443 break;
2444 case SAMPLING_RATE_11P025KHZ:
2445 sample_rate_val = 1;
2446 break;
2447 case SAMPLING_RATE_16KHZ:
2448 sample_rate_val = 2;
2449 break;
2450 case SAMPLING_RATE_22P05KHZ:
2451 sample_rate_val = 3;
2452 break;
2453 case SAMPLING_RATE_32KHZ:
2454 sample_rate_val = 4;
2455 break;
2456 case SAMPLING_RATE_44P1KHZ:
2457 sample_rate_val = 5;
2458 break;
2459 case SAMPLING_RATE_48KHZ:
2460 sample_rate_val = 6;
2461 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002462 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002463 sample_rate_val = 7;
2464 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002465 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002466 sample_rate_val = 8;
2467 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07002468 case SAMPLING_RATE_176P4KHZ:
2469 sample_rate_val = 9;
2470 break;
2471 case SAMPLING_RATE_192KHZ:
2472 sample_rate_val = 10;
2473 break;
2474 case SAMPLING_RATE_352P8KHZ:
2475 sample_rate_val = 11;
2476 break;
2477 case SAMPLING_RATE_384KHZ:
2478 sample_rate_val = 12;
2479 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002480 default:
2481 sample_rate_val = 6;
2482 break;
2483 }
2484 return sample_rate_val;
2485}
2486
2487static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2488 struct snd_ctl_elem_value *ucontrol)
2489{
2490 int idx = mi2s_get_port_idx(kcontrol);
2491
2492 if (idx < 0)
2493 return idx;
2494
2495 ucontrol->value.enumerated.item[0] =
2496 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2497
2498 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2499 idx, mi2s_rx_cfg[idx].sample_rate,
2500 ucontrol->value.enumerated.item[0]);
2501
2502 return 0;
2503}
2504
2505static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2506 struct snd_ctl_elem_value *ucontrol)
2507{
2508 int idx = mi2s_get_port_idx(kcontrol);
2509
2510 if (idx < 0)
2511 return idx;
2512
2513 mi2s_rx_cfg[idx].sample_rate =
2514 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2515
2516 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2517 idx, mi2s_rx_cfg[idx].sample_rate,
2518 ucontrol->value.enumerated.item[0]);
2519
2520 return 0;
2521}
2522
2523static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2524 struct snd_ctl_elem_value *ucontrol)
2525{
2526 int idx = mi2s_get_port_idx(kcontrol);
2527
2528 if (idx < 0)
2529 return idx;
2530
2531 ucontrol->value.enumerated.item[0] =
2532 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2533
2534 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2535 idx, mi2s_tx_cfg[idx].sample_rate,
2536 ucontrol->value.enumerated.item[0]);
2537
2538 return 0;
2539}
2540
2541static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2542 struct snd_ctl_elem_value *ucontrol)
2543{
2544 int idx = mi2s_get_port_idx(kcontrol);
2545
2546 if (idx < 0)
2547 return idx;
2548
2549 mi2s_tx_cfg[idx].sample_rate =
2550 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2551
2552 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2553 idx, mi2s_tx_cfg[idx].sample_rate,
2554 ucontrol->value.enumerated.item[0]);
2555
2556 return 0;
2557}
2558
2559static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2560 struct snd_ctl_elem_value *ucontrol)
2561{
2562 int idx = mi2s_get_port_idx(kcontrol);
2563
2564 if (idx < 0)
2565 return idx;
2566
2567 ucontrol->value.enumerated.item[0] =
2568 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2569
2570 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2571 idx, mi2s_rx_cfg[idx].bit_format,
2572 ucontrol->value.enumerated.item[0]);
2573
2574 return 0;
2575}
2576
2577static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2578 struct snd_ctl_elem_value *ucontrol)
2579{
2580 int idx = mi2s_get_port_idx(kcontrol);
2581
2582 if (idx < 0)
2583 return idx;
2584
2585 mi2s_rx_cfg[idx].bit_format =
2586 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2587
2588 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2589 idx, mi2s_rx_cfg[idx].bit_format,
2590 ucontrol->value.enumerated.item[0]);
2591
2592 return 0;
2593}
2594
2595static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 int idx = mi2s_get_port_idx(kcontrol);
2599
2600 if (idx < 0)
2601 return idx;
2602
2603 ucontrol->value.enumerated.item[0] =
2604 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2605
2606 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2607 idx, mi2s_tx_cfg[idx].bit_format,
2608 ucontrol->value.enumerated.item[0]);
2609
2610 return 0;
2611}
2612
2613static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2614 struct snd_ctl_elem_value *ucontrol)
2615{
2616 int idx = mi2s_get_port_idx(kcontrol);
2617
2618 if (idx < 0)
2619 return idx;
2620
2621 mi2s_tx_cfg[idx].bit_format =
2622 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2623
2624 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2625 idx, mi2s_tx_cfg[idx].bit_format,
2626 ucontrol->value.enumerated.item[0]);
2627
2628 return 0;
2629}
2630static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2631 struct snd_ctl_elem_value *ucontrol)
2632{
2633 int idx = mi2s_get_port_idx(kcontrol);
2634
2635 if (idx < 0)
2636 return idx;
2637
2638 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2639 idx, mi2s_rx_cfg[idx].channels);
2640 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2641
2642 return 0;
2643}
2644
2645static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2646 struct snd_ctl_elem_value *ucontrol)
2647{
2648 int idx = mi2s_get_port_idx(kcontrol);
2649
2650 if (idx < 0)
2651 return idx;
2652
2653 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2654 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2655 idx, mi2s_rx_cfg[idx].channels);
2656
2657 return 1;
2658}
2659
2660static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2661 struct snd_ctl_elem_value *ucontrol)
2662{
2663 int idx = mi2s_get_port_idx(kcontrol);
2664
2665 if (idx < 0)
2666 return idx;
2667
2668 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2669 idx, mi2s_tx_cfg[idx].channels);
2670 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2671
2672 return 0;
2673}
2674
2675static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2676 struct snd_ctl_elem_value *ucontrol)
2677{
2678 int idx = mi2s_get_port_idx(kcontrol);
2679
2680 if (idx < 0)
2681 return idx;
2682
2683 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2684 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2685 idx, mi2s_tx_cfg[idx].channels);
2686
2687 return 1;
2688}
2689
2690static int msm_get_port_id(int be_id)
2691{
2692 int afe_port_id = 0;
2693
2694 switch (be_id) {
2695 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2696 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2697 break;
2698 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2699 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2700 break;
2701 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2702 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2703 break;
2704 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2705 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2706 break;
2707 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2708 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2709 break;
2710 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2711 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2712 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002713 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2714 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2715 break;
2716 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2717 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2718 break;
2719 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2720 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2721 break;
2722 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2723 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2724 break;
2725 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2726 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2727 break;
2728 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2729 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2730 break;
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05302731 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
2732 afe_port_id = AFE_PORT_ID_WSA_CODEC_DMA_RX_0;
2733 break;
2734 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
2735 afe_port_id = AFE_PORT_ID_WSA_CODEC_DMA_TX_0;
2736 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07002737 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2738 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2739 break;
2740 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2741 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2742 break;
2743 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2744 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2745 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002746 default:
2747 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2748 afe_port_id = -EINVAL;
2749 }
2750
2751 return afe_port_id;
2752}
2753
2754static u32 get_mi2s_bits_per_sample(u32 bit_format)
2755{
2756 u32 bit_per_sample = 0;
2757
2758 switch (bit_format) {
2759 case SNDRV_PCM_FORMAT_S32_LE:
2760 case SNDRV_PCM_FORMAT_S24_3LE:
2761 case SNDRV_PCM_FORMAT_S24_LE:
2762 bit_per_sample = 32;
2763 break;
2764 case SNDRV_PCM_FORMAT_S16_LE:
2765 default:
2766 bit_per_sample = 16;
2767 break;
2768 }
2769
2770 return bit_per_sample;
2771}
2772
2773static void update_mi2s_clk_val(int dai_id, int stream)
2774{
2775 u32 bit_per_sample = 0;
2776
2777 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2778 bit_per_sample =
2779 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2780 mi2s_clk[dai_id].clk_freq_in_hz =
2781 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2782 } else {
2783 bit_per_sample =
2784 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2785 mi2s_clk[dai_id].clk_freq_in_hz =
2786 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2787 }
2788}
2789
2790static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2791{
2792 int ret = 0;
2793 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2794 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2795 int port_id = 0;
2796 int index = cpu_dai->id;
2797
2798 port_id = msm_get_port_id(rtd->dai_link->id);
2799 if (port_id < 0) {
2800 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2801 ret = port_id;
2802 goto err;
2803 }
2804
2805 if (enable) {
2806 update_mi2s_clk_val(index, substream->stream);
2807 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2808 mi2s_clk[index].clk_freq_in_hz);
2809 }
2810
2811 mi2s_clk[index].enable = enable;
2812 ret = afe_set_lpass_clock_v2(port_id,
2813 &mi2s_clk[index]);
2814 if (ret < 0) {
2815 dev_err(rtd->card->dev,
2816 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2817 __func__, port_id, ret);
2818 goto err;
2819 }
2820
2821err:
2822 return ret;
2823}
2824
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002825static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2826{
2827 int idx = 0;
2828
2829 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2830 sizeof("WSA_CDC_DMA_RX_0")))
2831 idx = WSA_CDC_DMA_RX_0;
2832 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2833 sizeof("WSA_CDC_DMA_RX_0")))
2834 idx = WSA_CDC_DMA_RX_1;
2835 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2836 sizeof("RX_CDC_DMA_RX_0")))
2837 idx = RX_CDC_DMA_RX_0;
2838 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2839 sizeof("RX_CDC_DMA_RX_1")))
2840 idx = RX_CDC_DMA_RX_1;
2841 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2842 sizeof("RX_CDC_DMA_RX_2")))
2843 idx = RX_CDC_DMA_RX_2;
2844 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2845 sizeof("RX_CDC_DMA_RX_3")))
2846 idx = RX_CDC_DMA_RX_3;
2847 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2848 sizeof("RX_CDC_DMA_RX_5")))
2849 idx = RX_CDC_DMA_RX_5;
2850 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2851 sizeof("WSA_CDC_DMA_TX_0")))
2852 idx = WSA_CDC_DMA_TX_0;
2853 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2854 sizeof("WSA_CDC_DMA_TX_1")))
2855 idx = WSA_CDC_DMA_TX_1;
2856 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2857 sizeof("WSA_CDC_DMA_TX_2")))
2858 idx = WSA_CDC_DMA_TX_2;
2859 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2860 sizeof("TX_CDC_DMA_TX_0")))
2861 idx = TX_CDC_DMA_TX_0;
2862 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2863 sizeof("TX_CDC_DMA_TX_3")))
2864 idx = TX_CDC_DMA_TX_3;
2865 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2866 sizeof("TX_CDC_DMA_TX_4")))
2867 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08002868 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2869 sizeof("VA_CDC_DMA_TX_0")))
2870 idx = VA_CDC_DMA_TX_0;
2871 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2872 sizeof("VA_CDC_DMA_TX_1")))
2873 idx = VA_CDC_DMA_TX_1;
2874 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2875 sizeof("VA_CDC_DMA_TX_2")))
2876 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002877 else {
2878 pr_err("%s: unsupported channel: %s\n",
2879 __func__, kcontrol->id.name);
2880 return -EINVAL;
2881 }
2882
2883 return idx;
2884}
2885
2886static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2887 struct snd_ctl_elem_value *ucontrol)
2888{
2889 int ch_num = cdc_dma_get_port_idx(kcontrol);
2890
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002891 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002892 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2893 return ch_num;
2894 }
2895
2896 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2897 cdc_dma_rx_cfg[ch_num].channels - 1);
2898 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2899 return 0;
2900}
2901
2902static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2903 struct snd_ctl_elem_value *ucontrol)
2904{
2905 int ch_num = cdc_dma_get_port_idx(kcontrol);
2906
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002907 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002908 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2909 return ch_num;
2910 }
2911
2912 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2913
2914 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2915 cdc_dma_rx_cfg[ch_num].channels);
2916 return 1;
2917}
2918
2919static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2920 struct snd_ctl_elem_value *ucontrol)
2921{
2922 int ch_num = cdc_dma_get_port_idx(kcontrol);
2923
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002924 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002925 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2926 return ch_num;
2927 }
2928
2929 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2930 case SNDRV_PCM_FORMAT_S32_LE:
2931 ucontrol->value.integer.value[0] = 3;
2932 break;
2933 case SNDRV_PCM_FORMAT_S24_3LE:
2934 ucontrol->value.integer.value[0] = 2;
2935 break;
2936 case SNDRV_PCM_FORMAT_S24_LE:
2937 ucontrol->value.integer.value[0] = 1;
2938 break;
2939 case SNDRV_PCM_FORMAT_S16_LE:
2940 default:
2941 ucontrol->value.integer.value[0] = 0;
2942 break;
2943 }
2944
2945 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2946 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2947 ucontrol->value.integer.value[0]);
2948 return 0;
2949}
2950
2951static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2952 struct snd_ctl_elem_value *ucontrol)
2953{
2954 int rc = 0;
2955 int ch_num = cdc_dma_get_port_idx(kcontrol);
2956
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002957 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002958 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2959 return ch_num;
2960 }
2961
2962 switch (ucontrol->value.integer.value[0]) {
2963 case 3:
2964 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2965 break;
2966 case 2:
2967 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2968 break;
2969 case 1:
2970 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2971 break;
2972 case 0:
2973 default:
2974 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2975 break;
2976 }
2977 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2978 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2979 ucontrol->value.integer.value[0]);
2980
2981 return rc;
2982}
2983
2984
2985static int cdc_dma_get_sample_rate_val(int sample_rate)
2986{
2987 int sample_rate_val = 0;
2988
2989 switch (sample_rate) {
2990 case SAMPLING_RATE_8KHZ:
2991 sample_rate_val = 0;
2992 break;
2993 case SAMPLING_RATE_11P025KHZ:
2994 sample_rate_val = 1;
2995 break;
2996 case SAMPLING_RATE_16KHZ:
2997 sample_rate_val = 2;
2998 break;
2999 case SAMPLING_RATE_22P05KHZ:
3000 sample_rate_val = 3;
3001 break;
3002 case SAMPLING_RATE_32KHZ:
3003 sample_rate_val = 4;
3004 break;
3005 case SAMPLING_RATE_44P1KHZ:
3006 sample_rate_val = 5;
3007 break;
3008 case SAMPLING_RATE_48KHZ:
3009 sample_rate_val = 6;
3010 break;
3011 case SAMPLING_RATE_88P2KHZ:
3012 sample_rate_val = 7;
3013 break;
3014 case SAMPLING_RATE_96KHZ:
3015 sample_rate_val = 8;
3016 break;
3017 case SAMPLING_RATE_176P4KHZ:
3018 sample_rate_val = 9;
3019 break;
3020 case SAMPLING_RATE_192KHZ:
3021 sample_rate_val = 10;
3022 break;
3023 case SAMPLING_RATE_352P8KHZ:
3024 sample_rate_val = 11;
3025 break;
3026 case SAMPLING_RATE_384KHZ:
3027 sample_rate_val = 12;
3028 break;
3029 default:
3030 sample_rate_val = 6;
3031 break;
3032 }
3033 return sample_rate_val;
3034}
3035
3036static int cdc_dma_get_sample_rate(int value)
3037{
3038 int sample_rate = 0;
3039
3040 switch (value) {
3041 case 0:
3042 sample_rate = SAMPLING_RATE_8KHZ;
3043 break;
3044 case 1:
3045 sample_rate = SAMPLING_RATE_11P025KHZ;
3046 break;
3047 case 2:
3048 sample_rate = SAMPLING_RATE_16KHZ;
3049 break;
3050 case 3:
3051 sample_rate = SAMPLING_RATE_22P05KHZ;
3052 break;
3053 case 4:
3054 sample_rate = SAMPLING_RATE_32KHZ;
3055 break;
3056 case 5:
3057 sample_rate = SAMPLING_RATE_44P1KHZ;
3058 break;
3059 case 6:
3060 sample_rate = SAMPLING_RATE_48KHZ;
3061 break;
3062 case 7:
3063 sample_rate = SAMPLING_RATE_88P2KHZ;
3064 break;
3065 case 8:
3066 sample_rate = SAMPLING_RATE_96KHZ;
3067 break;
3068 case 9:
3069 sample_rate = SAMPLING_RATE_176P4KHZ;
3070 break;
3071 case 10:
3072 sample_rate = SAMPLING_RATE_192KHZ;
3073 break;
3074 case 11:
3075 sample_rate = SAMPLING_RATE_352P8KHZ;
3076 break;
3077 case 12:
3078 sample_rate = SAMPLING_RATE_384KHZ;
3079 break;
3080 default:
3081 sample_rate = SAMPLING_RATE_48KHZ;
3082 break;
3083 }
3084 return sample_rate;
3085}
3086
3087static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3088 struct snd_ctl_elem_value *ucontrol)
3089{
3090 int ch_num = cdc_dma_get_port_idx(kcontrol);
3091
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003092 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003093 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3094 return ch_num;
3095 }
3096
3097 ucontrol->value.enumerated.item[0] =
3098 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3099
3100 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3101 cdc_dma_rx_cfg[ch_num].sample_rate);
3102 return 0;
3103}
3104
3105static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3106 struct snd_ctl_elem_value *ucontrol)
3107{
3108 int ch_num = cdc_dma_get_port_idx(kcontrol);
3109
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07003110 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003111 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3112 return ch_num;
3113 }
3114
3115 cdc_dma_rx_cfg[ch_num].sample_rate =
3116 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3117
3118
3119 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3120 __func__, ucontrol->value.enumerated.item[0],
3121 cdc_dma_rx_cfg[ch_num].sample_rate);
3122 return 0;
3123}
3124
3125static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3126 struct snd_ctl_elem_value *ucontrol)
3127{
3128 int ch_num = cdc_dma_get_port_idx(kcontrol);
3129
3130 if (ch_num < 0) {
3131 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3132 return ch_num;
3133 }
3134
3135 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3136 cdc_dma_tx_cfg[ch_num].channels);
3137 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3138 return 0;
3139}
3140
3141static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3142 struct snd_ctl_elem_value *ucontrol)
3143{
3144 int ch_num = cdc_dma_get_port_idx(kcontrol);
3145
3146 if (ch_num < 0) {
3147 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3148 return ch_num;
3149 }
3150
3151 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3152
3153 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3154 cdc_dma_tx_cfg[ch_num].channels);
3155 return 1;
3156}
3157
3158static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3159 struct snd_ctl_elem_value *ucontrol)
3160{
3161 int sample_rate_val;
3162 int ch_num = cdc_dma_get_port_idx(kcontrol);
3163
3164 if (ch_num < 0) {
3165 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3166 return ch_num;
3167 }
3168
3169 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3170 case SAMPLING_RATE_384KHZ:
3171 sample_rate_val = 12;
3172 break;
3173 case SAMPLING_RATE_352P8KHZ:
3174 sample_rate_val = 11;
3175 break;
3176 case SAMPLING_RATE_192KHZ:
3177 sample_rate_val = 10;
3178 break;
3179 case SAMPLING_RATE_176P4KHZ:
3180 sample_rate_val = 9;
3181 break;
3182 case SAMPLING_RATE_96KHZ:
3183 sample_rate_val = 8;
3184 break;
3185 case SAMPLING_RATE_88P2KHZ:
3186 sample_rate_val = 7;
3187 break;
3188 case SAMPLING_RATE_48KHZ:
3189 sample_rate_val = 6;
3190 break;
3191 case SAMPLING_RATE_44P1KHZ:
3192 sample_rate_val = 5;
3193 break;
3194 case SAMPLING_RATE_32KHZ:
3195 sample_rate_val = 4;
3196 break;
3197 case SAMPLING_RATE_22P05KHZ:
3198 sample_rate_val = 3;
3199 break;
3200 case SAMPLING_RATE_16KHZ:
3201 sample_rate_val = 2;
3202 break;
3203 case SAMPLING_RATE_11P025KHZ:
3204 sample_rate_val = 1;
3205 break;
3206 case SAMPLING_RATE_8KHZ:
3207 sample_rate_val = 0;
3208 break;
3209 default:
3210 sample_rate_val = 6;
3211 break;
3212 }
3213
3214 ucontrol->value.integer.value[0] = sample_rate_val;
3215 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3216 cdc_dma_tx_cfg[ch_num].sample_rate);
3217 return 0;
3218}
3219
3220static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3221 struct snd_ctl_elem_value *ucontrol)
3222{
3223 int ch_num = cdc_dma_get_port_idx(kcontrol);
3224
3225 if (ch_num < 0) {
3226 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3227 return ch_num;
3228 }
3229
3230 switch (ucontrol->value.integer.value[0]) {
3231 case 12:
3232 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3233 break;
3234 case 11:
3235 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3236 break;
3237 case 10:
3238 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3239 break;
3240 case 9:
3241 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3242 break;
3243 case 8:
3244 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3245 break;
3246 case 7:
3247 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3248 break;
3249 case 6:
3250 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3251 break;
3252 case 5:
3253 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3254 break;
3255 case 4:
3256 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3257 break;
3258 case 3:
3259 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3260 break;
3261 case 2:
3262 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3263 break;
3264 case 1:
3265 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3266 break;
3267 case 0:
3268 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3269 break;
3270 default:
3271 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3272 break;
3273 }
3274
3275 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3276 __func__, ucontrol->value.integer.value[0],
3277 cdc_dma_tx_cfg[ch_num].sample_rate);
3278 return 0;
3279}
3280
3281static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3282 struct snd_ctl_elem_value *ucontrol)
3283{
3284 int ch_num = cdc_dma_get_port_idx(kcontrol);
3285
3286 if (ch_num < 0) {
3287 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3288 return ch_num;
3289 }
3290
3291 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3292 case SNDRV_PCM_FORMAT_S32_LE:
3293 ucontrol->value.integer.value[0] = 3;
3294 break;
3295 case SNDRV_PCM_FORMAT_S24_3LE:
3296 ucontrol->value.integer.value[0] = 2;
3297 break;
3298 case SNDRV_PCM_FORMAT_S24_LE:
3299 ucontrol->value.integer.value[0] = 1;
3300 break;
3301 case SNDRV_PCM_FORMAT_S16_LE:
3302 default:
3303 ucontrol->value.integer.value[0] = 0;
3304 break;
3305 }
3306
3307 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3308 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3309 ucontrol->value.integer.value[0]);
3310 return 0;
3311}
3312
3313static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3314 struct snd_ctl_elem_value *ucontrol)
3315{
3316 int rc = 0;
3317 int ch_num = cdc_dma_get_port_idx(kcontrol);
3318
3319 if (ch_num < 0) {
3320 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3321 return ch_num;
3322 }
3323
3324 switch (ucontrol->value.integer.value[0]) {
3325 case 3:
3326 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3327 break;
3328 case 2:
3329 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3330 break;
3331 case 1:
3332 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3333 break;
3334 case 0:
3335 default:
3336 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3337 break;
3338 }
3339 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3340 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3341 ucontrol->value.integer.value[0]);
3342
3343 return rc;
3344}
3345
3346static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3347{
3348 int idx = 0;
3349
3350 switch (be_id) {
3351 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3352 idx = WSA_CDC_DMA_RX_0;
3353 break;
3354 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3355 idx = WSA_CDC_DMA_TX_0;
3356 break;
3357 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3358 idx = WSA_CDC_DMA_RX_1;
3359 break;
3360 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3361 idx = WSA_CDC_DMA_TX_1;
3362 break;
3363 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3364 idx = WSA_CDC_DMA_TX_2;
3365 break;
3366 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3367 idx = RX_CDC_DMA_RX_0;
3368 break;
3369 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3370 idx = RX_CDC_DMA_RX_1;
3371 break;
3372 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3373 idx = RX_CDC_DMA_RX_2;
3374 break;
3375 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3376 idx = RX_CDC_DMA_RX_3;
3377 break;
3378 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3379 idx = RX_CDC_DMA_RX_5;
3380 break;
3381 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3382 idx = TX_CDC_DMA_TX_0;
3383 break;
3384 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3385 idx = TX_CDC_DMA_TX_3;
3386 break;
3387 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3388 idx = TX_CDC_DMA_TX_4;
3389 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003390 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3391 idx = VA_CDC_DMA_TX_0;
3392 break;
3393 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3394 idx = VA_CDC_DMA_TX_1;
3395 break;
3396 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3397 idx = VA_CDC_DMA_TX_2;
3398 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003399 default:
3400 idx = RX_CDC_DMA_RX_0;
3401 break;
3402 }
3403
3404 return idx;
3405}
3406
Banajit Goswami83a370d2019-03-05 16:15:21 -08003407static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3408 struct snd_ctl_elem_value *ucontrol)
3409{
3410 /*
3411 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3412 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3413 * value.
3414 */
3415 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3416 case SAMPLING_RATE_96KHZ:
3417 ucontrol->value.integer.value[0] = 5;
3418 break;
3419 case SAMPLING_RATE_88P2KHZ:
3420 ucontrol->value.integer.value[0] = 4;
3421 break;
3422 case SAMPLING_RATE_48KHZ:
3423 ucontrol->value.integer.value[0] = 3;
3424 break;
3425 case SAMPLING_RATE_44P1KHZ:
3426 ucontrol->value.integer.value[0] = 2;
3427 break;
3428 case SAMPLING_RATE_16KHZ:
3429 ucontrol->value.integer.value[0] = 1;
3430 break;
3431 case SAMPLING_RATE_8KHZ:
3432 default:
3433 ucontrol->value.integer.value[0] = 0;
3434 break;
3435 }
3436 pr_debug("%s: sample rate = %d\n", __func__,
3437 slim_rx_cfg[SLIM_RX_7].sample_rate);
3438
3439 return 0;
3440}
3441
3442static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3443 struct snd_ctl_elem_value *ucontrol)
3444{
3445 switch (ucontrol->value.integer.value[0]) {
3446 case 1:
3447 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3448 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3449 break;
3450 case 2:
3451 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3452 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3453 break;
3454 case 3:
3455 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3456 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3457 break;
3458 case 4:
3459 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3460 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3461 break;
3462 case 5:
3463 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3464 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3465 break;
3466 case 0:
3467 default:
3468 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3469 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3470 break;
3471 }
3472 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3473 __func__,
3474 slim_rx_cfg[SLIM_RX_7].sample_rate,
3475 slim_tx_cfg[SLIM_TX_7].sample_rate,
3476 ucontrol->value.enumerated.item[0]);
3477
3478 return 0;
3479}
3480
3481static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3482 struct snd_ctl_elem_value *ucontrol)
3483{
3484 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3485 case SAMPLING_RATE_96KHZ:
3486 ucontrol->value.integer.value[0] = 5;
3487 break;
3488 case SAMPLING_RATE_88P2KHZ:
3489 ucontrol->value.integer.value[0] = 4;
3490 break;
3491 case SAMPLING_RATE_48KHZ:
3492 ucontrol->value.integer.value[0] = 3;
3493 break;
3494 case SAMPLING_RATE_44P1KHZ:
3495 ucontrol->value.integer.value[0] = 2;
3496 break;
3497 case SAMPLING_RATE_16KHZ:
3498 ucontrol->value.integer.value[0] = 1;
3499 break;
3500 case SAMPLING_RATE_8KHZ:
3501 default:
3502 ucontrol->value.integer.value[0] = 0;
3503 break;
3504 }
3505 pr_debug("%s: sample rate rx = %d\n", __func__,
3506 slim_rx_cfg[SLIM_RX_7].sample_rate);
3507
3508 return 0;
3509}
3510
3511static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3512 struct snd_ctl_elem_value *ucontrol)
3513{
3514 switch (ucontrol->value.integer.value[0]) {
3515 case 1:
3516 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3517 break;
3518 case 2:
3519 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3520 break;
3521 case 3:
3522 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3523 break;
3524 case 4:
3525 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3526 break;
3527 case 5:
3528 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3529 break;
3530 case 0:
3531 default:
3532 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3533 break;
3534 }
3535 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3536 __func__,
3537 slim_rx_cfg[SLIM_RX_7].sample_rate,
3538 ucontrol->value.enumerated.item[0]);
3539
3540 return 0;
3541}
3542
3543static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3544 struct snd_ctl_elem_value *ucontrol)
3545{
3546 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3547 case SAMPLING_RATE_96KHZ:
3548 ucontrol->value.integer.value[0] = 5;
3549 break;
3550 case SAMPLING_RATE_88P2KHZ:
3551 ucontrol->value.integer.value[0] = 4;
3552 break;
3553 case SAMPLING_RATE_48KHZ:
3554 ucontrol->value.integer.value[0] = 3;
3555 break;
3556 case SAMPLING_RATE_44P1KHZ:
3557 ucontrol->value.integer.value[0] = 2;
3558 break;
3559 case SAMPLING_RATE_16KHZ:
3560 ucontrol->value.integer.value[0] = 1;
3561 break;
3562 case SAMPLING_RATE_8KHZ:
3563 default:
3564 ucontrol->value.integer.value[0] = 0;
3565 break;
3566 }
3567 pr_debug("%s: sample rate tx = %d\n", __func__,
3568 slim_tx_cfg[SLIM_TX_7].sample_rate);
3569
3570 return 0;
3571}
3572
3573static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3574 struct snd_ctl_elem_value *ucontrol)
3575{
3576 switch (ucontrol->value.integer.value[0]) {
3577 case 1:
3578 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3579 break;
3580 case 2:
3581 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3582 break;
3583 case 3:
3584 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3585 break;
3586 case 4:
3587 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3588 break;
3589 case 5:
3590 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3591 break;
3592 case 0:
3593 default:
3594 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3595 break;
3596 }
3597 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3598 __func__,
3599 slim_tx_cfg[SLIM_TX_7].sample_rate,
3600 ucontrol->value.enumerated.item[0]);
3601
3602 return 0;
3603}
3604
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003605static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3606 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3607 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3608 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3609 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3610 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3611 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3612 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3613 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3614 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3615 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3616 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3617 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3618 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3619 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3620 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3621 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3622 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3623 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3624 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3625 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3626 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3627 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3628 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3629 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3630 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3631 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003632 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3633 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3634 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3635 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3636 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3637 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003638 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3639 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3640 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3641 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003642 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3643 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3644 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3645 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3646 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3647 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3648 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3649 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3650 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3651 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003652 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3653 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3654 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3655 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3656 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3657 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003658 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3659 wsa_cdc_dma_rx_0_sample_rate,
3660 cdc_dma_rx_sample_rate_get,
3661 cdc_dma_rx_sample_rate_put),
3662 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3663 wsa_cdc_dma_rx_1_sample_rate,
3664 cdc_dma_rx_sample_rate_get,
3665 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003666 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3667 wsa_cdc_dma_tx_0_sample_rate,
3668 cdc_dma_tx_sample_rate_get,
3669 cdc_dma_tx_sample_rate_put),
3670 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3671 wsa_cdc_dma_tx_1_sample_rate,
3672 cdc_dma_tx_sample_rate_get,
3673 cdc_dma_tx_sample_rate_put),
3674 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3675 wsa_cdc_dma_tx_2_sample_rate,
3676 cdc_dma_tx_sample_rate_get,
3677 cdc_dma_tx_sample_rate_put),
3678 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3679 tx_cdc_dma_tx_0_sample_rate,
3680 cdc_dma_tx_sample_rate_get,
3681 cdc_dma_tx_sample_rate_put),
3682 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3683 tx_cdc_dma_tx_3_sample_rate,
3684 cdc_dma_tx_sample_rate_get,
3685 cdc_dma_tx_sample_rate_put),
3686 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3687 tx_cdc_dma_tx_4_sample_rate,
3688 cdc_dma_tx_sample_rate_get,
3689 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003690 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3691 va_cdc_dma_tx_0_sample_rate,
3692 cdc_dma_tx_sample_rate_get,
3693 cdc_dma_tx_sample_rate_put),
3694 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3695 va_cdc_dma_tx_1_sample_rate,
3696 cdc_dma_tx_sample_rate_get,
3697 cdc_dma_tx_sample_rate_put),
3698 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3699 va_cdc_dma_tx_2_sample_rate,
3700 cdc_dma_tx_sample_rate_get,
3701 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003702};
3703
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07003704static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3705 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3706 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3707 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3708 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3709 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3710 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3711 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3712 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3713 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3714 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3715 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3716 rx_cdc80_dma_rx_0_sample_rate,
3717 cdc_dma_rx_sample_rate_get,
3718 cdc_dma_rx_sample_rate_put),
3719 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3720 rx_cdc80_dma_rx_1_sample_rate,
3721 cdc_dma_rx_sample_rate_get,
3722 cdc_dma_rx_sample_rate_put),
3723 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3724 rx_cdc80_dma_rx_2_sample_rate,
3725 cdc_dma_rx_sample_rate_get,
3726 cdc_dma_rx_sample_rate_put),
3727 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3728 rx_cdc80_dma_rx_3_sample_rate,
3729 cdc_dma_rx_sample_rate_get,
3730 cdc_dma_rx_sample_rate_put),
3731 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3732 rx_cdc80_dma_rx_5_sample_rate,
3733 cdc_dma_rx_sample_rate_get,
3734 cdc_dma_rx_sample_rate_put),
3735};
3736
3737static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3738 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3739 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3740 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3741 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3742 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3743 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3744 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3745 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3746 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3747 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3748 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3749 rx_cdc85_dma_rx_0_sample_rate,
3750 cdc_dma_rx_sample_rate_get,
3751 cdc_dma_rx_sample_rate_put),
3752 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3753 rx_cdc85_dma_rx_1_sample_rate,
3754 cdc_dma_rx_sample_rate_get,
3755 cdc_dma_rx_sample_rate_put),
3756 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3757 rx_cdc85_dma_rx_2_sample_rate,
3758 cdc_dma_rx_sample_rate_get,
3759 cdc_dma_rx_sample_rate_put),
3760 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3761 rx_cdc85_dma_rx_3_sample_rate,
3762 cdc_dma_rx_sample_rate_get,
3763 cdc_dma_rx_sample_rate_put),
3764 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3765 rx_cdc85_dma_rx_5_sample_rate,
3766 cdc_dma_rx_sample_rate_get,
3767 cdc_dma_rx_sample_rate_put),
3768};
3769
Kunlei Zhangf61a2312020-02-11 15:37:03 +08003770static const struct snd_kcontrol_new msm_int_wcd937x_snd_controls[] = {
3771 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3772 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3773 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3774 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3775 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3776 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3777 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3778 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3779 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3780 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3781 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3782 rx_cdc_dma_rx_0_sample_rate,
3783 cdc_dma_rx_sample_rate_get,
3784 cdc_dma_rx_sample_rate_put),
3785 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3786 rx_cdc_dma_rx_1_sample_rate,
3787 cdc_dma_rx_sample_rate_get,
3788 cdc_dma_rx_sample_rate_put),
3789 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3790 rx_cdc_dma_rx_2_sample_rate,
3791 cdc_dma_rx_sample_rate_get,
3792 cdc_dma_rx_sample_rate_put),
3793 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3794 rx_cdc_dma_rx_3_sample_rate,
3795 cdc_dma_rx_sample_rate_get,
3796 cdc_dma_rx_sample_rate_put),
3797 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3798 rx_cdc_dma_rx_5_sample_rate,
3799 cdc_dma_rx_sample_rate_get,
3800 cdc_dma_rx_sample_rate_put),
3801};
3802
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003803static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3804 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3805 usb_audio_rx_sample_rate_get,
3806 usb_audio_rx_sample_rate_put),
3807 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3808 usb_audio_tx_sample_rate_get,
3809 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303810 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3811 usb_audio_rx_format_get, usb_audio_rx_format_put),
3812 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3813 usb_audio_tx_format_get, usb_audio_tx_format_put),
3814 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3815 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3816 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3817 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3818 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3819 proxy_rx_ch_get, proxy_rx_ch_put),
3820 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3821 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3822 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3823 ext_disp_rx_format_get, ext_disp_rx_format_put),
3824 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3825 ext_disp_rx_sample_rate_get,
3826 ext_disp_rx_sample_rate_put),
3827 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3828 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3829 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3830 ext_disp_rx_format_get, ext_disp_rx_format_put),
3831 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3832 ext_disp_rx_sample_rate_get,
3833 ext_disp_rx_sample_rate_put),
3834 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3835 msm_bt_sample_rate_get,
3836 msm_bt_sample_rate_put),
3837 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3838 msm_bt_sample_rate_rx_get,
3839 msm_bt_sample_rate_rx_put),
3840 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3841 msm_bt_sample_rate_tx_get,
3842 msm_bt_sample_rate_tx_put),
3843 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3844 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3845 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3846 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3847};
3848
3849static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003850 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3851 tdm_rx_sample_rate_get,
3852 tdm_rx_sample_rate_put),
3853 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3854 tdm_rx_sample_rate_get,
3855 tdm_rx_sample_rate_put),
3856 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3857 tdm_rx_sample_rate_get,
3858 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003859 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3860 tdm_rx_sample_rate_get,
3861 tdm_rx_sample_rate_put),
3862 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3863 tdm_rx_sample_rate_get,
3864 tdm_rx_sample_rate_put),
3865 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3866 tdm_rx_sample_rate_get,
3867 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003868 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3869 tdm_tx_sample_rate_get,
3870 tdm_tx_sample_rate_put),
3871 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3872 tdm_tx_sample_rate_get,
3873 tdm_tx_sample_rate_put),
3874 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3875 tdm_tx_sample_rate_get,
3876 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003877 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3878 tdm_tx_sample_rate_get,
3879 tdm_tx_sample_rate_put),
3880 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3881 tdm_tx_sample_rate_get,
3882 tdm_tx_sample_rate_put),
3883 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3884 tdm_tx_sample_rate_get,
3885 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003886 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3887 tdm_rx_format_get,
3888 tdm_rx_format_put),
3889 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3890 tdm_rx_format_get,
3891 tdm_rx_format_put),
3892 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3893 tdm_rx_format_get,
3894 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003895 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3896 tdm_rx_format_get,
3897 tdm_rx_format_put),
3898 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3899 tdm_rx_format_get,
3900 tdm_rx_format_put),
3901 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3902 tdm_rx_format_get,
3903 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003904 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3905 tdm_tx_format_get,
3906 tdm_tx_format_put),
3907 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3908 tdm_tx_format_get,
3909 tdm_tx_format_put),
3910 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3911 tdm_tx_format_get,
3912 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003913 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3914 tdm_tx_format_get,
3915 tdm_tx_format_put),
3916 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3917 tdm_tx_format_get,
3918 tdm_tx_format_put),
3919 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3920 tdm_tx_format_get,
3921 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003922 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3923 tdm_rx_ch_get,
3924 tdm_rx_ch_put),
3925 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3926 tdm_rx_ch_get,
3927 tdm_rx_ch_put),
3928 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3929 tdm_rx_ch_get,
3930 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003931 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3932 tdm_rx_ch_get,
3933 tdm_rx_ch_put),
3934 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3935 tdm_rx_ch_get,
3936 tdm_rx_ch_put),
3937 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3938 tdm_rx_ch_get,
3939 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003940 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3941 tdm_tx_ch_get,
3942 tdm_tx_ch_put),
3943 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3944 tdm_tx_ch_get,
3945 tdm_tx_ch_put),
3946 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3947 tdm_tx_ch_get,
3948 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003949 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3950 tdm_tx_ch_get,
3951 tdm_tx_ch_put),
3952 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3953 tdm_tx_ch_get,
3954 tdm_tx_ch_put),
3955 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3956 tdm_tx_ch_get,
3957 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05303958 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3959 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3960};
3961
3962static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3963 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3964 aux_pcm_rx_sample_rate_get,
3965 aux_pcm_rx_sample_rate_put),
3966 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3967 aux_pcm_rx_sample_rate_get,
3968 aux_pcm_rx_sample_rate_put),
3969 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3970 aux_pcm_rx_sample_rate_get,
3971 aux_pcm_rx_sample_rate_put),
3972 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3973 aux_pcm_rx_sample_rate_get,
3974 aux_pcm_rx_sample_rate_put),
3975 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3976 aux_pcm_rx_sample_rate_get,
3977 aux_pcm_rx_sample_rate_put),
3978 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3979 aux_pcm_rx_sample_rate_get,
3980 aux_pcm_rx_sample_rate_put),
3981 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3982 aux_pcm_tx_sample_rate_get,
3983 aux_pcm_tx_sample_rate_put),
3984 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3985 aux_pcm_tx_sample_rate_get,
3986 aux_pcm_tx_sample_rate_put),
3987 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3988 aux_pcm_tx_sample_rate_get,
3989 aux_pcm_tx_sample_rate_put),
3990 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3991 aux_pcm_tx_sample_rate_get,
3992 aux_pcm_tx_sample_rate_put),
3993 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3994 aux_pcm_tx_sample_rate_get,
3995 aux_pcm_tx_sample_rate_put),
3996 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3997 aux_pcm_tx_sample_rate_get,
3998 aux_pcm_tx_sample_rate_put),
3999 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4000 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4001 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
4002 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4003 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
4004 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4005 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
4006 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4007 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
4008 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4009 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
4010 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4011 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4012 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4013 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
4014 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4015 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
4016 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4017 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
4018 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4019 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
4020 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4021 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
4022 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4023};
4024
4025static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
4026 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
4027 mi2s_rx_sample_rate_get,
4028 mi2s_rx_sample_rate_put),
4029 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
4030 mi2s_rx_sample_rate_get,
4031 mi2s_rx_sample_rate_put),
4032 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
4033 mi2s_rx_sample_rate_get,
4034 mi2s_rx_sample_rate_put),
4035 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
4036 mi2s_rx_sample_rate_get,
4037 mi2s_rx_sample_rate_put),
4038 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
4039 mi2s_rx_sample_rate_get,
4040 mi2s_rx_sample_rate_put),
4041 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
4042 mi2s_rx_sample_rate_get,
4043 mi2s_rx_sample_rate_put),
4044 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
4045 mi2s_tx_sample_rate_get,
4046 mi2s_tx_sample_rate_put),
4047 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
4048 mi2s_tx_sample_rate_get,
4049 mi2s_tx_sample_rate_put),
4050 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
4051 mi2s_tx_sample_rate_get,
4052 mi2s_tx_sample_rate_put),
4053 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
4054 mi2s_tx_sample_rate_get,
4055 mi2s_tx_sample_rate_put),
4056 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
4057 mi2s_tx_sample_rate_get,
4058 mi2s_tx_sample_rate_put),
4059 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
4060 mi2s_tx_sample_rate_get,
4061 mi2s_tx_sample_rate_put),
4062 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
4063 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4064 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
4065 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4066 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
4067 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4068 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
4069 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4070 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
4071 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4072 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
4073 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4074 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
4075 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4076 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
4077 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4078 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
4079 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4080 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
4081 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4082 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
4083 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4084 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
4085 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004086 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
4087 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4088 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
4089 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4090 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
4091 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004092 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
4093 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4094 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
4095 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4096 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
4097 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004098 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
4099 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4100 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
4101 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4102 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
4103 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004104 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
4105 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4106 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
4107 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4108 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
4109 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004110};
4111
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004112static const struct snd_kcontrol_new msm_snd_controls[] = {
4113 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4114 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4115 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4116 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4117 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4118 aux_pcm_rx_sample_rate_get,
4119 aux_pcm_rx_sample_rate_put),
4120 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4121 aux_pcm_tx_sample_rate_get,
4122 aux_pcm_tx_sample_rate_put),
4123};
4124
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004125static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4126{
4127 int idx;
4128
4129 switch (be_id) {
4130 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4131 idx = EXT_DISP_RX_IDX_DP;
4132 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004133 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4134 idx = EXT_DISP_RX_IDX_DP1;
4135 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004136 default:
4137 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4138 idx = -EINVAL;
4139 break;
4140 }
4141
4142 return idx;
4143}
4144
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004145static int kona_send_island_va_config(int32_t be_id)
4146{
4147 int rc = 0;
4148 int port_id = 0xFFFF;
4149
4150 port_id = msm_get_port_id(be_id);
4151 if (port_id < 0) {
4152 pr_err("%s: Invalid island interface, be_id: %d\n",
4153 __func__, be_id);
4154 rc = -EINVAL;
4155 } else {
4156 /*
4157 * send island mode config
4158 * This should be the first configuration
4159 */
4160 rc = afe_send_port_island_mode(port_id);
4161 if (rc)
4162 pr_err("%s: afe send island mode failed %d\n",
4163 __func__, rc);
4164 }
4165
4166 return rc;
4167}
4168
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004169static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4170 struct snd_pcm_hw_params *params)
4171{
4172 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4173 struct snd_interval *rate = hw_param_interval(params,
4174 SNDRV_PCM_HW_PARAM_RATE);
4175 struct snd_interval *channels = hw_param_interval(params,
4176 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +08004177 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004178
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004179 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4180 __func__, dai_link->id, params_format(params),
4181 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004182
4183 switch (dai_link->id) {
4184 case MSM_BACKEND_DAI_USB_RX:
4185 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4186 usb_rx_cfg.bit_format);
4187 rate->min = rate->max = usb_rx_cfg.sample_rate;
4188 channels->min = channels->max = usb_rx_cfg.channels;
4189 break;
4190
4191 case MSM_BACKEND_DAI_USB_TX:
4192 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4193 usb_tx_cfg.bit_format);
4194 rate->min = rate->max = usb_tx_cfg.sample_rate;
4195 channels->min = channels->max = usb_tx_cfg.channels;
4196 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004197
4198 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07004199 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004200 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4201 if (idx < 0) {
4202 pr_err("%s: Incorrect ext disp idx %d\n",
4203 __func__, idx);
4204 rc = idx;
4205 goto done;
4206 }
4207
4208 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4209 ext_disp_rx_cfg[idx].bit_format);
4210 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4211 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4212 break;
4213
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004214 case MSM_BACKEND_DAI_AFE_PCM_RX:
4215 channels->min = channels->max = proxy_rx_cfg.channels;
4216 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4217 break;
4218
4219 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4220 channels->min = channels->max =
4221 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4222 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4223 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4224 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4225 break;
4226
4227 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4228 channels->min = channels->max =
4229 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4230 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4231 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4232 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4233 break;
4234
4235 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4236 channels->min = channels->max =
4237 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4238 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4239 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4240 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4241 break;
4242
4243 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4244 channels->min = channels->max =
4245 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4247 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4248 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4249 break;
4250
4251 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4252 channels->min = channels->max =
4253 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4256 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4257 break;
4258
4259 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4260 channels->min = channels->max =
4261 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4263 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4264 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4265 break;
4266
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004267 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4268 channels->min = channels->max =
4269 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4270 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4271 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4272 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4273 break;
4274
4275 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4276 channels->min = channels->max =
4277 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4278 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4279 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4280 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4281 break;
4282
4283 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4284 channels->min = channels->max =
4285 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4286 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4287 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4288 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4289 break;
4290
4291 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4292 channels->min = channels->max =
4293 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4294 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4295 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4296 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4297 break;
4298
4299 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4300 channels->min = channels->max =
4301 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4302 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4303 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4304 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4305 break;
4306
4307 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4308 channels->min = channels->max =
4309 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4310 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4311 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4312 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4313 break;
4314
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004315 case MSM_BACKEND_DAI_AUXPCM_RX:
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4318 rate->min = rate->max =
4319 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4320 channels->min = channels->max =
4321 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_AUXPCM_TX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4327 rate->min = rate->max =
4328 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4329 channels->min = channels->max =
4330 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4331 break;
4332
4333 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4334 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4335 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4336 rate->min = rate->max =
4337 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4338 channels->min = channels->max =
4339 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4340 break;
4341
4342 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4343 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4344 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4345 rate->min = rate->max =
4346 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4347 channels->min = channels->max =
4348 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4349 break;
4350
4351 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4352 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4353 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4354 rate->min = rate->max =
4355 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4356 channels->min = channels->max =
4357 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4358 break;
4359
4360 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4361 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4362 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4363 rate->min = rate->max =
4364 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4365 channels->min = channels->max =
4366 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4367 break;
4368
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004369 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4370 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4371 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4372 rate->min = rate->max =
4373 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4374 channels->min = channels->max =
4375 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4379 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4380 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4381 rate->min = rate->max =
4382 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4383 channels->min = channels->max =
4384 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4385 break;
4386
4387 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4388 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4389 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4390 rate->min = rate->max =
4391 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4392 channels->min = channels->max =
4393 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4394 break;
4395
4396 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4397 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4398 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4399 rate->min = rate->max =
4400 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4401 channels->min = channels->max =
4402 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4403 break;
4404
4405 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4406 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4407 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4408 rate->min = rate->max =
4409 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4410 channels->min = channels->max =
4411 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4412 break;
4413
4414 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4415 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4416 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4417 rate->min = rate->max =
4418 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4419 channels->min = channels->max =
4420 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4421 break;
4422
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004423 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4424 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4425 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4426 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4427 channels->min = channels->max =
4428 mi2s_rx_cfg[PRIM_MI2S].channels;
4429 break;
4430
4431 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4432 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4433 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4434 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4435 channels->min = channels->max =
4436 mi2s_tx_cfg[PRIM_MI2S].channels;
4437 break;
4438
4439 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4440 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4441 mi2s_rx_cfg[SEC_MI2S].bit_format);
4442 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4443 channels->min = channels->max =
4444 mi2s_rx_cfg[SEC_MI2S].channels;
4445 break;
4446
4447 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4448 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4449 mi2s_tx_cfg[SEC_MI2S].bit_format);
4450 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4451 channels->min = channels->max =
4452 mi2s_tx_cfg[SEC_MI2S].channels;
4453 break;
4454
4455 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4456 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4457 mi2s_rx_cfg[TERT_MI2S].bit_format);
4458 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4459 channels->min = channels->max =
4460 mi2s_rx_cfg[TERT_MI2S].channels;
4461 break;
4462
4463 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4464 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4465 mi2s_tx_cfg[TERT_MI2S].bit_format);
4466 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4467 channels->min = channels->max =
4468 mi2s_tx_cfg[TERT_MI2S].channels;
4469 break;
4470
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004471 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4472 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4473 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4474 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4475 channels->min = channels->max =
4476 mi2s_rx_cfg[QUAT_MI2S].channels;
4477 break;
4478
4479 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4480 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4481 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4482 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4483 channels->min = channels->max =
4484 mi2s_tx_cfg[QUAT_MI2S].channels;
4485 break;
4486
4487 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4488 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4489 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4490 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4491 channels->min = channels->max =
4492 mi2s_rx_cfg[QUIN_MI2S].channels;
4493 break;
4494
4495 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4496 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4497 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4498 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4499 channels->min = channels->max =
4500 mi2s_tx_cfg[QUIN_MI2S].channels;
4501 break;
4502
4503 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4504 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4505 mi2s_rx_cfg[SEN_MI2S].bit_format);
4506 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4507 channels->min = channels->max =
4508 mi2s_rx_cfg[SEN_MI2S].channels;
4509 break;
4510
4511 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4512 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4513 mi2s_tx_cfg[SEN_MI2S].bit_format);
4514 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4515 channels->min = channels->max =
4516 mi2s_tx_cfg[SEN_MI2S].channels;
4517 break;
4518
Meng Wang574f4942019-02-18 12:59:41 +08004519 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4520 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4521 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4522 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4523 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4524 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4525 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4526 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4527 cdc_dma_rx_cfg[idx].bit_format);
4528 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4529 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4530 break;
4531
4532 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4533 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4534 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4535 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4536 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004537 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4538 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4539 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4540 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4541 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +08004542 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004543 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4544 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4545 break;
4546
Meng Wang574f4942019-02-18 12:59:41 +08004547 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304548 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +08004549 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4550 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +05304551 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +08004552 channels->min = channels->max = msm_vi_feed_tx_ch;
4553 break;
4554
Banajit Goswami83a370d2019-03-05 16:15:21 -08004555 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4556 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4557 slim_rx_cfg[SLIM_RX_7].bit_format);
4558 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4559 channels->min = channels->max =
4560 slim_rx_cfg[SLIM_RX_7].channels;
4561 break;
4562
4563 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +05304564 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4565 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -08004566 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4567 channels->min = channels->max =
4568 slim_tx_cfg[SLIM_TX_7].channels;
4569 break;
4570
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304571 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4572 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4573 channels->min = channels->max =
4574 slim_tx_cfg[SLIM_TX_8].channels;
4575 break;
4576
Meng Wange8e53822019-03-18 10:49:50 +08004577 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4578 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4579 afe_loopback_tx_cfg[idx].bit_format);
4580 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4581 channels->min = channels->max =
4582 afe_loopback_tx_cfg[idx].channels;
4583 break;
4584
Meng Wang574f4942019-02-18 12:59:41 +08004585 default:
4586 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004587 break;
4588 }
4589
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004590done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004591 return rc;
4592}
4593
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08004594static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4595{
4596 struct snd_soc_card *card = component->card;
4597 struct msm_asoc_mach_data *pdata =
4598 snd_soc_card_get_drvdata(card);
4599
4600 if (!pdata->fsa_handle)
4601 return false;
4602
4603 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4604}
4605
4606static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4607{
4608 int value = 0;
4609 bool ret = false;
4610 struct snd_soc_card *card;
4611 struct msm_asoc_mach_data *pdata;
4612
4613 if (!component) {
4614 pr_err("%s component is NULL\n", __func__);
4615 return false;
4616 }
4617 card = component->card;
4618 pdata = snd_soc_card_get_drvdata(card);
4619
4620 if (!pdata)
4621 return false;
4622
4623 if (wcd_mbhc_cfg.enable_usbc_analog)
4624 return msm_usbc_swap_gnd_mic(component, active);
4625
4626 /* if usbc is not defined, swap using us_euro_gpio_p */
4627 if (pdata->us_euro_gpio_p) {
4628 value = msm_cdc_pinctrl_get_state(
4629 pdata->us_euro_gpio_p);
4630 if (value)
4631 msm_cdc_pinctrl_select_sleep_state(
4632 pdata->us_euro_gpio_p);
4633 else
4634 msm_cdc_pinctrl_select_active_state(
4635 pdata->us_euro_gpio_p);
4636 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4637 __func__, value, !value);
4638 ret = true;
4639 }
4640
4641 return ret;
4642}
4643
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004644static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4645 struct snd_pcm_hw_params *params)
4646{
4647 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4648 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4649 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004650 int slot_width = TDM_SLOT_WIDTH_BITS;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004651 int channels, slots;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004652 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004653 unsigned int *slot_offset;
4654 struct tdm_dev_config *config;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004655 struct msm_asoc_mach_data *pdata = NULL;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004656 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004657
4658 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4659
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004660 pdata = snd_soc_card_get_drvdata(rtd->card);
4661 slots = pdata->tdm_max_slots;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004662 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004663 pr_err("%s: dai id 0x%x not supported\n",
4664 __func__, cpu_dai->id);
4665 return -EINVAL;
4666 }
4667
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004668 /* RX or TX */
4669 path_dir = cpu_dai->id % MAX_PATH;
4670
4671 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4672 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4673 / (MAX_PATH * TDM_PORT_MAX);
4674
4675 /* 0, 1, 2, .. 7 */
4676 channel_interface =
4677 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4678 % TDM_PORT_MAX;
4679
4680 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4681 __func__, path_dir, interface, channel_interface);
4682
4683 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4684 (path_dir * TDM_PORT_MAX) + channel_interface;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004685 if (!config) {
4686 pr_err("%s: tdm config is NULL\n", __func__);
4687 return -EINVAL;
4688 }
4689
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004690 slot_offset = config->tdm_slot_offset;
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08004691 if (!slot_offset) {
4692 pr_err("%s: slot offset is NULL\n", __func__);
4693 return -EINVAL;
4694 }
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004695
4696 if (path_dir)
4697 channels = tdm_tx_cfg[interface][channel_interface].channels;
4698 else
4699 channels = tdm_rx_cfg[interface][channel_interface].channels;
4700
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004701 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4702 /*2 slot config - bits 0 and 1 set for the first two slots */
4703 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004704
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004705 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4706 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004707
4708 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4709 slots, slot_width);
4710 if (ret < 0) {
4711 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4712 __func__, ret);
4713 goto end;
4714 }
4715
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004716 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4717
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004718 ret = snd_soc_dai_set_channel_map(cpu_dai,
4719 0, NULL, channels, slot_offset);
4720 if (ret < 0) {
4721 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4722 __func__, ret);
4723 goto end;
4724 }
4725 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4726 /*2 slot config - bits 0 and 1 set for the first two slots */
4727 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004728
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004729 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4730 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004731
4732 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4733 slots, slot_width);
4734 if (ret < 0) {
4735 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4736 __func__, ret);
4737 goto end;
4738 }
4739
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -07004740 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4741
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004742 ret = snd_soc_dai_set_channel_map(cpu_dai,
4743 channels, slot_offset, 0, NULL);
4744 if (ret < 0) {
4745 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4746 __func__, ret);
4747 goto end;
4748 }
4749 } else {
4750 ret = -EINVAL;
4751 pr_err("%s: invalid use case, err:%d\n",
4752 __func__, ret);
4753 goto end;
4754 }
4755
4756 rate = params_rate(params);
4757 clk_freq = rate * slot_width * slots;
4758 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4759 if (ret < 0)
4760 pr_err("%s: failed to set tdm clk, err:%d\n",
4761 __func__, ret);
4762
4763end:
4764 return ret;
4765}
4766
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004767static int msm_get_tdm_mode(u32 port_id)
4768{
4769 int tdm_mode;
4770
4771 switch (port_id) {
4772 case AFE_PORT_ID_PRIMARY_TDM_RX:
4773 case AFE_PORT_ID_PRIMARY_TDM_TX:
4774 tdm_mode = TDM_PRI;
4775 break;
4776 case AFE_PORT_ID_SECONDARY_TDM_RX:
4777 case AFE_PORT_ID_SECONDARY_TDM_TX:
4778 tdm_mode = TDM_SEC;
4779 break;
4780 case AFE_PORT_ID_TERTIARY_TDM_RX:
4781 case AFE_PORT_ID_TERTIARY_TDM_TX:
4782 tdm_mode = TDM_TERT;
4783 break;
4784 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4785 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4786 tdm_mode = TDM_QUAT;
4787 break;
4788 case AFE_PORT_ID_QUINARY_TDM_RX:
4789 case AFE_PORT_ID_QUINARY_TDM_TX:
4790 tdm_mode = TDM_QUIN;
4791 break;
4792 case AFE_PORT_ID_SENARY_TDM_RX:
4793 case AFE_PORT_ID_SENARY_TDM_TX:
4794 tdm_mode = TDM_SEN;
4795 break;
4796 default:
4797 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4798 tdm_mode = -EINVAL;
4799 }
4800 return tdm_mode;
4801}
4802
4803static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4804{
4805 int ret = 0;
4806 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4807 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4808 struct snd_soc_card *card = rtd->card;
4809 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4810 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4811
4812 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4813 ret = -EINVAL;
4814 pr_err("%s: Invalid TDM interface %d\n",
4815 __func__, ret);
4816 return ret;
4817 }
4818
4819 if (pdata->mi2s_gpio_p[tdm_mode]) {
4820 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4821 == 0) {
4822 ret = msm_cdc_pinctrl_select_active_state(
4823 pdata->mi2s_gpio_p[tdm_mode]);
4824 if (ret) {
4825 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4826 __func__, ret);
4827 goto done;
4828 }
4829 }
4830 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4831 }
4832
4833done:
4834 return ret;
4835}
4836
4837static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4838{
4839 int ret = 0;
4840 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4841 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4842 struct snd_soc_card *card = rtd->card;
4843 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4844 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4845
4846 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4847 ret = -EINVAL;
4848 pr_err("%s: Invalid TDM interface %d\n",
4849 __func__, ret);
4850 return;
4851 }
4852
4853 if (pdata->mi2s_gpio_p[tdm_mode]) {
4854 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4855 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4856 == 0) {
4857 ret = msm_cdc_pinctrl_select_sleep_state(
4858 pdata->mi2s_gpio_p[tdm_mode]);
4859 if (ret)
4860 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4861 __func__, ret);
4862 }
4863 }
4864}
4865
4866static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4867{
4868 int ret = 0;
4869 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4870 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4871 struct snd_soc_card *card = rtd->card;
4872 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4873 u32 aux_mode = cpu_dai->id - 1;
4874
4875 if (aux_mode >= AUX_PCM_MAX) {
4876 ret = -EINVAL;
4877 pr_err("%s: Invalid AUX interface %d\n",
4878 __func__, ret);
4879 return ret;
4880 }
4881
4882 if (pdata->mi2s_gpio_p[aux_mode]) {
4883 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4884 == 0) {
4885 ret = msm_cdc_pinctrl_select_active_state(
4886 pdata->mi2s_gpio_p[aux_mode]);
4887 if (ret) {
4888 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4889 __func__, ret);
4890 goto done;
4891 }
4892 }
4893 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4894 }
4895
4896done:
4897 return ret;
4898}
4899
4900static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4901{
4902 int ret = 0;
4903 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4904 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4905 struct snd_soc_card *card = rtd->card;
4906 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4907 u32 aux_mode = cpu_dai->id - 1;
4908
4909 if (aux_mode >= AUX_PCM_MAX) {
4910 pr_err("%s: Invalid AUX interface %d\n",
4911 __func__, ret);
4912 return;
4913 }
4914
4915 if (pdata->mi2s_gpio_p[aux_mode]) {
4916 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4917 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4918 == 0) {
4919 ret = msm_cdc_pinctrl_select_sleep_state(
4920 pdata->mi2s_gpio_p[aux_mode]);
4921 if (ret)
4922 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4923 __func__, ret);
4924 }
4925 }
4926}
4927
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004928static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4929{
4930 int ret = 0;
4931 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4932 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4933
4934 switch (dai_link->id) {
4935 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4936 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4937 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4938 ret = kona_send_island_va_config(dai_link->id);
4939 if (ret)
4940 pr_err("%s: send island va cfg failed, err: %d\n",
4941 __func__, ret);
4942 break;
4943 }
4944
4945 return ret;
4946}
4947
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05304948static void set_cps_config(struct snd_soc_pcm_runtime *rtd,
4949 u32 num_ch, u32 ch_mask)
4950{
4951 int i = 0;
4952 int val = 0;
4953 u8 dev_num = 0;
4954 int ch_configured = 0;
4955 int j = 0;
4956 int n = 0;
4957 char wsa_cdc_name[DEV_NAME_STR_LEN];
4958 struct snd_soc_component *component = NULL;
4959 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4960 struct msm_asoc_mach_data *pdata =
4961 snd_soc_card_get_drvdata(rtd->card);
4962
4963 if (!pdata) {
4964 pr_err("%s: pdata is NULL\n", __func__);
4965 return;
4966 }
4967
4968 if (!num_ch) {
4969 pr_err("%s: channel count is 0\n", __func__);
4970 return;
4971 }
4972
4973 if (!pdata->get_wsa_dev_num) {
4974 pr_err("%s: get_wsa_dev_num is NULL\n", __func__);
4975 return;
4976 }
4977
4978 if (!pdata->cps_config.spkr_dep_cfg) {
4979 pr_debug("%s: spkr_dep_cfg is NULL\n", __func__);
4980 return;
4981 }
4982
4983 if (!pdata->cps_config.hw_reg_cfg.lpass_wr_cmd_reg_phy_addr ||
4984 !pdata->cps_config.hw_reg_cfg.lpass_rd_cmd_reg_phy_addr ||
4985 !pdata->cps_config.hw_reg_cfg.lpass_rd_fifo_reg_phy_addr) {
4986 pr_err("%s: cps static configuration is not set\n", __func__);
4987 return;
4988 }
4989
4990 pdata->cps_config.lpass_hw_intf_cfg_mode = 1;
4991
4992 while (ch_configured < num_ch) {
4993 if (!(ch_mask & (1 << i))) {
4994 i++;
4995 continue;
4996 }
4997
4998 snprintf(wsa_cdc_name, sizeof(wsa_cdc_name), "wsa-codec.%d",
4999 i+1);
5000
5001 /* Use n to make sure both WSA components are retrieved */
5002 /* When first WSA component is retrieved adjust looping
5003 variable such that the next time only the remaining part
5004 of the array is traversed */
5005 for (j = n; j < rtd->card->num_aux_devs; j++)
5006 {
5007 if (msm_codec_conf[j].name_prefix != NULL ) {
5008 if (strstr(msm_codec_conf[j].name_prefix,
5009 "Left")) {
5010 component = soc_find_component_locked(
5011 msm_aux_dev[j].codec_of_node,
5012 NULL);
5013 n = j+1;
5014 break;
5015 }
5016 else if (strstr(msm_codec_conf[j].name_prefix,
5017 "Right")) {
5018 component = soc_find_component_locked(
5019 msm_aux_dev[j].codec_of_node,
5020 NULL);
5021 n = j+1;
5022 break;
5023 }
5024 }
5025 }
5026
5027 if (!component) {
5028 pr_err("%s: %s component is NULL\n", __func__,
5029 wsa_cdc_name);
5030 return;
5031 }
5032
5033 dev_num = pdata->get_wsa_dev_num(component);
5034 if (dev_num < 0 || dev_num > SWR_MAX_SLAVE_DEVICES) {
5035 pr_err("%s: invalid slave dev num : %d\n", __func__,
5036 dev_num);
5037 return;
5038 }
5039
5040 /* Clear stale dev num info */
5041 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr &= 0xFFFF;
5042 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr &= 0xFFFF;
5043
5044 val = 0;
5045
5046 /* bits 20:23 carry swr device number */
5047 val |= dev_num << 20;
5048
5049 /* bits 24:27 carry read length in bytes */
5050 val |= 1 << 24;
5051
5052 /* Update dev num in packed reg addr */
5053 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr |= val;
5054 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr |= val;
5055 i++;
5056 ch_configured++;
5057 }
5058
5059 afe_set_cps_config(msm_get_port_id(dai_link->id),
5060 &pdata->cps_config, ch_mask);
5061}
5062
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005063static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5064 struct snd_pcm_hw_params *params)
5065{
5066 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5067 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5068 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5069 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5070
5071 int ret = 0;
5072 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5073 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5074 u32 user_set_tx_ch = 0;
5075 u32 user_set_rx_ch = 0;
5076 u32 ch_id;
5077
5078 ret = snd_soc_dai_get_channel_map(codec_dai,
5079 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5080 &rx_ch_cdc_dma);
5081 if (ret < 0) {
5082 pr_err("%s: failed to get codec chan map, err:%d\n",
5083 __func__, ret);
5084 goto err;
5085 }
5086
5087 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5088 switch (dai_link->id) {
5089 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5090 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5091 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5093 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5096 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5097 {
5098 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5099 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5100 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5101 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5102 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5103 user_set_rx_ch, &rx_ch_cdc_dma);
5104 if (ret < 0) {
5105 pr_err("%s: failed to set cpu chan map, err:%d\n",
5106 __func__, ret);
5107 goto err;
5108 }
5109
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05305110 if (dai_link->id == MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0 ||
5111 dai_link->id == MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1) {
5112 set_cps_config(rtd, user_set_rx_ch,
5113 rx_ch_cdc_dma);
5114 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005115 }
5116 break;
5117 }
5118 } else {
5119 switch (dai_link->id) {
5120 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5121 {
5122 user_set_tx_ch = msm_vi_feed_tx_ch;
5123 }
5124 break;
5125 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5126 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5127 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
5128 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5129 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08005130 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
5131 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
5132 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005133 {
5134 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5135 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5136 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5137 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5138 }
5139 break;
5140 }
5141
5142 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5143 &tx_ch_cdc_dma, 0, 0);
5144 if (ret < 0) {
5145 pr_err("%s: failed to set cpu chan map, err:%d\n",
5146 __func__, ret);
5147 goto err;
5148 }
5149 }
5150
5151err:
5152 return ret;
5153}
5154
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005155static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5156{
5157 cpumask_t mask;
5158
5159 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5160 pm_qos_remove_request(&substream->latency_pm_qos_req);
5161
5162 cpumask_clear(&mask);
5163 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5164 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5165 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5166
5167 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5168
5169 pm_qos_add_request(&substream->latency_pm_qos_req,
5170 PM_QOS_CPU_DMA_LATENCY,
5171 MSM_LL_QOS_VALUE);
5172 return 0;
5173}
5174
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005175void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
5176{
5177 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5178 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5179 int index = cpu_dai->id;
5180 struct snd_soc_card *card = rtd->card;
5181 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5182 int sample_rate = 0;
5183
5184 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5185 sample_rate = mi2s_rx_cfg[index].sample_rate;
5186 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5187 sample_rate = mi2s_tx_cfg[index].sample_rate;
5188 } else {
5189 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5190 return;
5191 }
5192
5193 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5194 if (pdata->lpass_audio_hw_vote != NULL) {
5195 if (--pdata->core_audio_vote_count == 0) {
5196 clk_disable_unprepare(
5197 pdata->lpass_audio_hw_vote);
5198 } else if (pdata->core_audio_vote_count < 0) {
5199 pr_err("%s: audio vote mismatch\n", __func__);
5200 pdata->core_audio_vote_count = 0;
5201 }
5202 } else {
5203 pr_err("%s: Invalid lpass audio hw node\n", __func__);
5204 }
5205 }
5206}
5207
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005208static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5209{
5210 int ret = 0;
5211 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5212 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5213 int index = cpu_dai->id;
5214 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005215 struct snd_soc_card *card = rtd->card;
5216 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005217 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005218
5219 dev_dbg(rtd->card->dev,
5220 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5221 __func__, substream->name, substream->stream,
5222 cpu_dai->name, cpu_dai->id);
5223
5224 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5225 ret = -EINVAL;
5226 dev_err(rtd->card->dev,
5227 "%s: CPU DAI id (%d) out of range\n",
5228 __func__, cpu_dai->id);
5229 goto err;
5230 }
5231 /*
5232 * Mutex protection in case the same MI2S
5233 * interface using for both TX and RX so
5234 * that the same clock won't be enable twice.
5235 */
5236 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005237 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5238 sample_rate = mi2s_rx_cfg[index].sample_rate;
5239 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5240 sample_rate = mi2s_tx_cfg[index].sample_rate;
5241 } else {
5242 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5243 ret = -EINVAL;
5244 goto vote_err;
5245 }
5246
5247 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5248 if (pdata->lpass_audio_hw_vote == NULL) {
5249 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5250 __func__);
5251 ret = -EINVAL;
5252 goto vote_err;
5253 }
5254 if (pdata->core_audio_vote_count == 0) {
5255 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5256 if (ret < 0) {
5257 dev_err(rtd->card->dev, "%s: audio vote error\n",
5258 __func__);
5259 goto vote_err;
5260 }
5261 }
5262 pdata->core_audio_vote_count++;
5263 }
5264
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005265 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5266 /* Check if msm needs to provide the clock to the interface */
5267 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5268 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5269 fmt = SND_SOC_DAIFMT_CBM_CFM;
5270 }
5271 ret = msm_mi2s_set_sclk(substream, true);
5272 if (ret < 0) {
5273 dev_err(rtd->card->dev,
5274 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5275 __func__, ret);
5276 goto clean_up;
5277 }
5278
5279 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5280 if (ret < 0) {
5281 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5282 __func__, index, ret);
5283 goto clk_off;
5284 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005285 if (pdata->mi2s_gpio_p[index]) {
5286 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5287 == 0) {
5288 ret = msm_cdc_pinctrl_select_active_state(
5289 pdata->mi2s_gpio_p[index]);
5290 if (ret) {
5291 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5292 __func__, ret);
5293 goto clk_off;
5294 }
5295 }
5296 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5297 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005298 }
5299clk_off:
5300 if (ret < 0)
5301 msm_mi2s_set_sclk(substream, false);
5302clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005303 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005304 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005305 mi2s_disable_audio_vote(substream);
5306 }
5307vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005308 mutex_unlock(&mi2s_intf_conf[index].lock);
5309err:
5310 return ret;
5311}
5312
5313static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5314{
5315 int ret = 0;
5316 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5317 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005318 struct snd_soc_card *card = rtd->card;
5319 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005320
5321 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5322 substream->name, substream->stream);
5323 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5324 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5325 return;
5326 }
5327
5328 mutex_lock(&mi2s_intf_conf[index].lock);
5329 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005330 if (pdata->mi2s_gpio_p[index]) {
5331 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5332 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5333 == 0) {
5334 ret = msm_cdc_pinctrl_select_sleep_state(
5335 pdata->mi2s_gpio_p[index]);
5336 if (ret)
5337 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5338 __func__, ret);
5339 }
5340 }
5341
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005342 ret = msm_mi2s_set_sclk(substream, false);
5343 if (ret < 0)
5344 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5345 __func__, index, ret);
5346 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07005347 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005348 mutex_unlock(&mi2s_intf_conf[index].lock);
5349}
5350
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305351static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5352 struct snd_pcm_hw_params *params)
5353{
5354 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5355 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5356 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5357 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5358 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5359 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5360 int ret = 0;
5361
5362 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5363 codec_dai->name, codec_dai->id);
5364 ret = snd_soc_dai_get_channel_map(codec_dai,
5365 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5366 if (ret) {
5367 dev_err(rtd->dev,
5368 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5369 __func__, ret);
5370 goto err;
5371 }
5372
5373 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5374 __func__, tx_ch_cnt, dai_link->id);
5375
5376 ret = snd_soc_dai_set_channel_map(cpu_dai,
5377 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5378 if (ret)
5379 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5380 __func__, ret);
5381
5382err:
5383 return ret;
5384}
5385
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005386static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5387 struct snd_pcm_hw_params *params)
5388{
5389 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5390 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5391 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5392 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5393 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5394 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5395 int ret = 0;
5396
5397 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5398 codec_dai->name, codec_dai->id);
5399 ret = snd_soc_dai_get_channel_map(codec_dai,
5400 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5401 if (ret) {
5402 dev_err(rtd->dev,
5403 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5404 __func__, ret);
5405 goto err;
5406 }
5407
5408 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5409 __func__, tx_ch_cnt, dai_link->id);
5410
5411 ret = snd_soc_dai_set_channel_map(cpu_dai,
5412 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5413 if (ret)
5414 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5415 __func__, ret);
5416
5417err:
5418 return ret;
5419}
5420
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005421static struct snd_soc_ops kona_aux_be_ops = {
5422 .startup = kona_aux_snd_startup,
5423 .shutdown = kona_aux_snd_shutdown
5424};
5425
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005426static struct snd_soc_ops kona_tdm_be_ops = {
5427 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08005428 .startup = kona_tdm_snd_startup,
5429 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005430};
5431
5432static struct snd_soc_ops msm_mi2s_be_ops = {
5433 .startup = msm_mi2s_snd_startup,
5434 .shutdown = msm_mi2s_snd_shutdown,
5435};
5436
5437static struct snd_soc_ops msm_fe_qos_ops = {
5438 .prepare = msm_fe_qos_prepare,
5439};
5440
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005441static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07005442 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005443 .hw_params = msm_snd_cdc_dma_hw_params,
5444};
5445
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005446static struct snd_soc_ops msm_wcn_ops = {
5447 .hw_params = msm_wcn_hw_params,
5448};
5449
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305450static struct snd_soc_ops msm_wcn_ops_lito = {
5451 .hw_params = msm_wcn_hw_params_lito,
5452};
5453
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005454static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5455 struct snd_kcontrol *kcontrol, int event)
5456{
5457 struct msm_asoc_mach_data *pdata = NULL;
5458 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5459 int ret = 0;
5460 u32 dmic_idx;
5461 int *dmic_gpio_cnt;
5462 struct device_node *dmic_gpio;
5463 char *wname;
5464
5465 wname = strpbrk(w->name, "012345");
5466 if (!wname) {
5467 dev_err(component->dev, "%s: widget not found\n", __func__);
5468 return -EINVAL;
5469 }
5470
5471 ret = kstrtouint(wname, 10, &dmic_idx);
5472 if (ret < 0) {
5473 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5474 __func__);
5475 return -EINVAL;
5476 }
5477
5478 pdata = snd_soc_card_get_drvdata(component->card);
5479
5480 switch (dmic_idx) {
5481 case 0:
5482 case 1:
5483 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5484 dmic_gpio = pdata->dmic01_gpio_p;
5485 break;
5486 case 2:
5487 case 3:
5488 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5489 dmic_gpio = pdata->dmic23_gpio_p;
5490 break;
5491 case 4:
5492 case 5:
5493 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5494 dmic_gpio = pdata->dmic45_gpio_p;
5495 break;
5496 default:
5497 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5498 __func__);
5499 return -EINVAL;
5500 }
5501
5502 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5503 __func__, event, dmic_idx, *dmic_gpio_cnt);
5504
5505 switch (event) {
5506 case SND_SOC_DAPM_PRE_PMU:
5507 (*dmic_gpio_cnt)++;
5508 if (*dmic_gpio_cnt == 1) {
5509 ret = msm_cdc_pinctrl_select_active_state(
5510 dmic_gpio);
5511 if (ret < 0) {
5512 pr_err("%s: gpio set cannot be activated %sd",
5513 __func__, "dmic_gpio");
5514 return ret;
5515 }
5516 }
5517
5518 break;
5519 case SND_SOC_DAPM_POST_PMD:
5520 (*dmic_gpio_cnt)--;
5521 if (*dmic_gpio_cnt == 0) {
5522 ret = msm_cdc_pinctrl_select_sleep_state(
5523 dmic_gpio);
5524 if (ret < 0) {
5525 pr_err("%s: gpio set cannot be de-activated %sd",
5526 __func__, "dmic_gpio");
5527 return ret;
5528 }
5529 }
5530 break;
5531 default:
5532 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5533 return -EINVAL;
5534 }
5535 return 0;
5536}
5537
lintaopeie0a48bc2020-12-11 11:13:13 +08005538#ifdef CONFIG_T2M_SND_FP4
5539static int msm_enable_hac_pa(struct snd_soc_dapm_widget *w,
5540 struct snd_kcontrol *kcontrol,
5541 int event)
5542{
5543 struct snd_soc_component *component =
5544 snd_soc_dapm_to_component(w->dapm);
5545 struct msm_asoc_mach_data *pdata = NULL;
5546 int ret = 0;
5547
5548 dev_dbg(component->dev, "HAC %s wname: %s event: %d\n", __func__,
5549 w->name, event);
5550
5551 pdata = snd_soc_card_get_drvdata(component->card);
5552
5553 switch (event) {
5554 case SND_SOC_DAPM_POST_PMU:
5555 ret = msm_cdc_pinctrl_select_active_state(
5556 pdata->hac_pa_gpio_p);
5557 if (ret) {
5558 pr_err("%s:HAC gpio set cannot be de-activated %s\n",
5559 __func__, "hac_pa");
5560 }
5561 break;
5562 case SND_SOC_DAPM_PRE_PMD:
5563 ret = msm_cdc_pinctrl_select_sleep_state(
5564 pdata->hac_pa_gpio_p);
5565 if (ret) {
5566 pr_err("%s:HAC gpio set cannot be de-activated %s\n",
5567 __func__, "hac_pa");
5568 }
5569 break;
5570 };
5571 return ret;
5572}
5573#endif
5574
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005575static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5576 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5577 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5578 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5579 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005580 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005581 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5582 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5583 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5584 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5585 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5586 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305587 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5588 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005589};
5590
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005591static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5592{
5593 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5594 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5595 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5596
5597 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5598 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5599}
5600
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305601static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5602{
5603 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5604 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5605 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5606
5607 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5608 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5609}
5610
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305611#ifndef CONFIG_TDM_DISABLE
5612static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5613{
5614 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5615 ARRAY_SIZE(msm_tdm_snd_controls));
5616}
5617#else
5618static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5619{
5620 return;
5621}
5622#endif
5623
5624#ifndef CONFIG_MI2S_DISABLE
5625static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5626{
5627 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5628 ARRAY_SIZE(msm_mi2s_snd_controls));
5629}
5630#else
5631static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5632{
5633 return;
5634}
5635#endif
5636
5637#ifndef CONFIG_AUXPCM_DISABLE
5638static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5639{
5640 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5641 ARRAY_SIZE(msm_auxpcm_snd_controls));
5642}
5643#else
5644static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5645{
5646 return;
5647}
5648#endif
5649
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005650static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5651{
5652 int ret = -EINVAL;
5653 struct snd_soc_component *component;
5654 struct snd_soc_dapm_context *dapm;
5655 struct snd_card *card;
5656 struct snd_info_entry *entry;
5657 struct snd_soc_component *aux_comp;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005658 struct platform_device *pdev = NULL;
5659 int i = 0;
Kunlei Zhangf712be02020-06-30 21:05:46 +08005660 bool is_wcd937x_used = false;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005661 char *data = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005662 struct msm_asoc_mach_data *pdata =
5663 snd_soc_card_get_drvdata(rtd->card);
5664
5665 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5666 if (!component) {
5667 pr_err("%s: could not find component for bolero_codec\n",
5668 __func__);
5669 return ret;
5670 }
5671
5672 dapm = snd_soc_component_get_dapm(component);
5673
5674 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5675 ARRAY_SIZE(msm_int_snd_controls));
5676 if (ret < 0) {
5677 pr_err("%s: add_component_controls failed: %d\n",
5678 __func__, ret);
5679 return ret;
5680 }
5681 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5682 ARRAY_SIZE(msm_common_snd_controls));
5683 if (ret < 0) {
5684 pr_err("%s: add common snd controls failed: %d\n",
5685 __func__, ret);
5686 return ret;
5687 }
5688
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05305689 msm_add_tdm_snd_controls(component);
5690 msm_add_mi2s_snd_controls(component);
5691 msm_add_auxpcm_snd_controls(component);
5692
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005693 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5694 ARRAY_SIZE(msm_int_dapm_widgets));
5695
lintaopeie0a48bc2020-12-11 11:13:13 +08005696#ifdef CONFIG_T2M_SND_FP4
5697 snd_soc_dapm_new_controls(dapm, msm_hac_dapm_widgets,
5698 ARRAY_SIZE(msm_hac_dapm_widgets));
5699
5700 snd_soc_dapm_add_routes(dapm, msm_hac_audio_map,
5701 ARRAY_SIZE(msm_hac_audio_map));
5702
5703 snd_soc_dapm_ignore_suspend(dapm, "HAC");
5704 snd_soc_dapm_ignore_suspend(dapm, "HAC_RX");
5705 snd_soc_dapm_sync(dapm);
5706#endif
5707
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005708 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5709 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5710 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5711 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +05305712 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5713 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305714 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5715 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005716
5717 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5718 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5719 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5720 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005721 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005722
5723 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5724 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5725 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5726 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5727
5728 snd_soc_dapm_sync(dapm);
5729
5730 /*
5731 * Send speaker configuration only for WSA8810.
5732 * Default configuration is for WSA8815.
5733 */
5734 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5735 __func__, rtd->card->num_aux_devs);
5736 if (rtd->card->num_aux_devs &&
5737 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +08005738 list_for_each_entry(aux_comp,
5739 &rtd->card->aux_comp_list,
5740 card_aux_list) {
5741 if (aux_comp->name != NULL && (
5742 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5743 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5744 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005745 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005746 wsa_macro_set_spkr_gain_offset(component,
5747 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
Laxminath Kasamd3621032020-04-01 18:14:05 +05305748 } else if (aux_comp->name != NULL && (
5749 !strcmp(aux_comp->name, WSA8815_NAME_1) ||
5750 !strcmp(aux_comp->name, WSA8815_NAME_2))) {
5751 wsa_macro_set_spkr_mode(component,
5752 WSA_MACRO_SPKR_MODE_DEFAULT);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005753 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005754 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005755 }
5756
5757 for (i = 0; i < rtd->card->num_aux_devs; i++)
5758 {
5759 if (msm_aux_dev[i].name != NULL ) {
5760 if (strstr(msm_aux_dev[i].name, "wsa"))
5761 continue;
5762 }
5763
5764 if (msm_aux_dev[i].codec_of_node) {
5765 pdev = of_find_device_by_node(
5766 msm_aux_dev[i].codec_of_node);
5767
5768 if (pdev)
5769 data = (char*) of_device_get_match_data(
5770 &pdev->dev);
5771 if (data != NULL) {
5772 if (!strncmp(data, "wcd937x",
5773 sizeof("wcd937x"))) {
Kunlei Zhangf712be02020-06-30 21:05:46 +08005774 is_wcd937x_used = true;
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005775 break;
5776 }
5777 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +05305778 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005779 }
Kunlei Zhang4bfe0fe2020-03-06 21:20:07 +08005780
Kunlei Zhangf712be02020-06-30 21:05:46 +08005781 if (is_wcd937x_used) {
5782 bolero_set_port_map(component,
5783 ARRAY_SIZE(sm_port_map_wcd937x),
5784 sm_port_map_wcd937x);
5785 } else if (pdata->lito_v2_enabled) {
5786 /*
5787 * Enable tx data line3 for saipan version v2 and
5788 * write corresponding lpi register.
5789 */
5790 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5791 sm_port_map_v2);
5792 } else {
5793 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5794 sm_port_map);
5795 }
5796
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005797 card = rtd->card->snd_card;
5798 if (!pdata->codec_root) {
5799 entry = snd_info_create_subdir(card->module, "codecs",
5800 card->proc_root);
5801 if (!entry) {
5802 pr_debug("%s: Cannot create codecs module entry\n",
5803 __func__);
5804 ret = 0;
5805 goto err;
5806 }
5807 pdata->codec_root = entry;
5808 }
5809 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -08005810 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005811 codec_reg_done = true;
5812 return 0;
5813err:
5814 return ret;
5815}
5816
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08005817static void *def_wcd_mbhc_cal(void)
5818{
5819 void *wcd_mbhc_cal;
5820 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5821 u16 *btn_high;
5822
5823 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5824 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5825 if (!wcd_mbhc_cal)
5826 return NULL;
5827
5828 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5829 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5830 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5831 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5832 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5833
5834 btn_high[0] = 75;
5835 btn_high[1] = 150;
5836 btn_high[2] = 237;
5837 btn_high[3] = 500;
5838 btn_high[4] = 500;
5839 btn_high[5] = 500;
5840 btn_high[6] = 500;
5841 btn_high[7] = 500;
5842
5843 return wcd_mbhc_cal;
5844}
5845
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005846/* Digital audio interface glue - connects codec <---> CPU */
5847static struct snd_soc_dai_link msm_common_dai_links[] = {
5848 /* FrontEnd DAI Links */
5849 {/* hw:x,0 */
5850 .name = MSM_DAILINK_NAME(Media1),
5851 .stream_name = "MultiMedia1",
5852 .cpu_dai_name = "MultiMedia1",
5853 .platform_name = "msm-pcm-dsp.0",
5854 .dynamic = 1,
5855 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5856 .dpcm_playback = 1,
5857 .dpcm_capture = 1,
5858 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5859 SND_SOC_DPCM_TRIGGER_POST},
5860 .codec_dai_name = "snd-soc-dummy-dai",
5861 .codec_name = "snd-soc-dummy",
5862 .ignore_suspend = 1,
5863 /* this dainlink has playback support */
5864 .ignore_pmdown_time = 1,
5865 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5866 },
5867 {/* hw:x,1 */
5868 .name = MSM_DAILINK_NAME(Media2),
5869 .stream_name = "MultiMedia2",
5870 .cpu_dai_name = "MultiMedia2",
5871 .platform_name = "msm-pcm-dsp.0",
5872 .dynamic = 1,
5873 .dpcm_playback = 1,
5874 .dpcm_capture = 1,
5875 .codec_dai_name = "snd-soc-dummy-dai",
5876 .codec_name = "snd-soc-dummy",
5877 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5878 SND_SOC_DPCM_TRIGGER_POST},
5879 .ignore_suspend = 1,
5880 /* this dainlink has playback support */
5881 .ignore_pmdown_time = 1,
5882 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5883 },
5884 {/* hw:x,2 */
5885 .name = "VoiceMMode1",
5886 .stream_name = "VoiceMMode1",
5887 .cpu_dai_name = "VoiceMMode1",
5888 .platform_name = "msm-pcm-voice",
5889 .dynamic = 1,
5890 .dpcm_playback = 1,
5891 .dpcm_capture = 1,
5892 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5893 SND_SOC_DPCM_TRIGGER_POST},
5894 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5895 .ignore_suspend = 1,
5896 .ignore_pmdown_time = 1,
5897 .codec_dai_name = "snd-soc-dummy-dai",
5898 .codec_name = "snd-soc-dummy",
5899 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5900 },
5901 {/* hw:x,3 */
5902 .name = "MSM VoIP",
5903 .stream_name = "VoIP",
5904 .cpu_dai_name = "VoIP",
5905 .platform_name = "msm-voip-dsp",
5906 .dynamic = 1,
5907 .dpcm_playback = 1,
5908 .dpcm_capture = 1,
5909 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5910 SND_SOC_DPCM_TRIGGER_POST},
5911 .codec_dai_name = "snd-soc-dummy-dai",
5912 .codec_name = "snd-soc-dummy",
5913 .ignore_suspend = 1,
5914 /* this dainlink has playback support */
5915 .ignore_pmdown_time = 1,
5916 .id = MSM_FRONTEND_DAI_VOIP,
5917 },
5918 {/* hw:x,4 */
5919 .name = MSM_DAILINK_NAME(ULL),
5920 .stream_name = "MultiMedia3",
5921 .cpu_dai_name = "MultiMedia3",
5922 .platform_name = "msm-pcm-dsp.2",
5923 .dynamic = 1,
5924 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5925 .dpcm_playback = 1,
5926 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5927 SND_SOC_DPCM_TRIGGER_POST},
5928 .codec_dai_name = "snd-soc-dummy-dai",
5929 .codec_name = "snd-soc-dummy",
5930 .ignore_suspend = 1,
5931 /* this dainlink has playback support */
5932 .ignore_pmdown_time = 1,
5933 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5934 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005935 {/* hw:x,5 */
5936 .name = "MSM AFE-PCM RX",
5937 .stream_name = "AFE-PROXY RX",
5938 .cpu_dai_name = "msm-dai-q6-dev.241",
5939 .codec_name = "msm-stub-codec.1",
5940 .codec_dai_name = "msm-stub-rx",
5941 .platform_name = "msm-pcm-afe",
5942 .dpcm_playback = 1,
5943 .ignore_suspend = 1,
5944 /* this dainlink has playback support */
5945 .ignore_pmdown_time = 1,
5946 },
5947 {/* hw:x,6 */
5948 .name = "MSM AFE-PCM TX",
5949 .stream_name = "AFE-PROXY TX",
5950 .cpu_dai_name = "msm-dai-q6-dev.240",
5951 .codec_name = "msm-stub-codec.1",
5952 .codec_dai_name = "msm-stub-tx",
5953 .platform_name = "msm-pcm-afe",
5954 .dpcm_capture = 1,
5955 .ignore_suspend = 1,
5956 },
5957 {/* hw:x,7 */
5958 .name = MSM_DAILINK_NAME(Compress1),
5959 .stream_name = "Compress1",
5960 .cpu_dai_name = "MultiMedia4",
5961 .platform_name = "msm-compress-dsp",
5962 .dynamic = 1,
5963 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5964 .dpcm_playback = 1,
5965 .dpcm_capture = 1,
5966 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5967 SND_SOC_DPCM_TRIGGER_POST},
5968 .codec_dai_name = "snd-soc-dummy-dai",
5969 .codec_name = "snd-soc-dummy",
5970 .ignore_suspend = 1,
5971 .ignore_pmdown_time = 1,
5972 /* this dainlink has playback support */
5973 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5974 },
Meng Wang197cb302019-03-01 13:54:38 +08005975 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005976 {/* hw:x,8 */
5977 .name = "AUXPCM Hostless",
5978 .stream_name = "AUXPCM Hostless",
5979 .cpu_dai_name = "AUXPCM_HOSTLESS",
5980 .platform_name = "msm-pcm-hostless",
5981 .dynamic = 1,
5982 .dpcm_playback = 1,
5983 .dpcm_capture = 1,
5984 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5985 SND_SOC_DPCM_TRIGGER_POST},
5986 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5987 .ignore_suspend = 1,
5988 /* this dainlink has playback support */
5989 .ignore_pmdown_time = 1,
5990 .codec_dai_name = "snd-soc-dummy-dai",
5991 .codec_name = "snd-soc-dummy",
5992 },
5993 {/* hw:x,9 */
5994 .name = MSM_DAILINK_NAME(LowLatency),
5995 .stream_name = "MultiMedia5",
5996 .cpu_dai_name = "MultiMedia5",
5997 .platform_name = "msm-pcm-dsp.1",
5998 .dynamic = 1,
5999 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6000 .dpcm_playback = 1,
6001 .dpcm_capture = 1,
6002 .codec_dai_name = "snd-soc-dummy-dai",
6003 .codec_name = "snd-soc-dummy",
6004 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6005 SND_SOC_DPCM_TRIGGER_POST},
6006 .ignore_suspend = 1,
6007 /* this dainlink has playback support */
6008 .ignore_pmdown_time = 1,
6009 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6010 .ops = &msm_fe_qos_ops,
6011 },
6012 {/* hw:x,10 */
6013 .name = "Listen 1 Audio Service",
6014 .stream_name = "Listen 1 Audio Service",
6015 .cpu_dai_name = "LSM1",
6016 .platform_name = "msm-lsm-client",
6017 .dynamic = 1,
6018 .dpcm_capture = 1,
6019 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6020 SND_SOC_DPCM_TRIGGER_POST },
6021 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6022 .ignore_suspend = 1,
6023 .codec_dai_name = "snd-soc-dummy-dai",
6024 .codec_name = "snd-soc-dummy",
6025 .id = MSM_FRONTEND_DAI_LSM1,
6026 },
6027 /* Multiple Tunnel instances */
6028 {/* hw:x,11 */
6029 .name = MSM_DAILINK_NAME(Compress2),
6030 .stream_name = "Compress2",
6031 .cpu_dai_name = "MultiMedia7",
6032 .platform_name = "msm-compress-dsp",
6033 .dynamic = 1,
6034 .dpcm_playback = 1,
6035 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6036 SND_SOC_DPCM_TRIGGER_POST},
6037 .codec_dai_name = "snd-soc-dummy-dai",
6038 .codec_name = "snd-soc-dummy",
6039 .ignore_suspend = 1,
6040 .ignore_pmdown_time = 1,
6041 /* this dainlink has playback support */
6042 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6043 },
6044 {/* hw:x,12 */
6045 .name = MSM_DAILINK_NAME(MultiMedia10),
6046 .stream_name = "MultiMedia10",
6047 .cpu_dai_name = "MultiMedia10",
6048 .platform_name = "msm-pcm-dsp.1",
6049 .dynamic = 1,
6050 .dpcm_playback = 1,
6051 .dpcm_capture = 1,
6052 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6053 SND_SOC_DPCM_TRIGGER_POST},
6054 .codec_dai_name = "snd-soc-dummy-dai",
6055 .codec_name = "snd-soc-dummy",
6056 .ignore_suspend = 1,
6057 .ignore_pmdown_time = 1,
6058 /* this dainlink has playback support */
6059 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6060 },
6061 {/* hw:x,13 */
6062 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6063 .stream_name = "MM_NOIRQ",
6064 .cpu_dai_name = "MultiMedia8",
6065 .platform_name = "msm-pcm-dsp-noirq",
6066 .dynamic = 1,
6067 .dpcm_playback = 1,
6068 .dpcm_capture = 1,
6069 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6070 SND_SOC_DPCM_TRIGGER_POST},
6071 .codec_dai_name = "snd-soc-dummy-dai",
6072 .codec_name = "snd-soc-dummy",
6073 .ignore_suspend = 1,
6074 .ignore_pmdown_time = 1,
6075 /* this dainlink has playback support */
6076 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6077 .ops = &msm_fe_qos_ops,
6078 },
6079 /* HDMI Hostless */
6080 {/* hw:x,14 */
6081 .name = "HDMI_RX_HOSTLESS",
6082 .stream_name = "HDMI_RX_HOSTLESS",
6083 .cpu_dai_name = "HDMI_HOSTLESS",
6084 .platform_name = "msm-pcm-hostless",
6085 .dynamic = 1,
6086 .dpcm_playback = 1,
6087 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6088 SND_SOC_DPCM_TRIGGER_POST},
6089 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6090 .ignore_suspend = 1,
6091 .ignore_pmdown_time = 1,
6092 .codec_dai_name = "snd-soc-dummy-dai",
6093 .codec_name = "snd-soc-dummy",
6094 },
6095 {/* hw:x,15 */
6096 .name = "VoiceMMode2",
6097 .stream_name = "VoiceMMode2",
6098 .cpu_dai_name = "VoiceMMode2",
6099 .platform_name = "msm-pcm-voice",
6100 .dynamic = 1,
6101 .dpcm_playback = 1,
6102 .dpcm_capture = 1,
6103 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6104 SND_SOC_DPCM_TRIGGER_POST},
6105 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6106 .ignore_suspend = 1,
6107 .ignore_pmdown_time = 1,
6108 .codec_dai_name = "snd-soc-dummy-dai",
6109 .codec_name = "snd-soc-dummy",
6110 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6111 },
6112 /* LSM FE */
6113 {/* hw:x,16 */
6114 .name = "Listen 2 Audio Service",
6115 .stream_name = "Listen 2 Audio Service",
6116 .cpu_dai_name = "LSM2",
6117 .platform_name = "msm-lsm-client",
6118 .dynamic = 1,
6119 .dpcm_capture = 1,
6120 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6121 SND_SOC_DPCM_TRIGGER_POST },
6122 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6123 .ignore_suspend = 1,
6124 .codec_dai_name = "snd-soc-dummy-dai",
6125 .codec_name = "snd-soc-dummy",
6126 .id = MSM_FRONTEND_DAI_LSM2,
6127 },
6128 {/* hw:x,17 */
6129 .name = "Listen 3 Audio Service",
6130 .stream_name = "Listen 3 Audio Service",
6131 .cpu_dai_name = "LSM3",
6132 .platform_name = "msm-lsm-client",
6133 .dynamic = 1,
6134 .dpcm_capture = 1,
6135 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6136 SND_SOC_DPCM_TRIGGER_POST },
6137 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6138 .ignore_suspend = 1,
6139 .codec_dai_name = "snd-soc-dummy-dai",
6140 .codec_name = "snd-soc-dummy",
6141 .id = MSM_FRONTEND_DAI_LSM3,
6142 },
6143 {/* hw:x,18 */
6144 .name = "Listen 4 Audio Service",
6145 .stream_name = "Listen 4 Audio Service",
6146 .cpu_dai_name = "LSM4",
6147 .platform_name = "msm-lsm-client",
6148 .dynamic = 1,
6149 .dpcm_capture = 1,
6150 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6151 SND_SOC_DPCM_TRIGGER_POST },
6152 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6153 .ignore_suspend = 1,
6154 .codec_dai_name = "snd-soc-dummy-dai",
6155 .codec_name = "snd-soc-dummy",
6156 .id = MSM_FRONTEND_DAI_LSM4,
6157 },
6158 {/* hw:x,19 */
6159 .name = "Listen 5 Audio Service",
6160 .stream_name = "Listen 5 Audio Service",
6161 .cpu_dai_name = "LSM5",
6162 .platform_name = "msm-lsm-client",
6163 .dynamic = 1,
6164 .dpcm_capture = 1,
6165 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6166 SND_SOC_DPCM_TRIGGER_POST },
6167 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6168 .ignore_suspend = 1,
6169 .codec_dai_name = "snd-soc-dummy-dai",
6170 .codec_name = "snd-soc-dummy",
6171 .id = MSM_FRONTEND_DAI_LSM5,
6172 },
6173 {/* hw:x,20 */
6174 .name = "Listen 6 Audio Service",
6175 .stream_name = "Listen 6 Audio Service",
6176 .cpu_dai_name = "LSM6",
6177 .platform_name = "msm-lsm-client",
6178 .dynamic = 1,
6179 .dpcm_capture = 1,
6180 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6181 SND_SOC_DPCM_TRIGGER_POST },
6182 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6183 .ignore_suspend = 1,
6184 .codec_dai_name = "snd-soc-dummy-dai",
6185 .codec_name = "snd-soc-dummy",
6186 .id = MSM_FRONTEND_DAI_LSM6,
6187 },
6188 {/* hw:x,21 */
6189 .name = "Listen 7 Audio Service",
6190 .stream_name = "Listen 7 Audio Service",
6191 .cpu_dai_name = "LSM7",
6192 .platform_name = "msm-lsm-client",
6193 .dynamic = 1,
6194 .dpcm_capture = 1,
6195 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6196 SND_SOC_DPCM_TRIGGER_POST },
6197 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6198 .ignore_suspend = 1,
6199 .codec_dai_name = "snd-soc-dummy-dai",
6200 .codec_name = "snd-soc-dummy",
6201 .id = MSM_FRONTEND_DAI_LSM7,
6202 },
6203 {/* hw:x,22 */
6204 .name = "Listen 8 Audio Service",
6205 .stream_name = "Listen 8 Audio Service",
6206 .cpu_dai_name = "LSM8",
6207 .platform_name = "msm-lsm-client",
6208 .dynamic = 1,
6209 .dpcm_capture = 1,
6210 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6211 SND_SOC_DPCM_TRIGGER_POST },
6212 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6213 .ignore_suspend = 1,
6214 .codec_dai_name = "snd-soc-dummy-dai",
6215 .codec_name = "snd-soc-dummy",
6216 .id = MSM_FRONTEND_DAI_LSM8,
6217 },
6218 {/* hw:x,23 */
6219 .name = MSM_DAILINK_NAME(Media9),
6220 .stream_name = "MultiMedia9",
6221 .cpu_dai_name = "MultiMedia9",
6222 .platform_name = "msm-pcm-dsp.0",
6223 .dynamic = 1,
6224 .dpcm_playback = 1,
6225 .dpcm_capture = 1,
6226 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6227 SND_SOC_DPCM_TRIGGER_POST},
6228 .codec_dai_name = "snd-soc-dummy-dai",
6229 .codec_name = "snd-soc-dummy",
6230 .ignore_suspend = 1,
6231 /* this dainlink has playback support */
6232 .ignore_pmdown_time = 1,
6233 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6234 },
6235 {/* hw:x,24 */
6236 .name = MSM_DAILINK_NAME(Compress4),
6237 .stream_name = "Compress4",
6238 .cpu_dai_name = "MultiMedia11",
6239 .platform_name = "msm-compress-dsp",
6240 .dynamic = 1,
6241 .dpcm_playback = 1,
6242 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6243 SND_SOC_DPCM_TRIGGER_POST},
6244 .codec_dai_name = "snd-soc-dummy-dai",
6245 .codec_name = "snd-soc-dummy",
6246 .ignore_suspend = 1,
6247 .ignore_pmdown_time = 1,
6248 /* this dainlink has playback support */
6249 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6250 },
6251 {/* hw:x,25 */
6252 .name = MSM_DAILINK_NAME(Compress5),
6253 .stream_name = "Compress5",
6254 .cpu_dai_name = "MultiMedia12",
6255 .platform_name = "msm-compress-dsp",
6256 .dynamic = 1,
6257 .dpcm_playback = 1,
6258 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6259 SND_SOC_DPCM_TRIGGER_POST},
6260 .codec_dai_name = "snd-soc-dummy-dai",
6261 .codec_name = "snd-soc-dummy",
6262 .ignore_suspend = 1,
6263 .ignore_pmdown_time = 1,
6264 /* this dainlink has playback support */
6265 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6266 },
6267 {/* hw:x,26 */
6268 .name = MSM_DAILINK_NAME(Compress6),
6269 .stream_name = "Compress6",
6270 .cpu_dai_name = "MultiMedia13",
6271 .platform_name = "msm-compress-dsp",
6272 .dynamic = 1,
6273 .dpcm_playback = 1,
6274 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6275 SND_SOC_DPCM_TRIGGER_POST},
6276 .codec_dai_name = "snd-soc-dummy-dai",
6277 .codec_name = "snd-soc-dummy",
6278 .ignore_suspend = 1,
6279 .ignore_pmdown_time = 1,
6280 /* this dainlink has playback support */
6281 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6282 },
6283 {/* hw:x,27 */
6284 .name = MSM_DAILINK_NAME(Compress7),
6285 .stream_name = "Compress7",
6286 .cpu_dai_name = "MultiMedia14",
6287 .platform_name = "msm-compress-dsp",
6288 .dynamic = 1,
6289 .dpcm_playback = 1,
6290 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6291 SND_SOC_DPCM_TRIGGER_POST},
6292 .codec_dai_name = "snd-soc-dummy-dai",
6293 .codec_name = "snd-soc-dummy",
6294 .ignore_suspend = 1,
6295 .ignore_pmdown_time = 1,
6296 /* this dainlink has playback support */
6297 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6298 },
6299 {/* hw:x,28 */
6300 .name = MSM_DAILINK_NAME(Compress8),
6301 .stream_name = "Compress8",
6302 .cpu_dai_name = "MultiMedia15",
6303 .platform_name = "msm-compress-dsp",
6304 .dynamic = 1,
6305 .dpcm_playback = 1,
6306 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6307 SND_SOC_DPCM_TRIGGER_POST},
6308 .codec_dai_name = "snd-soc-dummy-dai",
6309 .codec_name = "snd-soc-dummy",
6310 .ignore_suspend = 1,
6311 .ignore_pmdown_time = 1,
6312 /* this dainlink has playback support */
6313 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6314 },
6315 {/* hw:x,29 */
6316 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6317 .stream_name = "MM_NOIRQ_2",
6318 .cpu_dai_name = "MultiMedia16",
6319 .platform_name = "msm-pcm-dsp-noirq",
6320 .dynamic = 1,
6321 .dpcm_playback = 1,
6322 .dpcm_capture = 1,
6323 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6324 SND_SOC_DPCM_TRIGGER_POST},
6325 .codec_dai_name = "snd-soc-dummy-dai",
6326 .codec_name = "snd-soc-dummy",
6327 .ignore_suspend = 1,
6328 .ignore_pmdown_time = 1,
6329 /* this dainlink has playback support */
6330 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -07006331 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006332 },
6333 {/* hw:x,30 */
6334 .name = "CDC_DMA Hostless",
6335 .stream_name = "CDC_DMA Hostless",
6336 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6337 .platform_name = "msm-pcm-hostless",
6338 .dynamic = 1,
6339 .dpcm_playback = 1,
6340 .dpcm_capture = 1,
6341 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6342 SND_SOC_DPCM_TRIGGER_POST},
6343 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6344 .ignore_suspend = 1,
6345 /* this dailink has playback support */
6346 .ignore_pmdown_time = 1,
6347 .codec_dai_name = "snd-soc-dummy-dai",
6348 .codec_name = "snd-soc-dummy",
6349 },
6350 {/* hw:x,31 */
6351 .name = "TX3_CDC_DMA Hostless",
6352 .stream_name = "TX3_CDC_DMA Hostless",
6353 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6354 .platform_name = "msm-pcm-hostless",
6355 .dynamic = 1,
6356 .dpcm_capture = 1,
6357 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6358 SND_SOC_DPCM_TRIGGER_POST},
6359 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6360 .ignore_suspend = 1,
6361 .codec_dai_name = "snd-soc-dummy-dai",
6362 .codec_name = "snd-soc-dummy",
6363 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006364 {/* hw:x,32 */
6365 .name = "Tertiary MI2S TX_Hostless",
6366 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6367 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6368 .platform_name = "msm-pcm-hostless",
6369 .dynamic = 1,
6370 .dpcm_capture = 1,
6371 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6372 SND_SOC_DPCM_TRIGGER_POST},
6373 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6374 .ignore_suspend = 1,
6375 .ignore_pmdown_time = 1,
6376 .codec_dai_name = "snd-soc-dummy-dai",
6377 .codec_name = "snd-soc-dummy",
6378 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006379};
6380
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006381static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006382 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006383 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6384 .stream_name = "WSA CDC DMA0 Capture",
6385 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6386 .platform_name = "msm-pcm-hostless",
6387 .codec_name = "bolero_codec",
6388 .codec_dai_name = "wsa_macro_vifeedback",
6389 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6390 .be_hw_params_fixup = msm_be_hw_params_fixup,
6391 .ignore_suspend = 1,
6392 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6393 .ops = &msm_cdc_dma_be_ops,
6394 },
6395};
6396
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006397static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006398 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006399 .name = MSM_DAILINK_NAME(ASM Loopback),
6400 .stream_name = "MultiMedia6",
6401 .cpu_dai_name = "MultiMedia6",
6402 .platform_name = "msm-pcm-loopback",
6403 .dynamic = 1,
6404 .dpcm_playback = 1,
6405 .dpcm_capture = 1,
6406 .codec_dai_name = "snd-soc-dummy-dai",
6407 .codec_name = "snd-soc-dummy",
6408 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6409 SND_SOC_DPCM_TRIGGER_POST},
6410 .ignore_suspend = 1,
6411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6412 .ignore_pmdown_time = 1,
6413 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6414 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006415 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006416 .name = "USB Audio Hostless",
6417 .stream_name = "USB Audio Hostless",
6418 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6419 .platform_name = "msm-pcm-hostless",
6420 .dynamic = 1,
6421 .dpcm_playback = 1,
6422 .dpcm_capture = 1,
6423 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6424 SND_SOC_DPCM_TRIGGER_POST},
6425 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6426 .ignore_suspend = 1,
6427 .ignore_pmdown_time = 1,
6428 .codec_dai_name = "snd-soc-dummy-dai",
6429 .codec_name = "snd-soc-dummy",
6430 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006431 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006432 .name = "SLIMBUS_7 Hostless",
6433 .stream_name = "SLIMBUS_7 Hostless",
6434 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6435 .platform_name = "msm-pcm-hostless",
6436 .dynamic = 1,
6437 .dpcm_capture = 1,
6438 .dpcm_playback = 1,
6439 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6440 SND_SOC_DPCM_TRIGGER_POST},
6441 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6442 .ignore_suspend = 1,
6443 .ignore_pmdown_time = 1,
6444 .codec_dai_name = "snd-soc-dummy-dai",
6445 .codec_name = "snd-soc-dummy",
6446 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08006447 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006448 .name = "Compress Capture",
6449 .stream_name = "Compress9",
6450 .cpu_dai_name = "MultiMedia17",
6451 .platform_name = "msm-compress-dsp",
6452 .dynamic = 1,
6453 .dpcm_capture = 1,
6454 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6455 SND_SOC_DPCM_TRIGGER_POST},
6456 .codec_dai_name = "snd-soc-dummy-dai",
6457 .codec_name = "snd-soc-dummy",
6458 .ignore_suspend = 1,
6459 .ignore_pmdown_time = 1,
6460 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6461 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306462 {/* hw:x,38 */
6463 .name = "SLIMBUS_8 Hostless",
6464 .stream_name = "SLIMBUS_8 Hostless",
6465 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6466 .platform_name = "msm-pcm-hostless",
6467 .dynamic = 1,
6468 .dpcm_capture = 1,
6469 .dpcm_playback = 1,
6470 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6471 SND_SOC_DPCM_TRIGGER_POST},
6472 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6473 .ignore_suspend = 1,
6474 .ignore_pmdown_time = 1,
6475 .codec_dai_name = "snd-soc-dummy-dai",
6476 .codec_name = "snd-soc-dummy",
6477 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -07006478 {/* hw:x,39 */
6479 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6480 .stream_name = "TX CDC DMA5 Capture",
6481 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6482 .platform_name = "msm-pcm-hostless",
6483 .codec_name = "bolero_codec",
6484 .codec_dai_name = "tx_macro_tx3",
6485 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6486 .be_hw_params_fixup = msm_be_hw_params_fixup,
6487 .ignore_suspend = 1,
6488 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6489 .ops = &msm_cdc_dma_be_ops,
6490 },
lintaopeie0a48bc2020-12-11 11:13:13 +08006491#if defined(CONFIG_SND_SMARTPA_AW882XX)
6492 {
6493 .name = "Quinary MI2S RX_Hostless",
6494 .stream_name = "Quinary MI2S_RX Hostless Playback",
6495 .cpu_dai_name = "QUIN_MI2S_RX_HOSTLESS",
6496 .platform_name = "msm-pcm-hostless",
6497 .dynamic = 1,
6498 .dpcm_playback = 1,
6499 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6500 SND_SOC_DPCM_TRIGGER_POST},
6501 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6502 .ignore_suspend = 1,
6503 .ignore_pmdown_time = 1,
6504 .codec_dai_name = "snd-soc-dummy-dai",
6505 .codec_name = "snd-soc-dummy",
6506 },
6507 {
6508 .name = "Quinary MI2S TX_Hostless",
6509 .stream_name = "Quinary MI2S_TX Hostless Capture",
6510 .cpu_dai_name = "QUIN_MI2S_TX_HOSTLESS",
6511 .platform_name = "msm-pcm-hostless",
6512 .dynamic = 1,
6513 .dpcm_capture = 1,
6514 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6515 SND_SOC_DPCM_TRIGGER_POST},
6516 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6517 .ignore_suspend = 1,
6518 .ignore_pmdown_time = 1,
6519 .codec_dai_name = "snd-soc-dummy-dai",
6520 .codec_name = "snd-soc-dummy",
6521 },
6522#endif
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006523};
6524
6525static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6526 /* Backend AFE DAI Links */
6527 {
6528 .name = LPASS_BE_AFE_PCM_RX,
6529 .stream_name = "AFE Playback",
6530 .cpu_dai_name = "msm-dai-q6-dev.224",
6531 .platform_name = "msm-pcm-routing",
6532 .codec_name = "msm-stub-codec.1",
6533 .codec_dai_name = "msm-stub-rx",
6534 .no_pcm = 1,
6535 .dpcm_playback = 1,
6536 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6537 .be_hw_params_fixup = msm_be_hw_params_fixup,
6538 /* this dainlink has playback support */
6539 .ignore_pmdown_time = 1,
6540 .ignore_suspend = 1,
6541 },
6542 {
6543 .name = LPASS_BE_AFE_PCM_TX,
6544 .stream_name = "AFE Capture",
6545 .cpu_dai_name = "msm-dai-q6-dev.225",
6546 .platform_name = "msm-pcm-routing",
6547 .codec_name = "msm-stub-codec.1",
6548 .codec_dai_name = "msm-stub-tx",
6549 .no_pcm = 1,
6550 .dpcm_capture = 1,
6551 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6552 .be_hw_params_fixup = msm_be_hw_params_fixup,
6553 .ignore_suspend = 1,
6554 },
6555 /* Incall Record Uplink BACK END DAI Link */
6556 {
6557 .name = LPASS_BE_INCALL_RECORD_TX,
6558 .stream_name = "Voice Uplink Capture",
6559 .cpu_dai_name = "msm-dai-q6-dev.32772",
6560 .platform_name = "msm-pcm-routing",
6561 .codec_name = "msm-stub-codec.1",
6562 .codec_dai_name = "msm-stub-tx",
6563 .no_pcm = 1,
6564 .dpcm_capture = 1,
6565 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6566 .be_hw_params_fixup = msm_be_hw_params_fixup,
6567 .ignore_suspend = 1,
6568 },
6569 /* Incall Record Downlink BACK END DAI Link */
6570 {
6571 .name = LPASS_BE_INCALL_RECORD_RX,
6572 .stream_name = "Voice Downlink Capture",
6573 .cpu_dai_name = "msm-dai-q6-dev.32771",
6574 .platform_name = "msm-pcm-routing",
6575 .codec_name = "msm-stub-codec.1",
6576 .codec_dai_name = "msm-stub-tx",
6577 .no_pcm = 1,
6578 .dpcm_capture = 1,
6579 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6580 .be_hw_params_fixup = msm_be_hw_params_fixup,
6581 .ignore_suspend = 1,
6582 },
6583 /* Incall Music BACK END DAI Link */
6584 {
6585 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6586 .stream_name = "Voice Farend Playback",
6587 .cpu_dai_name = "msm-dai-q6-dev.32773",
6588 .platform_name = "msm-pcm-routing",
6589 .codec_name = "msm-stub-codec.1",
6590 .codec_dai_name = "msm-stub-rx",
6591 .no_pcm = 1,
6592 .dpcm_playback = 1,
6593 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6594 .be_hw_params_fixup = msm_be_hw_params_fixup,
6595 .ignore_suspend = 1,
6596 .ignore_pmdown_time = 1,
6597 },
6598 /* Incall Music 2 BACK END DAI Link */
6599 {
6600 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6601 .stream_name = "Voice2 Farend Playback",
6602 .cpu_dai_name = "msm-dai-q6-dev.32770",
6603 .platform_name = "msm-pcm-routing",
6604 .codec_name = "msm-stub-codec.1",
6605 .codec_dai_name = "msm-stub-rx",
6606 .no_pcm = 1,
6607 .dpcm_playback = 1,
6608 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6609 .be_hw_params_fixup = msm_be_hw_params_fixup,
6610 .ignore_suspend = 1,
6611 .ignore_pmdown_time = 1,
6612 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +05306613 /* Proxy Tx BACK END DAI Link */
6614 {
6615 .name = LPASS_BE_PROXY_TX,
6616 .stream_name = "Proxy Capture",
6617 .cpu_dai_name = "msm-dai-q6-dev.8195",
6618 .platform_name = "msm-pcm-routing",
6619 .codec_name = "msm-stub-codec.1",
6620 .codec_dai_name = "msm-stub-tx",
6621 .no_pcm = 1,
6622 .dpcm_capture = 1,
6623 .id = MSM_BACKEND_DAI_PROXY_TX,
6624 .ignore_suspend = 1,
6625 },
6626 /* Proxy Rx BACK END DAI Link */
6627 {
6628 .name = LPASS_BE_PROXY_RX,
6629 .stream_name = "Proxy Playback",
6630 .cpu_dai_name = "msm-dai-q6-dev.8194",
6631 .platform_name = "msm-pcm-routing",
6632 .codec_name = "msm-stub-codec.1",
6633 .codec_dai_name = "msm-stub-rx",
6634 .no_pcm = 1,
6635 .dpcm_playback = 1,
6636 .id = MSM_BACKEND_DAI_PROXY_RX,
6637 .ignore_pmdown_time = 1,
6638 .ignore_suspend = 1,
6639 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006640 {
6641 .name = LPASS_BE_USB_AUDIO_RX,
6642 .stream_name = "USB Audio Playback",
6643 .cpu_dai_name = "msm-dai-q6-dev.28672",
6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "msm-stub-codec.1",
6646 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306647 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006648 .no_pcm = 1,
6649 .dpcm_playback = 1,
6650 .id = MSM_BACKEND_DAI_USB_RX,
6651 .be_hw_params_fixup = msm_be_hw_params_fixup,
6652 .ignore_pmdown_time = 1,
6653 .ignore_suspend = 1,
6654 },
6655 {
6656 .name = LPASS_BE_USB_AUDIO_TX,
6657 .stream_name = "USB Audio Capture",
6658 .cpu_dai_name = "msm-dai-q6-dev.28673",
6659 .platform_name = "msm-pcm-routing",
6660 .codec_name = "msm-stub-codec.1",
6661 .codec_dai_name = "msm-stub-tx",
6662 .no_pcm = 1,
6663 .dpcm_capture = 1,
6664 .id = MSM_BACKEND_DAI_USB_TX,
6665 .be_hw_params_fixup = msm_be_hw_params_fixup,
6666 .ignore_suspend = 1,
6667 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05306668};
6669
6670
6671static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006672 {
6673 .name = LPASS_BE_PRI_TDM_RX_0,
6674 .stream_name = "Primary TDM0 Playback",
6675 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6676 .platform_name = "msm-pcm-routing",
6677 .codec_name = "msm-stub-codec.1",
6678 .codec_dai_name = "msm-stub-rx",
6679 .no_pcm = 1,
6680 .dpcm_playback = 1,
6681 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6682 .be_hw_params_fixup = msm_be_hw_params_fixup,
6683 .ops = &kona_tdm_be_ops,
6684 .ignore_suspend = 1,
6685 .ignore_pmdown_time = 1,
6686 },
6687 {
6688 .name = LPASS_BE_PRI_TDM_TX_0,
6689 .stream_name = "Primary TDM0 Capture",
6690 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6691 .platform_name = "msm-pcm-routing",
6692 .codec_name = "msm-stub-codec.1",
6693 .codec_dai_name = "msm-stub-tx",
6694 .no_pcm = 1,
6695 .dpcm_capture = 1,
6696 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6697 .be_hw_params_fixup = msm_be_hw_params_fixup,
6698 .ops = &kona_tdm_be_ops,
6699 .ignore_suspend = 1,
6700 },
6701 {
6702 .name = LPASS_BE_SEC_TDM_RX_0,
6703 .stream_name = "Secondary TDM0 Playback",
6704 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6705 .platform_name = "msm-pcm-routing",
6706 .codec_name = "msm-stub-codec.1",
6707 .codec_dai_name = "msm-stub-rx",
6708 .no_pcm = 1,
6709 .dpcm_playback = 1,
6710 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6711 .be_hw_params_fixup = msm_be_hw_params_fixup,
6712 .ops = &kona_tdm_be_ops,
6713 .ignore_suspend = 1,
6714 .ignore_pmdown_time = 1,
6715 },
6716 {
6717 .name = LPASS_BE_SEC_TDM_TX_0,
6718 .stream_name = "Secondary TDM0 Capture",
6719 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6720 .platform_name = "msm-pcm-routing",
6721 .codec_name = "msm-stub-codec.1",
6722 .codec_dai_name = "msm-stub-tx",
6723 .no_pcm = 1,
6724 .dpcm_capture = 1,
6725 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6726 .be_hw_params_fixup = msm_be_hw_params_fixup,
6727 .ops = &kona_tdm_be_ops,
6728 .ignore_suspend = 1,
6729 },
6730 {
6731 .name = LPASS_BE_TERT_TDM_RX_0,
6732 .stream_name = "Tertiary TDM0 Playback",
6733 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6734 .platform_name = "msm-pcm-routing",
6735 .codec_name = "msm-stub-codec.1",
6736 .codec_dai_name = "msm-stub-rx",
6737 .no_pcm = 1,
6738 .dpcm_playback = 1,
6739 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6740 .be_hw_params_fixup = msm_be_hw_params_fixup,
6741 .ops = &kona_tdm_be_ops,
6742 .ignore_suspend = 1,
6743 .ignore_pmdown_time = 1,
6744 },
6745 {
6746 .name = LPASS_BE_TERT_TDM_TX_0,
6747 .stream_name = "Tertiary TDM0 Capture",
6748 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6749 .platform_name = "msm-pcm-routing",
6750 .codec_name = "msm-stub-codec.1",
6751 .codec_dai_name = "msm-stub-tx",
6752 .no_pcm = 1,
6753 .dpcm_capture = 1,
6754 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6755 .be_hw_params_fixup = msm_be_hw_params_fixup,
6756 .ops = &kona_tdm_be_ops,
6757 .ignore_suspend = 1,
6758 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006759 {
6760 .name = LPASS_BE_QUAT_TDM_RX_0,
6761 .stream_name = "Quaternary TDM0 Playback",
6762 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6763 .platform_name = "msm-pcm-routing",
6764 .codec_name = "msm-stub-codec.1",
6765 .codec_dai_name = "msm-stub-rx",
6766 .no_pcm = 1,
6767 .dpcm_playback = 1,
6768 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6769 .be_hw_params_fixup = msm_be_hw_params_fixup,
6770 .ops = &kona_tdm_be_ops,
6771 .ignore_suspend = 1,
6772 .ignore_pmdown_time = 1,
6773 },
6774 {
6775 .name = LPASS_BE_QUAT_TDM_TX_0,
6776 .stream_name = "Quaternary TDM0 Capture",
6777 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6778 .platform_name = "msm-pcm-routing",
6779 .codec_name = "msm-stub-codec.1",
6780 .codec_dai_name = "msm-stub-tx",
6781 .no_pcm = 1,
6782 .dpcm_capture = 1,
6783 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6784 .be_hw_params_fixup = msm_be_hw_params_fixup,
6785 .ops = &kona_tdm_be_ops,
6786 .ignore_suspend = 1,
6787 },
6788 {
6789 .name = LPASS_BE_QUIN_TDM_RX_0,
6790 .stream_name = "Quinary TDM0 Playback",
6791 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6792 .platform_name = "msm-pcm-routing",
6793 .codec_name = "msm-stub-codec.1",
6794 .codec_dai_name = "msm-stub-rx",
6795 .no_pcm = 1,
6796 .dpcm_playback = 1,
6797 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6798 .be_hw_params_fixup = msm_be_hw_params_fixup,
6799 .ops = &kona_tdm_be_ops,
6800 .ignore_suspend = 1,
6801 .ignore_pmdown_time = 1,
6802 },
6803 {
6804 .name = LPASS_BE_QUIN_TDM_TX_0,
6805 .stream_name = "Quinary TDM0 Capture",
6806 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6807 .platform_name = "msm-pcm-routing",
6808 .codec_name = "msm-stub-codec.1",
6809 .codec_dai_name = "msm-stub-tx",
6810 .no_pcm = 1,
6811 .dpcm_capture = 1,
6812 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6813 .be_hw_params_fixup = msm_be_hw_params_fixup,
6814 .ops = &kona_tdm_be_ops,
6815 .ignore_suspend = 1,
6816 },
6817 {
6818 .name = LPASS_BE_SEN_TDM_RX_0,
6819 .stream_name = "Senary TDM0 Playback",
6820 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6821 .platform_name = "msm-pcm-routing",
6822 .codec_name = "msm-stub-codec.1",
6823 .codec_dai_name = "msm-stub-rx",
6824 .no_pcm = 1,
6825 .dpcm_playback = 1,
6826 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6827 .be_hw_params_fixup = msm_be_hw_params_fixup,
6828 .ops = &kona_tdm_be_ops,
6829 .ignore_suspend = 1,
6830 .ignore_pmdown_time = 1,
6831 },
6832 {
6833 .name = LPASS_BE_SEN_TDM_TX_0,
6834 .stream_name = "Senary TDM0 Capture",
6835 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6836 .platform_name = "msm-pcm-routing",
6837 .codec_name = "msm-stub-codec.1",
6838 .codec_dai_name = "msm-stub-tx",
6839 .no_pcm = 1,
6840 .dpcm_capture = 1,
6841 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6842 .be_hw_params_fixup = msm_be_hw_params_fixup,
6843 .ops = &kona_tdm_be_ops,
6844 .ignore_suspend = 1,
6845 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006846};
6847
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006848static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6849 {
6850 .name = LPASS_BE_SLIMBUS_7_RX,
6851 .stream_name = "Slimbus7 Playback",
6852 .cpu_dai_name = "msm-dai-q6-dev.16398",
6853 .platform_name = "msm-pcm-routing",
6854 .codec_name = "btfmslim_slave",
6855 /* BT codec driver determines capabilities based on
6856 * dai name, bt codecdai name should always contains
6857 * supported usecase information
6858 */
6859 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6860 .no_pcm = 1,
6861 .dpcm_playback = 1,
6862 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6863 .be_hw_params_fixup = msm_be_hw_params_fixup,
6864 .init = &msm_wcn_init,
6865 .ops = &msm_wcn_ops,
6866 /* dai link has playback support */
6867 .ignore_pmdown_time = 1,
6868 .ignore_suspend = 1,
6869 },
6870 {
6871 .name = LPASS_BE_SLIMBUS_7_TX,
6872 .stream_name = "Slimbus7 Capture",
6873 .cpu_dai_name = "msm-dai-q6-dev.16399",
6874 .platform_name = "msm-pcm-routing",
6875 .codec_name = "btfmslim_slave",
6876 .codec_dai_name = "btfm_bt_sco_slim_tx",
6877 .no_pcm = 1,
6878 .dpcm_capture = 1,
6879 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6880 .be_hw_params_fixup = msm_be_hw_params_fixup,
6881 .ops = &msm_wcn_ops,
6882 .ignore_suspend = 1,
6883 },
6884};
6885
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306886static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6887 {
6888 .name = LPASS_BE_SLIMBUS_7_RX,
6889 .stream_name = "Slimbus7 Playback",
6890 .cpu_dai_name = "msm-dai-q6-dev.16398",
6891 .platform_name = "msm-pcm-routing",
6892 .codec_name = "btfmslim_slave",
6893 /* BT codec driver determines capabilities based on
6894 * dai name, bt codecdai name should always contains
6895 * supported usecase information
6896 */
6897 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6898 .no_pcm = 1,
6899 .dpcm_playback = 1,
6900 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6901 .be_hw_params_fixup = msm_be_hw_params_fixup,
6902 .init = &msm_wcn_init_lito,
6903 .ops = &msm_wcn_ops_lito,
6904 /* dai link has playback support */
6905 .ignore_pmdown_time = 1,
6906 .ignore_suspend = 1,
6907 },
6908 {
6909 .name = LPASS_BE_SLIMBUS_7_TX,
6910 .stream_name = "Slimbus7 Capture",
6911 .cpu_dai_name = "msm-dai-q6-dev.16399",
6912 .platform_name = "msm-pcm-routing",
6913 .codec_name = "btfmslim_slave",
6914 .codec_dai_name = "btfm_bt_sco_slim_tx",
6915 .no_pcm = 1,
6916 .dpcm_capture = 1,
6917 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6918 .be_hw_params_fixup = msm_be_hw_params_fixup,
6919 .ops = &msm_wcn_ops_lito,
6920 .ignore_suspend = 1,
6921 },
6922 {
6923 .name = LPASS_BE_SLIMBUS_8_TX,
6924 .stream_name = "Slimbus8 Capture",
6925 .cpu_dai_name = "msm-dai-q6-dev.16401",
6926 .platform_name = "msm-pcm-routing",
6927 .codec_name = "btfmslim_slave",
6928 .codec_dai_name = "btfm_fm_slim_tx",
6929 .no_pcm = 1,
6930 .dpcm_capture = 1,
6931 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6932 .be_hw_params_fixup = msm_be_hw_params_fixup,
6933 .ops = &msm_wcn_ops_lito,
6934 .ignore_suspend = 1,
6935 },
6936};
6937
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006938static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6939 /* DISP PORT BACK END DAI Link */
6940 {
6941 .name = LPASS_BE_DISPLAY_PORT,
6942 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006943 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006944 .platform_name = "msm-pcm-routing",
6945 .codec_name = "msm-ext-disp-audio-codec-rx",
6946 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6947 .no_pcm = 1,
6948 .dpcm_playback = 1,
6949 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6950 .be_hw_params_fixup = msm_be_hw_params_fixup,
6951 .ignore_pmdown_time = 1,
6952 .ignore_suspend = 1,
6953 },
6954 /* DISP PORT 1 BACK END DAI Link */
6955 {
6956 .name = LPASS_BE_DISPLAY_PORT1,
6957 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006958 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006959 .platform_name = "msm-pcm-routing",
6960 .codec_name = "msm-ext-disp-audio-codec-rx",
6961 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6962 .no_pcm = 1,
6963 .dpcm_playback = 1,
6964 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6965 .be_hw_params_fixup = msm_be_hw_params_fixup,
6966 .ignore_pmdown_time = 1,
6967 .ignore_suspend = 1,
6968 },
6969};
6970
lintaopeie0a48bc2020-12-11 11:13:13 +08006971#if defined(CONFIG_SND_SMARTPA_AW882XX)
6972struct snd_soc_dai_link_component awinic_codecs[] = {
6973 {
6974 .of_node = NULL,
6975 .dai_name = "aw882xx-aif-l",
6976 .name = "aw882xx_smartpa_l",
6977 },
6978 {
6979 .of_node = NULL,
6980 .dai_name = "aw882xx-aif-r",
6981 .name = "aw882xx_smartpa_r",
6982 },
6983};
6984#endif
6985
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006986static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6987 {
6988 .name = LPASS_BE_PRI_MI2S_RX,
6989 .stream_name = "Primary MI2S Playback",
6990 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6991 .platform_name = "msm-pcm-routing",
6992 .codec_name = "msm-stub-codec.1",
6993 .codec_dai_name = "msm-stub-rx",
6994 .no_pcm = 1,
6995 .dpcm_playback = 1,
6996 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6997 .be_hw_params_fixup = msm_be_hw_params_fixup,
6998 .ops = &msm_mi2s_be_ops,
6999 .ignore_suspend = 1,
7000 .ignore_pmdown_time = 1,
7001 },
7002 {
7003 .name = LPASS_BE_PRI_MI2S_TX,
7004 .stream_name = "Primary MI2S Capture",
7005 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7006 .platform_name = "msm-pcm-routing",
7007 .codec_name = "msm-stub-codec.1",
7008 .codec_dai_name = "msm-stub-tx",
7009 .no_pcm = 1,
7010 .dpcm_capture = 1,
7011 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7012 .be_hw_params_fixup = msm_be_hw_params_fixup,
7013 .ops = &msm_mi2s_be_ops,
7014 .ignore_suspend = 1,
7015 },
7016 {
7017 .name = LPASS_BE_SEC_MI2S_RX,
7018 .stream_name = "Secondary MI2S Playback",
7019 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7020 .platform_name = "msm-pcm-routing",
7021 .codec_name = "msm-stub-codec.1",
7022 .codec_dai_name = "msm-stub-rx",
7023 .no_pcm = 1,
7024 .dpcm_playback = 1,
7025 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7026 .be_hw_params_fixup = msm_be_hw_params_fixup,
7027 .ops = &msm_mi2s_be_ops,
7028 .ignore_suspend = 1,
7029 .ignore_pmdown_time = 1,
7030 },
7031 {
7032 .name = LPASS_BE_SEC_MI2S_TX,
7033 .stream_name = "Secondary MI2S Capture",
7034 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7035 .platform_name = "msm-pcm-routing",
7036 .codec_name = "msm-stub-codec.1",
7037 .codec_dai_name = "msm-stub-tx",
7038 .no_pcm = 1,
7039 .dpcm_capture = 1,
7040 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7041 .be_hw_params_fixup = msm_be_hw_params_fixup,
7042 .ops = &msm_mi2s_be_ops,
7043 .ignore_suspend = 1,
7044 },
7045 {
7046 .name = LPASS_BE_TERT_MI2S_RX,
7047 .stream_name = "Tertiary MI2S Playback",
7048 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7049 .platform_name = "msm-pcm-routing",
7050 .codec_name = "msm-stub-codec.1",
7051 .codec_dai_name = "msm-stub-rx",
7052 .no_pcm = 1,
7053 .dpcm_playback = 1,
7054 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7055 .be_hw_params_fixup = msm_be_hw_params_fixup,
7056 .ops = &msm_mi2s_be_ops,
7057 .ignore_suspend = 1,
7058 .ignore_pmdown_time = 1,
7059 },
7060 {
7061 .name = LPASS_BE_TERT_MI2S_TX,
7062 .stream_name = "Tertiary MI2S Capture",
7063 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7064 .platform_name = "msm-pcm-routing",
7065 .codec_name = "msm-stub-codec.1",
7066 .codec_dai_name = "msm-stub-tx",
7067 .no_pcm = 1,
7068 .dpcm_capture = 1,
7069 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7070 .be_hw_params_fixup = msm_be_hw_params_fixup,
7071 .ops = &msm_mi2s_be_ops,
7072 .ignore_suspend = 1,
7073 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007074 {
7075 .name = LPASS_BE_QUAT_MI2S_RX,
7076 .stream_name = "Quaternary MI2S Playback",
7077 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7078 .platform_name = "msm-pcm-routing",
7079 .codec_name = "msm-stub-codec.1",
7080 .codec_dai_name = "msm-stub-rx",
7081 .no_pcm = 1,
7082 .dpcm_playback = 1,
7083 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7084 .be_hw_params_fixup = msm_be_hw_params_fixup,
7085 .ops = &msm_mi2s_be_ops,
7086 .ignore_suspend = 1,
7087 .ignore_pmdown_time = 1,
7088 },
7089 {
7090 .name = LPASS_BE_QUAT_MI2S_TX,
7091 .stream_name = "Quaternary MI2S Capture",
7092 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7093 .platform_name = "msm-pcm-routing",
7094 .codec_name = "msm-stub-codec.1",
7095 .codec_dai_name = "msm-stub-tx",
7096 .no_pcm = 1,
7097 .dpcm_capture = 1,
7098 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7099 .be_hw_params_fixup = msm_be_hw_params_fixup,
7100 .ops = &msm_mi2s_be_ops,
7101 .ignore_suspend = 1,
7102 },
7103 {
7104 .name = LPASS_BE_QUIN_MI2S_RX,
7105 .stream_name = "Quinary MI2S Playback",
7106 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7107 .platform_name = "msm-pcm-routing",
lintaopeie0a48bc2020-12-11 11:13:13 +08007108#ifdef CONFIG_SND_SMARTPA_AW882XX
7109 .num_codecs = ARRAY_SIZE(awinic_codecs),
7110 .codecs = awinic_codecs,
7111#else
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007112 .codec_name = "msm-stub-codec.1",
7113 .codec_dai_name = "msm-stub-rx",
lintaopeie0a48bc2020-12-11 11:13:13 +08007114#endif
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007115 .no_pcm = 1,
7116 .dpcm_playback = 1,
7117 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7118 .be_hw_params_fixup = msm_be_hw_params_fixup,
7119 .ops = &msm_mi2s_be_ops,
7120 .ignore_suspend = 1,
7121 .ignore_pmdown_time = 1,
7122 },
7123 {
7124 .name = LPASS_BE_QUIN_MI2S_TX,
7125 .stream_name = "Quinary MI2S Capture",
7126 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7127 .platform_name = "msm-pcm-routing",
lintaopeie0a48bc2020-12-11 11:13:13 +08007128#ifdef CONFIG_SND_SMARTPA_AW882XX
7129 .num_codecs = ARRAY_SIZE(awinic_codecs),
7130 .codecs = awinic_codecs,
7131#else
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007132 .codec_name = "msm-stub-codec.1",
7133 .codec_dai_name = "msm-stub-tx",
lintaopeie0a48bc2020-12-11 11:13:13 +08007134#endif
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007135 .no_pcm = 1,
7136 .dpcm_capture = 1,
7137 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7138 .be_hw_params_fixup = msm_be_hw_params_fixup,
7139 .ops = &msm_mi2s_be_ops,
7140 .ignore_suspend = 1,
7141 },
7142 {
7143 .name = LPASS_BE_SENARY_MI2S_RX,
7144 .stream_name = "Senary MI2S Playback",
7145 .cpu_dai_name = "msm-dai-q6-mi2s.5",
7146 .platform_name = "msm-pcm-routing",
7147 .codec_name = "msm-stub-codec.1",
7148 .codec_dai_name = "msm-stub-rx",
7149 .no_pcm = 1,
7150 .dpcm_playback = 1,
7151 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
7152 .be_hw_params_fixup = msm_be_hw_params_fixup,
7153 .ops = &msm_mi2s_be_ops,
7154 .ignore_suspend = 1,
7155 .ignore_pmdown_time = 1,
7156 },
7157 {
7158 .name = LPASS_BE_SENARY_MI2S_TX,
7159 .stream_name = "Senary MI2S Capture",
7160 .cpu_dai_name = "msm-dai-q6-mi2s.5",
7161 .platform_name = "msm-pcm-routing",
7162 .codec_name = "msm-stub-codec.1",
7163 .codec_dai_name = "msm-stub-tx",
7164 .no_pcm = 1,
7165 .dpcm_capture = 1,
7166 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
7167 .be_hw_params_fixup = msm_be_hw_params_fixup,
7168 .ops = &msm_mi2s_be_ops,
7169 .ignore_suspend = 1,
7170 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007171};
7172
7173static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7174 /* Primary AUX PCM Backend DAI Links */
7175 {
7176 .name = LPASS_BE_AUXPCM_RX,
7177 .stream_name = "AUX PCM Playback",
7178 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7179 .platform_name = "msm-pcm-routing",
7180 .codec_name = "msm-stub-codec.1",
7181 .codec_dai_name = "msm-stub-rx",
7182 .no_pcm = 1,
7183 .dpcm_playback = 1,
7184 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7185 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007186 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007187 .ignore_pmdown_time = 1,
7188 .ignore_suspend = 1,
7189 },
7190 {
7191 .name = LPASS_BE_AUXPCM_TX,
7192 .stream_name = "AUX PCM Capture",
7193 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7194 .platform_name = "msm-pcm-routing",
7195 .codec_name = "msm-stub-codec.1",
7196 .codec_dai_name = "msm-stub-tx",
7197 .no_pcm = 1,
7198 .dpcm_capture = 1,
7199 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7200 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007201 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007202 .ignore_suspend = 1,
7203 },
7204 /* Secondary AUX PCM Backend DAI Links */
7205 {
7206 .name = LPASS_BE_SEC_AUXPCM_RX,
7207 .stream_name = "Sec AUX PCM Playback",
7208 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7209 .platform_name = "msm-pcm-routing",
7210 .codec_name = "msm-stub-codec.1",
7211 .codec_dai_name = "msm-stub-rx",
7212 .no_pcm = 1,
7213 .dpcm_playback = 1,
7214 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7215 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007216 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007217 .ignore_pmdown_time = 1,
7218 .ignore_suspend = 1,
7219 },
7220 {
7221 .name = LPASS_BE_SEC_AUXPCM_TX,
7222 .stream_name = "Sec AUX PCM Capture",
7223 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7224 .platform_name = "msm-pcm-routing",
7225 .codec_name = "msm-stub-codec.1",
7226 .codec_dai_name = "msm-stub-tx",
7227 .no_pcm = 1,
7228 .dpcm_capture = 1,
7229 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7230 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007231 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007232 .ignore_suspend = 1,
7233 },
7234 /* Tertiary AUX PCM Backend DAI Links */
7235 {
7236 .name = LPASS_BE_TERT_AUXPCM_RX,
7237 .stream_name = "Tert AUX PCM Playback",
7238 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7239 .platform_name = "msm-pcm-routing",
7240 .codec_name = "msm-stub-codec.1",
7241 .codec_dai_name = "msm-stub-rx",
7242 .no_pcm = 1,
7243 .dpcm_playback = 1,
7244 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7245 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007246 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007247 .ignore_suspend = 1,
7248 },
7249 {
7250 .name = LPASS_BE_TERT_AUXPCM_TX,
7251 .stream_name = "Tert AUX PCM Capture",
7252 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7253 .platform_name = "msm-pcm-routing",
7254 .codec_name = "msm-stub-codec.1",
7255 .codec_dai_name = "msm-stub-tx",
7256 .no_pcm = 1,
7257 .dpcm_capture = 1,
7258 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7259 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007260 .ops = &kona_aux_be_ops,
7261 .ignore_suspend = 1,
7262 },
7263 /* Quaternary AUX PCM Backend DAI Links */
7264 {
7265 .name = LPASS_BE_QUAT_AUXPCM_RX,
7266 .stream_name = "Quat AUX PCM Playback",
7267 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7268 .platform_name = "msm-pcm-routing",
7269 .codec_name = "msm-stub-codec.1",
7270 .codec_dai_name = "msm-stub-rx",
7271 .no_pcm = 1,
7272 .dpcm_playback = 1,
7273 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7274 .be_hw_params_fixup = msm_be_hw_params_fixup,
7275 .ops = &kona_aux_be_ops,
7276 .ignore_suspend = 1,
7277 },
7278 {
7279 .name = LPASS_BE_QUAT_AUXPCM_TX,
7280 .stream_name = "Quat AUX PCM Capture",
7281 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7282 .platform_name = "msm-pcm-routing",
7283 .codec_name = "msm-stub-codec.1",
7284 .codec_dai_name = "msm-stub-tx",
7285 .no_pcm = 1,
7286 .dpcm_capture = 1,
7287 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7288 .be_hw_params_fixup = msm_be_hw_params_fixup,
7289 .ops = &kona_aux_be_ops,
7290 .ignore_suspend = 1,
7291 },
7292 /* Quinary AUX PCM Backend DAI Links */
7293 {
7294 .name = LPASS_BE_QUIN_AUXPCM_RX,
7295 .stream_name = "Quin AUX PCM Playback",
7296 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7297 .platform_name = "msm-pcm-routing",
7298 .codec_name = "msm-stub-codec.1",
7299 .codec_dai_name = "msm-stub-rx",
7300 .no_pcm = 1,
7301 .dpcm_playback = 1,
7302 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7303 .be_hw_params_fixup = msm_be_hw_params_fixup,
7304 .ops = &kona_aux_be_ops,
7305 .ignore_suspend = 1,
7306 },
7307 {
7308 .name = LPASS_BE_QUIN_AUXPCM_TX,
7309 .stream_name = "Quin AUX PCM Capture",
7310 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7311 .platform_name = "msm-pcm-routing",
7312 .codec_name = "msm-stub-codec.1",
7313 .codec_dai_name = "msm-stub-tx",
7314 .no_pcm = 1,
7315 .dpcm_capture = 1,
7316 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7317 .be_hw_params_fixup = msm_be_hw_params_fixup,
7318 .ops = &kona_aux_be_ops,
7319 .ignore_suspend = 1,
7320 },
7321 /* Senary AUX PCM Backend DAI Links */
7322 {
7323 .name = LPASS_BE_SEN_AUXPCM_RX,
7324 .stream_name = "Sen AUX PCM Playback",
7325 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7326 .platform_name = "msm-pcm-routing",
7327 .codec_name = "msm-stub-codec.1",
7328 .codec_dai_name = "msm-stub-rx",
7329 .no_pcm = 1,
7330 .dpcm_playback = 1,
7331 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
7332 .be_hw_params_fixup = msm_be_hw_params_fixup,
7333 .ops = &kona_aux_be_ops,
7334 .ignore_suspend = 1,
7335 },
7336 {
7337 .name = LPASS_BE_SEN_AUXPCM_TX,
7338 .stream_name = "Sen AUX PCM Capture",
7339 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7340 .platform_name = "msm-pcm-routing",
7341 .codec_name = "msm-stub-codec.1",
7342 .codec_dai_name = "msm-stub-tx",
7343 .no_pcm = 1,
7344 .dpcm_capture = 1,
7345 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
7346 .be_hw_params_fixup = msm_be_hw_params_fixup,
7347 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007348 .ignore_suspend = 1,
7349 },
7350};
7351
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007352static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7353 /* WSA CDC DMA Backend DAI Links */
7354 {
7355 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7356 .stream_name = "WSA CDC DMA0 Playback",
7357 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7358 .platform_name = "msm-pcm-routing",
7359 .codec_name = "bolero_codec",
7360 .codec_dai_name = "wsa_macro_rx1",
7361 .no_pcm = 1,
7362 .dpcm_playback = 1,
7363 .init = &msm_int_audrx_init,
7364 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7365 .be_hw_params_fixup = msm_be_hw_params_fixup,
7366 .ignore_pmdown_time = 1,
7367 .ignore_suspend = 1,
7368 .ops = &msm_cdc_dma_be_ops,
7369 },
7370 {
7371 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7372 .stream_name = "WSA CDC DMA1 Playback",
7373 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7374 .platform_name = "msm-pcm-routing",
7375 .codec_name = "bolero_codec",
7376 .codec_dai_name = "wsa_macro_rx_mix",
7377 .no_pcm = 1,
7378 .dpcm_playback = 1,
7379 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7380 .be_hw_params_fixup = msm_be_hw_params_fixup,
7381 .ignore_pmdown_time = 1,
7382 .ignore_suspend = 1,
7383 .ops = &msm_cdc_dma_be_ops,
7384 },
7385 {
7386 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7387 .stream_name = "WSA CDC DMA1 Capture",
7388 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7389 .platform_name = "msm-pcm-routing",
7390 .codec_name = "bolero_codec",
7391 .codec_dai_name = "wsa_macro_echo",
7392 .no_pcm = 1,
7393 .dpcm_capture = 1,
7394 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7395 .be_hw_params_fixup = msm_be_hw_params_fixup,
7396 .ignore_suspend = 1,
7397 .ops = &msm_cdc_dma_be_ops,
7398 },
7399};
7400
7401static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7402 /* RX CDC DMA Backend DAI Links */
7403 {
7404 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7405 .stream_name = "RX CDC DMA0 Playback",
7406 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7407 .platform_name = "msm-pcm-routing",
7408 .codec_name = "bolero_codec",
7409 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307410 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007411 .no_pcm = 1,
7412 .dpcm_playback = 1,
7413 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7414 .be_hw_params_fixup = msm_be_hw_params_fixup,
7415 .ignore_pmdown_time = 1,
7416 .ignore_suspend = 1,
7417 .ops = &msm_cdc_dma_be_ops,
7418 },
7419 {
7420 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7421 .stream_name = "RX CDC DMA1 Playback",
7422 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7423 .platform_name = "msm-pcm-routing",
7424 .codec_name = "bolero_codec",
7425 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307426 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007427 .no_pcm = 1,
7428 .dpcm_playback = 1,
7429 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7430 .be_hw_params_fixup = msm_be_hw_params_fixup,
7431 .ignore_pmdown_time = 1,
7432 .ignore_suspend = 1,
7433 .ops = &msm_cdc_dma_be_ops,
7434 },
7435 {
7436 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7437 .stream_name = "RX CDC DMA2 Playback",
7438 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7439 .platform_name = "msm-pcm-routing",
7440 .codec_name = "bolero_codec",
7441 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307442 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007443 .no_pcm = 1,
7444 .dpcm_playback = 1,
7445 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7446 .be_hw_params_fixup = msm_be_hw_params_fixup,
7447 .ignore_pmdown_time = 1,
7448 .ignore_suspend = 1,
7449 .ops = &msm_cdc_dma_be_ops,
7450 },
7451 {
7452 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7453 .stream_name = "RX CDC DMA3 Playback",
7454 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7455 .platform_name = "msm-pcm-routing",
7456 .codec_name = "bolero_codec",
7457 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05307458 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007459 .no_pcm = 1,
7460 .dpcm_playback = 1,
7461 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7462 .be_hw_params_fixup = msm_be_hw_params_fixup,
7463 .ignore_pmdown_time = 1,
7464 .ignore_suspend = 1,
7465 .ops = &msm_cdc_dma_be_ops,
7466 },
7467 /* TX CDC DMA Backend DAI Links */
7468 {
7469 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7470 .stream_name = "TX CDC DMA3 Capture",
7471 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7472 .platform_name = "msm-pcm-routing",
7473 .codec_name = "bolero_codec",
7474 .codec_dai_name = "tx_macro_tx1",
7475 .no_pcm = 1,
7476 .dpcm_capture = 1,
7477 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7478 .be_hw_params_fixup = msm_be_hw_params_fixup,
7479 .ignore_suspend = 1,
7480 .ops = &msm_cdc_dma_be_ops,
7481 },
7482 {
7483 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7484 .stream_name = "TX CDC DMA4 Capture",
7485 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7486 .platform_name = "msm-pcm-routing",
7487 .codec_name = "bolero_codec",
7488 .codec_dai_name = "tx_macro_tx2",
7489 .no_pcm = 1,
7490 .dpcm_capture = 1,
7491 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7492 .be_hw_params_fixup = msm_be_hw_params_fixup,
7493 .ignore_suspend = 1,
7494 .ops = &msm_cdc_dma_be_ops,
7495 },
7496};
7497
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007498static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7499 {
7500 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7501 .stream_name = "VA CDC DMA0 Capture",
7502 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7503 .platform_name = "msm-pcm-routing",
7504 .codec_name = "bolero_codec",
7505 .codec_dai_name = "va_macro_tx1",
7506 .no_pcm = 1,
7507 .dpcm_capture = 1,
7508 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7509 .be_hw_params_fixup = msm_be_hw_params_fixup,
7510 .ignore_suspend = 1,
7511 .ops = &msm_cdc_dma_be_ops,
7512 },
7513 {
7514 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7515 .stream_name = "VA CDC DMA1 Capture",
7516 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7517 .platform_name = "msm-pcm-routing",
7518 .codec_name = "bolero_codec",
7519 .codec_dai_name = "va_macro_tx2",
7520 .no_pcm = 1,
7521 .dpcm_capture = 1,
7522 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7523 .be_hw_params_fixup = msm_be_hw_params_fixup,
7524 .ignore_suspend = 1,
7525 .ops = &msm_cdc_dma_be_ops,
7526 },
7527 {
7528 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7529 .stream_name = "VA CDC DMA2 Capture",
7530 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7531 .platform_name = "msm-pcm-routing",
7532 .codec_name = "bolero_codec",
7533 .codec_dai_name = "va_macro_tx3",
7534 .no_pcm = 1,
7535 .dpcm_capture = 1,
7536 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7537 .be_hw_params_fixup = msm_be_hw_params_fixup,
7538 .ignore_suspend = 1,
7539 .ops = &msm_cdc_dma_be_ops,
7540 },
7541};
7542
Meng Wange8e53822019-03-18 10:49:50 +08007543static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7544 {
7545 .name = LPASS_BE_AFE_LOOPBACK_TX,
7546 .stream_name = "AFE Loopback Capture",
7547 .cpu_dai_name = "msm-dai-q6-dev.24577",
7548 .platform_name = "msm-pcm-routing",
7549 .codec_name = "msm-stub-codec.1",
7550 .codec_dai_name = "msm-stub-tx",
7551 .no_pcm = 1,
7552 .dpcm_capture = 1,
7553 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7554 .be_hw_params_fixup = msm_be_hw_params_fixup,
7555 .ignore_pmdown_time = 1,
7556 .ignore_suspend = 1,
7557 },
7558};
7559
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007560static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007561 ARRAY_SIZE(msm_common_dai_links) +
7562 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7563 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7564 ARRAY_SIZE(msm_common_be_dai_links) +
7565 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7566 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7567 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007568 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007569 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7570 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +08007571 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307572 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307573 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7574 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007575
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007576static int msm_populate_dai_link_component_of_node(
7577 struct snd_soc_card *card)
7578{
7579 int i, index, ret = 0;
7580 struct device *cdev = card->dev;
7581 struct snd_soc_dai_link *dai_link = card->dai_link;
7582 struct device_node *np;
7583
7584 if (!cdev) {
7585 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7586 return -ENODEV;
7587 }
7588
7589 for (i = 0; i < card->num_links; i++) {
7590 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7591 continue;
7592
7593 /* populate platform_of_node for snd card dai links */
7594 if (dai_link[i].platform_name &&
7595 !dai_link[i].platform_of_node) {
7596 index = of_property_match_string(cdev->of_node,
7597 "asoc-platform-names",
7598 dai_link[i].platform_name);
7599 if (index < 0) {
7600 dev_err(cdev, "%s: No match found for platform name: %s\n",
7601 __func__, dai_link[i].platform_name);
7602 ret = index;
7603 goto err;
7604 }
7605 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7606 index);
7607 if (!np) {
7608 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7609 __func__, dai_link[i].platform_name,
7610 index);
7611 ret = -ENODEV;
7612 goto err;
7613 }
7614 dai_link[i].platform_of_node = np;
7615 dai_link[i].platform_name = NULL;
7616 }
7617
7618 /* populate cpu_of_node for snd card dai links */
7619 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7620 index = of_property_match_string(cdev->of_node,
7621 "asoc-cpu-names",
7622 dai_link[i].cpu_dai_name);
7623 if (index >= 0) {
7624 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7625 index);
7626 if (!np) {
7627 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7628 __func__,
7629 dai_link[i].cpu_dai_name);
7630 ret = -ENODEV;
7631 goto err;
7632 }
7633 dai_link[i].cpu_of_node = np;
7634 dai_link[i].cpu_dai_name = NULL;
7635 }
7636 }
7637
7638 /* populate codec_of_node for snd card dai links */
7639 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7640 index = of_property_match_string(cdev->of_node,
7641 "asoc-codec-names",
7642 dai_link[i].codec_name);
7643 if (index < 0)
7644 continue;
7645 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7646 index);
7647 if (!np) {
7648 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7649 __func__, dai_link[i].codec_name);
7650 ret = -ENODEV;
7651 goto err;
7652 }
7653 dai_link[i].codec_of_node = np;
7654 dai_link[i].codec_name = NULL;
7655 }
7656 }
7657
7658err:
7659 return ret;
7660}
7661
7662static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7663{
7664 int ret = -EINVAL;
7665 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7666
7667 if (!component) {
7668 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7669 return ret;
7670 }
7671
7672 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7673 ARRAY_SIZE(msm_snd_controls));
7674 if (ret < 0) {
7675 dev_err(component->dev,
7676 "%s: add_codec_controls failed, err = %d\n",
7677 __func__, ret);
7678 return ret;
7679 }
7680
7681 return ret;
7682}
7683
7684static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7685 struct snd_pcm_hw_params *params)
7686{
7687 return 0;
7688}
7689
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007690static struct snd_soc_ops msm_stub_be_ops = {
7691 .hw_params = msm_snd_stub_hw_params,
7692};
7693
7694struct snd_soc_card snd_soc_card_stub_msm = {
7695 .name = "kona-stub-snd-card",
7696};
7697
7698static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7699 /* FrontEnd DAI Links */
7700 {
7701 .name = "MSMSTUB Media1",
7702 .stream_name = "MultiMedia1",
7703 .cpu_dai_name = "MultiMedia1",
7704 .platform_name = "msm-pcm-dsp.0",
7705 .dynamic = 1,
7706 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7707 .dpcm_playback = 1,
7708 .dpcm_capture = 1,
7709 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7710 SND_SOC_DPCM_TRIGGER_POST},
7711 .codec_dai_name = "snd-soc-dummy-dai",
7712 .codec_name = "snd-soc-dummy",
7713 .ignore_suspend = 1,
7714 /* this dainlink has playback support */
7715 .ignore_pmdown_time = 1,
7716 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7717 },
7718};
7719
7720static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7721 /* Backend DAI Links */
7722 {
7723 .name = LPASS_BE_AUXPCM_RX,
7724 .stream_name = "AUX PCM Playback",
7725 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7726 .platform_name = "msm-pcm-routing",
7727 .codec_name = "msm-stub-codec.1",
7728 .codec_dai_name = "msm-stub-rx",
7729 .no_pcm = 1,
7730 .dpcm_playback = 1,
7731 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7732 .init = &msm_audrx_stub_init,
7733 .be_hw_params_fixup = msm_be_hw_params_fixup,
7734 .ignore_pmdown_time = 1,
7735 .ignore_suspend = 1,
7736 .ops = &msm_stub_be_ops,
7737 },
7738 {
7739 .name = LPASS_BE_AUXPCM_TX,
7740 .stream_name = "AUX PCM Capture",
7741 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7742 .platform_name = "msm-pcm-routing",
7743 .codec_name = "msm-stub-codec.1",
7744 .codec_dai_name = "msm-stub-tx",
7745 .no_pcm = 1,
7746 .dpcm_capture = 1,
7747 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7748 .be_hw_params_fixup = msm_be_hw_params_fixup,
7749 .ignore_suspend = 1,
7750 .ops = &msm_stub_be_ops,
7751 },
7752};
7753
7754static struct snd_soc_dai_link msm_stub_dai_links[
7755 ARRAY_SIZE(msm_stub_fe_dai_links) +
7756 ARRAY_SIZE(msm_stub_be_dai_links)];
7757
7758static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007759 { .compatible = "qcom,kona-asoc-snd",
7760 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007761 { .compatible = "qcom,kona-asoc-snd-stub",
7762 .data = "stub_codec"},
7763 {},
7764};
7765
7766static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7767{
7768 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007769 struct snd_soc_dai_link *dailink = NULL;
7770 int len_1 = 0;
7771 int len_2 = 0;
7772 int total_links = 0;
7773 int rc = 0;
7774 u32 mi2s_audio_intf = 0;
7775 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007776 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307777 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007778 const struct of_device_id *match;
7779
7780 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7781 if (!match) {
7782 dev_err(dev, "%s: No DT match found for sound card\n",
7783 __func__);
7784 return NULL;
7785 }
7786
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007787 if (!strcmp(match->data, "codec")) {
7788 card = &snd_soc_card_kona_msm;
7789
7790 memcpy(msm_kona_dai_links + total_links,
7791 msm_common_dai_links,
7792 sizeof(msm_common_dai_links));
7793 total_links += ARRAY_SIZE(msm_common_dai_links);
7794
7795 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007796 msm_bolero_fe_dai_links,
7797 sizeof(msm_bolero_fe_dai_links));
7798 total_links +=
7799 ARRAY_SIZE(msm_bolero_fe_dai_links);
7800
7801 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007802 msm_common_misc_fe_dai_links,
7803 sizeof(msm_common_misc_fe_dai_links));
7804 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7805
7806 memcpy(msm_kona_dai_links + total_links,
7807 msm_common_be_dai_links,
7808 sizeof(msm_common_be_dai_links));
7809 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7810
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007811 memcpy(msm_kona_dai_links + total_links,
7812 msm_wsa_cdc_dma_be_dai_links,
7813 sizeof(msm_wsa_cdc_dma_be_dai_links));
7814 total_links +=
7815 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7816
7817 memcpy(msm_kona_dai_links + total_links,
7818 msm_rx_tx_cdc_dma_be_dai_links,
7819 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7820 total_links +=
7821 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7822
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007823 memcpy(msm_kona_dai_links + total_links,
7824 msm_va_cdc_dma_be_dai_links,
7825 sizeof(msm_va_cdc_dma_be_dai_links));
7826 total_links +=
7827 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7828
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007829 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7830 &mi2s_audio_intf);
7831 if (rc) {
7832 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7833 __func__);
7834 } else {
7835 if (mi2s_audio_intf) {
7836 memcpy(msm_kona_dai_links + total_links,
7837 msm_mi2s_be_dai_links,
7838 sizeof(msm_mi2s_be_dai_links));
7839 total_links +=
7840 ARRAY_SIZE(msm_mi2s_be_dai_links);
7841 }
7842 }
7843
7844 rc = of_property_read_u32(dev->of_node,
7845 "qcom,auxpcm-audio-intf",
7846 &auxpcm_audio_intf);
7847 if (rc) {
7848 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7849 __func__);
7850 } else {
7851 if (auxpcm_audio_intf) {
7852 memcpy(msm_kona_dai_links + total_links,
7853 msm_auxpcm_be_dai_links,
7854 sizeof(msm_auxpcm_be_dai_links));
7855 total_links +=
7856 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7857 }
7858 }
7859
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007860 rc = of_property_read_u32(dev->of_node,
7861 "qcom,ext-disp-audio-rx", &val);
7862 if (!rc && val) {
7863 dev_dbg(dev, "%s(): ext disp audio support present\n",
7864 __func__);
7865 memcpy(msm_kona_dai_links + total_links,
7866 ext_disp_be_dai_link,
7867 sizeof(ext_disp_be_dai_link));
7868 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7869 }
7870
7871 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7872 if (!rc && val) {
7873 dev_dbg(dev, "%s(): WCN BT support present\n",
7874 __func__);
7875 memcpy(msm_kona_dai_links + total_links,
7876 msm_wcn_be_dai_links,
7877 sizeof(msm_wcn_be_dai_links));
7878 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7879 }
7880
Meng Wange8e53822019-03-18 10:49:50 +08007881 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7882 &val);
7883 if (!rc && val) {
7884 memcpy(msm_kona_dai_links + total_links,
7885 msm_afe_rxtx_lb_be_dai_link,
7886 sizeof(msm_afe_rxtx_lb_be_dai_link));
7887 total_links +=
7888 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7889 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307890
Aditya Bavanari2d763ba2020-02-17 13:26:50 +05307891 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7892 &val);
7893 if (!rc && val) {
7894 memcpy(msm_kona_dai_links + total_links,
7895 msm_tdm_be_dai_links,
7896 sizeof(msm_tdm_be_dai_links));
7897 total_links +=
7898 ARRAY_SIZE(msm_tdm_be_dai_links);
7899 }
7900
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307901 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7902 &wcn_btfm_intf);
7903 if (rc) {
7904 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7905 __func__);
7906 } else {
7907 if (wcn_btfm_intf) {
7908 memcpy(msm_kona_dai_links + total_links,
7909 msm_wcn_btfm_be_dai_links,
7910 sizeof(msm_wcn_btfm_be_dai_links));
7911 total_links +=
7912 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7913 }
7914 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007915 dailink = msm_kona_dai_links;
7916 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007917 card = &snd_soc_card_stub_msm;
7918 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7919 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7920
7921 memcpy(msm_stub_dai_links,
7922 msm_stub_fe_dai_links,
7923 sizeof(msm_stub_fe_dai_links));
7924 memcpy(msm_stub_dai_links + len_1,
7925 msm_stub_be_dai_links,
7926 sizeof(msm_stub_be_dai_links));
7927
7928 dailink = msm_stub_dai_links;
7929 total_links = len_2;
7930 }
7931
7932 if (card) {
7933 card->dai_link = dailink;
7934 card->num_links = total_links;
7935 }
7936
7937 return card;
7938}
7939
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007940static int msm_wsa881x_init(struct snd_soc_component *component)
7941{
7942 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7943 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7944 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7945 SPKR_L_BOOST, SPKR_L_VI};
7946 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7947 SPKR_R_BOOST, SPKR_R_VI};
7948 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7949 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7950 struct msm_asoc_mach_data *pdata;
7951 struct snd_soc_dapm_context *dapm;
7952 struct snd_card *card;
7953 struct snd_info_entry *entry;
7954 int ret = 0;
7955
7956 if (!component) {
7957 pr_err("%s component is NULL\n", __func__);
7958 return -EINVAL;
7959 }
7960
7961 card = component->card->snd_card;
7962 dapm = snd_soc_component_get_dapm(component);
7963
7964 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7965 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7966 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307967 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7968 wsa883x_set_channel_map(component, &spkleft_ports[0],
7969 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7970 &ch_rate[0], &spkleft_port_types[0]);
7971 else
7972 wsa881x_set_channel_map(component, &spkleft_ports[0],
7973 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7974 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007975 if (dapm->component) {
7976 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7977 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7978 }
7979 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7980 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7981 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +05307982 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7983 wsa883x_set_channel_map(component, &spkright_ports[0],
7984 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7985 &ch_rate[0], &spkright_port_types[0]);
7986 else
7987 wsa881x_set_channel_map(component, &spkright_ports[0],
7988 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7989 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007990 if (dapm->component) {
7991 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7992 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7993 }
7994 } else {
7995 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7996 component->name);
7997 ret = -EINVAL;
7998 goto err;
7999 }
8000 pdata = snd_soc_card_get_drvdata(component->card);
8001 if (!pdata->codec_root) {
8002 entry = snd_info_create_subdir(card->module, "codecs",
8003 card->proc_root);
8004 if (!entry) {
8005 pr_err("%s: Cannot create codecs module entry\n",
8006 __func__);
8007 ret = 0;
8008 goto err;
8009 }
8010 pdata->codec_root = entry;
8011 }
Laxminath Kasam99690f12020-03-15 15:38:21 +05308012 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
8013 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
8014 component);
8015 else
8016 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
8017 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008018err:
8019 return ret;
8020}
8021
8022static int msm_aux_codec_init(struct snd_soc_component *component)
8023{
8024 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
8025 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07008026 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008027 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008028 struct snd_info_entry *entry;
8029 struct snd_card *card = component->card->snd_card;
8030 struct msm_asoc_mach_data *pdata;
8031
8032 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8033 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8034 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8035 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8036 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8037 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8038 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
8039 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
8040 snd_soc_dapm_sync(dapm);
8041
8042 pdata = snd_soc_card_get_drvdata(component->card);
8043 if (!pdata->codec_root) {
8044 entry = snd_info_create_subdir(card->module, "codecs",
8045 card->proc_root);
8046 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008047 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008048 __func__);
8049 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008050 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008051 }
8052 pdata->codec_root = entry;
8053 }
Kunlei Zhangf61a2312020-02-11 15:37:03 +08008054 if (!strncmp(component->driver->name, "wcd937x", 7)) {
8055 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07008056 ret = snd_soc_add_component_controls(component,
Kunlei Zhangf61a2312020-02-11 15:37:03 +08008057 msm_int_wcd937x_snd_controls,
8058 ARRAY_SIZE(msm_int_wcd937x_snd_controls));
8059 } else {
8060 wcd938x_info_create_codec_entry(pdata->codec_root, component);
8061 codec_variant = wcd938x_get_codec_variant(component);
8062 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
8063 if (codec_variant == WCD9380)
8064 ret = snd_soc_add_component_controls(component,
8065 msm_int_wcd9380_snd_controls,
8066 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
8067 else if (codec_variant == WCD9385)
8068 ret = snd_soc_add_component_controls(component,
8069 msm_int_wcd9385_snd_controls,
8070 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
8071 }
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07008072
8073 if (ret < 0) {
8074 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
8075 __func__, ret);
8076 return ret;
8077 }
8078
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008079mbhc_cfg_cal:
8080 mbhc_calibration = def_wcd_mbhc_cal();
8081 if (!mbhc_calibration)
8082 return -ENOMEM;
8083 wcd_mbhc_cfg.calibration = mbhc_calibration;
Kunlei Zhangf61a2312020-02-11 15:37:03 +08008084 if (!strncmp(component->driver->name, "wcd937x", 7))
8085 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
8086 else
8087 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008088 if (ret) {
8089 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
8090 __func__, ret);
8091 goto err_hs_detect;
8092 }
8093 return 0;
8094
8095err_hs_detect:
8096 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008097 return ret;
8098}
8099
8100static int msm_init_aux_dev(struct platform_device *pdev,
8101 struct snd_soc_card *card)
8102{
8103 struct device_node *wsa_of_node;
8104 struct device_node *aux_codec_of_node;
8105 u32 wsa_max_devs;
8106 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308107 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008108 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008109 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +08008110 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8111 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008112 const char *auxdev_name_prefix[1];
8113 char *dev_name_str = NULL;
8114 int found = 0;
8115 int codecs_found = 0;
8116 int ret = 0;
8117
8118 /* Get maximum WSA device count for this platform */
8119 ret = of_property_read_u32(pdev->dev.of_node,
8120 "qcom,wsa-max-devs", &wsa_max_devs);
8121 if (ret) {
8122 dev_info(&pdev->dev,
8123 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8124 __func__, pdev->dev.of_node->full_name, ret);
8125 wsa_max_devs = 0;
8126 goto codec_aux_dev;
8127 }
8128 if (wsa_max_devs == 0) {
8129 dev_warn(&pdev->dev,
8130 "%s: Max WSA devices is 0 for this target?\n",
8131 __func__);
8132 goto codec_aux_dev;
8133 }
8134
8135 /* Get count of WSA device phandles for this platform */
8136 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8137 "qcom,wsa-devs", NULL);
8138 if (wsa_dev_cnt == -ENOENT) {
8139 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8140 __func__);
8141 goto err;
8142 } else if (wsa_dev_cnt <= 0) {
8143 dev_err(&pdev->dev,
8144 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8145 __func__, wsa_dev_cnt);
8146 ret = -EINVAL;
8147 goto err;
8148 }
8149
8150 /*
8151 * Expect total phandles count to be NOT less than maximum possible
8152 * WSA count. However, if it is less, then assign same value to
8153 * max count as well.
8154 */
8155 if (wsa_dev_cnt < wsa_max_devs) {
8156 dev_dbg(&pdev->dev,
8157 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8158 __func__, wsa_max_devs, wsa_dev_cnt);
8159 wsa_max_devs = wsa_dev_cnt;
8160 }
8161
8162 /* Make sure prefix string passed for each WSA device */
8163 ret = of_property_count_strings(pdev->dev.of_node,
8164 "qcom,wsa-aux-dev-prefix");
8165 if (ret != wsa_dev_cnt) {
8166 dev_err(&pdev->dev,
8167 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8168 __func__, wsa_dev_cnt, ret);
8169 ret = -EINVAL;
8170 goto err;
8171 }
8172
8173 /*
8174 * Alloc mem to store phandle and index info of WSA device, if already
8175 * registered with ALSA core
8176 */
8177 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8178 sizeof(struct msm_wsa881x_dev_info),
8179 GFP_KERNEL);
8180 if (!wsa881x_dev_info) {
8181 ret = -ENOMEM;
8182 goto err;
8183 }
8184
8185 /*
8186 * search and check whether all WSA devices are already
8187 * registered with ALSA core or not. If found a node, store
8188 * the node and the index in a local array of struct for later
8189 * use.
8190 */
8191 for (i = 0; i < wsa_dev_cnt; i++) {
8192 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8193 "qcom,wsa-devs", i);
8194 if (unlikely(!wsa_of_node)) {
8195 /* we should not be here */
8196 dev_err(&pdev->dev,
8197 "%s: wsa dev node is not present\n",
8198 __func__);
8199 ret = -EINVAL;
8200 goto err;
8201 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308202 if (soc_find_component_locked(wsa_of_node, NULL)) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008203 /* WSA device registered with ALSA core */
8204 wsa881x_dev_info[found].of_node = wsa_of_node;
8205 wsa881x_dev_info[found].index = i;
8206 found++;
8207 if (found == wsa_max_devs)
8208 break;
8209 }
8210 }
8211
8212 if (found < wsa_max_devs) {
8213 dev_dbg(&pdev->dev,
8214 "%s: failed to find %d components. Found only %d\n",
8215 __func__, wsa_max_devs, found);
8216 return -EPROBE_DEFER;
8217 }
8218 dev_info(&pdev->dev,
8219 "%s: found %d wsa881x devices registered with ALSA core\n",
8220 __func__, found);
8221
8222codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308223 /* Get maximum aux codec device count for this platform */
8224 ret = of_property_read_u32(pdev->dev.of_node,
8225 "qcom,codec-max-aux-devs",
8226 &codec_max_aux_devs);
8227 if (ret) {
8228 dev_err(&pdev->dev,
8229 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8230 __func__, pdev->dev.of_node->full_name, ret);
8231 codec_max_aux_devs = 0;
8232 goto aux_dev_register;
8233 }
8234 if (codec_max_aux_devs == 0) {
8235 dev_dbg(&pdev->dev,
8236 "%s: Max aux codec devices is 0 for this target?\n",
8237 __func__);
8238 goto aux_dev_register;
8239 }
8240
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008241 /* Get count of aux codec device phandles for this platform */
8242 codec_aux_dev_cnt = of_count_phandle_with_args(
8243 pdev->dev.of_node,
8244 "qcom,codec-aux-devs", NULL);
8245 if (codec_aux_dev_cnt == -ENOENT) {
8246 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8247 __func__);
8248 goto err;
8249 } else if (codec_aux_dev_cnt <= 0) {
8250 dev_err(&pdev->dev,
8251 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8252 __func__, codec_aux_dev_cnt);
8253 ret = -EINVAL;
8254 goto err;
8255 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008256
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008257 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308258 * Expect total phandles count to be NOT less than maximum possible
8259 * AUX device count. However, if it is less, then assign same value to
8260 * max count as well.
8261 */
8262 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8263 dev_dbg(&pdev->dev,
8264 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8265 __func__, codec_max_aux_devs,
8266 codec_aux_dev_cnt);
8267 codec_max_aux_devs = codec_aux_dev_cnt;
8268 }
8269
8270 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008271 * Alloc mem to store phandle and index info of aux codec
8272 * if already registered with ALSA core
8273 */
8274 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8275 sizeof(struct aux_codec_dev_info),
8276 GFP_KERNEL);
8277 if (!aux_cdc_dev_info) {
8278 ret = -ENOMEM;
8279 goto err;
8280 }
8281
8282 /*
8283 * search and check whether all aux codecs are already
8284 * registered with ALSA core or not. If found a node, store
8285 * the node and the index in a local array of struct for later
8286 * use.
8287 */
8288 for (i = 0; i < codec_aux_dev_cnt; i++) {
8289 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8290 "qcom,codec-aux-devs", i);
8291 if (unlikely(!aux_codec_of_node)) {
8292 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008293 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008294 "%s: aux codec dev node is not present\n",
8295 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008296 ret = -EINVAL;
8297 goto err;
8298 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +05308299 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008300 /* AUX codec registered with ALSA core */
8301 aux_cdc_dev_info[codecs_found].of_node =
8302 aux_codec_of_node;
8303 aux_cdc_dev_info[codecs_found].index = i;
8304 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008305 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008306 }
8307
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008308 if (codecs_found < codec_aux_dev_cnt) {
8309 dev_dbg(&pdev->dev,
8310 "%s: failed to find %d components. Found only %d\n",
8311 __func__, codec_aux_dev_cnt, codecs_found);
8312 return -EPROBE_DEFER;
8313 }
8314 dev_info(&pdev->dev,
8315 "%s: found %d AUX codecs registered with ALSA core\n",
8316 __func__, codecs_found);
8317
Sudheer Papothid6d524d2019-06-19 02:31:11 +05308318aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008319 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8320 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8321
8322 /* Alloc array of AUX devs struct */
8323 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8324 sizeof(struct snd_soc_aux_dev),
8325 GFP_KERNEL);
8326 if (!msm_aux_dev) {
8327 ret = -ENOMEM;
8328 goto err;
8329 }
8330
8331 /* Alloc array of codec conf struct */
8332 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8333 sizeof(struct snd_soc_codec_conf),
8334 GFP_KERNEL);
8335 if (!msm_codec_conf) {
8336 ret = -ENOMEM;
8337 goto err;
8338 }
8339
8340 for (i = 0; i < wsa_max_devs; i++) {
8341 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8342 GFP_KERNEL);
8343 if (!dev_name_str) {
8344 ret = -ENOMEM;
8345 goto err;
8346 }
8347
8348 ret = of_property_read_string_index(pdev->dev.of_node,
8349 "qcom,wsa-aux-dev-prefix",
8350 wsa881x_dev_info[i].index,
8351 auxdev_name_prefix);
8352 if (ret) {
8353 dev_err(&pdev->dev,
8354 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8355 __func__, ret);
8356 ret = -EINVAL;
8357 goto err;
8358 }
8359
8360 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8361 msm_aux_dev[i].name = dev_name_str;
8362 msm_aux_dev[i].codec_name = NULL;
8363 msm_aux_dev[i].codec_of_node =
8364 wsa881x_dev_info[i].of_node;
8365 msm_aux_dev[i].init = msm_wsa881x_init;
8366 msm_codec_conf[i].dev_name = NULL;
8367 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8368 msm_codec_conf[i].of_node =
8369 wsa881x_dev_info[i].of_node;
8370 }
8371
8372 for (i = 0; i < codec_aux_dev_cnt; i++) {
8373 msm_aux_dev[wsa_max_devs + i].name = NULL;
8374 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8375 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8376 aux_cdc_dev_info[i].of_node;
8377 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8378 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8379 msm_codec_conf[wsa_max_devs + i].name_prefix =
8380 NULL;
8381 msm_codec_conf[wsa_max_devs + i].of_node =
8382 aux_cdc_dev_info[i].of_node;
8383 }
8384
8385 card->codec_conf = msm_codec_conf;
8386 card->aux_dev = msm_aux_dev;
8387err:
8388 return ret;
8389}
8390
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008391static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8392{
8393 int count = 0;
8394 u32 mi2s_master_slave[MI2S_MAX];
8395 int ret = 0;
8396
8397 for (count = 0; count < MI2S_MAX; count++) {
8398 mutex_init(&mi2s_intf_conf[count].lock);
8399 mi2s_intf_conf[count].ref_cnt = 0;
8400 }
8401
8402 ret = of_property_read_u32_array(pdev->dev.of_node,
8403 "qcom,msm-mi2s-master",
8404 mi2s_master_slave, MI2S_MAX);
8405 if (ret) {
8406 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8407 __func__);
8408 } else {
8409 for (count = 0; count < MI2S_MAX; count++) {
8410 mi2s_intf_conf[count].msm_is_mi2s_master =
8411 mi2s_master_slave[count];
8412 }
8413 }
8414}
8415
8416static void msm_i2s_auxpcm_deinit(void)
8417{
8418 int count = 0;
8419
8420 for (count = 0; count < MI2S_MAX; count++) {
8421 mutex_destroy(&mi2s_intf_conf[count].lock);
8422 mi2s_intf_conf[count].ref_cnt = 0;
8423 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8424 }
8425}
8426
8427static int kona_ssr_enable(struct device *dev, void *data)
8428{
8429 struct platform_device *pdev = to_platform_device(dev);
8430 struct snd_soc_card *card = platform_get_drvdata(pdev);
8431 int ret = 0;
8432
8433 if (!card) {
8434 dev_err(dev, "%s: card is NULL\n", __func__);
8435 ret = -EINVAL;
8436 goto err;
8437 }
8438
8439 if (!strcmp(card->name, "kona-stub-snd-card")) {
8440 /* TODO */
8441 dev_dbg(dev, "%s: TODO \n", __func__);
8442 }
8443
8444 snd_soc_card_change_online_state(card, 1);
8445 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8446
8447err:
8448 return ret;
8449}
8450
8451static void kona_ssr_disable(struct device *dev, void *data)
8452{
8453 struct platform_device *pdev = to_platform_device(dev);
8454 struct snd_soc_card *card = platform_get_drvdata(pdev);
8455
8456 if (!card) {
8457 dev_err(dev, "%s: card is NULL\n", __func__);
8458 return;
8459 }
8460
8461 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8462 snd_soc_card_change_online_state(card, 0);
8463
8464 if (!strcmp(card->name, "kona-stub-snd-card")) {
8465 /* TODO */
8466 dev_dbg(dev, "%s: TODO \n", __func__);
8467 }
8468}
8469
8470static const struct snd_event_ops kona_ssr_ops = {
8471 .enable = kona_ssr_enable,
8472 .disable = kona_ssr_disable,
8473};
8474
8475static int msm_audio_ssr_compare(struct device *dev, void *data)
8476{
8477 struct device_node *node = data;
8478
8479 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8480 __func__, dev->of_node, node);
8481 return (dev->of_node && dev->of_node == node);
8482}
8483
8484static int msm_audio_ssr_register(struct device *dev)
8485{
8486 struct device_node *np = dev->of_node;
8487 struct snd_event_clients *ssr_clients = NULL;
8488 struct device_node *node = NULL;
8489 int ret = 0;
8490 int i = 0;
8491
8492 for (i = 0; ; i++) {
8493 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8494 if (!node)
8495 break;
8496 snd_event_mstr_add_client(&ssr_clients,
8497 msm_audio_ssr_compare, node);
8498 }
8499
8500 ret = snd_event_master_register(dev, &kona_ssr_ops,
8501 ssr_clients, NULL);
8502 if (!ret)
8503 snd_event_notify(dev, SND_EVENT_UP);
8504
8505 return ret;
8506}
8507
lintaopeie0a48bc2020-12-11 11:13:13 +08008508#ifdef CONFIG_T2M_SND_FP4
8509int is_hac_pa_gpio_support(struct platform_device *pdev,
8510 struct msm_asoc_mach_data *pdata)
8511{
8512 const char *hac_pa_gpio = "qcom,msm-hac-pa-gpios";//plt defined in dtsi &lagoon_snd "lito-lagoon-fp4-snd-card"
8513 int ret = 0;
8514
8515 pr_debug("%s:HAC Enter\n", __func__);
8516
8517 pdata->hac_pa_gpio_p= of_parse_phandle(pdev->dev.of_node, hac_pa_gpio, 0);
8518 if (!pdata->hac_pa_gpio_p) {
8519 dev_dbg(&pdev->dev, "HAC property %s not detected in node %s",
8520 hac_pa_gpio, pdev->dev.of_node->full_name);
8521 } else {
8522 dev_dbg(&pdev->dev, "%s detected", hac_pa_gpio);
8523 if (pdata->hac_pa_gpio_p) {
8524 ret = msm_cdc_pinctrl_select_sleep_state(
8525 pdata->hac_pa_gpio_p);
8526 if (ret) {
8527 pr_err("%s:HAC gpio set cannot be de-activated %s\n",
8528 __func__, "hac_pa");
8529 }
8530 }
8531 }
8532
8533 return 0;
8534}
8535#endif
8536
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308537static void parse_cps_configuration(struct platform_device *pdev,
8538 struct msm_asoc_mach_data *pdata)
8539{
8540 int ret = 0;
8541 int i = 0, j = 0;
8542 u32 dt_values[MAX_CPS_LEVELS];
8543
8544 if (!pdev || !pdata || !pdata->wsa_max_devs)
8545 return;
8546
8547 pdata->get_wsa_dev_num = wsa883x_codec_get_dev_num;
8548 pdata->cps_config.hw_reg_cfg.num_spkr = pdata->wsa_max_devs;
8549
8550 ret = of_property_read_u32_array(pdev->dev.of_node,
8551 "qcom,cps_reg_phy_addr", dt_values,
8552 sizeof(dt_values)/sizeof(dt_values[0]));
8553 if (ret) {
8554 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8555 __func__, "qcom,cps_reg_phy_addr");
8556 } else {
8557 pdata->cps_config.hw_reg_cfg.lpass_wr_cmd_reg_phy_addr =
8558 dt_values[0];
8559 pdata->cps_config.hw_reg_cfg.lpass_rd_cmd_reg_phy_addr =
8560 dt_values[1];
8561 pdata->cps_config.hw_reg_cfg.lpass_rd_fifo_reg_phy_addr =
8562 dt_values[2];
8563 }
8564
8565 ret = of_property_read_u32_array(pdev->dev.of_node,
8566 "qcom,cps_threshold_levels", dt_values,
8567 sizeof(dt_values)/sizeof(dt_values[0]) - 1);
8568 if (ret) {
8569 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8570 __func__, "qcom,cps_threshold_levels");
8571 } else {
8572 pdata->cps_config.hw_reg_cfg.vbatt_lower2_threshold =
8573 dt_values[0];
8574 pdata->cps_config.hw_reg_cfg.vbatt_lower1_threshold =
8575 dt_values[1];
8576 }
8577
8578 pdata->cps_config.spkr_dep_cfg = devm_kzalloc(&pdev->dev,
8579 sizeof(struct lpass_swr_spkr_dep_cfg_t)
8580 * pdata->wsa_max_devs, GFP_KERNEL);
8581 if (!pdata->cps_config.spkr_dep_cfg) {
8582 dev_err(&pdev->dev, "%s: spkr dep cfg alloc failed\n", __func__);
8583 return;
8584 }
8585 ret = of_property_read_u32_array(pdev->dev.of_node,
8586 "qcom,cps_wsa_vbatt_temp_reg_addr", dt_values,
8587 sizeof(dt_values)/sizeof(dt_values[0]) - 1);
8588 if (ret) {
8589 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8590 __func__, "qcom,cps_wsa_vbatt_temp_reg_addr");
8591 } else {
8592 for (i = 0; i < pdata->wsa_max_devs; i++) {
8593 pdata->cps_config.spkr_dep_cfg[i].vbatt_pkd_reg_addr =
8594 dt_values[0];
8595 pdata->cps_config.spkr_dep_cfg[i].temp_pkd_reg_addr =
8596 dt_values[1];
8597 }
8598 }
8599
8600 ret = of_property_read_u32_array(pdev->dev.of_node,
8601 "qcom,cps_normal_values", dt_values,
8602 sizeof(dt_values)/sizeof(dt_values[0]));
8603 if (ret) {
8604 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8605 __func__, "qcom,cps_normal_values");
8606 } else {
8607 for (i = 0; i < pdata->wsa_max_devs; i++) {
8608 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8609 pdata->cps_config.spkr_dep_cfg[i].
8610 value_normal_thrsd[j] = dt_values[j];
8611 }
8612 }
8613 }
8614
8615 ret = of_property_read_u32_array(pdev->dev.of_node,
8616 "qcom,cps_lower1_values", dt_values,
8617 sizeof(dt_values)/sizeof(dt_values[0]));
8618 if (ret) {
8619 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8620 __func__, "qcom,cps_lower1_values");
8621 } else {
8622 for (i = 0; i < pdata->wsa_max_devs; i++) {
8623 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8624 pdata->cps_config.spkr_dep_cfg[i].
8625 value_low1_thrsd[j] = dt_values[j];
8626 }
8627 }
8628 }
8629
8630 ret = of_property_read_u32_array(pdev->dev.of_node,
8631 "qcom,cps_lower2_values", dt_values,
8632 sizeof(dt_values)/sizeof(dt_values[0]));
8633 if (ret) {
8634 dev_dbg(&pdev->dev, "%s: could not find %s entry in dt\n",
8635 __func__, "qcom,cps_lower2_values");
8636 } else {
8637 for (i = 0; i < pdata->wsa_max_devs; i++) {
8638 for (j = 0; j < MAX_CPS_LEVELS; j++) {
8639 pdata->cps_config.spkr_dep_cfg[i].
8640 value_low2_thrsd[j] = dt_values[j];
8641 }
8642 }
8643 }
8644}
8645
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008646static int msm_asoc_machine_probe(struct platform_device *pdev)
8647{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008648 struct snd_soc_card *card = NULL;
8649 struct msm_asoc_mach_data *pdata = NULL;
8650 const char *mbhc_audio_jack_type = NULL;
8651 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008652 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008653 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008654
8655 if (!pdev->dev.of_node) {
8656 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8657 return -EINVAL;
8658 }
8659
8660 pdata = devm_kzalloc(&pdev->dev,
8661 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8662 if (!pdata)
8663 return -ENOMEM;
8664
Vatsal Bucha71e0b482019-09-11 14:51:20 +05308665 of_property_read_u32(pdev->dev.of_node,
8666 "qcom,lito-is-v2-enabled",
8667 &pdata->lito_v2_enabled);
8668
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008669 card = populate_snd_card_dailinks(&pdev->dev);
8670 if (!card) {
8671 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8672 ret = -EINVAL;
8673 goto err;
8674 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008675
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008676 card->dev = &pdev->dev;
8677 platform_set_drvdata(pdev, card);
8678 snd_soc_card_set_drvdata(card, pdata);
8679
8680 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8681 if (ret) {
8682 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8683 __func__, ret);
8684 goto err;
8685 }
8686
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008687 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8688 if (ret) {
8689 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8690 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008691 goto err;
8692 }
8693
8694 ret = msm_populate_dai_link_component_of_node(card);
8695 if (ret) {
8696 ret = -EPROBE_DEFER;
8697 goto err;
8698 }
8699
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07008700 ret = msm_init_aux_dev(pdev, card);
8701 if (ret)
8702 goto err;
8703
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008704 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008705 if (ret == -EPROBE_DEFER) {
8706 if (codec_reg_done)
8707 ret = -EINVAL;
8708 goto err;
8709 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008710 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8711 __func__, ret);
8712 goto err;
8713 }
8714 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8715 __func__, card->name);
8716
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308717 /* Get maximum WSA device count for this platform */
8718 ret = of_property_read_u32(pdev->dev.of_node,
8719 "qcom,wsa-max-devs", &pdata->wsa_max_devs);
8720 if (ret) {
8721 dev_err(&pdev->dev, "%s: No DT match for wsa max devs\n",
8722 __func__);
8723 pdata->wsa_max_devs = 0;
8724 }
8725
Vignesh Kulothungan0d196602019-11-26 16:51:55 -08008726 ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
8727 &pdata->tdm_max_slots);
8728 if (ret) {
8729 dev_err(&pdev->dev, "%s: No DT match for tdm max slots\n",
8730 __func__);
8731 }
8732
8733 if ((pdata->tdm_max_slots <= 0) || (pdata->tdm_max_slots >
8734 TDM_MAX_SLOTS)) {
8735 pdata->tdm_max_slots = TDM_MAX_SLOTS;
8736 dev_err(&pdev->dev, "%s: Using default tdm max slot: %d\n",
8737 __func__, pdata->tdm_max_slots);
8738 }
8739
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008740 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8741 "qcom,hph-en1-gpio", 0);
8742 if (!pdata->hph_en1_gpio_p) {
8743 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8744 __func__, "qcom,hph-en1-gpio",
8745 pdev->dev.of_node->full_name);
8746 }
8747
8748 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8749 "qcom,hph-en0-gpio", 0);
8750 if (!pdata->hph_en0_gpio_p) {
8751 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8752 __func__, "qcom,hph-en0-gpio",
8753 pdev->dev.of_node->full_name);
8754 }
8755
8756 ret = of_property_read_string(pdev->dev.of_node,
8757 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8758 if (ret) {
8759 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8760 __func__, "qcom,mbhc-audio-jack-type",
8761 pdev->dev.of_node->full_name);
8762 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8763 } else {
8764 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8765 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8766 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8767 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8768 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8769 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8770 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8771 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8772 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8773 } else {
8774 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8775 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8776 }
8777 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08008778 /*
8779 * Parse US-Euro gpio info from DT. Report no error if us-euro
8780 * entry is not found in DT file as some targets do not support
8781 * US-Euro detection
8782 */
8783 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8784 "qcom,us-euro-gpios", 0);
8785 if (!pdata->us_euro_gpio_p) {
8786 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8787 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8788 } else {
8789 dev_dbg(&pdev->dev, "%s detected\n",
8790 "qcom,us-euro-gpios");
8791 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8792 }
lintaopeie0a48bc2020-12-11 11:13:13 +08008793#ifdef CONFIG_T2M_SND_FP4
8794 ret = is_hac_pa_gpio_support(pdev, pdata);
8795 if (ret < 0)
8796 pr_err("%s:HAC doesn't support hac pa gpio\n",
8797 __func__);
8798#endif
Meng Wanga60b4082019-02-25 17:02:23 +08008799 if (wcd_mbhc_cfg.enable_usbc_analog)
8800 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8801
8802 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8803 "fsa4480-i2c-handle", 0);
8804 if (!pdata->fsa_handle)
8805 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8806 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8807
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008808 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08008809 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8810 "qcom,cdc-dmic01-gpios",
8811 0);
8812 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8813 "qcom,cdc-dmic23-gpios",
8814 0);
8815 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8816 "qcom,cdc-dmic45-gpios",
8817 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +05308818 if (pdata->dmic01_gpio_p)
8819 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8820 if (pdata->dmic23_gpio_p)
8821 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +05308822 if (pdata->dmic45_gpio_p)
8823 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008824
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008825 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8826 "qcom,pri-mi2s-gpios", 0);
8827 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8828 "qcom,sec-mi2s-gpios", 0);
8829 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8830 "qcom,tert-mi2s-gpios", 0);
8831 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8832 "qcom,quat-mi2s-gpios", 0);
8833 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8834 "qcom,quin-mi2s-gpios", 0);
8835 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8836 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008837 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8838 if (pdata->mi2s_gpio_p[index])
8839 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008840 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +08008841 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08008842
Faiz Nabi Kuchay123608c2020-10-08 12:52:19 +05308843 /* parse cps configuration from dt */
8844 if (of_property_read_bool(pdev->dev.of_node, "qcom,cps_reg_phy_addr"))
8845 parse_cps_configuration(pdev, pdata);
8846
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -07008847 /* Register LPASS audio hw vote */
8848 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8849 if (IS_ERR(lpass_audio_hw_vote)) {
8850 ret = PTR_ERR(lpass_audio_hw_vote);
8851 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8852 __func__, "lpass_audio_hw_vote", ret);
8853 lpass_audio_hw_vote = NULL;
8854 ret = 0;
8855 }
8856 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8857 pdata->core_audio_vote_count = 0;
8858
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008859 ret = msm_audio_ssr_register(&pdev->dev);
8860 if (ret)
8861 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8862 __func__, ret);
8863
8864 is_initial_boot = true;
8865
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008866 return 0;
8867err:
8868 devm_kfree(&pdev->dev, pdata);
8869 return ret;
8870}
8871
8872static int msm_asoc_machine_remove(struct platform_device *pdev)
8873{
8874 struct snd_soc_card *card = platform_get_drvdata(pdev);
8875
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008876 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008877 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07008878 msm_i2s_auxpcm_deinit();
8879
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008880 return 0;
8881}
8882
8883static struct platform_driver kona_asoc_machine_driver = {
8884 .driver = {
8885 .name = DRV_NAME,
8886 .owner = THIS_MODULE,
8887 .pm = &snd_soc_pm_ops,
8888 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +08008889 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07008890 },
8891 .probe = msm_asoc_machine_probe,
8892 .remove = msm_asoc_machine_remove,
8893};
8894module_platform_driver(kona_asoc_machine_driver);
8895
8896MODULE_DESCRIPTION("ALSA SoC msm");
8897MODULE_LICENSE("GPL v2");
8898MODULE_ALIAS("platform:" DRV_NAME);
8899MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);