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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 72759f6206a0564c6b6a6924d1491349119d8f1c / . / arch / arm / boot / dts / msm8226.dtsi
blob: dd621efda415f1e411d089f32938692b93eb6d9f [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
52 };
53
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]54 memory {
55 secure_mem: secure_region {
56 linux,contiguous-region;
57 reg = <0 0x3800000>;
58 label = "secure_mem";
59 };
60 };
61
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]62 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]63 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 interrupts = <1 2 0 1 3 0>;
65 clock-frequency = <19200000>;
66 };
67
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame^]68 timer@f9020000 {
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges;
72 compatible = "arm,armv7-timer-mem";
73 reg = <0xf9020000 0x1000>;
74 clock-frequency = <19200000>;
75
76 frame@f9021000 {
77 frame-number = <0>;
78 interrupts = <0 8 0x4>,
79 <0 7 0x4>;
80 reg = <0xf9021000 0x1000>,
81 <0xf9022000 0x1000>;
82 };
83
84 frame@f9023000 {
85 frame-number = <1>;
86 interrupts = <0 9 0x4>;
87 reg = <0xf9023000 0x1000>;
88 status = "disabled";
89 };
90
91 frame@f9024000 {
92 frame-number = <2>;
93 interrupts = <0 10 0x4>;
94 reg = <0xf9024000 0x1000>;
95 status = "disabled";
96 };
97
98 frame@f9025000 {
99 frame-number = <3>;
100 interrupts = <0 11 0x4>;
101 reg = <0xf9025000 0x1000>;
102 status = "disabled";
103 };
104
105 frame@f9026000 {
106 frame-number = <4>;
107 interrupts = <0 12 0x4>;
108 reg = <0xf9026000 0x1000>;
109 status = "disabled";
110 };
111
112 frame@f9027000 {
113 frame-number = <5>;
114 interrupts = <0 13 0x4>;
115 reg = <0xf9027000 0x1000>;
116 status = "disabled";
117 };
118
119 frame@f9028000 {
120 frame-number = <6>;
121 interrupts = <0 14 0x4>;
122 reg = <0xf9028000 0x1000>;
123 status = "disabled";
124 };
125 };
126
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]127 qcom,vidc@fdc00000 {
128 compatible = "qcom,msm-vidc";
129 reg = <0xfdc00000 0xff000>;
130 interrupts = <0 44 0>;
131 qcom,load-freq-tbl = <352800 160000000>,
132 <244800 133330000>,
133 <108000 66700000>;
134 qcom,hfi = "venus";
135 qcom,bus-ports = <1>;
136 qcom,reg-presets = <0xE0024 0x0>,
137 <0x80124 0x3>,
138 <0xE0020 0x5555556>,
139 <0x800B0 0x10101001>,
140 <0x800B4 0x00101010>,
141 <0x800C0 0x1010100f>,
142 <0x800C4 0x00101010>,
143 <0x800D0 0x00000010>,
144 <0x800D4 0x00000010>,
145 <0x800D8 0x00000707>;
146 qcom,enc-ddr-ab-ib = <0 0>,
147 <129000 142000>,
148 <384000 422000>,
149 <866000 953000>;
150 qcom,dec-ddr-ab-ib = <0 0>,
151 <103000 134000>,
152 <268000 348000>,
153 <505000 657000>;
154 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
155 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
156 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
157 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]158 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]159 };
160
161 qcom,wfd {
162 compatible = "qcom,msm-wfd";
163 };
164
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]165 serial@f991f000 {
166 compatible = "qcom,msm-lsuart-v14";
167 reg = <0xf991f000 0x1000>;
168 interrupts = <0 109 0>;
169 status = "disabled";
170 };
171
172 serial@f995e000 {
173 compatible = "qcom,msm-lsuart-v14";
174 reg = <0xf995e000 0x1000>;
175 interrupts = <0 114 0>;
176 status = "disabled";
177 };
178
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]179 qcom,msm-imem@fe805000 {
180 compatible = "qcom,msm-imem";
181 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
182 };
183
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]184 qcom,sps@f9984000 {
185 compatible = "qcom,msm_sps";
186 reg = <0xf9984000 0x15000>,
187 <0xf9999000 0xb000>;
188 interrupts = <0 94 0>;
189 };
190
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]191 qcom,usbbam@f9a44000 {
192 compatible = "qcom,usb-bam-msm";
193 reg = <0xf9a44000 0x11000>;
194 reg-names = "hsusb";
195 interrupts = <0 135 0>;
196 interrupt-names = "hsusb";
197 qcom,usb-bam-num-pipes = <16>;
198 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
199 qcom,ignore-core-reset-ack;
200 qcom,disable-clk-gating;
201
202 qcom,pipe0 {
203 label = "hsusb-qdss-in-0";
204 qcom,usb-bam-mem-type = <3>;
205 qcom,bam-type = <1>;
206 qcom,dir = <1>;
207 qcom,pipe-num = <0>;
208 qcom,peer-bam = <1>;
209 qcom,src-bam-physical-address = <0xfc37c000>;
210 qcom,src-bam-pipe-index = <0>;
211 qcom,dst-bam-physical-address = <0xf9a44000>;
212 qcom,dst-bam-pipe-index = <2>;
213 qcom,data-fifo-offset = <0x0>;
214 qcom,data-fifo-size = <0x600>;
215 qcom,descriptor-fifo-offset = <0x600>;
216 qcom,descriptor-fifo-size = <0x200>;
217 };
218 };
219
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]220 usb@f9a55000 {
221 compatible = "qcom,hsusb-otg";
222 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]223 interrupts = <0 134 0>, <0 140 0>;
224 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]225 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]226 HSUSB_1p8-supply = <&pm8226_l10>;
227 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]228 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]229
230 qcom,hsusb-otg-phy-type = <2>;
231 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]232 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]233 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]234 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]235
236 qcom,msm-bus,name = "usb2";
237 qcom,msm-bus,num-cases = <2>;
238 qcom,msm-bus,active-only = <0>;
239 qcom,msm-bus,num-paths = <1>;
240 qcom,msm-bus,vectors-KBps =
241 <87 512 0 0>,
242 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]243 };
244
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]245 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]246 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]247 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]248 };
249
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]250 wcd9xxx_intc: wcd9xxx-irq {
251 compatible = "qcom,wcd9xxx-irq";
252 interrupt-controller;
253 #interrupt-cells = <1>;
254 interrupt-parent = <&msmgpio>;
255 interrupts = <68 0>;
256 interrupt-names = "cdc-int";
257 };
258
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]259 slim@fe12f000 {
260 cell-index = <1>;
261 compatible = "qcom,slim-ngd";
262 reg = <0xfe12f000 0x35000>,
263 <0xfe104000 0x20000>;
264 reg-names = "slimbus_physical", "slimbus_bam_physical";
265 interrupts = <0 163 0>, <0 164 0>;
266 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]267
268 tapan_codec {
269 compatible = "qcom,tapan-slim-pgd";
270 elemental-addr = [00 01 E0 00 17 02];
271
272 interrupt-parent = <&wcd9xxx_intc>;
273 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
274 17 18 19 20 21 22 23 24 25 26 27 28>;
275 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
276
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]277 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]278 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
279 qcom,cdc-vdd-buck-current = <650000>;
280
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]281 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]282 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
283 qcom,cdc-vdd-h-current = <25000>;
284
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]285 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]286 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
287 qcom,cdc-vdd-px-current = <25000>;
288
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]289 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]290 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
291 qcom,cdc-vdd-a-1p2v-current = <10000>;
292
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]293 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]294 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
295 qcom,cdc-vdd-cx-current = <10000>;
296
297 qcom,cdc-micbias-ldoh-v = <0x3>;
298 qcom,cdc-micbias-cfilt1-mv = <1800>;
299 qcom,cdc-micbias-cfilt2-mv = <1800>;
300 qcom,cdc-micbias-cfilt3-mv = <1800>;
301
302 qcom,cdc-micbias1-cfilt-sel = <0x0>;
303 qcom,cdc-micbias2-cfilt-sel = <0x1>;
304 qcom,cdc-micbias3-cfilt-sel = <0x2>;
305
306 qcom,cdc-mclk-clk-rate = <9600000>;
307 qcom,cdc-slim-ifd = "tapan-slim-ifd";
308 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
309 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]310 };
311
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]312 qcom,msm-adsp-loader {
313 compatible = "qcom,adsp-loader";
314 qcom,adsp-state = <0>;
315 };
316
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]317 sound {
318 compatible = "qcom,msm8226-audio-tapan";
319 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]320 qcom,tapan-mclk-clk-freq = <9600000>;
321 };
322
323 qcom,msm-pcm {
324 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]325 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]326 };
327
328 qcom,msm-pcm-routing {
329 compatible = "qcom,msm-pcm-routing";
330 };
331
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]332 qcom,msm-pcm-low-latency {
333 compatible = "qcom,msm-pcm-dsp";
334 qcom,msm-pcm-dsp-id = <1>;
335 qcom,msm-pcm-low-latency;
336 };
337
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]338 qcom,msm-pcm-lpa {
339 compatible = "qcom,msm-pcm-lpa";
340 };
341
342 qcom,msm-compr-dsp {
343 compatible = "qcom,msm-compr-dsp";
344 };
345
346 qcom,msm-voip-dsp {
347 compatible = "qcom,msm-voip-dsp";
348 };
349
350 qcom,msm-pcm-voice {
351 compatible = "qcom,msm-pcm-voice";
352 };
353
354 qcom,msm-stub-codec {
355 compatible = "qcom,msm-stub-codec";
356 };
357
358 qcom,msm-dai-fe {
359 compatible = "qcom,msm-dai-fe";
360 };
361
362 qcom,msm-pcm-afe {
363 compatible = "qcom,msm-pcm-afe";
364 };
365
366 qcom,msm-dai-q6-hdmi {
367 compatible = "qcom,msm-dai-q6-hdmi";
368 qcom,msm-dai-q6-dev-id = <8>;
369 };
370
371 qcom,msm-dai-q6 {
372 compatible = "qcom,msm-dai-q6";
373 qcom,msm-dai-q6-sb-0-rx {
374 compatible = "qcom,msm-dai-q6-dev";
375 qcom,msm-dai-q6-dev-id = <16384>;
376 };
377
378 qcom,msm-dai-q6-sb-0-tx {
379 compatible = "qcom,msm-dai-q6-dev";
380 qcom,msm-dai-q6-dev-id = <16385>;
381 };
382
383 qcom,msm-dai-q6-sb-1-rx {
384 compatible = "qcom,msm-dai-q6-dev";
385 qcom,msm-dai-q6-dev-id = <16386>;
386 };
387
388 qcom,msm-dai-q6-sb-1-tx {
389 compatible = "qcom,msm-dai-q6-dev";
390 qcom,msm-dai-q6-dev-id = <16387>;
391 };
392
393 qcom,msm-dai-q6-sb-3-rx {
394 compatible = "qcom,msm-dai-q6-dev";
395 qcom,msm-dai-q6-dev-id = <16390>;
396 };
397
398 qcom,msm-dai-q6-sb-3-tx {
399 compatible = "qcom,msm-dai-q6-dev";
400 qcom,msm-dai-q6-dev-id = <16391>;
401 };
402
403 qcom,msm-dai-q6-sb-4-rx {
404 compatible = "qcom,msm-dai-q6-dev";
405 qcom,msm-dai-q6-dev-id = <16392>;
406 };
407
408 qcom,msm-dai-q6-sb-4-tx {
409 compatible = "qcom,msm-dai-q6-dev";
410 qcom,msm-dai-q6-dev-id = <16393>;
411 };
412
413 qcom,msm-dai-q6-bt-sco-rx {
414 compatible = "qcom,msm-dai-q6-dev";
415 qcom,msm-dai-q6-dev-id = <12288>;
416 };
417
418 qcom,msm-dai-q6-bt-sco-tx {
419 compatible = "qcom,msm-dai-q6-dev";
420 qcom,msm-dai-q6-dev-id = <12289>;
421 };
422
423 qcom,msm-dai-q6-int-fm-rx {
424 compatible = "qcom,msm-dai-q6-dev";
425 qcom,msm-dai-q6-dev-id = <12292>;
426 };
427
428 qcom,msm-dai-q6-int-fm-tx {
429 compatible = "qcom,msm-dai-q6-dev";
430 qcom,msm-dai-q6-dev-id = <12293>;
431 };
432
433 qcom,msm-dai-q6-be-afe-pcm-rx {
434 compatible = "qcom,msm-dai-q6-dev";
435 qcom,msm-dai-q6-dev-id = <224>;
436 };
437
438 qcom,msm-dai-q6-be-afe-pcm-tx {
439 compatible = "qcom,msm-dai-q6-dev";
440 qcom,msm-dai-q6-dev-id = <225>;
441 };
442
443 qcom,msm-dai-q6-afe-proxy-rx {
444 compatible = "qcom,msm-dai-q6-dev";
445 qcom,msm-dai-q6-dev-id = <241>;
446 };
447
448 qcom,msm-dai-q6-afe-proxy-tx {
449 compatible = "qcom,msm-dai-q6-dev";
450 qcom,msm-dai-q6-dev-id = <240>;
451 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]452
453 qcom,msm-dai-q6-incall-record-rx {
454 compatible = "qcom,msm-dai-q6-dev";
455 qcom,msm-dai-q6-dev-id = <32771>;
456 };
457
458 qcom,msm-dai-q6-incall-record-tx {
459 compatible = "qcom,msm-dai-q6-dev";
460 qcom,msm-dai-q6-dev-id = <32772>;
461 };
462
463 qcom,msm-dai-q6-incall-music-rx {
464 compatible = "qcom,msm-dai-q6-dev";
465 qcom,msm-dai-q6-dev-id = <32773>;
466 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]467 };
468
469 qcom,msm-pcm-hostless {
470 compatible = "qcom,msm-pcm-hostless";
471 };
472
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]473 qcom,wcnss-wlan@fb000000 {
474 compatible = "qcom,wcnss_wlan";
475 reg = <0xfb000000 0x280000>;
476 reg-names = "wcnss_mmio";
477 interrupts = <0 145 0 0 146 0>;
478 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
479
480 qcom,pronto-vddmx-supply = <&pm8226_l3>;
481 qcom,pronto-vddcx-supply = <&pm8226_s1>;
482 qcom,pronto-vddpx-supply = <&pm8226_l6>;
483 qcom,iris-vddxo-supply = <&pm8226_l10>;
484 qcom,iris-vddrfa-supply = <&pm8226_l24>;
485 qcom,iris-vddpa-supply = <&pm8226_l16>;
486 qcom,iris-vdddig-supply = <&pm8226_l24>;
487
488 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
489 qcom,has_pronto_hw;
490 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]491
492 qcom,msm-adsp-sensors {
493 compatible = "qcom,msm-adsp-sensors";
494 qcom,src-id = <11>;
495 qcom,dst-id = <604>;
496 qcom,ab = <32505856>;
497 qcom,ib = <32505856>;
498 };
499
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]500 qcom,wdt@f9017000 {
501 compatible = "qcom,msm-watchdog";
502 reg = <0xf9017000 0x1000>;
503 interrupts = <0 3 0>, <0 4 0>;
504 qcom,bark-time = <11000>;
505 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]506 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]507 };
508
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]509 qcom,smem@fa00000 {
510 compatible = "qcom,smem";
511 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]512 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]513 <0xfc428000 0x4000>;
514 reg-names = "smem", "irq-reg-base", "aux-mem1";
515
516 qcom,smd-modem {
517 compatible = "qcom,smd";
518 qcom,smd-edge = <0>;
519 qcom,smd-irq-offset = <0x8>;
520 qcom,smd-irq-bitmask = <0x1000>;
521 qcom,pil-string = "modem";
522 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]523 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]524
525 qcom,smsm-modem {
526 compatible = "qcom,smsm";
527 qcom,smsm-edge = <0>;
528 qcom,smsm-irq-offset = <0x8>;
529 qcom,smsm-irq-bitmask = <0x2000>;
530 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]531 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]532
533 qcom,smd-adsp {
534 compatible = "qcom,smd";
535 qcom,smd-edge = <1>;
536 qcom,smd-irq-offset = <0x8>;
537 qcom,smd-irq-bitmask = <0x100>;
538 qcom,pil-string = "adsp";
539 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]540 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]541
542 qcom,smsm-adsp {
543 compatible = "qcom,smsm";
544 qcom,smsm-edge = <1>;
545 qcom,smsm-irq-offset = <0x8>;
546 qcom,smsm-irq-bitmask = <0x200>;
547 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]548 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]549
550 qcom,smd-wcnss {
551 compatible = "qcom,smd";
552 qcom,smd-edge = <6>;
553 qcom,smd-irq-offset = <0x8>;
554 qcom,smd-irq-bitmask = <0x20000>;
555 qcom,pil-string = "wcnss";
556 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]557 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]558
559 qcom,smsm-wcnss {
560 compatible = "qcom,smsm";
561 qcom,smsm-edge = <6>;
562 qcom,smsm-irq-offset = <0x8>;
563 qcom,smsm-irq-bitmask = <0x80000>;
564 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]565 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]566
567 qcom,smd-rpm {
568 compatible = "qcom,smd";
569 qcom,smd-edge = <15>;
570 qcom,smd-irq-offset = <0x8>;
571 qcom,smd-irq-bitmask = <0x1>;
572 interrupts = <0 168 1>;
573 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]574 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]575 };
576
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]577 rpm_bus: qcom,rpm-smd {
578 compatible = "qcom,rpm-smd";
579 rpm-channel-name = "rpm_requests";
580 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]581 };
582
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]583 sdcc1: qcom,sdcc@f9824000 {
584 cell-index = <1>; /* SDC1 eMMC slot */
585 compatible = "qcom,msm-sdcc";
586
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]587 reg = <0xf9824000 0x800>,
588 <0xf9824800 0x100>,
589 <0xf9804000 0x7000>;
590 reg-names = "core_mem", "dml_mem", "bam_mem";
591 interrupts = <0 123 0>, <0 137 0>;
592 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]593
594 qcom,bus-width = <8>;
595 status = "disabled";
596 };
597
598 sdcc2: qcom,sdcc@f98a4000 {
599 cell-index = <2>; /* SDC2 SD card slot */
600 compatible = "qcom,msm-sdcc";
601
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]602 reg = <0xf98a4000 0x800>,
603 <0xf98a4800 0x100>,
604 <0xf9884000 0x7000>;
605 reg-names = "core_mem", "dml_mem", "bam_mem";
606 interrupts = <0 125 0>, <0 220 0>;
607 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]608
609 qcom,bus-width = <4>;
610 status = "disabled";
611 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]612
613 spmi_bus: qcom,spmi@fc4c0000 {
614 cell-index = <0>;
615 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]616 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]617 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]618 <0Xfc4cb000 0x1000>,
619 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]620 /* 190,ee0_krait_hlos_spmi_periph_irq */
621 /* 187,channel_0_krait_hlos_trans_done_irq */
622 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]623 qcom,pmic-arb-ee = <0>;
624 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]625 };
626
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]627 i2c@f9926000 { /* BLSP-1 QUP-4 */
628 cell-index = <0>;
629 compatible = "qcom,i2c-qup";
630 reg = <0xf9926000 0x1000>;
631 #address-cells = <1>;
632 #size-cells = <0>;
633 reg-names = "qup_phys_addr";
634 interrupts = <0 98 0>;
635 interrupt-names = "qup_err_intr";
636 qcom,i2c-bus-freq = <100000>;
637 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]638
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]639 i2c@f9927000 { /* BLSP1 QUP5 */
640 cell-index = <5>;
641 compatible = "qcom,i2c-qup";
642 #address-cells = <1>;
643 #size-cells = <0>;
644 reg-names = "qup_phys_addr";
645 reg = <0xf9927000 0x1000>;
646 interrupt-names = "qup_err_intr";
647 interrupts = <0 99 0>;
648 qcom,i2c-bus-freq = <100000>;
649 qcom,i2c-src-freq = <19200000>;
650 };
651
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]652 qcom,acpuclk@f9011050 {
653 compatible = "qcom,acpuclk-a7";
654 reg = <0xf9011050 0x8>;
655 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]656 a7_cpu-supply = <&apc_vreg_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]657 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]658 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]659
660 qcom,ocmem@fdd00000 {
661 compatible = "qcom,msm-ocmem";
662 reg = <0xfdd00000 0x2000>,
663 <0xfdd02000 0x2000>,
664 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]665 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]666 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
667 interrupts = <0 76 0 0 77 0>;
668 interrupt-names = "ocmem_irq", "dm_irq";
669 qcom,ocmem-num-regions = <0x1>;
670 qcom,ocmem-num-macros = <0x2>;
671 qcom,resource-type = <0x706d636f>;
672 #address-cells = <1>;
673 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]674 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]675
676 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]677 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]678 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]679 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]680 };
681 };
682
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]683 qcom,venus@fdce0000 {
684 compatible = "qcom,pil-venus";
685 reg = <0xfdce0000 0x4000>,
686 <0xfdc80000 0x400>;
687 reg-names = "wrapper_base", "vbif_base";
688 vdd-supply = <&gdsc_venus>;
689
690 qcom,firmware-name = "venus";
691 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]692
693 qcom,pronto@fb21b000 {
694 compatible = "qcom,pil-pronto";
695 reg = <0xfb21b000 0x3000>,
696 <0xfc401700 0x4>,
697 <0xfd485300 0xc>;
698 reg-names = "pmu_base", "clk_base", "halt_base";
699 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]700 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]701
702 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]703
704 /* GPIO input from wcnss */
705 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
706
707 /* GPIO output to wcnss */
708 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]709 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]710
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]711 qcom,iris-fm {
712 compatible = "qcom,iris_fm";
713 };
714
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]715 qcom,lpass@fe200000 {
716 compatible = "qcom,pil-q6v5-lpass";
717 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]718 <0xfd485100 0x00010>,
719 <0xfc4016c0 0x00004>;
720 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]721 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]722 interrupts = <0 162 1>;
723
724 qcom,firmware-name = "adsp";
725 };
726
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]727 qcom,mss@fc880000 {
728 compatible = "qcom,pil-q6v5-mss";
729 reg = <0xfc880000 0x100>,
730 <0xfd485000 0x400>,
731 <0xfc820000 0x020>,
732 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]733 <0xfd485194 0x4>;
734 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]735 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]736
737 interrupts = <0 24 1>;
738 vdd_mss-supply = <&pm8226_s1>;
739 vdd_cx-supply = <&pm8226_s1_corner>;
740 vdd_mx-supply = <&pm8226_l3>;
741 vdd_pll-supply = <&pm8226_l8>;
742 qcom,vdd_pll = <1800000>;
743
744 qcom,is-loadable;
745 qcom,firmware-name = "mba";
746 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]747
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]748 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]749 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]750 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]751
752 /* GPIO output to mss */
753 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]754 };
755
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]756 qcom,msm-mem-hole {
757 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]758 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]759 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]760
761 tsens: tsens@fc4a8000 {
762 compatible = "qcom,msm-tsens";
763 reg = <0xfc4a8000 0x2000>,
764 <0xfc4b8000 0x1000>;
765 reg-names = "tsens_physical", "tsens_eeprom_physical";
766 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]767 qcom,sensors = <4>;
768 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]769 qcom,calib-mode = "fuse_map2";
770 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]771
772 qcom,msm-thermal {
773 compatible = "qcom,msm-thermal";
774 qcom,sensor-id = <0>;
775 qcom,poll-ms = <250>;
776 qcom,limit-temp = <60>;
777 qcom,temp-hysteresis = <10>;
778 qcom,freq-step = <2>;
779 };
780
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]781 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
782 compatible = "qcom,spi-qup-v2";
783 #address-cells = <1>;
784 #size-cells = <0>;
785 reg-names = "spi_physical", "spi_bam_physical";
786 reg = <0xf9923000 0x1000>,
787 <0xf9904000 0xF000>;
788 interrupt-names = "spi_irq", "spi_bam_irq";
789 interrupts = <0 95 0>, <0 238 0>;
790 spi-max-frequency = <19200000>;
791
792 gpios = <&msmgpio 3 0>, /* CLK */
793 <&msmgpio 1 0>, /* MISO */
794 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]795 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]796
797 qcom,infinite-mode = <0>;
798 qcom,use-bam;
799 qcom,ver-reg-exists;
800 qcom,bam-consumer-pipe-index = <12>;
801 qcom,bam-producer-pipe-index = <13>;
802 };
803
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]804 qcom,bam_dmux@fc834000 {
805 compatible = "qcom,bam_dmux";
806 reg = <0xfc834000 0x7000>;
807 interrupts = <0 29 1>;
808 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]809
810 qcom,msm-rtb {
811 compatible = "qcom,msm-rtb";
812 qcom,memory-reservation-type = "EBI1";
813 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
814 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]815
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]816 qcom,msm-rng@f9bff000 {
817 compatible = "qcom,msm-rng";
818 reg = <0xf9bff000 0x200>;
819 qcom,msm-rng-iface-clk;
820 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]821
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]822 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]823 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]824 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]825 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]826
827 jtag_mm0: jtagmm@fc33c000 {
828 compatible = "qcom,jtag-mm";
829 reg = <0xfc33c000 0x1000>,
830 <0xfc330000 0x1000>;
831 reg-names = "etm-base","debug-base";
832 };
833
834 jtag_mm1: jtagmm@fc33d000 {
835 compatible = "qcom,jtag-mm";
836 reg = <0xfc33d000 0x1000>,
837 <0xfc332000 0x1000>;
838 reg-names = "etm-base","debug-base";
839 };
840
841 jtag_mm2: jtagmm@fc33e000 {
842 compatible = "qcom,jtag-mm";
843 reg = <0xfc33e000 0x1000>,
844 <0xfc334000 0x1000>;
845 reg-names = "etm-base","debug-base";
846 };
847
848 jtag_mm3: jtagmm@fc33f000 {
849 compatible = "qcom,jtag-mm";
850 reg = <0xfc33f000 0x1000>,
851 <0xfc336000 0x1000>;
852 reg-names = "etm-base","debug-base";
853 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]854
855 qcom,ipc-spinlock@fd484000 {
856 compatible = "qcom,ipc-spinlock-sfpb";
857 reg = <0xfd484000 0x400>;
858 qcom,num-locks = <8>;
859 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]860};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]861
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]862&gdsc_venus {
863 status = "ok";
864};
865
866&gdsc_mdss {
867 status = "ok";
868};
869
870&gdsc_jpeg {
871 status = "ok";
872};
873
874&gdsc_vfe {
875 status = "ok";
876};
877
878&gdsc_oxili_cx {
879 status = "ok";
880};
881
882&gdsc_usb_hsic {
883 status = "ok";
884};
885
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]886/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]887/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]888/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]889
890&pm8226_vadc {
891 chan@0 {
892 label = "usb_in";
893 reg = <0>;
894 qcom,decimation = <0>;
895 qcom,pre-div-channel-scaling = <4>;
896 qcom,calibration-type = "absolute";
897 qcom,scale-function = <0>;
898 qcom,hw-settle-time = <0>;
899 qcom,fast-avg-setup = <0>;
900 };
901
902 chan@2 {
903 label = "vchg_sns";
904 reg = <2>;
905 qcom,decimation = <0>;
906 qcom,pre-div-channel-scaling = <3>;
907 qcom,calibration-type = "absolute";
908 qcom,scale-function = <0>;
909 qcom,hw-settle-time = <0>;
910 qcom,fast-avg-setup = <0>;
911 };
912
913 chan@5 {
914 label = "vcoin";
915 reg = <5>;
916 qcom,decimation = <0>;
917 qcom,pre-div-channel-scaling = <1>;
918 qcom,calibration-type = "absolute";
919 qcom,scale-function = <0>;
920 qcom,hw-settle-time = <0>;
921 qcom,fast-avg-setup = <0>;
922 };
923
924 chan@6 {
925 label = "vbat_sns";
926 reg = <6>;
927 qcom,decimation = <0>;
928 qcom,pre-div-channel-scaling = <1>;
929 qcom,calibration-type = "absolute";
930 qcom,scale-function = <0>;
931 qcom,hw-settle-time = <0>;
932 qcom,fast-avg-setup = <0>;
933 };
934
935 chan@7 {
936 label = "vph_pwr";
937 reg = <7>;
938 qcom,decimation = <0>;
939 qcom,pre-div-channel-scaling = <1>;
940 qcom,calibration-type = "absolute";
941 qcom,scale-function = <0>;
942 qcom,hw-settle-time = <0>;
943 qcom,fast-avg-setup = <0>;
944 };
945
946 chan@30 {
947 label = "batt_therm";
948 reg = <0x30>;
949 qcom,decimation = <0>;
950 qcom,pre-div-channel-scaling = <0>;
951 qcom,calibration-type = "ratiometric";
952 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]953 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]954 qcom,fast-avg-setup = <0>;
955 };
956
957 chan@31 {
958 label = "batt_id";
959 reg = <0x31>;
960 qcom,decimation = <0>;
961 qcom,pre-div-channel-scaling = <0>;
962 qcom,calibration-type = "ratiometric";
963 qcom,scale-function = <0>;
964 qcom,hw-settle-time = <2>;
965 qcom,fast-avg-setup = <0>;
966 };
967
968 chan@b2 {
969 label = "xo_therm_pu2";
970 reg = <0xb2>;
971 qcom,decimation = <0>;
972 qcom,pre-div-channel-scaling = <0>;
973 qcom,calibration-type = "ratiometric";
974 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]975 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]976 qcom,fast-avg-setup = <0>;
977 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]978
979};
980
981&pm8226_chg {
982 status = "ok";
983
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]984 qcom,chg-chgr@1000 {
985 status = "ok";
986 };
987
988 qcom,chg-buck@1100 {
989 status = "ok";
990 };
991
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]992 qcom,chg-bat-if@1200 {
993 status = "ok";
994 };
995
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]996 qcom,chg-usb-chgpth@1300 {
997 status = "ok";
998 };
999
1000 qcom,chg-boost@1500 {
1001 status = "ok";
1002 };
1003
1004 qcom,chg-misc@1600 {
1005 status = "ok";
1006 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1007};