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Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +00001//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
Chris Lattner8c4d88d2004-09-30 01:54:45 +000010// This file implements the VirtRegMap class.
11//
12// It also contains implementations of the the Spiller interface, which, given a
13// virtual register map and a machine function, eliminates all virtual
14// references by replacing them with physical register references - adding spill
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000015// code as necessary.
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000016//
17//===----------------------------------------------------------------------===//
18
Chris Lattner8c4d88d2004-09-30 01:54:45 +000019#define DEBUG_TYPE "spiller"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000020#include "VirtRegMap.h"
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000021#include "llvm/Function.h"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000022#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner8c4d88d2004-09-30 01:54:45 +000023#include "llvm/CodeGen/MachineFunction.h"
24#include "llvm/CodeGen/SSARegMap.h"
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000025#include "llvm/Target/TargetMachine.h"
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000026#include "llvm/Target/TargetInstrInfo.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000027#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
Chris Lattnera4f0b3a2006-08-27 12:54:02 +000029#include "llvm/Support/Compiler.h"
Reid Spencer551ccae2004-09-01 22:55:40 +000030#include "llvm/ADT/Statistic.h"
31#include "llvm/ADT/STLExtras.h"
Chris Lattner08a4d5a2007-01-23 00:59:48 +000032#include "llvm/ADT/SmallSet.h"
Chris Lattner27f29162004-10-26 15:35:58 +000033#include <algorithm>
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000034using namespace llvm;
35
Chris Lattnercd3245a2006-12-19 22:41:21 +000036STATISTIC(NumSpills, "Number of register spills");
37STATISTIC(NumStores, "Number of stores added");
38STATISTIC(NumLoads , "Number of loads added");
39STATISTIC(NumReused, "Number of values reused");
40STATISTIC(NumDSE , "Number of dead stores elided");
41STATISTIC(NumDCE , "Number of copies elided");
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +000042
Chris Lattnercd3245a2006-12-19 22:41:21 +000043namespace {
Chris Lattner8c4d88d2004-09-30 01:54:45 +000044 enum SpillerName { simple, local };
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +000045
Andrew Lenharthed41f1b2006-07-20 17:28:38 +000046 static cl::opt<SpillerName>
Chris Lattner8c4d88d2004-09-30 01:54:45 +000047 SpillerOpt("spiller",
Chris Lattner7fb64342004-10-01 19:04:51 +000048 cl::desc("Spiller to use: (default: local)"),
Chris Lattner8c4d88d2004-09-30 01:54:45 +000049 cl::Prefix,
50 cl::values(clEnumVal(simple, " simple spiller"),
51 clEnumVal(local, " local spiller"),
52 clEnumValEnd),
Chris Lattner7fb64342004-10-01 19:04:51 +000053 cl::init(local));
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000054}
55
Chris Lattner8c4d88d2004-09-30 01:54:45 +000056//===----------------------------------------------------------------------===//
57// VirtRegMap implementation
58//===----------------------------------------------------------------------===//
59
Chris Lattner29268692006-09-05 02:12:02 +000060VirtRegMap::VirtRegMap(MachineFunction &mf)
61 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
62 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT) {
63 grow();
64}
65
Chris Lattner8c4d88d2004-09-30 01:54:45 +000066void VirtRegMap::grow() {
Chris Lattner7f690e62004-09-30 02:15:18 +000067 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
68 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +000069}
70
Chris Lattner8c4d88d2004-09-30 01:54:45 +000071int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
72 assert(MRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +000073 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +000074 "attempt to assign stack slot to already spilled register");
Chris Lattner7f690e62004-09-30 02:15:18 +000075 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
76 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
77 RC->getAlignment());
78 Virt2StackSlotMap[virtReg] = frameIndex;
Chris Lattner8c4d88d2004-09-30 01:54:45 +000079 ++NumSpills;
80 return frameIndex;
81}
82
83void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
84 assert(MRegisterInfo::isVirtualRegister(virtReg));
Chris Lattner7f690e62004-09-30 02:15:18 +000085 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
Chris Lattner8c4d88d2004-09-30 01:54:45 +000086 "attempt to assign stack slot to already spilled register");
Chris Lattner7f690e62004-09-30 02:15:18 +000087 Virt2StackSlotMap[virtReg] = frameIndex;
Alkis Evlogimenos38af59a2004-05-29 20:38:05 +000088}
89
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000090void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
Chris Lattner35f27052006-05-01 21:16:03 +000091 unsigned OpNo, MachineInstr *NewMI) {
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000092 // Move previous memory references folded to new instruction.
93 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
Misha Brukmanedf128a2005-04-21 22:36:52 +000094 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
Chris Lattnerbec6a9e2004-10-01 23:15:36 +000095 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
96 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
Chris Lattnerdbea9732004-09-30 16:35:08 +000097 MI2VirtMap.erase(I++);
Chris Lattner8c4d88d2004-09-30 01:54:45 +000098 }
Chris Lattnerdbea9732004-09-30 16:35:08 +000099
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000100 ModRef MRInfo;
Evan Cheng5c2a4602006-12-08 08:02:34 +0000101 const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor();
102 if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 ||
Evan Chengcc22a7a2006-12-08 18:45:48 +0000103 TID->findTiedToSrcOperand(OpNo) != -1) {
Chris Lattner29268692006-09-05 02:12:02 +0000104 // Folded a two-address operand.
105 MRInfo = isModRef;
106 } else if (OldMI->getOperand(OpNo).isDef()) {
107 MRInfo = isMod;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000108 } else {
Chris Lattner29268692006-09-05 02:12:02 +0000109 MRInfo = isRef;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000110 }
Alkis Evlogimenos5f375022004-03-01 20:05:10 +0000111
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000112 // add new memory reference
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000113 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
Alkis Evlogimenos5f375022004-03-01 20:05:10 +0000114}
115
Chris Lattner7f690e62004-09-30 02:15:18 +0000116void VirtRegMap::print(std::ostream &OS) const {
117 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +0000118
Chris Lattner7f690e62004-09-30 02:15:18 +0000119 OS << "********** REGISTER MAP **********\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000120 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
Chris Lattner7f690e62004-09-30 02:15:18 +0000121 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
122 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
123 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
Misha Brukmanedf128a2005-04-21 22:36:52 +0000124
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000125 }
126
127 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
Chris Lattner7f690e62004-09-30 02:15:18 +0000128 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
129 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
130 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
131 OS << '\n';
Alkis Evlogimenos34d9bc92004-02-23 23:08:11 +0000132}
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000133
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000134void VirtRegMap::dump() const {
Bill Wendling5c7e3262006-12-17 05:15:13 +0000135 print(DOUT);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000136}
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000137
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000138
139//===----------------------------------------------------------------------===//
140// Simple Spiller Implementation
141//===----------------------------------------------------------------------===//
142
143Spiller::~Spiller() {}
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000144
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000145namespace {
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000146 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
Chris Lattner35f27052006-05-01 21:16:03 +0000147 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000148 };
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000149}
150
Chris Lattner35f27052006-05-01 21:16:03 +0000151bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000152 DOUT << "********** REWRITE MACHINE CODE **********\n";
153 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
Chris Lattnerb0f31bf2005-01-23 22:45:13 +0000154 const TargetMachine &TM = MF.getTarget();
155 const MRegisterInfo &MRI = *TM.getRegisterInfo();
156 bool *PhysRegsUsed = MF.getUsedPhysregs();
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000157
Chris Lattner4ea1b822004-09-30 02:33:48 +0000158 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
159 // each vreg once (in the case where a spilled vreg is used by multiple
160 // operands). This is always smaller than the number of operands to the
161 // current machine instr, so it should be small.
162 std::vector<unsigned> LoadedRegs;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000163
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000164 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
165 MBBI != E; ++MBBI) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000166 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000167 MachineBasicBlock &MBB = *MBBI;
168 for (MachineBasicBlock::iterator MII = MBB.begin(),
169 E = MBB.end(); MII != E; ++MII) {
170 MachineInstr &MI = *MII;
171 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000172 MachineOperand &MO = MI.getOperand(i);
Chris Lattner886dd912005-04-04 21:35:34 +0000173 if (MO.isRegister() && MO.getReg())
174 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
175 unsigned VirtReg = MO.getReg();
176 unsigned PhysReg = VRM.getPhys(VirtReg);
177 if (VRM.hasStackSlot(VirtReg)) {
178 int StackSlot = VRM.getStackSlot(VirtReg);
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000179 const TargetRegisterClass* RC =
180 MF.getSSARegMap()->getRegClass(VirtReg);
Misha Brukmanedf128a2005-04-21 22:36:52 +0000181
Chris Lattner886dd912005-04-04 21:35:34 +0000182 if (MO.isUse() &&
183 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
184 == LoadedRegs.end()) {
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000185 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
Chris Lattner886dd912005-04-04 21:35:34 +0000186 LoadedRegs.push_back(VirtReg);
187 ++NumLoads;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000188 DOUT << '\t' << *prior(MII);
Chris Lattner886dd912005-04-04 21:35:34 +0000189 }
Misha Brukmanedf128a2005-04-21 22:36:52 +0000190
Chris Lattner886dd912005-04-04 21:35:34 +0000191 if (MO.isDef()) {
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000192 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
Chris Lattner886dd912005-04-04 21:35:34 +0000193 ++NumStores;
194 }
Chris Lattner0fc27cc2004-09-30 02:59:33 +0000195 }
Chris Lattner886dd912005-04-04 21:35:34 +0000196 PhysRegsUsed[PhysReg] = true;
Chris Lattnere53f4a02006-05-04 17:52:23 +0000197 MI.getOperand(i).setReg(PhysReg);
Chris Lattner886dd912005-04-04 21:35:34 +0000198 } else {
199 PhysRegsUsed[MO.getReg()] = true;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000200 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000201 }
Chris Lattner886dd912005-04-04 21:35:34 +0000202
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000203 DOUT << '\t' << MI;
Chris Lattner4ea1b822004-09-30 02:33:48 +0000204 LoadedRegs.clear();
Alkis Evlogimenosdd420e02004-03-01 23:18:15 +0000205 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000206 }
207 return true;
208}
209
210//===----------------------------------------------------------------------===//
211// Local Spiller Implementation
212//===----------------------------------------------------------------------===//
213
214namespace {
Chris Lattner7fb64342004-10-01 19:04:51 +0000215 /// LocalSpiller - This spiller does a simple pass over the machine basic
216 /// block to attempt to keep spills in registers as much as possible for
217 /// blocks that have low register pressure (the vreg may be spilled due to
218 /// register pressure in other blocks).
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000219 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000220 const MRegisterInfo *MRI;
Chris Lattner7fb64342004-10-01 19:04:51 +0000221 const TargetInstrInfo *TII;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000222 public:
Chris Lattner35f27052006-05-01 21:16:03 +0000223 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000224 MRI = MF.getTarget().getRegisterInfo();
225 TII = MF.getTarget().getInstrInfo();
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000226 DOUT << "\n**** Local spiller rewriting function '"
227 << MF.getFunction()->getName() << "':\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000228
Chris Lattner7fb64342004-10-01 19:04:51 +0000229 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
230 MBB != E; ++MBB)
231 RewriteMBB(*MBB, VRM);
232 return true;
233 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000234 private:
Chris Lattner35f27052006-05-01 21:16:03 +0000235 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000236 };
237}
238
Chris Lattner66cf80f2006-02-03 23:13:58 +0000239/// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
240/// top down, keep track of which spills slots are available in each register.
Chris Lattner593c9582006-02-03 23:28:46 +0000241///
242/// Note that not all physregs are created equal here. In particular, some
243/// physregs are reloads that we are allowed to clobber or ignore at any time.
244/// Other physregs are values that the register allocated program is using that
245/// we cannot CHANGE, but we can read if we like. We keep track of this on a
246/// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
247/// entries. The predicate 'canClobberPhysReg()' checks this bit and
248/// addAvailable sets it if.
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000249namespace {
250class VISIBILITY_HIDDEN AvailableSpills {
Chris Lattner66cf80f2006-02-03 23:13:58 +0000251 const MRegisterInfo *MRI;
252 const TargetInstrInfo *TII;
253
254 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual
255 // register values that are still available, due to being loaded or stored to,
256 // but not invalidated yet.
257 std::map<int, unsigned> SpillSlotsAvailable;
258
259 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
260 // which stack slot values are currently held by a physreg. This is used to
261 // invalidate entries in SpillSlotsAvailable when a physreg is modified.
262 std::multimap<unsigned, int> PhysRegsAvailable;
263
Evan Cheng7a0d51c2006-12-14 07:54:05 +0000264 void disallowClobberPhysRegOnly(unsigned PhysReg);
265
Chris Lattner66cf80f2006-02-03 23:13:58 +0000266 void ClobberPhysRegOnly(unsigned PhysReg);
267public:
268 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
269 : MRI(mri), TII(tii) {
270 }
271
272 /// getSpillSlotPhysReg - If the specified stack slot is available in a
273 /// physical register, return that PhysReg, otherwise return 0.
274 unsigned getSpillSlotPhysReg(int Slot) const {
275 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot);
276 if (I != SpillSlotsAvailable.end())
Chris Lattner593c9582006-02-03 23:28:46 +0000277 return I->second >> 1; // Remove the CanClobber bit.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000278 return 0;
279 }
Chris Lattner540fec62006-02-25 01:51:33 +0000280
281 const MRegisterInfo *getRegInfo() const { return MRI; }
Chris Lattner66cf80f2006-02-03 23:13:58 +0000282
283 /// addAvailable - Mark that the specified stack slot is available in the
Chris Lattner593c9582006-02-03 23:28:46 +0000284 /// specified physreg. If CanClobber is true, the physreg can be modified at
285 /// any time without changing the semantics of the program.
286 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
Chris Lattner86662492006-02-03 23:50:46 +0000287 // If this stack slot is thought to be available in some other physreg,
288 // remove its record.
289 ModifyStackSlot(Slot);
290
Chris Lattner66cf80f2006-02-03 23:13:58 +0000291 PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
Jeff Cohen003cecb2006-02-04 03:27:39 +0000292 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
Chris Lattner66cf80f2006-02-03 23:13:58 +0000293
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000294 DOUT << "Remembering SS#" << Slot << " in physreg "
295 << MRI->getName(Reg) << "\n";
Chris Lattner66cf80f2006-02-03 23:13:58 +0000296 }
Evan Cheng7a0d51c2006-12-14 07:54:05 +0000297
Chris Lattner593c9582006-02-03 23:28:46 +0000298 /// canClobberPhysReg - Return true if the spiller is allowed to change the
299 /// value of the specified stackslot register if it desires. The specified
300 /// stack slot must be available in a physreg for this query to make sense.
301 bool canClobberPhysReg(int Slot) const {
302 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!");
303 return SpillSlotsAvailable.find(Slot)->second & 1;
304 }
Chris Lattner66cf80f2006-02-03 23:13:58 +0000305
Evan Cheng7a0d51c2006-12-14 07:54:05 +0000306 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
307 /// stackslot register. The register is still available but is no longer
308 /// allowed to be modifed.
309 void disallowClobberPhysReg(unsigned PhysReg);
310
Chris Lattner66cf80f2006-02-03 23:13:58 +0000311 /// ClobberPhysReg - This is called when the specified physreg changes
312 /// value. We use this to invalidate any info about stuff we thing lives in
313 /// it and any of its aliases.
314 void ClobberPhysReg(unsigned PhysReg);
315
316 /// ModifyStackSlot - This method is called when the value in a stack slot
317 /// changes. This removes information about which register the previous value
318 /// for this slot lives in (as the previous value is dead now).
319 void ModifyStackSlot(int Slot);
320};
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000321}
Chris Lattner66cf80f2006-02-03 23:13:58 +0000322
Evan Cheng7a0d51c2006-12-14 07:54:05 +0000323/// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
324/// stackslot register. The register is still available but is no longer
325/// allowed to be modifed.
326void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
327 std::multimap<unsigned, int>::iterator I =
328 PhysRegsAvailable.lower_bound(PhysReg);
329 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
330 int Slot = I->second;
331 I++;
332 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
333 "Bidirectional map mismatch!");
334 SpillSlotsAvailable[Slot] &= ~1;
335 DOUT << "PhysReg " << MRI->getName(PhysReg)
336 << " copied, it is available for use but can no longer be modified\n";
337 }
338}
339
340/// disallowClobberPhysReg - Unset the CanClobber bit of the specified
341/// stackslot register and its aliases. The register and its aliases may
342/// still available but is no longer allowed to be modifed.
343void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
344 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
345 disallowClobberPhysRegOnly(*AS);
346 disallowClobberPhysRegOnly(PhysReg);
347}
348
Chris Lattner66cf80f2006-02-03 23:13:58 +0000349/// ClobberPhysRegOnly - This is called when the specified physreg changes
350/// value. We use this to invalidate any info about stuff we thing lives in it.
351void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
352 std::multimap<unsigned, int>::iterator I =
353 PhysRegsAvailable.lower_bound(PhysReg);
Chris Lattner07cf1412006-02-03 00:36:31 +0000354 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000355 int Slot = I->second;
Chris Lattner07cf1412006-02-03 00:36:31 +0000356 PhysRegsAvailable.erase(I++);
Chris Lattner593c9582006-02-03 23:28:46 +0000357 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
Chris Lattner66cf80f2006-02-03 23:13:58 +0000358 "Bidirectional map mismatch!");
359 SpillSlotsAvailable.erase(Slot);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000360 DOUT << "PhysReg " << MRI->getName(PhysReg)
361 << " clobbered, invalidating SS#" << Slot << "\n";
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000362 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000363}
364
Chris Lattner66cf80f2006-02-03 23:13:58 +0000365/// ClobberPhysReg - This is called when the specified physreg changes
366/// value. We use this to invalidate any info about stuff we thing lives in
367/// it and any of its aliases.
368void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000369 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
Chris Lattner66cf80f2006-02-03 23:13:58 +0000370 ClobberPhysRegOnly(*AS);
371 ClobberPhysRegOnly(PhysReg);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000372}
373
Chris Lattner07cf1412006-02-03 00:36:31 +0000374/// ModifyStackSlot - This method is called when the value in a stack slot
375/// changes. This removes information about which register the previous value
376/// for this slot lives in (as the previous value is dead now).
Chris Lattner66cf80f2006-02-03 23:13:58 +0000377void AvailableSpills::ModifyStackSlot(int Slot) {
378 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot);
379 if (It == SpillSlotsAvailable.end()) return;
Chris Lattner593c9582006-02-03 23:28:46 +0000380 unsigned Reg = It->second >> 1;
Chris Lattner66cf80f2006-02-03 23:13:58 +0000381 SpillSlotsAvailable.erase(It);
Chris Lattner07cf1412006-02-03 00:36:31 +0000382
383 // This register may hold the value of multiple stack slots, only remove this
384 // stack slot from the set of values the register contains.
385 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
386 for (; ; ++I) {
387 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
388 "Map inverse broken!");
389 if (I->second == Slot) break;
390 }
391 PhysRegsAvailable.erase(I);
392}
393
394
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000395
Chris Lattner7fb64342004-10-01 19:04:51 +0000396// ReusedOp - For each reused operand, we keep track of a bit of information, in
397// case we need to rollback upon processing a new operand. See comments below.
398namespace {
399 struct ReusedOp {
400 // The MachineInstr operand that reused an available value.
401 unsigned Operand;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000402
Chris Lattner7fb64342004-10-01 19:04:51 +0000403 // StackSlot - The spill slot of the value being reused.
404 unsigned StackSlot;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000405
Chris Lattner7fb64342004-10-01 19:04:51 +0000406 // PhysRegReused - The physical register the value was available in.
407 unsigned PhysRegReused;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000408
Chris Lattner7fb64342004-10-01 19:04:51 +0000409 // AssignedPhysReg - The physreg that was assigned for use by the reload.
410 unsigned AssignedPhysReg;
Chris Lattner8a61a752005-10-06 17:19:06 +0000411
412 // VirtReg - The virtual register itself.
413 unsigned VirtReg;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000414
Chris Lattner8a61a752005-10-06 17:19:06 +0000415 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
416 unsigned vreg)
417 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
418 VirtReg(vreg) {}
Chris Lattner7fb64342004-10-01 19:04:51 +0000419 };
Chris Lattner540fec62006-02-25 01:51:33 +0000420
421 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
422 /// is reused instead of reloaded.
Chris Lattnerf8c68f62006-06-28 22:17:39 +0000423 class VISIBILITY_HIDDEN ReuseInfo {
Chris Lattner540fec62006-02-25 01:51:33 +0000424 MachineInstr &MI;
425 std::vector<ReusedOp> Reuses;
Evan Chenge077ef62006-11-04 00:21:55 +0000426 bool *PhysRegsClobbered;
Chris Lattner540fec62006-02-25 01:51:33 +0000427 public:
Evan Chenge077ef62006-11-04 00:21:55 +0000428 ReuseInfo(MachineInstr &mi, const MRegisterInfo *mri) : MI(mi) {
429 PhysRegsClobbered = new bool[mri->getNumRegs()];
430 std::fill(PhysRegsClobbered, PhysRegsClobbered+mri->getNumRegs(), false);
431 }
432 ~ReuseInfo() {
433 delete[] PhysRegsClobbered;
434 }
Chris Lattner540fec62006-02-25 01:51:33 +0000435
436 bool hasReuses() const {
437 return !Reuses.empty();
438 }
439
440 /// addReuse - If we choose to reuse a virtual register that is already
441 /// available instead of reloading it, remember that we did so.
442 void addReuse(unsigned OpNo, unsigned StackSlot,
443 unsigned PhysRegReused, unsigned AssignedPhysReg,
444 unsigned VirtReg) {
445 // If the reload is to the assigned register anyway, no undo will be
446 // required.
447 if (PhysRegReused == AssignedPhysReg) return;
448
449 // Otherwise, remember this.
450 Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused,
451 AssignedPhysReg, VirtReg));
452 }
Evan Chenge077ef62006-11-04 00:21:55 +0000453
454 void markClobbered(unsigned PhysReg) {
455 PhysRegsClobbered[PhysReg] = true;
456 }
457
458 bool isClobbered(unsigned PhysReg) const {
459 return PhysRegsClobbered[PhysReg];
460 }
Chris Lattner540fec62006-02-25 01:51:33 +0000461
462 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
463 /// is some other operand that is using the specified register, either pick
464 /// a new register to use, or evict the previous reload and use this reg.
465 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
466 AvailableSpills &Spills,
Evan Cheng3c82cab2007-01-19 22:40:14 +0000467 std::map<int, MachineInstr*> &MaybeDeadStores,
Chris Lattner08a4d5a2007-01-23 00:59:48 +0000468 SmallSet<unsigned, 8> &Rejected) {
Chris Lattner540fec62006-02-25 01:51:33 +0000469 if (Reuses.empty()) return PhysReg; // This is most often empty.
470
471 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
472 ReusedOp &Op = Reuses[ro];
473 // If we find some other reuse that was supposed to use this register
474 // exactly for its reload, we can change this reload to use ITS reload
Evan Cheng3c82cab2007-01-19 22:40:14 +0000475 // register. That is, unless its reload register has already been
476 // considered and subsequently rejected because it has also been reused
477 // by another operand.
478 if (Op.PhysRegReused == PhysReg &&
479 Rejected.count(Op.AssignedPhysReg) == 0) {
Chris Lattner540fec62006-02-25 01:51:33 +0000480 // Yup, use the reload register that we didn't use before.
Evan Cheng3c82cab2007-01-19 22:40:14 +0000481 unsigned NewReg = Op.AssignedPhysReg;
482 Rejected.insert(PhysReg);
483 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected);
Chris Lattner540fec62006-02-25 01:51:33 +0000484 } else {
485 // Otherwise, we might also have a problem if a previously reused
486 // value aliases the new register. If so, codegen the previous reload
487 // and use this one.
488 unsigned PRRU = Op.PhysRegReused;
489 const MRegisterInfo *MRI = Spills.getRegInfo();
490 if (MRI->areAliases(PRRU, PhysReg)) {
491 // Okay, we found out that an alias of a reused register
492 // was used. This isn't good because it means we have
493 // to undo a previous reuse.
494 MachineBasicBlock *MBB = MI->getParent();
495 const TargetRegisterClass *AliasRC =
Chris Lattner28bad082006-02-25 02:17:31 +0000496 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
497
498 // Copy Op out of the vector and remove it, we're going to insert an
499 // explicit load for it.
500 ReusedOp NewOp = Op;
501 Reuses.erase(Reuses.begin()+ro);
502
503 // Ok, we're going to try to reload the assigned physreg into the
504 // slot that we were supposed to in the first place. However, that
505 // register could hold a reuse. Check to see if it conflicts or
506 // would prefer us to use a different register.
507 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
Evan Cheng3c82cab2007-01-19 22:40:14 +0000508 MI, Spills, MaybeDeadStores, Rejected);
Chris Lattner28bad082006-02-25 02:17:31 +0000509
510 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
511 NewOp.StackSlot, AliasRC);
512 Spills.ClobberPhysReg(NewPhysReg);
513 Spills.ClobberPhysReg(NewOp.PhysRegReused);
Chris Lattner540fec62006-02-25 01:51:33 +0000514
515 // Any stores to this stack slot are not dead anymore.
Chris Lattner28bad082006-02-25 02:17:31 +0000516 MaybeDeadStores.erase(NewOp.StackSlot);
Chris Lattner540fec62006-02-25 01:51:33 +0000517
Chris Lattnere53f4a02006-05-04 17:52:23 +0000518 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
Chris Lattner540fec62006-02-25 01:51:33 +0000519
Chris Lattner28bad082006-02-25 02:17:31 +0000520 Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
Chris Lattner540fec62006-02-25 01:51:33 +0000521 ++NumLoads;
522 DEBUG(MachineBasicBlock::iterator MII = MI;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000523 DOUT << '\t' << *prior(MII));
Chris Lattner540fec62006-02-25 01:51:33 +0000524
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000525 DOUT << "Reuse undone!\n";
Chris Lattner540fec62006-02-25 01:51:33 +0000526 --NumReused;
Chris Lattner28bad082006-02-25 02:17:31 +0000527
528 // Finally, PhysReg is now available, go ahead and use it.
Chris Lattner540fec62006-02-25 01:51:33 +0000529 return PhysReg;
530 }
531 }
532 }
533 return PhysReg;
534 }
Evan Cheng3c82cab2007-01-19 22:40:14 +0000535
536 /// GetRegForReload - Helper for the above GetRegForReload(). Add a
537 /// 'Rejected' set to remember which registers have been considered and
538 /// rejected for the reload. This avoids infinite looping in case like
539 /// this:
540 /// t1 := op t2, t3
541 /// t2 <- assigned r0 for use by the reload but ended up reuse r1
542 /// t3 <- assigned r1 for use by the reload but ended up reuse r0
543 /// t1 <- desires r1
544 /// sees r1 is taken by t2, tries t2's reload register r0
545 /// sees r0 is taken by t3, tries t3's reload register r1
546 /// sees r1 is taken by t2, tries t2's reload register r0 ...
547 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
548 AvailableSpills &Spills,
549 std::map<int, MachineInstr*> &MaybeDeadStores) {
Chris Lattner08a4d5a2007-01-23 00:59:48 +0000550 SmallSet<unsigned, 8> Rejected;
Evan Cheng3c82cab2007-01-19 22:40:14 +0000551 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected);
552 }
Chris Lattner540fec62006-02-25 01:51:33 +0000553 };
Chris Lattner7fb64342004-10-01 19:04:51 +0000554}
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000555
Chris Lattner7fb64342004-10-01 19:04:51 +0000556
557/// rewriteMBB - Keep track of which spills are available even after the
558/// register allocator is done with them. If possible, avoid reloading vregs.
Chris Lattner35f27052006-05-01 21:16:03 +0000559void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000560
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000561 DOUT << MBB.getBasicBlock()->getName() << ":\n";
Chris Lattner7fb64342004-10-01 19:04:51 +0000562
Chris Lattner66cf80f2006-02-03 23:13:58 +0000563 // Spills - Keep track of which spilled values are available in physregs so
564 // that we can choose to reuse the physregs instead of emitting reloads.
565 AvailableSpills Spills(MRI, TII);
566
Chris Lattner52b25db2004-10-01 19:47:12 +0000567 // MaybeDeadStores - When we need to write a value back into a stack slot,
568 // keep track of the inserted store. If the stack slot value is never read
569 // (because the value was used from some available register, for example), and
570 // subsequently stored to, the original store is dead. This map keeps track
571 // of inserted stores that are not used. If we see a subsequent store to the
572 // same stack slot, the original store is deleted.
573 std::map<int, MachineInstr*> MaybeDeadStores;
574
Chris Lattnerb0f31bf2005-01-23 22:45:13 +0000575 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
576
Chris Lattner7fb64342004-10-01 19:04:51 +0000577 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
578 MII != E; ) {
579 MachineInstr &MI = *MII;
580 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
581
Chris Lattner540fec62006-02-25 01:51:33 +0000582 /// ReusedOperands - Keep track of operand reuse in case we need to undo
583 /// reuse.
Evan Chenge077ef62006-11-04 00:21:55 +0000584 ReuseInfo ReusedOperands(MI, MRI);
585
586 // Loop over all of the implicit defs, clearing them from our available
587 // sets.
Evan Cheng86facc22006-12-15 06:41:01 +0000588 const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
589 const unsigned *ImpDef = TID->ImplicitDefs;
Evan Chenge077ef62006-11-04 00:21:55 +0000590 if (ImpDef) {
591 for ( ; *ImpDef; ++ImpDef) {
592 PhysRegsUsed[*ImpDef] = true;
593 ReusedOperands.markClobbered(*ImpDef);
594 Spills.ClobberPhysReg(*ImpDef);
595 }
596 }
597
Chris Lattner7fb64342004-10-01 19:04:51 +0000598 // Process all of the spilled uses and all non spilled reg references.
599 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
600 MachineOperand &MO = MI.getOperand(i);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000601 if (!MO.isRegister() || MO.getReg() == 0)
602 continue; // Ignore non-register operands.
603
604 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
605 // Ignore physregs for spilling, but remember that it is used by this
606 // function.
Chris Lattner886dd912005-04-04 21:35:34 +0000607 PhysRegsUsed[MO.getReg()] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000608 ReusedOperands.markClobbered(MO.getReg());
Chris Lattner50ea01e2005-09-09 20:29:51 +0000609 continue;
610 }
611
612 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
613 "Not a virtual or a physical register?");
614
615 unsigned VirtReg = MO.getReg();
616 if (!VRM.hasStackSlot(VirtReg)) {
617 // This virtual register was assigned a physreg!
618 unsigned Phys = VRM.getPhys(VirtReg);
619 PhysRegsUsed[Phys] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000620 if (MO.isDef())
621 ReusedOperands.markClobbered(Phys);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000622 MI.getOperand(i).setReg(Phys);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000623 continue;
624 }
625
626 // This virtual register is now known to be a spilled value.
627 if (!MO.isUse())
628 continue; // Handle defs in the loop below (handle use&def here though)
Chris Lattner7fb64342004-10-01 19:04:51 +0000629
Chris Lattner50ea01e2005-09-09 20:29:51 +0000630 int StackSlot = VRM.getStackSlot(VirtReg);
631 unsigned PhysReg;
Chris Lattner7fb64342004-10-01 19:04:51 +0000632
Chris Lattner50ea01e2005-09-09 20:29:51 +0000633 // Check to see if this stack slot is available.
Chris Lattneraddc55a2006-04-28 01:46:50 +0000634 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) {
Chris Lattner7fb64342004-10-01 19:04:51 +0000635
Chris Lattner29268692006-09-05 02:12:02 +0000636 // This spilled operand might be part of a two-address operand. If this
637 // is the case, then changing it will necessarily require changing the
638 // def part of the instruction as well. However, in some cases, we
639 // aren't allowed to modify the reused register. If none of these cases
640 // apply, reuse it.
641 bool CanReuse = true;
Evan Cheng86facc22006-12-15 06:41:01 +0000642 int ti = TID->getOperandConstraint(i, TOI::TIED_TO);
Evan Cheng360c2dd2006-11-01 23:06:55 +0000643 if (ti != -1 &&
644 MI.getOperand(ti).isReg() &&
645 MI.getOperand(ti).getReg() == VirtReg) {
Chris Lattner29268692006-09-05 02:12:02 +0000646 // Okay, we have a two address operand. We can reuse this physreg as
Evan Cheng3c82cab2007-01-19 22:40:14 +0000647 // long as we are allowed to clobber the value and there isn't an
648 // earlier def that has already clobbered the physreg.
Evan Chenge077ef62006-11-04 00:21:55 +0000649 CanReuse = Spills.canClobberPhysReg(StackSlot) &&
650 !ReusedOperands.isClobbered(PhysReg);
Chris Lattner29268692006-09-05 02:12:02 +0000651 }
652
653 if (CanReuse) {
Chris Lattneraddc55a2006-04-28 01:46:50 +0000654 // If this stack slot value is already available, reuse it!
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000655 DOUT << "Reusing SS#" << StackSlot << " from physreg "
656 << MRI->getName(PhysReg) << " for vreg"
657 << VirtReg <<" instead of reloading into physreg "
658 << MRI->getName(VRM.getPhys(VirtReg)) << "\n";
Chris Lattnere53f4a02006-05-04 17:52:23 +0000659 MI.getOperand(i).setReg(PhysReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000660
661 // The only technical detail we have is that we don't know that
662 // PhysReg won't be clobbered by a reloaded stack slot that occurs
663 // later in the instruction. In particular, consider 'op V1, V2'.
664 // If V1 is available in physreg R0, we would choose to reuse it
665 // here, instead of reloading it into the register the allocator
666 // indicated (say R1). However, V2 might have to be reloaded
667 // later, and it might indicate that it needs to live in R0. When
668 // this occurs, we need to have information available that
669 // indicates it is safe to use R1 for the reload instead of R0.
670 //
671 // To further complicate matters, we might conflict with an alias,
672 // or R0 and R1 might not be compatible with each other. In this
673 // case, we actually insert a reload for V1 in R1, ensuring that
674 // we can get at R0 or its alias.
675 ReusedOperands.addReuse(i, StackSlot, PhysReg,
676 VRM.getPhys(VirtReg), VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000677 if (ti != -1)
678 // Only mark it clobbered if this is a use&def operand.
679 ReusedOperands.markClobbered(PhysReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000680 ++NumReused;
681 continue;
682 }
683
684 // Otherwise we have a situation where we have a two-address instruction
685 // whose mod/ref operand needs to be reloaded. This reload is already
686 // available in some register "PhysReg", but if we used PhysReg as the
687 // operand to our 2-addr instruction, the instruction would modify
688 // PhysReg. This isn't cool if something later uses PhysReg and expects
689 // to get its initial value.
Chris Lattner50ea01e2005-09-09 20:29:51 +0000690 //
Chris Lattneraddc55a2006-04-28 01:46:50 +0000691 // To avoid this problem, and to avoid doing a load right after a store,
692 // we emit a copy from PhysReg into the designated register for this
693 // operand.
694 unsigned DesignatedReg = VRM.getPhys(VirtReg);
695 assert(DesignatedReg && "Must map virtreg to physreg!");
696
697 // Note that, if we reused a register for a previous operand, the
698 // register we want to reload into might not actually be
699 // available. If this occurs, use the register indicated by the
700 // reuser.
701 if (ReusedOperands.hasReuses())
702 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
703 Spills, MaybeDeadStores);
704
Chris Lattnerba1fc3d2006-04-28 04:43:18 +0000705 // If the mapped designated register is actually the physreg we have
706 // incoming, we don't need to inserted a dead copy.
707 if (DesignatedReg == PhysReg) {
708 // If this stack slot value is already available, reuse it!
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000709 DOUT << "Reusing SS#" << StackSlot << " from physreg "
710 << MRI->getName(PhysReg) << " for vreg"
711 << VirtReg
712 << " instead of reloading into same physreg.\n";
Chris Lattnere53f4a02006-05-04 17:52:23 +0000713 MI.getOperand(i).setReg(PhysReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000714 ReusedOperands.markClobbered(PhysReg);
Chris Lattnerba1fc3d2006-04-28 04:43:18 +0000715 ++NumReused;
716 continue;
717 }
718
Chris Lattneraddc55a2006-04-28 01:46:50 +0000719 const TargetRegisterClass* RC =
720 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
721
722 PhysRegsUsed[DesignatedReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000723 ReusedOperands.markClobbered(DesignatedReg);
Chris Lattneraddc55a2006-04-28 01:46:50 +0000724 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
725
726 // This invalidates DesignatedReg.
727 Spills.ClobberPhysReg(DesignatedReg);
728
729 Spills.addAvailable(StackSlot, DesignatedReg);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000730 MI.getOperand(i).setReg(DesignatedReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000731 DOUT << '\t' << *prior(MII);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000732 ++NumReused;
733 continue;
734 }
735
736 // Otherwise, reload it and remember that we have it.
737 PhysReg = VRM.getPhys(VirtReg);
Chris Lattner172c3622006-01-04 06:47:48 +0000738 assert(PhysReg && "Must map virtreg to physreg!");
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000739 const TargetRegisterClass* RC =
740 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000741
Chris Lattner50ea01e2005-09-09 20:29:51 +0000742 // Note that, if we reused a register for a previous operand, the
743 // register we want to reload into might not actually be
744 // available. If this occurs, use the register indicated by the
745 // reuser.
Chris Lattner540fec62006-02-25 01:51:33 +0000746 if (ReusedOperands.hasReuses())
747 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
748 Spills, MaybeDeadStores);
749
Chris Lattner50ea01e2005-09-09 20:29:51 +0000750 PhysRegsUsed[PhysReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000751 ReusedOperands.markClobbered(PhysReg);
Chris Lattnerbf9716b2005-09-30 01:29:00 +0000752 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000753 // This invalidates PhysReg.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000754 Spills.ClobberPhysReg(PhysReg);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000755
756 // Any stores to this stack slot are not dead anymore.
757 MaybeDeadStores.erase(StackSlot);
Chris Lattner66cf80f2006-02-03 23:13:58 +0000758 Spills.addAvailable(StackSlot, PhysReg);
Chris Lattner50ea01e2005-09-09 20:29:51 +0000759 ++NumLoads;
Chris Lattnere53f4a02006-05-04 17:52:23 +0000760 MI.getOperand(i).setReg(PhysReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000761 DOUT << '\t' << *prior(MII);
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000762 }
763
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000764 DOUT << '\t' << MI;
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000765
Chris Lattner7fb64342004-10-01 19:04:51 +0000766 // If we have folded references to memory operands, make sure we clear all
767 // physical registers that may contain the value of the spilled virtual
768 // register
Chris Lattner8f1d6402005-01-14 15:54:24 +0000769 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
770 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000771 DOUT << "Folded vreg: " << I->second.first << " MR: "
772 << I->second.second;
Chris Lattnerbec6a9e2004-10-01 23:15:36 +0000773 unsigned VirtReg = I->second.first;
774 VirtRegMap::ModRef MR = I->second.second;
Chris Lattnercea86882005-09-19 06:56:21 +0000775 if (!VRM.hasStackSlot(VirtReg)) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000776 DOUT << ": No stack slot!\n";
Chris Lattnercea86882005-09-19 06:56:21 +0000777 continue;
778 }
779 int SS = VRM.getStackSlot(VirtReg);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000780 DOUT << " - StackSlot: " << SS << "\n";
Chris Lattnercea86882005-09-19 06:56:21 +0000781
782 // If this folded instruction is just a use, check to see if it's a
783 // straight load from the virt reg slot.
784 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
785 int FrameIdx;
Chris Lattner40839602006-02-02 20:12:32 +0000786 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
Chris Lattner6ec36262006-10-12 17:45:38 +0000787 if (FrameIdx == SS) {
788 // If this spill slot is available, turn it into a copy (or nothing)
789 // instead of leaving it as a load!
790 if (unsigned InReg = Spills.getSpillSlotPhysReg(SS)) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000791 DOUT << "Promoted Load To Copy: " << MI;
Chris Lattner6ec36262006-10-12 17:45:38 +0000792 MachineFunction &MF = *MBB.getParent();
793 if (DestReg != InReg) {
794 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
795 MF.getSSARegMap()->getRegClass(VirtReg));
796 // Revisit the copy so we make sure to notice the effects of the
797 // operation on the destreg (either needing to RA it if it's
798 // virtual or needing to clobber any values if it's physical).
799 NextMII = &MI;
800 --NextMII; // backtrack to the copy.
801 }
802 VRM.RemoveFromFoldedVirtMap(&MI);
803 MBB.erase(&MI);
804 goto ProcessNextInst;
Chris Lattnercea86882005-09-19 06:56:21 +0000805 }
Chris Lattnercea86882005-09-19 06:56:21 +0000806 }
807 }
808 }
809
810 // If this reference is not a use, any previous store is now dead.
811 // Otherwise, the store to this stack slot is not dead anymore.
812 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
813 if (MDSI != MaybeDeadStores.end()) {
814 if (MR & VirtRegMap::isRef) // Previous store is not dead.
815 MaybeDeadStores.erase(MDSI);
816 else {
817 // If we get here, the store is dead, nuke it now.
Chris Lattner35f27052006-05-01 21:16:03 +0000818 assert(VirtRegMap::isMod && "Can't be modref!");
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000819 DOUT << "Removed dead store:\t" << *MDSI->second;
Chris Lattner35f27052006-05-01 21:16:03 +0000820 MBB.erase(MDSI->second);
Chris Lattner229924a2006-05-01 22:03:24 +0000821 VRM.RemoveFromFoldedVirtMap(MDSI->second);
Chris Lattner35f27052006-05-01 21:16:03 +0000822 MaybeDeadStores.erase(MDSI);
823 ++NumDSE;
Chris Lattnercea86882005-09-19 06:56:21 +0000824 }
825 }
826
827 // If the spill slot value is available, and this is a new definition of
828 // the value, the value is not available anymore.
829 if (MR & VirtRegMap::isMod) {
Chris Lattner07cf1412006-02-03 00:36:31 +0000830 // Notice that the value in this stack slot has been modified.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000831 Spills.ModifyStackSlot(SS);
Chris Lattnercd816392006-02-02 23:29:36 +0000832
833 // If this is *just* a mod of the value, check to see if this is just a
834 // store to the spill slot (i.e. the spill got merged into the copy). If
835 // so, realize that the vreg is available now, and add the store to the
836 // MaybeDeadStore info.
837 int StackSlot;
838 if (!(MR & VirtRegMap::isRef)) {
839 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
840 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
841 "Src hasn't been allocated yet?");
Chris Lattner07cf1412006-02-03 00:36:31 +0000842 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
Chris Lattnercd816392006-02-02 23:29:36 +0000843 // this as a potentially dead store in case there is a subsequent
844 // store into the stack slot without a read from it.
845 MaybeDeadStores[StackSlot] = &MI;
846
Chris Lattnercd816392006-02-02 23:29:36 +0000847 // If the stack slot value was previously available in some other
848 // register, change it now. Otherwise, make the register available,
849 // in PhysReg.
Chris Lattner593c9582006-02-03 23:28:46 +0000850 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/);
Chris Lattnercd816392006-02-02 23:29:36 +0000851 }
852 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000853 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000854 }
855
Chris Lattner7fb64342004-10-01 19:04:51 +0000856 // Process all of the spilled defs.
857 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
858 MachineOperand &MO = MI.getOperand(i);
859 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
860 unsigned VirtReg = MO.getReg();
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000861
Chris Lattner7fb64342004-10-01 19:04:51 +0000862 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner29268692006-09-05 02:12:02 +0000863 // Check to see if this is a noop copy. If so, eliminate the
864 // instruction before considering the dest reg to be changed.
865 unsigned Src, Dst;
866 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
867 ++NumDCE;
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000868 DOUT << "Removing now-noop copy: " << MI;
Chris Lattner29268692006-09-05 02:12:02 +0000869 MBB.erase(&MI);
870 VRM.RemoveFromFoldedVirtMap(&MI);
Evan Cheng7a0d51c2006-12-14 07:54:05 +0000871 Spills.disallowClobberPhysReg(VirtReg);
Chris Lattner29268692006-09-05 02:12:02 +0000872 goto ProcessNextInst;
Chris Lattner7fb64342004-10-01 19:04:51 +0000873 }
Chris Lattner6ec36262006-10-12 17:45:38 +0000874
875 // If it's not a no-op copy, it clobbers the value in the destreg.
Chris Lattner29268692006-09-05 02:12:02 +0000876 Spills.ClobberPhysReg(VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000877 ReusedOperands.markClobbered(VirtReg);
Chris Lattner6ec36262006-10-12 17:45:38 +0000878
879 // Check to see if this instruction is a load from a stack slot into
880 // a register. If so, this provides the stack slot value in the reg.
881 int FrameIdx;
882 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
883 assert(DestReg == VirtReg && "Unknown load situation!");
884
885 // Otherwise, if it wasn't available, remember that it is now!
886 Spills.addAvailable(FrameIdx, DestReg);
887 goto ProcessNextInst;
888 }
889
Chris Lattner29268692006-09-05 02:12:02 +0000890 continue;
Misha Brukmanedf128a2005-04-21 22:36:52 +0000891 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000892
Chris Lattner84e752a2006-02-03 03:06:49 +0000893 // The only vregs left are stack slot definitions.
894 int StackSlot = VRM.getStackSlot(VirtReg);
895 const TargetRegisterClass *RC =
896 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000897
Chris Lattner29268692006-09-05 02:12:02 +0000898 // If this def is part of a two-address operand, make sure to execute
899 // the store from the correct physical register.
900 unsigned PhysReg;
Evan Chengcc22a7a2006-12-08 18:45:48 +0000901 int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i);
Evan Cheng360c2dd2006-11-01 23:06:55 +0000902 if (TiedOp != -1)
903 PhysReg = MI.getOperand(TiedOp).getReg();
Evan Chenge077ef62006-11-04 00:21:55 +0000904 else {
Chris Lattner29268692006-09-05 02:12:02 +0000905 PhysReg = VRM.getPhys(VirtReg);
Evan Chenge077ef62006-11-04 00:21:55 +0000906 if (ReusedOperands.isClobbered(PhysReg)) {
907 // Another def has taken the assigned physreg. It must have been a
908 // use&def which got it due to reuse. Undo the reuse!
909 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
910 Spills, MaybeDeadStores);
911 }
912 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000913
Chris Lattner84e752a2006-02-03 03:06:49 +0000914 PhysRegsUsed[PhysReg] = true;
Evan Chenge077ef62006-11-04 00:21:55 +0000915 ReusedOperands.markClobbered(PhysReg);
Chris Lattner84e752a2006-02-03 03:06:49 +0000916 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000917 DOUT << "Store:\t" << *next(MII);
Chris Lattnere53f4a02006-05-04 17:52:23 +0000918 MI.getOperand(i).setReg(PhysReg);
Chris Lattner7fb64342004-10-01 19:04:51 +0000919
Chris Lattner84e752a2006-02-03 03:06:49 +0000920 // If there is a dead store to this stack slot, nuke it now.
921 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
922 if (LastStore) {
Bill Wendlingb2b9c202006-11-17 02:09:07 +0000923 DOUT << "Removed dead store:\t" << *LastStore;
Chris Lattner84e752a2006-02-03 03:06:49 +0000924 ++NumDSE;
925 MBB.erase(LastStore);
Chris Lattner229924a2006-05-01 22:03:24 +0000926 VRM.RemoveFromFoldedVirtMap(LastStore);
Chris Lattner7fb64342004-10-01 19:04:51 +0000927 }
Chris Lattner84e752a2006-02-03 03:06:49 +0000928 LastStore = next(MII);
929
930 // If the stack slot value was previously available in some other
931 // register, change it now. Otherwise, make the register available,
932 // in PhysReg.
Chris Lattner66cf80f2006-02-03 23:13:58 +0000933 Spills.ModifyStackSlot(StackSlot);
934 Spills.ClobberPhysReg(PhysReg);
Chris Lattner66cf80f2006-02-03 23:13:58 +0000935 Spills.addAvailable(StackSlot, PhysReg);
Chris Lattner84e752a2006-02-03 03:06:49 +0000936 ++NumStores;
Evan Chengf50d09a2007-02-08 06:04:54 +0000937
938 // Check to see if this is a noop copy. If so, eliminate the
939 // instruction before considering the dest reg to be changed.
940 {
941 unsigned Src, Dst;
942 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
943 ++NumDCE;
944 DOUT << "Removing now-noop copy: " << MI;
945 MBB.erase(&MI);
946 VRM.RemoveFromFoldedVirtMap(&MI);
947 goto ProcessNextInst;
948 }
949 }
Chris Lattner7fb64342004-10-01 19:04:51 +0000950 }
951 }
Chris Lattnercea86882005-09-19 06:56:21 +0000952 ProcessNextInst:
Chris Lattner7fb64342004-10-01 19:04:51 +0000953 MII = NextMII;
954 }
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000955}
956
Chris Lattnerf7da2c72006-08-24 22:43:55 +0000957
958
Chris Lattner8c4d88d2004-09-30 01:54:45 +0000959llvm::Spiller* llvm::createSpiller() {
960 switch (SpillerOpt) {
961 default: assert(0 && "Unreachable!");
962 case local:
963 return new LocalSpiller();
964 case simple:
965 return new SimpleSpiller();
966 }
Alkis Evlogimenos0d6c5b62004-02-24 08:58:30 +0000967}