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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070058const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
59const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
60 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070061
Erik Gilling87e707e2012-06-29 17:35:13 -070062struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070063
Greg Hackmann9130e702012-07-30 14:53:04 -070064struct exynos5_gsc_map_t {
65 enum {
66 GSC_NONE = 0,
67 GSC_M2M,
68 // TODO: GSC_LOCAL_PATH
69 } mode;
70 int idx;
71};
72
Greg Hackmann86eb1c62012-05-30 09:25:51 -070073struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070074 int overlay_map[NUM_HW_WINDOWS];
75 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
76 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077};
78
Greg Hackmann44a6d422012-09-17 17:31:30 -070079const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070080struct exynos5_gsc_data_t {
81 void *gsc;
82 exynos_gsc_img src_cfg;
83 exynos_gsc_img dst_cfg;
84 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
85 size_t current_buf;
86};
87
Erik Gilling87e707e2012-06-29 17:35:13 -070088struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070089 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070090
Greg Hackmannf6f2e542012-07-16 16:10:27 -070091 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070092 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070093 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070094
Greg Hackmannf6f2e542012-07-16 16:10:27 -070095 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -070096 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -070097 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070099 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700100
Greg Hackmannd92fe212012-09-11 14:28:41 -0700101 int32_t xres;
102 int32_t yres;
103 int32_t xdpi;
104 int32_t ydpi;
105 int32_t vsync_period;
106
Benoit Goby8bad7e32012-08-16 14:17:14 -0700107 int hdmi_mixer0;
108 int hdmi_layer0;
109 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700111 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700112 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700114 int hdmi_w;
115 int hdmi_h;
116 exynos_gsc_img hdmi_src;
117 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700118
119 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700120
121 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700122 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700123 const void *last_handles[NUM_HW_WINDOWS];
124 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700125};
126
Greg Hackmann9130e702012-07-30 14:53:04 -0700127static void dump_handle(private_handle_t *h)
128{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700129 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
130 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700131}
132
Erik Gilling87e707e2012-06-29 17:35:13 -0700133static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700134{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700135 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
136 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
137 l->compositionType, l->flags, l->handle, l->transform,
138 l->blending,
139 l->sourceCrop.left,
140 l->sourceCrop.top,
141 l->sourceCrop.right,
142 l->sourceCrop.bottom,
143 l->displayFrame.left,
144 l->displayFrame.top,
145 l->displayFrame.right,
146 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700147
Greg Hackmann9130e702012-07-30 14:53:04 -0700148 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
149 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700150}
151
152static void dump_config(s3c_fb_win_config &c)
153{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700154 ALOGV("\tstate = %u", c.state);
155 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
156 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
157 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700158 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700159 c.fd, c.offset, c.stride,
160 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700161 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700162 }
163 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
164 ALOGV("\t\tcolor = %u", c.color);
165 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700166}
167
Greg Hackmann9130e702012-07-30 14:53:04 -0700168static void dump_gsc_img(exynos_gsc_img &c)
169{
170 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
171 c.x, c.y, c.w, c.h, c.fw, c.fh);
172 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
173 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
174}
175
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700176inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
177inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700178template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
179template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
180
181static bool is_transformed(const hwc_layer_1_t &layer)
182{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700183 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700184}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700185
Greg Hackmann9130e702012-07-30 14:53:04 -0700186static bool is_rotated(const hwc_layer_1_t &layer)
187{
188 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
189 (layer.transform & HAL_TRANSFORM_ROT_180);
190}
191
Erik Gilling87e707e2012-06-29 17:35:13 -0700192static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700194 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
195 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700196}
197
Benoit Goby8bad7e32012-08-16 14:17:14 -0700198static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
199{
200 return c1.x != c2.x ||
201 c1.y != c2.y ||
202 c1.w != c2.w ||
203 c1.h != c2.h ||
204 c1.format != c2.format ||
205 c1.rot != c2.rot ||
206 c1.cacheable != c2.cacheable ||
207 c1.drmMode != c2.drmMode;
208}
209
210static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
211{
212 return gsc_dst_cfg_changed(c1, c2) ||
213 c1.fw != c2.fw ||
214 c1.fh != c2.fh;
215}
216
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700217static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
218{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700219 switch (format) {
220 case HAL_PIXEL_FORMAT_RGBA_8888:
221 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
222 case HAL_PIXEL_FORMAT_RGBX_8888:
223 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
224 case HAL_PIXEL_FORMAT_RGBA_5551:
225 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700226 case HAL_PIXEL_FORMAT_RGB_565:
227 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700228 default:
229 return S3C_FB_PIXEL_FORMAT_MAX;
230 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700231}
232
233static bool exynos5_format_is_supported(int format)
234{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700235 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700236}
237
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700238static bool exynos5_format_is_rgb(int format)
239{
240 switch (format) {
241 case HAL_PIXEL_FORMAT_RGBA_8888:
242 case HAL_PIXEL_FORMAT_RGBX_8888:
243 case HAL_PIXEL_FORMAT_RGB_888:
244 case HAL_PIXEL_FORMAT_RGB_565:
245 case HAL_PIXEL_FORMAT_BGRA_8888:
246 case HAL_PIXEL_FORMAT_RGBA_5551:
247 case HAL_PIXEL_FORMAT_RGBA_4444:
248 return true;
249
250 default:
251 return false;
252 }
253}
254
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255static bool exynos5_format_is_supported_by_gscaler(int format)
256{
Greg Hackmann9130e702012-07-30 14:53:04 -0700257 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700258 case HAL_PIXEL_FORMAT_RGBX_8888:
259 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700260 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700261 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700262 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700263 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700264
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700265 default:
266 return false;
267 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700268}
269
Greg Hackmann296668e2012-08-14 15:51:40 -0700270static bool exynos5_format_is_ycrcb(int format)
271{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700272 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700273}
274
Greg Hackmann9130e702012-07-30 14:53:04 -0700275static bool exynos5_format_requires_gscaler(int format)
276{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700277 return (exynos5_format_is_supported_by_gscaler(format) &&
278 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700279}
280
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700281static uint8_t exynos5_format_to_bpp(int format)
282{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700283 switch (format) {
284 case HAL_PIXEL_FORMAT_RGBA_8888:
285 case HAL_PIXEL_FORMAT_RGBX_8888:
286 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700287
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700288 case HAL_PIXEL_FORMAT_RGBA_5551:
289 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700290 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700291 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700292
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700293 default:
294 ALOGW("unrecognized pixel format %u", format);
295 return 0;
296 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700297}
298
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700299static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
300 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700301{
302 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
303
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700304 int max_w = is_rotated(layer) ? 2048 : 4800;
305 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700306
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700307 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
308 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
309 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700310
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700311 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
312 int dest_w, dest_h;
313 if (rot90or270) {
314 dest_w = HEIGHT(layer.displayFrame);
315 dest_h = WIDTH(layer.displayFrame);
316 } else {
317 dest_w = WIDTH(layer.displayFrame);
318 dest_h = HEIGHT(layer.displayFrame);
319 }
320 int max_downscale = local_path ? 4 : 16;
321 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700322
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700323 return exynos5_format_is_supported_by_gscaler(format) &&
324 handle->stride <= max_w &&
325 handle->stride % GSC_W_ALIGNMENT == 0 &&
326 src_w <= dest_w * max_downscale &&
327 dest_w <= src_w * max_upscale &&
328 handle->vstride <= max_h &&
329 handle->vstride % GSC_H_ALIGNMENT == 0 &&
330 src_h <= dest_h * max_downscale &&
331 dest_h <= src_h * max_upscale &&
332 // per 46.2
333 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
334 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
335 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700336}
337
Greg Hackmann09c45c22012-09-20 09:35:37 -0700338static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
339{
340 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
341 || is_transformed(layer);
342}
343
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700344int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
345{
346 struct v4l2_dv_preset preset;
347 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700348 int index = 0;
349 bool found = false;
350 int ret;
351
Benoit Goby8bad7e32012-08-16 14:17:14 -0700352 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700353 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
354 return -1;
355 }
356
357 while (true) {
358 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700359 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700360
361 if (ret < 0) {
362 if (errno == EINVAL)
363 break;
364 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
365 return -1;
366 }
367
368 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
369 __func__, enum_preset.index, enum_preset.preset,
370 enum_preset.width, enum_preset.height, enum_preset.name);
371
372 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700373 dev->hdmi_w = enum_preset.width;
374 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700375 found = true;
376 }
377 }
378
379 return found ? 0 : -1;
380}
381
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700382static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
383{
384 switch (blending) {
385 case HWC_BLENDING_NONE:
386 return S3C_FB_BLENDING_NONE;
387 case HWC_BLENDING_PREMULT:
388 return S3C_FB_BLENDING_PREMULT;
389 case HWC_BLENDING_COVERAGE:
390 return S3C_FB_BLENDING_COVERAGE;
391
392 default:
393 return S3C_FB_BLENDING_MAX;
394 }
395}
396
397static bool exynos5_blending_is_supported(int32_t blending)
398{
399 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
400}
401
Benoit Goby8bad7e32012-08-16 14:17:14 -0700402static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
403{
404 struct v4l2_requestbuffers reqbuf;
405 struct v4l2_subdev_format sd_fmt;
406 struct v4l2_subdev_crop sd_crop;
407 struct v4l2_format fmt;
408 struct v4l2_buffer buffer;
409 struct v4l2_plane planes[1];
410
411 memset(&reqbuf, 0, sizeof(reqbuf));
412 memset(&sd_fmt, 0, sizeof(sd_fmt));
413 memset(&sd_crop, 0, sizeof(sd_crop));
414 memset(&fmt, 0, sizeof(fmt));
415 memset(&buffer, 0, sizeof(buffer));
416 memset(planes, 0, sizeof(planes));
417
418 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
419 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
420 sd_fmt.format.width = 1;
421 sd_fmt.format.height = 1;
422 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
423 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
424 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
425 return -1;
426 }
427
428 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
429 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
430 sd_crop.rect.left = 0;
431 sd_crop.rect.top = 0;
432 sd_crop.rect.width = 1;
433 sd_crop.rect.height = 1;
434 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
435 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
436 return -1;
437 }
438
439 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
440 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
441 sd_fmt.format.width = dev->hdmi_w;
442 sd_fmt.format.height = dev->hdmi_h;
443 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
444 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
445 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
446 return -1;
447 }
448
449 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
450 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
451 sd_crop.rect.left = 0;
452 sd_crop.rect.top = 0;
453 sd_crop.rect.width = 1;
454 sd_crop.rect.height = 1;
455 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
456 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
457 return -1;
458 }
459
460 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
461 fmt.fmt.pix_mp.width = 1;
462 fmt.fmt.pix_mp.height = 1;
463 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
464 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
465 fmt.fmt.pix_mp.num_planes = 1;
466 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
467 ALOGE("%s::videodev set format failed", __func__);
468 return -1;
469 }
470
471 reqbuf.count = 1;
472 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
473 reqbuf.memory = V4L2_MEMORY_MMAP;
474
475 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
476 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
477 return -1;
478 }
479
480 if (reqbuf.count != 1) {
481 ALOGE("%s: didn't get buffer", __func__);
482 return -1;
483 }
484
485 memset(&buffer, 0, sizeof(buffer));
486 buffer.type = reqbuf.type;
487 buffer.memory = V4L2_MEMORY_MMAP;
488 buffer.length = 1;
489 buffer.m.planes = planes;
490 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
491 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
492 return -1;
493 }
494
495 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
496 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
497 if (start == MAP_FAILED) {
498 ALOGE("%s: mmap failed %d", __func__, errno);
499 return -1;
500 }
501
502 memset(start, 0, planes[0].length);
503
504 munmap(start, planes[0].length);
505
506 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
507 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
508 return -1;
509 }
510
511 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
512 ALOGE("%s:stream on failed", __func__);
513 return -1;
514 }
515
516 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
517 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
518 return -1;
519 }
520
521 return 0;
522}
523
524static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
525{
526 struct v4l2_requestbuffers reqbuf;
527
528 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
529 ALOGE("%s:stream off failed", __func__);
530 return -1;
531 }
532
533 memset(&reqbuf, 0, sizeof(reqbuf));
534 reqbuf.count = 0;
535 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
536 reqbuf.memory = V4L2_MEMORY_MMAP;
537 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
538 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
539 return -1;
540 }
541
542 return 0;
543}
544
Benoit Gobycdd61b32012-07-09 12:09:59 -0700545static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
546{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700547 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700548 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700549
Benoit Gobyad4e3582012-08-30 17:17:34 -0700550 if (dev->hdmi_blanked)
551 return 0;
552
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700553 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
554 if (!dev->hdmi_gsc) {
555 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
556 return -ENODEV;
557 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700558
Benoit Goby8bad7e32012-08-16 14:17:14 -0700559 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700560
Benoit Goby8bad7e32012-08-16 14:17:14 -0700561 if (hdmi_start_background(dev) < 0) {
562 ALOGE("%s: hdmi_start_background failed", __func__);
563 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700564 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700565
Benoit Goby8bad7e32012-08-16 14:17:14 -0700566 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700567 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700568}
569
570static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
571{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700572 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700573 return;
574 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700575 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700576 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700577 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700578}
579
Benoit Goby922abbf2012-09-19 19:24:19 -0700580static int hdmi_configure_fblayer(struct exynos5_hwc_composer_device_1_t *dev,
581 hwc_layer_1_t &layer)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700582{
Benoit Goby105be0b2012-09-21 13:19:30 -0700583 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700584 exynos_gsc_img src_cfg, dst_cfg;
585 memset(&src_cfg, 0, sizeof(src_cfg));
586 memset(&dst_cfg, 0, sizeof(dst_cfg));
Benoit Goby922abbf2012-09-19 19:24:19 -0700587 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700588
589 src_cfg.x = layer.sourceCrop.left;
590 src_cfg.y = layer.sourceCrop.top;
591 src_cfg.w = WIDTH(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700592 src_cfg.fw = h->stride;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700593 src_cfg.h = HEIGHT(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700594 src_cfg.fh = h->vstride;
595 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
596 src_cfg.yaddr = h->fd;
Benoit Goby105be0b2012-09-21 13:19:30 -0700597 src_cfg.acquireFenceFd = layer.acquireFenceFd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700598
Benoit Goby922abbf2012-09-19 19:24:19 -0700599 dst_cfg.w = dev->hdmi_w;
600 dst_cfg.fw = dev->hdmi_w;
601 dst_cfg.h = dev->hdmi_h;
602 dst_cfg.fh = dev->hdmi_h;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700603 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
604 dst_cfg.rot = layer.transform;
605
Benoit Goby922abbf2012-09-19 19:24:19 -0700606 if (gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
607 || gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst)) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700608
Benoit Goby922abbf2012-09-19 19:24:19 -0700609 ALOGV("HDMI source config:");
610 dump_gsc_img(src_cfg);
611 ALOGV("HDMI dest config:");
612 dump_gsc_img(dst_cfg);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700613
Benoit Goby922abbf2012-09-19 19:24:19 -0700614 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700615
Benoit Goby105be0b2012-09-21 13:19:30 -0700616 ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
Benoit Goby922abbf2012-09-19 19:24:19 -0700617 if (ret < 0) {
618 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
Benoit Goby105be0b2012-09-21 13:19:30 -0700619 goto err;
Benoit Goby922abbf2012-09-19 19:24:19 -0700620 }
621
622 dev->hdmi_src = src_cfg;
623 dev->hdmi_dst = dst_cfg;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700624 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700625
Benoit Goby105be0b2012-09-21 13:19:30 -0700626 ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_cfg, NULL);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700627 if (ret < 0) {
628 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
Benoit Goby105be0b2012-09-21 13:19:30 -0700629 goto err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700630 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700631
Benoit Goby105be0b2012-09-21 13:19:30 -0700632 layer.releaseFenceFd = src_cfg.releaseFenceFd;
633
634err:
635 if (layer.acquireFenceFd >= 0)
636 close(layer.acquireFenceFd);
637 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700638}
639
Greg Hackmann81575142012-09-19 15:09:04 -0700640bool exynos5_is_offscreen(hwc_layer_1_t &layer,
641 struct exynos5_hwc_composer_device_1_t *pdev)
642{
643 return layer.sourceCrop.left > pdev->xres ||
644 layer.sourceCrop.right < 0 ||
645 layer.sourceCrop.top > pdev->yres ||
646 layer.sourceCrop.bottom < 0;
647}
648
649bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
650 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700651{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700652 if (layer.flags & HWC_SKIP_LAYER) {
653 ALOGV("\tlayer %u: skipping", i);
654 return false;
655 }
656
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700657 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700658
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700659 if (!handle) {
660 ALOGV("\tlayer %u: handle is NULL", i);
661 return false;
662 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700663 if (!exynos5_format_is_rgb(handle->format) &&
664 !exynos5_format_is_supported_by_gscaler(handle->format)) {
665 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
666 return false;
667 }
668
Greg Hackmann09c45c22012-09-20 09:35:37 -0700669 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700670 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700671 ALOGV("\tlayer %u: gscaler required but not supported", i);
672 return false;
673 }
674 } else {
675 if (!exynos5_format_is_supported(handle->format)) {
676 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
677 return false;
678 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700679 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700680 if (!exynos5_blending_is_supported(layer.blending)) {
681 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700682 return false;
683 }
Greg Hackmann81575142012-09-19 15:09:04 -0700684 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
685 ALOGW("\tlayer %u: off-screen", i);
686 return false;
687 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700688
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700689 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700690}
691
Greg Hackmann31991d52012-07-13 13:23:11 -0700692inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
693{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700694 return !(r1.left > r2.right ||
695 r1.right < r2.left ||
696 r1.top > r2.bottom ||
697 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700698}
699
700inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
701{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700702 hwc_rect i;
703 i.top = max(r1.top, r2.top);
704 i.bottom = min(r1.bottom, r2.bottom);
705 i.left = max(r1.left, r2.left);
706 i.right = min(r1.right, r2.right);
707 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700708}
709
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700710static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700711 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700712{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700713 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700714
Greg Hackmann9130e702012-07-30 14:53:04 -0700715 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700716
Benoit Goby4f439962012-09-21 17:16:45 -0700717 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700718 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
719 pdev->bufs.overlay_map[i] = -1;
720
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700721 bool fb_needed = false;
722 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700723
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700724 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700725 for (size_t i = 0; i < contents->numHwLayers; i++) {
726 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700727
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700728 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
729 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700730 continue;
731 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700732
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700733 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
734 ALOGV("\tlayer %u: background supported", i);
735 dump_layer(&contents->hwLayers[i]);
736 continue;
737 }
738
Greg Hackmann81575142012-09-19 15:09:04 -0700739 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
740 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700741 ALOGV("\tlayer %u: overlay supported", i);
742 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700743 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700744 continue;
745 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700746
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700747 if (!fb_needed) {
748 first_fb = i;
749 fb_needed = true;
750 }
751 last_fb = i;
752 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700753
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700754 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700755 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700756
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700757 // can't composite overlays sandwiched between framebuffers
758 if (fb_needed)
759 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700760 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700761
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700762 // Incrementally try to add our supported layers to hardware windows.
763 // If adding a layer would violate a hardware constraint, force it
764 // into the framebuffer and try again. (Revisiting the entire list is
765 // necessary because adding a layer to the framebuffer can cause other
766 // windows to retroactively violate constraints.)
767 bool changed;
768 do {
769 android::Vector<hwc_rect> rects;
770 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700771 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700772
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700773 if (fb_needed) {
774 hwc_rect_t fb_rect;
775 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700776 fb_rect.right = pdev->xres - 1;
777 fb_rect.bottom = pdev->yres - 1;
778 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700779 windows_left = NUM_HW_WINDOWS - 1;
780 rects.push_back(fb_rect);
781 }
782 else {
783 pixels_left = MAX_PIXELS;
784 windows_left = NUM_HW_WINDOWS;
785 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700786 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700787 gsc_left--;
788
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700789 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700790
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700791 for (size_t i = 0; i < contents->numHwLayers; i++) {
792 hwc_layer_1_t &layer = contents->hwLayers[i];
793 if ((layer.flags & HWC_SKIP_LAYER) ||
794 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700795 continue;
796
797 private_handle_t *handle = private_handle_t::dynamicCast(
798 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700799
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700800 // we've already accounted for the framebuffer above
801 if (layer.compositionType == HWC_FRAMEBUFFER)
802 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700803
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700804 // only layer 0 can be HWC_BACKGROUND, so we can
805 // unconditionally allow it without extra checks
806 if (layer.compositionType == HWC_BACKGROUND) {
807 windows_left--;
808 continue;
809 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700810
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700811 size_t pixels_needed = WIDTH(layer.displayFrame) *
812 HEIGHT(layer.displayFrame);
813 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700814 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700815 if (gsc_required)
816 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700817
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700818 // hwc_rect_t right and bottom values are normally exclusive;
819 // the intersection logic is simpler if we make them inclusive
820 hwc_rect_t visible_rect = layer.displayFrame;
821 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700822
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700823 // no more than 2 layers can overlap on a given pixel
824 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
825 if (intersect(visible_rect, overlaps.itemAt(j)))
826 can_compose = false;
827 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700828
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700829 if (!can_compose) {
830 layer.compositionType = HWC_FRAMEBUFFER;
831 if (!fb_needed) {
832 first_fb = last_fb = i;
833 fb_needed = true;
834 }
835 else {
836 first_fb = min(i, first_fb);
837 last_fb = max(i, last_fb);
838 }
839 changed = true;
840 break;
841 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700842
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700843 for (size_t j = 0; j < rects.size(); j++) {
844 const hwc_rect_t &other_rect = rects.itemAt(j);
845 if (intersect(visible_rect, other_rect))
846 overlaps.push_back(intersection(visible_rect, other_rect));
847 }
848 rects.push_back(visible_rect);
849 pixels_left -= pixels_needed;
850 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700851 if (gsc_required)
852 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700854
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700855 if (changed)
856 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700857 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700858 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700859
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700860 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700861 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700862
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700863 for (size_t i = 0; i < contents->numHwLayers; i++) {
864 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700865
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700866 if (fb_needed && i == first_fb) {
867 ALOGV("assigning framebuffer to window %u\n",
868 nextWindow);
869 nextWindow++;
870 continue;
871 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700872
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700873 if (layer.compositionType != HWC_FRAMEBUFFER &&
874 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700875 ALOGV("assigning layer %u to window %u", i, nextWindow);
876 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700877 if (layer.compositionType == HWC_OVERLAY) {
878 private_handle_t *handle =
879 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700880 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700881 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700882 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700883 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700884 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700885 }
886 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700887 nextWindow++;
888 }
889 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700890
Greg Hackmann9130e702012-07-30 14:53:04 -0700891 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
892 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
893 if (pdev->gsc[i].dst_buf[j])
894 pdev->alloc_device->free(pdev->alloc_device,
895 pdev->gsc[i].dst_buf[j]);
896 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
897 }
898
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700899 if (fb_needed)
900 pdev->bufs.fb_window = first_fb;
901 else
902 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700903
Greg Hackmann9130e702012-07-30 14:53:04 -0700904 return 0;
905}
906
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700907static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
908 hwc_display_contents_1_t* contents)
909{
Benoit Goby922abbf2012-09-19 19:24:19 -0700910 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
911
912 for (size_t i = 0; i < contents->numHwLayers; i++) {
913 hwc_layer_1_t &layer = contents->hwLayers[i];
914
915 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
916 ALOGV("\tlayer %u: framebuffer target", i);
917 dump_layer(&layer);
918 continue;
919 }
920
921 if (layer.compositionType == HWC_BACKGROUND) {
922 ALOGV("\tlayer %u: background layer", i);
923 dump_layer(&layer);
924 continue;
925 }
926
927 layer.compositionType = HWC_FRAMEBUFFER;
928 dump_layer(&layer);
929 }
930
931 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700932}
933
934static int exynos5_prepare(hwc_composer_device_1_t *dev,
935 size_t numDisplays, hwc_display_contents_1_t** displays)
936{
937 if (!numDisplays || !displays)
938 return 0;
939
940 exynos5_hwc_composer_device_1_t *pdev =
941 (exynos5_hwc_composer_device_1_t *)dev;
942 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
943 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
944
945 if (pdev->hdmi_hpd) {
946 hdmi_enable(pdev);
947 } else {
948 hdmi_disable(pdev);
949 }
950
951 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -0700952 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700953 if (err)
954 return err;
955 }
956
957 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700958 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
959 if (err)
960 return err;
961 }
962
963 return 0;
964}
965
Greg Hackmann9130e702012-07-30 14:53:04 -0700966static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
967 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
968 int gsc_idx)
969{
970 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
971
972 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
973 buffer_handle_t dst_buf;
974 private_handle_t *dst_handle;
975 int ret = 0;
976
977 exynos_gsc_img src_cfg, dst_cfg;
978 memset(&src_cfg, 0, sizeof(src_cfg));
979 memset(&dst_cfg, 0, sizeof(dst_cfg));
980
981 src_cfg.x = layer.sourceCrop.left;
982 src_cfg.y = layer.sourceCrop.top;
983 src_cfg.w = WIDTH(layer.sourceCrop);
984 src_cfg.fw = src_handle->stride;
985 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700986 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700987 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700988 if (exynos5_format_is_ycrcb(src_handle->format)) {
989 src_cfg.uaddr = src_handle->fd2;
990 src_cfg.vaddr = src_handle->fd1;
991 } else {
992 src_cfg.uaddr = src_handle->fd1;
993 src_cfg.vaddr = src_handle->fd2;
994 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700995 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700996 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -0700997
998 dst_cfg.x = 0;
999 dst_cfg.y = 0;
1000 dst_cfg.w = WIDTH(layer.displayFrame);
1001 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001002 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001003 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann09c45c22012-09-20 09:35:37 -07001004 if (exynos5_format_is_rgb(src_handle->format))
1005 dst_cfg.format = HAL_PIXEL_FORMAT_RGBX_8888;
1006 else
1007 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
1008 // RGB surfaces are already in the right color order from the GPU,
1009 // YUV surfaces need the Gscaler to swap R & B
Greg Hackmann9130e702012-07-30 14:53:04 -07001010
1011 ALOGV("source configuration:");
1012 dump_gsc_img(src_cfg);
1013
1014 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1015 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1016 int dst_stride;
1017 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1018 GRALLOC_USAGE_SW_WRITE_NEVER |
1019 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001020
1021 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1022 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001023
1024 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1025 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1026
1027 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1028 if (gsc_data->dst_buf[i]) {
1029 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1030 gsc_data->dst_buf[i] = NULL;
1031 }
1032
1033 int ret = alloc_device->alloc(alloc_device, w, h,
1034 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1035 &dst_stride);
1036 if (ret < 0) {
1037 ALOGE("failed to allocate destination buffer: %s",
1038 strerror(-ret));
1039 goto err_alloc;
1040 }
1041 }
1042
1043 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001044 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001045
Greg Hackmann9130e702012-07-30 14:53:04 -07001046 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1047 dst_handle = private_handle_t::dynamicCast(dst_buf);
1048
1049 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001050 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001051 dst_cfg.yaddr = dst_handle->fd;
1052
1053 ALOGV("destination configuration:");
1054 dump_gsc_img(dst_cfg);
1055
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001056 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1057 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001058 if (!gsc_data->gsc) {
1059 ALOGE("failed to create gscaler handle");
1060 ret = -1;
1061 goto err_alloc;
1062 }
1063
1064 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1065 if (ret < 0) {
1066 ALOGE("failed to configure gscaler %u", gsc_idx);
1067 goto err_gsc_config;
1068 }
1069
1070 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1071 if (ret < 0) {
1072 ALOGE("failed to run gscaler %u", gsc_idx);
1073 goto err_gsc_config;
1074 }
1075
1076 gsc_data->src_cfg = src_cfg;
1077 gsc_data->dst_cfg = dst_cfg;
1078
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001079 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001080
1081err_gsc_config:
1082 exynos_gsc_destroy(gsc_data->gsc);
1083 gsc_data->gsc = NULL;
1084err_alloc:
1085 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1086 if (gsc_data->dst_buf[i]) {
1087 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1088 gsc_data->dst_buf[i] = NULL;
1089 }
1090 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001091 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1092 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001093 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001094}
1095
1096static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001097 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001098 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001099 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001100{
Greg Hackmann81575142012-09-19 15:09:04 -07001101 uint32_t x, y;
1102 uint32_t w = WIDTH(displayFrame);
1103 uint32_t h = HEIGHT(displayFrame);
1104 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1105 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1106
1107 if (displayFrame.left < 0) {
1108 unsigned int crop = -displayFrame.left;
1109 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1110 crop);
1111 x = 0;
1112 w -= crop;
1113 offset += crop * bpp / 8;
1114 } else {
1115 x = displayFrame.left;
1116 }
1117
1118 if (displayFrame.right > pdev->xres) {
1119 unsigned int crop = displayFrame.right - pdev->xres;
1120 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1121 crop);
1122 w -= crop;
1123 }
1124
1125 if (displayFrame.top < 0) {
1126 unsigned int crop = -displayFrame.top;
1127 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1128 crop);
1129 y = 0;
1130 h -= crop;
1131 offset += handle->stride * crop * bpp / 8;
1132 } else {
1133 y = displayFrame.top;
1134 }
1135
1136 if (displayFrame.bottom > pdev->yres) {
1137 int crop = displayFrame.bottom - pdev->yres;
1138 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1139 crop);
1140 h -= crop;
1141 }
1142
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001143 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1144 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001145 cfg.x = x;
1146 cfg.y = y;
1147 cfg.w = w;
1148 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001149 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001150 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001151 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001152 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001153 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001154}
1155
Erik Gilling87e707e2012-06-29 17:35:13 -07001156static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001157 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001158{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001159 if (layer->compositionType == HWC_BACKGROUND) {
1160 hwc_color_t color = layer->backgroundColor;
1161 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1162 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1163 cfg.x = 0;
1164 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001165 cfg.w = pdev->xres;
1166 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001167 return;
1168 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001169
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001170 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001171 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001172 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001173}
1174
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001175static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001176 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001177{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001178 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001179 struct s3c_fb_win_config_data win_data;
1180 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001181
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001182 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001183 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1184 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001185
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001186 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001187 int layer_idx = pdata->overlay_map[i];
1188 if (layer_idx != -1) {
1189 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001190 private_handle_t *handle =
1191 private_handle_t::dynamicCast(layer.handle);
1192
1193 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1194 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001195 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001196
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001197 if (layer.acquireFenceFd != -1) {
1198 int err = sync_wait(layer.acquireFenceFd, 100);
1199 if (err != 0)
1200 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1201 i, strerror(errno));
1202 close(layer.acquireFenceFd);
1203 }
1204
1205 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
1206 gsc_idx);
1207 if (err < 0) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001208 ALOGE("failed to queue gscaler %u input for layer %u",
1209 gsc_idx, i);
1210 continue;
1211 }
1212
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001213 err = exynos_gsc_stop_exclusive(gsc.gsc);
Greg Hackmann9130e702012-07-30 14:53:04 -07001214 exynos_gsc_destroy(gsc.gsc);
1215 gsc.gsc = NULL;
1216 if (err < 0) {
1217 ALOGE("failed to dequeue gscaler output for layer %u", i);
1218 continue;
1219 }
1220
1221 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1222 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1223 private_handle_t *dst_handle =
1224 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001225 hwc_rect_t sourceCrop = { 0, 0,
1226 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1227 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001228 layer.displayFrame, layer.blending, -1, config[i],
1229 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001230 } else {
1231 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001232 }
1233 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001234 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1235 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1236 config[i].blending = S3C_FB_BLENDING_NONE;
1237 }
1238
Greg Hackmann9130e702012-07-30 14:53:04 -07001239 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001240 dump_config(config[i]);
1241 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001242
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001243 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001244 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1245 if (config[i].fence_fd != -1)
1246 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001247 if (ret < 0) {
1248 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1249 return ret;
1250 }
1251
1252 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1253 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1254 pdev->last_fb_window = pdata->fb_window;
1255 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1256 int layer_idx = pdata->overlay_map[i];
1257 if (layer_idx != -1) {
1258 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1259 pdev->last_handles[i] = layer.handle;
1260 }
1261 }
1262
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001263 return win_data.fence;
1264}
1265
1266static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001267 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001268{
1269 if (!contents->dpy || !contents->sur)
1270 return 0;
1271
1272 hwc_layer_1_t *fb_layer = NULL;
1273
1274 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1275 for (size_t i = 0; i < contents->numHwLayers; i++) {
1276 if (contents->hwLayers[i].compositionType ==
1277 HWC_FRAMEBUFFER_TARGET) {
1278 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1279 fb_layer = &contents->hwLayers[i];
1280 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001281 }
1282 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001283
1284 if (CC_UNLIKELY(!fb_layer)) {
1285 ALOGE("framebuffer target expected, but not provided");
1286 return -EINVAL;
1287 }
1288
1289 ALOGV("framebuffer target buffer:");
1290 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001291 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001292
Benoit Goby922abbf2012-09-19 19:24:19 -07001293 int fence = exynos5_post_fimd(pdev, contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001294 if (fence < 0)
1295 return fence;
1296
1297 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1298 if (pdev->bufs.overlay_map[i] != -1) {
1299 hwc_layer_1_t &layer =
1300 contents->hwLayers[pdev->bufs.overlay_map[i]];
1301 int dup_fd = dup(fence);
1302 if (dup_fd < 0)
1303 ALOGW("release fence dup failed: %s", strerror(errno));
1304 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001305 }
1306 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001307 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001308
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001309 return 0;
1310}
1311
1312static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1313 hwc_display_contents_1_t* contents)
1314{
Benoit Goby105be0b2012-09-21 13:19:30 -07001315 if (!pdev->hdmi_enabled) {
1316 for (size_t i = 0; i < contents->numHwLayers; i++) {
1317 hwc_layer_1_t &layer = contents->hwLayers[i];
1318 if (layer.acquireFenceFd != -1)
1319 close(layer.acquireFenceFd);
Benoit Goby922abbf2012-09-19 19:24:19 -07001320 }
Benoit Goby48a69542012-09-21 17:12:28 -07001321 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001322 }
Benoit Goby48a69542012-09-21 17:12:28 -07001323
1324 for (size_t i = 0; i < contents->numHwLayers; i++) {
1325 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001326
1327 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1328 if (!layer.handle)
1329 continue;
1330
1331 ALOGV("HDMI FB layer:");
1332 dump_layer(&layer);
1333
1334 hdmi_configure_fblayer(pdev, layer);
1335 }
1336 }
1337
1338 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001339}
1340
Jesse Halle94046d2012-07-31 14:34:08 -07001341static int exynos5_set(struct hwc_composer_device_1 *dev,
1342 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001343{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001344 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001345 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001346
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001347 exynos5_hwc_composer_device_1_t *pdev =
1348 (exynos5_hwc_composer_device_1_t *)dev;
1349 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1350 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001351
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001352 if (fimd_contents) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001353 int err = exynos5_set_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001354 if (err)
1355 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001356 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001357
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001358 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001359 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1360 if (err)
1361 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001362 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001363
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001364 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001365}
1366
Erik Gilling87e707e2012-06-29 17:35:13 -07001367static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001368 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001369{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001370 struct exynos5_hwc_composer_device_1_t* pdev =
1371 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001372 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001373}
1374
Erik Gilling87e707e2012-06-29 17:35:13 -07001375static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001376{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001377 struct exynos5_hwc_composer_device_1_t *pdev =
1378 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001379
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001380 switch (what) {
1381 case HWC_BACKGROUND_LAYER_SUPPORTED:
1382 // we support the background layer
1383 value[0] = 1;
1384 break;
1385 case HWC_VSYNC_PERIOD:
1386 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001387 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001388 break;
1389 default:
1390 // unsupported query
1391 return -EINVAL;
1392 }
1393 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001394}
1395
Jesse Halle94046d2012-07-31 14:34:08 -07001396static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1397 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001398{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001399 struct exynos5_hwc_composer_device_1_t *pdev =
1400 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001401
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001402 switch (event) {
1403 case HWC_EVENT_VSYNC:
1404 __u32 val = !!enabled;
1405 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1406 if (err < 0) {
1407 ALOGE("vsync ioctl failed");
1408 return -errno;
1409 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001410
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001411 return 0;
1412 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001413
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001414 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001415}
1416
Benoit Gobycdd61b32012-07-09 12:09:59 -07001417static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001418 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001419{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001420 const char *s = buff;
1421 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001422
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001423 while (*s) {
1424 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1425 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001426
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001427 s += strlen(s) + 1;
1428 if (s - buff >= len)
1429 break;
1430 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001431
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001432 if (pdev->hdmi_hpd) {
1433 if (hdmi_get_config(pdev)) {
1434 ALOGE("Error reading HDMI configuration");
1435 pdev->hdmi_hpd = false;
1436 return;
1437 }
1438 }
1439
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001440 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001441 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001442 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001443
Jesse Hallda5a71d2012-08-21 12:12:55 -07001444 /* hwc_dev->procs is set right after the device is opened, but there is
1445 * still a race condition where a hotplug event might occur after the open
1446 * but before the procs are registered. */
1447 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001448 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001449}
1450
Greg Hackmann29724852012-07-23 15:31:10 -07001451static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001452{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001453 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001454 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001455
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001456 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1457 if (err < 0) {
1458 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1459 return;
1460 }
1461
Greg Hackmann29724852012-07-23 15:31:10 -07001462 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001463 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001464 if (err < 0) {
1465 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1466 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001467 }
Greg Hackmann29724852012-07-23 15:31:10 -07001468 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001469
Greg Hackmann29724852012-07-23 15:31:10 -07001470 errno = 0;
1471 uint64_t timestamp = strtoull(buf, NULL, 0);
1472 if (!errno)
1473 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001474}
1475
1476static void *hwc_vsync_thread(void *data)
1477{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001478 struct exynos5_hwc_composer_device_1_t *pdev =
1479 (struct exynos5_hwc_composer_device_1_t *)data;
1480 char uevent_desc[4096];
1481 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001482
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001483 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001484
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001485 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001486
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001487 char temp[4096];
1488 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1489 if (err < 0) {
1490 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1491 return NULL;
1492 }
1493
Greg Hackmann29724852012-07-23 15:31:10 -07001494 struct pollfd fds[2];
1495 fds[0].fd = pdev->vsync_fd;
1496 fds[0].events = POLLPRI;
1497 fds[1].fd = uevent_get_fd();
1498 fds[1].events = POLLIN;
1499
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001500 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001501 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001502
Greg Hackmann29724852012-07-23 15:31:10 -07001503 if (err > 0) {
1504 if (fds[0].revents & POLLPRI) {
1505 handle_vsync_event(pdev);
1506 }
1507 else if (fds[1].revents & POLLIN) {
1508 int len = uevent_next_event(uevent_desc,
1509 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001510
Greg Hackmann29724852012-07-23 15:31:10 -07001511 bool hdmi = !strcmp(uevent_desc,
1512 "change@/devices/virtual/switch/hdmi");
1513 if (hdmi)
1514 handle_hdmi_uevent(pdev, uevent_desc, len);
1515 }
1516 }
1517 else if (err == -1) {
1518 if (errno == EINTR)
1519 break;
1520 ALOGE("error in vsync thread: %s", strerror(errno));
1521 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001522 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001523
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001524 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001525}
1526
Jesse Halle94046d2012-07-31 14:34:08 -07001527static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001528{
1529 struct exynos5_hwc_composer_device_1_t *pdev =
1530 (struct exynos5_hwc_composer_device_1_t *)dev;
1531
1532 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1533 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1534 if (err < 0) {
1535 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1536 return -errno;
1537 }
1538
Benoit Gobyad4e3582012-08-30 17:17:34 -07001539 if (pdev->hdmi_hpd) {
1540 if (blank && !pdev->hdmi_blanked)
1541 hdmi_disable(pdev);
1542 pdev->hdmi_blanked = !!blank;
1543 }
1544
Colin Cross00359a82012-07-12 17:54:17 -07001545 return 0;
1546}
1547
Greg Hackmann600867e2012-08-23 12:58:02 -07001548static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1549{
1550 if (buff_len <= 0)
1551 return;
1552
1553 struct exynos5_hwc_composer_device_1_t *pdev =
1554 (struct exynos5_hwc_composer_device_1_t *)dev;
1555
1556 android::String8 result;
1557
Benoit Goby8bad7e32012-08-16 14:17:14 -07001558 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1559 if (pdev->hdmi_enabled)
1560 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001561 result.append(
1562 " type | handle | color | blend | format | position | size | gsc \n"
1563 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1564 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1565
1566 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1567 struct s3c_fb_win_config &config = pdev->last_config[i];
1568 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1569 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1570 "DISABLED", "-", "-", "-", "-", "-", "-");
1571 }
1572 else {
1573 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1574 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1575 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001576 else
1577 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1578 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1579 intptr_t(pdev->last_handles[i]),
1580 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001581
1582 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1583 config.w, config.h);
1584 }
1585 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1586 result.appendFormat(" | %3s", "-");
1587 else
1588 result.appendFormat(" | %3d",
1589 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1590 result.append("\n");
1591 }
1592
1593 strlcpy(buff, result.string(), buff_len);
1594}
1595
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001596static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1597 int disp, uint32_t *configs, size_t *numConfigs)
1598{
1599 struct exynos5_hwc_composer_device_1_t *pdev =
1600 (struct exynos5_hwc_composer_device_1_t *)dev;
1601
1602 if (*numConfigs == 0)
1603 return 0;
1604
1605 if (disp == HWC_DISPLAY_PRIMARY) {
1606 configs[0] = 0;
1607 *numConfigs = 1;
1608 return 0;
1609 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001610 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001611 return -EINVAL;
1612 }
1613
1614 int err = hdmi_get_config(pdev);
1615 if (err) {
1616 return -EINVAL;
1617 }
1618
1619 configs[0] = 0;
1620 *numConfigs = 1;
1621 return 0;
1622 }
1623
1624 return -EINVAL;
1625}
1626
1627static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1628 const uint32_t attribute)
1629{
1630 switch(attribute) {
1631 case HWC_DISPLAY_VSYNC_PERIOD:
1632 return pdev->vsync_period;
1633
1634 case HWC_DISPLAY_WIDTH:
1635 return pdev->xres;
1636
1637 case HWC_DISPLAY_HEIGHT:
1638 return pdev->yres;
1639
1640 case HWC_DISPLAY_DPI_X:
1641 return pdev->xdpi;
1642
1643 case HWC_DISPLAY_DPI_Y:
1644 return pdev->ydpi;
1645
1646 default:
1647 ALOGE("unknown display attribute %u", attribute);
1648 return -EINVAL;
1649 }
1650}
1651
1652static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1653 const uint32_t attribute)
1654{
1655 switch(attribute) {
1656 case HWC_DISPLAY_VSYNC_PERIOD:
1657 return pdev->vsync_period;
1658
1659 case HWC_DISPLAY_WIDTH:
1660 return pdev->hdmi_w;
1661
1662 case HWC_DISPLAY_HEIGHT:
1663 return pdev->hdmi_h;
1664
1665 case HWC_DISPLAY_DPI_X:
1666 case HWC_DISPLAY_DPI_Y:
1667 return 0; // unknown
1668
1669 default:
1670 ALOGE("unknown display attribute %u", attribute);
1671 return -EINVAL;
1672 }
1673}
1674
Jesse Hall54aa0d22012-09-20 11:43:49 -07001675static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001676 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1677{
1678 struct exynos5_hwc_composer_device_1_t *pdev =
1679 (struct exynos5_hwc_composer_device_1_t *)dev;
1680
1681 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1682 if (disp == HWC_DISPLAY_PRIMARY)
1683 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1684 else if (disp == HWC_DISPLAY_EXTERNAL)
1685 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001686 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001687 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001688 return -EINVAL;
1689 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001690 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001691
1692 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001693}
1694
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001695static int exynos5_close(hw_device_t* device);
1696
1697static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001698 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001699{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001700 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001701 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001702 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001703
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001704 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1705 return -EINVAL;
1706 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001707
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001708 struct exynos5_hwc_composer_device_1_t *dev;
1709 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1710 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001711
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001712 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1713 (const struct hw_module_t **)&dev->gralloc_module)) {
1714 ALOGE("failed to get gralloc hw module");
1715 ret = -EINVAL;
1716 goto err_get_module;
1717 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001718
Greg Hackmann9130e702012-07-30 14:53:04 -07001719 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1720 &dev->alloc_device)) {
1721 ALOGE("failed to open gralloc");
1722 ret = -EINVAL;
1723 goto err_get_module;
1724 }
1725
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001726 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1727 if (dev->fd < 0) {
1728 ALOGE("failed to open framebuffer");
1729 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001730 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001731 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001732
Greg Hackmannd92fe212012-09-11 14:28:41 -07001733 struct fb_var_screeninfo info;
1734 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1735 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1736 ret = -errno;
1737 goto err_ioctl;
1738 }
1739
1740 refreshRate = 1000000000000LLU /
1741 (
1742 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1743 * ( info.left_margin + info.right_margin + info.xres )
1744 * info.pixclock
1745 );
1746
1747 if (refreshRate == 0) {
1748 ALOGW("invalid refresh rate, assuming 60 Hz");
1749 refreshRate = 60;
1750 }
1751
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001752 dev->xres = 2560;
1753 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001754 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1755 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1756 dev->vsync_period = 1000000000 / refreshRate;
1757
1758 ALOGV("using\n"
1759 "xres = %d px\n"
1760 "yres = %d px\n"
1761 "width = %d mm (%f dpi)\n"
1762 "height = %d mm (%f dpi)\n"
1763 "refresh rate = %d Hz\n",
1764 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1765 info.height, dev->ydpi / 1000.0, refreshRate);
1766
Benoit Goby8bad7e32012-08-16 14:17:14 -07001767 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1768 if (dev->hdmi_layer0 < 0) {
1769 ALOGE("failed to open hdmi mixer0 subdev");
1770 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001771 goto err_ioctl;
1772 }
1773
Benoit Goby8bad7e32012-08-16 14:17:14 -07001774 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1775 if (dev->hdmi_layer0 < 0) {
1776 ALOGE("failed to open hdmi layer0 device");
1777 ret = dev->hdmi_layer0;
1778 goto err_mixer0;
1779 }
1780
1781 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1782 if (dev->hdmi_layer1 < 0) {
1783 ALOGE("failed to open hdmi layer1 device");
1784 ret = dev->hdmi_layer1;
1785 goto err_hdmi0;
1786 }
1787
Greg Hackmann29724852012-07-23 15:31:10 -07001788 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1789 if (dev->vsync_fd < 0) {
1790 ALOGE("failed to open vsync attribute");
1791 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001792 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001793 }
1794
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001795 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1796 if (sw_fd) {
1797 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001798 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001799 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001800 if (hdmi_get_config(dev)) {
1801 ALOGE("Error reading HDMI configuration");
1802 dev->hdmi_hpd = false;
1803 }
1804 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001805 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001806
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001807 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001808 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001809 dev->base.common.module = const_cast<hw_module_t *>(module);
1810 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001811
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001812 dev->base.prepare = exynos5_prepare;
1813 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001814 dev->base.eventControl = exynos5_eventControl;
1815 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001816 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001817 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001818 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001819 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1820 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001821
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001822 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001823
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001824 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1825 if (ret) {
1826 ALOGE("failed to start vsync thread: %s", strerror(ret));
1827 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001828 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001829 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001830
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001831 char value[PROPERTY_VALUE_MAX];
1832 property_get("debug.hwc.force_gpu", value, "0");
1833 dev->force_gpu = atoi(value);
1834
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001835 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001836
Greg Hackmann29724852012-07-23 15:31:10 -07001837err_vsync:
1838 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001839err_mixer0:
1840 close(dev->hdmi_mixer0);
1841err_hdmi1:
1842 close(dev->hdmi_layer0);
1843err_hdmi0:
1844 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001845err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001846 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001847err_open_fb:
1848 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001849err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001850 free(dev);
1851 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001852}
1853
1854static int exynos5_close(hw_device_t *device)
1855{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001856 struct exynos5_hwc_composer_device_1_t *dev =
1857 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001858 pthread_kill(dev->vsync_thread, SIGTERM);
1859 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001860 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1861 if (dev->gsc[i].gsc)
1862 exynos_gsc_destroy(dev->gsc[i].gsc);
1863 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1864 if (dev->gsc[i].dst_buf[j])
1865 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1866 }
1867 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001868 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001869 close(dev->hdmi_mixer0);
1870 close(dev->hdmi_layer0);
1871 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001872 close(dev->fd);
1873 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001874}
1875
1876static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001877 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001878};
1879
1880hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001881 common: {
1882 tag: HARDWARE_MODULE_TAG,
1883 module_api_version: HWC_MODULE_API_VERSION_0_1,
1884 hal_api_version: HARDWARE_HAL_API_VERSION,
1885 id: HWC_HARDWARE_MODULE_ID,
1886 name: "Samsung exynos5 hwcomposer module",
1887 author: "Google",
1888 methods: &exynos5_hwc_module_methods,
1889 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001890};