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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070058const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
59const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
60 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070061
Erik Gilling87e707e2012-06-29 17:35:13 -070062struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070063
Greg Hackmann9130e702012-07-30 14:53:04 -070064struct exynos5_gsc_map_t {
65 enum {
66 GSC_NONE = 0,
67 GSC_M2M,
68 // TODO: GSC_LOCAL_PATH
69 } mode;
70 int idx;
71};
72
Greg Hackmann86eb1c62012-05-30 09:25:51 -070073struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070074 int overlay_map[NUM_HW_WINDOWS];
75 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
76 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077};
78
Greg Hackmann44a6d422012-09-17 17:31:30 -070079const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070080struct exynos5_gsc_data_t {
81 void *gsc;
82 exynos_gsc_img src_cfg;
83 exynos_gsc_img dst_cfg;
84 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
85 size_t current_buf;
86};
87
Erik Gilling87e707e2012-06-29 17:35:13 -070088struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070089 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070090
Greg Hackmannf6f2e542012-07-16 16:10:27 -070091 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -070092 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070093 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070094
Greg Hackmannf6f2e542012-07-16 16:10:27 -070095 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -070096 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -070097 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070099 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700100
Greg Hackmannd92fe212012-09-11 14:28:41 -0700101 int32_t xres;
102 int32_t yres;
103 int32_t xdpi;
104 int32_t ydpi;
105 int32_t vsync_period;
106
Benoit Goby8bad7e32012-08-16 14:17:14 -0700107 int hdmi_mixer0;
108 int hdmi_layer0;
109 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700111 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700112 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700114 int hdmi_w;
115 int hdmi_h;
116 exynos_gsc_img hdmi_src;
117 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700118
119 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700120
121 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700122 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700123 const void *last_handles[NUM_HW_WINDOWS];
124 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700125};
126
Greg Hackmann9130e702012-07-30 14:53:04 -0700127static void dump_handle(private_handle_t *h)
128{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700129 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
130 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700131}
132
Erik Gilling87e707e2012-06-29 17:35:13 -0700133static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700134{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700135 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
136 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
137 l->compositionType, l->flags, l->handle, l->transform,
138 l->blending,
139 l->sourceCrop.left,
140 l->sourceCrop.top,
141 l->sourceCrop.right,
142 l->sourceCrop.bottom,
143 l->displayFrame.left,
144 l->displayFrame.top,
145 l->displayFrame.right,
146 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700147
Greg Hackmann9130e702012-07-30 14:53:04 -0700148 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
149 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700150}
151
152static void dump_config(s3c_fb_win_config &c)
153{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700154 ALOGV("\tstate = %u", c.state);
155 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
156 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
157 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700158 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700159 c.fd, c.offset, c.stride,
160 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700161 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700162 }
163 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
164 ALOGV("\t\tcolor = %u", c.color);
165 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700166}
167
Greg Hackmann9130e702012-07-30 14:53:04 -0700168static void dump_gsc_img(exynos_gsc_img &c)
169{
170 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
171 c.x, c.y, c.w, c.h, c.fw, c.fh);
172 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
173 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
174}
175
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700176inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
177inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700178template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
179template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
180
181static bool is_transformed(const hwc_layer_1_t &layer)
182{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700183 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700184}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700185
Greg Hackmann9130e702012-07-30 14:53:04 -0700186static bool is_rotated(const hwc_layer_1_t &layer)
187{
188 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
189 (layer.transform & HAL_TRANSFORM_ROT_180);
190}
191
Erik Gilling87e707e2012-06-29 17:35:13 -0700192static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700194 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
195 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700196}
197
Benoit Goby8bad7e32012-08-16 14:17:14 -0700198static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
199{
200 return c1.x != c2.x ||
201 c1.y != c2.y ||
202 c1.w != c2.w ||
203 c1.h != c2.h ||
204 c1.format != c2.format ||
205 c1.rot != c2.rot ||
206 c1.cacheable != c2.cacheable ||
207 c1.drmMode != c2.drmMode;
208}
209
210static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
211{
212 return gsc_dst_cfg_changed(c1, c2) ||
213 c1.fw != c2.fw ||
214 c1.fh != c2.fh;
215}
216
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700217static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
218{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700219 switch (format) {
220 case HAL_PIXEL_FORMAT_RGBA_8888:
221 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
222 case HAL_PIXEL_FORMAT_RGBX_8888:
223 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
224 case HAL_PIXEL_FORMAT_RGBA_5551:
225 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700226 case HAL_PIXEL_FORMAT_RGB_565:
227 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700228 case HAL_PIXEL_FORMAT_BGRA_8888:
229 return S3C_FB_PIXEL_FORMAT_BGRA_8888;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700230 default:
231 return S3C_FB_PIXEL_FORMAT_MAX;
232 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700233}
234
235static bool exynos5_format_is_supported(int format)
236{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700237 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700238}
239
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700240static bool exynos5_format_is_rgb(int format)
241{
242 switch (format) {
243 case HAL_PIXEL_FORMAT_RGBA_8888:
244 case HAL_PIXEL_FORMAT_RGBX_8888:
245 case HAL_PIXEL_FORMAT_RGB_888:
246 case HAL_PIXEL_FORMAT_RGB_565:
247 case HAL_PIXEL_FORMAT_BGRA_8888:
248 case HAL_PIXEL_FORMAT_RGBA_5551:
249 case HAL_PIXEL_FORMAT_RGBA_4444:
250 return true;
251
252 default:
253 return false;
254 }
255}
256
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700257static bool exynos5_format_is_supported_by_gscaler(int format)
258{
Greg Hackmann9130e702012-07-30 14:53:04 -0700259 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700260 case HAL_PIXEL_FORMAT_RGBX_8888:
261 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700262 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700263 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700264 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700265 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700266
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700267 default:
268 return false;
269 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700270}
271
Greg Hackmann296668e2012-08-14 15:51:40 -0700272static bool exynos5_format_is_ycrcb(int format)
273{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700274 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700275}
276
Greg Hackmann9130e702012-07-30 14:53:04 -0700277static bool exynos5_format_requires_gscaler(int format)
278{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700279 return (exynos5_format_is_supported_by_gscaler(format) &&
280 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700281}
282
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700283static uint8_t exynos5_format_to_bpp(int format)
284{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700285 switch (format) {
286 case HAL_PIXEL_FORMAT_RGBA_8888:
287 case HAL_PIXEL_FORMAT_RGBX_8888:
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700288 case HAL_PIXEL_FORMAT_BGRA_8888:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700289 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700290
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700291 case HAL_PIXEL_FORMAT_RGBA_5551:
292 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700293 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700294 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700295
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700296 default:
297 ALOGW("unrecognized pixel format %u", format);
298 return 0;
299 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700300}
301
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700302static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
303 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700304{
305 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
306
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700307 int max_w = is_rotated(layer) ? 2048 : 4800;
308 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700309
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700310 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
311 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
312 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700313
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700314 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
315 int dest_w, dest_h;
316 if (rot90or270) {
317 dest_w = HEIGHT(layer.displayFrame);
318 dest_h = WIDTH(layer.displayFrame);
319 } else {
320 dest_w = WIDTH(layer.displayFrame);
321 dest_h = HEIGHT(layer.displayFrame);
322 }
323 int max_downscale = local_path ? 4 : 16;
324 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700325
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700326 return exynos5_format_is_supported_by_gscaler(format) &&
327 handle->stride <= max_w &&
328 handle->stride % GSC_W_ALIGNMENT == 0 &&
329 src_w <= dest_w * max_downscale &&
330 dest_w <= src_w * max_upscale &&
331 handle->vstride <= max_h &&
332 handle->vstride % GSC_H_ALIGNMENT == 0 &&
333 src_h <= dest_h * max_downscale &&
334 dest_h <= src_h * max_upscale &&
335 // per 46.2
336 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
337 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
338 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700339}
340
Greg Hackmann09c45c22012-09-20 09:35:37 -0700341static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
342{
343 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
344 || is_transformed(layer);
345}
346
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700347int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
348{
349 struct v4l2_dv_preset preset;
350 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700351 int index = 0;
352 bool found = false;
353 int ret;
354
Benoit Goby8bad7e32012-08-16 14:17:14 -0700355 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700356 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
357 return -1;
358 }
359
360 while (true) {
361 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700362 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700363
364 if (ret < 0) {
365 if (errno == EINVAL)
366 break;
367 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
368 return -1;
369 }
370
371 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
372 __func__, enum_preset.index, enum_preset.preset,
373 enum_preset.width, enum_preset.height, enum_preset.name);
374
375 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700376 dev->hdmi_w = enum_preset.width;
377 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700378 found = true;
379 }
380 }
381
382 return found ? 0 : -1;
383}
384
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700385static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
386{
387 switch (blending) {
388 case HWC_BLENDING_NONE:
389 return S3C_FB_BLENDING_NONE;
390 case HWC_BLENDING_PREMULT:
391 return S3C_FB_BLENDING_PREMULT;
392 case HWC_BLENDING_COVERAGE:
393 return S3C_FB_BLENDING_COVERAGE;
394
395 default:
396 return S3C_FB_BLENDING_MAX;
397 }
398}
399
400static bool exynos5_blending_is_supported(int32_t blending)
401{
402 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
403}
404
Benoit Goby8bad7e32012-08-16 14:17:14 -0700405static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
406{
407 struct v4l2_requestbuffers reqbuf;
408 struct v4l2_subdev_format sd_fmt;
409 struct v4l2_subdev_crop sd_crop;
410 struct v4l2_format fmt;
411 struct v4l2_buffer buffer;
412 struct v4l2_plane planes[1];
413
414 memset(&reqbuf, 0, sizeof(reqbuf));
415 memset(&sd_fmt, 0, sizeof(sd_fmt));
416 memset(&sd_crop, 0, sizeof(sd_crop));
417 memset(&fmt, 0, sizeof(fmt));
418 memset(&buffer, 0, sizeof(buffer));
419 memset(planes, 0, sizeof(planes));
420
421 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
422 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
423 sd_fmt.format.width = 1;
424 sd_fmt.format.height = 1;
425 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
426 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
427 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
428 return -1;
429 }
430
431 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
432 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
433 sd_crop.rect.left = 0;
434 sd_crop.rect.top = 0;
435 sd_crop.rect.width = 1;
436 sd_crop.rect.height = 1;
437 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
438 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
439 return -1;
440 }
441
442 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
443 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
444 sd_fmt.format.width = dev->hdmi_w;
445 sd_fmt.format.height = dev->hdmi_h;
446 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
447 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
448 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
449 return -1;
450 }
451
452 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
453 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
454 sd_crop.rect.left = 0;
455 sd_crop.rect.top = 0;
456 sd_crop.rect.width = 1;
457 sd_crop.rect.height = 1;
458 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
459 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
460 return -1;
461 }
462
463 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
464 fmt.fmt.pix_mp.width = 1;
465 fmt.fmt.pix_mp.height = 1;
466 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
467 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
468 fmt.fmt.pix_mp.num_planes = 1;
469 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
470 ALOGE("%s::videodev set format failed", __func__);
471 return -1;
472 }
473
474 reqbuf.count = 1;
475 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
476 reqbuf.memory = V4L2_MEMORY_MMAP;
477
478 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
479 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
480 return -1;
481 }
482
483 if (reqbuf.count != 1) {
484 ALOGE("%s: didn't get buffer", __func__);
485 return -1;
486 }
487
488 memset(&buffer, 0, sizeof(buffer));
489 buffer.type = reqbuf.type;
490 buffer.memory = V4L2_MEMORY_MMAP;
491 buffer.length = 1;
492 buffer.m.planes = planes;
493 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
494 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
495 return -1;
496 }
497
498 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
499 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
500 if (start == MAP_FAILED) {
501 ALOGE("%s: mmap failed %d", __func__, errno);
502 return -1;
503 }
504
505 memset(start, 0, planes[0].length);
506
507 munmap(start, planes[0].length);
508
509 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
510 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
511 return -1;
512 }
513
514 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
515 ALOGE("%s:stream on failed", __func__);
516 return -1;
517 }
518
519 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
520 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
521 return -1;
522 }
523
524 return 0;
525}
526
527static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
528{
529 struct v4l2_requestbuffers reqbuf;
530
531 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
532 ALOGE("%s:stream off failed", __func__);
533 return -1;
534 }
535
536 memset(&reqbuf, 0, sizeof(reqbuf));
537 reqbuf.count = 0;
538 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
539 reqbuf.memory = V4L2_MEMORY_MMAP;
540 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
541 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
542 return -1;
543 }
544
545 return 0;
546}
547
Benoit Gobycdd61b32012-07-09 12:09:59 -0700548static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
549{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700550 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700551 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700552
Benoit Gobyad4e3582012-08-30 17:17:34 -0700553 if (dev->hdmi_blanked)
554 return 0;
555
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700556 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
557 if (!dev->hdmi_gsc) {
558 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
559 return -ENODEV;
560 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700561
Benoit Goby8bad7e32012-08-16 14:17:14 -0700562 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700563
Benoit Goby8bad7e32012-08-16 14:17:14 -0700564 if (hdmi_start_background(dev) < 0) {
565 ALOGE("%s: hdmi_start_background failed", __func__);
566 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700567 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700568
Benoit Goby8bad7e32012-08-16 14:17:14 -0700569 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700570 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700571}
572
573static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
574{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700575 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700576 return;
577 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700578 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700579 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700580 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700581}
582
Benoit Goby922abbf2012-09-19 19:24:19 -0700583static int hdmi_configure_fblayer(struct exynos5_hwc_composer_device_1_t *dev,
584 hwc_layer_1_t &layer)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700585{
Benoit Goby105be0b2012-09-21 13:19:30 -0700586 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700587 exynos_gsc_img src_cfg, dst_cfg;
588 memset(&src_cfg, 0, sizeof(src_cfg));
589 memset(&dst_cfg, 0, sizeof(dst_cfg));
Benoit Goby922abbf2012-09-19 19:24:19 -0700590 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700591
592 src_cfg.x = layer.sourceCrop.left;
593 src_cfg.y = layer.sourceCrop.top;
594 src_cfg.w = WIDTH(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700595 src_cfg.fw = h->stride;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700596 src_cfg.h = HEIGHT(layer.sourceCrop);
Benoit Goby922abbf2012-09-19 19:24:19 -0700597 src_cfg.fh = h->vstride;
598 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
599 src_cfg.yaddr = h->fd;
Benoit Goby105be0b2012-09-21 13:19:30 -0700600 src_cfg.acquireFenceFd = layer.acquireFenceFd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700601
Benoit Goby922abbf2012-09-19 19:24:19 -0700602 dst_cfg.w = dev->hdmi_w;
603 dst_cfg.fw = dev->hdmi_w;
604 dst_cfg.h = dev->hdmi_h;
605 dst_cfg.fh = dev->hdmi_h;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700606 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
607 dst_cfg.rot = layer.transform;
608
Benoit Goby922abbf2012-09-19 19:24:19 -0700609 if (gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
610 || gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst)) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700611
Benoit Goby922abbf2012-09-19 19:24:19 -0700612 ALOGV("HDMI source config:");
613 dump_gsc_img(src_cfg);
614 ALOGV("HDMI dest config:");
615 dump_gsc_img(dst_cfg);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700616
Benoit Goby922abbf2012-09-19 19:24:19 -0700617 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700618
Benoit Goby105be0b2012-09-21 13:19:30 -0700619 ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
Benoit Goby922abbf2012-09-19 19:24:19 -0700620 if (ret < 0) {
621 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
Benoit Goby105be0b2012-09-21 13:19:30 -0700622 goto err;
Benoit Goby922abbf2012-09-19 19:24:19 -0700623 }
624
625 dev->hdmi_src = src_cfg;
626 dev->hdmi_dst = dst_cfg;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700627 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700628
Benoit Goby105be0b2012-09-21 13:19:30 -0700629 ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_cfg, NULL);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700630 if (ret < 0) {
631 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
Benoit Goby105be0b2012-09-21 13:19:30 -0700632 goto err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700633 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700634
Benoit Goby105be0b2012-09-21 13:19:30 -0700635 layer.releaseFenceFd = src_cfg.releaseFenceFd;
636
637err:
638 if (layer.acquireFenceFd >= 0)
639 close(layer.acquireFenceFd);
640 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700641}
642
Greg Hackmann81575142012-09-19 15:09:04 -0700643bool exynos5_is_offscreen(hwc_layer_1_t &layer,
644 struct exynos5_hwc_composer_device_1_t *pdev)
645{
646 return layer.sourceCrop.left > pdev->xres ||
647 layer.sourceCrop.right < 0 ||
648 layer.sourceCrop.top > pdev->yres ||
649 layer.sourceCrop.bottom < 0;
650}
651
652bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
653 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700654{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700655 if (layer.flags & HWC_SKIP_LAYER) {
656 ALOGV("\tlayer %u: skipping", i);
657 return false;
658 }
659
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700660 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700661
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700662 if (!handle) {
663 ALOGV("\tlayer %u: handle is NULL", i);
664 return false;
665 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700666 if (!exynos5_format_is_rgb(handle->format) &&
667 !exynos5_format_is_supported_by_gscaler(handle->format)) {
668 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
669 return false;
670 }
671
Greg Hackmann09c45c22012-09-20 09:35:37 -0700672 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700673 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700674 ALOGV("\tlayer %u: gscaler required but not supported", i);
675 return false;
676 }
677 } else {
678 if (!exynos5_format_is_supported(handle->format)) {
679 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
680 return false;
681 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700682 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700683 if (!exynos5_blending_is_supported(layer.blending)) {
684 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700685 return false;
686 }
Greg Hackmann81575142012-09-19 15:09:04 -0700687 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
688 ALOGW("\tlayer %u: off-screen", i);
689 return false;
690 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700691
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700692 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700693}
694
Greg Hackmann31991d52012-07-13 13:23:11 -0700695inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
696{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700697 return !(r1.left > r2.right ||
698 r1.right < r2.left ||
699 r1.top > r2.bottom ||
700 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700701}
702
703inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
704{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700705 hwc_rect i;
706 i.top = max(r1.top, r2.top);
707 i.bottom = min(r1.bottom, r2.bottom);
708 i.left = max(r1.left, r2.left);
709 i.right = min(r1.right, r2.right);
710 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700711}
712
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700713static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700714 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700715{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700716 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700717
Greg Hackmann9130e702012-07-30 14:53:04 -0700718 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700719
Benoit Goby4f439962012-09-21 17:16:45 -0700720 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700721 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
722 pdev->bufs.overlay_map[i] = -1;
723
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700724 bool fb_needed = false;
725 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700726
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700727 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700728 for (size_t i = 0; i < contents->numHwLayers; i++) {
729 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700730
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700731 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
732 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700733 continue;
734 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700735
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700736 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
737 ALOGV("\tlayer %u: background supported", i);
738 dump_layer(&contents->hwLayers[i]);
739 continue;
740 }
741
Greg Hackmann81575142012-09-19 15:09:04 -0700742 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
743 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700744 ALOGV("\tlayer %u: overlay supported", i);
745 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700746 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700747 continue;
748 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700749
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700750 if (!fb_needed) {
751 first_fb = i;
752 fb_needed = true;
753 }
754 last_fb = i;
755 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700756
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700757 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700758 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700759
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700760 // can't composite overlays sandwiched between framebuffers
761 if (fb_needed)
762 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700763 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700764
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700765 // Incrementally try to add our supported layers to hardware windows.
766 // If adding a layer would violate a hardware constraint, force it
767 // into the framebuffer and try again. (Revisiting the entire list is
768 // necessary because adding a layer to the framebuffer can cause other
769 // windows to retroactively violate constraints.)
770 bool changed;
771 do {
772 android::Vector<hwc_rect> rects;
773 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700774 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700775
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700776 if (fb_needed) {
777 hwc_rect_t fb_rect;
778 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700779 fb_rect.right = pdev->xres - 1;
780 fb_rect.bottom = pdev->yres - 1;
781 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700782 windows_left = NUM_HW_WINDOWS - 1;
783 rects.push_back(fb_rect);
784 }
785 else {
786 pixels_left = MAX_PIXELS;
787 windows_left = NUM_HW_WINDOWS;
788 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700789 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700790 gsc_left--;
791
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700792 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700793
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700794 for (size_t i = 0; i < contents->numHwLayers; i++) {
795 hwc_layer_1_t &layer = contents->hwLayers[i];
796 if ((layer.flags & HWC_SKIP_LAYER) ||
797 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700798 continue;
799
800 private_handle_t *handle = private_handle_t::dynamicCast(
801 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700802
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700803 // we've already accounted for the framebuffer above
804 if (layer.compositionType == HWC_FRAMEBUFFER)
805 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700806
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700807 // only layer 0 can be HWC_BACKGROUND, so we can
808 // unconditionally allow it without extra checks
809 if (layer.compositionType == HWC_BACKGROUND) {
810 windows_left--;
811 continue;
812 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700813
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700814 size_t pixels_needed = WIDTH(layer.displayFrame) *
815 HEIGHT(layer.displayFrame);
816 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700817 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700818 if (gsc_required)
819 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700820
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700821 // hwc_rect_t right and bottom values are normally exclusive;
822 // the intersection logic is simpler if we make them inclusive
823 hwc_rect_t visible_rect = layer.displayFrame;
824 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700825
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700826 // no more than 2 layers can overlap on a given pixel
827 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
828 if (intersect(visible_rect, overlaps.itemAt(j)))
829 can_compose = false;
830 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700831
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700832 if (!can_compose) {
833 layer.compositionType = HWC_FRAMEBUFFER;
834 if (!fb_needed) {
835 first_fb = last_fb = i;
836 fb_needed = true;
837 }
838 else {
839 first_fb = min(i, first_fb);
840 last_fb = max(i, last_fb);
841 }
842 changed = true;
843 break;
844 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700845
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700846 for (size_t j = 0; j < rects.size(); j++) {
847 const hwc_rect_t &other_rect = rects.itemAt(j);
848 if (intersect(visible_rect, other_rect))
849 overlaps.push_back(intersection(visible_rect, other_rect));
850 }
851 rects.push_back(visible_rect);
852 pixels_left -= pixels_needed;
853 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700854 if (gsc_required)
855 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700856 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700857
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700858 if (changed)
859 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700860 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700861 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700862
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700863 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700864 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700865
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700866 for (size_t i = 0; i < contents->numHwLayers; i++) {
867 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700868
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700869 if (fb_needed && i == first_fb) {
870 ALOGV("assigning framebuffer to window %u\n",
871 nextWindow);
872 nextWindow++;
873 continue;
874 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700875
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700876 if (layer.compositionType != HWC_FRAMEBUFFER &&
877 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700878 ALOGV("assigning layer %u to window %u", i, nextWindow);
879 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700880 if (layer.compositionType == HWC_OVERLAY) {
881 private_handle_t *handle =
882 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700883 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700884 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700885 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700886 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700887 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700888 }
889 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700890 nextWindow++;
891 }
892 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700893
Greg Hackmann9130e702012-07-30 14:53:04 -0700894 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
895 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
896 if (pdev->gsc[i].dst_buf[j])
897 pdev->alloc_device->free(pdev->alloc_device,
898 pdev->gsc[i].dst_buf[j]);
899 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
900 }
901
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700902 if (fb_needed)
903 pdev->bufs.fb_window = first_fb;
904 else
905 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700906
Greg Hackmann9130e702012-07-30 14:53:04 -0700907 return 0;
908}
909
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700910static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
911 hwc_display_contents_1_t* contents)
912{
Benoit Goby922abbf2012-09-19 19:24:19 -0700913 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
914
915 for (size_t i = 0; i < contents->numHwLayers; i++) {
916 hwc_layer_1_t &layer = contents->hwLayers[i];
917
918 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
919 ALOGV("\tlayer %u: framebuffer target", i);
920 dump_layer(&layer);
921 continue;
922 }
923
924 if (layer.compositionType == HWC_BACKGROUND) {
925 ALOGV("\tlayer %u: background layer", i);
926 dump_layer(&layer);
927 continue;
928 }
929
930 layer.compositionType = HWC_FRAMEBUFFER;
931 dump_layer(&layer);
932 }
933
934 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700935}
936
937static int exynos5_prepare(hwc_composer_device_1_t *dev,
938 size_t numDisplays, hwc_display_contents_1_t** displays)
939{
940 if (!numDisplays || !displays)
941 return 0;
942
943 exynos5_hwc_composer_device_1_t *pdev =
944 (exynos5_hwc_composer_device_1_t *)dev;
945 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
946 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
947
948 if (pdev->hdmi_hpd) {
949 hdmi_enable(pdev);
950 } else {
951 hdmi_disable(pdev);
952 }
953
954 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -0700955 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700956 if (err)
957 return err;
958 }
959
960 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700961 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
962 if (err)
963 return err;
964 }
965
966 return 0;
967}
968
Greg Hackmann9130e702012-07-30 14:53:04 -0700969static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
970 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
971 int gsc_idx)
972{
973 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
974
975 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
976 buffer_handle_t dst_buf;
977 private_handle_t *dst_handle;
978 int ret = 0;
979
980 exynos_gsc_img src_cfg, dst_cfg;
981 memset(&src_cfg, 0, sizeof(src_cfg));
982 memset(&dst_cfg, 0, sizeof(dst_cfg));
983
984 src_cfg.x = layer.sourceCrop.left;
985 src_cfg.y = layer.sourceCrop.top;
986 src_cfg.w = WIDTH(layer.sourceCrop);
987 src_cfg.fw = src_handle->stride;
988 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700989 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700990 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700991 if (exynos5_format_is_ycrcb(src_handle->format)) {
992 src_cfg.uaddr = src_handle->fd2;
993 src_cfg.vaddr = src_handle->fd1;
994 } else {
995 src_cfg.uaddr = src_handle->fd1;
996 src_cfg.vaddr = src_handle->fd2;
997 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700998 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700999 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -07001000
1001 dst_cfg.x = 0;
1002 dst_cfg.y = 0;
1003 dst_cfg.w = WIDTH(layer.displayFrame);
1004 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001005 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001006 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann09c45c22012-09-20 09:35:37 -07001007 if (exynos5_format_is_rgb(src_handle->format))
1008 dst_cfg.format = HAL_PIXEL_FORMAT_RGBX_8888;
1009 else
1010 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
1011 // RGB surfaces are already in the right color order from the GPU,
1012 // YUV surfaces need the Gscaler to swap R & B
Greg Hackmann9130e702012-07-30 14:53:04 -07001013
1014 ALOGV("source configuration:");
1015 dump_gsc_img(src_cfg);
1016
1017 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1018 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1019 int dst_stride;
1020 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1021 GRALLOC_USAGE_SW_WRITE_NEVER |
1022 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001023
1024 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1025 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001026
1027 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1028 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1029
1030 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1031 if (gsc_data->dst_buf[i]) {
1032 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1033 gsc_data->dst_buf[i] = NULL;
1034 }
1035
1036 int ret = alloc_device->alloc(alloc_device, w, h,
1037 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1038 &dst_stride);
1039 if (ret < 0) {
1040 ALOGE("failed to allocate destination buffer: %s",
1041 strerror(-ret));
1042 goto err_alloc;
1043 }
1044 }
1045
1046 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001047 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001048
Greg Hackmann9130e702012-07-30 14:53:04 -07001049 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1050 dst_handle = private_handle_t::dynamicCast(dst_buf);
1051
1052 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001053 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001054 dst_cfg.yaddr = dst_handle->fd;
1055
1056 ALOGV("destination configuration:");
1057 dump_gsc_img(dst_cfg);
1058
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001059 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1060 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001061 if (!gsc_data->gsc) {
1062 ALOGE("failed to create gscaler handle");
1063 ret = -1;
1064 goto err_alloc;
1065 }
1066
1067 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1068 if (ret < 0) {
1069 ALOGE("failed to configure gscaler %u", gsc_idx);
1070 goto err_gsc_config;
1071 }
1072
1073 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1074 if (ret < 0) {
1075 ALOGE("failed to run gscaler %u", gsc_idx);
1076 goto err_gsc_config;
1077 }
1078
1079 gsc_data->src_cfg = src_cfg;
1080 gsc_data->dst_cfg = dst_cfg;
1081
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001082 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001083
1084err_gsc_config:
1085 exynos_gsc_destroy(gsc_data->gsc);
1086 gsc_data->gsc = NULL;
1087err_alloc:
1088 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1089 if (gsc_data->dst_buf[i]) {
1090 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1091 gsc_data->dst_buf[i] = NULL;
1092 }
1093 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001094 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1095 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001096 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001097}
1098
1099static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001100 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001101 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001102 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001103{
Greg Hackmann81575142012-09-19 15:09:04 -07001104 uint32_t x, y;
1105 uint32_t w = WIDTH(displayFrame);
1106 uint32_t h = HEIGHT(displayFrame);
1107 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1108 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1109
1110 if (displayFrame.left < 0) {
1111 unsigned int crop = -displayFrame.left;
1112 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1113 crop);
1114 x = 0;
1115 w -= crop;
1116 offset += crop * bpp / 8;
1117 } else {
1118 x = displayFrame.left;
1119 }
1120
1121 if (displayFrame.right > pdev->xres) {
1122 unsigned int crop = displayFrame.right - pdev->xres;
1123 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1124 crop);
1125 w -= crop;
1126 }
1127
1128 if (displayFrame.top < 0) {
1129 unsigned int crop = -displayFrame.top;
1130 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1131 crop);
1132 y = 0;
1133 h -= crop;
1134 offset += handle->stride * crop * bpp / 8;
1135 } else {
1136 y = displayFrame.top;
1137 }
1138
1139 if (displayFrame.bottom > pdev->yres) {
1140 int crop = displayFrame.bottom - pdev->yres;
1141 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1142 crop);
1143 h -= crop;
1144 }
1145
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001146 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1147 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001148 cfg.x = x;
1149 cfg.y = y;
1150 cfg.w = w;
1151 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001152 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001153 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001154 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001155 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001156 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001157}
1158
Erik Gilling87e707e2012-06-29 17:35:13 -07001159static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001160 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001161{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001162 if (layer->compositionType == HWC_BACKGROUND) {
1163 hwc_color_t color = layer->backgroundColor;
1164 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1165 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1166 cfg.x = 0;
1167 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001168 cfg.w = pdev->xres;
1169 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001170 return;
1171 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001172
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001173 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001174 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001175 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001176}
1177
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001178static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001179 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001180{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001181 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001182 struct s3c_fb_win_config_data win_data;
1183 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001184
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001185 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001186 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1187 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001188
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001189 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001190 int layer_idx = pdata->overlay_map[i];
1191 if (layer_idx != -1) {
1192 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001193 private_handle_t *handle =
1194 private_handle_t::dynamicCast(layer.handle);
1195
1196 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1197 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001198 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001199
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001200 if (layer.acquireFenceFd != -1) {
1201 int err = sync_wait(layer.acquireFenceFd, 100);
1202 if (err != 0)
1203 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1204 i, strerror(errno));
1205 close(layer.acquireFenceFd);
1206 }
1207
1208 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
1209 gsc_idx);
1210 if (err < 0) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001211 ALOGE("failed to queue gscaler %u input for layer %u",
1212 gsc_idx, i);
1213 continue;
1214 }
1215
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001216 err = exynos_gsc_stop_exclusive(gsc.gsc);
Greg Hackmann9130e702012-07-30 14:53:04 -07001217 exynos_gsc_destroy(gsc.gsc);
1218 gsc.gsc = NULL;
1219 if (err < 0) {
1220 ALOGE("failed to dequeue gscaler output for layer %u", i);
1221 continue;
1222 }
1223
1224 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1225 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1226 private_handle_t *dst_handle =
1227 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001228 hwc_rect_t sourceCrop = { 0, 0,
1229 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1230 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001231 layer.displayFrame, layer.blending, -1, config[i],
1232 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001233 } else {
1234 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001235 }
1236 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001237 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1238 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1239 config[i].blending = S3C_FB_BLENDING_NONE;
1240 }
1241
Greg Hackmann9130e702012-07-30 14:53:04 -07001242 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001243 dump_config(config[i]);
1244 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001245
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001246 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001247 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1248 if (config[i].fence_fd != -1)
1249 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001250 if (ret < 0) {
1251 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1252 return ret;
1253 }
1254
1255 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1256 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1257 pdev->last_fb_window = pdata->fb_window;
1258 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1259 int layer_idx = pdata->overlay_map[i];
1260 if (layer_idx != -1) {
1261 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1262 pdev->last_handles[i] = layer.handle;
1263 }
1264 }
1265
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001266 return win_data.fence;
1267}
1268
1269static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001270 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001271{
1272 if (!contents->dpy || !contents->sur)
1273 return 0;
1274
1275 hwc_layer_1_t *fb_layer = NULL;
1276
1277 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1278 for (size_t i = 0; i < contents->numHwLayers; i++) {
1279 if (contents->hwLayers[i].compositionType ==
1280 HWC_FRAMEBUFFER_TARGET) {
1281 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1282 fb_layer = &contents->hwLayers[i];
1283 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001284 }
1285 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001286
1287 if (CC_UNLIKELY(!fb_layer)) {
1288 ALOGE("framebuffer target expected, but not provided");
1289 return -EINVAL;
1290 }
1291
1292 ALOGV("framebuffer target buffer:");
1293 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001294 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001295
Benoit Goby922abbf2012-09-19 19:24:19 -07001296 int fence = exynos5_post_fimd(pdev, contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001297 if (fence < 0)
1298 return fence;
1299
1300 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1301 if (pdev->bufs.overlay_map[i] != -1) {
1302 hwc_layer_1_t &layer =
1303 contents->hwLayers[pdev->bufs.overlay_map[i]];
1304 int dup_fd = dup(fence);
1305 if (dup_fd < 0)
1306 ALOGW("release fence dup failed: %s", strerror(errno));
1307 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001308 }
1309 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001310 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001311
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001312 return 0;
1313}
1314
1315static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1316 hwc_display_contents_1_t* contents)
1317{
Benoit Goby105be0b2012-09-21 13:19:30 -07001318 if (!pdev->hdmi_enabled) {
1319 for (size_t i = 0; i < contents->numHwLayers; i++) {
1320 hwc_layer_1_t &layer = contents->hwLayers[i];
1321 if (layer.acquireFenceFd != -1)
1322 close(layer.acquireFenceFd);
Benoit Goby922abbf2012-09-19 19:24:19 -07001323 }
Benoit Goby48a69542012-09-21 17:12:28 -07001324 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001325 }
Benoit Goby48a69542012-09-21 17:12:28 -07001326
1327 for (size_t i = 0; i < contents->numHwLayers; i++) {
1328 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001329
1330 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1331 if (!layer.handle)
1332 continue;
1333
1334 ALOGV("HDMI FB layer:");
1335 dump_layer(&layer);
1336
1337 hdmi_configure_fblayer(pdev, layer);
1338 }
1339 }
1340
1341 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001342}
1343
Jesse Halle94046d2012-07-31 14:34:08 -07001344static int exynos5_set(struct hwc_composer_device_1 *dev,
1345 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001346{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001347 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001348 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001349
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001350 exynos5_hwc_composer_device_1_t *pdev =
1351 (exynos5_hwc_composer_device_1_t *)dev;
1352 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1353 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001354
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001355 if (fimd_contents) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001356 int err = exynos5_set_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001357 if (err)
1358 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001359 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001360
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001361 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001362 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1363 if (err)
1364 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001365 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001366
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001367 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001368}
1369
Erik Gilling87e707e2012-06-29 17:35:13 -07001370static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001371 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001372{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001373 struct exynos5_hwc_composer_device_1_t* pdev =
1374 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001375 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001376}
1377
Erik Gilling87e707e2012-06-29 17:35:13 -07001378static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001379{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001380 struct exynos5_hwc_composer_device_1_t *pdev =
1381 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001382
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001383 switch (what) {
1384 case HWC_BACKGROUND_LAYER_SUPPORTED:
1385 // we support the background layer
1386 value[0] = 1;
1387 break;
1388 case HWC_VSYNC_PERIOD:
1389 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001390 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001391 break;
1392 default:
1393 // unsupported query
1394 return -EINVAL;
1395 }
1396 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001397}
1398
Jesse Halle94046d2012-07-31 14:34:08 -07001399static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1400 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001401{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001402 struct exynos5_hwc_composer_device_1_t *pdev =
1403 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001404
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001405 switch (event) {
1406 case HWC_EVENT_VSYNC:
1407 __u32 val = !!enabled;
1408 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1409 if (err < 0) {
1410 ALOGE("vsync ioctl failed");
1411 return -errno;
1412 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001413
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001414 return 0;
1415 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001416
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001417 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001418}
1419
Benoit Gobycdd61b32012-07-09 12:09:59 -07001420static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001421 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001422{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001423 const char *s = buff;
1424 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001425
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001426 while (*s) {
1427 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1428 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001429
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001430 s += strlen(s) + 1;
1431 if (s - buff >= len)
1432 break;
1433 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001434
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001435 if (pdev->hdmi_hpd) {
1436 if (hdmi_get_config(pdev)) {
1437 ALOGE("Error reading HDMI configuration");
1438 pdev->hdmi_hpd = false;
1439 return;
1440 }
1441 }
1442
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001443 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001444 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001445 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001446
Jesse Hallda5a71d2012-08-21 12:12:55 -07001447 /* hwc_dev->procs is set right after the device is opened, but there is
1448 * still a race condition where a hotplug event might occur after the open
1449 * but before the procs are registered. */
1450 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001451 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001452}
1453
Greg Hackmann29724852012-07-23 15:31:10 -07001454static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001455{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001456 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001457 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001458
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001459 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1460 if (err < 0) {
1461 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1462 return;
1463 }
1464
Greg Hackmann29724852012-07-23 15:31:10 -07001465 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001466 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001467 if (err < 0) {
1468 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1469 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001470 }
Greg Hackmann29724852012-07-23 15:31:10 -07001471 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001472
Greg Hackmann29724852012-07-23 15:31:10 -07001473 errno = 0;
1474 uint64_t timestamp = strtoull(buf, NULL, 0);
1475 if (!errno)
1476 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001477}
1478
1479static void *hwc_vsync_thread(void *data)
1480{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001481 struct exynos5_hwc_composer_device_1_t *pdev =
1482 (struct exynos5_hwc_composer_device_1_t *)data;
1483 char uevent_desc[4096];
1484 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001485
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001486 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001487
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001488 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001489
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001490 char temp[4096];
1491 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1492 if (err < 0) {
1493 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1494 return NULL;
1495 }
1496
Greg Hackmann29724852012-07-23 15:31:10 -07001497 struct pollfd fds[2];
1498 fds[0].fd = pdev->vsync_fd;
1499 fds[0].events = POLLPRI;
1500 fds[1].fd = uevent_get_fd();
1501 fds[1].events = POLLIN;
1502
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001503 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001504 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001505
Greg Hackmann29724852012-07-23 15:31:10 -07001506 if (err > 0) {
1507 if (fds[0].revents & POLLPRI) {
1508 handle_vsync_event(pdev);
1509 }
1510 else if (fds[1].revents & POLLIN) {
1511 int len = uevent_next_event(uevent_desc,
1512 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001513
Greg Hackmann29724852012-07-23 15:31:10 -07001514 bool hdmi = !strcmp(uevent_desc,
1515 "change@/devices/virtual/switch/hdmi");
1516 if (hdmi)
1517 handle_hdmi_uevent(pdev, uevent_desc, len);
1518 }
1519 }
1520 else if (err == -1) {
1521 if (errno == EINTR)
1522 break;
1523 ALOGE("error in vsync thread: %s", strerror(errno));
1524 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001525 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001526
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001527 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001528}
1529
Jesse Halle94046d2012-07-31 14:34:08 -07001530static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001531{
1532 struct exynos5_hwc_composer_device_1_t *pdev =
1533 (struct exynos5_hwc_composer_device_1_t *)dev;
1534
1535 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1536 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1537 if (err < 0) {
1538 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1539 return -errno;
1540 }
1541
Benoit Gobyad4e3582012-08-30 17:17:34 -07001542 if (pdev->hdmi_hpd) {
1543 if (blank && !pdev->hdmi_blanked)
1544 hdmi_disable(pdev);
1545 pdev->hdmi_blanked = !!blank;
1546 }
1547
Colin Cross00359a82012-07-12 17:54:17 -07001548 return 0;
1549}
1550
Greg Hackmann600867e2012-08-23 12:58:02 -07001551static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1552{
1553 if (buff_len <= 0)
1554 return;
1555
1556 struct exynos5_hwc_composer_device_1_t *pdev =
1557 (struct exynos5_hwc_composer_device_1_t *)dev;
1558
1559 android::String8 result;
1560
Benoit Goby8bad7e32012-08-16 14:17:14 -07001561 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1562 if (pdev->hdmi_enabled)
1563 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001564 result.append(
1565 " type | handle | color | blend | format | position | size | gsc \n"
1566 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1567 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1568
1569 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1570 struct s3c_fb_win_config &config = pdev->last_config[i];
1571 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1572 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1573 "DISABLED", "-", "-", "-", "-", "-", "-");
1574 }
1575 else {
1576 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1577 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1578 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001579 else
1580 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1581 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1582 intptr_t(pdev->last_handles[i]),
1583 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001584
1585 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1586 config.w, config.h);
1587 }
1588 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1589 result.appendFormat(" | %3s", "-");
1590 else
1591 result.appendFormat(" | %3d",
1592 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1593 result.append("\n");
1594 }
1595
1596 strlcpy(buff, result.string(), buff_len);
1597}
1598
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001599static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1600 int disp, uint32_t *configs, size_t *numConfigs)
1601{
1602 struct exynos5_hwc_composer_device_1_t *pdev =
1603 (struct exynos5_hwc_composer_device_1_t *)dev;
1604
1605 if (*numConfigs == 0)
1606 return 0;
1607
1608 if (disp == HWC_DISPLAY_PRIMARY) {
1609 configs[0] = 0;
1610 *numConfigs = 1;
1611 return 0;
1612 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001613 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001614 return -EINVAL;
1615 }
1616
1617 int err = hdmi_get_config(pdev);
1618 if (err) {
1619 return -EINVAL;
1620 }
1621
1622 configs[0] = 0;
1623 *numConfigs = 1;
1624 return 0;
1625 }
1626
1627 return -EINVAL;
1628}
1629
1630static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1631 const uint32_t attribute)
1632{
1633 switch(attribute) {
1634 case HWC_DISPLAY_VSYNC_PERIOD:
1635 return pdev->vsync_period;
1636
1637 case HWC_DISPLAY_WIDTH:
1638 return pdev->xres;
1639
1640 case HWC_DISPLAY_HEIGHT:
1641 return pdev->yres;
1642
1643 case HWC_DISPLAY_DPI_X:
1644 return pdev->xdpi;
1645
1646 case HWC_DISPLAY_DPI_Y:
1647 return pdev->ydpi;
1648
1649 default:
1650 ALOGE("unknown display attribute %u", attribute);
1651 return -EINVAL;
1652 }
1653}
1654
1655static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1656 const uint32_t attribute)
1657{
1658 switch(attribute) {
1659 case HWC_DISPLAY_VSYNC_PERIOD:
1660 return pdev->vsync_period;
1661
1662 case HWC_DISPLAY_WIDTH:
1663 return pdev->hdmi_w;
1664
1665 case HWC_DISPLAY_HEIGHT:
1666 return pdev->hdmi_h;
1667
1668 case HWC_DISPLAY_DPI_X:
1669 case HWC_DISPLAY_DPI_Y:
1670 return 0; // unknown
1671
1672 default:
1673 ALOGE("unknown display attribute %u", attribute);
1674 return -EINVAL;
1675 }
1676}
1677
Jesse Hall54aa0d22012-09-20 11:43:49 -07001678static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001679 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1680{
1681 struct exynos5_hwc_composer_device_1_t *pdev =
1682 (struct exynos5_hwc_composer_device_1_t *)dev;
1683
1684 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1685 if (disp == HWC_DISPLAY_PRIMARY)
1686 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1687 else if (disp == HWC_DISPLAY_EXTERNAL)
1688 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001689 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001690 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001691 return -EINVAL;
1692 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001693 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001694
1695 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001696}
1697
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001698static int exynos5_close(hw_device_t* device);
1699
1700static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001701 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001702{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001703 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001704 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001705 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001706
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001707 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1708 return -EINVAL;
1709 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001710
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001711 struct exynos5_hwc_composer_device_1_t *dev;
1712 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1713 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001714
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001715 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1716 (const struct hw_module_t **)&dev->gralloc_module)) {
1717 ALOGE("failed to get gralloc hw module");
1718 ret = -EINVAL;
1719 goto err_get_module;
1720 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001721
Greg Hackmann9130e702012-07-30 14:53:04 -07001722 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1723 &dev->alloc_device)) {
1724 ALOGE("failed to open gralloc");
1725 ret = -EINVAL;
1726 goto err_get_module;
1727 }
1728
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001729 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1730 if (dev->fd < 0) {
1731 ALOGE("failed to open framebuffer");
1732 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001733 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001734 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001735
Greg Hackmannd92fe212012-09-11 14:28:41 -07001736 struct fb_var_screeninfo info;
1737 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1738 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1739 ret = -errno;
1740 goto err_ioctl;
1741 }
1742
1743 refreshRate = 1000000000000LLU /
1744 (
1745 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1746 * ( info.left_margin + info.right_margin + info.xres )
1747 * info.pixclock
1748 );
1749
1750 if (refreshRate == 0) {
1751 ALOGW("invalid refresh rate, assuming 60 Hz");
1752 refreshRate = 60;
1753 }
1754
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001755 dev->xres = 2560;
1756 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001757 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1758 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1759 dev->vsync_period = 1000000000 / refreshRate;
1760
1761 ALOGV("using\n"
1762 "xres = %d px\n"
1763 "yres = %d px\n"
1764 "width = %d mm (%f dpi)\n"
1765 "height = %d mm (%f dpi)\n"
1766 "refresh rate = %d Hz\n",
1767 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1768 info.height, dev->ydpi / 1000.0, refreshRate);
1769
Benoit Goby8bad7e32012-08-16 14:17:14 -07001770 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1771 if (dev->hdmi_layer0 < 0) {
1772 ALOGE("failed to open hdmi mixer0 subdev");
1773 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001774 goto err_ioctl;
1775 }
1776
Benoit Goby8bad7e32012-08-16 14:17:14 -07001777 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1778 if (dev->hdmi_layer0 < 0) {
1779 ALOGE("failed to open hdmi layer0 device");
1780 ret = dev->hdmi_layer0;
1781 goto err_mixer0;
1782 }
1783
1784 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1785 if (dev->hdmi_layer1 < 0) {
1786 ALOGE("failed to open hdmi layer1 device");
1787 ret = dev->hdmi_layer1;
1788 goto err_hdmi0;
1789 }
1790
Greg Hackmann29724852012-07-23 15:31:10 -07001791 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1792 if (dev->vsync_fd < 0) {
1793 ALOGE("failed to open vsync attribute");
1794 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001795 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001796 }
1797
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001798 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1799 if (sw_fd) {
1800 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001801 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001802 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001803 if (hdmi_get_config(dev)) {
1804 ALOGE("Error reading HDMI configuration");
1805 dev->hdmi_hpd = false;
1806 }
1807 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001808 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001809
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001810 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001811 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001812 dev->base.common.module = const_cast<hw_module_t *>(module);
1813 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001814
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001815 dev->base.prepare = exynos5_prepare;
1816 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001817 dev->base.eventControl = exynos5_eventControl;
1818 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001819 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001820 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001821 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001822 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1823 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001824
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001825 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001826
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001827 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1828 if (ret) {
1829 ALOGE("failed to start vsync thread: %s", strerror(ret));
1830 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001831 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001832 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001833
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001834 char value[PROPERTY_VALUE_MAX];
1835 property_get("debug.hwc.force_gpu", value, "0");
1836 dev->force_gpu = atoi(value);
1837
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001838 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001839
Greg Hackmann29724852012-07-23 15:31:10 -07001840err_vsync:
1841 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001842err_mixer0:
1843 close(dev->hdmi_mixer0);
1844err_hdmi1:
1845 close(dev->hdmi_layer0);
1846err_hdmi0:
1847 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001848err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001849 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001850err_open_fb:
1851 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001852err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001853 free(dev);
1854 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001855}
1856
1857static int exynos5_close(hw_device_t *device)
1858{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001859 struct exynos5_hwc_composer_device_1_t *dev =
1860 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001861 pthread_kill(dev->vsync_thread, SIGTERM);
1862 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001863 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1864 if (dev->gsc[i].gsc)
1865 exynos_gsc_destroy(dev->gsc[i].gsc);
1866 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1867 if (dev->gsc[i].dst_buf[j])
1868 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1869 }
1870 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001871 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001872 close(dev->hdmi_mixer0);
1873 close(dev->hdmi_layer0);
1874 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001875 close(dev->fd);
1876 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001877}
1878
1879static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001880 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001881};
1882
1883hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001884 common: {
1885 tag: HARDWARE_MODULE_TAG,
1886 module_api_version: HWC_MODULE_API_VERSION_0_1,
1887 hal_api_version: HARDWARE_HAL_API_VERSION,
1888 id: HWC_HARDWARE_MODULE_ID,
1889 name: "Samsung exynos5 hwcomposer module",
1890 author: "Google",
1891 methods: &exynos5_hwc_module_methods,
1892 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001893};