Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2011-2012 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Ben Widawsky <ben@bwidawsk.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * This file implements HW context support. On gen5+ a HW context consists of an |
| 30 | * opaque GPU object which is referenced at times of context saves and restores. |
| 31 | * With RC6 enabled, the context is also referenced as the GPU enters and exists |
| 32 | * from RC6 (GPU has it's own internal power context, except on gen5). Though |
| 33 | * something like a context does exist for the media ring, the code only |
| 34 | * supports contexts for the render ring. |
| 35 | * |
| 36 | * In software, there is a distinction between contexts created by the user, |
| 37 | * and the default HW context. The default HW context is used by GPU clients |
| 38 | * that do not request setup of their own hardware context. The default |
| 39 | * context's state is never restored to help prevent programming errors. This |
| 40 | * would happen if a client ran and piggy-backed off another clients GPU state. |
| 41 | * The default context only exists to give the GPU some offset to load as the |
| 42 | * current to invoke a save of the context we actually care about. In fact, the |
| 43 | * code could likely be constructed, albeit in a more complicated fashion, to |
| 44 | * never use the default context, though that limits the driver's ability to |
| 45 | * swap out, and/or destroy other contexts. |
| 46 | * |
| 47 | * All other contexts are created as a request by the GPU client. These contexts |
| 48 | * store GPU state, and thus allow GPU clients to not re-emit state (and |
| 49 | * potentially query certain state) at any time. The kernel driver makes |
| 50 | * certain that the appropriate commands are inserted. |
| 51 | * |
| 52 | * The context life cycle is semi-complicated in that context BOs may live |
| 53 | * longer than the context itself because of the way the hardware, and object |
| 54 | * tracking works. Below is a very crude representation of the state machine |
| 55 | * describing the context life. |
| 56 | * refcount pincount active |
| 57 | * S0: initial state 0 0 0 |
| 58 | * S1: context created 1 0 0 |
| 59 | * S2: context is currently running 2 1 X |
| 60 | * S3: GPU referenced, but not current 2 0 1 |
| 61 | * S4: context is current, but destroyed 1 1 0 |
| 62 | * S5: like S3, but destroyed 1 0 1 |
| 63 | * |
| 64 | * The most common (but not all) transitions: |
| 65 | * S0->S1: client creates a context |
| 66 | * S1->S2: client submits execbuf with context |
| 67 | * S2->S3: other clients submits execbuf with context |
| 68 | * S3->S1: context object was retired |
| 69 | * S3->S2: clients submits another execbuf |
| 70 | * S2->S4: context destroy called with current context |
| 71 | * S3->S5->S0: destroy path |
| 72 | * S4->S5->S0: destroy path on current context |
| 73 | * |
| 74 | * There are two confusing terms used above: |
| 75 | * The "current context" means the context which is currently running on the |
Damien Lespiau | 508842a | 2013-08-30 14:40:26 +0100 | [diff] [blame] | 76 | * GPU. The GPU has loaded its state already and has stored away the gtt |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 77 | * offset of the BO. The GPU is not actively referencing the data at this |
| 78 | * offset, but it will on the next context switch. The only way to avoid this |
| 79 | * is to do a GPU reset. |
| 80 | * |
| 81 | * An "active context' is one which was previously the "current context" and is |
| 82 | * on the active list waiting for the next context switch to occur. Until this |
| 83 | * happens, the object must remain at the same gtt offset. It is therefore |
| 84 | * possible to destroy a context, but it is still active. |
| 85 | * |
| 86 | */ |
| 87 | |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 88 | #include <drm/drmP.h> |
| 89 | #include <drm/i915_drm.h> |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 90 | #include "i915_drv.h" |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 91 | #include "i915_trace.h" |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 92 | |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 93 | /* This is a HW constraint. The value below is the largest known requirement |
| 94 | * I've seen in a spec to date, and that was a workaround for a non-shipping |
| 95 | * part. It should be safe to decrease this, but it's more future proof as is. |
| 96 | */ |
Ben Widawsky | b731d33 | 2013-12-06 14:10:59 -0800 | [diff] [blame] | 97 | #define GEN6_CONTEXT_ALIGN (64<<10) |
| 98 | #define GEN7_CONTEXT_ALIGN 4096 |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 99 | |
Ben Widawsky | b731d33 | 2013-12-06 14:10:59 -0800 | [diff] [blame] | 100 | static size_t get_context_alignment(struct drm_device *dev) |
| 101 | { |
| 102 | if (IS_GEN6(dev)) |
| 103 | return GEN6_CONTEXT_ALIGN; |
| 104 | |
| 105 | return GEN7_CONTEXT_ALIGN; |
| 106 | } |
| 107 | |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 108 | static int get_context_size(struct drm_device *dev) |
| 109 | { |
| 110 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 111 | int ret; |
| 112 | u32 reg; |
| 113 | |
| 114 | switch (INTEL_INFO(dev)->gen) { |
| 115 | case 6: |
| 116 | reg = I915_READ(CXT_SIZE); |
| 117 | ret = GEN6_CXT_TOTAL_SIZE(reg) * 64; |
| 118 | break; |
| 119 | case 7: |
Ben Widawsky | 4f91dd6 | 2012-07-18 10:10:09 -0700 | [diff] [blame] | 120 | reg = I915_READ(GEN7_CXT_SIZE); |
Ben Widawsky | 2e4291e | 2012-07-24 20:47:30 -0700 | [diff] [blame] | 121 | if (IS_HASWELL(dev)) |
Ben Widawsky | a0de80a | 2013-06-25 21:53:40 -0700 | [diff] [blame] | 122 | ret = HSW_CXT_TOTAL_SIZE; |
Ben Widawsky | 2e4291e | 2012-07-24 20:47:30 -0700 | [diff] [blame] | 123 | else |
| 124 | ret = GEN7_CXT_TOTAL_SIZE(reg) * 64; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 125 | break; |
Ben Widawsky | 8897644 | 2013-11-02 21:07:05 -0700 | [diff] [blame] | 126 | case 8: |
| 127 | ret = GEN8_CXT_TOTAL_SIZE; |
| 128 | break; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 129 | default: |
| 130 | BUG(); |
| 131 | } |
| 132 | |
| 133 | return ret; |
| 134 | } |
| 135 | |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 136 | void i915_gem_context_free(struct kref *ctx_ref) |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 137 | { |
Chris Wilson | 9ea4fee | 2015-05-05 09:17:29 +0100 | [diff] [blame] | 138 | struct intel_context *ctx = container_of(ctx_ref, typeof(*ctx), ref); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 139 | |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 140 | trace_i915_context_free(ctx); |
| 141 | |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 142 | if (i915.enable_execlists) |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 143 | intel_lr_context_free(ctx); |
Ben Widawsky | c7c48df | 2013-12-06 14:11:15 -0800 | [diff] [blame] | 144 | |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 145 | i915_ppgtt_put(ctx->ppgtt); |
| 146 | |
Ben Widawsky | 2f29579 | 2014-07-01 11:17:47 -0700 | [diff] [blame] | 147 | if (ctx->legacy_hw_ctx.rcs_state) |
| 148 | drm_gem_object_unreference(&ctx->legacy_hw_ctx.rcs_state->base); |
Ben Widawsky | c7c48df | 2013-12-06 14:11:15 -0800 | [diff] [blame] | 149 | list_del(&ctx->link); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 150 | kfree(ctx); |
| 151 | } |
| 152 | |
Oscar Mateo | 8c857917 | 2014-07-24 17:04:14 +0100 | [diff] [blame] | 153 | struct drm_i915_gem_object * |
Oscar Mateo | aa0c13d | 2014-07-03 16:27:58 +0100 | [diff] [blame] | 154 | i915_gem_alloc_context_obj(struct drm_device *dev, size_t size) |
| 155 | { |
| 156 | struct drm_i915_gem_object *obj; |
| 157 | int ret; |
| 158 | |
Ville Syrjälä | 5261392 | 2015-06-29 20:28:35 +0300 | [diff] [blame] | 159 | obj = i915_gem_alloc_object(dev, size); |
Oscar Mateo | aa0c13d | 2014-07-03 16:27:58 +0100 | [diff] [blame] | 160 | if (obj == NULL) |
| 161 | return ERR_PTR(-ENOMEM); |
| 162 | |
| 163 | /* |
| 164 | * Try to make the context utilize L3 as well as LLC. |
| 165 | * |
| 166 | * On VLV we don't have L3 controls in the PTEs so we |
| 167 | * shouldn't touch the cache level, especially as that |
| 168 | * would make the object snooped which might have a |
| 169 | * negative performance impact. |
| 170 | */ |
| 171 | if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) { |
| 172 | ret = i915_gem_object_set_cache_level(obj, I915_CACHE_L3_LLC); |
| 173 | /* Failure shouldn't ever happen this early */ |
| 174 | if (WARN_ON(ret)) { |
| 175 | drm_gem_object_unreference(&obj->base); |
| 176 | return ERR_PTR(ret); |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | return obj; |
| 181 | } |
| 182 | |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 183 | static struct intel_context * |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 184 | __create_hw_context(struct drm_device *dev, |
Daniel Vetter | ee960be | 2014-08-06 15:04:45 +0200 | [diff] [blame] | 185 | struct drm_i915_file_private *file_priv) |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 186 | { |
| 187 | struct drm_i915_private *dev_priv = dev->dev_private; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 188 | struct intel_context *ctx; |
Tejun Heo | c8c470a | 2013-02-27 17:04:10 -0800 | [diff] [blame] | 189 | int ret; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 190 | |
Ben Widawsky | f94982b | 2012-11-10 10:56:04 -0800 | [diff] [blame] | 191 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
Ben Widawsky | 146937e | 2012-06-29 10:30:39 -0700 | [diff] [blame] | 192 | if (ctx == NULL) |
| 193 | return ERR_PTR(-ENOMEM); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 194 | |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 195 | kref_init(&ctx->ref); |
Ben Widawsky | a33afea | 2013-09-17 21:12:45 -0700 | [diff] [blame] | 196 | list_add_tail(&ctx->link, &dev_priv->context_list); |
Chris Wilson | 9ea4fee | 2015-05-05 09:17:29 +0100 | [diff] [blame] | 197 | ctx->i915 = dev_priv; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 198 | |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 199 | if (dev_priv->hw_context_size) { |
Oscar Mateo | aa0c13d | 2014-07-03 16:27:58 +0100 | [diff] [blame] | 200 | struct drm_i915_gem_object *obj = |
| 201 | i915_gem_alloc_context_obj(dev, dev_priv->hw_context_size); |
| 202 | if (IS_ERR(obj)) { |
| 203 | ret = PTR_ERR(obj); |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 204 | goto err_out; |
| 205 | } |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 206 | ctx->legacy_hw_ctx.rcs_state = obj; |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | /* Default context will never have a file_priv */ |
| 210 | if (file_priv != NULL) { |
| 211 | ret = idr_alloc(&file_priv->context_idr, ctx, |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 212 | DEFAULT_CONTEXT_HANDLE, 0, GFP_KERNEL); |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 213 | if (ret < 0) |
| 214 | goto err_out; |
| 215 | } else |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 216 | ret = DEFAULT_CONTEXT_HANDLE; |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 217 | |
| 218 | ctx->file_priv = file_priv; |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 219 | ctx->user_handle = ret; |
Ben Widawsky | 3ccfd19 | 2013-09-18 19:03:18 -0700 | [diff] [blame] | 220 | /* NB: Mark all slices as needing a remap so that when the context first |
| 221 | * loads it will restore whatever remap state already exists. If there |
| 222 | * is no remap info, it will be a NOP. */ |
| 223 | ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 224 | |
Chris Wilson | 676fa57 | 2014-12-24 08:13:39 -0800 | [diff] [blame] | 225 | ctx->hang_stats.ban_period_seconds = DRM_I915_CTX_BAN_PERIOD; |
| 226 | |
Ben Widawsky | 146937e | 2012-06-29 10:30:39 -0700 | [diff] [blame] | 227 | return ctx; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 228 | |
| 229 | err_out: |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 230 | i915_gem_context_unreference(ctx); |
Ben Widawsky | 146937e | 2012-06-29 10:30:39 -0700 | [diff] [blame] | 231 | return ERR_PTR(ret); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 232 | } |
| 233 | |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 234 | /** |
| 235 | * The default context needs to exist per ring that uses contexts. It stores the |
| 236 | * context state of the GPU for applications that don't utilize HW contexts, as |
| 237 | * well as an idle case. |
| 238 | */ |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 239 | static struct intel_context * |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 240 | i915_gem_create_context(struct drm_device *dev, |
Daniel Vetter | d624d86 | 2014-08-06 15:04:54 +0200 | [diff] [blame] | 241 | struct drm_i915_file_private *file_priv) |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 242 | { |
Chris Wilson | 42c3b60 | 2014-01-23 19:40:02 +0000 | [diff] [blame] | 243 | const bool is_global_default_ctx = file_priv == NULL; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 244 | struct intel_context *ctx; |
Ben Widawsky | bdf4fd7 | 2013-12-06 14:11:18 -0800 | [diff] [blame] | 245 | int ret = 0; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 246 | |
Ben Widawsky | b731d33 | 2013-12-06 14:10:59 -0800 | [diff] [blame] | 247 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 248 | |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 249 | ctx = __create_hw_context(dev, file_priv); |
Ben Widawsky | 146937e | 2012-06-29 10:30:39 -0700 | [diff] [blame] | 250 | if (IS_ERR(ctx)) |
Ben Widawsky | a45d0f6 | 2013-12-06 14:11:05 -0800 | [diff] [blame] | 251 | return ctx; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 252 | |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 253 | if (is_global_default_ctx && ctx->legacy_hw_ctx.rcs_state) { |
Chris Wilson | 42c3b60 | 2014-01-23 19:40:02 +0000 | [diff] [blame] | 254 | /* We may need to do things with the shrinker which |
| 255 | * require us to immediately switch back to the default |
| 256 | * context. This can cause a problem as pinning the |
| 257 | * default context also requires GTT space which may not |
| 258 | * be available. To avoid this we always pin the default |
| 259 | * context. |
| 260 | */ |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 261 | ret = i915_gem_obj_ggtt_pin(ctx->legacy_hw_ctx.rcs_state, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 262 | get_context_alignment(dev), 0); |
Chris Wilson | 42c3b60 | 2014-01-23 19:40:02 +0000 | [diff] [blame] | 263 | if (ret) { |
| 264 | DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret); |
| 265 | goto err_destroy; |
| 266 | } |
| 267 | } |
| 268 | |
Daniel Vetter | d624d86 | 2014-08-06 15:04:54 +0200 | [diff] [blame] | 269 | if (USES_FULL_PPGTT(dev)) { |
Daniel Vetter | 4d88470 | 2014-08-06 15:04:47 +0200 | [diff] [blame] | 270 | struct i915_hw_ppgtt *ppgtt = i915_ppgtt_create(dev, file_priv); |
Ben Widawsky | bdf4fd7 | 2013-12-06 14:11:18 -0800 | [diff] [blame] | 271 | |
| 272 | if (IS_ERR_OR_NULL(ppgtt)) { |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 273 | DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n", |
| 274 | PTR_ERR(ppgtt)); |
Ben Widawsky | bdf4fd7 | 2013-12-06 14:11:18 -0800 | [diff] [blame] | 275 | ret = PTR_ERR(ppgtt); |
Chris Wilson | 42c3b60 | 2014-01-23 19:40:02 +0000 | [diff] [blame] | 276 | goto err_unpin; |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | ctx->ppgtt = ppgtt; |
| 280 | } |
Ben Widawsky | bdf4fd7 | 2013-12-06 14:11:18 -0800 | [diff] [blame] | 281 | |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 282 | trace_i915_context_create(ctx); |
| 283 | |
Ben Widawsky | a45d0f6 | 2013-12-06 14:11:05 -0800 | [diff] [blame] | 284 | return ctx; |
Chris Wilson | 9a3b530 | 2012-07-15 12:34:24 +0100 | [diff] [blame] | 285 | |
Chris Wilson | 42c3b60 | 2014-01-23 19:40:02 +0000 | [diff] [blame] | 286 | err_unpin: |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 287 | if (is_global_default_ctx && ctx->legacy_hw_ctx.rcs_state) |
| 288 | i915_gem_object_ggtt_unpin(ctx->legacy_hw_ctx.rcs_state); |
Chris Wilson | 9a3b530 | 2012-07-15 12:34:24 +0100 | [diff] [blame] | 289 | err_destroy: |
Chris Wilson | 37876df | 2015-08-08 14:02:36 +0100 | [diff] [blame] | 290 | idr_remove(&file_priv->context_idr, ctx->user_handle); |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 291 | i915_gem_context_unreference(ctx); |
Ben Widawsky | a45d0f6 | 2013-12-06 14:11:05 -0800 | [diff] [blame] | 292 | return ERR_PTR(ret); |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 293 | } |
| 294 | |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 295 | void i915_gem_context_reset(struct drm_device *dev) |
| 296 | { |
| 297 | struct drm_i915_private *dev_priv = dev->dev_private; |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 298 | int i; |
| 299 | |
Thomas Daniel | 3e5b6f0 | 2015-02-16 16:12:53 +0000 | [diff] [blame] | 300 | if (i915.enable_execlists) { |
| 301 | struct intel_context *ctx; |
| 302 | |
| 303 | list_for_each_entry(ctx, &dev_priv->context_list, link) { |
| 304 | intel_lr_context_reset(dev, ctx); |
| 305 | } |
| 306 | |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 307 | return; |
Thomas Daniel | 3e5b6f0 | 2015-02-16 16:12:53 +0000 | [diff] [blame] | 308 | } |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 309 | |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 310 | for (i = 0; i < I915_NUM_RINGS; i++) { |
Oscar Mateo | a4872ba | 2014-05-22 14:13:33 +0100 | [diff] [blame] | 311 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 312 | struct intel_context *lctx = ring->last_context; |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 313 | |
McAulay, Alistair | 6689c16 | 2014-08-15 18:51:35 +0100 | [diff] [blame] | 314 | if (lctx) { |
| 315 | if (lctx->legacy_hw_ctx.rcs_state && i == RCS) |
| 316 | i915_gem_object_ggtt_unpin(lctx->legacy_hw_ctx.rcs_state); |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 317 | |
McAulay, Alistair | 6689c16 | 2014-08-15 18:51:35 +0100 | [diff] [blame] | 318 | i915_gem_context_unreference(lctx); |
| 319 | ring->last_context = NULL; |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 320 | } |
Ben Widawsky | acce9ff | 2013-12-06 14:11:03 -0800 | [diff] [blame] | 321 | } |
| 322 | } |
| 323 | |
Ben Widawsky | 8245be3 | 2013-11-06 13:56:29 -0200 | [diff] [blame] | 324 | int i915_gem_context_init(struct drm_device *dev) |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 325 | { |
| 326 | struct drm_i915_private *dev_priv = dev->dev_private; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 327 | struct intel_context *ctx; |
Ben Widawsky | a45d0f6 | 2013-12-06 14:11:05 -0800 | [diff] [blame] | 328 | int i; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 329 | |
Ben Widawsky | 2fa48d8 | 2013-12-06 14:11:04 -0800 | [diff] [blame] | 330 | /* Init should only be called once per module load. Eventually the |
| 331 | * restriction on the context_disabled check can be loosened. */ |
| 332 | if (WARN_ON(dev_priv->ring[RCS].default_context)) |
Ben Widawsky | 8245be3 | 2013-11-06 13:56:29 -0200 | [diff] [blame] | 333 | return 0; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 334 | |
Zhiyuan Lv | a0bd6c3 | 2015-08-28 15:41:16 +0800 | [diff] [blame] | 335 | if (intel_vgpu_active(dev) && HAS_LOGICAL_RING_CONTEXTS(dev)) { |
| 336 | if (!i915.enable_execlists) { |
| 337 | DRM_INFO("Only EXECLIST mode is supported in vgpu.\n"); |
| 338 | return -EINVAL; |
| 339 | } |
| 340 | } |
| 341 | |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 342 | if (i915.enable_execlists) { |
| 343 | /* NB: intentionally left blank. We will allocate our own |
| 344 | * backing objects as we need them, thank you very much */ |
| 345 | dev_priv->hw_context_size = 0; |
| 346 | } else if (HAS_HW_CONTEXTS(dev)) { |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 347 | dev_priv->hw_context_size = round_up(get_context_size(dev), 4096); |
| 348 | if (dev_priv->hw_context_size > (1<<20)) { |
| 349 | DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size %d\n", |
| 350 | dev_priv->hw_context_size); |
| 351 | dev_priv->hw_context_size = 0; |
| 352 | } |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 353 | } |
| 354 | |
Daniel Vetter | d624d86 | 2014-08-06 15:04:54 +0200 | [diff] [blame] | 355 | ctx = i915_gem_create_context(dev, NULL); |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 356 | if (IS_ERR(ctx)) { |
| 357 | DRM_ERROR("Failed to create default global context (error %ld)\n", |
| 358 | PTR_ERR(ctx)); |
| 359 | return PTR_ERR(ctx); |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 360 | } |
| 361 | |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 362 | for (i = 0; i < I915_NUM_RINGS; i++) { |
| 363 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 364 | |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 365 | /* NB: RCS will hold a ref for all rings */ |
| 366 | ring->default_context = ctx; |
Oscar Mateo | ede7d42 | 2014-07-24 17:04:12 +0100 | [diff] [blame] | 367 | } |
| 368 | |
| 369 | DRM_DEBUG_DRIVER("%s context support initialized\n", |
| 370 | i915.enable_execlists ? "LR" : |
| 371 | dev_priv->hw_context_size ? "HW" : "fake"); |
Ben Widawsky | 8245be3 | 2013-11-06 13:56:29 -0200 | [diff] [blame] | 372 | return 0; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 373 | } |
| 374 | |
| 375 | void i915_gem_context_fini(struct drm_device *dev) |
| 376 | { |
| 377 | struct drm_i915_private *dev_priv = dev->dev_private; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 378 | struct intel_context *dctx = dev_priv->ring[RCS].default_context; |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 379 | int i; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 380 | |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 381 | if (dctx->legacy_hw_ctx.rcs_state) { |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 382 | /* The only known way to stop the gpu from accessing the hw context is |
| 383 | * to reset it. Do this as the very last operation to avoid confusing |
| 384 | * other code, leading to spurious errors. */ |
| 385 | intel_gpu_reset(dev); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 386 | |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 387 | /* When default context is created and switched to, base object refcount |
| 388 | * will be 2 (+1 from object creation and +1 from do_switch()). |
| 389 | * i915_gem_context_fini() will be called after gpu_idle() has switched |
| 390 | * to default context. So we need to unreference the base object once |
| 391 | * to offset the do_switch part, so that i915_gem_context_unreference() |
| 392 | * can then free the base object correctly. */ |
| 393 | WARN_ON(!dev_priv->ring[RCS].last_context); |
| 394 | if (dev_priv->ring[RCS].last_context == dctx) { |
| 395 | /* Fake switch to NULL context */ |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 396 | WARN_ON(dctx->legacy_hw_ctx.rcs_state->active); |
| 397 | i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state); |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 398 | i915_gem_context_unreference(dctx); |
| 399 | dev_priv->ring[RCS].last_context = NULL; |
| 400 | } |
Chris Wilson | d3b448d | 2014-05-16 18:59:00 +0100 | [diff] [blame] | 401 | |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 402 | i915_gem_object_ggtt_unpin(dctx->legacy_hw_ctx.rcs_state); |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 403 | } |
| 404 | |
| 405 | for (i = 0; i < I915_NUM_RINGS; i++) { |
Oscar Mateo | a4872ba | 2014-05-22 14:13:33 +0100 | [diff] [blame] | 406 | struct intel_engine_cs *ring = &dev_priv->ring[i]; |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 407 | |
| 408 | if (ring->last_context) |
| 409 | i915_gem_context_unreference(ring->last_context); |
| 410 | |
| 411 | ring->default_context = NULL; |
Ben Widawsky | 0009e46 | 2013-12-06 14:11:02 -0800 | [diff] [blame] | 412 | ring->last_context = NULL; |
Ben Widawsky | 71b76d0 | 2013-10-14 10:01:37 -0700 | [diff] [blame] | 413 | } |
| 414 | |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 415 | i915_gem_context_unreference(dctx); |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 416 | } |
| 417 | |
John Harrison | b3dd6b9 | 2015-05-29 17:43:40 +0100 | [diff] [blame] | 418 | int i915_gem_context_enable(struct drm_i915_gem_request *req) |
Ben Widawsky | 2fa48d8 | 2013-12-06 14:11:04 -0800 | [diff] [blame] | 419 | { |
John Harrison | b3dd6b9 | 2015-05-29 17:43:40 +0100 | [diff] [blame] | 420 | struct intel_engine_cs *ring = req->ring; |
John Harrison | 90638cc | 2015-05-29 17:43:37 +0100 | [diff] [blame] | 421 | int ret; |
Ben Widawsky | bdf4fd7 | 2013-12-06 14:11:18 -0800 | [diff] [blame] | 422 | |
Thomas Daniel | e7778be | 2014-12-02 12:50:48 +0000 | [diff] [blame] | 423 | if (i915.enable_execlists) { |
John Harrison | 90638cc | 2015-05-29 17:43:37 +0100 | [diff] [blame] | 424 | if (ring->init_context == NULL) |
| 425 | return 0; |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 426 | |
John Harrison | 8753181 | 2015-05-29 17:43:44 +0100 | [diff] [blame] | 427 | ret = ring->init_context(req); |
Thomas Daniel | e7778be | 2014-12-02 12:50:48 +0000 | [diff] [blame] | 428 | } else |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 429 | ret = i915_switch_context(req); |
John Harrison | 90638cc | 2015-05-29 17:43:37 +0100 | [diff] [blame] | 430 | |
| 431 | if (ret) { |
| 432 | DRM_ERROR("ring init context: %d\n", ret); |
| 433 | return ret; |
| 434 | } |
Ben Widawsky | 2fa48d8 | 2013-12-06 14:11:04 -0800 | [diff] [blame] | 435 | |
| 436 | return 0; |
| 437 | } |
| 438 | |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 439 | static int context_idr_cleanup(int id, void *p, void *data) |
| 440 | { |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 441 | struct intel_context *ctx = p; |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 442 | |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 443 | i915_gem_context_unreference(ctx); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 444 | return 0; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 445 | } |
| 446 | |
Ben Widawsky | e422b88 | 2013-12-06 14:10:58 -0800 | [diff] [blame] | 447 | int i915_gem_context_open(struct drm_device *dev, struct drm_file *file) |
| 448 | { |
| 449 | struct drm_i915_file_private *file_priv = file->driver_priv; |
Oscar Mateo | f83d651 | 2014-05-22 14:13:38 +0100 | [diff] [blame] | 450 | struct intel_context *ctx; |
Ben Widawsky | e422b88 | 2013-12-06 14:10:58 -0800 | [diff] [blame] | 451 | |
| 452 | idr_init(&file_priv->context_idr); |
| 453 | |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 454 | mutex_lock(&dev->struct_mutex); |
Daniel Vetter | d624d86 | 2014-08-06 15:04:54 +0200 | [diff] [blame] | 455 | ctx = i915_gem_create_context(dev, file_priv); |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 456 | mutex_unlock(&dev->struct_mutex); |
| 457 | |
Oscar Mateo | f83d651 | 2014-05-22 14:13:38 +0100 | [diff] [blame] | 458 | if (IS_ERR(ctx)) { |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 459 | idr_destroy(&file_priv->context_idr); |
Oscar Mateo | f83d651 | 2014-05-22 14:13:38 +0100 | [diff] [blame] | 460 | return PTR_ERR(ctx); |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 461 | } |
| 462 | |
Ben Widawsky | e422b88 | 2013-12-06 14:10:58 -0800 | [diff] [blame] | 463 | return 0; |
| 464 | } |
| 465 | |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 466 | void i915_gem_context_close(struct drm_device *dev, struct drm_file *file) |
| 467 | { |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 468 | struct drm_i915_file_private *file_priv = file->driver_priv; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 469 | |
Daniel Vetter | 73c273e | 2012-06-19 20:27:39 +0200 | [diff] [blame] | 470 | idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 471 | idr_destroy(&file_priv->context_idr); |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 472 | } |
| 473 | |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 474 | struct intel_context * |
Ben Widawsky | 4052105 | 2012-06-04 14:42:43 -0700 | [diff] [blame] | 475 | i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id) |
| 476 | { |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 477 | struct intel_context *ctx; |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 478 | |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 479 | ctx = (struct intel_context *)idr_find(&file_priv->context_idr, id); |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 480 | if (!ctx) |
| 481 | return ERR_PTR(-ENOENT); |
| 482 | |
| 483 | return ctx; |
Ben Widawsky | 254f965 | 2012-06-04 14:42:42 -0700 | [diff] [blame] | 484 | } |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 485 | |
| 486 | static inline int |
John Harrison | 1d719cd | 2015-05-29 17:43:52 +0100 | [diff] [blame] | 487 | mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags) |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 488 | { |
John Harrison | 1d719cd | 2015-05-29 17:43:52 +0100 | [diff] [blame] | 489 | struct intel_engine_cs *ring = req->ring; |
Ben Widawsky | e80f14b | 2014-08-18 10:35:28 -0700 | [diff] [blame] | 490 | u32 flags = hw_flags | MI_MM_SPACE_GTT; |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 491 | const int num_rings = |
| 492 | /* Use an extended w/a on ivb+ if signalling from other rings */ |
| 493 | i915_semaphore_is_enabled(ring->dev) ? |
| 494 | hweight32(INTEL_INFO(ring->dev)->ring_mask) - 1 : |
| 495 | 0; |
| 496 | int len, i, ret; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 497 | |
Ben Widawsky | 12b0286 | 2012-06-04 14:42:50 -0700 | [diff] [blame] | 498 | /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB |
| 499 | * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value |
| 500 | * explicitly, so we rely on the value at ring init, stored in |
| 501 | * itlb_before_ctx_switch. |
| 502 | */ |
Ben Widawsky | 057f6a8 | 2014-04-02 22:30:23 -0700 | [diff] [blame] | 503 | if (IS_GEN6(ring->dev)) { |
John Harrison | a84c3ae | 2015-05-29 17:43:57 +0100 | [diff] [blame] | 504 | ret = ring->flush(req, I915_GEM_GPU_DOMAINS, 0); |
Ben Widawsky | 12b0286 | 2012-06-04 14:42:50 -0700 | [diff] [blame] | 505 | if (ret) |
| 506 | return ret; |
| 507 | } |
| 508 | |
Ben Widawsky | e80f14b | 2014-08-18 10:35:28 -0700 | [diff] [blame] | 509 | /* These flags are for resource streamer on HSW+ */ |
Abdiel Janulgue | 4c436d55 | 2015-06-16 13:39:41 +0300 | [diff] [blame] | 510 | if (IS_HASWELL(ring->dev) || INTEL_INFO(ring->dev)->gen >= 8) |
| 511 | flags |= (HSW_MI_RS_SAVE_STATE_EN | HSW_MI_RS_RESTORE_STATE_EN); |
| 512 | else if (INTEL_INFO(ring->dev)->gen < 8) |
Ben Widawsky | e80f14b | 2014-08-18 10:35:28 -0700 | [diff] [blame] | 513 | flags |= (MI_SAVE_EXT_STATE_EN | MI_RESTORE_EXT_STATE_EN); |
| 514 | |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 515 | |
| 516 | len = 4; |
| 517 | if (INTEL_INFO(ring->dev)->gen >= 7) |
| 518 | len += 2 + (num_rings ? 4*num_rings + 2 : 0); |
| 519 | |
John Harrison | 5fb9de1 | 2015-05-29 17:44:07 +0100 | [diff] [blame] | 520 | ret = intel_ring_begin(req, len); |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 521 | if (ret) |
| 522 | return ret; |
| 523 | |
Ville Syrjälä | b3f797a | 2014-04-28 14:31:09 +0300 | [diff] [blame] | 524 | /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw,bdw,chv */ |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 525 | if (INTEL_INFO(ring->dev)->gen >= 7) { |
Ben Widawsky | e37ec39 | 2012-06-04 14:42:48 -0700 | [diff] [blame] | 526 | intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE); |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 527 | if (num_rings) { |
| 528 | struct intel_engine_cs *signaller; |
| 529 | |
| 530 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings)); |
| 531 | for_each_ring(signaller, to_i915(ring->dev), i) { |
| 532 | if (signaller == ring) |
| 533 | continue; |
| 534 | |
| 535 | intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base)); |
| 536 | intel_ring_emit(ring, _MASKED_BIT_ENABLE(GEN6_PSMI_SLEEP_MSG_DISABLE)); |
| 537 | } |
| 538 | } |
| 539 | } |
Ben Widawsky | e37ec39 | 2012-06-04 14:42:48 -0700 | [diff] [blame] | 540 | |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 541 | intel_ring_emit(ring, MI_NOOP); |
| 542 | intel_ring_emit(ring, MI_SET_CONTEXT); |
John Harrison | 1d719cd | 2015-05-29 17:43:52 +0100 | [diff] [blame] | 543 | intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) | |
Ben Widawsky | e80f14b | 2014-08-18 10:35:28 -0700 | [diff] [blame] | 544 | flags); |
Ville Syrjälä | 2b7e808 | 2014-01-22 21:32:43 +0200 | [diff] [blame] | 545 | /* |
| 546 | * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP |
| 547 | * WaMiSetContext_Hang:snb,ivb,vlv |
| 548 | */ |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 549 | intel_ring_emit(ring, MI_NOOP); |
| 550 | |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 551 | if (INTEL_INFO(ring->dev)->gen >= 7) { |
| 552 | if (num_rings) { |
| 553 | struct intel_engine_cs *signaller; |
| 554 | |
| 555 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings)); |
| 556 | for_each_ring(signaller, to_i915(ring->dev), i) { |
| 557 | if (signaller == ring) |
| 558 | continue; |
| 559 | |
| 560 | intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base)); |
| 561 | intel_ring_emit(ring, _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE)); |
| 562 | } |
| 563 | } |
Ben Widawsky | e37ec39 | 2012-06-04 14:42:48 -0700 | [diff] [blame] | 564 | intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE); |
Chris Wilson | 2c55018 | 2014-12-16 10:02:27 +0000 | [diff] [blame] | 565 | } |
Ben Widawsky | e37ec39 | 2012-06-04 14:42:48 -0700 | [diff] [blame] | 566 | |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 567 | intel_ring_advance(ring); |
| 568 | |
| 569 | return ret; |
| 570 | } |
| 571 | |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 572 | static inline bool should_skip_switch(struct intel_engine_cs *ring, |
| 573 | struct intel_context *from, |
| 574 | struct intel_context *to) |
| 575 | { |
Ben Widawsky | 563222a | 2015-03-19 12:53:28 +0000 | [diff] [blame] | 576 | if (to->remap_slice) |
| 577 | return false; |
| 578 | |
Daniel Vetter | 9258811 | 2015-04-14 17:35:19 +0200 | [diff] [blame] | 579 | if (to->ppgtt && from == to && |
| 580 | !(intel_ring_flag(ring) & to->ppgtt->pd_dirty_rings)) |
| 581 | return true; |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 582 | |
| 583 | return false; |
| 584 | } |
| 585 | |
| 586 | static bool |
| 587 | needs_pd_load_pre(struct intel_engine_cs *ring, struct intel_context *to) |
| 588 | { |
| 589 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
| 590 | |
| 591 | if (!to->ppgtt) |
| 592 | return false; |
| 593 | |
| 594 | if (INTEL_INFO(ring->dev)->gen < 8) |
| 595 | return true; |
| 596 | |
| 597 | if (ring != &dev_priv->ring[RCS]) |
| 598 | return true; |
| 599 | |
| 600 | return false; |
| 601 | } |
| 602 | |
| 603 | static bool |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 604 | needs_pd_load_post(struct intel_engine_cs *ring, struct intel_context *to, |
| 605 | u32 hw_flags) |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 606 | { |
| 607 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
| 608 | |
| 609 | if (!to->ppgtt) |
| 610 | return false; |
| 611 | |
| 612 | if (!IS_GEN8(ring->dev)) |
| 613 | return false; |
| 614 | |
| 615 | if (ring != &dev_priv->ring[RCS]) |
| 616 | return false; |
| 617 | |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 618 | if (hw_flags & MI_RESTORE_INHIBIT) |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 619 | return true; |
| 620 | |
| 621 | return false; |
| 622 | } |
| 623 | |
John Harrison | abd68d9 | 2015-05-29 17:43:42 +0100 | [diff] [blame] | 624 | static int do_switch(struct drm_i915_gem_request *req) |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 625 | { |
John Harrison | abd68d9 | 2015-05-29 17:43:42 +0100 | [diff] [blame] | 626 | struct intel_context *to = req->ctx; |
| 627 | struct intel_engine_cs *ring = req->ring; |
Ben Widawsky | 6f65e29 | 2013-12-06 14:10:56 -0800 | [diff] [blame] | 628 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 629 | struct intel_context *from = ring->last_context; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 630 | u32 hw_flags = 0; |
Chris Wilson | 967ab6b | 2014-05-30 14:16:30 +0100 | [diff] [blame] | 631 | bool uninitialized = false; |
Ben Widawsky | 3ccfd19 | 2013-09-18 19:03:18 -0700 | [diff] [blame] | 632 | int ret, i; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 633 | |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 634 | if (from != NULL && ring == &dev_priv->ring[RCS]) { |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 635 | BUG_ON(from->legacy_hw_ctx.rcs_state == NULL); |
| 636 | BUG_ON(!i915_gem_obj_is_pinned(from->legacy_hw_ctx.rcs_state)); |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 637 | } |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 638 | |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 639 | if (should_skip_switch(ring, from, to)) |
Chris Wilson | 9a3b530 | 2012-07-15 12:34:24 +0100 | [diff] [blame] | 640 | return 0; |
| 641 | |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 642 | /* Trying to pin first makes error handling easier. */ |
| 643 | if (ring == &dev_priv->ring[RCS]) { |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 644 | ret = i915_gem_obj_ggtt_pin(to->legacy_hw_ctx.rcs_state, |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 645 | get_context_alignment(ring->dev), 0); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 646 | if (ret) |
| 647 | return ret; |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 648 | } |
| 649 | |
Daniel Vetter | acc240d | 2013-12-05 15:42:34 +0100 | [diff] [blame] | 650 | /* |
| 651 | * Pin can switch back to the default context if we end up calling into |
| 652 | * evict_everything - as a last ditch gtt defrag effort that also |
| 653 | * switches to the default context. Hence we need to reload from here. |
| 654 | */ |
| 655 | from = ring->last_context; |
| 656 | |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 657 | if (needs_pd_load_pre(ring, to)) { |
| 658 | /* Older GENs and non render rings still want the load first, |
| 659 | * "PP_DCLV followed by PP_DIR_BASE register through Load |
| 660 | * Register Immediate commands in Ring Buffer before submitting |
| 661 | * a context."*/ |
Daniele Ceraolo Spurio | 198c974 | 2014-11-10 13:44:31 +0000 | [diff] [blame] | 662 | trace_switch_mm(ring, to); |
John Harrison | e85b26d | 2015-05-29 17:43:56 +0100 | [diff] [blame] | 663 | ret = to->ppgtt->switch_mm(to->ppgtt, req); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 664 | if (ret) |
| 665 | goto unpin_out; |
Ben Widawsky | 563222a | 2015-03-19 12:53:28 +0000 | [diff] [blame] | 666 | |
| 667 | /* Doing a PD load always reloads the page dirs */ |
Daniel Vetter | 9258811 | 2015-04-14 17:35:19 +0200 | [diff] [blame] | 668 | to->ppgtt->pd_dirty_rings &= ~intel_ring_flag(ring); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 669 | } |
| 670 | |
| 671 | if (ring != &dev_priv->ring[RCS]) { |
| 672 | if (from) |
| 673 | i915_gem_context_unreference(from); |
| 674 | goto done; |
| 675 | } |
| 676 | |
Daniel Vetter | acc240d | 2013-12-05 15:42:34 +0100 | [diff] [blame] | 677 | /* |
| 678 | * Clear this page out of any CPU caches for coherent swap-in/out. Note |
Chris Wilson | d3373a2 | 2012-07-15 12:34:22 +0100 | [diff] [blame] | 679 | * that thanks to write = false in this call and us not setting any gpu |
| 680 | * write domains when putting a context object onto the active list |
| 681 | * (when switching away from it), this won't block. |
Daniel Vetter | acc240d | 2013-12-05 15:42:34 +0100 | [diff] [blame] | 682 | * |
| 683 | * XXX: We need a real interface to do this instead of trickery. |
| 684 | */ |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 685 | ret = i915_gem_object_set_to_gtt_domain(to->legacy_hw_ctx.rcs_state, false); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 686 | if (ret) |
| 687 | goto unpin_out; |
Chris Wilson | d3373a2 | 2012-07-15 12:34:22 +0100 | [diff] [blame] | 688 | |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 689 | if (!to->legacy_hw_ctx.initialized) { |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 690 | hw_flags |= MI_RESTORE_INHIBIT; |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 691 | /* NB: If we inhibit the restore, the context is not allowed to |
| 692 | * die because future work may end up depending on valid address |
| 693 | * space. This means we must enforce that a page table load |
| 694 | * occur when this occurs. */ |
| 695 | } else if (to->ppgtt && |
Daniel Vetter | 9258811 | 2015-04-14 17:35:19 +0200 | [diff] [blame] | 696 | (intel_ring_flag(ring) & to->ppgtt->pd_dirty_rings)) { |
Ben Widawsky | 563222a | 2015-03-19 12:53:28 +0000 | [diff] [blame] | 697 | hw_flags |= MI_FORCE_RESTORE; |
Daniel Vetter | 9258811 | 2015-04-14 17:35:19 +0200 | [diff] [blame] | 698 | to->ppgtt->pd_dirty_rings &= ~intel_ring_flag(ring); |
| 699 | } |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 700 | |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 701 | /* We should never emit switch_mm more than once */ |
| 702 | WARN_ON(needs_pd_load_pre(ring, to) && |
Daniel Vetter | 9258811 | 2015-04-14 17:35:19 +0200 | [diff] [blame] | 703 | needs_pd_load_post(ring, to, hw_flags)); |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 704 | |
John Harrison | 1d719cd | 2015-05-29 17:43:52 +0100 | [diff] [blame] | 705 | ret = mi_set_context(req, hw_flags); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 706 | if (ret) |
| 707 | goto unpin_out; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 708 | |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 709 | /* GEN8 does *not* require an explicit reload if the PDPs have been |
| 710 | * setup, and we do not wish to move them. |
| 711 | */ |
| 712 | if (needs_pd_load_post(ring, to, hw_flags)) { |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 713 | trace_switch_mm(ring, to); |
John Harrison | e85b26d | 2015-05-29 17:43:56 +0100 | [diff] [blame] | 714 | ret = to->ppgtt->switch_mm(to->ppgtt, req); |
Ben Widawsky | 317b4e9 | 2015-03-16 16:00:55 +0000 | [diff] [blame] | 715 | /* The hardware context switch is emitted, but we haven't |
| 716 | * actually changed the state - so it's probably safe to bail |
| 717 | * here. Still, let the user know something dangerous has |
| 718 | * happened. |
| 719 | */ |
| 720 | if (ret) { |
| 721 | DRM_ERROR("Failed to change address space on context switch\n"); |
| 722 | goto unpin_out; |
| 723 | } |
| 724 | } |
| 725 | |
Ben Widawsky | 3ccfd19 | 2013-09-18 19:03:18 -0700 | [diff] [blame] | 726 | for (i = 0; i < MAX_L3_SLICES; i++) { |
| 727 | if (!(to->remap_slice & (1<<i))) |
| 728 | continue; |
| 729 | |
John Harrison | 6909a66 | 2015-05-29 17:43:51 +0100 | [diff] [blame] | 730 | ret = i915_gem_l3_remap(req, i); |
Ben Widawsky | 3ccfd19 | 2013-09-18 19:03:18 -0700 | [diff] [blame] | 731 | /* If it failed, try again next round */ |
| 732 | if (ret) |
| 733 | DRM_DEBUG_DRIVER("L3 remapping failed\n"); |
| 734 | else |
| 735 | to->remap_slice &= ~(1<<i); |
| 736 | } |
| 737 | |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 738 | /* The backing object for the context is done after switching to the |
| 739 | * *next* context. Therefore we cannot retire the previous context until |
| 740 | * the next context has already started running. In fact, the below code |
| 741 | * is a bit suboptimal because the retiring can occur simply after the |
| 742 | * MI_SET_CONTEXT instead of when the next seqno has completed. |
| 743 | */ |
Chris Wilson | 112522f | 2013-05-02 16:48:07 +0300 | [diff] [blame] | 744 | if (from != NULL) { |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 745 | from->legacy_hw_ctx.rcs_state->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION; |
John Harrison | b2af037 | 2015-05-29 17:43:50 +0100 | [diff] [blame] | 746 | i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), req); |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 747 | /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the |
| 748 | * whole damn pipeline, we don't need to explicitly mark the |
| 749 | * object dirty. The only exception is that the context must be |
| 750 | * correct in case the object gets swapped out. Ideally we'd be |
| 751 | * able to defer doing this until we know the object would be |
| 752 | * swapped, but there is no way to do that yet. |
| 753 | */ |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 754 | from->legacy_hw_ctx.rcs_state->dirty = 1; |
Chris Wilson | b259b31 | 2012-07-15 12:34:23 +0100 | [diff] [blame] | 755 | |
Chris Wilson | c0321e2 | 2013-08-26 19:50:53 -0300 | [diff] [blame] | 756 | /* obj is kept alive until the next request by its active ref */ |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 757 | i915_gem_object_ggtt_unpin(from->legacy_hw_ctx.rcs_state); |
Chris Wilson | 112522f | 2013-05-02 16:48:07 +0300 | [diff] [blame] | 758 | i915_gem_context_unreference(from); |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 759 | } |
| 760 | |
Ben Widawsky | 6702cf1 | 2015-03-16 16:00:58 +0000 | [diff] [blame] | 761 | uninitialized = !to->legacy_hw_ctx.initialized; |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 762 | to->legacy_hw_ctx.initialized = true; |
Chris Wilson | 967ab6b | 2014-05-30 14:16:30 +0100 | [diff] [blame] | 763 | |
Ben Widawsky | 67e3d297 | 2013-12-06 14:11:01 -0800 | [diff] [blame] | 764 | done: |
Chris Wilson | 112522f | 2013-05-02 16:48:07 +0300 | [diff] [blame] | 765 | i915_gem_context_reference(to); |
| 766 | ring->last_context = to; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 767 | |
Chris Wilson | 967ab6b | 2014-05-30 14:16:30 +0100 | [diff] [blame] | 768 | if (uninitialized) { |
Arun Siluvery | 86d7f23 | 2014-08-26 14:44:50 +0100 | [diff] [blame] | 769 | if (ring->init_context) { |
John Harrison | 8753181 | 2015-05-29 17:43:44 +0100 | [diff] [blame] | 770 | ret = ring->init_context(req); |
Arun Siluvery | 86d7f23 | 2014-08-26 14:44:50 +0100 | [diff] [blame] | 771 | if (ret) |
| 772 | DRM_ERROR("ring init context: %d\n", ret); |
| 773 | } |
Mika Kuoppala | 46470fc9 | 2014-05-21 19:01:06 +0300 | [diff] [blame] | 774 | } |
| 775 | |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 776 | return 0; |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 777 | |
| 778 | unpin_out: |
| 779 | if (ring->id == RCS) |
Oscar Mateo | ea0c76f | 2014-07-03 16:27:59 +0100 | [diff] [blame] | 780 | i915_gem_object_ggtt_unpin(to->legacy_hw_ctx.rcs_state); |
Ben Widawsky | 7e0d96b | 2013-12-06 14:11:26 -0800 | [diff] [blame] | 781 | return ret; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | /** |
| 785 | * i915_switch_context() - perform a GPU context switch. |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 786 | * @req: request for which we'll execute the context switch |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 787 | * |
| 788 | * The context life cycle is simple. The context refcount is incremented and |
| 789 | * decremented by 1 and create and destroy. If the context is in use by the GPU, |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 790 | * it will have a refcount > 1. This allows us to destroy the context abstract |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 791 | * object while letting the normal object tracking destroy the backing BO. |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 792 | * |
| 793 | * This function should not be used in execlists mode. Instead the context is |
| 794 | * switched by writing to the ELSP and requests keep a reference to their |
| 795 | * context. |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 796 | */ |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 797 | int i915_switch_context(struct drm_i915_gem_request *req) |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 798 | { |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 799 | struct intel_engine_cs *ring = req->ring; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 800 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 801 | |
Thomas Daniel | ecdb5fd | 2014-08-20 16:29:24 +0100 | [diff] [blame] | 802 | WARN_ON(i915.enable_execlists); |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 803 | WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
| 804 | |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 805 | if (req->ctx->legacy_hw_ctx.rcs_state == NULL) { /* We have the fake context */ |
| 806 | if (req->ctx != ring->last_context) { |
| 807 | i915_gem_context_reference(req->ctx); |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 808 | if (ring->last_context) |
| 809 | i915_gem_context_unreference(ring->last_context); |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 810 | ring->last_context = req->ctx; |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 811 | } |
Ben Widawsky | c482972 | 2013-12-06 14:11:20 -0800 | [diff] [blame] | 812 | return 0; |
Mika Kuoppala | a95f6a0 | 2014-03-14 16:22:10 +0200 | [diff] [blame] | 813 | } |
Ben Widawsky | c482972 | 2013-12-06 14:11:20 -0800 | [diff] [blame] | 814 | |
John Harrison | abd68d9 | 2015-05-29 17:43:42 +0100 | [diff] [blame] | 815 | return do_switch(req); |
Ben Widawsky | e055684 | 2012-06-04 14:42:46 -0700 | [diff] [blame] | 816 | } |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 817 | |
Oscar Mateo | ec3e996 | 2014-07-24 17:04:18 +0100 | [diff] [blame] | 818 | static bool contexts_enabled(struct drm_device *dev) |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 819 | { |
Oscar Mateo | ec3e996 | 2014-07-24 17:04:18 +0100 | [diff] [blame] | 820 | return i915.enable_execlists || to_i915(dev)->hw_context_size; |
Chris Wilson | 691e641 | 2014-04-09 09:07:36 +0100 | [diff] [blame] | 821 | } |
| 822 | |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 823 | int i915_gem_context_create_ioctl(struct drm_device *dev, void *data, |
| 824 | struct drm_file *file) |
| 825 | { |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 826 | struct drm_i915_gem_context_create *args = data; |
| 827 | struct drm_i915_file_private *file_priv = file->driver_priv; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 828 | struct intel_context *ctx; |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 829 | int ret; |
| 830 | |
Oscar Mateo | ec3e996 | 2014-07-24 17:04:18 +0100 | [diff] [blame] | 831 | if (!contexts_enabled(dev)) |
Daniel Vetter | 5fa8be6 | 2012-06-19 17:16:01 +0200 | [diff] [blame] | 832 | return -ENODEV; |
| 833 | |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 834 | ret = i915_mutex_lock_interruptible(dev); |
| 835 | if (ret) |
| 836 | return ret; |
| 837 | |
Daniel Vetter | d624d86 | 2014-08-06 15:04:54 +0200 | [diff] [blame] | 838 | ctx = i915_gem_create_context(dev, file_priv); |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 839 | mutex_unlock(&dev->struct_mutex); |
Dan Carpenter | be63638 | 2012-07-17 09:44:49 +0300 | [diff] [blame] | 840 | if (IS_ERR(ctx)) |
| 841 | return PTR_ERR(ctx); |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 842 | |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 843 | args->ctx_id = ctx->user_handle; |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 844 | DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id); |
| 845 | |
Dan Carpenter | be63638 | 2012-07-17 09:44:49 +0300 | [diff] [blame] | 846 | return 0; |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 847 | } |
| 848 | |
| 849 | int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data, |
| 850 | struct drm_file *file) |
| 851 | { |
| 852 | struct drm_i915_gem_context_destroy *args = data; |
| 853 | struct drm_i915_file_private *file_priv = file->driver_priv; |
Oscar Mateo | 273497e | 2014-05-22 14:13:37 +0100 | [diff] [blame] | 854 | struct intel_context *ctx; |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 855 | int ret; |
| 856 | |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 857 | if (args->ctx_id == DEFAULT_CONTEXT_HANDLE) |
Ben Widawsky | c2cf241 | 2013-12-24 16:02:54 -0800 | [diff] [blame] | 858 | return -ENOENT; |
Ben Widawsky | 0eea67e | 2013-12-06 14:11:19 -0800 | [diff] [blame] | 859 | |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 860 | ret = i915_mutex_lock_interruptible(dev); |
| 861 | if (ret) |
| 862 | return ret; |
| 863 | |
| 864 | ctx = i915_gem_context_get(file_priv, args->ctx_id); |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 865 | if (IS_ERR(ctx)) { |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 866 | mutex_unlock(&dev->struct_mutex); |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 867 | return PTR_ERR(ctx); |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 868 | } |
| 869 | |
Oscar Mateo | 821d66d | 2014-07-03 16:28:00 +0100 | [diff] [blame] | 870 | idr_remove(&ctx->file_priv->context_idr, ctx->user_handle); |
Mika Kuoppala | dce3271 | 2013-04-30 13:30:33 +0300 | [diff] [blame] | 871 | i915_gem_context_unreference(ctx); |
Ben Widawsky | 8462481 | 2012-06-04 14:42:54 -0700 | [diff] [blame] | 872 | mutex_unlock(&dev->struct_mutex); |
| 873 | |
| 874 | DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id); |
| 875 | return 0; |
| 876 | } |
Chris Wilson | c9dc0f3 | 2014-12-24 08:13:40 -0800 | [diff] [blame] | 877 | |
| 878 | int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data, |
| 879 | struct drm_file *file) |
| 880 | { |
| 881 | struct drm_i915_file_private *file_priv = file->driver_priv; |
| 882 | struct drm_i915_gem_context_param *args = data; |
| 883 | struct intel_context *ctx; |
| 884 | int ret; |
| 885 | |
| 886 | ret = i915_mutex_lock_interruptible(dev); |
| 887 | if (ret) |
| 888 | return ret; |
| 889 | |
| 890 | ctx = i915_gem_context_get(file_priv, args->ctx_id); |
| 891 | if (IS_ERR(ctx)) { |
| 892 | mutex_unlock(&dev->struct_mutex); |
| 893 | return PTR_ERR(ctx); |
| 894 | } |
| 895 | |
| 896 | args->size = 0; |
| 897 | switch (args->param) { |
| 898 | case I915_CONTEXT_PARAM_BAN_PERIOD: |
| 899 | args->value = ctx->hang_stats.ban_period_seconds; |
| 900 | break; |
David Weinehall | b1b3827 | 2015-05-20 17:00:13 +0300 | [diff] [blame] | 901 | case I915_CONTEXT_PARAM_NO_ZEROMAP: |
| 902 | args->value = ctx->flags & CONTEXT_NO_ZEROMAP; |
| 903 | break; |
Chris Wilson | c9dc0f3 | 2014-12-24 08:13:40 -0800 | [diff] [blame] | 904 | default: |
| 905 | ret = -EINVAL; |
| 906 | break; |
| 907 | } |
| 908 | mutex_unlock(&dev->struct_mutex); |
| 909 | |
| 910 | return ret; |
| 911 | } |
| 912 | |
| 913 | int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data, |
| 914 | struct drm_file *file) |
| 915 | { |
| 916 | struct drm_i915_file_private *file_priv = file->driver_priv; |
| 917 | struct drm_i915_gem_context_param *args = data; |
| 918 | struct intel_context *ctx; |
| 919 | int ret; |
| 920 | |
| 921 | ret = i915_mutex_lock_interruptible(dev); |
| 922 | if (ret) |
| 923 | return ret; |
| 924 | |
| 925 | ctx = i915_gem_context_get(file_priv, args->ctx_id); |
| 926 | if (IS_ERR(ctx)) { |
| 927 | mutex_unlock(&dev->struct_mutex); |
| 928 | return PTR_ERR(ctx); |
| 929 | } |
| 930 | |
| 931 | switch (args->param) { |
| 932 | case I915_CONTEXT_PARAM_BAN_PERIOD: |
| 933 | if (args->size) |
| 934 | ret = -EINVAL; |
| 935 | else if (args->value < ctx->hang_stats.ban_period_seconds && |
| 936 | !capable(CAP_SYS_ADMIN)) |
| 937 | ret = -EPERM; |
| 938 | else |
| 939 | ctx->hang_stats.ban_period_seconds = args->value; |
| 940 | break; |
David Weinehall | b1b3827 | 2015-05-20 17:00:13 +0300 | [diff] [blame] | 941 | case I915_CONTEXT_PARAM_NO_ZEROMAP: |
| 942 | if (args->size) { |
| 943 | ret = -EINVAL; |
| 944 | } else { |
| 945 | ctx->flags &= ~CONTEXT_NO_ZEROMAP; |
| 946 | ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0; |
| 947 | } |
| 948 | break; |
Chris Wilson | c9dc0f3 | 2014-12-24 08:13:40 -0800 | [diff] [blame] | 949 | default: |
| 950 | ret = -EINVAL; |
| 951 | break; |
| 952 | } |
| 953 | mutex_unlock(&dev->struct_mutex); |
| 954 | |
| 955 | return ret; |
| 956 | } |