blob: a5ddf3bce9c3fe06e3338b8b1c15e86405f312df [file] [log] [blame]
Ben Widawsky254f9652012-06-04 14:42:42 -07001/*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28/*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
Damien Lespiau508842a2013-08-30 14:40:26 +010076 * GPU. The GPU has loaded its state already and has stored away the gtt
Ben Widawsky254f9652012-06-04 14:42:42 -070077 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
David Howells760285e2012-10-02 18:01:07 +010088#include <drm/drmP.h>
89#include <drm/i915_drm.h>
Ben Widawsky254f9652012-06-04 14:42:42 -070090#include "i915_drv.h"
91
Ben Widawsky40521052012-06-04 14:42:43 -070092/* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
Ben Widawskyb731d332013-12-06 14:10:59 -080096#define GEN6_CONTEXT_ALIGN (64<<10)
97#define GEN7_CONTEXT_ALIGN 4096
Ben Widawsky40521052012-06-04 14:42:43 -070098
Ben Widawskyb18b6bd2014-02-20 11:47:07 -080099static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
Ben Widawsky321f2ad2014-02-20 11:47:06 -0800100{
Ben Widawsky321f2ad2014-02-20 11:47:06 -0800101 struct drm_device *dev = ppgtt->base.dev;
102 struct drm_i915_private *dev_priv = dev->dev_private;
103 struct i915_address_space *vm = &ppgtt->base;
104
105 if (ppgtt == dev_priv->mm.aliasing_ppgtt ||
106 (list_empty(&vm->active_list) && list_empty(&vm->inactive_list))) {
107 ppgtt->base.cleanup(&ppgtt->base);
108 return;
109 }
110
111 /*
112 * Make sure vmas are unbound before we take down the drm_mm
113 *
114 * FIXME: Proper refcounting should take care of this, this shouldn't be
115 * needed at all.
116 */
117 if (!list_empty(&vm->active_list)) {
118 struct i915_vma *vma;
119
120 list_for_each_entry(vma, &vm->active_list, mm_list)
121 if (WARN_ON(list_empty(&vma->vma_link) ||
122 list_is_singular(&vma->vma_link)))
123 break;
124
125 i915_gem_evict_vm(&ppgtt->base, true);
126 } else {
127 i915_gem_retire_requests(dev);
128 i915_gem_evict_vm(&ppgtt->base, false);
129 }
130
131 ppgtt->base.cleanup(&ppgtt->base);
132}
133
Ben Widawskyb18b6bd2014-02-20 11:47:07 -0800134static void ppgtt_release(struct kref *kref)
135{
136 struct i915_hw_ppgtt *ppgtt =
137 container_of(kref, struct i915_hw_ppgtt, ref);
138
139 do_ppgtt_cleanup(ppgtt);
140 kfree(ppgtt);
141}
142
Ben Widawskyb731d332013-12-06 14:10:59 -0800143static size_t get_context_alignment(struct drm_device *dev)
144{
145 if (IS_GEN6(dev))
146 return GEN6_CONTEXT_ALIGN;
147
148 return GEN7_CONTEXT_ALIGN;
149}
150
Ben Widawsky254f9652012-06-04 14:42:42 -0700151static int get_context_size(struct drm_device *dev)
152{
153 struct drm_i915_private *dev_priv = dev->dev_private;
154 int ret;
155 u32 reg;
156
157 switch (INTEL_INFO(dev)->gen) {
158 case 6:
159 reg = I915_READ(CXT_SIZE);
160 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
161 break;
162 case 7:
Ben Widawsky4f91dd62012-07-18 10:10:09 -0700163 reg = I915_READ(GEN7_CXT_SIZE);
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700164 if (IS_HASWELL(dev))
Ben Widawskya0de80a2013-06-25 21:53:40 -0700165 ret = HSW_CXT_TOTAL_SIZE;
Ben Widawsky2e4291e2012-07-24 20:47:30 -0700166 else
167 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
Ben Widawsky254f9652012-06-04 14:42:42 -0700168 break;
Ben Widawsky88976442013-11-02 21:07:05 -0700169 case 8:
170 ret = GEN8_CXT_TOTAL_SIZE;
171 break;
Ben Widawsky254f9652012-06-04 14:42:42 -0700172 default:
173 BUG();
174 }
175
176 return ret;
177}
178
Mika Kuoppaladce32712013-04-30 13:30:33 +0300179void i915_gem_context_free(struct kref *ctx_ref)
Ben Widawsky40521052012-06-04 14:42:43 -0700180{
Oscar Mateo273497e2014-05-22 14:13:37 +0100181 struct intel_context *ctx = container_of(ctx_ref,
Mika Kuoppaladce32712013-04-30 13:30:33 +0300182 typeof(*ctx), ref);
Ben Widawskyc7c48df2013-12-06 14:11:15 -0800183 struct i915_hw_ppgtt *ppgtt = NULL;
Ben Widawsky40521052012-06-04 14:42:43 -0700184
Chris Wilson691e6412014-04-09 09:07:36 +0100185 if (ctx->obj) {
186 /* We refcount even the aliasing PPGTT to keep the code symmetric */
187 if (USES_PPGTT(ctx->obj->base.dev))
188 ppgtt = ctx_to_ppgtt(ctx);
Ben Widawskyc7c48df2013-12-06 14:11:15 -0800189
Chris Wilson691e6412014-04-09 09:07:36 +0100190 /* XXX: Free up the object before tearing down the address space, in
191 * case we're bound in the PPGTT */
192 drm_gem_object_unreference(&ctx->obj->base);
193 }
Ben Widawskyc7c48df2013-12-06 14:11:15 -0800194
195 if (ppgtt)
196 kref_put(&ppgtt->ref, ppgtt_release);
197 list_del(&ctx->link);
Ben Widawsky40521052012-06-04 14:42:43 -0700198 kfree(ctx);
199}
200
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800201static struct i915_hw_ppgtt *
Oscar Mateo273497e2014-05-22 14:13:37 +0100202create_vm_for_ctx(struct drm_device *dev, struct intel_context *ctx)
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800203{
204 struct i915_hw_ppgtt *ppgtt;
205 int ret;
206
207 ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
208 if (!ppgtt)
209 return ERR_PTR(-ENOMEM);
210
211 ret = i915_gem_init_ppgtt(dev, ppgtt);
212 if (ret) {
213 kfree(ppgtt);
214 return ERR_PTR(ret);
215 }
216
Chris Wilson6313c202014-03-19 13:45:45 +0000217 ppgtt->ctx = ctx;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800218 return ppgtt;
219}
220
Oscar Mateo273497e2014-05-22 14:13:37 +0100221static struct intel_context *
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800222__create_hw_context(struct drm_device *dev,
Ben Widawsky146937e2012-06-29 10:30:39 -0700223 struct drm_i915_file_private *file_priv)
Ben Widawsky40521052012-06-04 14:42:43 -0700224{
225 struct drm_i915_private *dev_priv = dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100226 struct intel_context *ctx;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800227 int ret;
Ben Widawsky40521052012-06-04 14:42:43 -0700228
Ben Widawskyf94982b2012-11-10 10:56:04 -0800229 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
Ben Widawsky146937e2012-06-29 10:30:39 -0700230 if (ctx == NULL)
231 return ERR_PTR(-ENOMEM);
Ben Widawsky40521052012-06-04 14:42:43 -0700232
Mika Kuoppaladce32712013-04-30 13:30:33 +0300233 kref_init(&ctx->ref);
Ben Widawskya33afea2013-09-17 21:12:45 -0700234 list_add_tail(&ctx->link, &dev_priv->context_list);
Ben Widawsky40521052012-06-04 14:42:43 -0700235
Chris Wilson691e6412014-04-09 09:07:36 +0100236 if (dev_priv->hw_context_size) {
237 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
238 if (ctx->obj == NULL) {
239 ret = -ENOMEM;
240 goto err_out;
241 }
Ben Widawsky40521052012-06-04 14:42:43 -0700242
Dave Airlie885ac042014-05-01 09:11:37 +1000243 /*
244 * Try to make the context utilize L3 as well as LLC.
245 *
246 * On VLV we don't have L3 controls in the PTEs so we
247 * shouldn't touch the cache level, especially as that
248 * would make the object snooped which might have a
249 * negative performance impact.
250 */
251 if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
Chris Wilson691e6412014-04-09 09:07:36 +0100252 ret = i915_gem_object_set_cache_level(ctx->obj,
253 I915_CACHE_L3_LLC);
254 /* Failure shouldn't ever happen this early */
255 if (WARN_ON(ret))
256 goto err_out;
257 }
258 }
259
260 /* Default context will never have a file_priv */
261 if (file_priv != NULL) {
262 ret = idr_alloc(&file_priv->context_idr, ctx,
263 DEFAULT_CONTEXT_ID, 0, GFP_KERNEL);
264 if (ret < 0)
265 goto err_out;
266 } else
267 ret = DEFAULT_CONTEXT_ID;
Mika Kuoppaladce32712013-04-30 13:30:33 +0300268
269 ctx->file_priv = file_priv;
Tejun Heoc8c470a2013-02-27 17:04:10 -0800270 ctx->id = ret;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700271 /* NB: Mark all slices as needing a remap so that when the context first
272 * loads it will restore whatever remap state already exists. If there
273 * is no remap info, it will be a NOP. */
274 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
Ben Widawsky40521052012-06-04 14:42:43 -0700275
Ben Widawsky146937e2012-06-29 10:30:39 -0700276 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700277
278err_out:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300279 i915_gem_context_unreference(ctx);
Ben Widawsky146937e2012-06-29 10:30:39 -0700280 return ERR_PTR(ret);
Ben Widawsky40521052012-06-04 14:42:43 -0700281}
282
Ben Widawsky254f9652012-06-04 14:42:42 -0700283/**
284 * The default context needs to exist per ring that uses contexts. It stores the
285 * context state of the GPU for applications that don't utilize HW contexts, as
286 * well as an idle case.
287 */
Oscar Mateo273497e2014-05-22 14:13:37 +0100288static struct intel_context *
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800289i915_gem_create_context(struct drm_device *dev,
290 struct drm_i915_file_private *file_priv,
291 bool create_vm)
Ben Widawsky254f9652012-06-04 14:42:42 -0700292{
Chris Wilson42c3b602014-01-23 19:40:02 +0000293 const bool is_global_default_ctx = file_priv == NULL;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800294 struct drm_i915_private *dev_priv = dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100295 struct intel_context *ctx;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800296 int ret = 0;
Ben Widawsky40521052012-06-04 14:42:43 -0700297
Ben Widawskyb731d332013-12-06 14:10:59 -0800298 BUG_ON(!mutex_is_locked(&dev->struct_mutex));
Ben Widawsky40521052012-06-04 14:42:43 -0700299
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800300 ctx = __create_hw_context(dev, file_priv);
Ben Widawsky146937e2012-06-29 10:30:39 -0700301 if (IS_ERR(ctx))
Ben Widawskya45d0f62013-12-06 14:11:05 -0800302 return ctx;
Ben Widawsky40521052012-06-04 14:42:43 -0700303
Chris Wilson691e6412014-04-09 09:07:36 +0100304 if (is_global_default_ctx && ctx->obj) {
Chris Wilson42c3b602014-01-23 19:40:02 +0000305 /* We may need to do things with the shrinker which
306 * require us to immediately switch back to the default
307 * context. This can cause a problem as pinning the
308 * default context also requires GTT space which may not
309 * be available. To avoid this we always pin the default
310 * context.
311 */
312 ret = i915_gem_obj_ggtt_pin(ctx->obj,
Daniel Vetter1ec9e262014-02-14 14:01:11 +0100313 get_context_alignment(dev), 0);
Chris Wilson42c3b602014-01-23 19:40:02 +0000314 if (ret) {
315 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
316 goto err_destroy;
317 }
318 }
319
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800320 if (create_vm) {
321 struct i915_hw_ppgtt *ppgtt = create_vm_for_ctx(dev, ctx);
322
323 if (IS_ERR_OR_NULL(ppgtt)) {
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800324 DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
325 PTR_ERR(ppgtt));
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800326 ret = PTR_ERR(ppgtt);
Chris Wilson42c3b602014-01-23 19:40:02 +0000327 goto err_unpin;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800328 } else
329 ctx->vm = &ppgtt->base;
330
331 /* This case is reserved for the global default context and
332 * should only happen once. */
Chris Wilson42c3b602014-01-23 19:40:02 +0000333 if (is_global_default_ctx) {
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800334 if (WARN_ON(dev_priv->mm.aliasing_ppgtt)) {
335 ret = -EEXIST;
Chris Wilson42c3b602014-01-23 19:40:02 +0000336 goto err_unpin;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800337 }
338
339 dev_priv->mm.aliasing_ppgtt = ppgtt;
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800340 }
Ben Widawskyc5dc5ce2014-01-27 23:07:00 -0800341 } else if (USES_PPGTT(dev)) {
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800342 /* For platforms which only have aliasing PPGTT, we fake the
343 * address space and refcounting. */
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800344 ctx->vm = &dev_priv->mm.aliasing_ppgtt->base;
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800345 kref_get(&dev_priv->mm.aliasing_ppgtt->ref);
346 } else
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800347 ctx->vm = &dev_priv->gtt.base;
348
Ben Widawskya45d0f62013-12-06 14:11:05 -0800349 return ctx;
Chris Wilson9a3b5302012-07-15 12:34:24 +0100350
Chris Wilson42c3b602014-01-23 19:40:02 +0000351err_unpin:
Chris Wilson691e6412014-04-09 09:07:36 +0100352 if (is_global_default_ctx && ctx->obj)
Chris Wilson42c3b602014-01-23 19:40:02 +0000353 i915_gem_object_ggtt_unpin(ctx->obj);
Chris Wilson9a3b5302012-07-15 12:34:24 +0100354err_destroy:
Mika Kuoppaladce32712013-04-30 13:30:33 +0300355 i915_gem_context_unreference(ctx);
Ben Widawskya45d0f62013-12-06 14:11:05 -0800356 return ERR_PTR(ret);
Ben Widawsky254f9652012-06-04 14:42:42 -0700357}
358
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800359void i915_gem_context_reset(struct drm_device *dev)
360{
361 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800362 int i;
363
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800364 /* Prevent the hardware from restoring the last context (which hung) on
365 * the next switch */
366 for (i = 0; i < I915_NUM_RINGS; i++) {
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100367 struct intel_engine_cs *ring = &dev_priv->ring[i];
Oscar Mateo273497e2014-05-22 14:13:37 +0100368 struct intel_context *dctx = ring->default_context;
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800369
370 /* Do a fake switch to the default context */
Chris Wilson691e6412014-04-09 09:07:36 +0100371 if (ring->last_context == dctx)
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800372 continue;
373
374 if (!ring->last_context)
375 continue;
376
Chris Wilson691e6412014-04-09 09:07:36 +0100377 if (dctx->obj && i == RCS) {
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800378 WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj,
Daniel Vetter1ec9e262014-02-14 14:01:11 +0100379 get_context_alignment(dev), 0));
Ben Widawskyacce9ff2013-12-06 14:11:03 -0800380 /* Fake a finish/inactive */
381 dctx->obj->base.write_domain = 0;
382 dctx->obj->active = 0;
383 }
384
385 i915_gem_context_unreference(ring->last_context);
386 i915_gem_context_reference(dctx);
387 ring->last_context = dctx;
388 }
389}
390
Ben Widawsky8245be32013-11-06 13:56:29 -0200391int i915_gem_context_init(struct drm_device *dev)
Ben Widawsky254f9652012-06-04 14:42:42 -0700392{
393 struct drm_i915_private *dev_priv = dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100394 struct intel_context *ctx;
Ben Widawskya45d0f62013-12-06 14:11:05 -0800395 int i;
Ben Widawsky254f9652012-06-04 14:42:42 -0700396
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800397 /* Init should only be called once per module load. Eventually the
398 * restriction on the context_disabled check can be loosened. */
399 if (WARN_ON(dev_priv->ring[RCS].default_context))
Ben Widawsky8245be32013-11-06 13:56:29 -0200400 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700401
Chris Wilson691e6412014-04-09 09:07:36 +0100402 if (HAS_HW_CONTEXTS(dev)) {
403 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
404 if (dev_priv->hw_context_size > (1<<20)) {
405 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size %d\n",
406 dev_priv->hw_context_size);
407 dev_priv->hw_context_size = 0;
408 }
Ben Widawsky254f9652012-06-04 14:42:42 -0700409 }
410
Chris Wilson691e6412014-04-09 09:07:36 +0100411 ctx = i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
412 if (IS_ERR(ctx)) {
413 DRM_ERROR("Failed to create default global context (error %ld)\n",
414 PTR_ERR(ctx));
415 return PTR_ERR(ctx);
Ben Widawsky254f9652012-06-04 14:42:42 -0700416 }
417
Chris Wilson691e6412014-04-09 09:07:36 +0100418 /* NB: RCS will hold a ref for all rings */
419 for (i = 0; i < I915_NUM_RINGS; i++)
420 dev_priv->ring[i].default_context = ctx;
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800421
Chris Wilson691e6412014-04-09 09:07:36 +0100422 DRM_DEBUG_DRIVER("%s context support initialized\n", dev_priv->hw_context_size ? "HW" : "fake");
Ben Widawsky8245be32013-11-06 13:56:29 -0200423 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700424}
425
426void i915_gem_context_fini(struct drm_device *dev)
427{
428 struct drm_i915_private *dev_priv = dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100429 struct intel_context *dctx = dev_priv->ring[RCS].default_context;
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800430 int i;
Ben Widawsky254f9652012-06-04 14:42:42 -0700431
Chris Wilson691e6412014-04-09 09:07:36 +0100432 if (dctx->obj) {
433 /* The only known way to stop the gpu from accessing the hw context is
434 * to reset it. Do this as the very last operation to avoid confusing
435 * other code, leading to spurious errors. */
436 intel_gpu_reset(dev);
Ben Widawsky40521052012-06-04 14:42:43 -0700437
Chris Wilson691e6412014-04-09 09:07:36 +0100438 /* When default context is created and switched to, base object refcount
439 * will be 2 (+1 from object creation and +1 from do_switch()).
440 * i915_gem_context_fini() will be called after gpu_idle() has switched
441 * to default context. So we need to unreference the base object once
442 * to offset the do_switch part, so that i915_gem_context_unreference()
443 * can then free the base object correctly. */
444 WARN_ON(!dev_priv->ring[RCS].last_context);
445 if (dev_priv->ring[RCS].last_context == dctx) {
446 /* Fake switch to NULL context */
447 WARN_ON(dctx->obj->active);
448 i915_gem_object_ggtt_unpin(dctx->obj);
449 i915_gem_context_unreference(dctx);
450 dev_priv->ring[RCS].last_context = NULL;
451 }
Chris Wilsond3b448d2014-05-16 18:59:00 +0100452
453 i915_gem_object_ggtt_unpin(dctx->obj);
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800454 }
455
456 for (i = 0; i < I915_NUM_RINGS; i++) {
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100457 struct intel_engine_cs *ring = &dev_priv->ring[i];
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800458
459 if (ring->last_context)
460 i915_gem_context_unreference(ring->last_context);
461
462 ring->default_context = NULL;
Ben Widawsky0009e462013-12-06 14:11:02 -0800463 ring->last_context = NULL;
Ben Widawsky71b76d02013-10-14 10:01:37 -0700464 }
465
Mika Kuoppaladce32712013-04-30 13:30:33 +0300466 i915_gem_context_unreference(dctx);
Ben Widawsky254f9652012-06-04 14:42:42 -0700467}
468
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800469int i915_gem_context_enable(struct drm_i915_private *dev_priv)
470{
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100471 struct intel_engine_cs *ring;
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800472 int ret, i;
473
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800474 /* This is the only place the aliasing PPGTT gets enabled, which means
475 * it has to happen before we bail on reset */
476 if (dev_priv->mm.aliasing_ppgtt) {
477 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
478 ppgtt->enable(ppgtt);
479 }
480
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800481 /* FIXME: We should make this work, even in reset */
482 if (i915_reset_in_progress(&dev_priv->gpu_error))
483 return 0;
484
485 BUG_ON(!dev_priv->ring[RCS].default_context);
Ben Widawskybdf4fd72013-12-06 14:11:18 -0800486
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800487 for_each_ring(ring, dev_priv, i) {
Chris Wilson691e6412014-04-09 09:07:36 +0100488 ret = i915_switch_context(ring, ring->default_context);
Ben Widawsky2fa48d82013-12-06 14:11:04 -0800489 if (ret)
490 return ret;
491 }
492
493 return 0;
494}
495
Ben Widawsky40521052012-06-04 14:42:43 -0700496static int context_idr_cleanup(int id, void *p, void *data)
497{
Oscar Mateo273497e2014-05-22 14:13:37 +0100498 struct intel_context *ctx = p;
Ben Widawsky40521052012-06-04 14:42:43 -0700499
Mika Kuoppaladce32712013-04-30 13:30:33 +0300500 i915_gem_context_unreference(ctx);
Ben Widawsky40521052012-06-04 14:42:43 -0700501 return 0;
Ben Widawsky254f9652012-06-04 14:42:42 -0700502}
503
Ben Widawskye422b882013-12-06 14:10:58 -0800504int i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
505{
506 struct drm_i915_file_private *file_priv = file->driver_priv;
Oscar Mateof83d6512014-05-22 14:13:38 +0100507 struct intel_context *ctx;
Ben Widawskye422b882013-12-06 14:10:58 -0800508
509 idr_init(&file_priv->context_idr);
510
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800511 mutex_lock(&dev->struct_mutex);
Oscar Mateof83d6512014-05-22 14:13:38 +0100512 ctx = i915_gem_create_context(dev, file_priv, USES_FULL_PPGTT(dev));
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800513 mutex_unlock(&dev->struct_mutex);
514
Oscar Mateof83d6512014-05-22 14:13:38 +0100515 if (IS_ERR(ctx)) {
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800516 idr_destroy(&file_priv->context_idr);
Oscar Mateof83d6512014-05-22 14:13:38 +0100517 return PTR_ERR(ctx);
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800518 }
519
Ben Widawskye422b882013-12-06 14:10:58 -0800520 return 0;
521}
522
Ben Widawsky254f9652012-06-04 14:42:42 -0700523void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
524{
Ben Widawsky40521052012-06-04 14:42:43 -0700525 struct drm_i915_file_private *file_priv = file->driver_priv;
Ben Widawsky254f9652012-06-04 14:42:42 -0700526
Daniel Vetter73c273e2012-06-19 20:27:39 +0200527 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
Ben Widawsky40521052012-06-04 14:42:43 -0700528 idr_destroy(&file_priv->context_idr);
Ben Widawsky40521052012-06-04 14:42:43 -0700529}
530
Oscar Mateo273497e2014-05-22 14:13:37 +0100531struct intel_context *
Ben Widawsky40521052012-06-04 14:42:43 -0700532i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
533{
Oscar Mateo273497e2014-05-22 14:13:37 +0100534 struct intel_context *ctx;
Ben Widawsky72ad5c42014-01-02 19:50:27 -1000535
Oscar Mateo273497e2014-05-22 14:13:37 +0100536 ctx = (struct intel_context *)idr_find(&file_priv->context_idr, id);
Ben Widawsky72ad5c42014-01-02 19:50:27 -1000537 if (!ctx)
538 return ERR_PTR(-ENOENT);
539
540 return ctx;
Ben Widawsky254f9652012-06-04 14:42:42 -0700541}
Ben Widawskye0556842012-06-04 14:42:46 -0700542
543static inline int
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100544mi_set_context(struct intel_engine_cs *ring,
Oscar Mateo273497e2014-05-22 14:13:37 +0100545 struct intel_context *new_context,
Ben Widawskye0556842012-06-04 14:42:46 -0700546 u32 hw_flags)
547{
548 int ret;
549
Ben Widawsky12b02862012-06-04 14:42:50 -0700550 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
551 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
552 * explicitly, so we rely on the value at ring init, stored in
553 * itlb_before_ctx_switch.
554 */
Ben Widawsky057f6a82014-04-02 22:30:23 -0700555 if (IS_GEN6(ring->dev)) {
Chris Wilsonac82ea22012-10-01 14:27:04 +0100556 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
Ben Widawsky12b02862012-06-04 14:42:50 -0700557 if (ret)
558 return ret;
559 }
560
Ben Widawskye37ec392012-06-04 14:42:48 -0700561 ret = intel_ring_begin(ring, 6);
Ben Widawskye0556842012-06-04 14:42:46 -0700562 if (ret)
563 return ret;
564
Ville Syrjäläb3f797a2014-04-28 14:31:09 +0300565 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw,bdw,chv */
Ville Syrjälä64bed782014-03-31 18:17:18 +0300566 if (INTEL_INFO(ring->dev)->gen >= 7)
Ben Widawskye37ec392012-06-04 14:42:48 -0700567 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
568 else
569 intel_ring_emit(ring, MI_NOOP);
570
Ben Widawskye0556842012-06-04 14:42:46 -0700571 intel_ring_emit(ring, MI_NOOP);
572 intel_ring_emit(ring, MI_SET_CONTEXT);
Ben Widawskyf343c5f2013-07-05 14:41:04 -0700573 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
Ben Widawskye0556842012-06-04 14:42:46 -0700574 MI_MM_SPACE_GTT |
575 MI_SAVE_EXT_STATE_EN |
576 MI_RESTORE_EXT_STATE_EN |
577 hw_flags);
Ville Syrjälä2b7e8082014-01-22 21:32:43 +0200578 /*
579 * w/a: MI_SET_CONTEXT must always be followed by MI_NOOP
580 * WaMiSetContext_Hang:snb,ivb,vlv
581 */
Ben Widawskye0556842012-06-04 14:42:46 -0700582 intel_ring_emit(ring, MI_NOOP);
583
Ville Syrjälä64bed782014-03-31 18:17:18 +0300584 if (INTEL_INFO(ring->dev)->gen >= 7)
Ben Widawskye37ec392012-06-04 14:42:48 -0700585 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
586 else
587 intel_ring_emit(ring, MI_NOOP);
588
Ben Widawskye0556842012-06-04 14:42:46 -0700589 intel_ring_advance(ring);
590
591 return ret;
592}
593
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100594static int do_switch(struct intel_engine_cs *ring,
Oscar Mateo273497e2014-05-22 14:13:37 +0100595 struct intel_context *to)
Ben Widawskye0556842012-06-04 14:42:46 -0700596{
Ben Widawsky6f65e292013-12-06 14:10:56 -0800597 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100598 struct intel_context *from = ring->last_context;
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800599 struct i915_hw_ppgtt *ppgtt = ctx_to_ppgtt(to);
Ben Widawskye0556842012-06-04 14:42:46 -0700600 u32 hw_flags = 0;
Chris Wilson967ab6b2014-05-30 14:16:30 +0100601 bool uninitialized = false;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700602 int ret, i;
Ben Widawskye0556842012-06-04 14:42:46 -0700603
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800604 if (from != NULL && ring == &dev_priv->ring[RCS]) {
605 BUG_ON(from->obj == NULL);
606 BUG_ON(!i915_gem_obj_is_pinned(from->obj));
607 }
Ben Widawskye0556842012-06-04 14:42:46 -0700608
Ben Widawsky0009e462013-12-06 14:11:02 -0800609 if (from == to && from->last_ring == ring && !to->remap_slice)
Chris Wilson9a3b5302012-07-15 12:34:24 +0100610 return 0;
611
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800612 /* Trying to pin first makes error handling easier. */
613 if (ring == &dev_priv->ring[RCS]) {
614 ret = i915_gem_obj_ggtt_pin(to->obj,
Daniel Vetter1ec9e262014-02-14 14:01:11 +0100615 get_context_alignment(ring->dev), 0);
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800616 if (ret)
617 return ret;
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800618 }
619
Daniel Vetteracc240d2013-12-05 15:42:34 +0100620 /*
621 * Pin can switch back to the default context if we end up calling into
622 * evict_everything - as a last ditch gtt defrag effort that also
623 * switches to the default context. Hence we need to reload from here.
624 */
625 from = ring->last_context;
626
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800627 if (USES_FULL_PPGTT(ring->dev)) {
628 ret = ppgtt->switch_mm(ppgtt, ring, false);
629 if (ret)
630 goto unpin_out;
631 }
632
633 if (ring != &dev_priv->ring[RCS]) {
634 if (from)
635 i915_gem_context_unreference(from);
636 goto done;
637 }
638
Daniel Vetteracc240d2013-12-05 15:42:34 +0100639 /*
640 * Clear this page out of any CPU caches for coherent swap-in/out. Note
Chris Wilsond3373a22012-07-15 12:34:22 +0100641 * that thanks to write = false in this call and us not setting any gpu
642 * write domains when putting a context object onto the active list
643 * (when switching away from it), this won't block.
Daniel Vetteracc240d2013-12-05 15:42:34 +0100644 *
645 * XXX: We need a real interface to do this instead of trickery.
646 */
Chris Wilsond3373a22012-07-15 12:34:22 +0100647 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800648 if (ret)
649 goto unpin_out;
Chris Wilsond3373a22012-07-15 12:34:22 +0100650
Ben Widawsky6f65e292013-12-06 14:10:56 -0800651 if (!to->obj->has_global_gtt_mapping) {
652 struct i915_vma *vma = i915_gem_obj_to_vma(to->obj,
653 &dev_priv->gtt.base);
654 vma->bind_vma(vma, to->obj->cache_level, GLOBAL_BIND);
655 }
Daniel Vetter3af7b852012-06-14 00:08:32 +0200656
Mika Kuoppala3fac8972014-01-30 16:05:48 +0200657 if (!to->is_initialized || i915_gem_context_is_default(to))
Ben Widawskye0556842012-06-04 14:42:46 -0700658 hw_flags |= MI_RESTORE_INHIBIT;
Ben Widawskye0556842012-06-04 14:42:46 -0700659
Ben Widawskye0556842012-06-04 14:42:46 -0700660 ret = mi_set_context(ring, to, hw_flags);
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800661 if (ret)
662 goto unpin_out;
Ben Widawskye0556842012-06-04 14:42:46 -0700663
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700664 for (i = 0; i < MAX_L3_SLICES; i++) {
665 if (!(to->remap_slice & (1<<i)))
666 continue;
667
668 ret = i915_gem_l3_remap(ring, i);
669 /* If it failed, try again next round */
670 if (ret)
671 DRM_DEBUG_DRIVER("L3 remapping failed\n");
672 else
673 to->remap_slice &= ~(1<<i);
674 }
675
Ben Widawskye0556842012-06-04 14:42:46 -0700676 /* The backing object for the context is done after switching to the
677 * *next* context. Therefore we cannot retire the previous context until
678 * the next context has already started running. In fact, the below code
679 * is a bit suboptimal because the retiring can occur simply after the
680 * MI_SET_CONTEXT instead of when the next seqno has completed.
681 */
Chris Wilson112522f2013-05-02 16:48:07 +0300682 if (from != NULL) {
683 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
Ben Widawskye2d05a82013-09-24 09:57:58 -0700684 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
Ben Widawskye0556842012-06-04 14:42:46 -0700685 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
686 * whole damn pipeline, we don't need to explicitly mark the
687 * object dirty. The only exception is that the context must be
688 * correct in case the object gets swapped out. Ideally we'd be
689 * able to defer doing this until we know the object would be
690 * swapped, but there is no way to do that yet.
691 */
Chris Wilson112522f2013-05-02 16:48:07 +0300692 from->obj->dirty = 1;
693 BUG_ON(from->obj->ring != ring);
Chris Wilsonb259b312012-07-15 12:34:23 +0100694
Chris Wilsonc0321e22013-08-26 19:50:53 -0300695 /* obj is kept alive until the next request by its active ref */
Ben Widawskyd7f46fc2013-12-06 14:10:55 -0800696 i915_gem_object_ggtt_unpin(from->obj);
Chris Wilson112522f2013-05-02 16:48:07 +0300697 i915_gem_context_unreference(from);
Ben Widawskye0556842012-06-04 14:42:46 -0700698 }
699
Chris Wilson967ab6b2014-05-30 14:16:30 +0100700 uninitialized = !to->is_initialized && from == NULL;
701 to->is_initialized = true;
702
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800703done:
Chris Wilson112522f2013-05-02 16:48:07 +0300704 i915_gem_context_reference(to);
705 ring->last_context = to;
Ben Widawsky0009e462013-12-06 14:11:02 -0800706 to->last_ring = ring;
Ben Widawskye0556842012-06-04 14:42:46 -0700707
Chris Wilson967ab6b2014-05-30 14:16:30 +0100708 if (uninitialized) {
Mika Kuoppala46470fc92014-05-21 19:01:06 +0300709 ret = i915_gem_render_state_init(ring);
710 if (ret)
711 DRM_ERROR("init render state: %d\n", ret);
712 }
713
Ben Widawskye0556842012-06-04 14:42:46 -0700714 return 0;
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800715
716unpin_out:
717 if (ring->id == RCS)
718 i915_gem_object_ggtt_unpin(to->obj);
719 return ret;
Ben Widawskye0556842012-06-04 14:42:46 -0700720}
721
722/**
723 * i915_switch_context() - perform a GPU context switch.
724 * @ring: ring for which we'll execute the context switch
Damien Lespiau96a6f0f2014-03-03 23:57:24 +0000725 * @to: the context to switch to
Ben Widawskye0556842012-06-04 14:42:46 -0700726 *
727 * The context life cycle is simple. The context refcount is incremented and
728 * decremented by 1 and create and destroy. If the context is in use by the GPU,
729 * it will have a refoucnt > 1. This allows us to destroy the context abstract
730 * object while letting the normal object tracking destroy the backing BO.
731 */
Oscar Mateoa4872ba2014-05-22 14:13:33 +0100732int i915_switch_context(struct intel_engine_cs *ring,
Oscar Mateo273497e2014-05-22 14:13:37 +0100733 struct intel_context *to)
Ben Widawskye0556842012-06-04 14:42:46 -0700734{
735 struct drm_i915_private *dev_priv = ring->dev->dev_private;
Ben Widawskye0556842012-06-04 14:42:46 -0700736
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800737 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
738
Chris Wilson691e6412014-04-09 09:07:36 +0100739 if (to->obj == NULL) { /* We have the fake context */
740 if (to != ring->last_context) {
741 i915_gem_context_reference(to);
742 if (ring->last_context)
743 i915_gem_context_unreference(ring->last_context);
744 ring->last_context = to;
745 }
Ben Widawskyc4829722013-12-06 14:11:20 -0800746 return 0;
Mika Kuoppalaa95f6a02014-03-14 16:22:10 +0200747 }
Ben Widawskyc4829722013-12-06 14:11:20 -0800748
Ben Widawsky67e3d2972013-12-06 14:11:01 -0800749 return do_switch(ring, to);
Ben Widawskye0556842012-06-04 14:42:46 -0700750}
Ben Widawsky84624812012-06-04 14:42:54 -0700751
Chris Wilson691e6412014-04-09 09:07:36 +0100752static bool hw_context_enabled(struct drm_device *dev)
753{
754 return to_i915(dev)->hw_context_size;
755}
756
Ben Widawsky84624812012-06-04 14:42:54 -0700757int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
758 struct drm_file *file)
759{
Ben Widawsky84624812012-06-04 14:42:54 -0700760 struct drm_i915_gem_context_create *args = data;
761 struct drm_i915_file_private *file_priv = file->driver_priv;
Oscar Mateo273497e2014-05-22 14:13:37 +0100762 struct intel_context *ctx;
Ben Widawsky84624812012-06-04 14:42:54 -0700763 int ret;
764
Chris Wilson691e6412014-04-09 09:07:36 +0100765 if (!hw_context_enabled(dev))
Daniel Vetter5fa8be62012-06-19 17:16:01 +0200766 return -ENODEV;
767
Ben Widawsky84624812012-06-04 14:42:54 -0700768 ret = i915_mutex_lock_interruptible(dev);
769 if (ret)
770 return ret;
771
Ben Widawsky7e0d96b2013-12-06 14:11:26 -0800772 ctx = i915_gem_create_context(dev, file_priv, USES_FULL_PPGTT(dev));
Ben Widawsky84624812012-06-04 14:42:54 -0700773 mutex_unlock(&dev->struct_mutex);
Dan Carpenterbe636382012-07-17 09:44:49 +0300774 if (IS_ERR(ctx))
775 return PTR_ERR(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700776
777 args->ctx_id = ctx->id;
778 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
779
Dan Carpenterbe636382012-07-17 09:44:49 +0300780 return 0;
Ben Widawsky84624812012-06-04 14:42:54 -0700781}
782
783int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
784 struct drm_file *file)
785{
786 struct drm_i915_gem_context_destroy *args = data;
787 struct drm_i915_file_private *file_priv = file->driver_priv;
Oscar Mateo273497e2014-05-22 14:13:37 +0100788 struct intel_context *ctx;
Ben Widawsky84624812012-06-04 14:42:54 -0700789 int ret;
790
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800791 if (args->ctx_id == DEFAULT_CONTEXT_ID)
Ben Widawskyc2cf2412013-12-24 16:02:54 -0800792 return -ENOENT;
Ben Widawsky0eea67e2013-12-06 14:11:19 -0800793
Ben Widawsky84624812012-06-04 14:42:54 -0700794 ret = i915_mutex_lock_interruptible(dev);
795 if (ret)
796 return ret;
797
798 ctx = i915_gem_context_get(file_priv, args->ctx_id);
Ben Widawsky72ad5c42014-01-02 19:50:27 -1000799 if (IS_ERR(ctx)) {
Ben Widawsky84624812012-06-04 14:42:54 -0700800 mutex_unlock(&dev->struct_mutex);
Ben Widawsky72ad5c42014-01-02 19:50:27 -1000801 return PTR_ERR(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700802 }
803
Mika Kuoppaladce32712013-04-30 13:30:33 +0300804 idr_remove(&ctx->file_priv->context_idr, ctx->id);
805 i915_gem_context_unreference(ctx);
Ben Widawsky84624812012-06-04 14:42:54 -0700806 mutex_unlock(&dev->struct_mutex);
807
808 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
809 return 0;
810}