Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 33 | * Parts developed by LinSysSoft Sahara team |
| 34 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 35 | **************************************************************************/ |
| 36 | |
| 37 | /* |
| 38 | * FILENAME: sxg.c |
| 39 | * |
| 40 | * The SXG driver for Alacritech's 10Gbe products. |
| 41 | * |
| 42 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 43 | * IS-NIC driver. |
| 44 | */ |
| 45 | |
| 46 | #include <linux/kernel.h> |
| 47 | #include <linux/string.h> |
| 48 | #include <linux/errno.h> |
| 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 51 | #include <linux/firmware.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 52 | #include <linux/ioport.h> |
| 53 | #include <linux/slab.h> |
| 54 | #include <linux/interrupt.h> |
| 55 | #include <linux/timer.h> |
| 56 | #include <linux/pci.h> |
| 57 | #include <linux/spinlock.h> |
| 58 | #include <linux/init.h> |
| 59 | #include <linux/netdevice.h> |
| 60 | #include <linux/etherdevice.h> |
| 61 | #include <linux/ethtool.h> |
| 62 | #include <linux/skbuff.h> |
| 63 | #include <linux/delay.h> |
| 64 | #include <linux/types.h> |
| 65 | #include <linux/dma-mapping.h> |
| 66 | #include <linux/mii.h> |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 67 | #include <linux/ip.h> |
| 68 | #include <linux/in.h> |
| 69 | #include <linux/tcp.h> |
| 70 | #include <linux/ipv6.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 71 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 72 | #define SLIC_GET_STATS_ENABLED 0 |
| 73 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 74 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 75 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 76 | #define VPCI 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 77 | #define ATK_DEBUG 1 |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 78 | #define SXG_UCODE_DEBUG 0 |
| 79 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 80 | |
| 81 | #include "sxg_os.h" |
| 82 | #include "sxghw.h" |
| 83 | #include "sxghif.h" |
| 84 | #include "sxg.h" |
| 85 | #include "sxgdbg.h" |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 86 | #include "sxgphycode-1.2.h" |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 87 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 88 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 89 | enum sxg_buffer_type BufferType); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 90 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 91 | void *RcvBlock, |
| 92 | dma_addr_t PhysicalAddress, |
| 93 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 94 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 95 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 96 | dma_addr_t PhysicalAddress, |
| 97 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 98 | |
| 99 | static void sxg_mcast_init_crc32(void); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 100 | static int sxg_entry_open(struct net_device *dev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 101 | static int sxg_second_open(struct net_device * dev); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 102 | static int sxg_entry_halt(struct net_device *dev); |
| 103 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 104 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 105 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 106 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 107 | struct sxg_scatter_gather *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 108 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 109 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 110 | int budget); |
| 111 | static void sxg_interrupt(struct adapter_t *adapter); |
| 112 | static int sxg_poll(struct napi_struct *napi, int budget); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 113 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 114 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 115 | int *sxg_napi_continue, int *work_done, int budget); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 116 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 117 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 118 | struct sxg_event *Event); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 119 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 120 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 121 | struct ether_header *EtherHdr, ushort length); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 122 | static struct net_device_stats *sxg_get_stats(struct net_device * dev); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 123 | void sxg_free_resources(struct adapter_t *adapter); |
| 124 | void sxg_free_rcvblocks(struct adapter_t *adapter); |
| 125 | void sxg_free_sgl_buffers(struct adapter_t *adapter); |
| 126 | void sxg_unmap_resources(struct adapter_t *adapter); |
| 127 | void sxg_free_mcast_addrs(struct adapter_t *adapter); |
| 128 | void sxg_collect_statistics(struct adapter_t *adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 129 | static int sxg_register_interrupt(struct adapter_t *adapter); |
| 130 | static void sxg_remove_isr(struct adapter_t *adapter); |
| 131 | static irqreturn_t sxg_isr(int irq, void *dev_id); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 132 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 133 | static void sxg_watchdog(unsigned long data); |
| 134 | static void sxg_update_link_status (struct work_struct *work); |
| 135 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 136 | #define XXXTODO 0 |
| 137 | |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 138 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 139 | static int sxg_mac_set_address(struct net_device *dev, void *ptr); |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 140 | #endif |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 141 | static void sxg_mcast_set_list(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 142 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 143 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 144 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 145 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 146 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 147 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 148 | unsigned char Index); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 149 | int sxg_change_mtu (struct net_device *netdev, int new_mtu); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 150 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 151 | static int sxg_phy_init(struct adapter_t *adapter); |
| 152 | static void sxg_link_event(struct adapter_t *adapter); |
| 153 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 154 | static void sxg_link_state(struct adapter_t *adapter, |
| 155 | enum SXG_LINK_STATE LinkState); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 156 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 157 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 158 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 159 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 160 | static void sxg_set_mcast_addr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 161 | |
| 162 | static unsigned int sxg_first_init = 1; |
| 163 | static char *sxg_banner = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 164 | "Alacritech SLIC Technology(tm) Server and Storage \ |
| 165 | 10Gbe Accelerator (Non-Accelerated)\n"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 166 | |
| 167 | static int sxg_debug = 1; |
| 168 | static int debug = -1; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 169 | static struct net_device *head_netdevice = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 170 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 171 | static struct sxgbase_driver sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 172 | .dynamic_intagg = 1, |
| 173 | }; |
| 174 | static int intagg_delay = 100; |
| 175 | static u32 dynamic_intagg = 0; |
| 176 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 177 | char sxg_driver_name[] = "sxg_nic"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 178 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 179 | #define DRV_DESCRIPTION \ |
| 180 | "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 181 | #define DRV_COPYRIGHT \ |
| 182 | "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 183 | |
| 184 | MODULE_AUTHOR(DRV_AUTHOR); |
| 185 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 186 | MODULE_LICENSE("GPL"); |
| 187 | |
| 188 | module_param(dynamic_intagg, int, 0); |
| 189 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 190 | module_param(intagg_delay, int, 0); |
| 191 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 192 | |
| 193 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 194 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 195 | {0,} |
| 196 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 197 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 198 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 199 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 200 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 201 | { |
| 202 | writel(value, reg); |
| 203 | if (flush) |
| 204 | mb(); |
| 205 | } |
| 206 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 207 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 208 | u64 value, u32 cpu) |
| 209 | { |
| 210 | u32 value_high = (u32) (value >> 32); |
| 211 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 212 | unsigned long flags; |
| 213 | |
| 214 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 215 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 216 | writel(value_low, reg); |
| 217 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 218 | } |
| 219 | |
| 220 | static void sxg_init_driver(void) |
| 221 | { |
| 222 | if (sxg_first_init) { |
| 223 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 224 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 225 | sxg_first_init = 0; |
| 226 | spin_lock_init(&sxg_global.driver_lock); |
| 227 | } |
| 228 | } |
| 229 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 230 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 231 | { |
| 232 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 233 | adapter->netdev->name, adapter->currmacaddr[0], |
| 234 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 235 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 236 | adapter->currmacaddr[5]); |
| 237 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 238 | adapter->netdev->name, adapter->macaddr[0], |
| 239 | adapter->macaddr[1], adapter->macaddr[2], |
| 240 | adapter->macaddr[3], adapter->macaddr[4], |
| 241 | adapter->macaddr[5]); |
| 242 | return; |
| 243 | } |
| 244 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 245 | /* SXG Globals */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 246 | static struct sxg_driver SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 247 | |
| 248 | #ifdef ATKDBG |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 249 | static struct sxg_trace_buffer LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 250 | #endif /* ATKDBG */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 251 | static struct sxg_trace_buffer *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 252 | |
| 253 | /* |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 254 | * MSI Related API's |
| 255 | */ |
| 256 | int sxg_register_intr(struct adapter_t *adapter); |
| 257 | int sxg_enable_msi_x(struct adapter_t *adapter); |
| 258 | int sxg_add_msi_isr(struct adapter_t *adapter); |
| 259 | void sxg_remove_msix_isr(struct adapter_t *adapter); |
| 260 | int sxg_set_interrupt_capability(struct adapter_t *adapter); |
| 261 | |
| 262 | int sxg_set_interrupt_capability(struct adapter_t *adapter) |
| 263 | { |
| 264 | int ret; |
| 265 | |
| 266 | ret = sxg_enable_msi_x(adapter); |
| 267 | if (ret != STATUS_SUCCESS) { |
| 268 | adapter->msi_enabled = FALSE; |
| 269 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Disable\n"); |
| 270 | } else { |
| 271 | adapter->msi_enabled = TRUE; |
| 272 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Enable\n"); |
| 273 | } |
| 274 | return ret; |
| 275 | } |
| 276 | |
| 277 | int sxg_register_intr(struct adapter_t *adapter) |
| 278 | { |
| 279 | int ret = 0; |
| 280 | |
| 281 | if (adapter->msi_enabled) { |
| 282 | ret = sxg_add_msi_isr(adapter); |
| 283 | } |
| 284 | else { |
| 285 | DBG_ERROR("MSI-X Enable Failed. Using Pin INT\n"); |
| 286 | ret = sxg_register_interrupt(adapter); |
| 287 | if (ret != STATUS_SUCCESS) { |
| 288 | DBG_ERROR("sxg_register_interrupt Failed\n"); |
| 289 | } |
| 290 | } |
| 291 | return ret; |
| 292 | } |
| 293 | |
| 294 | int sxg_enable_msi_x(struct adapter_t *adapter) |
| 295 | { |
| 296 | int ret; |
| 297 | |
| 298 | adapter->nr_msix_entries = 1; |
| 299 | adapter->msi_entries = kmalloc(adapter->nr_msix_entries * |
| 300 | sizeof(struct msix_entry),GFP_KERNEL); |
| 301 | if (!adapter->msi_entries) { |
| 302 | DBG_ERROR("%s:MSI Entries memory allocation Failed\n",__func__); |
| 303 | return -ENOMEM; |
| 304 | } |
| 305 | memset(adapter->msi_entries, 0, adapter->nr_msix_entries * |
| 306 | sizeof(struct msix_entry)); |
| 307 | |
| 308 | ret = pci_enable_msix(adapter->pcidev, adapter->msi_entries, |
| 309 | adapter->nr_msix_entries); |
| 310 | if (ret) { |
| 311 | DBG_ERROR("Enabling MSI-X with %d vectors failed\n", |
| 312 | adapter->nr_msix_entries); |
| 313 | /*Should try with less vector returned.*/ |
| 314 | kfree(adapter->msi_entries); |
| 315 | return STATUS_FAILURE; /*MSI-X Enable failed.*/ |
| 316 | } |
| 317 | return (STATUS_SUCCESS); |
| 318 | } |
| 319 | |
| 320 | int sxg_add_msi_isr(struct adapter_t *adapter) |
| 321 | { |
| 322 | int ret,i; |
| 323 | |
| 324 | if (!adapter->intrregistered) { |
| 325 | for (i=0; i<adapter->nr_msix_entries; i++) { |
| 326 | ret = request_irq (adapter->msi_entries[i].vector, |
| 327 | sxg_isr, |
| 328 | IRQF_SHARED, |
| 329 | adapter->netdev->name, |
| 330 | adapter->netdev); |
| 331 | if (ret) { |
| 332 | DBG_ERROR("sxg: MSI-X request_irq (%s) " |
| 333 | "FAILED [%x]\n", adapter->netdev->name, |
| 334 | ret); |
| 335 | return (ret); |
| 336 | } |
| 337 | } |
| 338 | } |
| 339 | adapter->msi_enabled = TRUE; |
| 340 | adapter->intrregistered = 1; |
| 341 | adapter->IntRegistered = TRUE; |
| 342 | return (STATUS_SUCCESS); |
| 343 | } |
| 344 | |
| 345 | void sxg_remove_msix_isr(struct adapter_t *adapter) |
| 346 | { |
| 347 | int i,vector; |
| 348 | struct net_device *netdev = adapter->netdev; |
| 349 | |
| 350 | for(i=0; i< adapter->nr_msix_entries;i++) |
| 351 | { |
| 352 | vector = adapter->msi_entries[i].vector; |
| 353 | DBG_ERROR("%s : Freeing IRQ vector#%d\n",__FUNCTION__,vector); |
| 354 | free_irq(vector,netdev); |
| 355 | } |
| 356 | } |
| 357 | |
| 358 | |
| 359 | static void sxg_remove_isr(struct adapter_t *adapter) |
| 360 | { |
| 361 | struct net_device *netdev = adapter->netdev; |
| 362 | if (adapter->msi_enabled) |
| 363 | sxg_remove_msix_isr(adapter); |
| 364 | else |
| 365 | free_irq(adapter->netdev->irq, netdev); |
| 366 | } |
| 367 | |
| 368 | void sxg_reset_interrupt_capability(struct adapter_t *adapter) |
| 369 | { |
| 370 | if (adapter->msi_enabled) { |
| 371 | pci_disable_msix(adapter->pcidev); |
| 372 | kfree(adapter->msi_entries); |
| 373 | adapter->msi_entries = NULL; |
| 374 | } |
| 375 | return; |
| 376 | } |
| 377 | |
| 378 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 379 | * sxg_download_microcode |
| 380 | * |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 381 | * Download Microcode to Sahara adapter using the Linux |
| 382 | * Firmware module to get the ucode.sys file. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 383 | * |
| 384 | * Arguments - |
| 385 | * adapter - A pointer to our adapter structure |
| 386 | * UcodeSel - microcode file selection |
| 387 | * |
| 388 | * Return |
| 389 | * int |
| 390 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 391 | static bool sxg_download_microcode(struct adapter_t *adapter, |
| 392 | enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 393 | { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 394 | const struct firmware *fw; |
| 395 | const char *file = ""; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 396 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 397 | int ret; |
| 398 | int ucode_start; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 399 | u32 Section; |
| 400 | u32 ThisSectionSize; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 401 | u32 instruction = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 402 | u32 BaseAddress, AddressOffset, Address; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 403 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 404 | u32 ValueRead; |
| 405 | u32 i; |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 406 | u32 index = 0; |
| 407 | u32 num_sections = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 408 | u32 sectionSize[16]; |
| 409 | u32 sectionStart[16]; |
| 410 | |
| 411 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 412 | adapter, 0, 0, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 413 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 414 | /* |
| 415 | * This routine is only implemented to download the microcode |
| 416 | * for the Revision B Sahara chip. Rev A and Diagnostic |
| 417 | * microcode is not supported at this time. If Rev A or |
| 418 | * diagnostic ucode is required, this routine will obviously |
| 419 | * need to change. Also, eventually need to add support for |
| 420 | * Rev B checked version of ucode. That's easy enough once |
| 421 | * the free version of Rev B works. |
| 422 | */ |
| 423 | ASSERT(UcodeSel == SXG_UCODE_SYSTEM); |
| 424 | ASSERT(adapter->asictype == SAHARA_REV_B); |
| 425 | #if SXG_UCODE_DEBUG |
| 426 | file = "sxg/saharadbgdownloadB.sys"; |
| 427 | #else |
| 428 | file = "sxg/saharadownloadB.sys"; |
| 429 | #endif |
| 430 | ret = request_firmware(&fw, file, &adapter->pcidev->dev); |
| 431 | if (ret) { |
| 432 | DBG_ERROR("%s SXG_NIC: Failed to load firmware %s\n", __func__,file); |
| 433 | return ret; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 434 | } |
| 435 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 436 | /* |
| 437 | * The microcode .sys file contains starts with a 4 byte word containing |
| 438 | * the number of sections. That is followed by "num_sections" 4 byte |
| 439 | * words containing each "section" size. That is followed num_sections |
| 440 | * 4 byte words containing each section "start" address. |
| 441 | * |
| 442 | * Following the above header, the .sys file contains num_sections, |
| 443 | * where each section size is specified, newline delineatetd 12 byte |
| 444 | * microcode instructions. |
| 445 | */ |
| 446 | num_sections = *(u32 *)(fw->data + index); |
| 447 | index += 4; |
| 448 | ASSERT(num_sections <= 3); |
| 449 | for (i = 0; i < num_sections; i++) { |
| 450 | sectionSize[i] = *(u32 *)(fw->data + index); |
| 451 | index += 4; |
| 452 | } |
| 453 | for (i = 0; i < num_sections; i++) { |
| 454 | sectionStart[i] = *(u32 *)(fw->data + index); |
| 455 | index += 4; |
| 456 | } |
| 457 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 458 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 459 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 460 | udelay(50); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 461 | HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 462 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 463 | /* |
| 464 | * Download each section of the microcode as specified in |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 465 | * sectionSize[index] to sectionStart[index] address. As |
| 466 | * described above, the .sys file contains 12 byte word |
| 467 | * microcode instructions. The *download.sys file is generated |
| 468 | * using the objtosys.exe utility that was built for Sahara |
| 469 | * microcode. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 470 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 471 | /* See usage of this below when we read back for parity */ |
| 472 | ucode_start = index; |
| 473 | instruction = *(u32 *)(fw->data + index); |
| 474 | index += 4; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 475 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 476 | for (Section = 0; Section < num_sections; Section++) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 477 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 478 | /* Size in instructions */ |
| 479 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 480 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 481 | AddressOffset++) { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 482 | u32 first_instr = 0; /* See comment below */ |
| 483 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 484 | Address = BaseAddress + AddressOffset; |
| 485 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 486 | /* Write instruction bits 31 - 0 (low) */ |
| 487 | first_instr = instruction; |
| 488 | WRITE_REG(HwRegs->UcodeDataLow, instruction, FLUSH); |
| 489 | instruction = *(u32 *)(fw->data + index); |
| 490 | index += 4; /* Advance to the "next" instruction */ |
| 491 | |
| 492 | /* Write instruction bits 63-32 (middle) */ |
| 493 | WRITE_REG(HwRegs->UcodeDataMiddle, instruction, FLUSH); |
| 494 | instruction = *(u32 *)(fw->data + index); |
| 495 | index += 4; /* Advance to the "next" instruction */ |
| 496 | |
| 497 | /* Write instruction bits 95-64 (high) */ |
| 498 | WRITE_REG(HwRegs->UcodeDataHigh, instruction, FLUSH); |
| 499 | instruction = *(u32 *)(fw->data + index); |
| 500 | index += 4; /* Advance to the "next" instruction */ |
| 501 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 502 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 503 | WRITE_REG(HwRegs->UcodeAddr, |
| 504 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 505 | /* |
| 506 | * Sahara bug in the ucode download logic - the write to DataLow |
| 507 | * for the next instruction could get corrupted. To avoid this, |
| 508 | * write to DataLow again for this instruction (which may get |
| 509 | * corrupted, but it doesn't matter), then increment the address |
| 510 | * and write the data for the next instruction to DataLow. That |
| 511 | * write should succeed. |
| 512 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 513 | WRITE_REG(HwRegs->UcodeDataLow, first_instr, FLUSH); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 514 | } |
| 515 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 516 | /* |
| 517 | * Now repeat the entire operation reading the instruction back and |
| 518 | * checking for parity errors |
| 519 | */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 520 | index = ucode_start; |
| 521 | |
| 522 | for (Section = 0; Section < num_sections; Section++) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 523 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 524 | /* Size in instructions */ |
| 525 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 526 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 527 | AddressOffset++) { |
| 528 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 529 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 530 | WRITE_REG(HwRegs->UcodeAddr, |
| 531 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 532 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 533 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 534 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 535 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 536 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 537 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 538 | return FALSE; /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 539 | } |
| 540 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 541 | /* Read the instruction back and compare */ |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 542 | /* First instruction */ |
| 543 | instruction = *(u32 *)(fw->data + index); |
| 544 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 545 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 546 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 547 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 548 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 549 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 550 | } |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 551 | instruction = *(u32 *)(fw->data + index); |
| 552 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 553 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 554 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 555 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 556 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 557 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 558 | } |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 559 | instruction = *(u32 *)(fw->data + index); |
| 560 | index += 4; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 561 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 562 | if (ValueRead != instruction) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 563 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 564 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 565 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 566 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 567 | } |
| 568 | } |
| 569 | |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 570 | /* download finished */ |
| 571 | release_firmware(fw); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 572 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 573 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 574 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 575 | /* |
| 576 | * Poll the CardUp register to wait for microcode to initialize |
| 577 | * Give up after 10,000 attemps (500ms). |
| 578 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 579 | for (i = 0; i < 10000; i++) { |
| 580 | udelay(50); |
| 581 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 582 | if (ValueRead == 0xCAFE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 583 | break; |
| 584 | } |
| 585 | } |
| 586 | if (i == 10000) { |
Mithlesh Thukral | cda3b51 | 2009-03-20 17:39:04 +0530 | [diff] [blame] | 587 | DBG_ERROR("sxg: %s TIMEOUT bringing up card - verify MICROCODE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 588 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 589 | return FALSE; /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 590 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 591 | /* |
| 592 | * Now write the LoadSync register. This is used to |
| 593 | * synchronize with the card so it can scribble on the memory |
| 594 | * that contained 0xCAFE from the "CardUp" step above |
| 595 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 596 | if (UcodeSel == SXG_UCODE_SYSTEM) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 597 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 598 | } |
| 599 | |
| 600 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 601 | adapter, 0, 0, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 602 | return (TRUE); |
| 603 | } |
| 604 | |
| 605 | /* |
| 606 | * sxg_allocate_resources - Allocate memory and locks |
| 607 | * |
| 608 | * Arguments - |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 609 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 610 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 611 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 612 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 613 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 614 | { |
Mithlesh Thukral | 9fd6966 | 2009-02-24 18:09:34 +0530 | [diff] [blame] | 615 | int status = STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 616 | u32 RssIds, IsrCount; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 617 | /* struct sxg_xmt_ring *XmtRing; */ |
| 618 | /* struct sxg_rcv_ring *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 619 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 620 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 621 | |
| 622 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 623 | adapter, 0, 0, 0); |
| 624 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 625 | /* Windows tells us how many CPUs it plans to use for */ |
| 626 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 627 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 628 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 629 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 630 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 631 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 632 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 633 | spin_lock_init(&adapter->RcvQLock); |
| 634 | spin_lock_init(&adapter->SglQLock); |
| 635 | spin_lock_init(&adapter->XmtZeroLock); |
| 636 | spin_lock_init(&adapter->Bit64RegLock); |
| 637 | spin_lock_init(&adapter->AdapterLock); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 638 | atomic_set(&adapter->pending_allocations, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 639 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 640 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 641 | |
| 642 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 643 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 644 | InitializeListHead(&adapter->AllRcvBlocks); |
| 645 | InitializeListHead(&adapter->FreeSglBuffers); |
| 646 | InitializeListHead(&adapter->AllSglBuffers); |
| 647 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 648 | /* |
| 649 | * Mark these basic allocations done. This flags essentially |
| 650 | * tells the SxgFreeResources routine that it can grab spinlocks |
| 651 | * and reference listheads. |
| 652 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 653 | adapter->BasicAllocations = TRUE; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 654 | /* |
| 655 | * Main allocation loop. Start with the maximum supported by |
| 656 | * the microcode and back off if memory allocation |
| 657 | * fails. If we hit a minimum, fail. |
| 658 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 659 | |
| 660 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 661 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 662 | (unsigned int)(sizeof(struct sxg_xmt_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 663 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 664 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 665 | * Start with big items first - receive and transmit rings. |
| 666 | * At the moment I'm going to keep the ring size fixed and |
| 667 | * adjust the TCBs if we fail. Later we might |
| 668 | * consider reducing the ring size as well.. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 669 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 670 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 671 | sizeof(struct sxg_xmt_ring) * |
| 672 | 1, |
| 673 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 674 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 675 | |
| 676 | if (!adapter->XmtRings) { |
| 677 | goto per_tcb_allocation_failed; |
| 678 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 679 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 680 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 681 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 682 | (unsigned int)(sizeof(struct sxg_rcv_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 683 | adapter->RcvRings = |
| 684 | pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 685 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 686 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 687 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 688 | if (!adapter->RcvRings) { |
| 689 | goto per_tcb_allocation_failed; |
| 690 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 691 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 692 | adapter->ucode_stats = kzalloc(sizeof(struct sxg_ucode_stats), GFP_ATOMIC); |
| 693 | adapter->pucode_stats = pci_map_single(adapter->pcidev, |
| 694 | adapter->ucode_stats, |
| 695 | sizeof(struct sxg_ucode_stats), |
| 696 | PCI_DMA_FROMDEVICE); |
| 697 | // memset(adapter->ucode_stats, 0, sizeof(struct sxg_ucode_stats)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 698 | break; |
| 699 | |
| 700 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 701 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 702 | if (adapter->XmtRings) { |
| 703 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 704 | sizeof(struct sxg_xmt_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 705 | adapter->XmtRings, |
| 706 | adapter->PXmtRings); |
| 707 | adapter->XmtRings = NULL; |
| 708 | } |
| 709 | if (adapter->RcvRings) { |
| 710 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 711 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 712 | adapter->RcvRings, |
| 713 | adapter->PRcvRings); |
| 714 | adapter->RcvRings = NULL; |
| 715 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 716 | /* Loop around and try again.... */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 717 | if (adapter->ucode_stats) { |
| 718 | pci_unmap_single(adapter->pcidev, |
| 719 | sizeof(struct sxg_ucode_stats), |
| 720 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 721 | adapter->ucode_stats = NULL; |
| 722 | } |
| 723 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 724 | } |
| 725 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 726 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 727 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 728 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 729 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 730 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 731 | /* Sanity check receive data structure format */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 732 | /* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 733 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 734 | ASSERT(sizeof(struct sxg_rcv_descriptor_block) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 735 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 736 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 737 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 738 | (unsigned int)(sizeof(struct sxg_event_ring) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 739 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 740 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 741 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 742 | sizeof(struct sxg_event_ring) * |
| 743 | RssIds, |
| 744 | &adapter->PEventRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 745 | |
| 746 | if (!adapter->EventRings) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 747 | /* Caller will call SxgFreeAdapter to clean up above |
| 748 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 749 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 750 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 751 | status = STATUS_RESOURCES; |
| 752 | goto per_tcb_allocation_failed; |
| 753 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 754 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 755 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 756 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 757 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 758 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 759 | IsrCount, &adapter->PIsr); |
| 760 | if (!adapter->Isr) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 761 | /* Caller will call SxgFreeAdapter to clean up above |
| 762 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 763 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 764 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 765 | status = STATUS_RESOURCES; |
| 766 | goto per_tcb_allocation_failed; |
| 767 | } |
| 768 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 769 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 770 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 771 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 772 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 773 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 774 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 775 | sizeof(u32), |
| 776 | &adapter-> |
| 777 | PXmtRingZeroIndex); |
| 778 | if (!adapter->XmtRingZeroIndex) { |
| 779 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 780 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 781 | status = STATUS_RESOURCES; |
| 782 | goto per_tcb_allocation_failed; |
| 783 | } |
| 784 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 785 | |
| 786 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 787 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 788 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 789 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 790 | } |
| 791 | |
| 792 | /* |
| 793 | * sxg_config_pci - |
| 794 | * |
| 795 | * Set up PCI Configuration space |
| 796 | * |
| 797 | * Arguments - |
| 798 | * pcidev - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 799 | */ |
| 800 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 801 | { |
| 802 | u16 pci_command; |
| 803 | u16 new_command; |
| 804 | |
| 805 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 806 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 807 | /* Set the command register */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 808 | new_command = pci_command | ( |
| 809 | /* Memory Space Enable */ |
| 810 | PCI_COMMAND_MEMORY | |
| 811 | /* Bus master enable */ |
| 812 | PCI_COMMAND_MASTER | |
| 813 | /* Memory write and invalidate */ |
| 814 | PCI_COMMAND_INVALIDATE | |
| 815 | /* Parity error response */ |
| 816 | PCI_COMMAND_PARITY | |
| 817 | /* System ERR */ |
| 818 | PCI_COMMAND_SERR | |
| 819 | /* Fast back-to-back */ |
| 820 | PCI_COMMAND_FAST_BACK); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 821 | if (pci_command != new_command) { |
| 822 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 823 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 824 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 825 | } |
| 826 | } |
| 827 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 828 | /* |
| 829 | * sxg_read_config |
| 830 | * @adapter : Pointer to the adapter structure for the card |
| 831 | * This function will read the configuration data from EEPROM/FLASH |
| 832 | */ |
| 833 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 834 | { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 835 | /* struct sxg_config data; */ |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 836 | struct sxg_config *config; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 837 | struct sw_cfg_data *data; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 838 | dma_addr_t p_addr; |
| 839 | unsigned long status; |
| 840 | unsigned long i; |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 841 | config = pci_alloc_consistent(adapter->pcidev, |
| 842 | sizeof(struct sxg_config), &p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 843 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 844 | if(!config) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 845 | /* |
| 846 | * We cant get even this much memory. Raise a hell |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 847 | * Get out of here |
| 848 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 849 | printk(KERN_ERR"%s : Could not allocate memory for reading \ |
| 850 | EEPROM\n", __FUNCTION__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 851 | return -ENOMEM; |
| 852 | } |
| 853 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 854 | data = &config->SwCfg; |
| 855 | |
| 856 | /* Initialize (reflective memory) status register */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 857 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 858 | |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 859 | /* Send request to fetch configuration data */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 860 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 861 | for(i=0; i<1000; i++) { |
| 862 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 863 | if (status != SXG_CFG_TIMEOUT) |
| 864 | break; |
| 865 | mdelay(1); /* Do we really need this */ |
| 866 | } |
| 867 | |
| 868 | switch(status) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 869 | /* Config read from EEPROM succeeded */ |
| 870 | case SXG_CFG_LOAD_EEPROM: |
| 871 | /* Config read from Flash succeeded */ |
| 872 | case SXG_CFG_LOAD_FLASH: |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 873 | /* |
| 874 | * Copy the MAC address to adapter structure |
| 875 | * TODO: We are not doing the remaining part : FRU, etc |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 876 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 877 | memcpy(adapter->macaddr, data->MacAddr[0].MacAddr, |
Mithlesh Thukral | b9346e0 | 2009-03-20 17:35:58 +0530 | [diff] [blame] | 878 | sizeof(struct sxg_config_mac)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 879 | break; |
| 880 | case SXG_CFG_TIMEOUT: |
| 881 | case SXG_CFG_LOAD_INVALID: |
| 882 | case SXG_CFG_LOAD_ERROR: |
| 883 | default: /* Fix default handler later */ |
| 884 | printk(KERN_WARNING"%s : We could not read the config \ |
| 885 | word. Status = %ld\n", __FUNCTION__, status); |
| 886 | break; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 887 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 888 | pci_free_consistent(adapter->pcidev, sizeof(struct sw_cfg_data), data, |
| 889 | p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 890 | if (adapter->netdev) { |
| 891 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 892 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 893 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 894 | sxg_dbg_macaddrs(adapter); |
| 895 | |
| 896 | return status; |
| 897 | } |
| 898 | |
Alexander Beregalov | 7bea361 | 2009-03-29 19:30:46 +0400 | [diff] [blame^] | 899 | static const struct net_device_ops sxg_netdev_ops = { |
| 900 | .ndo_open = sxg_entry_open, |
| 901 | .ndo_stop = sxg_entry_halt, |
| 902 | .ndo_start_xmit = sxg_send_packets, |
| 903 | .ndo_do_ioctl = sxg_ioctl, |
| 904 | .ndo_change_mtu = sxg_change_mtu, |
| 905 | .ndo_get_stats = sxg_get_stats, |
| 906 | .ndo_set_multicast_list = sxg_mcast_set_list, |
| 907 | .ndo_validate_addr = eth_validate_addr, |
| 908 | #if XXXTODO |
| 909 | .ndo_set_mac_address = sxg_mac_set_address, |
| 910 | #else |
| 911 | .ndo_set_mac_address = eth_mac_addr, |
| 912 | #endif |
| 913 | }; |
| 914 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 915 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 916 | const struct pci_device_id *pci_tbl_entry) |
| 917 | { |
| 918 | static int did_version = 0; |
| 919 | int err; |
| 920 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 921 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 922 | void __iomem *memmapped_ioaddr; |
| 923 | u32 status = 0; |
| 924 | ulong mmio_start = 0; |
| 925 | ulong mmio_len = 0; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 926 | unsigned char revision_id; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 927 | |
| 928 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 929 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 930 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 931 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 932 | #ifdef ATKDBG |
| 933 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 934 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 935 | #endif |
| 936 | |
| 937 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 938 | |
| 939 | err = pci_enable_device(pcidev); |
| 940 | |
| 941 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 942 | if (err) { |
| 943 | return err; |
| 944 | } |
| 945 | |
| 946 | if (sxg_debug > 0 && did_version++ == 0) { |
| 947 | printk(KERN_INFO "%s\n", sxg_banner); |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 948 | printk(KERN_INFO "%s\n", SXG_DRV_VERSION); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 949 | } |
| 950 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 951 | pci_read_config_byte(pcidev, PCI_REVISION_ID, &revision_id); |
| 952 | |
Yang Hongyang | 6a35528 | 2009-04-06 19:01:13 -0700 | [diff] [blame] | 953 | if (!(err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64)))) { |
| 954 | DBG_ERROR("pci_set_dma_mask(DMA_BIT_MASK(64)) successful\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 955 | } else { |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 956 | if ((err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)))) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 957 | DBG_ERROR |
| 958 | ("No usable DMA configuration, aborting err[%x]\n", |
| 959 | err); |
| 960 | return err; |
| 961 | } |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 962 | DBG_ERROR("pci_set_dma_mask(DMA_BIT_MASK(32)) successful\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 963 | } |
| 964 | |
| 965 | DBG_ERROR("Call pci_request_regions\n"); |
| 966 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 967 | err = pci_request_regions(pcidev, sxg_driver_name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 968 | if (err) { |
| 969 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 970 | return err; |
| 971 | } |
| 972 | |
| 973 | DBG_ERROR("call pci_set_master\n"); |
| 974 | pci_set_master(pcidev); |
| 975 | |
| 976 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 977 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 978 | if (!netdev) { |
| 979 | err = -ENOMEM; |
| 980 | goto err_out_exit_sxg_probe; |
| 981 | } |
| 982 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 983 | |
| 984 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 985 | |
| 986 | pci_set_drvdata(pcidev, netdev); |
| 987 | adapter = netdev_priv(netdev); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 988 | if (revision_id == 1) { |
| 989 | adapter->asictype = SAHARA_REV_A; |
| 990 | } else if (revision_id == 2) { |
| 991 | adapter->asictype = SAHARA_REV_B; |
| 992 | } else { |
| 993 | ASSERT(0); |
| 994 | DBG_ERROR("%s Unexpected revision ID %x\n", __FUNCTION__, revision_id); |
| 995 | goto err_out_exit_sxg_probe; |
| 996 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 997 | adapter->netdev = netdev; |
| 998 | adapter->pcidev = pcidev; |
| 999 | |
| 1000 | mmio_start = pci_resource_start(pcidev, 0); |
| 1001 | mmio_len = pci_resource_len(pcidev, 0); |
| 1002 | |
| 1003 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 1004 | mmio_start, mmio_len); |
| 1005 | |
| 1006 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1007 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1008 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1009 | if (!memmapped_ioaddr) { |
| 1010 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1011 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1012 | goto err_out_free_mmio_region_0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1013 | } |
| 1014 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1015 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] \ |
| 1016 | len[%lx], IRQ %d.\n", __func__, memmapped_ioaddr, mmio_start, |
| 1017 | mmio_len, pcidev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1018 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1019 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1020 | adapter->base_addr = memmapped_ioaddr; |
| 1021 | |
| 1022 | mmio_start = pci_resource_start(pcidev, 2); |
| 1023 | mmio_len = pci_resource_len(pcidev, 2); |
| 1024 | |
| 1025 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 1026 | mmio_start, mmio_len); |
| 1027 | |
| 1028 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1029 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 1030 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1031 | if (!memmapped_ioaddr) { |
| 1032 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1033 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1034 | goto err_out_free_mmio_region_2; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1035 | } |
| 1036 | |
| 1037 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 1038 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 1039 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 1040 | |
| 1041 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 1042 | |
| 1043 | adapter->State = SXG_STATE_INITIALIZING; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1044 | /* |
| 1045 | * Maintain a list of all adapters anchored by |
| 1046 | * the global SxgDriver structure. |
| 1047 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1048 | adapter->Next = SxgDriver.Adapters; |
| 1049 | SxgDriver.Adapters = adapter; |
| 1050 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 1051 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1052 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1053 | sxg_mcast_init_crc32(); |
| 1054 | |
| 1055 | adapter->JumboEnabled = FALSE; |
| 1056 | adapter->RssEnabled = FALSE; |
| 1057 | if (adapter->JumboEnabled) { |
| 1058 | adapter->FrameSize = JUMBOMAXFRAME; |
| 1059 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 1060 | } else { |
| 1061 | adapter->FrameSize = ETHERMAXFRAME; |
| 1062 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 1063 | } |
| 1064 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1065 | /* |
| 1066 | * status = SXG_READ_EEPROM(adapter); |
| 1067 | * if (!status) { |
| 1068 | * goto sxg_init_bad; |
| 1069 | * } |
| 1070 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1071 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1072 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1073 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1074 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1075 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1076 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1077 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1078 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1079 | |
| 1080 | adapter->vendid = pci_tbl_entry->vendor; |
| 1081 | adapter->devid = pci_tbl_entry->device; |
| 1082 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1083 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 1084 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 1085 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 1086 | adapter->irq = pcidev->irq; |
| 1087 | adapter->next_netdevice = head_netdevice; |
| 1088 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1089 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1090 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1091 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1092 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1093 | status = sxg_allocate_resources(adapter); |
| 1094 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1095 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1096 | if (status != STATUS_SUCCESS) { |
| 1097 | goto err_out_unmap; |
| 1098 | } |
| 1099 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1100 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 1101 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1102 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1103 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1104 | sxg_read_config(adapter); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1105 | status = sxg_adapter_set_hwaddr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1106 | } else { |
| 1107 | adapter->state = ADAPT_FAIL; |
| 1108 | adapter->linkstate = LINK_DOWN; |
| 1109 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 1110 | } |
| 1111 | |
| 1112 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 1113 | netdev->irq = adapter->irq; |
Alexander Beregalov | 7bea361 | 2009-03-29 19:30:46 +0400 | [diff] [blame^] | 1114 | netdev->netdev_ops = &sxg_netdev_ops; |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 1115 | SET_ETHTOOL_OPS(netdev, &sxg_nic_ethtool_ops); |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1116 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 1117 | err = sxg_set_interrupt_capability(adapter); |
| 1118 | if (err != STATUS_SUCCESS) |
| 1119 | DBG_ERROR("Cannot enable MSI-X capability\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1120 | |
| 1121 | strcpy(netdev->name, "eth%d"); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1122 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1123 | if ((err = register_netdev(netdev))) { |
| 1124 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 1125 | netdev->name); |
| 1126 | goto err_out_unmap; |
| 1127 | } |
| 1128 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1129 | netif_napi_add(netdev, &adapter->napi, |
| 1130 | sxg_poll, SXG_NETDEV_WEIGHT); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 1131 | netdev->watchdog_timeo = 2 * HZ; |
| 1132 | init_timer(&adapter->watchdog_timer); |
| 1133 | adapter->watchdog_timer.function = &sxg_watchdog; |
| 1134 | adapter->watchdog_timer.data = (unsigned long) adapter; |
| 1135 | INIT_WORK(&adapter->update_link_status, sxg_update_link_status); |
| 1136 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1137 | DBG_ERROR |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1138 | ("sxg: %s addr 0x%lx, irq %d, MAC addr \ |
| 1139 | %02X:%02X:%02X:%02X:%02X:%02X\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1140 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 1141 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 1142 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 1143 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1144 | /* sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1145 | ASSERT(status == FALSE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1146 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1147 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1148 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1149 | status, jiffies, smp_processor_id()); |
| 1150 | return status; |
| 1151 | |
| 1152 | err_out_unmap: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1153 | sxg_free_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1154 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1155 | err_out_free_mmio_region_2: |
| 1156 | |
| 1157 | mmio_start = pci_resource_start(pcidev, 2); |
| 1158 | mmio_len = pci_resource_len(pcidev, 2); |
| 1159 | release_mem_region(mmio_start, mmio_len); |
| 1160 | |
| 1161 | err_out_free_mmio_region_0: |
| 1162 | |
| 1163 | mmio_start = pci_resource_start(pcidev, 0); |
| 1164 | mmio_len = pci_resource_len(pcidev, 0); |
| 1165 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1166 | release_mem_region(mmio_start, mmio_len); |
| 1167 | |
| 1168 | err_out_exit_sxg_probe: |
| 1169 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1170 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1171 | smp_processor_id()); |
| 1172 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1173 | pci_disable_device(pcidev); |
| 1174 | DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__); |
| 1175 | kfree(netdev); |
| 1176 | printk("Exit %s, Sxg driver loading failed..\n", __FUNCTION__); |
| 1177 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1178 | return -ENODEV; |
| 1179 | } |
| 1180 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1181 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1182 | * LINE BASE Interrupt routines.. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1183 | * |
| 1184 | * sxg_disable_interrupt |
| 1185 | * |
| 1186 | * DisableInterrupt Handler |
| 1187 | * |
| 1188 | * Arguments: |
| 1189 | * |
| 1190 | * adapter: Our adapter structure |
| 1191 | * |
| 1192 | * Return Value: |
| 1193 | * None. |
| 1194 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1195 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1196 | { |
| 1197 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 1198 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1199 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1200 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1201 | /* Turn off interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1202 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 1203 | |
| 1204 | adapter->InterruptsEnabled = 0; |
| 1205 | |
| 1206 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 1207 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 1208 | } |
| 1209 | |
| 1210 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1211 | * sxg_enable_interrupt |
| 1212 | * |
| 1213 | * EnableInterrupt Handler |
| 1214 | * |
| 1215 | * Arguments: |
| 1216 | * |
| 1217 | * adapter: Our adapter structure |
| 1218 | * |
| 1219 | * Return Value: |
| 1220 | * None. |
| 1221 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1222 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1223 | { |
| 1224 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 1225 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1226 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1227 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1228 | /* Turn on interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1229 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 1230 | |
| 1231 | adapter->InterruptsEnabled = 1; |
| 1232 | |
| 1233 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 1234 | adapter, 0, 0, 0); |
| 1235 | } |
| 1236 | |
| 1237 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1238 | * sxg_isr - Process an line-based interrupt |
| 1239 | * |
| 1240 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1241 | * Context - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1242 | * QueueDefault - Output parameter to queue to default CPU |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1243 | * TargetCpus - Output bitmap to schedule DPC's |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1244 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1245 | * Return Value: TRUE if our interrupt |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1246 | */ |
| 1247 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 1248 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1249 | struct net_device *dev = (struct net_device *) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1250 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1251 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1252 | if(adapter->state != ADAPT_UP) |
| 1253 | return IRQ_NONE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1254 | adapter->Stats.NumInts++; |
| 1255 | if (adapter->Isr[0] == 0) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1256 | /* |
| 1257 | * The SLIC driver used to experience a number of spurious |
| 1258 | * interrupts due to the delay associated with the masking of |
| 1259 | * the interrupt (we'd bounce back in here). If we see that |
| 1260 | * again with Sahara,add a READ_REG of the Icr register after |
| 1261 | * the WRITE_REG below. |
| 1262 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1263 | adapter->Stats.FalseInts++; |
| 1264 | return IRQ_NONE; |
| 1265 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1266 | /* |
| 1267 | * Move the Isr contents and clear the value in |
| 1268 | * shared memory, and mask interrupts |
| 1269 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1270 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1271 | #if XXXTODO /* RSS Stuff */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1272 | /* |
| 1273 | * If RSS is enabled and the ISR specifies SXG_ISR_EVENT, then |
| 1274 | * schedule DPC's based on event queues. |
| 1275 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1276 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1277 | for (i = 0; |
| 1278 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1279 | i++) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1280 | struct sxg_event_ring *EventRing = |
| 1281 | &adapter->EventRings[i]; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1282 | struct sxg_event *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1283 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1284 | unsigned char Cpu = |
| 1285 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1286 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1287 | adapter->IsrDpcsPending++; |
| 1288 | CpuMask |= (1 << Cpu); |
| 1289 | } |
| 1290 | } |
| 1291 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1292 | /* |
| 1293 | * Now, either schedule the CPUs specified by the CpuMask, |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1294 | * or queue default |
| 1295 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1296 | if (CpuMask) { |
| 1297 | *QueueDefault = FALSE; |
| 1298 | } else { |
| 1299 | adapter->IsrDpcsPending = 1; |
| 1300 | *QueueDefault = TRUE; |
| 1301 | } |
| 1302 | *TargetCpus = CpuMask; |
| 1303 | #endif |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1304 | sxg_interrupt(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1305 | |
| 1306 | return IRQ_HANDLED; |
| 1307 | } |
| 1308 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1309 | static void sxg_interrupt(struct adapter_t *adapter) |
| 1310 | { |
| 1311 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
| 1312 | |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1313 | if (napi_schedule_prep(&adapter->napi)) { |
| 1314 | __napi_schedule(&adapter->napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1315 | } |
| 1316 | } |
| 1317 | |
| 1318 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 1319 | int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1320 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1321 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1322 | u32 NewIsr; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1323 | int sxg_napi_continue = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1324 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1325 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1326 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1327 | ASSERT(adapter->RssEnabled == FALSE); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1328 | |
| 1329 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1330 | adapter->Isr[0] = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1331 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1332 | /* Always process the event queue. */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1333 | while (sxg_napi_continue) |
| 1334 | { |
| 1335 | sxg_process_event_queue(adapter, |
| 1336 | (adapter->RssEnabled ? /*RssId */ 0 : 0), |
| 1337 | &sxg_napi_continue, work_done, budget); |
| 1338 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1339 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1340 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1341 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1342 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1343 | ASSERT(adapter->RssEnabled); |
| 1344 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1345 | adapter, 0, 0, 0); |
| 1346 | return; |
| 1347 | } |
| 1348 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1349 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1350 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1351 | /* Reenable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1352 | adapter->IsrCopy[0] = 0; |
| 1353 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1354 | adapter, NewIsr, 0, 0); |
| 1355 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1356 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1357 | adapter, 0, 0, 0); |
| 1358 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1359 | static int sxg_poll(struct napi_struct *napi, int budget) |
| 1360 | { |
| 1361 | struct adapter_t *adapter = container_of(napi, struct adapter_t, napi); |
| 1362 | int work_done = 0; |
| 1363 | |
| 1364 | sxg_handle_interrupt(adapter, &work_done, budget); |
| 1365 | |
| 1366 | if (work_done < budget) { |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1367 | napi_complete(napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1368 | WRITE_REG(adapter->UcodeRegs[0].Isr, 0, TRUE); |
| 1369 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1370 | return work_done; |
| 1371 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1372 | |
| 1373 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1374 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1375 | * message based interrupt DPC routines |
| 1376 | * |
| 1377 | * Arguments: |
| 1378 | * adapter - Our adapter structure |
| 1379 | * Queue - The ISR that needs processing |
| 1380 | * |
| 1381 | * Return Value: |
| 1382 | * None |
| 1383 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1384 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1385 | { |
| 1386 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1387 | u32 NewIsr = 0; |
| 1388 | |
| 1389 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1390 | adapter, Isr, 0, 0); |
| 1391 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1392 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1393 | if (Isr & SXG_ISR_ERR) { |
| 1394 | if (Isr & SXG_ISR_PDQF) { |
| 1395 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1396 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1397 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1398 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1399 | if (Isr & SXG_ISR_RMISS) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1400 | /* |
| 1401 | * There is a bunch of code in the SLIC driver which |
| 1402 | * attempts to process more receive events per DPC |
| 1403 | * if we start to fall behind. We'll probablyd |
| 1404 | * need to do something similar here, but hold |
| 1405 | * off for now. I don't want to make the code more |
| 1406 | * complicated than strictly needed. |
| 1407 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1408 | adapter->stats.rx_missed_errors++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1409 | if (adapter->stats.rx_missed_errors< 5) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1410 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1411 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1412 | } |
| 1413 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1414 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1415 | if (Isr & SXG_ISR_DEAD) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1416 | /* |
| 1417 | * Set aside the crash info and set the adapter state |
| 1418 | * to RESET |
| 1419 | */ |
| 1420 | adapter->CrashCpu = (unsigned char) |
| 1421 | ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1422 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1423 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1424 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1425 | adapter->CrashLocation, adapter->CrashCpu); |
| 1426 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1427 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1428 | if (Isr & SXG_ISR_ERFULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1429 | /* |
| 1430 | * Same issue as RMISS, really. This means the |
| 1431 | * host is falling behind the card. Need to increase |
| 1432 | * event ring size, process more events per interrupt, |
| 1433 | * and/or reduce/remove interrupt aggregation. |
| 1434 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1435 | adapter->Stats.EventRingFull++; |
| 1436 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1437 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1438 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1439 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1440 | if (Isr & SXG_ISR_XDROP) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1441 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1442 | } |
| 1443 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1444 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1445 | if (Isr & SXG_ISR_SPSEND) { |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1446 | sxg_complete_slow_send(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1447 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1448 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1449 | if (Isr & SXG_ISR_UPC) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1450 | /* Maybe change when debug is added.. */ |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1451 | // ASSERT(adapter->DumpCmdRunning); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1452 | adapter->DumpCmdRunning = FALSE; |
| 1453 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1454 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1455 | if (Isr & SXG_ISR_LINK) { |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 1456 | if (adapter->state != ADAPT_DOWN) { |
| 1457 | adapter->link_status_changed = 1; |
| 1458 | schedule_work(&adapter->update_link_status); |
| 1459 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1460 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1461 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1462 | if (Isr & SXG_ISR_BREAK) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1463 | /* |
| 1464 | * At the moment AGDB isn't written to support interactive |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1465 | * debug sessions. When it is, this interrupt will be used to |
| 1466 | * signal AGDB that it has hit a breakpoint. For now, ASSERT. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1467 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1468 | ASSERT(0); |
| 1469 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1470 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1471 | if (Isr & SXG_ISR_PING) { |
| 1472 | adapter->PingOutstanding = FALSE; |
| 1473 | } |
| 1474 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1475 | adapter, Isr, NewIsr, 0); |
| 1476 | |
| 1477 | return (NewIsr); |
| 1478 | } |
| 1479 | |
| 1480 | /* |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1481 | * sxg_rcv_checksum - Set the checksum for received packet |
| 1482 | * |
| 1483 | * Arguements: |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1484 | * @adapter - Adapter structure on which packet is received |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1485 | * @skb - Packet which is receieved |
| 1486 | * @Event - Event read from hardware |
| 1487 | */ |
| 1488 | |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1489 | void sxg_rcv_checksum(struct adapter_t *adapter, struct sk_buff *skb, |
| 1490 | struct sxg_event *Event) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1491 | { |
| 1492 | skb->ip_summed = CHECKSUM_NONE; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1493 | if (likely(adapter->flags & SXG_RCV_IP_CSUM_ENABLED)) { |
| 1494 | if (likely(adapter->flags & SXG_RCV_TCP_CSUM_ENABLED) |
| 1495 | && (Event->Status & EVENT_STATUS_TCPIP)) { |
| 1496 | if(!(Event->Status & EVENT_STATUS_TCPBAD)) |
| 1497 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1498 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1499 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1500 | } else if(Event->Status & EVENT_STATUS_IPONLY) { |
| 1501 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
| 1502 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1503 | } |
| 1504 | } |
| 1505 | } |
| 1506 | |
| 1507 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1508 | * sxg_process_event_queue - Process our event queue |
| 1509 | * |
| 1510 | * Arguments: |
| 1511 | * - adapter - Adapter structure |
| 1512 | * - RssId - The event queue requiring processing |
| 1513 | * |
| 1514 | * Return Value: |
| 1515 | * None. |
| 1516 | */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1517 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 1518 | int *sxg_napi_continue, int *work_done, int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1519 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1520 | struct sxg_event_ring *EventRing = &adapter->EventRings[RssId]; |
| 1521 | struct sxg_event *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1522 | u32 EventsProcessed = 0, Batches = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1523 | struct sk_buff *skb; |
| 1524 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1525 | struct sk_buff *prev_skb = NULL; |
| 1526 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1527 | u32 Index; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1528 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1529 | #endif |
| 1530 | u32 ReturnStatus = 0; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1531 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1532 | |
| 1533 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1534 | (adapter->State == SXG_STATE_PAUSING) || |
| 1535 | (adapter->State == SXG_STATE_PAUSED) || |
| 1536 | (adapter->State == SXG_STATE_HALTING)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1537 | /* |
| 1538 | * We may still have unprocessed events on the queue if |
| 1539 | * the card crashed. Don't process them. |
| 1540 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1541 | if (adapter->Dead) { |
| 1542 | return (0); |
| 1543 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1544 | /* |
| 1545 | * In theory there should only be a single processor that |
| 1546 | * accesses this queue, and only at interrupt-DPC time. So/ |
| 1547 | * we shouldn't need a lock for any of this. |
| 1548 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1549 | while (Event->Status & EVENT_STATUS_VALID) { |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1550 | (*sxg_napi_continue) = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1551 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1552 | Event, Event->Code, Event->Status, |
| 1553 | adapter->NextEvent); |
| 1554 | switch (Event->Code) { |
| 1555 | case EVENT_CODE_BUFFERS: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1556 | /* struct sxg_ring_info Head & Tail == unsigned char */ |
| 1557 | ASSERT(!(Event->CommandIndex & 0xFF00)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1558 | sxg_complete_descriptor_blocks(adapter, |
| 1559 | Event->CommandIndex); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1560 | break; |
| 1561 | case EVENT_CODE_SLOWRCV: |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1562 | (*work_done)++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1563 | --adapter->RcvBuffersOnCard; |
| 1564 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1565 | u32 rx_bytes; |
| 1566 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1567 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1568 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1569 | IndicationList, num_skbs); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1570 | /* |
| 1571 | * Linux, we just pass up each skb to the |
| 1572 | * protocol above at this point, there is no |
| 1573 | * capability of an indication list. |
| 1574 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1575 | #else |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1576 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1577 | /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
| 1578 | rx_bytes = Event->Length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1579 | adapter->stats.rx_packets++; |
| 1580 | adapter->stats.rx_bytes += rx_bytes; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1581 | sxg_rcv_checksum(adapter, skb, Event); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1582 | skb->dev = adapter->netdev; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1583 | netif_receive_skb(skb); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1584 | #endif |
| 1585 | } |
| 1586 | break; |
| 1587 | default: |
| 1588 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1589 | __func__, Event->Code); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1590 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1591 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1592 | /* |
| 1593 | * See if we need to restock card receive buffers. |
| 1594 | * There are two things to note here: |
| 1595 | * First - This test is not SMP safe. The |
| 1596 | * adapter->BuffersOnCard field is protected via atomic |
| 1597 | * interlocked calls, but we do not protect it with respect |
| 1598 | * to these tests. The only way to do that is with a lock, |
| 1599 | * and I don't want to grab a lock every time we adjust the |
| 1600 | * BuffersOnCard count. Instead, we allow the buffer |
| 1601 | * replenishment to be off once in a while. The worst that |
| 1602 | * can happen is the card is given on more-or-less descriptor |
| 1603 | * block than the arbitrary value we've chosen. No big deal |
| 1604 | * In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard |
| 1605 | * is adjusted. |
| 1606 | * Second - We expect this test to rarely |
| 1607 | * evaluate to true. We attempt to refill descriptor blocks |
| 1608 | * as they are returned to us (sxg_complete_descriptor_blocks) |
| 1609 | * so The only time this should evaluate to true is when |
| 1610 | * sxg_complete_descriptor_blocks failed to allocate |
| 1611 | * receive buffers. |
| 1612 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1613 | if (adapter->JumboEnabled) |
| 1614 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 1615 | |
| 1616 | if (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1617 | sxg_stock_rcv_buffers(adapter); |
| 1618 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1619 | /* |
| 1620 | * It's more efficient to just set this to zero. |
| 1621 | * But clearing the top bit saves potential debug info... |
| 1622 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1623 | Event->Status &= ~EVENT_STATUS_VALID; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1624 | /* Advance to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1625 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1626 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1627 | EventsProcessed++; |
| 1628 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1629 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1630 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1631 | EVENT_RING_BATCH, FALSE); |
| 1632 | EventsProcessed = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1633 | /* |
| 1634 | * If we've processed our batch limit, break out of the |
| 1635 | * loop and return SXG_ISR_EVENT to arrange for us to |
| 1636 | * be called again |
| 1637 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1638 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1639 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1640 | TRACE_NOISY, "EvtLimit", Batches, |
| 1641 | adapter->NextEvent, 0, 0); |
| 1642 | ReturnStatus = SXG_ISR_EVENT; |
| 1643 | break; |
| 1644 | } |
| 1645 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1646 | if (*work_done >= budget) { |
| 1647 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1648 | EventsProcessed, FALSE); |
| 1649 | EventsProcessed = 0; |
| 1650 | (*sxg_napi_continue) = 0; |
| 1651 | break; |
| 1652 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1653 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1654 | if (!(Event->Status & EVENT_STATUS_VALID)) |
| 1655 | (*sxg_napi_continue) = 0; |
| 1656 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1657 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1658 | /* Indicate any received dumb-nic frames */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1659 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1660 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1661 | /* Release events back to the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1662 | if (EventsProcessed) { |
| 1663 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1664 | EventsProcessed, FALSE); |
| 1665 | } |
| 1666 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1667 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1668 | |
| 1669 | return (ReturnStatus); |
| 1670 | } |
| 1671 | |
| 1672 | /* |
| 1673 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1674 | * |
| 1675 | * Arguments - |
| 1676 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1677 | * Return |
| 1678 | * None |
| 1679 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1680 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1681 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1682 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 1683 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1684 | u32 *ContextType; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1685 | struct sxg_cmd *XmtCmd; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1686 | unsigned long flags = 0; |
| 1687 | unsigned long sgl_flags = 0; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1688 | unsigned int processed_count = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1689 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1690 | /* |
| 1691 | * NOTE - This lock is dropped and regrabbed in this loop. |
| 1692 | * This means two different processors can both be running/ |
| 1693 | * through this loop. Be *very* careful. |
| 1694 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1695 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1696 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1697 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1698 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1699 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1700 | while ((XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) |
| 1701 | && processed_count++ < SXG_COMPLETE_SLOW_SEND_LIMIT) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1702 | /* |
| 1703 | * Locate the current Cmd (ring descriptor entry), and |
| 1704 | * associated SGL, and advance the tail |
| 1705 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1706 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1707 | ASSERT(ContextType); |
| 1708 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1709 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1710 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1711 | XmtCmd->Sgl = 0; |
| 1712 | |
| 1713 | switch (*ContextType) { |
| 1714 | case SXG_SGL_DUMB: |
| 1715 | { |
| 1716 | struct sk_buff *skb; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1717 | struct sxg_scatter_gather *SxgSgl = |
| 1718 | (struct sxg_scatter_gather *)ContextType; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1719 | dma64_addr_t FirstSgeAddress; |
| 1720 | u32 FirstSgeLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1721 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1722 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1723 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1724 | skb = SxgSgl->DumbPacket; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1725 | FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress; |
| 1726 | FirstSgeLength = XmtCmd->Buffer.FirstSgeLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1727 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1728 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1729 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1730 | 0, 0); |
| 1731 | ASSERT(adapter->Stats.XmtQLen); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1732 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1733 | * Now drop the lock and complete the send |
| 1734 | * back to Microsoft. We need to drop the lock |
| 1735 | * because Microsoft can come back with a |
| 1736 | * chimney send, which results in a double trip |
| 1737 | * in SxgTcpOuput |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1738 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1739 | spin_unlock_irqrestore( |
| 1740 | &adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1741 | |
| 1742 | SxgSgl->DumbPacket = NULL; |
| 1743 | SXG_COMPLETE_DUMB_SEND(adapter, skb, |
| 1744 | FirstSgeAddress, |
| 1745 | FirstSgeLength); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1746 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1747 | /* and reacquire.. */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1748 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1749 | } |
| 1750 | break; |
| 1751 | default: |
| 1752 | ASSERT(0); |
| 1753 | } |
| 1754 | } |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1755 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1756 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1757 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1758 | } |
| 1759 | |
| 1760 | /* |
| 1761 | * sxg_slow_receive |
| 1762 | * |
| 1763 | * Arguments - |
| 1764 | * adapter - A pointer to our adapter structure |
| 1765 | * Event - Receive event |
| 1766 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1767 | * Return - skb |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1768 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1769 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 1770 | struct sxg_event *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1771 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1772 | u32 BufferSize = adapter->ReceiveBufferSize; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1773 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1774 | struct sk_buff *Packet; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1775 | static int read_counter = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1776 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1777 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1778 | if(read_counter++ & 0x100) |
| 1779 | { |
| 1780 | sxg_collect_statistics(adapter); |
| 1781 | read_counter = 0; |
| 1782 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1783 | ASSERT(RcvDataBufferHdr); |
| 1784 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1785 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1786 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1787 | /*RcvDataBufferHdr->VirtualAddress*/ 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1788 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1789 | switch (adapter->State) { |
| 1790 | case SXG_STATE_RUNNING: |
| 1791 | break; |
| 1792 | case SXG_STATE_PAUSING: |
| 1793 | case SXG_STATE_PAUSED: |
| 1794 | case SXG_STATE_HALTING: |
| 1795 | goto drop; |
| 1796 | default: |
| 1797 | ASSERT(0); |
| 1798 | goto drop; |
| 1799 | } |
| 1800 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1801 | /* |
| 1802 | * memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1803 | * RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1804 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1805 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1806 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1807 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1808 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1809 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1810 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1811 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1812 | SXG_RECEIVE_DATA_LOCATION |
| 1813 | (RcvDataBufferHdr)); |
| 1814 | goto drop; |
| 1815 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1816 | #if XXXTODO /* VLAN stuff */ |
| 1817 | /* If there's a VLAN tag, extract it and validate it */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1818 | if (((struct ether_header *) |
| 1819 | (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))->EtherType |
| 1820 | == ETHERTYPE_VLAN) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1821 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1822 | STATUS_SUCCESS) { |
| 1823 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1824 | "BadVlan", Event, |
| 1825 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1826 | Event->Length, 0); |
| 1827 | goto drop; |
| 1828 | } |
| 1829 | } |
| 1830 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1831 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1832 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1833 | if (!sxg_mac_filter(adapter, |
| 1834 | (struct ether_header *)(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)), |
| 1835 | Event->Length)) { |
| 1836 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1837 | Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1838 | Event->Length, 0); |
| 1839 | goto drop; |
| 1840 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1841 | |
| 1842 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1843 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1844 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1845 | |
| 1846 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1847 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1848 | /* Lastly adjust the receive packet length. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1849 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1850 | RcvDataBufferHdr->PhysicalAddress = (dma_addr_t)NULL; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1851 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 1852 | if (RcvDataBufferHdr->skb) |
| 1853 | { |
| 1854 | spin_lock(&adapter->RcvQLock); |
| 1855 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1856 | // adapter->RcvBuffersOnCard ++; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1857 | spin_unlock(&adapter->RcvQLock); |
| 1858 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1859 | return (Packet); |
| 1860 | |
| 1861 | drop: |
| 1862 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1863 | RcvDataBufferHdr, Event->Length, 0, 0); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1864 | adapter->stats.rx_dropped++; |
| 1865 | // adapter->Stats.RcvDiscards++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1866 | spin_lock(&adapter->RcvQLock); |
| 1867 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1868 | spin_unlock(&adapter->RcvQLock); |
| 1869 | return (NULL); |
| 1870 | } |
| 1871 | |
| 1872 | /* |
| 1873 | * sxg_process_rcv_error - process receive error and update |
| 1874 | * stats |
| 1875 | * |
| 1876 | * Arguments: |
| 1877 | * adapter - Adapter structure |
| 1878 | * ErrorStatus - 4-byte receive error status |
| 1879 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1880 | * Return Value : None |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1881 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1882 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1883 | { |
| 1884 | u32 Error; |
| 1885 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1886 | adapter->stats.rx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1887 | |
| 1888 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1889 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1890 | switch (Error) { |
| 1891 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1892 | adapter->Stats.TransportCsum++; |
| 1893 | break; |
| 1894 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1895 | adapter->Stats.TransportUflow++; |
| 1896 | break; |
| 1897 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1898 | adapter->Stats.TransportHdrLen++; |
| 1899 | break; |
| 1900 | } |
| 1901 | } |
| 1902 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1903 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1904 | switch (Error) { |
| 1905 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1906 | adapter->Stats.NetworkCsum++; |
| 1907 | break; |
| 1908 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1909 | adapter->Stats.NetworkUflow++; |
| 1910 | break; |
| 1911 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1912 | adapter->Stats.NetworkHdrLen++; |
| 1913 | break; |
| 1914 | } |
| 1915 | } |
| 1916 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1917 | adapter->Stats.Parity++; |
| 1918 | } |
| 1919 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1920 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1921 | switch (Error) { |
| 1922 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1923 | adapter->Stats.LinkParity++; |
| 1924 | break; |
| 1925 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1926 | adapter->Stats.LinkEarly++; |
| 1927 | break; |
| 1928 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1929 | adapter->Stats.LinkBufOflow++; |
| 1930 | break; |
| 1931 | case SXG_RCV_STATUS_LINK_CODE: |
| 1932 | adapter->Stats.LinkCode++; |
| 1933 | break; |
| 1934 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1935 | adapter->Stats.LinkDribble++; |
| 1936 | break; |
| 1937 | case SXG_RCV_STATUS_LINK_CRC: |
| 1938 | adapter->Stats.LinkCrc++; |
| 1939 | break; |
| 1940 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1941 | adapter->Stats.LinkOflow++; |
| 1942 | break; |
| 1943 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1944 | adapter->Stats.LinkUflow++; |
| 1945 | break; |
| 1946 | } |
| 1947 | } |
| 1948 | } |
| 1949 | |
| 1950 | /* |
| 1951 | * sxg_mac_filter |
| 1952 | * |
| 1953 | * Arguments: |
| 1954 | * adapter - Adapter structure |
| 1955 | * pether - Ethernet header |
| 1956 | * length - Frame length |
| 1957 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1958 | * Return Value : TRUE if the frame is to be allowed |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1959 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1960 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 1961 | struct ether_header *EtherHdr, ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1962 | { |
| 1963 | bool EqualAddr; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1964 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1965 | |
| 1966 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1967 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1968 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1969 | if (adapter->MacFilter & MAC_BCAST) { |
| 1970 | adapter->Stats.DumbRcvBcastPkts++; |
| 1971 | adapter->Stats.DumbRcvBcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1972 | return (TRUE); |
| 1973 | } |
| 1974 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1975 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1976 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1977 | adapter->Stats.DumbRcvMcastPkts++; |
| 1978 | adapter->Stats.DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1979 | return (TRUE); |
| 1980 | } |
| 1981 | if (adapter->MacFilter & MAC_MCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1982 | struct dev_mc_list *mclist = dev->mc_list; |
| 1983 | while (mclist) { |
| 1984 | ETHER_EQ_ADDR(mclist->da_addr, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1985 | EtherHdr->ether_dhost, |
| 1986 | EqualAddr); |
| 1987 | if (EqualAddr) { |
| 1988 | adapter->Stats. |
| 1989 | DumbRcvMcastPkts++; |
| 1990 | adapter->Stats. |
| 1991 | DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1992 | return (TRUE); |
| 1993 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1994 | mclist = mclist->next; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1995 | } |
| 1996 | } |
| 1997 | } |
| 1998 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1999 | /* |
| 2000 | * Not broadcast or multicast. Must be directed at us or |
| 2001 | * the card is in promiscuous mode. Either way, consider it |
| 2002 | * ours if MAC_DIRECTED is set |
| 2003 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2004 | adapter->Stats.DumbRcvUcastPkts++; |
| 2005 | adapter->Stats.DumbRcvUcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2006 | return (TRUE); |
| 2007 | } |
| 2008 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2009 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2010 | return (TRUE); |
| 2011 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2012 | return (FALSE); |
| 2013 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2014 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2015 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2016 | { |
| 2017 | if (!adapter->intrregistered) { |
| 2018 | int retval; |
| 2019 | |
| 2020 | DBG_ERROR |
| 2021 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2022 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2023 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2024 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2025 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2026 | |
| 2027 | retval = request_irq(adapter->netdev->irq, |
| 2028 | &sxg_isr, |
| 2029 | IRQF_SHARED, |
| 2030 | adapter->netdev->name, adapter->netdev); |
| 2031 | |
| 2032 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2033 | |
| 2034 | if (retval) { |
| 2035 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 2036 | adapter->netdev->name, retval); |
| 2037 | return (retval); |
| 2038 | } |
| 2039 | adapter->intrregistered = 1; |
| 2040 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2041 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2042 | adapter->RssEnabled = FALSE; |
| 2043 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2044 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2045 | } |
| 2046 | return (STATUS_SUCCESS); |
| 2047 | } |
| 2048 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2049 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2050 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2051 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2052 | #if XXXTODO |
| 2053 | slic_init_cleanup(adapter); |
| 2054 | #endif |
| 2055 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 2056 | adapter->error_interrupts = 0; |
| 2057 | adapter->rcv_interrupts = 0; |
| 2058 | adapter->xmit_interrupts = 0; |
| 2059 | adapter->linkevent_interrupts = 0; |
| 2060 | adapter->upr_interrupts = 0; |
| 2061 | adapter->num_isrs = 0; |
| 2062 | adapter->xmit_completes = 0; |
| 2063 | adapter->rcv_broadcasts = 0; |
| 2064 | adapter->rcv_multicasts = 0; |
| 2065 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2066 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2067 | } |
| 2068 | |
| 2069 | /* |
| 2070 | * sxg_if_init |
| 2071 | * |
| 2072 | * Perform initialization of our slic interface. |
| 2073 | * |
| 2074 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2075 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2076 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2077 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2078 | int status = 0; |
| 2079 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2080 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2081 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2082 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2083 | adapter->linkstate, dev->flags); |
| 2084 | |
| 2085 | /* adapter should be down at this point */ |
| 2086 | if (adapter->state != ADAPT_DOWN) { |
| 2087 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 2088 | return (-EIO); |
| 2089 | } |
| 2090 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 2091 | |
| 2092 | adapter->devflags_prev = dev->flags; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2093 | adapter->MacFilter = MAC_DIRECTED; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2094 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2095 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2096 | adapter->netdev->name); |
| 2097 | if (dev->flags & IFF_BROADCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2098 | adapter->MacFilter |= MAC_BCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2099 | DBG_ERROR("BCAST "); |
| 2100 | } |
| 2101 | if (dev->flags & IFF_PROMISC) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2102 | adapter->MacFilter |= MAC_PROMISC; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2103 | DBG_ERROR("PROMISC "); |
| 2104 | } |
| 2105 | if (dev->flags & IFF_ALLMULTI) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2106 | adapter->MacFilter |= MAC_ALLMCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2107 | DBG_ERROR("ALL_MCAST "); |
| 2108 | } |
| 2109 | if (dev->flags & IFF_MULTICAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2110 | adapter->MacFilter |= MAC_MCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2111 | DBG_ERROR("MCAST "); |
| 2112 | } |
| 2113 | DBG_ERROR("\n"); |
| 2114 | } |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2115 | status = sxg_register_intr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2116 | if (status != STATUS_SUCCESS) { |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2117 | DBG_ERROR("sxg_if_init: sxg_register_intr FAILED %x\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2118 | status); |
| 2119 | sxg_deregister_interrupt(adapter); |
| 2120 | return (status); |
| 2121 | } |
| 2122 | |
| 2123 | adapter->state = ADAPT_UP; |
| 2124 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2125 | /* clear any pending events, then enable interrupts */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2126 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2127 | |
| 2128 | return (STATUS_SUCCESS); |
| 2129 | } |
| 2130 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2131 | void sxg_set_interrupt_aggregation(struct adapter_t *adapter) |
| 2132 | { |
| 2133 | /* |
| 2134 | * Top bit disables aggregation on xmt (SXG_AGG_XMT_DISABLE). |
| 2135 | * Make sure Max is less than 0x8000. |
| 2136 | */ |
| 2137 | adapter->max_aggregation = SXG_MAX_AGG_DEFAULT; |
| 2138 | adapter->min_aggregation = SXG_MIN_AGG_DEFAULT; |
| 2139 | WRITE_REG(adapter->UcodeRegs[0].Aggregation, |
| 2140 | ((adapter->max_aggregation << SXG_MAX_AGG_SHIFT) | |
| 2141 | adapter->min_aggregation), |
| 2142 | TRUE); |
| 2143 | } |
| 2144 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2145 | static int sxg_entry_open(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2146 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2147 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2148 | int status; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2149 | static int turn; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2150 | int sxg_initial_rcv_data_buffers = SXG_INITIAL_RCV_DATA_BUFFERS; |
| 2151 | int i; |
| 2152 | |
| 2153 | if (adapter->JumboEnabled == TRUE) { |
| 2154 | sxg_initial_rcv_data_buffers = |
| 2155 | SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS; |
| 2156 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, |
| 2157 | SXG_JUMBO_RCV_RING_SIZE); |
| 2158 | } |
| 2159 | |
| 2160 | /* |
| 2161 | * Allocate receive data buffers. We allocate a block of buffers and |
| 2162 | * a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK |
| 2163 | */ |
| 2164 | |
| 2165 | for (i = 0; i < sxg_initial_rcv_data_buffers; |
| 2166 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) |
| 2167 | { |
| 2168 | status = sxg_allocate_buffer_memory(adapter, |
| 2169 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 2170 | SXG_BUFFER_TYPE_RCV); |
| 2171 | if (status != STATUS_SUCCESS) |
| 2172 | return status; |
| 2173 | } |
| 2174 | /* |
| 2175 | * NBL resource allocation can fail in the 'AllocateComplete' routine, |
| 2176 | * which doesn't return status. Make sure we got the number of buffers |
| 2177 | * we requested |
| 2178 | */ |
| 2179 | |
| 2180 | if (adapter->FreeRcvBufferCount < sxg_initial_rcv_data_buffers) { |
| 2181 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 2182 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 2183 | 0); |
| 2184 | return (STATUS_RESOURCES); |
| 2185 | } |
| 2186 | /* |
| 2187 | * The microcode expects it to be downloaded on every open. |
| 2188 | */ |
| 2189 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __FUNCTION__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2190 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2191 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
| 2192 | __FUNCTION__); |
| 2193 | sxg_read_config(adapter); |
| 2194 | } else { |
| 2195 | adapter->state = ADAPT_FAIL; |
| 2196 | adapter->linkstate = LINK_DOWN; |
| 2197 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", |
| 2198 | status); |
| 2199 | } |
| 2200 | msleep(5); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2201 | |
| 2202 | if (turn) { |
| 2203 | sxg_second_open(adapter->netdev); |
| 2204 | |
| 2205 | return STATUS_SUCCESS; |
| 2206 | } |
| 2207 | |
| 2208 | turn++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2209 | |
| 2210 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2211 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2212 | adapter->activated); |
| 2213 | DBG_ERROR |
| 2214 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2215 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2216 | adapter->netdev, adapter, adapter->port); |
| 2217 | |
| 2218 | netif_stop_queue(adapter->netdev); |
| 2219 | |
| 2220 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2221 | if (!adapter->activated) { |
| 2222 | sxg_global.num_sxg_ports_active++; |
| 2223 | adapter->activated = 1; |
| 2224 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2225 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2226 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2227 | status = sxg_initialize_adapter(adapter); |
| 2228 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2229 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2230 | |
| 2231 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2232 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2233 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2234 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2235 | status); |
| 2236 | } |
| 2237 | |
| 2238 | if (status != STATUS_SUCCESS) { |
| 2239 | if (adapter->activated) { |
| 2240 | sxg_global.num_sxg_ports_active--; |
| 2241 | adapter->activated = 0; |
| 2242 | } |
| 2243 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2244 | sxg_global.flags); |
| 2245 | return (status); |
| 2246 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2247 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2248 | sxg_set_interrupt_aggregation(adapter); |
| 2249 | napi_enable(&adapter->napi); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2250 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2251 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2252 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2253 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2254 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2255 | |
| 2256 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2257 | return STATUS_SUCCESS; |
| 2258 | } |
| 2259 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2260 | int sxg_second_open(struct net_device * dev) |
| 2261 | { |
| 2262 | struct adapter_t *adapter = (struct adapter_t*) netdev_priv(dev); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2263 | int status = 0; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2264 | |
| 2265 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2266 | netif_start_queue(adapter->netdev); |
| 2267 | adapter->state = ADAPT_UP; |
| 2268 | adapter->linkstate = LINK_UP; |
| 2269 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2270 | status = sxg_initialize_adapter(adapter); |
| 2271 | sxg_set_interrupt_aggregation(adapter); |
| 2272 | napi_enable(&adapter->napi); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2273 | /* Re-enable interrupts */ |
| 2274 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2275 | |
Mithlesh Thukral | 544ed36 | 2009-03-20 17:35:12 +0530 | [diff] [blame] | 2276 | sxg_register_intr(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2277 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2278 | mod_timer(&adapter->watchdog_timer, jiffies); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2279 | return (STATUS_SUCCESS); |
| 2280 | |
| 2281 | } |
| 2282 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2283 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 2284 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2285 | u32 mmio_start = 0; |
| 2286 | u32 mmio_len = 0; |
| 2287 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2288 | struct net_device *dev = pci_get_drvdata(pcidev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2289 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2290 | |
| 2291 | flush_scheduled_work(); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2292 | |
| 2293 | /* Deallocate Resources */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2294 | unregister_netdev(dev); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2295 | sxg_reset_interrupt_capability(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2296 | sxg_free_resources(adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2297 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2298 | ASSERT(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2299 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2300 | mmio_start = pci_resource_start(pcidev, 0); |
| 2301 | mmio_len = pci_resource_len(pcidev, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2302 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2303 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __FUNCTION__, |
| 2304 | mmio_start, mmio_len); |
| 2305 | release_mem_region(mmio_start, mmio_len); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2306 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2307 | mmio_start = pci_resource_start(pcidev, 2); |
| 2308 | mmio_len = pci_resource_len(pcidev, 2); |
| 2309 | |
| 2310 | DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__, |
| 2311 | mmio_start, mmio_len); |
| 2312 | release_mem_region(mmio_start, mmio_len); |
| 2313 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2314 | pci_disable_device(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2315 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2316 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2317 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2318 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2319 | } |
| 2320 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2321 | static int sxg_entry_halt(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2322 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2323 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2324 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
| 2325 | int i; |
| 2326 | u32 RssIds, IsrCount; |
| 2327 | unsigned long flags; |
| 2328 | |
| 2329 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2330 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2331 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2332 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2333 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2334 | adapter->state = ADAPT_DOWN; |
| 2335 | adapter->linkstate = LINK_DOWN; |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 2336 | |
| 2337 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2338 | sxg_deregister_interrupt(adapter); |
| 2339 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 2340 | mdelay(5000); |
| 2341 | |
| 2342 | del_timer_sync(&adapter->watchdog_timer); |
| 2343 | netif_stop_queue(dev); |
| 2344 | netif_carrier_off(dev); |
| 2345 | |
| 2346 | napi_disable(&adapter->napi); |
| 2347 | |
| 2348 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 0, true); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2349 | adapter->devflags_prev = 0; |
| 2350 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2351 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2352 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2353 | spin_lock(&adapter->RcvQLock); |
| 2354 | /* Free all the blocks and the buffers, moved from remove() routine */ |
| 2355 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 2356 | sxg_free_rcvblocks(adapter); |
| 2357 | } |
| 2358 | |
| 2359 | |
| 2360 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 2361 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 2362 | InitializeListHead(&adapter->AllRcvBlocks); |
| 2363 | InitializeListHead(&adapter->FreeSglBuffers); |
| 2364 | InitializeListHead(&adapter->AllSglBuffers); |
| 2365 | |
| 2366 | adapter->FreeRcvBufferCount = 0; |
| 2367 | adapter->FreeRcvBlockCount = 0; |
| 2368 | adapter->AllRcvBlockCount = 0; |
| 2369 | adapter->RcvBuffersOnCard = 0; |
| 2370 | adapter->PendingRcvCount = 0; |
| 2371 | |
| 2372 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
| 2373 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
| 2374 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 2375 | for (i = 0; i < SXG_MAX_RING_SIZE; i++) |
| 2376 | adapter->RcvRingZeroInfo.Context[i] = NULL; |
| 2377 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 2378 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 2379 | |
| 2380 | spin_unlock(&adapter->RcvQLock); |
| 2381 | |
| 2382 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
| 2383 | adapter->AllSglBufferCount = 0; |
| 2384 | adapter->FreeSglBufferCount = 0; |
| 2385 | adapter->PendingXmtCount = 0; |
| 2386 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
| 2387 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 2388 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2389 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2390 | for (i = 0; i < SXG_MAX_RSS; i++) { |
| 2391 | adapter->NextEvent[i] = 0; |
| 2392 | } |
| 2393 | atomic_set(&adapter->pending_allocations, 0); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2394 | adapter->intrregistered = 0; |
| 2395 | sxg_remove_isr(adapter); |
| 2396 | DBG_ERROR("sxg: %s (%s) EXIT\n", __FUNCTION__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2397 | return (STATUS_SUCCESS); |
| 2398 | } |
| 2399 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2400 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2401 | { |
| 2402 | ASSERT(rq); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2403 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2404 | switch (cmd) { |
| 2405 | case SIOCSLICSETINTAGG: |
| 2406 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2407 | /* struct adapter_t *adapter = (struct adapter_t *) |
| 2408 | * netdev_priv(dev); |
| 2409 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2410 | u32 data[7]; |
| 2411 | u32 intagg; |
| 2412 | |
| 2413 | if (copy_from_user(data, rq->ifr_data, 28)) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2414 | DBG_ERROR("copy_from_user FAILED getting \ |
| 2415 | initial params\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2416 | return -EFAULT; |
| 2417 | } |
| 2418 | intagg = data[0]; |
| 2419 | printk(KERN_EMERG |
| 2420 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2421 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2422 | return 0; |
| 2423 | } |
| 2424 | |
| 2425 | default: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2426 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2427 | return -EOPNOTSUPP; |
| 2428 | } |
| 2429 | return 0; |
| 2430 | } |
| 2431 | |
| 2432 | #define NORMAL_ETHFRAME 0 |
| 2433 | |
| 2434 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2435 | * sxg_send_packets - Send a skb packet |
| 2436 | * |
| 2437 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2438 | * skb - The packet to send |
| 2439 | * dev - Our linux net device that refs our adapter |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2440 | * |
| 2441 | * Return: |
| 2442 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 2443 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2444 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2445 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2446 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2447 | u32 status = STATUS_SUCCESS; |
| 2448 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2449 | /* |
| 2450 | * DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 2451 | * skb); |
| 2452 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2453 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2454 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2455 | switch (adapter->State) { |
| 2456 | case SXG_STATE_INITIALIZING: |
| 2457 | case SXG_STATE_HALTED: |
| 2458 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2459 | ASSERT(0); /* unexpected */ |
| 2460 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2461 | case SXG_STATE_RESETTING: |
| 2462 | case SXG_STATE_SLEEP: |
| 2463 | case SXG_STATE_BOOTDIAG: |
| 2464 | case SXG_STATE_DIAG: |
| 2465 | case SXG_STATE_HALTING: |
| 2466 | status = STATUS_FAILURE; |
| 2467 | break; |
| 2468 | case SXG_STATE_RUNNING: |
| 2469 | if (adapter->LinkState != SXG_LINK_UP) { |
| 2470 | status = STATUS_FAILURE; |
| 2471 | } |
| 2472 | break; |
| 2473 | default: |
| 2474 | ASSERT(0); |
| 2475 | status = STATUS_FAILURE; |
| 2476 | } |
| 2477 | if (status != STATUS_SUCCESS) { |
| 2478 | goto xmit_fail; |
| 2479 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2480 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2481 | status = sxg_transmit_packet(adapter, skb); |
| 2482 | if (status == STATUS_SUCCESS) { |
| 2483 | goto xmit_done; |
| 2484 | } |
| 2485 | |
| 2486 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2487 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2488 | if (status != STATUS_SUCCESS) { |
| 2489 | #if XXXTODO |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2490 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2491 | #else |
| 2492 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 2493 | adapter->stats.tx_dropped++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2494 | return NETDEV_TX_BUSY; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2495 | #endif |
| 2496 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2497 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2498 | status); |
| 2499 | |
| 2500 | xmit_done: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2501 | return NETDEV_TX_OK; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2502 | } |
| 2503 | |
| 2504 | /* |
| 2505 | * sxg_transmit_packet |
| 2506 | * |
| 2507 | * This function transmits a single packet. |
| 2508 | * |
| 2509 | * Arguments - |
| 2510 | * adapter - Pointer to our adapter structure |
| 2511 | * skb - The packet to be sent |
| 2512 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2513 | * Return - STATUS of send |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2514 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2515 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2516 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2517 | struct sxg_x64_sgl *pSgl; |
| 2518 | struct sxg_scatter_gather *SxgSgl; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2519 | unsigned long sgl_flags; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2520 | /* void *SglBuffer; */ |
| 2521 | /* u32 SglBufferLength; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2522 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2523 | /* |
| 2524 | * The vast majority of work is done in the shared |
| 2525 | * sxg_dumb_sgl routine. |
| 2526 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2527 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2528 | adapter, skb, 0, 0); |
| 2529 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2530 | /* Allocate a SGL buffer */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2531 | SXG_GET_SGL_BUFFER(adapter, SxgSgl, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2532 | if (!SxgSgl) { |
| 2533 | adapter->Stats.NoSglBuf++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2534 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2535 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2536 | adapter, skb, 0, 0); |
| 2537 | return (STATUS_RESOURCES); |
| 2538 | } |
| 2539 | ASSERT(SxgSgl->adapter == adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2540 | /*SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2541 | SglBufferLength = SXG_SGL_BUF_SIZE; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2542 | SxgSgl->VlanTag.VlanTci = 0; |
| 2543 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2544 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2545 | SxgSgl->DumbPacket = skb; |
| 2546 | pSgl = NULL; |
| 2547 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2548 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2549 | return (sxg_dumb_sgl(pSgl, SxgSgl)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2550 | } |
| 2551 | |
| 2552 | /* |
| 2553 | * sxg_dumb_sgl |
| 2554 | * |
| 2555 | * Arguments: |
| 2556 | * pSgl - |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2557 | * SxgSgl - struct sxg_scatter_gather |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2558 | * |
| 2559 | * Return Value: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2560 | * Status of send operation. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2561 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2562 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2563 | struct sxg_scatter_gather *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2564 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2565 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2566 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2567 | /* For now, all dumb-nic sends go on RSS queue zero */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2568 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 2569 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2570 | struct sxg_cmd *XmtCmd = NULL; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2571 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2572 | u32 DataLength = skb->len; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2573 | /* unsigned int BufLen; */ |
| 2574 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2575 | u64 phys_addr; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2576 | unsigned long flags; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2577 | unsigned long queue_id=0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2578 | |
| 2579 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2580 | pSgl, SxgSgl, 0, 0); |
| 2581 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2582 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2583 | SxgSgl->pSgl = pSgl; |
| 2584 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2585 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2586 | ASSERT(sizeof(struct sxg_x64_sge) == sizeof(struct sxg_x64_sge)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2587 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2588 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2589 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2590 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2591 | /* |
| 2592 | * From here below we work with the SGL placed in our |
| 2593 | * buffer. |
| 2594 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2595 | |
| 2596 | SxgSgl->Sgl.NumberOfElements = 1; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2597 | /* |
| 2598 | * Set ucode Queue ID based on bottom bits of destination TCP port. |
| 2599 | * This Queue ID splits slowpath/dumb-nic packet processing across |
| 2600 | * multiple threads on the card to improve performance. It is split |
| 2601 | * using the TCP port to avoid out-of-order packets that can result |
| 2602 | * from multithreaded processing. We use the destination port because |
| 2603 | * we expect to be run on a server, so in nearly all cases the local |
| 2604 | * port is likely to be constant (well-known server port) and the |
| 2605 | * remote port is likely to be random. The exception to this is iSCSI, |
| 2606 | * in which case we use the sport instead. Note |
| 2607 | * that original attempt at XOR'ing source and dest port resulted in |
| 2608 | * poor balance on NTTTCP/iometer applications since they tend to |
| 2609 | * line up (even-even, odd-odd..). |
| 2610 | */ |
| 2611 | |
| 2612 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2613 | struct iphdr *ip; |
| 2614 | |
| 2615 | ip = ip_hdr(skb); |
| 2616 | if ((ip->protocol == IPPROTO_TCP)&&(DataLength >= sizeof( |
| 2617 | struct tcphdr))){ |
| 2618 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2619 | (ntohs (tcp_hdr(skb)->source) & |
| 2620 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2621 | (ntohs(tcp_hdr(skb)->dest) & |
| 2622 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2623 | } |
| 2624 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2625 | if ((ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) && (DataLength >= |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2626 | sizeof(struct tcphdr)) ) { |
| 2627 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2628 | (ntohs (tcp_hdr(skb)->source) & |
| 2629 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2630 | (ntohs(tcp_hdr(skb)->dest) & |
| 2631 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2632 | } |
| 2633 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2634 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2635 | /* Grab the spinlock and acquire a command */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2636 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2637 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2638 | if (XmtCmd == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2639 | /* |
| 2640 | * Call sxg_complete_slow_send to see if we can |
| 2641 | * free up any XmtRingZero entries and then try again |
| 2642 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2643 | |
| 2644 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 2645 | sxg_complete_slow_send(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2646 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2647 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2648 | if (XmtCmd == NULL) { |
| 2649 | adapter->Stats.XmtZeroFull++; |
| 2650 | goto abortcmd; |
| 2651 | } |
| 2652 | } |
| 2653 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2654 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2655 | /* Update stats */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2656 | adapter->stats.tx_packets++; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2657 | adapter->stats.tx_bytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2658 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2659 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2660 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2661 | adapter->Stats.DumbXmtBcastPkts++; |
| 2662 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2663 | } else { |
| 2664 | adapter->Stats.DumbXmtMcastPkts++; |
| 2665 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2666 | } |
| 2667 | } else { |
| 2668 | adapter->Stats.DumbXmtUcastPkts++; |
| 2669 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2670 | } |
| 2671 | #endif |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2672 | /* |
| 2673 | * Fill in the command |
| 2674 | * Copy out the first SGE to the command and adjust for offset |
| 2675 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2676 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2677 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2678 | |
| 2679 | /* |
| 2680 | * SAHARA SGL WORKAROUND |
| 2681 | * See if the SGL straddles a 64k boundary. If so, skip to |
| 2682 | * the start of the next 64k boundary and continue |
| 2683 | */ |
| 2684 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2685 | if ((adapter->asictype == SAHARA_REV_A) && |
| 2686 | (SXG_INVALID_SGL(phys_addr,skb->data_len))) |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2687 | { |
| 2688 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2689 | /* Silently drop this packet */ |
| 2690 | printk(KERN_EMERG"Dropped a packet for 64k boundary problem\n"); |
| 2691 | return STATUS_SUCCESS; |
| 2692 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2693 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2694 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2695 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2696 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2697 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2698 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2699 | XmtCmd->Flags = 0; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2700 | |
| 2701 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 2702 | /* |
| 2703 | * We need to set the Checkum in IP header to 0. This is |
| 2704 | * required by hardware. |
| 2705 | */ |
| 2706 | ip_hdr(skb)->check = 0x0; |
| 2707 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_IP; |
| 2708 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_TCP; |
| 2709 | /* Dont know if length will require a change in case of VLAN */ |
| 2710 | XmtCmd->CsumFlags.MacLen = ETH_HLEN; |
| 2711 | XmtCmd->CsumFlags.IpHl = skb_network_header_len(skb) >> |
| 2712 | SXG_NW_HDR_LEN_SHIFT; |
| 2713 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2714 | /* |
| 2715 | * Advance transmit cmd descripter by 1. |
| 2716 | * NOTE - See comments in SxgTcpOutput where we write |
| 2717 | * to the XmtCmd register regarding CPU ID values and/or |
| 2718 | * multiple commands. |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2719 | * Top 16 bits specify queue_id. See comments about queue_id above |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2720 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2721 | /* Four queues at the moment */ |
| 2722 | ASSERT((queue_id & ~SXG_LARGE_SEND_QUEUE_MASK) == 0); |
| 2723 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, ((queue_id << 16) | 1), TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2724 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2725 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2726 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2727 | XmtCmd, pSgl, SxgSgl, 0); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2728 | return STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2729 | |
| 2730 | abortcmd: |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2731 | /* |
| 2732 | * NOTE - Only jump to this label AFTER grabbing the |
| 2733 | * XmtZeroLock, and DO NOT DROP IT between the |
| 2734 | * command allocation and the following abort. |
| 2735 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2736 | if (XmtCmd) { |
| 2737 | SXG_ABORT_CMD(XmtRingInfo); |
| 2738 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2739 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2740 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2741 | /* |
| 2742 | * failsgl: |
| 2743 | * Jump to this label if failure occurs before the |
| 2744 | * XmtZeroLock is grabbed |
| 2745 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2746 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2747 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2748 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2749 | /* SxgSgl->DumbPacket is the skb */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2750 | // SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2751 | |
| 2752 | return STATUS_FAILURE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2753 | } |
| 2754 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2755 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2756 | * Link management functions |
| 2757 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2758 | * sxg_initialize_link - Initialize the link stuff |
| 2759 | * |
| 2760 | * Arguments - |
| 2761 | * adapter - A pointer to our adapter structure |
| 2762 | * |
| 2763 | * Return |
| 2764 | * status |
| 2765 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2766 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2767 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2768 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2769 | u32 Value; |
| 2770 | u32 ConfigData; |
| 2771 | u32 MaxFrame; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2772 | u32 AxgMacReg1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2773 | int status; |
| 2774 | |
| 2775 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2776 | adapter, 0, 0, 0); |
| 2777 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2778 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2779 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2780 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2781 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2782 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2783 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2784 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2785 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2786 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2787 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2788 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2789 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2790 | /* |
| 2791 | * Link address 0 |
| 2792 | * XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) |
| 2793 | * is stored with the first nibble (0a) in the byte 0 |
| 2794 | * of the Mac address. Possibly reverse? |
| 2795 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2796 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2797 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2798 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2799 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2800 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2801 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2802 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2803 | Value = ntohl(Value); |
| 2804 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2805 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2806 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2807 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2808 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2809 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2810 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2811 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2812 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2813 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2814 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2815 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2816 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2817 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2818 | /* Configure MAC */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2819 | AxgMacReg1 = ( /* Enable XMT */ |
| 2820 | AXGMAC_CFG1_XMT_EN | |
| 2821 | /* Enable receive */ |
| 2822 | AXGMAC_CFG1_RCV_EN | |
| 2823 | /* short frame detection */ |
| 2824 | AXGMAC_CFG1_SHORT_ASSERT | |
| 2825 | /* Verify frame length */ |
| 2826 | AXGMAC_CFG1_CHECK_LEN | |
| 2827 | /* Generate FCS */ |
| 2828 | AXGMAC_CFG1_GEN_FCS | |
| 2829 | /* Pad frames to 64 bytes */ |
| 2830 | AXGMAC_CFG1_PAD_64); |
| 2831 | |
| 2832 | if (adapter->XmtFcEnabled) { |
| 2833 | AxgMacReg1 |= AXGMAC_CFG1_XMT_PAUSE; /* Allow sending of pause */ |
| 2834 | } |
| 2835 | if (adapter->RcvFcEnabled) { |
| 2836 | AxgMacReg1 |= AXGMAC_CFG1_RCV_PAUSE; /* Enable detection of pause */ |
| 2837 | } |
| 2838 | |
| 2839 | WRITE_REG(HwRegs->MacConfig1, AxgMacReg1, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2840 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2841 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2842 | if (adapter->JumboEnabled) { |
| 2843 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2844 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2845 | /* |
| 2846 | * AMIIM Configuration Register - |
| 2847 | * The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion |
| 2848 | * (bottom bits) of this register is used to determine the MDC frequency |
| 2849 | * as specified in the A-XGMAC Design Document. This value must not be |
| 2850 | * zero. The following value (62 or 0x3E) is based on our MAC transmit |
| 2851 | * clock frequency (MTCLK) of 312.5 MHz. Given a maximum MDIO clock |
| 2852 | * frequency of 2.5 MHz (see the PHY spec), we get: |
| 2853 | * 312.5/(2*(X+1)) < 2.5 ==> X = 62. |
| 2854 | * This value happens to be the default value for this register, so we |
| 2855 | * really don't have to do this. |
| 2856 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2857 | if (adapter->asictype == SAHARA_REV_B) { |
| 2858 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000001F, TRUE); |
| 2859 | } else { |
| 2860 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2861 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2862 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2863 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2864 | WRITE_REG(HwRegs->LinkStatus, |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2865 | (LS_PHY_CLR_RESET | |
| 2866 | LS_XGXS_ENABLE | |
| 2867 | LS_XGXS_CTL | |
| 2868 | LS_PHY_CLK_EN | |
| 2869 | LS_ATTN_ALARM), |
| 2870 | TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2871 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2872 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2873 | /* |
| 2874 | * Per information given by Aeluros, wait 100 ms after removing reset. |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2875 | * It's not enough to wait for the self-clearing reset bit in reg 0 to |
| 2876 | * clear. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2877 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2878 | mdelay(100); |
| 2879 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2880 | /* Verify the PHY has come up by checking that the Reset bit has |
| 2881 | * cleared. |
| 2882 | */ |
| 2883 | status = sxg_read_mdio_reg(adapter, |
| 2884 | MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2885 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
| 2886 | &Value); |
| 2887 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, |
| 2888 | (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2889 | if (status != STATUS_SUCCESS) |
| 2890 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2891 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2892 | return (STATUS_FAILURE); |
| 2893 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2894 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2895 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2896 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2897 | return (STATUS_FAILURE); |
| 2898 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2899 | /* The XAUI link should also be up - confirm */ |
| 2900 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2901 | return (STATUS_FAILURE); |
| 2902 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2903 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2904 | status = sxg_phy_init(adapter); |
| 2905 | if (status != STATUS_SUCCESS) |
| 2906 | return (STATUS_FAILURE); |
| 2907 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2908 | /* Enable the Link Alarm */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2909 | |
| 2910 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2911 | * LASI_CONTROL - LASI control register |
| 2912 | * LASI_CTL_LS_ALARM_ENABLE - enable link alarm bit |
| 2913 | */ |
| 2914 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2915 | LASI_CONTROL, |
| 2916 | LASI_CTL_LS_ALARM_ENABLE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2917 | if (status != STATUS_SUCCESS) |
| 2918 | return (STATUS_FAILURE); |
| 2919 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2920 | /* XXXTODO - temporary - verify bit is set */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2921 | |
| 2922 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2923 | * LASI_CONTROL - LASI control register |
| 2924 | */ |
| 2925 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2926 | LASI_CONTROL, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2927 | &Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2928 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2929 | if (status != STATUS_SUCCESS) |
| 2930 | return (STATUS_FAILURE); |
| 2931 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2932 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2933 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2934 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2935 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2936 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2937 | RCV_CONFIG_ENPARSE | |
| 2938 | RCV_CONFIG_RCVBAD | |
| 2939 | RCV_CONFIG_RCVPAUSE | |
| 2940 | RCV_CONFIG_TZIPV6 | |
| 2941 | RCV_CONFIG_TZIPV4 | |
| 2942 | RCV_CONFIG_HASH_16 | |
| 2943 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2944 | |
| 2945 | if (adapter->asictype == SAHARA_REV_B) { |
| 2946 | ConfigData |= (RCV_CONFIG_HIPRICTL | |
| 2947 | RCV_CONFIG_NEWSTATUSFMT); |
| 2948 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2949 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2950 | |
| 2951 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2952 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2953 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2954 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2955 | |
| 2956 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2957 | adapter, 0, 0, 0); |
| 2958 | return (STATUS_SUCCESS); |
| 2959 | } |
| 2960 | |
| 2961 | /* |
| 2962 | * sxg_phy_init - Initialize the PHY |
| 2963 | * |
| 2964 | * Arguments - |
| 2965 | * adapter - A pointer to our adapter structure |
| 2966 | * |
| 2967 | * Return |
| 2968 | * status |
| 2969 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2970 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2971 | { |
| 2972 | u32 Value; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2973 | struct phy_ucode *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2974 | int status; |
| 2975 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2976 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2977 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2978 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2979 | * 0xC205 - PHY ID register (?) |
| 2980 | * &Value - XXXTODO - add def |
| 2981 | */ |
| 2982 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2983 | 0xC205, |
| 2984 | &Value); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2985 | if (status != STATUS_SUCCESS) |
| 2986 | return (STATUS_FAILURE); |
| 2987 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2988 | if (Value == 0x0012) { |
| 2989 | /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
| 2990 | DBG_ERROR("AEL2005C PHY detected. Downloading PHY \ |
| 2991 | microcode.\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2992 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2993 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2994 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2995 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2996 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2997 | mdelay(p->Data); |
| 2998 | } else { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2999 | /* write the given data to the specified address */ |
| 3000 | status = sxg_write_mdio_reg(adapter, |
| 3001 | MIIM_DEV_PHY_PMA, |
| 3002 | /* PHY address */ |
| 3003 | p->Addr, |
| 3004 | /* PHY data */ |
| 3005 | p->Data); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3006 | if (status != STATUS_SUCCESS) |
| 3007 | return (STATUS_FAILURE); |
| 3008 | } |
| 3009 | } |
| 3010 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3011 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3012 | |
| 3013 | return (STATUS_SUCCESS); |
| 3014 | } |
| 3015 | |
| 3016 | /* |
| 3017 | * sxg_link_event - Process a link event notification from the card |
| 3018 | * |
| 3019 | * Arguments - |
| 3020 | * adapter - A pointer to our adapter structure |
| 3021 | * |
| 3022 | * Return |
| 3023 | * None |
| 3024 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3025 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3026 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3027 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3028 | struct net_device *netdev = adapter->netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3029 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3030 | int status; |
| 3031 | u32 Value; |
| 3032 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3033 | if (adapter->state == ADAPT_DOWN) |
| 3034 | return; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3035 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 3036 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3037 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3038 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3039 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3040 | READ_REG(HwRegs->LinkStatus, Value); |
| 3041 | if (Value & LS_LINK_ALARM) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3042 | /* |
| 3043 | * We got a Link Status alarm. First, pause to let the |
| 3044 | * link state settle (it can bounce a number of times) |
| 3045 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3046 | mdelay(10); |
| 3047 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3048 | /* Now clear the alarm by reading the LASI status register. */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3049 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3050 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3051 | /* LASI status register */ |
| 3052 | LASI_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3053 | &Value); |
| 3054 | if (status != STATUS_SUCCESS) { |
| 3055 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 3056 | sxg_link_state(adapter, SXG_LINK_DOWN); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3057 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3058 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 3059 | /* |
| 3060 | * We used to assert that the LASI_LS_ALARM bit was set, as |
| 3061 | * it should be. But there appears to be cases during |
| 3062 | * initialization (when the PHY is reset and re-initialized) |
| 3063 | * when we get a link alarm, but the status bit is 0 when we |
| 3064 | * read it. Rather than trying to assure this never happens |
| 3065 | * (and nver being certain), just ignore it. |
| 3066 | |
| 3067 | * ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 3068 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3069 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3070 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3071 | LinkState = sxg_get_link_state(adapter); |
| 3072 | sxg_link_state(adapter, LinkState); |
| 3073 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 3074 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3075 | if (LinkState == SXG_LINK_UP) { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3076 | netif_carrier_on(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3077 | netif_tx_start_all_queues(netdev); |
| 3078 | } else { |
| 3079 | netif_tx_stop_all_queues(netdev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3080 | netif_carrier_off(netdev); |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 3081 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3082 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3083 | /* |
| 3084 | * XXXTODO - Assuming Link Attention is only being generated |
| 3085 | * for the Link Alarm pin (and not for a XAUI Link Status change) |
| 3086 | * , then it's impossible to get here. Yet we've gotten here |
| 3087 | * twice (under extreme conditions - bouncing the link up and |
| 3088 | * down many times a second). Needs further investigation. |
| 3089 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3090 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 3091 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3092 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3093 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3094 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3095 | |
| 3096 | } |
| 3097 | |
| 3098 | /* |
| 3099 | * sxg_get_link_state - Determine if the link is up or down |
| 3100 | * |
| 3101 | * Arguments - |
| 3102 | * adapter - A pointer to our adapter structure |
| 3103 | * |
| 3104 | * Return |
| 3105 | * Link State |
| 3106 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3107 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3108 | { |
| 3109 | int status; |
| 3110 | u32 Value; |
| 3111 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3112 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3113 | |
| 3114 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 3115 | adapter, 0, 0, 0); |
| 3116 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3117 | /* |
| 3118 | * Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if |
| 3119 | * the following 3 bits (from 3 different MDIO registers) are all true. |
| 3120 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3121 | |
| 3122 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3123 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3124 | /* PMA/PMD Receive Signal Detect register */ |
| 3125 | PHY_PMA_RCV_DET, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3126 | &Value); |
| 3127 | if (status != STATUS_SUCCESS) |
| 3128 | goto bad; |
| 3129 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3130 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3131 | if (!(Value & PMA_RCV_DETECT)) |
| 3132 | return (SXG_LINK_DOWN); |
| 3133 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3134 | /* MIIM_DEV_PHY_PCS - PHY PCS module */ |
| 3135 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, |
| 3136 | /* PCS 10GBASE-R Status 1 register */ |
| 3137 | PHY_PCS_10G_STATUS1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3138 | &Value); |
| 3139 | if (status != STATUS_SUCCESS) |
| 3140 | goto bad; |
| 3141 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3142 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3143 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 3144 | return (SXG_LINK_DOWN); |
| 3145 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3146 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS,/* PHY XS module */ |
| 3147 | /* XS Lane Status register */ |
| 3148 | PHY_XS_LANE_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3149 | &Value); |
| 3150 | if (status != STATUS_SUCCESS) |
| 3151 | goto bad; |
| 3152 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3153 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3154 | if (!(Value & XS_LANE_ALIGN)) |
| 3155 | return (SXG_LINK_DOWN); |
| 3156 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3157 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3158 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3159 | |
| 3160 | return (SXG_LINK_UP); |
| 3161 | |
| 3162 | bad: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3163 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3164 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 3165 | ASSERT(0); |
| 3166 | return (SXG_LINK_DOWN); |
| 3167 | } |
| 3168 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3169 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 3170 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3171 | { |
| 3172 | if (adapter->LinkState == SXG_LINK_UP) { |
| 3173 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3174 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3175 | netif_start_queue(adapter->netdev); |
| 3176 | } else { |
| 3177 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3178 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3179 | netif_stop_queue(adapter->netdev); |
| 3180 | } |
| 3181 | } |
| 3182 | |
| 3183 | /* |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 3184 | * sxg_change_mtu - Change the Maximum Transfer Unit |
| 3185 | * * @returns 0 on success, negative on failure |
| 3186 | */ |
| 3187 | int sxg_change_mtu (struct net_device *netdev, int new_mtu) |
| 3188 | { |
| 3189 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(netdev); |
| 3190 | |
| 3191 | if (!((new_mtu == SXG_DEFAULT_MTU) || (new_mtu == SXG_JUMBO_MTU))) |
| 3192 | return -EINVAL; |
| 3193 | |
| 3194 | if(new_mtu == netdev->mtu) |
| 3195 | return 0; |
| 3196 | |
| 3197 | netdev->mtu = new_mtu; |
| 3198 | |
| 3199 | if (new_mtu == SXG_JUMBO_MTU) { |
| 3200 | adapter->JumboEnabled = TRUE; |
| 3201 | adapter->FrameSize = JUMBOMAXFRAME; |
| 3202 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 3203 | } else { |
| 3204 | adapter->JumboEnabled = FALSE; |
| 3205 | adapter->FrameSize = ETHERMAXFRAME; |
| 3206 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 3207 | } |
| 3208 | |
| 3209 | sxg_entry_halt(netdev); |
| 3210 | sxg_entry_open(netdev); |
| 3211 | return 0; |
| 3212 | } |
| 3213 | |
| 3214 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3215 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 3216 | * This routine the central point of processing for all link state changes. |
| 3217 | * Nothing else in the driver should alter the link state or perform |
| 3218 | * link state indications |
| 3219 | * |
| 3220 | * Arguments - |
| 3221 | * adapter - A pointer to our adapter structure |
| 3222 | * LinkState - The link state |
| 3223 | * |
| 3224 | * Return |
| 3225 | * None |
| 3226 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3227 | static void sxg_link_state(struct adapter_t *adapter, |
| 3228 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3229 | { |
| 3230 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 3231 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 3232 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3233 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3234 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3235 | /* |
| 3236 | * Hold the adapter lock during this routine. Maybe move |
| 3237 | * the lock to the caller. |
| 3238 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3239 | /* IMP TODO : Check if we can survive without taking this lock */ |
| 3240 | // spin_lock(&adapter->AdapterLock); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3241 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3242 | /* Nothing changed.. */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3243 | // spin_unlock(&adapter->AdapterLock); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3244 | DBG_ERROR("EXIT #0 %s. Link status = %d\n", |
| 3245 | __func__, LinkState); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3246 | return; |
| 3247 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3248 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3249 | adapter->LinkState = LinkState; |
| 3250 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3251 | /* Drop the lock and indicate link state */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3252 | // spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3253 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3254 | |
| 3255 | sxg_indicate_link_state(adapter, LinkState); |
| 3256 | } |
| 3257 | |
| 3258 | /* |
| 3259 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 3260 | * |
| 3261 | * Arguments - |
| 3262 | * adapter - A pointer to our adapter structure |
| 3263 | * DevAddr - MDIO device number being addressed |
| 3264 | * RegAddr - register address for the specified MDIO device |
| 3265 | * Value - value to write to the MDIO register |
| 3266 | * |
| 3267 | * Return |
| 3268 | * status |
| 3269 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3270 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3271 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3272 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3273 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3274 | /* Address operation (written to MIIM field reg) */ |
| 3275 | u32 AddrOp; |
| 3276 | /* Write operation (written to MIIM field reg) */ |
| 3277 | u32 WriteOp; |
| 3278 | u32 Cmd;/* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3279 | u32 ValueRead; |
| 3280 | u32 Timeout; |
| 3281 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3282 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3283 | |
| 3284 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3285 | adapter, 0, 0, 0); |
| 3286 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3287 | /* Ensure values don't exceed field width */ |
| 3288 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3289 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 3290 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3291 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3292 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3293 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3294 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3295 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3296 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3297 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3298 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3299 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3300 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3301 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3302 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 3303 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3304 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3305 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3306 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3307 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3308 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3309 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3310 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3311 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3312 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3313 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3314 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3315 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3316 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3317 | Timeout = SXG_LINK_TIMEOUT; |
| 3318 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3319 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3320 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3321 | if (--Timeout == 0) { |
| 3322 | return (STATUS_FAILURE); |
| 3323 | } |
| 3324 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3325 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3326 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3327 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3328 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3329 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3330 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 3331 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3332 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3333 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3334 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3335 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3336 | Timeout = SXG_LINK_TIMEOUT; |
| 3337 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3338 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3339 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3340 | if (--Timeout == 0) { |
| 3341 | return (STATUS_FAILURE); |
| 3342 | } |
| 3343 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3344 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3345 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3346 | |
| 3347 | return (STATUS_SUCCESS); |
| 3348 | } |
| 3349 | |
| 3350 | /* |
| 3351 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 3352 | * |
| 3353 | * Arguments - |
| 3354 | * adapter - A pointer to our adapter structure |
| 3355 | * DevAddr - MDIO device number being addressed |
| 3356 | * RegAddr - register address for the specified MDIO device |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3357 | * pValue - pointer to where to put data read from the MDIO register |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3358 | * |
| 3359 | * Return |
| 3360 | * status |
| 3361 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3362 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3363 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3364 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3365 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3366 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 3367 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 3368 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3369 | u32 ValueRead; |
| 3370 | u32 Timeout; |
| 3371 | |
| 3372 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3373 | adapter, 0, 0, 0); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3374 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3375 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3376 | /* Ensure values don't exceed field width */ |
| 3377 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3378 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3379 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3380 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3381 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3382 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3383 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3384 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3385 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3386 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3387 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3388 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3389 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3390 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 3391 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3392 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3393 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3394 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3395 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3396 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3397 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3398 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3399 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3400 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3401 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3402 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3403 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3404 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3405 | Timeout = SXG_LINK_TIMEOUT; |
| 3406 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3407 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3408 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3409 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3410 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 3411 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3412 | return (STATUS_FAILURE); |
| 3413 | } |
| 3414 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3415 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3416 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3417 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3418 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3419 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3420 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 3421 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3422 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3423 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3424 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3425 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3426 | Timeout = SXG_LINK_TIMEOUT; |
| 3427 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3428 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3429 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3430 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3431 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 3432 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3433 | return (STATUS_FAILURE); |
| 3434 | } |
| 3435 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3436 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3437 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3438 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3439 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3440 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3441 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3442 | |
| 3443 | return (STATUS_SUCCESS); |
| 3444 | } |
| 3445 | |
| 3446 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3447 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 3448 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 3449 | * the polynomial: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3450 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 |
| 3451 | * + x^4 + x^2 + x^1. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3452 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3453 | * After the CRC for the 6 bytes is generated (but before the value is |
| 3454 | * complemented), we must then transpose the value and return bits 30-23. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3455 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3456 | static u32 sxg_crc_table[256];/* Table of CRC's for all possible byte values */ |
| 3457 | static u32 sxg_crc_init; /* Is table initialized */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3458 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3459 | /* Contruct the CRC32 table */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3460 | static void sxg_mcast_init_crc32(void) |
| 3461 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3462 | u32 c; /* CRC shit reg */ |
| 3463 | u32 e = 0; /* Poly X-or pattern */ |
| 3464 | int i; /* counter */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3465 | int k; /* byte being shifted into crc */ |
| 3466 | |
| 3467 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 3468 | |
| 3469 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 3470 | e |= 1L << (31 - p[i]); |
| 3471 | } |
| 3472 | |
| 3473 | for (i = 1; i < 256; i++) { |
| 3474 | c = i; |
| 3475 | for (k = 8; k; k--) { |
| 3476 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 3477 | } |
| 3478 | sxg_crc_table[i] = c; |
| 3479 | } |
| 3480 | } |
| 3481 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3482 | /* |
| 3483 | * Return the MAC hast as described above. |
| 3484 | */ |
| 3485 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 3486 | { |
| 3487 | u32 crc; |
| 3488 | char *p; |
| 3489 | int i; |
| 3490 | unsigned char machash = 0; |
| 3491 | |
| 3492 | if (!sxg_crc_init) { |
| 3493 | sxg_mcast_init_crc32(); |
| 3494 | sxg_crc_init = 1; |
| 3495 | } |
| 3496 | |
| 3497 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 3498 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 3499 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 3500 | } |
| 3501 | |
| 3502 | /* Return bits 1-8, transposed */ |
| 3503 | for (i = 1; i < 9; i++) { |
| 3504 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 3505 | } |
| 3506 | |
| 3507 | return (machash); |
| 3508 | } |
| 3509 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3510 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3511 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3512 | struct sxg_ucode_regs *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3513 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3514 | DBG_ERROR("%s ENTER (%s) MacFilter[%x] mask[%llx]\n", __FUNCTION__, |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3515 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 3516 | adapter->MulticastMask); |
| 3517 | |
| 3518 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3519 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3520 | * Turn on all multicast addresses. We have to do this for |
| 3521 | * promiscuous mode as well as ALLMCAST mode. It saves the |
| 3522 | * Microcode from having keep state about the MAC configuration |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3523 | */ |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3524 | /* DBG_ERROR("sxg: %s MacFilter = MAC_ALLMCAST | MAC_PROMISC\n \ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3525 | * SLUT MODE!!!\n",__func__); |
| 3526 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3527 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 3528 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3529 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high \ |
| 3530 | * 0xFFFFFFFF\n",__func__, adapter->netdev->name); |
| 3531 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3532 | |
| 3533 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3534 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3535 | * Commit our multicast mast to the SLIC by writing to the |
| 3536 | * multicast address mask registers |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3537 | */ |
| 3538 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 3539 | __func__, adapter->netdev->name, |
| 3540 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 3541 | ((ulong) |
| 3542 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 3543 | |
| 3544 | WRITE_REG(sxg_regs->McastLow, |
| 3545 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 3546 | WRITE_REG(sxg_regs->McastHigh, |
| 3547 | (u32) ((adapter-> |
| 3548 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 3549 | } |
| 3550 | } |
| 3551 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3552 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3553 | { |
| 3554 | unsigned char crcpoly; |
| 3555 | |
| 3556 | /* Get the CRC polynomial for the mac address */ |
| 3557 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 3558 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3559 | /* |
| 3560 | * We only have space on the SLIC for 64 entries. Lop |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3561 | * off the top two bits. (2^6 = 64) |
| 3562 | */ |
| 3563 | crcpoly &= 0x3F; |
| 3564 | |
| 3565 | /* OR in the new bit into our 64 bit mask. */ |
| 3566 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 3567 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3568 | |
| 3569 | /* |
| 3570 | * Function takes MAC addresses from dev_mc_list and generates the Mask |
| 3571 | */ |
| 3572 | |
| 3573 | static void sxg_set_mcast_addr(struct adapter_t *adapter) |
| 3574 | { |
| 3575 | struct dev_mc_list *mclist; |
| 3576 | struct net_device *dev = adapter->netdev; |
| 3577 | int i; |
| 3578 | |
| 3579 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_MCAST)) { |
| 3580 | for (i = 0, mclist = dev->mc_list; i < dev->mc_count; |
| 3581 | i++, mclist = mclist->next) { |
| 3582 | sxg_mcast_set_bit(adapter,mclist->da_addr); |
| 3583 | } |
| 3584 | } |
| 3585 | sxg_mcast_set_mask(adapter); |
| 3586 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3587 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3588 | static void sxg_mcast_set_list(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3589 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3590 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3591 | |
| 3592 | ASSERT(adapter); |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3593 | if (dev->flags & IFF_PROMISC) |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3594 | adapter->MacFilter |= MAC_PROMISC; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3595 | if (dev->flags & IFF_MULTICAST) |
| 3596 | adapter->MacFilter |= MAC_MCAST; |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3597 | if (dev->flags & IFF_ALLMULTI) |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3598 | adapter->MacFilter |= MAC_ALLMCAST; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3599 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3600 | //XXX handle other flags as well |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3601 | sxg_set_mcast_addr(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3602 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3603 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3604 | void sxg_free_sgl_buffers(struct adapter_t *adapter) |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3605 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3606 | struct list_entry *ple; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3607 | struct sxg_scatter_gather *Sgl; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3608 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3609 | while(!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3610 | ple = RemoveHeadList(&adapter->AllSglBuffers); |
| 3611 | Sgl = container_of(ple, struct sxg_scatter_gather, AllList); |
| 3612 | kfree(Sgl); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3613 | adapter->AllSglBufferCount--; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3614 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3615 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3616 | |
| 3617 | void sxg_free_rcvblocks(struct adapter_t *adapter) |
| 3618 | { |
| 3619 | u32 i; |
| 3620 | void *temp_RcvBlock; |
| 3621 | struct list_entry *ple; |
| 3622 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
| 3623 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3624 | ASSERT((adapter->state == SXG_STATE_INITIALIZING) || |
| 3625 | (adapter->state == SXG_STATE_HALTING)); |
| 3626 | while(!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3627 | |
| 3628 | ple = RemoveHeadList(&adapter->AllRcvBlocks); |
| 3629 | RcvBlockHdr = container_of(ple, struct sxg_rcv_block_hdr, AllList); |
| 3630 | |
| 3631 | if(RcvBlockHdr->VirtualAddress) { |
| 3632 | temp_RcvBlock = RcvBlockHdr->VirtualAddress; |
| 3633 | |
| 3634 | for(i=0; i< SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3635 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3636 | RcvDataBufferHdr = |
| 3637 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
| 3638 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3639 | } |
| 3640 | } |
| 3641 | |
| 3642 | pci_free_consistent(adapter->pcidev, |
| 3643 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 3644 | RcvBlockHdr->VirtualAddress, |
| 3645 | RcvBlockHdr->PhysicalAddress); |
| 3646 | adapter->AllRcvBlockCount--; |
| 3647 | } |
| 3648 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3649 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3650 | adapter, 0, 0, 0); |
| 3651 | } |
| 3652 | void sxg_free_mcast_addrs(struct adapter_t *adapter) |
| 3653 | { |
| 3654 | struct sxg_multicast_address *address; |
| 3655 | while(adapter->MulticastAddrs) { |
| 3656 | address = adapter->MulticastAddrs; |
| 3657 | adapter->MulticastAddrs = address->Next; |
| 3658 | kfree(address); |
| 3659 | } |
| 3660 | |
| 3661 | adapter->MulticastMask= 0; |
| 3662 | } |
| 3663 | |
| 3664 | void sxg_unmap_resources(struct adapter_t *adapter) |
| 3665 | { |
| 3666 | if(adapter->HwRegs) { |
| 3667 | iounmap((void *)adapter->HwRegs); |
| 3668 | } |
| 3669 | if(adapter->UcodeRegs) { |
| 3670 | iounmap((void *)adapter->UcodeRegs); |
| 3671 | } |
| 3672 | |
| 3673 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3674 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3675 | adapter, 0, 0, 0); |
| 3676 | } |
| 3677 | |
| 3678 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3679 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3680 | /* |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3681 | * sxg_free_resources - Free everything allocated in SxgAllocateResources |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3682 | * |
| 3683 | * Arguments - |
| 3684 | * adapter - A pointer to our adapter structure |
| 3685 | * |
| 3686 | * Return |
| 3687 | * none |
| 3688 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3689 | void sxg_free_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3690 | { |
| 3691 | u32 RssIds, IsrCount; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3692 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 3693 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3694 | |
| 3695 | if (adapter->BasicAllocations == FALSE) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3696 | /* |
| 3697 | * No allocations have been made, including spinlocks, |
| 3698 | * or listhead initializations. Return. |
| 3699 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3700 | return; |
| 3701 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3702 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3703 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3704 | sxg_free_rcvblocks(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3705 | } |
| 3706 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3707 | sxg_free_sgl_buffers(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3708 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3709 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3710 | if (adapter->XmtRingZeroIndex) { |
| 3711 | pci_free_consistent(adapter->pcidev, |
| 3712 | sizeof(u32), |
| 3713 | adapter->XmtRingZeroIndex, |
| 3714 | adapter->PXmtRingZeroIndex); |
| 3715 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3716 | if (adapter->Isr) { |
| 3717 | pci_free_consistent(adapter->pcidev, |
| 3718 | sizeof(u32) * IsrCount, |
| 3719 | adapter->Isr, adapter->PIsr); |
| 3720 | } |
| 3721 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3722 | if (adapter->EventRings) { |
| 3723 | pci_free_consistent(adapter->pcidev, |
| 3724 | sizeof(struct sxg_event_ring) * RssIds, |
| 3725 | adapter->EventRings, adapter->PEventRings); |
| 3726 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3727 | if (adapter->RcvRings) { |
| 3728 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3729 | sizeof(struct sxg_rcv_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3730 | adapter->RcvRings, |
| 3731 | adapter->PRcvRings); |
| 3732 | adapter->RcvRings = NULL; |
| 3733 | } |
| 3734 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3735 | if(adapter->XmtRings) { |
| 3736 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3737 | sizeof(struct sxg_xmt_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3738 | adapter->XmtRings, |
| 3739 | adapter->PXmtRings); |
| 3740 | adapter->XmtRings = NULL; |
| 3741 | } |
| 3742 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3743 | if (adapter->ucode_stats) { |
| 3744 | pci_unmap_single(adapter->pcidev, |
| 3745 | sizeof(struct sxg_ucode_stats), |
| 3746 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 3747 | adapter->ucode_stats = NULL; |
| 3748 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3749 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3750 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3751 | /* Unmap register spaces */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3752 | sxg_unmap_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3753 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3754 | sxg_free_mcast_addrs(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3755 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3756 | adapter->BasicAllocations = FALSE; |
| 3757 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3758 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3759 | |
| 3760 | /* |
| 3761 | * sxg_allocate_complete - |
| 3762 | * |
| 3763 | * This routine is called when a memory allocation has completed. |
| 3764 | * |
| 3765 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3766 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3767 | * VirtualAddress - Memory virtual address |
| 3768 | * PhysicalAddress - Memory physical address |
| 3769 | * Length - Length of memory allocated (or 0) |
| 3770 | * Context - The type of buffer allocated |
| 3771 | * |
| 3772 | * Return |
| 3773 | * None. |
| 3774 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3775 | static int sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3776 | void *VirtualAddress, |
| 3777 | dma_addr_t PhysicalAddress, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3778 | u32 Length, enum sxg_buffer_type Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3779 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3780 | int status = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3781 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3782 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3783 | ASSERT(atomic_read(&adapter->pending_allocations)); |
| 3784 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3785 | |
| 3786 | switch (Context) { |
| 3787 | |
| 3788 | case SXG_BUFFER_TYPE_RCV: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3789 | status = sxg_allocate_rcvblock_complete(adapter, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3790 | VirtualAddress, |
| 3791 | PhysicalAddress, Length); |
| 3792 | break; |
| 3793 | case SXG_BUFFER_TYPE_SGL: |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3794 | sxg_allocate_sgl_buffer_complete(adapter, (struct sxg_scatter_gather *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3795 | VirtualAddress, |
| 3796 | PhysicalAddress, Length); |
| 3797 | break; |
| 3798 | } |
| 3799 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3800 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3801 | |
| 3802 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3803 | } |
| 3804 | |
| 3805 | /* |
| 3806 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3807 | * synchronous and asynchronous buffer allocations |
| 3808 | * |
| 3809 | * Arguments - |
| 3810 | * adapter - A pointer to our adapter structure |
| 3811 | * Size - block size to allocate |
| 3812 | * BufferType - Type of buffer to allocate |
| 3813 | * |
| 3814 | * Return |
| 3815 | * int |
| 3816 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3817 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3818 | u32 Size, enum sxg_buffer_type BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3819 | { |
| 3820 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3821 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3822 | dma_addr_t pBuffer; |
| 3823 | |
| 3824 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3825 | adapter, Size, BufferType, 0); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3826 | /* |
| 3827 | * Grab the adapter lock and check the state. If we're in anything other |
| 3828 | * than INITIALIZING or RUNNING state, fail. This is to prevent |
| 3829 | * allocations in an improper driver state |
| 3830 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3831 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3832 | atomic_inc(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3833 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3834 | if(BufferType != SXG_BUFFER_TYPE_SGL) |
| 3835 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3836 | else { |
| 3837 | Buffer = kzalloc(Size, GFP_ATOMIC); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 3838 | pBuffer = (dma_addr_t)NULL; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3839 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3840 | if (Buffer == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3841 | /* |
| 3842 | * Decrement the AllocationsPending count while holding |
| 3843 | * the lock. Pause processing relies on this |
| 3844 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3845 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3846 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3847 | adapter, Size, BufferType, 0); |
| 3848 | return (STATUS_RESOURCES); |
| 3849 | } |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3850 | status = sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3851 | |
| 3852 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3853 | adapter, Size, BufferType, status); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3854 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3855 | } |
| 3856 | |
| 3857 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3858 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor |
| 3859 | * block allocation |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3860 | * |
| 3861 | * Arguments - |
| 3862 | * adapter - A pointer to our adapter structure |
| 3863 | * RcvBlock - receive block virtual address |
| 3864 | * PhysicalAddress - Physical address |
| 3865 | * Length - Memory length |
| 3866 | * |
| 3867 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3868 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3869 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3870 | void *RcvBlock, |
| 3871 | dma_addr_t PhysicalAddress, |
| 3872 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3873 | { |
| 3874 | u32 i; |
| 3875 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3876 | u64 Paddr; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3877 | void *temp_RcvBlock; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3878 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3879 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3880 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3881 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3882 | |
| 3883 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3884 | adapter, RcvBlock, Length, 0); |
| 3885 | if (RcvBlock == NULL) { |
| 3886 | goto fail; |
| 3887 | } |
| 3888 | memset(RcvBlock, 0, Length); |
| 3889 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3890 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3891 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3892 | /* |
| 3893 | * First, initialize the contained pool of receive data buffers. |
| 3894 | * This initialization requires NBL/NB/MDL allocations, if any of them |
| 3895 | * fail, free the block and return without queueing the shared memory |
| 3896 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3897 | //RcvDataBuffer = RcvBlock; |
| 3898 | temp_RcvBlock = RcvBlock; |
| 3899 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3900 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3901 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 3902 | temp_RcvBlock; |
| 3903 | /* For FREE macro assertion */ |
| 3904 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 3905 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 3906 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3907 | goto fail; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3908 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3909 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3910 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3911 | /* |
| 3912 | * Place this entire block of memory on the AllRcvBlocks queue so it |
| 3913 | * can be free later |
| 3914 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3915 | |
| 3916 | RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock + |
| 3917 | SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3918 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3919 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3920 | spin_lock(&adapter->RcvQLock); |
| 3921 | adapter->AllRcvBlockCount++; |
| 3922 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3923 | spin_unlock(&adapter->RcvQLock); |
| 3924 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3925 | /* Now free the contained receive data buffers that we |
| 3926 | * initialized above */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3927 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3928 | for (i = 0, Paddr = PhysicalAddress; |
| 3929 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3930 | i++, Paddr += SXG_RCV_DATA_HDR_SIZE, |
| 3931 | temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3932 | RcvDataBufferHdr = |
| 3933 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3934 | spin_lock(&adapter->RcvQLock); |
| 3935 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3936 | spin_unlock(&adapter->RcvQLock); |
| 3937 | } |
| 3938 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3939 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3940 | RcvDescriptorBlock = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3941 | (struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3942 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3943 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3944 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3945 | (struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3946 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3947 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3948 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3949 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3950 | spin_lock(&adapter->RcvQLock); |
| 3951 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3952 | spin_unlock(&adapter->RcvQLock); |
| 3953 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3954 | adapter, RcvBlock, Length, 0); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3955 | return STATUS_SUCCESS; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3956 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3957 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3958 | if (RcvBlock) { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3959 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3960 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3961 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3962 | RcvDataBufferHdr = |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3963 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3964 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3965 | } |
| 3966 | pci_free_consistent(adapter->pcidev, |
| 3967 | Length, RcvBlock, PhysicalAddress); |
| 3968 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3969 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3970 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3971 | adapter, adapter->FreeRcvBufferCount, |
| 3972 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3973 | adapter->Stats.NoMem++; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3974 | /* As allocation failed, free all previously allocated blocks..*/ |
| 3975 | //sxg_free_rcvblocks(adapter); |
| 3976 | |
| 3977 | return STATUS_RESOURCES; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3978 | } |
| 3979 | |
| 3980 | /* |
| 3981 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3982 | * |
| 3983 | * Arguments - |
| 3984 | * adapter - A pointer to our adapter structure |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3985 | * SxgSgl - struct sxg_scatter_gather buffer |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3986 | * PhysicalAddress - Physical address |
| 3987 | * Length - Memory length |
| 3988 | * |
| 3989 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3990 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3991 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3992 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3993 | dma_addr_t PhysicalAddress, |
| 3994 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3995 | { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3996 | unsigned long sgl_flags; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3997 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3998 | adapter, SxgSgl, Length, 0); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3999 | spin_lock_irqsave(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4000 | adapter->AllSglBufferCount++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4001 | /* PhysicalAddress; */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4002 | SxgSgl->PhysicalAddress = PhysicalAddress; |
| 4003 | /* Initialize backpointer once */ |
| 4004 | SxgSgl->adapter = adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4005 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 4006 | spin_unlock_irqrestore(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4007 | SxgSgl->State = SXG_BUFFER_BUSY; |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 4008 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4009 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 4010 | adapter, SxgSgl, Length, 0); |
| 4011 | } |
| 4012 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4013 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4014 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4015 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4016 | /* |
| 4017 | * DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] \ |
| 4018 | * funct#[%d]\n", __func__, card->config_set, |
| 4019 | * adapter->port, adapter->physport, adapter->functionnumber); |
| 4020 | * |
| 4021 | * sxg_dbg_macaddrs(adapter); |
| 4022 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4023 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", |
| 4024 | * __FUNCTION__); |
| 4025 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4026 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4027 | /* sxg_dbg_macaddrs(adapter); */ |
| 4028 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4029 | struct net_device * dev = adapter->netdev; |
| 4030 | if(!dev) |
| 4031 | { |
| 4032 | printk("sxg: Dev is Null\n"); |
| 4033 | } |
| 4034 | |
| 4035 | DBG_ERROR("%s ENTER (%s)\n", __FUNCTION__, adapter->netdev->name); |
| 4036 | |
| 4037 | if (netif_running(dev)) { |
| 4038 | return -EBUSY; |
| 4039 | } |
| 4040 | if (!adapter) { |
| 4041 | return -EBUSY; |
| 4042 | } |
| 4043 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4044 | if (!(adapter->currmacaddr[0] || |
| 4045 | adapter->currmacaddr[1] || |
| 4046 | adapter->currmacaddr[2] || |
| 4047 | adapter->currmacaddr[3] || |
| 4048 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 4049 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 4050 | } |
| 4051 | if (adapter->netdev) { |
| 4052 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4053 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4054 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4055 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4056 | sxg_dbg_macaddrs(adapter); |
| 4057 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4058 | return 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4059 | } |
| 4060 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4061 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4062 | static int sxg_mac_set_address(struct net_device *dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4063 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4064 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4065 | struct sockaddr *addr = ptr; |
| 4066 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4067 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4068 | |
| 4069 | if (netif_running(dev)) { |
| 4070 | return -EBUSY; |
| 4071 | } |
| 4072 | if (!adapter) { |
| 4073 | return -EBUSY; |
| 4074 | } |
| 4075 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4076 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4077 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4078 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4079 | adapter->currmacaddr[5]); |
| 4080 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 4081 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 4082 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4083 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4084 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4085 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4086 | adapter->currmacaddr[5]); |
| 4087 | |
| 4088 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4089 | return 0; |
| 4090 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4091 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4092 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4093 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4094 | * SXG DRIVER FUNCTIONS (below) |
| 4095 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4096 | * sxg_initialize_adapter - Initialize adapter |
| 4097 | * |
| 4098 | * Arguments - |
| 4099 | * adapter - A pointer to our adapter structure |
| 4100 | * |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4101 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4102 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4103 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4104 | { |
| 4105 | u32 RssIds, IsrCount; |
| 4106 | u32 i; |
| 4107 | int status; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4108 | int sxg_rcv_ring_size = SXG_RCV_RING_SIZE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4109 | |
| 4110 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 4111 | adapter, 0, 0, 0); |
| 4112 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4113 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 4114 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4115 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4116 | /* |
| 4117 | * Sanity check SXG_UCODE_REGS structure definition to |
| 4118 | * make sure the length is correct |
| 4119 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4120 | ASSERT(sizeof(struct sxg_ucode_regs) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4121 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4122 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4123 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 4124 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4125 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4126 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 4127 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 4128 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 4129 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4130 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4131 | WRITE_REG64(adapter, |
| 4132 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 4133 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 4134 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4135 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4136 | for (i = 0; i < IsrCount; i++) { |
| 4137 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4138 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4139 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 4140 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 4141 | } |
| 4142 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4143 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4144 | WRITE_REG64(adapter, |
| 4145 | adapter->UcodeRegs[0].SPSendIndex, |
| 4146 | adapter->PXmtRingZeroIndex, 0); |
| 4147 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4148 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4149 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4150 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4151 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 4152 | TRUE); |
| 4153 | } |
| 4154 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4155 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4156 | WRITE_REG64(adapter, |
| 4157 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 4158 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 4159 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4160 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4161 | WRITE_REG64(adapter, |
| 4162 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4163 | if (adapter->JumboEnabled == TRUE) |
| 4164 | sxg_rcv_ring_size = SXG_JUMBO_RCV_RING_SIZE; |
| 4165 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, sxg_rcv_ring_size, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4166 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4167 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4168 | sxg_stock_rcv_buffers(adapter); |
| 4169 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4170 | /* |
| 4171 | * Initialize checksum offload capabilities. At the moment we always |
| 4172 | * enable IP and TCP receive checksums on the card. Depending on the |
| 4173 | * checksum configuration specified by the user, we can choose to |
| 4174 | * report or ignore the checksum information provided by the card. |
| 4175 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4176 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 4177 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 4178 | |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 4179 | adapter->flags |= (SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED ); |
| 4180 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4181 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4182 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4183 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4184 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4185 | status); |
| 4186 | if (status != STATUS_SUCCESS) { |
| 4187 | return (status); |
| 4188 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4189 | /* |
| 4190 | * Initialize Dead to FALSE. |
| 4191 | * SlicCheckForHang or SlicDumpThread will take it from here. |
| 4192 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4193 | adapter->Dead = FALSE; |
| 4194 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 4195 | adapter->XmtFcEnabled = TRUE; |
| 4196 | adapter->RcvFcEnabled = TRUE; |
| 4197 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4198 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4199 | |
| 4200 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 4201 | adapter, 0, 0, 0); |
| 4202 | return (STATUS_SUCCESS); |
| 4203 | } |
| 4204 | |
| 4205 | /* |
| 4206 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 4207 | * the card. The caller should hold the RcvQLock |
| 4208 | * |
| 4209 | * Arguments - |
| 4210 | * adapter - A pointer to our adapter structure |
| 4211 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 4212 | * |
| 4213 | * Return |
| 4214 | * status |
| 4215 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4216 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4217 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4218 | { |
| 4219 | u32 i; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4220 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4221 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 4222 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 4223 | struct sxg_cmd *RingDescriptorCmd; |
| 4224 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4225 | |
| 4226 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 4227 | adapter, adapter->RcvBuffersOnCard, |
| 4228 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4229 | |
| 4230 | ASSERT(RcvDescriptorBlockHdr); |
| 4231 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4232 | /* |
| 4233 | * If we don't have the resources to fill the descriptor block, |
| 4234 | * return failure |
| 4235 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4236 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 4237 | SXG_RING_FULL(RcvRingInfo)) { |
| 4238 | adapter->Stats.NoMem++; |
| 4239 | return (STATUS_FAILURE); |
| 4240 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4241 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4242 | SXG_GET_CMD(RingZero, |
| 4243 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4244 | ASSERT(RingDescriptorCmd); |
| 4245 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4246 | RcvDescriptorBlock = (struct sxg_rcv_descriptor_block *) |
| 4247 | RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4248 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4249 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4250 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 4251 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4252 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4253 | // ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4254 | if (!RcvDataBufferHdr->SxgDumbRcvPacket) { |
| 4255 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, |
| 4256 | adapter->ReceiveBufferSize); |
| 4257 | if(RcvDataBufferHdr->skb) |
| 4258 | RcvDataBufferHdr->SxgDumbRcvPacket = |
| 4259 | RcvDataBufferHdr->skb; |
| 4260 | else |
| 4261 | goto no_memory; |
| 4262 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4263 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 4264 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4265 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4266 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4267 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4268 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4269 | RcvDataBufferHdr->PhysicalAddress; |
| 4270 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4271 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4272 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 4273 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4274 | /* |
| 4275 | * RcvBuffersOnCard is not protected via the receive lock (see |
| 4276 | * sxg_process_event_queue) We don't want to grap a lock every time a |
| 4277 | * buffer is returned to us, so we use atomic interlocked functions |
| 4278 | * instead. |
| 4279 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4280 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 4281 | |
| 4282 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 4283 | RcvDescriptorBlockHdr, |
| 4284 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4285 | |
| 4286 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 4287 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 4288 | adapter, adapter->RcvBuffersOnCard, |
| 4289 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4290 | return (STATUS_SUCCESS); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4291 | no_memory: |
Mithlesh Thukral | b9d1081 | 2009-02-18 18:52:18 +0530 | [diff] [blame] | 4292 | for (; i >= 0 ; i--) { |
| 4293 | if (RcvDescriptorBlock->Descriptors[i].VirtualAddress) { |
| 4294 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 4295 | RcvDescriptorBlock->Descriptors[i]. |
| 4296 | VirtualAddress; |
| 4297 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4298 | (dma_addr_t)NULL; |
| 4299 | RcvDescriptorBlock->Descriptors[i].VirtualAddress=NULL; |
| 4300 | } |
| 4301 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4302 | } |
| 4303 | RcvDescriptorBlockHdr->State = SXG_BUFFER_FREE; |
| 4304 | SXG_RETURN_CMD(RingZero, RcvRingInfo, RingDescriptorCmd, |
| 4305 | RcvDescriptorBlockHdr); |
| 4306 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4307 | return (-ENOMEM); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4308 | } |
| 4309 | |
| 4310 | /* |
| 4311 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 4312 | * |
| 4313 | * Arguments - |
| 4314 | * adapter - A pointer to our adapter structure |
| 4315 | * |
| 4316 | * Return |
| 4317 | * None |
| 4318 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4319 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4320 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4321 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4322 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
| 4323 | int sxg_min_rcv_data_buffers = SXG_MIN_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4324 | |
| 4325 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 4326 | adapter, adapter->RcvBuffersOnCard, |
| 4327 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4328 | /* |
| 4329 | * First, see if we've got less than our minimum threshold of |
| 4330 | * receive buffers, there isn't an allocation in progress, and |
| 4331 | * we haven't exceeded our maximum.. get another block of buffers |
| 4332 | * None of this needs to be SMP safe. It's round numbers. |
| 4333 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4334 | if (adapter->JumboEnabled == TRUE) |
| 4335 | sxg_min_rcv_data_buffers = SXG_MIN_JUMBO_RCV_DATA_BUFFERS; |
| 4336 | if ((adapter->FreeRcvBufferCount < sxg_min_rcv_data_buffers) && |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4337 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4338 | (atomic_read(&adapter->pending_allocations) == 0)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4339 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 4340 | SXG_RCV_BLOCK_SIZE |
| 4341 | (SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4342 | SXG_BUFFER_TYPE_RCV); |
| 4343 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4344 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4345 | spin_lock(&adapter->RcvQLock); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4346 | if (adapter->JumboEnabled) |
| 4347 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 4348 | while (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4349 | struct list_entry *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4350 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4351 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4352 | RcvDescriptorBlockHdr = NULL; |
| 4353 | if (adapter->FreeRcvBlockCount) { |
| 4354 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4355 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4356 | container_of(_ple, struct sxg_rcv_descriptor_block_hdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4357 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4358 | adapter->FreeRcvBlockCount--; |
| 4359 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 4360 | } |
| 4361 | |
| 4362 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4363 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4364 | adapter->Stats.NoMem++; |
| 4365 | break; |
| 4366 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4367 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4368 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 4369 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4370 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4371 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4372 | RcvDescriptorBlockHdr); |
| 4373 | break; |
| 4374 | } |
| 4375 | } |
| 4376 | spin_unlock(&adapter->RcvQLock); |
| 4377 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 4378 | adapter, adapter->RcvBuffersOnCard, |
| 4379 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4380 | } |
| 4381 | |
| 4382 | /* |
| 4383 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 4384 | * completed by the microcode |
| 4385 | * |
| 4386 | * Arguments - |
| 4387 | * adapter - A pointer to our adapter structure |
| 4388 | * Index - Where the microcode is up to |
| 4389 | * |
| 4390 | * Return |
| 4391 | * None |
| 4392 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4393 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4394 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4395 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4396 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
| 4397 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4398 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
| 4399 | struct sxg_cmd *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4400 | |
| 4401 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 4402 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4403 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4404 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4405 | spin_lock(&adapter->RcvQLock); |
| 4406 | ASSERT(Index != RcvRingInfo->Tail); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4407 | while (sxg_ring_get_forward_diff(RcvRingInfo, Index, |
| 4408 | RcvRingInfo->Tail) > 3) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4409 | /* |
| 4410 | * Locate the current Cmd (ring descriptor entry), and |
| 4411 | * associated receive descriptor block, and advance |
| 4412 | * the tail |
| 4413 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4414 | SXG_RETURN_CMD(RingZero, |
| 4415 | RcvRingInfo, |
| 4416 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4417 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 4418 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 4419 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4420 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4421 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4422 | RingDescriptorCmd->Sgl = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4423 | /* |
| 4424 | * Attempt to refill it and hand it right back to the |
| 4425 | * card. If we fail to refill it, free the descriptor block |
| 4426 | * header. The card will be restocked later via the |
| 4427 | * RcvBuffersOnCard test |
| 4428 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4429 | if (sxg_fill_descriptor_block(adapter, |
| 4430 | RcvDescriptorBlockHdr) == STATUS_FAILURE) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4431 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4432 | RcvDescriptorBlockHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4433 | } |
| 4434 | spin_unlock(&adapter->RcvQLock); |
| 4435 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 4436 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4437 | } |
| 4438 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4439 | /* |
| 4440 | * Read the statistics which the card has been maintaining. |
| 4441 | */ |
| 4442 | void sxg_collect_statistics(struct adapter_t *adapter) |
| 4443 | { |
| 4444 | if(adapter->ucode_stats) |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4445 | WRITE_REG64(adapter, adapter->UcodeRegs[0].GetUcodeStats, |
| 4446 | adapter->pucode_stats, 0); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4447 | adapter->stats.rx_fifo_errors = adapter->ucode_stats->ERDrops; |
| 4448 | adapter->stats.rx_over_errors = adapter->ucode_stats->NBDrops; |
| 4449 | adapter->stats.tx_fifo_errors = adapter->ucode_stats->XDrops; |
| 4450 | } |
| 4451 | |
| 4452 | static struct net_device_stats *sxg_get_stats(struct net_device * dev) |
| 4453 | { |
| 4454 | struct adapter_t *adapter = netdev_priv(dev); |
| 4455 | |
| 4456 | sxg_collect_statistics(adapter); |
| 4457 | return (&adapter->stats); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4458 | } |
| 4459 | |
Mithlesh Thukral | e5ea8da | 2009-03-20 17:37:32 +0530 | [diff] [blame] | 4460 | static void sxg_watchdog(unsigned long data) |
| 4461 | { |
| 4462 | struct adapter_t *adapter = (struct adapter_t *) data; |
| 4463 | |
| 4464 | if (adapter->state != ADAPT_DOWN) { |
| 4465 | sxg_link_event(adapter); |
| 4466 | /* Reset the timer */ |
| 4467 | mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ)); |
| 4468 | } |
| 4469 | } |
| 4470 | |
| 4471 | static void sxg_update_link_status (struct work_struct *work) |
| 4472 | { |
| 4473 | struct adapter_t *adapter = (struct adapter_t *)container_of |
| 4474 | (work, struct adapter_t, update_link_status); |
| 4475 | if (likely(adapter->link_status_changed)) { |
| 4476 | sxg_link_event(adapter); |
| 4477 | adapter->link_status_changed = 0; |
| 4478 | } |
| 4479 | } |
| 4480 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4481 | static struct pci_driver sxg_driver = { |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 4482 | .name = sxg_driver_name, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4483 | .id_table = sxg_pci_tbl, |
| 4484 | .probe = sxg_entry_probe, |
| 4485 | .remove = sxg_entry_remove, |
| 4486 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 4487 | .suspend = sxgpm_suspend, |
| 4488 | .resume = sxgpm_resume, |
| 4489 | #endif |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4490 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4491 | }; |
| 4492 | |
| 4493 | static int __init sxg_module_init(void) |
| 4494 | { |
| 4495 | sxg_init_driver(); |
| 4496 | |
| 4497 | if (debug >= 0) |
| 4498 | sxg_debug = debug; |
| 4499 | |
| 4500 | return pci_register_driver(&sxg_driver); |
| 4501 | } |
| 4502 | |
| 4503 | static void __exit sxg_module_cleanup(void) |
| 4504 | { |
| 4505 | pci_unregister_driver(&sxg_driver); |
| 4506 | } |
| 4507 | |
| 4508 | module_init(sxg_module_init); |
| 4509 | module_exit(sxg_module_cleanup); |