Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port |
| 3 | * |
| 4 | * Copyright (C) 2008 Nokia Corporation |
| 5 | * |
Jarkko Nikula | 7ec41ee | 2011-08-11 15:44:57 +0300 | [diff] [blame] | 6 | * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com> |
Peter Ujfalusi | 56a8742 | 2011-05-03 18:14:06 +0300 | [diff] [blame] | 7 | * Peter Ujfalusi <peter.ujfalusi@ti.com> |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * version 2 as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 21 | * 02110-1301 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/device.h> |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 28 | #include <linux/pm_runtime.h> |
Peter Ujfalusi | 11dd586 | 2012-08-16 16:41:08 +0300 | [diff] [blame] | 29 | #include <linux/of.h> |
| 30 | #include <linux/of_device.h> |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 31 | #include <sound/core.h> |
| 32 | #include <sound/pcm.h> |
| 33 | #include <sound/pcm_params.h> |
| 34 | #include <sound/initval.h> |
| 35 | #include <sound/soc.h> |
| 36 | |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 37 | #include <plat/cpu.h> |
Arnd Bergmann | 2203747 | 2012-08-24 15:21:06 +0200 | [diff] [blame] | 38 | #include <linux/platform_data/asoc-ti-mcbsp.h> |
Peter Ujfalusi | 219f431 | 2012-02-03 13:11:47 +0200 | [diff] [blame] | 39 | #include "mcbsp.h" |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 40 | #include "omap-mcbsp.h" |
| 41 | #include "omap-pcm.h" |
| 42 | |
Jarkko Nikula | 0b60485 | 2008-11-12 17:05:51 +0200 | [diff] [blame] | 43 | #define OMAP_MCBSP_RATES (SNDRV_PCM_RATE_8000_96000) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 44 | |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 45 | #define OMAP_MCBSP_SOC_SINGLE_S16_EXT(xname, xmin, xmax, \ |
| 46 | xhandler_get, xhandler_put) \ |
| 47 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 48 | .info = omap_mcbsp_st_info_volsw, \ |
| 49 | .get = xhandler_get, .put = xhandler_put, \ |
| 50 | .private_value = (unsigned long) &(struct soc_mixer_control) \ |
| 51 | {.min = xmin, .max = xmax} } |
| 52 | |
Peter Ujfalusi | 219f431 | 2012-02-03 13:11:47 +0200 | [diff] [blame] | 53 | enum { |
| 54 | OMAP_MCBSP_WORD_8 = 0, |
| 55 | OMAP_MCBSP_WORD_12, |
| 56 | OMAP_MCBSP_WORD_16, |
| 57 | OMAP_MCBSP_WORD_20, |
| 58 | OMAP_MCBSP_WORD_24, |
| 59 | OMAP_MCBSP_WORD_32, |
| 60 | }; |
| 61 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 62 | /* |
| 63 | * Stream DMA parameters. DMA request line and port address are set runtime |
| 64 | * since they are different between OMAP1 and later OMAPs |
| 65 | */ |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 66 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) |
| 67 | { |
| 68 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 69 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 70 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 71 | struct omap_pcm_dma_data *dma_data; |
Peter Ujfalusi | 3f02403 | 2010-06-03 07:39:35 +0300 | [diff] [blame] | 72 | int words; |
Eduardo Valentin | a0a499c | 2009-08-20 16:18:26 +0300 | [diff] [blame] | 73 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 74 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 75 | |
Peter Ujfalusi | 778a17c | 2012-03-15 12:20:32 +0200 | [diff] [blame] | 76 | /* |
| 77 | * Configure McBSP threshold based on either: |
| 78 | * packet_size, when the sDMA is in packet mode, or based on the |
| 79 | * period size in THRESHOLD mode, otherwise use McBSP threshold = 1 |
| 80 | * for mono streams. |
| 81 | */ |
| 82 | if (dma_data->packet_size) |
| 83 | words = dma_data->packet_size; |
Eduardo Valentin | a0a499c | 2009-08-20 16:18:26 +0300 | [diff] [blame] | 84 | else |
Peter Ujfalusi | 3f02403 | 2010-06-03 07:39:35 +0300 | [diff] [blame] | 85 | words = 1; |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 86 | |
| 87 | /* Configure McBSP internal buffer usage */ |
| 88 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 89 | omap_mcbsp_set_tx_threshold(mcbsp, words); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 90 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 91 | omap_mcbsp_set_rx_threshold(mcbsp, words); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 92 | } |
| 93 | |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 94 | static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params *params, |
| 95 | struct snd_pcm_hw_rule *rule) |
| 96 | { |
| 97 | struct snd_interval *buffer_size = hw_param_interval(params, |
| 98 | SNDRV_PCM_HW_PARAM_BUFFER_SIZE); |
| 99 | struct snd_interval *channels = hw_param_interval(params, |
| 100 | SNDRV_PCM_HW_PARAM_CHANNELS); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 101 | struct omap_mcbsp *mcbsp = rule->private; |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 102 | struct snd_interval frames; |
| 103 | int size; |
| 104 | |
| 105 | snd_interval_any(&frames); |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 106 | size = mcbsp->pdata->buffer_size; |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 107 | |
| 108 | frames.min = size / channels->min; |
| 109 | frames.integer = 1; |
| 110 | return snd_interval_refine(buffer_size, &frames); |
| 111 | } |
| 112 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 113 | static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 114 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 115 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 116 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 117 | int err = 0; |
| 118 | |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 119 | if (!cpu_dai->active) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 120 | err = omap_mcbsp_request(mcbsp); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 121 | |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 122 | /* |
| 123 | * OMAP3 McBSP FIFO is word structured. |
| 124 | * McBSP2 has 1024 + 256 = 1280 word long buffer, |
| 125 | * McBSP1,3,4,5 has 128 word long buffer |
| 126 | * This means that the size of the FIFO depends on the sample format. |
| 127 | * For example on McBSP3: |
| 128 | * 16bit samples: size is 128 * 2 = 256 bytes |
| 129 | * 32bit samples: size is 128 * 4 = 512 bytes |
| 130 | * It is simpler to place constraint for buffer and period based on |
| 131 | * channels. |
| 132 | * McBSP3 as example again (16 or 32 bit samples): |
| 133 | * 1 channel (mono): size is 128 frames (128 words) |
| 134 | * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words) |
| 135 | * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words) |
| 136 | */ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 137 | if (mcbsp->pdata->buffer_size) { |
Jarkko Nikula | 6984992 | 2009-03-27 15:32:01 +0200 | [diff] [blame] | 138 | /* |
Peter Ujfalusi | 998a8a6 | 2010-07-29 09:51:28 +0300 | [diff] [blame] | 139 | * Rule for the buffer size. We should not allow |
Peter Ujfalusi | ce37f5e | 2012-03-20 11:47:36 +0200 | [diff] [blame] | 140 | * smaller buffer than the FIFO size to avoid underruns. |
| 141 | * This applies only for the playback stream. |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 142 | */ |
Peter Ujfalusi | ce37f5e | 2012-03-20 11:47:36 +0200 | [diff] [blame] | 143 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 144 | snd_pcm_hw_rule_add(substream->runtime, 0, |
| 145 | SNDRV_PCM_HW_PARAM_BUFFER_SIZE, |
| 146 | omap_mcbsp_hwrule_min_buffersize, |
| 147 | mcbsp, |
| 148 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 149 | |
Peter Ujfalusi | 998a8a6 | 2010-07-29 09:51:28 +0300 | [diff] [blame] | 150 | /* Make sure, that the period size is always even */ |
| 151 | snd_pcm_hw_constraint_step(substream->runtime, 0, |
| 152 | SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 2); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 153 | } |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 154 | |
Peter Ujfalusi | bcd6da7 | 2012-09-14 15:05:57 +0300 | [diff] [blame] | 155 | snd_soc_dai_set_dma_data(cpu_dai, substream, |
| 156 | &mcbsp->dma_data[substream->stream]); |
| 157 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 158 | return err; |
| 159 | } |
| 160 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 161 | static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 162 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 163 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 164 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 165 | |
| 166 | if (!cpu_dai->active) { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 167 | omap_mcbsp_free(mcbsp); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 168 | mcbsp->configured = 0; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 169 | } |
| 170 | } |
| 171 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 172 | static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 173 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 174 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 175 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | c12abc0 | 2009-08-07 09:59:47 +0300 | [diff] [blame] | 176 | int err = 0, play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 177 | |
| 178 | switch (cmd) { |
| 179 | case SNDRV_PCM_TRIGGER_START: |
| 180 | case SNDRV_PCM_TRIGGER_RESUME: |
| 181 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 182 | mcbsp->active++; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 183 | omap_mcbsp_start(mcbsp, play, !play); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 184 | break; |
| 185 | |
| 186 | case SNDRV_PCM_TRIGGER_STOP: |
| 187 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 188 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 189 | omap_mcbsp_stop(mcbsp, play, !play); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 190 | mcbsp->active--; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 191 | break; |
| 192 | default: |
| 193 | err = -EINVAL; |
| 194 | } |
| 195 | |
| 196 | return err; |
| 197 | } |
| 198 | |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 199 | static snd_pcm_sframes_t omap_mcbsp_dai_delay( |
| 200 | struct snd_pcm_substream *substream, |
| 201 | struct snd_soc_dai *dai) |
| 202 | { |
| 203 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 204 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 205 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 206 | u16 fifo_use; |
| 207 | snd_pcm_sframes_t delay; |
| 208 | |
| 209 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 210 | fifo_use = omap_mcbsp_get_tx_delay(mcbsp); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 211 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 212 | fifo_use = omap_mcbsp_get_rx_delay(mcbsp); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 213 | |
| 214 | /* |
| 215 | * Divide the used locations with the channel count to get the |
| 216 | * FIFO usage in samples (don't care about partial samples in the |
| 217 | * buffer). |
| 218 | */ |
| 219 | delay = fifo_use / substream->runtime->channels; |
| 220 | |
| 221 | return delay; |
| 222 | } |
| 223 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 224 | static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 225 | struct snd_pcm_hw_params *params, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 226 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 227 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 228 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 229 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Peter Ujfalusi | 81ec027 | 2010-07-29 09:51:26 +0300 | [diff] [blame] | 230 | struct omap_pcm_dma_data *dma_data; |
Peter Ujfalusi | 061fb36 | 2012-09-14 15:05:51 +0300 | [diff] [blame] | 231 | int wlen, channels, wpf; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 232 | int pkt_size = 0; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 233 | unsigned int format, div, framesize, master; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 234 | |
Peter Ujfalusi | bcd6da7 | 2012-09-14 15:05:57 +0300 | [diff] [blame] | 235 | dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream); |
Peter Ujfalusi | 778a17c | 2012-03-15 12:20:32 +0200 | [diff] [blame] | 236 | channels = params_channels(params); |
Kishon Vijay Abraham I | 2686e07 | 2011-02-24 15:16:56 +0530 | [diff] [blame] | 237 | |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 238 | switch (params_format(params)) { |
| 239 | case SNDRV_PCM_FORMAT_S16_LE: |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 240 | wlen = 16; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 241 | break; |
| 242 | case SNDRV_PCM_FORMAT_S32_LE: |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 243 | wlen = 32; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 244 | break; |
| 245 | default: |
| 246 | return -EINVAL; |
| 247 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 248 | if (mcbsp->pdata->buffer_size) { |
Peter Ujfalusi | 15d0143 | 2010-07-29 09:51:25 +0300 | [diff] [blame] | 249 | dma_data->set_threshold = omap_mcbsp_set_threshold; |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 250 | if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 251 | int period_words, max_thrsh; |
Peter Ujfalusi | dffb360 | 2012-09-14 15:05:49 +0300 | [diff] [blame] | 252 | int divider = 0; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 253 | |
| 254 | period_words = params_period_bytes(params) / (wlen / 8); |
| 255 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 256 | max_thrsh = mcbsp->max_tx_thres; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 257 | else |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 258 | max_thrsh = mcbsp->max_rx_thres; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 259 | /* |
Peter Ujfalusi | dffb360 | 2012-09-14 15:05:49 +0300 | [diff] [blame] | 260 | * Use sDMA packet mode if McBSP is in threshold mode: |
| 261 | * If period words less than the FIFO size the packet |
| 262 | * size is set to the number of period words, otherwise |
| 263 | * Look for the biggest threshold value which divides |
| 264 | * the period size evenly. |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 265 | */ |
Peter Ujfalusi | dffb360 | 2012-09-14 15:05:49 +0300 | [diff] [blame] | 266 | divider = period_words / max_thrsh; |
| 267 | if (period_words % max_thrsh) |
| 268 | divider++; |
| 269 | while (period_words % divider && |
| 270 | divider < period_words) |
| 271 | divider++; |
| 272 | if (divider == period_words) |
| 273 | return -EINVAL; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 274 | |
Peter Ujfalusi | dffb360 | 2012-09-14 15:05:49 +0300 | [diff] [blame] | 275 | pkt_size = period_words / divider; |
Peter Ujfalusi | 778a17c | 2012-03-15 12:20:32 +0200 | [diff] [blame] | 276 | } else if (channels > 1) { |
| 277 | /* Use packet mode for non mono streams */ |
| 278 | pkt_size = channels; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 279 | } |
Peter Ujfalusi | 15d0143 | 2010-07-29 09:51:25 +0300 | [diff] [blame] | 280 | } |
| 281 | |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 282 | dma_data->packet_size = pkt_size; |
Daniel Mack | fd23b7d | 2010-03-19 14:52:55 +0000 | [diff] [blame] | 283 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 284 | if (mcbsp->configured) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 285 | /* McBSP already configured by another stream */ |
| 286 | return 0; |
| 287 | } |
| 288 | |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 289 | regs->rcr2 &= ~(RPHASE | RFRLEN2(0x7f) | RWDLEN2(7)); |
| 290 | regs->xcr2 &= ~(RPHASE | XFRLEN2(0x7f) | XWDLEN2(7)); |
| 291 | regs->rcr1 &= ~(RFRLEN1(0x7f) | RWDLEN1(7)); |
| 292 | regs->xcr1 &= ~(XFRLEN1(0x7f) | XWDLEN1(7)); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 293 | format = mcbsp->fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
Peter Ujfalusi | 778a17c | 2012-03-15 12:20:32 +0200 | [diff] [blame] | 294 | wpf = channels; |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 295 | if (channels == 2 && (format == SND_SOC_DAIFMT_I2S || |
| 296 | format == SND_SOC_DAIFMT_LEFT_J)) { |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 297 | /* Use dual-phase frames */ |
| 298 | regs->rcr2 |= RPHASE; |
| 299 | regs->xcr2 |= XPHASE; |
| 300 | /* Set 1 word per (McBSP) frame for phase1 and phase2 */ |
| 301 | wpf--; |
| 302 | regs->rcr2 |= RFRLEN2(wpf - 1); |
| 303 | regs->xcr2 |= XFRLEN2(wpf - 1); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 304 | } |
| 305 | |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 306 | regs->rcr1 |= RFRLEN1(wpf - 1); |
| 307 | regs->xcr1 |= XFRLEN1(wpf - 1); |
| 308 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 309 | switch (params_format(params)) { |
| 310 | case SNDRV_PCM_FORMAT_S16_LE: |
| 311 | /* Set word lengths */ |
| 312 | regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); |
| 313 | regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); |
| 314 | regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); |
| 315 | regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 316 | break; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 317 | case SNDRV_PCM_FORMAT_S32_LE: |
| 318 | /* Set word lengths */ |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 319 | regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_32); |
| 320 | regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_32); |
| 321 | regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_32); |
| 322 | regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_32); |
| 323 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 324 | default: |
| 325 | /* Unsupported PCM format */ |
| 326 | return -EINVAL; |
| 327 | } |
| 328 | |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 329 | /* In McBSP master modes, FRAME (i.e. sample rate) is generated |
| 330 | * by _counting_ BCLKs. Calculate frame size in BCLKs */ |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 331 | master = mcbsp->fmt & SND_SOC_DAIFMT_MASTER_MASK; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 332 | if (master == SND_SOC_DAIFMT_CBS_CFS) { |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 333 | div = mcbsp->clk_div ? mcbsp->clk_div : 1; |
| 334 | framesize = (mcbsp->in_freq / div) / params_rate(params); |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 335 | |
| 336 | if (framesize < wlen * channels) { |
| 337 | printk(KERN_ERR "%s: not enough bandwidth for desired rate and " |
| 338 | "channels\n", __func__); |
| 339 | return -EINVAL; |
| 340 | } |
| 341 | } else |
| 342 | framesize = wlen * channels; |
| 343 | |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 344 | /* Set FS period and length in terms of bit clock periods */ |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 345 | regs->srgr2 &= ~FPER(0xfff); |
| 346 | regs->srgr1 &= ~FWID(0xff); |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 347 | switch (format) { |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 348 | case SND_SOC_DAIFMT_I2S: |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 349 | case SND_SOC_DAIFMT_LEFT_J: |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 350 | regs->srgr2 |= FPER(framesize - 1); |
| 351 | regs->srgr1 |= FWID((framesize >> 1) - 1); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 352 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 353 | case SND_SOC_DAIFMT_DSP_A: |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 354 | case SND_SOC_DAIFMT_DSP_B: |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 355 | regs->srgr2 |= FPER(framesize - 1); |
Jarkko Nikula | 36ce858 | 2009-04-15 13:48:16 +0300 | [diff] [blame] | 356 | regs->srgr1 |= FWID(0); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 357 | break; |
| 358 | } |
| 359 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 360 | omap_mcbsp_config(mcbsp, &mcbsp->cfg_regs); |
| 361 | mcbsp->wlen = wlen; |
| 362 | mcbsp->configured = 1; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 363 | |
| 364 | return 0; |
| 365 | } |
| 366 | |
| 367 | /* |
| 368 | * This must be called before _set_clkdiv and _set_sysclk since McBSP register |
| 369 | * cache is initialized here |
| 370 | */ |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 371 | static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 372 | unsigned int fmt) |
| 373 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 374 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 375 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 376 | bool inv_fs = false; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 377 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 378 | if (mcbsp->configured) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 379 | return 0; |
| 380 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 381 | mcbsp->fmt = fmt; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 382 | memset(regs, 0, sizeof(*regs)); |
| 383 | /* Generic McBSP register settings */ |
| 384 | regs->spcr2 |= XINTM(3) | FREE; |
| 385 | regs->spcr1 |= RINTM(3); |
Peter Ujfalusi | dc26df5 | 2012-08-16 16:41:06 +0300 | [diff] [blame] | 386 | /* RFIG and XFIG are not defined in 2430 and on OMAP3+ */ |
| 387 | if (!mcbsp->pdata->has_ccr) { |
Eero Nurkkala | c721bbd | 2009-08-20 16:18:23 +0300 | [diff] [blame] | 388 | regs->rcr2 |= RFIG; |
| 389 | regs->xcr2 |= XFIG; |
| 390 | } |
Peter Ujfalusi | dc26df5 | 2012-08-16 16:41:06 +0300 | [diff] [blame] | 391 | |
| 392 | /* Configure XCCR/RCCR only for revisions which have ccr registers */ |
| 393 | if (mcbsp->pdata->has_ccr) { |
Jarkko Nikula | 32080af | 2009-08-23 12:24:26 +0300 | [diff] [blame] | 394 | regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; |
| 395 | regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; |
Misael Lopez Cruz | ef390c0 | 2009-01-29 13:29:46 +0200 | [diff] [blame] | 396 | } |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 397 | |
| 398 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 399 | case SND_SOC_DAIFMT_I2S: |
| 400 | /* 1-bit data delay */ |
| 401 | regs->rcr2 |= RDATDLY(1); |
| 402 | regs->xcr2 |= XDATDLY(1); |
| 403 | break; |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 404 | case SND_SOC_DAIFMT_LEFT_J: |
| 405 | /* 0-bit data delay */ |
| 406 | regs->rcr2 |= RDATDLY(0); |
| 407 | regs->xcr2 |= XDATDLY(0); |
| 408 | regs->spcr1 |= RJUST(2); |
| 409 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 410 | inv_fs = true; |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 411 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 412 | case SND_SOC_DAIFMT_DSP_A: |
| 413 | /* 1-bit data delay */ |
| 414 | regs->rcr2 |= RDATDLY(1); |
| 415 | regs->xcr2 |= XDATDLY(1); |
| 416 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 417 | inv_fs = true; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 418 | break; |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 419 | case SND_SOC_DAIFMT_DSP_B: |
Arun KS | 3336c5b | 2008-10-02 15:07:06 +0530 | [diff] [blame] | 420 | /* 0-bit data delay */ |
| 421 | regs->rcr2 |= RDATDLY(0); |
| 422 | regs->xcr2 |= XDATDLY(0); |
Jarkko Nikula | 36ce858 | 2009-04-15 13:48:16 +0300 | [diff] [blame] | 423 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 424 | inv_fs = true; |
Arun KS | 3336c5b | 2008-10-02 15:07:06 +0530 | [diff] [blame] | 425 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 426 | default: |
| 427 | /* Unsupported data format */ |
| 428 | return -EINVAL; |
| 429 | } |
| 430 | |
| 431 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 432 | case SND_SOC_DAIFMT_CBS_CFS: |
| 433 | /* McBSP master. Set FS and bit clocks as outputs */ |
| 434 | regs->pcr0 |= FSXM | FSRM | |
| 435 | CLKXM | CLKRM; |
| 436 | /* Sample rate generator drives the FS */ |
| 437 | regs->srgr2 |= FSGM; |
| 438 | break; |
| 439 | case SND_SOC_DAIFMT_CBM_CFM: |
| 440 | /* McBSP slave */ |
| 441 | break; |
| 442 | default: |
| 443 | /* Unsupported master/slave configuration */ |
| 444 | return -EINVAL; |
| 445 | } |
| 446 | |
| 447 | /* Set bit clock (CLKX/CLKR) and FS polarities */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 448 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 449 | case SND_SOC_DAIFMT_NB_NF: |
| 450 | /* |
| 451 | * Normal BCLK + FS. |
| 452 | * FS active low. TX data driven on falling edge of bit clock |
| 453 | * and RX data sampled on rising edge of bit clock. |
| 454 | */ |
| 455 | regs->pcr0 |= FSXP | FSRP | |
| 456 | CLKXP | CLKRP; |
| 457 | break; |
| 458 | case SND_SOC_DAIFMT_NB_IF: |
| 459 | regs->pcr0 |= CLKXP | CLKRP; |
| 460 | break; |
| 461 | case SND_SOC_DAIFMT_IB_NF: |
| 462 | regs->pcr0 |= FSXP | FSRP; |
| 463 | break; |
| 464 | case SND_SOC_DAIFMT_IB_IF: |
| 465 | break; |
| 466 | default: |
| 467 | return -EINVAL; |
| 468 | } |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 469 | if (inv_fs == true) |
| 470 | regs->pcr0 ^= FSXP | FSRP; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 471 | |
| 472 | return 0; |
| 473 | } |
| 474 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 475 | static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 476 | int div_id, int div) |
| 477 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 478 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 479 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 480 | |
| 481 | if (div_id != OMAP_MCBSP_CLKGDV) |
| 482 | return -ENODEV; |
| 483 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 484 | mcbsp->clk_div = div; |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 485 | regs->srgr1 &= ~CLKGDV(0xff); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 486 | regs->srgr1 |= CLKGDV(div - 1); |
| 487 | |
| 488 | return 0; |
| 489 | } |
| 490 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 491 | static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 492 | int clk_id, unsigned int freq, |
| 493 | int dir) |
| 494 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 495 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 496 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 497 | int err = 0; |
| 498 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame] | 499 | if (mcbsp->active) { |
| 500 | if (freq == mcbsp->in_freq) |
Jarkko Nikula | 34c8698 | 2011-09-23 11:19:13 +0300 | [diff] [blame] | 501 | return 0; |
| 502 | else |
| 503 | return -EBUSY; |
Peter Ujfalusi | 141947e | 2011-09-26 10:56:42 +0300 | [diff] [blame] | 504 | } |
Jarkko Nikula | 34c8698 | 2011-09-23 11:19:13 +0300 | [diff] [blame] | 505 | |
Peter Ujfalusi | 8fef626 | 2012-08-16 16:41:04 +0300 | [diff] [blame] | 506 | mcbsp->in_freq = freq; |
| 507 | regs->srgr2 &= ~CLKSM; |
| 508 | regs->pcr0 &= ~SCLKME; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 509 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 510 | switch (clk_id) { |
| 511 | case OMAP_MCBSP_SYSCLK_CLK: |
| 512 | regs->srgr2 |= CLKSM; |
| 513 | break; |
| 514 | case OMAP_MCBSP_SYSCLK_CLKS_FCLK: |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 515 | if (cpu_class_is_omap1()) { |
| 516 | err = -EINVAL; |
| 517 | break; |
| 518 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 519 | err = omap2_mcbsp_set_clks_src(mcbsp, |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 520 | MCBSP_CLKS_PRCM_SRC); |
| 521 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 522 | case OMAP_MCBSP_SYSCLK_CLKS_EXT: |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 523 | if (cpu_class_is_omap1()) { |
| 524 | err = 0; |
| 525 | break; |
| 526 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 527 | err = omap2_mcbsp_set_clks_src(mcbsp, |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 528 | MCBSP_CLKS_PAD_SRC); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 529 | break; |
| 530 | |
| 531 | case OMAP_MCBSP_SYSCLK_CLKX_EXT: |
| 532 | regs->srgr2 |= CLKSM; |
| 533 | case OMAP_MCBSP_SYSCLK_CLKR_EXT: |
| 534 | regs->pcr0 |= SCLKME; |
| 535 | break; |
| 536 | default: |
| 537 | err = -ENODEV; |
| 538 | } |
| 539 | |
| 540 | return err; |
| 541 | } |
| 542 | |
Lars-Peter Clausen | 85e7652 | 2011-11-23 11:40:40 +0100 | [diff] [blame] | 543 | static const struct snd_soc_dai_ops mcbsp_dai_ops = { |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 544 | .startup = omap_mcbsp_dai_startup, |
| 545 | .shutdown = omap_mcbsp_dai_shutdown, |
| 546 | .trigger = omap_mcbsp_dai_trigger, |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 547 | .delay = omap_mcbsp_dai_delay, |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 548 | .hw_params = omap_mcbsp_dai_hw_params, |
| 549 | .set_fmt = omap_mcbsp_dai_set_dai_fmt, |
| 550 | .set_clkdiv = omap_mcbsp_dai_set_clkdiv, |
| 551 | .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, |
| 552 | }; |
| 553 | |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 554 | static int omap_mcbsp_probe(struct snd_soc_dai *dai) |
| 555 | { |
| 556 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(dai); |
| 557 | |
| 558 | pm_runtime_enable(mcbsp->dev); |
| 559 | |
| 560 | return 0; |
| 561 | } |
| 562 | |
| 563 | static int omap_mcbsp_remove(struct snd_soc_dai *dai) |
| 564 | { |
| 565 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(dai); |
| 566 | |
| 567 | pm_runtime_disable(mcbsp->dev); |
| 568 | |
| 569 | return 0; |
| 570 | } |
| 571 | |
Michael Opdenacker | 6179b77 | 2011-10-10 07:07:08 +0200 | [diff] [blame] | 572 | static struct snd_soc_dai_driver omap_mcbsp_dai = { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 573 | .probe = omap_mcbsp_probe, |
| 574 | .remove = omap_mcbsp_remove, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 575 | .playback = { |
| 576 | .channels_min = 1, |
| 577 | .channels_max = 16, |
| 578 | .rates = OMAP_MCBSP_RATES, |
| 579 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, |
| 580 | }, |
| 581 | .capture = { |
| 582 | .channels_min = 1, |
| 583 | .channels_max = 16, |
| 584 | .rates = OMAP_MCBSP_RATES, |
| 585 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, |
| 586 | }, |
| 587 | .ops = &mcbsp_dai_ops, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 588 | }; |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 589 | |
G, Manjunath Kondaiah | 3484457 | 2010-09-08 08:53:43 +0530 | [diff] [blame] | 590 | static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 591 | struct snd_ctl_elem_info *uinfo) |
| 592 | { |
| 593 | struct soc_mixer_control *mc = |
| 594 | (struct soc_mixer_control *)kcontrol->private_value; |
| 595 | int max = mc->max; |
| 596 | int min = mc->min; |
| 597 | |
| 598 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 599 | uinfo->count = 1; |
| 600 | uinfo->value.integer.min = min; |
| 601 | uinfo->value.integer.max = max; |
| 602 | return 0; |
| 603 | } |
| 604 | |
Peter Ujfalusi | db61550 | 2012-08-22 13:11:43 +0300 | [diff] [blame] | 605 | #define OMAP_MCBSP_ST_CHANNEL_VOLUME(channel) \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 606 | static int \ |
Peter Ujfalusi | db61550 | 2012-08-22 13:11:43 +0300 | [diff] [blame] | 607 | omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 608 | struct snd_ctl_elem_value *uc) \ |
| 609 | { \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 610 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ |
| 611 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 612 | struct soc_mixer_control *mc = \ |
| 613 | (struct soc_mixer_control *)kc->private_value; \ |
| 614 | int max = mc->max; \ |
| 615 | int min = mc->min; \ |
| 616 | int val = uc->value.integer.value[0]; \ |
| 617 | \ |
| 618 | if (val < min || val > max) \ |
| 619 | return -EINVAL; \ |
| 620 | \ |
| 621 | /* OMAP McBSP implementation uses index values 0..4 */ \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 622 | return omap_st_set_chgain(mcbsp, channel, val); \ |
Peter Ujfalusi | db61550 | 2012-08-22 13:11:43 +0300 | [diff] [blame] | 623 | } \ |
| 624 | \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 625 | static int \ |
Peter Ujfalusi | db61550 | 2012-08-22 13:11:43 +0300 | [diff] [blame] | 626 | omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 627 | struct snd_ctl_elem_value *uc) \ |
| 628 | { \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 629 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ |
| 630 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 631 | s16 chgain; \ |
| 632 | \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 633 | if (omap_st_get_chgain(mcbsp, channel, &chgain)) \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 634 | return -EAGAIN; \ |
| 635 | \ |
| 636 | uc->value.integer.value[0] = chgain; \ |
| 637 | return 0; \ |
| 638 | } |
| 639 | |
Peter Ujfalusi | db61550 | 2012-08-22 13:11:43 +0300 | [diff] [blame] | 640 | OMAP_MCBSP_ST_CHANNEL_VOLUME(0) |
| 641 | OMAP_MCBSP_ST_CHANNEL_VOLUME(1) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 642 | |
| 643 | static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol, |
| 644 | struct snd_ctl_elem_value *ucontrol) |
| 645 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 646 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 647 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 648 | u8 value = ucontrol->value.integer.value[0]; |
| 649 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 650 | if (value == omap_st_is_enabled(mcbsp)) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 651 | return 0; |
| 652 | |
| 653 | if (value) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 654 | omap_st_enable(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 655 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 656 | omap_st_disable(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 657 | |
| 658 | return 1; |
| 659 | } |
| 660 | |
| 661 | static int omap_mcbsp_st_get_mode(struct snd_kcontrol *kcontrol, |
| 662 | struct snd_ctl_elem_value *ucontrol) |
| 663 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 664 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 665 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 666 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 667 | ucontrol->value.integer.value[0] = omap_st_is_enabled(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 668 | return 0; |
| 669 | } |
| 670 | |
Peter Ujfalusi | 8996a31 | 2012-08-22 13:11:42 +0300 | [diff] [blame] | 671 | #define OMAP_MCBSP_ST_CONTROLS(port) \ |
| 672 | static const struct snd_kcontrol_new omap_mcbsp##port##_st_controls[] = { \ |
| 673 | SOC_SINGLE_EXT("McBSP" #port " Sidetone Switch", 1, 0, 1, 0, \ |
| 674 | omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), \ |
| 675 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 0 Volume", \ |
| 676 | -32768, 32767, \ |
| 677 | omap_mcbsp_get_st_ch0_volume, \ |
| 678 | omap_mcbsp_set_st_ch0_volume), \ |
| 679 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 1 Volume", \ |
| 680 | -32768, 32767, \ |
| 681 | omap_mcbsp_get_st_ch1_volume, \ |
| 682 | omap_mcbsp_set_st_ch1_volume), \ |
| 683 | } |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 684 | |
Peter Ujfalusi | 8996a31 | 2012-08-22 13:11:42 +0300 | [diff] [blame] | 685 | OMAP_MCBSP_ST_CONTROLS(2); |
| 686 | OMAP_MCBSP_ST_CONTROLS(3); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 687 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 688 | int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 689 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 690 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 691 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
| 692 | |
Peter Ujfalusi | 8a88df4 | 2012-08-22 13:11:41 +0300 | [diff] [blame] | 693 | if (!mcbsp->st_data) { |
| 694 | dev_warn(mcbsp->dev, "No sidetone data for port\n"); |
| 695 | return 0; |
| 696 | } |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 697 | |
Peter Ujfalusi | 28739df | 2012-08-22 13:11:40 +0300 | [diff] [blame] | 698 | switch (mcbsp->id) { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 699 | case 2: /* McBSP 2 */ |
| 700 | return snd_soc_add_dai_controls(cpu_dai, |
| 701 | omap_mcbsp2_st_controls, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 702 | ARRAY_SIZE(omap_mcbsp2_st_controls)); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 703 | case 3: /* McBSP 3 */ |
| 704 | return snd_soc_add_dai_controls(cpu_dai, |
| 705 | omap_mcbsp3_st_controls, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 706 | ARRAY_SIZE(omap_mcbsp3_st_controls)); |
| 707 | default: |
| 708 | break; |
| 709 | } |
| 710 | |
| 711 | return -EINVAL; |
| 712 | } |
| 713 | EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls); |
| 714 | |
Peter Ujfalusi | 11dd586 | 2012-08-16 16:41:08 +0300 | [diff] [blame] | 715 | static struct omap_mcbsp_platform_data omap2420_pdata = { |
| 716 | .reg_step = 4, |
| 717 | .reg_size = 2, |
| 718 | }; |
| 719 | |
| 720 | static struct omap_mcbsp_platform_data omap2430_pdata = { |
| 721 | .reg_step = 4, |
| 722 | .reg_size = 4, |
| 723 | .has_ccr = true, |
| 724 | }; |
| 725 | |
| 726 | static struct omap_mcbsp_platform_data omap3_pdata = { |
| 727 | .reg_step = 4, |
| 728 | .reg_size = 4, |
| 729 | .has_ccr = true, |
| 730 | .has_wakeup = true, |
| 731 | }; |
| 732 | |
| 733 | static struct omap_mcbsp_platform_data omap4_pdata = { |
| 734 | .reg_step = 4, |
| 735 | .reg_size = 4, |
| 736 | .has_ccr = true, |
| 737 | .has_wakeup = true, |
| 738 | }; |
| 739 | |
| 740 | static const struct of_device_id omap_mcbsp_of_match[] = { |
| 741 | { |
| 742 | .compatible = "ti,omap2420-mcbsp", |
| 743 | .data = &omap2420_pdata, |
| 744 | }, |
| 745 | { |
| 746 | .compatible = "ti,omap2430-mcbsp", |
| 747 | .data = &omap2430_pdata, |
| 748 | }, |
| 749 | { |
| 750 | .compatible = "ti,omap3-mcbsp", |
| 751 | .data = &omap3_pdata, |
| 752 | }, |
| 753 | { |
| 754 | .compatible = "ti,omap4-mcbsp", |
| 755 | .data = &omap4_pdata, |
| 756 | }, |
| 757 | { }, |
| 758 | }; |
| 759 | MODULE_DEVICE_TABLE(of, omap_mcbsp_of_match); |
| 760 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 761 | static __devinit int asoc_mcbsp_probe(struct platform_device *pdev) |
| 762 | { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 763 | struct omap_mcbsp_platform_data *pdata = dev_get_platdata(&pdev->dev); |
| 764 | struct omap_mcbsp *mcbsp; |
Peter Ujfalusi | 11dd586 | 2012-08-16 16:41:08 +0300 | [diff] [blame] | 765 | const struct of_device_id *match; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 766 | int ret; |
| 767 | |
Peter Ujfalusi | 11dd586 | 2012-08-16 16:41:08 +0300 | [diff] [blame] | 768 | match = of_match_device(omap_mcbsp_of_match, &pdev->dev); |
| 769 | if (match) { |
| 770 | struct device_node *node = pdev->dev.of_node; |
| 771 | int buffer_size; |
| 772 | |
| 773 | pdata = devm_kzalloc(&pdev->dev, |
| 774 | sizeof(struct omap_mcbsp_platform_data), |
| 775 | GFP_KERNEL); |
| 776 | if (!pdata) |
| 777 | return -ENOMEM; |
| 778 | |
| 779 | memcpy(pdata, match->data, sizeof(*pdata)); |
| 780 | if (!of_property_read_u32(node, "ti,buffer-size", &buffer_size)) |
| 781 | pdata->buffer_size = buffer_size; |
| 782 | } else if (!pdata) { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 783 | dev_err(&pdev->dev, "missing platform data.\n"); |
| 784 | return -EINVAL; |
| 785 | } |
| 786 | mcbsp = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcbsp), GFP_KERNEL); |
| 787 | if (!mcbsp) |
| 788 | return -ENOMEM; |
| 789 | |
| 790 | mcbsp->id = pdev->id; |
| 791 | mcbsp->pdata = pdata; |
| 792 | mcbsp->dev = &pdev->dev; |
| 793 | platform_set_drvdata(pdev, mcbsp); |
| 794 | |
| 795 | ret = omap_mcbsp_init(pdev); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 796 | if (!ret) |
| 797 | return snd_soc_register_dai(&pdev->dev, &omap_mcbsp_dai); |
| 798 | |
| 799 | return ret; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 800 | } |
| 801 | |
| 802 | static int __devexit asoc_mcbsp_remove(struct platform_device *pdev) |
| 803 | { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 804 | struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); |
| 805 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 806 | snd_soc_unregister_dai(&pdev->dev); |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 807 | |
| 808 | if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) |
| 809 | mcbsp->pdata->ops->free(mcbsp->id); |
| 810 | |
| 811 | omap_mcbsp_sysfs_remove(mcbsp); |
| 812 | |
| 813 | clk_put(mcbsp->fclk); |
| 814 | |
| 815 | platform_set_drvdata(pdev, NULL); |
| 816 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 817 | return 0; |
| 818 | } |
| 819 | |
| 820 | static struct platform_driver asoc_mcbsp_driver = { |
| 821 | .driver = { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 822 | .name = "omap-mcbsp", |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 823 | .owner = THIS_MODULE, |
Peter Ujfalusi | 11dd586 | 2012-08-16 16:41:08 +0300 | [diff] [blame] | 824 | .of_match_table = omap_mcbsp_of_match, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 825 | }, |
| 826 | |
| 827 | .probe = asoc_mcbsp_probe, |
| 828 | .remove = __devexit_p(asoc_mcbsp_remove), |
| 829 | }; |
| 830 | |
Axel Lin | beda5bf5 | 2011-11-25 10:12:16 +0800 | [diff] [blame] | 831 | module_platform_driver(asoc_mcbsp_driver); |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 832 | |
Jarkko Nikula | 7ec41ee | 2011-08-11 15:44:57 +0300 | [diff] [blame] | 833 | MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>"); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 834 | MODULE_DESCRIPTION("OMAP I2S SoC Interface"); |
| 835 | MODULE_LICENSE("GPL"); |
Guillaume Gardet | 5e70b7fc | 2012-07-12 15:08:16 +0200 | [diff] [blame] | 836 | MODULE_ALIAS("platform:omap-mcbsp"); |