blob: 469071db35280278de2f04dfb6e74a38cf566b91 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
Duncan Laurie8ca40132011-10-25 15:42:21 -070027#include <linux/dmi.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080028#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010030#include <drm/drmP.h>
31#include <drm/drm_crtc.h>
32#include <drm/drm_crtc_helper.h>
33#include <drm/drm_edid.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080034#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010035#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drv.h"
37
Keith Packarde7dbb2f2010-11-16 16:03:53 +080038/* Here's the desired hotplug mode */
39#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
45
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000046struct intel_crt {
47 struct intel_encoder base;
Adam Jackson637f44d2013-03-25 15:40:05 -040048 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
Keith Packarde7dbb2f2010-11-16 16:03:53 +080051 bool force_hotplug_required;
Daniel Vetter540a8952012-07-11 16:27:57 +020052 u32 adpa_reg;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +000053};
54
Daniel Vetter540a8952012-07-11 16:27:57 +020055static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -080056{
Daniel Vetter540a8952012-07-11 16:27:57 +020057 return container_of(encoder, struct intel_crt, base);
Jesse Barnesdf0323c2012-04-17 15:06:33 -070058}
59
Daniel Vettereebe6f02013-07-21 21:37:03 +020060static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
61{
62 return intel_encoder_to_crt(intel_attached_encoder(connector));
63}
64
Daniel Vettere403fc92012-07-02 13:41:21 +020065static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
66 enum pipe *pipe)
Jesse Barnesdf0323c2012-04-17 15:06:33 -070067{
Daniel Vettere403fc92012-07-02 13:41:21 +020068 struct drm_device *dev = encoder->base.dev;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070069 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vettere403fc92012-07-02 13:41:21 +020070 struct intel_crt *crt = intel_encoder_to_crt(encoder);
71 u32 tmp;
Zhenyu Wang2c072452009-06-05 15:38:42 +080072
Daniel Vettere403fc92012-07-02 13:41:21 +020073 tmp = I915_READ(crt->adpa_reg);
Zhenyu Wang2c072452009-06-05 15:38:42 +080074
Daniel Vettere403fc92012-07-02 13:41:21 +020075 if (!(tmp & ADPA_DAC_ENABLE))
76 return false;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070077
Daniel Vettere403fc92012-07-02 13:41:21 +020078 if (HAS_PCH_CPT(dev))
79 *pipe = PORT_TO_PIPE_CPT(tmp);
80 else
81 *pipe = PORT_TO_PIPE(tmp);
82
83 return true;
Jesse Barnesdf0323c2012-04-17 15:06:33 -070084}
85
Ville Syrjälä6801c182013-09-24 14:24:05 +030086static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
Jesse Barnes045ac3b2013-05-14 17:08:26 -070087{
88 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
89 struct intel_crt *crt = intel_encoder_to_crt(encoder);
90 u32 tmp, flags = 0;
91
92 tmp = I915_READ(crt->adpa_reg);
93
94 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
95 flags |= DRM_MODE_FLAG_PHSYNC;
96 else
97 flags |= DRM_MODE_FLAG_NHSYNC;
98
99 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
100 flags |= DRM_MODE_FLAG_PVSYNC;
101 else
102 flags |= DRM_MODE_FLAG_NVSYNC;
103
Ville Syrjälä6801c182013-09-24 14:24:05 +0300104 return flags;
105}
106
107static void intel_crt_get_config(struct intel_encoder *encoder,
108 struct intel_crtc_config *pipe_config)
109{
110 struct drm_device *dev = encoder->base.dev;
111 int dotclock;
112
113 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
Ville Syrjälä18442d02013-09-13 16:00:08 +0300114
115 dotclock = pipe_config->port_clock;
116
Ville Syrjälä6801c182013-09-24 14:24:05 +0300117 if (HAS_PCH_SPLIT(dev))
Ville Syrjälä18442d02013-09-13 16:00:08 +0300118 ironlake_check_encoder_dotclock(pipe_config, dotclock);
119
Damien Lespiau241bfc32013-09-25 16:45:37 +0100120 pipe_config->adjusted_mode.crtc_clock = dotclock;
Jesse Barnes045ac3b2013-05-14 17:08:26 -0700121}
122
Ville Syrjälä6801c182013-09-24 14:24:05 +0300123static void hsw_crt_get_config(struct intel_encoder *encoder,
124 struct intel_crtc_config *pipe_config)
125{
126 intel_ddi_get_config(encoder, pipe_config);
127
128 pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
129 DRM_MODE_FLAG_NHSYNC |
130 DRM_MODE_FLAG_PVSYNC |
131 DRM_MODE_FLAG_NVSYNC);
132 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
133}
134
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200135/* Note: The caller is required to filter out dpms modes not supported by the
136 * platform. */
137static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800138{
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200139 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800140 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200141 struct intel_crt *crt = intel_encoder_to_crt(encoder);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800142 u32 temp;
143
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200144 temp = I915_READ(crt->adpa_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -0800145 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
ling.ma@intel.comfebc7692009-06-25 11:55:57 +0800146 temp &= ~ADPA_DAC_ENABLE;
Jesse Barnesbd9e8412012-06-15 11:55:18 -0700147
Akshay Joshi0206e352011-08-16 15:34:10 -0400148 switch (mode) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800149 case DRM_MODE_DPMS_ON:
150 temp |= ADPA_DAC_ENABLE;
151 break;
152 case DRM_MODE_DPMS_STANDBY:
153 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
154 break;
155 case DRM_MODE_DPMS_SUSPEND:
156 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
157 break;
158 case DRM_MODE_DPMS_OFF:
159 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
160 break;
161 }
162
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200163 I915_WRITE(crt->adpa_reg, temp);
164}
165
Adam Jackson637f44d2013-03-25 15:40:05 -0400166static void intel_disable_crt(struct intel_encoder *encoder)
167{
168 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
169}
170
171static void intel_enable_crt(struct intel_encoder *encoder)
172{
173 struct intel_crt *crt = intel_encoder_to_crt(encoder);
174
175 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
176}
177
Jani Nikula6b1c087b2013-05-28 12:35:02 +0300178/* Special dpms function to support cloning between dvo/sdvo/crt. */
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200179static void intel_crt_dpms(struct drm_connector *connector, int mode)
180{
181 struct drm_device *dev = connector->dev;
182 struct intel_encoder *encoder = intel_attached_encoder(connector);
183 struct drm_crtc *crtc;
184 int old_dpms;
185
186 /* PCH platforms and VLV only support on/off. */
Jani Nikula4a8dece2012-11-05 13:51:51 +0200187 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200188 mode = DRM_MODE_DPMS_OFF;
189
190 if (mode == connector->dpms)
191 return;
192
193 old_dpms = connector->dpms;
194 connector->dpms = mode;
195
196 /* Only need to change hw state when actually enabled */
197 crtc = encoder->base.crtc;
198 if (!crtc) {
199 encoder->connectors_active = false;
200 return;
201 }
202
203 /* We need the pipe to run for anything but OFF. */
204 if (mode == DRM_MODE_DPMS_OFF)
205 encoder->connectors_active = false;
206 else
207 encoder->connectors_active = true;
208
Jani Nikula6b1c087b2013-05-28 12:35:02 +0300209 /* We call connector dpms manually below in case pipe dpms doesn't
210 * change due to cloning. */
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200211 if (mode < old_dpms) {
212 /* From off to on, enable the pipe first. */
213 intel_crtc_update_dpms(crtc);
214
215 intel_crt_set_dpms(encoder, mode);
216 } else {
217 intel_crt_set_dpms(encoder, mode);
218
219 intel_crtc_update_dpms(crtc);
220 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +0200221
Daniel Vetterb9805142012-08-31 17:37:33 +0200222 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -0800223}
224
Damien Lespiauc19de8e2013-11-28 15:29:18 +0000225static enum drm_mode_status
226intel_crt_mode_valid(struct drm_connector *connector,
227 struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800228{
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800229 struct drm_device *dev = connector->dev;
230
231 int max_clock = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
233 return MODE_NO_DBLESCAN;
234
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800235 if (mode->clock < 25000)
236 return MODE_CLOCK_LOW;
237
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100238 if (IS_GEN2(dev))
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800239 max_clock = 350000;
240 else
241 max_clock = 400000;
242 if (mode->clock > max_clock)
243 return MODE_CLOCK_HIGH;
Jesse Barnes79e53942008-11-07 14:24:08 -0800244
Paulo Zanonid4b19312012-11-29 11:29:32 -0200245 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
246 if (HAS_PCH_LPT(dev) &&
247 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
248 return MODE_CLOCK_HIGH;
249
Jesse Barnes79e53942008-11-07 14:24:08 -0800250 return MODE_OK;
251}
252
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100253static bool intel_crt_compute_config(struct intel_encoder *encoder,
254 struct intel_crtc_config *pipe_config)
Jesse Barnes79e53942008-11-07 14:24:08 -0800255{
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100256 struct drm_device *dev = encoder->base.dev;
257
258 if (HAS_PCH_SPLIT(dev))
259 pipe_config->has_pch_encoder = true;
260
Daniel Vetter2a7acee2013-04-19 11:24:39 +0200261 /* LPT FDI RX only supports 8bpc. */
262 if (HAS_PCH_LPT(dev))
263 pipe_config->pipe_bpp = 24;
264
Ville Syrjälä8f7abfd2014-02-27 14:23:12 +0200265 /* FDI must always be 2.7 GHz */
266 if (HAS_DDI(dev))
267 pipe_config->port_clock = 135000 * 2;
268
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 return true;
270}
271
Daniel Vettereebe6f02013-07-21 21:37:03 +0200272static void intel_crt_mode_set(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800273{
274
Daniel Vettereebe6f02013-07-21 21:37:03 +0200275 struct drm_device *dev = encoder->base.dev;
276 struct intel_crt *crt = intel_encoder_to_crt(encoder);
277 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800278 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vettereebe6f02013-07-21 21:37:03 +0200279 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
Egbert Eich6478d412012-10-14 16:33:11 +0200280 u32 adpa;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281
Imre Deak533df0f2013-10-16 20:39:24 +0300282 if (INTEL_INFO(dev)->gen >= 5)
Daniel Vetter912d8122012-10-11 20:08:23 +0200283 adpa = ADPA_HOTPLUG_BITS;
284 else
285 adpa = 0;
286
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
288 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
289 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
290 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
291
Jesse Barnes75770562011-10-12 09:01:58 -0700292 /* For CPT allow 3 pipe config, for others just use A or B */
Paulo Zanoni48378132012-10-31 18:12:20 -0200293 if (HAS_PCH_LPT(dev))
294 ; /* Those bits don't exist here */
295 else if (HAS_PCH_CPT(dev))
Daniel Vettereebe6f02013-07-21 21:37:03 +0200296 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
297 else if (crtc->pipe == 0)
Jesse Barnes75770562011-10-12 09:01:58 -0700298 adpa |= ADPA_PIPE_A_SELECT;
299 else
300 adpa |= ADPA_PIPE_B_SELECT;
Jesse Barnes79e53942008-11-07 14:24:08 -0800301
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800302 if (!HAS_PCH_SPLIT(dev))
Daniel Vettereebe6f02013-07-21 21:37:03 +0200303 I915_WRITE(BCLRPAT(crtc->pipe), 0);
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800304
Daniel Vetter540a8952012-07-11 16:27:57 +0200305 I915_WRITE(crt->adpa_reg, adpa);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800306}
307
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500308static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800309{
310 struct drm_device *dev = connector->dev;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800311 struct intel_crt *crt = intel_attached_crt(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800312 struct drm_i915_private *dev_priv = dev->dev_private;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800313 u32 adpa;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800314 bool ret;
315
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800316 /* The first time through, trigger an explicit detection cycle */
317 if (crt->force_hotplug_required) {
318 bool turn_off_dac = HAS_PCH_SPLIT(dev);
319 u32 save_adpa;
Zhenyu Wang67941da2009-07-24 01:00:33 +0800320
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800321 crt->force_hotplug_required = 0;
Dave Airlied5dd96c2010-08-04 15:52:19 +1000322
Ville Syrjäläca54b812013-01-25 21:44:42 +0200323 save_adpa = adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800324 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
Dave Airlied5dd96c2010-08-04 15:52:19 +1000325
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800326 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
327 if (turn_off_dac)
328 adpa &= ~ADPA_DAC_ENABLE;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800329
Ville Syrjäläca54b812013-01-25 21:44:42 +0200330 I915_WRITE(crt->adpa_reg, adpa);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800331
Ville Syrjäläca54b812013-01-25 21:44:42 +0200332 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800333 1000))
334 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Zhenyu Wang2c072452009-06-05 15:38:42 +0800335
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800336 if (turn_off_dac) {
Ville Syrjäläca54b812013-01-25 21:44:42 +0200337 I915_WRITE(crt->adpa_reg, save_adpa);
338 POSTING_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800339 }
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800340 }
341
Zhenyu Wang2c072452009-06-05 15:38:42 +0800342 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200343 adpa = I915_READ(crt->adpa_reg);
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800344 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800345 ret = true;
346 else
347 ret = false;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800348 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800349
Zhenyu Wang2c072452009-06-05 15:38:42 +0800350 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800351}
352
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700353static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
354{
355 struct drm_device *dev = connector->dev;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200356 struct intel_crt *crt = intel_attached_crt(connector);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700357 struct drm_i915_private *dev_priv = dev->dev_private;
358 u32 adpa;
359 bool ret;
360 u32 save_adpa;
361
Ville Syrjäläca54b812013-01-25 21:44:42 +0200362 save_adpa = adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700363 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
364
365 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
366
Ville Syrjäläca54b812013-01-25 21:44:42 +0200367 I915_WRITE(crt->adpa_reg, adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700368
Ville Syrjäläca54b812013-01-25 21:44:42 +0200369 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700370 1000)) {
371 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
Ville Syrjäläca54b812013-01-25 21:44:42 +0200372 I915_WRITE(crt->adpa_reg, save_adpa);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700373 }
374
375 /* Check the status to see if both blue and green are on now */
Ville Syrjäläca54b812013-01-25 21:44:42 +0200376 adpa = I915_READ(crt->adpa_reg);
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700377 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
378 ret = true;
379 else
380 ret = false;
381
382 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
383
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700384 return ret;
385}
386
Jesse Barnes79e53942008-11-07 14:24:08 -0800387/**
388 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
389 *
390 * Not for i915G/i915GM
391 *
392 * \return true if CRT is connected.
393 * \return false if CRT is disconnected.
394 */
395static bool intel_crt_detect_hotplug(struct drm_connector *connector)
396{
397 struct drm_device *dev = connector->dev;
398 struct drm_i915_private *dev_priv = dev->dev_private;
Adam Jackson7a772c42010-05-24 16:46:29 -0400399 u32 hotplug_en, orig, stat;
400 bool ret = false;
Zhao Yakui771cb082009-03-03 18:07:52 +0800401 int i, tries = 0;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800402
Eric Anholtbad720f2009-10-22 16:11:14 -0700403 if (HAS_PCH_SPLIT(dev))
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500404 return intel_ironlake_crt_detect_hotplug(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800405
Jesse Barnes7d2c24e2012-06-15 11:55:15 -0700406 if (IS_VALLEYVIEW(dev))
407 return valleyview_crt_detect_hotplug(connector);
408
Zhao Yakui771cb082009-03-03 18:07:52 +0800409 /*
410 * On 4 series desktop, CRT detect sequence need to be done twice
411 * to get a reliable result.
412 */
Jesse Barnes79e53942008-11-07 14:24:08 -0800413
Zhao Yakui771cb082009-03-03 18:07:52 +0800414 if (IS_G4X(dev) && !IS_GM45(dev))
415 tries = 2;
416 else
417 tries = 1;
Adam Jackson7a772c42010-05-24 16:46:29 -0400418 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
Zhao Yakui771cb082009-03-03 18:07:52 +0800419 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
Jesse Barnes79e53942008-11-07 14:24:08 -0800420
Zhao Yakui771cb082009-03-03 18:07:52 +0800421 for (i = 0; i < tries ; i++) {
Zhao Yakui771cb082009-03-03 18:07:52 +0800422 /* turn on the FORCE_DETECT */
423 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
Zhao Yakui771cb082009-03-03 18:07:52 +0800424 /* wait for FORCE_DETECT to go off */
Chris Wilson913d8d12010-08-07 11:01:35 +0100425 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
426 CRT_HOTPLUG_FORCE_DETECT) == 0,
Chris Wilson481b6af2010-08-23 17:43:35 +0100427 1000))
Chris Wilson79077312010-09-12 19:58:04 +0100428 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
Zhao Yakui771cb082009-03-03 18:07:52 +0800429 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800430
Adam Jackson7a772c42010-05-24 16:46:29 -0400431 stat = I915_READ(PORT_HOTPLUG_STAT);
432 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
433 ret = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800434
Adam Jackson7a772c42010-05-24 16:46:29 -0400435 /* clear the interrupt we just generated, if any */
436 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
437
438 /* and put the bits back */
439 I915_WRITE(PORT_HOTPLUG_EN, orig);
440
441 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800442}
443
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300444static struct edid *intel_crt_get_edid(struct drm_connector *connector,
445 struct i2c_adapter *i2c)
446{
447 struct edid *edid;
448
449 edid = drm_get_edid(connector, i2c);
450
451 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
452 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
453 intel_gmbus_force_bit(i2c, true);
454 edid = drm_get_edid(connector, i2c);
455 intel_gmbus_force_bit(i2c, false);
456 }
457
458 return edid;
459}
460
461/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
462static int intel_crt_ddc_get_modes(struct drm_connector *connector,
463 struct i2c_adapter *adapter)
464{
465 struct edid *edid;
Jani Nikulaebda95a2012-10-19 14:51:51 +0300466 int ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300467
468 edid = intel_crt_get_edid(connector, adapter);
469 if (!edid)
470 return 0;
471
Jani Nikulaebda95a2012-10-19 14:51:51 +0300472 ret = intel_connector_update_modes(connector, edid);
473 kfree(edid);
474
475 return ret;
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300476}
477
David Müllerf5afcd32011-01-06 12:29:32 +0000478static bool intel_crt_detect_ddc(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -0800479{
David Müllerf5afcd32011-01-06 12:29:32 +0000480 struct intel_crt *crt = intel_attached_crt(connector);
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000481 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200482 struct edid *edid;
483 struct i2c_adapter *i2c;
Jesse Barnes79e53942008-11-07 14:24:08 -0800484
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200485 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
Jesse Barnes79e53942008-11-07 14:24:08 -0800486
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300487 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300488 edid = intel_crt_get_edid(connector, i2c);
David Müllerf5afcd32011-01-06 12:29:32 +0000489
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200490 if (edid) {
491 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
492
David Müllerf5afcd32011-01-06 12:29:32 +0000493 /*
494 * This may be a DVI-I connector with a shared DDC
495 * link between analog and digital outputs, so we
496 * have to check the EDID input spec of the attached device.
497 */
David Müllerf5afcd32011-01-06 12:29:32 +0000498 if (!is_digital) {
499 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
500 return true;
501 }
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200502
503 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
504 } else {
505 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100506 }
507
Daniel Vettera2bd1f52012-07-11 12:31:52 +0200508 kfree(edid);
509
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100510 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800511}
512
Ma Linge4a5d542009-05-26 11:31:00 +0800513static enum drm_connector_status
Chris Wilson71731882011-04-19 23:10:58 +0100514intel_crt_load_detect(struct intel_crt *crt)
Ma Linge4a5d542009-05-26 11:31:00 +0800515{
Chris Wilson71731882011-04-19 23:10:58 +0100516 struct drm_device *dev = crt->base.base.dev;
Ma Linge4a5d542009-05-26 11:31:00 +0800517 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson71731882011-04-19 23:10:58 +0100518 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
Ma Linge4a5d542009-05-26 11:31:00 +0800519 uint32_t save_bclrpat;
520 uint32_t save_vtotal;
521 uint32_t vtotal, vactive;
522 uint32_t vsample;
523 uint32_t vblank, vblank_start, vblank_end;
524 uint32_t dsl;
525 uint32_t bclrpat_reg;
526 uint32_t vtotal_reg;
527 uint32_t vblank_reg;
528 uint32_t vsync_reg;
529 uint32_t pipeconf_reg;
530 uint32_t pipe_dsl_reg;
531 uint8_t st00;
532 enum drm_connector_status status;
533
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100534 DRM_DEBUG_KMS("starting load-detect on CRT\n");
535
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800536 bclrpat_reg = BCLRPAT(pipe);
537 vtotal_reg = VTOTAL(pipe);
538 vblank_reg = VBLANK(pipe);
539 vsync_reg = VSYNC(pipe);
540 pipeconf_reg = PIPECONF(pipe);
541 pipe_dsl_reg = PIPEDSL(pipe);
Ma Linge4a5d542009-05-26 11:31:00 +0800542
543 save_bclrpat = I915_READ(bclrpat_reg);
544 save_vtotal = I915_READ(vtotal_reg);
545 vblank = I915_READ(vblank_reg);
546
547 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
548 vactive = (save_vtotal & 0x7ff) + 1;
549
550 vblank_start = (vblank & 0xfff) + 1;
551 vblank_end = ((vblank >> 16) & 0xfff) + 1;
552
553 /* Set the border color to purple. */
554 I915_WRITE(bclrpat_reg, 0x500050);
555
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100556 if (!IS_GEN2(dev)) {
Ma Linge4a5d542009-05-26 11:31:00 +0800557 uint32_t pipeconf = I915_READ(pipeconf_reg);
558 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
Chris Wilson19c55da2010-08-09 14:50:53 +0100559 POSTING_READ(pipeconf_reg);
Ma Linge4a5d542009-05-26 11:31:00 +0800560 /* Wait for next Vblank to substitue
561 * border color for Color info */
Jesse Barnes9d0498a2010-08-18 13:20:54 -0700562 intel_wait_for_vblank(dev, pipe);
Ma Linge4a5d542009-05-26 11:31:00 +0800563 st00 = I915_READ8(VGA_MSR_WRITE);
564 status = ((st00 & (1 << 4)) != 0) ?
565 connector_status_connected :
566 connector_status_disconnected;
567
568 I915_WRITE(pipeconf_reg, pipeconf);
569 } else {
570 bool restore_vblank = false;
571 int count, detect;
572
573 /*
574 * If there isn't any border, add some.
575 * Yes, this will flicker
576 */
577 if (vblank_start <= vactive && vblank_end >= vtotal) {
578 uint32_t vsync = I915_READ(vsync_reg);
579 uint32_t vsync_start = (vsync & 0xffff) + 1;
580
581 vblank_start = vsync_start;
582 I915_WRITE(vblank_reg,
583 (vblank_start - 1) |
584 ((vblank_end - 1) << 16));
585 restore_vblank = true;
586 }
587 /* sample in the vertical border, selecting the larger one */
588 if (vblank_start - vactive >= vtotal - vblank_end)
589 vsample = (vblank_start + vactive) >> 1;
590 else
591 vsample = (vtotal + vblank_end) >> 1;
592
593 /*
594 * Wait for the border to be displayed
595 */
596 while (I915_READ(pipe_dsl_reg) >= vactive)
597 ;
598 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
599 ;
600 /*
601 * Watch ST00 for an entire scanline
602 */
603 detect = 0;
604 count = 0;
605 do {
606 count++;
607 /* Read the ST00 VGA status register */
608 st00 = I915_READ8(VGA_MSR_WRITE);
609 if (st00 & (1 << 4))
610 detect++;
611 } while ((I915_READ(pipe_dsl_reg) == dsl));
612
613 /* restore vblank if necessary */
614 if (restore_vblank)
615 I915_WRITE(vblank_reg, vblank);
616 /*
617 * If more than 3/4 of the scanline detected a monitor,
618 * then it is assumed to be present. This works even on i830,
619 * where there isn't any way to force the border color across
620 * the screen
621 */
622 status = detect * 4 > count * 3 ?
623 connector_status_connected :
624 connector_status_disconnected;
625 }
626
627 /* Restore previous settings */
628 I915_WRITE(bclrpat_reg, save_bclrpat);
629
630 return status;
631}
632
Chris Wilson7b334fc2010-09-09 23:51:02 +0100633static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100634intel_crt_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800635{
636 struct drm_device *dev = connector->dev;
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300637 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000638 struct intel_crt *crt = intel_attached_crt(connector);
Ma Linge4a5d542009-05-26 11:31:00 +0800639 enum drm_connector_status status;
Daniel Vettere95c8432012-04-20 21:03:36 +0200640 struct intel_load_detect_pipe tmp;
Jesse Barnes79e53942008-11-07 14:24:08 -0800641
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300642 intel_runtime_pm_get(dev_priv);
643
Chris Wilson164c8592013-07-20 20:27:08 +0100644 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
645 connector->base.id, drm_get_connector_name(connector),
646 force);
647
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100648 if (I915_HAS_HOTPLUG(dev)) {
Daniel Vetteraaa37732012-06-16 15:30:32 +0200649 /* We can not rely on the HPD pin always being correctly wired
650 * up, for example many KVM do not pass it through, and so
651 * only trust an assertion that the monitor is connected.
652 */
Chris Wilson6ec3d0c2010-09-22 18:17:01 +0100653 if (intel_crt_detect_hotplug(connector)) {
654 DRM_DEBUG_KMS("CRT detected via hotplug\n");
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300655 status = connector_status_connected;
656 goto out;
Daniel Vetteraaa37732012-06-16 15:30:32 +0200657 } else
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800658 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 }
660
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300661 if (intel_crt_detect_ddc(connector)) {
662 status = connector_status_connected;
663 goto out;
664 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800665
Daniel Vetteraaa37732012-06-16 15:30:32 +0200666 /* Load detection is broken on HPD capable machines. Whoever wants a
667 * broken monitor (without edid) to work behind a broken kvm (that fails
668 * to have the right resistors for HP detection) needs to fix this up.
669 * For now just bail out. */
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300670 if (I915_HAS_HOTPLUG(dev)) {
671 status = connector_status_disconnected;
672 goto out;
673 }
Daniel Vetteraaa37732012-06-16 15:30:32 +0200674
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300675 if (!force) {
676 status = connector->status;
677 goto out;
678 }
Chris Wilson7b334fc2010-09-09 23:51:02 +0100679
Ma Linge4a5d542009-05-26 11:31:00 +0800680 /* for pre-945g platforms use load detect */
Daniel Vetterd2434ab2012-08-12 21:20:10 +0200681 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
Daniel Vettere95c8432012-04-20 21:03:36 +0200682 if (intel_crt_detect_ddc(connector))
683 status = connector_status_connected;
684 else
685 status = intel_crt_load_detect(crt);
Daniel Vetterd2434ab2012-08-12 21:20:10 +0200686 intel_release_load_detect_pipe(connector, &tmp);
Daniel Vettere95c8432012-04-20 21:03:36 +0200687 } else
688 status = connector_status_unknown;
Ma Linge4a5d542009-05-26 11:31:00 +0800689
Paulo Zanonic19a0df2014-02-21 13:52:22 -0300690out:
691 intel_runtime_pm_put(dev_priv);
Ma Linge4a5d542009-05-26 11:31:00 +0800692 return status;
Jesse Barnes79e53942008-11-07 14:24:08 -0800693}
694
695static void intel_crt_destroy(struct drm_connector *connector)
696{
Jesse Barnes79e53942008-11-07 14:24:08 -0800697 drm_connector_cleanup(connector);
698 kfree(connector);
699}
700
701static int intel_crt_get_modes(struct drm_connector *connector)
702{
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800703 struct drm_device *dev = connector->dev;
Chris Wilsonf899fc62010-07-20 15:44:45 -0700704 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +0100705 int ret;
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800706 struct i2c_adapter *i2c;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800707
Rodrigo Vivi41aa3442013-05-09 20:03:18 -0300708 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300709 ret = intel_crt_ddc_get_modes(connector, i2c);
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800710 if (ret || !IS_G4X(dev))
Chris Wilsonf899fc62010-07-20 15:44:45 -0700711 return ret;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800712
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800713 /* Try to probe digital port for output in DVI-I -> VGA mode. */
Daniel Kurtz3bd7d902012-03-28 02:36:14 +0800714 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Jani Nikulaf1a2f5b2012-08-13 13:22:35 +0300715 return intel_crt_ddc_get_modes(connector, i2c);
Jesse Barnes79e53942008-11-07 14:24:08 -0800716}
717
718static int intel_crt_set_property(struct drm_connector *connector,
719 struct drm_property *property,
720 uint64_t value)
721{
Jesse Barnes79e53942008-11-07 14:24:08 -0800722 return 0;
723}
724
Chris Wilsonf3269052011-01-24 15:17:08 +0000725static void intel_crt_reset(struct drm_connector *connector)
726{
727 struct drm_device *dev = connector->dev;
Daniel Vetter2e938892012-10-11 20:08:24 +0200728 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonf3269052011-01-24 15:17:08 +0000729 struct intel_crt *crt = intel_attached_crt(connector);
730
Chris Wilson10603ca2013-08-26 19:51:06 -0300731 if (INTEL_INFO(dev)->gen >= 5) {
Daniel Vetter2e938892012-10-11 20:08:24 +0200732 u32 adpa;
733
Ville Syrjäläca54b812013-01-25 21:44:42 +0200734 adpa = I915_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200735 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
736 adpa |= ADPA_HOTPLUG_BITS;
Ville Syrjäläca54b812013-01-25 21:44:42 +0200737 I915_WRITE(crt->adpa_reg, adpa);
738 POSTING_READ(crt->adpa_reg);
Daniel Vetter2e938892012-10-11 20:08:24 +0200739
740 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
Chris Wilsonf3269052011-01-24 15:17:08 +0000741 crt->force_hotplug_required = 1;
Daniel Vetter2e938892012-10-11 20:08:24 +0200742 }
743
Chris Wilsonf3269052011-01-24 15:17:08 +0000744}
745
Jesse Barnes79e53942008-11-07 14:24:08 -0800746/*
747 * Routines for controlling stuff on the analog port
748 */
749
Jesse Barnes79e53942008-11-07 14:24:08 -0800750static const struct drm_connector_funcs intel_crt_connector_funcs = {
Chris Wilsonf3269052011-01-24 15:17:08 +0000751 .reset = intel_crt_reset,
Daniel Vetterb2cabb02012-07-01 22:42:24 +0200752 .dpms = intel_crt_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800753 .detect = intel_crt_detect,
754 .fill_modes = drm_helper_probe_single_connector_modes,
755 .destroy = intel_crt_destroy,
756 .set_property = intel_crt_set_property,
757};
758
759static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
760 .mode_valid = intel_crt_mode_valid,
761 .get_modes = intel_crt_get_modes,
Chris Wilsondf0e9242010-09-09 16:20:55 +0100762 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800763};
764
Jesse Barnes79e53942008-11-07 14:24:08 -0800765static const struct drm_encoder_funcs intel_crt_enc_funcs = {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100766 .destroy = intel_encoder_destroy,
Jesse Barnes79e53942008-11-07 14:24:08 -0800767};
768
Duncan Laurie8ca40132011-10-25 15:42:21 -0700769static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
770{
Daniel Vetterbc0daf42012-04-01 13:16:49 +0200771 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
Duncan Laurie8ca40132011-10-25 15:42:21 -0700772 return 1;
773}
774
775static const struct dmi_system_id intel_no_crt[] = {
776 {
777 .callback = intel_no_crt_dmi_callback,
778 .ident = "ACER ZGB",
779 .matches = {
780 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
781 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
782 },
783 },
784 { }
785};
786
Jesse Barnes79e53942008-11-07 14:24:08 -0800787void intel_crt_init(struct drm_device *dev)
788{
789 struct drm_connector *connector;
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000790 struct intel_crt *crt;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800791 struct intel_connector *intel_connector;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200792 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800793
Duncan Laurie8ca40132011-10-25 15:42:21 -0700794 /* Skip machines without VGA that falsely report hotplug events */
795 if (dmi_check_system(intel_no_crt))
796 return;
797
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000798 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
799 if (!crt)
Jesse Barnes79e53942008-11-07 14:24:08 -0800800 return;
801
Daniel Vetterb14c5672013-09-19 12:18:32 +0200802 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800803 if (!intel_connector) {
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000804 kfree(crt);
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800805 return;
806 }
807
808 connector = &intel_connector->base;
Adam Jackson637f44d2013-03-25 15:40:05 -0400809 crt->connector = intel_connector;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800810 drm_connector_init(dev, &intel_connector->base,
Jesse Barnes79e53942008-11-07 14:24:08 -0800811 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
812
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000813 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
Jesse Barnes79e53942008-11-07 14:24:08 -0800814 DRM_MODE_ENCODER_DAC);
815
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000816 intel_connector_attach_encoder(intel_connector, &crt->base);
Jesse Barnes79e53942008-11-07 14:24:08 -0800817
Chris Wilsonc9a1c4c2010-11-16 10:58:37 +0000818 crt->base.type = INTEL_OUTPUT_ANALOG;
Daniel Vetter66a92782012-07-12 20:08:18 +0200819 crt->base.cloneable = true;
Paulo Zanonid63fa0d2012-11-20 13:27:35 -0200820 if (IS_I830(dev))
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300821 crt->base.crtc_mask = (1 << 0);
822 else
Keith Packard08268742012-08-13 21:34:45 -0700823 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
Eugeni Dodonov59c859d2012-05-09 15:37:19 -0300824
Daniel Vetterdbb02572012-01-28 14:49:23 +0100825 if (IS_GEN2(dev))
826 connector->interlace_allowed = 0;
827 else
828 connector->interlace_allowed = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800829 connector->doublescan_allowed = 0;
830
Jesse Barnesdf0323c2012-04-17 15:06:33 -0700831 if (HAS_PCH_SPLIT(dev))
Daniel Vetter540a8952012-07-11 16:27:57 +0200832 crt->adpa_reg = PCH_ADPA;
833 else if (IS_VALLEYVIEW(dev))
834 crt->adpa_reg = VLV_ADPA;
Jesse Barnesdf0323c2012-04-17 15:06:33 -0700835 else
Daniel Vetter540a8952012-07-11 16:27:57 +0200836 crt->adpa_reg = ADPA;
Jesse Barnesdf0323c2012-04-17 15:06:33 -0700837
Daniel Vetter5bfe2ac2013-03-27 00:44:55 +0100838 crt->base.compute_config = intel_crt_compute_config;
Daniel Vettereebe6f02013-07-21 21:37:03 +0200839 crt->base.mode_set = intel_crt_mode_set;
Daniel Vetter21246042012-07-01 14:58:27 +0200840 crt->base.disable = intel_disable_crt;
841 crt->base.enable = intel_enable_crt;
Egbert Eich1d843f92013-02-25 12:06:49 -0500842 if (I915_HAS_HOTPLUG(dev))
843 crt->base.hpd_pin = HPD_CRT;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200844 if (HAS_DDI(dev)) {
845 crt->base.get_config = hsw_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200846 crt->base.get_hw_state = intel_ddi_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200847 } else {
848 crt->base.get_config = intel_crt_get_config;
Paulo Zanoni4eda01b2012-10-31 18:12:21 -0200849 crt->base.get_hw_state = intel_crt_get_hw_state;
Ville Syrjäläa2985792013-11-07 19:25:59 +0200850 }
Daniel Vettere403fc92012-07-02 13:41:21 +0200851 intel_connector->get_hw_state = intel_connector_get_hw_state;
Imre Deak4932e2c2014-02-11 17:12:48 +0200852 intel_connector->unregister = intel_connector_unregister;
Daniel Vetter21246042012-07-01 14:58:27 +0200853
Jesse Barnes79e53942008-11-07 14:24:08 -0800854 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
855
856 drm_sysfs_connector_add(connector);
Jesse Barnesb01f2c32009-12-11 11:07:17 -0800857
Egbert Eich821450c2013-04-16 13:36:55 +0200858 if (!I915_HAS_HOTPLUG(dev))
859 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000860
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800861 /*
862 * Configure the automatic hotplug detection stuff
863 */
864 crt->force_hotplug_required = 0;
Keith Packarde7dbb2f2010-11-16 16:03:53 +0800865
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200866 /*
Damien Lespiau3e683202012-12-11 18:48:29 +0000867 * TODO: find a proper way to discover whether we need to set the the
868 * polarity and link reversal bits or not, instead of relying on the
869 * BIOS.
Paulo Zanoni68d18ad2012-12-01 12:04:26 -0200870 */
Damien Lespiau3e683202012-12-11 18:48:29 +0000871 if (HAS_PCH_LPT(dev)) {
872 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
873 FDI_RX_LINK_REVERSAL_OVERRIDE;
874
875 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
876 }
Daniel Vetter754970ee2014-01-16 22:28:44 +0100877
878 intel_crt_reset(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -0800879}