blob: c0e454bb6a8df646b9266afbffa76ed179dff0fc [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
Toshi Kikuchi5aabff02014-12-02 10:55:54 +020020#include <linux/of.h>
Kalle Valo5e3dd152013-06-12 20:52:10 +030021
22#include "core.h"
23#include "mac.h"
24#include "htc.h"
25#include "hif.h"
26#include "wmi.h"
27#include "bmi.h"
28#include "debug.h"
29#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030030#include "testmode.h"
Michal Kaziord7579d12014-12-03 10:10:54 +020031#include "wmi-ops.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030032
33unsigned int ath10k_debug_mask;
34static bool uart_print;
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020035static bool skip_otp;
36
Kalle Valo5e3dd152013-06-12 20:52:10 +030037module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
38module_param(uart_print, bool, 0644);
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020039module_param(skip_otp, bool, 0644);
40
Kalle Valo5e3dd152013-06-12 20:52:10 +030041MODULE_PARM_DESC(debug_mask, "Debugging mask");
42MODULE_PARM_DESC(uart_print, "Uart target debugging");
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020043MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
Kalle Valo5e3dd152013-06-12 20:52:10 +030044
45static const struct ath10k_hw_params ath10k_hw_params_list[] = {
46 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030047 .id = QCA988X_HW_2_0_VERSION,
48 .name = "qca988x hw2.0",
49 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
Michal Kazior3a8200b2014-12-02 10:55:55 +020050 .uart_pin = 7,
Kalle Valo5e3dd152013-06-12 20:52:10 +030051 .fw = {
52 .dir = QCA988X_HW_2_0_FW_DIR,
53 .fw = QCA988X_HW_2_0_FW_FILE,
54 .otp = QCA988X_HW_2_0_OTP_FILE,
55 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
Michal Kazior9764a2a2014-12-02 10:55:54 +020056 .board_size = QCA988X_BOARD_DATA_SZ,
57 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
Kalle Valo5e3dd152013-06-12 20:52:10 +030058 },
59 },
Michal Kaziord63955b2015-01-24 12:14:49 +020060 {
61 .id = QCA6174_HW_2_1_VERSION,
62 .name = "qca6174 hw2.1",
63 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
64 .uart_pin = 6,
65 .fw = {
66 .dir = QCA6174_HW_2_1_FW_DIR,
67 .fw = QCA6174_HW_2_1_FW_FILE,
68 .otp = QCA6174_HW_2_1_OTP_FILE,
69 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
70 .board_size = QCA6174_BOARD_DATA_SZ,
71 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
72 },
73 },
74 {
75 .id = QCA6174_HW_3_0_VERSION,
76 .name = "qca6174 hw3.0",
77 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
78 .uart_pin = 6,
79 .fw = {
80 .dir = QCA6174_HW_3_0_FW_DIR,
81 .fw = QCA6174_HW_3_0_FW_FILE,
82 .otp = QCA6174_HW_3_0_OTP_FILE,
83 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
84 .board_size = QCA6174_BOARD_DATA_SZ,
85 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
86 },
87 },
Michal Kazior608b8f72015-01-29 13:24:33 +010088 {
89 .id = QCA6174_HW_3_2_VERSION,
90 .name = "qca6174 hw3.2",
91 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
92 .uart_pin = 6,
93 .fw = {
94 /* uses same binaries as hw3.0 */
95 .dir = QCA6174_HW_3_0_FW_DIR,
96 .fw = QCA6174_HW_3_0_FW_FILE,
97 .otp = QCA6174_HW_3_0_OTP_FILE,
98 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
99 .board_size = QCA6174_BOARD_DATA_SZ,
100 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
101 },
102 },
Kalle Valo5e3dd152013-06-12 20:52:10 +0300103};
104
105static void ath10k_send_suspend_complete(struct ath10k *ar)
106{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200107 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300108
Marek Puzyniak9042e172014-02-10 17:14:23 +0100109 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300110}
111
Kalle Valo5e3dd152013-06-12 20:52:10 +0300112static int ath10k_init_configure_target(struct ath10k *ar)
113{
114 u32 param_host;
115 int ret;
116
117 /* tell target which HTC version it is used*/
118 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
119 HTC_PROTOCOL_VERSION);
120 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200121 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300122 return ret;
123 }
124
125 /* set the firmware mode to STA/IBSS/AP */
126 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
127 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200128 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300129 return ret;
130 }
131
132 /* TODO following parameters need to be re-visited. */
133 /* num_device */
134 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
135 /* Firmware mode */
136 /* FIXME: Why FW_MODE_AP ??.*/
137 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
138 /* mac_addr_method */
139 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
140 /* firmware_bridge */
141 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
142 /* fwsubmode */
143 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
144
145 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
146 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200147 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300148 return ret;
149 }
150
151 /* We do all byte-swapping on the host */
152 ret = ath10k_bmi_write32(ar, hi_be, 0);
153 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200154 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300155 return ret;
156 }
157
158 /* FW descriptor/Data swap flags */
159 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
160
161 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200162 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300163 return ret;
164 }
165
166 return 0;
167}
168
169static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
170 const char *dir,
171 const char *file)
172{
173 char filename[100];
174 const struct firmware *fw;
175 int ret;
176
177 if (file == NULL)
178 return ERR_PTR(-ENOENT);
179
180 if (dir == NULL)
181 dir = ".";
182
183 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
184 ret = request_firmware(&fw, filename, ar->dev);
185 if (ret)
186 return ERR_PTR(ret);
187
188 return fw;
189}
190
Kalle Valoa58227e2014-10-13 09:40:59 +0300191static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
192 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300193{
Michal Kazior9764a2a2014-12-02 10:55:54 +0200194 u32 board_data_size = ar->hw_params.fw.board_size;
195 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 u32 board_ext_data_addr;
197 int ret;
198
199 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
200 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200201 ath10k_err(ar, "could not read board ext data addr (%d)\n",
202 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 return ret;
204 }
205
Michal Kazior7aa7a722014-08-25 12:09:38 +0200206 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300207 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300208 board_ext_data_addr);
209
210 if (board_ext_data_addr == 0)
211 return 0;
212
Kalle Valoa58227e2014-10-13 09:40:59 +0300213 if (data_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200214 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300215 data_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300216 return -EINVAL;
217 }
218
219 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valoa58227e2014-10-13 09:40:59 +0300220 data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300221 board_ext_data_size);
222 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200223 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224 return ret;
225 }
226
227 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
228 (board_ext_data_size << 16) | 1);
229 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200230 ath10k_err(ar, "could not write board ext data bit (%d)\n",
231 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232 return ret;
233 }
234
235 return 0;
236}
237
Kalle Valoa58227e2014-10-13 09:40:59 +0300238static int ath10k_download_board_data(struct ath10k *ar, const void *data,
239 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300240{
Michal Kazior9764a2a2014-12-02 10:55:54 +0200241 u32 board_data_size = ar->hw_params.fw.board_size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300242 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300243 int ret;
244
Kalle Valoa58227e2014-10-13 09:40:59 +0300245 ret = ath10k_push_board_ext_data(ar, data, data_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300246 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200247 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 goto exit;
249 }
250
251 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
252 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200253 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300254 goto exit;
255 }
256
Kalle Valoa58227e2014-10-13 09:40:59 +0300257 ret = ath10k_bmi_write_memory(ar, address, data,
Kalle Valo958df3a2013-09-27 19:55:01 +0300258 min_t(u32, board_data_size,
Kalle Valoa58227e2014-10-13 09:40:59 +0300259 data_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300260 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200261 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300262 goto exit;
263 }
264
265 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
266 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200267 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300268 goto exit;
269 }
270
271exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300272 return ret;
273}
274
Kalle Valoa58227e2014-10-13 09:40:59 +0300275static int ath10k_download_cal_file(struct ath10k *ar)
276{
277 int ret;
278
279 if (!ar->cal_file)
280 return -ENOENT;
281
282 if (IS_ERR(ar->cal_file))
283 return PTR_ERR(ar->cal_file);
284
285 ret = ath10k_download_board_data(ar, ar->cal_file->data,
286 ar->cal_file->size);
287 if (ret) {
288 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
289 return ret;
290 }
291
292 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
293
294 return 0;
295}
296
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200297static int ath10k_download_cal_dt(struct ath10k *ar)
298{
299 struct device_node *node;
300 int data_len;
301 void *data;
302 int ret;
303
304 node = ar->dev->of_node;
305 if (!node)
306 /* Device Tree is optional, don't print any warnings if
307 * there's no node for ath10k.
308 */
309 return -ENOENT;
310
311 if (!of_get_property(node, "qcom,ath10k-calibration-data",
312 &data_len)) {
313 /* The calibration data node is optional */
314 return -ENOENT;
315 }
316
317 if (data_len != QCA988X_CAL_DATA_LEN) {
318 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
319 data_len);
320 ret = -EMSGSIZE;
321 goto out;
322 }
323
324 data = kmalloc(data_len, GFP_KERNEL);
325 if (!data) {
326 ret = -ENOMEM;
327 goto out;
328 }
329
330 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
331 data, data_len);
332 if (ret) {
333 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
334 ret);
335 goto out_free;
336 }
337
338 ret = ath10k_download_board_data(ar, data, data_len);
339 if (ret) {
340 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
341 ret);
342 goto out_free;
343 }
344
345 ret = 0;
346
347out_free:
348 kfree(data);
349
350out:
351 return ret;
352}
353
Kalle Valo5e3dd152013-06-12 20:52:10 +0300354static int ath10k_download_and_run_otp(struct ath10k *ar)
355{
Kalle Valod6d4a582014-03-11 17:33:19 +0200356 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300357 int ret;
358
Kalle Valoa58227e2014-10-13 09:40:59 +0300359 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
Kalle Valo83091552014-10-13 09:40:53 +0300360 if (ret) {
361 ath10k_err(ar, "failed to download board data: %d\n", ret);
362 return ret;
363 }
364
Kalle Valo5e3dd152013-06-12 20:52:10 +0300365 /* OTP is optional */
366
Kalle Valo7f06ea12014-03-11 17:33:28 +0200367 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200368 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700369 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300370 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200371 }
372
Michal Kazior7aa7a722014-08-25 12:09:38 +0200373 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200374 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300375
Kalle Valo958df3a2013-09-27 19:55:01 +0300376 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300377 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200378 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200379 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300380 }
381
Kalle Valod6d4a582014-03-11 17:33:19 +0200382 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200384 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200385 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300386 }
387
Michal Kazior7aa7a722014-08-25 12:09:38 +0200388 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200389
Rajkumar Manoharan8868b122014-11-17 16:44:14 +0200390 if (!skip_otp && result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200391 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200392 return -EINVAL;
393 }
394
395 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300396}
397
Kalle Valo43d2a302014-09-10 18:23:30 +0300398static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300399{
Kalle Valo43d2a302014-09-10 18:23:30 +0300400 u32 address, data_len;
401 const char *mode_name;
402 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300403 int ret;
404
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 address = ar->hw_params.patch_load_addr;
406
Kalle Valo43d2a302014-09-10 18:23:30 +0300407 switch (mode) {
408 case ATH10K_FIRMWARE_MODE_NORMAL:
409 data = ar->firmware_data;
410 data_len = ar->firmware_len;
411 mode_name = "normal";
412 break;
413 case ATH10K_FIRMWARE_MODE_UTF:
414 data = ar->testmode.utf->data;
415 data_len = ar->testmode.utf->size;
416 mode_name = "utf";
417 break;
418 default:
419 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
420 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300421 }
422
Kalle Valo43d2a302014-09-10 18:23:30 +0300423 ath10k_dbg(ar, ATH10K_DBG_BOOT,
424 "boot uploading firmware image %p len %d mode %s\n",
425 data, data_len, mode_name);
426
427 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
428 if (ret) {
429 ath10k_err(ar, "failed to download %s firmware: %d\n",
430 mode_name, ret);
431 return ret;
432 }
433
Michal Kazior29385052013-07-16 09:38:58 +0200434 return ret;
435}
436
437static void ath10k_core_free_firmware_files(struct ath10k *ar)
438{
Markus Elfringdb2cf862015-02-04 19:30:23 +0100439 if (!IS_ERR(ar->board))
Kalle Valo36527912013-09-27 19:54:55 +0300440 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200441
Markus Elfringdb2cf862015-02-04 19:30:23 +0100442 if (!IS_ERR(ar->otp))
Michal Kazior29385052013-07-16 09:38:58 +0200443 release_firmware(ar->otp);
444
Markus Elfringdb2cf862015-02-04 19:30:23 +0100445 if (!IS_ERR(ar->firmware))
Michal Kazior29385052013-07-16 09:38:58 +0200446 release_firmware(ar->firmware);
447
Markus Elfringdb2cf862015-02-04 19:30:23 +0100448 if (!IS_ERR(ar->cal_file))
Kalle Valoa58227e2014-10-13 09:40:59 +0300449 release_firmware(ar->cal_file);
450
Kalle Valo36527912013-09-27 19:54:55 +0300451 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300452 ar->board_data = NULL;
453 ar->board_len = 0;
454
Michal Kazior29385052013-07-16 09:38:58 +0200455 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300456 ar->otp_data = NULL;
457 ar->otp_len = 0;
458
Michal Kazior29385052013-07-16 09:38:58 +0200459 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300460 ar->firmware_data = NULL;
461 ar->firmware_len = 0;
Kalle Valoa58227e2014-10-13 09:40:59 +0300462
463 ar->cal_file = NULL;
464}
465
466static int ath10k_fetch_cal_file(struct ath10k *ar)
467{
468 char filename[100];
469
470 /* cal-<bus>-<id>.bin */
471 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
472 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
473
474 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
475 if (IS_ERR(ar->cal_file))
476 /* calibration file is optional, don't print any warnings */
477 return PTR_ERR(ar->cal_file);
478
479 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
480 ATH10K_FW_DIR, filename);
481
482 return 0;
Michal Kazior29385052013-07-16 09:38:58 +0200483}
484
Kalle Valo1a222432013-09-27 19:55:07 +0300485static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200486{
487 int ret = 0;
488
489 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200490 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200491 return -EINVAL;
492 }
493
494 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200495 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200496 return -EINVAL;
497 }
498
Kalle Valo36527912013-09-27 19:54:55 +0300499 ar->board = ath10k_fetch_fw_file(ar,
500 ar->hw_params.fw.dir,
501 ar->hw_params.fw.board);
502 if (IS_ERR(ar->board)) {
503 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200504 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200505 goto err;
506 }
507
Kalle Valo958df3a2013-09-27 19:55:01 +0300508 ar->board_data = ar->board->data;
509 ar->board_len = ar->board->size;
510
Michal Kazior29385052013-07-16 09:38:58 +0200511 ar->firmware = ath10k_fetch_fw_file(ar,
512 ar->hw_params.fw.dir,
513 ar->hw_params.fw.fw);
514 if (IS_ERR(ar->firmware)) {
515 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200516 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200517 goto err;
518 }
519
Kalle Valo958df3a2013-09-27 19:55:01 +0300520 ar->firmware_data = ar->firmware->data;
521 ar->firmware_len = ar->firmware->size;
522
Michal Kazior29385052013-07-16 09:38:58 +0200523 /* OTP may be undefined. If so, don't fetch it at all */
524 if (ar->hw_params.fw.otp == NULL)
525 return 0;
526
527 ar->otp = ath10k_fetch_fw_file(ar,
528 ar->hw_params.fw.dir,
529 ar->hw_params.fw.otp);
530 if (IS_ERR(ar->otp)) {
531 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200532 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200533 goto err;
534 }
535
Kalle Valo958df3a2013-09-27 19:55:01 +0300536 ar->otp_data = ar->otp->data;
537 ar->otp_len = ar->otp->size;
538
Michal Kazior29385052013-07-16 09:38:58 +0200539 return 0;
540
541err:
542 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300543 return ret;
544}
545
Kalle Valo1a222432013-09-27 19:55:07 +0300546static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
547{
548 size_t magic_len, len, ie_len;
549 int ie_id, i, index, bit, ret;
550 struct ath10k_fw_ie *hdr;
551 const u8 *data;
Kalle Valo202e86e2014-12-03 10:10:08 +0200552 __le32 *timestamp, *version;
Kalle Valo1a222432013-09-27 19:55:07 +0300553
554 /* first fetch the firmware file (firmware-*.bin) */
555 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
556 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200557 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700558 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300559 return PTR_ERR(ar->firmware);
560 }
561
562 data = ar->firmware->data;
563 len = ar->firmware->size;
564
565 /* magic also includes the null byte, check that as well */
566 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
567
568 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200569 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700570 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200571 ret = -EINVAL;
572 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300573 }
574
575 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200577 ret = -EINVAL;
578 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300579 }
580
581 /* jump over the padding */
582 magic_len = ALIGN(magic_len, 4);
583
584 len -= magic_len;
585 data += magic_len;
586
587 /* loop elements */
588 while (len > sizeof(struct ath10k_fw_ie)) {
589 hdr = (struct ath10k_fw_ie *)data;
590
591 ie_id = le32_to_cpu(hdr->id);
592 ie_len = le32_to_cpu(hdr->len);
593
594 len -= sizeof(*hdr);
595 data += sizeof(*hdr);
596
597 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200598 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300599 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200600 ret = -EINVAL;
601 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300602 }
603
604 switch (ie_id) {
605 case ATH10K_FW_IE_FW_VERSION:
606 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
607 break;
608
609 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
610 ar->hw->wiphy->fw_version[ie_len] = '\0';
611
Michal Kazior7aa7a722014-08-25 12:09:38 +0200612 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300613 "found fw version %s\n",
614 ar->hw->wiphy->fw_version);
615 break;
616 case ATH10K_FW_IE_TIMESTAMP:
617 if (ie_len != sizeof(u32))
618 break;
619
620 timestamp = (__le32 *)data;
621
Michal Kazior7aa7a722014-08-25 12:09:38 +0200622 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300623 le32_to_cpup(timestamp));
624 break;
625 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200626 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300627 "found firmware features ie (%zd B)\n",
628 ie_len);
629
630 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
631 index = i / 8;
632 bit = i % 8;
633
634 if (index == ie_len)
635 break;
636
Ben Greearf591a1a2014-02-04 19:51:38 +0200637 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200638 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200639 "Enabling feature bit: %i\n",
640 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300641 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200642 }
Kalle Valo1a222432013-09-27 19:55:07 +0300643 }
644
Michal Kazior7aa7a722014-08-25 12:09:38 +0200645 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300646 ar->fw_features,
647 sizeof(ar->fw_features));
648 break;
649 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200650 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300651 "found fw image ie (%zd B)\n",
652 ie_len);
653
654 ar->firmware_data = data;
655 ar->firmware_len = ie_len;
656
657 break;
658 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200659 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300660 "found otp image ie (%zd B)\n",
661 ie_len);
662
663 ar->otp_data = data;
664 ar->otp_len = ie_len;
665
666 break;
Kalle Valo202e86e2014-12-03 10:10:08 +0200667 case ATH10K_FW_IE_WMI_OP_VERSION:
668 if (ie_len != sizeof(u32))
669 break;
670
671 version = (__le32 *)data;
672
673 ar->wmi.op_version = le32_to_cpup(version);
674
675 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
676 ar->wmi.op_version);
677 break;
Kalle Valo1a222432013-09-27 19:55:07 +0300678 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200679 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300680 le32_to_cpu(hdr->id));
681 break;
682 }
683
684 /* jump over the padding */
685 ie_len = ALIGN(ie_len, 4);
686
687 len -= ie_len;
688 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300689 }
Kalle Valo1a222432013-09-27 19:55:07 +0300690
691 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200692 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700693 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300694 ret = -ENOMEDIUM;
695 goto err;
696 }
697
698 /* now fetch the board file */
699 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200700 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300701 ret = -EINVAL;
702 goto err;
703 }
704
705 ar->board = ath10k_fetch_fw_file(ar,
706 ar->hw_params.fw.dir,
707 ar->hw_params.fw.board);
708 if (IS_ERR(ar->board)) {
709 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200710 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700711 ar->hw_params.fw.dir, ar->hw_params.fw.board,
712 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300713 goto err;
714 }
715
716 ar->board_data = ar->board->data;
717 ar->board_len = ar->board->size;
718
719 return 0;
720
721err:
722 ath10k_core_free_firmware_files(ar);
723 return ret;
724}
725
726static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
727{
728 int ret;
729
Kalle Valoa58227e2014-10-13 09:40:59 +0300730 /* calibration file is optional, don't check for any errors */
731 ath10k_fetch_cal_file(ar);
732
Rajkumar Manoharan4a16fbe2014-12-17 12:21:12 +0200733 ar->fw_api = 4;
734 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
735
736 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
737 if (ret == 0)
738 goto success;
739
Michal Kazior24c88f72014-07-25 13:32:17 +0200740 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200741 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200742
743 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
744 if (ret == 0)
745 goto success;
746
Ben Greear53c02282014-03-24 12:20:41 -0700747 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200748 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700749
Kalle Valo1a222432013-09-27 19:55:07 +0300750 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700751 if (ret == 0)
752 goto success;
753
754 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200755 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300756
757 ret = ath10k_core_fetch_firmware_api_1(ar);
758 if (ret)
759 return ret;
760
Ben Greear53c02282014-03-24 12:20:41 -0700761success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200762 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300763
764 return 0;
765}
766
Kalle Valo83091552014-10-13 09:40:53 +0300767static int ath10k_download_cal_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300768{
769 int ret;
770
Kalle Valoa58227e2014-10-13 09:40:59 +0300771 ret = ath10k_download_cal_file(ar);
772 if (ret == 0) {
773 ar->cal_mode = ATH10K_CAL_MODE_FILE;
774 goto done;
775 }
776
777 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Toshi Kikuchi5aabff02014-12-02 10:55:54 +0200778 "boot did not find a calibration file, try DT next: %d\n",
779 ret);
780
781 ret = ath10k_download_cal_dt(ar);
782 if (ret == 0) {
783 ar->cal_mode = ATH10K_CAL_MODE_DT;
784 goto done;
785 }
786
787 ath10k_dbg(ar, ATH10K_DBG_BOOT,
788 "boot did not find DT entry, try OTP next: %d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300789 ret);
790
Kalle Valo5e3dd152013-06-12 20:52:10 +0300791 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700792 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200793 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300794 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700795 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300796
Kalle Valoa58227e2014-10-13 09:40:59 +0300797 ar->cal_mode = ATH10K_CAL_MODE_OTP;
798
799done:
800 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
801 ath10k_cal_mode_str(ar->cal_mode));
802 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300803}
804
805static int ath10k_init_uart(struct ath10k *ar)
806{
807 int ret;
808
809 /*
810 * Explicitly setting UART prints to zero as target turns it on
811 * based on scratch registers.
812 */
813 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
814 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200815 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300816 return ret;
817 }
818
Kalle Valoc8c39af2013-11-20 10:00:41 +0200819 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300820 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300821
Michal Kazior3a8200b2014-12-02 10:55:55 +0200822 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300823 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200824 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300825 return ret;
826 }
827
828 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
829 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200830 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300831 return ret;
832 }
833
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200834 /* Set the UART baud rate to 19200. */
835 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
836 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200837 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200838 return ret;
839 }
840
Michal Kazior7aa7a722014-08-25 12:09:38 +0200841 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300842 return 0;
843}
844
845static int ath10k_init_hw_params(struct ath10k *ar)
846{
847 const struct ath10k_hw_params *uninitialized_var(hw_params);
848 int i;
849
850 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
851 hw_params = &ath10k_hw_params_list[i];
852
853 if (hw_params->id == ar->target_version)
854 break;
855 }
856
857 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200858 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300859 ar->target_version);
860 return -EINVAL;
861 }
862
863 ar->hw_params = *hw_params;
864
Michal Kazior7aa7a722014-08-25 12:09:38 +0200865 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200866 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300867
868 return 0;
869}
870
Michal Kazioraffd3212013-07-16 09:54:35 +0200871static void ath10k_core_restart(struct work_struct *work)
872{
873 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
874
Michal Kazior7962b0d2014-10-28 10:34:38 +0100875 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
876
877 /* Place a barrier to make sure the compiler doesn't reorder
878 * CRASH_FLUSH and calling other functions.
879 */
880 barrier();
881
882 ieee80211_stop_queues(ar->hw);
883 ath10k_drain_tx(ar);
884 complete_all(&ar->scan.started);
885 complete_all(&ar->scan.completed);
886 complete_all(&ar->scan.on_channel);
887 complete_all(&ar->offchan_tx_completed);
888 complete_all(&ar->install_key_done);
889 complete_all(&ar->vdev_setup_done);
Rajkumar Manoharanac2953f2014-12-17 12:22:26 +0200890 complete_all(&ar->thermal.wmi_sync);
Michal Kazior7962b0d2014-10-28 10:34:38 +0100891 wake_up(&ar->htt.empty_tx_wq);
892 wake_up(&ar->wmi.tx_credits_wq);
893 wake_up(&ar->peer_mapping_wq);
894
Michal Kazioraffd3212013-07-16 09:54:35 +0200895 mutex_lock(&ar->conf_mutex);
896
897 switch (ar->state) {
898 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200899 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200900 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200901 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200902 ieee80211_restart_hw(ar->hw);
903 break;
904 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300905 /* this can happen if driver is being unloaded
906 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200907 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200908 break;
909 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300910 /* hw restart might be requested from multiple places */
911 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200912 case ATH10K_STATE_RESTARTED:
913 ar->state = ATH10K_STATE_WEDGED;
914 /* fall through */
915 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200916 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200917 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300918 case ATH10K_STATE_UTF:
919 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
920 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200921 }
922
923 mutex_unlock(&ar->conf_mutex);
924}
925
Kalle Valo5f2144d2014-12-03 10:09:59 +0200926static int ath10k_core_init_firmware_features(struct ath10k *ar)
Michal Kaziorcfd10612014-11-25 15:16:05 +0100927{
Kalle Valo5f2144d2014-12-03 10:09:59 +0200928 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
929 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
930 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
931 return -EINVAL;
932 }
933
Kalle Valo202e86e2014-12-03 10:10:08 +0200934 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
935 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
936 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
937 return -EINVAL;
938 }
939
940 /* Backwards compatibility for firmwares without
941 * ATH10K_FW_IE_WMI_OP_VERSION.
942 */
943 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
944 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Rajkumar Manoharan4a16fbe2014-12-17 12:21:12 +0200945 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
946 ar->fw_features))
Kalle Valo202e86e2014-12-03 10:10:08 +0200947 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
948 else
949 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
950 } else {
951 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
952 }
953 }
954
955 switch (ar->wmi.op_version) {
956 case ATH10K_FW_WMI_OP_VERSION_MAIN:
Michal Kaziorcfd10612014-11-25 15:16:05 +0100957 ar->max_num_peers = TARGET_NUM_PEERS;
958 ar->max_num_stations = TARGET_NUM_STATIONS;
Kalle Valo30c78162014-12-17 12:20:45 +0200959 ar->max_num_vdevs = TARGET_NUM_VDEVS;
Kalle Valo91ad5f52014-12-03 10:10:17 +0200960 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
Kalle Valo202e86e2014-12-03 10:10:08 +0200961 break;
962 case ATH10K_FW_WMI_OP_VERSION_10_1:
963 case ATH10K_FW_WMI_OP_VERSION_10_2:
Rajkumar Manoharan4a16fbe2014-12-17 12:21:12 +0200964 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
Kalle Valo202e86e2014-12-03 10:10:08 +0200965 ar->max_num_peers = TARGET_10X_NUM_PEERS;
966 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
Kalle Valo30c78162014-12-17 12:20:45 +0200967 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
Kalle Valo91ad5f52014-12-03 10:10:17 +0200968 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
Kalle Valo202e86e2014-12-03 10:10:08 +0200969 break;
Michal Kaziorca996ec2014-12-03 10:11:32 +0200970 case ATH10K_FW_WMI_OP_VERSION_TLV:
971 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
972 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
Michal Kazior49274332015-01-08 11:36:56 +0100973 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
Michal Kaziorca996ec2014-12-03 10:11:32 +0200974 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
975 break;
Kalle Valo202e86e2014-12-03 10:10:08 +0200976 case ATH10K_FW_WMI_OP_VERSION_UNSET:
977 case ATH10K_FW_WMI_OP_VERSION_MAX:
978 WARN_ON(1);
979 return -EINVAL;
Michal Kaziorcfd10612014-11-25 15:16:05 +0100980 }
Kalle Valo5f2144d2014-12-03 10:09:59 +0200981
982 return 0;
Michal Kaziorcfd10612014-11-25 15:16:05 +0100983}
984
Kalle Valo43d2a302014-09-10 18:23:30 +0300985int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300986{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300987 int status;
988
Kalle Valo60631c52013-10-08 21:45:25 +0300989 lockdep_assert_held(&ar->conf_mutex);
990
Michal Kazior7962b0d2014-10-28 10:34:38 +0100991 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
992
Michal Kazior64d151d2013-07-16 09:38:53 +0200993 ath10k_bmi_start(ar);
994
Kalle Valo5e3dd152013-06-12 20:52:10 +0300995 if (ath10k_init_configure_target(ar)) {
996 status = -EINVAL;
997 goto err;
998 }
999
Kalle Valo83091552014-10-13 09:40:53 +03001000 status = ath10k_download_cal_data(ar);
1001 if (status)
1002 goto err;
1003
1004 status = ath10k_download_fw(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001005 if (status)
1006 goto err;
1007
1008 status = ath10k_init_uart(ar);
1009 if (status)
1010 goto err;
1011
Michal Kaziorcd003fa2013-07-05 16:15:13 +03001012 ar->htc.htc_ops.target_send_suspend_complete =
1013 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001014
Michal Kaziorcd003fa2013-07-05 16:15:13 +03001015 status = ath10k_htc_init(ar);
1016 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001017 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001018 goto err;
1019 }
1020
1021 status = ath10k_bmi_done(ar);
1022 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +03001023 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001024
1025 status = ath10k_wmi_attach(ar);
1026 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001027 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +03001028 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001029 }
1030
Michal Kazior95bf21f2014-05-16 17:15:39 +03001031 status = ath10k_htt_init(ar);
1032 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001033 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001034 goto err_wmi_detach;
1035 }
1036
1037 status = ath10k_htt_tx_alloc(&ar->htt);
1038 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001039 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001040 goto err_wmi_detach;
1041 }
1042
1043 status = ath10k_htt_rx_alloc(&ar->htt);
1044 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001045 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001046 goto err_htt_tx_detach;
1047 }
1048
Michal Kazior67e3c632013-11-08 08:05:18 +01001049 status = ath10k_hif_start(ar);
1050 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001051 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001052 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +01001053 }
1054
1055 status = ath10k_htc_wait_target(&ar->htc);
1056 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001057 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +01001058 goto err_hif_stop;
1059 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001060
Kalle Valo43d2a302014-09-10 18:23:30 +03001061 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1062 status = ath10k_htt_connect(&ar->htt);
1063 if (status) {
1064 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1065 goto err_hif_stop;
1066 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001067 }
1068
Michal Kazior95bf21f2014-05-16 17:15:39 +03001069 status = ath10k_wmi_connect(ar);
1070 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001071 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001072 goto err_hif_stop;
1073 }
1074
1075 status = ath10k_htc_start(&ar->htc);
1076 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001077 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001078 goto err_hif_stop;
1079 }
1080
Kalle Valo43d2a302014-09-10 18:23:30 +03001081 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1082 status = ath10k_wmi_wait_for_service_ready(ar);
1083 if (status <= 0) {
1084 ath10k_warn(ar, "wmi service ready event not received");
1085 status = -ETIMEDOUT;
1086 goto err_hif_stop;
1087 }
Michal Kazior95bf21f2014-05-16 17:15:39 +03001088 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001089
Michal Kazior7aa7a722014-08-25 12:09:38 +02001090 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +02001091 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001092
Kalle Valo5e3dd152013-06-12 20:52:10 +03001093 status = ath10k_wmi_cmd_init(ar);
1094 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001095 ath10k_err(ar, "could not send WMI init command (%d)\n",
1096 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001097 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001098 }
1099
1100 status = ath10k_wmi_wait_for_unified_ready(ar);
1101 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001102 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001103 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001104 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001105 }
1106
Michal Kaziorc5450702015-01-24 12:14:48 +02001107 /* If firmware indicates Full Rx Reorder support it must be used in a
1108 * slightly different manner. Let HTT code know.
1109 */
1110 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1111 ar->wmi.svc_map));
1112
1113 status = ath10k_htt_rx_ring_refill(ar);
1114 if (status) {
1115 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1116 goto err_hif_stop;
1117 }
1118
Kalle Valo43d2a302014-09-10 18:23:30 +03001119 /* we don't care about HTT in UTF mode */
1120 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1121 status = ath10k_htt_setup(&ar->htt);
1122 if (status) {
1123 ath10k_err(ar, "failed to setup htt: %d\n", status);
1124 goto err_hif_stop;
1125 }
Michal Kazior95bf21f2014-05-16 17:15:39 +03001126 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001127
Kalle Valodb66ea02013-09-03 11:44:03 +03001128 status = ath10k_debug_start(ar);
1129 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +02001130 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +03001131
Kalle Valo30c78162014-12-17 12:20:45 +02001132 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +03001133
Michal Kazior05791192013-10-16 15:44:45 +03001134 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +02001135
Michal Kaziordd30a362013-07-16 09:38:51 +02001136 return 0;
1137
Michal Kazior67e3c632013-11-08 08:05:18 +01001138err_hif_stop:
1139 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001140err_htt_rx_detach:
1141 ath10k_htt_rx_free(&ar->htt);
1142err_htt_tx_detach:
1143 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001144err_wmi_detach:
1145 ath10k_wmi_detach(ar);
1146err:
1147 return status;
1148}
Michal Kazior818bdd12013-07-16 09:38:57 +02001149EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +02001150
Marek Puzyniak00f54822014-02-10 17:14:24 +01001151int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1152{
1153 int ret;
1154
1155 reinit_completion(&ar->target_suspend);
1156
1157 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1158 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001159 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +01001160 return ret;
1161 }
1162
1163 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1164
1165 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001166 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +01001167 return -ETIMEDOUT;
1168 }
1169
1170 return 0;
1171}
1172
Michal Kaziordd30a362013-07-16 09:38:51 +02001173void ath10k_core_stop(struct ath10k *ar)
1174{
Kalle Valo60631c52013-10-08 21:45:25 +03001175 lockdep_assert_held(&ar->conf_mutex);
1176
Marek Puzyniak00f54822014-02-10 17:14:24 +01001177 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +03001178 if (ar->state != ATH10K_STATE_RESTARTING &&
1179 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +03001180 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1181
Kalle Valodb66ea02013-09-03 11:44:03 +03001182 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +03001183 ath10k_hif_stop(ar);
1184 ath10k_htt_tx_free(&ar->htt);
1185 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +02001186 ath10k_wmi_detach(ar);
1187}
Michal Kazior818bdd12013-07-16 09:38:57 +02001188EXPORT_SYMBOL(ath10k_core_stop);
1189
1190/* mac80211 manages fw/hw initialization through start/stop hooks. However in
1191 * order to know what hw capabilities should be advertised to mac80211 it is
1192 * necessary to load the firmware (and tear it down immediately since start
1193 * hook will try to init it again) before registering */
1194static int ath10k_core_probe_fw(struct ath10k *ar)
1195{
Michal Kazior29385052013-07-16 09:38:58 +02001196 struct bmi_target_info target_info;
1197 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +02001198
1199 ret = ath10k_hif_power_up(ar);
1200 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001201 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +02001202 return ret;
1203 }
1204
Michal Kazior29385052013-07-16 09:38:58 +02001205 memset(&target_info, 0, sizeof(target_info));
1206 ret = ath10k_bmi_get_target_info(ar, &target_info);
1207 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001208 ath10k_err(ar, "could not get target info (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001209 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001210 }
1211
1212 ar->target_version = target_info.version;
1213 ar->hw->wiphy->hw_version = target_info.version;
1214
1215 ret = ath10k_init_hw_params(ar);
1216 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001217 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001218 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001219 }
1220
1221 ret = ath10k_core_fetch_firmware_files(ar);
1222 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001223 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001224 goto err_power_down;
Michal Kazior29385052013-07-16 09:38:58 +02001225 }
1226
Kalle Valo5f2144d2014-12-03 10:09:59 +02001227 ret = ath10k_core_init_firmware_features(ar);
1228 if (ret) {
1229 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1230 ret);
1231 goto err_free_firmware_files;
1232 }
Michal Kaziorcfd10612014-11-25 15:16:05 +01001233
Kalle Valo60631c52013-10-08 21:45:25 +03001234 mutex_lock(&ar->conf_mutex);
1235
Kalle Valo43d2a302014-09-10 18:23:30 +03001236 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +02001237 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001238 ath10k_err(ar, "could not init core (%d)\n", ret);
Kalle Valoc6ce4922014-12-03 10:09:31 +02001239 goto err_unlock;
Michal Kazior818bdd12013-07-16 09:38:57 +02001240 }
1241
Michal Kazior8079de02014-08-22 14:23:29 +02001242 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001243 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001244
1245 mutex_unlock(&ar->conf_mutex);
1246
Michal Kazior818bdd12013-07-16 09:38:57 +02001247 ath10k_hif_power_down(ar);
1248 return 0;
Kalle Valoc6ce4922014-12-03 10:09:31 +02001249
1250err_unlock:
1251 mutex_unlock(&ar->conf_mutex);
1252
Kalle Valo5f2144d2014-12-03 10:09:59 +02001253err_free_firmware_files:
Kalle Valoc6ce4922014-12-03 10:09:31 +02001254 ath10k_core_free_firmware_files(ar);
1255
1256err_power_down:
1257 ath10k_hif_power_down(ar);
1258
1259 return ret;
Michal Kazior818bdd12013-07-16 09:38:57 +02001260}
Michal Kaziordd30a362013-07-16 09:38:51 +02001261
Michal Kazior6782cb62014-05-23 12:28:47 +02001262static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +02001263{
Michal Kazior6782cb62014-05-23 12:28:47 +02001264 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001265 int status;
1266
Michal Kazior818bdd12013-07-16 09:38:57 +02001267 status = ath10k_core_probe_fw(ar);
1268 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001269 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001270 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001271 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001272
Kalle Valo5e3dd152013-06-12 20:52:10 +03001273 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001274 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001275 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001276 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001277 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001278
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001279 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001280 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001281 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001282 goto err_unregister_mac;
1283 }
1284
Simon Wunderlich855aed12014-08-02 09:12:54 +03001285 status = ath10k_spectral_create(ar);
1286 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001287 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001288 goto err_debug_destroy;
1289 }
1290
Rajkumar Manoharanfe6f36d2014-12-17 12:22:07 +02001291 status = ath10k_thermal_register(ar);
1292 if (status) {
1293 ath10k_err(ar, "could not register thermal device: %d\n",
1294 status);
1295 goto err_spectral_destroy;
1296 }
1297
Michal Kazior6782cb62014-05-23 12:28:47 +02001298 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1299 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001300
Rajkumar Manoharanfe6f36d2014-12-17 12:22:07 +02001301err_spectral_destroy:
1302 ath10k_spectral_destroy(ar);
Simon Wunderlich855aed12014-08-02 09:12:54 +03001303err_debug_destroy:
1304 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001305err_unregister_mac:
1306 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001307err_release_fw:
1308 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001309err:
Michal Kaziora491a922014-07-14 16:07:29 +03001310 /* TODO: It's probably a good idea to release device from the driver
1311 * but calling device_release_driver() here will cause a deadlock.
1312 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001313 return;
1314}
1315
1316int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1317{
Michal Kazior6782cb62014-05-23 12:28:47 +02001318 ar->chip_id = chip_id;
Michal Kazior6782cb62014-05-23 12:28:47 +02001319 queue_work(ar->workqueue, &ar->register_work);
1320
1321 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001322}
1323EXPORT_SYMBOL(ath10k_core_register);
1324
1325void ath10k_core_unregister(struct ath10k *ar)
1326{
Michal Kazior6782cb62014-05-23 12:28:47 +02001327 cancel_work_sync(&ar->register_work);
1328
1329 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1330 return;
1331
Rajkumar Manoharanfe6f36d2014-12-17 12:22:07 +02001332 ath10k_thermal_unregister(ar);
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001333 /* Stop spectral before unregistering from mac80211 to remove the
1334 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1335 * would be already be free'd recursively, leading to a double free.
1336 */
1337 ath10k_spectral_destroy(ar);
1338
Kalle Valo5e3dd152013-06-12 20:52:10 +03001339 /* We must unregister from mac80211 before we stop HTC and HIF.
1340 * Otherwise we will fail to submit commands to FW and mac80211 will be
1341 * unhappy about callback failures. */
1342 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001343
Kalle Valo43d2a302014-09-10 18:23:30 +03001344 ath10k_testmode_destroy(ar);
1345
Michal Kazior29385052013-07-16 09:38:58 +02001346 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001347
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001348 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001349}
1350EXPORT_SYMBOL(ath10k_core_unregister);
1351
Michal Kaziore7b54192014-08-07 11:03:27 +02001352struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valoe07db352014-10-13 09:40:47 +03001353 enum ath10k_bus bus,
Michal Kaziord63955b2015-01-24 12:14:49 +02001354 enum ath10k_hw_rev hw_rev,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001355 const struct ath10k_hif_ops *hif_ops)
1356{
1357 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001358 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001359
Michal Kaziore7b54192014-08-07 11:03:27 +02001360 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001361 if (!ar)
1362 return NULL;
1363
1364 ar->ath_common.priv = ar;
1365 ar->ath_common.hw = ar->hw;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001366 ar->dev = dev;
Michal Kaziord63955b2015-01-24 12:14:49 +02001367 ar->hw_rev = hw_rev;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001368 ar->hif.ops = hif_ops;
Kalle Valoe07db352014-10-13 09:40:47 +03001369 ar->hif.bus = bus;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001370
Michal Kaziord63955b2015-01-24 12:14:49 +02001371 switch (hw_rev) {
1372 case ATH10K_HW_QCA988X:
1373 ar->regs = &qca988x_regs;
1374 break;
1375 case ATH10K_HW_QCA6174:
1376 ar->regs = &qca6174_regs;
1377 break;
1378 default:
1379 ath10k_err(ar, "unsupported core hardware revision %d\n",
1380 hw_rev);
1381 ret = -ENOTSUPP;
1382 goto err_free_mac;
1383 }
1384
Michal Kazior0d0a6932014-05-23 12:28:45 +02001385 init_completion(&ar->scan.started);
1386 init_completion(&ar->scan.completed);
1387 init_completion(&ar->scan.on_channel);
1388 init_completion(&ar->target_suspend);
1389
1390 init_completion(&ar->install_key_done);
1391 init_completion(&ar->vdev_setup_done);
Rajkumar Manoharanac2953f2014-12-17 12:22:26 +02001392 init_completion(&ar->thermal.wmi_sync);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001393
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001394 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001395
1396 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1397 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001398 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001399
1400 mutex_init(&ar->conf_mutex);
1401 spin_lock_init(&ar->data_lock);
1402
1403 INIT_LIST_HEAD(&ar->peers);
1404 init_waitqueue_head(&ar->peer_mapping_wq);
Michal Kazior7962b0d2014-10-28 10:34:38 +01001405 init_waitqueue_head(&ar->htt.empty_tx_wq);
1406 init_waitqueue_head(&ar->wmi.tx_credits_wq);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001407
1408 init_completion(&ar->offchan_tx_completed);
1409 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1410 skb_queue_head_init(&ar->offchan_tx_queue);
1411
1412 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1413 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1414
Michal Kazior6782cb62014-05-23 12:28:47 +02001415 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001416 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1417
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001418 ret = ath10k_debug_create(ar);
1419 if (ret)
1420 goto err_free_wq;
1421
Michal Kazior0d0a6932014-05-23 12:28:45 +02001422 return ar;
1423
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001424err_free_wq:
1425 destroy_workqueue(ar->workqueue);
1426
1427err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001428 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001429
Michal Kazior0d0a6932014-05-23 12:28:45 +02001430 return NULL;
1431}
1432EXPORT_SYMBOL(ath10k_core_create);
1433
1434void ath10k_core_destroy(struct ath10k *ar)
1435{
1436 flush_workqueue(ar->workqueue);
1437 destroy_workqueue(ar->workqueue);
1438
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001439 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001440 ath10k_mac_destroy(ar);
1441}
1442EXPORT_SYMBOL(ath10k_core_destroy);
1443
Kalle Valo5e3dd152013-06-12 20:52:10 +03001444MODULE_AUTHOR("Qualcomm Atheros");
1445MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1446MODULE_LICENSE("Dual BSD/GPL");