blob: 780524065889f677c51e7cd9f78f2118b5fa72ad [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
57#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020058#include <net/pkt_cls.h>
59#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020060#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
69
70static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71static const char mlxsw_sp_driver_version[] = "1.0";
72
73/* tx_hdr_version
74 * Tx header version.
75 * Must be set to 1.
76 */
77MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78
79/* tx_hdr_ctl
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
82 * 1 - Ethernet data
83 */
84MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85
86/* tx_hdr_proto
87 * Packet protocol type. Must be set to 1 (Ethernet).
88 */
89MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
90
91/* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95
96/* tx_hdr_fid_valid
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
99 */
100MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101
102/* tx_hdr_swid
103 * Switch partition ID. Must be set to 0.
104 */
105MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
106
107/* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
110 */
111MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112
113/* tx_hdr_etclass
114 * Egress TClass to be used on the egress device on the egress port.
115 */
116MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117
118/* tx_hdr_port_mid
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
121 *
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
125 */
126MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127
128/* tx_hdr_fid
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
132 */
133MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134
135/* tx_hdr_type
136 * 0 - Data packets
137 * 6 - Control packets
138 */
139MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
140
Yotam Gigi763b4b72016-07-21 12:03:17 +0200141static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
142
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200143static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
144 const struct mlxsw_tx_info *tx_info)
145{
146 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
147
148 memset(txhdr, 0, MLXSW_TXHDR_LEN);
149
150 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
151 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
152 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
153 mlxsw_tx_hdr_swid_set(txhdr, 0);
154 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
155 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
156 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
157}
158
159static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
160{
161 char spad_pl[MLXSW_REG_SPAD_LEN];
162 int err;
163
164 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
165 if (err)
166 return err;
167 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
168 return 0;
169}
170
Yotam Gigi763b4b72016-07-21 12:03:17 +0200171static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
172{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200173 int i;
174
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200175 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200176 return -EIO;
177
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200178 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
179 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200180 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
181 sizeof(struct mlxsw_sp_span_entry),
182 GFP_KERNEL);
183 if (!mlxsw_sp->span.entries)
184 return -ENOMEM;
185
186 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
187 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
188
189 return 0;
190}
191
192static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
193{
194 int i;
195
196 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
197 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
198
199 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
200 }
201 kfree(mlxsw_sp->span.entries);
202}
203
204static struct mlxsw_sp_span_entry *
205mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
206{
207 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
208 struct mlxsw_sp_span_entry *span_entry;
209 char mpat_pl[MLXSW_REG_MPAT_LEN];
210 u8 local_port = port->local_port;
211 int index;
212 int i;
213 int err;
214
215 /* find a free entry to use */
216 index = -1;
217 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
218 if (!mlxsw_sp->span.entries[i].used) {
219 index = i;
220 span_entry = &mlxsw_sp->span.entries[i];
221 break;
222 }
223 }
224 if (index < 0)
225 return NULL;
226
227 /* create a new port analayzer entry for local_port */
228 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
229 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
230 if (err)
231 return NULL;
232
233 span_entry->used = true;
234 span_entry->id = index;
235 span_entry->ref_count = 0;
236 span_entry->local_port = local_port;
237 return span_entry;
238}
239
240static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
241 struct mlxsw_sp_span_entry *span_entry)
242{
243 u8 local_port = span_entry->local_port;
244 char mpat_pl[MLXSW_REG_MPAT_LEN];
245 int pa_id = span_entry->id;
246
247 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
248 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
249 span_entry->used = false;
250}
251
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200252static struct mlxsw_sp_span_entry *
253mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200254{
255 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
256 int i;
257
258 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
259 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
260
261 if (curr->used && curr->local_port == port->local_port)
262 return curr;
263 }
264 return NULL;
265}
266
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200267static struct mlxsw_sp_span_entry
268*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200269{
270 struct mlxsw_sp_span_entry *span_entry;
271
272 span_entry = mlxsw_sp_span_entry_find(port);
273 if (span_entry) {
274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 return 0;
287}
288
289static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
290{
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
293 int i;
294
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
297
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
301 return true;
302 }
303
304 return false;
305}
306
307static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
308{
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
310}
311
312static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
313{
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
316 int err;
317
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
320 */
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
325 if (err) {
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
327 return err;
328 }
329 }
330
331 return 0;
332}
333
334static struct mlxsw_sp_span_inspected_port *
335mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
337{
338 struct mlxsw_sp_span_inspected_port *p;
339
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
342 return p;
343 return NULL;
344}
345
346static int
347mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
350{
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
356 int err;
357
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
363 if (err) {
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 return err;
366 }
367 }
368
369 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
373 if (err)
374 goto err_mpar_reg_write;
375
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
378 err = -ENOMEM;
379 goto err_inspected_port_alloc;
380 }
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384
385 return 0;
386
387err_mpar_reg_write:
388err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 }
393 return err;
394}
395
396static void
397mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
400{
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
406
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
408 if (!inspected_port)
409 return;
410
411 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
415
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
420 }
421
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
423
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
426}
427
428static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
431{
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
434 int err;
435
436 span_entry = mlxsw_sp_span_entry_get(to);
437 if (!span_entry)
438 return -ENOENT;
439
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
441 span_entry->id);
442
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 if (err)
445 goto err_port_bind;
446
447 return 0;
448
449err_port_bind:
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
451 return err;
452}
453
454static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
457{
458 struct mlxsw_sp_span_entry *span_entry;
459
460 span_entry = mlxsw_sp_span_entry_find(to);
461 if (!span_entry) {
462 netdev_err(from->dev, "no span entry found\n");
463 return;
464 }
465
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
467 span_entry->id);
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
469}
470
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200471static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool is_up)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char paos_pl[MLXSW_REG_PAOS_LEN];
476
477 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
478 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
479 MLXSW_PORT_ADMIN_STATUS_DOWN);
480 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
481}
482
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200483static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
484 unsigned char *addr)
485{
486 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
487 char ppad_pl[MLXSW_REG_PPAD_LEN];
488
489 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
490 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
492}
493
494static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
495{
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
498
499 ether_addr_copy(addr, mlxsw_sp->base_mac);
500 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
501 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
502}
503
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200504static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
505{
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 char pmtu_pl[MLXSW_REG_PMTU_LEN];
508 int max_mtu;
509 int err;
510
511 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
512 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
513 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
514 if (err)
515 return err;
516 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
517
518 if (mtu > max_mtu)
519 return -EINVAL;
520
521 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
522 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
523}
524
Ido Schimmelbe945352016-06-09 09:51:39 +0200525static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
526 u8 swid)
527{
528 char pspa_pl[MLXSW_REG_PSPA_LEN];
529
530 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
531 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
532}
533
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200534static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
535{
536 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200537
Ido Schimmelbe945352016-06-09 09:51:39 +0200538 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
539 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200540}
541
542static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
543 bool enable)
544{
545 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
546 char svpe_pl[MLXSW_REG_SVPE_LEN];
547
548 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
549 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
550}
551
552int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
554 u16 vid)
555{
556 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
557 char svfa_pl[MLXSW_REG_SVFA_LEN];
558
559 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
560 fid, vid);
561 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
562}
563
Ido Schimmel584d73d2016-08-24 12:00:26 +0200564int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
565 u16 vid_begin, u16 vid_end,
566 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200567{
568 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
569 char *spvmlr_pl;
570 int err;
571
572 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
573 if (!spvmlr_pl)
574 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200575 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
576 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200577 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
578 kfree(spvmlr_pl);
579 return err;
580}
581
Ido Schimmel584d73d2016-08-24 12:00:26 +0200582static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
583 u16 vid, bool learn_enable)
584{
585 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
586 learn_enable);
587}
588
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200589static int
590mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
591{
592 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
593 char sspr_pl[MLXSW_REG_SSPR_LEN];
594
595 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
596 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
597}
598
Ido Schimmeld664b412016-06-09 09:51:40 +0200599static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
600 u8 local_port, u8 *p_module,
601 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603 char pmlp_pl[MLXSW_REG_PMLP_LEN];
604 int err;
605
Ido Schimmel558c2d52016-02-26 17:32:29 +0100606 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200607 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
608 if (err)
609 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100610 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
611 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200612 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613 return 0;
614}
615
Ido Schimmel18f1e702016-02-26 17:32:31 +0100616static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
617 u8 module, u8 width, u8 lane)
618{
619 char pmlp_pl[MLXSW_REG_PMLP_LEN];
620 int i;
621
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
624 for (i = 0; i < width; i++) {
625 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
626 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
627 }
628
629 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
630}
631
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100632static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
633{
634 char pmlp_pl[MLXSW_REG_PMLP_LEN];
635
636 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
637 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
638 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
639}
640
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200641static int mlxsw_sp_port_open(struct net_device *dev)
642{
643 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
644 int err;
645
646 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
647 if (err)
648 return err;
649 netif_start_queue(dev);
650 return 0;
651}
652
653static int mlxsw_sp_port_stop(struct net_device *dev)
654{
655 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
656
657 netif_stop_queue(dev);
658 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
659}
660
661static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
662 struct net_device *dev)
663{
664 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
665 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
666 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
667 const struct mlxsw_tx_info tx_info = {
668 .local_port = mlxsw_sp_port->local_port,
669 .is_emad = false,
670 };
671 u64 len;
672 int err;
673
Jiri Pirko307c2432016-04-08 19:11:22 +0200674 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200675 return NETDEV_TX_BUSY;
676
677 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
678 struct sk_buff *skb_orig = skb;
679
680 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
681 if (!skb) {
682 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
683 dev_kfree_skb_any(skb_orig);
684 return NETDEV_TX_OK;
685 }
686 }
687
688 if (eth_skb_pad(skb)) {
689 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
690 return NETDEV_TX_OK;
691 }
692
693 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200694 /* TX header is consumed by HW on the way so we shouldn't count its
695 * bytes as being sent.
696 */
697 len = skb->len - MLXSW_TXHDR_LEN;
698
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200699 /* Due to a race we might fail here because of a full queue. In that
700 * unlikely case we simply drop the packet.
701 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200702 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200703
704 if (!err) {
705 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
706 u64_stats_update_begin(&pcpu_stats->syncp);
707 pcpu_stats->tx_packets++;
708 pcpu_stats->tx_bytes += len;
709 u64_stats_update_end(&pcpu_stats->syncp);
710 } else {
711 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
712 dev_kfree_skb_any(skb);
713 }
714 return NETDEV_TX_OK;
715}
716
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100717static void mlxsw_sp_set_rx_mode(struct net_device *dev)
718{
719}
720
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200721static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
722{
723 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
724 struct sockaddr *addr = p;
725 int err;
726
727 if (!is_valid_ether_addr(addr->sa_data))
728 return -EADDRNOTAVAIL;
729
730 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
731 if (err)
732 return err;
733 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
734 return 0;
735}
736
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200737static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200738 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200739{
740 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
741
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
743 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200745 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200746 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200747 pg_size + delay, pg_size);
748 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200749 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200750}
751
752int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200753 u8 *prio_tc, bool pause_en,
754 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200755{
756 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200757 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
758 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200759 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200760 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200761
762 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
763 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
764 if (err)
765 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200766
767 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
768 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200769 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200770
771 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
772 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200773 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200774 configure = true;
775 break;
776 }
777 }
778
779 if (!configure)
780 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200781 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782 }
783
Ido Schimmelff6551e2016-04-06 17:10:03 +0200784 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
785}
786
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200787static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200788 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200789{
790 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
791 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200792 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200793 u8 *prio_tc;
794
795 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200796 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200797
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200798 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200799 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800}
801
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200802static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
803{
804 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200805 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200806 int err;
807
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200808 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809 if (err)
810 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200811 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
812 if (err)
813 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
815 if (err)
816 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 dev->mtu = mtu;
818 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819
820err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200821 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
822err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200823 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200824 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200825}
826
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300827static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200828mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
829 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830{
831 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
832 struct mlxsw_sp_port_pcpu_stats *p;
833 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
834 u32 tx_dropped = 0;
835 unsigned int start;
836 int i;
837
838 for_each_possible_cpu(i) {
839 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
840 do {
841 start = u64_stats_fetch_begin_irq(&p->syncp);
842 rx_packets = p->rx_packets;
843 rx_bytes = p->rx_bytes;
844 tx_packets = p->tx_packets;
845 tx_bytes = p->tx_bytes;
846 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
847
848 stats->rx_packets += rx_packets;
849 stats->rx_bytes += rx_bytes;
850 stats->tx_packets += tx_packets;
851 stats->tx_bytes += tx_bytes;
852 /* tx_dropped is u32, updated without syncp protection. */
853 tx_dropped += p->tx_dropped;
854 }
855 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200856 return 0;
857}
858
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300859static bool mlxsw_sp_port_has_offload_stats(int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200860{
861 switch (attr_id) {
862 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
863 return true;
864 }
865
866 return false;
867}
868
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300869static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
870 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200871{
872 switch (attr_id) {
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
874 return mlxsw_sp_port_get_sw_stats64(dev, sp);
875 }
876
877 return -EINVAL;
878}
879
880static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
881 int prio, char *ppcnt_pl)
882{
883 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
884 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
885
886 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
887 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
888}
889
890static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
891 struct rtnl_link_stats64 *stats)
892{
893 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
894 int err;
895
896 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
897 0, ppcnt_pl);
898 if (err)
899 goto out;
900
901 stats->tx_packets =
902 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
903 stats->rx_packets =
904 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
905 stats->tx_bytes =
906 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
907 stats->rx_bytes =
908 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
909 stats->multicast =
910 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
911
912 stats->rx_crc_errors =
913 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
914 stats->rx_frame_errors =
915 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
916
917 stats->rx_length_errors = (
918 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
919 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
920 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
921
922 stats->rx_errors = (stats->rx_crc_errors +
923 stats->rx_frame_errors + stats->rx_length_errors);
924
925out:
926 return err;
927}
928
929static void update_stats_cache(struct work_struct *work)
930{
931 struct mlxsw_sp_port *mlxsw_sp_port =
932 container_of(work, struct mlxsw_sp_port,
933 hw_stats.update_dw.work);
934
935 if (!netif_carrier_ok(mlxsw_sp_port->dev))
936 goto out;
937
938 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
939 mlxsw_sp_port->hw_stats.cache);
940
941out:
942 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
943 MLXSW_HW_STATS_UPDATE_TIME);
944}
945
946/* Return the stats from a cache that is updated periodically,
947 * as this function might get called in an atomic context.
948 */
949static struct rtnl_link_stats64 *
950mlxsw_sp_port_get_stats64(struct net_device *dev,
951 struct rtnl_link_stats64 *stats)
952{
953 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
954
955 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
956
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200957 return stats;
958}
959
960int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
961 u16 vid_end, bool is_member, bool untagged)
962{
963 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
964 char *spvm_pl;
965 int err;
966
967 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
968 if (!spvm_pl)
969 return -ENOMEM;
970
971 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
972 vid_end, is_member, untagged);
973 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
974 kfree(spvm_pl);
975 return err;
976}
977
978static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
979{
980 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
981 u16 vid, last_visited_vid;
982 int err;
983
984 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
985 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
986 vid);
987 if (err) {
988 last_visited_vid = vid;
989 goto err_port_vid_to_fid_set;
990 }
991 }
992
993 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
994 if (err) {
995 last_visited_vid = VLAN_N_VID;
996 goto err_port_vid_to_fid_set;
997 }
998
999 return 0;
1000
1001err_port_vid_to_fid_set:
1002 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1003 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1004 vid);
1005 return err;
1006}
1007
1008static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1009{
1010 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1011 u16 vid;
1012 int err;
1013
1014 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1015 if (err)
1016 return err;
1017
1018 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1019 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1020 vid, vid);
1021 if (err)
1022 return err;
1023 }
1024
1025 return 0;
1026}
1027
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001028static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001029mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001030{
1031 struct mlxsw_sp_port *mlxsw_sp_vport;
1032
1033 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1034 if (!mlxsw_sp_vport)
1035 return NULL;
1036
1037 /* dev will be set correctly after the VLAN device is linked
1038 * with the real device. In case of bridge SELF invocation, dev
1039 * will remain as is.
1040 */
1041 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1042 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1043 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1044 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001045 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1046 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001047 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001048
1049 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1050
1051 return mlxsw_sp_vport;
1052}
1053
1054static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1055{
1056 list_del(&mlxsw_sp_vport->vport.list);
1057 kfree(mlxsw_sp_vport);
1058}
1059
Ido Schimmel05978482016-08-17 16:39:30 +02001060static int mlxsw_sp_port_add_vid(struct net_device *dev,
1061 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001062{
1063 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001064 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001065 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001066 int err;
1067
1068 /* VLAN 0 is added to HW filter when device goes up, but it is
1069 * reserved in our case, so simply return.
1070 */
1071 if (!vid)
1072 return 0;
1073
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001074 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001076
Ido Schimmel0355b592016-06-20 23:04:13 +02001077 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001078 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001079 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001080
1081 /* When adding the first VLAN interface on a bridged port we need to
1082 * transition all the active 802.1Q bridge VLANs to use explicit
1083 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1084 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001085 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001086 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001088 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089 }
1090
Ido Schimmel52697a92016-07-02 11:00:09 +02001091 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001092 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 return 0;
1096
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001098 if (list_is_singular(&mlxsw_sp_port->vports_list))
1099 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1100err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001101 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102 return err;
1103}
1104
Ido Schimmel32d863f2016-07-02 11:00:10 +02001105static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1106 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001107{
1108 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001109 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001110 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001111
1112 /* VLAN 0 is removed from HW filter when device goes down, but
1113 * it is reserved in our case, so simply return.
1114 */
1115 if (!vid)
1116 return 0;
1117
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001118 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001119 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001121
Ido Schimmel7a355832016-08-17 16:39:28 +02001122 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001123
Ido Schimmel1c800752016-06-20 23:04:20 +02001124 /* Drop FID reference. If this was the last reference the
1125 * resources will be freed.
1126 */
1127 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1128 if (f && !WARN_ON(!f->leave))
1129 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130
1131 /* When removing the last VLAN interface on a bridged port we need to
1132 * transition all active 802.1Q bridge VLANs to use VID to FID
1133 * mappings and set port's mode to VLAN mode.
1134 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001135 if (list_is_singular(&mlxsw_sp_port->vports_list))
1136 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001137
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001138 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1139
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001140 return 0;
1141}
1142
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001143static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1144 size_t len)
1145{
1146 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001147 u8 module = mlxsw_sp_port->mapping.module;
1148 u8 width = mlxsw_sp_port->mapping.width;
1149 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001150 int err;
1151
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001152 if (!mlxsw_sp_port->split)
1153 err = snprintf(name, len, "p%d", module + 1);
1154 else
1155 err = snprintf(name, len, "p%ds%d", module + 1,
1156 lane / width);
1157
1158 if (err >= len)
1159 return -EINVAL;
1160
1161 return 0;
1162}
1163
Yotam Gigi763b4b72016-07-21 12:03:17 +02001164static struct mlxsw_sp_port_mall_tc_entry *
1165mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1166 unsigned long cookie) {
1167 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1168
1169 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1170 if (mall_tc_entry->cookie == cookie)
1171 return mall_tc_entry;
1172
1173 return NULL;
1174}
1175
1176static int
1177mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1178 struct tc_cls_matchall_offload *cls,
1179 const struct tc_action *a,
1180 bool ingress)
1181{
1182 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1183 struct net *net = dev_net(mlxsw_sp_port->dev);
1184 enum mlxsw_sp_span_type span_type;
1185 struct mlxsw_sp_port *to_port;
1186 struct net_device *to_dev;
1187 int ifindex;
1188 int err;
1189
1190 ifindex = tcf_mirred_ifindex(a);
1191 to_dev = __dev_get_by_index(net, ifindex);
1192 if (!to_dev) {
1193 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1194 return -EINVAL;
1195 }
1196
1197 if (!mlxsw_sp_port_dev_check(to_dev)) {
1198 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1199 return -ENOTSUPP;
1200 }
1201 to_port = netdev_priv(to_dev);
1202
1203 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1204 if (!mall_tc_entry)
1205 return -ENOMEM;
1206
1207 mall_tc_entry->cookie = cls->cookie;
1208 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1209 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1210 mall_tc_entry->mirror.ingress = ingress;
1211 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1212
1213 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1214 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1215 if (err)
1216 goto err_mirror_add;
1217 return 0;
1218
1219err_mirror_add:
1220 list_del(&mall_tc_entry->list);
1221 kfree(mall_tc_entry);
1222 return err;
1223}
1224
1225static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1226 __be16 protocol,
1227 struct tc_cls_matchall_offload *cls,
1228 bool ingress)
1229{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001230 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001231 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001232 int err;
1233
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001234 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001235 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1236 return -ENOTSUPP;
1237 }
1238
WANG Cong22dc13c2016-08-13 22:35:00 -07001239 tcf_exts_to_list(cls->exts, &actions);
1240 list_for_each_entry(a, &actions, list) {
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001241 if (!is_tcf_mirred_egress_mirror(a) ||
1242 protocol != htons(ETH_P_ALL)) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001243 return -ENOTSUPP;
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001244 }
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001245
Yotam Gigi763b4b72016-07-21 12:03:17 +02001246 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1247 a, ingress);
1248 if (err)
1249 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001250 }
1251
1252 return 0;
1253}
1254
1255static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1256 struct tc_cls_matchall_offload *cls)
1257{
1258 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1259 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1260 enum mlxsw_sp_span_type span_type;
1261 struct mlxsw_sp_port *to_port;
1262
1263 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1264 cls->cookie);
1265 if (!mall_tc_entry) {
1266 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1267 return;
1268 }
1269
1270 switch (mall_tc_entry->type) {
1271 case MLXSW_SP_PORT_MALL_MIRROR:
1272 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1273 span_type = mall_tc_entry->mirror.ingress ?
1274 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1275
1276 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1277 break;
1278 default:
1279 WARN_ON(1);
1280 }
1281
1282 list_del(&mall_tc_entry->list);
1283 kfree(mall_tc_entry);
1284}
1285
1286static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1287 __be16 proto, struct tc_to_netdev *tc)
1288{
1289 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1290 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1291
1292 if (tc->type == TC_SETUP_MATCHALL) {
1293 switch (tc->cls_mall->command) {
1294 case TC_CLSMATCHALL_REPLACE:
1295 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1296 proto,
1297 tc->cls_mall,
1298 ingress);
1299 case TC_CLSMATCHALL_DESTROY:
1300 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1301 tc->cls_mall);
1302 return 0;
1303 default:
1304 return -EINVAL;
1305 }
1306 }
1307
1308 return -ENOTSUPP;
1309}
1310
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1312 .ndo_open = mlxsw_sp_port_open,
1313 .ndo_stop = mlxsw_sp_port_stop,
1314 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001315 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001316 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001317 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1318 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1319 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001320 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1321 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001322 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1323 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001324 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1325 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001326 .ndo_fdb_add = switchdev_port_fdb_add,
1327 .ndo_fdb_del = switchdev_port_fdb_del,
1328 .ndo_fdb_dump = switchdev_port_fdb_dump,
1329 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1330 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1331 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001332 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001333};
1334
1335static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1336 struct ethtool_drvinfo *drvinfo)
1337{
1338 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1339 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1340
1341 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1342 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1343 sizeof(drvinfo->version));
1344 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1345 "%d.%d.%d",
1346 mlxsw_sp->bus_info->fw_rev.major,
1347 mlxsw_sp->bus_info->fw_rev.minor,
1348 mlxsw_sp->bus_info->fw_rev.subminor);
1349 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1350 sizeof(drvinfo->bus_info));
1351}
1352
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001353static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1354 struct ethtool_pauseparam *pause)
1355{
1356 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1357
1358 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1359 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1360}
1361
1362static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1363 struct ethtool_pauseparam *pause)
1364{
1365 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1366
1367 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1368 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1369 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1370
1371 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1372 pfcc_pl);
1373}
1374
1375static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1376 struct ethtool_pauseparam *pause)
1377{
1378 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1379 bool pause_en = pause->tx_pause || pause->rx_pause;
1380 int err;
1381
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001382 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1383 netdev_err(dev, "PFC already enabled on port\n");
1384 return -EINVAL;
1385 }
1386
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001387 if (pause->autoneg) {
1388 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1389 return -EINVAL;
1390 }
1391
1392 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1393 if (err) {
1394 netdev_err(dev, "Failed to configure port's headroom\n");
1395 return err;
1396 }
1397
1398 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1399 if (err) {
1400 netdev_err(dev, "Failed to set PAUSE parameters\n");
1401 goto err_port_pause_configure;
1402 }
1403
1404 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1405 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1406
1407 return 0;
1408
1409err_port_pause_configure:
1410 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1411 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1412 return err;
1413}
1414
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001415struct mlxsw_sp_port_hw_stats {
1416 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001417 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001418};
1419
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001420static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001421 {
1422 .str = "a_frames_transmitted_ok",
1423 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1424 },
1425 {
1426 .str = "a_frames_received_ok",
1427 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1428 },
1429 {
1430 .str = "a_frame_check_sequence_errors",
1431 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1432 },
1433 {
1434 .str = "a_alignment_errors",
1435 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1436 },
1437 {
1438 .str = "a_octets_transmitted_ok",
1439 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1440 },
1441 {
1442 .str = "a_octets_received_ok",
1443 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1444 },
1445 {
1446 .str = "a_multicast_frames_xmitted_ok",
1447 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1448 },
1449 {
1450 .str = "a_broadcast_frames_xmitted_ok",
1451 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1452 },
1453 {
1454 .str = "a_multicast_frames_received_ok",
1455 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1456 },
1457 {
1458 .str = "a_broadcast_frames_received_ok",
1459 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1460 },
1461 {
1462 .str = "a_in_range_length_errors",
1463 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1464 },
1465 {
1466 .str = "a_out_of_range_length_field",
1467 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1468 },
1469 {
1470 .str = "a_frame_too_long_errors",
1471 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1472 },
1473 {
1474 .str = "a_symbol_error_during_carrier",
1475 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1476 },
1477 {
1478 .str = "a_mac_control_frames_transmitted",
1479 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1480 },
1481 {
1482 .str = "a_mac_control_frames_received",
1483 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1484 },
1485 {
1486 .str = "a_unsupported_opcodes_received",
1487 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1488 },
1489 {
1490 .str = "a_pause_mac_ctrl_frames_received",
1491 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1492 },
1493 {
1494 .str = "a_pause_mac_ctrl_frames_xmitted",
1495 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1496 },
1497};
1498
1499#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1500
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001501static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1502 {
1503 .str = "rx_octets_prio",
1504 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1505 },
1506 {
1507 .str = "rx_frames_prio",
1508 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1509 },
1510 {
1511 .str = "tx_octets_prio",
1512 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1513 },
1514 {
1515 .str = "tx_frames_prio",
1516 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1517 },
1518 {
1519 .str = "rx_pause_prio",
1520 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1521 },
1522 {
1523 .str = "rx_pause_duration_prio",
1524 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1525 },
1526 {
1527 .str = "tx_pause_prio",
1528 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1529 },
1530 {
1531 .str = "tx_pause_duration_prio",
1532 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1533 },
1534};
1535
1536#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1537
Jiri Pirko412791d2016-10-21 16:07:19 +02001538static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001539{
1540 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1541
1542 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1543}
1544
1545static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1546 {
1547 .str = "tc_transmit_queue_tc",
1548 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1549 },
1550 {
1551 .str = "tc_no_buffer_discard_uc_tc",
1552 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1553 },
1554};
1555
1556#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1557
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001558#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001559 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1560 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001561 IEEE_8021QAZ_MAX_TCS)
1562
1563static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1564{
1565 int i;
1566
1567 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1568 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1569 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1570 *p += ETH_GSTRING_LEN;
1571 }
1572}
1573
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001574static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1575{
1576 int i;
1577
1578 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1579 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1580 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1581 *p += ETH_GSTRING_LEN;
1582 }
1583}
1584
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001585static void mlxsw_sp_port_get_strings(struct net_device *dev,
1586 u32 stringset, u8 *data)
1587{
1588 u8 *p = data;
1589 int i;
1590
1591 switch (stringset) {
1592 case ETH_SS_STATS:
1593 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1594 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1595 ETH_GSTRING_LEN);
1596 p += ETH_GSTRING_LEN;
1597 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001598
1599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1600 mlxsw_sp_port_get_prio_strings(&p, i);
1601
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001602 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1603 mlxsw_sp_port_get_tc_strings(&p, i);
1604
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001605 break;
1606 }
1607}
1608
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001609static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1610 enum ethtool_phys_id_state state)
1611{
1612 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1613 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1614 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1615 bool active;
1616
1617 switch (state) {
1618 case ETHTOOL_ID_ACTIVE:
1619 active = true;
1620 break;
1621 case ETHTOOL_ID_INACTIVE:
1622 active = false;
1623 break;
1624 default:
1625 return -EOPNOTSUPP;
1626 }
1627
1628 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1629 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1630}
1631
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001632static int
1633mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1634 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1635{
1636 switch (grp) {
1637 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1638 *p_hw_stats = mlxsw_sp_port_hw_stats;
1639 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1640 break;
1641 case MLXSW_REG_PPCNT_PRIO_CNT:
1642 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1643 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1644 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001645 case MLXSW_REG_PPCNT_TC_CNT:
1646 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1647 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1648 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001649 default:
1650 WARN_ON(1);
1651 return -ENOTSUPP;
1652 }
1653 return 0;
1654}
1655
1656static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1657 enum mlxsw_reg_ppcnt_grp grp, int prio,
1658 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001659{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001660 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001661 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001662 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001663 int err;
1664
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001665 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1666 if (err)
1667 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001668 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001669 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001670 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001671}
1672
1673static void mlxsw_sp_port_get_stats(struct net_device *dev,
1674 struct ethtool_stats *stats, u64 *data)
1675{
1676 int i, data_index = 0;
1677
1678 /* IEEE 802.3 Counters */
1679 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1680 data, data_index);
1681 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1682
1683 /* Per-Priority Counters */
1684 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1685 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1686 data, data_index);
1687 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1688 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001689
1690 /* Per-TC Counters */
1691 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1692 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1693 data, data_index);
1694 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1695 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001696}
1697
1698static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1699{
1700 switch (sset) {
1701 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001702 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001703 default:
1704 return -EOPNOTSUPP;
1705 }
1706}
1707
1708struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001709 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001710 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001711 u32 speed;
1712};
1713
1714static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1715 {
1716 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001717 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1718 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001719 },
1720 {
1721 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1722 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001723 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1724 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001725 },
1726 {
1727 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001728 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1729 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001730 },
1731 {
1732 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1733 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001734 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1735 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001736 },
1737 {
1738 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1739 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1741 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001742 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1743 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001744 },
1745 {
1746 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001747 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1748 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001749 },
1750 {
1751 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001752 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1753 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001754 },
1755 {
1756 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001757 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1758 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001759 },
1760 {
1761 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001762 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1763 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001764 },
1765 {
1766 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001767 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1768 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001769 },
1770 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001771 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1772 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1773 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001774 },
1775 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001776 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1777 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1778 .speed = SPEED_25000,
1779 },
1780 {
1781 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1782 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1783 .speed = SPEED_25000,
1784 },
1785 {
1786 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1787 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1788 .speed = SPEED_25000,
1789 },
1790 {
1791 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1792 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1793 .speed = SPEED_50000,
1794 },
1795 {
1796 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1797 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1798 .speed = SPEED_50000,
1799 },
1800 {
1801 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1802 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1803 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001804 },
1805 {
1806 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001807 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1808 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001809 },
1810 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001811 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1812 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1813 .speed = SPEED_56000,
1814 },
1815 {
1816 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1817 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1818 .speed = SPEED_56000,
1819 },
1820 {
1821 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1822 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1823 .speed = SPEED_56000,
1824 },
1825 {
1826 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1827 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1828 .speed = SPEED_100000,
1829 },
1830 {
1831 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1832 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1833 .speed = SPEED_100000,
1834 },
1835 {
1836 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1837 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1838 .speed = SPEED_100000,
1839 },
1840 {
1841 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1842 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1843 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001844 },
1845};
1846
1847#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1848
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001849static void
1850mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1851 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001852{
1853 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1854 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1855 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1858 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001859 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001860
1861 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1862 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1865 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001866 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001867}
1868
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001869static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871 int i;
1872
1873 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1874 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001875 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1876 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001878}
1879
1880static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001881 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882{
1883 u32 speed = SPEED_UNKNOWN;
1884 u8 duplex = DUPLEX_UNKNOWN;
1885 int i;
1886
1887 if (!carrier_ok)
1888 goto out;
1889
1890 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1891 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1892 speed = mlxsw_sp_port_link_mode[i].speed;
1893 duplex = DUPLEX_FULL;
1894 break;
1895 }
1896 }
1897out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001898 cmd->base.speed = speed;
1899 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001900}
1901
1902static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1903{
1904 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1905 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1906 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1907 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1908 return PORT_FIBRE;
1909
1910 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1911 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1912 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1913 return PORT_DA;
1914
1915 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1916 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1918 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1919 return PORT_NONE;
1920
1921 return PORT_OTHER;
1922}
1923
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001924static u32
1925mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926{
1927 u32 ptys_proto = 0;
1928 int i;
1929
1930 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001931 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1932 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001933 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1934 }
1935 return ptys_proto;
1936}
1937
1938static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1939{
1940 u32 ptys_proto = 0;
1941 int i;
1942
1943 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1944 if (speed == mlxsw_sp_port_link_mode[i].speed)
1945 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1946 }
1947 return ptys_proto;
1948}
1949
Ido Schimmel18f1e702016-02-26 17:32:31 +01001950static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1951{
1952 u32 ptys_proto = 0;
1953 int i;
1954
1955 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1956 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1957 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1958 }
1959 return ptys_proto;
1960}
1961
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001962static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1963 struct ethtool_link_ksettings *cmd)
1964{
1965 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1967 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1968
1969 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1970 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1971}
1972
1973static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1974 struct ethtool_link_ksettings *cmd)
1975{
1976 if (!autoneg)
1977 return;
1978
1979 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1980 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1981}
1982
1983static void
1984mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1985 struct ethtool_link_ksettings *cmd)
1986{
1987 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1988 return;
1989
1990 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1991 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1992}
1993
1994static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1995 struct ethtool_link_ksettings *cmd)
1996{
1997 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1998 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1999 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2000 char ptys_pl[MLXSW_REG_PTYS_LEN];
2001 u8 autoneg_status;
2002 bool autoneg;
2003 int err;
2004
2005 autoneg = mlxsw_sp_port->link.autoneg;
2006 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2007 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2008 if (err)
2009 return err;
2010 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2011 &eth_proto_oper);
2012
2013 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2014
2015 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2016
2017 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2018 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2019 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2020
2021 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2022 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2023 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2024 cmd);
2025
2026 return 0;
2027}
2028
2029static int
2030mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2031 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002032{
2033 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2034 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2035 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002036 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002037 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002038 int err;
2039
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002040 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
2041 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002042 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002043 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002044 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2045
2046 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2047 eth_proto_new = autoneg ?
2048 mlxsw_sp_to_ptys_advert_link(cmd) :
2049 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002050
2051 eth_proto_new = eth_proto_new & eth_proto_cap;
2052 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002053 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002054 return -EINVAL;
2055 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002056
2057 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
2058 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002059 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002061
Ido Schimmel6277d462016-07-15 11:14:58 +02002062 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002063 return 0;
2064
Ido Schimmel0c83f882016-09-12 13:26:23 +02002065 mlxsw_sp_port->link.autoneg = autoneg;
2066
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002067 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2068 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002069
2070 return 0;
2071}
2072
2073static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2074 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2075 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002076 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2077 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002078 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002079 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002080 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2081 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002082 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2083 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002084};
2085
Ido Schimmel18f1e702016-02-26 17:32:31 +01002086static int
2087mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2088{
2089 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2090 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2091 char ptys_pl[MLXSW_REG_PTYS_LEN];
2092 u32 eth_proto_admin;
2093
2094 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2095 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
2096 eth_proto_admin);
2097 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2098}
2099
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002100int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2101 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2102 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002103{
2104 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2105 char qeec_pl[MLXSW_REG_QEEC_LEN];
2106
2107 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2108 next_index);
2109 mlxsw_reg_qeec_de_set(qeec_pl, true);
2110 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2111 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2112 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2113}
2114
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002115int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2116 enum mlxsw_reg_qeec_hr hr, u8 index,
2117 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002118{
2119 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2120 char qeec_pl[MLXSW_REG_QEEC_LEN];
2121
2122 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2123 next_index);
2124 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2125 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2126 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2127}
2128
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002129int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2130 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002131{
2132 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2133 char qtct_pl[MLXSW_REG_QTCT_LEN];
2134
2135 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2136 tclass);
2137 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2138}
2139
2140static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2141{
2142 int err, i;
2143
2144 /* Setup the elements hierarcy, so that each TC is linked to
2145 * one subgroup, which are all member in the same group.
2146 */
2147 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2148 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2149 0);
2150 if (err)
2151 return err;
2152 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2153 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2154 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2155 0, false, 0);
2156 if (err)
2157 return err;
2158 }
2159 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2160 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2161 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2162 false, 0);
2163 if (err)
2164 return err;
2165 }
2166
2167 /* Make sure the max shaper is disabled in all hierarcies that
2168 * support it.
2169 */
2170 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2171 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2172 MLXSW_REG_QEEC_MAS_DIS);
2173 if (err)
2174 return err;
2175 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2176 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2177 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2178 i, 0,
2179 MLXSW_REG_QEEC_MAS_DIS);
2180 if (err)
2181 return err;
2182 }
2183 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2184 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2185 MLXSW_REG_QEEC_HIERARCY_TC,
2186 i, i,
2187 MLXSW_REG_QEEC_MAS_DIS);
2188 if (err)
2189 return err;
2190 }
2191
2192 /* Map all priorities to traffic class 0. */
2193 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2194 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2195 if (err)
2196 return err;
2197 }
2198
2199 return 0;
2200}
2201
Ido Schimmel05978482016-08-17 16:39:30 +02002202static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2203{
2204 mlxsw_sp_port->pvid = 1;
2205
2206 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2207}
2208
2209static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2210{
2211 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2212}
2213
Ido Schimmelbe945352016-06-09 09:51:39 +02002214static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002215 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002216{
2217 struct mlxsw_sp_port *mlxsw_sp_port;
2218 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002219 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002220 int err;
2221
2222 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2223 if (!dev)
2224 return -ENOMEM;
2225 mlxsw_sp_port = netdev_priv(dev);
2226 mlxsw_sp_port->dev = dev;
2227 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2228 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002229 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002230 mlxsw_sp_port->mapping.module = module;
2231 mlxsw_sp_port->mapping.width = width;
2232 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002233 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002234 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2235 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2236 if (!mlxsw_sp_port->active_vlans) {
2237 err = -ENOMEM;
2238 goto err_port_active_vlans_alloc;
2239 }
Elad Razfc1273a2016-01-06 13:01:11 +01002240 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2241 if (!mlxsw_sp_port->untagged_vlans) {
2242 err = -ENOMEM;
2243 goto err_port_untagged_vlans_alloc;
2244 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002245 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002246 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002247
2248 mlxsw_sp_port->pcpu_stats =
2249 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2250 if (!mlxsw_sp_port->pcpu_stats) {
2251 err = -ENOMEM;
2252 goto err_alloc_stats;
2253 }
2254
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002255 mlxsw_sp_port->hw_stats.cache =
2256 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2257
2258 if (!mlxsw_sp_port->hw_stats.cache) {
2259 err = -ENOMEM;
2260 goto err_alloc_hw_stats;
2261 }
2262 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2263 &update_stats_cache);
2264
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002265 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2266 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2267
Ido Schimmel3247ff22016-09-08 08:16:02 +02002268 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2269 if (err) {
2270 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2271 mlxsw_sp_port->local_port);
2272 goto err_port_swid_set;
2273 }
2274
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002275 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2276 if (err) {
2277 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2278 mlxsw_sp_port->local_port);
2279 goto err_dev_addr_init;
2280 }
2281
2282 netif_carrier_off(dev);
2283
2284 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002285 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2286 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002287
Jarod Wilsond894be52016-10-20 13:55:16 -04002288 dev->min_mtu = 0;
2289 dev->max_mtu = ETH_MAX_MTU;
2290
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002291 /* Each packet needs to have a Tx header (metadata) on top all other
2292 * headers.
2293 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002294 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002295
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002296 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2297 if (err) {
2298 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2299 mlxsw_sp_port->local_port);
2300 goto err_port_system_port_mapping_set;
2301 }
2302
Ido Schimmel18f1e702016-02-26 17:32:31 +01002303 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2304 if (err) {
2305 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2306 mlxsw_sp_port->local_port);
2307 goto err_port_speed_by_width_set;
2308 }
2309
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002310 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2311 if (err) {
2312 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2313 mlxsw_sp_port->local_port);
2314 goto err_port_mtu_set;
2315 }
2316
2317 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2318 if (err)
2319 goto err_port_admin_status_set;
2320
2321 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2322 if (err) {
2323 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2324 mlxsw_sp_port->local_port);
2325 goto err_port_buffers_init;
2326 }
2327
Ido Schimmel90183b92016-04-06 17:10:08 +02002328 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2329 if (err) {
2330 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2331 mlxsw_sp_port->local_port);
2332 goto err_port_ets_init;
2333 }
2334
Ido Schimmelf00817d2016-04-06 17:10:09 +02002335 /* ETS and buffers must be initialized before DCB. */
2336 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2337 if (err) {
2338 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2339 mlxsw_sp_port->local_port);
2340 goto err_port_dcb_init;
2341 }
2342
Ido Schimmel05978482016-08-17 16:39:30 +02002343 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2344 if (err) {
2345 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2346 mlxsw_sp_port->local_port);
2347 goto err_port_pvid_vport_create;
2348 }
2349
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002350 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002351 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002352 err = register_netdev(dev);
2353 if (err) {
2354 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2355 mlxsw_sp_port->local_port);
2356 goto err_register_netdev;
2357 }
2358
Jiri Pirko932762b2016-04-08 19:11:21 +02002359 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2360 mlxsw_sp_port->local_port, dev,
2361 mlxsw_sp_port->split, module);
2362 if (err) {
2363 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2364 mlxsw_sp_port->local_port);
2365 goto err_core_port_init;
2366 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002367
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002368 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002369 return 0;
2370
Jiri Pirko932762b2016-04-08 19:11:21 +02002371err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002372 unregister_netdev(dev);
2373err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002374 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002375 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002376 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2377err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002378 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002379err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002380err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002381err_port_buffers_init:
2382err_port_admin_status_set:
2383err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002384err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002385err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002386err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002387 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2388err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002389 kfree(mlxsw_sp_port->hw_stats.cache);
2390err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002391 free_percpu(mlxsw_sp_port->pcpu_stats);
2392err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002393 kfree(mlxsw_sp_port->untagged_vlans);
2394err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002395 kfree(mlxsw_sp_port->active_vlans);
2396err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002397 free_netdev(dev);
2398 return err;
2399}
2400
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002401static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2402{
2403 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2404
2405 if (!mlxsw_sp_port)
2406 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002407 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko932762b2016-04-08 19:11:21 +02002408 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002409 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002410 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002411 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002412 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002413 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002414 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2415 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002416 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002417 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002418 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002419 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002420 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002421 free_netdev(mlxsw_sp_port->dev);
2422}
2423
2424static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2425{
2426 int i;
2427
2428 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2429 mlxsw_sp_port_remove(mlxsw_sp, i);
2430 kfree(mlxsw_sp->ports);
2431}
2432
2433static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2434{
Ido Schimmeld664b412016-06-09 09:51:40 +02002435 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002436 size_t alloc_size;
2437 int i;
2438 int err;
2439
2440 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2441 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2442 if (!mlxsw_sp->ports)
2443 return -ENOMEM;
2444
2445 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002446 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002447 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002448 if (err)
2449 goto err_port_module_info_get;
2450 if (!width)
2451 continue;
2452 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002453 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2454 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002455 if (err)
2456 goto err_port_create;
2457 }
2458 return 0;
2459
2460err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002461err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002462 for (i--; i >= 1; i--)
2463 mlxsw_sp_port_remove(mlxsw_sp, i);
2464 kfree(mlxsw_sp->ports);
2465 return err;
2466}
2467
Ido Schimmel18f1e702016-02-26 17:32:31 +01002468static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2469{
2470 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2471
2472 return local_port - offset;
2473}
2474
Ido Schimmelbe945352016-06-09 09:51:39 +02002475static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2476 u8 module, unsigned int count)
2477{
2478 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2479 int err, i;
2480
2481 for (i = 0; i < count; i++) {
2482 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2483 width, i * width);
2484 if (err)
2485 goto err_port_module_map;
2486 }
2487
2488 for (i = 0; i < count; i++) {
2489 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2490 if (err)
2491 goto err_port_swid_set;
2492 }
2493
2494 for (i = 0; i < count; i++) {
2495 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002496 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002497 if (err)
2498 goto err_port_create;
2499 }
2500
2501 return 0;
2502
2503err_port_create:
2504 for (i--; i >= 0; i--)
2505 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2506 i = count;
2507err_port_swid_set:
2508 for (i--; i >= 0; i--)
2509 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2510 MLXSW_PORT_SWID_DISABLED_PORT);
2511 i = count;
2512err_port_module_map:
2513 for (i--; i >= 0; i--)
2514 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2515 return err;
2516}
2517
2518static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2519 u8 base_port, unsigned int count)
2520{
2521 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2522 int i;
2523
2524 /* Split by four means we need to re-create two ports, otherwise
2525 * only one.
2526 */
2527 count = count / 2;
2528
2529 for (i = 0; i < count; i++) {
2530 local_port = base_port + i * 2;
2531 module = mlxsw_sp->port_to_module[local_port];
2532
2533 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2534 0);
2535 }
2536
2537 for (i = 0; i < count; i++)
2538 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2539
2540 for (i = 0; i < count; i++) {
2541 local_port = base_port + i * 2;
2542 module = mlxsw_sp->port_to_module[local_port];
2543
2544 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002545 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002546 }
2547}
2548
Jiri Pirkob2f10572016-04-08 19:11:23 +02002549static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2550 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002551{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002552 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002553 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002554 u8 module, cur_width, base_port;
2555 int i;
2556 int err;
2557
2558 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2559 if (!mlxsw_sp_port) {
2560 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2561 local_port);
2562 return -EINVAL;
2563 }
2564
Ido Schimmeld664b412016-06-09 09:51:40 +02002565 module = mlxsw_sp_port->mapping.module;
2566 cur_width = mlxsw_sp_port->mapping.width;
2567
Ido Schimmel18f1e702016-02-26 17:32:31 +01002568 if (count != 2 && count != 4) {
2569 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2570 return -EINVAL;
2571 }
2572
Ido Schimmel18f1e702016-02-26 17:32:31 +01002573 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2574 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2575 return -EINVAL;
2576 }
2577
2578 /* Make sure we have enough slave (even) ports for the split. */
2579 if (count == 2) {
2580 base_port = local_port;
2581 if (mlxsw_sp->ports[base_port + 1]) {
2582 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2583 return -EINVAL;
2584 }
2585 } else {
2586 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2587 if (mlxsw_sp->ports[base_port + 1] ||
2588 mlxsw_sp->ports[base_port + 3]) {
2589 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2590 return -EINVAL;
2591 }
2592 }
2593
2594 for (i = 0; i < count; i++)
2595 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2596
Ido Schimmelbe945352016-06-09 09:51:39 +02002597 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2598 if (err) {
2599 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2600 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002601 }
2602
2603 return 0;
2604
Ido Schimmelbe945352016-06-09 09:51:39 +02002605err_port_split_create:
2606 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002607 return err;
2608}
2609
Jiri Pirkob2f10572016-04-08 19:11:23 +02002610static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002611{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002612 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002613 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002614 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002615 unsigned int count;
2616 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002617
2618 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2619 if (!mlxsw_sp_port) {
2620 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2621 local_port);
2622 return -EINVAL;
2623 }
2624
2625 if (!mlxsw_sp_port->split) {
2626 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2627 return -EINVAL;
2628 }
2629
Ido Schimmeld664b412016-06-09 09:51:40 +02002630 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002631 count = cur_width == 1 ? 4 : 2;
2632
2633 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2634
2635 /* Determine which ports to remove. */
2636 if (count == 2 && local_port >= base_port + 2)
2637 base_port = base_port + 2;
2638
2639 for (i = 0; i < count; i++)
2640 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2641
Ido Schimmelbe945352016-06-09 09:51:39 +02002642 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002643
2644 return 0;
2645}
2646
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002647static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2648 char *pude_pl, void *priv)
2649{
2650 struct mlxsw_sp *mlxsw_sp = priv;
2651 struct mlxsw_sp_port *mlxsw_sp_port;
2652 enum mlxsw_reg_pude_oper_status status;
2653 u8 local_port;
2654
2655 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2656 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002657 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002658 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002659
2660 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2661 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2662 netdev_info(mlxsw_sp_port->dev, "link up\n");
2663 netif_carrier_on(mlxsw_sp_port->dev);
2664 } else {
2665 netdev_info(mlxsw_sp_port->dev, "link down\n");
2666 netif_carrier_off(mlxsw_sp_port->dev);
2667 }
2668}
2669
2670static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2671 .func = mlxsw_sp_pude_event_func,
2672 .trap_id = MLXSW_TRAP_ID_PUDE,
2673};
2674
2675static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2676 enum mlxsw_event_trap_id trap_id)
2677{
2678 struct mlxsw_event_listener *el;
2679 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2680 int err;
2681
2682 switch (trap_id) {
2683 case MLXSW_TRAP_ID_PUDE:
2684 el = &mlxsw_sp_pude_event;
2685 break;
2686 }
2687 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2688 if (err)
2689 return err;
2690
2691 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2692 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2693 if (err)
2694 goto err_event_trap_set;
2695
2696 return 0;
2697
2698err_event_trap_set:
2699 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2700 return err;
2701}
2702
2703static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2704 enum mlxsw_event_trap_id trap_id)
2705{
2706 struct mlxsw_event_listener *el;
2707
2708 switch (trap_id) {
2709 case MLXSW_TRAP_ID_PUDE:
2710 el = &mlxsw_sp_pude_event;
2711 break;
2712 }
2713 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2714}
2715
2716static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2717 void *priv)
2718{
2719 struct mlxsw_sp *mlxsw_sp = priv;
2720 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2721 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2722
2723 if (unlikely(!mlxsw_sp_port)) {
2724 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2725 local_port);
2726 return;
2727 }
2728
2729 skb->dev = mlxsw_sp_port->dev;
2730
2731 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2732 u64_stats_update_begin(&pcpu_stats->syncp);
2733 pcpu_stats->rx_packets++;
2734 pcpu_stats->rx_bytes += skb->len;
2735 u64_stats_update_end(&pcpu_stats->syncp);
2736
2737 skb->protocol = eth_type_trans(skb, skb->dev);
2738 netif_receive_skb(skb);
2739}
2740
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002741static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2742 void *priv)
2743{
2744 skb->offload_fwd_mark = 1;
2745 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2746}
2747
Ido Schimmel63a81142016-08-25 18:42:39 +02002748#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2749 { \
2750 .func = _func, \
2751 .local_port = MLXSW_PORT_DONT_CARE, \
2752 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2753 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002754 }
2755
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002756static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002757 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002758 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002759 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2760 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2761 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2762 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2763 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2764 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002766 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002768 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2770 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002772 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2773 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002774 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002775 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2776 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2777 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002778 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002779 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2780 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2781 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002782};
2783
2784static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2785{
2786 char htgt_pl[MLXSW_REG_HTGT_LEN];
2787 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2788 int i;
2789 int err;
2790
2791 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2792 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2793 if (err)
2794 return err;
2795
2796 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2797 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2798 if (err)
2799 return err;
2800
2801 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2802 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2803 &mlxsw_sp_rx_listener[i],
2804 mlxsw_sp);
2805 if (err)
2806 goto err_rx_listener_register;
2807
Ido Schimmel63a81142016-08-25 18:42:39 +02002808 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002809 mlxsw_sp_rx_listener[i].trap_id);
2810 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2811 if (err)
2812 goto err_rx_trap_set;
2813 }
2814 return 0;
2815
2816err_rx_trap_set:
2817 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2818 &mlxsw_sp_rx_listener[i],
2819 mlxsw_sp);
2820err_rx_listener_register:
2821 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002822 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002823 mlxsw_sp_rx_listener[i].trap_id);
2824 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2825
2826 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2827 &mlxsw_sp_rx_listener[i],
2828 mlxsw_sp);
2829 }
2830 return err;
2831}
2832
2833static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2834{
2835 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2836 int i;
2837
2838 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002839 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002840 mlxsw_sp_rx_listener[i].trap_id);
2841 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2842
2843 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2844 &mlxsw_sp_rx_listener[i],
2845 mlxsw_sp);
2846 }
2847}
2848
2849static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2850 enum mlxsw_reg_sfgc_type type,
2851 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2852{
2853 enum mlxsw_flood_table_type table_type;
2854 enum mlxsw_sp_flood_table flood_table;
2855 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2856
Ido Schimmel19ae6122015-12-15 16:03:39 +01002857 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002858 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002859 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002860 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002861
2862 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2863 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2864 else
2865 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002866
2867 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2868 flood_table);
2869 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2870}
2871
2872static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2873{
2874 int type, err;
2875
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002876 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2877 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2878 continue;
2879
2880 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2881 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2882 if (err)
2883 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002884
2885 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2886 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2887 if (err)
2888 return err;
2889 }
2890
2891 return 0;
2892}
2893
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002894static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2895{
2896 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002897 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002898
2899 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2900 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2901 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2902 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2903 MLXSW_REG_SLCR_LAG_HASH_SIP |
2904 MLXSW_REG_SLCR_LAG_HASH_DIP |
2905 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2906 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2907 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002908 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2909 if (err)
2910 return err;
2911
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002912 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
2913 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002914 return -EIO;
2915
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002916 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002917 sizeof(struct mlxsw_sp_upper),
2918 GFP_KERNEL);
2919 if (!mlxsw_sp->lags)
2920 return -ENOMEM;
2921
2922 return 0;
2923}
2924
2925static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
2926{
2927 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002928}
2929
Jiri Pirkob2f10572016-04-08 19:11:23 +02002930static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002931 const struct mlxsw_bus_info *mlxsw_bus_info)
2932{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002933 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002934 int err;
2935
2936 mlxsw_sp->core = mlxsw_core;
2937 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002938 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002939 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002940 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002941
2942 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2943 if (err) {
2944 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2945 return err;
2946 }
2947
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002948 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2949 if (err) {
2950 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002951 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002952 }
2953
2954 err = mlxsw_sp_traps_init(mlxsw_sp);
2955 if (err) {
2956 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2957 goto err_rx_listener_register;
2958 }
2959
2960 err = mlxsw_sp_flood_init(mlxsw_sp);
2961 if (err) {
2962 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2963 goto err_flood_init;
2964 }
2965
2966 err = mlxsw_sp_buffers_init(mlxsw_sp);
2967 if (err) {
2968 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2969 goto err_buffers_init;
2970 }
2971
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002972 err = mlxsw_sp_lag_init(mlxsw_sp);
2973 if (err) {
2974 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2975 goto err_lag_init;
2976 }
2977
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002978 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2979 if (err) {
2980 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2981 goto err_switchdev_init;
2982 }
2983
Ido Schimmel464dce12016-07-02 11:00:15 +02002984 err = mlxsw_sp_router_init(mlxsw_sp);
2985 if (err) {
2986 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2987 goto err_router_init;
2988 }
2989
Yotam Gigi763b4b72016-07-21 12:03:17 +02002990 err = mlxsw_sp_span_init(mlxsw_sp);
2991 if (err) {
2992 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2993 goto err_span_init;
2994 }
2995
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002996 err = mlxsw_sp_ports_create(mlxsw_sp);
2997 if (err) {
2998 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2999 goto err_ports_create;
3000 }
3001
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003002 return 0;
3003
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003004err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003005 mlxsw_sp_span_fini(mlxsw_sp);
3006err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003007 mlxsw_sp_router_fini(mlxsw_sp);
3008err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003009 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003010err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003011 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003012err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003013 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003014err_buffers_init:
3015err_flood_init:
3016 mlxsw_sp_traps_fini(mlxsw_sp);
3017err_rx_listener_register:
3018 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003019 return err;
3020}
3021
Jiri Pirkob2f10572016-04-08 19:11:23 +02003022static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003023{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003024 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003025
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003026 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003027 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003028 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003029 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003030 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003031 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003032 mlxsw_sp_traps_fini(mlxsw_sp);
3033 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003034 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003035 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003036}
3037
3038static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3039 .used_max_vepa_channels = 1,
3040 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003041 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003042 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003043 .used_max_pgt = 1,
3044 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003045 .used_flood_tables = 1,
3046 .used_flood_mode = 1,
3047 .flood_mode = 3,
3048 .max_fid_offset_flood_tables = 2,
3049 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003050 .max_fid_flood_tables = 2,
3051 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052 .used_max_ib_mc = 1,
3053 .max_ib_mc = 0,
3054 .used_max_pkey = 1,
3055 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003056 .used_kvd_split_data = 1,
3057 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3058 .kvd_hash_single_parts = 2,
3059 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003060 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003061 .swid_config = {
3062 {
3063 .used_type = 1,
3064 .type = MLXSW_PORT_SWID_TYPE_ETH,
3065 }
3066 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003067 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003068};
3069
3070static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003071 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003072 .priv_size = sizeof(struct mlxsw_sp),
3073 .init = mlxsw_sp_init,
3074 .fini = mlxsw_sp_fini,
3075 .port_split = mlxsw_sp_port_split,
3076 .port_unsplit = mlxsw_sp_port_unsplit,
3077 .sb_pool_get = mlxsw_sp_sb_pool_get,
3078 .sb_pool_set = mlxsw_sp_sb_pool_set,
3079 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3080 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3081 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3082 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3083 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3084 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3085 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3086 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3087 .txhdr_construct = mlxsw_sp_txhdr_construct,
3088 .txhdr_len = MLXSW_TXHDR_LEN,
3089 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003090};
3091
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003092static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3093{
3094 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3095}
3096
David Aherndd823642016-10-17 19:15:49 -07003097static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3098{
3099 struct mlxsw_sp_port **port = data;
3100 int ret = 0;
3101
3102 if (mlxsw_sp_port_dev_check(lower_dev)) {
3103 *port = netdev_priv(lower_dev);
3104 ret = 1;
3105 }
3106
3107 return ret;
3108}
3109
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003110static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3111{
David Aherndd823642016-10-17 19:15:49 -07003112 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003113
3114 if (mlxsw_sp_port_dev_check(dev))
3115 return netdev_priv(dev);
3116
David Aherndd823642016-10-17 19:15:49 -07003117 port = NULL;
3118 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3119
3120 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003121}
3122
3123static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3124{
3125 struct mlxsw_sp_port *mlxsw_sp_port;
3126
3127 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3128 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3129}
3130
3131static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3132{
David Aherndd823642016-10-17 19:15:49 -07003133 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003134
3135 if (mlxsw_sp_port_dev_check(dev))
3136 return netdev_priv(dev);
3137
David Aherndd823642016-10-17 19:15:49 -07003138 port = NULL;
3139 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3140
3141 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003142}
3143
3144struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3145{
3146 struct mlxsw_sp_port *mlxsw_sp_port;
3147
3148 rcu_read_lock();
3149 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3150 if (mlxsw_sp_port)
3151 dev_hold(mlxsw_sp_port->dev);
3152 rcu_read_unlock();
3153 return mlxsw_sp_port;
3154}
3155
3156void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3157{
3158 dev_put(mlxsw_sp_port->dev);
3159}
3160
Ido Schimmel99724c12016-07-04 08:23:14 +02003161static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3162 unsigned long event)
3163{
3164 switch (event) {
3165 case NETDEV_UP:
3166 if (!r)
3167 return true;
3168 r->ref_count++;
3169 return false;
3170 case NETDEV_DOWN:
3171 if (r && --r->ref_count == 0)
3172 return true;
3173 /* It is possible we already removed the RIF ourselves
3174 * if it was assigned to a netdev that is now a bridge
3175 * or LAG slave.
3176 */
3177 return false;
3178 }
3179
3180 return false;
3181}
3182
3183static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3184{
3185 int i;
3186
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003187 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003188 if (!mlxsw_sp->rifs[i])
3189 return i;
3190
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003191 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003192}
3193
3194static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3195 bool *p_lagged, u16 *p_system_port)
3196{
3197 u8 local_port = mlxsw_sp_vport->local_port;
3198
3199 *p_lagged = mlxsw_sp_vport->lagged;
3200 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3201}
3202
3203static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3204 struct net_device *l3_dev, u16 rif,
3205 bool create)
3206{
3207 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3208 bool lagged = mlxsw_sp_vport->lagged;
3209 char ritr_pl[MLXSW_REG_RITR_LEN];
3210 u16 system_port;
3211
3212 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3213 l3_dev->mtu, l3_dev->dev_addr);
3214
3215 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3216 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3217 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3218
3219 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3220}
3221
3222static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3223
3224static struct mlxsw_sp_fid *
3225mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3226{
3227 struct mlxsw_sp_fid *f;
3228
3229 f = kzalloc(sizeof(*f), GFP_KERNEL);
3230 if (!f)
3231 return NULL;
3232
3233 f->leave = mlxsw_sp_vport_rif_sp_leave;
3234 f->ref_count = 0;
3235 f->dev = l3_dev;
3236 f->fid = fid;
3237
3238 return f;
3239}
3240
3241static struct mlxsw_sp_rif *
3242mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3243{
3244 struct mlxsw_sp_rif *r;
3245
3246 r = kzalloc(sizeof(*r), GFP_KERNEL);
3247 if (!r)
3248 return NULL;
3249
3250 ether_addr_copy(r->addr, l3_dev->dev_addr);
3251 r->mtu = l3_dev->mtu;
3252 r->ref_count = 1;
3253 r->dev = l3_dev;
3254 r->rif = rif;
3255 r->f = f;
3256
3257 return r;
3258}
3259
3260static struct mlxsw_sp_rif *
3261mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3262 struct net_device *l3_dev)
3263{
3264 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3265 struct mlxsw_sp_fid *f;
3266 struct mlxsw_sp_rif *r;
3267 u16 fid, rif;
3268 int err;
3269
3270 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003271 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003272 return ERR_PTR(-ERANGE);
3273
3274 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3275 if (err)
3276 return ERR_PTR(err);
3277
3278 fid = mlxsw_sp_rif_sp_to_fid(rif);
3279 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3280 if (err)
3281 goto err_rif_fdb_op;
3282
3283 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3284 if (!f) {
3285 err = -ENOMEM;
3286 goto err_rfid_alloc;
3287 }
3288
3289 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3290 if (!r) {
3291 err = -ENOMEM;
3292 goto err_rif_alloc;
3293 }
3294
3295 f->r = r;
3296 mlxsw_sp->rifs[rif] = r;
3297
3298 return r;
3299
3300err_rif_alloc:
3301 kfree(f);
3302err_rfid_alloc:
3303 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3304err_rif_fdb_op:
3305 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3306 return ERR_PTR(err);
3307}
3308
3309static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3310 struct mlxsw_sp_rif *r)
3311{
3312 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3313 struct net_device *l3_dev = r->dev;
3314 struct mlxsw_sp_fid *f = r->f;
3315 u16 fid = f->fid;
3316 u16 rif = r->rif;
3317
3318 mlxsw_sp->rifs[rif] = NULL;
3319 f->r = NULL;
3320
3321 kfree(r);
3322
3323 kfree(f);
3324
3325 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3326
3327 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3328}
3329
3330static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3331 struct net_device *l3_dev)
3332{
3333 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3334 struct mlxsw_sp_rif *r;
3335
3336 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3337 if (!r) {
3338 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3339 if (IS_ERR(r))
3340 return PTR_ERR(r);
3341 }
3342
3343 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3344 r->f->ref_count++;
3345
3346 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3347
3348 return 0;
3349}
3350
3351static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3352{
3353 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3354
3355 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3356
3357 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3358 if (--f->ref_count == 0)
3359 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3360}
3361
3362static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3363 struct net_device *port_dev,
3364 unsigned long event, u16 vid)
3365{
3366 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3367 struct mlxsw_sp_port *mlxsw_sp_vport;
3368
3369 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3370 if (WARN_ON(!mlxsw_sp_vport))
3371 return -EINVAL;
3372
3373 switch (event) {
3374 case NETDEV_UP:
3375 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3376 case NETDEV_DOWN:
3377 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3378 break;
3379 }
3380
3381 return 0;
3382}
3383
3384static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3385 unsigned long event)
3386{
3387 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3388 return 0;
3389
3390 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3391}
3392
3393static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3394 struct net_device *lag_dev,
3395 unsigned long event, u16 vid)
3396{
3397 struct net_device *port_dev;
3398 struct list_head *iter;
3399 int err;
3400
3401 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3402 if (mlxsw_sp_port_dev_check(port_dev)) {
3403 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3404 event, vid);
3405 if (err)
3406 return err;
3407 }
3408 }
3409
3410 return 0;
3411}
3412
3413static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3414 unsigned long event)
3415{
3416 if (netif_is_bridge_port(lag_dev))
3417 return 0;
3418
3419 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3420}
3421
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003422static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3423 struct net_device *l3_dev)
3424{
3425 u16 fid;
3426
3427 if (is_vlan_dev(l3_dev))
3428 fid = vlan_dev_vlan_id(l3_dev);
3429 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3430 fid = 1;
3431 else
3432 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3433
3434 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3435}
3436
Ido Schimmelf888f582016-08-24 11:18:51 +02003437static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3438{
3439 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3440 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3441}
3442
3443static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3444{
3445 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3446}
3447
3448static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3449 bool set)
3450{
3451 enum mlxsw_flood_table_type table_type;
3452 char *sftr_pl;
3453 u16 index;
3454 int err;
3455
3456 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3457 if (!sftr_pl)
3458 return -ENOMEM;
3459
3460 table_type = mlxsw_sp_flood_table_type_get(fid);
3461 index = mlxsw_sp_flood_table_index_get(fid);
3462 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3463 1, MLXSW_PORT_ROUTER_PORT, set);
3464 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3465
3466 kfree(sftr_pl);
3467 return err;
3468}
3469
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003470static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3471{
3472 if (mlxsw_sp_fid_is_vfid(fid))
3473 return MLXSW_REG_RITR_FID_IF;
3474 else
3475 return MLXSW_REG_RITR_VLAN_IF;
3476}
3477
3478static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3479 struct net_device *l3_dev,
3480 u16 fid, u16 rif,
3481 bool create)
3482{
3483 enum mlxsw_reg_ritr_if_type rif_type;
3484 char ritr_pl[MLXSW_REG_RITR_LEN];
3485
3486 rif_type = mlxsw_sp_rif_type_get(fid);
3487 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3488 l3_dev->dev_addr);
3489 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3490
3491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3492}
3493
3494static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3495 struct net_device *l3_dev,
3496 struct mlxsw_sp_fid *f)
3497{
3498 struct mlxsw_sp_rif *r;
3499 u16 rif;
3500 int err;
3501
3502 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003503 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003504 return -ERANGE;
3505
Ido Schimmelf888f582016-08-24 11:18:51 +02003506 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003507 if (err)
3508 return err;
3509
Ido Schimmelf888f582016-08-24 11:18:51 +02003510 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3511 if (err)
3512 goto err_rif_bridge_op;
3513
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3515 if (err)
3516 goto err_rif_fdb_op;
3517
3518 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3519 if (!r) {
3520 err = -ENOMEM;
3521 goto err_rif_alloc;
3522 }
3523
3524 f->r = r;
3525 mlxsw_sp->rifs[rif] = r;
3526
3527 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3528
3529 return 0;
3530
3531err_rif_alloc:
3532 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3533err_rif_fdb_op:
3534 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003535err_rif_bridge_op:
3536 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003537 return err;
3538}
3539
3540void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3541 struct mlxsw_sp_rif *r)
3542{
3543 struct net_device *l3_dev = r->dev;
3544 struct mlxsw_sp_fid *f = r->f;
3545 u16 rif = r->rif;
3546
3547 mlxsw_sp->rifs[rif] = NULL;
3548 f->r = NULL;
3549
3550 kfree(r);
3551
3552 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3553
3554 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3555
Ido Schimmelf888f582016-08-24 11:18:51 +02003556 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3557
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003558 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3559}
3560
3561static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3562 struct net_device *br_dev,
3563 unsigned long event)
3564{
3565 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3566 struct mlxsw_sp_fid *f;
3567
3568 /* FID can either be an actual FID if the L3 device is the
3569 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3570 * L3 device is a VLAN-unaware bridge and we get a vFID.
3571 */
3572 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3573 if (WARN_ON(!f))
3574 return -EINVAL;
3575
3576 switch (event) {
3577 case NETDEV_UP:
3578 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3579 case NETDEV_DOWN:
3580 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3581 break;
3582 }
3583
3584 return 0;
3585}
3586
Ido Schimmel99724c12016-07-04 08:23:14 +02003587static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3588 unsigned long event)
3589{
3590 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003592 u16 vid = vlan_dev_vlan_id(vlan_dev);
3593
3594 if (mlxsw_sp_port_dev_check(real_dev))
3595 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3596 vid);
3597 else if (netif_is_lag_master(real_dev))
3598 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3599 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003600 else if (netif_is_bridge_master(real_dev) &&
3601 mlxsw_sp->master_bridge.dev == real_dev)
3602 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3603 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003604
3605 return 0;
3606}
3607
3608static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3609 unsigned long event, void *ptr)
3610{
3611 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3612 struct net_device *dev = ifa->ifa_dev->dev;
3613 struct mlxsw_sp *mlxsw_sp;
3614 struct mlxsw_sp_rif *r;
3615 int err = 0;
3616
3617 mlxsw_sp = mlxsw_sp_lower_get(dev);
3618 if (!mlxsw_sp)
3619 goto out;
3620
3621 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3622 if (!mlxsw_sp_rif_should_config(r, event))
3623 goto out;
3624
3625 if (mlxsw_sp_port_dev_check(dev))
3626 err = mlxsw_sp_inetaddr_port_event(dev, event);
3627 else if (netif_is_lag_master(dev))
3628 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003629 else if (netif_is_bridge_master(dev))
3630 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003631 else if (is_vlan_dev(dev))
3632 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3633
3634out:
3635 return notifier_from_errno(err);
3636}
3637
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003638static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3639 const char *mac, int mtu)
3640{
3641 char ritr_pl[MLXSW_REG_RITR_LEN];
3642 int err;
3643
3644 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3645 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3646 if (err)
3647 return err;
3648
3649 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3650 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3651 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3652 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3653}
3654
3655static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3656{
3657 struct mlxsw_sp *mlxsw_sp;
3658 struct mlxsw_sp_rif *r;
3659 int err;
3660
3661 mlxsw_sp = mlxsw_sp_lower_get(dev);
3662 if (!mlxsw_sp)
3663 return 0;
3664
3665 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3666 if (!r)
3667 return 0;
3668
3669 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3670 if (err)
3671 return err;
3672
3673 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3674 if (err)
3675 goto err_rif_edit;
3676
3677 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3678 if (err)
3679 goto err_rif_fdb_op;
3680
3681 ether_addr_copy(r->addr, dev->dev_addr);
3682 r->mtu = dev->mtu;
3683
3684 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3685
3686 return 0;
3687
3688err_rif_fdb_op:
3689 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3690err_rif_edit:
3691 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3692 return err;
3693}
3694
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003695static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3696 u16 fid)
3697{
3698 if (mlxsw_sp_fid_is_vfid(fid))
3699 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3700 else
3701 return test_bit(fid, lag_port->active_vlans);
3702}
3703
3704static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3705 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003706{
3707 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003708 u8 local_port = mlxsw_sp_port->local_port;
3709 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003710 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003711 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003712
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003713 if (!mlxsw_sp_port->lagged)
3714 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003715
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003716 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3717 MAX_LAG_MEMBERS);
3718 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003719 struct mlxsw_sp_port *lag_port;
3720
3721 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3722 if (!lag_port || lag_port->local_port == local_port)
3723 continue;
3724 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3725 count++;
3726 }
3727
3728 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003729}
3730
3731static int
3732mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3733 u16 fid)
3734{
3735 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3736 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3737
3738 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3739 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3740 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3741 mlxsw_sp_port->local_port);
3742
Ido Schimmel22305372016-06-20 23:04:21 +02003743 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3744 mlxsw_sp_port->local_port, fid);
3745
Ido Schimmel039c49a2016-01-27 15:20:18 +01003746 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3747}
3748
3749static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003750mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3751 u16 fid)
3752{
3753 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3754 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3755
3756 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3757 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3758 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3759
Ido Schimmel22305372016-06-20 23:04:21 +02003760 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3761 mlxsw_sp_port->lag_id, fid);
3762
Ido Schimmel039c49a2016-01-27 15:20:18 +01003763 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3764}
3765
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003766int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003767{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003768 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3769 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003770
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003771 if (mlxsw_sp_port->lagged)
3772 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003773 fid);
3774 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003775 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003776}
3777
Ido Schimmel701b1862016-07-04 08:23:16 +02003778static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3779{
3780 struct mlxsw_sp_fid *f, *tmp;
3781
3782 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3783 if (--f->ref_count == 0)
3784 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3785 else
3786 WARN_ON_ONCE(1);
3787}
3788
Ido Schimmel7117a572016-06-20 23:04:06 +02003789static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3790 struct net_device *br_dev)
3791{
3792 return !mlxsw_sp->master_bridge.dev ||
3793 mlxsw_sp->master_bridge.dev == br_dev;
3794}
3795
3796static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3797 struct net_device *br_dev)
3798{
3799 mlxsw_sp->master_bridge.dev = br_dev;
3800 mlxsw_sp->master_bridge.ref_count++;
3801}
3802
3803static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3804{
Ido Schimmel701b1862016-07-04 08:23:16 +02003805 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003806 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003807 /* It's possible upper VLAN devices are still holding
3808 * references to underlying FIDs. Drop the reference
3809 * and release the resources if it was the last one.
3810 * If it wasn't, then something bad happened.
3811 */
3812 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3813 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003814}
3815
3816static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3817 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003818{
3819 struct net_device *dev = mlxsw_sp_port->dev;
3820 int err;
3821
3822 /* When port is not bridged untagged packets are tagged with
3823 * PVID=VID=1, thereby creating an implicit VLAN interface in
3824 * the device. Remove it and let bridge code take care of its
3825 * own VLANs.
3826 */
3827 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003828 if (err)
3829 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003830
Ido Schimmel7117a572016-06-20 23:04:06 +02003831 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3832
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003833 mlxsw_sp_port->learning = 1;
3834 mlxsw_sp_port->learning_sync = 1;
3835 mlxsw_sp_port->uc_flood = 1;
3836 mlxsw_sp_port->bridged = 1;
3837
3838 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003839}
3840
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003841static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003842{
3843 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003844
Ido Schimmel28a01d22016-02-18 11:30:02 +01003845 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3846
Ido Schimmel7117a572016-06-20 23:04:06 +02003847 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3848
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003849 mlxsw_sp_port->learning = 0;
3850 mlxsw_sp_port->learning_sync = 0;
3851 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003852 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003853
3854 /* Add implicit VLAN interface in the device, so that untagged
3855 * packets will be classified to the default vFID.
3856 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003857 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003858}
3859
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003860static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003861{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003862 char sldr_pl[MLXSW_REG_SLDR_LEN];
3863
3864 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3865 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3866}
3867
3868static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3869{
3870 char sldr_pl[MLXSW_REG_SLDR_LEN];
3871
3872 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3873 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3874}
3875
3876static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3877 u16 lag_id, u8 port_index)
3878{
3879 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3880 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3881
3882 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3883 lag_id, port_index);
3884 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3885}
3886
3887static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3888 u16 lag_id)
3889{
3890 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3891 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3892
3893 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3894 lag_id);
3895 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3896}
3897
3898static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3899 u16 lag_id)
3900{
3901 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3902 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3903
3904 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3905 lag_id);
3906 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3907}
3908
3909static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3910 u16 lag_id)
3911{
3912 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3913 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3914
3915 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3916 lag_id);
3917 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3918}
3919
3920static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3921 struct net_device *lag_dev,
3922 u16 *p_lag_id)
3923{
3924 struct mlxsw_sp_upper *lag;
3925 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003926 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003927 int i;
3928
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003929 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
3930 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003931 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3932 if (lag->ref_count) {
3933 if (lag->dev == lag_dev) {
3934 *p_lag_id = i;
3935 return 0;
3936 }
3937 } else if (free_lag_id < 0) {
3938 free_lag_id = i;
3939 }
3940 }
3941 if (free_lag_id < 0)
3942 return -EBUSY;
3943 *p_lag_id = free_lag_id;
3944 return 0;
3945}
3946
3947static bool
3948mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3949 struct net_device *lag_dev,
3950 struct netdev_lag_upper_info *lag_upper_info)
3951{
3952 u16 lag_id;
3953
3954 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3955 return false;
3956 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3957 return false;
3958 return true;
3959}
3960
3961static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3962 u16 lag_id, u8 *p_port_index)
3963{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003964 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003965 int i;
3966
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003967 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3968 MAX_LAG_MEMBERS);
3969 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003970 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3971 *p_port_index = i;
3972 return 0;
3973 }
3974 }
3975 return -EBUSY;
3976}
3977
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003978static void
3979mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3980 u16 lag_id)
3981{
3982 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003983 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003984
3985 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3986 if (WARN_ON(!mlxsw_sp_vport))
3987 return;
3988
Ido Schimmel11943ff2016-07-02 11:00:12 +02003989 /* If vPort is assigned a RIF, then leave it since it's no
3990 * longer valid.
3991 */
3992 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3993 if (f)
3994 f->leave(mlxsw_sp_vport);
3995
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003996 mlxsw_sp_vport->lag_id = lag_id;
3997 mlxsw_sp_vport->lagged = 1;
3998}
3999
4000static void
4001mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4002{
4003 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004004 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004005
4006 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4007 if (WARN_ON(!mlxsw_sp_vport))
4008 return;
4009
Ido Schimmel11943ff2016-07-02 11:00:12 +02004010 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4011 if (f)
4012 f->leave(mlxsw_sp_vport);
4013
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004014 mlxsw_sp_vport->lagged = 0;
4015}
4016
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004017static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4018 struct net_device *lag_dev)
4019{
4020 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4021 struct mlxsw_sp_upper *lag;
4022 u16 lag_id;
4023 u8 port_index;
4024 int err;
4025
4026 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4027 if (err)
4028 return err;
4029 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4030 if (!lag->ref_count) {
4031 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4032 if (err)
4033 return err;
4034 lag->dev = lag_dev;
4035 }
4036
4037 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4038 if (err)
4039 return err;
4040 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4041 if (err)
4042 goto err_col_port_add;
4043 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4044 if (err)
4045 goto err_col_port_enable;
4046
4047 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4048 mlxsw_sp_port->local_port);
4049 mlxsw_sp_port->lag_id = lag_id;
4050 mlxsw_sp_port->lagged = 1;
4051 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004052
4053 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4054
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004055 return 0;
4056
Ido Schimmel51554db2016-05-06 22:18:39 +02004057err_col_port_enable:
4058 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004059err_col_port_add:
4060 if (!lag->ref_count)
4061 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004062 return err;
4063}
4064
Ido Schimmel82e6db02016-06-20 23:04:04 +02004065static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4066 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004067{
4068 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004069 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004070 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004071
4072 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004073 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004074 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4075 WARN_ON(lag->ref_count == 0);
4076
Ido Schimmel82e6db02016-06-20 23:04:04 +02004077 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4078 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004079
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004080 if (mlxsw_sp_port->bridged) {
4081 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004082 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004083 }
4084
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004085 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004086 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004087
4088 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4089 mlxsw_sp_port->local_port);
4090 mlxsw_sp_port->lagged = 0;
4091 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004092
4093 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004094}
4095
Jiri Pirko74581202015-12-03 12:12:30 +01004096static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4097 u16 lag_id)
4098{
4099 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4100 char sldr_pl[MLXSW_REG_SLDR_LEN];
4101
4102 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4103 mlxsw_sp_port->local_port);
4104 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4105}
4106
4107static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4108 u16 lag_id)
4109{
4110 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4111 char sldr_pl[MLXSW_REG_SLDR_LEN];
4112
4113 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4114 mlxsw_sp_port->local_port);
4115 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4116}
4117
4118static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4119 bool lag_tx_enabled)
4120{
4121 if (lag_tx_enabled)
4122 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4123 mlxsw_sp_port->lag_id);
4124 else
4125 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4126 mlxsw_sp_port->lag_id);
4127}
4128
4129static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4130 struct netdev_lag_lower_state_info *info)
4131{
4132 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4133}
4134
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004135static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4136 struct net_device *vlan_dev)
4137{
4138 struct mlxsw_sp_port *mlxsw_sp_vport;
4139 u16 vid = vlan_dev_vlan_id(vlan_dev);
4140
4141 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004142 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004143 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004144
4145 mlxsw_sp_vport->dev = vlan_dev;
4146
4147 return 0;
4148}
4149
Ido Schimmel82e6db02016-06-20 23:04:04 +02004150static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4151 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004152{
4153 struct mlxsw_sp_port *mlxsw_sp_vport;
4154 u16 vid = vlan_dev_vlan_id(vlan_dev);
4155
4156 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004157 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004158 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004159
4160 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004161}
4162
Jiri Pirko74581202015-12-03 12:12:30 +01004163static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4164 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004165{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004166 struct netdev_notifier_changeupper_info *info;
4167 struct mlxsw_sp_port *mlxsw_sp_port;
4168 struct net_device *upper_dev;
4169 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004170 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004171
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004172 mlxsw_sp_port = netdev_priv(dev);
4173 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4174 info = ptr;
4175
4176 switch (event) {
4177 case NETDEV_PRECHANGEUPPER:
4178 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004179 if (!is_vlan_dev(upper_dev) &&
4180 !netif_is_lag_master(upper_dev) &&
4181 !netif_is_bridge_master(upper_dev))
4182 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004183 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004184 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004185 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004186 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004187 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004188 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004189 if (netif_is_lag_master(upper_dev) &&
4190 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4191 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004192 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004193 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4194 return -EINVAL;
4195 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4196 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4197 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004198 break;
4199 case NETDEV_CHANGEUPPER:
4200 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004201 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004202 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004203 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4204 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004205 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004206 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4207 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004208 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004209 if (info->linking)
4210 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4211 upper_dev);
4212 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004213 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004214 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004215 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004216 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4217 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004218 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004219 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4220 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004221 } else {
4222 err = -EINVAL;
4223 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004224 }
4225 break;
4226 }
4227
Ido Schimmel80bedf12016-06-20 23:03:59 +02004228 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004229}
4230
Jiri Pirko74581202015-12-03 12:12:30 +01004231static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4232 unsigned long event, void *ptr)
4233{
4234 struct netdev_notifier_changelowerstate_info *info;
4235 struct mlxsw_sp_port *mlxsw_sp_port;
4236 int err;
4237
4238 mlxsw_sp_port = netdev_priv(dev);
4239 info = ptr;
4240
4241 switch (event) {
4242 case NETDEV_CHANGELOWERSTATE:
4243 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4244 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4245 info->lower_state_info);
4246 if (err)
4247 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4248 }
4249 break;
4250 }
4251
Ido Schimmel80bedf12016-06-20 23:03:59 +02004252 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004253}
4254
4255static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4256 unsigned long event, void *ptr)
4257{
4258 switch (event) {
4259 case NETDEV_PRECHANGEUPPER:
4260 case NETDEV_CHANGEUPPER:
4261 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4262 case NETDEV_CHANGELOWERSTATE:
4263 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4264 }
4265
Ido Schimmel80bedf12016-06-20 23:03:59 +02004266 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004267}
4268
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004269static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4270 unsigned long event, void *ptr)
4271{
4272 struct net_device *dev;
4273 struct list_head *iter;
4274 int ret;
4275
4276 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4277 if (mlxsw_sp_port_dev_check(dev)) {
4278 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004279 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004280 return ret;
4281 }
4282 }
4283
Ido Schimmel80bedf12016-06-20 23:03:59 +02004284 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004285}
4286
Ido Schimmel701b1862016-07-04 08:23:16 +02004287static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4288 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004289{
Ido Schimmel701b1862016-07-04 08:23:16 +02004290 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004291 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004292
Ido Schimmel701b1862016-07-04 08:23:16 +02004293 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4294 if (!f) {
4295 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4296 if (IS_ERR(f))
4297 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004298 }
4299
Ido Schimmel701b1862016-07-04 08:23:16 +02004300 f->ref_count++;
4301
4302 return 0;
4303}
4304
4305static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4306 struct net_device *vlan_dev)
4307{
4308 u16 fid = vlan_dev_vlan_id(vlan_dev);
4309 struct mlxsw_sp_fid *f;
4310
4311 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004312 if (f && f->r)
4313 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004314 if (f && --f->ref_count == 0)
4315 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4316}
4317
4318static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4319 unsigned long event, void *ptr)
4320{
4321 struct netdev_notifier_changeupper_info *info;
4322 struct net_device *upper_dev;
4323 struct mlxsw_sp *mlxsw_sp;
4324 int err;
4325
4326 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4327 if (!mlxsw_sp)
4328 return 0;
4329 if (br_dev != mlxsw_sp->master_bridge.dev)
4330 return 0;
4331
4332 info = ptr;
4333
4334 switch (event) {
4335 case NETDEV_CHANGEUPPER:
4336 upper_dev = info->upper_dev;
4337 if (!is_vlan_dev(upper_dev))
4338 break;
4339 if (info->linking) {
4340 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4341 upper_dev);
4342 if (err)
4343 return err;
4344 } else {
4345 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4346 }
4347 break;
4348 }
4349
4350 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004351}
4352
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004353static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004354{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004355 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004356 MLXSW_SP_VFID_MAX);
4357}
4358
4359static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4360{
4361 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4362
4363 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4364 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004365}
4366
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004367static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004368
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004369static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4370 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004371{
4372 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004373 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004374 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004375 int err;
4376
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004377 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004378 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004379 dev_err(dev, "No available vFIDs\n");
4380 return ERR_PTR(-ERANGE);
4381 }
4382
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004383 fid = mlxsw_sp_vfid_to_fid(vfid);
4384 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004385 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004386 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004387 return ERR_PTR(err);
4388 }
4389
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004390 f = kzalloc(sizeof(*f), GFP_KERNEL);
4391 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004392 goto err_allocate_vfid;
4393
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004394 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004395 f->fid = fid;
4396 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004397
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004398 list_add(&f->list, &mlxsw_sp->vfids.list);
4399 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004400
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004401 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402
4403err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004404 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004405 return ERR_PTR(-ENOMEM);
4406}
4407
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004408static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4409 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004410{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004411 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004412 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004413
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004414 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004415 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004416
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004417 if (f->r)
4418 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004419
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004420 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004421
4422 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004423}
4424
Ido Schimmel99724c12016-07-04 08:23:14 +02004425static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4426 bool valid)
4427{
4428 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4429 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4430
4431 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4432 vid);
4433}
4434
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004435static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4436 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004437{
Ido Schimmel0355b592016-06-20 23:04:13 +02004438 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004439 int err;
4440
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004441 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004442 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004443 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004444 if (IS_ERR(f))
4445 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004446 }
4447
Ido Schimmel0355b592016-06-20 23:04:13 +02004448 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4449 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004450 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004451
Ido Schimmel0355b592016-06-20 23:04:13 +02004452 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4453 if (err)
4454 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004455
Ido Schimmel41b996c2016-06-20 23:04:17 +02004456 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004457 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004458
Ido Schimmel22305372016-06-20 23:04:21 +02004459 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4460
Ido Schimmel0355b592016-06-20 23:04:13 +02004461 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004462
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004463err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004464 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4465err_vport_flood_set:
4466 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004467 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004468 return err;
4469}
4470
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004471static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004472{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004473 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004474
Ido Schimmel22305372016-06-20 23:04:21 +02004475 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4476
Ido Schimmel0355b592016-06-20 23:04:13 +02004477 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4478
4479 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4480
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004481 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4482
Ido Schimmel41b996c2016-06-20 23:04:17 +02004483 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004484 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004485 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004486}
4487
4488static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4489 struct net_device *br_dev)
4490{
Ido Schimmel99724c12016-07-04 08:23:14 +02004491 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004492 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4493 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004494 int err;
4495
Ido Schimmel99724c12016-07-04 08:23:14 +02004496 if (f && !WARN_ON(!f->leave))
4497 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004498
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004499 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004500 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004501 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004502 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004503 }
4504
4505 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4506 if (err) {
4507 netdev_err(dev, "Failed to enable learning\n");
4508 goto err_port_vid_learning_set;
4509 }
4510
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004511 mlxsw_sp_vport->learning = 1;
4512 mlxsw_sp_vport->learning_sync = 1;
4513 mlxsw_sp_vport->uc_flood = 1;
4514 mlxsw_sp_vport->bridged = 1;
4515
4516 return 0;
4517
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004518err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004519 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004520 return err;
4521}
4522
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004523static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004524{
4525 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004526
4527 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4528
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004529 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004530
Ido Schimmel0355b592016-06-20 23:04:13 +02004531 mlxsw_sp_vport->learning = 0;
4532 mlxsw_sp_vport->learning_sync = 0;
4533 mlxsw_sp_vport->uc_flood = 0;
4534 mlxsw_sp_vport->bridged = 0;
4535}
4536
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004537static bool
4538mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4539 const struct net_device *br_dev)
4540{
4541 struct mlxsw_sp_port *mlxsw_sp_vport;
4542
4543 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4544 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004545 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004546
4547 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004548 return false;
4549 }
4550
4551 return true;
4552}
4553
4554static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4555 unsigned long event, void *ptr,
4556 u16 vid)
4557{
4558 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4559 struct netdev_notifier_changeupper_info *info = ptr;
4560 struct mlxsw_sp_port *mlxsw_sp_vport;
4561 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004562 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004563
4564 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4565
4566 switch (event) {
4567 case NETDEV_PRECHANGEUPPER:
4568 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004569 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004570 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004571 if (!info->linking)
4572 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004573 /* We can't have multiple VLAN interfaces configured on
4574 * the same port and being members in the same bridge.
4575 */
4576 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4577 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004578 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004579 break;
4580 case NETDEV_CHANGEUPPER:
4581 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004582 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004583 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004584 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004585 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4586 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004587 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004588 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004589 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004590 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004591 }
4592 }
4593
Ido Schimmel80bedf12016-06-20 23:03:59 +02004594 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004595}
4596
Ido Schimmel272c4472015-12-15 16:03:47 +01004597static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4598 unsigned long event, void *ptr,
4599 u16 vid)
4600{
4601 struct net_device *dev;
4602 struct list_head *iter;
4603 int ret;
4604
4605 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4606 if (mlxsw_sp_port_dev_check(dev)) {
4607 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4608 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004609 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004610 return ret;
4611 }
4612 }
4613
Ido Schimmel80bedf12016-06-20 23:03:59 +02004614 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004615}
4616
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004617static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4618 unsigned long event, void *ptr)
4619{
4620 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4621 u16 vid = vlan_dev_vlan_id(vlan_dev);
4622
Ido Schimmel272c4472015-12-15 16:03:47 +01004623 if (mlxsw_sp_port_dev_check(real_dev))
4624 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4625 vid);
4626 else if (netif_is_lag_master(real_dev))
4627 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4628 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004629
Ido Schimmel80bedf12016-06-20 23:03:59 +02004630 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004631}
4632
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004633static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4634 unsigned long event, void *ptr)
4635{
4636 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004637 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004638
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004639 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4640 err = mlxsw_sp_netdevice_router_port_event(dev);
4641 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004642 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4643 else if (netif_is_lag_master(dev))
4644 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004645 else if (netif_is_bridge_master(dev))
4646 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004647 else if (is_vlan_dev(dev))
4648 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004649
Ido Schimmel80bedf12016-06-20 23:03:59 +02004650 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004651}
4652
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004653static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4654 .notifier_call = mlxsw_sp_netdevice_event,
4655};
4656
Ido Schimmel99724c12016-07-04 08:23:14 +02004657static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4658 .notifier_call = mlxsw_sp_inetaddr_event,
4659 .priority = 10, /* Must be called before FIB notifier block */
4660};
4661
Jiri Pirkoe7322632016-09-01 10:37:43 +02004662static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4663 .notifier_call = mlxsw_sp_router_netevent_event,
4664};
4665
Jiri Pirko1d20d232016-10-27 15:12:59 +02004666static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4667 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4668 {0, },
4669};
4670
4671static struct pci_driver mlxsw_sp_pci_driver = {
4672 .name = mlxsw_sp_driver_name,
4673 .id_table = mlxsw_sp_pci_id_table,
4674};
4675
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004676static int __init mlxsw_sp_module_init(void)
4677{
4678 int err;
4679
4680 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004681 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004682 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4683
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004684 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4685 if (err)
4686 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004687
4688 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4689 if (err)
4690 goto err_pci_driver_register;
4691
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004692 return 0;
4693
Jiri Pirko1d20d232016-10-27 15:12:59 +02004694err_pci_driver_register:
4695 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004696err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004697 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004698 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004699 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4700 return err;
4701}
4702
4703static void __exit mlxsw_sp_module_exit(void)
4704{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004705 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004706 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004707 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004708 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004709 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4710}
4711
4712module_init(mlxsw_sp_module_init);
4713module_exit(mlxsw_sp_module_exit);
4714
4715MODULE_LICENSE("Dual BSD/GPL");
4716MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4717MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004718MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);