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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +030095 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
96 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +030097 MLX5_CMD_OP_CREATE_EQ = 0x301,
98 MLX5_CMD_OP_DESTROY_EQ = 0x302,
99 MLX5_CMD_OP_QUERY_EQ = 0x303,
100 MLX5_CMD_OP_GEN_EQE = 0x304,
101 MLX5_CMD_OP_CREATE_CQ = 0x400,
102 MLX5_CMD_OP_DESTROY_CQ = 0x401,
103 MLX5_CMD_OP_QUERY_CQ = 0x402,
104 MLX5_CMD_OP_MODIFY_CQ = 0x403,
105 MLX5_CMD_OP_CREATE_QP = 0x500,
106 MLX5_CMD_OP_DESTROY_QP = 0x501,
107 MLX5_CMD_OP_RST2INIT_QP = 0x502,
108 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
109 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
110 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
111 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
112 MLX5_CMD_OP_2ERR_QP = 0x507,
113 MLX5_CMD_OP_2RST_QP = 0x50a,
114 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300115 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300116 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
117 MLX5_CMD_OP_CREATE_PSV = 0x600,
118 MLX5_CMD_OP_DESTROY_PSV = 0x601,
119 MLX5_CMD_OP_CREATE_SRQ = 0x700,
120 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
121 MLX5_CMD_OP_QUERY_SRQ = 0x702,
122 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300123 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
124 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
125 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
126 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300127 MLX5_CMD_OP_CREATE_DCT = 0x710,
128 MLX5_CMD_OP_DESTROY_DCT = 0x711,
129 MLX5_CMD_OP_DRAIN_DCT = 0x712,
130 MLX5_CMD_OP_QUERY_DCT = 0x713,
131 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300132 MLX5_CMD_OP_CREATE_XRQ = 0x717,
133 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
134 MLX5_CMD_OP_QUERY_XRQ = 0x719,
135 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300136 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
137 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
138 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
139 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
140 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
141 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300144 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
145 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
146 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
147 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300148 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
149 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
150 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
151 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200152 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300153 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300154 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
155 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
156 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
157 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
158 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
159 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300160 MLX5_CMD_OP_ALLOC_PD = 0x800,
161 MLX5_CMD_OP_DEALLOC_PD = 0x801,
162 MLX5_CMD_OP_ALLOC_UAR = 0x802,
163 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
164 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
165 MLX5_CMD_OP_ACCESS_REG = 0x805,
166 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300167 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300168 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
169 MLX5_CMD_OP_MAD_IFC = 0x50d,
170 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
171 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
172 MLX5_CMD_OP_NOP = 0x80d,
173 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
174 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300175 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
176 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
177 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
178 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
179 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
180 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
181 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
182 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
183 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
184 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
185 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
186 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200187 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
188 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300189 MLX5_CMD_OP_CREATE_LAG = 0x840,
190 MLX5_CMD_OP_MODIFY_LAG = 0x841,
191 MLX5_CMD_OP_QUERY_LAG = 0x842,
192 MLX5_CMD_OP_DESTROY_LAG = 0x843,
193 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
194 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300195 MLX5_CMD_OP_CREATE_TIR = 0x900,
196 MLX5_CMD_OP_MODIFY_TIR = 0x901,
197 MLX5_CMD_OP_DESTROY_TIR = 0x902,
198 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300199 MLX5_CMD_OP_CREATE_SQ = 0x904,
200 MLX5_CMD_OP_MODIFY_SQ = 0x905,
201 MLX5_CMD_OP_DESTROY_SQ = 0x906,
202 MLX5_CMD_OP_QUERY_SQ = 0x907,
203 MLX5_CMD_OP_CREATE_RQ = 0x908,
204 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300205 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300206 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
207 MLX5_CMD_OP_QUERY_RQ = 0x90b,
208 MLX5_CMD_OP_CREATE_RMP = 0x90c,
209 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
210 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
211 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300212 MLX5_CMD_OP_CREATE_TIS = 0x912,
213 MLX5_CMD_OP_MODIFY_TIS = 0x913,
214 MLX5_CMD_OP_DESTROY_TIS = 0x914,
215 MLX5_CMD_OP_QUERY_TIS = 0x915,
216 MLX5_CMD_OP_CREATE_RQT = 0x916,
217 MLX5_CMD_OP_MODIFY_RQT = 0x917,
218 MLX5_CMD_OP_DESTROY_RQT = 0x918,
219 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200220 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300221 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
222 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
223 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
224 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
225 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
226 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
227 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
228 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200229 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000230 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
231 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
232 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300233 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300234 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
235 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200236 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
237 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300238 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
239 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
240 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
241 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
242 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300243 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300244};
245
246struct mlx5_ifc_flow_table_fields_supported_bits {
247 u8 outer_dmac[0x1];
248 u8 outer_smac[0x1];
249 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300250 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300251 u8 outer_first_prio[0x1];
252 u8 outer_first_cfi[0x1];
253 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300254 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300255 u8 outer_second_prio[0x1];
256 u8 outer_second_cfi[0x1];
257 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200258 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300259 u8 outer_sip[0x1];
260 u8 outer_dip[0x1];
261 u8 outer_frag[0x1];
262 u8 outer_ip_protocol[0x1];
263 u8 outer_ip_ecn[0x1];
264 u8 outer_ip_dscp[0x1];
265 u8 outer_udp_sport[0x1];
266 u8 outer_udp_dport[0x1];
267 u8 outer_tcp_sport[0x1];
268 u8 outer_tcp_dport[0x1];
269 u8 outer_tcp_flags[0x1];
270 u8 outer_gre_protocol[0x1];
271 u8 outer_gre_key[0x1];
272 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200273 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300274 u8 source_eswitch_port[0x1];
275
276 u8 inner_dmac[0x1];
277 u8 inner_smac[0x1];
278 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300279 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300280 u8 inner_first_prio[0x1];
281 u8 inner_first_cfi[0x1];
282 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200283 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300284 u8 inner_second_prio[0x1];
285 u8 inner_second_cfi[0x1];
286 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200287 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300288 u8 inner_sip[0x1];
289 u8 inner_dip[0x1];
290 u8 inner_frag[0x1];
291 u8 inner_ip_protocol[0x1];
292 u8 inner_ip_ecn[0x1];
293 u8 inner_ip_dscp[0x1];
294 u8 inner_udp_sport[0x1];
295 u8 inner_udp_dport[0x1];
296 u8 inner_tcp_sport[0x1];
297 u8 inner_tcp_dport[0x1];
298 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200299 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300300 u8 reserved_at_40[0x17];
301 u8 outer_esp_spi[0x1];
302 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300303 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300305 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300306};
307
308struct mlx5_ifc_flow_table_prop_layout_bits {
309 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000310 u8 reserved_at_1[0x1];
311 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200312 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200313 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200314 u8 identified_miss_table_mode[0x1];
315 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300316 u8 encap[0x1];
317 u8 decap[0x1];
318 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300319
Matan Barakb4ff3a32016-02-09 14:57:42 +0200320 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300321 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200322 u8 log_max_modify_header_context[0x8];
323 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300324 u8 max_ft_level[0x8];
325
Matan Barakb4ff3a32016-02-09 14:57:42 +0200326 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300327
Matan Barakb4ff3a32016-02-09 14:57:42 +0200328 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200329 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300330
Matan Barakb4ff3a32016-02-09 14:57:42 +0200331 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200332 u8 log_max_destination[0x8];
333
Raed Salem16f1c5b2017-07-30 11:02:51 +0300334 u8 log_max_flow_counter[0x8];
335 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300336 u8 log_max_flow[0x8];
337
Matan Barakb4ff3a32016-02-09 14:57:42 +0200338 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300339
340 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
341
342 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
343};
344
345struct mlx5_ifc_odp_per_transport_service_cap_bits {
346 u8 send[0x1];
347 u8 receive[0x1];
348 u8 write[0x1];
349 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200350 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300351 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300353};
354
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200355struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200356 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200357
358 u8 ipv4[0x20];
359};
360
361struct mlx5_ifc_ipv6_layout_bits {
362 u8 ipv6[16][0x8];
363};
364
365union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
366 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
367 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200368 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200369};
370
Saeed Mahameede2816822015-05-28 22:28:40 +0300371struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
372 u8 smac_47_16[0x20];
373
374 u8 smac_15_0[0x10];
375 u8 ethertype[0x10];
376
377 u8 dmac_47_16[0x20];
378
379 u8 dmac_15_0[0x10];
380 u8 first_prio[0x3];
381 u8 first_cfi[0x1];
382 u8 first_vid[0xc];
383
384 u8 ip_protocol[0x8];
385 u8 ip_dscp[0x6];
386 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300387 u8 cvlan_tag[0x1];
388 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300389 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300390 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300391 u8 tcp_flags[0x9];
392
393 u8 tcp_sport[0x10];
394 u8 tcp_dport[0x10];
395
Or Gerlitza8ade552017-06-07 17:49:56 +0300396 u8 reserved_at_c0[0x18];
397 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
399 u8 udp_sport[0x10];
400 u8 udp_dport[0x10];
401
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200402 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300403
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200404 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300405};
406
407struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300408 u8 reserved_at_0[0x8];
409 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300410
Matan Barakb4ff3a32016-02-09 14:57:42 +0200411 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300412 u8 source_port[0x10];
413
414 u8 outer_second_prio[0x3];
415 u8 outer_second_cfi[0x1];
416 u8 outer_second_vid[0xc];
417 u8 inner_second_prio[0x3];
418 u8 inner_second_cfi[0x1];
419 u8 inner_second_vid[0xc];
420
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300421 u8 outer_second_cvlan_tag[0x1];
422 u8 inner_second_cvlan_tag[0x1];
423 u8 outer_second_svlan_tag[0x1];
424 u8 inner_second_svlan_tag[0x1];
425 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426 u8 gre_protocol[0x10];
427
428 u8 gre_key_h[0x18];
429 u8 gre_key_l[0x8];
430
431 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435
Matan Barakb4ff3a32016-02-09 14:57:42 +0200436 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300437 u8 outer_ipv6_flow_label[0x14];
438
Matan Barakb4ff3a32016-02-09 14:57:42 +0200439 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300440 u8 inner_ipv6_flow_label[0x14];
441
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300442 u8 reserved_at_120[0x28];
443 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300444 u8 reserved_at_160[0x20];
445 u8 outer_esp_spi[0x20];
446 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300447};
448
449struct mlx5_ifc_cmd_pas_bits {
450 u8 pa_h[0x20];
451
452 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200453 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300454};
455
456struct mlx5_ifc_uint64_bits {
457 u8 hi[0x20];
458
459 u8 lo[0x20];
460};
461
462enum {
463 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
464 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
465 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
466 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
467 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
468 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
469 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
470 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
471 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
472 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
473};
474
475struct mlx5_ifc_ads_bits {
476 u8 fl[0x1];
477 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 pkey_index[0x10];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 grh[0x1];
483 u8 mlid[0x7];
484 u8 rlid[0x10];
485
486 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200489 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300490 u8 stat_rate[0x4];
491 u8 hop_limit[0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 tclass[0x8];
495 u8 flow_label[0x14];
496
497 u8 rgid_rip[16][0x8];
498
Matan Barakb4ff3a32016-02-09 14:57:42 +0200499 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300500 u8 f_dscp[0x1];
501 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200502 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300503 u8 f_eth_prio[0x1];
504 u8 ecn[0x2];
505 u8 dscp[0x6];
506 u8 udp_sport[0x10];
507
508 u8 dei_cfi[0x1];
509 u8 eth_prio[0x3];
510 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200511 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300512 u8 rmac_47_32[0x10];
513
514 u8 rmac_31_0[0x20];
515};
516
517struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200518 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300519 u8 nic_rx_multi_path_tirs_fts[0x1];
520 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
521 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
530
Matan Barakb4ff3a32016-02-09 14:57:42 +0200531 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300536};
537
Saeed Mahameed495716b2015-12-01 18:03:19 +0200538struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200539 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200540
541 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
544
545 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
546
Matan Barakb4ff3a32016-02-09 14:57:42 +0200547 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200548};
549
Saeed Mahameedd6666752015-12-01 18:03:22 +0200550struct mlx5_ifc_e_switch_cap_bits {
551 u8 vport_svlan_strip[0x1];
552 u8 vport_cvlan_strip[0x1];
553 u8 vport_svlan_insert[0x1];
554 u8 vport_cvlan_insert_if_not_exist[0x1];
555 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300556 u8 reserved_at_5[0x19];
557 u8 nic_vport_node_guid_modify[0x1];
558 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200559
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300560 u8 vxlan_encap_decap[0x1];
561 u8 nvgre_encap_decap[0x1];
562 u8 reserved_at_22[0x9];
563 u8 log_max_encap_headers[0x5];
564 u8 reserved_2b[0x6];
565 u8 max_encap_header_size[0xa];
566
567 u8 reserved_40[0x7c0];
568
Saeed Mahameedd6666752015-12-01 18:03:22 +0200569};
570
Saeed Mahameed74862162016-06-09 15:11:34 +0300571struct mlx5_ifc_qos_cap_bits {
572 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300573 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200574 u8 esw_bw_share[0x1];
575 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200576 u8 reserved_at_4[0x1];
577 u8 packet_pacing_burst_bound[0x1];
578 u8 packet_pacing_typical_size[0x1];
579 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 reserved_at_20[0x20];
582
Saeed Mahameed74862162016-06-09 15:11:34 +0300583 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300584
Saeed Mahameed74862162016-06-09 15:11:34 +0300585 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300586
587 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300588 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300589
590 u8 esw_element_type[0x10];
591 u8 esw_tsar_type[0x10];
592
593 u8 reserved_at_c0[0x10];
594 u8 max_qos_para_vport[0x10];
595
596 u8 max_tsar_bw_share[0x20];
597
598 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300599};
600
Saeed Mahameede2816822015-05-28 22:28:40 +0300601struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
602 u8 csum_cap[0x1];
603 u8 vlan_cap[0x1];
604 u8 lro_cap[0x1];
605 u8 lro_psh_flag[0x1];
606 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200607 u8 reserved_at_5[0x2];
608 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200609 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300611 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200612 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300613 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300615 u8 reg_umr_sq[0x1];
616 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300617 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300620 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621 u8 tunnel_stateless_vxlan[0x1];
622
Ilan Tayari547eede2017-04-18 16:04:28 +0300623 u8 swp[0x1];
624 u8 swp_csum[0x1];
625 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300626 u8 reserved_at_23[0x1b];
627 u8 max_geneve_opt_len[0x1];
628 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629
Matan Barakb4ff3a32016-02-09 14:57:42 +0200630 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300631 u8 lro_min_mss_size[0x10];
632
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
635 u8 lro_timer_supported_periods[4][0x20];
636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638};
639
640struct mlx5_ifc_roce_cap_bits {
641 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643
Matan Barakb4ff3a32016-02-09 14:57:42 +0200644 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 roce_version[0x8];
650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652 u8 r_roce_dest_udp_port[0x10];
653
654 u8 r_roce_max_src_udp_port[0x10];
655 u8 r_roce_min_src_udp_port[0x10];
656
Matan Barakb4ff3a32016-02-09 14:57:42 +0200657 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300658 u8 roce_address_table_size[0x10];
659
Matan Barakb4ff3a32016-02-09 14:57:42 +0200660 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300661};
662
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300663struct mlx5_ifc_device_mem_cap_bits {
664 u8 memic[0x1];
665 u8 reserved_at_1[0x1f];
666
667 u8 reserved_at_20[0xb];
668 u8 log_min_memic_alloc_size[0x5];
669 u8 reserved_at_30[0x8];
670 u8 log_max_memic_addr_alignment[0x8];
671
672 u8 memic_bar_start_addr[0x40];
673
674 u8 memic_bar_size[0x20];
675
676 u8 max_memic_size[0x20];
677
678 u8 reserved_at_c0[0x740];
679};
680
Saeed Mahameede2816822015-05-28 22:28:40 +0300681enum {
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
690 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
691};
692
693enum {
694 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
695 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
696 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
697 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
698 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
699 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
700 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
701 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
702 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
703};
704
705struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200706 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300707
Or Gerlitzbd108382017-05-28 15:24:17 +0300708 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200709 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300710 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300711
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713
Matan Barakb4ff3a32016-02-09 14:57:42 +0200714 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300715
Matan Barakb4ff3a32016-02-09 14:57:42 +0200716 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200717 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300718
Matan Barakb4ff3a32016-02-09 14:57:42 +0200719 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200720 u8 atomic_size_qp[0x10];
721
Matan Barakb4ff3a32016-02-09 14:57:42 +0200722 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300723 u8 atomic_size_dc[0x10];
724
Matan Barakb4ff3a32016-02-09 14:57:42 +0200725 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300726};
727
728struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200729 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300730
731 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200732 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300733
Matan Barakb4ff3a32016-02-09 14:57:42 +0200734 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300735
736 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
737
738 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
739
740 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
741
Matan Barakb4ff3a32016-02-09 14:57:42 +0200742 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300743};
744
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200745struct mlx5_ifc_calc_op {
746 u8 reserved_at_0[0x10];
747 u8 reserved_at_10[0x9];
748 u8 op_swap_endianness[0x1];
749 u8 op_min[0x1];
750 u8 op_xor[0x1];
751 u8 op_or[0x1];
752 u8 op_and[0x1];
753 u8 op_max[0x1];
754 u8 op_add[0x1];
755};
756
757struct mlx5_ifc_vector_calc_cap_bits {
758 u8 calc_matrix[0x1];
759 u8 reserved_at_1[0x1f];
760 u8 reserved_at_20[0x8];
761 u8 max_vec_count[0x8];
762 u8 reserved_at_30[0xd];
763 u8 max_chunk_size[0x3];
764 struct mlx5_ifc_calc_op calc0;
765 struct mlx5_ifc_calc_op calc1;
766 struct mlx5_ifc_calc_op calc2;
767 struct mlx5_ifc_calc_op calc3;
768
769 u8 reserved_at_e0[0x720];
770};
771
Saeed Mahameede2816822015-05-28 22:28:40 +0300772enum {
773 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
774 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300775 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300776 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300777};
778
779enum {
780 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
781 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
782};
783
784enum {
785 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
786 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
787 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
788 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
789 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
790};
791
792enum {
793 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
794 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
795 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
796 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
797 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
798 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
799};
800
801enum {
802 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
803 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
804};
805
806enum {
807 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
808 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
809 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
810};
811
812enum {
813 MLX5_CAP_PORT_TYPE_IB = 0x0,
814 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300815};
816
Max Gurtovoy1410a902017-05-28 10:53:10 +0300817enum {
818 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
819 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
820 MLX5_CAP_UMR_FENCE_NONE = 0x2,
821};
822
Eli Cohenb7755162014-10-02 12:19:44 +0300823struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200824 u8 reserved_at_0[0x30];
825 u8 vhca_id[0x10];
826
827 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300828
829 u8 log_max_srq_sz[0x8];
830 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_qp[0x5];
833
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300835 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300837
Matan Barakb4ff3a32016-02-09 14:57:42 +0200838 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300839 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200840 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300841 u8 log_max_cq[0x5];
842
843 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200844 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200846 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 log_max_eq[0x4];
848
849 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200850 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300851 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200852 u8 force_teardown[0x1];
853 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300854 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200855 u8 umr_extended_translation_offset[0x1];
856 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300857 u8 log_max_klm_list_size[0x6];
858
Matan Barakb4ff3a32016-02-09 14:57:42 +0200859 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300860 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200861 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300862 u8 log_max_ra_res_dc[0x6];
863
Matan Barakb4ff3a32016-02-09 14:57:42 +0200864 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300865 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200866 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300867 u8 log_max_ra_res_qp[0x6];
868
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200869 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300870 u8 cc_query_allowed[0x1];
871 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200872 u8 start_pad[0x1];
873 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500874 u8 reserved_at_165[0xa];
875 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300876 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300877
Saeed Mahameede2816822015-05-28 22:28:40 +0300878 u8 out_of_seq_cnt[0x1];
879 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300880 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300881 u8 reserved_at_183[0x1];
882 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300883 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300884 u8 max_qp_cnt[0xa];
885 u8 pkey_table_size[0x10];
886
Saeed Mahameede2816822015-05-28 22:28:40 +0300887 u8 vport_group_manager[0x1];
888 u8 vhca_group_manager[0x1];
889 u8 ib_virt[0x1];
890 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200891 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300892 u8 ets[0x1];
893 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200894 u8 eswitch_flow_table[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300895 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200896 u8 mcam_reg[0x1];
897 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300898 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200899 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300900 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300901 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200902 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300903 u8 disable_link_up[0x1];
904 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300905 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300906 u8 num_ports[0x8];
907
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300908 u8 reserved_at_1c0[0x1];
909 u8 pps[0x1];
910 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300911 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300912 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200913 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300914 u8 reserved_at_1d0[0x1];
915 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300916 u8 general_notification_event[0x1];
917 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200918 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200919 u8 rol_s[0x1];
920 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200922 u8 wol_s[0x1];
923 u8 wol_g[0x1];
924 u8 wol_a[0x1];
925 u8 wol_b[0x1];
926 u8 wol_m[0x1];
927 u8 wol_u[0x1];
928 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300929
930 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300932 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300933
Saeed Mahameede2816822015-05-28 22:28:40 +0300934 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300935 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300936 u8 reserved_at_202[0x1];
937 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200938 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200939 u8 reserved_at_205[0x1];
940 u8 repeated_block_disabled[0x1];
941 u8 umr_modify_entity_size_disabled[0x1];
942 u8 umr_modify_atomic_disabled[0x1];
943 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300944 u8 umr_fence[0x2];
945 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300946 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300947 u8 cmdif_checksum[0x2];
948 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300949 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 wq_signature[0x1];
951 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300952 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300953 u8 sho[0x1];
954 u8 tph[0x1];
955 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300956 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300957 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 roce[0x1];
960 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300962
963 u8 cq_oi[0x1];
964 u8 cq_resize[0x1];
965 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300967 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 pg[0x1];
969 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300971 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300972 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200976 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300977 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200978 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 qkv[0x1];
981 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200982 u8 set_deth_sqpn[0x1];
983 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 xrc[0x1];
985 u8 ud[0x1];
986 u8 uc[0x1];
987 u8 rc[0x1];
988
Eli Cohena6d51b62017-01-03 23:55:23 +0200989 u8 uar_4k[0x1];
990 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300993 u8 log_pg_sz[0x8];
994
995 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200996 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300997 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +03001000
1001 u8 reserved_at_270[0xb];
1002 u8 lag_master[0x1];
1003 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001004
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 max_wqe_sz_sq[0x10];
1007
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001009 u8 max_wqe_sz_rq[0x10];
1010
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001011 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 max_wqe_sz_sq_dc[0x10];
1013
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001015 u8 max_qp_mcg[0x19];
1016
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001018 u8 log_max_mcg[0x8];
1019
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001021 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001023 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001025 u8 log_max_xrcd[0x5];
1026
Amir Vadaia351a1b02016-07-14 10:32:38 +03001027 u8 reserved_at_340[0x8];
1028 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001029 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001030
Eli Cohenb7755162014-10-02 12:19:44 +03001031
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001033 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001035 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_max_tis[0x5];
1040
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001043 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001047 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001049 u8 log_max_tis_per_sq[0x5];
1050
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001052 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001053 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001054 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001055 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001057 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001058 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001059
Or Gerlitz40817cd2017-06-25 12:38:45 +03001060 u8 hairpin[0x1];
1061 u8 reserved_at_3c1[0x2];
1062 u8 log_max_hairpin_queues[0x5];
1063 u8 reserved_at_3c8[0x3];
1064 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001065 u8 reserved_at_3d0[0x3];
1066 u8 log_max_hairpin_num_packets[0x5];
1067 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001068 u8 log_max_wq_sz[0x5];
1069
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001070 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001071 u8 disable_local_lb_uc[0x1];
1072 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001073 u8 log_min_hairpin_wq_data_sz[0x5];
1074 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001075 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001076 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001077 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001078 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001079 u8 log_max_current_uc_list[0x5];
1080
Tariq Toukane1c9c622016-04-11 23:10:21 +03001081 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001082
Tariq Toukane1c9c622016-04-11 23:10:21 +03001083 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001084 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001085 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001086 u8 log_uar_page_sz[0x10];
1087
Tariq Toukane1c9c622016-04-11 23:10:21 +03001088 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001089 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001090 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001091
Eli Cohena6d51b62017-01-03 23:55:23 +02001092 u8 reserved_at_500[0x20];
1093 u8 num_of_uars_per_page[0x20];
1094 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001095
Guy Levi0ff8e792017-10-19 08:25:51 +03001096 u8 reserved_at_580[0x3d];
1097 u8 cqe_128_always[0x1];
1098 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001099 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001100
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001101 u8 cqe_compression_timeout[0x10];
1102 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001103
Saeed Mahameed74862162016-06-09 15:11:34 +03001104 u8 reserved_at_5e0[0x10];
1105 u8 tag_matching[0x1];
1106 u8 rndv_offload_rc[0x1];
1107 u8 rndv_offload_dc[0x1];
1108 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001109 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001110 u8 log_max_xrq[0x5];
1111
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001112 u8 affiliate_nic_vport_criteria[0x8];
1113 u8 native_port_num[0x8];
1114 u8 num_vhca_ports[0x8];
1115 u8 reserved_at_618[0x6];
1116 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001117 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001118};
1119
Saeed Mahameed81848732015-12-01 18:03:20 +02001120enum mlx5_flow_destination_type {
1121 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1122 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1123 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001124
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001125 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001126 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001127};
1128
1129struct mlx5_ifc_dest_format_struct_bits {
1130 u8 destination_type[0x8];
1131 u8 destination_id[0x18];
1132
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134};
1135
Amir Vadai9dc0b282016-05-13 12:55:39 +00001136struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001137 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001138
1139 u8 reserved_at_20[0x20];
1140};
1141
1142union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1143 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1144 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1145 u8 reserved_at_0[0x40];
1146};
1147
Saeed Mahameede2816822015-05-28 22:28:40 +03001148struct mlx5_ifc_fte_match_param_bits {
1149 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1150
1151 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1152
1153 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1154
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156};
1157
1158enum {
1159 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1160 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1161 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1162 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1163 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1164};
1165
1166struct mlx5_ifc_rx_hash_field_select_bits {
1167 u8 l3_prot_type[0x1];
1168 u8 l4_prot_type[0x1];
1169 u8 selected_fields[0x1e];
1170};
1171
1172enum {
1173 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1174 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1175};
1176
1177enum {
1178 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1179 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1180};
1181
1182struct mlx5_ifc_wq_bits {
1183 u8 wq_type[0x4];
1184 u8 wq_signature[0x1];
1185 u8 end_padding_mode[0x2];
1186 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188
1189 u8 hds_skip_first_sge[0x1];
1190 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192 u8 page_offset[0x5];
1193 u8 lwm[0x10];
1194
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 pd[0x18];
1197
Matan Barakb4ff3a32016-02-09 14:57:42 +02001198 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 uar_page[0x18];
1200
1201 u8 dbr_addr[0x40];
1202
1203 u8 hw_counter[0x20];
1204
1205 u8 sw_counter[0x20];
1206
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212 u8 log_wq_sz[0x5];
1213
Or Gerlitz4d533e02018-01-04 12:26:21 +02001214 u8 reserved_at_120[0x3];
1215 u8 log_hairpin_num_packets[0x5];
1216 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001217 u8 log_hairpin_data_sz[0x5];
1218 u8 reserved_at_130[0x5];
1219
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001220 u8 log_wqe_num_of_strides[0x3];
1221 u8 two_byte_shift_en[0x1];
1222 u8 reserved_at_139[0x4];
1223 u8 log_wqe_stride_size[0x3];
1224
1225 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001226
1227 struct mlx5_ifc_cmd_pas_bits pas[0];
1228};
1229
1230struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001231 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001232 u8 rq_num[0x18];
1233};
1234
1235struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001236 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001237 u8 mac_addr_47_32[0x10];
1238
1239 u8 mac_addr_31_0[0x20];
1240};
1241
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001242struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001244 u8 vlan[0x0c];
1245
Matan Barakb4ff3a32016-02-09 14:57:42 +02001246 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001247};
1248
Saeed Mahameede2816822015-05-28 22:28:40 +03001249struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001251
1252 u8 min_time_between_cnps[0x20];
1253
Matan Barakb4ff3a32016-02-09 14:57:42 +02001254 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001255 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001256 u8 reserved_at_d8[0x4];
1257 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001258 u8 cnp_802p_prio[0x3];
1259
Matan Barakb4ff3a32016-02-09 14:57:42 +02001260 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001261};
1262
1263struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001264 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001265
Matan Barakb4ff3a32016-02-09 14:57:42 +02001266 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001267 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001268 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001269 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001270 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001271
Matan Barakb4ff3a32016-02-09 14:57:42 +02001272 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001273
1274 u8 rpg_time_reset[0x20];
1275
1276 u8 rpg_byte_reset[0x20];
1277
1278 u8 rpg_threshold[0x20];
1279
1280 u8 rpg_max_rate[0x20];
1281
1282 u8 rpg_ai_rate[0x20];
1283
1284 u8 rpg_hai_rate[0x20];
1285
1286 u8 rpg_gd[0x20];
1287
1288 u8 rpg_min_dec_fac[0x20];
1289
1290 u8 rpg_min_rate[0x20];
1291
Matan Barakb4ff3a32016-02-09 14:57:42 +02001292 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001293
1294 u8 rate_to_set_on_first_cnp[0x20];
1295
1296 u8 dce_tcp_g[0x20];
1297
1298 u8 dce_tcp_rtt[0x20];
1299
1300 u8 rate_reduce_monitor_period[0x20];
1301
Matan Barakb4ff3a32016-02-09 14:57:42 +02001302 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001303
1304 u8 initial_alpha_value[0x20];
1305
Matan Barakb4ff3a32016-02-09 14:57:42 +02001306 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001307};
1308
1309struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001310 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001311
1312 u8 rppp_max_rps[0x20];
1313
1314 u8 rpg_time_reset[0x20];
1315
1316 u8 rpg_byte_reset[0x20];
1317
1318 u8 rpg_threshold[0x20];
1319
1320 u8 rpg_max_rate[0x20];
1321
1322 u8 rpg_ai_rate[0x20];
1323
1324 u8 rpg_hai_rate[0x20];
1325
1326 u8 rpg_gd[0x20];
1327
1328 u8 rpg_min_dec_fac[0x20];
1329
1330 u8 rpg_min_rate[0x20];
1331
Matan Barakb4ff3a32016-02-09 14:57:42 +02001332 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001333};
1334
1335enum {
1336 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1337 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1338 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1339};
1340
1341struct mlx5_ifc_resize_field_select_bits {
1342 u8 resize_field_select[0x20];
1343};
1344
1345enum {
1346 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1347 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1348 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1349 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1350};
1351
1352struct mlx5_ifc_modify_field_select_bits {
1353 u8 modify_field_select[0x20];
1354};
1355
1356struct mlx5_ifc_field_select_r_roce_np_bits {
1357 u8 field_select_r_roce_np[0x20];
1358};
1359
1360struct mlx5_ifc_field_select_r_roce_rp_bits {
1361 u8 field_select_r_roce_rp[0x20];
1362};
1363
1364enum {
1365 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1366 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1367 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1368 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1369 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1370 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1371 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1372 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1373 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1374 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1375};
1376
1377struct mlx5_ifc_field_select_802_1qau_rp_bits {
1378 u8 field_select_8021qaurp[0x20];
1379};
1380
1381struct mlx5_ifc_phys_layer_cntrs_bits {
1382 u8 time_since_last_clear_high[0x20];
1383
1384 u8 time_since_last_clear_low[0x20];
1385
1386 u8 symbol_errors_high[0x20];
1387
1388 u8 symbol_errors_low[0x20];
1389
1390 u8 sync_headers_errors_high[0x20];
1391
1392 u8 sync_headers_errors_low[0x20];
1393
1394 u8 edpl_bip_errors_lane0_high[0x20];
1395
1396 u8 edpl_bip_errors_lane0_low[0x20];
1397
1398 u8 edpl_bip_errors_lane1_high[0x20];
1399
1400 u8 edpl_bip_errors_lane1_low[0x20];
1401
1402 u8 edpl_bip_errors_lane2_high[0x20];
1403
1404 u8 edpl_bip_errors_lane2_low[0x20];
1405
1406 u8 edpl_bip_errors_lane3_high[0x20];
1407
1408 u8 edpl_bip_errors_lane3_low[0x20];
1409
1410 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1411
1412 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1413
1414 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1415
1416 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1417
1418 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1419
1420 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1421
1422 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1423
1424 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1425
1426 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1427
1428 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1429
1430 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1431
1432 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1433
1434 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1435
1436 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1437
1438 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1439
1440 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1441
1442 u8 rs_fec_corrected_blocks_high[0x20];
1443
1444 u8 rs_fec_corrected_blocks_low[0x20];
1445
1446 u8 rs_fec_uncorrectable_blocks_high[0x20];
1447
1448 u8 rs_fec_uncorrectable_blocks_low[0x20];
1449
1450 u8 rs_fec_no_errors_blocks_high[0x20];
1451
1452 u8 rs_fec_no_errors_blocks_low[0x20];
1453
1454 u8 rs_fec_single_error_blocks_high[0x20];
1455
1456 u8 rs_fec_single_error_blocks_low[0x20];
1457
1458 u8 rs_fec_corrected_symbols_total_high[0x20];
1459
1460 u8 rs_fec_corrected_symbols_total_low[0x20];
1461
1462 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1463
1464 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1465
1466 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1467
1468 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1469
1470 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1471
1472 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1473
1474 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1475
1476 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1477
1478 u8 link_down_events[0x20];
1479
1480 u8 successful_recovery_events[0x20];
1481
Matan Barakb4ff3a32016-02-09 14:57:42 +02001482 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001483};
1484
Gal Pressmand8dc0502016-09-27 17:04:51 +03001485struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1486 u8 time_since_last_clear_high[0x20];
1487
1488 u8 time_since_last_clear_low[0x20];
1489
1490 u8 phy_received_bits_high[0x20];
1491
1492 u8 phy_received_bits_low[0x20];
1493
1494 u8 phy_symbol_errors_high[0x20];
1495
1496 u8 phy_symbol_errors_low[0x20];
1497
1498 u8 phy_corrected_bits_high[0x20];
1499
1500 u8 phy_corrected_bits_low[0x20];
1501
1502 u8 phy_corrected_bits_lane0_high[0x20];
1503
1504 u8 phy_corrected_bits_lane0_low[0x20];
1505
1506 u8 phy_corrected_bits_lane1_high[0x20];
1507
1508 u8 phy_corrected_bits_lane1_low[0x20];
1509
1510 u8 phy_corrected_bits_lane2_high[0x20];
1511
1512 u8 phy_corrected_bits_lane2_low[0x20];
1513
1514 u8 phy_corrected_bits_lane3_high[0x20];
1515
1516 u8 phy_corrected_bits_lane3_low[0x20];
1517
1518 u8 reserved_at_200[0x5c0];
1519};
1520
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001521struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1522 u8 symbol_error_counter[0x10];
1523
1524 u8 link_error_recovery_counter[0x8];
1525
1526 u8 link_downed_counter[0x8];
1527
1528 u8 port_rcv_errors[0x10];
1529
1530 u8 port_rcv_remote_physical_errors[0x10];
1531
1532 u8 port_rcv_switch_relay_errors[0x10];
1533
1534 u8 port_xmit_discards[0x10];
1535
1536 u8 port_xmit_constraint_errors[0x8];
1537
1538 u8 port_rcv_constraint_errors[0x8];
1539
1540 u8 reserved_at_70[0x8];
1541
1542 u8 link_overrun_errors[0x8];
1543
1544 u8 reserved_at_80[0x10];
1545
1546 u8 vl_15_dropped[0x10];
1547
Tim Wright133bea02017-05-01 17:30:08 +01001548 u8 reserved_at_a0[0x80];
1549
1550 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001551};
1552
Saeed Mahameede2816822015-05-28 22:28:40 +03001553struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1554 u8 transmit_queue_high[0x20];
1555
1556 u8 transmit_queue_low[0x20];
1557
Matan Barakb4ff3a32016-02-09 14:57:42 +02001558 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001559};
1560
1561struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1562 u8 rx_octets_high[0x20];
1563
1564 u8 rx_octets_low[0x20];
1565
Matan Barakb4ff3a32016-02-09 14:57:42 +02001566 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001567
1568 u8 rx_frames_high[0x20];
1569
1570 u8 rx_frames_low[0x20];
1571
1572 u8 tx_octets_high[0x20];
1573
1574 u8 tx_octets_low[0x20];
1575
Matan Barakb4ff3a32016-02-09 14:57:42 +02001576 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001577
1578 u8 tx_frames_high[0x20];
1579
1580 u8 tx_frames_low[0x20];
1581
1582 u8 rx_pause_high[0x20];
1583
1584 u8 rx_pause_low[0x20];
1585
1586 u8 rx_pause_duration_high[0x20];
1587
1588 u8 rx_pause_duration_low[0x20];
1589
1590 u8 tx_pause_high[0x20];
1591
1592 u8 tx_pause_low[0x20];
1593
1594 u8 tx_pause_duration_high[0x20];
1595
1596 u8 tx_pause_duration_low[0x20];
1597
1598 u8 rx_pause_transition_high[0x20];
1599
1600 u8 rx_pause_transition_low[0x20];
1601
Matan Barakb4ff3a32016-02-09 14:57:42 +02001602 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001603};
1604
1605struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1606 u8 port_transmit_wait_high[0x20];
1607
1608 u8 port_transmit_wait_low[0x20];
1609
Gal Pressman2dba0792017-06-18 14:56:45 +03001610 u8 reserved_at_40[0x100];
1611
1612 u8 rx_buffer_almost_full_high[0x20];
1613
1614 u8 rx_buffer_almost_full_low[0x20];
1615
1616 u8 rx_buffer_full_high[0x20];
1617
1618 u8 rx_buffer_full_low[0x20];
1619
1620 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001621};
1622
1623struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1624 u8 dot3stats_alignment_errors_high[0x20];
1625
1626 u8 dot3stats_alignment_errors_low[0x20];
1627
1628 u8 dot3stats_fcs_errors_high[0x20];
1629
1630 u8 dot3stats_fcs_errors_low[0x20];
1631
1632 u8 dot3stats_single_collision_frames_high[0x20];
1633
1634 u8 dot3stats_single_collision_frames_low[0x20];
1635
1636 u8 dot3stats_multiple_collision_frames_high[0x20];
1637
1638 u8 dot3stats_multiple_collision_frames_low[0x20];
1639
1640 u8 dot3stats_sqe_test_errors_high[0x20];
1641
1642 u8 dot3stats_sqe_test_errors_low[0x20];
1643
1644 u8 dot3stats_deferred_transmissions_high[0x20];
1645
1646 u8 dot3stats_deferred_transmissions_low[0x20];
1647
1648 u8 dot3stats_late_collisions_high[0x20];
1649
1650 u8 dot3stats_late_collisions_low[0x20];
1651
1652 u8 dot3stats_excessive_collisions_high[0x20];
1653
1654 u8 dot3stats_excessive_collisions_low[0x20];
1655
1656 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1657
1658 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1659
1660 u8 dot3stats_carrier_sense_errors_high[0x20];
1661
1662 u8 dot3stats_carrier_sense_errors_low[0x20];
1663
1664 u8 dot3stats_frame_too_longs_high[0x20];
1665
1666 u8 dot3stats_frame_too_longs_low[0x20];
1667
1668 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1669
1670 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1671
1672 u8 dot3stats_symbol_errors_high[0x20];
1673
1674 u8 dot3stats_symbol_errors_low[0x20];
1675
1676 u8 dot3control_in_unknown_opcodes_high[0x20];
1677
1678 u8 dot3control_in_unknown_opcodes_low[0x20];
1679
1680 u8 dot3in_pause_frames_high[0x20];
1681
1682 u8 dot3in_pause_frames_low[0x20];
1683
1684 u8 dot3out_pause_frames_high[0x20];
1685
1686 u8 dot3out_pause_frames_low[0x20];
1687
Matan Barakb4ff3a32016-02-09 14:57:42 +02001688 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001689};
1690
1691struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1692 u8 ether_stats_drop_events_high[0x20];
1693
1694 u8 ether_stats_drop_events_low[0x20];
1695
1696 u8 ether_stats_octets_high[0x20];
1697
1698 u8 ether_stats_octets_low[0x20];
1699
1700 u8 ether_stats_pkts_high[0x20];
1701
1702 u8 ether_stats_pkts_low[0x20];
1703
1704 u8 ether_stats_broadcast_pkts_high[0x20];
1705
1706 u8 ether_stats_broadcast_pkts_low[0x20];
1707
1708 u8 ether_stats_multicast_pkts_high[0x20];
1709
1710 u8 ether_stats_multicast_pkts_low[0x20];
1711
1712 u8 ether_stats_crc_align_errors_high[0x20];
1713
1714 u8 ether_stats_crc_align_errors_low[0x20];
1715
1716 u8 ether_stats_undersize_pkts_high[0x20];
1717
1718 u8 ether_stats_undersize_pkts_low[0x20];
1719
1720 u8 ether_stats_oversize_pkts_high[0x20];
1721
1722 u8 ether_stats_oversize_pkts_low[0x20];
1723
1724 u8 ether_stats_fragments_high[0x20];
1725
1726 u8 ether_stats_fragments_low[0x20];
1727
1728 u8 ether_stats_jabbers_high[0x20];
1729
1730 u8 ether_stats_jabbers_low[0x20];
1731
1732 u8 ether_stats_collisions_high[0x20];
1733
1734 u8 ether_stats_collisions_low[0x20];
1735
1736 u8 ether_stats_pkts64octets_high[0x20];
1737
1738 u8 ether_stats_pkts64octets_low[0x20];
1739
1740 u8 ether_stats_pkts65to127octets_high[0x20];
1741
1742 u8 ether_stats_pkts65to127octets_low[0x20];
1743
1744 u8 ether_stats_pkts128to255octets_high[0x20];
1745
1746 u8 ether_stats_pkts128to255octets_low[0x20];
1747
1748 u8 ether_stats_pkts256to511octets_high[0x20];
1749
1750 u8 ether_stats_pkts256to511octets_low[0x20];
1751
1752 u8 ether_stats_pkts512to1023octets_high[0x20];
1753
1754 u8 ether_stats_pkts512to1023octets_low[0x20];
1755
1756 u8 ether_stats_pkts1024to1518octets_high[0x20];
1757
1758 u8 ether_stats_pkts1024to1518octets_low[0x20];
1759
1760 u8 ether_stats_pkts1519to2047octets_high[0x20];
1761
1762 u8 ether_stats_pkts1519to2047octets_low[0x20];
1763
1764 u8 ether_stats_pkts2048to4095octets_high[0x20];
1765
1766 u8 ether_stats_pkts2048to4095octets_low[0x20];
1767
1768 u8 ether_stats_pkts4096to8191octets_high[0x20];
1769
1770 u8 ether_stats_pkts4096to8191octets_low[0x20];
1771
1772 u8 ether_stats_pkts8192to10239octets_high[0x20];
1773
1774 u8 ether_stats_pkts8192to10239octets_low[0x20];
1775
Matan Barakb4ff3a32016-02-09 14:57:42 +02001776 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001777};
1778
1779struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1780 u8 if_in_octets_high[0x20];
1781
1782 u8 if_in_octets_low[0x20];
1783
1784 u8 if_in_ucast_pkts_high[0x20];
1785
1786 u8 if_in_ucast_pkts_low[0x20];
1787
1788 u8 if_in_discards_high[0x20];
1789
1790 u8 if_in_discards_low[0x20];
1791
1792 u8 if_in_errors_high[0x20];
1793
1794 u8 if_in_errors_low[0x20];
1795
1796 u8 if_in_unknown_protos_high[0x20];
1797
1798 u8 if_in_unknown_protos_low[0x20];
1799
1800 u8 if_out_octets_high[0x20];
1801
1802 u8 if_out_octets_low[0x20];
1803
1804 u8 if_out_ucast_pkts_high[0x20];
1805
1806 u8 if_out_ucast_pkts_low[0x20];
1807
1808 u8 if_out_discards_high[0x20];
1809
1810 u8 if_out_discards_low[0x20];
1811
1812 u8 if_out_errors_high[0x20];
1813
1814 u8 if_out_errors_low[0x20];
1815
1816 u8 if_in_multicast_pkts_high[0x20];
1817
1818 u8 if_in_multicast_pkts_low[0x20];
1819
1820 u8 if_in_broadcast_pkts_high[0x20];
1821
1822 u8 if_in_broadcast_pkts_low[0x20];
1823
1824 u8 if_out_multicast_pkts_high[0x20];
1825
1826 u8 if_out_multicast_pkts_low[0x20];
1827
1828 u8 if_out_broadcast_pkts_high[0x20];
1829
1830 u8 if_out_broadcast_pkts_low[0x20];
1831
Matan Barakb4ff3a32016-02-09 14:57:42 +02001832 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001833};
1834
1835struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1836 u8 a_frames_transmitted_ok_high[0x20];
1837
1838 u8 a_frames_transmitted_ok_low[0x20];
1839
1840 u8 a_frames_received_ok_high[0x20];
1841
1842 u8 a_frames_received_ok_low[0x20];
1843
1844 u8 a_frame_check_sequence_errors_high[0x20];
1845
1846 u8 a_frame_check_sequence_errors_low[0x20];
1847
1848 u8 a_alignment_errors_high[0x20];
1849
1850 u8 a_alignment_errors_low[0x20];
1851
1852 u8 a_octets_transmitted_ok_high[0x20];
1853
1854 u8 a_octets_transmitted_ok_low[0x20];
1855
1856 u8 a_octets_received_ok_high[0x20];
1857
1858 u8 a_octets_received_ok_low[0x20];
1859
1860 u8 a_multicast_frames_xmitted_ok_high[0x20];
1861
1862 u8 a_multicast_frames_xmitted_ok_low[0x20];
1863
1864 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1865
1866 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1867
1868 u8 a_multicast_frames_received_ok_high[0x20];
1869
1870 u8 a_multicast_frames_received_ok_low[0x20];
1871
1872 u8 a_broadcast_frames_received_ok_high[0x20];
1873
1874 u8 a_broadcast_frames_received_ok_low[0x20];
1875
1876 u8 a_in_range_length_errors_high[0x20];
1877
1878 u8 a_in_range_length_errors_low[0x20];
1879
1880 u8 a_out_of_range_length_field_high[0x20];
1881
1882 u8 a_out_of_range_length_field_low[0x20];
1883
1884 u8 a_frame_too_long_errors_high[0x20];
1885
1886 u8 a_frame_too_long_errors_low[0x20];
1887
1888 u8 a_symbol_error_during_carrier_high[0x20];
1889
1890 u8 a_symbol_error_during_carrier_low[0x20];
1891
1892 u8 a_mac_control_frames_transmitted_high[0x20];
1893
1894 u8 a_mac_control_frames_transmitted_low[0x20];
1895
1896 u8 a_mac_control_frames_received_high[0x20];
1897
1898 u8 a_mac_control_frames_received_low[0x20];
1899
1900 u8 a_unsupported_opcodes_received_high[0x20];
1901
1902 u8 a_unsupported_opcodes_received_low[0x20];
1903
1904 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1905
1906 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1907
1908 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1909
1910 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1911
Matan Barakb4ff3a32016-02-09 14:57:42 +02001912 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001913};
1914
Gal Pressman8ed1a632016-11-17 13:46:01 +02001915struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1916 u8 life_time_counter_high[0x20];
1917
1918 u8 life_time_counter_low[0x20];
1919
1920 u8 rx_errors[0x20];
1921
1922 u8 tx_errors[0x20];
1923
1924 u8 l0_to_recovery_eieos[0x20];
1925
1926 u8 l0_to_recovery_ts[0x20];
1927
1928 u8 l0_to_recovery_framing[0x20];
1929
1930 u8 l0_to_recovery_retrain[0x20];
1931
1932 u8 crc_error_dllp[0x20];
1933
1934 u8 crc_error_tlp[0x20];
1935
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001936 u8 tx_overflow_buffer_pkt_high[0x20];
1937
1938 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001939
1940 u8 outbound_stalled_reads[0x20];
1941
1942 u8 outbound_stalled_writes[0x20];
1943
1944 u8 outbound_stalled_reads_events[0x20];
1945
1946 u8 outbound_stalled_writes_events[0x20];
1947
1948 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001949};
1950
Saeed Mahameede2816822015-05-28 22:28:40 +03001951struct mlx5_ifc_cmd_inter_comp_event_bits {
1952 u8 command_completion_vector[0x20];
1953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955};
1956
1957struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961 u8 vl[0x4];
1962
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964};
1965
1966struct mlx5_ifc_db_bf_congestion_event_bits {
1967 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001970 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001971
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973};
1974
1975struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001976 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001977
1978 u8 gpio_event_hi[0x20];
1979
1980 u8 gpio_event_lo[0x20];
1981
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983};
1984
1985struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987
1988 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990
Matan Barakb4ff3a32016-02-09 14:57:42 +02001991 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001992};
1993
1994struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001995 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001996};
1997
1998enum {
1999 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2000 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2001};
2002
2003struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005 u8 cqn[0x18];
2006
Matan Barakb4ff3a32016-02-09 14:57:42 +02002007 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002008
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010 u8 syndrome[0x8];
2011
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013};
2014
2015struct mlx5_ifc_rdma_page_fault_event_bits {
2016 u8 bytes_committed[0x20];
2017
2018 u8 r_key[0x20];
2019
Matan Barakb4ff3a32016-02-09 14:57:42 +02002020 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002021 u8 packet_len[0x10];
2022
2023 u8 rdma_op_len[0x20];
2024
2025 u8 rdma_va[0x40];
2026
Matan Barakb4ff3a32016-02-09 14:57:42 +02002027 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002028 u8 rdma[0x1];
2029 u8 write[0x1];
2030 u8 requestor[0x1];
2031 u8 qp_number[0x18];
2032};
2033
2034struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2035 u8 bytes_committed[0x20];
2036
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038 u8 wqe_index[0x10];
2039
Matan Barakb4ff3a32016-02-09 14:57:42 +02002040 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002041 u8 len[0x10];
2042
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044
Matan Barakb4ff3a32016-02-09 14:57:42 +02002045 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002046 u8 rdma[0x1];
2047 u8 write_read[0x1];
2048 u8 requestor[0x1];
2049 u8 qpn[0x18];
2050};
2051
2052struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002053 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054
2055 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 qpn_rqn_sqn[0x18];
2060};
2061
2062struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 dct_number[0x18];
2067};
2068
2069struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073 u8 cq_number[0x18];
2074};
2075
2076enum {
2077 MLX5_QPC_STATE_RST = 0x0,
2078 MLX5_QPC_STATE_INIT = 0x1,
2079 MLX5_QPC_STATE_RTR = 0x2,
2080 MLX5_QPC_STATE_RTS = 0x3,
2081 MLX5_QPC_STATE_SQER = 0x4,
2082 MLX5_QPC_STATE_ERR = 0x6,
2083 MLX5_QPC_STATE_SQD = 0x7,
2084 MLX5_QPC_STATE_SUSPENDED = 0x9,
2085};
2086
2087enum {
2088 MLX5_QPC_ST_RC = 0x0,
2089 MLX5_QPC_ST_UC = 0x1,
2090 MLX5_QPC_ST_UD = 0x2,
2091 MLX5_QPC_ST_XRC = 0x3,
2092 MLX5_QPC_ST_DCI = 0x5,
2093 MLX5_QPC_ST_QP0 = 0x7,
2094 MLX5_QPC_ST_QP1 = 0x8,
2095 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2096 MLX5_QPC_ST_REG_UMR = 0xc,
2097};
2098
2099enum {
2100 MLX5_QPC_PM_STATE_ARMED = 0x0,
2101 MLX5_QPC_PM_STATE_REARM = 0x1,
2102 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2103 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2104};
2105
2106enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002107 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2108};
2109
2110enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2112 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2113};
2114
2115enum {
2116 MLX5_QPC_MTU_256_BYTES = 0x1,
2117 MLX5_QPC_MTU_512_BYTES = 0x2,
2118 MLX5_QPC_MTU_1K_BYTES = 0x3,
2119 MLX5_QPC_MTU_2K_BYTES = 0x4,
2120 MLX5_QPC_MTU_4K_BYTES = 0x5,
2121 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2122};
2123
2124enum {
2125 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2126 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2127 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2128 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2129 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2130 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2131 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2132 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2133};
2134
2135enum {
2136 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2137 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2138 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2139};
2140
2141enum {
2142 MLX5_QPC_CS_RES_DISABLE = 0x0,
2143 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2144 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2145};
2146
2147struct mlx5_ifc_qpc_bits {
2148 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002149 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002153 u8 reserved_at_15[0x3];
2154 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157
2158 u8 wq_signature[0x1];
2159 u8 block_lb_mc[0x1];
2160 u8 atomic_like_write_en[0x1];
2161 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 pd[0x18];
2166
2167 u8 mtu[0x3];
2168 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002169 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170 u8 log_rq_size[0x4];
2171 u8 log_rq_stride[0x3];
2172 u8 no_sq[0x1];
2173 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002174 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002176 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177
2178 u8 counter_set_id[0x8];
2179 u8 uar_page[0x18];
2180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 user_index[0x18];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 log_page_size[0x5];
2186 u8 remote_qpn[0x18];
2187
2188 struct mlx5_ifc_ads_bits primary_address_path;
2189
2190 struct mlx5_ifc_ads_bits secondary_address_path;
2191
2192 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196 u8 retry_count[0x3];
2197 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002198 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199 u8 fre[0x1];
2200 u8 cur_rnr_retry[0x3];
2201 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203
Matan Barakb4ff3a32016-02-09 14:57:42 +02002204 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207 u8 next_send_psn[0x18];
2208
Matan Barakb4ff3a32016-02-09 14:57:42 +02002209 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002210 u8 cqn_snd[0x18];
2211
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002212 u8 reserved_at_400[0x8];
2213 u8 deth_sqpn[0x18];
2214
2215 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218 u8 last_acked_psn[0x18];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 ssn[0x18];
2222
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 atomic_mode[0x4];
2227 u8 rre[0x1];
2228 u8 rwe[0x1];
2229 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 cd_slave_receive[0x1];
2234 u8 cd_slave_send[0x1];
2235 u8 cd_master[0x1];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 min_rnr_nak[0x5];
2239 u8 next_rcv_psn[0x18];
2240
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 xrcd[0x18];
2243
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 cqn_rcv[0x18];
2246
2247 u8 dbr_addr[0x40];
2248
2249 u8 q_key[0x20];
2250
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002253 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254
Matan Barakb4ff3a32016-02-09 14:57:42 +02002255 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256 u8 rmsn[0x18];
2257
2258 u8 hw_sq_wqebb_counter[0x10];
2259 u8 sw_sq_wqebb_counter[0x10];
2260
2261 u8 hw_rq_counter[0x20];
2262
2263 u8 sw_rq_counter[0x20];
2264
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 cgs[0x1];
2269 u8 cs_req[0x8];
2270 u8 cs_res[0x8];
2271
2272 u8 dc_access_key[0x40];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275};
2276
2277struct mlx5_ifc_roce_addr_layout_bits {
2278 u8 source_l3_address[16][0x8];
2279
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281 u8 vlan_valid[0x1];
2282 u8 vlan_id[0xc];
2283 u8 source_mac_47_32[0x10];
2284
2285 u8 source_mac_31_0[0x20];
2286
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288 u8 roce_l3_type[0x4];
2289 u8 roce_version[0x8];
2290
Matan Barakb4ff3a32016-02-09 14:57:42 +02002291 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292};
2293
2294union mlx5_ifc_hca_cap_union_bits {
2295 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2296 struct mlx5_ifc_odp_cap_bits odp_cap;
2297 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2298 struct mlx5_ifc_roce_cap_bits roce_cap;
2299 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2300 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002301 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002302 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002303 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002304 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002305 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307};
2308
2309enum {
2310 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2311 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2312 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002313 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002314 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2315 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002316 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002317};
2318
2319struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321
2322 u8 group_id[0x20];
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325 u8 flow_tag[0x18];
2326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 action[0x10];
2329
Matan Barakb4ff3a32016-02-09 14:57:42 +02002330 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002331 u8 destination_list_size[0x18];
2332
Amir Vadai9dc0b282016-05-13 12:55:39 +00002333 u8 reserved_at_a0[0x8];
2334 u8 flow_counter_list_size[0x18];
2335
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002336 u8 encap_id[0x20];
2337
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002338 u8 modify_header_id[0x20];
2339
2340 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002341
2342 struct mlx5_ifc_fte_match_param_bits match_value;
2343
Matan Barakb4ff3a32016-02-09 14:57:42 +02002344 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002345
Amir Vadai9dc0b282016-05-13 12:55:39 +00002346 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002347};
2348
2349enum {
2350 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2351 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2352};
2353
2354struct mlx5_ifc_xrc_srqc_bits {
2355 u8 state[0x4];
2356 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358
2359 u8 wq_signature[0x1];
2360 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002361 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002362 u8 rlky[0x1];
2363 u8 basic_cyclic_rcv_wqe[0x1];
2364 u8 log_rq_stride[0x3];
2365 u8 xrcd[0x18];
2366
2367 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369 u8 cqn[0x18];
2370
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372
2373 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002374 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002375 u8 log_page_size[0x6];
2376 u8 user_index[0x18];
2377
Matan Barakb4ff3a32016-02-09 14:57:42 +02002378 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002379
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381 u8 pd[0x18];
2382
2383 u8 lwm[0x10];
2384 u8 wqe_cnt[0x10];
2385
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387
2388 u8 db_record_addr_h[0x20];
2389
2390 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394};
2395
2396struct mlx5_ifc_traffic_counter_bits {
2397 u8 packets[0x40];
2398
2399 u8 octets[0x40];
2400};
2401
2402struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002403 u8 strict_lag_tx_port_affinity[0x1];
2404 u8 reserved_at_1[0x3];
2405 u8 lag_tx_port_affinity[0x04];
2406
2407 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 transport_domain[0x18];
2415
Erez Shitrit500a3d02017-04-13 06:36:51 +03002416 u8 reserved_at_140[0x8];
2417 u8 underlay_qpn[0x18];
2418 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419};
2420
2421enum {
2422 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2423 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2424};
2425
2426enum {
2427 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2428 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2429};
2430
2431enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002432 MLX5_RX_HASH_FN_NONE = 0x0,
2433 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2434 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002435};
2436
2437enum {
2438 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2439 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2440};
2441
2442struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444
2445 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447
Matan Barakb4ff3a32016-02-09 14:57:42 +02002448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 lro_timeout_period_usecs[0x10];
2452 u8 lro_enable_mask[0x4];
2453 u8 lro_max_ip_payload_size[0x8];
2454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458 u8 inline_rqn[0x18];
2459
2460 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464 u8 indirect_table[0x18];
2465
2466 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468 u8 self_lb_block[0x2];
2469 u8 transport_domain[0x18];
2470
2471 u8 rx_hash_toeplitz_key[10][0x20];
2472
2473 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2474
2475 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2476
Matan Barakb4ff3a32016-02-09 14:57:42 +02002477 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002478};
2479
2480enum {
2481 MLX5_SRQC_STATE_GOOD = 0x0,
2482 MLX5_SRQC_STATE_ERROR = 0x1,
2483};
2484
2485struct mlx5_ifc_srqc_bits {
2486 u8 state[0x4];
2487 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489
2490 u8 wq_signature[0x1];
2491 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002494 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 log_rq_stride[0x3];
2496 u8 xrcd[0x18];
2497
2498 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002499 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002500 u8 cqn[0x18];
2501
Matan Barakb4ff3a32016-02-09 14:57:42 +02002502 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002503
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002506 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002507
Matan Barakb4ff3a32016-02-09 14:57:42 +02002508 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002509
Matan Barakb4ff3a32016-02-09 14:57:42 +02002510 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002511 u8 pd[0x18];
2512
2513 u8 lwm[0x10];
2514 u8 wqe_cnt[0x10];
2515
Matan Barakb4ff3a32016-02-09 14:57:42 +02002516 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002517
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002518 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521};
2522
2523enum {
2524 MLX5_SQC_STATE_RST = 0x0,
2525 MLX5_SQC_STATE_RDY = 0x1,
2526 MLX5_SQC_STATE_ERR = 0x3,
2527};
2528
2529struct mlx5_ifc_sqc_bits {
2530 u8 rlky[0x1];
2531 u8 cd_master[0x1];
2532 u8 fre[0x1];
2533 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002534 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002535 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002537 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002538 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002539 u8 hairpin[0x1];
2540 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541
Matan Barakb4ff3a32016-02-09 14:57:42 +02002542 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002543 u8 user_index[0x18];
2544
Matan Barakb4ff3a32016-02-09 14:57:42 +02002545 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546 u8 cqn[0x18];
2547
Or Gerlitz40817cd2017-06-25 12:38:45 +03002548 u8 reserved_at_60[0x8];
2549 u8 hairpin_peer_rq[0x18];
2550
2551 u8 reserved_at_80[0x10];
2552 u8 hairpin_peer_vhca[0x10];
2553
2554 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555
Saeed Mahameed74862162016-06-09 15:11:34 +03002556 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002558 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
Matan Barakb4ff3a32016-02-09 14:57:42 +02002562 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563 u8 tis_num_0[0x18];
2564
2565 struct mlx5_ifc_wq_bits wq;
2566};
2567
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002568enum {
2569 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2570 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2571 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2572 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2573};
2574
2575struct mlx5_ifc_scheduling_context_bits {
2576 u8 element_type[0x8];
2577 u8 reserved_at_8[0x18];
2578
2579 u8 element_attributes[0x20];
2580
2581 u8 parent_element_id[0x20];
2582
2583 u8 reserved_at_60[0x40];
2584
2585 u8 bw_share[0x20];
2586
2587 u8 max_average_bw[0x20];
2588
2589 u8 reserved_at_e0[0x120];
2590};
2591
Saeed Mahameede2816822015-05-28 22:28:40 +03002592struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002593 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594
Matan Barakb4ff3a32016-02-09 14:57:42 +02002595 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002596 u8 rqt_max_size[0x10];
2597
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599 u8 rqt_actual_size[0x10];
2600
Matan Barakb4ff3a32016-02-09 14:57:42 +02002601 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002602
2603 struct mlx5_ifc_rq_num_bits rq_num[0];
2604};
2605
2606enum {
2607 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2608 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2609};
2610
2611enum {
2612 MLX5_RQC_STATE_RST = 0x0,
2613 MLX5_RQC_STATE_RDY = 0x1,
2614 MLX5_RQC_STATE_ERR = 0x3,
2615};
2616
2617struct mlx5_ifc_rqc_bits {
2618 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002619 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002620 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621 u8 vsd[0x1];
2622 u8 mem_rq_type[0x4];
2623 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002624 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002625 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002626 u8 hairpin[0x1];
2627 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628
Matan Barakb4ff3a32016-02-09 14:57:42 +02002629 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002630 u8 user_index[0x18];
2631
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633 u8 cqn[0x18];
2634
2635 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002636 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002637
Matan Barakb4ff3a32016-02-09 14:57:42 +02002638 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002639 u8 rmpn[0x18];
2640
Or Gerlitz40817cd2017-06-25 12:38:45 +03002641 u8 reserved_at_a0[0x8];
2642 u8 hairpin_peer_sq[0x18];
2643
2644 u8 reserved_at_c0[0x10];
2645 u8 hairpin_peer_vhca[0x10];
2646
2647 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648
2649 struct mlx5_ifc_wq_bits wq;
2650};
2651
2652enum {
2653 MLX5_RMPC_STATE_RDY = 0x1,
2654 MLX5_RMPC_STATE_ERR = 0x3,
2655};
2656
2657struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002658 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002659 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002660 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002661
2662 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666
2667 struct mlx5_ifc_wq_bits wq;
2668};
2669
Saeed Mahameede2816822015-05-28 22:28:40 +03002670struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002671 u8 reserved_at_0[0x5];
2672 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002673 u8 reserved_at_8[0x15];
2674 u8 disable_mc_local_lb[0x1];
2675 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 roce_en[0x1];
2677
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002678 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002679 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002680 u8 event_on_mtu[0x1];
2681 u8 event_on_promisc_change[0x1];
2682 u8 event_on_vlan_change[0x1];
2683 u8 event_on_mc_address_change[0x1];
2684 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002685
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002686 u8 reserved_at_40[0xc];
2687
2688 u8 affiliation_criteria[0x4];
2689 u8 affiliated_vhca_id[0x10];
2690
2691 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002692
2693 u8 mtu[0x10];
2694
Achiad Shochat9efa7522015-12-23 18:47:20 +02002695 u8 system_image_guid[0x40];
2696 u8 port_guid[0x40];
2697 u8 node_guid[0x40];
2698
Matan Barakb4ff3a32016-02-09 14:57:42 +02002699 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002700 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002701 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002702
2703 u8 promisc_uc[0x1];
2704 u8 promisc_mc[0x1];
2705 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002709 u8 allowed_list_size[0xc];
2710
2711 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2712
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002714
2715 u8 current_uc_mac_address[0][0x40];
2716};
2717
2718enum {
2719 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2720 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2721 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002722 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002723};
2724
2725struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002726 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002727 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002729 u8 small_fence_on_rdma_read_response[0x1];
2730 u8 umr_en[0x1];
2731 u8 a[0x1];
2732 u8 rw[0x1];
2733 u8 rr[0x1];
2734 u8 lw[0x1];
2735 u8 lr[0x1];
2736 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002737 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002738
2739 u8 qpn[0x18];
2740 u8 mkey_7_0[0x8];
2741
Matan Barakb4ff3a32016-02-09 14:57:42 +02002742 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002743
2744 u8 length64[0x1];
2745 u8 bsf_en[0x1];
2746 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750 u8 en_rinval[0x1];
2751 u8 pd[0x18];
2752
2753 u8 start_addr[0x40];
2754
2755 u8 len[0x40];
2756
2757 u8 bsf_octword_size[0x20];
2758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760
2761 u8 translations_octword_size[0x20];
2762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 log_page_size[0x5];
2765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767};
2768
2769struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771 u8 pkey[0x10];
2772};
2773
2774struct mlx5_ifc_array128_auto_bits {
2775 u8 array128_auto[16][0x8];
2776};
2777
2778struct mlx5_ifc_hca_vport_context_bits {
2779 u8 field_select[0x20];
2780
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782
2783 u8 sm_virt_aware[0x1];
2784 u8 has_smi[0x1];
2785 u8 has_raw[0x1];
2786 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002788 u8 port_physical_state[0x4];
2789 u8 vport_state_policy[0x4];
2790 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 vport_state[0x4];
2792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002794
2795 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002796
2797 u8 port_guid[0x40];
2798
2799 u8 node_guid[0x40];
2800
2801 u8 cap_mask1[0x20];
2802
2803 u8 cap_mask1_field_select[0x20];
2804
2805 u8 cap_mask2[0x20];
2806
2807 u8 cap_mask2_field_select[0x20];
2808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810
2811 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 init_type_reply[0x4];
2814 u8 lmc[0x3];
2815 u8 subnet_timeout[0x5];
2816
2817 u8 sm_lid[0x10];
2818 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820
2821 u8 qkey_violation_counter[0x10];
2822 u8 pkey_violation_counter[0x10];
2823
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825};
2826
Saeed Mahameedd6666752015-12-01 18:03:22 +02002827struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002829 u8 vport_svlan_strip[0x1];
2830 u8 vport_cvlan_strip[0x1];
2831 u8 vport_svlan_insert[0x1];
2832 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002833 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002834
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002836
2837 u8 svlan_cfi[0x1];
2838 u8 svlan_pcp[0x3];
2839 u8 svlan_id[0xc];
2840 u8 cvlan_cfi[0x1];
2841 u8 cvlan_pcp[0x3];
2842 u8 cvlan_id[0xc];
2843
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002845};
2846
Saeed Mahameede2816822015-05-28 22:28:40 +03002847enum {
2848 MLX5_EQC_STATUS_OK = 0x0,
2849 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2850};
2851
2852enum {
2853 MLX5_EQC_ST_ARMED = 0x9,
2854 MLX5_EQC_ST_FIRED = 0xa,
2855};
2856
2857struct mlx5_ifc_eqc_bits {
2858 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860 u8 ec[0x1];
2861 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002862 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002863 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002873 u8 log_eq_size[0x5];
2874 u8 uar_page[0x18];
2875
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 intr[0x8];
2880
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002882 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 consumer_counter[0x18];
2889
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 producer_counter[0x18];
2892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894};
2895
2896enum {
2897 MLX5_DCTC_STATE_ACTIVE = 0x0,
2898 MLX5_DCTC_STATE_DRAINING = 0x1,
2899 MLX5_DCTC_STATE_DRAINED = 0x2,
2900};
2901
2902enum {
2903 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2904 MLX5_DCTC_CS_RES_NA = 0x1,
2905 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2906};
2907
2908enum {
2909 MLX5_DCTC_MTU_256_BYTES = 0x1,
2910 MLX5_DCTC_MTU_512_BYTES = 0x2,
2911 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2912 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2913 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2914};
2915
2916struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 user_index[0x18];
2923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 cqn[0x18];
2926
2927 u8 counter_set_id[0x8];
2928 u8 atomic_mode[0x4];
2929 u8 rre[0x1];
2930 u8 rwe[0x1];
2931 u8 rae[0x1];
2932 u8 atomic_like_write_en[0x1];
2933 u8 latency_sensitive[0x1];
2934 u8 rlky[0x1];
2935 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002945 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948 u8 pd[0x18];
2949
2950 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 flow_label[0x14];
2953
2954 u8 dc_access_key[0x40];
2955
Matan Barakb4ff3a32016-02-09 14:57:42 +02002956 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002957 u8 mtu[0x3];
2958 u8 port[0x8];
2959 u8 pkey_index[0x10];
2960
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964 u8 hop_limit[0x8];
2965
2966 u8 dc_access_key_violation_count[0x20];
2967
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969 u8 dei_cfi[0x1];
2970 u8 eth_prio[0x3];
2971 u8 ecn[0x2];
2972 u8 dscp[0x6];
2973
Matan Barakb4ff3a32016-02-09 14:57:42 +02002974 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002975};
2976
2977enum {
2978 MLX5_CQC_STATUS_OK = 0x0,
2979 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2980 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2981};
2982
2983enum {
2984 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2985 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2986};
2987
2988enum {
2989 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2990 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2991 MLX5_CQC_ST_FIRED = 0xa,
2992};
2993
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002994enum {
2995 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2996 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002997 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002998};
2999
Saeed Mahameede2816822015-05-28 22:28:40 +03003000struct mlx5_ifc_cqc_bits {
3001 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003 u8 cqe_sz[0x3];
3004 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003005 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003006 u8 scqe_break_moderation_en[0x1];
3007 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003008 u8 cq_period_mode[0x2];
3009 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 mini_cqe_res_format[0x2];
3011 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003012 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003013
Matan Barakb4ff3a32016-02-09 14:57:42 +02003014 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003015
Matan Barakb4ff3a32016-02-09 14:57:42 +02003016 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003017 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003018 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003019
Matan Barakb4ff3a32016-02-09 14:57:42 +02003020 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003021 u8 log_cq_size[0x5];
3022 u8 uar_page[0x18];
3023
Matan Barakb4ff3a32016-02-09 14:57:42 +02003024 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003025 u8 cq_period[0xc];
3026 u8 cq_max_count[0x10];
3027
Matan Barakb4ff3a32016-02-09 14:57:42 +02003028 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029 u8 c_eqn[0x8];
3030
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034
Matan Barakb4ff3a32016-02-09 14:57:42 +02003035 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003036
Matan Barakb4ff3a32016-02-09 14:57:42 +02003037 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003038 u8 last_notified_index[0x18];
3039
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041 u8 last_solicit_index[0x18];
3042
Matan Barakb4ff3a32016-02-09 14:57:42 +02003043 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003044 u8 consumer_counter[0x18];
3045
Matan Barakb4ff3a32016-02-09 14:57:42 +02003046 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003047 u8 producer_counter[0x18];
3048
Matan Barakb4ff3a32016-02-09 14:57:42 +02003049 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003050
3051 u8 dbr_addr[0x40];
3052};
3053
3054union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3055 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3056 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3057 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059};
3060
3061struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003065 u8 ieee_vendor_id[0x18];
3066
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068 u8 vsd_vendor_id[0x10];
3069
3070 u8 vsd[208][0x8];
3071
3072 u8 vsd_contd_psid[16][0x8];
3073};
3074
Saeed Mahameed74862162016-06-09 15:11:34 +03003075enum {
3076 MLX5_XRQC_STATE_GOOD = 0x0,
3077 MLX5_XRQC_STATE_ERROR = 0x1,
3078};
3079
3080enum {
3081 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3082 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3083};
3084
3085enum {
3086 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3087};
3088
3089struct mlx5_ifc_tag_matching_topology_context_bits {
3090 u8 log_matching_list_sz[0x4];
3091 u8 reserved_at_4[0xc];
3092 u8 append_next_index[0x10];
3093
3094 u8 sw_phase_cnt[0x10];
3095 u8 hw_phase_cnt[0x10];
3096
3097 u8 reserved_at_40[0x40];
3098};
3099
3100struct mlx5_ifc_xrqc_bits {
3101 u8 state[0x4];
3102 u8 rlkey[0x1];
3103 u8 reserved_at_5[0xf];
3104 u8 topology[0x4];
3105 u8 reserved_at_18[0x4];
3106 u8 offload[0x4];
3107
3108 u8 reserved_at_20[0x8];
3109 u8 user_index[0x18];
3110
3111 u8 reserved_at_40[0x8];
3112 u8 cqn[0x18];
3113
3114 u8 reserved_at_60[0xa0];
3115
3116 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3117
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003118 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003119
3120 struct mlx5_ifc_wq_bits wq;
3121};
3122
Saeed Mahameede2816822015-05-28 22:28:40 +03003123union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3124 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3125 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003126 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003127};
3128
3129union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3130 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3131 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3132 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003133 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003134};
3135
3136union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3137 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3138 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3139 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3140 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3141 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3142 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3143 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003144 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003145 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003146 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148};
3149
Gal Pressman8ed1a632016-11-17 13:46:01 +02003150union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3151 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3152 u8 reserved_at_0[0x7c0];
3153};
3154
Saeed Mahameede2816822015-05-28 22:28:40 +03003155union mlx5_ifc_event_auto_bits {
3156 struct mlx5_ifc_comp_event_bits comp_event;
3157 struct mlx5_ifc_dct_events_bits dct_events;
3158 struct mlx5_ifc_qp_events_bits qp_events;
3159 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3160 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3161 struct mlx5_ifc_cq_error_bits cq_error;
3162 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3163 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3164 struct mlx5_ifc_gpio_event_bits gpio_event;
3165 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3166 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3167 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169};
3170
3171struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173
3174 u8 assert_existptr[0x20];
3175
3176 u8 assert_callra[0x20];
3177
Matan Barakb4ff3a32016-02-09 14:57:42 +02003178 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003179
3180 u8 fw_version[0x20];
3181
3182 u8 hw_id[0x20];
3183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185
3186 u8 irisc_index[0x8];
3187 u8 synd[0x8];
3188 u8 ext_synd[0x10];
3189};
3190
3191struct mlx5_ifc_register_loopback_control_bits {
3192 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198};
3199
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003200struct mlx5_ifc_vport_tc_element_bits {
3201 u8 traffic_class[0x4];
3202 u8 reserved_at_4[0xc];
3203 u8 vport_number[0x10];
3204};
3205
3206struct mlx5_ifc_vport_element_bits {
3207 u8 reserved_at_0[0x10];
3208 u8 vport_number[0x10];
3209};
3210
3211enum {
3212 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3213 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3214 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3215};
3216
3217struct mlx5_ifc_tsar_element_bits {
3218 u8 reserved_at_0[0x8];
3219 u8 tsar_type[0x8];
3220 u8 reserved_at_10[0x10];
3221};
3222
Majd Dibbiny8812c242017-02-09 14:20:12 +02003223enum {
3224 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3225 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3226};
3227
Saeed Mahameede2816822015-05-28 22:28:40 +03003228struct mlx5_ifc_teardown_hca_out_bits {
3229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231
3232 u8 syndrome[0x20];
3233
Majd Dibbiny8812c242017-02-09 14:20:12 +02003234 u8 reserved_at_40[0x3f];
3235
3236 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237};
3238
3239enum {
3240 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003241 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003242};
3243
3244struct mlx5_ifc_teardown_hca_in_bits {
3245 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247
Matan Barakb4ff3a32016-02-09 14:57:42 +02003248 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003249 u8 op_mod[0x10];
3250
Matan Barakb4ff3a32016-02-09 14:57:42 +02003251 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252 u8 profile[0x10];
3253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255};
3256
3257struct mlx5_ifc_sqerr2rts_qp_out_bits {
3258 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260
3261 u8 syndrome[0x20];
3262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264};
3265
3266struct mlx5_ifc_sqerr2rts_qp_in_bits {
3267 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271 u8 op_mod[0x10];
3272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274 u8 qpn[0x18];
3275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277
3278 u8 opt_param_mask[0x20];
3279
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281
3282 struct mlx5_ifc_qpc_bits qpc;
3283
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285};
3286
3287struct mlx5_ifc_sqd2rts_qp_out_bits {
3288 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003289 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003290
3291 u8 syndrome[0x20];
3292
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294};
3295
3296struct mlx5_ifc_sqd2rts_qp_in_bits {
3297 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299
Matan Barakb4ff3a32016-02-09 14:57:42 +02003300 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003301 u8 op_mod[0x10];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304 u8 qpn[0x18];
3305
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003307
3308 u8 opt_param_mask[0x20];
3309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311
3312 struct mlx5_ifc_qpc_bits qpc;
3313
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315};
3316
3317struct mlx5_ifc_set_roce_address_out_bits {
3318 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003320
3321 u8 syndrome[0x20];
3322
Matan Barakb4ff3a32016-02-09 14:57:42 +02003323 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003324};
3325
3326struct mlx5_ifc_set_roce_address_in_bits {
3327 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331 u8 op_mod[0x10];
3332
3333 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003334 u8 reserved_at_50[0xc];
3335 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338
3339 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3340};
3341
3342struct mlx5_ifc_set_mad_demux_out_bits {
3343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345
3346 u8 syndrome[0x20];
3347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349};
3350
3351enum {
3352 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3353 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3354};
3355
3356struct mlx5_ifc_set_mad_demux_in_bits {
3357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361 u8 op_mod[0x10];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368};
3369
3370struct mlx5_ifc_set_l2_table_entry_out_bits {
3371 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 syndrome[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377};
3378
3379struct mlx5_ifc_set_l2_table_entry_in_bits {
3380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384 u8 op_mod[0x10];
3385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389 u8 table_index[0x18];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394 u8 vlan_valid[0x1];
3395 u8 vlan[0xc];
3396
3397 struct mlx5_ifc_mac_address_layout_bits mac_address;
3398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400};
3401
3402struct mlx5_ifc_set_issi_out_bits {
3403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405
3406 u8 syndrome[0x20];
3407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409};
3410
3411struct mlx5_ifc_set_issi_in_bits {
3412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416 u8 op_mod[0x10];
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419 u8 current_issi[0x10];
3420
Matan Barakb4ff3a32016-02-09 14:57:42 +02003421 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003422};
3423
3424struct mlx5_ifc_set_hca_cap_out_bits {
3425 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003426 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003427
3428 u8 syndrome[0x20];
3429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003431};
3432
3433struct mlx5_ifc_set_hca_cap_in_bits {
3434 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003436
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003438 u8 op_mod[0x10];
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003441
Saeed Mahameede2816822015-05-28 22:28:40 +03003442 union mlx5_ifc_hca_cap_union_bits capability;
3443};
3444
Maor Gottlieb26a81452015-12-10 17:12:39 +02003445enum {
3446 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3447 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3448 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3449 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3450};
3451
Saeed Mahameede2816822015-05-28 22:28:40 +03003452struct mlx5_ifc_set_fte_out_bits {
3453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455
3456 u8 syndrome[0x20];
3457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459};
3460
3461struct mlx5_ifc_set_fte_in_bits {
3462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003466 u8 op_mod[0x10];
3467
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003468 u8 other_vport[0x1];
3469 u8 reserved_at_41[0xf];
3470 u8 vport_number[0x10];
3471
3472 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003473
3474 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003475 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003476
Matan Barakb4ff3a32016-02-09 14:57:42 +02003477 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003478 u8 table_id[0x18];
3479
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003481 u8 modify_enable_mask[0x8];
3482
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484
3485 u8 flow_index[0x20];
3486
Matan Barakb4ff3a32016-02-09 14:57:42 +02003487 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003488
3489 struct mlx5_ifc_flow_context_bits flow_context;
3490};
3491
3492struct mlx5_ifc_rts2rts_qp_out_bits {
3493 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003494 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003495
3496 u8 syndrome[0x20];
3497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499};
3500
3501struct mlx5_ifc_rts2rts_qp_in_bits {
3502 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003503 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506 u8 op_mod[0x10];
3507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509 u8 qpn[0x18];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512
3513 u8 opt_param_mask[0x20];
3514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516
3517 struct mlx5_ifc_qpc_bits qpc;
3518
Matan Barakb4ff3a32016-02-09 14:57:42 +02003519 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003520};
3521
3522struct mlx5_ifc_rtr2rts_qp_out_bits {
3523 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003524 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003525
3526 u8 syndrome[0x20];
3527
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003529};
3530
3531struct mlx5_ifc_rtr2rts_qp_in_bits {
3532 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536 u8 op_mod[0x10];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539 u8 qpn[0x18];
3540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542
3543 u8 opt_param_mask[0x20];
3544
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546
3547 struct mlx5_ifc_qpc_bits qpc;
3548
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550};
3551
3552struct mlx5_ifc_rst2init_qp_out_bits {
3553 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003554 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003555
3556 u8 syndrome[0x20];
3557
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559};
3560
3561struct mlx5_ifc_rst2init_qp_in_bits {
3562 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566 u8 op_mod[0x10];
3567
Matan Barakb4ff3a32016-02-09 14:57:42 +02003568 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003569 u8 qpn[0x18];
3570
Matan Barakb4ff3a32016-02-09 14:57:42 +02003571 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003572
3573 u8 opt_param_mask[0x20];
3574
Matan Barakb4ff3a32016-02-09 14:57:42 +02003575 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003576
3577 struct mlx5_ifc_qpc_bits qpc;
3578
Matan Barakb4ff3a32016-02-09 14:57:42 +02003579 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003580};
3581
Saeed Mahameed74862162016-06-09 15:11:34 +03003582struct mlx5_ifc_query_xrq_out_bits {
3583 u8 status[0x8];
3584 u8 reserved_at_8[0x18];
3585
3586 u8 syndrome[0x20];
3587
3588 u8 reserved_at_40[0x40];
3589
3590 struct mlx5_ifc_xrqc_bits xrq_context;
3591};
3592
3593struct mlx5_ifc_query_xrq_in_bits {
3594 u8 opcode[0x10];
3595 u8 reserved_at_10[0x10];
3596
3597 u8 reserved_at_20[0x10];
3598 u8 op_mod[0x10];
3599
3600 u8 reserved_at_40[0x8];
3601 u8 xrqn[0x18];
3602
3603 u8 reserved_at_60[0x20];
3604};
3605
Saeed Mahameede2816822015-05-28 22:28:40 +03003606struct mlx5_ifc_query_xrc_srq_out_bits {
3607 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609
3610 u8 syndrome[0x20];
3611
Matan Barakb4ff3a32016-02-09 14:57:42 +02003612 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003613
3614 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3615
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
3618 u8 pas[0][0x40];
3619};
3620
3621struct mlx5_ifc_query_xrc_srq_in_bits {
3622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626 u8 op_mod[0x10];
3627
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629 u8 xrc_srqn[0x18];
3630
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632};
3633
3634enum {
3635 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3636 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3637};
3638
3639struct mlx5_ifc_query_vport_state_out_bits {
3640 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003641 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003642
3643 u8 syndrome[0x20];
3644
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648 u8 admin_state[0x4];
3649 u8 state[0x4];
3650};
3651
3652enum {
3653 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003654 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003655};
3656
3657struct mlx5_ifc_query_vport_state_in_bits {
3658 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662 u8 op_mod[0x10];
3663
3664 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003665 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003666 u8 vport_number[0x10];
3667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669};
3670
3671struct mlx5_ifc_query_vport_counter_out_bits {
3672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674
3675 u8 syndrome[0x20];
3676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678
3679 struct mlx5_ifc_traffic_counter_bits received_errors;
3680
3681 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3682
3683 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3684
3685 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3686
3687 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3688
3689 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3690
3691 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3692
3693 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3694
3695 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3696
3697 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3698
3699 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3700
3701 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3702
Matan Barakb4ff3a32016-02-09 14:57:42 +02003703 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003704};
3705
3706enum {
3707 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3708};
3709
3710struct mlx5_ifc_query_vport_counter_in_bits {
3711 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003712 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713
Matan Barakb4ff3a32016-02-09 14:57:42 +02003714 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003715 u8 op_mod[0x10];
3716
3717 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003718 u8 reserved_at_41[0xb];
3719 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003720 u8 vport_number[0x10];
3721
Matan Barakb4ff3a32016-02-09 14:57:42 +02003722 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723
3724 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726
Matan Barakb4ff3a32016-02-09 14:57:42 +02003727 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003728};
3729
3730struct mlx5_ifc_query_tis_out_bits {
3731 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003732 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003733
3734 u8 syndrome[0x20];
3735
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737
3738 struct mlx5_ifc_tisc_bits tis_context;
3739};
3740
3741struct mlx5_ifc_query_tis_in_bits {
3742 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003743 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003744
Matan Barakb4ff3a32016-02-09 14:57:42 +02003745 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003746 u8 op_mod[0x10];
3747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749 u8 tisn[0x18];
3750
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752};
3753
3754struct mlx5_ifc_query_tir_out_bits {
3755 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003756 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757
3758 u8 syndrome[0x20];
3759
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761
3762 struct mlx5_ifc_tirc_bits tir_context;
3763};
3764
3765struct mlx5_ifc_query_tir_in_bits {
3766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770 u8 op_mod[0x10];
3771
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773 u8 tirn[0x18];
3774
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776};
3777
3778struct mlx5_ifc_query_srq_out_bits {
3779 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781
3782 u8 syndrome[0x20];
3783
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785
3786 struct mlx5_ifc_srqc_bits srq_context_entry;
3787
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
3790 u8 pas[0][0x40];
3791};
3792
3793struct mlx5_ifc_query_srq_in_bits {
3794 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003795 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798 u8 op_mod[0x10];
3799
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801 u8 srqn[0x18];
3802
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804};
3805
3806struct mlx5_ifc_query_sq_out_bits {
3807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809
3810 u8 syndrome[0x20];
3811
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
3814 struct mlx5_ifc_sqc_bits sq_context;
3815};
3816
3817struct mlx5_ifc_query_sq_in_bits {
3818 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822 u8 op_mod[0x10];
3823
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825 u8 sqn[0x18];
3826
Matan Barakb4ff3a32016-02-09 14:57:42 +02003827 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003828};
3829
3830struct mlx5_ifc_query_special_contexts_out_bits {
3831 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
3834 u8 syndrome[0x20];
3835
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003836 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837
3838 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003839
3840 u8 null_mkey[0x20];
3841
3842 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843};
3844
3845struct mlx5_ifc_query_special_contexts_in_bits {
3846 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848
Matan Barakb4ff3a32016-02-09 14:57:42 +02003849 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003850 u8 op_mod[0x10];
3851
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853};
3854
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003855struct mlx5_ifc_query_scheduling_element_out_bits {
3856 u8 opcode[0x10];
3857 u8 reserved_at_10[0x10];
3858
3859 u8 reserved_at_20[0x10];
3860 u8 op_mod[0x10];
3861
3862 u8 reserved_at_40[0xc0];
3863
3864 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3865
3866 u8 reserved_at_300[0x100];
3867};
3868
3869enum {
3870 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3871};
3872
3873struct mlx5_ifc_query_scheduling_element_in_bits {
3874 u8 opcode[0x10];
3875 u8 reserved_at_10[0x10];
3876
3877 u8 reserved_at_20[0x10];
3878 u8 op_mod[0x10];
3879
3880 u8 scheduling_hierarchy[0x8];
3881 u8 reserved_at_48[0x18];
3882
3883 u8 scheduling_element_id[0x20];
3884
3885 u8 reserved_at_80[0x180];
3886};
3887
Saeed Mahameede2816822015-05-28 22:28:40 +03003888struct mlx5_ifc_query_rqt_out_bits {
3889 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003890 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003891
3892 u8 syndrome[0x20];
3893
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895
3896 struct mlx5_ifc_rqtc_bits rqt_context;
3897};
3898
3899struct mlx5_ifc_query_rqt_in_bits {
3900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904 u8 op_mod[0x10];
3905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907 u8 rqtn[0x18];
3908
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910};
3911
3912struct mlx5_ifc_query_rq_out_bits {
3913 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003914 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915
3916 u8 syndrome[0x20];
3917
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
3920 struct mlx5_ifc_rqc_bits rq_context;
3921};
3922
3923struct mlx5_ifc_query_rq_in_bits {
3924 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926
Matan Barakb4ff3a32016-02-09 14:57:42 +02003927 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928 u8 op_mod[0x10];
3929
Matan Barakb4ff3a32016-02-09 14:57:42 +02003930 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003931 u8 rqn[0x18];
3932
Matan Barakb4ff3a32016-02-09 14:57:42 +02003933 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934};
3935
3936struct mlx5_ifc_query_roce_address_out_bits {
3937 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939
3940 u8 syndrome[0x20];
3941
Matan Barakb4ff3a32016-02-09 14:57:42 +02003942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003943
3944 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3945};
3946
3947struct mlx5_ifc_query_roce_address_in_bits {
3948 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003949 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952 u8 op_mod[0x10];
3953
3954 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003955 u8 reserved_at_50[0xc];
3956 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959};
3960
3961struct mlx5_ifc_query_rmp_out_bits {
3962 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964
3965 u8 syndrome[0x20];
3966
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
3969 struct mlx5_ifc_rmpc_bits rmp_context;
3970};
3971
3972struct mlx5_ifc_query_rmp_in_bits {
3973 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975
Matan Barakb4ff3a32016-02-09 14:57:42 +02003976 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003977 u8 op_mod[0x10];
3978
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980 u8 rmpn[0x18];
3981
Matan Barakb4ff3a32016-02-09 14:57:42 +02003982 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003983};
3984
3985struct mlx5_ifc_query_qp_out_bits {
3986 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988
3989 u8 syndrome[0x20];
3990
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992
3993 u8 opt_param_mask[0x20];
3994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
3997 struct mlx5_ifc_qpc_bits qpc;
3998
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000
4001 u8 pas[0][0x40];
4002};
4003
4004struct mlx5_ifc_query_qp_in_bits {
4005 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007
Matan Barakb4ff3a32016-02-09 14:57:42 +02004008 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004009 u8 op_mod[0x10];
4010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012 u8 qpn[0x18];
4013
Matan Barakb4ff3a32016-02-09 14:57:42 +02004014 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004015};
4016
4017struct mlx5_ifc_query_q_counter_out_bits {
4018 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 u8 syndrome[0x20];
4022
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024
4025 u8 rx_write_requests[0x20];
4026
Matan Barakb4ff3a32016-02-09 14:57:42 +02004027 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004028
4029 u8 rx_read_requests[0x20];
4030
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
4033 u8 rx_atomic_requests[0x20];
4034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036
4037 u8 rx_dct_connect[0x20];
4038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040
4041 u8 out_of_buffer[0x20];
4042
Matan Barakb4ff3a32016-02-09 14:57:42 +02004043 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004044
4045 u8 out_of_sequence[0x20];
4046
Saeed Mahameed74862162016-06-09 15:11:34 +03004047 u8 reserved_at_1e0[0x20];
4048
4049 u8 duplicate_request[0x20];
4050
4051 u8 reserved_at_220[0x20];
4052
4053 u8 rnr_nak_retry_err[0x20];
4054
4055 u8 reserved_at_260[0x20];
4056
4057 u8 packet_seq_err[0x20];
4058
4059 u8 reserved_at_2a0[0x20];
4060
4061 u8 implied_nak_seq_err[0x20];
4062
4063 u8 reserved_at_2e0[0x20];
4064
4065 u8 local_ack_timeout_err[0x20];
4066
Parav Pandit58dcb602017-06-19 07:19:37 +03004067 u8 reserved_at_320[0xa0];
4068
4069 u8 resp_local_length_error[0x20];
4070
4071 u8 req_local_length_error[0x20];
4072
4073 u8 resp_local_qp_error[0x20];
4074
4075 u8 local_operation_error[0x20];
4076
4077 u8 resp_local_protection[0x20];
4078
4079 u8 req_local_protection[0x20];
4080
4081 u8 resp_cqe_error[0x20];
4082
4083 u8 req_cqe_error[0x20];
4084
4085 u8 req_mw_binding[0x20];
4086
4087 u8 req_bad_response[0x20];
4088
4089 u8 req_remote_invalid_request[0x20];
4090
4091 u8 resp_remote_invalid_request[0x20];
4092
4093 u8 req_remote_access_errors[0x20];
4094
4095 u8 resp_remote_access_errors[0x20];
4096
4097 u8 req_remote_operation_errors[0x20];
4098
4099 u8 req_transport_retries_exceeded[0x20];
4100
4101 u8 cq_overflow[0x20];
4102
4103 u8 resp_cqe_flush_error[0x20];
4104
4105 u8 req_cqe_flush_error[0x20];
4106
4107 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108};
4109
4110struct mlx5_ifc_query_q_counter_in_bits {
4111 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115 u8 op_mod[0x10];
4116
Matan Barakb4ff3a32016-02-09 14:57:42 +02004117 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004118
4119 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123 u8 counter_set_id[0x8];
4124};
4125
4126struct mlx5_ifc_query_pages_out_bits {
4127 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129
4130 u8 syndrome[0x20];
4131
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133 u8 function_id[0x10];
4134
4135 u8 num_pages[0x20];
4136};
4137
4138enum {
4139 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4140 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4141 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4142};
4143
4144struct mlx5_ifc_query_pages_in_bits {
4145 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004146 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004147
Matan Barakb4ff3a32016-02-09 14:57:42 +02004148 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004149 u8 op_mod[0x10];
4150
Matan Barakb4ff3a32016-02-09 14:57:42 +02004151 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004152 u8 function_id[0x10];
4153
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155};
4156
4157struct mlx5_ifc_query_nic_vport_context_out_bits {
4158 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160
4161 u8 syndrome[0x20];
4162
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164
4165 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4166};
4167
4168struct mlx5_ifc_query_nic_vport_context_in_bits {
4169 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173 u8 op_mod[0x10];
4174
4175 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177 u8 vport_number[0x10];
4178
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182};
4183
4184struct mlx5_ifc_query_mkey_out_bits {
4185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187
4188 u8 syndrome[0x20];
4189
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
4196 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4197
4198 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4199};
4200
4201struct mlx5_ifc_query_mkey_in_bits {
4202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206 u8 op_mod[0x10];
4207
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004209 u8 mkey_index[0x18];
4210
4211 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213};
4214
4215struct mlx5_ifc_query_mad_demux_out_bits {
4216 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004217 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004218
4219 u8 syndrome[0x20];
4220
Matan Barakb4ff3a32016-02-09 14:57:42 +02004221 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004222
4223 u8 mad_dumux_parameters_block[0x20];
4224};
4225
4226struct mlx5_ifc_query_mad_demux_in_bits {
4227 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231 u8 op_mod[0x10];
4232
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234};
4235
4236struct mlx5_ifc_query_l2_table_entry_out_bits {
4237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
4240 u8 syndrome[0x20];
4241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243
Matan Barakb4ff3a32016-02-09 14:57:42 +02004244 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004245 u8 vlan_valid[0x1];
4246 u8 vlan[0xc];
4247
4248 struct mlx5_ifc_mac_address_layout_bits mac_address;
4249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251};
4252
4253struct mlx5_ifc_query_l2_table_entry_in_bits {
4254 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004258 u8 op_mod[0x10];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004263 u8 table_index[0x18];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266};
4267
4268struct mlx5_ifc_query_issi_out_bits {
4269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271
4272 u8 syndrome[0x20];
4273
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275 u8 current_issi[0x10];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280 u8 supported_issi_dw0[0x20];
4281};
4282
4283struct mlx5_ifc_query_issi_in_bits {
4284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288 u8 op_mod[0x10];
4289
Matan Barakb4ff3a32016-02-09 14:57:42 +02004290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004291};
4292
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004293struct mlx5_ifc_set_driver_version_out_bits {
4294 u8 status[0x8];
4295 u8 reserved_0[0x18];
4296
4297 u8 syndrome[0x20];
4298 u8 reserved_1[0x40];
4299};
4300
4301struct mlx5_ifc_set_driver_version_in_bits {
4302 u8 opcode[0x10];
4303 u8 reserved_0[0x10];
4304
4305 u8 reserved_1[0x10];
4306 u8 op_mod[0x10];
4307
4308 u8 reserved_2[0x40];
4309 u8 driver_version[64][0x8];
4310};
4311
Saeed Mahameede2816822015-05-28 22:28:40 +03004312struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4313 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315
4316 u8 syndrome[0x20];
4317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319
4320 struct mlx5_ifc_pkey_bits pkey[0];
4321};
4322
4323struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328 u8 op_mod[0x10];
4329
4330 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004332 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004333 u8 vport_number[0x10];
4334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336 u8 pkey_index[0x10];
4337};
4338
Eli Coheneff901d2016-03-11 22:58:42 +02004339enum {
4340 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4341 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4342 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4343};
4344
Saeed Mahameede2816822015-05-28 22:28:40 +03004345struct mlx5_ifc_query_hca_vport_gid_out_bits {
4346 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348
4349 u8 syndrome[0x20];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
4353 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355
4356 struct mlx5_ifc_array128_auto_bits gid[0];
4357};
4358
4359struct mlx5_ifc_query_hca_vport_gid_in_bits {
4360 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004361 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004362
Matan Barakb4ff3a32016-02-09 14:57:42 +02004363 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004364 u8 op_mod[0x10];
4365
4366 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004368 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369 u8 vport_number[0x10];
4370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372 u8 gid_index[0x10];
4373};
4374
4375struct mlx5_ifc_query_hca_vport_context_out_bits {
4376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378
4379 u8 syndrome[0x20];
4380
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382
4383 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4384};
4385
4386struct mlx5_ifc_query_hca_vport_context_in_bits {
4387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389
Matan Barakb4ff3a32016-02-09 14:57:42 +02004390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004391 u8 op_mod[0x10];
4392
4393 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004394 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004395 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396 u8 vport_number[0x10];
4397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399};
4400
4401struct mlx5_ifc_query_hca_cap_out_bits {
4402 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404
4405 u8 syndrome[0x20];
4406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408
4409 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004410};
4411
4412struct mlx5_ifc_query_hca_cap_in_bits {
4413 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004415
Matan Barakb4ff3a32016-02-09 14:57:42 +02004416 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004417 u8 op_mod[0x10];
4418
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004420};
4421
Saeed Mahameede2816822015-05-28 22:28:40 +03004422struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004423 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004425
4426 u8 syndrome[0x20];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004429
Matan Barakb4ff3a32016-02-09 14:57:42 +02004430 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004431 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004432 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004433 u8 log_size[0x8];
4434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004436};
4437
Saeed Mahameede2816822015-05-28 22:28:40 +03004438struct mlx5_ifc_query_flow_table_in_bits {
4439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443 u8 op_mod[0x10];
4444
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446
4447 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004448 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004449
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004451 u8 table_id[0x18];
4452
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004454};
4455
4456struct mlx5_ifc_query_fte_out_bits {
4457 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004458 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004459
4460 u8 syndrome[0x20];
4461
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463
4464 struct mlx5_ifc_flow_context_bits flow_context;
4465};
4466
4467struct mlx5_ifc_query_fte_in_bits {
4468 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004469 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004470
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004472 u8 op_mod[0x10];
4473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475
4476 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004477 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004480 u8 table_id[0x18];
4481
Matan Barakb4ff3a32016-02-09 14:57:42 +02004482 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004483
4484 u8 flow_index[0x20];
4485
Matan Barakb4ff3a32016-02-09 14:57:42 +02004486 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004487};
4488
4489enum {
4490 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4491 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4492 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4493};
4494
4495struct mlx5_ifc_query_flow_group_out_bits {
4496 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498
4499 u8 syndrome[0x20];
4500
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004502
4503 u8 start_flow_index[0x20];
4504
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004506
4507 u8 end_flow_index[0x20];
4508
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510
Matan Barakb4ff3a32016-02-09 14:57:42 +02004511 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004512 u8 match_criteria_enable[0x8];
4513
4514 struct mlx5_ifc_fte_match_param_bits match_criteria;
4515
Matan Barakb4ff3a32016-02-09 14:57:42 +02004516 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004517};
4518
4519struct mlx5_ifc_query_flow_group_in_bits {
4520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004522
Matan Barakb4ff3a32016-02-09 14:57:42 +02004523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004524 u8 op_mod[0x10];
4525
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004527
4528 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004530
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004532 u8 table_id[0x18];
4533
4534 u8 group_id[0x20];
4535
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004537};
4538
Amir Vadai9dc0b282016-05-13 12:55:39 +00004539struct mlx5_ifc_query_flow_counter_out_bits {
4540 u8 status[0x8];
4541 u8 reserved_at_8[0x18];
4542
4543 u8 syndrome[0x20];
4544
4545 u8 reserved_at_40[0x40];
4546
4547 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4548};
4549
4550struct mlx5_ifc_query_flow_counter_in_bits {
4551 u8 opcode[0x10];
4552 u8 reserved_at_10[0x10];
4553
4554 u8 reserved_at_20[0x10];
4555 u8 op_mod[0x10];
4556
4557 u8 reserved_at_40[0x80];
4558
4559 u8 clear[0x1];
4560 u8 reserved_at_c1[0xf];
4561 u8 num_of_counters[0x10];
4562
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004563 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004564};
4565
Saeed Mahameedd6666752015-12-01 18:03:22 +02004566struct mlx5_ifc_query_esw_vport_context_out_bits {
4567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004568 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004569
4570 u8 syndrome[0x20];
4571
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004573
4574 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4575};
4576
4577struct mlx5_ifc_query_esw_vport_context_in_bits {
4578 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004579 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004580
Matan Barakb4ff3a32016-02-09 14:57:42 +02004581 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004582 u8 op_mod[0x10];
4583
4584 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004585 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004586 u8 vport_number[0x10];
4587
Matan Barakb4ff3a32016-02-09 14:57:42 +02004588 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004589};
4590
4591struct mlx5_ifc_modify_esw_vport_context_out_bits {
4592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004593 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004594
4595 u8 syndrome[0x20];
4596
Matan Barakb4ff3a32016-02-09 14:57:42 +02004597 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004598};
4599
4600struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004601 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004602 u8 vport_cvlan_insert[0x1];
4603 u8 vport_svlan_insert[0x1];
4604 u8 vport_cvlan_strip[0x1];
4605 u8 vport_svlan_strip[0x1];
4606};
4607
4608struct mlx5_ifc_modify_esw_vport_context_in_bits {
4609 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004610 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004611
Matan Barakb4ff3a32016-02-09 14:57:42 +02004612 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004613 u8 op_mod[0x10];
4614
4615 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004616 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004617 u8 vport_number[0x10];
4618
4619 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4620
4621 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4622};
4623
Saeed Mahameede2816822015-05-28 22:28:40 +03004624struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004626 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004627
4628 u8 syndrome[0x20];
4629
Matan Barakb4ff3a32016-02-09 14:57:42 +02004630 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004631
4632 struct mlx5_ifc_eqc_bits eq_context_entry;
4633
Matan Barakb4ff3a32016-02-09 14:57:42 +02004634 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004635
4636 u8 event_bitmask[0x40];
4637
Matan Barakb4ff3a32016-02-09 14:57:42 +02004638 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004639
4640 u8 pas[0][0x40];
4641};
4642
4643struct mlx5_ifc_query_eq_in_bits {
4644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004646
Matan Barakb4ff3a32016-02-09 14:57:42 +02004647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004648 u8 op_mod[0x10];
4649
Matan Barakb4ff3a32016-02-09 14:57:42 +02004650 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004651 u8 eq_number[0x8];
4652
Matan Barakb4ff3a32016-02-09 14:57:42 +02004653 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004654};
4655
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004656struct mlx5_ifc_encap_header_in_bits {
4657 u8 reserved_at_0[0x5];
4658 u8 header_type[0x3];
4659 u8 reserved_at_8[0xe];
4660 u8 encap_header_size[0xa];
4661
4662 u8 reserved_at_20[0x10];
4663 u8 encap_header[2][0x8];
4664
4665 u8 more_encap_header[0][0x8];
4666};
4667
4668struct mlx5_ifc_query_encap_header_out_bits {
4669 u8 status[0x8];
4670 u8 reserved_at_8[0x18];
4671
4672 u8 syndrome[0x20];
4673
4674 u8 reserved_at_40[0xa0];
4675
4676 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4677};
4678
4679struct mlx5_ifc_query_encap_header_in_bits {
4680 u8 opcode[0x10];
4681 u8 reserved_at_10[0x10];
4682
4683 u8 reserved_at_20[0x10];
4684 u8 op_mod[0x10];
4685
4686 u8 encap_id[0x20];
4687
4688 u8 reserved_at_60[0xa0];
4689};
4690
4691struct mlx5_ifc_alloc_encap_header_out_bits {
4692 u8 status[0x8];
4693 u8 reserved_at_8[0x18];
4694
4695 u8 syndrome[0x20];
4696
4697 u8 encap_id[0x20];
4698
4699 u8 reserved_at_60[0x20];
4700};
4701
4702struct mlx5_ifc_alloc_encap_header_in_bits {
4703 u8 opcode[0x10];
4704 u8 reserved_at_10[0x10];
4705
4706 u8 reserved_at_20[0x10];
4707 u8 op_mod[0x10];
4708
4709 u8 reserved_at_40[0xa0];
4710
4711 struct mlx5_ifc_encap_header_in_bits encap_header;
4712};
4713
4714struct mlx5_ifc_dealloc_encap_header_out_bits {
4715 u8 status[0x8];
4716 u8 reserved_at_8[0x18];
4717
4718 u8 syndrome[0x20];
4719
4720 u8 reserved_at_40[0x40];
4721};
4722
4723struct mlx5_ifc_dealloc_encap_header_in_bits {
4724 u8 opcode[0x10];
4725 u8 reserved_at_10[0x10];
4726
4727 u8 reserved_20[0x10];
4728 u8 op_mod[0x10];
4729
4730 u8 encap_id[0x20];
4731
4732 u8 reserved_60[0x20];
4733};
4734
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004735struct mlx5_ifc_set_action_in_bits {
4736 u8 action_type[0x4];
4737 u8 field[0xc];
4738 u8 reserved_at_10[0x3];
4739 u8 offset[0x5];
4740 u8 reserved_at_18[0x3];
4741 u8 length[0x5];
4742
4743 u8 data[0x20];
4744};
4745
4746struct mlx5_ifc_add_action_in_bits {
4747 u8 action_type[0x4];
4748 u8 field[0xc];
4749 u8 reserved_at_10[0x10];
4750
4751 u8 data[0x20];
4752};
4753
4754union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4755 struct mlx5_ifc_set_action_in_bits set_action_in;
4756 struct mlx5_ifc_add_action_in_bits add_action_in;
4757 u8 reserved_at_0[0x40];
4758};
4759
4760enum {
4761 MLX5_ACTION_TYPE_SET = 0x1,
4762 MLX5_ACTION_TYPE_ADD = 0x2,
4763};
4764
4765enum {
4766 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4767 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4768 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4769 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4770 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4771 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4772 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4773 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4774 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4775 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4776 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4777 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4778 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4779 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4780 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4781 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4782 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4783 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4784 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4785 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4786 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4787 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004788 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004789};
4790
4791struct mlx5_ifc_alloc_modify_header_context_out_bits {
4792 u8 status[0x8];
4793 u8 reserved_at_8[0x18];
4794
4795 u8 syndrome[0x20];
4796
4797 u8 modify_header_id[0x20];
4798
4799 u8 reserved_at_60[0x20];
4800};
4801
4802struct mlx5_ifc_alloc_modify_header_context_in_bits {
4803 u8 opcode[0x10];
4804 u8 reserved_at_10[0x10];
4805
4806 u8 reserved_at_20[0x10];
4807 u8 op_mod[0x10];
4808
4809 u8 reserved_at_40[0x20];
4810
4811 u8 table_type[0x8];
4812 u8 reserved_at_68[0x10];
4813 u8 num_of_actions[0x8];
4814
4815 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4816};
4817
4818struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4819 u8 status[0x8];
4820 u8 reserved_at_8[0x18];
4821
4822 u8 syndrome[0x20];
4823
4824 u8 reserved_at_40[0x40];
4825};
4826
4827struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4828 u8 opcode[0x10];
4829 u8 reserved_at_10[0x10];
4830
4831 u8 reserved_at_20[0x10];
4832 u8 op_mod[0x10];
4833
4834 u8 modify_header_id[0x20];
4835
4836 u8 reserved_at_60[0x20];
4837};
4838
Saeed Mahameede2816822015-05-28 22:28:40 +03004839struct mlx5_ifc_query_dct_out_bits {
4840 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004841 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004842
4843 u8 syndrome[0x20];
4844
Matan Barakb4ff3a32016-02-09 14:57:42 +02004845 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004846
4847 struct mlx5_ifc_dctc_bits dct_context_entry;
4848
Matan Barakb4ff3a32016-02-09 14:57:42 +02004849 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004850};
4851
4852struct mlx5_ifc_query_dct_in_bits {
4853 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855
Matan Barakb4ff3a32016-02-09 14:57:42 +02004856 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004857 u8 op_mod[0x10];
4858
Matan Barakb4ff3a32016-02-09 14:57:42 +02004859 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860 u8 dctn[0x18];
4861
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863};
4864
4865struct mlx5_ifc_query_cq_out_bits {
4866 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004867 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004868
4869 u8 syndrome[0x20];
4870
Matan Barakb4ff3a32016-02-09 14:57:42 +02004871 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004872
4873 struct mlx5_ifc_cqc_bits cq_context;
4874
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
4877 u8 pas[0][0x40];
4878};
4879
4880struct mlx5_ifc_query_cq_in_bits {
4881 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004882 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004883
Matan Barakb4ff3a32016-02-09 14:57:42 +02004884 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885 u8 op_mod[0x10];
4886
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888 u8 cqn[0x18];
4889
Matan Barakb4ff3a32016-02-09 14:57:42 +02004890 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891};
4892
4893struct mlx5_ifc_query_cong_status_out_bits {
4894 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896
4897 u8 syndrome[0x20];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900
4901 u8 enable[0x1];
4902 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904};
4905
4906struct mlx5_ifc_query_cong_status_in_bits {
4907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911 u8 op_mod[0x10];
4912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914 u8 priority[0x4];
4915 u8 cong_protocol[0x4];
4916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918};
4919
4920struct mlx5_ifc_query_cong_statistics_out_bits {
4921 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
4924 u8 syndrome[0x20];
4925
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
Parav Pandite1f24a72017-04-16 07:29:29 +03004928 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
4930 u8 sum_flows[0x20];
4931
Parav Pandite1f24a72017-04-16 07:29:29 +03004932 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
Parav Pandite1f24a72017-04-16 07:29:29 +03004934 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935
Parav Pandite1f24a72017-04-16 07:29:29 +03004936 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937
Parav Pandite1f24a72017-04-16 07:29:29 +03004938 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941
4942 u8 time_stamp_high[0x20];
4943
4944 u8 time_stamp_low[0x20];
4945
4946 u8 accumulators_period[0x20];
4947
Parav Pandite1f24a72017-04-16 07:29:29 +03004948 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004949
Parav Pandite1f24a72017-04-16 07:29:29 +03004950 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951
Parav Pandite1f24a72017-04-16 07:29:29 +03004952 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
Parav Pandite1f24a72017-04-16 07:29:29 +03004954 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957};
4958
4959struct mlx5_ifc_query_cong_statistics_in_bits {
4960 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962
Matan Barakb4ff3a32016-02-09 14:57:42 +02004963 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004964 u8 op_mod[0x10];
4965
4966 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970};
4971
4972struct mlx5_ifc_query_cong_params_out_bits {
4973 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975
4976 u8 syndrome[0x20];
4977
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
4980 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4981};
4982
4983struct mlx5_ifc_query_cong_params_in_bits {
4984 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988 u8 op_mod[0x10];
4989
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991 u8 cong_protocol[0x4];
4992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994};
4995
4996struct mlx5_ifc_query_adapter_out_bits {
4997 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999
5000 u8 syndrome[0x20];
5001
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003
5004 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5005};
5006
5007struct mlx5_ifc_query_adapter_in_bits {
5008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012 u8 op_mod[0x10];
5013
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005015};
5016
5017struct mlx5_ifc_qp_2rst_out_bits {
5018 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020
5021 u8 syndrome[0x20];
5022
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024};
5025
5026struct mlx5_ifc_qp_2rst_in_bits {
5027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031 u8 op_mod[0x10];
5032
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034 u8 qpn[0x18];
5035
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037};
5038
5039struct mlx5_ifc_qp_2err_out_bits {
5040 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
5043 u8 syndrome[0x20];
5044
Matan Barakb4ff3a32016-02-09 14:57:42 +02005045 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046};
5047
5048struct mlx5_ifc_qp_2err_in_bits {
5049 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053 u8 op_mod[0x10];
5054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056 u8 qpn[0x18];
5057
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059};
5060
5061struct mlx5_ifc_page_fault_resume_out_bits {
5062 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064
5065 u8 syndrome[0x20];
5066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068};
5069
5070struct mlx5_ifc_page_fault_resume_in_bits {
5071 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075 u8 op_mod[0x10];
5076
5077 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005079 u8 page_fault_type[0x3];
5080 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005082 u8 reserved_at_60[0x8];
5083 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005084};
5085
5086struct mlx5_ifc_nop_out_bits {
5087 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089
5090 u8 syndrome[0x20];
5091
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005093};
5094
5095struct mlx5_ifc_nop_in_bits {
5096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005098
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100 u8 op_mod[0x10];
5101
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103};
5104
5105struct mlx5_ifc_modify_vport_state_out_bits {
5106 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108
5109 u8 syndrome[0x20];
5110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112};
5113
5114struct mlx5_ifc_modify_vport_state_in_bits {
5115 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119 u8 op_mod[0x10];
5120
5121 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123 u8 vport_number[0x10];
5124
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128};
5129
5130struct mlx5_ifc_modify_tis_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
majd@mellanox.com75850d02016-01-14 19:13:06 +02005139struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005140 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005141
Aviv Heller84df61e2016-05-10 13:47:50 +03005142 u8 reserved_at_20[0x1d];
5143 u8 lag_tx_port_affinity[0x1];
5144 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005145 u8 prio[0x1];
5146};
5147
Saeed Mahameede2816822015-05-28 22:28:40 +03005148struct mlx5_ifc_modify_tis_in_bits {
5149 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
Matan Barakb4ff3a32016-02-09 14:57:42 +02005152 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005153 u8 op_mod[0x10];
5154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156 u8 tisn[0x18];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159
majd@mellanox.com75850d02016-01-14 19:13:06 +02005160 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005161
Matan Barakb4ff3a32016-02-09 14:57:42 +02005162 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005163
5164 struct mlx5_ifc_tisc_bits ctx;
5165};
5166
Achiad Shochatd9eea402015-08-04 14:05:42 +03005167struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005169
Matan Barakb4ff3a32016-02-09 14:57:42 +02005170 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005171 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005172 u8 reserved_at_3c[0x1];
5173 u8 hash[0x1];
5174 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005175 u8 lro[0x1];
5176};
5177
Saeed Mahameede2816822015-05-28 22:28:40 +03005178struct mlx5_ifc_modify_tir_out_bits {
5179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181
5182 u8 syndrome[0x20];
5183
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185};
5186
5187struct mlx5_ifc_modify_tir_in_bits {
5188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005192 u8 op_mod[0x10];
5193
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195 u8 tirn[0x18];
5196
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198
Achiad Shochatd9eea402015-08-04 14:05:42 +03005199 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005202
5203 struct mlx5_ifc_tirc_bits ctx;
5204};
5205
5206struct mlx5_ifc_modify_sq_out_bits {
5207 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005209
5210 u8 syndrome[0x20];
5211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213};
5214
5215struct mlx5_ifc_modify_sq_in_bits {
5216 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218
Matan Barakb4ff3a32016-02-09 14:57:42 +02005219 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220 u8 op_mod[0x10];
5221
5222 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224 u8 sqn[0x18];
5225
Matan Barakb4ff3a32016-02-09 14:57:42 +02005226 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005227
5228 u8 modify_bitmask[0x40];
5229
Matan Barakb4ff3a32016-02-09 14:57:42 +02005230 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005231
5232 struct mlx5_ifc_sqc_bits ctx;
5233};
5234
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005235struct mlx5_ifc_modify_scheduling_element_out_bits {
5236 u8 status[0x8];
5237 u8 reserved_at_8[0x18];
5238
5239 u8 syndrome[0x20];
5240
5241 u8 reserved_at_40[0x1c0];
5242};
5243
5244enum {
5245 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5246 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5247};
5248
5249struct mlx5_ifc_modify_scheduling_element_in_bits {
5250 u8 opcode[0x10];
5251 u8 reserved_at_10[0x10];
5252
5253 u8 reserved_at_20[0x10];
5254 u8 op_mod[0x10];
5255
5256 u8 scheduling_hierarchy[0x8];
5257 u8 reserved_at_48[0x18];
5258
5259 u8 scheduling_element_id[0x20];
5260
5261 u8 reserved_at_80[0x20];
5262
5263 u8 modify_bitmask[0x20];
5264
5265 u8 reserved_at_c0[0x40];
5266
5267 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5268
5269 u8 reserved_at_300[0x100];
5270};
5271
Saeed Mahameede2816822015-05-28 22:28:40 +03005272struct mlx5_ifc_modify_rqt_out_bits {
5273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
5276 u8 syndrome[0x20];
5277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005279};
5280
Achiad Shochat5c503682015-08-04 14:05:43 +03005281struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005283
Matan Barakb4ff3a32016-02-09 14:57:42 +02005284 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005285 u8 rqn_list[0x1];
5286};
5287
Saeed Mahameede2816822015-05-28 22:28:40 +03005288struct mlx5_ifc_modify_rqt_in_bits {
5289 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291
Matan Barakb4ff3a32016-02-09 14:57:42 +02005292 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005293 u8 op_mod[0x10];
5294
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296 u8 rqtn[0x18];
5297
Matan Barakb4ff3a32016-02-09 14:57:42 +02005298 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005299
Achiad Shochat5c503682015-08-04 14:05:43 +03005300 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005301
Matan Barakb4ff3a32016-02-09 14:57:42 +02005302 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005303
5304 struct mlx5_ifc_rqtc_bits ctx;
5305};
5306
5307struct mlx5_ifc_modify_rq_out_bits {
5308 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310
5311 u8 syndrome[0x20];
5312
Matan Barakb4ff3a32016-02-09 14:57:42 +02005313 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005314};
5315
Alex Vesker83b502a2016-08-04 17:32:02 +03005316enum {
5317 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005318 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005319 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005320};
5321
Saeed Mahameede2816822015-05-28 22:28:40 +03005322struct mlx5_ifc_modify_rq_in_bits {
5323 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327 u8 op_mod[0x10];
5328
5329 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331 u8 rqn[0x18];
5332
Matan Barakb4ff3a32016-02-09 14:57:42 +02005333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334
5335 u8 modify_bitmask[0x40];
5336
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005338
5339 struct mlx5_ifc_rqc_bits ctx;
5340};
5341
5342struct mlx5_ifc_modify_rmp_out_bits {
5343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005345
5346 u8 syndrome[0x20];
5347
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349};
5350
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005351struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005353
Matan Barakb4ff3a32016-02-09 14:57:42 +02005354 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005355 u8 lwm[0x1];
5356};
5357
Saeed Mahameede2816822015-05-28 22:28:40 +03005358struct mlx5_ifc_modify_rmp_in_bits {
5359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363 u8 op_mod[0x10];
5364
5365 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367 u8 rmpn[0x18];
5368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005371 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005372
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374
5375 struct mlx5_ifc_rmpc_bits ctx;
5376};
5377
5378struct mlx5_ifc_modify_nic_vport_context_out_bits {
5379 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381
5382 u8 syndrome[0x20];
5383
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385};
5386
5387struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005388 u8 reserved_at_0[0x12];
5389 u8 affiliation[0x1];
5390 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005391 u8 disable_uc_local_lb[0x1];
5392 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005393 u8 node_guid[0x1];
5394 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005395 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005396 u8 mtu[0x1];
5397 u8 change_event[0x1];
5398 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399 u8 permanent_address[0x1];
5400 u8 addresses_list[0x1];
5401 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403};
5404
5405struct mlx5_ifc_modify_nic_vport_context_in_bits {
5406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410 u8 op_mod[0x10];
5411
5412 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005414 u8 vport_number[0x10];
5415
5416 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5417
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419
5420 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5421};
5422
5423struct mlx5_ifc_modify_hca_vport_context_out_bits {
5424 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426
5427 u8 syndrome[0x20];
5428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430};
5431
5432struct mlx5_ifc_modify_hca_vport_context_in_bits {
5433 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437 u8 op_mod[0x10];
5438
5439 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005441 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442 u8 vport_number[0x10];
5443
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
5446 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5447};
5448
5449struct mlx5_ifc_modify_cq_out_bits {
5450 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
5453 u8 syndrome[0x20];
5454
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456};
5457
5458enum {
5459 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5460 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5461};
5462
5463struct mlx5_ifc_modify_cq_in_bits {
5464 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466
Matan Barakb4ff3a32016-02-09 14:57:42 +02005467 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005468 u8 op_mod[0x10];
5469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471 u8 cqn[0x18];
5472
5473 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5474
5475 struct mlx5_ifc_cqc_bits cq_context;
5476
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478
5479 u8 pas[0][0x40];
5480};
5481
5482struct mlx5_ifc_modify_cong_status_out_bits {
5483 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485
5486 u8 syndrome[0x20];
5487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489};
5490
5491struct mlx5_ifc_modify_cong_status_in_bits {
5492 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496 u8 op_mod[0x10];
5497
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499 u8 priority[0x4];
5500 u8 cong_protocol[0x4];
5501
5502 u8 enable[0x1];
5503 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505};
5506
5507struct mlx5_ifc_modify_cong_params_out_bits {
5508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
5511 u8 syndrome[0x20];
5512
Matan Barakb4ff3a32016-02-09 14:57:42 +02005513 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005514};
5515
5516struct mlx5_ifc_modify_cong_params_in_bits {
5517 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519
Matan Barakb4ff3a32016-02-09 14:57:42 +02005520 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005521 u8 op_mod[0x10];
5522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524 u8 cong_protocol[0x4];
5525
5526 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5527
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
5530 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5531};
5532
5533struct mlx5_ifc_manage_pages_out_bits {
5534 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536
5537 u8 syndrome[0x20];
5538
5539 u8 output_num_entries[0x20];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542
5543 u8 pas[0][0x40];
5544};
5545
5546enum {
5547 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5548 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5549 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5550};
5551
5552struct mlx5_ifc_manage_pages_in_bits {
5553 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557 u8 op_mod[0x10];
5558
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560 u8 function_id[0x10];
5561
5562 u8 input_num_entries[0x20];
5563
5564 u8 pas[0][0x40];
5565};
5566
5567struct mlx5_ifc_mad_ifc_out_bits {
5568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570
5571 u8 syndrome[0x20];
5572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574
5575 u8 response_mad_packet[256][0x8];
5576};
5577
5578struct mlx5_ifc_mad_ifc_in_bits {
5579 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583 u8 op_mod[0x10];
5584
5585 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005586 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005587 u8 port[0x8];
5588
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590
5591 u8 mad[256][0x8];
5592};
5593
5594struct mlx5_ifc_init_hca_out_bits {
5595 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005596 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005597
5598 u8 syndrome[0x20];
5599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601};
5602
5603struct mlx5_ifc_init_hca_in_bits {
5604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608 u8 op_mod[0x10];
5609
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005611 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612};
5613
5614struct mlx5_ifc_init2rtr_qp_out_bits {
5615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617
5618 u8 syndrome[0x20];
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621};
5622
5623struct mlx5_ifc_init2rtr_qp_in_bits {
5624 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626
Matan Barakb4ff3a32016-02-09 14:57:42 +02005627 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005628 u8 op_mod[0x10];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631 u8 qpn[0x18];
5632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634
5635 u8 opt_param_mask[0x20];
5636
Matan Barakb4ff3a32016-02-09 14:57:42 +02005637 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005638
5639 struct mlx5_ifc_qpc_bits qpc;
5640
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642};
5643
5644struct mlx5_ifc_init2init_qp_out_bits {
5645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005647
5648 u8 syndrome[0x20];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651};
5652
5653struct mlx5_ifc_init2init_qp_in_bits {
5654 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658 u8 op_mod[0x10];
5659
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661 u8 qpn[0x18];
5662
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664
5665 u8 opt_param_mask[0x20];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
5669 struct mlx5_ifc_qpc_bits qpc;
5670
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672};
5673
5674struct mlx5_ifc_get_dropped_packet_log_out_bits {
5675 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677
5678 u8 syndrome[0x20];
5679
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 packet_headers_log[128][0x8];
5683
5684 u8 packet_syndrome[64][0x8];
5685};
5686
5687struct mlx5_ifc_get_dropped_packet_log_in_bits {
5688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692 u8 op_mod[0x10];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695};
5696
5697struct mlx5_ifc_gen_eqe_in_bits {
5698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005702 u8 op_mod[0x10];
5703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 eq_number[0x8];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708
5709 u8 eqe[64][0x8];
5710};
5711
5712struct mlx5_ifc_gen_eq_out_bits {
5713 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715
5716 u8 syndrome[0x20];
5717
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719};
5720
5721struct mlx5_ifc_enable_hca_out_bits {
5722 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
5725 u8 syndrome[0x20];
5726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728};
5729
5730struct mlx5_ifc_enable_hca_in_bits {
5731 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735 u8 op_mod[0x10];
5736
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738 u8 function_id[0x10];
5739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741};
5742
5743struct mlx5_ifc_drain_dct_out_bits {
5744 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005745 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005746
5747 u8 syndrome[0x20];
5748
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750};
5751
5752struct mlx5_ifc_drain_dct_in_bits {
5753 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757 u8 op_mod[0x10];
5758
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760 u8 dctn[0x18];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763};
5764
5765struct mlx5_ifc_disable_hca_out_bits {
5766 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768
5769 u8 syndrome[0x20];
5770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772};
5773
5774struct mlx5_ifc_disable_hca_in_bits {
5775 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779 u8 op_mod[0x10];
5780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 function_id[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785};
5786
5787struct mlx5_ifc_detach_from_mcg_out_bits {
5788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
5791 u8 syndrome[0x20];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794};
5795
5796struct mlx5_ifc_detach_from_mcg_in_bits {
5797 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801 u8 op_mod[0x10];
5802
Matan Barakb4ff3a32016-02-09 14:57:42 +02005803 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005804 u8 qpn[0x18];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807
5808 u8 multicast_gid[16][0x8];
5809};
5810
Saeed Mahameed74862162016-06-09 15:11:34 +03005811struct mlx5_ifc_destroy_xrq_out_bits {
5812 u8 status[0x8];
5813 u8 reserved_at_8[0x18];
5814
5815 u8 syndrome[0x20];
5816
5817 u8 reserved_at_40[0x40];
5818};
5819
5820struct mlx5_ifc_destroy_xrq_in_bits {
5821 u8 opcode[0x10];
5822 u8 reserved_at_10[0x10];
5823
5824 u8 reserved_at_20[0x10];
5825 u8 op_mod[0x10];
5826
5827 u8 reserved_at_40[0x8];
5828 u8 xrqn[0x18];
5829
5830 u8 reserved_at_60[0x20];
5831};
5832
Saeed Mahameede2816822015-05-28 22:28:40 +03005833struct mlx5_ifc_destroy_xrc_srq_out_bits {
5834 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005835 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005836
5837 u8 syndrome[0x20];
5838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840};
5841
5842struct mlx5_ifc_destroy_xrc_srq_in_bits {
5843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847 u8 op_mod[0x10];
5848
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850 u8 xrc_srqn[0x18];
5851
Matan Barakb4ff3a32016-02-09 14:57:42 +02005852 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005853};
5854
5855struct mlx5_ifc_destroy_tis_out_bits {
5856 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005857 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005858
5859 u8 syndrome[0x20];
5860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862};
5863
5864struct mlx5_ifc_destroy_tis_in_bits {
5865 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869 u8 op_mod[0x10];
5870
Matan Barakb4ff3a32016-02-09 14:57:42 +02005871 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005872 u8 tisn[0x18];
5873
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875};
5876
5877struct mlx5_ifc_destroy_tir_out_bits {
5878 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005879 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005880
5881 u8 syndrome[0x20];
5882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884};
5885
5886struct mlx5_ifc_destroy_tir_in_bits {
5887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891 u8 op_mod[0x10];
5892
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894 u8 tirn[0x18];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897};
5898
5899struct mlx5_ifc_destroy_srq_out_bits {
5900 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902
5903 u8 syndrome[0x20];
5904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906};
5907
5908struct mlx5_ifc_destroy_srq_in_bits {
5909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913 u8 op_mod[0x10];
5914
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916 u8 srqn[0x18];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919};
5920
5921struct mlx5_ifc_destroy_sq_out_bits {
5922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
5925 u8 syndrome[0x20];
5926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928};
5929
5930struct mlx5_ifc_destroy_sq_in_bits {
5931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935 u8 op_mod[0x10];
5936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938 u8 sqn[0x18];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941};
5942
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005943struct mlx5_ifc_destroy_scheduling_element_out_bits {
5944 u8 status[0x8];
5945 u8 reserved_at_8[0x18];
5946
5947 u8 syndrome[0x20];
5948
5949 u8 reserved_at_40[0x1c0];
5950};
5951
5952struct mlx5_ifc_destroy_scheduling_element_in_bits {
5953 u8 opcode[0x10];
5954 u8 reserved_at_10[0x10];
5955
5956 u8 reserved_at_20[0x10];
5957 u8 op_mod[0x10];
5958
5959 u8 scheduling_hierarchy[0x8];
5960 u8 reserved_at_48[0x18];
5961
5962 u8 scheduling_element_id[0x20];
5963
5964 u8 reserved_at_80[0x180];
5965};
5966
Saeed Mahameede2816822015-05-28 22:28:40 +03005967struct mlx5_ifc_destroy_rqt_out_bits {
5968 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005969 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005970
5971 u8 syndrome[0x20];
5972
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974};
5975
5976struct mlx5_ifc_destroy_rqt_in_bits {
5977 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981 u8 op_mod[0x10];
5982
Matan Barakb4ff3a32016-02-09 14:57:42 +02005983 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005984 u8 rqtn[0x18];
5985
Matan Barakb4ff3a32016-02-09 14:57:42 +02005986 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005987};
5988
5989struct mlx5_ifc_destroy_rq_out_bits {
5990 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992
5993 u8 syndrome[0x20];
5994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996};
5997
5998struct mlx5_ifc_destroy_rq_in_bits {
5999 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003 u8 op_mod[0x10];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006 u8 rqn[0x18];
6007
Matan Barakb4ff3a32016-02-09 14:57:42 +02006008 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006009};
6010
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006011struct mlx5_ifc_set_delay_drop_params_in_bits {
6012 u8 opcode[0x10];
6013 u8 reserved_at_10[0x10];
6014
6015 u8 reserved_at_20[0x10];
6016 u8 op_mod[0x10];
6017
6018 u8 reserved_at_40[0x20];
6019
6020 u8 reserved_at_60[0x10];
6021 u8 delay_drop_timeout[0x10];
6022};
6023
6024struct mlx5_ifc_set_delay_drop_params_out_bits {
6025 u8 status[0x8];
6026 u8 reserved_at_8[0x18];
6027
6028 u8 syndrome[0x20];
6029
6030 u8 reserved_at_40[0x40];
6031};
6032
Saeed Mahameede2816822015-05-28 22:28:40 +03006033struct mlx5_ifc_destroy_rmp_out_bits {
6034 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036
6037 u8 syndrome[0x20];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040};
6041
6042struct mlx5_ifc_destroy_rmp_in_bits {
6043 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047 u8 op_mod[0x10];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050 u8 rmpn[0x18];
6051
Matan Barakb4ff3a32016-02-09 14:57:42 +02006052 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006053};
6054
6055struct mlx5_ifc_destroy_qp_out_bits {
6056 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058
6059 u8 syndrome[0x20];
6060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062};
6063
6064struct mlx5_ifc_destroy_qp_in_bits {
6065 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069 u8 op_mod[0x10];
6070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072 u8 qpn[0x18];
6073
Matan Barakb4ff3a32016-02-09 14:57:42 +02006074 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006075};
6076
6077struct mlx5_ifc_destroy_psv_out_bits {
6078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080
6081 u8 syndrome[0x20];
6082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084};
6085
6086struct mlx5_ifc_destroy_psv_in_bits {
6087 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089
Matan Barakb4ff3a32016-02-09 14:57:42 +02006090 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006091 u8 op_mod[0x10];
6092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094 u8 psvn[0x18];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097};
6098
6099struct mlx5_ifc_destroy_mkey_out_bits {
6100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102
6103 u8 syndrome[0x20];
6104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106};
6107
6108struct mlx5_ifc_destroy_mkey_in_bits {
6109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113 u8 op_mod[0x10];
6114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 mkey_index[0x18];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119};
6120
6121struct mlx5_ifc_destroy_flow_table_out_bits {
6122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124
6125 u8 syndrome[0x20];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_destroy_flow_table_in_bits {
6131 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135 u8 op_mod[0x10];
6136
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006137 u8 other_vport[0x1];
6138 u8 reserved_at_41[0xf];
6139 u8 vport_number[0x10];
6140
6141 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142
6143 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 table_id[0x18];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_destroy_flow_group_out_bits {
6153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
6156 u8 syndrome[0x20];
6157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159};
6160
6161struct mlx5_ifc_destroy_flow_group_in_bits {
6162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 op_mod[0x10];
6167
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006168 u8 other_vport[0x1];
6169 u8 reserved_at_41[0xf];
6170 u8 vport_number[0x10];
6171
6172 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006173
6174 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176
Matan Barakb4ff3a32016-02-09 14:57:42 +02006177 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006178 u8 table_id[0x18];
6179
6180 u8 group_id[0x20];
6181
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183};
6184
6185struct mlx5_ifc_destroy_eq_out_bits {
6186 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188
6189 u8 syndrome[0x20];
6190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192};
6193
6194struct mlx5_ifc_destroy_eq_in_bits {
6195 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199 u8 op_mod[0x10];
6200
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202 u8 eq_number[0x8];
6203
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205};
6206
6207struct mlx5_ifc_destroy_dct_out_bits {
6208 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210
6211 u8 syndrome[0x20];
6212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214};
6215
6216struct mlx5_ifc_destroy_dct_in_bits {
6217 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221 u8 op_mod[0x10];
6222
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224 u8 dctn[0x18];
6225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227};
6228
6229struct mlx5_ifc_destroy_cq_out_bits {
6230 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232
6233 u8 syndrome[0x20];
6234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236};
6237
6238struct mlx5_ifc_destroy_cq_in_bits {
6239 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243 u8 op_mod[0x10];
6244
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246 u8 cqn[0x18];
6247
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249};
6250
6251struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6252 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254
6255 u8 syndrome[0x20];
6256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258};
6259
6260struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265 u8 op_mod[0x10];
6266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270 u8 vxlan_udp_port[0x10];
6271};
6272
6273struct mlx5_ifc_delete_l2_table_entry_out_bits {
6274 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276
6277 u8 syndrome[0x20];
6278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280};
6281
6282struct mlx5_ifc_delete_l2_table_entry_in_bits {
6283 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287 u8 op_mod[0x10];
6288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290
Matan Barakb4ff3a32016-02-09 14:57:42 +02006291 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006292 u8 table_index[0x18];
6293
Matan Barakb4ff3a32016-02-09 14:57:42 +02006294 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006295};
6296
6297struct mlx5_ifc_delete_fte_out_bits {
6298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006300
6301 u8 syndrome[0x20];
6302
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304};
6305
6306struct mlx5_ifc_delete_fte_in_bits {
6307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311 u8 op_mod[0x10];
6312
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006313 u8 other_vport[0x1];
6314 u8 reserved_at_41[0xf];
6315 u8 vport_number[0x10];
6316
6317 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318
6319 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323 u8 table_id[0x18];
6324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326
6327 u8 flow_index[0x20];
6328
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330};
6331
6332struct mlx5_ifc_dealloc_xrcd_out_bits {
6333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006335
6336 u8 syndrome[0x20];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339};
6340
6341struct mlx5_ifc_dealloc_xrcd_in_bits {
6342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346 u8 op_mod[0x10];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349 u8 xrcd[0x18];
6350
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352};
6353
6354struct mlx5_ifc_dealloc_uar_out_bits {
6355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357
6358 u8 syndrome[0x20];
6359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361};
6362
6363struct mlx5_ifc_dealloc_uar_in_bits {
6364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368 u8 op_mod[0x10];
6369
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371 u8 uar[0x18];
6372
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374};
6375
6376struct mlx5_ifc_dealloc_transport_domain_out_bits {
6377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379
6380 u8 syndrome[0x20];
6381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383};
6384
6385struct mlx5_ifc_dealloc_transport_domain_in_bits {
6386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390 u8 op_mod[0x10];
6391
Matan Barakb4ff3a32016-02-09 14:57:42 +02006392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393 u8 transport_domain[0x18];
6394
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396};
6397
6398struct mlx5_ifc_dealloc_q_counter_out_bits {
6399 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 u8 syndrome[0x20];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405};
6406
6407struct mlx5_ifc_dealloc_q_counter_in_bits {
6408 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412 u8 op_mod[0x10];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415 u8 counter_set_id[0x8];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418};
6419
6420struct mlx5_ifc_dealloc_pd_out_bits {
6421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
6424 u8 syndrome[0x20];
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427};
6428
6429struct mlx5_ifc_dealloc_pd_in_bits {
6430 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434 u8 op_mod[0x10];
6435
Matan Barakb4ff3a32016-02-09 14:57:42 +02006436 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006437 u8 pd[0x18];
6438
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440};
6441
Amir Vadai9dc0b282016-05-13 12:55:39 +00006442struct mlx5_ifc_dealloc_flow_counter_out_bits {
6443 u8 status[0x8];
6444 u8 reserved_at_8[0x18];
6445
6446 u8 syndrome[0x20];
6447
6448 u8 reserved_at_40[0x40];
6449};
6450
6451struct mlx5_ifc_dealloc_flow_counter_in_bits {
6452 u8 opcode[0x10];
6453 u8 reserved_at_10[0x10];
6454
6455 u8 reserved_at_20[0x10];
6456 u8 op_mod[0x10];
6457
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006458 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006459
6460 u8 reserved_at_60[0x20];
6461};
6462
Saeed Mahameed74862162016-06-09 15:11:34 +03006463struct mlx5_ifc_create_xrq_out_bits {
6464 u8 status[0x8];
6465 u8 reserved_at_8[0x18];
6466
6467 u8 syndrome[0x20];
6468
6469 u8 reserved_at_40[0x8];
6470 u8 xrqn[0x18];
6471
6472 u8 reserved_at_60[0x20];
6473};
6474
6475struct mlx5_ifc_create_xrq_in_bits {
6476 u8 opcode[0x10];
6477 u8 reserved_at_10[0x10];
6478
6479 u8 reserved_at_20[0x10];
6480 u8 op_mod[0x10];
6481
6482 u8 reserved_at_40[0x40];
6483
6484 struct mlx5_ifc_xrqc_bits xrq_context;
6485};
6486
Saeed Mahameede2816822015-05-28 22:28:40 +03006487struct mlx5_ifc_create_xrc_srq_out_bits {
6488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490
6491 u8 syndrome[0x20];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494 u8 xrc_srqn[0x18];
6495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497};
6498
6499struct mlx5_ifc_create_xrc_srq_in_bits {
6500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504 u8 op_mod[0x10];
6505
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
6508 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6509
Matan Barakb4ff3a32016-02-09 14:57:42 +02006510 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511
6512 u8 pas[0][0x40];
6513};
6514
6515struct mlx5_ifc_create_tis_out_bits {
6516 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518
6519 u8 syndrome[0x20];
6520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522 u8 tisn[0x18];
6523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525};
6526
6527struct mlx5_ifc_create_tis_in_bits {
6528 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006529 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006530
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532 u8 op_mod[0x10];
6533
Matan Barakb4ff3a32016-02-09 14:57:42 +02006534 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006535
6536 struct mlx5_ifc_tisc_bits ctx;
6537};
6538
6539struct mlx5_ifc_create_tir_out_bits {
6540 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006541 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006542
6543 u8 syndrome[0x20];
6544
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546 u8 tirn[0x18];
6547
Matan Barakb4ff3a32016-02-09 14:57:42 +02006548 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006549};
6550
6551struct mlx5_ifc_create_tir_in_bits {
6552 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006553 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006554
Matan Barakb4ff3a32016-02-09 14:57:42 +02006555 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006556 u8 op_mod[0x10];
6557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
6560 struct mlx5_ifc_tirc_bits ctx;
6561};
6562
6563struct mlx5_ifc_create_srq_out_bits {
6564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566
6567 u8 syndrome[0x20];
6568
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570 u8 srqn[0x18];
6571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573};
6574
6575struct mlx5_ifc_create_srq_in_bits {
6576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578
Matan Barakb4ff3a32016-02-09 14:57:42 +02006579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006580 u8 op_mod[0x10];
6581
Matan Barakb4ff3a32016-02-09 14:57:42 +02006582 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006583
6584 struct mlx5_ifc_srqc_bits srq_context_entry;
6585
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
6588 u8 pas[0][0x40];
6589};
6590
6591struct mlx5_ifc_create_sq_out_bits {
6592 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006593 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006594
6595 u8 syndrome[0x20];
6596
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598 u8 sqn[0x18];
6599
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601};
6602
6603struct mlx5_ifc_create_sq_in_bits {
6604 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608 u8 op_mod[0x10];
6609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611
6612 struct mlx5_ifc_sqc_bits ctx;
6613};
6614
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006615struct mlx5_ifc_create_scheduling_element_out_bits {
6616 u8 status[0x8];
6617 u8 reserved_at_8[0x18];
6618
6619 u8 syndrome[0x20];
6620
6621 u8 reserved_at_40[0x40];
6622
6623 u8 scheduling_element_id[0x20];
6624
6625 u8 reserved_at_a0[0x160];
6626};
6627
6628struct mlx5_ifc_create_scheduling_element_in_bits {
6629 u8 opcode[0x10];
6630 u8 reserved_at_10[0x10];
6631
6632 u8 reserved_at_20[0x10];
6633 u8 op_mod[0x10];
6634
6635 u8 scheduling_hierarchy[0x8];
6636 u8 reserved_at_48[0x18];
6637
6638 u8 reserved_at_60[0xa0];
6639
6640 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6641
6642 u8 reserved_at_300[0x100];
6643};
6644
Saeed Mahameede2816822015-05-28 22:28:40 +03006645struct mlx5_ifc_create_rqt_out_bits {
6646 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648
6649 u8 syndrome[0x20];
6650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652 u8 rqtn[0x18];
6653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655};
6656
6657struct mlx5_ifc_create_rqt_in_bits {
6658 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006659 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662 u8 op_mod[0x10];
6663
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665
6666 struct mlx5_ifc_rqtc_bits rqt_context;
6667};
6668
6669struct mlx5_ifc_create_rq_out_bits {
6670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672
6673 u8 syndrome[0x20];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676 u8 rqn[0x18];
6677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679};
6680
6681struct mlx5_ifc_create_rq_in_bits {
6682 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686 u8 op_mod[0x10];
6687
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689
6690 struct mlx5_ifc_rqc_bits ctx;
6691};
6692
6693struct mlx5_ifc_create_rmp_out_bits {
6694 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
6697 u8 syndrome[0x20];
6698
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700 u8 rmpn[0x18];
6701
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703};
6704
6705struct mlx5_ifc_create_rmp_in_bits {
6706 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710 u8 op_mod[0x10];
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713
6714 struct mlx5_ifc_rmpc_bits ctx;
6715};
6716
6717struct mlx5_ifc_create_qp_out_bits {
6718 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
6721 u8 syndrome[0x20];
6722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 qpn[0x18];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727};
6728
6729struct mlx5_ifc_create_qp_in_bits {
6730 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734 u8 op_mod[0x10];
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737
6738 u8 opt_param_mask[0x20];
6739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741
6742 struct mlx5_ifc_qpc_bits qpc;
6743
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745
6746 u8 pas[0][0x40];
6747};
6748
6749struct mlx5_ifc_create_psv_out_bits {
6750 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752
6753 u8 syndrome[0x20];
6754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756
Matan Barakb4ff3a32016-02-09 14:57:42 +02006757 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006758 u8 psv0_index[0x18];
6759
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761 u8 psv1_index[0x18];
6762
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764 u8 psv2_index[0x18];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767 u8 psv3_index[0x18];
6768};
6769
6770struct mlx5_ifc_create_psv_in_bits {
6771 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 op_mod[0x10];
6776
6777 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006778 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006779 u8 pd[0x18];
6780
Matan Barakb4ff3a32016-02-09 14:57:42 +02006781 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006782};
6783
6784struct mlx5_ifc_create_mkey_out_bits {
6785 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
6788 u8 syndrome[0x20];
6789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791 u8 mkey_index[0x18];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794};
6795
6796struct mlx5_ifc_create_mkey_in_bits {
6797 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801 u8 op_mod[0x10];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807
6808 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6809
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811
6812 u8 translations_octword_actual_size[0x20];
6813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815
6816 u8 klm_pas_mtt[0][0x20];
6817};
6818
6819struct mlx5_ifc_create_flow_table_out_bits {
6820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 syndrome[0x20];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826 u8 table_id[0x18];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829};
6830
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006831struct mlx5_ifc_flow_table_context_bits {
6832 u8 encap_en[0x1];
6833 u8 decap_en[0x1];
6834 u8 reserved_at_2[0x2];
6835 u8 table_miss_action[0x4];
6836 u8 level[0x8];
6837 u8 reserved_at_10[0x8];
6838 u8 log_size[0x8];
6839
6840 u8 reserved_at_20[0x8];
6841 u8 table_miss_id[0x18];
6842
6843 u8 reserved_at_40[0x8];
6844 u8 lag_master_next_table_id[0x18];
6845
6846 u8 reserved_at_60[0xe0];
6847};
6848
Saeed Mahameede2816822015-05-28 22:28:40 +03006849struct mlx5_ifc_create_flow_table_in_bits {
6850 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 op_mod[0x10];
6855
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006856 u8 other_vport[0x1];
6857 u8 reserved_at_41[0xf];
6858 u8 vport_number[0x10];
6859
6860 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
6862 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006867 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006868};
6869
6870struct mlx5_ifc_create_flow_group_out_bits {
6871 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873
6874 u8 syndrome[0x20];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877 u8 group_id[0x18];
6878
Matan Barakb4ff3a32016-02-09 14:57:42 +02006879 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880};
6881
6882enum {
6883 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6884 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6885 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6886};
6887
6888struct mlx5_ifc_create_flow_group_in_bits {
6889 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891
Matan Barakb4ff3a32016-02-09 14:57:42 +02006892 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893 u8 op_mod[0x10];
6894
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006895 u8 other_vport[0x1];
6896 u8 reserved_at_41[0xf];
6897 u8 vport_number[0x10];
6898
6899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900
6901 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006902 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006903
Matan Barakb4ff3a32016-02-09 14:57:42 +02006904 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905 u8 table_id[0x18];
6906
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908
6909 u8 start_flow_index[0x20];
6910
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912
6913 u8 end_flow_index[0x20];
6914
Matan Barakb4ff3a32016-02-09 14:57:42 +02006915 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006916
Matan Barakb4ff3a32016-02-09 14:57:42 +02006917 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006918 u8 match_criteria_enable[0x8];
6919
6920 struct mlx5_ifc_fte_match_param_bits match_criteria;
6921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923};
6924
6925struct mlx5_ifc_create_eq_out_bits {
6926 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928
6929 u8 syndrome[0x20];
6930
Matan Barakb4ff3a32016-02-09 14:57:42 +02006931 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006932 u8 eq_number[0x8];
6933
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935};
6936
6937struct mlx5_ifc_create_eq_in_bits {
6938 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006939 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942 u8 op_mod[0x10];
6943
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945
6946 struct mlx5_ifc_eqc_bits eq_context_entry;
6947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949
6950 u8 event_bitmask[0x40];
6951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953
6954 u8 pas[0][0x40];
6955};
6956
6957struct mlx5_ifc_create_dct_out_bits {
6958 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960
6961 u8 syndrome[0x20];
6962
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964 u8 dctn[0x18];
6965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967};
6968
6969struct mlx5_ifc_create_dct_in_bits {
6970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974 u8 op_mod[0x10];
6975
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977
6978 struct mlx5_ifc_dctc_bits dct_context_entry;
6979
Matan Barakb4ff3a32016-02-09 14:57:42 +02006980 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006981};
6982
6983struct mlx5_ifc_create_cq_out_bits {
6984 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986
6987 u8 syndrome[0x20];
6988
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990 u8 cqn[0x18];
6991
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993};
6994
6995struct mlx5_ifc_create_cq_in_bits {
6996 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000 u8 op_mod[0x10];
7001
Matan Barakb4ff3a32016-02-09 14:57:42 +02007002 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007003
7004 struct mlx5_ifc_cqc_bits cq_context;
7005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007
7008 u8 pas[0][0x40];
7009};
7010
7011struct mlx5_ifc_config_int_moderation_out_bits {
7012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014
7015 u8 syndrome[0x20];
7016
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018 u8 min_delay[0xc];
7019 u8 int_vector[0x10];
7020
Matan Barakb4ff3a32016-02-09 14:57:42 +02007021 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007022};
7023
7024enum {
7025 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7026 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7027};
7028
7029struct mlx5_ifc_config_int_moderation_in_bits {
7030 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034 u8 op_mod[0x10];
7035
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037 u8 min_delay[0xc];
7038 u8 int_vector[0x10];
7039
Matan Barakb4ff3a32016-02-09 14:57:42 +02007040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007041};
7042
7043struct mlx5_ifc_attach_to_mcg_out_bits {
7044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046
7047 u8 syndrome[0x20];
7048
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050};
7051
7052struct mlx5_ifc_attach_to_mcg_in_bits {
7053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057 u8 op_mod[0x10];
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060 u8 qpn[0x18];
7061
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063
7064 u8 multicast_gid[16][0x8];
7065};
7066
Saeed Mahameed74862162016-06-09 15:11:34 +03007067struct mlx5_ifc_arm_xrq_out_bits {
7068 u8 status[0x8];
7069 u8 reserved_at_8[0x18];
7070
7071 u8 syndrome[0x20];
7072
7073 u8 reserved_at_40[0x40];
7074};
7075
7076struct mlx5_ifc_arm_xrq_in_bits {
7077 u8 opcode[0x10];
7078 u8 reserved_at_10[0x10];
7079
7080 u8 reserved_at_20[0x10];
7081 u8 op_mod[0x10];
7082
7083 u8 reserved_at_40[0x8];
7084 u8 xrqn[0x18];
7085
7086 u8 reserved_at_60[0x10];
7087 u8 lwm[0x10];
7088};
7089
Saeed Mahameede2816822015-05-28 22:28:40 +03007090struct mlx5_ifc_arm_xrc_srq_out_bits {
7091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093
7094 u8 syndrome[0x20];
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097};
7098
7099enum {
7100 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7101};
7102
7103struct mlx5_ifc_arm_xrc_srq_in_bits {
7104 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108 u8 op_mod[0x10];
7109
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111 u8 xrc_srqn[0x18];
7112
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114 u8 lwm[0x10];
7115};
7116
7117struct mlx5_ifc_arm_rq_out_bits {
7118 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120
7121 u8 syndrome[0x20];
7122
Matan Barakb4ff3a32016-02-09 14:57:42 +02007123 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007124};
7125
7126enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007127 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7128 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007129};
7130
7131struct mlx5_ifc_arm_rq_in_bits {
7132 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134
Matan Barakb4ff3a32016-02-09 14:57:42 +02007135 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007136 u8 op_mod[0x10];
7137
Matan Barakb4ff3a32016-02-09 14:57:42 +02007138 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007139 u8 srq_number[0x18];
7140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142 u8 lwm[0x10];
7143};
7144
7145struct mlx5_ifc_arm_dct_out_bits {
7146 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007147 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007148
7149 u8 syndrome[0x20];
7150
Matan Barakb4ff3a32016-02-09 14:57:42 +02007151 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007152};
7153
7154struct mlx5_ifc_arm_dct_in_bits {
7155 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159 u8 op_mod[0x10];
7160
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162 u8 dct_number[0x18];
7163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165};
7166
7167struct mlx5_ifc_alloc_xrcd_out_bits {
7168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170
7171 u8 syndrome[0x20];
7172
Matan Barakb4ff3a32016-02-09 14:57:42 +02007173 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007174 u8 xrcd[0x18];
7175
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177};
7178
7179struct mlx5_ifc_alloc_xrcd_in_bits {
7180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184 u8 op_mod[0x10];
7185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187};
7188
7189struct mlx5_ifc_alloc_uar_out_bits {
7190 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192
7193 u8 syndrome[0x20];
7194
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196 u8 uar[0x18];
7197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199};
7200
7201struct mlx5_ifc_alloc_uar_in_bits {
7202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206 u8 op_mod[0x10];
7207
Matan Barakb4ff3a32016-02-09 14:57:42 +02007208 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007209};
7210
7211struct mlx5_ifc_alloc_transport_domain_out_bits {
7212 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214
7215 u8 syndrome[0x20];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218 u8 transport_domain[0x18];
7219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221};
7222
7223struct mlx5_ifc_alloc_transport_domain_in_bits {
7224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228 u8 op_mod[0x10];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231};
7232
7233struct mlx5_ifc_alloc_q_counter_out_bits {
7234 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
7237 u8 syndrome[0x20];
7238
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240 u8 counter_set_id[0x8];
7241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243};
7244
7245struct mlx5_ifc_alloc_q_counter_in_bits {
7246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250 u8 op_mod[0x10];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253};
7254
7255struct mlx5_ifc_alloc_pd_out_bits {
7256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258
7259 u8 syndrome[0x20];
7260
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 pd[0x18];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265};
7266
7267struct mlx5_ifc_alloc_pd_in_bits {
7268 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007269 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007270
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272 u8 op_mod[0x10];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275};
7276
Amir Vadai9dc0b282016-05-13 12:55:39 +00007277struct mlx5_ifc_alloc_flow_counter_out_bits {
7278 u8 status[0x8];
7279 u8 reserved_at_8[0x18];
7280
7281 u8 syndrome[0x20];
7282
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007283 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007284
7285 u8 reserved_at_60[0x20];
7286};
7287
7288struct mlx5_ifc_alloc_flow_counter_in_bits {
7289 u8 opcode[0x10];
7290 u8 reserved_at_10[0x10];
7291
7292 u8 reserved_at_20[0x10];
7293 u8 op_mod[0x10];
7294
7295 u8 reserved_at_40[0x40];
7296};
7297
Saeed Mahameede2816822015-05-28 22:28:40 +03007298struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007301
7302 u8 syndrome[0x20];
7303
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305};
7306
7307struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310
Matan Barakb4ff3a32016-02-09 14:57:42 +02007311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007312 u8 op_mod[0x10];
7313
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315
Matan Barakb4ff3a32016-02-09 14:57:42 +02007316 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007317 u8 vxlan_udp_port[0x10];
7318};
7319
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007320struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007321 u8 status[0x8];
7322 u8 reserved_at_8[0x18];
7323
7324 u8 syndrome[0x20];
7325
7326 u8 reserved_at_40[0x40];
7327};
7328
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007329struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007330 u8 opcode[0x10];
7331 u8 reserved_at_10[0x10];
7332
7333 u8 reserved_at_20[0x10];
7334 u8 op_mod[0x10];
7335
7336 u8 reserved_at_40[0x10];
7337 u8 rate_limit_index[0x10];
7338
7339 u8 reserved_at_60[0x20];
7340
7341 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007342
Bodong Wang05d3ac92018-03-19 15:10:29 +02007343 u8 burst_upper_bound[0x20];
7344
7345 u8 reserved_at_c0[0x10];
7346 u8 typical_packet_size[0x10];
7347
7348 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007349};
7350
Saeed Mahameede2816822015-05-28 22:28:40 +03007351struct mlx5_ifc_access_register_out_bits {
7352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354
7355 u8 syndrome[0x20];
7356
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358
7359 u8 register_data[0][0x20];
7360};
7361
7362enum {
7363 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7364 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7365};
7366
7367struct mlx5_ifc_access_register_in_bits {
7368 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 op_mod[0x10];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 register_id[0x10];
7376
7377 u8 argument[0x20];
7378
7379 u8 register_data[0][0x20];
7380};
7381
7382struct mlx5_ifc_sltp_reg_bits {
7383 u8 status[0x4];
7384 u8 version[0x4];
7385 u8 local_port[0x8];
7386 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394 u8 polarity[0x1];
7395 u8 ob_tap0[0x8];
7396 u8 ob_tap1[0x8];
7397 u8 ob_tap2[0x8];
7398
Matan Barakb4ff3a32016-02-09 14:57:42 +02007399 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007400 u8 ob_preemp_mode[0x4];
7401 u8 ob_reg[0x8];
7402 u8 ob_bias[0x8];
7403
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405};
7406
7407struct mlx5_ifc_slrg_reg_bits {
7408 u8 status[0x4];
7409 u8 version[0x4];
7410 u8 local_port[0x8];
7411 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415
7416 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007417 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007418 u8 grade_lane_speed[0x4];
7419
7420 u8 grade_version[0x8];
7421 u8 grade[0x18];
7422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424 u8 height_grade_type[0x4];
7425 u8 height_grade[0x18];
7426
7427 u8 height_dz[0x10];
7428 u8 height_dv[0x10];
7429
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431 u8 height_sigma[0x10];
7432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434
Matan Barakb4ff3a32016-02-09 14:57:42 +02007435 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007436 u8 phase_grade_type[0x4];
7437 u8 phase_grade[0x18];
7438
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007441 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007442 u8 phase_eo_neg[0x8];
7443
7444 u8 ffe_set_tested[0x10];
7445 u8 test_errors_per_lane[0x10];
7446};
7447
7448struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007449 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007450 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452
Matan Barakb4ff3a32016-02-09 14:57:42 +02007453 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007454 u8 vl_hw_cap[0x4];
7455
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457 u8 vl_admin[0x4];
7458
Matan Barakb4ff3a32016-02-09 14:57:42 +02007459 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007460 u8 vl_operational[0x4];
7461};
7462
7463struct mlx5_ifc_pude_reg_bits {
7464 u8 swid[0x8];
7465 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 oper_status[0x4];
7470
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472};
7473
7474struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007475 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007476 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007477 u8 an_disable_cap[0x1];
7478 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481 u8 proto_mask[0x3];
7482
Saeed Mahameed74862162016-06-09 15:11:34 +03007483 u8 an_status[0x4];
7484 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485
7486 u8 eth_proto_capability[0x20];
7487
7488 u8 ib_link_width_capability[0x10];
7489 u8 ib_proto_capability[0x10];
7490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492
7493 u8 eth_proto_admin[0x20];
7494
7495 u8 ib_link_width_admin[0x10];
7496 u8 ib_proto_admin[0x10];
7497
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499
7500 u8 eth_proto_oper[0x20];
7501
7502 u8 ib_link_width_oper[0x10];
7503 u8 ib_proto_oper[0x10];
7504
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007505 u8 reserved_at_160[0x1c];
7506 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507
7508 u8 eth_proto_lp_advertise[0x20];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007513struct mlx5_ifc_mlcr_reg_bits {
7514 u8 reserved_at_0[0x8];
7515 u8 local_port[0x8];
7516 u8 reserved_at_10[0x20];
7517
7518 u8 beacon_duration[0x10];
7519 u8 reserved_at_40[0x10];
7520
7521 u8 beacon_remain[0x10];
7522};
7523
Saeed Mahameede2816822015-05-28 22:28:40 +03007524struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526
7527 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 repetitions_mode[0x4];
7530 u8 num_of_repetitions[0x8];
7531
7532 u8 grade_version[0x8];
7533 u8 height_grade_type[0x4];
7534 u8 phase_grade_type[0x4];
7535 u8 height_grade_weight[0x8];
7536 u8 phase_grade_weight[0x8];
7537
7538 u8 gisim_measure_bits[0x10];
7539 u8 adaptive_tap_measure_bits[0x10];
7540
7541 u8 ber_bath_high_error_threshold[0x10];
7542 u8 ber_bath_mid_error_threshold[0x10];
7543
7544 u8 ber_bath_low_error_threshold[0x10];
7545 u8 one_ratio_high_threshold[0x10];
7546
7547 u8 one_ratio_high_mid_threshold[0x10];
7548 u8 one_ratio_low_mid_threshold[0x10];
7549
7550 u8 one_ratio_low_threshold[0x10];
7551 u8 ndeo_error_threshold[0x10];
7552
7553 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 mix90_phase_for_voltage_bath[0x8];
7556
7557 u8 mixer_offset_start[0x10];
7558 u8 mixer_offset_end[0x10];
7559
Matan Barakb4ff3a32016-02-09 14:57:42 +02007560 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007561 u8 ber_test_time[0xb];
7562};
7563
7564struct mlx5_ifc_pspa_reg_bits {
7565 u8 swid[0x8];
7566 u8 local_port[0x8];
7567 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007568 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007569
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571};
7572
7573struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 mode[0x2];
7580
Matan Barakb4ff3a32016-02-09 14:57:42 +02007581 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007582
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584 u8 min_threshold[0x10];
7585
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587 u8 max_threshold[0x10];
7588
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590 u8 mark_probability_denominator[0x10];
7591
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593};
7594
7595struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603 u8 wrps_admin[0x4];
7604
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 wrps_status[0x4];
7607
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611 u8 down_threshold[0x8];
7612
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616 u8 srps_admin[0x4];
7617
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619 u8 srps_status[0x4];
7620
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622};
7623
7624struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 lb_en[0x8];
7633};
7634
7635struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639
Matan Barakb4ff3a32016-02-09 14:57:42 +02007640 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007641
7642 u8 port_profile_mode[0x8];
7643 u8 static_port_profile[0x8];
7644 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646
7647 u8 retransmission_active[0x8];
7648 u8 fec_mode_active[0x18];
7649
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651};
7652
7653struct mlx5_ifc_ppcnt_reg_bits {
7654 u8 swid[0x8];
7655 u8 local_port[0x8];
7656 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 grp[0x6];
7659
7660 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662 u8 prio_tc[0x3];
7663
7664 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7665};
7666
Gal Pressman8ed1a632016-11-17 13:46:01 +02007667struct mlx5_ifc_mpcnt_reg_bits {
7668 u8 reserved_at_0[0x8];
7669 u8 pcie_index[0x8];
7670 u8 reserved_at_10[0xa];
7671 u8 grp[0x6];
7672
7673 u8 clr[0x1];
7674 u8 reserved_at_21[0x1f];
7675
7676 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7677};
7678
Saeed Mahameede2816822015-05-28 22:28:40 +03007679struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 local_port[0x8];
7684 u8 mac_47_32[0x10];
7685
7686 u8 mac_31_0[0x20];
7687
Matan Barakb4ff3a32016-02-09 14:57:42 +02007688 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007689};
7690
7691struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695
7696 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698
7699 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701
7702 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007703 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007704};
7705
7706struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712 u8 attenuation_5g[0x8];
7713
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 attenuation_7g[0x8];
7716
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718 u8 attenuation_12g[0x8];
7719};
7720
7721struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007722 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007723 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725 u8 module_status[0x4];
7726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_pmpc_reg_bits {
7731 u8 module_state_updated[32][0x8];
7732};
7733
7734struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736 u8 mlpn_status[0x4];
7737 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739
7740 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007741 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007742};
7743
7744struct mlx5_ifc_pmlp_reg_bits {
7745 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749 u8 width[0x8];
7750
7751 u8 lane0_module_mapping[0x20];
7752
7753 u8 lane1_module_mapping[0x20];
7754
7755 u8 lane2_module_mapping[0x20];
7756
7757 u8 lane3_module_mapping[0x20];
7758
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760};
7761
7762struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 oper_status[0x4];
7769
7770 u8 ase[0x1];
7771 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007772 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007773 u8 e[0x2];
7774
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776};
7777
7778struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007783 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007784
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786 u8 lane_speed[0x10];
7787
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789 u8 lpbf[0x1];
7790 u8 fec_mode_policy[0x8];
7791
7792 u8 retransmission_capability[0x8];
7793 u8 fec_mode_capability[0x18];
7794
7795 u8 retransmission_support_admin[0x8];
7796 u8 fec_mode_support_admin[0x18];
7797
7798 u8 retransmission_request_admin[0x8];
7799 u8 fec_mode_request_admin[0x18];
7800
Matan Barakb4ff3a32016-02-09 14:57:42 +02007801 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007802};
7803
7804struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808 u8 ib_port[0x8];
7809
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811};
7812
7813struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 lbf_mode[0x3];
7818
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820};
7821
7822struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007825 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007826
7827 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007828 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007829 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007830 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007831};
7832
7833struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839
7840 u8 port_filter[8][0x20];
7841
7842 u8 port_filter_update_en[8][0x20];
7843};
7844
7845struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849
7850 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007851 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007852 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854 u8 prio_mask_rx[0x8];
7855
7856 u8 pptx[0x1];
7857 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861
7862 u8 pprx[0x1];
7863 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869};
7870
7871struct mlx5_ifc_pelc_reg_bits {
7872 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876
7877 u8 op_admin[0x8];
7878 u8 op_capability[0x8];
7879 u8 op_request[0x8];
7880 u8 op_active[0x8];
7881
7882 u8 admin[0x40];
7883
7884 u8 capability[0x40];
7885
7886 u8 request[0x40];
7887
7888 u8 active[0x40];
7889
Matan Barakb4ff3a32016-02-09 14:57:42 +02007890 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007891};
7892
7893struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007900 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007901
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905 u8 error_type[0x8];
7906};
7907
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007908struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007909 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007910
Gal Pressman2dba0792017-06-18 14:56:45 +03007911 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007912 u8 ptys_connector_type[0x1];
7913 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007914 u8 ppcnt_discard_group[0x1];
7915 u8 ppcnt_statistical_group[0x1];
7916};
7917
7918struct mlx5_ifc_pcam_reg_bits {
7919 u8 reserved_at_0[0x8];
7920 u8 feature_group[0x8];
7921 u8 reserved_at_10[0x8];
7922 u8 access_reg_group[0x8];
7923
7924 u8 reserved_at_20[0x20];
7925
7926 union {
7927 u8 reserved_at_0[0x80];
7928 } port_access_reg_cap_mask;
7929
7930 u8 reserved_at_c0[0x80];
7931
7932 union {
7933 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7934 u8 reserved_at_0[0x80];
7935 } feature_cap_mask;
7936
7937 u8 reserved_at_1c0[0xc0];
7938};
7939
7940struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007941 u8 reserved_at_0[0x7b];
7942 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007943 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007944 u8 mtpps_enh_out_per_adj[0x1];
7945 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007946 u8 pcie_performance_group[0x1];
7947};
7948
Or Gerlitz0ab87742017-06-11 15:25:38 +03007949struct mlx5_ifc_mcam_access_reg_bits {
7950 u8 reserved_at_0[0x1c];
7951 u8 mcda[0x1];
7952 u8 mcc[0x1];
7953 u8 mcqi[0x1];
7954 u8 reserved_at_1f[0x1];
7955
7956 u8 regs_95_to_64[0x20];
7957 u8 regs_63_to_32[0x20];
7958 u8 regs_31_to_0[0x20];
7959};
7960
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007961struct mlx5_ifc_mcam_reg_bits {
7962 u8 reserved_at_0[0x8];
7963 u8 feature_group[0x8];
7964 u8 reserved_at_10[0x8];
7965 u8 access_reg_group[0x8];
7966
7967 u8 reserved_at_20[0x20];
7968
7969 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007970 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007971 u8 reserved_at_0[0x80];
7972 } mng_access_reg_cap_mask;
7973
7974 u8 reserved_at_c0[0x80];
7975
7976 union {
7977 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7978 u8 reserved_at_0[0x80];
7979 } mng_feature_cap_mask;
7980
7981 u8 reserved_at_1c0[0x80];
7982};
7983
Huy Nguyenc02762e2017-07-18 16:03:17 -05007984struct mlx5_ifc_qcam_access_reg_cap_mask {
7985 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
7986 u8 qpdpm[0x1];
7987 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
7988 u8 qdpm[0x1];
7989 u8 qpts[0x1];
7990 u8 qcap[0x1];
7991 u8 qcam_access_reg_cap_mask_0[0x1];
7992};
7993
7994struct mlx5_ifc_qcam_qos_feature_cap_mask {
7995 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
7996 u8 qpts_trust_both[0x1];
7997};
7998
7999struct mlx5_ifc_qcam_reg_bits {
8000 u8 reserved_at_0[0x8];
8001 u8 feature_group[0x8];
8002 u8 reserved_at_10[0x8];
8003 u8 access_reg_group[0x8];
8004 u8 reserved_at_20[0x20];
8005
8006 union {
8007 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8008 u8 reserved_at_0[0x80];
8009 } qos_access_reg_cap_mask;
8010
8011 u8 reserved_at_c0[0x80];
8012
8013 union {
8014 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8015 u8 reserved_at_0[0x80];
8016 } qos_feature_cap_mask;
8017
8018 u8 reserved_at_1c0[0x80];
8019};
8020
Saeed Mahameede2816822015-05-28 22:28:40 +03008021struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008025
8026 u8 port_capability_mask[4][0x20];
8027};
8028
8029struct mlx5_ifc_paos_reg_bits {
8030 u8 swid[0x8];
8031 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008032 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008033 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008034 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008035 u8 oper_status[0x4];
8036
8037 u8 ase[0x1];
8038 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008039 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008040 u8 e[0x2];
8041
Matan Barakb4ff3a32016-02-09 14:57:42 +02008042 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008043};
8044
8045struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008046 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008047 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008048 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008049 u8 opamp_group_type[0x4];
8050
8051 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008052 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008053 u8 num_of_indices[0xc];
8054
8055 u8 index_data[18][0x10];
8056};
8057
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008058struct mlx5_ifc_pcmr_reg_bits {
8059 u8 reserved_at_0[0x8];
8060 u8 local_port[0x8];
8061 u8 reserved_at_10[0x2e];
8062 u8 fcs_cap[0x1];
8063 u8 reserved_at_3f[0x1f];
8064 u8 fcs_chk[0x1];
8065 u8 reserved_at_5f[0x1];
8066};
8067
Saeed Mahameede2816822015-05-28 22:28:40 +03008068struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008069 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008070 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008071 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008072 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008073 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008074 u8 module[0x8];
8075};
8076
8077struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008078 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008079 u8 lossy[0x1];
8080 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008081 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008082 u8 size[0xc];
8083
8084 u8 xoff_threshold[0x10];
8085 u8 xon_threshold[0x10];
8086};
8087
8088struct mlx5_ifc_set_node_in_bits {
8089 u8 node_description[64][0x8];
8090};
8091
8092struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008093 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008094 u8 power_settings_level[0x8];
8095
Matan Barakb4ff3a32016-02-09 14:57:42 +02008096 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008097};
8098
8099struct mlx5_ifc_register_host_endianness_bits {
8100 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008101 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008102
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104};
8105
8106struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008107 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008108
8109 u8 mkey[0x20];
8110
8111 u8 addressh_63_32[0x20];
8112
8113 u8 addressl_31_0[0x20];
8114};
8115
8116struct mlx5_ifc_ud_adrs_vector_bits {
8117 u8 dc_key[0x40];
8118
8119 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008120 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008121 u8 destination_qp_dct[0x18];
8122
8123 u8 static_rate[0x4];
8124 u8 sl_eth_prio[0x4];
8125 u8 fl[0x1];
8126 u8 mlid[0x7];
8127 u8 rlid_udp_sport[0x10];
8128
Matan Barakb4ff3a32016-02-09 14:57:42 +02008129 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008130
8131 u8 rmac_47_16[0x20];
8132
8133 u8 rmac_15_0[0x10];
8134 u8 tclass[0x8];
8135 u8 hop_limit[0x8];
8136
Matan Barakb4ff3a32016-02-09 14:57:42 +02008137 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008138 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008139 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008140 u8 src_addr_index[0x8];
8141 u8 flow_label[0x14];
8142
8143 u8 rgid_rip[16][0x8];
8144};
8145
8146struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008147 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008148 u8 function_id[0x10];
8149
8150 u8 num_pages[0x20];
8151
Matan Barakb4ff3a32016-02-09 14:57:42 +02008152 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008153};
8154
8155struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008156 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008157 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008158 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008159 u8 event_sub_type[0x8];
8160
Matan Barakb4ff3a32016-02-09 14:57:42 +02008161 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008162
8163 union mlx5_ifc_event_auto_bits event_data;
8164
Matan Barakb4ff3a32016-02-09 14:57:42 +02008165 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008166 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008167 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008168 u8 owner[0x1];
8169};
8170
8171enum {
8172 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8173};
8174
8175struct mlx5_ifc_cmd_queue_entry_bits {
8176 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008177 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008178
8179 u8 input_length[0x20];
8180
8181 u8 input_mailbox_pointer_63_32[0x20];
8182
8183 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008184 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008185
8186 u8 command_input_inline_data[16][0x8];
8187
8188 u8 command_output_inline_data[16][0x8];
8189
8190 u8 output_mailbox_pointer_63_32[0x20];
8191
8192 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008193 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008194
8195 u8 output_length[0x20];
8196
8197 u8 token[0x8];
8198 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008199 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008200 u8 status[0x7];
8201 u8 ownership[0x1];
8202};
8203
8204struct mlx5_ifc_cmd_out_bits {
8205 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008206 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008207
8208 u8 syndrome[0x20];
8209
8210 u8 command_output[0x20];
8211};
8212
8213struct mlx5_ifc_cmd_in_bits {
8214 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008218 u8 op_mod[0x10];
8219
8220 u8 command[0][0x20];
8221};
8222
8223struct mlx5_ifc_cmd_if_box_bits {
8224 u8 mailbox_data[512][0x8];
8225
Matan Barakb4ff3a32016-02-09 14:57:42 +02008226 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008227
8228 u8 next_pointer_63_32[0x20];
8229
8230 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008232
8233 u8 block_number[0x20];
8234
Matan Barakb4ff3a32016-02-09 14:57:42 +02008235 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008236 u8 token[0x8];
8237 u8 ctrl_signature[0x8];
8238 u8 signature[0x8];
8239};
8240
8241struct mlx5_ifc_mtt_bits {
8242 u8 ptag_63_32[0x20];
8243
8244 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008245 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008246 u8 wr_en[0x1];
8247 u8 rd_en[0x1];
8248};
8249
Tariq Toukan928cfe82016-02-22 18:17:29 +02008250struct mlx5_ifc_query_wol_rol_out_bits {
8251 u8 status[0x8];
8252 u8 reserved_at_8[0x18];
8253
8254 u8 syndrome[0x20];
8255
8256 u8 reserved_at_40[0x10];
8257 u8 rol_mode[0x8];
8258 u8 wol_mode[0x8];
8259
8260 u8 reserved_at_60[0x20];
8261};
8262
8263struct mlx5_ifc_query_wol_rol_in_bits {
8264 u8 opcode[0x10];
8265 u8 reserved_at_10[0x10];
8266
8267 u8 reserved_at_20[0x10];
8268 u8 op_mod[0x10];
8269
8270 u8 reserved_at_40[0x40];
8271};
8272
8273struct mlx5_ifc_set_wol_rol_out_bits {
8274 u8 status[0x8];
8275 u8 reserved_at_8[0x18];
8276
8277 u8 syndrome[0x20];
8278
8279 u8 reserved_at_40[0x40];
8280};
8281
8282struct mlx5_ifc_set_wol_rol_in_bits {
8283 u8 opcode[0x10];
8284 u8 reserved_at_10[0x10];
8285
8286 u8 reserved_at_20[0x10];
8287 u8 op_mod[0x10];
8288
8289 u8 rol_mode_valid[0x1];
8290 u8 wol_mode_valid[0x1];
8291 u8 reserved_at_42[0xe];
8292 u8 rol_mode[0x8];
8293 u8 wol_mode[0x8];
8294
8295 u8 reserved_at_60[0x20];
8296};
8297
Saeed Mahameede2816822015-05-28 22:28:40 +03008298enum {
8299 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8300 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8301 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8302};
8303
8304enum {
8305 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8306 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8307 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8308};
8309
8310enum {
8311 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8312 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8313 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8314 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8315 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8316 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8317 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8318 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8319 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8320 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8321 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8322};
8323
8324struct mlx5_ifc_initial_seg_bits {
8325 u8 fw_rev_minor[0x10];
8326 u8 fw_rev_major[0x10];
8327
8328 u8 cmd_interface_rev[0x10];
8329 u8 fw_rev_subminor[0x10];
8330
Matan Barakb4ff3a32016-02-09 14:57:42 +02008331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008332
8333 u8 cmdq_phy_addr_63_32[0x20];
8334
8335 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008336 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008337 u8 nic_interface[0x2];
8338 u8 log_cmdq_size[0x4];
8339 u8 log_cmdq_stride[0x4];
8340
8341 u8 command_doorbell_vector[0x20];
8342
Matan Barakb4ff3a32016-02-09 14:57:42 +02008343 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008344
8345 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008346 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008347 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008348 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008349
8350 struct mlx5_ifc_health_buffer_bits health_buffer;
8351
8352 u8 no_dram_nic_offset[0x20];
8353
Matan Barakb4ff3a32016-02-09 14:57:42 +02008354 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008355
Matan Barakb4ff3a32016-02-09 14:57:42 +02008356 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008357 u8 clear_int[0x1];
8358
8359 u8 health_syndrome[0x8];
8360 u8 health_counter[0x18];
8361
Matan Barakb4ff3a32016-02-09 14:57:42 +02008362 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008363};
8364
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008365struct mlx5_ifc_mtpps_reg_bits {
8366 u8 reserved_at_0[0xc];
8367 u8 cap_number_of_pps_pins[0x4];
8368 u8 reserved_at_10[0x4];
8369 u8 cap_max_num_of_pps_in_pins[0x4];
8370 u8 reserved_at_18[0x4];
8371 u8 cap_max_num_of_pps_out_pins[0x4];
8372
8373 u8 reserved_at_20[0x24];
8374 u8 cap_pin_3_mode[0x4];
8375 u8 reserved_at_48[0x4];
8376 u8 cap_pin_2_mode[0x4];
8377 u8 reserved_at_50[0x4];
8378 u8 cap_pin_1_mode[0x4];
8379 u8 reserved_at_58[0x4];
8380 u8 cap_pin_0_mode[0x4];
8381
8382 u8 reserved_at_60[0x4];
8383 u8 cap_pin_7_mode[0x4];
8384 u8 reserved_at_68[0x4];
8385 u8 cap_pin_6_mode[0x4];
8386 u8 reserved_at_70[0x4];
8387 u8 cap_pin_5_mode[0x4];
8388 u8 reserved_at_78[0x4];
8389 u8 cap_pin_4_mode[0x4];
8390
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008391 u8 field_select[0x20];
8392 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008393
8394 u8 enable[0x1];
8395 u8 reserved_at_101[0xb];
8396 u8 pattern[0x4];
8397 u8 reserved_at_110[0x4];
8398 u8 pin_mode[0x4];
8399 u8 pin[0x8];
8400
8401 u8 reserved_at_120[0x20];
8402
8403 u8 time_stamp[0x40];
8404
8405 u8 out_pulse_duration[0x10];
8406 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008407 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008408
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008409 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008410};
8411
8412struct mlx5_ifc_mtppse_reg_bits {
8413 u8 reserved_at_0[0x18];
8414 u8 pin[0x8];
8415 u8 event_arm[0x1];
8416 u8 reserved_at_21[0x1b];
8417 u8 event_generation_mode[0x4];
8418 u8 reserved_at_40[0x40];
8419};
8420
Or Gerlitz47176282017-04-18 13:35:39 +03008421struct mlx5_ifc_mcqi_cap_bits {
8422 u8 supported_info_bitmask[0x20];
8423
8424 u8 component_size[0x20];
8425
8426 u8 max_component_size[0x20];
8427
8428 u8 log_mcda_word_size[0x4];
8429 u8 reserved_at_64[0xc];
8430 u8 mcda_max_write_size[0x10];
8431
8432 u8 rd_en[0x1];
8433 u8 reserved_at_81[0x1];
8434 u8 match_chip_id[0x1];
8435 u8 match_psid[0x1];
8436 u8 check_user_timestamp[0x1];
8437 u8 match_base_guid_mac[0x1];
8438 u8 reserved_at_86[0x1a];
8439};
8440
8441struct mlx5_ifc_mcqi_reg_bits {
8442 u8 read_pending_component[0x1];
8443 u8 reserved_at_1[0xf];
8444 u8 component_index[0x10];
8445
8446 u8 reserved_at_20[0x20];
8447
8448 u8 reserved_at_40[0x1b];
8449 u8 info_type[0x5];
8450
8451 u8 info_size[0x20];
8452
8453 u8 offset[0x20];
8454
8455 u8 reserved_at_a0[0x10];
8456 u8 data_size[0x10];
8457
8458 u8 data[0][0x20];
8459};
8460
8461struct mlx5_ifc_mcc_reg_bits {
8462 u8 reserved_at_0[0x4];
8463 u8 time_elapsed_since_last_cmd[0xc];
8464 u8 reserved_at_10[0x8];
8465 u8 instruction[0x8];
8466
8467 u8 reserved_at_20[0x10];
8468 u8 component_index[0x10];
8469
8470 u8 reserved_at_40[0x8];
8471 u8 update_handle[0x18];
8472
8473 u8 handle_owner_type[0x4];
8474 u8 handle_owner_host_id[0x4];
8475 u8 reserved_at_68[0x1];
8476 u8 control_progress[0x7];
8477 u8 error_code[0x8];
8478 u8 reserved_at_78[0x4];
8479 u8 control_state[0x4];
8480
8481 u8 component_size[0x20];
8482
8483 u8 reserved_at_a0[0x60];
8484};
8485
8486struct mlx5_ifc_mcda_reg_bits {
8487 u8 reserved_at_0[0x8];
8488 u8 update_handle[0x18];
8489
8490 u8 offset[0x20];
8491
8492 u8 reserved_at_40[0x10];
8493 u8 size[0x10];
8494
8495 u8 reserved_at_60[0x20];
8496
8497 u8 data[0][0x20];
8498};
8499
Saeed Mahameede2816822015-05-28 22:28:40 +03008500union mlx5_ifc_ports_control_registers_document_bits {
8501 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8502 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8503 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8504 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8505 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8506 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8507 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8508 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8509 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8510 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8511 struct mlx5_ifc_paos_reg_bits paos_reg;
8512 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8513 struct mlx5_ifc_peir_reg_bits peir_reg;
8514 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8515 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008516 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008517 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8518 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8519 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8520 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8521 struct mlx5_ifc_plib_reg_bits plib_reg;
8522 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8523 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8524 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8525 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8526 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8527 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8528 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8529 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8530 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8531 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008532 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008533 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8534 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8535 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8536 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8537 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8538 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8539 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008540 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008541 struct mlx5_ifc_pude_reg_bits pude_reg;
8542 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8543 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8544 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008545 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8546 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008547 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008548 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8549 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008550 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8551 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8552 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008553 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008554};
8555
8556union mlx5_ifc_debug_enhancements_document_bits {
8557 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008558 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008559};
8560
8561union mlx5_ifc_uplink_pci_interface_document_bits {
8562 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008563 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008564};
8565
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008566struct mlx5_ifc_set_flow_table_root_out_bits {
8567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008568 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008569
8570 u8 syndrome[0x20];
8571
Matan Barakb4ff3a32016-02-09 14:57:42 +02008572 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008573};
8574
8575struct mlx5_ifc_set_flow_table_root_in_bits {
8576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008577 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008578
Matan Barakb4ff3a32016-02-09 14:57:42 +02008579 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008580 u8 op_mod[0x10];
8581
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008582 u8 other_vport[0x1];
8583 u8 reserved_at_41[0xf];
8584 u8 vport_number[0x10];
8585
8586 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008587
8588 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008589 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008590
Matan Barakb4ff3a32016-02-09 14:57:42 +02008591 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008592 u8 table_id[0x18];
8593
Erez Shitrit500a3d02017-04-13 06:36:51 +03008594 u8 reserved_at_c0[0x8];
8595 u8 underlay_qpn[0x18];
8596 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008597};
8598
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008599enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008600 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8601 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008602};
8603
8604struct mlx5_ifc_modify_flow_table_out_bits {
8605 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008606 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008607
8608 u8 syndrome[0x20];
8609
Matan Barakb4ff3a32016-02-09 14:57:42 +02008610 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008611};
8612
8613struct mlx5_ifc_modify_flow_table_in_bits {
8614 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008615 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008616
Matan Barakb4ff3a32016-02-09 14:57:42 +02008617 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008618 u8 op_mod[0x10];
8619
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008620 u8 other_vport[0x1];
8621 u8 reserved_at_41[0xf];
8622 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008623
Matan Barakb4ff3a32016-02-09 14:57:42 +02008624 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008625 u8 modify_field_select[0x10];
8626
8627 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008628 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008629
Matan Barakb4ff3a32016-02-09 14:57:42 +02008630 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008631 u8 table_id[0x18];
8632
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008633 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008634};
8635
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008636struct mlx5_ifc_ets_tcn_config_reg_bits {
8637 u8 g[0x1];
8638 u8 b[0x1];
8639 u8 r[0x1];
8640 u8 reserved_at_3[0x9];
8641 u8 group[0x4];
8642 u8 reserved_at_10[0x9];
8643 u8 bw_allocation[0x7];
8644
8645 u8 reserved_at_20[0xc];
8646 u8 max_bw_units[0x4];
8647 u8 reserved_at_30[0x8];
8648 u8 max_bw_value[0x8];
8649};
8650
8651struct mlx5_ifc_ets_global_config_reg_bits {
8652 u8 reserved_at_0[0x2];
8653 u8 r[0x1];
8654 u8 reserved_at_3[0x1d];
8655
8656 u8 reserved_at_20[0xc];
8657 u8 max_bw_units[0x4];
8658 u8 reserved_at_30[0x8];
8659 u8 max_bw_value[0x8];
8660};
8661
8662struct mlx5_ifc_qetc_reg_bits {
8663 u8 reserved_at_0[0x8];
8664 u8 port_number[0x8];
8665 u8 reserved_at_10[0x30];
8666
8667 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8668 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8669};
8670
Huy Nguyen415a64a2017-07-18 16:08:46 -05008671struct mlx5_ifc_qpdpm_dscp_reg_bits {
8672 u8 e[0x1];
8673 u8 reserved_at_01[0x0b];
8674 u8 prio[0x04];
8675};
8676
8677struct mlx5_ifc_qpdpm_reg_bits {
8678 u8 reserved_at_0[0x8];
8679 u8 local_port[0x8];
8680 u8 reserved_at_10[0x10];
8681 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8682};
8683
8684struct mlx5_ifc_qpts_reg_bits {
8685 u8 reserved_at_0[0x8];
8686 u8 local_port[0x8];
8687 u8 reserved_at_10[0x2d];
8688 u8 trust_state[0x3];
8689};
8690
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008691struct mlx5_ifc_qtct_reg_bits {
8692 u8 reserved_at_0[0x8];
8693 u8 port_number[0x8];
8694 u8 reserved_at_10[0xd];
8695 u8 prio[0x3];
8696
8697 u8 reserved_at_20[0x1d];
8698 u8 tclass[0x3];
8699};
8700
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008701struct mlx5_ifc_mcia_reg_bits {
8702 u8 l[0x1];
8703 u8 reserved_at_1[0x7];
8704 u8 module[0x8];
8705 u8 reserved_at_10[0x8];
8706 u8 status[0x8];
8707
8708 u8 i2c_device_address[0x8];
8709 u8 page_number[0x8];
8710 u8 device_address[0x10];
8711
8712 u8 reserved_at_40[0x10];
8713 u8 size[0x10];
8714
8715 u8 reserved_at_60[0x20];
8716
8717 u8 dword_0[0x20];
8718 u8 dword_1[0x20];
8719 u8 dword_2[0x20];
8720 u8 dword_3[0x20];
8721 u8 dword_4[0x20];
8722 u8 dword_5[0x20];
8723 u8 dword_6[0x20];
8724 u8 dword_7[0x20];
8725 u8 dword_8[0x20];
8726 u8 dword_9[0x20];
8727 u8 dword_10[0x20];
8728 u8 dword_11[0x20];
8729};
8730
Saeed Mahameed74862162016-06-09 15:11:34 +03008731struct mlx5_ifc_dcbx_param_bits {
8732 u8 dcbx_cee_cap[0x1];
8733 u8 dcbx_ieee_cap[0x1];
8734 u8 dcbx_standby_cap[0x1];
8735 u8 reserved_at_0[0x5];
8736 u8 port_number[0x8];
8737 u8 reserved_at_10[0xa];
8738 u8 max_application_table_size[6];
8739 u8 reserved_at_20[0x15];
8740 u8 version_oper[0x3];
8741 u8 reserved_at_38[5];
8742 u8 version_admin[0x3];
8743 u8 willing_admin[0x1];
8744 u8 reserved_at_41[0x3];
8745 u8 pfc_cap_oper[0x4];
8746 u8 reserved_at_48[0x4];
8747 u8 pfc_cap_admin[0x4];
8748 u8 reserved_at_50[0x4];
8749 u8 num_of_tc_oper[0x4];
8750 u8 reserved_at_58[0x4];
8751 u8 num_of_tc_admin[0x4];
8752 u8 remote_willing[0x1];
8753 u8 reserved_at_61[3];
8754 u8 remote_pfc_cap[4];
8755 u8 reserved_at_68[0x14];
8756 u8 remote_num_of_tc[0x4];
8757 u8 reserved_at_80[0x18];
8758 u8 error[0x8];
8759 u8 reserved_at_a0[0x160];
8760};
Aviv Heller84df61e2016-05-10 13:47:50 +03008761
8762struct mlx5_ifc_lagc_bits {
8763 u8 reserved_at_0[0x1d];
8764 u8 lag_state[0x3];
8765
8766 u8 reserved_at_20[0x14];
8767 u8 tx_remap_affinity_2[0x4];
8768 u8 reserved_at_38[0x4];
8769 u8 tx_remap_affinity_1[0x4];
8770};
8771
8772struct mlx5_ifc_create_lag_out_bits {
8773 u8 status[0x8];
8774 u8 reserved_at_8[0x18];
8775
8776 u8 syndrome[0x20];
8777
8778 u8 reserved_at_40[0x40];
8779};
8780
8781struct mlx5_ifc_create_lag_in_bits {
8782 u8 opcode[0x10];
8783 u8 reserved_at_10[0x10];
8784
8785 u8 reserved_at_20[0x10];
8786 u8 op_mod[0x10];
8787
8788 struct mlx5_ifc_lagc_bits ctx;
8789};
8790
8791struct mlx5_ifc_modify_lag_out_bits {
8792 u8 status[0x8];
8793 u8 reserved_at_8[0x18];
8794
8795 u8 syndrome[0x20];
8796
8797 u8 reserved_at_40[0x40];
8798};
8799
8800struct mlx5_ifc_modify_lag_in_bits {
8801 u8 opcode[0x10];
8802 u8 reserved_at_10[0x10];
8803
8804 u8 reserved_at_20[0x10];
8805 u8 op_mod[0x10];
8806
8807 u8 reserved_at_40[0x20];
8808 u8 field_select[0x20];
8809
8810 struct mlx5_ifc_lagc_bits ctx;
8811};
8812
8813struct mlx5_ifc_query_lag_out_bits {
8814 u8 status[0x8];
8815 u8 reserved_at_8[0x18];
8816
8817 u8 syndrome[0x20];
8818
8819 u8 reserved_at_40[0x40];
8820
8821 struct mlx5_ifc_lagc_bits ctx;
8822};
8823
8824struct mlx5_ifc_query_lag_in_bits {
8825 u8 opcode[0x10];
8826 u8 reserved_at_10[0x10];
8827
8828 u8 reserved_at_20[0x10];
8829 u8 op_mod[0x10];
8830
8831 u8 reserved_at_40[0x40];
8832};
8833
8834struct mlx5_ifc_destroy_lag_out_bits {
8835 u8 status[0x8];
8836 u8 reserved_at_8[0x18];
8837
8838 u8 syndrome[0x20];
8839
8840 u8 reserved_at_40[0x40];
8841};
8842
8843struct mlx5_ifc_destroy_lag_in_bits {
8844 u8 opcode[0x10];
8845 u8 reserved_at_10[0x10];
8846
8847 u8 reserved_at_20[0x10];
8848 u8 op_mod[0x10];
8849
8850 u8 reserved_at_40[0x40];
8851};
8852
8853struct mlx5_ifc_create_vport_lag_out_bits {
8854 u8 status[0x8];
8855 u8 reserved_at_8[0x18];
8856
8857 u8 syndrome[0x20];
8858
8859 u8 reserved_at_40[0x40];
8860};
8861
8862struct mlx5_ifc_create_vport_lag_in_bits {
8863 u8 opcode[0x10];
8864 u8 reserved_at_10[0x10];
8865
8866 u8 reserved_at_20[0x10];
8867 u8 op_mod[0x10];
8868
8869 u8 reserved_at_40[0x40];
8870};
8871
8872struct mlx5_ifc_destroy_vport_lag_out_bits {
8873 u8 status[0x8];
8874 u8 reserved_at_8[0x18];
8875
8876 u8 syndrome[0x20];
8877
8878 u8 reserved_at_40[0x40];
8879};
8880
8881struct mlx5_ifc_destroy_vport_lag_in_bits {
8882 u8 opcode[0x10];
8883 u8 reserved_at_10[0x10];
8884
8885 u8 reserved_at_20[0x10];
8886 u8 op_mod[0x10];
8887
8888 u8 reserved_at_40[0x40];
8889};
8890
Ariel Levkovich24da0012018-04-05 18:53:27 +03008891struct mlx5_ifc_alloc_memic_in_bits {
8892 u8 opcode[0x10];
8893 u8 reserved_at_10[0x10];
8894
8895 u8 reserved_at_20[0x10];
8896 u8 op_mod[0x10];
8897
8898 u8 reserved_at_30[0x20];
8899
8900 u8 reserved_at_40[0x18];
8901 u8 log_memic_addr_alignment[0x8];
8902
8903 u8 range_start_addr[0x40];
8904
8905 u8 range_size[0x20];
8906
8907 u8 memic_size[0x20];
8908};
8909
8910struct mlx5_ifc_alloc_memic_out_bits {
8911 u8 status[0x8];
8912 u8 reserved_at_8[0x18];
8913
8914 u8 syndrome[0x20];
8915
8916 u8 memic_start_addr[0x40];
8917};
8918
8919struct mlx5_ifc_dealloc_memic_in_bits {
8920 u8 opcode[0x10];
8921 u8 reserved_at_10[0x10];
8922
8923 u8 reserved_at_20[0x10];
8924 u8 op_mod[0x10];
8925
8926 u8 reserved_at_40[0x40];
8927
8928 u8 memic_start_addr[0x40];
8929
8930 u8 memic_size[0x20];
8931
8932 u8 reserved_at_e0[0x20];
8933};
8934
8935struct mlx5_ifc_dealloc_memic_out_bits {
8936 u8 status[0x8];
8937 u8 reserved_at_8[0x18];
8938
8939 u8 syndrome[0x20];
8940
8941 u8 reserved_at_40[0x40];
8942};
8943
Eli Cohend29b7962014-10-02 12:19:43 +03008944#endif /* MLX5_IFC_H */