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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200146 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300147 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
148 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
149 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
150 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200151 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300152 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300153 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
154 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
155 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
156 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
157 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
158 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300159 MLX5_CMD_OP_ALLOC_PD = 0x800,
160 MLX5_CMD_OP_DEALLOC_PD = 0x801,
161 MLX5_CMD_OP_ALLOC_UAR = 0x802,
162 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
163 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
164 MLX5_CMD_OP_ACCESS_REG = 0x805,
165 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300166 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300167 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
168 MLX5_CMD_OP_MAD_IFC = 0x50d,
169 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
170 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
171 MLX5_CMD_OP_NOP = 0x80d,
172 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
173 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300174 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
175 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
176 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
177 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
178 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
179 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
180 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
181 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
182 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
183 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
184 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
185 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200186 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
187 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300188 MLX5_CMD_OP_CREATE_LAG = 0x840,
189 MLX5_CMD_OP_MODIFY_LAG = 0x841,
190 MLX5_CMD_OP_QUERY_LAG = 0x842,
191 MLX5_CMD_OP_DESTROY_LAG = 0x843,
192 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
193 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_TIR = 0x900,
195 MLX5_CMD_OP_MODIFY_TIR = 0x901,
196 MLX5_CMD_OP_DESTROY_TIR = 0x902,
197 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300198 MLX5_CMD_OP_CREATE_SQ = 0x904,
199 MLX5_CMD_OP_MODIFY_SQ = 0x905,
200 MLX5_CMD_OP_DESTROY_SQ = 0x906,
201 MLX5_CMD_OP_QUERY_SQ = 0x907,
202 MLX5_CMD_OP_CREATE_RQ = 0x908,
203 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300204 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300205 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
206 MLX5_CMD_OP_QUERY_RQ = 0x90b,
207 MLX5_CMD_OP_CREATE_RMP = 0x90c,
208 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
209 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
210 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300211 MLX5_CMD_OP_CREATE_TIS = 0x912,
212 MLX5_CMD_OP_MODIFY_TIS = 0x913,
213 MLX5_CMD_OP_DESTROY_TIS = 0x914,
214 MLX5_CMD_OP_QUERY_TIS = 0x915,
215 MLX5_CMD_OP_CREATE_RQT = 0x916,
216 MLX5_CMD_OP_MODIFY_RQT = 0x917,
217 MLX5_CMD_OP_DESTROY_RQT = 0x918,
218 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200219 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300220 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
221 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
223 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
224 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
225 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
226 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
227 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200228 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000229 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
230 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
231 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300232 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300233 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
234 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200235 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
236 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300237 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
238 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
239 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
240 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
241 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300242 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300243};
244
245struct mlx5_ifc_flow_table_fields_supported_bits {
246 u8 outer_dmac[0x1];
247 u8 outer_smac[0x1];
248 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300249 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300250 u8 outer_first_prio[0x1];
251 u8 outer_first_cfi[0x1];
252 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300253 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300254 u8 outer_second_prio[0x1];
255 u8 outer_second_cfi[0x1];
256 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200257 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300258 u8 outer_sip[0x1];
259 u8 outer_dip[0x1];
260 u8 outer_frag[0x1];
261 u8 outer_ip_protocol[0x1];
262 u8 outer_ip_ecn[0x1];
263 u8 outer_ip_dscp[0x1];
264 u8 outer_udp_sport[0x1];
265 u8 outer_udp_dport[0x1];
266 u8 outer_tcp_sport[0x1];
267 u8 outer_tcp_dport[0x1];
268 u8 outer_tcp_flags[0x1];
269 u8 outer_gre_protocol[0x1];
270 u8 outer_gre_key[0x1];
271 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200272 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300273 u8 source_eswitch_port[0x1];
274
275 u8 inner_dmac[0x1];
276 u8 inner_smac[0x1];
277 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300278 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300279 u8 inner_first_prio[0x1];
280 u8 inner_first_cfi[0x1];
281 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200282 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300283 u8 inner_second_prio[0x1];
284 u8 inner_second_cfi[0x1];
285 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200286 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300287 u8 inner_sip[0x1];
288 u8 inner_dip[0x1];
289 u8 inner_frag[0x1];
290 u8 inner_ip_protocol[0x1];
291 u8 inner_ip_ecn[0x1];
292 u8 inner_ip_dscp[0x1];
293 u8 inner_udp_sport[0x1];
294 u8 inner_udp_dport[0x1];
295 u8 inner_tcp_sport[0x1];
296 u8 inner_tcp_dport[0x1];
297 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300299 u8 reserved_at_40[0x17];
300 u8 outer_esp_spi[0x1];
301 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300302 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300303
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305};
306
307struct mlx5_ifc_flow_table_prop_layout_bits {
308 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000309 u8 reserved_at_1[0x1];
310 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200311 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200312 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200313 u8 identified_miss_table_mode[0x1];
314 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300315 u8 encap[0x1];
316 u8 decap[0x1];
317 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200321 u8 log_max_modify_header_context[0x8];
322 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323 u8 max_ft_level[0x8];
324
Matan Barakb4ff3a32016-02-09 14:57:42 +0200325 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200331 u8 log_max_destination[0x8];
332
Raed Salem16f1c5b2017-07-30 11:02:51 +0300333 u8 log_max_flow_counter[0x8];
334 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335 u8 log_max_flow[0x8];
336
Matan Barakb4ff3a32016-02-09 14:57:42 +0200337 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300338
339 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
340
341 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
342};
343
344struct mlx5_ifc_odp_per_transport_service_cap_bits {
345 u8 send[0x1];
346 u8 receive[0x1];
347 u8 write[0x1];
348 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200349 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300350 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200351 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300352};
353
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200354struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200355 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200356
357 u8 ipv4[0x20];
358};
359
360struct mlx5_ifc_ipv6_layout_bits {
361 u8 ipv6[16][0x8];
362};
363
364union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
365 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
366 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200367 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200368};
369
Saeed Mahameede2816822015-05-28 22:28:40 +0300370struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
371 u8 smac_47_16[0x20];
372
373 u8 smac_15_0[0x10];
374 u8 ethertype[0x10];
375
376 u8 dmac_47_16[0x20];
377
378 u8 dmac_15_0[0x10];
379 u8 first_prio[0x3];
380 u8 first_cfi[0x1];
381 u8 first_vid[0xc];
382
383 u8 ip_protocol[0x8];
384 u8 ip_dscp[0x6];
385 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300386 u8 cvlan_tag[0x1];
387 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300388 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300389 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390 u8 tcp_flags[0x9];
391
392 u8 tcp_sport[0x10];
393 u8 tcp_dport[0x10];
394
Or Gerlitza8ade552017-06-07 17:49:56 +0300395 u8 reserved_at_c0[0x18];
396 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300397
398 u8 udp_sport[0x10];
399 u8 udp_dport[0x10];
400
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200401 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200403 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300404};
405
406struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300407 u8 reserved_at_0[0x8];
408 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300409
Matan Barakb4ff3a32016-02-09 14:57:42 +0200410 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300411 u8 source_port[0x10];
412
413 u8 outer_second_prio[0x3];
414 u8 outer_second_cfi[0x1];
415 u8 outer_second_vid[0xc];
416 u8 inner_second_prio[0x3];
417 u8 inner_second_cfi[0x1];
418 u8 inner_second_vid[0xc];
419
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300420 u8 outer_second_cvlan_tag[0x1];
421 u8 inner_second_cvlan_tag[0x1];
422 u8 outer_second_svlan_tag[0x1];
423 u8 inner_second_svlan_tag[0x1];
424 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425 u8 gre_protocol[0x10];
426
427 u8 gre_key_h[0x18];
428 u8 gre_key_l[0x8];
429
430 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432
Matan Barakb4ff3a32016-02-09 14:57:42 +0200433 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 outer_ipv6_flow_label[0x14];
437
Matan Barakb4ff3a32016-02-09 14:57:42 +0200438 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300439 u8 inner_ipv6_flow_label[0x14];
440
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300441 u8 reserved_at_120[0x28];
442 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300443 u8 reserved_at_160[0x20];
444 u8 outer_esp_spi[0x20];
445 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300446};
447
448struct mlx5_ifc_cmd_pas_bits {
449 u8 pa_h[0x20];
450
451 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200452 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300453};
454
455struct mlx5_ifc_uint64_bits {
456 u8 hi[0x20];
457
458 u8 lo[0x20];
459};
460
461enum {
462 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
463 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
464 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
465 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
466 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
467 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
468 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
469 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
470 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
471 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
472};
473
474struct mlx5_ifc_ads_bits {
475 u8 fl[0x1];
476 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 pkey_index[0x10];
479
Matan Barakb4ff3a32016-02-09 14:57:42 +0200480 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300481 u8 grh[0x1];
482 u8 mlid[0x7];
483 u8 rlid[0x10];
484
485 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200486 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300487 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200488 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300489 u8 stat_rate[0x4];
490 u8 hop_limit[0x8];
491
Matan Barakb4ff3a32016-02-09 14:57:42 +0200492 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300493 u8 tclass[0x8];
494 u8 flow_label[0x14];
495
496 u8 rgid_rip[16][0x8];
497
Matan Barakb4ff3a32016-02-09 14:57:42 +0200498 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300499 u8 f_dscp[0x1];
500 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200501 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300502 u8 f_eth_prio[0x1];
503 u8 ecn[0x2];
504 u8 dscp[0x6];
505 u8 udp_sport[0x10];
506
507 u8 dei_cfi[0x1];
508 u8 eth_prio[0x3];
509 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200510 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300511 u8 rmac_47_32[0x10];
512
513 u8 rmac_31_0[0x20];
514};
515
516struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200517 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300518 u8 nic_rx_multi_path_tirs_fts[0x1];
519 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
520 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
523
Matan Barakb4ff3a32016-02-09 14:57:42 +0200524 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300525
526 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
527
528 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
529
Matan Barakb4ff3a32016-02-09 14:57:42 +0200530 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300531
532 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
533
Matan Barakb4ff3a32016-02-09 14:57:42 +0200534 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300535};
536
Saeed Mahameed495716b2015-12-01 18:03:19 +0200537struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200538 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200539
540 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
541
542 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
543
544 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
545
Matan Barakb4ff3a32016-02-09 14:57:42 +0200546 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200547};
548
Saeed Mahameedd6666752015-12-01 18:03:22 +0200549struct mlx5_ifc_e_switch_cap_bits {
550 u8 vport_svlan_strip[0x1];
551 u8 vport_cvlan_strip[0x1];
552 u8 vport_svlan_insert[0x1];
553 u8 vport_cvlan_insert_if_not_exist[0x1];
554 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300555 u8 reserved_at_5[0x19];
556 u8 nic_vport_node_guid_modify[0x1];
557 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200558
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300559 u8 vxlan_encap_decap[0x1];
560 u8 nvgre_encap_decap[0x1];
561 u8 reserved_at_22[0x9];
562 u8 log_max_encap_headers[0x5];
563 u8 reserved_2b[0x6];
564 u8 max_encap_header_size[0xa];
565
566 u8 reserved_40[0x7c0];
567
Saeed Mahameedd6666752015-12-01 18:03:22 +0200568};
569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570struct mlx5_ifc_qos_cap_bits {
571 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300572 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200573 u8 esw_bw_share[0x1];
574 u8 esw_rate_limit[0x1];
575 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300576
577 u8 reserved_at_20[0x20];
578
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
Saeed Mahameed74862162016-06-09 15:11:34 +0300581 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300582
583 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300585
586 u8 esw_element_type[0x10];
587 u8 esw_tsar_type[0x10];
588
589 u8 reserved_at_c0[0x10];
590 u8 max_qos_para_vport[0x10];
591
592 u8 max_tsar_bw_share[0x20];
593
594 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300595};
596
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300597struct mlx5_ifc_debug_cap_bits {
598 u8 reserved_at_0[0x20];
599
600 u8 reserved_at_20[0x2];
601 u8 stall_detect[0x1];
602 u8 reserved_at_23[0x1d];
603
604 u8 reserved_at_40[0x7c0];
605};
606
Saeed Mahameede2816822015-05-28 22:28:40 +0300607struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
608 u8 csum_cap[0x1];
609 u8 vlan_cap[0x1];
610 u8 lro_cap[0x1];
611 u8 lro_psh_flag[0x1];
612 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200613 u8 reserved_at_5[0x2];
614 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200615 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200618 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300619 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300621 u8 reg_umr_sq[0x1];
622 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300623 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300624 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300626 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627 u8 tunnel_stateless_vxlan[0x1];
628
Ilan Tayari547eede2017-04-18 16:04:28 +0300629 u8 swp[0x1];
630 u8 swp_csum[0x1];
631 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300632 u8 reserved_at_23[0x1b];
633 u8 max_geneve_opt_len[0x1];
634 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635
Matan Barakb4ff3a32016-02-09 14:57:42 +0200636 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300637 u8 lro_min_mss_size[0x10];
638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640
641 u8 lro_timer_supported_periods[4][0x20];
642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644};
645
646struct mlx5_ifc_roce_cap_bits {
647 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649
Matan Barakb4ff3a32016-02-09 14:57:42 +0200650 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300651
Matan Barakb4ff3a32016-02-09 14:57:42 +0200652 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300653 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200654 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300655 u8 roce_version[0x8];
656
Matan Barakb4ff3a32016-02-09 14:57:42 +0200657 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300658 u8 r_roce_dest_udp_port[0x10];
659
660 u8 r_roce_max_src_udp_port[0x10];
661 u8 r_roce_min_src_udp_port[0x10];
662
Matan Barakb4ff3a32016-02-09 14:57:42 +0200663 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300664 u8 roce_address_table_size[0x10];
665
Matan Barakb4ff3a32016-02-09 14:57:42 +0200666 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667};
668
669enum {
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
678 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
679};
680
681enum {
682 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
683 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
684 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
690 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
691};
692
693struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
Or Gerlitzbd108382017-05-28 15:24:17 +0300696 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300698 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300701
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
Matan Barakb4ff3a32016-02-09 14:57:42 +0200704 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200705 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200708 u8 atomic_size_qp[0x10];
709
Matan Barakb4ff3a32016-02-09 14:57:42 +0200710 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300711 u8 atomic_size_dc[0x10];
712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714};
715
716struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200717 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300718
719 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200720 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300721
Matan Barakb4ff3a32016-02-09 14:57:42 +0200722 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300723
724 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
725
726 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
727
728 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
729
Matan Barakb4ff3a32016-02-09 14:57:42 +0200730 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300731};
732
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200733struct mlx5_ifc_calc_op {
734 u8 reserved_at_0[0x10];
735 u8 reserved_at_10[0x9];
736 u8 op_swap_endianness[0x1];
737 u8 op_min[0x1];
738 u8 op_xor[0x1];
739 u8 op_or[0x1];
740 u8 op_and[0x1];
741 u8 op_max[0x1];
742 u8 op_add[0x1];
743};
744
745struct mlx5_ifc_vector_calc_cap_bits {
746 u8 calc_matrix[0x1];
747 u8 reserved_at_1[0x1f];
748 u8 reserved_at_20[0x8];
749 u8 max_vec_count[0x8];
750 u8 reserved_at_30[0xd];
751 u8 max_chunk_size[0x3];
752 struct mlx5_ifc_calc_op calc0;
753 struct mlx5_ifc_calc_op calc1;
754 struct mlx5_ifc_calc_op calc2;
755 struct mlx5_ifc_calc_op calc3;
756
757 u8 reserved_at_e0[0x720];
758};
759
Saeed Mahameede2816822015-05-28 22:28:40 +0300760enum {
761 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
762 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300763 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300764 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300765};
766
767enum {
768 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
769 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
770};
771
772enum {
773 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
774 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
775 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
776 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
777 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
778};
779
780enum {
781 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
782 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
783 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
784 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
785 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
786 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
787};
788
789enum {
790 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
791 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
792};
793
794enum {
795 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
796 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
797 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
798};
799
800enum {
801 MLX5_CAP_PORT_TYPE_IB = 0x0,
802 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300803};
804
Max Gurtovoy1410a902017-05-28 10:53:10 +0300805enum {
806 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
807 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
808 MLX5_CAP_UMR_FENCE_NONE = 0x2,
809};
810
Eli Cohenb7755162014-10-02 12:19:44 +0300811struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200812 u8 reserved_at_0[0x30];
813 u8 vhca_id[0x10];
814
815 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300816
817 u8 log_max_srq_sz[0x8];
818 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200819 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300820 u8 log_max_qp[0x5];
821
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300823 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200824 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300825
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200828 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300829 u8 log_max_cq[0x5];
830
831 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300835 u8 log_max_eq[0x4];
836
837 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200838 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300839 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200840 u8 force_teardown[0x1];
841 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200843 u8 umr_extended_translation_offset[0x1];
844 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_klm_list_size[0x6];
846
Matan Barakb4ff3a32016-02-09 14:57:42 +0200847 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300848 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200849 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300850 u8 log_max_ra_res_dc[0x6];
851
Matan Barakb4ff3a32016-02-09 14:57:42 +0200852 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200854 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300855 u8 log_max_ra_res_qp[0x6];
856
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200857 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 cc_query_allowed[0x1];
859 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200860 u8 start_pad[0x1];
861 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500862 u8 reserved_at_165[0xa];
863 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300864 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300865
Saeed Mahameede2816822015-05-28 22:28:40 +0300866 u8 out_of_seq_cnt[0x1];
867 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300868 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300869 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300870 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300871 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300872 u8 max_qp_cnt[0xa];
873 u8 pkey_table_size[0x10];
874
Saeed Mahameede2816822015-05-28 22:28:40 +0300875 u8 vport_group_manager[0x1];
876 u8 vhca_group_manager[0x1];
877 u8 ib_virt[0x1];
878 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200879 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300880 u8 ets[0x1];
881 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200882 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300883 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200884 u8 mcam_reg[0x1];
885 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300886 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200887 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300888 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300889 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200890 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300891 u8 disable_link_up[0x1];
892 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300894 u8 num_ports[0x8];
895
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300896 u8 reserved_at_1c0[0x1];
897 u8 pps[0x1];
898 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300900 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200901 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300902 u8 reserved_at_1d0[0x1];
903 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300904 u8 general_notification_event[0x1];
905 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200906 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200907 u8 rol_s[0x1];
908 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300909 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200910 u8 wol_s[0x1];
911 u8 wol_g[0x1];
912 u8 wol_a[0x1];
913 u8 wol_b[0x1];
914 u8 wol_m[0x1];
915 u8 wol_u[0x1];
916 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300917
918 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300919 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300920 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300921
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300923 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300924 u8 reserved_at_202[0x1];
925 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200926 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300927 u8 reserved_at_205[0x5];
928 u8 umr_fence[0x2];
929 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300930 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300931 u8 cmdif_checksum[0x2];
932 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300933 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 wq_signature[0x1];
935 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 sho[0x1];
938 u8 tph[0x1];
939 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300940 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300941 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300942 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300943 u8 roce[0x1];
944 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300945 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300946
947 u8 cq_oi[0x1];
948 u8 cq_resize[0x1];
949 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300951 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300952 u8 pg[0x1];
953 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300954 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300955 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300956 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300958 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200960 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300961 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200962 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 qkv[0x1];
965 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200966 u8 set_deth_sqpn[0x1];
967 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300968 u8 xrc[0x1];
969 u8 ud[0x1];
970 u8 uc[0x1];
971 u8 rc[0x1];
972
Eli Cohena6d51b62017-01-03 23:55:23 +0200973 u8 uar_4k[0x1];
974 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300977 u8 log_pg_sz[0x8];
978
979 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200980 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300981 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300982 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300983 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300984
985 u8 reserved_at_270[0xb];
986 u8 lag_master[0x1];
987 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300988
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 max_wqe_sz_sq[0x10];
991
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300993 u8 max_wqe_sz_rq[0x10];
994
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300995 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 max_wqe_sz_sq_dc[0x10];
997
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 max_qp_mcg[0x19];
1000
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 log_max_mcg[0x8];
1003
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001005 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001007 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001009 u8 log_max_xrcd[0x5];
1010
Moshe Shemesh5c298142017-12-26 16:46:29 +02001011 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001012 u8 receive_discard_vport_down[0x1];
1013 u8 transmit_discard_vport_down[0x1];
1014 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001015 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001016 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001017
Eli Cohenb7755162014-10-02 12:19:44 +03001018
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001020 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001022 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001024 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001026 u8 log_max_tis[0x5];
1027
Saeed Mahameede2816822015-05-28 22:28:40 +03001028 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001029 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001030 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001031 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001032 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001034 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001036 u8 log_max_tis_per_sq[0x5];
1037
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001039 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001041 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001042 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001043 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Or Gerlitz40817cd2017-06-25 12:38:45 +03001047 u8 hairpin[0x1];
1048 u8 reserved_at_3c1[0x2];
1049 u8 log_max_hairpin_queues[0x5];
1050 u8 reserved_at_3c8[0x3];
1051 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001052 u8 reserved_at_3d0[0x3];
1053 u8 log_max_hairpin_num_packets[0x5];
1054 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001055 u8 log_max_wq_sz[0x5];
1056
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001057 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001058 u8 disable_local_lb_uc[0x1];
1059 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001060 u8 log_min_hairpin_wq_data_sz[0x5];
1061 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001062 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001063 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001064 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001065 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001066 u8 log_max_current_uc_list[0x5];
1067
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001069
Tariq Toukane1c9c622016-04-11 23:10:21 +03001070 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001072 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001073 u8 log_uar_page_sz[0x10];
1074
Tariq Toukane1c9c622016-04-11 23:10:21 +03001075 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001076 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001077 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001078
Eli Cohena6d51b62017-01-03 23:55:23 +02001079 u8 reserved_at_500[0x20];
1080 u8 num_of_uars_per_page[0x20];
1081 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001082
Guy Levi0ff8e792017-10-19 08:25:51 +03001083 u8 reserved_at_580[0x3d];
1084 u8 cqe_128_always[0x1];
1085 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001086 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001087
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001088 u8 cqe_compression_timeout[0x10];
1089 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001090
Saeed Mahameed74862162016-06-09 15:11:34 +03001091 u8 reserved_at_5e0[0x10];
1092 u8 tag_matching[0x1];
1093 u8 rndv_offload_rc[0x1];
1094 u8 rndv_offload_dc[0x1];
1095 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001096 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001097 u8 log_max_xrq[0x5];
1098
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001099 u8 affiliate_nic_vport_criteria[0x8];
1100 u8 native_port_num[0x8];
1101 u8 num_vhca_ports[0x8];
1102 u8 reserved_at_618[0x6];
1103 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001104 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001105};
1106
Saeed Mahameed81848732015-12-01 18:03:20 +02001107enum mlx5_flow_destination_type {
1108 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1109 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1110 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001111
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001112 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001113 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001114};
1115
1116struct mlx5_ifc_dest_format_struct_bits {
1117 u8 destination_type[0x8];
1118 u8 destination_id[0x18];
1119
Matan Barakb4ff3a32016-02-09 14:57:42 +02001120 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001121};
1122
Amir Vadai9dc0b282016-05-13 12:55:39 +00001123struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001124 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001125
1126 u8 reserved_at_20[0x20];
1127};
1128
1129union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1130 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1131 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1132 u8 reserved_at_0[0x40];
1133};
1134
Saeed Mahameede2816822015-05-28 22:28:40 +03001135struct mlx5_ifc_fte_match_param_bits {
1136 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1137
1138 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1139
1140 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1141
Matan Barakb4ff3a32016-02-09 14:57:42 +02001142 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001143};
1144
1145enum {
1146 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1147 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1148 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1149 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1150 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1151};
1152
1153struct mlx5_ifc_rx_hash_field_select_bits {
1154 u8 l3_prot_type[0x1];
1155 u8 l4_prot_type[0x1];
1156 u8 selected_fields[0x1e];
1157};
1158
1159enum {
1160 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1161 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1162};
1163
1164enum {
1165 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1166 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1167};
1168
1169struct mlx5_ifc_wq_bits {
1170 u8 wq_type[0x4];
1171 u8 wq_signature[0x1];
1172 u8 end_padding_mode[0x2];
1173 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175
1176 u8 hds_skip_first_sge[0x1];
1177 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 page_offset[0x5];
1180 u8 lwm[0x10];
1181
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183 u8 pd[0x18];
1184
Matan Barakb4ff3a32016-02-09 14:57:42 +02001185 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001186 u8 uar_page[0x18];
1187
1188 u8 dbr_addr[0x40];
1189
1190 u8 hw_counter[0x20];
1191
1192 u8 sw_counter[0x20];
1193
Matan Barakb4ff3a32016-02-09 14:57:42 +02001194 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001195 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001198 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 log_wq_sz[0x5];
1200
Or Gerlitz4d533e02018-01-04 12:26:21 +02001201 u8 reserved_at_120[0x3];
1202 u8 log_hairpin_num_packets[0x5];
1203 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001204 u8 log_hairpin_data_sz[0x5];
1205 u8 reserved_at_130[0x5];
1206
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001207 u8 log_wqe_num_of_strides[0x3];
1208 u8 two_byte_shift_en[0x1];
1209 u8 reserved_at_139[0x4];
1210 u8 log_wqe_stride_size[0x3];
1211
1212 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001213
1214 struct mlx5_ifc_cmd_pas_bits pas[0];
1215};
1216
1217struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001218 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001219 u8 rq_num[0x18];
1220};
1221
1222struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001223 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001224 u8 mac_addr_47_32[0x10];
1225
1226 u8 mac_addr_31_0[0x20];
1227};
1228
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001229struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001230 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001231 u8 vlan[0x0c];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001234};
1235
Saeed Mahameede2816822015-05-28 22:28:40 +03001236struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238
1239 u8 min_time_between_cnps[0x20];
1240
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001242 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001243 u8 reserved_at_d8[0x4];
1244 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001245 u8 cnp_802p_prio[0x3];
1246
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248};
1249
1250struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252
Matan Barakb4ff3a32016-02-09 14:57:42 +02001253 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001254 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001255 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001257 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001258
Matan Barakb4ff3a32016-02-09 14:57:42 +02001259 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001260
1261 u8 rpg_time_reset[0x20];
1262
1263 u8 rpg_byte_reset[0x20];
1264
1265 u8 rpg_threshold[0x20];
1266
1267 u8 rpg_max_rate[0x20];
1268
1269 u8 rpg_ai_rate[0x20];
1270
1271 u8 rpg_hai_rate[0x20];
1272
1273 u8 rpg_gd[0x20];
1274
1275 u8 rpg_min_dec_fac[0x20];
1276
1277 u8 rpg_min_rate[0x20];
1278
Matan Barakb4ff3a32016-02-09 14:57:42 +02001279 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001280
1281 u8 rate_to_set_on_first_cnp[0x20];
1282
1283 u8 dce_tcp_g[0x20];
1284
1285 u8 dce_tcp_rtt[0x20];
1286
1287 u8 rate_reduce_monitor_period[0x20];
1288
Matan Barakb4ff3a32016-02-09 14:57:42 +02001289 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001290
1291 u8 initial_alpha_value[0x20];
1292
Matan Barakb4ff3a32016-02-09 14:57:42 +02001293 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001294};
1295
1296struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001297 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001298
1299 u8 rppp_max_rps[0x20];
1300
1301 u8 rpg_time_reset[0x20];
1302
1303 u8 rpg_byte_reset[0x20];
1304
1305 u8 rpg_threshold[0x20];
1306
1307 u8 rpg_max_rate[0x20];
1308
1309 u8 rpg_ai_rate[0x20];
1310
1311 u8 rpg_hai_rate[0x20];
1312
1313 u8 rpg_gd[0x20];
1314
1315 u8 rpg_min_dec_fac[0x20];
1316
1317 u8 rpg_min_rate[0x20];
1318
Matan Barakb4ff3a32016-02-09 14:57:42 +02001319 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001320};
1321
1322enum {
1323 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1324 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1325 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1326};
1327
1328struct mlx5_ifc_resize_field_select_bits {
1329 u8 resize_field_select[0x20];
1330};
1331
1332enum {
1333 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1334 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1335 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1336 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1337};
1338
1339struct mlx5_ifc_modify_field_select_bits {
1340 u8 modify_field_select[0x20];
1341};
1342
1343struct mlx5_ifc_field_select_r_roce_np_bits {
1344 u8 field_select_r_roce_np[0x20];
1345};
1346
1347struct mlx5_ifc_field_select_r_roce_rp_bits {
1348 u8 field_select_r_roce_rp[0x20];
1349};
1350
1351enum {
1352 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1353 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1354 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1355 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1356 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1357 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1358 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1359 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1360 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1361 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1362};
1363
1364struct mlx5_ifc_field_select_802_1qau_rp_bits {
1365 u8 field_select_8021qaurp[0x20];
1366};
1367
1368struct mlx5_ifc_phys_layer_cntrs_bits {
1369 u8 time_since_last_clear_high[0x20];
1370
1371 u8 time_since_last_clear_low[0x20];
1372
1373 u8 symbol_errors_high[0x20];
1374
1375 u8 symbol_errors_low[0x20];
1376
1377 u8 sync_headers_errors_high[0x20];
1378
1379 u8 sync_headers_errors_low[0x20];
1380
1381 u8 edpl_bip_errors_lane0_high[0x20];
1382
1383 u8 edpl_bip_errors_lane0_low[0x20];
1384
1385 u8 edpl_bip_errors_lane1_high[0x20];
1386
1387 u8 edpl_bip_errors_lane1_low[0x20];
1388
1389 u8 edpl_bip_errors_lane2_high[0x20];
1390
1391 u8 edpl_bip_errors_lane2_low[0x20];
1392
1393 u8 edpl_bip_errors_lane3_high[0x20];
1394
1395 u8 edpl_bip_errors_lane3_low[0x20];
1396
1397 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1398
1399 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1400
1401 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1402
1403 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1404
1405 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1406
1407 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1408
1409 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1410
1411 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1412
1413 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1414
1415 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1416
1417 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1418
1419 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1420
1421 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1422
1423 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1424
1425 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1426
1427 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1428
1429 u8 rs_fec_corrected_blocks_high[0x20];
1430
1431 u8 rs_fec_corrected_blocks_low[0x20];
1432
1433 u8 rs_fec_uncorrectable_blocks_high[0x20];
1434
1435 u8 rs_fec_uncorrectable_blocks_low[0x20];
1436
1437 u8 rs_fec_no_errors_blocks_high[0x20];
1438
1439 u8 rs_fec_no_errors_blocks_low[0x20];
1440
1441 u8 rs_fec_single_error_blocks_high[0x20];
1442
1443 u8 rs_fec_single_error_blocks_low[0x20];
1444
1445 u8 rs_fec_corrected_symbols_total_high[0x20];
1446
1447 u8 rs_fec_corrected_symbols_total_low[0x20];
1448
1449 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1450
1451 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1452
1453 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1454
1455 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1456
1457 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1458
1459 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1460
1461 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1462
1463 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1464
1465 u8 link_down_events[0x20];
1466
1467 u8 successful_recovery_events[0x20];
1468
Matan Barakb4ff3a32016-02-09 14:57:42 +02001469 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001470};
1471
Gal Pressmand8dc0502016-09-27 17:04:51 +03001472struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1473 u8 time_since_last_clear_high[0x20];
1474
1475 u8 time_since_last_clear_low[0x20];
1476
1477 u8 phy_received_bits_high[0x20];
1478
1479 u8 phy_received_bits_low[0x20];
1480
1481 u8 phy_symbol_errors_high[0x20];
1482
1483 u8 phy_symbol_errors_low[0x20];
1484
1485 u8 phy_corrected_bits_high[0x20];
1486
1487 u8 phy_corrected_bits_low[0x20];
1488
1489 u8 phy_corrected_bits_lane0_high[0x20];
1490
1491 u8 phy_corrected_bits_lane0_low[0x20];
1492
1493 u8 phy_corrected_bits_lane1_high[0x20];
1494
1495 u8 phy_corrected_bits_lane1_low[0x20];
1496
1497 u8 phy_corrected_bits_lane2_high[0x20];
1498
1499 u8 phy_corrected_bits_lane2_low[0x20];
1500
1501 u8 phy_corrected_bits_lane3_high[0x20];
1502
1503 u8 phy_corrected_bits_lane3_low[0x20];
1504
1505 u8 reserved_at_200[0x5c0];
1506};
1507
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001508struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1509 u8 symbol_error_counter[0x10];
1510
1511 u8 link_error_recovery_counter[0x8];
1512
1513 u8 link_downed_counter[0x8];
1514
1515 u8 port_rcv_errors[0x10];
1516
1517 u8 port_rcv_remote_physical_errors[0x10];
1518
1519 u8 port_rcv_switch_relay_errors[0x10];
1520
1521 u8 port_xmit_discards[0x10];
1522
1523 u8 port_xmit_constraint_errors[0x8];
1524
1525 u8 port_rcv_constraint_errors[0x8];
1526
1527 u8 reserved_at_70[0x8];
1528
1529 u8 link_overrun_errors[0x8];
1530
1531 u8 reserved_at_80[0x10];
1532
1533 u8 vl_15_dropped[0x10];
1534
Tim Wright133bea02017-05-01 17:30:08 +01001535 u8 reserved_at_a0[0x80];
1536
1537 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001538};
1539
Saeed Mahameede2816822015-05-28 22:28:40 +03001540struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1541 u8 transmit_queue_high[0x20];
1542
1543 u8 transmit_queue_low[0x20];
1544
Matan Barakb4ff3a32016-02-09 14:57:42 +02001545 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001546};
1547
1548struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1549 u8 rx_octets_high[0x20];
1550
1551 u8 rx_octets_low[0x20];
1552
Matan Barakb4ff3a32016-02-09 14:57:42 +02001553 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001554
1555 u8 rx_frames_high[0x20];
1556
1557 u8 rx_frames_low[0x20];
1558
1559 u8 tx_octets_high[0x20];
1560
1561 u8 tx_octets_low[0x20];
1562
Matan Barakb4ff3a32016-02-09 14:57:42 +02001563 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001564
1565 u8 tx_frames_high[0x20];
1566
1567 u8 tx_frames_low[0x20];
1568
1569 u8 rx_pause_high[0x20];
1570
1571 u8 rx_pause_low[0x20];
1572
1573 u8 rx_pause_duration_high[0x20];
1574
1575 u8 rx_pause_duration_low[0x20];
1576
1577 u8 tx_pause_high[0x20];
1578
1579 u8 tx_pause_low[0x20];
1580
1581 u8 tx_pause_duration_high[0x20];
1582
1583 u8 tx_pause_duration_low[0x20];
1584
1585 u8 rx_pause_transition_high[0x20];
1586
1587 u8 rx_pause_transition_low[0x20];
1588
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001589 u8 reserved_at_3c0[0x40];
1590
1591 u8 device_stall_minor_watermark_cnt_high[0x20];
1592
1593 u8 device_stall_minor_watermark_cnt_low[0x20];
1594
1595 u8 device_stall_critical_watermark_cnt_high[0x20];
1596
1597 u8 device_stall_critical_watermark_cnt_low[0x20];
1598
1599 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001600};
1601
1602struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1603 u8 port_transmit_wait_high[0x20];
1604
1605 u8 port_transmit_wait_low[0x20];
1606
Gal Pressman2dba0792017-06-18 14:56:45 +03001607 u8 reserved_at_40[0x100];
1608
1609 u8 rx_buffer_almost_full_high[0x20];
1610
1611 u8 rx_buffer_almost_full_low[0x20];
1612
1613 u8 rx_buffer_full_high[0x20];
1614
1615 u8 rx_buffer_full_low[0x20];
1616
1617 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001618};
1619
1620struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1621 u8 dot3stats_alignment_errors_high[0x20];
1622
1623 u8 dot3stats_alignment_errors_low[0x20];
1624
1625 u8 dot3stats_fcs_errors_high[0x20];
1626
1627 u8 dot3stats_fcs_errors_low[0x20];
1628
1629 u8 dot3stats_single_collision_frames_high[0x20];
1630
1631 u8 dot3stats_single_collision_frames_low[0x20];
1632
1633 u8 dot3stats_multiple_collision_frames_high[0x20];
1634
1635 u8 dot3stats_multiple_collision_frames_low[0x20];
1636
1637 u8 dot3stats_sqe_test_errors_high[0x20];
1638
1639 u8 dot3stats_sqe_test_errors_low[0x20];
1640
1641 u8 dot3stats_deferred_transmissions_high[0x20];
1642
1643 u8 dot3stats_deferred_transmissions_low[0x20];
1644
1645 u8 dot3stats_late_collisions_high[0x20];
1646
1647 u8 dot3stats_late_collisions_low[0x20];
1648
1649 u8 dot3stats_excessive_collisions_high[0x20];
1650
1651 u8 dot3stats_excessive_collisions_low[0x20];
1652
1653 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1654
1655 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1656
1657 u8 dot3stats_carrier_sense_errors_high[0x20];
1658
1659 u8 dot3stats_carrier_sense_errors_low[0x20];
1660
1661 u8 dot3stats_frame_too_longs_high[0x20];
1662
1663 u8 dot3stats_frame_too_longs_low[0x20];
1664
1665 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1666
1667 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1668
1669 u8 dot3stats_symbol_errors_high[0x20];
1670
1671 u8 dot3stats_symbol_errors_low[0x20];
1672
1673 u8 dot3control_in_unknown_opcodes_high[0x20];
1674
1675 u8 dot3control_in_unknown_opcodes_low[0x20];
1676
1677 u8 dot3in_pause_frames_high[0x20];
1678
1679 u8 dot3in_pause_frames_low[0x20];
1680
1681 u8 dot3out_pause_frames_high[0x20];
1682
1683 u8 dot3out_pause_frames_low[0x20];
1684
Matan Barakb4ff3a32016-02-09 14:57:42 +02001685 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001686};
1687
1688struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1689 u8 ether_stats_drop_events_high[0x20];
1690
1691 u8 ether_stats_drop_events_low[0x20];
1692
1693 u8 ether_stats_octets_high[0x20];
1694
1695 u8 ether_stats_octets_low[0x20];
1696
1697 u8 ether_stats_pkts_high[0x20];
1698
1699 u8 ether_stats_pkts_low[0x20];
1700
1701 u8 ether_stats_broadcast_pkts_high[0x20];
1702
1703 u8 ether_stats_broadcast_pkts_low[0x20];
1704
1705 u8 ether_stats_multicast_pkts_high[0x20];
1706
1707 u8 ether_stats_multicast_pkts_low[0x20];
1708
1709 u8 ether_stats_crc_align_errors_high[0x20];
1710
1711 u8 ether_stats_crc_align_errors_low[0x20];
1712
1713 u8 ether_stats_undersize_pkts_high[0x20];
1714
1715 u8 ether_stats_undersize_pkts_low[0x20];
1716
1717 u8 ether_stats_oversize_pkts_high[0x20];
1718
1719 u8 ether_stats_oversize_pkts_low[0x20];
1720
1721 u8 ether_stats_fragments_high[0x20];
1722
1723 u8 ether_stats_fragments_low[0x20];
1724
1725 u8 ether_stats_jabbers_high[0x20];
1726
1727 u8 ether_stats_jabbers_low[0x20];
1728
1729 u8 ether_stats_collisions_high[0x20];
1730
1731 u8 ether_stats_collisions_low[0x20];
1732
1733 u8 ether_stats_pkts64octets_high[0x20];
1734
1735 u8 ether_stats_pkts64octets_low[0x20];
1736
1737 u8 ether_stats_pkts65to127octets_high[0x20];
1738
1739 u8 ether_stats_pkts65to127octets_low[0x20];
1740
1741 u8 ether_stats_pkts128to255octets_high[0x20];
1742
1743 u8 ether_stats_pkts128to255octets_low[0x20];
1744
1745 u8 ether_stats_pkts256to511octets_high[0x20];
1746
1747 u8 ether_stats_pkts256to511octets_low[0x20];
1748
1749 u8 ether_stats_pkts512to1023octets_high[0x20];
1750
1751 u8 ether_stats_pkts512to1023octets_low[0x20];
1752
1753 u8 ether_stats_pkts1024to1518octets_high[0x20];
1754
1755 u8 ether_stats_pkts1024to1518octets_low[0x20];
1756
1757 u8 ether_stats_pkts1519to2047octets_high[0x20];
1758
1759 u8 ether_stats_pkts1519to2047octets_low[0x20];
1760
1761 u8 ether_stats_pkts2048to4095octets_high[0x20];
1762
1763 u8 ether_stats_pkts2048to4095octets_low[0x20];
1764
1765 u8 ether_stats_pkts4096to8191octets_high[0x20];
1766
1767 u8 ether_stats_pkts4096to8191octets_low[0x20];
1768
1769 u8 ether_stats_pkts8192to10239octets_high[0x20];
1770
1771 u8 ether_stats_pkts8192to10239octets_low[0x20];
1772
Matan Barakb4ff3a32016-02-09 14:57:42 +02001773 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001774};
1775
1776struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1777 u8 if_in_octets_high[0x20];
1778
1779 u8 if_in_octets_low[0x20];
1780
1781 u8 if_in_ucast_pkts_high[0x20];
1782
1783 u8 if_in_ucast_pkts_low[0x20];
1784
1785 u8 if_in_discards_high[0x20];
1786
1787 u8 if_in_discards_low[0x20];
1788
1789 u8 if_in_errors_high[0x20];
1790
1791 u8 if_in_errors_low[0x20];
1792
1793 u8 if_in_unknown_protos_high[0x20];
1794
1795 u8 if_in_unknown_protos_low[0x20];
1796
1797 u8 if_out_octets_high[0x20];
1798
1799 u8 if_out_octets_low[0x20];
1800
1801 u8 if_out_ucast_pkts_high[0x20];
1802
1803 u8 if_out_ucast_pkts_low[0x20];
1804
1805 u8 if_out_discards_high[0x20];
1806
1807 u8 if_out_discards_low[0x20];
1808
1809 u8 if_out_errors_high[0x20];
1810
1811 u8 if_out_errors_low[0x20];
1812
1813 u8 if_in_multicast_pkts_high[0x20];
1814
1815 u8 if_in_multicast_pkts_low[0x20];
1816
1817 u8 if_in_broadcast_pkts_high[0x20];
1818
1819 u8 if_in_broadcast_pkts_low[0x20];
1820
1821 u8 if_out_multicast_pkts_high[0x20];
1822
1823 u8 if_out_multicast_pkts_low[0x20];
1824
1825 u8 if_out_broadcast_pkts_high[0x20];
1826
1827 u8 if_out_broadcast_pkts_low[0x20];
1828
Matan Barakb4ff3a32016-02-09 14:57:42 +02001829 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001830};
1831
1832struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1833 u8 a_frames_transmitted_ok_high[0x20];
1834
1835 u8 a_frames_transmitted_ok_low[0x20];
1836
1837 u8 a_frames_received_ok_high[0x20];
1838
1839 u8 a_frames_received_ok_low[0x20];
1840
1841 u8 a_frame_check_sequence_errors_high[0x20];
1842
1843 u8 a_frame_check_sequence_errors_low[0x20];
1844
1845 u8 a_alignment_errors_high[0x20];
1846
1847 u8 a_alignment_errors_low[0x20];
1848
1849 u8 a_octets_transmitted_ok_high[0x20];
1850
1851 u8 a_octets_transmitted_ok_low[0x20];
1852
1853 u8 a_octets_received_ok_high[0x20];
1854
1855 u8 a_octets_received_ok_low[0x20];
1856
1857 u8 a_multicast_frames_xmitted_ok_high[0x20];
1858
1859 u8 a_multicast_frames_xmitted_ok_low[0x20];
1860
1861 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1862
1863 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1864
1865 u8 a_multicast_frames_received_ok_high[0x20];
1866
1867 u8 a_multicast_frames_received_ok_low[0x20];
1868
1869 u8 a_broadcast_frames_received_ok_high[0x20];
1870
1871 u8 a_broadcast_frames_received_ok_low[0x20];
1872
1873 u8 a_in_range_length_errors_high[0x20];
1874
1875 u8 a_in_range_length_errors_low[0x20];
1876
1877 u8 a_out_of_range_length_field_high[0x20];
1878
1879 u8 a_out_of_range_length_field_low[0x20];
1880
1881 u8 a_frame_too_long_errors_high[0x20];
1882
1883 u8 a_frame_too_long_errors_low[0x20];
1884
1885 u8 a_symbol_error_during_carrier_high[0x20];
1886
1887 u8 a_symbol_error_during_carrier_low[0x20];
1888
1889 u8 a_mac_control_frames_transmitted_high[0x20];
1890
1891 u8 a_mac_control_frames_transmitted_low[0x20];
1892
1893 u8 a_mac_control_frames_received_high[0x20];
1894
1895 u8 a_mac_control_frames_received_low[0x20];
1896
1897 u8 a_unsupported_opcodes_received_high[0x20];
1898
1899 u8 a_unsupported_opcodes_received_low[0x20];
1900
1901 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1902
1903 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1904
1905 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1906
1907 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1908
Matan Barakb4ff3a32016-02-09 14:57:42 +02001909 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001910};
1911
Gal Pressman8ed1a632016-11-17 13:46:01 +02001912struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1913 u8 life_time_counter_high[0x20];
1914
1915 u8 life_time_counter_low[0x20];
1916
1917 u8 rx_errors[0x20];
1918
1919 u8 tx_errors[0x20];
1920
1921 u8 l0_to_recovery_eieos[0x20];
1922
1923 u8 l0_to_recovery_ts[0x20];
1924
1925 u8 l0_to_recovery_framing[0x20];
1926
1927 u8 l0_to_recovery_retrain[0x20];
1928
1929 u8 crc_error_dllp[0x20];
1930
1931 u8 crc_error_tlp[0x20];
1932
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001933 u8 tx_overflow_buffer_pkt_high[0x20];
1934
1935 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001936
1937 u8 outbound_stalled_reads[0x20];
1938
1939 u8 outbound_stalled_writes[0x20];
1940
1941 u8 outbound_stalled_reads_events[0x20];
1942
1943 u8 outbound_stalled_writes_events[0x20];
1944
1945 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001946};
1947
Saeed Mahameede2816822015-05-28 22:28:40 +03001948struct mlx5_ifc_cmd_inter_comp_event_bits {
1949 u8 command_completion_vector[0x20];
1950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952};
1953
1954struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001957 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001958 u8 vl[0x4];
1959
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961};
1962
1963struct mlx5_ifc_db_bf_congestion_event_bits {
1964 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001965 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001966 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970};
1971
1972struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974
1975 u8 gpio_event_hi[0x20];
1976
1977 u8 gpio_event_lo[0x20];
1978
Matan Barakb4ff3a32016-02-09 14:57:42 +02001979 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001980};
1981
1982struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001983 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001984
1985 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987
Matan Barakb4ff3a32016-02-09 14:57:42 +02001988 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001989};
1990
1991struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001992 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001993};
1994
1995enum {
1996 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1997 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1998};
1999
2000struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002001 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002002 u8 cqn[0x18];
2003
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005
Matan Barakb4ff3a32016-02-09 14:57:42 +02002006 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002007 u8 syndrome[0x8];
2008
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010};
2011
2012struct mlx5_ifc_rdma_page_fault_event_bits {
2013 u8 bytes_committed[0x20];
2014
2015 u8 r_key[0x20];
2016
Matan Barakb4ff3a32016-02-09 14:57:42 +02002017 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002018 u8 packet_len[0x10];
2019
2020 u8 rdma_op_len[0x20];
2021
2022 u8 rdma_va[0x40];
2023
Matan Barakb4ff3a32016-02-09 14:57:42 +02002024 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002025 u8 rdma[0x1];
2026 u8 write[0x1];
2027 u8 requestor[0x1];
2028 u8 qp_number[0x18];
2029};
2030
2031struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2032 u8 bytes_committed[0x20];
2033
Matan Barakb4ff3a32016-02-09 14:57:42 +02002034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002035 u8 wqe_index[0x10];
2036
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038 u8 len[0x10];
2039
Matan Barakb4ff3a32016-02-09 14:57:42 +02002040 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002041
Matan Barakb4ff3a32016-02-09 14:57:42 +02002042 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002043 u8 rdma[0x1];
2044 u8 write_read[0x1];
2045 u8 requestor[0x1];
2046 u8 qpn[0x18];
2047};
2048
2049struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002050 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002051
2052 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002053 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054
Matan Barakb4ff3a32016-02-09 14:57:42 +02002055 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 u8 qpn_rqn_sqn[0x18];
2057};
2058
2059struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002060 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061
Matan Barakb4ff3a32016-02-09 14:57:42 +02002062 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002063 u8 dct_number[0x18];
2064};
2065
2066struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002067 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002068
Matan Barakb4ff3a32016-02-09 14:57:42 +02002069 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002070 u8 cq_number[0x18];
2071};
2072
2073enum {
2074 MLX5_QPC_STATE_RST = 0x0,
2075 MLX5_QPC_STATE_INIT = 0x1,
2076 MLX5_QPC_STATE_RTR = 0x2,
2077 MLX5_QPC_STATE_RTS = 0x3,
2078 MLX5_QPC_STATE_SQER = 0x4,
2079 MLX5_QPC_STATE_ERR = 0x6,
2080 MLX5_QPC_STATE_SQD = 0x7,
2081 MLX5_QPC_STATE_SUSPENDED = 0x9,
2082};
2083
2084enum {
2085 MLX5_QPC_ST_RC = 0x0,
2086 MLX5_QPC_ST_UC = 0x1,
2087 MLX5_QPC_ST_UD = 0x2,
2088 MLX5_QPC_ST_XRC = 0x3,
2089 MLX5_QPC_ST_DCI = 0x5,
2090 MLX5_QPC_ST_QP0 = 0x7,
2091 MLX5_QPC_ST_QP1 = 0x8,
2092 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2093 MLX5_QPC_ST_REG_UMR = 0xc,
2094};
2095
2096enum {
2097 MLX5_QPC_PM_STATE_ARMED = 0x0,
2098 MLX5_QPC_PM_STATE_REARM = 0x1,
2099 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2100 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2101};
2102
2103enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002104 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2105};
2106
2107enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2109 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2110};
2111
2112enum {
2113 MLX5_QPC_MTU_256_BYTES = 0x1,
2114 MLX5_QPC_MTU_512_BYTES = 0x2,
2115 MLX5_QPC_MTU_1K_BYTES = 0x3,
2116 MLX5_QPC_MTU_2K_BYTES = 0x4,
2117 MLX5_QPC_MTU_4K_BYTES = 0x5,
2118 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2119};
2120
2121enum {
2122 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2123 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2124 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2125 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2126 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2127 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2128 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2129 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2130};
2131
2132enum {
2133 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2134 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2135 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2136};
2137
2138enum {
2139 MLX5_QPC_CS_RES_DISABLE = 0x0,
2140 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2141 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2142};
2143
2144struct mlx5_ifc_qpc_bits {
2145 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002146 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002148 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002149 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002150 u8 reserved_at_15[0x3];
2151 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002153 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002154
2155 u8 wq_signature[0x1];
2156 u8 block_lb_mc[0x1];
2157 u8 atomic_like_write_en[0x1];
2158 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002159 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002160 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 pd[0x18];
2163
2164 u8 mtu[0x3];
2165 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167 u8 log_rq_size[0x4];
2168 u8 log_rq_stride[0x3];
2169 u8 no_sq[0x1];
2170 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002173 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002174
2175 u8 counter_set_id[0x8];
2176 u8 uar_page[0x18];
2177
Matan Barakb4ff3a32016-02-09 14:57:42 +02002178 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002179 u8 user_index[0x18];
2180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 log_page_size[0x5];
2183 u8 remote_qpn[0x18];
2184
2185 struct mlx5_ifc_ads_bits primary_address_path;
2186
2187 struct mlx5_ifc_ads_bits secondary_address_path;
2188
2189 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002192 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002193 u8 retry_count[0x3];
2194 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196 u8 fre[0x1];
2197 u8 cur_rnr_retry[0x3];
2198 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002199 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200
Matan Barakb4ff3a32016-02-09 14:57:42 +02002201 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002202
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204 u8 next_send_psn[0x18];
2205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207 u8 cqn_snd[0x18];
2208
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002209 u8 reserved_at_400[0x8];
2210 u8 deth_sqpn[0x18];
2211
2212 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213
Matan Barakb4ff3a32016-02-09 14:57:42 +02002214 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002215 u8 last_acked_psn[0x18];
2216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218 u8 ssn[0x18];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002222 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002223 u8 atomic_mode[0x4];
2224 u8 rre[0x1];
2225 u8 rwe[0x1];
2226 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002227 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002228 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002229 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002230 u8 cd_slave_receive[0x1];
2231 u8 cd_slave_send[0x1];
2232 u8 cd_master[0x1];
2233
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 min_rnr_nak[0x5];
2236 u8 next_rcv_psn[0x18];
2237
Matan Barakb4ff3a32016-02-09 14:57:42 +02002238 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002239 u8 xrcd[0x18];
2240
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 cqn_rcv[0x18];
2243
2244 u8 dbr_addr[0x40];
2245
2246 u8 q_key[0x20];
2247
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002250 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251
Matan Barakb4ff3a32016-02-09 14:57:42 +02002252 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253 u8 rmsn[0x18];
2254
2255 u8 hw_sq_wqebb_counter[0x10];
2256 u8 sw_sq_wqebb_counter[0x10];
2257
2258 u8 hw_rq_counter[0x20];
2259
2260 u8 sw_rq_counter[0x20];
2261
Matan Barakb4ff3a32016-02-09 14:57:42 +02002262 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002263
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265 u8 cgs[0x1];
2266 u8 cs_req[0x8];
2267 u8 cs_res[0x8];
2268
2269 u8 dc_access_key[0x40];
2270
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272};
2273
2274struct mlx5_ifc_roce_addr_layout_bits {
2275 u8 source_l3_address[16][0x8];
2276
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278 u8 vlan_valid[0x1];
2279 u8 vlan_id[0xc];
2280 u8 source_mac_47_32[0x10];
2281
2282 u8 source_mac_31_0[0x20];
2283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285 u8 roce_l3_type[0x4];
2286 u8 roce_version[0x8];
2287
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289};
2290
2291union mlx5_ifc_hca_cap_union_bits {
2292 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2293 struct mlx5_ifc_odp_cap_bits odp_cap;
2294 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2295 struct mlx5_ifc_roce_cap_bits roce_cap;
2296 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2297 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002298 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002299 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002300 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002301 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002302 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304};
2305
2306enum {
2307 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2308 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2309 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002310 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002311 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2312 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002313 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002314};
2315
2316struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
2319 u8 group_id[0x20];
2320
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322 u8 flow_tag[0x18];
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325 u8 action[0x10];
2326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 destination_list_size[0x18];
2329
Amir Vadai9dc0b282016-05-13 12:55:39 +00002330 u8 reserved_at_a0[0x8];
2331 u8 flow_counter_list_size[0x18];
2332
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002333 u8 encap_id[0x20];
2334
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002335 u8 modify_header_id[0x20];
2336
2337 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338
2339 struct mlx5_ifc_fte_match_param_bits match_value;
2340
Matan Barakb4ff3a32016-02-09 14:57:42 +02002341 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342
Amir Vadai9dc0b282016-05-13 12:55:39 +00002343 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002344};
2345
2346enum {
2347 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2348 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2349};
2350
2351struct mlx5_ifc_xrc_srqc_bits {
2352 u8 state[0x4];
2353 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355
2356 u8 wq_signature[0x1];
2357 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359 u8 rlky[0x1];
2360 u8 basic_cyclic_rcv_wqe[0x1];
2361 u8 log_rq_stride[0x3];
2362 u8 xrcd[0x18];
2363
2364 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002365 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366 u8 cqn[0x18];
2367
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369
2370 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372 u8 log_page_size[0x6];
2373 u8 user_index[0x18];
2374
Matan Barakb4ff3a32016-02-09 14:57:42 +02002375 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002376
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378 u8 pd[0x18];
2379
2380 u8 lwm[0x10];
2381 u8 wqe_cnt[0x10];
2382
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384
2385 u8 db_record_addr_h[0x20];
2386
2387 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391};
2392
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002393struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2394 u8 counter_error_queues[0x20];
2395
2396 u8 total_error_queues[0x20];
2397
2398 u8 send_queue_priority_update_flow[0x20];
2399
2400 u8 reserved_at_60[0x20];
2401
2402 u8 nic_receive_steering_discard[0x40];
2403
2404 u8 receive_discard_vport_down[0x40];
2405
2406 u8 transmit_discard_vport_down[0x40];
2407
2408 u8 reserved_at_140[0xec0];
2409};
2410
Saeed Mahameede2816822015-05-28 22:28:40 +03002411struct mlx5_ifc_traffic_counter_bits {
2412 u8 packets[0x40];
2413
2414 u8 octets[0x40];
2415};
2416
2417struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002418 u8 strict_lag_tx_port_affinity[0x1];
2419 u8 reserved_at_1[0x3];
2420 u8 lag_tx_port_affinity[0x04];
2421
2422 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002424 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425
Matan Barakb4ff3a32016-02-09 14:57:42 +02002426 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429 u8 transport_domain[0x18];
2430
Erez Shitrit500a3d02017-04-13 06:36:51 +03002431 u8 reserved_at_140[0x8];
2432 u8 underlay_qpn[0x18];
2433 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002434};
2435
2436enum {
2437 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2438 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2439};
2440
2441enum {
2442 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2443 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2444};
2445
2446enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002447 MLX5_RX_HASH_FN_NONE = 0x0,
2448 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2449 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002450};
2451
2452enum {
2453 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2454 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2455};
2456
2457struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002458 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459
2460 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466 u8 lro_timeout_period_usecs[0x10];
2467 u8 lro_enable_mask[0x4];
2468 u8 lro_max_ip_payload_size[0x8];
2469
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471
Matan Barakb4ff3a32016-02-09 14:57:42 +02002472 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002473 u8 inline_rqn[0x18];
2474
2475 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002476 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002477 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002478 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002479 u8 indirect_table[0x18];
2480
2481 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002482 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483 u8 self_lb_block[0x2];
2484 u8 transport_domain[0x18];
2485
2486 u8 rx_hash_toeplitz_key[10][0x20];
2487
2488 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2489
2490 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2491
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493};
2494
2495enum {
2496 MLX5_SRQC_STATE_GOOD = 0x0,
2497 MLX5_SRQC_STATE_ERROR = 0x1,
2498};
2499
2500struct mlx5_ifc_srqc_bits {
2501 u8 state[0x4];
2502 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002503 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002504
2505 u8 wq_signature[0x1];
2506 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002507 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002508 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002509 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002510 u8 log_rq_stride[0x3];
2511 u8 xrcd[0x18];
2512
2513 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515 u8 cqn[0x18];
2516
Matan Barakb4ff3a32016-02-09 14:57:42 +02002517 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002518
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526 u8 pd[0x18];
2527
2528 u8 lwm[0x10];
2529 u8 wqe_cnt[0x10];
2530
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002533 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536};
2537
2538enum {
2539 MLX5_SQC_STATE_RST = 0x0,
2540 MLX5_SQC_STATE_RDY = 0x1,
2541 MLX5_SQC_STATE_ERR = 0x3,
2542};
2543
2544struct mlx5_ifc_sqc_bits {
2545 u8 rlky[0x1];
2546 u8 cd_master[0x1];
2547 u8 fre[0x1];
2548 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002549 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002550 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002551 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002552 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002553 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002554 u8 hairpin[0x1];
2555 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558 u8 user_index[0x18];
2559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561 u8 cqn[0x18];
2562
Or Gerlitz40817cd2017-06-25 12:38:45 +03002563 u8 reserved_at_60[0x8];
2564 u8 hairpin_peer_rq[0x18];
2565
2566 u8 reserved_at_80[0x10];
2567 u8 hairpin_peer_vhca[0x10];
2568
2569 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570
Saeed Mahameed74862162016-06-09 15:11:34 +03002571 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578 u8 tis_num_0[0x18];
2579
2580 struct mlx5_ifc_wq_bits wq;
2581};
2582
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002583enum {
2584 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2585 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2586 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2587 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2588};
2589
2590struct mlx5_ifc_scheduling_context_bits {
2591 u8 element_type[0x8];
2592 u8 reserved_at_8[0x18];
2593
2594 u8 element_attributes[0x20];
2595
2596 u8 parent_element_id[0x20];
2597
2598 u8 reserved_at_60[0x40];
2599
2600 u8 bw_share[0x20];
2601
2602 u8 max_average_bw[0x20];
2603
2604 u8 reserved_at_e0[0x120];
2605};
2606
Saeed Mahameede2816822015-05-28 22:28:40 +03002607struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002608 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002609
Matan Barakb4ff3a32016-02-09 14:57:42 +02002610 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002611 u8 rqt_max_size[0x10];
2612
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 rqt_actual_size[0x10];
2615
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617
2618 struct mlx5_ifc_rq_num_bits rq_num[0];
2619};
2620
2621enum {
2622 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2623 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2624};
2625
2626enum {
2627 MLX5_RQC_STATE_RST = 0x0,
2628 MLX5_RQC_STATE_RDY = 0x1,
2629 MLX5_RQC_STATE_ERR = 0x3,
2630};
2631
2632struct mlx5_ifc_rqc_bits {
2633 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002634 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002635 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002636 u8 vsd[0x1];
2637 u8 mem_rq_type[0x4];
2638 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002639 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002640 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002641 u8 hairpin[0x1];
2642 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645 u8 user_index[0x18];
2646
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648 u8 cqn[0x18];
2649
2650 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002651 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652
Matan Barakb4ff3a32016-02-09 14:57:42 +02002653 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002654 u8 rmpn[0x18];
2655
Or Gerlitz40817cd2017-06-25 12:38:45 +03002656 u8 reserved_at_a0[0x8];
2657 u8 hairpin_peer_sq[0x18];
2658
2659 u8 reserved_at_c0[0x10];
2660 u8 hairpin_peer_vhca[0x10];
2661
2662 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002663
2664 struct mlx5_ifc_wq_bits wq;
2665};
2666
2667enum {
2668 MLX5_RMPC_STATE_RDY = 0x1,
2669 MLX5_RMPC_STATE_ERR = 0x3,
2670};
2671
2672struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002673 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676
2677 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002678 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002679
Matan Barakb4ff3a32016-02-09 14:57:42 +02002680 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681
2682 struct mlx5_ifc_wq_bits wq;
2683};
2684
Saeed Mahameede2816822015-05-28 22:28:40 +03002685struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002686 u8 reserved_at_0[0x5];
2687 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002688 u8 reserved_at_8[0x15];
2689 u8 disable_mc_local_lb[0x1];
2690 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691 u8 roce_en[0x1];
2692
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002693 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002694 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002695 u8 event_on_mtu[0x1];
2696 u8 event_on_promisc_change[0x1];
2697 u8 event_on_vlan_change[0x1];
2698 u8 event_on_mc_address_change[0x1];
2699 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002700
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002701 u8 reserved_at_40[0xc];
2702
2703 u8 affiliation_criteria[0x4];
2704 u8 affiliated_vhca_id[0x10];
2705
2706 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002707
2708 u8 mtu[0x10];
2709
Achiad Shochat9efa7522015-12-23 18:47:20 +02002710 u8 system_image_guid[0x40];
2711 u8 port_guid[0x40];
2712 u8 node_guid[0x40];
2713
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002715 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002716 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002717
2718 u8 promisc_uc[0x1];
2719 u8 promisc_mc[0x1];
2720 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002721 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002722 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002723 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002724 u8 allowed_list_size[0xc];
2725
2726 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2727
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002729
2730 u8 current_uc_mac_address[0][0x40];
2731};
2732
2733enum {
2734 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2735 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2736 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002737 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002738};
2739
2740struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 small_fence_on_rdma_read_response[0x1];
2745 u8 umr_en[0x1];
2746 u8 a[0x1];
2747 u8 rw[0x1];
2748 u8 rr[0x1];
2749 u8 lw[0x1];
2750 u8 lr[0x1];
2751 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753
2754 u8 qpn[0x18];
2755 u8 mkey_7_0[0x8];
2756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758
2759 u8 length64[0x1];
2760 u8 bsf_en[0x1];
2761 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765 u8 en_rinval[0x1];
2766 u8 pd[0x18];
2767
2768 u8 start_addr[0x40];
2769
2770 u8 len[0x40];
2771
2772 u8 bsf_octword_size[0x20];
2773
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775
2776 u8 translations_octword_size[0x20];
2777
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779 u8 log_page_size[0x5];
2780
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782};
2783
2784struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786 u8 pkey[0x10];
2787};
2788
2789struct mlx5_ifc_array128_auto_bits {
2790 u8 array128_auto[16][0x8];
2791};
2792
2793struct mlx5_ifc_hca_vport_context_bits {
2794 u8 field_select[0x20];
2795
Matan Barakb4ff3a32016-02-09 14:57:42 +02002796 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002797
2798 u8 sm_virt_aware[0x1];
2799 u8 has_smi[0x1];
2800 u8 has_raw[0x1];
2801 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002803 u8 port_physical_state[0x4];
2804 u8 vport_state_policy[0x4];
2805 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 vport_state[0x4];
2807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002809
2810 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811
2812 u8 port_guid[0x40];
2813
2814 u8 node_guid[0x40];
2815
2816 u8 cap_mask1[0x20];
2817
2818 u8 cap_mask1_field_select[0x20];
2819
2820 u8 cap_mask2[0x20];
2821
2822 u8 cap_mask2_field_select[0x20];
2823
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825
2826 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002828 u8 init_type_reply[0x4];
2829 u8 lmc[0x3];
2830 u8 subnet_timeout[0x5];
2831
2832 u8 sm_lid[0x10];
2833 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002834 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002835
2836 u8 qkey_violation_counter[0x10];
2837 u8 pkey_violation_counter[0x10];
2838
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840};
2841
Saeed Mahameedd6666752015-12-01 18:03:22 +02002842struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002844 u8 vport_svlan_strip[0x1];
2845 u8 vport_cvlan_strip[0x1];
2846 u8 vport_svlan_insert[0x1];
2847 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002848 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002849
Matan Barakb4ff3a32016-02-09 14:57:42 +02002850 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002851
2852 u8 svlan_cfi[0x1];
2853 u8 svlan_pcp[0x3];
2854 u8 svlan_id[0xc];
2855 u8 cvlan_cfi[0x1];
2856 u8 cvlan_pcp[0x3];
2857 u8 cvlan_id[0xc];
2858
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002860};
2861
Saeed Mahameede2816822015-05-28 22:28:40 +03002862enum {
2863 MLX5_EQC_STATUS_OK = 0x0,
2864 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2865};
2866
2867enum {
2868 MLX5_EQC_ST_ARMED = 0x9,
2869 MLX5_EQC_ST_FIRED = 0xa,
2870};
2871
2872struct mlx5_ifc_eqc_bits {
2873 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875 u8 ec[0x1];
2876 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002877 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002878 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002879 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002880
Matan Barakb4ff3a32016-02-09 14:57:42 +02002881 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002882
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 log_eq_size[0x5];
2889 u8 uar_page[0x18];
2890
Matan Barakb4ff3a32016-02-09 14:57:42 +02002891 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 intr[0x8];
2895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002898 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903 u8 consumer_counter[0x18];
2904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 producer_counter[0x18];
2907
Matan Barakb4ff3a32016-02-09 14:57:42 +02002908 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002909};
2910
2911enum {
2912 MLX5_DCTC_STATE_ACTIVE = 0x0,
2913 MLX5_DCTC_STATE_DRAINING = 0x1,
2914 MLX5_DCTC_STATE_DRAINED = 0x2,
2915};
2916
2917enum {
2918 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2919 MLX5_DCTC_CS_RES_NA = 0x1,
2920 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2921};
2922
2923enum {
2924 MLX5_DCTC_MTU_256_BYTES = 0x1,
2925 MLX5_DCTC_MTU_512_BYTES = 0x2,
2926 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2927 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2928 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2929};
2930
2931struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002932 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002933 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935
Matan Barakb4ff3a32016-02-09 14:57:42 +02002936 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002937 u8 user_index[0x18];
2938
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940 u8 cqn[0x18];
2941
2942 u8 counter_set_id[0x8];
2943 u8 atomic_mode[0x4];
2944 u8 rre[0x1];
2945 u8 rwe[0x1];
2946 u8 rae[0x1];
2947 u8 atomic_like_write_en[0x1];
2948 u8 latency_sensitive[0x1];
2949 u8 rlky[0x1];
2950 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952
Matan Barakb4ff3a32016-02-09 14:57:42 +02002953 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002954 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002955 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002956 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002957 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002958
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002960 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002961
Matan Barakb4ff3a32016-02-09 14:57:42 +02002962 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002963 u8 pd[0x18];
2964
2965 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967 u8 flow_label[0x14];
2968
2969 u8 dc_access_key[0x40];
2970
Matan Barakb4ff3a32016-02-09 14:57:42 +02002971 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002972 u8 mtu[0x3];
2973 u8 port[0x8];
2974 u8 pkey_index[0x10];
2975
Matan Barakb4ff3a32016-02-09 14:57:42 +02002976 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002977 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002978 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002979 u8 hop_limit[0x8];
2980
2981 u8 dc_access_key_violation_count[0x20];
2982
Matan Barakb4ff3a32016-02-09 14:57:42 +02002983 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002984 u8 dei_cfi[0x1];
2985 u8 eth_prio[0x3];
2986 u8 ecn[0x2];
2987 u8 dscp[0x6];
2988
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990};
2991
2992enum {
2993 MLX5_CQC_STATUS_OK = 0x0,
2994 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2995 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2996};
2997
2998enum {
2999 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3000 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3001};
3002
3003enum {
3004 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3005 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3006 MLX5_CQC_ST_FIRED = 0xa,
3007};
3008
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003009enum {
3010 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3011 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003012 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003013};
3014
Saeed Mahameede2816822015-05-28 22:28:40 +03003015struct mlx5_ifc_cqc_bits {
3016 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003017 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003018 u8 cqe_sz[0x3];
3019 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003020 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003021 u8 scqe_break_moderation_en[0x1];
3022 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003023 u8 cq_period_mode[0x2];
3024 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003025 u8 mini_cqe_res_format[0x2];
3026 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003027 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003028
Matan Barakb4ff3a32016-02-09 14:57:42 +02003029 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003030
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034
Matan Barakb4ff3a32016-02-09 14:57:42 +02003035 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003036 u8 log_cq_size[0x5];
3037 u8 uar_page[0x18];
3038
Matan Barakb4ff3a32016-02-09 14:57:42 +02003039 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003040 u8 cq_period[0xc];
3041 u8 cq_max_count[0x10];
3042
Matan Barakb4ff3a32016-02-09 14:57:42 +02003043 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003044 u8 c_eqn[0x8];
3045
Matan Barakb4ff3a32016-02-09 14:57:42 +02003046 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003047 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003048 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003049
Matan Barakb4ff3a32016-02-09 14:57:42 +02003050 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003051
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053 u8 last_notified_index[0x18];
3054
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056 u8 last_solicit_index[0x18];
3057
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059 u8 consumer_counter[0x18];
3060
Matan Barakb4ff3a32016-02-09 14:57:42 +02003061 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003062 u8 producer_counter[0x18];
3063
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065
3066 u8 dbr_addr[0x40];
3067};
3068
3069union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3070 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3071 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3072 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003073 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003074};
3075
3076struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003077 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003078
Matan Barakb4ff3a32016-02-09 14:57:42 +02003079 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003080 u8 ieee_vendor_id[0x18];
3081
Matan Barakb4ff3a32016-02-09 14:57:42 +02003082 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003083 u8 vsd_vendor_id[0x10];
3084
3085 u8 vsd[208][0x8];
3086
3087 u8 vsd_contd_psid[16][0x8];
3088};
3089
Saeed Mahameed74862162016-06-09 15:11:34 +03003090enum {
3091 MLX5_XRQC_STATE_GOOD = 0x0,
3092 MLX5_XRQC_STATE_ERROR = 0x1,
3093};
3094
3095enum {
3096 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3097 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3098};
3099
3100enum {
3101 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3102};
3103
3104struct mlx5_ifc_tag_matching_topology_context_bits {
3105 u8 log_matching_list_sz[0x4];
3106 u8 reserved_at_4[0xc];
3107 u8 append_next_index[0x10];
3108
3109 u8 sw_phase_cnt[0x10];
3110 u8 hw_phase_cnt[0x10];
3111
3112 u8 reserved_at_40[0x40];
3113};
3114
3115struct mlx5_ifc_xrqc_bits {
3116 u8 state[0x4];
3117 u8 rlkey[0x1];
3118 u8 reserved_at_5[0xf];
3119 u8 topology[0x4];
3120 u8 reserved_at_18[0x4];
3121 u8 offload[0x4];
3122
3123 u8 reserved_at_20[0x8];
3124 u8 user_index[0x18];
3125
3126 u8 reserved_at_40[0x8];
3127 u8 cqn[0x18];
3128
3129 u8 reserved_at_60[0xa0];
3130
3131 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3132
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003133 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003134
3135 struct mlx5_ifc_wq_bits wq;
3136};
3137
Saeed Mahameede2816822015-05-28 22:28:40 +03003138union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3139 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3140 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003141 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003142};
3143
3144union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3145 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3146 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3147 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003148 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003149};
3150
3151union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3152 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3153 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3154 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3155 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3156 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3157 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3158 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003159 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003160 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003161 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003162 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003163};
3164
Gal Pressman8ed1a632016-11-17 13:46:01 +02003165union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3166 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3167 u8 reserved_at_0[0x7c0];
3168};
3169
Saeed Mahameede2816822015-05-28 22:28:40 +03003170union mlx5_ifc_event_auto_bits {
3171 struct mlx5_ifc_comp_event_bits comp_event;
3172 struct mlx5_ifc_dct_events_bits dct_events;
3173 struct mlx5_ifc_qp_events_bits qp_events;
3174 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3175 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3176 struct mlx5_ifc_cq_error_bits cq_error;
3177 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3178 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3179 struct mlx5_ifc_gpio_event_bits gpio_event;
3180 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3181 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3182 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184};
3185
3186struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003187 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003188
3189 u8 assert_existptr[0x20];
3190
3191 u8 assert_callra[0x20];
3192
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194
3195 u8 fw_version[0x20];
3196
3197 u8 hw_id[0x20];
3198
Matan Barakb4ff3a32016-02-09 14:57:42 +02003199 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003200
3201 u8 irisc_index[0x8];
3202 u8 synd[0x8];
3203 u8 ext_synd[0x10];
3204};
3205
3206struct mlx5_ifc_register_loopback_control_bits {
3207 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
Matan Barakb4ff3a32016-02-09 14:57:42 +02003212 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003213};
3214
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003215struct mlx5_ifc_vport_tc_element_bits {
3216 u8 traffic_class[0x4];
3217 u8 reserved_at_4[0xc];
3218 u8 vport_number[0x10];
3219};
3220
3221struct mlx5_ifc_vport_element_bits {
3222 u8 reserved_at_0[0x10];
3223 u8 vport_number[0x10];
3224};
3225
3226enum {
3227 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3228 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3229 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3230};
3231
3232struct mlx5_ifc_tsar_element_bits {
3233 u8 reserved_at_0[0x8];
3234 u8 tsar_type[0x8];
3235 u8 reserved_at_10[0x10];
3236};
3237
Majd Dibbiny8812c242017-02-09 14:20:12 +02003238enum {
3239 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3240 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3241};
3242
Saeed Mahameede2816822015-05-28 22:28:40 +03003243struct mlx5_ifc_teardown_hca_out_bits {
3244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246
3247 u8 syndrome[0x20];
3248
Majd Dibbiny8812c242017-02-09 14:20:12 +02003249 u8 reserved_at_40[0x3f];
3250
3251 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252};
3253
3254enum {
3255 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003256 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003257};
3258
3259struct mlx5_ifc_teardown_hca_in_bits {
3260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264 u8 op_mod[0x10];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267 u8 profile[0x10];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270};
3271
3272struct mlx5_ifc_sqerr2rts_qp_out_bits {
3273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
3276 u8 syndrome[0x20];
3277
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279};
3280
3281struct mlx5_ifc_sqerr2rts_qp_in_bits {
3282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286 u8 op_mod[0x10];
3287
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289 u8 qpn[0x18];
3290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292
3293 u8 opt_param_mask[0x20];
3294
Matan Barakb4ff3a32016-02-09 14:57:42 +02003295 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003296
3297 struct mlx5_ifc_qpc_bits qpc;
3298
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300};
3301
3302struct mlx5_ifc_sqd2rts_qp_out_bits {
3303 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305
3306 u8 syndrome[0x20];
3307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309};
3310
3311struct mlx5_ifc_sqd2rts_qp_in_bits {
3312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003316 u8 op_mod[0x10];
3317
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003319 u8 qpn[0x18];
3320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322
3323 u8 opt_param_mask[0x20];
3324
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326
3327 struct mlx5_ifc_qpc_bits qpc;
3328
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330};
3331
3332struct mlx5_ifc_set_roce_address_out_bits {
3333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335
3336 u8 syndrome[0x20];
3337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339};
3340
3341struct mlx5_ifc_set_roce_address_in_bits {
3342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346 u8 op_mod[0x10];
3347
3348 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003349 u8 reserved_at_50[0xc];
3350 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003351
Matan Barakb4ff3a32016-02-09 14:57:42 +02003352 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
3354 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3355};
3356
3357struct mlx5_ifc_set_mad_demux_out_bits {
3358 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360
3361 u8 syndrome[0x20];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364};
3365
3366enum {
3367 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3368 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3369};
3370
3371struct mlx5_ifc_set_mad_demux_in_bits {
3372 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003373 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003374
Matan Barakb4ff3a32016-02-09 14:57:42 +02003375 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003376 u8 op_mod[0x10];
3377
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379
Matan Barakb4ff3a32016-02-09 14:57:42 +02003380 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003381 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003382 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003383};
3384
3385struct mlx5_ifc_set_l2_table_entry_out_bits {
3386 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388
3389 u8 syndrome[0x20];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392};
3393
3394struct mlx5_ifc_set_l2_table_entry_in_bits {
3395 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003396 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003397
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399 u8 op_mod[0x10];
3400
Matan Barakb4ff3a32016-02-09 14:57:42 +02003401 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404 u8 table_index[0x18];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409 u8 vlan_valid[0x1];
3410 u8 vlan[0xc];
3411
3412 struct mlx5_ifc_mac_address_layout_bits mac_address;
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415};
3416
3417struct mlx5_ifc_set_issi_out_bits {
3418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
3421 u8 syndrome[0x20];
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424};
3425
3426struct mlx5_ifc_set_issi_in_bits {
3427 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003431 u8 op_mod[0x10];
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003434 u8 current_issi[0x10];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437};
3438
3439struct mlx5_ifc_set_hca_cap_out_bits {
3440 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442
3443 u8 syndrome[0x20];
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003446};
3447
3448struct mlx5_ifc_set_hca_cap_in_bits {
3449 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003450 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003451
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003453 u8 op_mod[0x10];
3454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003456
Saeed Mahameede2816822015-05-28 22:28:40 +03003457 union mlx5_ifc_hca_cap_union_bits capability;
3458};
3459
Maor Gottlieb26a81452015-12-10 17:12:39 +02003460enum {
3461 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3462 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3463 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3464 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3465};
3466
Saeed Mahameede2816822015-05-28 22:28:40 +03003467struct mlx5_ifc_set_fte_out_bits {
3468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003470
3471 u8 syndrome[0x20];
3472
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003474};
3475
3476struct mlx5_ifc_set_fte_in_bits {
3477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003481 u8 op_mod[0x10];
3482
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003483 u8 other_vport[0x1];
3484 u8 reserved_at_41[0xf];
3485 u8 vport_number[0x10];
3486
3487 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003488
3489 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003490 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493 u8 table_id[0x18];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003496 u8 modify_enable_mask[0x8];
3497
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
3500 u8 flow_index[0x20];
3501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
3504 struct mlx5_ifc_flow_context_bits flow_context;
3505};
3506
3507struct mlx5_ifc_rts2rts_qp_out_bits {
3508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510
3511 u8 syndrome[0x20];
3512
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514};
3515
3516struct mlx5_ifc_rts2rts_qp_in_bits {
3517 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519
Matan Barakb4ff3a32016-02-09 14:57:42 +02003520 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003521 u8 op_mod[0x10];
3522
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003524 u8 qpn[0x18];
3525
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003527
3528 u8 opt_param_mask[0x20];
3529
Matan Barakb4ff3a32016-02-09 14:57:42 +02003530 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003531
3532 struct mlx5_ifc_qpc_bits qpc;
3533
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535};
3536
3537struct mlx5_ifc_rtr2rts_qp_out_bits {
3538 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
3541 u8 syndrome[0x20];
3542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544};
3545
3546struct mlx5_ifc_rtr2rts_qp_in_bits {
3547 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549
Matan Barakb4ff3a32016-02-09 14:57:42 +02003550 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003551 u8 op_mod[0x10];
3552
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554 u8 qpn[0x18];
3555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557
3558 u8 opt_param_mask[0x20];
3559
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561
3562 struct mlx5_ifc_qpc_bits qpc;
3563
Matan Barakb4ff3a32016-02-09 14:57:42 +02003564 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003565};
3566
3567struct mlx5_ifc_rst2init_qp_out_bits {
3568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570
3571 u8 syndrome[0x20];
3572
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574};
3575
3576struct mlx5_ifc_rst2init_qp_in_bits {
3577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003579
Matan Barakb4ff3a32016-02-09 14:57:42 +02003580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003581 u8 op_mod[0x10];
3582
Matan Barakb4ff3a32016-02-09 14:57:42 +02003583 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003584 u8 qpn[0x18];
3585
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587
3588 u8 opt_param_mask[0x20];
3589
Matan Barakb4ff3a32016-02-09 14:57:42 +02003590 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003591
3592 struct mlx5_ifc_qpc_bits qpc;
3593
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595};
3596
Saeed Mahameed74862162016-06-09 15:11:34 +03003597struct mlx5_ifc_query_xrq_out_bits {
3598 u8 status[0x8];
3599 u8 reserved_at_8[0x18];
3600
3601 u8 syndrome[0x20];
3602
3603 u8 reserved_at_40[0x40];
3604
3605 struct mlx5_ifc_xrqc_bits xrq_context;
3606};
3607
3608struct mlx5_ifc_query_xrq_in_bits {
3609 u8 opcode[0x10];
3610 u8 reserved_at_10[0x10];
3611
3612 u8 reserved_at_20[0x10];
3613 u8 op_mod[0x10];
3614
3615 u8 reserved_at_40[0x8];
3616 u8 xrqn[0x18];
3617
3618 u8 reserved_at_60[0x20];
3619};
3620
Saeed Mahameede2816822015-05-28 22:28:40 +03003621struct mlx5_ifc_query_xrc_srq_out_bits {
3622 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624
3625 u8 syndrome[0x20];
3626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628
3629 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3630
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632
3633 u8 pas[0][0x40];
3634};
3635
3636struct mlx5_ifc_query_xrc_srq_in_bits {
3637 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641 u8 op_mod[0x10];
3642
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644 u8 xrc_srqn[0x18];
3645
Matan Barakb4ff3a32016-02-09 14:57:42 +02003646 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003647};
3648
3649enum {
3650 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3651 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3652};
3653
3654struct mlx5_ifc_query_vport_state_out_bits {
3655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
3658 u8 syndrome[0x20];
3659
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
Matan Barakb4ff3a32016-02-09 14:57:42 +02003662 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003663 u8 admin_state[0x4];
3664 u8 state[0x4];
3665};
3666
3667enum {
3668 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003669 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003670};
3671
3672struct mlx5_ifc_query_vport_state_in_bits {
3673 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677 u8 op_mod[0x10];
3678
3679 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681 u8 vport_number[0x10];
3682
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684};
3685
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003686struct mlx5_ifc_query_vnic_env_out_bits {
3687 u8 status[0x8];
3688 u8 reserved_at_8[0x18];
3689
3690 u8 syndrome[0x20];
3691
3692 u8 reserved_at_40[0x40];
3693
3694 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3695};
3696
3697enum {
3698 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3699};
3700
3701struct mlx5_ifc_query_vnic_env_in_bits {
3702 u8 opcode[0x10];
3703 u8 reserved_at_10[0x10];
3704
3705 u8 reserved_at_20[0x10];
3706 u8 op_mod[0x10];
3707
3708 u8 other_vport[0x1];
3709 u8 reserved_at_41[0xf];
3710 u8 vport_number[0x10];
3711
3712 u8 reserved_at_60[0x20];
3713};
3714
Saeed Mahameede2816822015-05-28 22:28:40 +03003715struct mlx5_ifc_query_vport_counter_out_bits {
3716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003717 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003718
3719 u8 syndrome[0x20];
3720
Matan Barakb4ff3a32016-02-09 14:57:42 +02003721 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003722
3723 struct mlx5_ifc_traffic_counter_bits received_errors;
3724
3725 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3726
3727 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3728
3729 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3730
3731 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3732
3733 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3734
3735 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3736
3737 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3738
3739 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3740
3741 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3742
3743 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3744
3745 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3746
Matan Barakb4ff3a32016-02-09 14:57:42 +02003747 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003748};
3749
3750enum {
3751 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3752};
3753
3754struct mlx5_ifc_query_vport_counter_in_bits {
3755 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003756 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003757
Matan Barakb4ff3a32016-02-09 14:57:42 +02003758 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003759 u8 op_mod[0x10];
3760
3761 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003762 u8 reserved_at_41[0xb];
3763 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003764 u8 vport_number[0x10];
3765
Matan Barakb4ff3a32016-02-09 14:57:42 +02003766 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003767
3768 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770
Matan Barakb4ff3a32016-02-09 14:57:42 +02003771 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003772};
3773
3774struct mlx5_ifc_query_tis_out_bits {
3775 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003776 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003777
3778 u8 syndrome[0x20];
3779
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781
3782 struct mlx5_ifc_tisc_bits tis_context;
3783};
3784
3785struct mlx5_ifc_query_tis_in_bits {
3786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003788
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790 u8 op_mod[0x10];
3791
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793 u8 tisn[0x18];
3794
Matan Barakb4ff3a32016-02-09 14:57:42 +02003795 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003796};
3797
3798struct mlx5_ifc_query_tir_out_bits {
3799 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
3802 u8 syndrome[0x20];
3803
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805
3806 struct mlx5_ifc_tirc_bits tir_context;
3807};
3808
3809struct mlx5_ifc_query_tir_in_bits {
3810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814 u8 op_mod[0x10];
3815
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817 u8 tirn[0x18];
3818
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820};
3821
3822struct mlx5_ifc_query_srq_out_bits {
3823 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825
3826 u8 syndrome[0x20];
3827
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829
3830 struct mlx5_ifc_srqc_bits srq_context_entry;
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
3834 u8 pas[0][0x40];
3835};
3836
3837struct mlx5_ifc_query_srq_in_bits {
3838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842 u8 op_mod[0x10];
3843
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845 u8 srqn[0x18];
3846
Matan Barakb4ff3a32016-02-09 14:57:42 +02003847 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003848};
3849
3850struct mlx5_ifc_query_sq_out_bits {
3851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853
3854 u8 syndrome[0x20];
3855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857
3858 struct mlx5_ifc_sqc_bits sq_context;
3859};
3860
3861struct mlx5_ifc_query_sq_in_bits {
3862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866 u8 op_mod[0x10];
3867
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869 u8 sqn[0x18];
3870
Matan Barakb4ff3a32016-02-09 14:57:42 +02003871 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003872};
3873
3874struct mlx5_ifc_query_special_contexts_out_bits {
3875 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
3878 u8 syndrome[0x20];
3879
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003880 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
3882 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003883
3884 u8 null_mkey[0x20];
3885
3886 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887};
3888
3889struct mlx5_ifc_query_special_contexts_in_bits {
3890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894 u8 op_mod[0x10];
3895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897};
3898
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003899struct mlx5_ifc_query_scheduling_element_out_bits {
3900 u8 opcode[0x10];
3901 u8 reserved_at_10[0x10];
3902
3903 u8 reserved_at_20[0x10];
3904 u8 op_mod[0x10];
3905
3906 u8 reserved_at_40[0xc0];
3907
3908 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3909
3910 u8 reserved_at_300[0x100];
3911};
3912
3913enum {
3914 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3915};
3916
3917struct mlx5_ifc_query_scheduling_element_in_bits {
3918 u8 opcode[0x10];
3919 u8 reserved_at_10[0x10];
3920
3921 u8 reserved_at_20[0x10];
3922 u8 op_mod[0x10];
3923
3924 u8 scheduling_hierarchy[0x8];
3925 u8 reserved_at_48[0x18];
3926
3927 u8 scheduling_element_id[0x20];
3928
3929 u8 reserved_at_80[0x180];
3930};
3931
Saeed Mahameede2816822015-05-28 22:28:40 +03003932struct mlx5_ifc_query_rqt_out_bits {
3933 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003935
3936 u8 syndrome[0x20];
3937
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939
3940 struct mlx5_ifc_rqtc_bits rqt_context;
3941};
3942
3943struct mlx5_ifc_query_rqt_in_bits {
3944 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003945 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948 u8 op_mod[0x10];
3949
Matan Barakb4ff3a32016-02-09 14:57:42 +02003950 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003951 u8 rqtn[0x18];
3952
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954};
3955
3956struct mlx5_ifc_query_rq_out_bits {
3957 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959
3960 u8 syndrome[0x20];
3961
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963
3964 struct mlx5_ifc_rqc_bits rq_context;
3965};
3966
3967struct mlx5_ifc_query_rq_in_bits {
3968 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972 u8 op_mod[0x10];
3973
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975 u8 rqn[0x18];
3976
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978};
3979
3980struct mlx5_ifc_query_roce_address_out_bits {
3981 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003982 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003983
3984 u8 syndrome[0x20];
3985
Matan Barakb4ff3a32016-02-09 14:57:42 +02003986 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003987
3988 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3989};
3990
3991struct mlx5_ifc_query_roce_address_in_bits {
3992 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996 u8 op_mod[0x10];
3997
3998 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003999 u8 reserved_at_50[0xc];
4000 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003};
4004
4005struct mlx5_ifc_query_rmp_out_bits {
4006 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008
4009 u8 syndrome[0x20];
4010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012
4013 struct mlx5_ifc_rmpc_bits rmp_context;
4014};
4015
4016struct mlx5_ifc_query_rmp_in_bits {
4017 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021 u8 op_mod[0x10];
4022
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024 u8 rmpn[0x18];
4025
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027};
4028
4029struct mlx5_ifc_query_qp_out_bits {
4030 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
4033 u8 syndrome[0x20];
4034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036
4037 u8 opt_param_mask[0x20];
4038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040
4041 struct mlx5_ifc_qpc_bits qpc;
4042
Matan Barakb4ff3a32016-02-09 14:57:42 +02004043 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004044
4045 u8 pas[0][0x40];
4046};
4047
4048struct mlx5_ifc_query_qp_in_bits {
4049 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004050 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004051
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053 u8 op_mod[0x10];
4054
Matan Barakb4ff3a32016-02-09 14:57:42 +02004055 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004056 u8 qpn[0x18];
4057
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059};
4060
4061struct mlx5_ifc_query_q_counter_out_bits {
4062 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064
4065 u8 syndrome[0x20];
4066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068
4069 u8 rx_write_requests[0x20];
4070
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072
4073 u8 rx_read_requests[0x20];
4074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076
4077 u8 rx_atomic_requests[0x20];
4078
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 u8 rx_dct_connect[0x20];
4082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
4085 u8 out_of_buffer[0x20];
4086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088
4089 u8 out_of_sequence[0x20];
4090
Saeed Mahameed74862162016-06-09 15:11:34 +03004091 u8 reserved_at_1e0[0x20];
4092
4093 u8 duplicate_request[0x20];
4094
4095 u8 reserved_at_220[0x20];
4096
4097 u8 rnr_nak_retry_err[0x20];
4098
4099 u8 reserved_at_260[0x20];
4100
4101 u8 packet_seq_err[0x20];
4102
4103 u8 reserved_at_2a0[0x20];
4104
4105 u8 implied_nak_seq_err[0x20];
4106
4107 u8 reserved_at_2e0[0x20];
4108
4109 u8 local_ack_timeout_err[0x20];
4110
Parav Pandit58dcb602017-06-19 07:19:37 +03004111 u8 reserved_at_320[0xa0];
4112
4113 u8 resp_local_length_error[0x20];
4114
4115 u8 req_local_length_error[0x20];
4116
4117 u8 resp_local_qp_error[0x20];
4118
4119 u8 local_operation_error[0x20];
4120
4121 u8 resp_local_protection[0x20];
4122
4123 u8 req_local_protection[0x20];
4124
4125 u8 resp_cqe_error[0x20];
4126
4127 u8 req_cqe_error[0x20];
4128
4129 u8 req_mw_binding[0x20];
4130
4131 u8 req_bad_response[0x20];
4132
4133 u8 req_remote_invalid_request[0x20];
4134
4135 u8 resp_remote_invalid_request[0x20];
4136
4137 u8 req_remote_access_errors[0x20];
4138
4139 u8 resp_remote_access_errors[0x20];
4140
4141 u8 req_remote_operation_errors[0x20];
4142
4143 u8 req_transport_retries_exceeded[0x20];
4144
4145 u8 cq_overflow[0x20];
4146
4147 u8 resp_cqe_flush_error[0x20];
4148
4149 u8 req_cqe_flush_error[0x20];
4150
4151 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004152};
4153
4154struct mlx5_ifc_query_q_counter_in_bits {
4155 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159 u8 op_mod[0x10];
4160
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162
4163 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004164 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167 u8 counter_set_id[0x8];
4168};
4169
4170struct mlx5_ifc_query_pages_out_bits {
4171 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173
4174 u8 syndrome[0x20];
4175
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177 u8 function_id[0x10];
4178
4179 u8 num_pages[0x20];
4180};
4181
4182enum {
4183 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4184 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4185 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4186};
4187
4188struct mlx5_ifc_query_pages_in_bits {
4189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004193 u8 op_mod[0x10];
4194
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196 u8 function_id[0x10];
4197
Matan Barakb4ff3a32016-02-09 14:57:42 +02004198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199};
4200
4201struct mlx5_ifc_query_nic_vport_context_out_bits {
4202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
4205 u8 syndrome[0x20];
4206
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208
4209 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4210};
4211
4212struct mlx5_ifc_query_nic_vport_context_in_bits {
4213 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217 u8 op_mod[0x10];
4218
4219 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221 u8 vport_number[0x10];
4222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004225 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004226};
4227
4228struct mlx5_ifc_query_mkey_out_bits {
4229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231
4232 u8 syndrome[0x20];
4233
Matan Barakb4ff3a32016-02-09 14:57:42 +02004234 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235
4236 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4237
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
4240 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4241
4242 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4243};
4244
4245struct mlx5_ifc_query_mkey_in_bits {
4246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250 u8 op_mod[0x10];
4251
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253 u8 mkey_index[0x18];
4254
4255 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257};
4258
4259struct mlx5_ifc_query_mad_demux_out_bits {
4260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262
4263 u8 syndrome[0x20];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
4267 u8 mad_dumux_parameters_block[0x20];
4268};
4269
4270struct mlx5_ifc_query_mad_demux_in_bits {
4271 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275 u8 op_mod[0x10];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278};
4279
4280struct mlx5_ifc_query_l2_table_entry_out_bits {
4281 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283
4284 u8 syndrome[0x20];
4285
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 vlan_valid[0x1];
4290 u8 vlan[0xc];
4291
4292 struct mlx5_ifc_mac_address_layout_bits mac_address;
4293
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295};
4296
4297struct mlx5_ifc_query_l2_table_entry_in_bits {
4298 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302 u8 op_mod[0x10];
4303
Matan Barakb4ff3a32016-02-09 14:57:42 +02004304 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004305
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307 u8 table_index[0x18];
4308
Matan Barakb4ff3a32016-02-09 14:57:42 +02004309 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004310};
4311
4312struct mlx5_ifc_query_issi_out_bits {
4313 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315
4316 u8 syndrome[0x20];
4317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319 u8 current_issi[0x10];
4320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324 u8 supported_issi_dw0[0x20];
4325};
4326
4327struct mlx5_ifc_query_issi_in_bits {
4328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332 u8 op_mod[0x10];
4333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335};
4336
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004337struct mlx5_ifc_set_driver_version_out_bits {
4338 u8 status[0x8];
4339 u8 reserved_0[0x18];
4340
4341 u8 syndrome[0x20];
4342 u8 reserved_1[0x40];
4343};
4344
4345struct mlx5_ifc_set_driver_version_in_bits {
4346 u8 opcode[0x10];
4347 u8 reserved_0[0x10];
4348
4349 u8 reserved_1[0x10];
4350 u8 op_mod[0x10];
4351
4352 u8 reserved_2[0x40];
4353 u8 driver_version[64][0x8];
4354};
4355
Saeed Mahameede2816822015-05-28 22:28:40 +03004356struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4357 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004358 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004359
4360 u8 syndrome[0x20];
4361
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363
4364 struct mlx5_ifc_pkey_bits pkey[0];
4365};
4366
4367struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4368 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372 u8 op_mod[0x10];
4373
4374 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004376 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004377 u8 vport_number[0x10];
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380 u8 pkey_index[0x10];
4381};
4382
Eli Coheneff901d2016-03-11 22:58:42 +02004383enum {
4384 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4385 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4386 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4387};
4388
Saeed Mahameede2816822015-05-28 22:28:40 +03004389struct mlx5_ifc_query_hca_vport_gid_out_bits {
4390 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392
4393 u8 syndrome[0x20];
4394
Matan Barakb4ff3a32016-02-09 14:57:42 +02004395 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396
4397 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399
4400 struct mlx5_ifc_array128_auto_bits gid[0];
4401};
4402
4403struct mlx5_ifc_query_hca_vport_gid_in_bits {
4404 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408 u8 op_mod[0x10];
4409
4410 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004412 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004413 u8 vport_number[0x10];
4414
Matan Barakb4ff3a32016-02-09 14:57:42 +02004415 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004416 u8 gid_index[0x10];
4417};
4418
4419struct mlx5_ifc_query_hca_vport_context_out_bits {
4420 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422
4423 u8 syndrome[0x20];
4424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426
4427 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4428};
4429
4430struct mlx5_ifc_query_hca_vport_context_in_bits {
4431 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004432 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004433
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004435 u8 op_mod[0x10];
4436
4437 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004439 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004440 u8 vport_number[0x10];
4441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443};
4444
4445struct mlx5_ifc_query_hca_cap_out_bits {
4446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448
4449 u8 syndrome[0x20];
4450
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452
4453 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004454};
4455
4456struct mlx5_ifc_query_hca_cap_in_bits {
4457 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004458 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004459
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004461 u8 op_mod[0x10];
4462
Matan Barakb4ff3a32016-02-09 14:57:42 +02004463 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004464};
4465
Saeed Mahameede2816822015-05-28 22:28:40 +03004466struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004467 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004468 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004469
4470 u8 syndrome[0x20];
4471
Matan Barakb4ff3a32016-02-09 14:57:42 +02004472 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004476 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004477 u8 log_size[0x8];
4478
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004480};
4481
Saeed Mahameede2816822015-05-28 22:28:40 +03004482struct mlx5_ifc_query_flow_table_in_bits {
4483 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004485
Matan Barakb4ff3a32016-02-09 14:57:42 +02004486 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004487 u8 op_mod[0x10];
4488
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490
4491 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004492 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004493
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495 u8 table_id[0x18];
4496
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498};
4499
4500struct mlx5_ifc_query_fte_out_bits {
4501 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503
4504 u8 syndrome[0x20];
4505
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004507
4508 struct mlx5_ifc_flow_context_bits flow_context;
4509};
4510
4511struct mlx5_ifc_query_fte_in_bits {
4512 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004513 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004514
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004516 u8 op_mod[0x10];
4517
Matan Barakb4ff3a32016-02-09 14:57:42 +02004518 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004519
4520 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004522
Matan Barakb4ff3a32016-02-09 14:57:42 +02004523 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004524 u8 table_id[0x18];
4525
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004527
4528 u8 flow_index[0x20];
4529
Matan Barakb4ff3a32016-02-09 14:57:42 +02004530 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004531};
4532
4533enum {
4534 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4535 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4536 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4537};
4538
4539struct mlx5_ifc_query_flow_group_out_bits {
4540 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004541 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004542
4543 u8 syndrome[0x20];
4544
Matan Barakb4ff3a32016-02-09 14:57:42 +02004545 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004546
4547 u8 start_flow_index[0x20];
4548
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550
4551 u8 end_flow_index[0x20];
4552
Matan Barakb4ff3a32016-02-09 14:57:42 +02004553 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004554
Matan Barakb4ff3a32016-02-09 14:57:42 +02004555 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004556 u8 match_criteria_enable[0x8];
4557
4558 struct mlx5_ifc_fte_match_param_bits match_criteria;
4559
Matan Barakb4ff3a32016-02-09 14:57:42 +02004560 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004561};
4562
4563struct mlx5_ifc_query_flow_group_in_bits {
4564 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004566
Matan Barakb4ff3a32016-02-09 14:57:42 +02004567 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004568 u8 op_mod[0x10];
4569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571
4572 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004574
Matan Barakb4ff3a32016-02-09 14:57:42 +02004575 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004576 u8 table_id[0x18];
4577
4578 u8 group_id[0x20];
4579
Matan Barakb4ff3a32016-02-09 14:57:42 +02004580 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004581};
4582
Amir Vadai9dc0b282016-05-13 12:55:39 +00004583struct mlx5_ifc_query_flow_counter_out_bits {
4584 u8 status[0x8];
4585 u8 reserved_at_8[0x18];
4586
4587 u8 syndrome[0x20];
4588
4589 u8 reserved_at_40[0x40];
4590
4591 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4592};
4593
4594struct mlx5_ifc_query_flow_counter_in_bits {
4595 u8 opcode[0x10];
4596 u8 reserved_at_10[0x10];
4597
4598 u8 reserved_at_20[0x10];
4599 u8 op_mod[0x10];
4600
4601 u8 reserved_at_40[0x80];
4602
4603 u8 clear[0x1];
4604 u8 reserved_at_c1[0xf];
4605 u8 num_of_counters[0x10];
4606
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004607 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004608};
4609
Saeed Mahameedd6666752015-12-01 18:03:22 +02004610struct mlx5_ifc_query_esw_vport_context_out_bits {
4611 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004612 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004613
4614 u8 syndrome[0x20];
4615
Matan Barakb4ff3a32016-02-09 14:57:42 +02004616 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004617
4618 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4619};
4620
4621struct mlx5_ifc_query_esw_vport_context_in_bits {
4622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004623 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004624
Matan Barakb4ff3a32016-02-09 14:57:42 +02004625 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004626 u8 op_mod[0x10];
4627
4628 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004629 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004630 u8 vport_number[0x10];
4631
Matan Barakb4ff3a32016-02-09 14:57:42 +02004632 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004633};
4634
4635struct mlx5_ifc_modify_esw_vport_context_out_bits {
4636 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004637 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004638
4639 u8 syndrome[0x20];
4640
Matan Barakb4ff3a32016-02-09 14:57:42 +02004641 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004642};
4643
4644struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004645 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004646 u8 vport_cvlan_insert[0x1];
4647 u8 vport_svlan_insert[0x1];
4648 u8 vport_cvlan_strip[0x1];
4649 u8 vport_svlan_strip[0x1];
4650};
4651
4652struct mlx5_ifc_modify_esw_vport_context_in_bits {
4653 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004654 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004655
Matan Barakb4ff3a32016-02-09 14:57:42 +02004656 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004657 u8 op_mod[0x10];
4658
4659 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004660 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004661 u8 vport_number[0x10];
4662
4663 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4664
4665 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4666};
4667
Saeed Mahameede2816822015-05-28 22:28:40 +03004668struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004670 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004671
4672 u8 syndrome[0x20];
4673
Matan Barakb4ff3a32016-02-09 14:57:42 +02004674 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004675
4676 struct mlx5_ifc_eqc_bits eq_context_entry;
4677
Matan Barakb4ff3a32016-02-09 14:57:42 +02004678 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004679
4680 u8 event_bitmask[0x40];
4681
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004683
4684 u8 pas[0][0x40];
4685};
4686
4687struct mlx5_ifc_query_eq_in_bits {
4688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004690
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004692 u8 op_mod[0x10];
4693
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004695 u8 eq_number[0x8];
4696
Matan Barakb4ff3a32016-02-09 14:57:42 +02004697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004698};
4699
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004700struct mlx5_ifc_encap_header_in_bits {
4701 u8 reserved_at_0[0x5];
4702 u8 header_type[0x3];
4703 u8 reserved_at_8[0xe];
4704 u8 encap_header_size[0xa];
4705
4706 u8 reserved_at_20[0x10];
4707 u8 encap_header[2][0x8];
4708
4709 u8 more_encap_header[0][0x8];
4710};
4711
4712struct mlx5_ifc_query_encap_header_out_bits {
4713 u8 status[0x8];
4714 u8 reserved_at_8[0x18];
4715
4716 u8 syndrome[0x20];
4717
4718 u8 reserved_at_40[0xa0];
4719
4720 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4721};
4722
4723struct mlx5_ifc_query_encap_header_in_bits {
4724 u8 opcode[0x10];
4725 u8 reserved_at_10[0x10];
4726
4727 u8 reserved_at_20[0x10];
4728 u8 op_mod[0x10];
4729
4730 u8 encap_id[0x20];
4731
4732 u8 reserved_at_60[0xa0];
4733};
4734
4735struct mlx5_ifc_alloc_encap_header_out_bits {
4736 u8 status[0x8];
4737 u8 reserved_at_8[0x18];
4738
4739 u8 syndrome[0x20];
4740
4741 u8 encap_id[0x20];
4742
4743 u8 reserved_at_60[0x20];
4744};
4745
4746struct mlx5_ifc_alloc_encap_header_in_bits {
4747 u8 opcode[0x10];
4748 u8 reserved_at_10[0x10];
4749
4750 u8 reserved_at_20[0x10];
4751 u8 op_mod[0x10];
4752
4753 u8 reserved_at_40[0xa0];
4754
4755 struct mlx5_ifc_encap_header_in_bits encap_header;
4756};
4757
4758struct mlx5_ifc_dealloc_encap_header_out_bits {
4759 u8 status[0x8];
4760 u8 reserved_at_8[0x18];
4761
4762 u8 syndrome[0x20];
4763
4764 u8 reserved_at_40[0x40];
4765};
4766
4767struct mlx5_ifc_dealloc_encap_header_in_bits {
4768 u8 opcode[0x10];
4769 u8 reserved_at_10[0x10];
4770
4771 u8 reserved_20[0x10];
4772 u8 op_mod[0x10];
4773
4774 u8 encap_id[0x20];
4775
4776 u8 reserved_60[0x20];
4777};
4778
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004779struct mlx5_ifc_set_action_in_bits {
4780 u8 action_type[0x4];
4781 u8 field[0xc];
4782 u8 reserved_at_10[0x3];
4783 u8 offset[0x5];
4784 u8 reserved_at_18[0x3];
4785 u8 length[0x5];
4786
4787 u8 data[0x20];
4788};
4789
4790struct mlx5_ifc_add_action_in_bits {
4791 u8 action_type[0x4];
4792 u8 field[0xc];
4793 u8 reserved_at_10[0x10];
4794
4795 u8 data[0x20];
4796};
4797
4798union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4799 struct mlx5_ifc_set_action_in_bits set_action_in;
4800 struct mlx5_ifc_add_action_in_bits add_action_in;
4801 u8 reserved_at_0[0x40];
4802};
4803
4804enum {
4805 MLX5_ACTION_TYPE_SET = 0x1,
4806 MLX5_ACTION_TYPE_ADD = 0x2,
4807};
4808
4809enum {
4810 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4811 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4812 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4813 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4814 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4815 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4816 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4817 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4818 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4819 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4820 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4821 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4822 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4823 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4824 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4825 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4826 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4827 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4828 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4829 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4830 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4831 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004832 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004833};
4834
4835struct mlx5_ifc_alloc_modify_header_context_out_bits {
4836 u8 status[0x8];
4837 u8 reserved_at_8[0x18];
4838
4839 u8 syndrome[0x20];
4840
4841 u8 modify_header_id[0x20];
4842
4843 u8 reserved_at_60[0x20];
4844};
4845
4846struct mlx5_ifc_alloc_modify_header_context_in_bits {
4847 u8 opcode[0x10];
4848 u8 reserved_at_10[0x10];
4849
4850 u8 reserved_at_20[0x10];
4851 u8 op_mod[0x10];
4852
4853 u8 reserved_at_40[0x20];
4854
4855 u8 table_type[0x8];
4856 u8 reserved_at_68[0x10];
4857 u8 num_of_actions[0x8];
4858
4859 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4860};
4861
4862struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4863 u8 status[0x8];
4864 u8 reserved_at_8[0x18];
4865
4866 u8 syndrome[0x20];
4867
4868 u8 reserved_at_40[0x40];
4869};
4870
4871struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4872 u8 opcode[0x10];
4873 u8 reserved_at_10[0x10];
4874
4875 u8 reserved_at_20[0x10];
4876 u8 op_mod[0x10];
4877
4878 u8 modify_header_id[0x20];
4879
4880 u8 reserved_at_60[0x20];
4881};
4882
Saeed Mahameede2816822015-05-28 22:28:40 +03004883struct mlx5_ifc_query_dct_out_bits {
4884 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886
4887 u8 syndrome[0x20];
4888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890
4891 struct mlx5_ifc_dctc_bits dct_context_entry;
4892
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894};
4895
4896struct mlx5_ifc_query_dct_in_bits {
4897 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899
Matan Barakb4ff3a32016-02-09 14:57:42 +02004900 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004901 u8 op_mod[0x10];
4902
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904 u8 dctn[0x18];
4905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907};
4908
4909struct mlx5_ifc_query_cq_out_bits {
4910 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912
4913 u8 syndrome[0x20];
4914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916
4917 struct mlx5_ifc_cqc_bits cq_context;
4918
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920
4921 u8 pas[0][0x40];
4922};
4923
4924struct mlx5_ifc_query_cq_in_bits {
4925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929 u8 op_mod[0x10];
4930
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932 u8 cqn[0x18];
4933
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935};
4936
4937struct mlx5_ifc_query_cong_status_out_bits {
4938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940
4941 u8 syndrome[0x20];
4942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944
4945 u8 enable[0x1];
4946 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948};
4949
4950struct mlx5_ifc_query_cong_status_in_bits {
4951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955 u8 op_mod[0x10];
4956
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958 u8 priority[0x4];
4959 u8 cong_protocol[0x4];
4960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962};
4963
4964struct mlx5_ifc_query_cong_statistics_out_bits {
4965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967
4968 u8 syndrome[0x20];
4969
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971
Parav Pandite1f24a72017-04-16 07:29:29 +03004972 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973
4974 u8 sum_flows[0x20];
4975
Parav Pandite1f24a72017-04-16 07:29:29 +03004976 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977
Parav Pandite1f24a72017-04-16 07:29:29 +03004978 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
Parav Pandite1f24a72017-04-16 07:29:29 +03004980 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981
Parav Pandite1f24a72017-04-16 07:29:29 +03004982 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
Matan Barakb4ff3a32016-02-09 14:57:42 +02004984 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004985
4986 u8 time_stamp_high[0x20];
4987
4988 u8 time_stamp_low[0x20];
4989
4990 u8 accumulators_period[0x20];
4991
Parav Pandite1f24a72017-04-16 07:29:29 +03004992 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993
Parav Pandite1f24a72017-04-16 07:29:29 +03004994 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995
Parav Pandite1f24a72017-04-16 07:29:29 +03004996 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
Parav Pandite1f24a72017-04-16 07:29:29 +03004998 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999
Matan Barakb4ff3a32016-02-09 14:57:42 +02005000 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005001};
5002
5003struct mlx5_ifc_query_cong_statistics_in_bits {
5004 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005005 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
Matan Barakb4ff3a32016-02-09 14:57:42 +02005007 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008 u8 op_mod[0x10];
5009
5010 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014};
5015
5016struct mlx5_ifc_query_cong_params_out_bits {
5017 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019
5020 u8 syndrome[0x20];
5021
Matan Barakb4ff3a32016-02-09 14:57:42 +02005022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005023
5024 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5025};
5026
5027struct mlx5_ifc_query_cong_params_in_bits {
5028 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005029 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032 u8 op_mod[0x10];
5033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035 u8 cong_protocol[0x4];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038};
5039
5040struct mlx5_ifc_query_adapter_out_bits {
5041 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
5044 u8 syndrome[0x20];
5045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047
5048 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5049};
5050
5051struct mlx5_ifc_query_adapter_in_bits {
5052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056 u8 op_mod[0x10];
5057
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059};
5060
5061struct mlx5_ifc_qp_2rst_out_bits {
5062 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064
5065 u8 syndrome[0x20];
5066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068};
5069
5070struct mlx5_ifc_qp_2rst_in_bits {
5071 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005072 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005073
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075 u8 op_mod[0x10];
5076
Matan Barakb4ff3a32016-02-09 14:57:42 +02005077 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005078 u8 qpn[0x18];
5079
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081};
5082
5083struct mlx5_ifc_qp_2err_out_bits {
5084 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005085 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005086
5087 u8 syndrome[0x20];
5088
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090};
5091
5092struct mlx5_ifc_qp_2err_in_bits {
5093 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005095
Matan Barakb4ff3a32016-02-09 14:57:42 +02005096 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005097 u8 op_mod[0x10];
5098
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100 u8 qpn[0x18];
5101
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103};
5104
5105struct mlx5_ifc_page_fault_resume_out_bits {
5106 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108
5109 u8 syndrome[0x20];
5110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112};
5113
5114struct mlx5_ifc_page_fault_resume_in_bits {
5115 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119 u8 op_mod[0x10];
5120
5121 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005123 u8 page_fault_type[0x3];
5124 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005126 u8 reserved_at_60[0x8];
5127 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005128};
5129
5130struct mlx5_ifc_nop_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
5139struct mlx5_ifc_nop_in_bits {
5140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 op_mod[0x10];
5145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147};
5148
5149struct mlx5_ifc_modify_vport_state_out_bits {
5150 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005151 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005152
5153 u8 syndrome[0x20];
5154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156};
5157
5158struct mlx5_ifc_modify_vport_state_in_bits {
5159 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161
Matan Barakb4ff3a32016-02-09 14:57:42 +02005162 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005163 u8 op_mod[0x10];
5164
5165 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005166 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005167 u8 vport_number[0x10];
5168
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005171 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005172};
5173
5174struct mlx5_ifc_modify_tis_out_bits {
5175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177
5178 u8 syndrome[0x20];
5179
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181};
5182
majd@mellanox.com75850d02016-01-14 19:13:06 +02005183struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005185
Aviv Heller84df61e2016-05-10 13:47:50 +03005186 u8 reserved_at_20[0x1d];
5187 u8 lag_tx_port_affinity[0x1];
5188 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005189 u8 prio[0x1];
5190};
5191
Saeed Mahameede2816822015-05-28 22:28:40 +03005192struct mlx5_ifc_modify_tis_in_bits {
5193 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005197 u8 op_mod[0x10];
5198
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200 u8 tisn[0x18];
5201
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203
majd@mellanox.com75850d02016-01-14 19:13:06 +02005204 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005205
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207
5208 struct mlx5_ifc_tisc_bits ctx;
5209};
5210
Achiad Shochatd9eea402015-08-04 14:05:42 +03005211struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005213
Matan Barakb4ff3a32016-02-09 14:57:42 +02005214 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005215 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005216 u8 reserved_at_3c[0x1];
5217 u8 hash[0x1];
5218 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005219 u8 lro[0x1];
5220};
5221
Saeed Mahameede2816822015-05-28 22:28:40 +03005222struct mlx5_ifc_modify_tir_out_bits {
5223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225
5226 u8 syndrome[0x20];
5227
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229};
5230
5231struct mlx5_ifc_modify_tir_in_bits {
5232 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005233 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005234
Matan Barakb4ff3a32016-02-09 14:57:42 +02005235 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005236 u8 op_mod[0x10];
5237
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239 u8 tirn[0x18];
5240
Matan Barakb4ff3a32016-02-09 14:57:42 +02005241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005242
Achiad Shochatd9eea402015-08-04 14:05:42 +03005243 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005244
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246
5247 struct mlx5_ifc_tirc_bits ctx;
5248};
5249
5250struct mlx5_ifc_modify_sq_out_bits {
5251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005253
5254 u8 syndrome[0x20];
5255
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257};
5258
5259struct mlx5_ifc_modify_sq_in_bits {
5260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264 u8 op_mod[0x10];
5265
5266 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268 u8 sqn[0x18];
5269
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
5272 u8 modify_bitmask[0x40];
5273
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
5276 struct mlx5_ifc_sqc_bits ctx;
5277};
5278
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005279struct mlx5_ifc_modify_scheduling_element_out_bits {
5280 u8 status[0x8];
5281 u8 reserved_at_8[0x18];
5282
5283 u8 syndrome[0x20];
5284
5285 u8 reserved_at_40[0x1c0];
5286};
5287
5288enum {
5289 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5290 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5291};
5292
5293struct mlx5_ifc_modify_scheduling_element_in_bits {
5294 u8 opcode[0x10];
5295 u8 reserved_at_10[0x10];
5296
5297 u8 reserved_at_20[0x10];
5298 u8 op_mod[0x10];
5299
5300 u8 scheduling_hierarchy[0x8];
5301 u8 reserved_at_48[0x18];
5302
5303 u8 scheduling_element_id[0x20];
5304
5305 u8 reserved_at_80[0x20];
5306
5307 u8 modify_bitmask[0x20];
5308
5309 u8 reserved_at_c0[0x40];
5310
5311 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5312
5313 u8 reserved_at_300[0x100];
5314};
5315
Saeed Mahameede2816822015-05-28 22:28:40 +03005316struct mlx5_ifc_modify_rqt_out_bits {
5317 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005318 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005319
5320 u8 syndrome[0x20];
5321
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323};
5324
Achiad Shochat5c503682015-08-04 14:05:43 +03005325struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005327
Matan Barakb4ff3a32016-02-09 14:57:42 +02005328 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005329 u8 rqn_list[0x1];
5330};
5331
Saeed Mahameede2816822015-05-28 22:28:40 +03005332struct mlx5_ifc_modify_rqt_in_bits {
5333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335
Matan Barakb4ff3a32016-02-09 14:57:42 +02005336 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005337 u8 op_mod[0x10];
5338
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340 u8 rqtn[0x18];
5341
Matan Barakb4ff3a32016-02-09 14:57:42 +02005342 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005343
Achiad Shochat5c503682015-08-04 14:05:43 +03005344 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347
5348 struct mlx5_ifc_rqtc_bits ctx;
5349};
5350
5351struct mlx5_ifc_modify_rq_out_bits {
5352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354
5355 u8 syndrome[0x20];
5356
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358};
5359
Alex Vesker83b502a2016-08-04 17:32:02 +03005360enum {
5361 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005362 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005363 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005364};
5365
Saeed Mahameede2816822015-05-28 22:28:40 +03005366struct mlx5_ifc_modify_rq_in_bits {
5367 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
Matan Barakb4ff3a32016-02-09 14:57:42 +02005370 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005371 u8 op_mod[0x10];
5372
5373 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005374 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005375 u8 rqn[0x18];
5376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378
5379 u8 modify_bitmask[0x40];
5380
Matan Barakb4ff3a32016-02-09 14:57:42 +02005381 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005382
5383 struct mlx5_ifc_rqc_bits ctx;
5384};
5385
5386struct mlx5_ifc_modify_rmp_out_bits {
5387 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389
5390 u8 syndrome[0x20];
5391
Matan Barakb4ff3a32016-02-09 14:57:42 +02005392 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005393};
5394
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005395struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005397
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005399 u8 lwm[0x1];
5400};
5401
Saeed Mahameede2816822015-05-28 22:28:40 +03005402struct mlx5_ifc_modify_rmp_in_bits {
5403 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005404 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005405
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407 u8 op_mod[0x10];
5408
5409 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411 u8 rmpn[0x18];
5412
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005414
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005415 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
5419 struct mlx5_ifc_rmpc_bits ctx;
5420};
5421
5422struct mlx5_ifc_modify_nic_vport_context_out_bits {
5423 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005424 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005425
5426 u8 syndrome[0x20];
5427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429};
5430
5431struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005432 u8 reserved_at_0[0x12];
5433 u8 affiliation[0x1];
5434 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005435 u8 disable_uc_local_lb[0x1];
5436 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005437 u8 node_guid[0x1];
5438 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005439 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005440 u8 mtu[0x1];
5441 u8 change_event[0x1];
5442 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443 u8 permanent_address[0x1];
5444 u8 addresses_list[0x1];
5445 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447};
5448
5449struct mlx5_ifc_modify_nic_vport_context_in_bits {
5450 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454 u8 op_mod[0x10];
5455
5456 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458 u8 vport_number[0x10];
5459
5460 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5461
Matan Barakb4ff3a32016-02-09 14:57:42 +02005462 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005463
5464 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5465};
5466
5467struct mlx5_ifc_modify_hca_vport_context_out_bits {
5468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005469 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005470
5471 u8 syndrome[0x20];
5472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474};
5475
5476struct mlx5_ifc_modify_hca_vport_context_in_bits {
5477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481 u8 op_mod[0x10];
5482
5483 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005485 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486 u8 vport_number[0x10];
5487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489
5490 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5491};
5492
5493struct mlx5_ifc_modify_cq_out_bits {
5494 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 u8 syndrome[0x20];
5498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500};
5501
5502enum {
5503 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5504 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5505};
5506
5507struct mlx5_ifc_modify_cq_in_bits {
5508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512 u8 op_mod[0x10];
5513
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515 u8 cqn[0x18];
5516
5517 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5518
5519 struct mlx5_ifc_cqc_bits cq_context;
5520
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
5523 u8 pas[0][0x40];
5524};
5525
5526struct mlx5_ifc_modify_cong_status_out_bits {
5527 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
5530 u8 syndrome[0x20];
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533};
5534
5535struct mlx5_ifc_modify_cong_status_in_bits {
5536 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540 u8 op_mod[0x10];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543 u8 priority[0x4];
5544 u8 cong_protocol[0x4];
5545
5546 u8 enable[0x1];
5547 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005548 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005549};
5550
5551struct mlx5_ifc_modify_cong_params_out_bits {
5552 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
5555 u8 syndrome[0x20];
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558};
5559
5560struct mlx5_ifc_modify_cong_params_in_bits {
5561 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563
Matan Barakb4ff3a32016-02-09 14:57:42 +02005564 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005565 u8 op_mod[0x10];
5566
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568 u8 cong_protocol[0x4];
5569
5570 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573
5574 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5575};
5576
5577struct mlx5_ifc_manage_pages_out_bits {
5578 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580
5581 u8 syndrome[0x20];
5582
5583 u8 output_num_entries[0x20];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586
5587 u8 pas[0][0x40];
5588};
5589
5590enum {
5591 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5592 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5593 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5594};
5595
5596struct mlx5_ifc_manage_pages_in_bits {
5597 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601 u8 op_mod[0x10];
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604 u8 function_id[0x10];
5605
5606 u8 input_num_entries[0x20];
5607
5608 u8 pas[0][0x40];
5609};
5610
5611struct mlx5_ifc_mad_ifc_out_bits {
5612 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614
5615 u8 syndrome[0x20];
5616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618
5619 u8 response_mad_packet[256][0x8];
5620};
5621
5622struct mlx5_ifc_mad_ifc_in_bits {
5623 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627 u8 op_mod[0x10];
5628
5629 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631 u8 port[0x8];
5632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634
5635 u8 mad[256][0x8];
5636};
5637
5638struct mlx5_ifc_init_hca_out_bits {
5639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641
5642 u8 syndrome[0x20];
5643
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645};
5646
5647struct mlx5_ifc_init_hca_in_bits {
5648 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650
Matan Barakb4ff3a32016-02-09 14:57:42 +02005651 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005652 u8 op_mod[0x10];
5653
Matan Barakb4ff3a32016-02-09 14:57:42 +02005654 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005655 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656};
5657
5658struct mlx5_ifc_init2rtr_qp_out_bits {
5659 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005660 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005661
5662 u8 syndrome[0x20];
5663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665};
5666
5667struct mlx5_ifc_init2rtr_qp_in_bits {
5668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670
Matan Barakb4ff3a32016-02-09 14:57:42 +02005671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005672 u8 op_mod[0x10];
5673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675 u8 qpn[0x18];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678
5679 u8 opt_param_mask[0x20];
5680
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682
5683 struct mlx5_ifc_qpc_bits qpc;
5684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686};
5687
5688struct mlx5_ifc_init2init_qp_out_bits {
5689 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005690 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005691
5692 u8 syndrome[0x20];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695};
5696
5697struct mlx5_ifc_init2init_qp_in_bits {
5698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005702 u8 op_mod[0x10];
5703
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705 u8 qpn[0x18];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708
5709 u8 opt_param_mask[0x20];
5710
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712
5713 struct mlx5_ifc_qpc_bits qpc;
5714
Matan Barakb4ff3a32016-02-09 14:57:42 +02005715 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005716};
5717
5718struct mlx5_ifc_get_dropped_packet_log_out_bits {
5719 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721
5722 u8 syndrome[0x20];
5723
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
5726 u8 packet_headers_log[128][0x8];
5727
5728 u8 packet_syndrome[64][0x8];
5729};
5730
5731struct mlx5_ifc_get_dropped_packet_log_in_bits {
5732 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 op_mod[0x10];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739};
5740
5741struct mlx5_ifc_gen_eqe_in_bits {
5742 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744
Matan Barakb4ff3a32016-02-09 14:57:42 +02005745 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005746 u8 op_mod[0x10];
5747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749 u8 eq_number[0x8];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752
5753 u8 eqe[64][0x8];
5754};
5755
5756struct mlx5_ifc_gen_eq_out_bits {
5757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759
5760 u8 syndrome[0x20];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763};
5764
5765struct mlx5_ifc_enable_hca_out_bits {
5766 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768
5769 u8 syndrome[0x20];
5770
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772};
5773
5774struct mlx5_ifc_enable_hca_in_bits {
5775 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779 u8 op_mod[0x10];
5780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 function_id[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785};
5786
5787struct mlx5_ifc_drain_dct_out_bits {
5788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
5791 u8 syndrome[0x20];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794};
5795
5796struct mlx5_ifc_drain_dct_in_bits {
5797 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005798 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005799
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801 u8 op_mod[0x10];
5802
Matan Barakb4ff3a32016-02-09 14:57:42 +02005803 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005804 u8 dctn[0x18];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807};
5808
5809struct mlx5_ifc_disable_hca_out_bits {
5810 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812
5813 u8 syndrome[0x20];
5814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816};
5817
5818struct mlx5_ifc_disable_hca_in_bits {
5819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823 u8 op_mod[0x10];
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826 u8 function_id[0x10];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829};
5830
5831struct mlx5_ifc_detach_from_mcg_out_bits {
5832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834
5835 u8 syndrome[0x20];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838};
5839
5840struct mlx5_ifc_detach_from_mcg_in_bits {
5841 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 op_mod[0x10];
5846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 qpn[0x18];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851
5852 u8 multicast_gid[16][0x8];
5853};
5854
Saeed Mahameed74862162016-06-09 15:11:34 +03005855struct mlx5_ifc_destroy_xrq_out_bits {
5856 u8 status[0x8];
5857 u8 reserved_at_8[0x18];
5858
5859 u8 syndrome[0x20];
5860
5861 u8 reserved_at_40[0x40];
5862};
5863
5864struct mlx5_ifc_destroy_xrq_in_bits {
5865 u8 opcode[0x10];
5866 u8 reserved_at_10[0x10];
5867
5868 u8 reserved_at_20[0x10];
5869 u8 op_mod[0x10];
5870
5871 u8 reserved_at_40[0x8];
5872 u8 xrqn[0x18];
5873
5874 u8 reserved_at_60[0x20];
5875};
5876
Saeed Mahameede2816822015-05-28 22:28:40 +03005877struct mlx5_ifc_destroy_xrc_srq_out_bits {
5878 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005879 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005880
5881 u8 syndrome[0x20];
5882
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884};
5885
5886struct mlx5_ifc_destroy_xrc_srq_in_bits {
5887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891 u8 op_mod[0x10];
5892
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894 u8 xrc_srqn[0x18];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897};
5898
5899struct mlx5_ifc_destroy_tis_out_bits {
5900 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902
5903 u8 syndrome[0x20];
5904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906};
5907
5908struct mlx5_ifc_destroy_tis_in_bits {
5909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913 u8 op_mod[0x10];
5914
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916 u8 tisn[0x18];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919};
5920
5921struct mlx5_ifc_destroy_tir_out_bits {
5922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
5925 u8 syndrome[0x20];
5926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928};
5929
5930struct mlx5_ifc_destroy_tir_in_bits {
5931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935 u8 op_mod[0x10];
5936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938 u8 tirn[0x18];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941};
5942
5943struct mlx5_ifc_destroy_srq_out_bits {
5944 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005946
5947 u8 syndrome[0x20];
5948
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950};
5951
5952struct mlx5_ifc_destroy_srq_in_bits {
5953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957 u8 op_mod[0x10];
5958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 srqn[0x18];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963};
5964
5965struct mlx5_ifc_destroy_sq_out_bits {
5966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968
5969 u8 syndrome[0x20];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972};
5973
5974struct mlx5_ifc_destroy_sq_in_bits {
5975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005977
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979 u8 op_mod[0x10];
5980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 sqn[0x18];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985};
5986
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005987struct mlx5_ifc_destroy_scheduling_element_out_bits {
5988 u8 status[0x8];
5989 u8 reserved_at_8[0x18];
5990
5991 u8 syndrome[0x20];
5992
5993 u8 reserved_at_40[0x1c0];
5994};
5995
5996struct mlx5_ifc_destroy_scheduling_element_in_bits {
5997 u8 opcode[0x10];
5998 u8 reserved_at_10[0x10];
5999
6000 u8 reserved_at_20[0x10];
6001 u8 op_mod[0x10];
6002
6003 u8 scheduling_hierarchy[0x8];
6004 u8 reserved_at_48[0x18];
6005
6006 u8 scheduling_element_id[0x20];
6007
6008 u8 reserved_at_80[0x180];
6009};
6010
Saeed Mahameede2816822015-05-28 22:28:40 +03006011struct mlx5_ifc_destroy_rqt_out_bits {
6012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014
6015 u8 syndrome[0x20];
6016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018};
6019
6020struct mlx5_ifc_destroy_rqt_in_bits {
6021 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025 u8 op_mod[0x10];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028 u8 rqtn[0x18];
6029
Matan Barakb4ff3a32016-02-09 14:57:42 +02006030 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006031};
6032
6033struct mlx5_ifc_destroy_rq_out_bits {
6034 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036
6037 u8 syndrome[0x20];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040};
6041
6042struct mlx5_ifc_destroy_rq_in_bits {
6043 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047 u8 op_mod[0x10];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050 u8 rqn[0x18];
6051
Matan Barakb4ff3a32016-02-09 14:57:42 +02006052 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006053};
6054
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006055struct mlx5_ifc_set_delay_drop_params_in_bits {
6056 u8 opcode[0x10];
6057 u8 reserved_at_10[0x10];
6058
6059 u8 reserved_at_20[0x10];
6060 u8 op_mod[0x10];
6061
6062 u8 reserved_at_40[0x20];
6063
6064 u8 reserved_at_60[0x10];
6065 u8 delay_drop_timeout[0x10];
6066};
6067
6068struct mlx5_ifc_set_delay_drop_params_out_bits {
6069 u8 status[0x8];
6070 u8 reserved_at_8[0x18];
6071
6072 u8 syndrome[0x20];
6073
6074 u8 reserved_at_40[0x40];
6075};
6076
Saeed Mahameede2816822015-05-28 22:28:40 +03006077struct mlx5_ifc_destroy_rmp_out_bits {
6078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080
6081 u8 syndrome[0x20];
6082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084};
6085
6086struct mlx5_ifc_destroy_rmp_in_bits {
6087 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089
Matan Barakb4ff3a32016-02-09 14:57:42 +02006090 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006091 u8 op_mod[0x10];
6092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094 u8 rmpn[0x18];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097};
6098
6099struct mlx5_ifc_destroy_qp_out_bits {
6100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102
6103 u8 syndrome[0x20];
6104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106};
6107
6108struct mlx5_ifc_destroy_qp_in_bits {
6109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113 u8 op_mod[0x10];
6114
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116 u8 qpn[0x18];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119};
6120
6121struct mlx5_ifc_destroy_psv_out_bits {
6122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124
6125 u8 syndrome[0x20];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_destroy_psv_in_bits {
6131 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135 u8 op_mod[0x10];
6136
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138 u8 psvn[0x18];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141};
6142
6143struct mlx5_ifc_destroy_mkey_out_bits {
6144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
6147 u8 syndrome[0x20];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_destroy_mkey_in_bits {
6153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157 u8 op_mod[0x10];
6158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 mkey_index[0x18];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163};
6164
6165struct mlx5_ifc_destroy_flow_table_out_bits {
6166 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168
6169 u8 syndrome[0x20];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172};
6173
6174struct mlx5_ifc_destroy_flow_table_in_bits {
6175 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179 u8 op_mod[0x10];
6180
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006181 u8 other_vport[0x1];
6182 u8 reserved_at_41[0xf];
6183 u8 vport_number[0x10];
6184
6185 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
6187 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006188 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 table_id[0x18];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194};
6195
6196struct mlx5_ifc_destroy_flow_group_out_bits {
6197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
6200 u8 syndrome[0x20];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203};
6204
6205struct mlx5_ifc_destroy_flow_group_in_bits {
6206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210 u8 op_mod[0x10];
6211
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006212 u8 other_vport[0x1];
6213 u8 reserved_at_41[0xf];
6214 u8 vport_number[0x10];
6215
6216 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
6218 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222 u8 table_id[0x18];
6223
6224 u8 group_id[0x20];
6225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227};
6228
6229struct mlx5_ifc_destroy_eq_out_bits {
6230 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232
6233 u8 syndrome[0x20];
6234
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236};
6237
6238struct mlx5_ifc_destroy_eq_in_bits {
6239 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243 u8 op_mod[0x10];
6244
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246 u8 eq_number[0x8];
6247
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249};
6250
6251struct mlx5_ifc_destroy_dct_out_bits {
6252 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254
6255 u8 syndrome[0x20];
6256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258};
6259
6260struct mlx5_ifc_destroy_dct_in_bits {
6261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006263
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265 u8 op_mod[0x10];
6266
Matan Barakb4ff3a32016-02-09 14:57:42 +02006267 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006268 u8 dctn[0x18];
6269
Matan Barakb4ff3a32016-02-09 14:57:42 +02006270 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006271};
6272
6273struct mlx5_ifc_destroy_cq_out_bits {
6274 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276
6277 u8 syndrome[0x20];
6278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280};
6281
6282struct mlx5_ifc_destroy_cq_in_bits {
6283 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287 u8 op_mod[0x10];
6288
Matan Barakb4ff3a32016-02-09 14:57:42 +02006289 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006290 u8 cqn[0x18];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293};
6294
6295struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298
6299 u8 syndrome[0x20];
6300
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302};
6303
6304struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6305 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006306 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006307
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309 u8 op_mod[0x10];
6310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314 u8 vxlan_udp_port[0x10];
6315};
6316
6317struct mlx5_ifc_delete_l2_table_entry_out_bits {
6318 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320
6321 u8 syndrome[0x20];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324};
6325
6326struct mlx5_ifc_delete_l2_table_entry_in_bits {
6327 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331 u8 op_mod[0x10];
6332
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336 u8 table_index[0x18];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339};
6340
6341struct mlx5_ifc_delete_fte_out_bits {
6342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344
6345 u8 syndrome[0x20];
6346
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348};
6349
6350struct mlx5_ifc_delete_fte_in_bits {
6351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355 u8 op_mod[0x10];
6356
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006357 u8 other_vport[0x1];
6358 u8 reserved_at_41[0xf];
6359 u8 vport_number[0x10];
6360
6361 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006362
6363 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006364 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367 u8 table_id[0x18];
6368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370
6371 u8 flow_index[0x20];
6372
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374};
6375
6376struct mlx5_ifc_dealloc_xrcd_out_bits {
6377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379
6380 u8 syndrome[0x20];
6381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383};
6384
6385struct mlx5_ifc_dealloc_xrcd_in_bits {
6386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390 u8 op_mod[0x10];
6391
Matan Barakb4ff3a32016-02-09 14:57:42 +02006392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006393 u8 xrcd[0x18];
6394
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396};
6397
6398struct mlx5_ifc_dealloc_uar_out_bits {
6399 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 u8 syndrome[0x20];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405};
6406
6407struct mlx5_ifc_dealloc_uar_in_bits {
6408 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006409 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006410
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412 u8 op_mod[0x10];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415 u8 uar[0x18];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418};
6419
6420struct mlx5_ifc_dealloc_transport_domain_out_bits {
6421 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
6424 u8 syndrome[0x20];
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427};
6428
6429struct mlx5_ifc_dealloc_transport_domain_in_bits {
6430 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434 u8 op_mod[0x10];
6435
Matan Barakb4ff3a32016-02-09 14:57:42 +02006436 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006437 u8 transport_domain[0x18];
6438
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440};
6441
6442struct mlx5_ifc_dealloc_q_counter_out_bits {
6443 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445
6446 u8 syndrome[0x20];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449};
6450
6451struct mlx5_ifc_dealloc_q_counter_in_bits {
6452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456 u8 op_mod[0x10];
6457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459 u8 counter_set_id[0x8];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462};
6463
6464struct mlx5_ifc_dealloc_pd_out_bits {
6465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467
6468 u8 syndrome[0x20];
6469
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471};
6472
6473struct mlx5_ifc_dealloc_pd_in_bits {
6474 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478 u8 op_mod[0x10];
6479
Matan Barakb4ff3a32016-02-09 14:57:42 +02006480 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006481 u8 pd[0x18];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484};
6485
Amir Vadai9dc0b282016-05-13 12:55:39 +00006486struct mlx5_ifc_dealloc_flow_counter_out_bits {
6487 u8 status[0x8];
6488 u8 reserved_at_8[0x18];
6489
6490 u8 syndrome[0x20];
6491
6492 u8 reserved_at_40[0x40];
6493};
6494
6495struct mlx5_ifc_dealloc_flow_counter_in_bits {
6496 u8 opcode[0x10];
6497 u8 reserved_at_10[0x10];
6498
6499 u8 reserved_at_20[0x10];
6500 u8 op_mod[0x10];
6501
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006502 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006503
6504 u8 reserved_at_60[0x20];
6505};
6506
Saeed Mahameed74862162016-06-09 15:11:34 +03006507struct mlx5_ifc_create_xrq_out_bits {
6508 u8 status[0x8];
6509 u8 reserved_at_8[0x18];
6510
6511 u8 syndrome[0x20];
6512
6513 u8 reserved_at_40[0x8];
6514 u8 xrqn[0x18];
6515
6516 u8 reserved_at_60[0x20];
6517};
6518
6519struct mlx5_ifc_create_xrq_in_bits {
6520 u8 opcode[0x10];
6521 u8 reserved_at_10[0x10];
6522
6523 u8 reserved_at_20[0x10];
6524 u8 op_mod[0x10];
6525
6526 u8 reserved_at_40[0x40];
6527
6528 struct mlx5_ifc_xrqc_bits xrq_context;
6529};
6530
Saeed Mahameede2816822015-05-28 22:28:40 +03006531struct mlx5_ifc_create_xrc_srq_out_bits {
6532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534
6535 u8 syndrome[0x20];
6536
Matan Barakb4ff3a32016-02-09 14:57:42 +02006537 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006538 u8 xrc_srqn[0x18];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541};
6542
6543struct mlx5_ifc_create_xrc_srq_in_bits {
6544 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
Matan Barakb4ff3a32016-02-09 14:57:42 +02006547 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006548 u8 op_mod[0x10];
6549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551
6552 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
6556 u8 pas[0][0x40];
6557};
6558
6559struct mlx5_ifc_create_tis_out_bits {
6560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006562
6563 u8 syndrome[0x20];
6564
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566 u8 tisn[0x18];
6567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569};
6570
6571struct mlx5_ifc_create_tis_in_bits {
6572 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576 u8 op_mod[0x10];
6577
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579
6580 struct mlx5_ifc_tisc_bits ctx;
6581};
6582
6583struct mlx5_ifc_create_tir_out_bits {
6584 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
6587 u8 syndrome[0x20];
6588
Matan Barakb4ff3a32016-02-09 14:57:42 +02006589 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006590 u8 tirn[0x18];
6591
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593};
6594
6595struct mlx5_ifc_create_tir_in_bits {
6596 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600 u8 op_mod[0x10];
6601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603
6604 struct mlx5_ifc_tirc_bits ctx;
6605};
6606
6607struct mlx5_ifc_create_srq_out_bits {
6608 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
6611 u8 syndrome[0x20];
6612
Matan Barakb4ff3a32016-02-09 14:57:42 +02006613 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006614 u8 srqn[0x18];
6615
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617};
6618
6619struct mlx5_ifc_create_srq_in_bits {
6620 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006621 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006622
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624 u8 op_mod[0x10];
6625
Matan Barakb4ff3a32016-02-09 14:57:42 +02006626 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006627
6628 struct mlx5_ifc_srqc_bits srq_context_entry;
6629
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631
6632 u8 pas[0][0x40];
6633};
6634
6635struct mlx5_ifc_create_sq_out_bits {
6636 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638
6639 u8 syndrome[0x20];
6640
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642 u8 sqn[0x18];
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645};
6646
6647struct mlx5_ifc_create_sq_in_bits {
6648 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650
Matan Barakb4ff3a32016-02-09 14:57:42 +02006651 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006652 u8 op_mod[0x10];
6653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655
6656 struct mlx5_ifc_sqc_bits ctx;
6657};
6658
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006659struct mlx5_ifc_create_scheduling_element_out_bits {
6660 u8 status[0x8];
6661 u8 reserved_at_8[0x18];
6662
6663 u8 syndrome[0x20];
6664
6665 u8 reserved_at_40[0x40];
6666
6667 u8 scheduling_element_id[0x20];
6668
6669 u8 reserved_at_a0[0x160];
6670};
6671
6672struct mlx5_ifc_create_scheduling_element_in_bits {
6673 u8 opcode[0x10];
6674 u8 reserved_at_10[0x10];
6675
6676 u8 reserved_at_20[0x10];
6677 u8 op_mod[0x10];
6678
6679 u8 scheduling_hierarchy[0x8];
6680 u8 reserved_at_48[0x18];
6681
6682 u8 reserved_at_60[0xa0];
6683
6684 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6685
6686 u8 reserved_at_300[0x100];
6687};
6688
Saeed Mahameede2816822015-05-28 22:28:40 +03006689struct mlx5_ifc_create_rqt_out_bits {
6690 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006691 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006692
6693 u8 syndrome[0x20];
6694
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696 u8 rqtn[0x18];
6697
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699};
6700
6701struct mlx5_ifc_create_rqt_in_bits {
6702 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704
Matan Barakb4ff3a32016-02-09 14:57:42 +02006705 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006706 u8 op_mod[0x10];
6707
Matan Barakb4ff3a32016-02-09 14:57:42 +02006708 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709
6710 struct mlx5_ifc_rqtc_bits rqt_context;
6711};
6712
6713struct mlx5_ifc_create_rq_out_bits {
6714 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716
6717 u8 syndrome[0x20];
6718
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720 u8 rqn[0x18];
6721
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723};
6724
6725struct mlx5_ifc_create_rq_in_bits {
6726 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730 u8 op_mod[0x10];
6731
Matan Barakb4ff3a32016-02-09 14:57:42 +02006732 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006733
6734 struct mlx5_ifc_rqc_bits ctx;
6735};
6736
6737struct mlx5_ifc_create_rmp_out_bits {
6738 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740
6741 u8 syndrome[0x20];
6742
Matan Barakb4ff3a32016-02-09 14:57:42 +02006743 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006744 u8 rmpn[0x18];
6745
Matan Barakb4ff3a32016-02-09 14:57:42 +02006746 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006747};
6748
6749struct mlx5_ifc_create_rmp_in_bits {
6750 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754 u8 op_mod[0x10];
6755
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757
6758 struct mlx5_ifc_rmpc_bits ctx;
6759};
6760
6761struct mlx5_ifc_create_qp_out_bits {
6762 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
6765 u8 syndrome[0x20];
6766
Matan Barakb4ff3a32016-02-09 14:57:42 +02006767 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006768 u8 qpn[0x18];
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771};
6772
6773struct mlx5_ifc_create_qp_in_bits {
6774 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778 u8 op_mod[0x10];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781
6782 u8 opt_param_mask[0x20];
6783
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
6786 struct mlx5_ifc_qpc_bits qpc;
6787
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
6790 u8 pas[0][0x40];
6791};
6792
6793struct mlx5_ifc_create_psv_out_bits {
6794 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006795 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006796
6797 u8 syndrome[0x20];
6798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802 u8 psv0_index[0x18];
6803
Matan Barakb4ff3a32016-02-09 14:57:42 +02006804 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006805 u8 psv1_index[0x18];
6806
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808 u8 psv2_index[0x18];
6809
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811 u8 psv3_index[0x18];
6812};
6813
6814struct mlx5_ifc_create_psv_in_bits {
6815 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817
Matan Barakb4ff3a32016-02-09 14:57:42 +02006818 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006819 u8 op_mod[0x10];
6820
6821 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006822 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823 u8 pd[0x18];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826};
6827
6828struct mlx5_ifc_create_mkey_out_bits {
6829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
6832 u8 syndrome[0x20];
6833
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835 u8 mkey_index[0x18];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838};
6839
6840struct mlx5_ifc_create_mkey_in_bits {
6841 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006842 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006843
Matan Barakb4ff3a32016-02-09 14:57:42 +02006844 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006845 u8 op_mod[0x10];
6846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848
6849 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851
6852 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855
6856 u8 translations_octword_actual_size[0x20];
6857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859
6860 u8 klm_pas_mtt[0][0x20];
6861};
6862
6863struct mlx5_ifc_create_flow_table_out_bits {
6864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866
6867 u8 syndrome[0x20];
6868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870 u8 table_id[0x18];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006875struct mlx5_ifc_flow_table_context_bits {
6876 u8 encap_en[0x1];
6877 u8 decap_en[0x1];
6878 u8 reserved_at_2[0x2];
6879 u8 table_miss_action[0x4];
6880 u8 level[0x8];
6881 u8 reserved_at_10[0x8];
6882 u8 log_size[0x8];
6883
6884 u8 reserved_at_20[0x8];
6885 u8 table_miss_id[0x18];
6886
6887 u8 reserved_at_40[0x8];
6888 u8 lag_master_next_table_id[0x18];
6889
6890 u8 reserved_at_60[0xe0];
6891};
6892
Saeed Mahameede2816822015-05-28 22:28:40 +03006893struct mlx5_ifc_create_flow_table_in_bits {
6894 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898 u8 op_mod[0x10];
6899
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006900 u8 other_vport[0x1];
6901 u8 reserved_at_41[0xf];
6902 u8 vport_number[0x10];
6903
6904 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006905
6906 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006911 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006912};
6913
6914struct mlx5_ifc_create_flow_group_out_bits {
6915 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006916 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917
6918 u8 syndrome[0x20];
6919
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921 u8 group_id[0x18];
6922
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924};
6925
6926enum {
6927 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6928 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6929 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6930};
6931
6932struct mlx5_ifc_create_flow_group_in_bits {
6933 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935
Matan Barakb4ff3a32016-02-09 14:57:42 +02006936 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006937 u8 op_mod[0x10];
6938
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006939 u8 other_vport[0x1];
6940 u8 reserved_at_41[0xf];
6941 u8 vport_number[0x10];
6942
6943 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006944
6945 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949 u8 table_id[0x18];
6950
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
6953 u8 start_flow_index[0x20];
6954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956
6957 u8 end_flow_index[0x20];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962 u8 match_criteria_enable[0x8];
6963
6964 struct mlx5_ifc_fte_match_param_bits match_criteria;
6965
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967};
6968
6969struct mlx5_ifc_create_eq_out_bits {
6970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972
6973 u8 syndrome[0x20];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976 u8 eq_number[0x8];
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979};
6980
6981struct mlx5_ifc_create_eq_in_bits {
6982 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
Matan Barakb4ff3a32016-02-09 14:57:42 +02006985 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006986 u8 op_mod[0x10];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989
6990 struct mlx5_ifc_eqc_bits eq_context_entry;
6991
Matan Barakb4ff3a32016-02-09 14:57:42 +02006992 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006993
6994 u8 event_bitmask[0x40];
6995
Matan Barakb4ff3a32016-02-09 14:57:42 +02006996 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006997
6998 u8 pas[0][0x40];
6999};
7000
7001struct mlx5_ifc_create_dct_out_bits {
7002 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004
7005 u8 syndrome[0x20];
7006
Matan Barakb4ff3a32016-02-09 14:57:42 +02007007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007008 u8 dctn[0x18];
7009
Matan Barakb4ff3a32016-02-09 14:57:42 +02007010 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007011};
7012
7013struct mlx5_ifc_create_dct_in_bits {
7014 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018 u8 op_mod[0x10];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021
7022 struct mlx5_ifc_dctc_bits dct_context_entry;
7023
Matan Barakb4ff3a32016-02-09 14:57:42 +02007024 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007025};
7026
7027struct mlx5_ifc_create_cq_out_bits {
7028 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030
7031 u8 syndrome[0x20];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034 u8 cqn[0x18];
7035
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037};
7038
7039struct mlx5_ifc_create_cq_in_bits {
7040 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044 u8 op_mod[0x10];
7045
Matan Barakb4ff3a32016-02-09 14:57:42 +02007046 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007047
7048 struct mlx5_ifc_cqc_bits cq_context;
7049
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051
7052 u8 pas[0][0x40];
7053};
7054
7055struct mlx5_ifc_config_int_moderation_out_bits {
7056 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058
7059 u8 syndrome[0x20];
7060
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062 u8 min_delay[0xc];
7063 u8 int_vector[0x10];
7064
Matan Barakb4ff3a32016-02-09 14:57:42 +02007065 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007066};
7067
7068enum {
7069 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7070 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7071};
7072
7073struct mlx5_ifc_config_int_moderation_in_bits {
7074 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078 u8 op_mod[0x10];
7079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081 u8 min_delay[0xc];
7082 u8 int_vector[0x10];
7083
Matan Barakb4ff3a32016-02-09 14:57:42 +02007084 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007085};
7086
7087struct mlx5_ifc_attach_to_mcg_out_bits {
7088 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090
7091 u8 syndrome[0x20];
7092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094};
7095
7096struct mlx5_ifc_attach_to_mcg_in_bits {
7097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101 u8 op_mod[0x10];
7102
Matan Barakb4ff3a32016-02-09 14:57:42 +02007103 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007104 u8 qpn[0x18];
7105
Matan Barakb4ff3a32016-02-09 14:57:42 +02007106 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007107
7108 u8 multicast_gid[16][0x8];
7109};
7110
Saeed Mahameed74862162016-06-09 15:11:34 +03007111struct mlx5_ifc_arm_xrq_out_bits {
7112 u8 status[0x8];
7113 u8 reserved_at_8[0x18];
7114
7115 u8 syndrome[0x20];
7116
7117 u8 reserved_at_40[0x40];
7118};
7119
7120struct mlx5_ifc_arm_xrq_in_bits {
7121 u8 opcode[0x10];
7122 u8 reserved_at_10[0x10];
7123
7124 u8 reserved_at_20[0x10];
7125 u8 op_mod[0x10];
7126
7127 u8 reserved_at_40[0x8];
7128 u8 xrqn[0x18];
7129
7130 u8 reserved_at_60[0x10];
7131 u8 lwm[0x10];
7132};
7133
Saeed Mahameede2816822015-05-28 22:28:40 +03007134struct mlx5_ifc_arm_xrc_srq_out_bits {
7135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137
7138 u8 syndrome[0x20];
7139
Matan Barakb4ff3a32016-02-09 14:57:42 +02007140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007141};
7142
7143enum {
7144 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7145};
7146
7147struct mlx5_ifc_arm_xrc_srq_in_bits {
7148 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
Matan Barakb4ff3a32016-02-09 14:57:42 +02007151 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007152 u8 op_mod[0x10];
7153
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155 u8 xrc_srqn[0x18];
7156
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158 u8 lwm[0x10];
7159};
7160
7161struct mlx5_ifc_arm_rq_out_bits {
7162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164
7165 u8 syndrome[0x20];
7166
Matan Barakb4ff3a32016-02-09 14:57:42 +02007167 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007168};
7169
7170enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007171 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7172 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007173};
7174
7175struct mlx5_ifc_arm_rq_in_bits {
7176 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007177 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007178
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180 u8 op_mod[0x10];
7181
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183 u8 srq_number[0x18];
7184
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186 u8 lwm[0x10];
7187};
7188
7189struct mlx5_ifc_arm_dct_out_bits {
7190 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192
7193 u8 syndrome[0x20];
7194
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196};
7197
7198struct mlx5_ifc_arm_dct_in_bits {
7199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203 u8 op_mod[0x10];
7204
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206 u8 dct_number[0x18];
7207
Matan Barakb4ff3a32016-02-09 14:57:42 +02007208 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007209};
7210
7211struct mlx5_ifc_alloc_xrcd_out_bits {
7212 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214
7215 u8 syndrome[0x20];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218 u8 xrcd[0x18];
7219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221};
7222
7223struct mlx5_ifc_alloc_xrcd_in_bits {
7224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228 u8 op_mod[0x10];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231};
7232
7233struct mlx5_ifc_alloc_uar_out_bits {
7234 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
7237 u8 syndrome[0x20];
7238
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240 u8 uar[0x18];
7241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243};
7244
7245struct mlx5_ifc_alloc_uar_in_bits {
7246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250 u8 op_mod[0x10];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253};
7254
7255struct mlx5_ifc_alloc_transport_domain_out_bits {
7256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258
7259 u8 syndrome[0x20];
7260
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 transport_domain[0x18];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265};
7266
7267struct mlx5_ifc_alloc_transport_domain_in_bits {
7268 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007269 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007270
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272 u8 op_mod[0x10];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275};
7276
7277struct mlx5_ifc_alloc_q_counter_out_bits {
7278 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280
7281 u8 syndrome[0x20];
7282
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284 u8 counter_set_id[0x8];
7285
Matan Barakb4ff3a32016-02-09 14:57:42 +02007286 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287};
7288
7289struct mlx5_ifc_alloc_q_counter_in_bits {
7290 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292
Matan Barakb4ff3a32016-02-09 14:57:42 +02007293 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007294 u8 op_mod[0x10];
7295
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297};
7298
7299struct mlx5_ifc_alloc_pd_out_bits {
7300 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007301 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007302
7303 u8 syndrome[0x20];
7304
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306 u8 pd[0x18];
7307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309};
7310
7311struct mlx5_ifc_alloc_pd_in_bits {
7312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
Matan Barakb4ff3a32016-02-09 14:57:42 +02007315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007316 u8 op_mod[0x10];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319};
7320
Amir Vadai9dc0b282016-05-13 12:55:39 +00007321struct mlx5_ifc_alloc_flow_counter_out_bits {
7322 u8 status[0x8];
7323 u8 reserved_at_8[0x18];
7324
7325 u8 syndrome[0x20];
7326
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007327 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007328
7329 u8 reserved_at_60[0x20];
7330};
7331
7332struct mlx5_ifc_alloc_flow_counter_in_bits {
7333 u8 opcode[0x10];
7334 u8 reserved_at_10[0x10];
7335
7336 u8 reserved_at_20[0x10];
7337 u8 op_mod[0x10];
7338
7339 u8 reserved_at_40[0x40];
7340};
7341
Saeed Mahameede2816822015-05-28 22:28:40 +03007342struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7343 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007344 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007345
7346 u8 syndrome[0x20];
7347
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349};
7350
7351struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7352 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356 u8 op_mod[0x10];
7357
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361 u8 vxlan_udp_port[0x10];
7362};
7363
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007364struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007365 u8 status[0x8];
7366 u8 reserved_at_8[0x18];
7367
7368 u8 syndrome[0x20];
7369
7370 u8 reserved_at_40[0x40];
7371};
7372
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007373struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007374 u8 opcode[0x10];
7375 u8 reserved_at_10[0x10];
7376
7377 u8 reserved_at_20[0x10];
7378 u8 op_mod[0x10];
7379
7380 u8 reserved_at_40[0x10];
7381 u8 rate_limit_index[0x10];
7382
7383 u8 reserved_at_60[0x20];
7384
7385 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007386
7387 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007388};
7389
Saeed Mahameede2816822015-05-28 22:28:40 +03007390struct mlx5_ifc_access_register_out_bits {
7391 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393
7394 u8 syndrome[0x20];
7395
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397
7398 u8 register_data[0][0x20];
7399};
7400
7401enum {
7402 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7403 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7404};
7405
7406struct mlx5_ifc_access_register_in_bits {
7407 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411 u8 op_mod[0x10];
7412
Matan Barakb4ff3a32016-02-09 14:57:42 +02007413 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007414 u8 register_id[0x10];
7415
7416 u8 argument[0x20];
7417
7418 u8 register_data[0][0x20];
7419};
7420
7421struct mlx5_ifc_sltp_reg_bits {
7422 u8 status[0x4];
7423 u8 version[0x4];
7424 u8 local_port[0x8];
7425 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433 u8 polarity[0x1];
7434 u8 ob_tap0[0x8];
7435 u8 ob_tap1[0x8];
7436 u8 ob_tap2[0x8];
7437
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 ob_preemp_mode[0x4];
7440 u8 ob_reg[0x8];
7441 u8 ob_bias[0x8];
7442
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444};
7445
7446struct mlx5_ifc_slrg_reg_bits {
7447 u8 status[0x4];
7448 u8 version[0x4];
7449 u8 local_port[0x8];
7450 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007453 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007454
7455 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457 u8 grade_lane_speed[0x4];
7458
7459 u8 grade_version[0x8];
7460 u8 grade[0x18];
7461
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463 u8 height_grade_type[0x4];
7464 u8 height_grade[0x18];
7465
7466 u8 height_dz[0x10];
7467 u8 height_dv[0x10];
7468
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 height_sigma[0x10];
7471
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473
Matan Barakb4ff3a32016-02-09 14:57:42 +02007474 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475 u8 phase_grade_type[0x4];
7476 u8 phase_grade[0x18];
7477
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481 u8 phase_eo_neg[0x8];
7482
7483 u8 ffe_set_tested[0x10];
7484 u8 test_errors_per_lane[0x10];
7485};
7486
7487struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 vl_hw_cap[0x4];
7494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496 u8 vl_admin[0x4];
7497
Matan Barakb4ff3a32016-02-09 14:57:42 +02007498 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007499 u8 vl_operational[0x4];
7500};
7501
7502struct mlx5_ifc_pude_reg_bits {
7503 u8 swid[0x8];
7504 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 oper_status[0x4];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
7513struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007514 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007515 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007516 u8 an_disable_cap[0x1];
7517 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 proto_mask[0x3];
7521
Saeed Mahameed74862162016-06-09 15:11:34 +03007522 u8 an_status[0x4];
7523 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524
7525 u8 eth_proto_capability[0x20];
7526
7527 u8 ib_link_width_capability[0x10];
7528 u8 ib_proto_capability[0x10];
7529
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531
7532 u8 eth_proto_admin[0x20];
7533
7534 u8 ib_link_width_admin[0x10];
7535 u8 ib_proto_admin[0x10];
7536
Matan Barakb4ff3a32016-02-09 14:57:42 +02007537 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007538
7539 u8 eth_proto_oper[0x20];
7540
7541 u8 ib_link_width_oper[0x10];
7542 u8 ib_proto_oper[0x10];
7543
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007544 u8 reserved_at_160[0x1c];
7545 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546
7547 u8 eth_proto_lp_advertise[0x20];
7548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550};
7551
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007552struct mlx5_ifc_mlcr_reg_bits {
7553 u8 reserved_at_0[0x8];
7554 u8 local_port[0x8];
7555 u8 reserved_at_10[0x20];
7556
7557 u8 beacon_duration[0x10];
7558 u8 reserved_at_40[0x10];
7559
7560 u8 beacon_remain[0x10];
7561};
7562
Saeed Mahameede2816822015-05-28 22:28:40 +03007563struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565
7566 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568 u8 repetitions_mode[0x4];
7569 u8 num_of_repetitions[0x8];
7570
7571 u8 grade_version[0x8];
7572 u8 height_grade_type[0x4];
7573 u8 phase_grade_type[0x4];
7574 u8 height_grade_weight[0x8];
7575 u8 phase_grade_weight[0x8];
7576
7577 u8 gisim_measure_bits[0x10];
7578 u8 adaptive_tap_measure_bits[0x10];
7579
7580 u8 ber_bath_high_error_threshold[0x10];
7581 u8 ber_bath_mid_error_threshold[0x10];
7582
7583 u8 ber_bath_low_error_threshold[0x10];
7584 u8 one_ratio_high_threshold[0x10];
7585
7586 u8 one_ratio_high_mid_threshold[0x10];
7587 u8 one_ratio_low_mid_threshold[0x10];
7588
7589 u8 one_ratio_low_threshold[0x10];
7590 u8 ndeo_error_threshold[0x10];
7591
7592 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 mix90_phase_for_voltage_bath[0x8];
7595
7596 u8 mixer_offset_start[0x10];
7597 u8 mixer_offset_end[0x10];
7598
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600 u8 ber_test_time[0xb];
7601};
7602
7603struct mlx5_ifc_pspa_reg_bits {
7604 u8 swid[0x8];
7605 u8 local_port[0x8];
7606 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610};
7611
7612struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 mode[0x2];
7619
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623 u8 min_threshold[0x10];
7624
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 max_threshold[0x10];
7627
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629 u8 mark_probability_denominator[0x10];
7630
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632};
7633
7634struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 wrps_admin[0x4];
7643
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645 u8 wrps_status[0x4];
7646
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 down_threshold[0x8];
7651
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653
Matan Barakb4ff3a32016-02-09 14:57:42 +02007654 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007655 u8 srps_admin[0x4];
7656
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 srps_status[0x4];
7659
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661};
7662
7663struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007664 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007665 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 lb_en[0x8];
7672};
7673
7674struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680
7681 u8 port_profile_mode[0x8];
7682 u8 static_port_profile[0x8];
7683 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685
7686 u8 retransmission_active[0x8];
7687 u8 fec_mode_active[0x18];
7688
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690};
7691
7692struct mlx5_ifc_ppcnt_reg_bits {
7693 u8 swid[0x8];
7694 u8 local_port[0x8];
7695 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697 u8 grp[0x6];
7698
7699 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007700 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007701 u8 prio_tc[0x3];
7702
7703 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7704};
7705
Gal Pressman8ed1a632016-11-17 13:46:01 +02007706struct mlx5_ifc_mpcnt_reg_bits {
7707 u8 reserved_at_0[0x8];
7708 u8 pcie_index[0x8];
7709 u8 reserved_at_10[0xa];
7710 u8 grp[0x6];
7711
7712 u8 clr[0x1];
7713 u8 reserved_at_21[0x1f];
7714
7715 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7716};
7717
Saeed Mahameede2816822015-05-28 22:28:40 +03007718struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722 u8 local_port[0x8];
7723 u8 mac_47_32[0x10];
7724
7725 u8 mac_31_0[0x20];
7726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734
7735 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007736 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007737
7738 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740
7741 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007742 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007743};
7744
7745struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749
Matan Barakb4ff3a32016-02-09 14:57:42 +02007750 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007751 u8 attenuation_5g[0x8];
7752
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754 u8 attenuation_7g[0x8];
7755
Matan Barakb4ff3a32016-02-09 14:57:42 +02007756 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007757 u8 attenuation_12g[0x8];
7758};
7759
7760struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 module_status[0x4];
7765
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767};
7768
7769struct mlx5_ifc_pmpc_reg_bits {
7770 u8 module_state_updated[32][0x8];
7771};
7772
7773struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775 u8 mlpn_status[0x4];
7776 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007777 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007778
7779 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007780 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007781};
7782
7783struct mlx5_ifc_pmlp_reg_bits {
7784 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788 u8 width[0x8];
7789
7790 u8 lane0_module_mapping[0x20];
7791
7792 u8 lane1_module_mapping[0x20];
7793
7794 u8 lane2_module_mapping[0x20];
7795
7796 u8 lane3_module_mapping[0x20];
7797
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799};
7800
7801struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807 u8 oper_status[0x4];
7808
7809 u8 ase[0x1];
7810 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812 u8 e[0x2];
7813
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815};
7816
7817struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007822 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007823
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825 u8 lane_speed[0x10];
7826
Matan Barakb4ff3a32016-02-09 14:57:42 +02007827 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007828 u8 lpbf[0x1];
7829 u8 fec_mode_policy[0x8];
7830
7831 u8 retransmission_capability[0x8];
7832 u8 fec_mode_capability[0x18];
7833
7834 u8 retransmission_support_admin[0x8];
7835 u8 fec_mode_support_admin[0x18];
7836
7837 u8 retransmission_request_admin[0x8];
7838 u8 fec_mode_request_admin[0x18];
7839
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841};
7842
7843struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 ib_port[0x8];
7848
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850};
7851
7852struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007855 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007856 u8 lbf_mode[0x3];
7857
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859};
7860
7861struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865
7866 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007867 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007868 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007869 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007870};
7871
7872struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876
Matan Barakb4ff3a32016-02-09 14:57:42 +02007877 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007878
7879 u8 port_filter[8][0x20];
7880
7881 u8 port_filter_update_en[8][0x20];
7882};
7883
7884struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007885 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007886 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007887 u8 reserved_at_10[0xb];
7888 u8 ppan_mask_n[0x1];
7889 u8 minor_stall_mask[0x1];
7890 u8 critical_stall_mask[0x1];
7891 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892
7893 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007894 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007895 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897 u8 prio_mask_rx[0x8];
7898
7899 u8 pptx[0x1];
7900 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007901 u8 pptx_mask_n[0x1];
7902 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905
7906 u8 pprx[0x1];
7907 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007908 u8 pprx_mask_n[0x1];
7909 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007910 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912
Inbar Karmy2afa6092017-11-20 18:06:20 +02007913 u8 device_stall_minor_watermark[0x10];
7914 u8 device_stall_critical_watermark[0x10];
7915
7916 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917};
7918
7919struct mlx5_ifc_pelc_reg_bits {
7920 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924
7925 u8 op_admin[0x8];
7926 u8 op_capability[0x8];
7927 u8 op_request[0x8];
7928 u8 op_active[0x8];
7929
7930 u8 admin[0x40];
7931
7932 u8 capability[0x40];
7933
7934 u8 request[0x40];
7935
7936 u8 active[0x40];
7937
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939};
7940
7941struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007952 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007953 u8 error_type[0x8];
7954};
7955
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007956struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007957 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007958
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007959 u8 pfcc_mask[0x1];
7960 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03007961 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007962 u8 ptys_connector_type[0x1];
7963 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007964 u8 ppcnt_discard_group[0x1];
7965 u8 ppcnt_statistical_group[0x1];
7966};
7967
7968struct mlx5_ifc_pcam_reg_bits {
7969 u8 reserved_at_0[0x8];
7970 u8 feature_group[0x8];
7971 u8 reserved_at_10[0x8];
7972 u8 access_reg_group[0x8];
7973
7974 u8 reserved_at_20[0x20];
7975
7976 union {
7977 u8 reserved_at_0[0x80];
7978 } port_access_reg_cap_mask;
7979
7980 u8 reserved_at_c0[0x80];
7981
7982 union {
7983 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7984 u8 reserved_at_0[0x80];
7985 } feature_cap_mask;
7986
7987 u8 reserved_at_1c0[0xc0];
7988};
7989
7990struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007991 u8 reserved_at_0[0x7b];
7992 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007993 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007994 u8 mtpps_enh_out_per_adj[0x1];
7995 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007996 u8 pcie_performance_group[0x1];
7997};
7998
Or Gerlitz0ab87742017-06-11 15:25:38 +03007999struct mlx5_ifc_mcam_access_reg_bits {
8000 u8 reserved_at_0[0x1c];
8001 u8 mcda[0x1];
8002 u8 mcc[0x1];
8003 u8 mcqi[0x1];
8004 u8 reserved_at_1f[0x1];
8005
8006 u8 regs_95_to_64[0x20];
8007 u8 regs_63_to_32[0x20];
8008 u8 regs_31_to_0[0x20];
8009};
8010
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008011struct mlx5_ifc_mcam_reg_bits {
8012 u8 reserved_at_0[0x8];
8013 u8 feature_group[0x8];
8014 u8 reserved_at_10[0x8];
8015 u8 access_reg_group[0x8];
8016
8017 u8 reserved_at_20[0x20];
8018
8019 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008020 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008021 u8 reserved_at_0[0x80];
8022 } mng_access_reg_cap_mask;
8023
8024 u8 reserved_at_c0[0x80];
8025
8026 union {
8027 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8028 u8 reserved_at_0[0x80];
8029 } mng_feature_cap_mask;
8030
8031 u8 reserved_at_1c0[0x80];
8032};
8033
Huy Nguyenc02762e2017-07-18 16:03:17 -05008034struct mlx5_ifc_qcam_access_reg_cap_mask {
8035 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8036 u8 qpdpm[0x1];
8037 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8038 u8 qdpm[0x1];
8039 u8 qpts[0x1];
8040 u8 qcap[0x1];
8041 u8 qcam_access_reg_cap_mask_0[0x1];
8042};
8043
8044struct mlx5_ifc_qcam_qos_feature_cap_mask {
8045 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8046 u8 qpts_trust_both[0x1];
8047};
8048
8049struct mlx5_ifc_qcam_reg_bits {
8050 u8 reserved_at_0[0x8];
8051 u8 feature_group[0x8];
8052 u8 reserved_at_10[0x8];
8053 u8 access_reg_group[0x8];
8054 u8 reserved_at_20[0x20];
8055
8056 union {
8057 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8058 u8 reserved_at_0[0x80];
8059 } qos_access_reg_cap_mask;
8060
8061 u8 reserved_at_c0[0x80];
8062
8063 union {
8064 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8065 u8 reserved_at_0[0x80];
8066 } qos_feature_cap_mask;
8067
8068 u8 reserved_at_1c0[0x80];
8069};
8070
Saeed Mahameede2816822015-05-28 22:28:40 +03008071struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008072 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008073 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008074 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008075
8076 u8 port_capability_mask[4][0x20];
8077};
8078
8079struct mlx5_ifc_paos_reg_bits {
8080 u8 swid[0x8];
8081 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008082 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008083 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008084 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008085 u8 oper_status[0x4];
8086
8087 u8 ase[0x1];
8088 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008089 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008090 u8 e[0x2];
8091
Matan Barakb4ff3a32016-02-09 14:57:42 +02008092 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008093};
8094
8095struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008096 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008097 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008098 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008099 u8 opamp_group_type[0x4];
8100
8101 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008102 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008103 u8 num_of_indices[0xc];
8104
8105 u8 index_data[18][0x10];
8106};
8107
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008108struct mlx5_ifc_pcmr_reg_bits {
8109 u8 reserved_at_0[0x8];
8110 u8 local_port[0x8];
8111 u8 reserved_at_10[0x2e];
8112 u8 fcs_cap[0x1];
8113 u8 reserved_at_3f[0x1f];
8114 u8 fcs_chk[0x1];
8115 u8 reserved_at_5f[0x1];
8116};
8117
Saeed Mahameede2816822015-05-28 22:28:40 +03008118struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008119 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008120 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008121 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008122 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008123 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008124 u8 module[0x8];
8125};
8126
8127struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008128 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008129 u8 lossy[0x1];
8130 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008131 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008132 u8 size[0xc];
8133
8134 u8 xoff_threshold[0x10];
8135 u8 xon_threshold[0x10];
8136};
8137
8138struct mlx5_ifc_set_node_in_bits {
8139 u8 node_description[64][0x8];
8140};
8141
8142struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008143 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008144 u8 power_settings_level[0x8];
8145
Matan Barakb4ff3a32016-02-09 14:57:42 +02008146 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008147};
8148
8149struct mlx5_ifc_register_host_endianness_bits {
8150 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008151 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008152
Matan Barakb4ff3a32016-02-09 14:57:42 +02008153 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008154};
8155
8156struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008157 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008158
8159 u8 mkey[0x20];
8160
8161 u8 addressh_63_32[0x20];
8162
8163 u8 addressl_31_0[0x20];
8164};
8165
8166struct mlx5_ifc_ud_adrs_vector_bits {
8167 u8 dc_key[0x40];
8168
8169 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008170 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008171 u8 destination_qp_dct[0x18];
8172
8173 u8 static_rate[0x4];
8174 u8 sl_eth_prio[0x4];
8175 u8 fl[0x1];
8176 u8 mlid[0x7];
8177 u8 rlid_udp_sport[0x10];
8178
Matan Barakb4ff3a32016-02-09 14:57:42 +02008179 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008180
8181 u8 rmac_47_16[0x20];
8182
8183 u8 rmac_15_0[0x10];
8184 u8 tclass[0x8];
8185 u8 hop_limit[0x8];
8186
Matan Barakb4ff3a32016-02-09 14:57:42 +02008187 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008188 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008189 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008190 u8 src_addr_index[0x8];
8191 u8 flow_label[0x14];
8192
8193 u8 rgid_rip[16][0x8];
8194};
8195
8196struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008197 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008198 u8 function_id[0x10];
8199
8200 u8 num_pages[0x20];
8201
Matan Barakb4ff3a32016-02-09 14:57:42 +02008202 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008203};
8204
8205struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008206 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008207 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008208 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008209 u8 event_sub_type[0x8];
8210
Matan Barakb4ff3a32016-02-09 14:57:42 +02008211 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008212
8213 union mlx5_ifc_event_auto_bits event_data;
8214
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008218 u8 owner[0x1];
8219};
8220
8221enum {
8222 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8223};
8224
8225struct mlx5_ifc_cmd_queue_entry_bits {
8226 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008227 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008228
8229 u8 input_length[0x20];
8230
8231 u8 input_mailbox_pointer_63_32[0x20];
8232
8233 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008234 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008235
8236 u8 command_input_inline_data[16][0x8];
8237
8238 u8 command_output_inline_data[16][0x8];
8239
8240 u8 output_mailbox_pointer_63_32[0x20];
8241
8242 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008243 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008244
8245 u8 output_length[0x20];
8246
8247 u8 token[0x8];
8248 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008249 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008250 u8 status[0x7];
8251 u8 ownership[0x1];
8252};
8253
8254struct mlx5_ifc_cmd_out_bits {
8255 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008256 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008257
8258 u8 syndrome[0x20];
8259
8260 u8 command_output[0x20];
8261};
8262
8263struct mlx5_ifc_cmd_in_bits {
8264 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008265 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008266
Matan Barakb4ff3a32016-02-09 14:57:42 +02008267 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008268 u8 op_mod[0x10];
8269
8270 u8 command[0][0x20];
8271};
8272
8273struct mlx5_ifc_cmd_if_box_bits {
8274 u8 mailbox_data[512][0x8];
8275
Matan Barakb4ff3a32016-02-09 14:57:42 +02008276 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008277
8278 u8 next_pointer_63_32[0x20];
8279
8280 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008281 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008282
8283 u8 block_number[0x20];
8284
Matan Barakb4ff3a32016-02-09 14:57:42 +02008285 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008286 u8 token[0x8];
8287 u8 ctrl_signature[0x8];
8288 u8 signature[0x8];
8289};
8290
8291struct mlx5_ifc_mtt_bits {
8292 u8 ptag_63_32[0x20];
8293
8294 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008295 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008296 u8 wr_en[0x1];
8297 u8 rd_en[0x1];
8298};
8299
Tariq Toukan928cfe82016-02-22 18:17:29 +02008300struct mlx5_ifc_query_wol_rol_out_bits {
8301 u8 status[0x8];
8302 u8 reserved_at_8[0x18];
8303
8304 u8 syndrome[0x20];
8305
8306 u8 reserved_at_40[0x10];
8307 u8 rol_mode[0x8];
8308 u8 wol_mode[0x8];
8309
8310 u8 reserved_at_60[0x20];
8311};
8312
8313struct mlx5_ifc_query_wol_rol_in_bits {
8314 u8 opcode[0x10];
8315 u8 reserved_at_10[0x10];
8316
8317 u8 reserved_at_20[0x10];
8318 u8 op_mod[0x10];
8319
8320 u8 reserved_at_40[0x40];
8321};
8322
8323struct mlx5_ifc_set_wol_rol_out_bits {
8324 u8 status[0x8];
8325 u8 reserved_at_8[0x18];
8326
8327 u8 syndrome[0x20];
8328
8329 u8 reserved_at_40[0x40];
8330};
8331
8332struct mlx5_ifc_set_wol_rol_in_bits {
8333 u8 opcode[0x10];
8334 u8 reserved_at_10[0x10];
8335
8336 u8 reserved_at_20[0x10];
8337 u8 op_mod[0x10];
8338
8339 u8 rol_mode_valid[0x1];
8340 u8 wol_mode_valid[0x1];
8341 u8 reserved_at_42[0xe];
8342 u8 rol_mode[0x8];
8343 u8 wol_mode[0x8];
8344
8345 u8 reserved_at_60[0x20];
8346};
8347
Saeed Mahameede2816822015-05-28 22:28:40 +03008348enum {
8349 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8350 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8351 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8352};
8353
8354enum {
8355 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8356 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8357 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8358};
8359
8360enum {
8361 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8362 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8363 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8364 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8365 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8366 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8367 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8368 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8369 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8370 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8371 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8372};
8373
8374struct mlx5_ifc_initial_seg_bits {
8375 u8 fw_rev_minor[0x10];
8376 u8 fw_rev_major[0x10];
8377
8378 u8 cmd_interface_rev[0x10];
8379 u8 fw_rev_subminor[0x10];
8380
Matan Barakb4ff3a32016-02-09 14:57:42 +02008381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008382
8383 u8 cmdq_phy_addr_63_32[0x20];
8384
8385 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008386 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008387 u8 nic_interface[0x2];
8388 u8 log_cmdq_size[0x4];
8389 u8 log_cmdq_stride[0x4];
8390
8391 u8 command_doorbell_vector[0x20];
8392
Matan Barakb4ff3a32016-02-09 14:57:42 +02008393 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008394
8395 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008396 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008397 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008398 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008399
8400 struct mlx5_ifc_health_buffer_bits health_buffer;
8401
8402 u8 no_dram_nic_offset[0x20];
8403
Matan Barakb4ff3a32016-02-09 14:57:42 +02008404 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008405
Matan Barakb4ff3a32016-02-09 14:57:42 +02008406 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008407 u8 clear_int[0x1];
8408
8409 u8 health_syndrome[0x8];
8410 u8 health_counter[0x18];
8411
Matan Barakb4ff3a32016-02-09 14:57:42 +02008412 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008413};
8414
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008415struct mlx5_ifc_mtpps_reg_bits {
8416 u8 reserved_at_0[0xc];
8417 u8 cap_number_of_pps_pins[0x4];
8418 u8 reserved_at_10[0x4];
8419 u8 cap_max_num_of_pps_in_pins[0x4];
8420 u8 reserved_at_18[0x4];
8421 u8 cap_max_num_of_pps_out_pins[0x4];
8422
8423 u8 reserved_at_20[0x24];
8424 u8 cap_pin_3_mode[0x4];
8425 u8 reserved_at_48[0x4];
8426 u8 cap_pin_2_mode[0x4];
8427 u8 reserved_at_50[0x4];
8428 u8 cap_pin_1_mode[0x4];
8429 u8 reserved_at_58[0x4];
8430 u8 cap_pin_0_mode[0x4];
8431
8432 u8 reserved_at_60[0x4];
8433 u8 cap_pin_7_mode[0x4];
8434 u8 reserved_at_68[0x4];
8435 u8 cap_pin_6_mode[0x4];
8436 u8 reserved_at_70[0x4];
8437 u8 cap_pin_5_mode[0x4];
8438 u8 reserved_at_78[0x4];
8439 u8 cap_pin_4_mode[0x4];
8440
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008441 u8 field_select[0x20];
8442 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008443
8444 u8 enable[0x1];
8445 u8 reserved_at_101[0xb];
8446 u8 pattern[0x4];
8447 u8 reserved_at_110[0x4];
8448 u8 pin_mode[0x4];
8449 u8 pin[0x8];
8450
8451 u8 reserved_at_120[0x20];
8452
8453 u8 time_stamp[0x40];
8454
8455 u8 out_pulse_duration[0x10];
8456 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008457 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008458
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008459 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008460};
8461
8462struct mlx5_ifc_mtppse_reg_bits {
8463 u8 reserved_at_0[0x18];
8464 u8 pin[0x8];
8465 u8 event_arm[0x1];
8466 u8 reserved_at_21[0x1b];
8467 u8 event_generation_mode[0x4];
8468 u8 reserved_at_40[0x40];
8469};
8470
Or Gerlitz47176282017-04-18 13:35:39 +03008471struct mlx5_ifc_mcqi_cap_bits {
8472 u8 supported_info_bitmask[0x20];
8473
8474 u8 component_size[0x20];
8475
8476 u8 max_component_size[0x20];
8477
8478 u8 log_mcda_word_size[0x4];
8479 u8 reserved_at_64[0xc];
8480 u8 mcda_max_write_size[0x10];
8481
8482 u8 rd_en[0x1];
8483 u8 reserved_at_81[0x1];
8484 u8 match_chip_id[0x1];
8485 u8 match_psid[0x1];
8486 u8 check_user_timestamp[0x1];
8487 u8 match_base_guid_mac[0x1];
8488 u8 reserved_at_86[0x1a];
8489};
8490
8491struct mlx5_ifc_mcqi_reg_bits {
8492 u8 read_pending_component[0x1];
8493 u8 reserved_at_1[0xf];
8494 u8 component_index[0x10];
8495
8496 u8 reserved_at_20[0x20];
8497
8498 u8 reserved_at_40[0x1b];
8499 u8 info_type[0x5];
8500
8501 u8 info_size[0x20];
8502
8503 u8 offset[0x20];
8504
8505 u8 reserved_at_a0[0x10];
8506 u8 data_size[0x10];
8507
8508 u8 data[0][0x20];
8509};
8510
8511struct mlx5_ifc_mcc_reg_bits {
8512 u8 reserved_at_0[0x4];
8513 u8 time_elapsed_since_last_cmd[0xc];
8514 u8 reserved_at_10[0x8];
8515 u8 instruction[0x8];
8516
8517 u8 reserved_at_20[0x10];
8518 u8 component_index[0x10];
8519
8520 u8 reserved_at_40[0x8];
8521 u8 update_handle[0x18];
8522
8523 u8 handle_owner_type[0x4];
8524 u8 handle_owner_host_id[0x4];
8525 u8 reserved_at_68[0x1];
8526 u8 control_progress[0x7];
8527 u8 error_code[0x8];
8528 u8 reserved_at_78[0x4];
8529 u8 control_state[0x4];
8530
8531 u8 component_size[0x20];
8532
8533 u8 reserved_at_a0[0x60];
8534};
8535
8536struct mlx5_ifc_mcda_reg_bits {
8537 u8 reserved_at_0[0x8];
8538 u8 update_handle[0x18];
8539
8540 u8 offset[0x20];
8541
8542 u8 reserved_at_40[0x10];
8543 u8 size[0x10];
8544
8545 u8 reserved_at_60[0x20];
8546
8547 u8 data[0][0x20];
8548};
8549
Saeed Mahameede2816822015-05-28 22:28:40 +03008550union mlx5_ifc_ports_control_registers_document_bits {
8551 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8552 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8553 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8554 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8555 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8556 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8557 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8558 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8559 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8560 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8561 struct mlx5_ifc_paos_reg_bits paos_reg;
8562 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8563 struct mlx5_ifc_peir_reg_bits peir_reg;
8564 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8565 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008566 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008567 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8568 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8569 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8570 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8571 struct mlx5_ifc_plib_reg_bits plib_reg;
8572 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8573 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8574 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8575 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8576 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8577 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8578 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8579 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8580 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8581 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008582 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008583 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8584 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8585 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8586 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8587 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8588 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8589 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008590 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008591 struct mlx5_ifc_pude_reg_bits pude_reg;
8592 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8593 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8594 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008595 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8596 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008597 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008598 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8599 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008600 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8601 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8602 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008603 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008604};
8605
8606union mlx5_ifc_debug_enhancements_document_bits {
8607 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008608 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008609};
8610
8611union mlx5_ifc_uplink_pci_interface_document_bits {
8612 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008613 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008614};
8615
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008616struct mlx5_ifc_set_flow_table_root_out_bits {
8617 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008618 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008619
8620 u8 syndrome[0x20];
8621
Matan Barakb4ff3a32016-02-09 14:57:42 +02008622 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008623};
8624
8625struct mlx5_ifc_set_flow_table_root_in_bits {
8626 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008627 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008628
Matan Barakb4ff3a32016-02-09 14:57:42 +02008629 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008630 u8 op_mod[0x10];
8631
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008632 u8 other_vport[0x1];
8633 u8 reserved_at_41[0xf];
8634 u8 vport_number[0x10];
8635
8636 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008637
8638 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008639 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008640
Matan Barakb4ff3a32016-02-09 14:57:42 +02008641 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008642 u8 table_id[0x18];
8643
Erez Shitrit500a3d02017-04-13 06:36:51 +03008644 u8 reserved_at_c0[0x8];
8645 u8 underlay_qpn[0x18];
8646 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008647};
8648
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008649enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008650 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8651 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008652};
8653
8654struct mlx5_ifc_modify_flow_table_out_bits {
8655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008656 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008657
8658 u8 syndrome[0x20];
8659
Matan Barakb4ff3a32016-02-09 14:57:42 +02008660 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008661};
8662
8663struct mlx5_ifc_modify_flow_table_in_bits {
8664 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008665 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008666
Matan Barakb4ff3a32016-02-09 14:57:42 +02008667 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008668 u8 op_mod[0x10];
8669
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008670 u8 other_vport[0x1];
8671 u8 reserved_at_41[0xf];
8672 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008673
Matan Barakb4ff3a32016-02-09 14:57:42 +02008674 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008675 u8 modify_field_select[0x10];
8676
8677 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008678 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008679
Matan Barakb4ff3a32016-02-09 14:57:42 +02008680 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008681 u8 table_id[0x18];
8682
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008683 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008684};
8685
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008686struct mlx5_ifc_ets_tcn_config_reg_bits {
8687 u8 g[0x1];
8688 u8 b[0x1];
8689 u8 r[0x1];
8690 u8 reserved_at_3[0x9];
8691 u8 group[0x4];
8692 u8 reserved_at_10[0x9];
8693 u8 bw_allocation[0x7];
8694
8695 u8 reserved_at_20[0xc];
8696 u8 max_bw_units[0x4];
8697 u8 reserved_at_30[0x8];
8698 u8 max_bw_value[0x8];
8699};
8700
8701struct mlx5_ifc_ets_global_config_reg_bits {
8702 u8 reserved_at_0[0x2];
8703 u8 r[0x1];
8704 u8 reserved_at_3[0x1d];
8705
8706 u8 reserved_at_20[0xc];
8707 u8 max_bw_units[0x4];
8708 u8 reserved_at_30[0x8];
8709 u8 max_bw_value[0x8];
8710};
8711
8712struct mlx5_ifc_qetc_reg_bits {
8713 u8 reserved_at_0[0x8];
8714 u8 port_number[0x8];
8715 u8 reserved_at_10[0x30];
8716
8717 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8718 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8719};
8720
Huy Nguyen415a64a2017-07-18 16:08:46 -05008721struct mlx5_ifc_qpdpm_dscp_reg_bits {
8722 u8 e[0x1];
8723 u8 reserved_at_01[0x0b];
8724 u8 prio[0x04];
8725};
8726
8727struct mlx5_ifc_qpdpm_reg_bits {
8728 u8 reserved_at_0[0x8];
8729 u8 local_port[0x8];
8730 u8 reserved_at_10[0x10];
8731 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8732};
8733
8734struct mlx5_ifc_qpts_reg_bits {
8735 u8 reserved_at_0[0x8];
8736 u8 local_port[0x8];
8737 u8 reserved_at_10[0x2d];
8738 u8 trust_state[0x3];
8739};
8740
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008741struct mlx5_ifc_qtct_reg_bits {
8742 u8 reserved_at_0[0x8];
8743 u8 port_number[0x8];
8744 u8 reserved_at_10[0xd];
8745 u8 prio[0x3];
8746
8747 u8 reserved_at_20[0x1d];
8748 u8 tclass[0x3];
8749};
8750
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008751struct mlx5_ifc_mcia_reg_bits {
8752 u8 l[0x1];
8753 u8 reserved_at_1[0x7];
8754 u8 module[0x8];
8755 u8 reserved_at_10[0x8];
8756 u8 status[0x8];
8757
8758 u8 i2c_device_address[0x8];
8759 u8 page_number[0x8];
8760 u8 device_address[0x10];
8761
8762 u8 reserved_at_40[0x10];
8763 u8 size[0x10];
8764
8765 u8 reserved_at_60[0x20];
8766
8767 u8 dword_0[0x20];
8768 u8 dword_1[0x20];
8769 u8 dword_2[0x20];
8770 u8 dword_3[0x20];
8771 u8 dword_4[0x20];
8772 u8 dword_5[0x20];
8773 u8 dword_6[0x20];
8774 u8 dword_7[0x20];
8775 u8 dword_8[0x20];
8776 u8 dword_9[0x20];
8777 u8 dword_10[0x20];
8778 u8 dword_11[0x20];
8779};
8780
Saeed Mahameed74862162016-06-09 15:11:34 +03008781struct mlx5_ifc_dcbx_param_bits {
8782 u8 dcbx_cee_cap[0x1];
8783 u8 dcbx_ieee_cap[0x1];
8784 u8 dcbx_standby_cap[0x1];
8785 u8 reserved_at_0[0x5];
8786 u8 port_number[0x8];
8787 u8 reserved_at_10[0xa];
8788 u8 max_application_table_size[6];
8789 u8 reserved_at_20[0x15];
8790 u8 version_oper[0x3];
8791 u8 reserved_at_38[5];
8792 u8 version_admin[0x3];
8793 u8 willing_admin[0x1];
8794 u8 reserved_at_41[0x3];
8795 u8 pfc_cap_oper[0x4];
8796 u8 reserved_at_48[0x4];
8797 u8 pfc_cap_admin[0x4];
8798 u8 reserved_at_50[0x4];
8799 u8 num_of_tc_oper[0x4];
8800 u8 reserved_at_58[0x4];
8801 u8 num_of_tc_admin[0x4];
8802 u8 remote_willing[0x1];
8803 u8 reserved_at_61[3];
8804 u8 remote_pfc_cap[4];
8805 u8 reserved_at_68[0x14];
8806 u8 remote_num_of_tc[0x4];
8807 u8 reserved_at_80[0x18];
8808 u8 error[0x8];
8809 u8 reserved_at_a0[0x160];
8810};
Aviv Heller84df61e2016-05-10 13:47:50 +03008811
8812struct mlx5_ifc_lagc_bits {
8813 u8 reserved_at_0[0x1d];
8814 u8 lag_state[0x3];
8815
8816 u8 reserved_at_20[0x14];
8817 u8 tx_remap_affinity_2[0x4];
8818 u8 reserved_at_38[0x4];
8819 u8 tx_remap_affinity_1[0x4];
8820};
8821
8822struct mlx5_ifc_create_lag_out_bits {
8823 u8 status[0x8];
8824 u8 reserved_at_8[0x18];
8825
8826 u8 syndrome[0x20];
8827
8828 u8 reserved_at_40[0x40];
8829};
8830
8831struct mlx5_ifc_create_lag_in_bits {
8832 u8 opcode[0x10];
8833 u8 reserved_at_10[0x10];
8834
8835 u8 reserved_at_20[0x10];
8836 u8 op_mod[0x10];
8837
8838 struct mlx5_ifc_lagc_bits ctx;
8839};
8840
8841struct mlx5_ifc_modify_lag_out_bits {
8842 u8 status[0x8];
8843 u8 reserved_at_8[0x18];
8844
8845 u8 syndrome[0x20];
8846
8847 u8 reserved_at_40[0x40];
8848};
8849
8850struct mlx5_ifc_modify_lag_in_bits {
8851 u8 opcode[0x10];
8852 u8 reserved_at_10[0x10];
8853
8854 u8 reserved_at_20[0x10];
8855 u8 op_mod[0x10];
8856
8857 u8 reserved_at_40[0x20];
8858 u8 field_select[0x20];
8859
8860 struct mlx5_ifc_lagc_bits ctx;
8861};
8862
8863struct mlx5_ifc_query_lag_out_bits {
8864 u8 status[0x8];
8865 u8 reserved_at_8[0x18];
8866
8867 u8 syndrome[0x20];
8868
8869 u8 reserved_at_40[0x40];
8870
8871 struct mlx5_ifc_lagc_bits ctx;
8872};
8873
8874struct mlx5_ifc_query_lag_in_bits {
8875 u8 opcode[0x10];
8876 u8 reserved_at_10[0x10];
8877
8878 u8 reserved_at_20[0x10];
8879 u8 op_mod[0x10];
8880
8881 u8 reserved_at_40[0x40];
8882};
8883
8884struct mlx5_ifc_destroy_lag_out_bits {
8885 u8 status[0x8];
8886 u8 reserved_at_8[0x18];
8887
8888 u8 syndrome[0x20];
8889
8890 u8 reserved_at_40[0x40];
8891};
8892
8893struct mlx5_ifc_destroy_lag_in_bits {
8894 u8 opcode[0x10];
8895 u8 reserved_at_10[0x10];
8896
8897 u8 reserved_at_20[0x10];
8898 u8 op_mod[0x10];
8899
8900 u8 reserved_at_40[0x40];
8901};
8902
8903struct mlx5_ifc_create_vport_lag_out_bits {
8904 u8 status[0x8];
8905 u8 reserved_at_8[0x18];
8906
8907 u8 syndrome[0x20];
8908
8909 u8 reserved_at_40[0x40];
8910};
8911
8912struct mlx5_ifc_create_vport_lag_in_bits {
8913 u8 opcode[0x10];
8914 u8 reserved_at_10[0x10];
8915
8916 u8 reserved_at_20[0x10];
8917 u8 op_mod[0x10];
8918
8919 u8 reserved_at_40[0x40];
8920};
8921
8922struct mlx5_ifc_destroy_vport_lag_out_bits {
8923 u8 status[0x8];
8924 u8 reserved_at_8[0x18];
8925
8926 u8 syndrome[0x20];
8927
8928 u8 reserved_at_40[0x40];
8929};
8930
8931struct mlx5_ifc_destroy_vport_lag_in_bits {
8932 u8 opcode[0x10];
8933 u8 reserved_at_10[0x10];
8934
8935 u8 reserved_at_20[0x10];
8936 u8 op_mod[0x10];
8937
8938 u8 reserved_at_40[0x40];
8939};
8940
Eli Cohend29b7962014-10-02 12:19:43 +03008941#endif /* MLX5_IFC_H */