blob: c3c15f8912708d45148cf8ff97c839a0e79ee78b [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200114static bool twl4030_can_write_to_chip(struct snd_soc_codec *codec,
115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Mark Brownb2c812e2010-04-14 15:35:19 +0900117 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200118 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200119
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200120 /* Decide if the given register can be written */
121 switch (reg) {
122 case TWL4030_REG_EAR_CTL:
123 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200124 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200125 break;
126 case TWL4030_REG_PREDL_CTL:
127 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200128 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200129 break;
130 case TWL4030_REG_PREDR_CTL:
131 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200132 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200133 break;
134 case TWL4030_REG_PRECKL_CTL:
135 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200136 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200137 break;
138 case TWL4030_REG_PRECKR_CTL:
139 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200140 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200141 break;
142 case TWL4030_REG_HS_GAIN_SET:
143 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200144 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200145 break;
146 default:
147 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200148 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200149 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200150 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200151
152 return write_to_reg;
153}
154
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200155static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
156 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200157{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200158 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
159
160 /* Update the ctl cache */
161 switch (reg) {
162 case TWL4030_REG_EAR_CTL:
163 case TWL4030_REG_PREDL_CTL:
164 case TWL4030_REG_PREDR_CTL:
165 case TWL4030_REG_PRECKL_CTL:
166 case TWL4030_REG_PRECKR_CTL:
167 case TWL4030_REG_HS_GAIN_SET:
168 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
169 break;
170 default:
171 break;
172 }
173
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 if (twl4030_can_write_to_chip(codec, reg))
175 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200176
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200177 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700178}
179
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300180static inline void twl4030_wait_ms(int time)
181{
182 if (time < 60) {
183 time *= 1000;
184 usleep_range(time, time + 500);
185 } else {
186 msleep(time);
187 }
188}
189
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200190static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700191{
Mark Brownb2c812e2010-04-14 15:35:19 +0900192 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300193 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700194
Peter Ujfalusi73939582009-01-29 14:57:50 +0200195 if (enable == twl4030->codec_powered)
196 return;
197
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200198 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300199 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200200 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300201 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700202
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200203 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300204 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700205
206 /* REVISIT: this delay is present in TI sample drivers */
207 /* but there seems to be no TRM requirement for it */
208 udelay(10);
209}
210
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300211static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
212 struct device_node *node)
213{
214 int value;
215
216 of_property_read_u32(node, "ti,digimic_delay",
217 &pdata->digimic_delay);
218 of_property_read_u32(node, "ti,ramp_delay_value",
219 &pdata->ramp_delay_value);
220 of_property_read_u32(node, "ti,offset_cncl_path",
221 &pdata->offset_cncl_path);
222 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
223 pdata->hs_extmute = value;
224
225 pdata->hs_extmute_gpio = of_get_named_gpio(node,
226 "ti,hs_extmute_gpio", 0);
227 if (gpio_is_valid(pdata->hs_extmute_gpio))
228 pdata->hs_extmute = 1;
229}
230
231static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700232{
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300233 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300234 struct device_node *twl4030_codec_node = NULL;
235
236 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
237 "codec");
238
239 if (!pdata && twl4030_codec_node) {
240 pdata = devm_kzalloc(codec->dev,
241 sizeof(struct twl4030_codec_data),
242 GFP_KERNEL);
243 if (!pdata) {
244 dev_err(codec->dev, "Can not allocate memory\n");
245 return NULL;
246 }
247 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
248 }
249
250 return pdata;
251}
252
253static void twl4030_init_chip(struct snd_soc_codec *codec)
254{
255 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300256 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
257 u8 reg, byte;
258 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700259
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300260 pdata = twl4030_get_pdata(codec);
261
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100262 if (pdata && pdata->hs_extmute) {
263 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
264 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300265
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100266 if (!pdata->hs_extmute_gpio)
267 dev_warn(codec->dev,
268 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300269
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100270 ret = gpio_request_one(pdata->hs_extmute_gpio,
271 GPIOF_OUT_INIT_LOW,
272 "hs_extmute");
273 if (ret) {
274 dev_err(codec->dev,
275 "Failed to get hs_extmute GPIO\n");
276 pdata->hs_extmute_gpio = -1;
277 }
278 } else {
279 u8 pin_mux;
280
281 /* Set TWL4030 GPIO6 as EXTMUTE signal */
282 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
283 TWL4030_PMBR1_REG);
284 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
285 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
286 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
287 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300288 }
289 }
290
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200291 /* Initialize the local ctl register cache */
292 tw4030_init_ctl_cache(twl4030);
293
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300294 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200295 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300296 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200297 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300298
299 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200300 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
301 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300302
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300303 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
304 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
305
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300306 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000307 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300308 return;
309
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300310 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300311
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200312 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300313 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000314 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200315 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300316
317 /* initiate offset cancellation */
318 twl4030_codec_enable(codec, 1);
319
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200320 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300321 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000322 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300323 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200324 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300325
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300326 /*
327 * Wait for offset cancellation to complete.
328 * Since this takes a while, do not slam the i2c.
329 * Start polling the status after ~20ms.
330 */
331 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300332 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300333 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200334 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300335 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200336 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200337 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300338 } while ((i++ < 100) &&
339 ((byte & TWL4030_CNCL_OFFSET_START) ==
340 TWL4030_CNCL_OFFSET_START));
341
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200342 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700343}
344
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200345static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200346{
Mark Brownb2c812e2010-04-14 15:35:19 +0900347 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300348 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200349
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300350 if (enable) {
351 twl4030->apll_enabled++;
352 if (twl4030->apll_enabled == 1)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300353 status = twl4030_audio_enable_resource(
354 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300355 } else {
356 twl4030->apll_enabled--;
357 if (!twl4030->apll_enabled)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300358 status = twl4030_audio_disable_resource(
359 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300360 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200361}
362
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200363/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900364static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
365 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
366 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
367 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
368 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
369};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200370
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200371/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900372static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
373 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
374 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
375 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
376 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
377};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200378
379/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900380static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
381 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
382 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
383 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
384 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
385};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200386
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200387/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900388static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
389 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
390 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
391 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
392};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200393
394/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900395static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
396 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
397 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
398 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
399};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200400
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200401/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900402static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
403 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
404 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
405 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
406};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200407
408/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900409static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
410 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
411 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
412 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
413};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200414
Peter Ujfalusidf339802008-12-09 12:35:51 +0200415/* Handsfree Left */
416static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900417 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200418
419static const struct soc_enum twl4030_handsfreel_enum =
420 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
421 ARRAY_SIZE(twl4030_handsfreel_texts),
422 twl4030_handsfreel_texts);
423
424static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
425SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
426
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300427/* Handsfree Left virtual mute */
428static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200429 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300430
Peter Ujfalusidf339802008-12-09 12:35:51 +0200431/* Handsfree Right */
432static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900433 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200434
435static const struct soc_enum twl4030_handsfreer_enum =
436 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
437 ARRAY_SIZE(twl4030_handsfreer_texts),
438 twl4030_handsfreer_texts);
439
440static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
441SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
442
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300443/* Handsfree Right virtual mute */
444static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200445 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300446
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300447/* Vibra */
448/* Vibra audio path selection */
449static const char *twl4030_vibra_texts[] =
450 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
451
452static const struct soc_enum twl4030_vibra_enum =
453 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
454 ARRAY_SIZE(twl4030_vibra_texts),
455 twl4030_vibra_texts);
456
457static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
458SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
459
460/* Vibra path selection: local vibrator (PWM) or audio driven */
461static const char *twl4030_vibrapath_texts[] =
462 {"Local vibrator", "Audio"};
463
464static const struct soc_enum twl4030_vibrapath_enum =
465 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
466 ARRAY_SIZE(twl4030_vibrapath_texts),
467 twl4030_vibrapath_texts);
468
469static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
470SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
471
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200472/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900473static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300474 SOC_DAPM_SINGLE("Main Mic Capture Switch",
475 TWL4030_REG_ANAMICL, 0, 1, 0),
476 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
477 TWL4030_REG_ANAMICL, 1, 1, 0),
478 SOC_DAPM_SINGLE("AUXL Capture Switch",
479 TWL4030_REG_ANAMICL, 2, 1, 0),
480 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
481 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900482};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200483
484/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900485static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300486 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
487 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900488};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200489
490/* TX1 L/R Analog/Digital microphone selection */
491static const char *twl4030_micpathtx1_texts[] =
492 {"Analog", "Digimic0"};
493
494static const struct soc_enum twl4030_micpathtx1_enum =
495 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
496 ARRAY_SIZE(twl4030_micpathtx1_texts),
497 twl4030_micpathtx1_texts);
498
499static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
500SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
501
502/* TX2 L/R Analog/Digital microphone selection */
503static const char *twl4030_micpathtx2_texts[] =
504 {"Analog", "Digimic1"};
505
506static const struct soc_enum twl4030_micpathtx2_enum =
507 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
508 ARRAY_SIZE(twl4030_micpathtx2_texts),
509 twl4030_micpathtx2_texts);
510
511static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
512SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
513
Peter Ujfalusi73939582009-01-29 14:57:50 +0200514/* Analog bypass for AudioR1 */
515static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
516 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
517
518/* Analog bypass for AudioL1 */
519static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
521
522/* Analog bypass for AudioR2 */
523static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
525
526/* Analog bypass for AudioL2 */
527static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
528 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
529
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500530/* Analog bypass for Voice */
531static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
532 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
533
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300534/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200535static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300536 TLV_DB_RANGE_HEAD(3),
537 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
538 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200539 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
540};
541
542/* Digital bypass left (TX1L -> RX2L) */
543static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
544 SOC_DAPM_SINGLE_TLV("Volume",
545 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
546 twl4030_dapm_dbypass_tlv);
547
548/* Digital bypass right (TX1R -> RX2R) */
549static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
550 SOC_DAPM_SINGLE_TLV("Volume",
551 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
552 twl4030_dapm_dbypass_tlv);
553
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500554/*
555 * Voice Sidetone GAIN volume control:
556 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
557 */
558static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
559
560/* Digital bypass voice: sidetone (VUL -> VDL)*/
561static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
562 SOC_DAPM_SINGLE_TLV("Volume",
563 TWL4030_REG_VSTPGA, 0, 0x29, 0,
564 twl4030_dapm_dbypassv_tlv);
565
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300566/*
567 * Output PGA builder:
568 * Handle the muting and unmuting of the given output (turning off the
569 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200570 * On mute bypass the reg_cache and write 0 to the register
571 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300572 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
573 */
574#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
575static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200576 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300577{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900578 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300579 \
580 switch (event) { \
581 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200582 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200583 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300584 break; \
585 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200586 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200587 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300588 break; \
589 } \
590 return 0; \
591}
592
593TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
594TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
595TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
596TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
597TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
598
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300599static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800600{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800601 unsigned char hs_ctl;
602
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200603 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800604
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300605 if (ramp) {
606 /* HF ramp-up */
607 hs_ctl |= TWL4030_HF_CTL_REF_EN;
608 twl4030_write(codec, reg, hs_ctl);
609 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800610 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300611 twl4030_write(codec, reg, hs_ctl);
612 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800613 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800614 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300615 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800616 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300617 /* HF ramp-down */
618 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
619 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
620 twl4030_write(codec, reg, hs_ctl);
621 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
622 twl4030_write(codec, reg, hs_ctl);
623 udelay(40);
624 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
625 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800626 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300627}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800628
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300629static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200630 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300631{
632 switch (event) {
633 case SND_SOC_DAPM_POST_PMU:
634 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
635 break;
636 case SND_SOC_DAPM_POST_PMD:
637 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
638 break;
639 }
640 return 0;
641}
642
643static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200644 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300645{
646 switch (event) {
647 case SND_SOC_DAPM_POST_PMU:
648 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
649 break;
650 case SND_SOC_DAPM_POST_PMD:
651 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
652 break;
653 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800654 return 0;
655}
656
Jari Vanhala86139a12009-10-29 11:58:09 +0200657static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200658 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200659{
660 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
661 return 0;
662}
663
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200664static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200665 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200666{
667 switch (event) {
668 case SND_SOC_DAPM_PRE_PMU:
669 twl4030_apll_enable(w->codec, 1);
670 break;
671 case SND_SOC_DAPM_POST_PMD:
672 twl4030_apll_enable(w->codec, 0);
673 break;
674 }
675 return 0;
676}
677
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300678static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200679 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300680{
681 u8 audio_if;
682
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200683 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300684 switch (event) {
685 case SND_SOC_DAPM_PRE_PMU:
686 /* Enable AIF */
687 /* enable the PLL before we use it to clock the DAI */
688 twl4030_apll_enable(w->codec, 1);
689
690 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200691 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300692 break;
693 case SND_SOC_DAPM_POST_PMD:
694 /* disable the DAI before we stop it's source PLL */
695 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200696 audio_if & ~TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300697 twl4030_apll_enable(w->codec, 0);
698 break;
699 }
700 return 0;
701}
702
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300703static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200704{
705 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900706 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300707 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300708 /* Base values for ramp delay calculation: 2^19 - 2^26 */
709 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
710 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300711 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200712
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200713 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
714 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300715 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
716 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200717
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500718 /* Enable external mute control, this dramatically reduces
719 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000720 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300721 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
722 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500723 } else {
724 hs_pop |= TWL4030_EXTMUTE;
725 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
726 }
727 }
728
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300729 if (ramp) {
730 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200731 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300732 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200733 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200734 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
735 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200736 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300737 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500738 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300739 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300740 } else {
741 /* Headset ramp-down _not_ according to
742 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200743 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300744 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
745 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300746 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200747 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200748 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
749 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300750
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200751 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300752 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
753 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500754
755 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000756 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300757 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
758 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500759 } else {
760 hs_pop &= ~TWL4030_EXTMUTE;
761 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
762 }
763 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300764}
765
766static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200767 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300768{
Mark Brownb2c812e2010-04-14 15:35:19 +0900769 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300770
771 switch (event) {
772 case SND_SOC_DAPM_POST_PMU:
773 /* Do the ramp-up only once */
774 if (!twl4030->hsr_enabled)
775 headset_ramp(w->codec, 1);
776
777 twl4030->hsl_enabled = 1;
778 break;
779 case SND_SOC_DAPM_POST_PMD:
780 /* Do the ramp-down only if both headsetL/R is disabled */
781 if (!twl4030->hsr_enabled)
782 headset_ramp(w->codec, 0);
783
784 twl4030->hsl_enabled = 0;
785 break;
786 }
787 return 0;
788}
789
790static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200791 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300792{
Mark Brownb2c812e2010-04-14 15:35:19 +0900793 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300794
795 switch (event) {
796 case SND_SOC_DAPM_POST_PMU:
797 /* Do the ramp-up only once */
798 if (!twl4030->hsl_enabled)
799 headset_ramp(w->codec, 1);
800
801 twl4030->hsr_enabled = 1;
802 break;
803 case SND_SOC_DAPM_POST_PMD:
804 /* Do the ramp-down only if both headsetL/R is disabled */
805 if (!twl4030->hsl_enabled)
806 headset_ramp(w->codec, 0);
807
808 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200809 break;
810 }
811 return 0;
812}
813
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300814static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200815 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300816{
817 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300818 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300819
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300820 if (pdata && pdata->digimic_delay)
821 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300822 return 0;
823}
824
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200825/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200826 * Some of the gain controls in TWL (mostly those which are associated with
827 * the outputs) are implemented in an interesting way:
828 * 0x0 : Power down (mute)
829 * 0x1 : 6dB
830 * 0x2 : 0 dB
831 * 0x3 : -6 dB
832 * Inverting not going to help with these.
833 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
834 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200835static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200836 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200837{
838 struct soc_mixer_control *mc =
839 (struct soc_mixer_control *)kcontrol->private_value;
840 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
841 unsigned int reg = mc->reg;
842 unsigned int shift = mc->shift;
843 unsigned int rshift = mc->rshift;
844 int max = mc->max;
845 int mask = (1 << fls(max)) - 1;
846
847 ucontrol->value.integer.value[0] =
848 (snd_soc_read(codec, reg) >> shift) & mask;
849 if (ucontrol->value.integer.value[0])
850 ucontrol->value.integer.value[0] =
851 max + 1 - ucontrol->value.integer.value[0];
852
853 if (shift != rshift) {
854 ucontrol->value.integer.value[1] =
855 (snd_soc_read(codec, reg) >> rshift) & mask;
856 if (ucontrol->value.integer.value[1])
857 ucontrol->value.integer.value[1] =
858 max + 1 - ucontrol->value.integer.value[1];
859 }
860
861 return 0;
862}
863
864static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200865 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200866{
867 struct soc_mixer_control *mc =
868 (struct soc_mixer_control *)kcontrol->private_value;
869 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
870 unsigned int reg = mc->reg;
871 unsigned int shift = mc->shift;
872 unsigned int rshift = mc->rshift;
873 int max = mc->max;
874 int mask = (1 << fls(max)) - 1;
875 unsigned short val, val2, val_mask;
876
877 val = (ucontrol->value.integer.value[0] & mask);
878
879 val_mask = mask << shift;
880 if (val)
881 val = max + 1 - val;
882 val = val << shift;
883 if (shift != rshift) {
884 val2 = (ucontrol->value.integer.value[1] & mask);
885 val_mask |= mask << rshift;
886 if (val2)
887 val2 = max + 1 - val2;
888 val |= val2 << rshift;
889 }
890 return snd_soc_update_bits(codec, reg, val_mask, val);
891}
892
893static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200894 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200895{
896 struct soc_mixer_control *mc =
897 (struct soc_mixer_control *)kcontrol->private_value;
898 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
899 unsigned int reg = mc->reg;
900 unsigned int reg2 = mc->rreg;
901 unsigned int shift = mc->shift;
902 int max = mc->max;
903 int mask = (1<<fls(max))-1;
904
905 ucontrol->value.integer.value[0] =
906 (snd_soc_read(codec, reg) >> shift) & mask;
907 ucontrol->value.integer.value[1] =
908 (snd_soc_read(codec, reg2) >> shift) & mask;
909
910 if (ucontrol->value.integer.value[0])
911 ucontrol->value.integer.value[0] =
912 max + 1 - ucontrol->value.integer.value[0];
913 if (ucontrol->value.integer.value[1])
914 ucontrol->value.integer.value[1] =
915 max + 1 - ucontrol->value.integer.value[1];
916
917 return 0;
918}
919
920static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200921 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200922{
923 struct soc_mixer_control *mc =
924 (struct soc_mixer_control *)kcontrol->private_value;
925 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
926 unsigned int reg = mc->reg;
927 unsigned int reg2 = mc->rreg;
928 unsigned int shift = mc->shift;
929 int max = mc->max;
930 int mask = (1 << fls(max)) - 1;
931 int err;
932 unsigned short val, val2, val_mask;
933
934 val_mask = mask << shift;
935 val = (ucontrol->value.integer.value[0] & mask);
936 val2 = (ucontrol->value.integer.value[1] & mask);
937
938 if (val)
939 val = max + 1 - val;
940 if (val2)
941 val2 = max + 1 - val2;
942
943 val = val << shift;
944 val2 = val2 << shift;
945
946 err = snd_soc_update_bits(codec, reg, val_mask, val);
947 if (err < 0)
948 return err;
949
950 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
951 return err;
952}
953
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500954/* Codec operation modes */
955static const char *twl4030_op_modes_texts[] = {
956 "Option 2 (voice/audio)", "Option 1 (audio)"
957};
958
959static const struct soc_enum twl4030_op_modes_enum =
960 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
961 ARRAY_SIZE(twl4030_op_modes_texts),
962 twl4030_op_modes_texts);
963
Mark Brown423c2382009-06-20 13:54:02 +0100964static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500965 struct snd_ctl_elem_value *ucontrol)
966{
967 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900968 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500969 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
970 unsigned short val;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200971 unsigned short mask;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500972
973 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200974 dev_err(codec->dev,
975 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500976 return -EBUSY;
977 }
978
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500979 if (ucontrol->value.enumerated.item[0] > e->max - 1)
980 return -EINVAL;
981
982 val = ucontrol->value.enumerated.item[0] << e->shift_l;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200983 mask = e->mask << e->shift_l;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500984 if (e->shift_l != e->shift_r) {
985 if (ucontrol->value.enumerated.item[1] > e->max - 1)
986 return -EINVAL;
987 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200988 mask |= e->mask << e->shift_r;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500989 }
990
991 return snd_soc_update_bits(codec, e->reg, mask, val);
992}
993
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200994/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200995 * FGAIN volume control:
996 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
997 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200998static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200999
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001000/*
1001 * CGAIN volume control:
1002 * 0 dB to 12 dB in 6 dB steps
1003 * value 2 and 3 means 12 dB
1004 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001005static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1006
1007/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001008 * Voice Downlink GAIN volume control:
1009 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1010 */
1011static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1012
1013/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001014 * Analog playback gain
1015 * -24 dB to 12 dB in 2 dB steps
1016 */
1017static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001018
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001019/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001020 * Gain controls tied to outputs
1021 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1022 */
1023static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1024
1025/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001026 * Gain control for earpiece amplifier
1027 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1028 */
1029static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1030
1031/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001032 * Capture gain after the ADCs
1033 * from 0 dB to 31 dB in 1 dB steps
1034 */
1035static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1036
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001037/*
1038 * Gain control for input amplifiers
1039 * 0 dB to 30 dB in 6 dB steps
1040 */
1041static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1042
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001043/* AVADC clock priority */
1044static const char *twl4030_avadc_clk_priority_texts[] = {
1045 "Voice high priority", "HiFi high priority"
1046};
1047
1048static const struct soc_enum twl4030_avadc_clk_priority_enum =
1049 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1050 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1051 twl4030_avadc_clk_priority_texts);
1052
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001053static const char *twl4030_rampdelay_texts[] = {
1054 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1055 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1056 "3495/2581/1748 ms"
1057};
1058
1059static const struct soc_enum twl4030_rampdelay_enum =
1060 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1061 ARRAY_SIZE(twl4030_rampdelay_texts),
1062 twl4030_rampdelay_texts);
1063
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001064/* Vibra H-bridge direction mode */
1065static const char *twl4030_vibradirmode_texts[] = {
1066 "Vibra H-bridge direction", "Audio data MSB",
1067};
1068
1069static const struct soc_enum twl4030_vibradirmode_enum =
1070 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1071 ARRAY_SIZE(twl4030_vibradirmode_texts),
1072 twl4030_vibradirmode_texts);
1073
1074/* Vibra H-bridge direction */
1075static const char *twl4030_vibradir_texts[] = {
1076 "Positive polarity", "Negative polarity",
1077};
1078
1079static const struct soc_enum twl4030_vibradir_enum =
1080 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1081 ARRAY_SIZE(twl4030_vibradir_texts),
1082 twl4030_vibradir_texts);
1083
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001084/* Digimic Left and right swapping */
1085static const char *twl4030_digimicswap_texts[] = {
1086 "Not swapped", "Swapped",
1087};
1088
1089static const struct soc_enum twl4030_digimicswap_enum =
1090 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1091 ARRAY_SIZE(twl4030_digimicswap_texts),
1092 twl4030_digimicswap_texts);
1093
Steve Sakomancc175572008-10-30 21:35:26 -07001094static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001095 /* Codec operation mode control */
1096 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1097 snd_soc_get_enum_double,
1098 snd_soc_put_twl4030_opmode_enum_double),
1099
Peter Ujfalusid889a722008-12-01 10:03:46 +02001100 /* Common playback gain controls */
1101 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1102 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1103 0, 0x3f, 0, digital_fine_tlv),
1104 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1105 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1106 0, 0x3f, 0, digital_fine_tlv),
1107
1108 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1109 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1110 6, 0x2, 0, digital_coarse_tlv),
1111 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1112 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1113 6, 0x2, 0, digital_coarse_tlv),
1114
1115 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1116 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1117 3, 0x12, 1, analog_tlv),
1118 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1119 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1120 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001121 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1122 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1123 1, 1, 0),
1124 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1125 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1126 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001127
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001128 /* Common voice downlink gain controls */
1129 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1130 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1131
1132 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1133 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1134
1135 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1136 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1137
Peter Ujfalusi42902392008-12-01 10:03:47 +02001138 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001139 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001140 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001141 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1142 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001143
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001144 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1145 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1146 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001147
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001148 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001149 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001150 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1151 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001152
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001153 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1154 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1155 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001156
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001157 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001158 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001159 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1160 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001161 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1162 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1163 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001164
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001165 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001166 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001167
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001168 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1169
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001170 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001171
1172 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1173 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001174
1175 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001176};
1177
Steve Sakomancc175572008-10-30 21:35:26 -07001178static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001179 /* Left channel inputs */
1180 SND_SOC_DAPM_INPUT("MAINMIC"),
1181 SND_SOC_DAPM_INPUT("HSMIC"),
1182 SND_SOC_DAPM_INPUT("AUXL"),
1183 SND_SOC_DAPM_INPUT("CARKITMIC"),
1184 /* Right channel inputs */
1185 SND_SOC_DAPM_INPUT("SUBMIC"),
1186 SND_SOC_DAPM_INPUT("AUXR"),
1187 /* Digital microphones (Stereo) */
1188 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1189 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001190
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001191 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001192 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001193 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1194 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001195 SND_SOC_DAPM_OUTPUT("HSOL"),
1196 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001197 SND_SOC_DAPM_OUTPUT("CARKITL"),
1198 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001199 SND_SOC_DAPM_OUTPUT("HFL"),
1200 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001201 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001202
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001203 /* AIF and APLL clocks for running DAIs (including loopback) */
1204 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1205 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1206 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1207
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001208 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001209 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1210 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1211 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1212 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1213 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001214
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001215 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1216 TWL4030_REG_VOICE_IF, 6, 0),
1217
Peter Ujfalusi73939582009-01-29 14:57:50 +02001218 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001219 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1220 &twl4030_dapm_abypassr1_control),
1221 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1222 &twl4030_dapm_abypassl1_control),
1223 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1224 &twl4030_dapm_abypassr2_control),
1225 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1226 &twl4030_dapm_abypassl2_control),
1227 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1228 &twl4030_dapm_abypassv_control),
1229
1230 /* Master analog loopback switch */
1231 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1232 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001233
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001234 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001235 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1236 &twl4030_dapm_dbypassl_control),
1237 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1238 &twl4030_dapm_dbypassr_control),
1239 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1240 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001241
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001242 /* Digital mixers, power control for the physical DACs */
1243 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1244 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1245 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1246 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1247 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1248 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1249 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1250 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1251 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1252 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1253
1254 /* Analog mixers, power control for the physical PGAs */
1255 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1256 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1257 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1258 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1259 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1260 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1261 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1262 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1263 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1264 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001265
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001266 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1267 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1268
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001269 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1270 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001271
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001272 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001273 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001274 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1275 &twl4030_dapm_earpiece_controls[0],
1276 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001277 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1278 0, 0, NULL, 0, earpiecepga_event,
1279 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001280 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001281 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1282 &twl4030_dapm_predrivel_controls[0],
1283 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001284 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1285 0, 0, NULL, 0, predrivelpga_event,
1286 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001287 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1288 &twl4030_dapm_predriver_controls[0],
1289 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001290 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1291 0, 0, NULL, 0, predriverpga_event,
1292 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001293 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001294 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001295 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001296 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1297 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1298 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001299 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1300 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1301 &twl4030_dapm_hsor_controls[0],
1302 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001303 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1304 0, 0, NULL, 0, headsetrpga_event,
1305 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001306 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001307 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1308 &twl4030_dapm_carkitl_controls[0],
1309 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001310 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1311 0, 0, NULL, 0, carkitlpga_event,
1312 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001313 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1314 &twl4030_dapm_carkitr_controls[0],
1315 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001316 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1317 0, 0, NULL, 0, carkitrpga_event,
1318 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001319
1320 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001321 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001322 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1323 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001324 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001325 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001326 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1327 0, 0, NULL, 0, handsfreelpga_event,
1328 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1329 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1330 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001331 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001332 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001333 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1334 0, 0, NULL, 0, handsfreerpga_event,
1335 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001336 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001337 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1338 &twl4030_dapm_vibra_control, vibramux_event,
1339 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001340 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001342
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001343 /* Introducing four virtual ADC, since TWL4030 have four channel for
1344 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001345 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1346 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1347 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1348 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001349
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001350 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1351 TWL4030_REG_VOICE_IF, 5, 0),
1352
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001353 /* Analog/Digital mic path selection.
1354 TX1 Left/Right: either analog Left/Right or Digimic0
1355 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001356 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1357 &twl4030_dapm_micpathtx1_control),
1358 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1359 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001360
Joonyoung Shim97b80962009-05-11 20:36:08 +09001361 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001362 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001363 TWL4030_REG_ANAMICL, 4, 0,
1364 &twl4030_dapm_analoglmic_controls[0],
1365 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001366 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001367 TWL4030_REG_ANAMICR, 4, 0,
1368 &twl4030_dapm_analogrmic_controls[0],
1369 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001370
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001371 SND_SOC_DAPM_PGA("ADC Physical Left",
1372 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1373 SND_SOC_DAPM_PGA("ADC Physical Right",
1374 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001375
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001376 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1377 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1378 digimic_event, SND_SOC_DAPM_POST_PMU),
1379 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1380 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1381 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001382
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001383 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1384 NULL, 0),
1385 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1386 NULL, 0),
1387
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001388 /* Microphone bias */
1389 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1390 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1391 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1392 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1393 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1394 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001395
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001396 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001397};
1398
1399static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001400 /* Stream -> DAC mapping */
1401 {"DAC Right1", NULL, "HiFi Playback"},
1402 {"DAC Left1", NULL, "HiFi Playback"},
1403 {"DAC Right2", NULL, "HiFi Playback"},
1404 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001405 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001406
1407 /* ADC -> Stream mapping */
1408 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1409 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1410 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1411 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001412 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1413 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1414 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001415
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001416 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1417 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1418 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1419 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1420 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001421
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001422 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001423 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1424
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001425 {"DAC Left1", NULL, "AIF Enable"},
1426 {"DAC Right1", NULL, "AIF Enable"},
1427 {"DAC Left2", NULL, "AIF Enable"},
1428 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001429 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001430
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001431 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1432 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1433
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001434 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1435 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1436 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1437 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1438 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001439
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001440 /* Internal playback routings */
1441 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001442 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1443 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1444 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1445 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001446 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001447 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001448 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1449 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1450 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1451 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001452 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001453 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001454 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1455 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1456 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1457 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001458 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001459 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001460 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1461 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1462 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001463 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001464 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001465 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1466 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1467 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001468 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001469 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001470 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1471 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1472 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001473 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001474 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001475 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1476 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1477 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001478 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001479 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001480 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1481 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1482 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1483 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001484 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1485 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001486 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001487 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1488 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1489 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1490 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001491 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1492 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001493 /* Vibra */
1494 {"Vibra Mux", "AudioL1", "DAC Left1"},
1495 {"Vibra Mux", "AudioR1", "DAC Right1"},
1496 {"Vibra Mux", "AudioL2", "DAC Left2"},
1497 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001498
Steve Sakomancc175572008-10-30 21:35:26 -07001499 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001500 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001501 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1502 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1503 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1504 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001505 /* Must be always connected (for APLL) */
1506 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1507 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001508 {"EARPIECE", NULL, "Earpiece PGA"},
1509 {"PREDRIVEL", NULL, "PredriveL PGA"},
1510 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001511 {"HSOL", NULL, "HeadsetL PGA"},
1512 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001513 {"CARKITL", NULL, "CarkitL PGA"},
1514 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001515 {"HFL", NULL, "HandsfreeL PGA"},
1516 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001517 {"Vibra Route", "Audio", "Vibra Mux"},
1518 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001519
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001520 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001521 /* Must be always connected (for AIF and APLL) */
1522 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1523 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1524 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1525 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1526 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001527 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1528 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1529 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1530 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001531
Peter Ujfalusi90289352009-08-14 08:44:00 +03001532 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1533 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001534
Peter Ujfalusi90289352009-08-14 08:44:00 +03001535 {"ADC Physical Left", NULL, "Analog Left"},
1536 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001537
1538 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1539 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1540
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001541 {"DIGIMIC0", NULL, "micbias1 select"},
1542 {"DIGIMIC1", NULL, "micbias2 select"},
1543
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001544 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001545 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001546 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1547 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001548 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001549 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1550 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001551 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001552 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1553 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001554 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001555 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1556
1557 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1558 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1559 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1560 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1561
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001562 {"ADC Virtual Left1", NULL, "AIF Enable"},
1563 {"ADC Virtual Right1", NULL, "AIF Enable"},
1564 {"ADC Virtual Left2", NULL, "AIF Enable"},
1565 {"ADC Virtual Right2", NULL, "AIF Enable"},
1566
Peter Ujfalusi73939582009-01-29 14:57:50 +02001567 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001568 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1569 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1570 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1571 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1572 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001573
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001574 /* Supply for the Analog loopbacks */
1575 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1576 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1577 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1578 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1579 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1580
Peter Ujfalusi73939582009-01-29 14:57:50 +02001581 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1582 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1583 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1584 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001585 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001586
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001587 /* Digital bypass routes */
1588 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1589 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001590 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001591
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001592 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1593 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1594 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001595
Steve Sakomancc175572008-10-30 21:35:26 -07001596};
1597
Steve Sakomancc175572008-10-30 21:35:26 -07001598static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1599 enum snd_soc_bias_level level)
1600{
1601 switch (level) {
1602 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001603 break;
1604 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001605 break;
1606 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001607 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001608 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001609 break;
1610 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001611 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001612 break;
1613 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001614 codec->dapm.bias_level = level;
Steve Sakomancc175572008-10-30 21:35:26 -07001615
1616 return 0;
1617}
1618
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001619static void twl4030_constraints(struct twl4030_priv *twl4030,
1620 struct snd_pcm_substream *mst_substream)
1621{
1622 struct snd_pcm_substream *slv_substream;
1623
1624 /* Pick the stream, which need to be constrained */
1625 if (mst_substream == twl4030->master_substream)
1626 slv_substream = twl4030->slave_substream;
1627 else if (mst_substream == twl4030->slave_substream)
1628 slv_substream = twl4030->master_substream;
1629 else /* This should not happen.. */
1630 return;
1631
1632 /* Set the constraints according to the already configured stream */
1633 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1634 SNDRV_PCM_HW_PARAM_RATE,
1635 twl4030->rate,
1636 twl4030->rate);
1637
1638 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1639 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1640 twl4030->sample_bits,
1641 twl4030->sample_bits);
1642
1643 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1644 SNDRV_PCM_HW_PARAM_CHANNELS,
1645 twl4030->channels,
1646 twl4030->channels);
1647}
1648
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001649/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1650 * capture has to be enabled/disabled. */
1651static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001652 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001653{
1654 u8 reg, mask;
1655
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001656 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001657
1658 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1659 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1660 else
1661 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1662
1663 if (enable)
1664 reg |= mask;
1665 else
1666 reg &= ~mask;
1667
1668 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1669}
1670
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001671static int twl4030_startup(struct snd_pcm_substream *substream,
1672 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001673{
Mark Browne6968a12012-04-04 15:58:16 +01001674 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001675 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001676
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001677 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001678 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001679 /* The DAI has one configuration for playback and capture, so
1680 * if the DAI has been already configured then constrain this
1681 * substream to match it. */
1682 if (twl4030->configured)
1683 twl4030_constraints(twl4030, twl4030->master_substream);
1684 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001685 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001686 TWL4030_OPTION_1)) {
1687 /* In option2 4 channel is not supported, set the
1688 * constraint for the first stream for channels, the
1689 * second stream will 'inherit' this cosntraint */
1690 snd_pcm_hw_constraint_minmax(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001691 SNDRV_PCM_HW_PARAM_CHANNELS,
1692 2, 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001693 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001694 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001695 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001696
1697 return 0;
1698}
1699
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001700static void twl4030_shutdown(struct snd_pcm_substream *substream,
1701 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001702{
Mark Browne6968a12012-04-04 15:58:16 +01001703 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001704 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001705
1706 if (twl4030->master_substream == substream)
1707 twl4030->master_substream = twl4030->slave_substream;
1708
1709 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001710
1711 /* If all streams are closed, or the remaining stream has not yet
1712 * been configured than set the DAI as not configured. */
1713 if (!twl4030->master_substream)
1714 twl4030->configured = 0;
1715 else if (!twl4030->master_substream->runtime->channels)
1716 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001717
1718 /* If the closing substream had 4 channel, do the necessary cleanup */
1719 if (substream->runtime->channels == 4)
1720 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001721}
1722
Steve Sakomancc175572008-10-30 21:35:26 -07001723static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001724 struct snd_pcm_hw_params *params,
1725 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001726{
Mark Browne6968a12012-04-04 15:58:16 +01001727 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001728 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001729 u8 mode, old_mode, format, old_format;
1730
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001731 /* If the substream has 4 channel, do the necessary setup */
1732 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001733 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1734 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001735
1736 /* Safety check: are we in the correct operating mode and
1737 * the interface is in TDM mode? */
1738 if ((mode & TWL4030_OPTION_1) &&
1739 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001740 twl4030_tdm_enable(codec, substream->stream, 1);
1741 else
1742 return -EINVAL;
1743 }
1744
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001745 if (twl4030->configured)
1746 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001747 return 0;
1748
Steve Sakomancc175572008-10-30 21:35:26 -07001749 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001750 old_mode = twl4030_read(codec,
1751 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001752 mode = old_mode & ~TWL4030_APLL_RATE;
1753
1754 switch (params_rate(params)) {
1755 case 8000:
1756 mode |= TWL4030_APLL_RATE_8000;
1757 break;
1758 case 11025:
1759 mode |= TWL4030_APLL_RATE_11025;
1760 break;
1761 case 12000:
1762 mode |= TWL4030_APLL_RATE_12000;
1763 break;
1764 case 16000:
1765 mode |= TWL4030_APLL_RATE_16000;
1766 break;
1767 case 22050:
1768 mode |= TWL4030_APLL_RATE_22050;
1769 break;
1770 case 24000:
1771 mode |= TWL4030_APLL_RATE_24000;
1772 break;
1773 case 32000:
1774 mode |= TWL4030_APLL_RATE_32000;
1775 break;
1776 case 44100:
1777 mode |= TWL4030_APLL_RATE_44100;
1778 break;
1779 case 48000:
1780 mode |= TWL4030_APLL_RATE_48000;
1781 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001782 case 96000:
1783 mode |= TWL4030_APLL_RATE_96000;
1784 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001785 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001786 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001787 params_rate(params));
1788 return -EINVAL;
1789 }
1790
Steve Sakomancc175572008-10-30 21:35:26 -07001791 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001792 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001793 format = old_format;
1794 format &= ~TWL4030_DATA_WIDTH;
1795 switch (params_format(params)) {
1796 case SNDRV_PCM_FORMAT_S16_LE:
1797 format |= TWL4030_DATA_WIDTH_16S_16W;
1798 break;
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02001799 case SNDRV_PCM_FORMAT_S32_LE:
Steve Sakomancc175572008-10-30 21:35:26 -07001800 format |= TWL4030_DATA_WIDTH_32S_24W;
1801 break;
1802 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001803 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001804 params_format(params));
1805 return -EINVAL;
1806 }
1807
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001808 if (format != old_format || mode != old_mode) {
1809 if (twl4030->codec_powered) {
1810 /*
1811 * If the codec is powered, than we need to toggle the
1812 * codec power.
1813 */
1814 twl4030_codec_enable(codec, 0);
1815 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1816 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1817 twl4030_codec_enable(codec, 1);
1818 } else {
1819 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1820 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1821 }
Steve Sakomancc175572008-10-30 21:35:26 -07001822 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001823
1824 /* Store the important parameters for the DAI configuration and set
1825 * the DAI as configured */
1826 twl4030->configured = 1;
1827 twl4030->rate = params_rate(params);
1828 twl4030->sample_bits = hw_param_interval(params,
1829 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1830 twl4030->channels = params_channels(params);
1831
1832 /* If both playback and capture streams are open, and one of them
1833 * is setting the hw parameters right now (since we are here), set
1834 * constraints to the other stream to match the current one. */
1835 if (twl4030->slave_substream)
1836 twl4030_constraints(twl4030, substream);
1837
Steve Sakomancc175572008-10-30 21:35:26 -07001838 return 0;
1839}
1840
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001841static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1842 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001843{
1844 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001845 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001846
1847 switch (freq) {
1848 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001849 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001850 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001851 break;
1852 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001853 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001854 return -EINVAL;
1855 }
1856
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001857 if ((freq / 1000) != twl4030->sysclk) {
1858 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001859 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001860 freq, twl4030->sysclk * 1000);
1861 return -EINVAL;
1862 }
Steve Sakomancc175572008-10-30 21:35:26 -07001863
1864 return 0;
1865}
1866
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001867static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001868{
1869 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001870 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001871 u8 old_format, format;
1872
1873 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001874 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001875 format = old_format;
1876
1877 /* set master/slave audio interface */
1878 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1879 case SND_SOC_DAIFMT_CBM_CFM:
1880 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001881 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001882 break;
1883 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001884 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001885 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001886 break;
1887 default:
1888 return -EINVAL;
1889 }
1890
1891 /* interface format */
1892 format &= ~TWL4030_AIF_FORMAT;
1893 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1894 case SND_SOC_DAIFMT_I2S:
1895 format |= TWL4030_AIF_FORMAT_CODEC;
1896 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001897 case SND_SOC_DAIFMT_DSP_A:
1898 format |= TWL4030_AIF_FORMAT_TDM;
1899 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001900 default:
1901 return -EINVAL;
1902 }
1903
1904 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001905 if (twl4030->codec_powered) {
1906 /*
1907 * If the codec is powered, than we need to toggle the
1908 * codec power.
1909 */
1910 twl4030_codec_enable(codec, 0);
1911 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1912 twl4030_codec_enable(codec, 1);
1913 } else {
1914 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1915 }
Steve Sakomancc175572008-10-30 21:35:26 -07001916 }
1917
1918 return 0;
1919}
1920
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001921static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1922{
1923 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001924 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001925
1926 if (tristate)
1927 reg |= TWL4030_AIF_TRI_EN;
1928 else
1929 reg &= ~TWL4030_AIF_TRI_EN;
1930
1931 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1932}
1933
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001934/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1935 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1936static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001937 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001938{
1939 u8 reg, mask;
1940
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001941 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001942
1943 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1944 mask = TWL4030_ARXL1_VRX_EN;
1945 else
1946 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1947
1948 if (enable)
1949 reg |= mask;
1950 else
1951 reg &= ~mask;
1952
1953 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1954}
1955
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001956static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001957 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001958{
Mark Browne6968a12012-04-04 15:58:16 +01001959 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001960 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001961 u8 mode;
1962
1963 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001964 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001965 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001966 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001967 dev_err(codec->dev,
1968 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1969 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001970 return -EINVAL;
1971 }
1972
1973 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001974 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001975 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001976 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001977 & TWL4030_OPT_MODE;
1978
1979 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001980 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1981 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001982 return -EINVAL;
1983 }
1984
1985 return 0;
1986}
1987
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001988static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001989 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001990{
Mark Browne6968a12012-04-04 15:58:16 +01001991 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001992
1993 /* Enable voice digital filters */
1994 twl4030_voice_enable(codec, substream->stream, 0);
1995}
1996
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001997static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001998 struct snd_pcm_hw_params *params,
1999 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002000{
Mark Browne6968a12012-04-04 15:58:16 +01002001 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002002 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002003 u8 old_mode, mode;
2004
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002005 /* Enable voice digital filters */
2006 twl4030_voice_enable(codec, substream->stream, 1);
2007
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002008 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002009 old_mode = twl4030_read(codec,
2010 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002011 mode = old_mode;
2012
2013 switch (params_rate(params)) {
2014 case 8000:
2015 mode &= ~(TWL4030_SEL_16K);
2016 break;
2017 case 16000:
2018 mode |= TWL4030_SEL_16K;
2019 break;
2020 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002021 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002022 params_rate(params));
2023 return -EINVAL;
2024 }
2025
2026 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002027 if (twl4030->codec_powered) {
2028 /*
2029 * If the codec is powered, than we need to toggle the
2030 * codec power.
2031 */
2032 twl4030_codec_enable(codec, 0);
2033 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2034 twl4030_codec_enable(codec, 1);
2035 } else {
2036 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2037 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002038 }
2039
2040 return 0;
2041}
2042
2043static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002044 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002045{
2046 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002047 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002048
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002049 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002050 dev_err(codec->dev,
2051 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2052 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002053 return -EINVAL;
2054 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002055 if ((freq / 1000) != twl4030->sysclk) {
2056 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002057 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002058 freq, twl4030->sysclk * 1000);
2059 return -EINVAL;
2060 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002061 return 0;
2062}
2063
2064static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002065 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002066{
2067 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002068 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002069 u8 old_format, format;
2070
2071 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002072 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002073 format = old_format;
2074
2075 /* set master/slave audio interface */
2076 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002077 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002078 format &= ~(TWL4030_VIF_SLAVE_EN);
2079 break;
2080 case SND_SOC_DAIFMT_CBS_CFS:
2081 format |= TWL4030_VIF_SLAVE_EN;
2082 break;
2083 default:
2084 return -EINVAL;
2085 }
2086
2087 /* clock inversion */
2088 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2089 case SND_SOC_DAIFMT_IB_NF:
2090 format &= ~(TWL4030_VIF_FORMAT);
2091 break;
2092 case SND_SOC_DAIFMT_NB_IF:
2093 format |= TWL4030_VIF_FORMAT;
2094 break;
2095 default:
2096 return -EINVAL;
2097 }
2098
2099 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002100 if (twl4030->codec_powered) {
2101 /*
2102 * If the codec is powered, than we need to toggle the
2103 * codec power.
2104 */
2105 twl4030_codec_enable(codec, 0);
2106 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2107 twl4030_codec_enable(codec, 1);
2108 } else {
2109 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2110 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002111 }
2112
2113 return 0;
2114}
2115
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002116static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2117{
2118 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002119 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002120
2121 if (tristate)
2122 reg |= TWL4030_VIF_TRI_EN;
2123 else
2124 reg &= ~TWL4030_VIF_TRI_EN;
2125
2126 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2127}
2128
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002129#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002130#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002131
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002132static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002133 .startup = twl4030_startup,
2134 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002135 .hw_params = twl4030_hw_params,
2136 .set_sysclk = twl4030_set_dai_sysclk,
2137 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002138 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002139};
2140
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002141static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002142 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002143 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002144 .hw_params = twl4030_voice_hw_params,
2145 .set_sysclk = twl4030_voice_set_dai_sysclk,
2146 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002147 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002148};
2149
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002150static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002151{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002152 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002153 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002154 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002155 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002156 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002157 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002158 .formats = TWL4030_FORMATS,
2159 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002160 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002161 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002162 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002163 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002164 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002165 .formats = TWL4030_FORMATS,
2166 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002167 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002168},
2169{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002170 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002171 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002172 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002173 .channels_min = 1,
2174 .channels_max = 1,
2175 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2176 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2177 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002178 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002179 .channels_min = 1,
2180 .channels_max = 2,
2181 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2182 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2183 .ops = &twl4030_dai_voice_ops,
2184},
Steve Sakomancc175572008-10-30 21:35:26 -07002185};
Steve Sakomancc175572008-10-30 21:35:26 -07002186
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002187static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002188{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002189 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002190
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002191 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2192 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002193 if (twl4030 == NULL) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002194 dev_err(codec->dev, "Can not allocate memory\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002195 return -ENOMEM;
Steve Sakomancc175572008-10-30 21:35:26 -07002196 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002197 snd_soc_codec_set_drvdata(codec, twl4030);
2198 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002199 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002200
2201 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002202
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002203 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002204}
2205
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002206static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002207{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002208 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002209 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002210
Peter Ujfalusi73939582009-01-29 14:57:50 +02002211 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002212
2213 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2214 gpio_free(pdata->hs_extmute_gpio);
2215
Steve Sakomancc175572008-10-30 21:35:26 -07002216 return 0;
2217}
2218
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002219static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2220 .probe = twl4030_soc_probe,
2221 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002222 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002223 .write = twl4030_write,
2224 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002225 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002226
2227 .controls = twl4030_snd_controls,
2228 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2229 .dapm_widgets = twl4030_dapm_widgets,
2230 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2231 .dapm_routes = intercon,
2232 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002233};
2234
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002235static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002236{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002237 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002238 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002239}
2240
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002241static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002242{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002243 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002244 return 0;
2245}
2246
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002247MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002248
2249static struct platform_driver twl4030_codec_driver = {
2250 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002251 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002252 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002253 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002254 .owner = THIS_MODULE,
2255 },
Steve Sakomancc175572008-10-30 21:35:26 -07002256};
Steve Sakomancc175572008-10-30 21:35:26 -07002257
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002258module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002259
Steve Sakomancc175572008-10-30 21:35:26 -07002260MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2261MODULE_AUTHOR("Steve Sakoman");
2262MODULE_LICENSE("GPL");