blob: dda53e8c51e540a3cd8cdce6cff19acff1aa8376 [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static void twl4030_update_ctl_cache(struct snd_soc_codec *codec,
90 unsigned int reg, unsigned int value)
Steve Sakomancc175572008-10-30 21:35:26 -070091{
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020092 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
93
94 switch (reg) {
95 case TWL4030_REG_EAR_CTL:
96 case TWL4030_REG_PREDL_CTL:
97 case TWL4030_REG_PREDR_CTL:
98 case TWL4030_REG_PRECKL_CTL:
99 case TWL4030_REG_PRECKR_CTL:
100 case TWL4030_REG_HS_GAIN_SET:
101 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
102 break;
103 default:
104 break;
105 }
106}
107
108static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
109{
110 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
111 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700112
Ian Molton91432e92009-01-17 17:44:23 +0000113 if (reg >= TWL4030_CACHEREGNUM)
114 return -EIO;
115
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200116 switch (reg) {
117 case TWL4030_REG_EAR_CTL:
118 case TWL4030_REG_PREDL_CTL:
119 case TWL4030_REG_PREDR_CTL:
120 case TWL4030_REG_PRECKL_CTL:
121 case TWL4030_REG_PRECKR_CTL:
122 case TWL4030_REG_HS_GAIN_SET:
123 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
124 break;
125 default:
126 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
127 break;
128 }
Steve Sakomancc175572008-10-30 21:35:26 -0700129
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200130 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700131}
132
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200133static bool twl4030_can_write_to_chip(struct snd_soc_codec *codec,
134 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700135{
Mark Brownb2c812e2010-04-14 15:35:19 +0900136 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200137 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200138
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200139 /* Decide if the given register can be written */
140 switch (reg) {
141 case TWL4030_REG_EAR_CTL:
142 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 case TWL4030_REG_PREDL_CTL:
146 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
149 case TWL4030_REG_PREDR_CTL:
150 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200151 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200152 break;
153 case TWL4030_REG_PRECKL_CTL:
154 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200155 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200156 break;
157 case TWL4030_REG_PRECKR_CTL:
158 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200159 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200160 break;
161 case TWL4030_REG_HS_GAIN_SET:
162 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200163 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200164 break;
165 default:
166 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200167 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200168 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200169 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200170
171 return write_to_reg;
172}
173
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174static int twl4030_write(struct snd_soc_codec *codec,
175 unsigned int reg, unsigned int value)
176{
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200177 twl4030_update_ctl_cache(codec, reg, value);
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200178 if (twl4030_can_write_to_chip(codec, reg))
179 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200180
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200181 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700182}
183
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300184static inline void twl4030_wait_ms(int time)
185{
186 if (time < 60) {
187 time *= 1000;
188 usleep_range(time, time + 500);
189 } else {
190 msleep(time);
191 }
192}
193
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200194static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700195{
Mark Brownb2c812e2010-04-14 15:35:19 +0900196 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300197 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700198
Peter Ujfalusi73939582009-01-29 14:57:50 +0200199 if (enable == twl4030->codec_powered)
200 return;
201
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200202 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300203 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200204 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300205 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700206
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200207 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300208 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700209
210 /* REVISIT: this delay is present in TI sample drivers */
211 /* but there seems to be no TRM requirement for it */
212 udelay(10);
213}
214
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300215static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
216 struct device_node *node)
217{
218 int value;
219
220 of_property_read_u32(node, "ti,digimic_delay",
221 &pdata->digimic_delay);
222 of_property_read_u32(node, "ti,ramp_delay_value",
223 &pdata->ramp_delay_value);
224 of_property_read_u32(node, "ti,offset_cncl_path",
225 &pdata->offset_cncl_path);
226 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
227 pdata->hs_extmute = value;
228
229 pdata->hs_extmute_gpio = of_get_named_gpio(node,
230 "ti,hs_extmute_gpio", 0);
231 if (gpio_is_valid(pdata->hs_extmute_gpio))
232 pdata->hs_extmute = 1;
233}
234
235static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700236{
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300237 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300238 struct device_node *twl4030_codec_node = NULL;
239
240 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
241 "codec");
242
243 if (!pdata && twl4030_codec_node) {
244 pdata = devm_kzalloc(codec->dev,
245 sizeof(struct twl4030_codec_data),
246 GFP_KERNEL);
247 if (!pdata) {
248 dev_err(codec->dev, "Can not allocate memory\n");
249 return NULL;
250 }
251 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
252 }
253
254 return pdata;
255}
256
257static void twl4030_init_chip(struct snd_soc_codec *codec)
258{
259 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300260 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
261 u8 reg, byte;
262 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700263
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300264 pdata = twl4030_get_pdata(codec);
265
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100266 if (pdata && pdata->hs_extmute) {
267 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
268 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300269
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100270 if (!pdata->hs_extmute_gpio)
271 dev_warn(codec->dev,
272 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300273
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100274 ret = gpio_request_one(pdata->hs_extmute_gpio,
275 GPIOF_OUT_INIT_LOW,
276 "hs_extmute");
277 if (ret) {
278 dev_err(codec->dev,
279 "Failed to get hs_extmute GPIO\n");
280 pdata->hs_extmute_gpio = -1;
281 }
282 } else {
283 u8 pin_mux;
284
285 /* Set TWL4030 GPIO6 as EXTMUTE signal */
286 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
287 TWL4030_PMBR1_REG);
288 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
289 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
290 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
291 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300292 }
293 }
294
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200295 /* Initialize the local ctl register cache */
296 tw4030_init_ctl_cache(twl4030);
297
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300298 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200299 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300300 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
301 reg | TWL4030_SMOOTH_ANAVOL_EN);
302
303 twl4030_write(codec, TWL4030_REG_OPTION,
304 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
305 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
306
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300307 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
308 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
309
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000311 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 return;
313
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300314 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200316 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300317 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000318 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320
321 /* initiate offset cancellation */
322 twl4030_codec_enable(codec, 1);
323
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200324 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300325 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000326 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300327 twl4030_write(codec, TWL4030_REG_ANAMICL,
328 reg | TWL4030_CNCL_OFFSET_START);
329
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300330 /*
331 * Wait for offset cancellation to complete.
332 * Since this takes a while, do not slam the i2c.
333 * Start polling the status after ~20ms.
334 */
335 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300336 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300337 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200338 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300339 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
340 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200341 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300342 } while ((i++ < 100) &&
343 ((byte & TWL4030_CNCL_OFFSET_START) ==
344 TWL4030_CNCL_OFFSET_START));
345
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200346 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700347}
348
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200349static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200350{
Mark Brownb2c812e2010-04-14 15:35:19 +0900351 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300352 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200353
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300354 if (enable) {
355 twl4030->apll_enabled++;
356 if (twl4030->apll_enabled == 1)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 status = twl4030_audio_enable_resource(
358 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300359 } else {
360 twl4030->apll_enabled--;
361 if (!twl4030->apll_enabled)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300362 status = twl4030_audio_disable_resource(
363 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300364 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200365}
366
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200367/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900368static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
369 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
370 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
371 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
372 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
373};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200374
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200375/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900376static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
377 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
378 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
379 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
380 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
381};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200382
383/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900384static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
385 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
386 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
387 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
388 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
389};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200390
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200391/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900392static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
393 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
394 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
395 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
396};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200397
398/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900399static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
400 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
401 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
402 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
403};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200404
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200405/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900406static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
407 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
408 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
409 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
410};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200411
412/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900413static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
414 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
415 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
416 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
417};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200418
Peter Ujfalusidf339802008-12-09 12:35:51 +0200419/* Handsfree Left */
420static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900421 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200422
423static const struct soc_enum twl4030_handsfreel_enum =
424 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
425 ARRAY_SIZE(twl4030_handsfreel_texts),
426 twl4030_handsfreel_texts);
427
428static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
429SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
430
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300431/* Handsfree Left virtual mute */
432static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200433 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300434
Peter Ujfalusidf339802008-12-09 12:35:51 +0200435/* Handsfree Right */
436static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900437 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200438
439static const struct soc_enum twl4030_handsfreer_enum =
440 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
441 ARRAY_SIZE(twl4030_handsfreer_texts),
442 twl4030_handsfreer_texts);
443
444static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
445SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
446
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300447/* Handsfree Right virtual mute */
448static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200449 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300450
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300451/* Vibra */
452/* Vibra audio path selection */
453static const char *twl4030_vibra_texts[] =
454 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
455
456static const struct soc_enum twl4030_vibra_enum =
457 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
458 ARRAY_SIZE(twl4030_vibra_texts),
459 twl4030_vibra_texts);
460
461static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
462SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
463
464/* Vibra path selection: local vibrator (PWM) or audio driven */
465static const char *twl4030_vibrapath_texts[] =
466 {"Local vibrator", "Audio"};
467
468static const struct soc_enum twl4030_vibrapath_enum =
469 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
470 ARRAY_SIZE(twl4030_vibrapath_texts),
471 twl4030_vibrapath_texts);
472
473static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
474SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
475
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200476/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900477static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300478 SOC_DAPM_SINGLE("Main Mic Capture Switch",
479 TWL4030_REG_ANAMICL, 0, 1, 0),
480 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
481 TWL4030_REG_ANAMICL, 1, 1, 0),
482 SOC_DAPM_SINGLE("AUXL Capture Switch",
483 TWL4030_REG_ANAMICL, 2, 1, 0),
484 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
485 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900486};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200487
488/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900489static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300490 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
491 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900492};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200493
494/* TX1 L/R Analog/Digital microphone selection */
495static const char *twl4030_micpathtx1_texts[] =
496 {"Analog", "Digimic0"};
497
498static const struct soc_enum twl4030_micpathtx1_enum =
499 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
500 ARRAY_SIZE(twl4030_micpathtx1_texts),
501 twl4030_micpathtx1_texts);
502
503static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
504SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
505
506/* TX2 L/R Analog/Digital microphone selection */
507static const char *twl4030_micpathtx2_texts[] =
508 {"Analog", "Digimic1"};
509
510static const struct soc_enum twl4030_micpathtx2_enum =
511 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
512 ARRAY_SIZE(twl4030_micpathtx2_texts),
513 twl4030_micpathtx2_texts);
514
515static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
516SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
517
Peter Ujfalusi73939582009-01-29 14:57:50 +0200518/* Analog bypass for AudioR1 */
519static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
521
522/* Analog bypass for AudioL1 */
523static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
525
526/* Analog bypass for AudioR2 */
527static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
528 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
529
530/* Analog bypass for AudioL2 */
531static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
532 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
533
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500534/* Analog bypass for Voice */
535static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
536 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
537
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300538/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200539static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300540 TLV_DB_RANGE_HEAD(3),
541 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
542 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200543 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
544};
545
546/* Digital bypass left (TX1L -> RX2L) */
547static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
548 SOC_DAPM_SINGLE_TLV("Volume",
549 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
550 twl4030_dapm_dbypass_tlv);
551
552/* Digital bypass right (TX1R -> RX2R) */
553static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
554 SOC_DAPM_SINGLE_TLV("Volume",
555 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
556 twl4030_dapm_dbypass_tlv);
557
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500558/*
559 * Voice Sidetone GAIN volume control:
560 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
561 */
562static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
563
564/* Digital bypass voice: sidetone (VUL -> VDL)*/
565static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
566 SOC_DAPM_SINGLE_TLV("Volume",
567 TWL4030_REG_VSTPGA, 0, 0x29, 0,
568 twl4030_dapm_dbypassv_tlv);
569
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300570/*
571 * Output PGA builder:
572 * Handle the muting and unmuting of the given output (turning off the
573 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200574 * On mute bypass the reg_cache and write 0 to the register
575 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300576 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
577 */
578#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
579static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
580 struct snd_kcontrol *kcontrol, int event) \
581{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900582 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300583 \
584 switch (event) { \
585 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200586 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200587 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300588 break; \
589 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200590 twl4030->pin_name##_enabled = 0; \
591 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
592 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300593 break; \
594 } \
595 return 0; \
596}
597
598TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
599TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
600TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
601TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
602TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
603
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300604static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800605{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800606 unsigned char hs_ctl;
607
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200608 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800609
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300610 if (ramp) {
611 /* HF ramp-up */
612 hs_ctl |= TWL4030_HF_CTL_REF_EN;
613 twl4030_write(codec, reg, hs_ctl);
614 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800615 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300616 twl4030_write(codec, reg, hs_ctl);
617 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800618 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800619 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300620 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800621 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300622 /* HF ramp-down */
623 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
624 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
625 twl4030_write(codec, reg, hs_ctl);
626 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
627 twl4030_write(codec, reg, hs_ctl);
628 udelay(40);
629 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
630 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800631 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300632}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800633
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300634static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
635 struct snd_kcontrol *kcontrol, int event)
636{
637 switch (event) {
638 case SND_SOC_DAPM_POST_PMU:
639 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
640 break;
641 case SND_SOC_DAPM_POST_PMD:
642 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
643 break;
644 }
645 return 0;
646}
647
648static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
649 struct snd_kcontrol *kcontrol, int event)
650{
651 switch (event) {
652 case SND_SOC_DAPM_POST_PMU:
653 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
654 break;
655 case SND_SOC_DAPM_POST_PMD:
656 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
657 break;
658 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800659 return 0;
660}
661
Jari Vanhala86139a12009-10-29 11:58:09 +0200662static int vibramux_event(struct snd_soc_dapm_widget *w,
663 struct snd_kcontrol *kcontrol, int event)
664{
665 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
666 return 0;
667}
668
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200669static int apll_event(struct snd_soc_dapm_widget *w,
670 struct snd_kcontrol *kcontrol, int event)
671{
672 switch (event) {
673 case SND_SOC_DAPM_PRE_PMU:
674 twl4030_apll_enable(w->codec, 1);
675 break;
676 case SND_SOC_DAPM_POST_PMD:
677 twl4030_apll_enable(w->codec, 0);
678 break;
679 }
680 return 0;
681}
682
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300683static int aif_event(struct snd_soc_dapm_widget *w,
684 struct snd_kcontrol *kcontrol, int event)
685{
686 u8 audio_if;
687
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200688 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300689 switch (event) {
690 case SND_SOC_DAPM_PRE_PMU:
691 /* Enable AIF */
692 /* enable the PLL before we use it to clock the DAI */
693 twl4030_apll_enable(w->codec, 1);
694
695 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
696 audio_if | TWL4030_AIF_EN);
697 break;
698 case SND_SOC_DAPM_POST_PMD:
699 /* disable the DAI before we stop it's source PLL */
700 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
701 audio_if & ~TWL4030_AIF_EN);
702 twl4030_apll_enable(w->codec, 0);
703 break;
704 }
705 return 0;
706}
707
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300708static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200709{
710 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900711 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300712 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300713 /* Base values for ramp delay calculation: 2^19 - 2^26 */
714 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
715 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300716 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200717
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200718 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
719 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300720 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
721 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200722
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500723 /* Enable external mute control, this dramatically reduces
724 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000725 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300726 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
727 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500728 } else {
729 hs_pop |= TWL4030_EXTMUTE;
730 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
731 }
732 }
733
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300734 if (ramp) {
735 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200736 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300737 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200738 /* Actually write to the register */
739 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
740 hs_gain,
741 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200742 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300743 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500744 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300745 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300746 } else {
747 /* Headset ramp-down _not_ according to
748 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200749 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300750 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
751 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300752 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200753 /* Bypass the reg_cache to mute the headset */
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100754 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200755 hs_gain & (~0x0f),
756 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300757
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200758 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300759 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
760 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500761
762 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000763 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300764 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
765 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500766 } else {
767 hs_pop &= ~TWL4030_EXTMUTE;
768 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
769 }
770 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300771}
772
773static int headsetlpga_event(struct snd_soc_dapm_widget *w,
774 struct snd_kcontrol *kcontrol, int event)
775{
Mark Brownb2c812e2010-04-14 15:35:19 +0900776 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300777
778 switch (event) {
779 case SND_SOC_DAPM_POST_PMU:
780 /* Do the ramp-up only once */
781 if (!twl4030->hsr_enabled)
782 headset_ramp(w->codec, 1);
783
784 twl4030->hsl_enabled = 1;
785 break;
786 case SND_SOC_DAPM_POST_PMD:
787 /* Do the ramp-down only if both headsetL/R is disabled */
788 if (!twl4030->hsr_enabled)
789 headset_ramp(w->codec, 0);
790
791 twl4030->hsl_enabled = 0;
792 break;
793 }
794 return 0;
795}
796
797static int headsetrpga_event(struct snd_soc_dapm_widget *w,
798 struct snd_kcontrol *kcontrol, int event)
799{
Mark Brownb2c812e2010-04-14 15:35:19 +0900800 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300801
802 switch (event) {
803 case SND_SOC_DAPM_POST_PMU:
804 /* Do the ramp-up only once */
805 if (!twl4030->hsl_enabled)
806 headset_ramp(w->codec, 1);
807
808 twl4030->hsr_enabled = 1;
809 break;
810 case SND_SOC_DAPM_POST_PMD:
811 /* Do the ramp-down only if both headsetL/R is disabled */
812 if (!twl4030->hsl_enabled)
813 headset_ramp(w->codec, 0);
814
815 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200816 break;
817 }
818 return 0;
819}
820
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300821static int digimic_event(struct snd_soc_dapm_widget *w,
822 struct snd_kcontrol *kcontrol, int event)
823{
824 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300825 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300826
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300827 if (pdata && pdata->digimic_delay)
828 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300829 return 0;
830}
831
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200832/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200833 * Some of the gain controls in TWL (mostly those which are associated with
834 * the outputs) are implemented in an interesting way:
835 * 0x0 : Power down (mute)
836 * 0x1 : 6dB
837 * 0x2 : 0 dB
838 * 0x3 : -6 dB
839 * Inverting not going to help with these.
840 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
841 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200842static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
843 struct snd_ctl_elem_value *ucontrol)
844{
845 struct soc_mixer_control *mc =
846 (struct soc_mixer_control *)kcontrol->private_value;
847 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
848 unsigned int reg = mc->reg;
849 unsigned int shift = mc->shift;
850 unsigned int rshift = mc->rshift;
851 int max = mc->max;
852 int mask = (1 << fls(max)) - 1;
853
854 ucontrol->value.integer.value[0] =
855 (snd_soc_read(codec, reg) >> shift) & mask;
856 if (ucontrol->value.integer.value[0])
857 ucontrol->value.integer.value[0] =
858 max + 1 - ucontrol->value.integer.value[0];
859
860 if (shift != rshift) {
861 ucontrol->value.integer.value[1] =
862 (snd_soc_read(codec, reg) >> rshift) & mask;
863 if (ucontrol->value.integer.value[1])
864 ucontrol->value.integer.value[1] =
865 max + 1 - ucontrol->value.integer.value[1];
866 }
867
868 return 0;
869}
870
871static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
872 struct snd_ctl_elem_value *ucontrol)
873{
874 struct soc_mixer_control *mc =
875 (struct soc_mixer_control *)kcontrol->private_value;
876 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
877 unsigned int reg = mc->reg;
878 unsigned int shift = mc->shift;
879 unsigned int rshift = mc->rshift;
880 int max = mc->max;
881 int mask = (1 << fls(max)) - 1;
882 unsigned short val, val2, val_mask;
883
884 val = (ucontrol->value.integer.value[0] & mask);
885
886 val_mask = mask << shift;
887 if (val)
888 val = max + 1 - val;
889 val = val << shift;
890 if (shift != rshift) {
891 val2 = (ucontrol->value.integer.value[1] & mask);
892 val_mask |= mask << rshift;
893 if (val2)
894 val2 = max + 1 - val2;
895 val |= val2 << rshift;
896 }
897 return snd_soc_update_bits(codec, reg, val_mask, val);
898}
899
900static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
901 struct snd_ctl_elem_value *ucontrol)
902{
903 struct soc_mixer_control *mc =
904 (struct soc_mixer_control *)kcontrol->private_value;
905 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
906 unsigned int reg = mc->reg;
907 unsigned int reg2 = mc->rreg;
908 unsigned int shift = mc->shift;
909 int max = mc->max;
910 int mask = (1<<fls(max))-1;
911
912 ucontrol->value.integer.value[0] =
913 (snd_soc_read(codec, reg) >> shift) & mask;
914 ucontrol->value.integer.value[1] =
915 (snd_soc_read(codec, reg2) >> shift) & mask;
916
917 if (ucontrol->value.integer.value[0])
918 ucontrol->value.integer.value[0] =
919 max + 1 - ucontrol->value.integer.value[0];
920 if (ucontrol->value.integer.value[1])
921 ucontrol->value.integer.value[1] =
922 max + 1 - ucontrol->value.integer.value[1];
923
924 return 0;
925}
926
927static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
928 struct snd_ctl_elem_value *ucontrol)
929{
930 struct soc_mixer_control *mc =
931 (struct soc_mixer_control *)kcontrol->private_value;
932 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
933 unsigned int reg = mc->reg;
934 unsigned int reg2 = mc->rreg;
935 unsigned int shift = mc->shift;
936 int max = mc->max;
937 int mask = (1 << fls(max)) - 1;
938 int err;
939 unsigned short val, val2, val_mask;
940
941 val_mask = mask << shift;
942 val = (ucontrol->value.integer.value[0] & mask);
943 val2 = (ucontrol->value.integer.value[1] & mask);
944
945 if (val)
946 val = max + 1 - val;
947 if (val2)
948 val2 = max + 1 - val2;
949
950 val = val << shift;
951 val2 = val2 << shift;
952
953 err = snd_soc_update_bits(codec, reg, val_mask, val);
954 if (err < 0)
955 return err;
956
957 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
958 return err;
959}
960
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500961/* Codec operation modes */
962static const char *twl4030_op_modes_texts[] = {
963 "Option 2 (voice/audio)", "Option 1 (audio)"
964};
965
966static const struct soc_enum twl4030_op_modes_enum =
967 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
968 ARRAY_SIZE(twl4030_op_modes_texts),
969 twl4030_op_modes_texts);
970
Mark Brown423c2382009-06-20 13:54:02 +0100971static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500972 struct snd_ctl_elem_value *ucontrol)
973{
974 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900975 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500976 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
977 unsigned short val;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200978 unsigned short mask;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500979
980 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200981 dev_err(codec->dev,
982 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500983 return -EBUSY;
984 }
985
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500986 if (ucontrol->value.enumerated.item[0] > e->max - 1)
987 return -EINVAL;
988
989 val = ucontrol->value.enumerated.item[0] << e->shift_l;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200990 mask = e->mask << e->shift_l;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500991 if (e->shift_l != e->shift_r) {
992 if (ucontrol->value.enumerated.item[1] > e->max - 1)
993 return -EINVAL;
994 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
Lars-Peter Clausen86767b72012-09-14 13:57:27 +0200995 mask |= e->mask << e->shift_r;
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500996 }
997
998 return snd_soc_update_bits(codec, e->reg, mask, val);
999}
1000
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +02001001/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001002 * FGAIN volume control:
1003 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1004 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001005static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001006
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001007/*
1008 * CGAIN volume control:
1009 * 0 dB to 12 dB in 6 dB steps
1010 * value 2 and 3 means 12 dB
1011 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001012static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1013
1014/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001015 * Voice Downlink GAIN volume control:
1016 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1017 */
1018static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1019
1020/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001021 * Analog playback gain
1022 * -24 dB to 12 dB in 2 dB steps
1023 */
1024static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001025
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001026/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001027 * Gain controls tied to outputs
1028 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1029 */
1030static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1031
1032/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001033 * Gain control for earpiece amplifier
1034 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1035 */
1036static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1037
1038/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001039 * Capture gain after the ADCs
1040 * from 0 dB to 31 dB in 1 dB steps
1041 */
1042static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1043
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001044/*
1045 * Gain control for input amplifiers
1046 * 0 dB to 30 dB in 6 dB steps
1047 */
1048static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1049
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001050/* AVADC clock priority */
1051static const char *twl4030_avadc_clk_priority_texts[] = {
1052 "Voice high priority", "HiFi high priority"
1053};
1054
1055static const struct soc_enum twl4030_avadc_clk_priority_enum =
1056 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1057 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1058 twl4030_avadc_clk_priority_texts);
1059
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001060static const char *twl4030_rampdelay_texts[] = {
1061 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1062 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1063 "3495/2581/1748 ms"
1064};
1065
1066static const struct soc_enum twl4030_rampdelay_enum =
1067 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1068 ARRAY_SIZE(twl4030_rampdelay_texts),
1069 twl4030_rampdelay_texts);
1070
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001071/* Vibra H-bridge direction mode */
1072static const char *twl4030_vibradirmode_texts[] = {
1073 "Vibra H-bridge direction", "Audio data MSB",
1074};
1075
1076static const struct soc_enum twl4030_vibradirmode_enum =
1077 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1078 ARRAY_SIZE(twl4030_vibradirmode_texts),
1079 twl4030_vibradirmode_texts);
1080
1081/* Vibra H-bridge direction */
1082static const char *twl4030_vibradir_texts[] = {
1083 "Positive polarity", "Negative polarity",
1084};
1085
1086static const struct soc_enum twl4030_vibradir_enum =
1087 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1088 ARRAY_SIZE(twl4030_vibradir_texts),
1089 twl4030_vibradir_texts);
1090
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001091/* Digimic Left and right swapping */
1092static const char *twl4030_digimicswap_texts[] = {
1093 "Not swapped", "Swapped",
1094};
1095
1096static const struct soc_enum twl4030_digimicswap_enum =
1097 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1098 ARRAY_SIZE(twl4030_digimicswap_texts),
1099 twl4030_digimicswap_texts);
1100
Steve Sakomancc175572008-10-30 21:35:26 -07001101static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001102 /* Codec operation mode control */
1103 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1104 snd_soc_get_enum_double,
1105 snd_soc_put_twl4030_opmode_enum_double),
1106
Peter Ujfalusid889a722008-12-01 10:03:46 +02001107 /* Common playback gain controls */
1108 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1109 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1110 0, 0x3f, 0, digital_fine_tlv),
1111 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1112 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1113 0, 0x3f, 0, digital_fine_tlv),
1114
1115 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1116 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1117 6, 0x2, 0, digital_coarse_tlv),
1118 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1119 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1120 6, 0x2, 0, digital_coarse_tlv),
1121
1122 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1123 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1124 3, 0x12, 1, analog_tlv),
1125 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1126 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1127 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001128 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1129 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1130 1, 1, 0),
1131 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1132 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1133 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001134
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001135 /* Common voice downlink gain controls */
1136 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1137 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1138
1139 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1140 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1141
1142 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1143 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1144
Peter Ujfalusi42902392008-12-01 10:03:47 +02001145 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001146 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001147 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001148 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1149 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001150
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001151 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1152 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1153 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001154
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001155 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001156 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001157 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1158 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001159
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001160 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1161 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1162 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001163
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001164 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001165 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001166 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1167 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001168 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1169 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1170 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001171
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001172 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001173 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001174
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001175 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1176
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001177 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001178
1179 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1180 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001181
1182 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001183};
1184
Steve Sakomancc175572008-10-30 21:35:26 -07001185static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001186 /* Left channel inputs */
1187 SND_SOC_DAPM_INPUT("MAINMIC"),
1188 SND_SOC_DAPM_INPUT("HSMIC"),
1189 SND_SOC_DAPM_INPUT("AUXL"),
1190 SND_SOC_DAPM_INPUT("CARKITMIC"),
1191 /* Right channel inputs */
1192 SND_SOC_DAPM_INPUT("SUBMIC"),
1193 SND_SOC_DAPM_INPUT("AUXR"),
1194 /* Digital microphones (Stereo) */
1195 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1196 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001197
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001198 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001199 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001200 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1201 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001202 SND_SOC_DAPM_OUTPUT("HSOL"),
1203 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001204 SND_SOC_DAPM_OUTPUT("CARKITL"),
1205 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001206 SND_SOC_DAPM_OUTPUT("HFL"),
1207 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001208 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001209
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001210 /* AIF and APLL clocks for running DAIs (including loopback) */
1211 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1212 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1213 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1214
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001215 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001216 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1217 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1218 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1219 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1220 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001221
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001222 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1223 TWL4030_REG_VOICE_IF, 6, 0),
1224
Peter Ujfalusi73939582009-01-29 14:57:50 +02001225 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001226 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1227 &twl4030_dapm_abypassr1_control),
1228 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1229 &twl4030_dapm_abypassl1_control),
1230 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1231 &twl4030_dapm_abypassr2_control),
1232 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1233 &twl4030_dapm_abypassl2_control),
1234 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1235 &twl4030_dapm_abypassv_control),
1236
1237 /* Master analog loopback switch */
1238 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1239 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001240
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001241 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001242 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1243 &twl4030_dapm_dbypassl_control),
1244 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1245 &twl4030_dapm_dbypassr_control),
1246 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1247 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001248
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001249 /* Digital mixers, power control for the physical DACs */
1250 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1251 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1252 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1253 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1254 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1255 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1256 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1257 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1258 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1259 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1260
1261 /* Analog mixers, power control for the physical PGAs */
1262 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1263 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1264 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1265 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1266 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1267 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1268 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1269 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1270 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1271 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001272
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001273 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1274 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1275
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001276 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1277 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001278
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001279 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001280 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001281 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1282 &twl4030_dapm_earpiece_controls[0],
1283 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001284 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1285 0, 0, NULL, 0, earpiecepga_event,
1286 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001287 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001288 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1289 &twl4030_dapm_predrivel_controls[0],
1290 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001291 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1292 0, 0, NULL, 0, predrivelpga_event,
1293 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001294 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1295 &twl4030_dapm_predriver_controls[0],
1296 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001297 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1298 0, 0, NULL, 0, predriverpga_event,
1299 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001300 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001301 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001302 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001303 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1304 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1305 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001306 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1307 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1308 &twl4030_dapm_hsor_controls[0],
1309 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001310 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1311 0, 0, NULL, 0, headsetrpga_event,
1312 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001313 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001314 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1315 &twl4030_dapm_carkitl_controls[0],
1316 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001317 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1318 0, 0, NULL, 0, carkitlpga_event,
1319 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001320 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1321 &twl4030_dapm_carkitr_controls[0],
1322 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001323 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1324 0, 0, NULL, 0, carkitrpga_event,
1325 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001326
1327 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001328 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001329 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1330 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001331 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001332 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001333 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1334 0, 0, NULL, 0, handsfreelpga_event,
1335 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1336 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1337 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001338 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001339 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001340 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1341 0, 0, NULL, 0, handsfreerpga_event,
1342 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001343 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001344 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1345 &twl4030_dapm_vibra_control, vibramux_event,
1346 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001347 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1348 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001349
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001350 /* Introducing four virtual ADC, since TWL4030 have four channel for
1351 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001352 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1353 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1354 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1355 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001356
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001357 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1358 TWL4030_REG_VOICE_IF, 5, 0),
1359
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001360 /* Analog/Digital mic path selection.
1361 TX1 Left/Right: either analog Left/Right or Digimic0
1362 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001363 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1364 &twl4030_dapm_micpathtx1_control),
1365 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1366 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001367
Joonyoung Shim97b80962009-05-11 20:36:08 +09001368 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001369 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001370 TWL4030_REG_ANAMICL, 4, 0,
1371 &twl4030_dapm_analoglmic_controls[0],
1372 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001373 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001374 TWL4030_REG_ANAMICR, 4, 0,
1375 &twl4030_dapm_analogrmic_controls[0],
1376 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001377
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001378 SND_SOC_DAPM_PGA("ADC Physical Left",
1379 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1380 SND_SOC_DAPM_PGA("ADC Physical Right",
1381 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001382
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001383 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1384 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1385 digimic_event, SND_SOC_DAPM_POST_PMU),
1386 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1387 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1388 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001389
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001390 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1391 NULL, 0),
1392 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1393 NULL, 0),
1394
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001395 /* Microphone bias */
1396 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1397 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1398 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1399 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1400 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1401 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001402
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001403 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001404};
1405
1406static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001407 /* Stream -> DAC mapping */
1408 {"DAC Right1", NULL, "HiFi Playback"},
1409 {"DAC Left1", NULL, "HiFi Playback"},
1410 {"DAC Right2", NULL, "HiFi Playback"},
1411 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001412 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001413
1414 /* ADC -> Stream mapping */
1415 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1416 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1417 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1418 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001419 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1420 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1421 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001422
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001423 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1424 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1425 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1426 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1427 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001428
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001429 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001430 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1431
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001432 {"DAC Left1", NULL, "AIF Enable"},
1433 {"DAC Right1", NULL, "AIF Enable"},
1434 {"DAC Left2", NULL, "AIF Enable"},
1435 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001436 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001437
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001438 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1439 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1440
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001441 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1442 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1443 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1444 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1445 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001446
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001447 /* Internal playback routings */
1448 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001449 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1450 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1451 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1452 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001453 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001454 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001455 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1456 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1457 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1458 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001459 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001460 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001461 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1462 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1463 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1464 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001465 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001466 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001467 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1468 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1469 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001470 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001471 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001472 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1473 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1474 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001475 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001476 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001477 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1478 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1479 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001480 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001481 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001482 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1483 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1484 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001485 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001486 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001487 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1488 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1489 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1490 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001491 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1492 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001493 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001494 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1495 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1496 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1497 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001498 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1499 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001500 /* Vibra */
1501 {"Vibra Mux", "AudioL1", "DAC Left1"},
1502 {"Vibra Mux", "AudioR1", "DAC Right1"},
1503 {"Vibra Mux", "AudioL2", "DAC Left2"},
1504 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001505
Steve Sakomancc175572008-10-30 21:35:26 -07001506 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001507 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001508 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1509 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1510 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1511 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001512 /* Must be always connected (for APLL) */
1513 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1514 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001515 {"EARPIECE", NULL, "Earpiece PGA"},
1516 {"PREDRIVEL", NULL, "PredriveL PGA"},
1517 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001518 {"HSOL", NULL, "HeadsetL PGA"},
1519 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001520 {"CARKITL", NULL, "CarkitL PGA"},
1521 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001522 {"HFL", NULL, "HandsfreeL PGA"},
1523 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001524 {"Vibra Route", "Audio", "Vibra Mux"},
1525 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001526
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001527 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001528 /* Must be always connected (for AIF and APLL) */
1529 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1530 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1531 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1532 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1533 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001534 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1535 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1536 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1537 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001538
Peter Ujfalusi90289352009-08-14 08:44:00 +03001539 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1540 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001541
Peter Ujfalusi90289352009-08-14 08:44:00 +03001542 {"ADC Physical Left", NULL, "Analog Left"},
1543 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001544
1545 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1546 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1547
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001548 {"DIGIMIC0", NULL, "micbias1 select"},
1549 {"DIGIMIC1", NULL, "micbias2 select"},
1550
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001551 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001552 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001553 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1554 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001555 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001556 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1557 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001558 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001559 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1560 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001561 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001562 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1563
1564 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1565 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1566 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1567 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1568
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001569 {"ADC Virtual Left1", NULL, "AIF Enable"},
1570 {"ADC Virtual Right1", NULL, "AIF Enable"},
1571 {"ADC Virtual Left2", NULL, "AIF Enable"},
1572 {"ADC Virtual Right2", NULL, "AIF Enable"},
1573
Peter Ujfalusi73939582009-01-29 14:57:50 +02001574 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001575 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1576 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1577 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1578 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1579 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001580
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001581 /* Supply for the Analog loopbacks */
1582 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1583 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1584 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1585 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1586 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1587
Peter Ujfalusi73939582009-01-29 14:57:50 +02001588 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1589 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1590 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1591 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001592 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001593
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001594 /* Digital bypass routes */
1595 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1596 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001597 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001598
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001599 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1600 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1601 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001602
Steve Sakomancc175572008-10-30 21:35:26 -07001603};
1604
Steve Sakomancc175572008-10-30 21:35:26 -07001605static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1606 enum snd_soc_bias_level level)
1607{
1608 switch (level) {
1609 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001610 break;
1611 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001612 break;
1613 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001614 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001615 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001616 break;
1617 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001618 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001619 break;
1620 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001621 codec->dapm.bias_level = level;
Steve Sakomancc175572008-10-30 21:35:26 -07001622
1623 return 0;
1624}
1625
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001626static void twl4030_constraints(struct twl4030_priv *twl4030,
1627 struct snd_pcm_substream *mst_substream)
1628{
1629 struct snd_pcm_substream *slv_substream;
1630
1631 /* Pick the stream, which need to be constrained */
1632 if (mst_substream == twl4030->master_substream)
1633 slv_substream = twl4030->slave_substream;
1634 else if (mst_substream == twl4030->slave_substream)
1635 slv_substream = twl4030->master_substream;
1636 else /* This should not happen.. */
1637 return;
1638
1639 /* Set the constraints according to the already configured stream */
1640 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1641 SNDRV_PCM_HW_PARAM_RATE,
1642 twl4030->rate,
1643 twl4030->rate);
1644
1645 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1646 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1647 twl4030->sample_bits,
1648 twl4030->sample_bits);
1649
1650 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1651 SNDRV_PCM_HW_PARAM_CHANNELS,
1652 twl4030->channels,
1653 twl4030->channels);
1654}
1655
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001656/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1657 * capture has to be enabled/disabled. */
1658static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1659 int enable)
1660{
1661 u8 reg, mask;
1662
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001663 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001664
1665 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1666 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1667 else
1668 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1669
1670 if (enable)
1671 reg |= mask;
1672 else
1673 reg &= ~mask;
1674
1675 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1676}
1677
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001678static int twl4030_startup(struct snd_pcm_substream *substream,
1679 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001680{
Mark Browne6968a12012-04-04 15:58:16 +01001681 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001682 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001683
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001684 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001685 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001686 /* The DAI has one configuration for playback and capture, so
1687 * if the DAI has been already configured then constrain this
1688 * substream to match it. */
1689 if (twl4030->configured)
1690 twl4030_constraints(twl4030, twl4030->master_substream);
1691 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001692 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001693 TWL4030_OPTION_1)) {
1694 /* In option2 4 channel is not supported, set the
1695 * constraint for the first stream for channels, the
1696 * second stream will 'inherit' this cosntraint */
1697 snd_pcm_hw_constraint_minmax(substream->runtime,
1698 SNDRV_PCM_HW_PARAM_CHANNELS,
1699 2, 2);
1700 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001701 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001702 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001703
1704 return 0;
1705}
1706
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001707static void twl4030_shutdown(struct snd_pcm_substream *substream,
1708 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001709{
Mark Browne6968a12012-04-04 15:58:16 +01001710 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001711 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001712
1713 if (twl4030->master_substream == substream)
1714 twl4030->master_substream = twl4030->slave_substream;
1715
1716 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001717
1718 /* If all streams are closed, or the remaining stream has not yet
1719 * been configured than set the DAI as not configured. */
1720 if (!twl4030->master_substream)
1721 twl4030->configured = 0;
1722 else if (!twl4030->master_substream->runtime->channels)
1723 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001724
1725 /* If the closing substream had 4 channel, do the necessary cleanup */
1726 if (substream->runtime->channels == 4)
1727 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001728}
1729
Steve Sakomancc175572008-10-30 21:35:26 -07001730static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001731 struct snd_pcm_hw_params *params,
1732 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001733{
Mark Browne6968a12012-04-04 15:58:16 +01001734 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001735 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001736 u8 mode, old_mode, format, old_format;
1737
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001738 /* If the substream has 4 channel, do the necessary setup */
1739 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001740 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1741 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001742
1743 /* Safety check: are we in the correct operating mode and
1744 * the interface is in TDM mode? */
1745 if ((mode & TWL4030_OPTION_1) &&
1746 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001747 twl4030_tdm_enable(codec, substream->stream, 1);
1748 else
1749 return -EINVAL;
1750 }
1751
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001752 if (twl4030->configured)
1753 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001754 return 0;
1755
Steve Sakomancc175572008-10-30 21:35:26 -07001756 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001757 old_mode = twl4030_read(codec,
1758 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001759 mode = old_mode & ~TWL4030_APLL_RATE;
1760
1761 switch (params_rate(params)) {
1762 case 8000:
1763 mode |= TWL4030_APLL_RATE_8000;
1764 break;
1765 case 11025:
1766 mode |= TWL4030_APLL_RATE_11025;
1767 break;
1768 case 12000:
1769 mode |= TWL4030_APLL_RATE_12000;
1770 break;
1771 case 16000:
1772 mode |= TWL4030_APLL_RATE_16000;
1773 break;
1774 case 22050:
1775 mode |= TWL4030_APLL_RATE_22050;
1776 break;
1777 case 24000:
1778 mode |= TWL4030_APLL_RATE_24000;
1779 break;
1780 case 32000:
1781 mode |= TWL4030_APLL_RATE_32000;
1782 break;
1783 case 44100:
1784 mode |= TWL4030_APLL_RATE_44100;
1785 break;
1786 case 48000:
1787 mode |= TWL4030_APLL_RATE_48000;
1788 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001789 case 96000:
1790 mode |= TWL4030_APLL_RATE_96000;
1791 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001792 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001793 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001794 params_rate(params));
1795 return -EINVAL;
1796 }
1797
Steve Sakomancc175572008-10-30 21:35:26 -07001798 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001799 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001800 format = old_format;
1801 format &= ~TWL4030_DATA_WIDTH;
1802 switch (params_format(params)) {
1803 case SNDRV_PCM_FORMAT_S16_LE:
1804 format |= TWL4030_DATA_WIDTH_16S_16W;
1805 break;
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02001806 case SNDRV_PCM_FORMAT_S32_LE:
Steve Sakomancc175572008-10-30 21:35:26 -07001807 format |= TWL4030_DATA_WIDTH_32S_24W;
1808 break;
1809 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001810 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001811 params_format(params));
1812 return -EINVAL;
1813 }
1814
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001815 if (format != old_format || mode != old_mode) {
1816 if (twl4030->codec_powered) {
1817 /*
1818 * If the codec is powered, than we need to toggle the
1819 * codec power.
1820 */
1821 twl4030_codec_enable(codec, 0);
1822 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1823 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1824 twl4030_codec_enable(codec, 1);
1825 } else {
1826 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1827 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1828 }
Steve Sakomancc175572008-10-30 21:35:26 -07001829 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001830
1831 /* Store the important parameters for the DAI configuration and set
1832 * the DAI as configured */
1833 twl4030->configured = 1;
1834 twl4030->rate = params_rate(params);
1835 twl4030->sample_bits = hw_param_interval(params,
1836 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1837 twl4030->channels = params_channels(params);
1838
1839 /* If both playback and capture streams are open, and one of them
1840 * is setting the hw parameters right now (since we are here), set
1841 * constraints to the other stream to match the current one. */
1842 if (twl4030->slave_substream)
1843 twl4030_constraints(twl4030, substream);
1844
Steve Sakomancc175572008-10-30 21:35:26 -07001845 return 0;
1846}
1847
1848static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1849 int clk_id, unsigned int freq, int dir)
1850{
1851 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001852 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001853
1854 switch (freq) {
1855 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001856 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001857 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001858 break;
1859 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001860 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001861 return -EINVAL;
1862 }
1863
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001864 if ((freq / 1000) != twl4030->sysclk) {
1865 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001866 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001867 freq, twl4030->sysclk * 1000);
1868 return -EINVAL;
1869 }
Steve Sakomancc175572008-10-30 21:35:26 -07001870
1871 return 0;
1872}
1873
1874static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1875 unsigned int fmt)
1876{
1877 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001878 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001879 u8 old_format, format;
1880
1881 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001882 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001883 format = old_format;
1884
1885 /* set master/slave audio interface */
1886 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1887 case SND_SOC_DAIFMT_CBM_CFM:
1888 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001889 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001890 break;
1891 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001892 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001893 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001894 break;
1895 default:
1896 return -EINVAL;
1897 }
1898
1899 /* interface format */
1900 format &= ~TWL4030_AIF_FORMAT;
1901 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1902 case SND_SOC_DAIFMT_I2S:
1903 format |= TWL4030_AIF_FORMAT_CODEC;
1904 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001905 case SND_SOC_DAIFMT_DSP_A:
1906 format |= TWL4030_AIF_FORMAT_TDM;
1907 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001908 default:
1909 return -EINVAL;
1910 }
1911
1912 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001913 if (twl4030->codec_powered) {
1914 /*
1915 * If the codec is powered, than we need to toggle the
1916 * codec power.
1917 */
1918 twl4030_codec_enable(codec, 0);
1919 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1920 twl4030_codec_enable(codec, 1);
1921 } else {
1922 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1923 }
Steve Sakomancc175572008-10-30 21:35:26 -07001924 }
1925
1926 return 0;
1927}
1928
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001929static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1930{
1931 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001932 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001933
1934 if (tristate)
1935 reg |= TWL4030_AIF_TRI_EN;
1936 else
1937 reg &= ~TWL4030_AIF_TRI_EN;
1938
1939 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1940}
1941
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001942/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1943 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1944static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1945 int enable)
1946{
1947 u8 reg, mask;
1948
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001949 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001950
1951 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1952 mask = TWL4030_ARXL1_VRX_EN;
1953 else
1954 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1955
1956 if (enable)
1957 reg |= mask;
1958 else
1959 reg &= ~mask;
1960
1961 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1962}
1963
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001964static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1965 struct snd_soc_dai *dai)
1966{
Mark Browne6968a12012-04-04 15:58:16 +01001967 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001968 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001969 u8 mode;
1970
1971 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001972 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001973 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001974 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001975 dev_err(codec->dev,
1976 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1977 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001978 return -EINVAL;
1979 }
1980
1981 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001982 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001983 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001984 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001985 & TWL4030_OPT_MODE;
1986
1987 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001988 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1989 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001990 return -EINVAL;
1991 }
1992
1993 return 0;
1994}
1995
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001996static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1997 struct snd_soc_dai *dai)
1998{
Mark Browne6968a12012-04-04 15:58:16 +01001999 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002000
2001 /* Enable voice digital filters */
2002 twl4030_voice_enable(codec, substream->stream, 0);
2003}
2004
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002005static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2006 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2007{
Mark Browne6968a12012-04-04 15:58:16 +01002008 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002009 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002010 u8 old_mode, mode;
2011
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002012 /* Enable voice digital filters */
2013 twl4030_voice_enable(codec, substream->stream, 1);
2014
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002015 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002016 old_mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002017 & ~(TWL4030_CODECPDZ);
2018 mode = old_mode;
2019
2020 switch (params_rate(params)) {
2021 case 8000:
2022 mode &= ~(TWL4030_SEL_16K);
2023 break;
2024 case 16000:
2025 mode |= TWL4030_SEL_16K;
2026 break;
2027 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002028 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002029 params_rate(params));
2030 return -EINVAL;
2031 }
2032
2033 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002034 if (twl4030->codec_powered) {
2035 /*
2036 * If the codec is powered, than we need to toggle the
2037 * codec power.
2038 */
2039 twl4030_codec_enable(codec, 0);
2040 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2041 twl4030_codec_enable(codec, 1);
2042 } else {
2043 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2044 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002045 }
2046
2047 return 0;
2048}
2049
2050static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2051 int clk_id, unsigned int freq, int dir)
2052{
2053 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002054 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002055
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002056 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002057 dev_err(codec->dev,
2058 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2059 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002060 return -EINVAL;
2061 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002062 if ((freq / 1000) != twl4030->sysclk) {
2063 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002064 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002065 freq, twl4030->sysclk * 1000);
2066 return -EINVAL;
2067 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002068 return 0;
2069}
2070
2071static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2072 unsigned int fmt)
2073{
2074 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002075 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002076 u8 old_format, format;
2077
2078 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002079 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002080 format = old_format;
2081
2082 /* set master/slave audio interface */
2083 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002084 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002085 format &= ~(TWL4030_VIF_SLAVE_EN);
2086 break;
2087 case SND_SOC_DAIFMT_CBS_CFS:
2088 format |= TWL4030_VIF_SLAVE_EN;
2089 break;
2090 default:
2091 return -EINVAL;
2092 }
2093
2094 /* clock inversion */
2095 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2096 case SND_SOC_DAIFMT_IB_NF:
2097 format &= ~(TWL4030_VIF_FORMAT);
2098 break;
2099 case SND_SOC_DAIFMT_NB_IF:
2100 format |= TWL4030_VIF_FORMAT;
2101 break;
2102 default:
2103 return -EINVAL;
2104 }
2105
2106 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002107 if (twl4030->codec_powered) {
2108 /*
2109 * If the codec is powered, than we need to toggle the
2110 * codec power.
2111 */
2112 twl4030_codec_enable(codec, 0);
2113 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2114 twl4030_codec_enable(codec, 1);
2115 } else {
2116 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2117 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002118 }
2119
2120 return 0;
2121}
2122
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002123static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2124{
2125 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002126 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002127
2128 if (tristate)
2129 reg |= TWL4030_VIF_TRI_EN;
2130 else
2131 reg &= ~TWL4030_VIF_TRI_EN;
2132
2133 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2134}
2135
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002136#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002137#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002138
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002139static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002140 .startup = twl4030_startup,
2141 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002142 .hw_params = twl4030_hw_params,
2143 .set_sysclk = twl4030_set_dai_sysclk,
2144 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002145 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002146};
2147
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002148static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002149 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002150 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002151 .hw_params = twl4030_voice_hw_params,
2152 .set_sysclk = twl4030_voice_set_dai_sysclk,
2153 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002154 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002155};
2156
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002157static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002158{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002159 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002160 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002161 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002162 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002163 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002164 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002165 .formats = TWL4030_FORMATS,
2166 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002167 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002168 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002169 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002170 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002171 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002172 .formats = TWL4030_FORMATS,
2173 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002174 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002175},
2176{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002177 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002178 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002179 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002180 .channels_min = 1,
2181 .channels_max = 1,
2182 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2183 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2184 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002185 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002186 .channels_min = 1,
2187 .channels_max = 2,
2188 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2189 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2190 .ops = &twl4030_dai_voice_ops,
2191},
Steve Sakomancc175572008-10-30 21:35:26 -07002192};
Steve Sakomancc175572008-10-30 21:35:26 -07002193
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002194static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002195{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002196 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002197
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002198 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2199 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002200 if (twl4030 == NULL) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002201 dev_err(codec->dev, "Can not allocate memory\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002202 return -ENOMEM;
Steve Sakomancc175572008-10-30 21:35:26 -07002203 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002204 snd_soc_codec_set_drvdata(codec, twl4030);
2205 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002206 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002207
2208 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002209
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002210 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002211}
2212
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002213static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002214{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002215 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002216 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002217
Peter Ujfalusi73939582009-01-29 14:57:50 +02002218 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002219
2220 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2221 gpio_free(pdata->hs_extmute_gpio);
2222
Steve Sakomancc175572008-10-30 21:35:26 -07002223 return 0;
2224}
2225
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002226static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2227 .probe = twl4030_soc_probe,
2228 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002229 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002230 .write = twl4030_write,
2231 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002232 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002233
2234 .controls = twl4030_snd_controls,
2235 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2236 .dapm_widgets = twl4030_dapm_widgets,
2237 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2238 .dapm_routes = intercon,
2239 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002240};
2241
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002242static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002243{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002244 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2245 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002246}
2247
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002248static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002249{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002250 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002251 return 0;
2252}
2253
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002254MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002255
2256static struct platform_driver twl4030_codec_driver = {
2257 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002258 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002259 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002260 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002261 .owner = THIS_MODULE,
2262 },
Steve Sakomancc175572008-10-30 21:35:26 -07002263};
Steve Sakomancc175572008-10-30 21:35:26 -07002264
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002265module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002266
Steve Sakomancc175572008-10-30 21:35:26 -07002267MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2268MODULE_AUTHOR("Steve Sakoman");
2269MODULE_LICENSE("GPL");