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gerrit-public.fairphone.software / platform / external / XNNPACK / 93d1ba1db190e266e666910227b67df4f24be73d / . / BUILD.bazel
blob: 1bc90d224e93754d2ff4f52d8d6435d310fb0664 [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan7c1f8082020-06-25 13:26:20 -0700[diff] [blame]425 "src/f32-prelu/gen/wasm-2x1.c",
426 "src/f32-prelu/gen/wasm-2x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]427 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
428 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
429 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
431 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
432 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
434 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
435 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
437 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
438 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]439 "src/f32-vbinary/gen/vmax-wasm-x1.c",
440 "src/f32-vbinary/gen/vmax-wasm-x2.c",
441 "src/f32-vbinary/gen/vmax-wasm-x4.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
443 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
444 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
445 "src/f32-vbinary/gen/vmin-wasm-x1.c",
446 "src/f32-vbinary/gen/vmin-wasm-x2.c",
447 "src/f32-vbinary/gen/vmin-wasm-x4.c",
448 "src/f32-vbinary/gen/vminc-wasm-x1.c",
449 "src/f32-vbinary/gen/vminc-wasm-x2.c",
450 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]451 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
452 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
453 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
455 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
456 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
458 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
459 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
461 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
462 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
464 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
465 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
467 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
468 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]469 "src/f32-vlrelu/gen/wasm-x1.c",
470 "src/f32-vlrelu/gen/wasm-x2.c",
471 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]472 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
473 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
474 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]475]
476
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]477WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]478 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
479 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
480 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
482 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
483 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]484 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
495 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
496 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
506 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
507 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]508 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
510 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
512 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
513 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
514 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]515 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
516 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
517 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
518 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
519 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
520 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
521 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
522 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
523 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
524 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
525 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
526 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
527 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
528 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
529 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
530 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
531 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
532 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
533 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
534 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
535 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
536 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
537 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
538 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
539 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
540 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
541 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
542 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
543 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
544 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
545 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
546 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
547 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
548 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
549 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
550 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
551 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
552 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
553 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
554 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
555 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
556 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
557 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
558 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
559 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
560 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
561 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
562 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
563 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
564 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
565 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
566 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
567 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
568 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
569 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
570 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
571 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
572 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
573 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
574 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]575 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
577 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
579 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
580 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
581 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]582 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
583 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
584 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
585 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
586 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
587 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
588 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
589 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
590 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
591 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
592 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
593 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
594 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
595 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
596 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
597 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
598 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
599 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
600 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
601 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
602 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
603 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
604 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
605 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
606 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
607 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
608 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
609 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
610 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
611 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]612 "src/f32-hswish/gen/wasmsimd-arm-x4.c",
613 "src/f32-hswish/gen/wasmsimd-arm-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]614 "src/f32-hswish/gen/wasmsimd-arm-x16.c",
Marat Dukhan9baec802020-06-25 21:34:35 -0700[diff] [blame]615 "src/f32-hswish/gen/wasmsimd-x86-x4.c",
616 "src/f32-hswish/gen/wasmsimd-x86-x8.c",
Marat Dukhanc303fe62020-06-26 10:09:25 -0700[diff] [blame]617 "src/f32-hswish/gen/wasmsimd-x86-x16.c",
Marat Dukhan195f8eb2020-06-25 12:50:57 -0700[diff] [blame]618 "src/f32-prelu/gen/wasmsimd-bitselect-2x4.c",
619 "src/f32-prelu/gen/wasmsimd-bitselect-2x8.c",
620 "src/f32-prelu/gen/wasmsimd-minmax-2x4.c",
621 "src/f32-prelu/gen/wasmsimd-minmax-2x8.c",
Marat Dukhan93d1ba12020-06-26 12:33:35 -0700[diff] [blame^]622 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x4.c",
623 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-arm-x8.c",
624 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x4.c",
625 "src/f32-vbinary/gen/vadd-minmax-wasmsimd-x86-x8.c",
626 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x4.c",
627 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-arm-x8.c",
628 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x4.c",
629 "src/f32-vbinary/gen/vdiv-minmax-wasmsimd-x86-x8.c",
630 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x4.c",
631 "src/f32-vbinary/gen/vmax-wasmsimd-arm-x8.c",
632 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x4.c",
633 "src/f32-vbinary/gen/vmax-wasmsimd-x86-x8.c",
634 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x4.c",
635 "src/f32-vbinary/gen/vmin-wasmsimd-arm-x8.c",
636 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x4.c",
637 "src/f32-vbinary/gen/vmin-wasmsimd-x86-x8.c",
638 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x4.c",
639 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-arm-x8.c",
640 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x4.c",
641 "src/f32-vbinary/gen/vmul-minmax-wasmsimd-x86-x8.c",
642 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x4.c",
643 "src/f32-vbinary/gen/vsqrdiff-wasmsimd-x8.c",
644 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x4.c",
645 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-arm-x8.c",
646 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x4.c",
647 "src/f32-vbinary/gen/vsub-minmax-wasmsimd-x86-x8.c",
Marat Dukhand3f3d872020-06-24 13:08:25 -0700[diff] [blame]648 "src/math/roundne-wasmsimd-addsub.c",
649 "src/math/roundd-wasmsimd-addsub.c",
650 "src/math/roundu-wasmsimd-addsub.c",
651 "src/math/roundz-wasmsimd-addsub.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]652 "src/requantization/fp32-wasmsimd.c",
653]
654
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]655PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]656 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]657 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]658 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]659 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
660 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]661 "src/f32-clamp/gen/psimd-x4.c",
662 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]663 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]664 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]665 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]666 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]667 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]668 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
669 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
670 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
671 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
672 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
673 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
674 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
675 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
676 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
677 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
678 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
679 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]680 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]681 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
682 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]683 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
684 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
685 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
686 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
687 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
688 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
689 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
690 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
691 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
692 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
693 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
694 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
695 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
696 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
697 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
698 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
699 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
700 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
701 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]702 "src/f32-hswish/gen/psimd-x4.c",
703 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]704 "src/f32-ibilinear/gen/psimd-c4.c",
705 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]706 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
707 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
708 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
709 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
710 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
711 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
712 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
713 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
714 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
715 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]716 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]717 "src/f32-spmm/gen/4x1-minmax-psimd.c",
718 "src/f32-spmm/gen/8x1-minmax-psimd.c",
719 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]720 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
721 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]722 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]723 "src/f32-prelu/gen/psimd-2x4.c",
724 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]725 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]726 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
727 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
728 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
729 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
730 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
731 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
732 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
733 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]734 "src/f32-vbinary/gen/vmax-psimd-x4.c",
735 "src/f32-vbinary/gen/vmax-psimd-x8.c",
736 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
737 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
738 "src/f32-vbinary/gen/vmin-psimd-x4.c",
739 "src/f32-vbinary/gen/vmin-psimd-x8.c",
740 "src/f32-vbinary/gen/vminc-psimd-x4.c",
741 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]742 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
743 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
744 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
745 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
746 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
747 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]748 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
749 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]750 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
751 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]752 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
753 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
754 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
755 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]756 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
757 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
758 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
759 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]760 "src/f32-vlrelu/gen/psimd-x4.c",
761 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]762 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
763 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]764 "src/f32-vunary/gen/vabs-psimd-x4.c",
765 "src/f32-vunary/gen/vabs-psimd-x8.c",
766 "src/f32-vunary/gen/vneg-psimd-x4.c",
767 "src/f32-vunary/gen/vneg-psimd-x8.c",
768 "src/f32-vunary/gen/vsqr-psimd-x4.c",
769 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]770 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]771 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]772 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]773 "src/x32-unpool/psimd.c",
774 "src/x32-zip/x2-psimd.c",
775 "src/x32-zip/x3-psimd.c",
776 "src/x32-zip/x4-psimd.c",
777 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]778 "src/requantization/precise-psimd.c",
779 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]780]
781
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]782PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]783 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
784 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
785 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
786 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
787 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
788 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
789 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
790 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
791 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
792 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
793 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
794 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]795 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
796 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
797 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
798 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
799 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
800 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]801 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
802 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
803 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
804 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
805 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
806 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
807 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
808 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]809 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]810 "src/math/roundd-psimd-addsub.c",
811 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]812 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]813 "src/math/sigmoid-psimd-p5-div.c",
814]
815
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]816# ISA-specific micro-kernels
817NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]818 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
819 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]820 "src/f32-clamp/gen/neon-x4.c",
821 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]822 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
823 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]824 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
825 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]826 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
827 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]828 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
829 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]830 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
831 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
832 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
833 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]834 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
835 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
836 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
837 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]838 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
839 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
840 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
841 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]842 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]843 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
844 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]845 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
846 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
847 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
848 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
849 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
850 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
851 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
852 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
853 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
854 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
855 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
856 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
857 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
858 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
859 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
860 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
861 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
862 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
863 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
864 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
865 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
866 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
867 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
868 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
869 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
870 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
871 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
872 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
873 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
874 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
875 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]876 "src/f32-hswish/gen/neon-x4.c",
877 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]878 "src/f32-ibilinear/gen/neon-c4.c",
879 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]880 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
881 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
882 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
883 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
884 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
885 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
886 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
887 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
888 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
889 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
890 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
891 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
892 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
893 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
894 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
895 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]896 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
897 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
898 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]899 "src/f32-ppmm/gen/4x8-minmax-neon.c",
900 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]901 "src/f32-prelu/gen/neon-2x4.c",
902 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]903 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
904 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
905 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
906 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
907 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
908 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
909 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
910 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
911 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
912 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
913 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
914 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
915 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
916 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
917 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
918 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
919 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
920 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
921 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
922 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
923 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
924 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
925 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
926 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]927 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]928 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]929 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
930 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
931 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
932 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
933 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
934 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
935 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
936 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
937 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
938 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
939 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
940 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
941 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
942 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
943 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
944 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
945 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
946 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]947 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
948 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
949 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
950 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]951 "src/f32-vbinary/gen/vmax-neon-x4.c",
952 "src/f32-vbinary/gen/vmax-neon-x8.c",
953 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
954 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
955 "src/f32-vbinary/gen/vmin-neon-x4.c",
956 "src/f32-vbinary/gen/vmin-neon-x8.c",
957 "src/f32-vbinary/gen/vminc-neon-x4.c",
958 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]959 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
960 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
961 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
962 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]963 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
964 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]965 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
966 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]967 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
968 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
969 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
970 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]971 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
972 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
973 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
974 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]975 "src/f32-vlrelu/gen/neon-x4.c",
976 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]977 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
978 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]979 "src/f32-vrnd/gen/vrndne-neon-x4.c",
980 "src/f32-vrnd/gen/vrndne-neon-x8.c",
981 "src/f32-vrnd/gen/vrndz-neon-x4.c",
982 "src/f32-vrnd/gen/vrndz-neon-x8.c",
983 "src/f32-vrnd/gen/vrndu-neon-x4.c",
984 "src/f32-vrnd/gen/vrndu-neon-x8.c",
985 "src/f32-vrnd/gen/vrndd-neon-x4.c",
986 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]987 "src/f32-vunary/gen/vabs-neon-x4.c",
988 "src/f32-vunary/gen/vabs-neon-x8.c",
989 "src/f32-vunary/gen/vneg-neon-x4.c",
990 "src/f32-vunary/gen/vneg-neon-x8.c",
991 "src/f32-vunary/gen/vsqr-neon-x4.c",
992 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]993 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
994 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]995 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]996 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
997 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]998 "src/q8-gemm/4x8-minmax-neon.c",
999 "src/q8-gemm/8x8-minmax-neon.c",
1000 "src/q8-igemm/4x8-minmax-neon.c",
1001 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1002 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1003 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1004 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1005 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1006 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1007 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1008 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1009 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1010 "src/x32-zip/x2-neon.c",
1011 "src/x32-zip/x3-neon.c",
1012 "src/x32-zip/x4-neon.c",
1013 "src/x32-zip/xm-neon.c",
1014 "src/x8-zip/x2-neon.c",
1015 "src/x8-zip/x3-neon.c",
1016 "src/x8-zip/x4-neon.c",
1017 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1018 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1019 "src/math/roundd-neon-addsub.c",
1020 "src/math/roundd-neon-cvt.c",
1021 "src/math/roundu-neon-addsub.c",
1022 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1023 "src/math/roundz-neon-addsub.c",
1024 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]1025 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1026 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
1027 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
1028 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
1029 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
1030 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
1031 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1032 "src/requantization/precise-neon.c",
1033 "src/requantization/fp32-neon.c",
1034 "src/requantization/q31-neon.c",
1035 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1036]
1037
1038NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1039 "src/f32-ibilinear/gen/neonfma-c4.c",
1040 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1041 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1042 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1043 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1044 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1045 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1046 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1047 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1048 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1049 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1050 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1051 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1052 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1053 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1054 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1055 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1056 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1057 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1058 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1059 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1060 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1061 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1062 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1063 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1064 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1065 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1066 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1067 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1068 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1069 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1070 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1071 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1072 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1073 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1074 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1075 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1076 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1077 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1078 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1079 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1080 "src/f32-hswish/gen/neonfma-x4.c",
1081 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1082 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1083 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1084 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1085 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1086 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1087 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1088 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1089 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1090 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1091 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1092 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1093 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1094 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1095 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1096 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1097 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1098 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1099 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1100 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1101 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1102 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1103 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1104 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1105 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1106 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1107 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1108 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1109 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1110 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1111 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1112 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1113 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1114 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1115 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1116 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1117 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1118 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1119 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1120 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1121 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1122 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1123 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1124 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1125 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1126 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1127 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1128 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1129 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1130 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1131 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1132 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1133 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1134 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1135 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1136 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1137 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1138 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1139 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1140 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1141 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1142 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1143 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1144 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1145 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1146 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1147 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1148 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1149 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1150 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1151 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1152 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1153 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1154 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1155 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1156 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1157 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1158 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1159 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1160 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1161 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1162 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1163 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1164 "src/math/exp-neonfma-lut64-p2.c",
1165 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1166 "src/math/expminus-neonfma-lut2048-p1.c",
1167 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1168 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1169 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1170 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1171 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1172 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1173 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1174 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1175 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1176 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1177 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1178 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1179 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1180 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1181 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1182 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1183 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1184 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1185 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1186 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1187]
1188
1189AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1190 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1191 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1192 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1193 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1194 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1195 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1196 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1197 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1198 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1199 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1200 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1201 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1202 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1203 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1204 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1205 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1206 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1207 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1208 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1209 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1210 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1211 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1212 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1213 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1214 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1215 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1216 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1217 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1218 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1219 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1220 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1221 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1222 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1223 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1224 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1225 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1226 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1227 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1228 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1229 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1230 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1231 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1232 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1233 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1234 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1235 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1236 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1237 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1238 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1239 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1240 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1241 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1242 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1243 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1244 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1245 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1246 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1247 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1248 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1249 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1250 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1251 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1252 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1253 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1254 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1255 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1256 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1257 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1258 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1259 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1260 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1261 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1262 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1263 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1264 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1265 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1266 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1267 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1268 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1269 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1270 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1271]
1272
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1273NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1274 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1275 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1276 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1277 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1278 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1279 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1280 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1281 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1282 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1283 "src/math/roundd-neonv8.c",
1284 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1285 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1286]
1287
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1288AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1289 "src/f16-clamp/gen/neonfp16arith-x16.c",
1290 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1291 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1292 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1293 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1294 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1295 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1296 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1297 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1298 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1299 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1300 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1301 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1302 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1303 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1304 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1305 "src/f16-hswish/gen/neonfp16arith-x16.c",
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1307 "src/f16-prelu/gen/neonfp16arith-2x16.c",
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Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1309 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
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1311 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1312 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1313 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1314 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1315 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1316 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
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1319 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1320 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1321 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1322 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1323 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1324 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1325 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1326 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1327 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1328 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1329 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1330 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1331 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1332 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1333 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1334 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1335 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1336 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1337 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1338 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1339 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1340 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1341 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1342 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1343 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1344 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1345 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1346 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1347 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1348 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1349 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1350 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1351 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1352 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1353 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1354 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1355 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1356 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1357 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1358 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1359 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1360 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1361 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1362 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1363 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1364 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1365 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1366 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1367 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1368 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1369 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1370 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1371]
1372
1373SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1374 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1375 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1376 "src/f32-clamp/gen/sse-x4.c",
1377 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1378 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1379 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1380 "src/f32-dwconv-chw/3x3p1-sse.c",
1381 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1382 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1383 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1384 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1385 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1386 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1387 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1388 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1389 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1390 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1391 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1392 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1393 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1394 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1395 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1396 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1397 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1398 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1399 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1400 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1401 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1402 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1403 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1404 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1405 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1406 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1407 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1408 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1409 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1410 "src/f32-hswish/gen/sse-x4.c",
1411 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1412 "src/f32-ibilinear/gen/sse-c4.c",
1413 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1414 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1415 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1416 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1417 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1418 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1419 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1420 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1421 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1422 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1423 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1424 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan39b5e942020-06-24 15:03:48 -0700[diff] [blame]1425 "src/f32-prelu/gen/sse-2x4.c",
1426 "src/f32-prelu/gen/sse-2x8.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1427 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1428 "src/f32-spmm/gen/4x1-minmax-sse.c",
1429 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1430 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1431 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1432 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1433 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1434 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1435 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1436 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1437 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1438 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1439 "src/f32-vbinary/gen/vmax-sse-x4.c",
1440 "src/f32-vbinary/gen/vmax-sse-x8.c",
1441 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1442 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1443 "src/f32-vbinary/gen/vmin-sse-x4.c",
1444 "src/f32-vbinary/gen/vmin-sse-x8.c",
1445 "src/f32-vbinary/gen/vminc-sse-x4.c",
1446 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1447 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1448 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1449 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1450 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1451 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1452 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1453 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1454 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1455 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1456 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1457 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1458 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1459 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1460 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1461 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1462 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1463 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1464 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1465 "src/f32-vlrelu/gen/sse-x4.c",
1466 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1467 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1468 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1469 "src/f32-vunary/gen/vabs-sse-x4.c",
1470 "src/f32-vunary/gen/vabs-sse-x8.c",
1471 "src/f32-vunary/gen/vneg-sse-x4.c",
1472 "src/f32-vunary/gen/vneg-sse-x8.c",
1473 "src/f32-vunary/gen/vsqr-sse-x4.c",
1474 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1475 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1476 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1477 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1478 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1479 "src/math/roundd-sse-addsub.c",
1480 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1481 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1482]
1483
1484SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1485 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1486 "src/f32-argmaxpool/4x-sse2-c4.c",
1487 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1488 "src/f32-prelu/gen/sse2-2x4.c",
1489 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1490 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1491 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1492 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1493 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1494 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1495 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1496 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1497 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1498 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1499 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1500 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1501 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1502 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1503 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1504 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1505 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1506 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1507 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1508 "src/f32-vlrelu/gen/sse2-x4.c",
1509 "src/f32-vlrelu/gen/sse2-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1510 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1511 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1512 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1513 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1514 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1515 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1516 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1517 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1518 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1519 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1520 "src/q8-igemm/4x4c2-minmax-sse2.c",
1521 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1522 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1523 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1524 "src/q8-gemm/2x4c8-minmax-sse2.c",
1525 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1526 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1527 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1528 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1529 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1530 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1531 "src/x32-zip/x2-sse2.c",
1532 "src/x32-zip/x3-sse2.c",
1533 "src/x32-zip/x4-sse2.c",
1534 "src/x32-zip/xm-sse2.c",
1535 "src/x8-zip/x2-sse2.c",
1536 "src/x8-zip/x3-sse2.c",
1537 "src/x8-zip/x4-sse2.c",
1538 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1539 "src/math/exp-sse2-p5.c",
1540 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1541 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1542 "src/math/roundd-sse2-cvt.c",
1543 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1544 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1545 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1546 "src/requantization/precise-sse2.c",
1547 "src/requantization/fp32-sse2.c",
1548 "src/requantization/q31-sse2.c",
1549 "src/requantization/gemmlowp-sse2.c",
1550]
1551
1552SSSE3_UKERNELS = [
1553 "src/requantization/precise-ssse3.c",
1554 "src/requantization/q31-ssse3.c",
1555 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1556]
1557
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1558SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1559 "src/f32-prelu/gen/sse41-2x4.c",
1560 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1561 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1562 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1563 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1564 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1565 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1566 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhan0d3f4672020-06-25 16:42:58 -0700[diff] [blame]1567 "src/f32-vlrelu/gen/sse41-x4.c",
1568 "src/f32-vlrelu/gen/sse41-x8.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1569 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1570 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1571 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1572 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1573 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1574 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1575 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1576 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1577 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1578 "src/math/roundd-sse41.c",
1579 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1580 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1581 "src/requantization/precise-sse4.c",
1582 "src/requantization/q31-sse4.c",
1583 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1584]
1585
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1586AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1587 "src/f32-clamp/gen/avx-x8.c",
1588 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1589 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1590 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1591 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1592 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1593 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1594 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1595 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1596 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1597 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1598 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1599 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1600 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1601 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1602 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1603 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1604 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1605 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1606 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1607 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1608 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1609 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1610 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1611 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1612 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1613 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1614 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1615 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1616 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1617 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1618 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1619 "src/f32-hswish/gen/avx-x8.c",
1620 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1621 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1622 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1623 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1624 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1625 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1626 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1627 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1628 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1629 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1630 "src/f32-prelu/gen/avx-2x8.c",
1631 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1632 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1633 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1634 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1635 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1636 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1637 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1638 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1639 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1640 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1641 "src/f32-vbinary/gen/vmax-avx-x8.c",
1642 "src/f32-vbinary/gen/vmax-avx-x16.c",
1643 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1644 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1645 "src/f32-vbinary/gen/vmin-avx-x8.c",
1646 "src/f32-vbinary/gen/vmin-avx-x16.c",
1647 "src/f32-vbinary/gen/vminc-avx-x8.c",
1648 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1649 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1650 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1651 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1652 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1653 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1654 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1655 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1656 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1657 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1658 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1659 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1660 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1661 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1662 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1663 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1664 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1665 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1666 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1667 "src/f32-vlrelu/gen/avx-x8.c",
1668 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1669 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1670 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1671 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1672 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1673 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1674 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1675 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1676 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1677 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1678 "src/f32-vunary/gen/vabs-avx-x8.c",
1679 "src/f32-vunary/gen/vabs-avx-x16.c",
1680 "src/f32-vunary/gen/vneg-avx-x8.c",
1681 "src/f32-vunary/gen/vneg-avx-x16.c",
1682 "src/f32-vunary/gen/vsqr-avx-x8.c",
1683 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1684]
1685
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1686FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1687 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1688 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1689 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1690 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1691 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1692 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1693 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1694 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1695 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1696 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1697 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1698 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1699 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1700 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1701 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1702 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1703 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1704 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1705 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1706 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1707 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1708 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1709 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1710 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1711 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1712 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1713 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1714 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1715 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1716 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1717 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1718 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1719 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1720 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1721 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1722 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1723 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1724 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1725 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1726 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1727 "src/f32-hswish/gen/fma3-x8.c",
1728 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1729 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1730 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1731 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1732 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1733 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1734 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1735 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1736 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1737 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1738 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1739 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1740 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1741 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1742 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1743]
1744
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1745AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1746 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1747 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1748 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1749 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1750 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1751 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1752 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1753 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1754 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1755 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1756 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1757 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1758 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1759 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1760 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1761 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1762 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1763 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1764 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1765 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1766 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1767 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1768 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1769 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1770 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1771 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1772 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1773 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1774 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1775 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1776 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1777 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1778 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1779 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1780 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1781 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1782 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1783 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1784 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1785 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1786 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1787 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1788 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1789 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1790 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1791 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1792 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1793 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1794 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1795 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1796 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1797 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1798 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1799 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1800 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1801 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1802 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1803 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1804 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1805 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1806 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1807 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1808 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1809 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1810 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1811 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1812 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1813 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1814 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1815 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1816 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1817 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1818 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1819 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1820 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1821 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1822 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1823 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1824 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1825 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1826 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1827 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1828 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1829 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1830 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1831 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1832 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1833 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1834 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1835 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1836 "src/math/exp-avx2-p5.c",
1837 "src/math/exp-avx2-perm-p3.c",
1838 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1839 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1840 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1841 "src/math/sigmoid-avx2-rr2-p5-div.c",
1842 "src/math/sigmoid-avx2-rr1-p5-div.c",
1843 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1844 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1845 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1846 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1847]
1848
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1849AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1850 "src/f32-clamp/gen/avx512f-x16.c",
1851 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1852 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1853 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1854 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1855 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1856 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1857 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1858 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1859 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1860 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1861 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1862 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1863 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1864 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1865 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1866 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1867 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1868 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1869 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1870 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1871 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1872 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1873 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1874 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1875 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1876 "src/f32-hswish/gen/avx512f-x16.c",
1877 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1878 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1879 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1880 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1881 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1882 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1883 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1884 "src/f32-prelu/gen/avx512f-2x16.c",
1885 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1886 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1887 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1888 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1889 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1890 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1891 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1892 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1893 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1894 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1895 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1896 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1897 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1898 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1899 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1900 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1901 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1902 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1903 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1904 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1905 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1906 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1907 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1908 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1909 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1910 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1911 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1912 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1913 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1914 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1915 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1916 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1917 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1918 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1919 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1920 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1921 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1922 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1923 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1924 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1925 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1926 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1927 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1928 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1929 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1930 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1931 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1932 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1933 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1934 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1935 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1936 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1937 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1938 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1939 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1940 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1941 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1942 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1943 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1944 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1945 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1946 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1947 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1948 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1949 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1950 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1951 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1952 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1953 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1954 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1955 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1956 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1957 "src/f32-vlrelu/gen/avx512f-x16.c",
1958 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1959 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1960 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1961 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1962 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1963 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1964 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1965 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1966 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1967 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1968 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1969 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1970 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1971 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1972 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1973 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1974 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1975 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1976 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1977 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1978 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1979 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1980 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1981 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1982 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1983 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1984 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1985 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1986 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1987 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1988 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1989 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1990 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1991 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1992 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1993 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1994 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1995 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1996 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1997 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1998 "src/math/exp-avx512f-p5-scalef.c",
1999 "src/math/exp-avx512f-p5.c",
2000 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]2001 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]2002 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2003]
2004
2005AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]2006 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]2007 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2008 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2009 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
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2011 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]2012 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
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2014 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
2015 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2016 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
2017 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
2018 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
2019 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2020]
2021
2022AARCH64_ASM_UKERNELS = [
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Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2024 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
2025 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
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Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2027 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
2028 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2029 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
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Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]2033 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2037 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
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Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2058 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
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2075 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2076 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2077 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2078 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2079 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2080 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2081 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2082 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2083 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2084 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2085 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2086 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2087 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2088 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2089 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2090 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2091 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2092 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2093 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2094 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2095 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2096 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2097]
2098
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2099INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2100 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2101 "src/xnnpack/argmaxpool.h",
2102 "src/xnnpack/avgpool.h",
2103 "src/xnnpack/clamp.h",
2104 "src/xnnpack/common.h",
2105 "src/xnnpack/conv.h",
2106 "src/xnnpack/dwconv.h",
2107 "src/xnnpack/gavgpool.h",
2108 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2109 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2110 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2111 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2112 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2113 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2114 "src/xnnpack/lut.h",
2115 "src/xnnpack/math.h",
2116 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2117 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2118 "src/xnnpack/packx.h",
2119 "src/xnnpack/pad.h",
2120 "src/xnnpack/params.h",
2121 "src/xnnpack/pavgpool.h",
2122 "src/xnnpack/ppmm.h",
2123 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2124 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2125 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2126 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2127 "src/xnnpack/rmax.h",
2128 "src/xnnpack/scalar-utils.h",
2129 "src/xnnpack/spmm.h",
2130 "src/xnnpack/unpool.h",
2131 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2132 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2133 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2134 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2135 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2136 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2137 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2138 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2139]
2140
2141INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2142 "include/xnnpack.h",
2143 "src/xnnpack/allocator.h",
2144 "src/xnnpack/compute.h",
2145 "src/xnnpack/im2col.h",
2146 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2147 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2148 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2149 "src/xnnpack/operator.h",
2150 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2151 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2152 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2153 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2154 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2155]
2156
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2157ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2158 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2159]
2160
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2161MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2162 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2163 "include/xnnpack.h",
2164]
2165
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2166MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2167 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2168 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2169 "src/xnnpack/requantization.h",
2170 "include/xnnpack.h",
2171]
2172
2173OPERATOR_TEST_PARAMS_HDRS = [
2174 "src/xnnpack/params.h",
2175 "src/xnnpack/common.h",
2176]
2177
2178WEIGHTS_PACK_HDRS = [
2179 "src/xnnpack/pack.h",
2180 "src/xnnpack/operator.h",
2181 "src/xnnpack/compute.h",
2182]
2183
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2184LOGGING_COPTS = select({
2185 # No logging in optimized mode
2186 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2187 # Full logging in debug mode
2188 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2189 # Error-only logging in default (fastbuild) mode
2190 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2191})
2192
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2193LOGGING_SRCS = select({
2194 # No logging in optimized mode
2195 ":optimized_build": [],
2196 "//conditions:default": [
2197 "src/operator-strings.c",
2198 "src/subgraph-strings.c",
2199 ],
2200})
2201
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2202LOGGING_HDRS = [
2203 "src/xnnpack/log.h",
2204]
2205
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2206xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2207 name = "tables",
2208 srcs = TABLE_SRCS,
2209 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2210 gcc_copts = xnnpack_gcc_std_copts(),
2211 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2212)
2213
2214xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2215 name = "scalar_ukernels",
2216 srcs = SCALAR_UKERNELS,
2217 hdrs = INTERNAL_HDRS,
2218 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2219 gcc_copts = xnnpack_gcc_std_copts(),
2220 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2221 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2222 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2223 "@FP16",
2224 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2225 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2226 ],
2227)
2228
2229xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2230 name = "scalar_ukernels_test_mode",
2231 srcs = SCALAR_UKERNELS,
2232 hdrs = INTERNAL_HDRS,
2233 aarch32_copts = ["-marm"],
2234 copts = [
2235 "-UNDEBUG",
2236 "-DXNN_TEST_MODE=1",
2237 ],
2238 gcc_copts = xnnpack_gcc_std_copts(),
2239 msvc_copts = xnnpack_msvc_std_copts(),
2240 deps = [
2241 ":tables",
2242 "@FP16",
2243 "@FXdiv",
2244 "@pthreadpool",
2245 ],
2246)
2247
2248xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2249 name = "wasm_ukernels",
2250 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2251 gcc_copts = xnnpack_gcc_std_copts(),
2252 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2253 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2254 wasmsimd_copts = [
2255 "-msimd128",
2256 "-munimplemented-simd128",
2257 ],
Marat Dukhan1c6e3892020-06-25 23:56:10 -0700[diff] [blame]2258 wasmsimd_srcs = WASM_UKERNELS + WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2259 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2260 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2261 "@FP16",
2262 "@FXdiv",
2263 "@pthreadpool",
2264 ],
2265)
2266
2267xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2268 name = "wasm_ukernels_test_mode",
2269 hdrs = INTERNAL_HDRS,
2270 copts = [
2271 "-UNDEBUG",
2272 "-DXNN_TEST_MODE=1",
2273 ],
2274 gcc_copts = xnnpack_gcc_std_copts(),
2275 msvc_copts = xnnpack_msvc_std_copts(),
2276 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2277 wasmsimd_copts = [
2278 "-msimd128",
2279 "-munimplemented-simd128",
2280 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2281 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2282 deps = [
2283 ":tables",
2284 "@FP16",
2285 "@FXdiv",
2286 "@pthreadpool",
2287 ],
2288)
2289
2290xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2291 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2292 hdrs = INTERNAL_HDRS,
2293 aarch32_copts = [
2294 "-marm",
2295 "-mfpu=neon",
2296 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2297 gcc_copts = xnnpack_gcc_std_copts(),
2298 gcc_x86_copts = ["-msse2"],
2299 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2300 optimized_copts = [
2301 "-O3",
2302 "-ffast-math",
2303 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2304 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2305 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2306 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2307 "@FP16",
2308 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2309 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2310 ],
2311)
2312
2313xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2314 name = "psimd_fastmath_ukernels_test_mode",
2315 hdrs = INTERNAL_HDRS,
2316 aarch32_copts = [
2317 "-marm",
2318 "-mfpu=neon",
2319 ],
2320 copts = [
2321 "-UNDEBUG",
2322 "-DXNN_TEST_MODE=1",
2323 ],
2324 gcc_copts = xnnpack_gcc_std_copts(),
2325 gcc_x86_copts = ["-msse2"],
2326 msvc_copts = xnnpack_msvc_std_copts(),
2327 optimized_copts = [
2328 "-O3",
2329 "-ffast-math",
2330 ],
2331 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2332 deps = [
2333 ":tables",
2334 "@FP16",
2335 "@psimd",
2336 "@pthreadpool",
2337 ],
2338)
2339
2340xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2341 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2342 hdrs = INTERNAL_HDRS,
2343 aarch32_copts = [
2344 "-marm",
2345 "-mfpu=neon",
2346 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2347 gcc_copts = xnnpack_gcc_std_copts(),
2348 gcc_x86_copts = ["-msse2"],
2349 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2350 optimized_copts = [
2351 "-O3",
2352 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2353 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2354 deps = [
2355 ":tables",
2356 "@FP16",
2357 "@psimd",
2358 "@pthreadpool",
2359 ],
2360)
2361
2362xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2363 name = "psimd_accmath_ukernels_test_mode",
2364 hdrs = INTERNAL_HDRS,
2365 aarch32_copts = [
2366 "-marm",
2367 "-mfpu=neon",
2368 ],
2369 copts = [
2370 "-UNDEBUG",
2371 "-DXNN_TEST_MODE=1",
2372 ],
2373 gcc_copts = xnnpack_gcc_std_copts(),
2374 gcc_x86_copts = ["-msse2"],
2375 msvc_copts = xnnpack_msvc_std_copts(),
2376 optimized_copts = [
2377 "-O3",
2378 ],
2379 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2380 deps = [
2381 ":tables",
2382 "@FP16",
2383 "@psimd",
2384 "@pthreadpool",
2385 ],
2386)
2387
2388xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2389 name = "neon_ukernels",
2390 hdrs = INTERNAL_HDRS,
2391 aarch32_copts = [
2392 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2393 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2394 "-mfpu=neon",
2395 ],
2396 aarch32_srcs = NEON_UKERNELS,
2397 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2398 gcc_copts = xnnpack_gcc_std_copts(),
2399 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2400 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2401 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2402 "@FP16",
2403 "@pthreadpool",
2404 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2405)
2406
2407xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2408 name = "neon_ukernels_test_mode",
2409 hdrs = INTERNAL_HDRS,
2410 aarch32_copts = [
2411 "-marm",
2412 "-march=armv7-a",
2413 "-mfpu=neon",
2414 ],
2415 aarch32_srcs = NEON_UKERNELS,
2416 aarch64_srcs = NEON_UKERNELS,
2417 copts = [
2418 "-UNDEBUG",
2419 "-DXNN_TEST_MODE=1",
2420 ],
2421 gcc_copts = xnnpack_gcc_std_copts(),
2422 msvc_copts = xnnpack_msvc_std_copts(),
2423 deps = [
2424 ":tables",
2425 "@FP16",
2426 "@pthreadpool",
2427 ],
2428)
2429
2430xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2431 name = "neonfma_ukernels",
2432 hdrs = INTERNAL_HDRS,
2433 aarch32_copts = [
2434 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2435 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2436 "-mfpu=neon-vfpv4",
2437 ],
2438 aarch32_srcs = NEONFMA_UKERNELS,
2439 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2440 apple_aarch32_copts = [
2441 "-mcpu=swift",
2442 "-mtune=generic",
2443 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2444 gcc_copts = xnnpack_gcc_std_copts(),
2445 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2446 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2447 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2448 "@FP16",
2449 "@pthreadpool",
2450 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2451)
2452
2453xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2454 name = "neonfma_ukernels_test_mode",
2455 hdrs = INTERNAL_HDRS,
2456 aarch32_copts = [
2457 "-marm",
2458 "-march=armv7-a",
2459 "-mfpu=neon-vfpv4",
2460 ],
2461 aarch32_srcs = NEONFMA_UKERNELS,
2462 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2463 apple_aarch32_copts = [
2464 "-mcpu=swift",
2465 "-mtune=generic",
2466 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2467 copts = [
2468 "-UNDEBUG",
2469 "-DXNN_TEST_MODE=1",
2470 ],
2471 gcc_copts = xnnpack_gcc_std_copts(),
2472 msvc_copts = xnnpack_msvc_std_copts(),
2473 deps = [
2474 ":tables",
2475 "@FP16",
2476 "@pthreadpool",
2477 ],
2478)
2479
2480xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2481 name = "neonv8_ukernels",
2482 hdrs = INTERNAL_HDRS,
2483 aarch32_copts = [
2484 "-marm",
2485 "-march=armv8-a",
2486 "-mfpu=neon-fp-armv8",
2487 ],
2488 aarch32_srcs = NEONV8_UKERNELS,
2489 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2490 apple_aarch32_copts = [
2491 "-mcpu=cyclone",
2492 "-mtune=generic",
2493 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2494 gcc_copts = xnnpack_gcc_std_copts(),
2495 msvc_copts = xnnpack_msvc_std_copts(),
2496 deps = [
2497 ":tables",
2498 "@FP16",
2499 "@pthreadpool",
2500 ],
2501)
2502
2503xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2504 name = "neonv8_ukernels_test_mode",
2505 hdrs = INTERNAL_HDRS,
2506 aarch32_copts = [
2507 "-marm",
2508 "-march=armv8-a",
2509 "-mfpu=neon-fp-armv8",
2510 ],
2511 aarch32_srcs = NEONV8_UKERNELS,
2512 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2513 apple_aarch32_copts = [
2514 "-mcpu=cyclone",
2515 "-mtune=generic",
2516 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2517 copts = [
2518 "-UNDEBUG",
2519 "-DXNN_TEST_MODE=1",
2520 ],
2521 gcc_copts = xnnpack_gcc_std_copts(),
2522 msvc_copts = xnnpack_msvc_std_copts(),
2523 deps = [
2524 ":tables",
2525 "@FP16",
2526 "@pthreadpool",
2527 ],
2528)
2529
2530xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2531 name = "neonfp16arith_ukernels",
2532 hdrs = INTERNAL_HDRS,
2533 aarch64_copts = ["-march=armv8.2-a+fp16"],
2534 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2535 gcc_copts = xnnpack_gcc_std_copts(),
2536 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2537 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2538 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2539 "@FP16",
2540 "@pthreadpool",
2541 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2542)
2543
2544xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2545 name = "neonfp16arith_ukernels_test_mode",
2546 hdrs = INTERNAL_HDRS,
2547 aarch64_copts = ["-march=armv8.2-a+fp16"],
2548 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2549 copts = [
2550 "-UNDEBUG",
2551 "-DXNN_TEST_MODE=1",
2552 ],
2553 gcc_copts = xnnpack_gcc_std_copts(),
2554 msvc_copts = xnnpack_msvc_std_copts(),
2555 deps = [
2556 ":tables",
2557 "@FP16",
2558 "@pthreadpool",
2559 ],
2560)
2561
2562xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2563 name = "sse2_ukernels",
2564 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2565 gcc_copts = xnnpack_gcc_std_copts(),
2566 gcc_x86_copts = ["-msse2"],
2567 msvc_copts = xnnpack_msvc_std_copts(),
2568 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2569 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2570 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2571 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2572 "@FP16",
2573 "@pthreadpool",
2574 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2575)
2576
2577xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2578 name = "sse2_ukernels_test_mode",
2579 hdrs = INTERNAL_HDRS,
2580 copts = [
2581 "-UNDEBUG",
2582 "-DXNN_TEST_MODE=1",
2583 ],
2584 gcc_copts = xnnpack_gcc_std_copts(),
2585 gcc_x86_copts = ["-msse2"],
2586 msvc_copts = xnnpack_msvc_std_copts(),
2587 msvc_x86_32_copts = ["/arch:SSE2"],
2588 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2589 deps = [
2590 ":tables",
2591 "@FP16",
2592 "@pthreadpool",
2593 ],
2594)
2595
2596xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2597 name = "ssse3_ukernels",
2598 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2599 gcc_copts = xnnpack_gcc_std_copts(),
2600 gcc_x86_copts = ["-mssse3"],
2601 msvc_copts = xnnpack_msvc_std_copts(),
2602 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2603 x86_srcs = SSSE3_UKERNELS,
2604 deps = [
2605 ":tables",
2606 "@FP16",
2607 "@pthreadpool",
2608 ],
2609)
2610
2611xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2612 name = "ssse3_ukernels_test_mode",
2613 hdrs = INTERNAL_HDRS,
2614 copts = [
2615 "-UNDEBUG",
2616 "-DXNN_TEST_MODE=1",
2617 ],
2618 gcc_copts = xnnpack_gcc_std_copts(),
2619 gcc_x86_copts = ["-mssse3"],
2620 msvc_copts = xnnpack_msvc_std_copts(),
2621 msvc_x86_32_copts = ["/arch:SSE2"],
2622 x86_srcs = SSSE3_UKERNELS,
2623 deps = [
2624 ":tables",
2625 "@FP16",
2626 "@pthreadpool",
2627 ],
2628)
2629
2630xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2631 name = "sse41_ukernels",
2632 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2633 gcc_copts = xnnpack_gcc_std_copts(),
2634 gcc_x86_copts = ["-msse4.1"],
2635 msvc_copts = xnnpack_msvc_std_copts(),
2636 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2637 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2638 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2639 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2640 "@FP16",
2641 "@pthreadpool",
2642 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2643)
2644
2645xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2646 name = "sse41_ukernels_test_mode",
2647 hdrs = INTERNAL_HDRS,
2648 copts = [
2649 "-UNDEBUG",
2650 "-DXNN_TEST_MODE=1",
2651 ],
2652 gcc_copts = xnnpack_gcc_std_copts(),
2653 gcc_x86_copts = ["-msse4.1"],
2654 msvc_copts = xnnpack_msvc_std_copts(),
2655 msvc_x86_32_copts = ["/arch:SSE2"],
2656 x86_srcs = SSE41_UKERNELS,
2657 deps = [
2658 ":tables",
2659 "@FP16",
2660 "@pthreadpool",
2661 ],
2662)
2663
2664xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2665 name = "avx_ukernels",
2666 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2667 gcc_copts = xnnpack_gcc_std_copts(),
2668 gcc_x86_copts = ["-mavx"],
2669 msvc_copts = xnnpack_msvc_std_copts(),
2670 msvc_x86_32_copts = ["/arch:AVX"],
2671 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2672 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2673 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2674 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2675 "@FP16",
2676 "@pthreadpool",
2677 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2678)
2679
2680xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2681 name = "avx_ukernels_test_mode",
2682 hdrs = INTERNAL_HDRS,
2683 copts = [
2684 "-UNDEBUG",
2685 "-DXNN_TEST_MODE=1",
2686 ],
2687 gcc_copts = xnnpack_gcc_std_copts(),
2688 gcc_x86_copts = ["-mavx"],
2689 msvc_copts = xnnpack_msvc_std_copts(),
2690 msvc_x86_32_copts = ["/arch:AVX"],
2691 msvc_x86_64_copts = ["/arch:AVX"],
2692 x86_srcs = AVX_UKERNELS,
2693 deps = [
2694 ":tables",
2695 "@FP16",
2696 "@pthreadpool",
2697 ],
2698)
2699
2700xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2701 name = "fma3_ukernels",
2702 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2703 gcc_copts = xnnpack_gcc_std_copts(),
2704 gcc_x86_copts = ["-mfma"],
2705 msvc_copts = xnnpack_msvc_std_copts(),
2706 msvc_x86_32_copts = ["/arch:AVX"],
2707 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2708 x86_srcs = FMA3_UKERNELS,
2709 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2710 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2711 "@FP16",
2712 "@pthreadpool",
2713 ],
2714)
2715
2716xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2717 name = "fma3_ukernels_test_mode",
2718 hdrs = INTERNAL_HDRS,
2719 copts = [
2720 "-UNDEBUG",
2721 "-DXNN_TEST_MODE=1",
2722 ],
2723 gcc_copts = xnnpack_gcc_std_copts(),
2724 gcc_x86_copts = ["-mfma"],
2725 msvc_copts = xnnpack_msvc_std_copts(),
2726 msvc_x86_32_copts = ["/arch:AVX"],
2727 msvc_x86_64_copts = ["/arch:AVX"],
2728 x86_srcs = FMA3_UKERNELS,
2729 deps = [
2730 ":tables",
2731 "@FP16",
2732 "@pthreadpool",
2733 ],
2734)
2735
2736xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2737 name = "avx2_ukernels",
2738 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2739 gcc_copts = xnnpack_gcc_std_copts(),
2740 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2741 "-mfma",
2742 "-mavx2",
2743 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2744 msvc_copts = xnnpack_msvc_std_copts(),
2745 msvc_x86_32_copts = ["/arch:AVX2"],
2746 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2747 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2748 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2749 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2750 "@FP16",
2751 "@pthreadpool",
2752 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2753)
2754
2755xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2756 name = "avx2_ukernels_test_mode",
2757 hdrs = INTERNAL_HDRS,
2758 copts = [
2759 "-UNDEBUG",
2760 "-DXNN_TEST_MODE=1",
2761 ],
2762 gcc_copts = xnnpack_gcc_std_copts(),
2763 gcc_x86_copts = [
2764 "-mfma",
2765 "-mavx2",
2766 ],
2767 msvc_copts = xnnpack_msvc_std_copts(),
2768 msvc_x86_32_copts = ["/arch:AVX2"],
2769 msvc_x86_64_copts = ["/arch:AVX2"],
2770 x86_srcs = AVX2_UKERNELS,
2771 deps = [
2772 ":tables",
2773 "@FP16",
2774 "@pthreadpool",
2775 ],
2776)
2777
2778xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2779 name = "avx512f_ukernels",
2780 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2781 gcc_copts = xnnpack_gcc_std_copts(),
2782 gcc_x86_copts = ["-mavx512f"],
2783 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2784 msvc_copts = xnnpack_msvc_std_copts(),
2785 msvc_x86_32_copts = ["/arch:AVX512"],
2786 msvc_x86_64_copts = ["/arch:AVX512"],
2787 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2788 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2789 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2790 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2791 "@FP16",
2792 "@pthreadpool",
2793 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2794)
2795
2796xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2797 name = "avx512f_ukernels_test_mode",
2798 hdrs = INTERNAL_HDRS,
2799 copts = [
2800 "-UNDEBUG",
2801 "-DXNN_TEST_MODE=1",
2802 ],
2803 gcc_copts = xnnpack_gcc_std_copts(),
2804 gcc_x86_copts = ["-mavx512f"],
2805 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2806 msvc_copts = xnnpack_msvc_std_copts(),
2807 msvc_x86_32_copts = ["/arch:AVX512"],
2808 msvc_x86_64_copts = ["/arch:AVX512"],
2809 msys_copts = ["-fno-asynchronous-unwind-tables"],
2810 x86_srcs = AVX512F_UKERNELS,
2811 deps = [
2812 ":tables",
2813 "@FP16",
2814 "@pthreadpool",
2815 ],
2816)
2817
2818xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2819 name = "asm_ukernels",
2820 hdrs = ["src/xnnpack/assembly.h"],
2821 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2822 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2823 aarch64_srcs = AARCH64_ASM_UKERNELS,
2824)
2825
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2826xnnpack_cc_library(
2827 name = "logging_utils",
2828 srcs = LOGGING_SRCS,
2829 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2830 copts = LOGGING_COPTS + [
2831 "-Isrc",
2832 "-Iinclude",
2833 ] + select({
2834 ":debug_build": [],
2835 "//conditions:default": xnnpack_min_size_copts(),
2836 }),
2837 gcc_copts = xnnpack_gcc_std_copts(),
2838 msvc_copts = xnnpack_msvc_std_copts(),
2839 visibility = xnnpack_visibility(),
2840 deps = [
2841 "@FP16",
2842 "@clog",
2843 "@pthreadpool",
2844 ],
2845)
2846
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2847xnnpack_aggregate_library(
2848 name = "ukernels",
2849 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2850 ":neon_ukernels",
2851 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2852 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2853 ":asm_ukernels",
2854 ],
2855 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2856 ":neon_ukernels",
2857 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2858 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2859 ":neonfp16arith_ukernels",
2860 ":asm_ukernels",
2861 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2862 generic_deps = [
2863 ":scalar_ukernels",
2864 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2865 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2866 ":psimd_fastmath_ukernels",
2867 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2868 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2869 wasm_deps = [
2870 ":wasm_ukernels",
2871 ],
2872 wasmsimd_deps = [
2873 ":wasm_ukernels",
2874 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2875 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2876 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2877 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2878 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2879 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2880 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2881 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2882 ":avx512f_ukernels",
2883 ],
2884)
2885
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2886xnnpack_aggregate_library(
2887 name = "ukernels_test_mode",
2888 aarch32_deps = [
2889 ":neon_ukernels_test_mode",
2890 ":neonfma_ukernels_test_mode",
2891 ":neonv8_ukernels_test_mode",
2892 ":asm_ukernels",
2893 ],
2894 aarch64_deps = [
2895 ":neon_ukernels_test_mode",
2896 ":neonfma_ukernels_test_mode",
2897 ":neonv8_ukernels_test_mode",
2898 ":neonfp16arith_ukernels_test_mode",
2899 ":asm_ukernels",
2900 ],
2901 generic_deps = [
2902 ":scalar_ukernels_test_mode",
2903 ],
2904 psimd_deps = [
2905 ":psimd_fastmath_ukernels_test_mode",
2906 ":psimd_accmath_ukernels_test_mode",
2907 ],
2908 wasm_deps = [
2909 ":wasm_ukernels_test_mode",
2910 ],
2911 wasmsimd_deps = [
2912 ":wasm_ukernels_test_mode",
2913 ],
2914 x86_deps = [
2915 ":sse2_ukernels_test_mode",
2916 ":ssse3_ukernels_test_mode",
2917 ":sse41_ukernels_test_mode",
2918 ":avx_ukernels_test_mode",
2919 ":fma3_ukernels_test_mode",
2920 ":avx2_ukernels_test_mode",
2921 ":avx512f_ukernels_test_mode",
2922 ],
2923)
2924
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2925# This target must be compatible with Android NDK r17 and compile with Clang 6.
2926# It is similar to :ukernels target, but excludes microkernels which require
2927# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2928xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2929 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2930 aarch32_deps = [
2931 ":neon_ukernels",
2932 ":neonfma_ukernels",
2933 ":neonv8_ukernels",
2934 ":asm_ukernels",
2935 ],
2936 aarch64_deps = [
2937 ":neon_ukernels",
2938 ":neonfma_ukernels",
2939 ":neonv8_ukernels",
2940 ":asm_ukernels",
2941 ],
2942 generic_deps = [
2943 ":scalar_ukernels",
2944 ],
2945 psimd_deps = [
2946 ":psimd_fastmath_ukernels",
2947 ":psimd_accmath_ukernels",
2948 ],
2949 wasm_deps = [
2950 ":wasm_ukernels",
2951 ],
2952 wasmsimd_deps = [
2953 ":wasm_ukernels",
2954 ],
2955 x86_deps = [
2956 ":sse2_ukernels",
2957 ":ssse3_ukernels",
2958 ":sse41_ukernels",
2959 ":avx_ukernels",
2960 ":fma3_ukernels",
2961 ":avx2_ukernels",
2962 ":avx512f_ukernels",
2963 ],
2964)
2965
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2966xnnpack_cc_library(
2967 name = "im2col",
2968 srcs = ["src/im2col.c"],
2969 hdrs = [
2970 "src/xnnpack/common.h",
2971 "src/xnnpack/im2col.h",
2972 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2973 gcc_copts = xnnpack_gcc_std_copts(),
2974 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2975)
2976
2977xnnpack_cc_library(
2978 name = "indirection",
2979 srcs = ["src/indirection.c"],
2980 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2981 gcc_copts = xnnpack_gcc_std_copts(),
2982 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2983 deps = [
2984 "@FP16",
2985 "@FXdiv",
2986 "@pthreadpool",
2987 ],
2988)
2989
2990xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2991 name = "indirection_test_mode",
2992 srcs = ["src/indirection.c"],
2993 hdrs = INTERNAL_HDRS,
2994 copts = [
2995 "-UNDEBUG",
2996 "-DXNN_TEST_MODE=1",
2997 ],
2998 gcc_copts = xnnpack_gcc_std_copts(),
2999 msvc_copts = xnnpack_msvc_std_copts(),
3000 deps = [
3001 "@FP16",
3002 "@FXdiv",
3003 "@pthreadpool",
3004 ],
3005)
3006
3007xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3008 name = "operator_run",
3009 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]3010 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3011 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3012 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3013 "//conditions:default": [],
3014 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3015 gcc_copts = xnnpack_gcc_std_copts(),
3016 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3017 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3018 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3019 "@FP16",
3020 "@FXdiv",
3021 "@clog",
3022 "@pthreadpool",
3023 ],
3024)
3025
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3026xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3027 name = "operator_run_test_mode",
3028 srcs = ["src/operator-run.c"],
3029 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3030 copts = LOGGING_COPTS + [
3031 "-UNDEBUG",
3032 "-DXNN_TEST_MODE=1",
3033 ] + select({
3034 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3035 "//conditions:default": [],
3036 }),
3037 gcc_copts = xnnpack_gcc_std_copts(),
3038 msvc_copts = xnnpack_msvc_std_copts(),
3039 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3040 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3041 "@FP16",
3042 "@FXdiv",
3043 "@clog",
3044 "@pthreadpool",
3045 ],
3046)
3047
3048xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3049 name = "memory_planner",
3050 srcs = ["src/memory-planner.c"],
3051 hdrs = INTERNAL_HDRS,
3052 defines = select({
3053 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3054 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3055 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3056 }),
3057 gcc_copts = xnnpack_gcc_std_copts(),
3058 msvc_copts = xnnpack_msvc_std_copts(),
3059 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3060 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3061 "@pthreadpool",
3062 ],
3063)
3064
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3065xnnpack_cc_library(
3066 name = "memory_planner_test_mode",
3067 srcs = ["src/memory-planner.c"],
3068 hdrs = INTERNAL_HDRS,
3069 copts = [
3070 "-UNDEBUG",
3071 "-DXNN_TEST_MODE=1",
3072 ],
3073 defines = select({
3074 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3075 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3076 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3077 }),
3078 gcc_copts = xnnpack_gcc_std_copts(),
3079 msvc_copts = xnnpack_msvc_std_copts(),
3080 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3081 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3082 "@pthreadpool",
3083 ],
3084)
3085
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3086cc_library(
3087 name = "enable_assembly",
3088 defines = select({
3089 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3090 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3091 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3092 }),
3093)
3094
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3095cc_library(
3096 name = "enable_sparse",
3097 defines = select({
3098 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3099 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame]3100 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3101 }),
3102)
3103
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3104xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3105 name = "operators",
3106 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3107 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3108 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3109 ],
3110 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3111 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3112 "-Isrc",
3113 "-Iinclude",
3114 ] + select({
3115 ":debug_build": [],
3116 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3117 }) + select({
3118 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3119 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3120 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3121 gcc_copts = xnnpack_gcc_std_copts(),
3122 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3123 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3124 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3125 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3126 "@FP16",
3127 "@FXdiv",
3128 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3129 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3130 ],
3131)
3132
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3133xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3134 name = "operators_test_mode",
3135 srcs = OPERATOR_SRCS + [
3136 "src/memory.c",
3137 "src/operator-delete.c",
3138 ],
3139 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3140 copts = LOGGING_COPTS + [
3141 "-Isrc",
3142 "-Iinclude",
3143 "-UNDEBUG",
3144 "-DXNN_TEST_MODE=1",
3145 ] + select({
3146 ":debug_build": [],
3147 "//conditions:default": xnnpack_min_size_copts(),
3148 }) + select({
3149 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3150 "//conditions:default": [],
3151 }),
3152 gcc_copts = xnnpack_gcc_std_copts(),
3153 msvc_copts = xnnpack_msvc_std_copts(),
3154 deps = [
3155 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3156 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3157 "@FP16",
3158 "@FXdiv",
3159 "@clog",
3160 "@pthreadpool",
3161 ],
3162)
3163
3164xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3165 name = "XNNPACK",
3166 srcs = [
3167 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3168 "src/runtime.c",
3169 "src/subgraph.c",
3170 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3171 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3172 hdrs = ["include/xnnpack.h"],
3173 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3174 "-Isrc",
3175 "-Iinclude",
3176 ] + select({
3177 ":debug_build": [],
3178 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3179 }) + select({
3180 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3181 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3182 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3183 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3184 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3185 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3186 visibility = xnnpack_visibility(),
3187 deps = [
3188 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3189 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3190 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3191 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3192 ":operator_run",
3193 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3194 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3195 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3196 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3197 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3198 ] + select({
3199 ":emscripten": [],
3200 "//conditions:default": ["@cpuinfo"],
3201 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3202)
3203
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3204xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3205 name = "XNNPACK_test_mode",
3206 srcs = [
3207 "src/init.c",
3208 "src/runtime.c",
3209 "src/subgraph.c",
3210 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3211 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3212 hdrs = ["include/xnnpack.h"],
3213 copts = LOGGING_COPTS + [
3214 "-Isrc",
3215 "-Iinclude",
3216 "-UNDEBUG",
3217 "-DXNN_TEST_MODE=1",
3218 ] + select({
3219 ":debug_build": [],
3220 "//conditions:default": xnnpack_min_size_copts(),
3221 }) + select({
3222 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3223 "//conditions:default": [],
3224 }),
3225 gcc_copts = xnnpack_gcc_std_copts(),
3226 includes = ["include"],
3227 msvc_copts = xnnpack_msvc_std_copts(),
3228 visibility = xnnpack_visibility(),
3229 deps = [
3230 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3231 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3232 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3233 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3234 ":operator_run_test_mode",
3235 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3236 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3237 "@clog",
3238 "@FP16",
3239 "@pthreadpool",
3240 ] + select({
3241 ":emscripten": [],
3242 "//conditions:default": ["@cpuinfo"],
3243 }),
3244)
3245
3246xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3247 name = "xnnpack_f32",
3248 srcs = [
3249 "src/init.c",
3250 "src/runtime.c",
3251 "src/subgraph.c",
3252 "src/tensor.c",
3253 ] + SUBGRAPH_SRCS,
3254 hdrs = ["include/xnnpack.h"],
3255 copts = LOGGING_COPTS + [
3256 "-Isrc",
3257 "-Iinclude",
3258 ] + select({
3259 ":debug_build": [],
3260 "//conditions:default": xnnpack_min_size_copts(),
3261 }) + select({
3262 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3263 "//conditions:default": [],
3264 }),
3265 defines = [
3266 "XNN_NO_Q8_OPERATORS",
3267 "XNN_NO_U8_OPERATORS",
3268 "XNN_NO_X8_OPERATORS",
3269 "XNN_NO_F16_OPERATORS",
3270 "XNN_NO_X16_OPERATORS",
3271 ],
3272 gcc_copts = xnnpack_gcc_std_copts(),
3273 includes = ["include"],
3274 msvc_copts = xnnpack_msvc_std_copts(),
3275 visibility = xnnpack_visibility(),
3276 deps = [
3277 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3278 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3279 ":logging_utils",
3280 ":memory_planner",
3281 ":operator_run",
3282 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3283 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3284 "@clog",
3285 "@FP16",
3286 "@pthreadpool",
3287 ] + select({
3288 ":emscripten": [],
3289 "//conditions:default": ["@cpuinfo"],
3290 }),
3291)
3292
3293xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3294 name = "xnnpack_operators_nhwc_f32",
3295 srcs = [
3296 "src/init.c",
3297 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3298 hdrs = ["include/xnnpack.h"],
3299 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3300 "-Isrc",
3301 "-Iinclude",
3302 ] + select({
3303 ":debug_build": [],
3304 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3305 }) + select({
3306 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3307 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3308 }),
3309 defines = [
3310 "XNN_NO_Q8_OPERATORS",
3311 "XNN_NO_U8_OPERATORS",
3312 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3313 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3314 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3315 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3316 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3317 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3318 visibility = xnnpack_visibility(),
3319 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3320 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3321 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3322 ":operator_run",
3323 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3324 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3325 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3326 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3327 ] + select({
3328 ":emscripten": [],
3329 "//conditions:default": ["@cpuinfo"],
3330 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3331)
3332
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3333xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3334 name = "bench_utils",
3335 srcs = ["bench/utils.cc"],
3336 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3337 deps = [
3338 "@com_google_benchmark//:benchmark",
3339 "@cpuinfo",
3340 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3341)
3342
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3343######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3344
3345xnnpack_benchmark(
3346 name = "q8_gemm_bench",
3347 srcs = [
3348 "bench/gemm.h",
3349 "bench/q8-gemm.cc",
3350 "src/xnnpack/AlignedAllocator.h",
3351 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3352 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3353 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3354)
3355
3356xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3357 name = "f16_igemm_bench",
3358 srcs = [
3359 "bench/f16-igemm.cc",
3360 "bench/conv.h",
3361 "bench/google/conv.h",
3362 "src/xnnpack/AlignedAllocator.h",
3363 ] + MICROKERNEL_BENCHMARK_HDRS,
3364 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3365)
3366
3367xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3368 name = "f16_gemm_bench",
3369 srcs = [
3370 "bench/f16-gemm.cc",
3371 "bench/gemm.h",
3372 "src/xnnpack/AlignedAllocator.h",
3373 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3374 deps = MICROKERNEL_BENCHMARK_DEPS,
3375)
3376
3377xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3378 name = "f16_spmm_bench",
3379 srcs = [
3380 "bench/f16-spmm.cc",
3381 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3382 "src/xnnpack/AlignedAllocator.h",
3383 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3384 deps = MICROKERNEL_BENCHMARK_DEPS,
3385)
3386
3387xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3388 name = "f32_igemm_bench",
3389 srcs = [
3390 "bench/f32-igemm.cc",
3391 "bench/conv.h",
3392 "src/xnnpack/AlignedAllocator.h",
3393 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3394 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3395)
3396
3397xnnpack_benchmark(
3398 name = "f32_conv_hwc_bench",
3399 srcs = [
3400 "bench/f32-conv-hwc.cc",
3401 "bench/dconv.h",
3402 "src/xnnpack/AlignedAllocator.h",
3403 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3404 deps = MICROKERNEL_BENCHMARK_DEPS,
3405)
3406
3407xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3408 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3409 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3410 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3411 "bench/dconv.h",
3412 "src/xnnpack/AlignedAllocator.h",
3413 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3414 deps = MICROKERNEL_BENCHMARK_DEPS,
3415)
3416
3417xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3418 name = "f16_dwconv_bench",
3419 srcs = [
3420 "bench/f16-dwconv.cc",
3421 "bench/dwconv.h",
3422 "bench/google/dwconv.h",
3423 "src/xnnpack/AlignedAllocator.h",
3424 ] + MICROKERNEL_BENCHMARK_HDRS,
3425 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3426)
3427
3428xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3429 name = "f32_dwconv_bench",
3430 srcs = [
3431 "bench/f32-dwconv.cc",
3432 "bench/dwconv.h",
3433 "src/xnnpack/AlignedAllocator.h",
3434 ] + MICROKERNEL_BENCHMARK_HDRS,
3435 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3436)
3437
3438xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3439 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3440 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3441 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3442 "bench/dwconv.h",
3443 "src/xnnpack/AlignedAllocator.h",
3444 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3445 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3446)
3447
3448xnnpack_benchmark(
3449 name = "f32_gemm_bench",
3450 srcs = [
3451 "bench/f32-gemm.cc",
3452 "bench/gemm.h",
3453 "src/xnnpack/AlignedAllocator.h",
3454 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3455 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3456 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3457)
3458
3459xnnpack_benchmark(
Marat Dukhana11ca342020-06-25 23:45:07 -0700[diff] [blame]3460 name = "f32_hswish_bench",
3461 srcs = [
3462 "bench/f32-hswish.cc",
3463 "src/xnnpack/AlignedAllocator.h",
3464 ] + MICROKERNEL_BENCHMARK_HDRS,
3465 deps = MICROKERNEL_BENCHMARK_DEPS,
3466)
3467
3468xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3469 name = "f32_raddexpminusmax_bench",
3470 srcs = [
3471 "bench/f32-raddexpminusmax.cc",
3472 "src/xnnpack/AlignedAllocator.h",
3473 ] + MICROKERNEL_BENCHMARK_HDRS,
3474 deps = MICROKERNEL_BENCHMARK_DEPS,
3475)
3476
3477xnnpack_benchmark(
3478 name = "f32_raddextexp_bench",
3479 srcs = [
3480 "bench/f32-raddextexp.cc",
3481 "src/xnnpack/AlignedAllocator.h",
3482 ] + MICROKERNEL_BENCHMARK_HDRS,
3483 deps = MICROKERNEL_BENCHMARK_DEPS,
3484)
3485
3486xnnpack_benchmark(
3487 name = "f32_raddstoreexpminusmax_bench",
3488 srcs = [
3489 "bench/f32-raddstoreexpminusmax.cc",
3490 "src/xnnpack/AlignedAllocator.h",
3491 ] + MICROKERNEL_BENCHMARK_HDRS,
3492 deps = MICROKERNEL_BENCHMARK_DEPS,
3493)
3494
3495xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3496 name = "f32_rmax_bench",
3497 srcs = [
3498 "bench/f32-rmax.cc",
3499 "src/xnnpack/AlignedAllocator.h",
3500 ] + MICROKERNEL_BENCHMARK_HDRS,
3501 deps = MICROKERNEL_BENCHMARK_DEPS,
3502)
3503
3504xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3505 name = "f32_sigmoid_bench",
3506 srcs = [
3507 "bench/f32-sigmoid.cc",
3508 "src/xnnpack/AlignedAllocator.h",
3509 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3510 deps = MICROKERNEL_BENCHMARK_DEPS,
3511)
3512
3513xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3514 name = "f32_spmm_bench",
3515 srcs = [
3516 "bench/f32-spmm.cc",
3517 "bench/gemm.h",
3518 "src/xnnpack/AlignedAllocator.h",
3519 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3520 deps = MICROKERNEL_BENCHMARK_DEPS,
3521)
3522
3523xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3524 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3525 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3526 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3527 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3528 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3529 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3530)
3531
3532xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3533 name = "f32_vscaleexpminusmax_bench",
3534 srcs = [
3535 "bench/f32-vscaleexpminusmax.cc",
3536 "src/xnnpack/AlignedAllocator.h",
3537 ] + MICROKERNEL_BENCHMARK_HDRS,
3538 deps = MICROKERNEL_BENCHMARK_DEPS,
3539)
3540
3541xnnpack_benchmark(
3542 name = "f32_vscaleextexp_bench",
3543 srcs = [
3544 "bench/f32-vscaleextexp.cc",
3545 "src/xnnpack/AlignedAllocator.h",
3546 ] + MICROKERNEL_BENCHMARK_HDRS,
3547 deps = MICROKERNEL_BENCHMARK_DEPS,
3548)
3549
3550xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3551 name = "f32_im2col_gemm_bench",
3552 srcs = [
3553 "bench/f32-im2col-gemm.cc",
3554 "bench/conv.h",
3555 "src/xnnpack/AlignedAllocator.h",
3556 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3557 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3558)
3559
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3560xnnpack_benchmark(
3561 name = "requantization_bench",
3562 srcs = [
3563 "bench/requantization.cc",
3564 "src/xnnpack/requantization-stubs.h",
3565 "src/xnnpack/AlignedAllocator.h",
3566 ] + MICROKERNEL_BENCHMARK_HDRS,
3567 deps = MICROKERNEL_BENCHMARK_DEPS,
3568)
3569
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3570xnnpack_benchmark(
3571 name = "rounding_bench",
3572 srcs = [
3573 "bench/rounding.cc",
3574 "src/xnnpack/math-stubs.h",
3575 "src/xnnpack/AlignedAllocator.h",
3576 ] + MICROKERNEL_BENCHMARK_HDRS,
3577 deps = MICROKERNEL_BENCHMARK_DEPS,
3578)
3579
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3580########################### Benchmarks for operators ###########################
3581
3582xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3583 name = "average_pooling_bench",
3584 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3585 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3586 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3587 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3588)
3589
3590xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3591 name = "bankers_rounding_bench",
3592 srcs = ["bench/bankers-rounding.cc"],
3593 copts = xnnpack_optional_tflite_copts(),
3594 tags = ["nowin32"],
3595 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3596)
3597
3598xnnpack_benchmark(
3599 name = "ceiling_bench",
3600 srcs = ["bench/ceiling.cc"],
3601 copts = xnnpack_optional_tflite_copts(),
3602 tags = ["nowin32"],
3603 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3604)
3605
3606xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3607 name = "channel_shuffle_bench",
3608 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3609 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3610)
3611
3612xnnpack_benchmark(
3613 name = "convolution_bench",
3614 srcs = ["bench/convolution.cc"],
3615 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3616 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3617 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3618)
3619
3620xnnpack_benchmark(
3621 name = "deconvolution_bench",
3622 srcs = ["bench/deconvolution.cc"],
3623 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3624 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3625 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3626)
3627
3628xnnpack_benchmark(
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3629 name = "floor_bench",
3630 srcs = ["bench/floor.cc"],
3631 copts = xnnpack_optional_tflite_copts(),
3632 tags = ["nowin32"],
3633 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3634)
3635
3636xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3637 name = "global_average_pooling_bench",
3638 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3639 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3640)
3641
3642xnnpack_benchmark(
Marat Dukhanad352602020-06-25 21:50:54 -0700[diff] [blame]3643 name = "hardswish_bench",
3644 srcs = ["bench/hardswish.cc"],
3645 copts = xnnpack_optional_tflite_copts(),
3646 tags = ["nowin32"],
3647 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
3648)
3649
3650xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3651 name = "max_pooling_bench",
3652 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3653 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3654)
3655
3656xnnpack_benchmark(
3657 name = "sigmoid_bench",
3658 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3659 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3660 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3661 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3662)
3663
3664xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3665 name = "prelu_bench",
3666 srcs = ["bench/prelu.cc"],
3667 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3668 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3669 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3670)
3671
3672xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3673 name = "softmax_bench",
3674 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3675 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3676 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3677 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3678)
3679
Marat Dukhan87727142020-06-24 15:24:10 -0700[diff] [blame]3680xnnpack_benchmark(
3681 name = "truncation_bench",
3682 srcs = ["bench/truncation.cc"],
3683 deps = OPERATOR_BENCHMARK_DEPS,
3684)
3685
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3686############################# End-to-end benchmarks ############################
3687
3688cc_library(
3689 name = "mobilenet_v1",
3690 srcs = ["models/mobilenet-v1.cc"],
3691 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3692 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3693 linkstatic = True,
3694 deps = [
3695 ":XNNPACK",
3696 "@pthreadpool",
3697 ],
3698)
3699
3700cc_library(
3701 name = "mobilenet_v2",
3702 srcs = ["models/mobilenet-v2.cc"],
3703 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3704 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3705 linkstatic = True,
3706 deps = [
3707 ":XNNPACK",
3708 "@pthreadpool",
3709 ],
3710)
3711
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3712cc_library(
3713 name = "mobilenet_v3_large",
3714 srcs = ["models/mobilenet-v3-large.cc"],
3715 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3716 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3717 linkstatic = True,
3718 deps = [
3719 ":XNNPACK",
3720 "@pthreadpool",
3721 ],
3722)
3723
3724cc_library(
3725 name = "mobilenet_v3_small",
3726 srcs = ["models/mobilenet-v3-small.cc"],
3727 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3728 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3729 linkstatic = True,
3730 deps = [
3731 ":XNNPACK",
3732 "@pthreadpool",
3733 ],
3734)
3735
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3736xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3737 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3738 srcs = [
3739 "bench/f32-dwconv-e2e.cc",
3740 "bench/end2end.h",
3741 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3742 deps = MICROKERNEL_BENCHMARK_DEPS + [
3743 ":XNNPACK",
3744 ":mobilenet_v1",
3745 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3746 ":mobilenet_v3_large",
3747 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3748 ],
3749)
3750
3751xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3752 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3753 srcs = [
3754 "bench/f32-gemm-e2e.cc",
3755 "bench/end2end.h",
3756 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3757 deps = MICROKERNEL_BENCHMARK_DEPS + [
3758 ":XNNPACK",
3759 ":mobilenet_v1",
3760 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3761 ":mobilenet_v3_large",
3762 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3763 ],
3764)
3765
3766xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3767 name = "end2end_bench",
3768 srcs = ["bench/end2end.cc"],
3769 deps = [
3770 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3771 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3772 ":mobilenet_v1",
3773 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3774 ":mobilenet_v3_large",
3775 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3776 "@pthreadpool",
3777 ],
3778)
3779
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3780#################### Accuracy evaluation for math functions ####################
3781
3782xnnpack_benchmark(
3783 name = "f32_exp_eval",
3784 srcs = [
3785 "eval/f32-exp.cc",
3786 "src/xnnpack/AlignedAllocator.h",
3787 ] + ACCURACY_EVAL_HDRS,
3788 deps = ACCURACY_EVAL_DEPS,
3789)
3790
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3791xnnpack_benchmark(
3792 name = "f32_expminus_eval",
3793 srcs = [
3794 "eval/f32-expminus.cc",
3795 "src/xnnpack/AlignedAllocator.h",
3796 ] + ACCURACY_EVAL_HDRS,
3797 deps = ACCURACY_EVAL_DEPS,
3798)
3799
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3800xnnpack_benchmark(
3801 name = "f32_extexp_eval",
3802 srcs = [
3803 "eval/f32-extexp.cc",
3804 "src/xnnpack/AlignedAllocator.h",
3805 ] + ACCURACY_EVAL_HDRS,
3806 deps = ACCURACY_EVAL_DEPS,
3807)
3808
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3809xnnpack_unit_test(
3810 name = "f32_roundne_eval",
3811 srcs = [
3812 "eval/f32-roundne.cc",
3813 "src/xnnpack/AlignedAllocator.h",
3814 "src/xnnpack/math-stubs.h",
3815 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3816 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3817 deps = MICROKERNEL_TEST_DEPS,
3818)
3819
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3820xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3821 name = "f32_roundd_eval",
3822 srcs = [
3823 "eval/f32-roundd.cc",
3824 "src/xnnpack/AlignedAllocator.h",
3825 "src/xnnpack/math-stubs.h",
3826 ] + MICROKERNEL_TEST_HDRS,
3827 automatic = False,
3828 deps = MICROKERNEL_TEST_DEPS,
3829)
3830
3831xnnpack_unit_test(
3832 name = "f32_roundu_eval",
3833 srcs = [
3834 "eval/f32-roundu.cc",
3835 "src/xnnpack/AlignedAllocator.h",
3836 "src/xnnpack/math-stubs.h",
3837 ] + MICROKERNEL_TEST_HDRS,
3838 automatic = False,
3839 deps = MICROKERNEL_TEST_DEPS,
3840)
3841
3842xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3843 name = "f32_roundz_eval",
3844 srcs = [
3845 "eval/f32-roundz.cc",
3846 "src/xnnpack/AlignedAllocator.h",
3847 "src/xnnpack/math-stubs.h",
3848 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3849 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3850 deps = MICROKERNEL_TEST_DEPS,
3851)
3852
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3853xnnpack_benchmark(
3854 name = "f32_sigmoid_eval",
3855 srcs = [
3856 "eval/f32-sigmoid.cc",
3857 "src/xnnpack/AlignedAllocator.h",
3858 ] + ACCURACY_EVAL_HDRS,
3859 deps = ACCURACY_EVAL_DEPS,
3860)
3861
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3862######################### Unit tests for micro-kernels #########################
3863
3864xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3865 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3866 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3867 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3868 "test/gemm-microkernel-tester.h",
3869 "src/xnnpack/AlignedAllocator.h",
3870 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3871 deps = MICROKERNEL_TEST_DEPS,
3872)
3873
3874xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3875 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3876 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3877 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3878 "test/spmm-microkernel-tester.h",
3879 "src/xnnpack/AlignedAllocator.h",
3880 ] + MICROKERNEL_TEST_HDRS,
3881 deps = MICROKERNEL_TEST_DEPS,
3882)
3883
3884xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3885 name = "f32_argmaxpool_test",
3886 srcs = [
3887 "test/f32-argmaxpool.cc",
3888 "test/argmaxpool-microkernel-tester.h",
3889 "src/xnnpack/AlignedAllocator.h",
3890 ] + MICROKERNEL_TEST_HDRS,
3891 deps = MICROKERNEL_TEST_DEPS,
3892)
3893
3894xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3895 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3896 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3897 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3898 "test/avgpool-microkernel-tester.h",
3899 "src/xnnpack/AlignedAllocator.h",
3900 ] + MICROKERNEL_TEST_HDRS,
3901 deps = MICROKERNEL_TEST_DEPS,
3902)
3903
3904xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3905 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3906 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3907 "test/f32-ibilinear.cc",
3908 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3909 "src/xnnpack/AlignedAllocator.h",
3910 ] + MICROKERNEL_TEST_HDRS,
3911 deps = MICROKERNEL_TEST_DEPS,
3912)
3913
3914xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3915 name = "f16_clamp_test",
3916 srcs = [
3917 "test/f16-clamp.cc",
3918 "test/clamp-microkernel-tester.h",
3919 ] + MICROKERNEL_TEST_HDRS,
3920 deps = MICROKERNEL_TEST_DEPS,
3921)
3922
3923xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3924 name = "f32_clamp_test",
3925 srcs = [
3926 "test/f32-clamp.cc",
3927 "test/clamp-microkernel-tester.h",
3928 ] + MICROKERNEL_TEST_HDRS,
3929 deps = MICROKERNEL_TEST_DEPS,
3930)
3931
3932xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3933 name = "f32_igemm_test",
3934 srcs = [
3935 "test/f32-igemm.cc",
3936 "test/gemm-microkernel-tester.h",
3937 "src/xnnpack/AlignedAllocator.h",
3938 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3939 deps = MICROKERNEL_TEST_DEPS,
3940)
3941
3942xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3943 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3944 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3945 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3946 "test/gemm-microkernel-tester.h",
3947 "src/xnnpack/AlignedAllocator.h",
3948 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3949 deps = MICROKERNEL_TEST_DEPS,
3950)
3951
3952xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3953 name = "f32_igemm_minmax_test",
3954 srcs = [
3955 "test/f32-igemm-minmax.cc",
3956 "test/gemm-microkernel-tester.h",
3957 "src/xnnpack/AlignedAllocator.h",
3958 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3959 deps = MICROKERNEL_TEST_DEPS,
3960)
3961
3962xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3963 name = "f16_igemm_minmax_test",
3964 srcs = [
3965 "test/f16-igemm-minmax.cc",
3966 "test/gemm-microkernel-tester.h",
3967 "src/xnnpack/AlignedAllocator.h",
3968 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3969 deps = MICROKERNEL_TEST_DEPS,
3970)
3971
3972xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3973 name = "f32_conv_hwc_test",
3974 srcs = [
3975 "test/f32-conv-hwc.cc",
3976 "test/conv-hwc-microkernel-tester.h",
3977 "src/xnnpack/AlignedAllocator.h",
3978 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3979 deps = MICROKERNEL_TEST_DEPS,
3980)
3981
3982xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3983 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3984 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3985 "test/f32-conv-hwc2chw.cc",
3986 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3987 "src/xnnpack/AlignedAllocator.h",
3988 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3989 deps = MICROKERNEL_TEST_DEPS,
3990)
3991
3992xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3993 name = "f32_dwconv_test",
3994 srcs = [
3995 "test/f32-dwconv.cc",
3996 "test/dwconv-microkernel-tester.h",
3997 "src/xnnpack/AlignedAllocator.h",
3998 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3999 deps = MICROKERNEL_TEST_DEPS,
4000)
4001
4002xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]4003 name = "f16_dwconv_minmax_test",
4004 srcs = [
4005 "test/f16-dwconv-minmax.cc",
4006 "test/dwconv-microkernel-tester.h",
4007 "src/xnnpack/AlignedAllocator.h",
4008 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4009 deps = MICROKERNEL_TEST_DEPS,
4010)
4011
4012xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4013 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4014 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4015 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4016 "test/dwconv-microkernel-tester.h",
4017 "src/xnnpack/AlignedAllocator.h",
4018 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4019 deps = MICROKERNEL_TEST_DEPS,
4020)
4021
4022xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4023 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4024 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4025 "test/f32-dwconv-chw.cc",
4026 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4027 "src/xnnpack/AlignedAllocator.h",
4028 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4029 deps = MICROKERNEL_TEST_DEPS,
4030)
4031
4032xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]4033 name = "f16_gavgpool_minmax_test",
4034 srcs = [
4035 "test/f16-gavgpool-minmax.cc",
4036 "test/gavgpool-microkernel-tester.h",
4037 "src/xnnpack/AlignedAllocator.h",
4038 ] + MICROKERNEL_TEST_HDRS,
4039 deps = MICROKERNEL_TEST_DEPS,
4040)
4041
4042xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4043 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4044 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4045 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4046 "test/gavgpool-microkernel-tester.h",
4047 "src/xnnpack/AlignedAllocator.h",
4048 ] + MICROKERNEL_TEST_HDRS,
4049 deps = MICROKERNEL_TEST_DEPS,
4050)
4051
4052xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4053 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4054 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]4055 "test/f32-gavgpool-cw.cc",
4056 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4057 "src/xnnpack/AlignedAllocator.h",
4058 ] + MICROKERNEL_TEST_HDRS,
4059 deps = MICROKERNEL_TEST_DEPS,
4060)
4061
4062xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]4063 name = "f32_gemm_test",
4064 srcs = [
4065 "test/f32-gemm.cc",
4066 "test/gemm-microkernel-tester.h",
4067 "src/xnnpack/AlignedAllocator.h",
4068 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4069 deps = MICROKERNEL_TEST_DEPS,
4070)
4071
4072xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]4073 name = "f32_gemm_relu_test",
4074 srcs = [
4075 "test/f32-gemm-relu.cc",
4076 "test/gemm-microkernel-tester.h",
4077 "src/xnnpack/AlignedAllocator.h",
4078 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4079 deps = MICROKERNEL_TEST_DEPS,
4080)
4081
4082xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4083 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4084 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4085 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4086 "test/gemm-microkernel-tester.h",
4087 "src/xnnpack/AlignedAllocator.h",
4088 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4089 deps = MICROKERNEL_TEST_DEPS,
4090)
4091
4092xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4093 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4094 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4095 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4096 "test/gemm-microkernel-tester.h",
4097 "src/xnnpack/AlignedAllocator.h",
4098 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4099 deps = MICROKERNEL_TEST_DEPS,
4100)
4101
4102xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4103 name = "f16_hswish_test",
4104 srcs = [
4105 "test/f16-hswish.cc",
4106 "test/hswish-microkernel-tester.h",
4107 ] + MICROKERNEL_TEST_HDRS,
4108 deps = MICROKERNEL_TEST_DEPS,
4109)
4110
4111xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4112 name = "f32_hswish_test",
4113 srcs = [
4114 "test/f32-hswish.cc",
4115 "test/hswish-microkernel-tester.h",
4116 ] + MICROKERNEL_TEST_HDRS,
4117 deps = MICROKERNEL_TEST_DEPS,
4118)
4119
4120xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4121 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4122 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4123 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4124 "test/maxpool-microkernel-tester.h",
4125 ] + MICROKERNEL_TEST_HDRS,
4126 deps = MICROKERNEL_TEST_DEPS,
4127)
4128
4129xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4130 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4131 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4132 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4133 "test/avgpool-microkernel-tester.h",
4134 "src/xnnpack/AlignedAllocator.h",
4135 ] + MICROKERNEL_TEST_HDRS,
4136 deps = MICROKERNEL_TEST_DEPS,
4137)
4138
4139xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4140 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4141 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4142 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4143 "test/gemm-microkernel-tester.h",
4144 "src/xnnpack/AlignedAllocator.h",
4145 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4146 deps = MICROKERNEL_TEST_DEPS,
4147)
4148
4149xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4150 name = "f16_prelu_test",
4151 srcs = [
4152 "test/f16-prelu.cc",
4153 "test/prelu-microkernel-tester.h",
4154 "src/xnnpack/AlignedAllocator.h",
4155 ] + MICROKERNEL_TEST_HDRS,
4156 deps = MICROKERNEL_TEST_DEPS,
4157)
4158
4159xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4160 name = "f32_prelu_test",
4161 srcs = [
4162 "test/f32-prelu.cc",
4163 "test/prelu-microkernel-tester.h",
4164 "src/xnnpack/AlignedAllocator.h",
4165 ] + MICROKERNEL_TEST_HDRS,
4166 deps = MICROKERNEL_TEST_DEPS,
4167)
4168
4169xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4170 name = "f32_raddexpminusmax_test",
4171 srcs = [
4172 "test/f32-raddexpminusmax.cc",
4173 "test/raddexpminusmax-microkernel-tester.h",
4174 ] + MICROKERNEL_TEST_HDRS,
4175 deps = MICROKERNEL_TEST_DEPS,
4176)
4177
4178xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4179 name = "f32_raddextexp_test",
4180 srcs = [
4181 "test/f32-raddextexp.cc",
4182 "test/raddextexp-microkernel-tester.h",
4183 ] + MICROKERNEL_TEST_HDRS,
4184 deps = MICROKERNEL_TEST_DEPS,
4185)
4186
4187xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4188 name = "f32_raddstoreexpminusmax_test",
4189 srcs = [
4190 "test/f32-raddstoreexpminusmax.cc",
4191 "test/raddstoreexpminusmax-microkernel-tester.h",
4192 ] + MICROKERNEL_TEST_HDRS,
4193 deps = MICROKERNEL_TEST_DEPS,
4194)
4195
4196xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4197 name = "f32_rmax_test",
4198 srcs = [
4199 "test/f32-rmax.cc",
4200 "test/rmax-microkernel-tester.h",
4201 ] + MICROKERNEL_TEST_HDRS,
4202 deps = MICROKERNEL_TEST_DEPS,
4203)
4204
4205xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4206 name = "f32_sigmoid_test",
4207 srcs = [
4208 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4209 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4210 ] + MICROKERNEL_TEST_HDRS,
4211 deps = MICROKERNEL_TEST_DEPS,
4212)
4213
4214xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4215 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4216 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4217 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4218 "test/spmm-microkernel-tester.h",
4219 "src/xnnpack/AlignedAllocator.h",
4220 ] + MICROKERNEL_TEST_HDRS,
4221 deps = MICROKERNEL_TEST_DEPS,
4222)
4223
4224xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4225 name = "f16_vadd_minmax_test",
4226 srcs = [
4227 "test/f16-vadd-minmax.cc",
4228 "test/vbinary-microkernel-tester.h",
4229 ] + MICROKERNEL_TEST_HDRS,
4230 deps = MICROKERNEL_TEST_DEPS,
4231)
4232
4233xnnpack_unit_test(
4234 name = "f16_vaddc_minmax_test",
4235 srcs = [
4236 "test/f16-vaddc-minmax.cc",
4237 "test/vbinaryc-microkernel-tester.h",
4238 ] + MICROKERNEL_TEST_HDRS,
4239 deps = MICROKERNEL_TEST_DEPS,
4240)
4241
4242xnnpack_unit_test(
4243 name = "f16_vdiv_minmax_test",
4244 srcs = [
4245 "test/f16-vdiv-minmax.cc",
4246 "test/vbinary-microkernel-tester.h",
4247 ] + MICROKERNEL_TEST_HDRS,
4248 deps = MICROKERNEL_TEST_DEPS,
4249)
4250
4251xnnpack_unit_test(
4252 name = "f16_vdivc_minmax_test",
4253 srcs = [
4254 "test/f16-vdivc-minmax.cc",
4255 "test/vbinaryc-microkernel-tester.h",
4256 ] + MICROKERNEL_TEST_HDRS,
4257 deps = MICROKERNEL_TEST_DEPS,
4258)
4259
4260xnnpack_unit_test(
4261 name = "f16_vrdivc_minmax_test",
4262 srcs = [
4263 "test/f16-vrdivc-minmax.cc",
4264 "test/vbinaryc-microkernel-tester.h",
4265 ] + MICROKERNEL_TEST_HDRS,
4266 deps = MICROKERNEL_TEST_DEPS,
4267)
4268
4269xnnpack_unit_test(
4270 name = "f16_vmax_test",
4271 srcs = [
4272 "test/f16-vmax.cc",
4273 "test/vbinary-microkernel-tester.h",
4274 ] + MICROKERNEL_TEST_HDRS,
4275 deps = MICROKERNEL_TEST_DEPS,
4276)
4277
4278xnnpack_unit_test(
4279 name = "f16_vmaxc_test",
4280 srcs = [
4281 "test/f16-vmaxc.cc",
4282 "test/vbinaryc-microkernel-tester.h",
4283 ] + MICROKERNEL_TEST_HDRS,
4284 deps = MICROKERNEL_TEST_DEPS,
4285)
4286
4287xnnpack_unit_test(
4288 name = "f16_vmin_test",
4289 srcs = [
4290 "test/f16-vmin.cc",
4291 "test/vbinary-microkernel-tester.h",
4292 ] + MICROKERNEL_TEST_HDRS,
4293 deps = MICROKERNEL_TEST_DEPS,
4294)
4295
4296xnnpack_unit_test(
4297 name = "f16_vminc_test",
4298 srcs = [
4299 "test/f16-vminc.cc",
4300 "test/vbinaryc-microkernel-tester.h",
4301 ] + MICROKERNEL_TEST_HDRS,
4302 deps = MICROKERNEL_TEST_DEPS,
4303)
4304
4305xnnpack_unit_test(
4306 name = "f16_vmul_minmax_test",
4307 srcs = [
4308 "test/f16-vmul-minmax.cc",
4309 "test/vbinary-microkernel-tester.h",
4310 ] + MICROKERNEL_TEST_HDRS,
4311 deps = MICROKERNEL_TEST_DEPS,
4312)
4313
4314xnnpack_unit_test(
4315 name = "f16_vmulc_minmax_test",
4316 srcs = [
4317 "test/f16-vmulc-minmax.cc",
4318 "test/vbinaryc-microkernel-tester.h",
4319 ] + MICROKERNEL_TEST_HDRS,
4320 deps = MICROKERNEL_TEST_DEPS,
4321)
4322
4323xnnpack_unit_test(
4324 name = "f16_vsub_minmax_test",
4325 srcs = [
4326 "test/f16-vsub-minmax.cc",
4327 "test/vbinary-microkernel-tester.h",
4328 ] + MICROKERNEL_TEST_HDRS,
4329 deps = MICROKERNEL_TEST_DEPS,
4330)
4331
4332xnnpack_unit_test(
4333 name = "f16_vsubc_minmax_test",
4334 srcs = [
4335 "test/f16-vsubc-minmax.cc",
4336 "test/vbinaryc-microkernel-tester.h",
4337 ] + MICROKERNEL_TEST_HDRS,
4338 deps = MICROKERNEL_TEST_DEPS,
4339)
4340
4341xnnpack_unit_test(
4342 name = "f16_vrsubc_minmax_test",
4343 srcs = [
4344 "test/f16-vrsubc-minmax.cc",
4345 "test/vbinaryc-microkernel-tester.h",
4346 ] + MICROKERNEL_TEST_HDRS,
4347 deps = MICROKERNEL_TEST_DEPS,
4348)
4349
4350xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4351 name = "f32_vabs_test",
4352 srcs = [
4353 "test/f32-vabs.cc",
4354 "test/vunary-microkernel-tester.h",
4355 ] + MICROKERNEL_TEST_HDRS,
4356 deps = MICROKERNEL_TEST_DEPS,
4357)
4358
4359xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4360 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4361 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4362 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4363 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4364 ] + MICROKERNEL_TEST_HDRS,
4365 deps = MICROKERNEL_TEST_DEPS,
4366)
4367
4368xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4369 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4370 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4371 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4372 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4373 ] + MICROKERNEL_TEST_HDRS,
4374 deps = MICROKERNEL_TEST_DEPS,
4375)
4376
4377xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4378 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4379 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4380 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4381 "test/vbinary-microkernel-tester.h",
4382 ] + MICROKERNEL_TEST_HDRS,
4383 deps = MICROKERNEL_TEST_DEPS,
4384)
4385
4386xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4387 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4388 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4389 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4390 "test/vbinaryc-microkernel-tester.h",
4391 ] + MICROKERNEL_TEST_HDRS,
4392 deps = MICROKERNEL_TEST_DEPS,
4393)
4394
4395xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4396 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4397 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4398 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4399 "test/vbinaryc-microkernel-tester.h",
4400 ] + MICROKERNEL_TEST_HDRS,
4401 deps = MICROKERNEL_TEST_DEPS,
4402)
4403
4404xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4405 name = "f32_vmax_test",
4406 srcs = [
4407 "test/f32-vmax.cc",
4408 "test/vbinary-microkernel-tester.h",
4409 ] + MICROKERNEL_TEST_HDRS,
4410 deps = MICROKERNEL_TEST_DEPS,
4411)
4412
4413xnnpack_unit_test(
4414 name = "f32_vmaxc_test",
4415 srcs = [
4416 "test/f32-vmaxc.cc",
4417 "test/vbinaryc-microkernel-tester.h",
4418 ] + MICROKERNEL_TEST_HDRS,
4419 deps = MICROKERNEL_TEST_DEPS,
4420)
4421
4422xnnpack_unit_test(
4423 name = "f32_vmin_test",
4424 srcs = [
4425 "test/f32-vmin.cc",
4426 "test/vbinary-microkernel-tester.h",
4427 ] + MICROKERNEL_TEST_HDRS,
4428 deps = MICROKERNEL_TEST_DEPS,
4429)
4430
4431xnnpack_unit_test(
4432 name = "f32_vminc_test",
4433 srcs = [
4434 "test/f32-vminc.cc",
4435 "test/vbinaryc-microkernel-tester.h",
4436 ] + MICROKERNEL_TEST_HDRS,
4437 deps = MICROKERNEL_TEST_DEPS,
4438)
4439
4440xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4441 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4442 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4443 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4444 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4445 ] + MICROKERNEL_TEST_HDRS,
4446 deps = MICROKERNEL_TEST_DEPS,
4447)
4448
4449xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4450 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4451 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4452 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4453 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4454 ] + MICROKERNEL_TEST_HDRS,
4455 deps = MICROKERNEL_TEST_DEPS,
4456)
4457
4458xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4459 name = "f16_vmulcaddc_minmax_test",
4460 srcs = [
4461 "test/f16-vmulcaddc-minmax.cc",
4462 "test/vmulcaddc-microkernel-tester.h",
4463 "src/xnnpack/AlignedAllocator.h",
4464 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4465 deps = MICROKERNEL_TEST_DEPS,
4466)
4467
4468xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4469 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4470 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4471 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4472 "test/vmulcaddc-microkernel-tester.h",
4473 "src/xnnpack/AlignedAllocator.h",
4474 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4475 deps = MICROKERNEL_TEST_DEPS,
4476)
4477
4478xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4479 name = "f32_vlrelu_test",
4480 srcs = [
4481 "test/f32-vlrelu.cc",
4482 "test/vunary-microkernel-tester.h",
4483 ] + MICROKERNEL_TEST_HDRS,
4484 deps = MICROKERNEL_TEST_DEPS,
4485)
4486
4487xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4488 name = "f32_vneg_test",
4489 srcs = [
4490 "test/f32-vneg.cc",
4491 "test/vunary-microkernel-tester.h",
4492 ] + MICROKERNEL_TEST_HDRS,
4493 deps = MICROKERNEL_TEST_DEPS,
4494)
4495
4496xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4497 name = "f32_vrndne_test",
4498 srcs = [
4499 "test/f32-vrndne.cc",
4500 "test/vunary-microkernel-tester.h",
4501 ] + MICROKERNEL_TEST_HDRS,
4502 deps = MICROKERNEL_TEST_DEPS,
4503)
4504
4505xnnpack_unit_test(
4506 name = "f32_vrndz_test",
4507 srcs = [
4508 "test/f32-vrndz.cc",
4509 "test/vunary-microkernel-tester.h",
4510 ] + MICROKERNEL_TEST_HDRS,
4511 deps = MICROKERNEL_TEST_DEPS,
4512)
4513
4514xnnpack_unit_test(
4515 name = "f32_vrndu_test",
4516 srcs = [
4517 "test/f32-vrndu.cc",
4518 "test/vunary-microkernel-tester.h",
4519 ] + MICROKERNEL_TEST_HDRS,
4520 deps = MICROKERNEL_TEST_DEPS,
4521)
4522
4523xnnpack_unit_test(
4524 name = "f32_vrndd_test",
4525 srcs = [
4526 "test/f32-vrndd.cc",
4527 "test/vunary-microkernel-tester.h",
4528 ] + MICROKERNEL_TEST_HDRS,
4529 deps = MICROKERNEL_TEST_DEPS,
4530)
4531
4532xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4533 name = "f32_vscale_test",
4534 srcs = [
4535 "test/f32-vscale.cc",
4536 "test/vscale-microkernel-tester.h",
4537 ] + MICROKERNEL_TEST_HDRS,
4538 deps = MICROKERNEL_TEST_DEPS,
4539)
4540
4541xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4542 name = "f32_vscaleexpminusmax_test",
4543 srcs = [
4544 "test/f32-vscaleexpminusmax.cc",
4545 "test/vscaleexpminusmax-microkernel-tester.h",
4546 ] + MICROKERNEL_TEST_HDRS,
4547 deps = MICROKERNEL_TEST_DEPS,
4548)
4549
4550xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4551 name = "f32_vscaleextexp_test",
4552 srcs = [
4553 "test/f32-vscaleextexp.cc",
4554 "test/vscaleextexp-microkernel-tester.h",
4555 ] + MICROKERNEL_TEST_HDRS,
4556 deps = MICROKERNEL_TEST_DEPS,
4557)
4558
4559xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4560 name = "f32_vsqr_test",
4561 srcs = [
4562 "test/f32-vsqr.cc",
4563 "test/vunary-microkernel-tester.h",
4564 ] + MICROKERNEL_TEST_HDRS,
4565 deps = MICROKERNEL_TEST_DEPS,
4566)
4567
4568xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4569 name = "f32_vsqrdiff_test",
4570 srcs = [
4571 "test/f32-vsqrdiff.cc",
4572 "test/vbinary-microkernel-tester.h",
4573 ] + MICROKERNEL_TEST_HDRS,
4574 deps = MICROKERNEL_TEST_DEPS,
4575)
4576
4577xnnpack_unit_test(
4578 name = "f32_vsqrdiffc_test",
4579 srcs = [
4580 "test/f32-vsqrdiffc.cc",
4581 "test/vbinaryc-microkernel-tester.h",
4582 ] + MICROKERNEL_TEST_HDRS,
4583 deps = MICROKERNEL_TEST_DEPS,
4584)
4585
4586xnnpack_unit_test(
4587 name = "f32_vrsqrdiffc_test",
4588 srcs = [
4589 "test/f32-vrsqrdiffc.cc",
4590 "test/vbinaryc-microkernel-tester.h",
4591 ] + MICROKERNEL_TEST_HDRS,
4592 deps = MICROKERNEL_TEST_DEPS,
4593)
4594
4595xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4596 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4597 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4598 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4599 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4600 ] + MICROKERNEL_TEST_HDRS,
4601 deps = MICROKERNEL_TEST_DEPS,
4602)
4603
4604xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4605 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4606 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4607 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4608 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4609 ] + MICROKERNEL_TEST_HDRS,
4610 deps = MICROKERNEL_TEST_DEPS,
4611)
4612
4613xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4614 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4615 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4616 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4617 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4618 ] + MICROKERNEL_TEST_HDRS,
4619 deps = MICROKERNEL_TEST_DEPS,
4620)
4621
4622xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4623 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4624 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4625 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4626 "test/avgpool-microkernel-tester.h",
4627 "src/xnnpack/AlignedAllocator.h",
4628 ] + MICROKERNEL_TEST_HDRS,
4629 deps = MICROKERNEL_TEST_DEPS,
4630)
4631
4632xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4633 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4634 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4635 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4636 "test/gemm-microkernel-tester.h",
4637 "src/xnnpack/AlignedAllocator.h",
4638 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4639 deps = MICROKERNEL_TEST_DEPS,
4640)
4641
4642xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4643 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4644 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4645 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4646 "test/dwconv-microkernel-tester.h",
4647 "src/xnnpack/AlignedAllocator.h",
4648 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4649 deps = MICROKERNEL_TEST_DEPS,
4650)
4651
4652xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4653 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4654 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4655 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4656 "test/gavgpool-microkernel-tester.h",
4657 "src/xnnpack/AlignedAllocator.h",
4658 ] + MICROKERNEL_TEST_HDRS,
4659 deps = MICROKERNEL_TEST_DEPS,
4660)
4661
4662xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4663 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4664 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4665 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4666 "test/gemm-microkernel-tester.h",
4667 "src/xnnpack/AlignedAllocator.h",
4668 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4669 deps = MICROKERNEL_TEST_DEPS,
4670)
4671
4672xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4673 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4674 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4675 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4676 "test/vadd-microkernel-tester.h",
4677 ] + MICROKERNEL_TEST_HDRS,
4678 deps = MICROKERNEL_TEST_DEPS,
4679)
4680
4681xnnpack_unit_test(
4682 name = "u8_clamp_test",
4683 srcs = [
4684 "test/u8-clamp.cc",
4685 "test/clamp-microkernel-tester.h",
4686 ] + MICROKERNEL_TEST_HDRS,
4687 deps = MICROKERNEL_TEST_DEPS,
4688)
4689
4690xnnpack_unit_test(
4691 name = "u8_lut32norm_test",
4692 srcs = [
4693 "test/u8-lut32norm.cc",
4694 "test/lut-norm-microkernel-tester.h",
4695 ] + MICROKERNEL_TEST_HDRS,
4696 deps = MICROKERNEL_TEST_DEPS,
4697)
4698
4699xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4700 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4701 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4702 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4703 "test/maxpool-microkernel-tester.h",
4704 ] + MICROKERNEL_TEST_HDRS,
4705 deps = MICROKERNEL_TEST_DEPS,
4706)
4707
4708xnnpack_unit_test(
4709 name = "u8_rmax_test",
4710 srcs = [
4711 "test/u8-rmax.cc",
4712 "test/rmax-microkernel-tester.h",
4713 ] + MICROKERNEL_TEST_HDRS,
4714 deps = MICROKERNEL_TEST_DEPS,
4715)
4716
4717xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4718 name = "x32_fill_test",
4719 srcs = [
4720 "test/x32-fill.cc",
4721 "test/fill-microkernel-tester.h",
4722 ] + MICROKERNEL_TEST_HDRS,
4723 deps = MICROKERNEL_TEST_DEPS,
4724)
4725
4726xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4727 name = "x32_packx_test",
4728 srcs = [
4729 "test/x32-packx.cc",
4730 "test/pack-microkernel-tester.h",
4731 "src/xnnpack/AlignedAllocator.h",
4732 ] + MICROKERNEL_TEST_HDRS,
4733 deps = MICROKERNEL_TEST_DEPS,
4734)
4735
4736xnnpack_unit_test(
4737 name = "x32_pad_test",
4738 srcs = [
4739 "test/x32-pad.cc",
4740 "test/pad-microkernel-tester.h",
4741 ] + MICROKERNEL_TEST_HDRS,
4742 deps = MICROKERNEL_TEST_DEPS,
4743)
4744
4745xnnpack_unit_test(
4746 name = "x32_unpool_test",
4747 srcs = [
4748 "test/x32-unpool.cc",
4749 "test/unpool-microkernel-tester.h",
4750 ] + MICROKERNEL_TEST_HDRS,
4751 deps = MICROKERNEL_TEST_DEPS,
4752)
4753
4754xnnpack_unit_test(
4755 name = "x32_zip_test",
4756 srcs = [
4757 "test/x32-zip.cc",
4758 "test/zip-microkernel-tester.h",
4759 ] + MICROKERNEL_TEST_HDRS,
4760 deps = MICROKERNEL_TEST_DEPS,
4761)
4762
4763xnnpack_unit_test(
4764 name = "x8_lut_test",
4765 srcs = [
4766 "test/x8-lut.cc",
4767 "test/lut-microkernel-tester.h",
4768 ] + MICROKERNEL_TEST_HDRS,
4769 deps = MICROKERNEL_TEST_DEPS,
4770)
4771
4772xnnpack_unit_test(
4773 name = "x8_zip_test",
4774 srcs = [
4775 "test/x8-zip.cc",
4776 "test/zip-microkernel-tester.h",
4777 ] + MICROKERNEL_TEST_HDRS,
4778 deps = MICROKERNEL_TEST_DEPS,
4779)
4780
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4781xnnpack_unit_test(
4782 name = "requantization_test",
4783 srcs = [
4784 "src/xnnpack/requantization-stubs.h",
4785 "test/requantization.cc",
4786 "test/requantization-tester.h",
4787 ] + MICROKERNEL_TEST_HDRS,
4788 deps = MICROKERNEL_TEST_DEPS,
4789)
4790
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4791########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4792
4793xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4794 name = "operator_size_test",
4795 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4796 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4797)
4798
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4799xnnpack_binary(
4800 name = "subgraph_size_test",
4801 srcs = ["test/subgraph-size.c"],
4802 deps = [":XNNPACK"],
4803)
4804
4805########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4806
4807xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4808 name = "abs_nc_test",
4809 srcs = [
4810 "test/abs-nc.cc",
4811 "test/abs-operator-tester.h",
4812 ],
4813 deps = OPERATOR_TEST_DEPS,
4814)
4815
4816xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4817 name = "add_nd_test",
4818 srcs = [
4819 "test/add-nd.cc",
4820 "test/binary-elementwise-operator-tester.h",
4821 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4822 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4823)
4824
4825xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4826 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4827 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4828 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4829 "test/argmax-pooling-operator-tester.h",
4830 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4831 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4832)
4833
4834xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4835 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4836 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4837 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4838 "test/average-pooling-operator-tester.h",
4839 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4840 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4841)
4842
4843xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4844 name = "bankers_rounding_nc_test",
4845 srcs = [
4846 "test/bankers-rounding-nc.cc",
4847 "test/bankers-rounding-operator-tester.h",
4848 ],
4849 deps = OPERATOR_TEST_DEPS,
4850)
4851
4852xnnpack_unit_test(
4853 name = "ceiling_nc_test",
4854 srcs = [
4855 "test/ceiling-nc.cc",
4856 "test/ceiling-operator-tester.h",
4857 ],
4858 deps = OPERATOR_TEST_DEPS,
4859)
4860
4861xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4862 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4863 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4864 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4865 "test/channel-shuffle-operator-tester.h",
4866 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4867 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4868)
4869
4870xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4871 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4872 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4873 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4874 "test/clamp-operator-tester.h",
4875 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4876 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4877)
4878
4879xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4880 name = "constant_pad_nd_test",
4881 srcs = [
4882 "test/constant-pad-nd.cc",
4883 "test/constant-pad-operator-tester.h",
4884 ],
4885 deps = OPERATOR_TEST_DEPS,
4886)
4887
4888xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4889 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4890 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4891 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4892 "test/convolution-operator-tester.h",
4893 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4894 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4895)
4896
4897xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4898 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4899 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4900 "test/convolution-nchw.cc",
4901 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4902 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4903 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4904)
4905
4906xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4907 name = "copy_nc_test",
4908 srcs = [
4909 "test/copy-nc.cc",
4910 "test/copy-operator-tester.h",
4911 ],
4912 deps = OPERATOR_TEST_DEPS,
4913)
4914
4915xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4916 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4917 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4918 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4919 "test/deconvolution-operator-tester.h",
4920 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4921 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4922)
4923
4924xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4925 name = "divide_nd_test",
4926 srcs = [
4927 "test/binary-elementwise-operator-tester.h",
4928 "test/divide-nd.cc",
4929 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4930 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4931)
4932
4933xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4934 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4935 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4936 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4937 "test/fully-connected-operator-tester.h",
4938 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4939 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4940)
4941
4942xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4943 name = "floor_nc_test",
4944 srcs = [
4945 "test/floor-nc.cc",
4946 "test/floor-operator-tester.h",
4947 ],
4948 deps = OPERATOR_TEST_DEPS,
4949)
4950
4951xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4952 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4953 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4954 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4955 "test/global-average-pooling-operator-tester.h",
Marat Dukhanef61d022020-06-19 13:54:49 -0700[diff] [blame]4956 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4957 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4958)
4959
4960xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4961 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4962 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4963 "test/global-average-pooling-ncw.cc",
4964 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4965 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4966 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4967)
4968
4969xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4970 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4971 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4972 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4973 "test/hardswish-operator-tester.h",
4974 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4975 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4976)
4977
4978xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4979 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4980 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4981 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4982 "test/leaky-relu-operator-tester.h",
4983 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4984 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4985)
4986
4987xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4988 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4989 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4990 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4991 "test/max-pooling-operator-tester.h",
4992 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4993 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4994)
4995
4996xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4997 name = "maximum_nd_test",
4998 srcs = [
4999 "test/binary-elementwise-operator-tester.h",
5000 "test/maximum-nd.cc",
5001 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5002 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5003)
5004
5005xnnpack_unit_test(
5006 name = "minimum_nd_test",
5007 srcs = [
5008 "test/binary-elementwise-operator-tester.h",
5009 "test/minimum-nd.cc",
5010 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5011 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]5012)
5013
5014xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5015 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5016 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]5017 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5018 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5019 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5020 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]5021)
5022
5023xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5024 name = "negate_nc_test",
5025 srcs = [
5026 "test/negate-nc.cc",
5027 "test/negate-operator-tester.h",
5028 ],
5029 deps = OPERATOR_TEST_DEPS,
5030)
5031
5032xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5033 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5034 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5035 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5036 "test/prelu-operator-tester.h",
5037 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5038 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5039)
5040
5041xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5042 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5043 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5044 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5045 "test/resize-bilinear-operator-tester.h",
5046 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5047 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]5048)
5049
5050xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5051 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5052 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5053 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5054 "test/sigmoid-operator-tester.h",
5055 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5056 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5057)
5058
5059xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5060 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5061 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]5062 "test/softmax-nc.cc",
5063 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5064 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5065 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5066)
5067
5068xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]5069 name = "square_nc_test",
5070 srcs = [
5071 "test/square-nc.cc",
5072 "test/square-operator-tester.h",
5073 ],
5074 deps = OPERATOR_TEST_DEPS,
5075)
5076
5077xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]5078 name = "squared_difference_nd_test",
5079 srcs = [
5080 "test/binary-elementwise-operator-tester.h",
5081 "test/squared-difference-nd.cc",
5082 ],
5083 deps = OPERATOR_TEST_DEPS,
5084)
5085
5086xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5087 name = "subtract_nd_test",
5088 srcs = [
5089 "test/binary-elementwise-operator-tester.h",
5090 "test/subtract-nd.cc",
5091 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5092 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]5093)
5094
5095xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5096 name = "truncation_nc_test",
5097 srcs = [
5098 "test/truncation-nc.cc",
5099 "test/truncation-operator-tester.h",
5100 ],
5101 deps = OPERATOR_TEST_DEPS,
5102)
5103
5104xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5105 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5106 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5107 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5108 "test/unpooling-operator-tester.h",
5109 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5110 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5111)
5112
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5113############################### Misc unit tests ###############################
5114
5115xnnpack_unit_test(
5116 name = "memory_planner_test",
5117 srcs = [
5118 "test/memory-planner-test.cc",
5119 ],
5120 deps = [
5121 ":XNNPACK",
5122 ":memory_planner",
5123 ],
5124)
5125
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5126############################# Build configurations #############################
5127
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5128# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5129config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5130 name = "xnn_enable_assembly_explicit_true",
5131 define_values = {"xnn_enable_assembly": "true"},
5132)
5133
5134# Disables usage of assembly kernels.
5135config_setting(
5136 name = "xnn_enable_assembly_explicit_false",
5137 define_values = {"xnn_enable_assembly": "false"},
5138)
5139
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5140# Enables usage of sparse inference.
5141config_setting(
5142 name = "xnn_enable_sparse_explicit_true",
5143 define_values = {"xnn_enable_sparse": "true"},
5144)
5145
5146# Disables usage of sparse inference.
5147config_setting(
5148 name = "xnn_enable_sparse_explicit_false",
5149 define_values = {"xnn_enable_sparse": "false"},
5150)
5151
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5152# Disables usage of HMP-aware optimizations.
5153config_setting(
5154 name = "xnn_enable_hmp_explicit_false",
5155 define_values = {"xnn_enable_hmp": "false"},
5156)
5157
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5158# Enable usage of optimized memory allocation
5159config_setting(
5160 name = "xnn_enable_memopt_explicit_true",
5161 define_values = {"xnnpack_enable_memopt": "true"},
5162)
5163
5164# Disable usage of optimized memory allocation
5165config_setting(
5166 name = "xnn_enable_memopt_explicit_false",
5167 define_values = {"xnnpack_enable_memopt": "false"},
5168)
5169
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5170# Builds with -c dbg
5171config_setting(
5172 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5173 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5174 "compilation_mode": "dbg",
5175 },
5176)
5177
5178# Builds with -c opt
5179config_setting(
5180 name = "optimized_build",
5181 values = {
5182 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5183 },
5184)
5185
5186config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5187 name = "linux_k8",
5188 values = {"cpu": "k8"},
5189)
5190
5191config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5192 name = "linux_arm",
5193 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5194)
5195
5196config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5197 name = "linux_armeabi",
5198 values = {"cpu": "armeabi"},
5199)
5200
5201config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5202 name = "linux_armhf",
5203 values = {"cpu": "armhf"},
5204)
5205
5206config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5207 name = "linux_armv7a",
5208 values = {"cpu": "armv7a"},
5209)
5210
5211config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5212 name = "linux_aarch64",
5213 values = {"cpu": "aarch64"},
5214)
5215
5216config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5217 name = "android",
5218 values = {"crosstool_top": "//external:android/crosstool"},
5219)
5220
5221config_setting(
5222 name = "android_armv7",
5223 values = {
5224 "crosstool_top": "//external:android/crosstool",
5225 "cpu": "armeabi-v7a",
5226 },
5227)
5228
5229config_setting(
5230 name = "android_arm64",
5231 values = {
5232 "crosstool_top": "//external:android/crosstool",
5233 "cpu": "arm64-v8a",
5234 },
5235)
5236
5237config_setting(
5238 name = "android_x86",
5239 values = {
5240 "crosstool_top": "//external:android/crosstool",
5241 "cpu": "x86",
5242 },
5243)
5244
5245config_setting(
5246 name = "android_x86_64",
5247 values = {
5248 "crosstool_top": "//external:android/crosstool",
5249 "cpu": "x86_64",
5250 },
5251)
5252
5253config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5254 name = "windows_x86_64",
5255 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5256)
5257
5258config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5259 name = "windows_x86_64_clang",
5260 values = {
5261 "compiler": "clang-cl",
5262 "cpu": "x64_windows",
5263 },
5264)
5265
5266config_setting(
5267 name = "windows_x86_64_mingw",
5268 values = {
5269 "compiler": "mingw-gcc",
5270 "cpu": "x64_windows",
5271 },
5272)
5273
5274config_setting(
5275 name = "windows_x86_64_msys",
5276 values = {
5277 "compiler": "msys-gcc",
5278 "cpu": "x64_windows",
5279 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5280)
5281
5282config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5283 name = "macos_x86_64",
5284 values = {
5285 "apple_platform_type": "macos",
5286 "cpu": "darwin",
5287 },
5288)
5289
5290config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5291 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5292 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5293)
5294
5295config_setting(
5296 name = "emscripten_wasm",
5297 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5298 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5299 "cpu": "wasm",
5300 },
5301)
5302
5303config_setting(
5304 name = "emscripten_wasmsimd",
5305 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5306 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5307 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5308 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5309 },
5310)
5311
5312config_setting(
5313 name = "emscripten_asmjs",
5314 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5315 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5316 "cpu": "asmjs",
5317 },
5318)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5319
5320config_setting(
5321 name = "ios_armv7",
5322 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5323 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5324 "cpu": "ios_armv7",
5325 },
5326)
5327
5328config_setting(
5329 name = "ios_arm64",
5330 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5331 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5332 "cpu": "ios_arm64",
5333 },
5334)
5335
5336config_setting(
5337 name = "ios_arm64e",
5338 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5339 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5340 "cpu": "ios_arm64e",
5341 },
5342)
5343
5344config_setting(
5345 name = "ios_x86",
5346 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5347 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5348 "cpu": "ios_i386",
5349 },
5350)
5351
5352config_setting(
5353 name = "ios_x86_64",
5354 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5355 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5356 "cpu": "ios_x86_64",
5357 },
5358)
5359
5360config_setting(
5361 name = "watchos_armv7k",
5362 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5363 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5364 "cpu": "watchos_armv7k",
5365 },
5366)
5367
5368config_setting(
5369 name = "watchos_arm64_32",
5370 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5371 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5372 "cpu": "watchos_arm64_32",
5373 },
5374)
5375
5376config_setting(
5377 name = "watchos_x86",
5378 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5379 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5380 "cpu": "watchos_i386",
5381 },
5382)
5383
5384config_setting(
5385 name = "watchos_x86_64",
5386 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5387 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5388 "cpu": "watchos_x86_64",
5389 },
5390)
5391
5392config_setting(
5393 name = "tvos_arm64",
5394 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5395 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5396 "cpu": "tvos_arm64",
5397 },
5398)
5399
5400config_setting(
5401 name = "tvos_x86_64",
5402 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5403 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5404 "cpu": "tvos_x86_64",
5405 },
5406)