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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
florianb0bf6602012-05-05 00:01:16 +000051static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
florianb4df7682011-07-05 02:09:01 +000052
53
54/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000055/*--- Globals ---*/
56/*------------------------------------------------------------*/
57
58/* The IRSB* into which we're generating code. */
59static IRSB *irsb;
60
61/* The guest address for the instruction currently being
62 translated. */
63static Addr64 guest_IA_curr_instr;
64
65/* The guest address for the instruction following the current instruction. */
66static Addr64 guest_IA_next_instr;
67
68/* Result of disassembly step. */
69static DisResult *dis_res;
70
floriana64c2432011-07-16 02:11:50 +000071/* Resteer function and callback data */
72static Bool (*resteer_fn)(void *, Addr64);
73static void *resteer_data;
74
sewardj2019a972011-03-07 16:04:07 +000075/* The last seen execute target instruction */
76ULong last_execute_target;
77
78/* The possible outcomes of a decoding operation */
79typedef enum {
80 S390_DECODE_OK,
81 S390_DECODE_UNKNOWN_INSN,
82 S390_DECODE_UNIMPLEMENTED_INSN,
83 S390_DECODE_UNKNOWN_SPECIAL_INSN,
84 S390_DECODE_ERROR
85} s390_decode_t;
86
florian428dfdd2012-03-27 03:09:49 +000087
sewardj2019a972011-03-07 16:04:07 +000088/*------------------------------------------------------------*/
89/*--- Helpers for constructing IR. ---*/
90/*------------------------------------------------------------*/
91
92/* Sign extend a value with the given number of bits. This is a
93 macro because it allows us to overload the type of the value.
94 Note that VALUE must have a signed type! */
95#undef sign_extend
96#define sign_extend(value,num_bits) \
97(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
98 (sizeof(__typeof__(value)) * 8 - (num_bits)))
99
100
101/* Add a statement to the current irsb. */
102static __inline__ void
103stmt(IRStmt *st)
104{
105 addStmtToIRSB(irsb, st);
106}
107
108/* Allocate a new temporary of the given type. */
109static __inline__ IRTemp
110newTemp(IRType type)
111{
112 vassert(isPlausibleIRType(type));
113
114 return newIRTemp(irsb->tyenv, type);
115}
116
117/* Create an expression node for a temporary */
118static __inline__ IRExpr *
119mkexpr(IRTemp tmp)
120{
121 return IRExpr_RdTmp(tmp);
122}
123
florian8844a632012-04-13 04:04:06 +0000124/* Generate an expression node for an address. */
125static __inline__ IRExpr *
126mkaddr_expr(Addr64 addr)
127{
128 return IRExpr_Const(IRConst_U64(addr));
129}
130
sewardj2019a972011-03-07 16:04:07 +0000131/* Add a statement that assigns to a temporary */
132static __inline__ void
133assign(IRTemp dst, IRExpr *expr)
134{
135 stmt(IRStmt_WrTmp(dst, expr));
136}
137
florian8844a632012-04-13 04:04:06 +0000138/* Write an address into the guest_IA */
139static __inline__ void
140put_IA(IRExpr *address)
141{
142 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
143}
144
145/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
146 that wants the last statement in an IRSB to be a put to the guest_IA.
147 Mostly used for insns that use the "counter" pseudo guest reg. */
148static __inline__ void
149dummy_put_IA(void)
150{
151 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
152}
153
sewardj2019a972011-03-07 16:04:07 +0000154/* Create a temporary of the given type and assign the expression to it */
155static __inline__ IRTemp
156mktemp(IRType type, IRExpr *expr)
157{
158 IRTemp temp = newTemp(type);
159
160 assign(temp, expr);
161
162 return temp;
163}
164
165/* Create a unary expression */
166static __inline__ IRExpr *
167unop(IROp kind, IRExpr *op)
168{
169 return IRExpr_Unop(kind, op);
170}
171
172/* Create a binary expression */
173static __inline__ IRExpr *
174binop(IROp kind, IRExpr *op1, IRExpr *op2)
175{
176 return IRExpr_Binop(kind, op1, op2);
177}
178
179/* Create a ternary expression */
180static __inline__ IRExpr *
181triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
182{
183 return IRExpr_Triop(kind, op1, op2, op3);
184}
185
186/* Create a quaternary expression */
187static __inline__ IRExpr *
188qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
189{
190 return IRExpr_Qop(kind, op1, op2, op3, op4);
191}
192
193/* Create an expression node for an 8-bit integer constant */
194static __inline__ IRExpr *
195mkU8(UInt value)
196{
197 vassert(value < 256);
198
199 return IRExpr_Const(IRConst_U8((UChar)value));
200}
201
202/* Create an expression node for a 16-bit integer constant */
203static __inline__ IRExpr *
204mkU16(UInt value)
205{
206 vassert(value < 65536);
207
208 return IRExpr_Const(IRConst_U16((UShort)value));
209}
210
211/* Create an expression node for a 32-bit integer constant */
212static __inline__ IRExpr *
213mkU32(UInt value)
214{
215 return IRExpr_Const(IRConst_U32(value));
216}
217
218/* Create an expression node for a 64-bit integer constant */
219static __inline__ IRExpr *
220mkU64(ULong value)
221{
222 return IRExpr_Const(IRConst_U64(value));
223}
224
225/* Create an expression node for a 32-bit floating point constant
226 whose value is given by a bit pattern. */
227static __inline__ IRExpr *
228mkF32i(UInt value)
229{
230 return IRExpr_Const(IRConst_F32i(value));
231}
232
233/* Create an expression node for a 32-bit floating point constant
234 whose value is given by a bit pattern. */
235static __inline__ IRExpr *
236mkF64i(ULong value)
237{
238 return IRExpr_Const(IRConst_F64i(value));
239}
240
241/* Little helper function for my sanity. ITE = if-then-else */
242static IRExpr *
243mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
244{
245 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
246
247 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
248}
249
250/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
251static void __inline__
252store(IRExpr *addr, IRExpr *data)
253{
254 stmt(IRStmt_Store(Iend_BE, addr, data));
255}
256
257/* Create an expression that loads a TYPE sized value from ADDR.
258 This is a big-endian machine. */
259static __inline__ IRExpr *
260load(IRType type, IRExpr *addr)
261{
262 return IRExpr_Load(Iend_BE, type, addr);
263}
264
265/* Function call */
266static void
267call_function(IRExpr *callee_address)
268{
florian8844a632012-04-13 04:04:06 +0000269 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000270
florian8844a632012-04-13 04:04:06 +0000271 dis_res->whatNext = Dis_StopHere;
272 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000273}
274
floriana64c2432011-07-16 02:11:50 +0000275/* Function call with known target. */
276static void
277call_function_and_chase(Addr64 callee_address)
278{
279 if (resteer_fn(resteer_data, callee_address)) {
280 dis_res->whatNext = Dis_ResteerU;
281 dis_res->continueAt = callee_address;
282 } else {
florian8844a632012-04-13 04:04:06 +0000283 put_IA(mkaddr_expr(callee_address));
284
floriana64c2432011-07-16 02:11:50 +0000285 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000286 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000287 }
288}
289
sewardj2019a972011-03-07 16:04:07 +0000290/* Function return sequence */
291static void
292return_from_function(IRExpr *return_address)
293{
florian8844a632012-04-13 04:04:06 +0000294 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000295
florian8844a632012-04-13 04:04:06 +0000296 dis_res->whatNext = Dis_StopHere;
297 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000298}
299
300/* A conditional branch whose target is not known at instrumentation time.
301
302 if (condition) goto computed_target;
303
304 Needs to be represented as:
305
306 if (! condition) goto next_instruction;
307 goto computed_target;
308
309 This inversion is being handled at code generation time. So we just
310 take the condition here as is.
311*/
312static void
313if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
314{
315 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
316
florian8844a632012-04-13 04:04:06 +0000317 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
318 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000319
florian8844a632012-04-13 04:04:06 +0000320 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000321
florian8844a632012-04-13 04:04:06 +0000322 dis_res->whatNext = Dis_StopHere;
323 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000324}
325
326/* A conditional branch whose target is known at instrumentation time. */
327static void
328if_condition_goto(IRExpr *condition, Addr64 target)
329{
330 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
331
florian8844a632012-04-13 04:04:06 +0000332 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
333 S390X_GUEST_OFFSET(guest_IA)));
334
florian7346c7a2012-04-13 21:14:24 +0000335 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +0000336
337 dis_res->whatNext = Dis_StopHere;
338 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000339}
340
341/* An unconditional branch. Target may or may not be known at instrumentation
342 time. */
343static void
344always_goto(IRExpr *target)
345{
florian8844a632012-04-13 04:04:06 +0000346 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000347
florian8844a632012-04-13 04:04:06 +0000348 dis_res->whatNext = Dis_StopHere;
349 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000350}
351
florian8844a632012-04-13 04:04:06 +0000352
floriana64c2432011-07-16 02:11:50 +0000353/* An unconditional branch to a known target. */
354static void
355always_goto_and_chase(Addr64 target)
356{
357 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000358 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000359 dis_res->whatNext = Dis_ResteerU;
360 dis_res->continueAt = target;
361 } else {
florian8844a632012-04-13 04:04:06 +0000362 put_IA(mkaddr_expr(target));
363
364 dis_res->whatNext = Dis_StopHere;
365 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000366 }
367}
368
sewardj2019a972011-03-07 16:04:07 +0000369/* A system call */
370static void
371system_call(IRExpr *sysno)
372{
373 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000374 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000375
sewardj69007022011-04-28 20:13:45 +0000376 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000377 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
378 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000379
florian8844a632012-04-13 04:04:06 +0000380 put_IA(mkaddr_expr(guest_IA_next_instr));
381
sewardj2019a972011-03-07 16:04:07 +0000382 /* It's important that all ArchRegs carry their up-to-date value
383 at this point. So we declare an end-of-block here, which
384 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000385 dis_res->whatNext = Dis_StopHere;
386 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000387}
388
389/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
390 instructions to VEX's IRRoundingMode. */
391static IRRoundingMode
392encode_rounding_mode(UChar mode)
393{
394 switch (mode) {
395 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
396 case S390_ROUND_ZERO: return Irrm_ZERO;
397 case S390_ROUND_POSINF: return Irrm_PosINF;
398 case S390_ROUND_NEGINF: return Irrm_NegINF;
399 }
400 vpanic("encode_rounding_mode");
401}
402
403static __inline__ IRExpr *get_fpr_dw0(UInt);
404static __inline__ void put_fpr_dw0(UInt, IRExpr *);
405
406/* Read a floating point register pair and combine their contents into a
407 128-bit value */
408static IRExpr *
409get_fpr_pair(UInt archreg)
410{
411 IRExpr *high = get_fpr_dw0(archreg);
412 IRExpr *low = get_fpr_dw0(archreg + 2);
413
414 return binop(Iop_F64HLtoF128, high, low);
415}
416
417/* Write a 128-bit floating point value into a register pair. */
418static void
419put_fpr_pair(UInt archreg, IRExpr *expr)
420{
421 IRExpr *high = unop(Iop_F128HItoF64, expr);
422 IRExpr *low = unop(Iop_F128LOtoF64, expr);
423
424 put_fpr_dw0(archreg, high);
425 put_fpr_dw0(archreg + 2, low);
426}
427
428
sewardj2019a972011-03-07 16:04:07 +0000429/*------------------------------------------------------------*/
430/*--- Build the flags thunk. ---*/
431/*------------------------------------------------------------*/
432
433/* Completely fill the flags thunk. We're always filling all fields.
434 Apparently, that is better for redundant PUT elimination. */
435static void
436s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
437{
438 UInt op_off, dep1_off, dep2_off, ndep_off;
439
florian428dfdd2012-03-27 03:09:49 +0000440 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
441 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
442 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
443 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000444
445 stmt(IRStmt_Put(op_off, op));
446 stmt(IRStmt_Put(dep1_off, dep1));
447 stmt(IRStmt_Put(dep2_off, dep2));
448 stmt(IRStmt_Put(ndep_off, ndep));
449}
450
451
452/* Create an expression for V and widen the result to 64 bit. */
453static IRExpr *
454s390_cc_widen(IRTemp v, Bool sign_extend)
455{
456 IRExpr *expr;
457
458 expr = mkexpr(v);
459
460 switch (typeOfIRTemp(irsb->tyenv, v)) {
461 case Ity_I64:
462 break;
463 case Ity_I32:
464 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
465 break;
466 case Ity_I16:
467 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
468 break;
469 case Ity_I8:
470 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
471 break;
472 default:
473 vpanic("s390_cc_widen");
474 }
475
476 return expr;
477}
478
479static void
480s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
481{
482 IRExpr *op, *dep1, *dep2, *ndep;
483
484 op = mkU64(opc);
485 dep1 = s390_cc_widen(d1, sign_extend);
486 dep2 = mkU64(0);
487 ndep = mkU64(0);
488
489 s390_cc_thunk_fill(op, dep1, dep2, ndep);
490}
491
492
493static void
494s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
495{
496 IRExpr *op, *dep1, *dep2, *ndep;
497
498 op = mkU64(opc);
499 dep1 = s390_cc_widen(d1, sign_extend);
500 dep2 = s390_cc_widen(d2, sign_extend);
501 ndep = mkU64(0);
502
503 s390_cc_thunk_fill(op, dep1, dep2, ndep);
504}
505
506
507/* memcheck believes that the NDEP field in the flags thunk is always
508 defined. But for some flag computations (e.g. add with carry) that is
509 just not true. We therefore need to convey to memcheck that the value
510 of the ndep field does matter and therefore we make the DEP2 field
511 depend on it:
512
513 DEP2 = original_DEP2 ^ NDEP
514
515 In s390_calculate_cc we exploit that (a^b)^b == a
516 I.e. we xor the DEP2 value with the NDEP value to recover the
517 original_DEP2 value. */
518static void
519s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
520{
521 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
522
523 op = mkU64(opc);
524 dep1 = s390_cc_widen(d1, sign_extend);
525 dep2 = s390_cc_widen(d2, sign_extend);
526 ndep = s390_cc_widen(nd, sign_extend);
527
528 dep2x = binop(Iop_Xor64, dep2, ndep);
529
530 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
531}
532
533
534/* Write one floating point value into the flags thunk */
535static void
536s390_cc_thunk_put1f(UInt opc, IRTemp d1)
537{
538 IRExpr *op, *dep1, *dep2, *ndep;
539
540 op = mkU64(opc);
541 dep1 = mkexpr(d1);
542 dep2 = mkU64(0);
543 ndep = mkU64(0);
544
545 s390_cc_thunk_fill(op, dep1, dep2, ndep);
546}
547
548
549/* Write a floating point value and an integer into the flags thunk. The
550 integer value is zero-extended first. */
551static void
552s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
553{
554 IRExpr *op, *dep1, *dep2, *ndep;
555
556 op = mkU64(opc);
557 dep1 = mkexpr(d1);
558 dep2 = s390_cc_widen(d2, False);
559 ndep = mkU64(0);
560
561 s390_cc_thunk_fill(op, dep1, dep2, ndep);
562}
563
564
565/* Write a 128-bit floating point value into the flags thunk. This is
566 done by splitting the value into two 64-bits values. */
567static void
568s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
569{
570 IRExpr *op, *hi, *lo, *ndep;
571
572 op = mkU64(opc);
573 hi = unop(Iop_F128HItoF64, mkexpr(d1));
574 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
575 ndep = mkU64(0);
576
577 s390_cc_thunk_fill(op, hi, lo, ndep);
578}
579
580
581/* Write a 128-bit floating point value and an integer into the flags thunk.
582 The integer value is zero-extended first. */
583static void
584s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
585{
586 IRExpr *op, *hi, *lo, *lox, *ndep;
587
588 op = mkU64(opc);
589 hi = unop(Iop_F128HItoF64, mkexpr(d1));
590 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
591 ndep = s390_cc_widen(nd, False);
592
593 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
594
595 s390_cc_thunk_fill(op, hi, lox, ndep);
596}
597
598
599static void
600s390_cc_set(UInt val)
601{
602 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
603 mkU64(val), mkU64(0), mkU64(0));
604}
605
606/* Build IR to calculate the condition code from flags thunk.
607 Returns an expression of type Ity_I32 */
608static IRExpr *
609s390_call_calculate_cc(void)
610{
611 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
612
florian428dfdd2012-03-27 03:09:49 +0000613 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
614 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
615 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
616 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000617
618 args = mkIRExprVec_4(op, dep1, dep2, ndep);
619 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
620 "s390_calculate_cc", &s390_calculate_cc, args);
621
622 /* Exclude OP and NDEP from definedness checking. We're only
623 interested in DEP1 and DEP2. */
624 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
625
626 return call;
627}
628
629/* Build IR to calculate the internal condition code for a "compare and branch"
630 insn. Returns an expression of type Ity_I32 */
631static IRExpr *
632s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
633{
634 IRExpr **args, *call, *op, *dep1, *dep2;
635
636 op = mkU64(opc);
637 dep1 = s390_cc_widen(op1, sign_extend);
638 dep2 = s390_cc_widen(op2, sign_extend);
639
640 args = mkIRExprVec_3(op, dep1, dep2);
641 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
642 "s390_calculate_icc", &s390_calculate_icc, args);
643
644 /* Exclude OP from definedness checking. We're only
645 interested in DEP1 and DEP2. */
646 call->Iex.CCall.cee->mcx_mask = (1<<0);
647
648 return call;
649}
650
651/* Build IR to calculate the condition code from flags thunk.
652 Returns an expression of type Ity_I32 */
653static IRExpr *
654s390_call_calculate_cond(UInt m)
655{
656 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
657
658 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000659 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
660 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
661 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
662 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000663
664 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
665 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
666 "s390_calculate_cond", &s390_calculate_cond, args);
667
668 /* Exclude the requested condition, OP and NDEP from definedness
669 checking. We're only interested in DEP1 and DEP2. */
670 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
671
672 return call;
673}
674
675#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
676#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
677#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
678#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
679#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
680#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
681#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
682 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
683#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
684 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
685#define s390_call_calculate_iccZZ(op,dep1,dep2) \
686 s390_call_calculate_icc(op,dep1,dep2,False)
687#define s390_call_calculate_iccSS(op,dep1,dep2) \
688 s390_call_calculate_icc(op,dep1,dep2,True)
689
690
sewardj2019a972011-03-07 16:04:07 +0000691
692
693/*------------------------------------------------------------*/
694/*--- Guest register access ---*/
695/*------------------------------------------------------------*/
696
697
698/*------------------------------------------------------------*/
699/*--- ar registers ---*/
700/*------------------------------------------------------------*/
701
702/* Return the guest state offset of a ar register. */
703static UInt
704ar_offset(UInt archreg)
705{
706 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000707 S390X_GUEST_OFFSET(guest_a0),
708 S390X_GUEST_OFFSET(guest_a1),
709 S390X_GUEST_OFFSET(guest_a2),
710 S390X_GUEST_OFFSET(guest_a3),
711 S390X_GUEST_OFFSET(guest_a4),
712 S390X_GUEST_OFFSET(guest_a5),
713 S390X_GUEST_OFFSET(guest_a6),
714 S390X_GUEST_OFFSET(guest_a7),
715 S390X_GUEST_OFFSET(guest_a8),
716 S390X_GUEST_OFFSET(guest_a9),
717 S390X_GUEST_OFFSET(guest_a10),
718 S390X_GUEST_OFFSET(guest_a11),
719 S390X_GUEST_OFFSET(guest_a12),
720 S390X_GUEST_OFFSET(guest_a13),
721 S390X_GUEST_OFFSET(guest_a14),
722 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000723 };
724
725 vassert(archreg < 16);
726
727 return offset[archreg];
728}
729
730
731/* Return the guest state offset of word #0 of a ar register. */
732static __inline__ UInt
733ar_w0_offset(UInt archreg)
734{
735 return ar_offset(archreg) + 0;
736}
737
738/* Write word #0 of a ar to the guest state. */
739static __inline__ void
740put_ar_w0(UInt archreg, IRExpr *expr)
741{
742 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
743
744 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
745}
746
747/* Read word #0 of a ar register. */
748static __inline__ IRExpr *
749get_ar_w0(UInt archreg)
750{
751 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
752}
753
754
755/*------------------------------------------------------------*/
756/*--- fpr registers ---*/
757/*------------------------------------------------------------*/
758
759/* Return the guest state offset of a fpr register. */
760static UInt
761fpr_offset(UInt archreg)
762{
763 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000764 S390X_GUEST_OFFSET(guest_f0),
765 S390X_GUEST_OFFSET(guest_f1),
766 S390X_GUEST_OFFSET(guest_f2),
767 S390X_GUEST_OFFSET(guest_f3),
768 S390X_GUEST_OFFSET(guest_f4),
769 S390X_GUEST_OFFSET(guest_f5),
770 S390X_GUEST_OFFSET(guest_f6),
771 S390X_GUEST_OFFSET(guest_f7),
772 S390X_GUEST_OFFSET(guest_f8),
773 S390X_GUEST_OFFSET(guest_f9),
774 S390X_GUEST_OFFSET(guest_f10),
775 S390X_GUEST_OFFSET(guest_f11),
776 S390X_GUEST_OFFSET(guest_f12),
777 S390X_GUEST_OFFSET(guest_f13),
778 S390X_GUEST_OFFSET(guest_f14),
779 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000780 };
781
782 vassert(archreg < 16);
783
784 return offset[archreg];
785}
786
787
788/* Return the guest state offset of word #0 of a fpr register. */
789static __inline__ UInt
790fpr_w0_offset(UInt archreg)
791{
792 return fpr_offset(archreg) + 0;
793}
794
795/* Write word #0 of a fpr to the guest state. */
796static __inline__ void
797put_fpr_w0(UInt archreg, IRExpr *expr)
798{
799 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
800
801 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
802}
803
804/* Read word #0 of a fpr register. */
805static __inline__ IRExpr *
806get_fpr_w0(UInt archreg)
807{
808 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
809}
810
811/* Return the guest state offset of double word #0 of a fpr register. */
812static __inline__ UInt
813fpr_dw0_offset(UInt archreg)
814{
815 return fpr_offset(archreg) + 0;
816}
817
818/* Write double word #0 of a fpr to the guest state. */
819static __inline__ void
820put_fpr_dw0(UInt archreg, IRExpr *expr)
821{
822 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
823
824 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
825}
826
827/* Read double word #0 of a fpr register. */
828static __inline__ IRExpr *
829get_fpr_dw0(UInt archreg)
830{
831 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
832}
833
834
835/*------------------------------------------------------------*/
836/*--- gpr registers ---*/
837/*------------------------------------------------------------*/
838
839/* Return the guest state offset of a gpr register. */
840static UInt
841gpr_offset(UInt archreg)
842{
843 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000844 S390X_GUEST_OFFSET(guest_r0),
845 S390X_GUEST_OFFSET(guest_r1),
846 S390X_GUEST_OFFSET(guest_r2),
847 S390X_GUEST_OFFSET(guest_r3),
848 S390X_GUEST_OFFSET(guest_r4),
849 S390X_GUEST_OFFSET(guest_r5),
850 S390X_GUEST_OFFSET(guest_r6),
851 S390X_GUEST_OFFSET(guest_r7),
852 S390X_GUEST_OFFSET(guest_r8),
853 S390X_GUEST_OFFSET(guest_r9),
854 S390X_GUEST_OFFSET(guest_r10),
855 S390X_GUEST_OFFSET(guest_r11),
856 S390X_GUEST_OFFSET(guest_r12),
857 S390X_GUEST_OFFSET(guest_r13),
858 S390X_GUEST_OFFSET(guest_r14),
859 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000860 };
861
862 vassert(archreg < 16);
863
864 return offset[archreg];
865}
866
867
868/* Return the guest state offset of word #0 of a gpr register. */
869static __inline__ UInt
870gpr_w0_offset(UInt archreg)
871{
872 return gpr_offset(archreg) + 0;
873}
874
875/* Write word #0 of a gpr to the guest state. */
876static __inline__ void
877put_gpr_w0(UInt archreg, IRExpr *expr)
878{
879 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
880
881 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
882}
883
884/* Read word #0 of a gpr register. */
885static __inline__ IRExpr *
886get_gpr_w0(UInt archreg)
887{
888 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
889}
890
891/* Return the guest state offset of double word #0 of a gpr register. */
892static __inline__ UInt
893gpr_dw0_offset(UInt archreg)
894{
895 return gpr_offset(archreg) + 0;
896}
897
898/* Write double word #0 of a gpr to the guest state. */
899static __inline__ void
900put_gpr_dw0(UInt archreg, IRExpr *expr)
901{
902 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
903
904 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
905}
906
907/* Read double word #0 of a gpr register. */
908static __inline__ IRExpr *
909get_gpr_dw0(UInt archreg)
910{
911 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
912}
913
914/* Return the guest state offset of half word #1 of a gpr register. */
915static __inline__ UInt
916gpr_hw1_offset(UInt archreg)
917{
918 return gpr_offset(archreg) + 2;
919}
920
921/* Write half word #1 of a gpr to the guest state. */
922static __inline__ void
923put_gpr_hw1(UInt archreg, IRExpr *expr)
924{
925 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
926
927 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
928}
929
930/* Read half word #1 of a gpr register. */
931static __inline__ IRExpr *
932get_gpr_hw1(UInt archreg)
933{
934 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
935}
936
937/* Return the guest state offset of byte #6 of a gpr register. */
938static __inline__ UInt
939gpr_b6_offset(UInt archreg)
940{
941 return gpr_offset(archreg) + 6;
942}
943
944/* Write byte #6 of a gpr to the guest state. */
945static __inline__ void
946put_gpr_b6(UInt archreg, IRExpr *expr)
947{
948 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
949
950 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
951}
952
953/* Read byte #6 of a gpr register. */
954static __inline__ IRExpr *
955get_gpr_b6(UInt archreg)
956{
957 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
958}
959
960/* Return the guest state offset of byte #3 of a gpr register. */
961static __inline__ UInt
962gpr_b3_offset(UInt archreg)
963{
964 return gpr_offset(archreg) + 3;
965}
966
967/* Write byte #3 of a gpr to the guest state. */
968static __inline__ void
969put_gpr_b3(UInt archreg, IRExpr *expr)
970{
971 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
972
973 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
974}
975
976/* Read byte #3 of a gpr register. */
977static __inline__ IRExpr *
978get_gpr_b3(UInt archreg)
979{
980 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
981}
982
983/* Return the guest state offset of byte #0 of a gpr register. */
984static __inline__ UInt
985gpr_b0_offset(UInt archreg)
986{
987 return gpr_offset(archreg) + 0;
988}
989
990/* Write byte #0 of a gpr to the guest state. */
991static __inline__ void
992put_gpr_b0(UInt archreg, IRExpr *expr)
993{
994 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
995
996 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
997}
998
999/* Read byte #0 of a gpr register. */
1000static __inline__ IRExpr *
1001get_gpr_b0(UInt archreg)
1002{
1003 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1004}
1005
1006/* Return the guest state offset of word #1 of a gpr register. */
1007static __inline__ UInt
1008gpr_w1_offset(UInt archreg)
1009{
1010 return gpr_offset(archreg) + 4;
1011}
1012
1013/* Write word #1 of a gpr to the guest state. */
1014static __inline__ void
1015put_gpr_w1(UInt archreg, IRExpr *expr)
1016{
1017 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1018
1019 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1020}
1021
1022/* Read word #1 of a gpr register. */
1023static __inline__ IRExpr *
1024get_gpr_w1(UInt archreg)
1025{
1026 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1027}
1028
1029/* Return the guest state offset of half word #3 of a gpr register. */
1030static __inline__ UInt
1031gpr_hw3_offset(UInt archreg)
1032{
1033 return gpr_offset(archreg) + 6;
1034}
1035
1036/* Write half word #3 of a gpr to the guest state. */
1037static __inline__ void
1038put_gpr_hw3(UInt archreg, IRExpr *expr)
1039{
1040 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1041
1042 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1043}
1044
1045/* Read half word #3 of a gpr register. */
1046static __inline__ IRExpr *
1047get_gpr_hw3(UInt archreg)
1048{
1049 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1050}
1051
1052/* Return the guest state offset of byte #7 of a gpr register. */
1053static __inline__ UInt
1054gpr_b7_offset(UInt archreg)
1055{
1056 return gpr_offset(archreg) + 7;
1057}
1058
1059/* Write byte #7 of a gpr to the guest state. */
1060static __inline__ void
1061put_gpr_b7(UInt archreg, IRExpr *expr)
1062{
1063 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1064
1065 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1066}
1067
1068/* Read byte #7 of a gpr register. */
1069static __inline__ IRExpr *
1070get_gpr_b7(UInt archreg)
1071{
1072 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1073}
1074
1075/* Return the guest state offset of half word #0 of a gpr register. */
1076static __inline__ UInt
1077gpr_hw0_offset(UInt archreg)
1078{
1079 return gpr_offset(archreg) + 0;
1080}
1081
1082/* Write half word #0 of a gpr to the guest state. */
1083static __inline__ void
1084put_gpr_hw0(UInt archreg, IRExpr *expr)
1085{
1086 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1087
1088 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1089}
1090
1091/* Read half word #0 of a gpr register. */
1092static __inline__ IRExpr *
1093get_gpr_hw0(UInt archreg)
1094{
1095 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1096}
1097
1098/* Return the guest state offset of byte #4 of a gpr register. */
1099static __inline__ UInt
1100gpr_b4_offset(UInt archreg)
1101{
1102 return gpr_offset(archreg) + 4;
1103}
1104
1105/* Write byte #4 of a gpr to the guest state. */
1106static __inline__ void
1107put_gpr_b4(UInt archreg, IRExpr *expr)
1108{
1109 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1110
1111 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1112}
1113
1114/* Read byte #4 of a gpr register. */
1115static __inline__ IRExpr *
1116get_gpr_b4(UInt archreg)
1117{
1118 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1119}
1120
1121/* Return the guest state offset of byte #1 of a gpr register. */
1122static __inline__ UInt
1123gpr_b1_offset(UInt archreg)
1124{
1125 return gpr_offset(archreg) + 1;
1126}
1127
1128/* Write byte #1 of a gpr to the guest state. */
1129static __inline__ void
1130put_gpr_b1(UInt archreg, IRExpr *expr)
1131{
1132 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1133
1134 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1135}
1136
1137/* Read byte #1 of a gpr register. */
1138static __inline__ IRExpr *
1139get_gpr_b1(UInt archreg)
1140{
1141 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1142}
1143
1144/* Return the guest state offset of half word #2 of a gpr register. */
1145static __inline__ UInt
1146gpr_hw2_offset(UInt archreg)
1147{
1148 return gpr_offset(archreg) + 4;
1149}
1150
1151/* Write half word #2 of a gpr to the guest state. */
1152static __inline__ void
1153put_gpr_hw2(UInt archreg, IRExpr *expr)
1154{
1155 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1156
1157 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1158}
1159
1160/* Read half word #2 of a gpr register. */
1161static __inline__ IRExpr *
1162get_gpr_hw2(UInt archreg)
1163{
1164 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1165}
1166
1167/* Return the guest state offset of byte #5 of a gpr register. */
1168static __inline__ UInt
1169gpr_b5_offset(UInt archreg)
1170{
1171 return gpr_offset(archreg) + 5;
1172}
1173
1174/* Write byte #5 of a gpr to the guest state. */
1175static __inline__ void
1176put_gpr_b5(UInt archreg, IRExpr *expr)
1177{
1178 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1179
1180 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1181}
1182
1183/* Read byte #5 of a gpr register. */
1184static __inline__ IRExpr *
1185get_gpr_b5(UInt archreg)
1186{
1187 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1188}
1189
1190/* Return the guest state offset of byte #2 of a gpr register. */
1191static __inline__ UInt
1192gpr_b2_offset(UInt archreg)
1193{
1194 return gpr_offset(archreg) + 2;
1195}
1196
1197/* Write byte #2 of a gpr to the guest state. */
1198static __inline__ void
1199put_gpr_b2(UInt archreg, IRExpr *expr)
1200{
1201 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1202
1203 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1204}
1205
1206/* Read byte #2 of a gpr register. */
1207static __inline__ IRExpr *
1208get_gpr_b2(UInt archreg)
1209{
1210 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1211}
1212
1213/* Return the guest state offset of the counter register. */
1214static UInt
1215counter_offset(void)
1216{
floriane88b3c92011-07-05 02:48:39 +00001217 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001218}
1219
1220/* Return the guest state offset of double word #0 of the counter register. */
1221static __inline__ UInt
1222counter_dw0_offset(void)
1223{
1224 return counter_offset() + 0;
1225}
1226
1227/* Write double word #0 of the counter to the guest state. */
1228static __inline__ void
1229put_counter_dw0(IRExpr *expr)
1230{
1231 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1232
1233 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1234}
1235
1236/* Read double word #0 of the counter register. */
1237static __inline__ IRExpr *
1238get_counter_dw0(void)
1239{
1240 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1241}
1242
1243/* Return the guest state offset of word #0 of the counter register. */
1244static __inline__ UInt
1245counter_w0_offset(void)
1246{
1247 return counter_offset() + 0;
1248}
1249
1250/* Return the guest state offset of word #1 of the counter register. */
1251static __inline__ UInt
1252counter_w1_offset(void)
1253{
1254 return counter_offset() + 4;
1255}
1256
1257/* Write word #0 of the counter to the guest state. */
1258static __inline__ void
1259put_counter_w0(IRExpr *expr)
1260{
1261 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1262
1263 stmt(IRStmt_Put(counter_w0_offset(), expr));
1264}
1265
1266/* Read word #0 of the counter register. */
1267static __inline__ IRExpr *
1268get_counter_w0(void)
1269{
1270 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1271}
1272
1273/* Write word #1 of the counter to the guest state. */
1274static __inline__ void
1275put_counter_w1(IRExpr *expr)
1276{
1277 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1278
1279 stmt(IRStmt_Put(counter_w1_offset(), expr));
1280}
1281
1282/* Read word #1 of the counter register. */
1283static __inline__ IRExpr *
1284get_counter_w1(void)
1285{
1286 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1287}
1288
1289/* Return the guest state offset of the fpc register. */
1290static UInt
1291fpc_offset(void)
1292{
floriane88b3c92011-07-05 02:48:39 +00001293 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001294}
1295
1296/* Return the guest state offset of word #0 of the fpc register. */
1297static __inline__ UInt
1298fpc_w0_offset(void)
1299{
1300 return fpc_offset() + 0;
1301}
1302
1303/* Write word #0 of the fpc to the guest state. */
1304static __inline__ void
1305put_fpc_w0(IRExpr *expr)
1306{
1307 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1308
1309 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1310}
1311
1312/* Read word #0 of the fpc register. */
1313static __inline__ IRExpr *
1314get_fpc_w0(void)
1315{
1316 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1317}
1318
1319
1320/*------------------------------------------------------------*/
1321/*--- Build IR for formats ---*/
1322/*------------------------------------------------------------*/
1323static void
1324s390_format_I(HChar *(*irgen)(UChar i),
1325 UChar i)
1326{
1327 HChar *mnm = irgen(i);
1328
sewardj7ee97522011-05-09 21:45:04 +00001329 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001330 s390_disasm(ENC2(MNM, UINT), mnm, i);
1331}
1332
1333static void
1334s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1335 UChar r1, UShort i2)
1336{
1337 irgen(r1, i2);
1338}
1339
1340static void
1341s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1342 UChar r1, UShort i2)
1343{
1344 HChar *mnm = irgen(r1, i2);
1345
sewardj7ee97522011-05-09 21:45:04 +00001346 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001347 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1348}
1349
1350static void
1351s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1352 UChar r1, UShort i2)
1353{
1354 HChar *mnm = irgen(r1, i2);
1355
sewardj7ee97522011-05-09 21:45:04 +00001356 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001357 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1358}
1359
1360static void
1361s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1362 UChar r1, UShort i2)
1363{
1364 HChar *mnm = irgen(r1, i2);
1365
sewardj7ee97522011-05-09 21:45:04 +00001366 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001367 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1368}
1369
1370static void
1371s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1372 UChar r1, UChar r3, UShort i2)
1373{
1374 HChar *mnm = irgen(r1, r3, i2);
1375
sewardj7ee97522011-05-09 21:45:04 +00001376 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001377 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1378}
1379
1380static void
1381s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1382 UChar r1, UChar r3, UShort i2)
1383{
1384 HChar *mnm = irgen(r1, r3, i2);
1385
sewardj7ee97522011-05-09 21:45:04 +00001386 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001387 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1388}
1389
1390static void
1391s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1392 UChar i5),
1393 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1394{
1395 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1396
sewardj7ee97522011-05-09 21:45:04 +00001397 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001398 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1399 i5);
1400}
1401
1402static void
1403s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1404 UChar r1, UChar r2, UShort i4, UChar m3)
1405{
1406 HChar *mnm = irgen(r1, r2, i4, m3);
1407
sewardj7ee97522011-05-09 21:45:04 +00001408 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001409 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1410 r2, m3, (Int)(Short)i4);
1411}
1412
1413static void
1414s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1415 UChar r1, UChar m3, UShort i4, UChar i2)
1416{
1417 HChar *mnm = irgen(r1, m3, i4, i2);
1418
sewardj7ee97522011-05-09 21:45:04 +00001419 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001420 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1421 r1, i2, m3, (Int)(Short)i4);
1422}
1423
1424static void
1425s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1426 UChar r1, UChar m3, UShort i4, UChar i2)
1427{
1428 HChar *mnm = irgen(r1, m3, i4, i2);
1429
sewardj7ee97522011-05-09 21:45:04 +00001430 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001431 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1432 (Int)(Char)i2, m3, (Int)(Short)i4);
1433}
1434
1435static void
1436s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1437 UChar r1, UInt i2)
1438{
1439 irgen(r1, i2);
1440}
1441
1442static void
1443s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1444 UChar r1, UInt i2)
1445{
1446 HChar *mnm = irgen(r1, i2);
1447
sewardj7ee97522011-05-09 21:45:04 +00001448 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001449 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1450}
1451
1452static void
1453s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1454 UChar r1, UInt i2)
1455{
1456 HChar *mnm = irgen(r1, i2);
1457
sewardj7ee97522011-05-09 21:45:04 +00001458 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001459 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1460}
1461
1462static void
1463s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1464 UChar r1, UInt i2)
1465{
1466 HChar *mnm = irgen(r1, i2);
1467
sewardj7ee97522011-05-09 21:45:04 +00001468 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001469 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1470}
1471
1472static void
1473s390_format_RIL_UP(HChar *(*irgen)(void),
1474 UChar r1, UInt i2)
1475{
1476 HChar *mnm = irgen();
1477
sewardj7ee97522011-05-09 21:45:04 +00001478 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001479 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1480}
1481
1482static void
1483s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1484 IRTemp op4addr),
1485 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1486{
1487 HChar *mnm;
1488 IRTemp op4addr = newTemp(Ity_I64);
1489
1490 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1491 mkU64(0)));
1492
1493 mnm = irgen(r1, m3, i2, op4addr);
1494
sewardj7ee97522011-05-09 21:45:04 +00001495 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001496 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1497 (Int)(Char)i2, m3, d4, 0, b4);
1498}
1499
1500static void
1501s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1502 IRTemp op4addr),
1503 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1504{
1505 HChar *mnm;
1506 IRTemp op4addr = newTemp(Ity_I64);
1507
1508 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1509 mkU64(0)));
1510
1511 mnm = irgen(r1, m3, i2, op4addr);
1512
sewardj7ee97522011-05-09 21:45:04 +00001513 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001514 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1515 i2, m3, d4, 0, b4);
1516}
1517
1518static void
1519s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1520 UChar r1, UChar r2)
1521{
1522 irgen(r1, r2);
1523}
1524
1525static void
1526s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1527 UChar r1, UChar r2)
1528{
1529 HChar *mnm = irgen(r1, r2);
1530
sewardj7ee97522011-05-09 21:45:04 +00001531 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001532 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1533}
1534
1535static void
1536s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1537 UChar r1, UChar r2)
1538{
1539 HChar *mnm = irgen(r1, r2);
1540
sewardj7ee97522011-05-09 21:45:04 +00001541 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001542 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1543}
1544
1545static void
1546s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1547 UChar r1, UChar r2)
1548{
1549 irgen(r1, r2);
1550}
1551
1552static void
1553s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1554 UChar r1, UChar r2)
1555{
1556 HChar *mnm = irgen(r1, r2);
1557
sewardj7ee97522011-05-09 21:45:04 +00001558 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001559 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1560}
1561
1562static void
1563s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1564 UChar r1, UChar r2)
1565{
1566 HChar *mnm = irgen(r1, r2);
1567
sewardj7ee97522011-05-09 21:45:04 +00001568 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001569 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1570}
1571
1572static void
1573s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1574 UChar r1, UChar r2)
1575{
1576 HChar *mnm = irgen(r1, r2);
1577
sewardj7ee97522011-05-09 21:45:04 +00001578 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001579 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1580}
1581
1582static void
1583s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1584 UChar r1, UChar r2)
1585{
1586 HChar *mnm = irgen(r1, r2);
1587
sewardj7ee97522011-05-09 21:45:04 +00001588 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001589 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1590}
1591
1592static void
1593s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1594 UChar r1)
1595{
1596 HChar *mnm = irgen(r1);
1597
sewardj7ee97522011-05-09 21:45:04 +00001598 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001599 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1600}
1601
1602static void
1603s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1604 UChar r1)
1605{
1606 HChar *mnm = irgen(r1);
1607
sewardj7ee97522011-05-09 21:45:04 +00001608 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001609 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1610}
1611
1612static void
florian9af37692012-01-15 21:01:16 +00001613s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1614 UChar m3, UChar r1, UChar r2)
1615{
1616 irgen(m3, r1, r2);
1617
1618 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1619 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1620}
1621
1622static void
sewardj2019a972011-03-07 16:04:07 +00001623s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1624 UChar r1, UChar r3, UChar r2)
1625{
1626 HChar *mnm = irgen(r1, r3, r2);
1627
sewardj7ee97522011-05-09 21:45:04 +00001628 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001629 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1630}
1631
1632static void
sewardjd7bde722011-04-05 13:19:33 +00001633s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1634 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1635{
1636 irgen(m3, r1, r2);
1637
sewardj7ee97522011-05-09 21:45:04 +00001638 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001639 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1640}
1641
1642static void
sewardj2019a972011-03-07 16:04:07 +00001643s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1644 UChar r3, UChar r1, UChar r2)
1645{
1646 HChar *mnm = irgen(r3, r1, r2);
1647
sewardj7ee97522011-05-09 21:45:04 +00001648 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001649 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1650}
1651
1652static void
1653s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1654 UChar r3, UChar r1, UChar r2)
1655{
1656 HChar *mnm = irgen(r3, r1, r2);
1657
sewardj7ee97522011-05-09 21:45:04 +00001658 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001659 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1660}
1661
1662static void
1663s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1664 UChar r3, UChar r1, UChar r2)
1665{
1666 HChar *mnm = irgen(r3, r1, r2);
1667
sewardj7ee97522011-05-09 21:45:04 +00001668 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001669 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1670}
1671
1672static void
1673s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1674 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1675{
1676 HChar *mnm;
1677 IRTemp op4addr = newTemp(Ity_I64);
1678
1679 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1680 mkU64(0)));
1681
1682 mnm = irgen(r1, r2, m3, op4addr);
1683
sewardj7ee97522011-05-09 21:45:04 +00001684 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001685 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1686 r2, m3, d4, 0, b4);
1687}
1688
1689static void
1690s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1691 UChar r1, UChar b2, UShort d2)
1692{
1693 HChar *mnm;
1694 IRTemp op2addr = newTemp(Ity_I64);
1695
1696 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1697 mkU64(0)));
1698
1699 mnm = irgen(r1, op2addr);
1700
sewardj7ee97522011-05-09 21:45:04 +00001701 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001702 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1703}
1704
1705static void
1706s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1707 UChar r1, UChar r3, UChar b2, UShort d2)
1708{
1709 HChar *mnm;
1710 IRTemp op2addr = newTemp(Ity_I64);
1711
1712 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1713 mkU64(0)));
1714
1715 mnm = irgen(r1, r3, op2addr);
1716
sewardj7ee97522011-05-09 21:45:04 +00001717 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001718 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1719}
1720
1721static void
1722s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1723 UChar r1, UChar r3, UChar b2, UShort d2)
1724{
1725 HChar *mnm;
1726 IRTemp op2addr = newTemp(Ity_I64);
1727
1728 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1729 mkU64(0)));
1730
1731 mnm = irgen(r1, r3, op2addr);
1732
sewardj7ee97522011-05-09 21:45:04 +00001733 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001734 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1735}
1736
1737static void
1738s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1739 UChar r1, UChar r3, UChar b2, UShort d2)
1740{
1741 HChar *mnm;
1742 IRTemp op2addr = newTemp(Ity_I64);
1743
1744 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1745 mkU64(0)));
1746
1747 mnm = irgen(r1, r3, op2addr);
1748
sewardj7ee97522011-05-09 21:45:04 +00001749 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001750 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1751}
1752
1753static void
1754s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1755 UChar r1, UChar r3, UShort i2)
1756{
1757 HChar *mnm = irgen(r1, r3, i2);
1758
sewardj7ee97522011-05-09 21:45:04 +00001759 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001760 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1761}
1762
1763static void
1764s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1765 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1766{
1767 HChar *mnm;
1768 IRTemp op2addr = newTemp(Ity_I64);
1769 IRTemp d2 = newTemp(Ity_I64);
1770
1771 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1772 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1773 mkU64(0)));
1774
1775 mnm = irgen(r1, r3, op2addr);
1776
sewardj7ee97522011-05-09 21:45:04 +00001777 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001778 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1779}
1780
1781static void
1782s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1783 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1784{
1785 HChar *mnm;
1786 IRTemp op2addr = newTemp(Ity_I64);
1787 IRTemp d2 = newTemp(Ity_I64);
1788
1789 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1790 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1791 mkU64(0)));
1792
1793 mnm = irgen(r1, r3, op2addr);
1794
sewardj7ee97522011-05-09 21:45:04 +00001795 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001796 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1797}
1798
1799static void
1800s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1801 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1802{
1803 HChar *mnm;
1804 IRTemp op2addr = newTemp(Ity_I64);
1805 IRTemp d2 = newTemp(Ity_I64);
1806
1807 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1808 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1809 mkU64(0)));
1810
1811 mnm = irgen(r1, r3, op2addr);
1812
sewardj7ee97522011-05-09 21:45:04 +00001813 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001814 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1815}
1816
1817static void
sewardjd7bde722011-04-05 13:19:33 +00001818s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1819 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1820 Int xmnm_kind)
1821{
1822 IRTemp op2addr = newTemp(Ity_I64);
1823 IRTemp d2 = newTemp(Ity_I64);
1824
1825 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1826 guest_IA_next_instr);
1827 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1828 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1829 mkU64(0)));
1830
1831 irgen(r1, op2addr);
florianf9e1ed72012-04-17 02:41:56 +00001832 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00001833
sewardj7ee97522011-05-09 21:45:04 +00001834 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001835 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1836}
1837
1838static void
sewardj2019a972011-03-07 16:04:07 +00001839s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1840 IRTemp op2addr),
1841 UChar r1, UChar x2, UChar b2, UShort d2)
1842{
1843 IRTemp op2addr = newTemp(Ity_I64);
1844
1845 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1846 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1847 mkU64(0)));
1848
1849 irgen(r1, x2, b2, d2, op2addr);
1850}
1851
1852static void
1853s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1854 UChar r1, UChar x2, UChar b2, UShort d2)
1855{
1856 HChar *mnm;
1857 IRTemp op2addr = newTemp(Ity_I64);
1858
1859 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1860 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1861 mkU64(0)));
1862
1863 mnm = irgen(r1, op2addr);
1864
sewardj7ee97522011-05-09 21:45:04 +00001865 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001866 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1867}
1868
1869static void
1870s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1871 UChar r1, UChar x2, UChar b2, UShort d2)
1872{
1873 HChar *mnm;
1874 IRTemp op2addr = newTemp(Ity_I64);
1875
1876 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1877 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1878 mkU64(0)));
1879
1880 mnm = irgen(r1, op2addr);
1881
sewardj7ee97522011-05-09 21:45:04 +00001882 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001883 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1884}
1885
1886static void
1887s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1888 UChar r1, UChar x2, UChar b2, UShort d2)
1889{
1890 HChar *mnm;
1891 IRTemp op2addr = newTemp(Ity_I64);
1892
1893 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1894 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1895 mkU64(0)));
1896
1897 mnm = irgen(r1, op2addr);
1898
sewardj7ee97522011-05-09 21:45:04 +00001899 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001900 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1901}
1902
1903static void
1904s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1905 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1906{
1907 HChar *mnm;
1908 IRTemp op2addr = newTemp(Ity_I64);
1909
1910 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1911 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1912 mkU64(0)));
1913
1914 mnm = irgen(r3, op2addr, r1);
1915
sewardj7ee97522011-05-09 21:45:04 +00001916 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001917 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1918}
1919
1920static void
1921s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1922 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1923{
1924 HChar *mnm;
1925 IRTemp op2addr = newTemp(Ity_I64);
1926 IRTemp d2 = newTemp(Ity_I64);
1927
1928 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1929 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1930 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1931 mkU64(0)));
1932
1933 mnm = irgen(r1, op2addr);
1934
sewardj7ee97522011-05-09 21:45:04 +00001935 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001936 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1937}
1938
1939static void
1940s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1941 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1942{
1943 HChar *mnm;
1944 IRTemp op2addr = newTemp(Ity_I64);
1945 IRTemp d2 = newTemp(Ity_I64);
1946
1947 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1948 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1949 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1950 mkU64(0)));
1951
1952 mnm = irgen(r1, op2addr);
1953
sewardj7ee97522011-05-09 21:45:04 +00001954 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001955 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1956}
1957
1958static void
1959s390_format_RXY_URRD(HChar *(*irgen)(void),
1960 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1961{
1962 HChar *mnm;
1963 IRTemp op2addr = newTemp(Ity_I64);
1964 IRTemp d2 = newTemp(Ity_I64);
1965
1966 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1967 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1968 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1969 mkU64(0)));
1970
1971 mnm = irgen();
1972
sewardj7ee97522011-05-09 21:45:04 +00001973 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001974 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1975}
1976
1977static void
1978s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1979 UChar b2, UShort d2)
1980{
1981 HChar *mnm;
1982 IRTemp op2addr = newTemp(Ity_I64);
1983
1984 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1985 mkU64(0)));
1986
1987 mnm = irgen(op2addr);
1988
sewardj7ee97522011-05-09 21:45:04 +00001989 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001990 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1991}
1992
1993static void
1994s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1995 UChar i2, UChar b1, UShort d1)
1996{
1997 HChar *mnm;
1998 IRTemp op1addr = newTemp(Ity_I64);
1999
2000 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2001 mkU64(0)));
2002
2003 mnm = irgen(i2, op1addr);
2004
sewardj7ee97522011-05-09 21:45:04 +00002005 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002006 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2007}
2008
2009static void
2010s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2011 UChar i2, UChar b1, UShort dl1, UChar dh1)
2012{
2013 HChar *mnm;
2014 IRTemp op1addr = newTemp(Ity_I64);
2015 IRTemp d1 = newTemp(Ity_I64);
2016
2017 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2018 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2019 mkU64(0)));
2020
2021 mnm = irgen(i2, op1addr);
2022
sewardj7ee97522011-05-09 21:45:04 +00002023 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002024 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2025}
2026
2027static void
2028s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2029 UChar i2, UChar b1, UShort dl1, UChar dh1)
2030{
2031 HChar *mnm;
2032 IRTemp op1addr = newTemp(Ity_I64);
2033 IRTemp d1 = newTemp(Ity_I64);
2034
2035 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2036 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2037 mkU64(0)));
2038
2039 mnm = irgen(i2, op1addr);
2040
sewardj7ee97522011-05-09 21:45:04 +00002041 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002042 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2043}
2044
2045static void
2046s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2047 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2048{
2049 HChar *mnm;
2050 IRTemp op1addr = newTemp(Ity_I64);
2051 IRTemp op2addr = newTemp(Ity_I64);
2052
2053 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2054 mkU64(0)));
2055 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2056 mkU64(0)));
2057
2058 mnm = irgen(l, op1addr, op2addr);
2059
sewardj7ee97522011-05-09 21:45:04 +00002060 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002061 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2062}
2063
2064static void
2065s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2066 UChar b1, UShort d1, UShort i2)
2067{
2068 HChar *mnm;
2069 IRTemp op1addr = newTemp(Ity_I64);
2070
2071 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2072 mkU64(0)));
2073
2074 mnm = irgen(i2, op1addr);
2075
sewardj7ee97522011-05-09 21:45:04 +00002076 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002077 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2078}
2079
2080static void
2081s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2082 UChar b1, UShort d1, UShort i2)
2083{
2084 HChar *mnm;
2085 IRTemp op1addr = newTemp(Ity_I64);
2086
2087 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2088 mkU64(0)));
2089
2090 mnm = irgen(i2, op1addr);
2091
sewardj7ee97522011-05-09 21:45:04 +00002092 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002093 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2094}
2095
2096
2097
2098/*------------------------------------------------------------*/
2099/*--- Build IR for opcodes ---*/
2100/*------------------------------------------------------------*/
2101
2102static HChar *
florian30e89012011-08-08 18:22:58 +00002103s390_irgen_00(UChar r1 __attribute__((unused)),
2104 UChar r2 __attribute__((unused)))
2105{
2106 IRDirty *d;
2107
2108 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2109 mkIRExprVec_0());
2110 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2111
2112 d->fxState[0].fx = Ifx_Modify; /* read then write */
2113 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2114 d->fxState[0].size = sizeof(ULong);
2115 d->nFxState = 1;
2116
2117 stmt(IRStmt_Dirty(d));
2118
2119 return "00";
2120}
2121
2122static HChar *
sewardj2019a972011-03-07 16:04:07 +00002123s390_irgen_AR(UChar r1, UChar r2)
2124{
2125 IRTemp op1 = newTemp(Ity_I32);
2126 IRTemp op2 = newTemp(Ity_I32);
2127 IRTemp result = newTemp(Ity_I32);
2128
2129 assign(op1, get_gpr_w1(r1));
2130 assign(op2, get_gpr_w1(r2));
2131 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2132 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2133 put_gpr_w1(r1, mkexpr(result));
2134
2135 return "ar";
2136}
2137
2138static HChar *
2139s390_irgen_AGR(UChar r1, UChar r2)
2140{
2141 IRTemp op1 = newTemp(Ity_I64);
2142 IRTemp op2 = newTemp(Ity_I64);
2143 IRTemp result = newTemp(Ity_I64);
2144
2145 assign(op1, get_gpr_dw0(r1));
2146 assign(op2, get_gpr_dw0(r2));
2147 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2148 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2149 put_gpr_dw0(r1, mkexpr(result));
2150
2151 return "agr";
2152}
2153
2154static HChar *
2155s390_irgen_AGFR(UChar r1, UChar r2)
2156{
2157 IRTemp op1 = newTemp(Ity_I64);
2158 IRTemp op2 = newTemp(Ity_I64);
2159 IRTemp result = newTemp(Ity_I64);
2160
2161 assign(op1, get_gpr_dw0(r1));
2162 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2163 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2164 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2165 put_gpr_dw0(r1, mkexpr(result));
2166
2167 return "agfr";
2168}
2169
2170static HChar *
2171s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2172{
2173 IRTemp op2 = newTemp(Ity_I32);
2174 IRTemp op3 = newTemp(Ity_I32);
2175 IRTemp result = newTemp(Ity_I32);
2176
2177 assign(op2, get_gpr_w1(r2));
2178 assign(op3, get_gpr_w1(r3));
2179 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2180 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2181 put_gpr_w1(r1, mkexpr(result));
2182
2183 return "ark";
2184}
2185
2186static HChar *
2187s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2188{
2189 IRTemp op2 = newTemp(Ity_I64);
2190 IRTemp op3 = newTemp(Ity_I64);
2191 IRTemp result = newTemp(Ity_I64);
2192
2193 assign(op2, get_gpr_dw0(r2));
2194 assign(op3, get_gpr_dw0(r3));
2195 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2196 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2197 put_gpr_dw0(r1, mkexpr(result));
2198
2199 return "agrk";
2200}
2201
2202static HChar *
2203s390_irgen_A(UChar r1, IRTemp op2addr)
2204{
2205 IRTemp op1 = newTemp(Ity_I32);
2206 IRTemp op2 = newTemp(Ity_I32);
2207 IRTemp result = newTemp(Ity_I32);
2208
2209 assign(op1, get_gpr_w1(r1));
2210 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2211 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2212 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2213 put_gpr_w1(r1, mkexpr(result));
2214
2215 return "a";
2216}
2217
2218static HChar *
2219s390_irgen_AY(UChar r1, IRTemp op2addr)
2220{
2221 IRTemp op1 = newTemp(Ity_I32);
2222 IRTemp op2 = newTemp(Ity_I32);
2223 IRTemp result = newTemp(Ity_I32);
2224
2225 assign(op1, get_gpr_w1(r1));
2226 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2227 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2228 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2229 put_gpr_w1(r1, mkexpr(result));
2230
2231 return "ay";
2232}
2233
2234static HChar *
2235s390_irgen_AG(UChar r1, IRTemp op2addr)
2236{
2237 IRTemp op1 = newTemp(Ity_I64);
2238 IRTemp op2 = newTemp(Ity_I64);
2239 IRTemp result = newTemp(Ity_I64);
2240
2241 assign(op1, get_gpr_dw0(r1));
2242 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2243 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2244 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2245 put_gpr_dw0(r1, mkexpr(result));
2246
2247 return "ag";
2248}
2249
2250static HChar *
2251s390_irgen_AGF(UChar r1, IRTemp op2addr)
2252{
2253 IRTemp op1 = newTemp(Ity_I64);
2254 IRTemp op2 = newTemp(Ity_I64);
2255 IRTemp result = newTemp(Ity_I64);
2256
2257 assign(op1, get_gpr_dw0(r1));
2258 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2259 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2260 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2261 put_gpr_dw0(r1, mkexpr(result));
2262
2263 return "agf";
2264}
2265
2266static HChar *
2267s390_irgen_AFI(UChar r1, UInt i2)
2268{
2269 IRTemp op1 = newTemp(Ity_I32);
2270 Int op2;
2271 IRTemp result = newTemp(Ity_I32);
2272
2273 assign(op1, get_gpr_w1(r1));
2274 op2 = (Int)i2;
2275 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2276 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2277 mkU32((UInt)op2)));
2278 put_gpr_w1(r1, mkexpr(result));
2279
2280 return "afi";
2281}
2282
2283static HChar *
2284s390_irgen_AGFI(UChar r1, UInt i2)
2285{
2286 IRTemp op1 = newTemp(Ity_I64);
2287 Long op2;
2288 IRTemp result = newTemp(Ity_I64);
2289
2290 assign(op1, get_gpr_dw0(r1));
2291 op2 = (Long)(Int)i2;
2292 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2293 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2294 mkU64((ULong)op2)));
2295 put_gpr_dw0(r1, mkexpr(result));
2296
2297 return "agfi";
2298}
2299
2300static HChar *
2301s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2302{
2303 Int op2;
2304 IRTemp op3 = newTemp(Ity_I32);
2305 IRTemp result = newTemp(Ity_I32);
2306
2307 op2 = (Int)(Short)i2;
2308 assign(op3, get_gpr_w1(r3));
2309 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2310 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2311 op2)), op3);
2312 put_gpr_w1(r1, mkexpr(result));
2313
2314 return "ahik";
2315}
2316
2317static HChar *
2318s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2319{
2320 Long op2;
2321 IRTemp op3 = newTemp(Ity_I64);
2322 IRTemp result = newTemp(Ity_I64);
2323
2324 op2 = (Long)(Short)i2;
2325 assign(op3, get_gpr_dw0(r3));
2326 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2327 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2328 op2)), op3);
2329 put_gpr_dw0(r1, mkexpr(result));
2330
2331 return "aghik";
2332}
2333
2334static HChar *
2335s390_irgen_ASI(UChar i2, IRTemp op1addr)
2336{
2337 IRTemp op1 = newTemp(Ity_I32);
2338 Int op2;
2339 IRTemp result = newTemp(Ity_I32);
2340
2341 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2342 op2 = (Int)(Char)i2;
2343 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2344 store(mkexpr(op1addr), mkexpr(result));
2345 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2346 mkU32((UInt)op2)));
2347
2348 return "asi";
2349}
2350
2351static HChar *
2352s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2353{
2354 IRTemp op1 = newTemp(Ity_I64);
2355 Long op2;
2356 IRTemp result = newTemp(Ity_I64);
2357
2358 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2359 op2 = (Long)(Char)i2;
2360 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2361 store(mkexpr(op1addr), mkexpr(result));
2362 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2363 mkU64((ULong)op2)));
2364
2365 return "agsi";
2366}
2367
2368static HChar *
2369s390_irgen_AH(UChar r1, IRTemp op2addr)
2370{
2371 IRTemp op1 = newTemp(Ity_I32);
2372 IRTemp op2 = newTemp(Ity_I32);
2373 IRTemp result = newTemp(Ity_I32);
2374
2375 assign(op1, get_gpr_w1(r1));
2376 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2377 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2378 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2379 put_gpr_w1(r1, mkexpr(result));
2380
2381 return "ah";
2382}
2383
2384static HChar *
2385s390_irgen_AHY(UChar r1, IRTemp op2addr)
2386{
2387 IRTemp op1 = newTemp(Ity_I32);
2388 IRTemp op2 = newTemp(Ity_I32);
2389 IRTemp result = newTemp(Ity_I32);
2390
2391 assign(op1, get_gpr_w1(r1));
2392 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2393 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2394 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2395 put_gpr_w1(r1, mkexpr(result));
2396
2397 return "ahy";
2398}
2399
2400static HChar *
2401s390_irgen_AHI(UChar r1, UShort i2)
2402{
2403 IRTemp op1 = newTemp(Ity_I32);
2404 Int op2;
2405 IRTemp result = newTemp(Ity_I32);
2406
2407 assign(op1, get_gpr_w1(r1));
2408 op2 = (Int)(Short)i2;
2409 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2410 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2411 mkU32((UInt)op2)));
2412 put_gpr_w1(r1, mkexpr(result));
2413
2414 return "ahi";
2415}
2416
2417static HChar *
2418s390_irgen_AGHI(UChar r1, UShort i2)
2419{
2420 IRTemp op1 = newTemp(Ity_I64);
2421 Long op2;
2422 IRTemp result = newTemp(Ity_I64);
2423
2424 assign(op1, get_gpr_dw0(r1));
2425 op2 = (Long)(Short)i2;
2426 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2427 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2428 mkU64((ULong)op2)));
2429 put_gpr_dw0(r1, mkexpr(result));
2430
2431 return "aghi";
2432}
2433
2434static HChar *
2435s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2436{
2437 IRTemp op2 = newTemp(Ity_I32);
2438 IRTemp op3 = newTemp(Ity_I32);
2439 IRTemp result = newTemp(Ity_I32);
2440
2441 assign(op2, get_gpr_w0(r2));
2442 assign(op3, get_gpr_w0(r3));
2443 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2444 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2445 put_gpr_w0(r1, mkexpr(result));
2446
2447 return "ahhhr";
2448}
2449
2450static HChar *
2451s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2452{
2453 IRTemp op2 = newTemp(Ity_I32);
2454 IRTemp op3 = newTemp(Ity_I32);
2455 IRTemp result = newTemp(Ity_I32);
2456
2457 assign(op2, get_gpr_w0(r2));
2458 assign(op3, get_gpr_w1(r3));
2459 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2460 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2461 put_gpr_w0(r1, mkexpr(result));
2462
2463 return "ahhlr";
2464}
2465
2466static HChar *
2467s390_irgen_AIH(UChar r1, UInt i2)
2468{
2469 IRTemp op1 = newTemp(Ity_I32);
2470 Int op2;
2471 IRTemp result = newTemp(Ity_I32);
2472
2473 assign(op1, get_gpr_w0(r1));
2474 op2 = (Int)i2;
2475 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2476 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2477 mkU32((UInt)op2)));
2478 put_gpr_w0(r1, mkexpr(result));
2479
2480 return "aih";
2481}
2482
2483static HChar *
2484s390_irgen_ALR(UChar r1, UChar r2)
2485{
2486 IRTemp op1 = newTemp(Ity_I32);
2487 IRTemp op2 = newTemp(Ity_I32);
2488 IRTemp result = newTemp(Ity_I32);
2489
2490 assign(op1, get_gpr_w1(r1));
2491 assign(op2, get_gpr_w1(r2));
2492 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2493 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2494 put_gpr_w1(r1, mkexpr(result));
2495
2496 return "alr";
2497}
2498
2499static HChar *
2500s390_irgen_ALGR(UChar r1, UChar r2)
2501{
2502 IRTemp op1 = newTemp(Ity_I64);
2503 IRTemp op2 = newTemp(Ity_I64);
2504 IRTemp result = newTemp(Ity_I64);
2505
2506 assign(op1, get_gpr_dw0(r1));
2507 assign(op2, get_gpr_dw0(r2));
2508 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2509 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2510 put_gpr_dw0(r1, mkexpr(result));
2511
2512 return "algr";
2513}
2514
2515static HChar *
2516s390_irgen_ALGFR(UChar r1, UChar r2)
2517{
2518 IRTemp op1 = newTemp(Ity_I64);
2519 IRTemp op2 = newTemp(Ity_I64);
2520 IRTemp result = newTemp(Ity_I64);
2521
2522 assign(op1, get_gpr_dw0(r1));
2523 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2524 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2525 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2526 put_gpr_dw0(r1, mkexpr(result));
2527
2528 return "algfr";
2529}
2530
2531static HChar *
2532s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2533{
2534 IRTemp op2 = newTemp(Ity_I32);
2535 IRTemp op3 = newTemp(Ity_I32);
2536 IRTemp result = newTemp(Ity_I32);
2537
2538 assign(op2, get_gpr_w1(r2));
2539 assign(op3, get_gpr_w1(r3));
2540 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2541 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2542 put_gpr_w1(r1, mkexpr(result));
2543
2544 return "alrk";
2545}
2546
2547static HChar *
2548s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2549{
2550 IRTemp op2 = newTemp(Ity_I64);
2551 IRTemp op3 = newTemp(Ity_I64);
2552 IRTemp result = newTemp(Ity_I64);
2553
2554 assign(op2, get_gpr_dw0(r2));
2555 assign(op3, get_gpr_dw0(r3));
2556 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2557 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2558 put_gpr_dw0(r1, mkexpr(result));
2559
2560 return "algrk";
2561}
2562
2563static HChar *
2564s390_irgen_AL(UChar r1, IRTemp op2addr)
2565{
2566 IRTemp op1 = newTemp(Ity_I32);
2567 IRTemp op2 = newTemp(Ity_I32);
2568 IRTemp result = newTemp(Ity_I32);
2569
2570 assign(op1, get_gpr_w1(r1));
2571 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2572 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2573 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2574 put_gpr_w1(r1, mkexpr(result));
2575
2576 return "al";
2577}
2578
2579static HChar *
2580s390_irgen_ALY(UChar r1, IRTemp op2addr)
2581{
2582 IRTemp op1 = newTemp(Ity_I32);
2583 IRTemp op2 = newTemp(Ity_I32);
2584 IRTemp result = newTemp(Ity_I32);
2585
2586 assign(op1, get_gpr_w1(r1));
2587 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2588 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2589 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2590 put_gpr_w1(r1, mkexpr(result));
2591
2592 return "aly";
2593}
2594
2595static HChar *
2596s390_irgen_ALG(UChar r1, IRTemp op2addr)
2597{
2598 IRTemp op1 = newTemp(Ity_I64);
2599 IRTemp op2 = newTemp(Ity_I64);
2600 IRTemp result = newTemp(Ity_I64);
2601
2602 assign(op1, get_gpr_dw0(r1));
2603 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2604 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2605 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2606 put_gpr_dw0(r1, mkexpr(result));
2607
2608 return "alg";
2609}
2610
2611static HChar *
2612s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2613{
2614 IRTemp op1 = newTemp(Ity_I64);
2615 IRTemp op2 = newTemp(Ity_I64);
2616 IRTemp result = newTemp(Ity_I64);
2617
2618 assign(op1, get_gpr_dw0(r1));
2619 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2620 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2621 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2622 put_gpr_dw0(r1, mkexpr(result));
2623
2624 return "algf";
2625}
2626
2627static HChar *
2628s390_irgen_ALFI(UChar r1, UInt i2)
2629{
2630 IRTemp op1 = newTemp(Ity_I32);
2631 UInt op2;
2632 IRTemp result = newTemp(Ity_I32);
2633
2634 assign(op1, get_gpr_w1(r1));
2635 op2 = i2;
2636 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2637 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2638 mkU32(op2)));
2639 put_gpr_w1(r1, mkexpr(result));
2640
2641 return "alfi";
2642}
2643
2644static HChar *
2645s390_irgen_ALGFI(UChar r1, UInt i2)
2646{
2647 IRTemp op1 = newTemp(Ity_I64);
2648 ULong op2;
2649 IRTemp result = newTemp(Ity_I64);
2650
2651 assign(op1, get_gpr_dw0(r1));
2652 op2 = (ULong)i2;
2653 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2654 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2655 mkU64(op2)));
2656 put_gpr_dw0(r1, mkexpr(result));
2657
2658 return "algfi";
2659}
2660
2661static HChar *
2662s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2663{
2664 IRTemp op2 = newTemp(Ity_I32);
2665 IRTemp op3 = newTemp(Ity_I32);
2666 IRTemp result = newTemp(Ity_I32);
2667
2668 assign(op2, get_gpr_w0(r2));
2669 assign(op3, get_gpr_w0(r3));
2670 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2671 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2672 put_gpr_w0(r1, mkexpr(result));
2673
2674 return "alhhhr";
2675}
2676
2677static HChar *
2678s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2679{
2680 IRTemp op2 = newTemp(Ity_I32);
2681 IRTemp op3 = newTemp(Ity_I32);
2682 IRTemp result = newTemp(Ity_I32);
2683
2684 assign(op2, get_gpr_w0(r2));
2685 assign(op3, get_gpr_w1(r3));
2686 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2687 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2688 put_gpr_w0(r1, mkexpr(result));
2689
2690 return "alhhlr";
2691}
2692
2693static HChar *
2694s390_irgen_ALCR(UChar r1, UChar r2)
2695{
2696 IRTemp op1 = newTemp(Ity_I32);
2697 IRTemp op2 = newTemp(Ity_I32);
2698 IRTemp result = newTemp(Ity_I32);
2699 IRTemp carry_in = newTemp(Ity_I32);
2700
2701 assign(op1, get_gpr_w1(r1));
2702 assign(op2, get_gpr_w1(r2));
2703 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2704 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2705 mkexpr(carry_in)));
2706 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2707 put_gpr_w1(r1, mkexpr(result));
2708
2709 return "alcr";
2710}
2711
2712static HChar *
2713s390_irgen_ALCGR(UChar r1, UChar r2)
2714{
2715 IRTemp op1 = newTemp(Ity_I64);
2716 IRTemp op2 = newTemp(Ity_I64);
2717 IRTemp result = newTemp(Ity_I64);
2718 IRTemp carry_in = newTemp(Ity_I64);
2719
2720 assign(op1, get_gpr_dw0(r1));
2721 assign(op2, get_gpr_dw0(r2));
2722 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2723 mkU8(1))));
2724 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2725 mkexpr(carry_in)));
2726 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2727 put_gpr_dw0(r1, mkexpr(result));
2728
2729 return "alcgr";
2730}
2731
2732static HChar *
2733s390_irgen_ALC(UChar r1, IRTemp op2addr)
2734{
2735 IRTemp op1 = newTemp(Ity_I32);
2736 IRTemp op2 = newTemp(Ity_I32);
2737 IRTemp result = newTemp(Ity_I32);
2738 IRTemp carry_in = newTemp(Ity_I32);
2739
2740 assign(op1, get_gpr_w1(r1));
2741 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2742 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2743 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2744 mkexpr(carry_in)));
2745 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2746 put_gpr_w1(r1, mkexpr(result));
2747
2748 return "alc";
2749}
2750
2751static HChar *
2752s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2753{
2754 IRTemp op1 = newTemp(Ity_I64);
2755 IRTemp op2 = newTemp(Ity_I64);
2756 IRTemp result = newTemp(Ity_I64);
2757 IRTemp carry_in = newTemp(Ity_I64);
2758
2759 assign(op1, get_gpr_dw0(r1));
2760 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2761 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2762 mkU8(1))));
2763 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2764 mkexpr(carry_in)));
2765 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2766 put_gpr_dw0(r1, mkexpr(result));
2767
2768 return "alcg";
2769}
2770
2771static HChar *
2772s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2773{
2774 IRTemp op1 = newTemp(Ity_I32);
2775 UInt op2;
2776 IRTemp result = newTemp(Ity_I32);
2777
2778 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2779 op2 = (UInt)(Int)(Char)i2;
2780 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2781 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2782 mkU32(op2)));
2783 store(mkexpr(op1addr), mkexpr(result));
2784
2785 return "alsi";
2786}
2787
2788static HChar *
2789s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2790{
2791 IRTemp op1 = newTemp(Ity_I64);
2792 ULong op2;
2793 IRTemp result = newTemp(Ity_I64);
2794
2795 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2796 op2 = (ULong)(Long)(Char)i2;
2797 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2798 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2799 mkU64(op2)));
2800 store(mkexpr(op1addr), mkexpr(result));
2801
2802 return "algsi";
2803}
2804
2805static HChar *
2806s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2807{
2808 UInt op2;
2809 IRTemp op3 = newTemp(Ity_I32);
2810 IRTemp result = newTemp(Ity_I32);
2811
2812 op2 = (UInt)(Int)(Short)i2;
2813 assign(op3, get_gpr_w1(r3));
2814 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2815 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2816 op3);
2817 put_gpr_w1(r1, mkexpr(result));
2818
2819 return "alhsik";
2820}
2821
2822static HChar *
2823s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2824{
2825 ULong op2;
2826 IRTemp op3 = newTemp(Ity_I64);
2827 IRTemp result = newTemp(Ity_I64);
2828
2829 op2 = (ULong)(Long)(Short)i2;
2830 assign(op3, get_gpr_dw0(r3));
2831 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2832 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2833 op3);
2834 put_gpr_dw0(r1, mkexpr(result));
2835
2836 return "alghsik";
2837}
2838
2839static HChar *
2840s390_irgen_ALSIH(UChar r1, UInt i2)
2841{
2842 IRTemp op1 = newTemp(Ity_I32);
2843 UInt op2;
2844 IRTemp result = newTemp(Ity_I32);
2845
2846 assign(op1, get_gpr_w0(r1));
2847 op2 = i2;
2848 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2849 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2850 mkU32(op2)));
2851 put_gpr_w0(r1, mkexpr(result));
2852
2853 return "alsih";
2854}
2855
2856static HChar *
2857s390_irgen_ALSIHN(UChar r1, UInt i2)
2858{
2859 IRTemp op1 = newTemp(Ity_I32);
2860 UInt op2;
2861 IRTemp result = newTemp(Ity_I32);
2862
2863 assign(op1, get_gpr_w0(r1));
2864 op2 = i2;
2865 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2866 put_gpr_w0(r1, mkexpr(result));
2867
2868 return "alsihn";
2869}
2870
2871static HChar *
2872s390_irgen_NR(UChar r1, UChar r2)
2873{
2874 IRTemp op1 = newTemp(Ity_I32);
2875 IRTemp op2 = newTemp(Ity_I32);
2876 IRTemp result = newTemp(Ity_I32);
2877
2878 assign(op1, get_gpr_w1(r1));
2879 assign(op2, get_gpr_w1(r2));
2880 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2881 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2882 put_gpr_w1(r1, mkexpr(result));
2883
2884 return "nr";
2885}
2886
2887static HChar *
2888s390_irgen_NGR(UChar r1, UChar r2)
2889{
2890 IRTemp op1 = newTemp(Ity_I64);
2891 IRTemp op2 = newTemp(Ity_I64);
2892 IRTemp result = newTemp(Ity_I64);
2893
2894 assign(op1, get_gpr_dw0(r1));
2895 assign(op2, get_gpr_dw0(r2));
2896 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2897 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2898 put_gpr_dw0(r1, mkexpr(result));
2899
2900 return "ngr";
2901}
2902
2903static HChar *
2904s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2905{
2906 IRTemp op2 = newTemp(Ity_I32);
2907 IRTemp op3 = newTemp(Ity_I32);
2908 IRTemp result = newTemp(Ity_I32);
2909
2910 assign(op2, get_gpr_w1(r2));
2911 assign(op3, get_gpr_w1(r3));
2912 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2913 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2914 put_gpr_w1(r1, mkexpr(result));
2915
2916 return "nrk";
2917}
2918
2919static HChar *
2920s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2921{
2922 IRTemp op2 = newTemp(Ity_I64);
2923 IRTemp op3 = newTemp(Ity_I64);
2924 IRTemp result = newTemp(Ity_I64);
2925
2926 assign(op2, get_gpr_dw0(r2));
2927 assign(op3, get_gpr_dw0(r3));
2928 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2929 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2930 put_gpr_dw0(r1, mkexpr(result));
2931
2932 return "ngrk";
2933}
2934
2935static HChar *
2936s390_irgen_N(UChar r1, IRTemp op2addr)
2937{
2938 IRTemp op1 = newTemp(Ity_I32);
2939 IRTemp op2 = newTemp(Ity_I32);
2940 IRTemp result = newTemp(Ity_I32);
2941
2942 assign(op1, get_gpr_w1(r1));
2943 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2944 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2945 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2946 put_gpr_w1(r1, mkexpr(result));
2947
2948 return "n";
2949}
2950
2951static HChar *
2952s390_irgen_NY(UChar r1, IRTemp op2addr)
2953{
2954 IRTemp op1 = newTemp(Ity_I32);
2955 IRTemp op2 = newTemp(Ity_I32);
2956 IRTemp result = newTemp(Ity_I32);
2957
2958 assign(op1, get_gpr_w1(r1));
2959 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2960 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2961 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2962 put_gpr_w1(r1, mkexpr(result));
2963
2964 return "ny";
2965}
2966
2967static HChar *
2968s390_irgen_NG(UChar r1, IRTemp op2addr)
2969{
2970 IRTemp op1 = newTemp(Ity_I64);
2971 IRTemp op2 = newTemp(Ity_I64);
2972 IRTemp result = newTemp(Ity_I64);
2973
2974 assign(op1, get_gpr_dw0(r1));
2975 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2976 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2977 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2978 put_gpr_dw0(r1, mkexpr(result));
2979
2980 return "ng";
2981}
2982
2983static HChar *
2984s390_irgen_NI(UChar i2, IRTemp op1addr)
2985{
2986 IRTemp op1 = newTemp(Ity_I8);
2987 UChar op2;
2988 IRTemp result = newTemp(Ity_I8);
2989
2990 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2991 op2 = i2;
2992 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2993 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2994 store(mkexpr(op1addr), mkexpr(result));
2995
2996 return "ni";
2997}
2998
2999static HChar *
3000s390_irgen_NIY(UChar i2, IRTemp op1addr)
3001{
3002 IRTemp op1 = newTemp(Ity_I8);
3003 UChar op2;
3004 IRTemp result = newTemp(Ity_I8);
3005
3006 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3007 op2 = i2;
3008 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3009 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3010 store(mkexpr(op1addr), mkexpr(result));
3011
3012 return "niy";
3013}
3014
3015static HChar *
3016s390_irgen_NIHF(UChar r1, UInt i2)
3017{
3018 IRTemp op1 = newTemp(Ity_I32);
3019 UInt op2;
3020 IRTemp result = newTemp(Ity_I32);
3021
3022 assign(op1, get_gpr_w0(r1));
3023 op2 = i2;
3024 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3025 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3026 put_gpr_w0(r1, mkexpr(result));
3027
3028 return "nihf";
3029}
3030
3031static HChar *
3032s390_irgen_NIHH(UChar r1, UShort i2)
3033{
3034 IRTemp op1 = newTemp(Ity_I16);
3035 UShort op2;
3036 IRTemp result = newTemp(Ity_I16);
3037
3038 assign(op1, get_gpr_hw0(r1));
3039 op2 = i2;
3040 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3041 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3042 put_gpr_hw0(r1, mkexpr(result));
3043
3044 return "nihh";
3045}
3046
3047static HChar *
3048s390_irgen_NIHL(UChar r1, UShort i2)
3049{
3050 IRTemp op1 = newTemp(Ity_I16);
3051 UShort op2;
3052 IRTemp result = newTemp(Ity_I16);
3053
3054 assign(op1, get_gpr_hw1(r1));
3055 op2 = i2;
3056 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3057 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3058 put_gpr_hw1(r1, mkexpr(result));
3059
3060 return "nihl";
3061}
3062
3063static HChar *
3064s390_irgen_NILF(UChar r1, UInt i2)
3065{
3066 IRTemp op1 = newTemp(Ity_I32);
3067 UInt op2;
3068 IRTemp result = newTemp(Ity_I32);
3069
3070 assign(op1, get_gpr_w1(r1));
3071 op2 = i2;
3072 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3073 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3074 put_gpr_w1(r1, mkexpr(result));
3075
3076 return "nilf";
3077}
3078
3079static HChar *
3080s390_irgen_NILH(UChar r1, UShort i2)
3081{
3082 IRTemp op1 = newTemp(Ity_I16);
3083 UShort op2;
3084 IRTemp result = newTemp(Ity_I16);
3085
3086 assign(op1, get_gpr_hw2(r1));
3087 op2 = i2;
3088 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3089 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3090 put_gpr_hw2(r1, mkexpr(result));
3091
3092 return "nilh";
3093}
3094
3095static HChar *
3096s390_irgen_NILL(UChar r1, UShort i2)
3097{
3098 IRTemp op1 = newTemp(Ity_I16);
3099 UShort op2;
3100 IRTemp result = newTemp(Ity_I16);
3101
3102 assign(op1, get_gpr_hw3(r1));
3103 op2 = i2;
3104 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3105 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3106 put_gpr_hw3(r1, mkexpr(result));
3107
3108 return "nill";
3109}
3110
3111static HChar *
3112s390_irgen_BASR(UChar r1, UChar r2)
3113{
3114 IRTemp target = newTemp(Ity_I64);
3115
3116 if (r2 == 0) {
3117 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3118 } else {
3119 if (r1 != r2) {
3120 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3121 call_function(get_gpr_dw0(r2));
3122 } else {
3123 assign(target, get_gpr_dw0(r2));
3124 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3125 call_function(mkexpr(target));
3126 }
3127 }
3128
3129 return "basr";
3130}
3131
3132static HChar *
3133s390_irgen_BAS(UChar r1, IRTemp op2addr)
3134{
3135 IRTemp target = newTemp(Ity_I64);
3136
3137 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3138 assign(target, mkexpr(op2addr));
3139 call_function(mkexpr(target));
3140
3141 return "bas";
3142}
3143
3144static HChar *
3145s390_irgen_BCR(UChar r1, UChar r2)
3146{
3147 IRTemp cond = newTemp(Ity_I32);
3148
sewardja52e37e2011-04-28 18:48:06 +00003149 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3150 stmt(IRStmt_MBE(Imbe_Fence));
3151 }
3152
sewardj2019a972011-03-07 16:04:07 +00003153 if ((r2 == 0) || (r1 == 0)) {
3154 } else {
3155 if (r1 == 15) {
3156 return_from_function(get_gpr_dw0(r2));
3157 } else {
3158 assign(cond, s390_call_calculate_cond(r1));
3159 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3160 mkU32(0)), get_gpr_dw0(r2));
3161 }
3162 }
sewardj7ee97522011-05-09 21:45:04 +00003163 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003164 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3165
3166 return "bcr";
3167}
3168
3169static HChar *
3170s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3171{
3172 IRTemp cond = newTemp(Ity_I32);
3173
3174 if (r1 == 0) {
3175 } else {
3176 if (r1 == 15) {
3177 always_goto(mkexpr(op2addr));
3178 } else {
3179 assign(cond, s390_call_calculate_cond(r1));
3180 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3181 mkU32(0)), mkexpr(op2addr));
3182 }
3183 }
sewardj7ee97522011-05-09 21:45:04 +00003184 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003185 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3186
3187 return "bc";
3188}
3189
3190static HChar *
3191s390_irgen_BCTR(UChar r1, UChar r2)
3192{
3193 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3194 if (r2 != 0) {
3195 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3196 ), get_gpr_dw0(r2));
3197 }
3198
3199 return "bctr";
3200}
3201
3202static HChar *
3203s390_irgen_BCTGR(UChar r1, UChar r2)
3204{
3205 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3206 if (r2 != 0) {
3207 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3208 mkU64(0)), get_gpr_dw0(r2));
3209 }
3210
3211 return "bctgr";
3212}
3213
3214static HChar *
3215s390_irgen_BCT(UChar r1, IRTemp op2addr)
3216{
3217 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3218 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3219 mkexpr(op2addr));
3220
3221 return "bct";
3222}
3223
3224static HChar *
3225s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3226{
3227 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3228 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3229 mkexpr(op2addr));
3230
3231 return "bctg";
3232}
3233
3234static HChar *
3235s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3236{
3237 IRTemp value = newTemp(Ity_I32);
3238
3239 assign(value, get_gpr_w1(r3 | 1));
3240 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3241 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3242 mkexpr(value)), mkexpr(op2addr));
3243
3244 return "bxh";
3245}
3246
3247static HChar *
3248s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3249{
3250 IRTemp value = newTemp(Ity_I64);
3251
3252 assign(value, get_gpr_dw0(r3 | 1));
3253 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3254 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3255 mkexpr(value)), mkexpr(op2addr));
3256
3257 return "bxhg";
3258}
3259
3260static HChar *
3261s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3262{
3263 IRTemp value = newTemp(Ity_I32);
3264
3265 assign(value, get_gpr_w1(r3 | 1));
3266 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3267 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3268 get_gpr_w1(r1)), mkexpr(op2addr));
3269
3270 return "bxle";
3271}
3272
3273static HChar *
3274s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3275{
3276 IRTemp value = newTemp(Ity_I64);
3277
3278 assign(value, get_gpr_dw0(r3 | 1));
3279 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3280 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3281 get_gpr_dw0(r1)), mkexpr(op2addr));
3282
3283 return "bxleg";
3284}
3285
3286static HChar *
3287s390_irgen_BRAS(UChar r1, UShort i2)
3288{
3289 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003290 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003291
3292 return "bras";
3293}
3294
3295static HChar *
3296s390_irgen_BRASL(UChar r1, UInt i2)
3297{
3298 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003299 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003300
3301 return "brasl";
3302}
3303
3304static HChar *
3305s390_irgen_BRC(UChar r1, UShort i2)
3306{
3307 IRTemp cond = newTemp(Ity_I32);
3308
3309 if (r1 == 0) {
3310 } else {
3311 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003312 always_goto_and_chase(
3313 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003314 } else {
3315 assign(cond, s390_call_calculate_cond(r1));
3316 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3317 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3318
3319 }
3320 }
sewardj7ee97522011-05-09 21:45:04 +00003321 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003322 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3323
3324 return "brc";
3325}
3326
3327static HChar *
3328s390_irgen_BRCL(UChar r1, UInt i2)
3329{
3330 IRTemp cond = newTemp(Ity_I32);
3331
3332 if (r1 == 0) {
3333 } else {
3334 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003335 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003336 } else {
3337 assign(cond, s390_call_calculate_cond(r1));
3338 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3339 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3340 }
3341 }
sewardj7ee97522011-05-09 21:45:04 +00003342 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003343 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3344
3345 return "brcl";
3346}
3347
3348static HChar *
3349s390_irgen_BRCT(UChar r1, UShort i2)
3350{
3351 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3352 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3353 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3354
3355 return "brct";
3356}
3357
3358static HChar *
3359s390_irgen_BRCTG(UChar r1, UShort i2)
3360{
3361 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3362 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3363 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3364
3365 return "brctg";
3366}
3367
3368static HChar *
3369s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3370{
3371 IRTemp value = newTemp(Ity_I32);
3372
3373 assign(value, get_gpr_w1(r3 | 1));
3374 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3375 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3376 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3377
3378 return "brxh";
3379}
3380
3381static HChar *
3382s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3383{
3384 IRTemp value = newTemp(Ity_I64);
3385
3386 assign(value, get_gpr_dw0(r3 | 1));
3387 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3388 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3389 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3390
3391 return "brxhg";
3392}
3393
3394static HChar *
3395s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3396{
3397 IRTemp value = newTemp(Ity_I32);
3398
3399 assign(value, get_gpr_w1(r3 | 1));
3400 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3401 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3402 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3403
3404 return "brxle";
3405}
3406
3407static HChar *
3408s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3409{
3410 IRTemp value = newTemp(Ity_I64);
3411
3412 assign(value, get_gpr_dw0(r3 | 1));
3413 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3414 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3415 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3416
3417 return "brxlg";
3418}
3419
3420static HChar *
3421s390_irgen_CR(UChar r1, UChar r2)
3422{
3423 IRTemp op1 = newTemp(Ity_I32);
3424 IRTemp op2 = newTemp(Ity_I32);
3425
3426 assign(op1, get_gpr_w1(r1));
3427 assign(op2, get_gpr_w1(r2));
3428 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3429
3430 return "cr";
3431}
3432
3433static HChar *
3434s390_irgen_CGR(UChar r1, UChar r2)
3435{
3436 IRTemp op1 = newTemp(Ity_I64);
3437 IRTemp op2 = newTemp(Ity_I64);
3438
3439 assign(op1, get_gpr_dw0(r1));
3440 assign(op2, get_gpr_dw0(r2));
3441 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3442
3443 return "cgr";
3444}
3445
3446static HChar *
3447s390_irgen_CGFR(UChar r1, UChar r2)
3448{
3449 IRTemp op1 = newTemp(Ity_I64);
3450 IRTemp op2 = newTemp(Ity_I64);
3451
3452 assign(op1, get_gpr_dw0(r1));
3453 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3454 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3455
3456 return "cgfr";
3457}
3458
3459static HChar *
3460s390_irgen_C(UChar r1, IRTemp op2addr)
3461{
3462 IRTemp op1 = newTemp(Ity_I32);
3463 IRTemp op2 = newTemp(Ity_I32);
3464
3465 assign(op1, get_gpr_w1(r1));
3466 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3467 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3468
3469 return "c";
3470}
3471
3472static HChar *
3473s390_irgen_CY(UChar r1, IRTemp op2addr)
3474{
3475 IRTemp op1 = newTemp(Ity_I32);
3476 IRTemp op2 = newTemp(Ity_I32);
3477
3478 assign(op1, get_gpr_w1(r1));
3479 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3480 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3481
3482 return "cy";
3483}
3484
3485static HChar *
3486s390_irgen_CG(UChar r1, IRTemp op2addr)
3487{
3488 IRTemp op1 = newTemp(Ity_I64);
3489 IRTemp op2 = newTemp(Ity_I64);
3490
3491 assign(op1, get_gpr_dw0(r1));
3492 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3493 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3494
3495 return "cg";
3496}
3497
3498static HChar *
3499s390_irgen_CGF(UChar r1, IRTemp op2addr)
3500{
3501 IRTemp op1 = newTemp(Ity_I64);
3502 IRTemp op2 = newTemp(Ity_I64);
3503
3504 assign(op1, get_gpr_dw0(r1));
3505 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3506 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3507
3508 return "cgf";
3509}
3510
3511static HChar *
3512s390_irgen_CFI(UChar r1, UInt i2)
3513{
3514 IRTemp op1 = newTemp(Ity_I32);
3515 Int op2;
3516
3517 assign(op1, get_gpr_w1(r1));
3518 op2 = (Int)i2;
3519 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3520 mkU32((UInt)op2)));
3521
3522 return "cfi";
3523}
3524
3525static HChar *
3526s390_irgen_CGFI(UChar r1, UInt i2)
3527{
3528 IRTemp op1 = newTemp(Ity_I64);
3529 Long op2;
3530
3531 assign(op1, get_gpr_dw0(r1));
3532 op2 = (Long)(Int)i2;
3533 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3534 mkU64((ULong)op2)));
3535
3536 return "cgfi";
3537}
3538
3539static HChar *
3540s390_irgen_CRL(UChar r1, UInt i2)
3541{
3542 IRTemp op1 = newTemp(Ity_I32);
3543 IRTemp op2 = newTemp(Ity_I32);
3544
3545 assign(op1, get_gpr_w1(r1));
3546 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3547 i2 << 1))));
3548 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3549
3550 return "crl";
3551}
3552
3553static HChar *
3554s390_irgen_CGRL(UChar r1, UInt i2)
3555{
3556 IRTemp op1 = newTemp(Ity_I64);
3557 IRTemp op2 = newTemp(Ity_I64);
3558
3559 assign(op1, get_gpr_dw0(r1));
3560 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3561 i2 << 1))));
3562 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3563
3564 return "cgrl";
3565}
3566
3567static HChar *
3568s390_irgen_CGFRL(UChar r1, UInt i2)
3569{
3570 IRTemp op1 = newTemp(Ity_I64);
3571 IRTemp op2 = newTemp(Ity_I64);
3572
3573 assign(op1, get_gpr_dw0(r1));
3574 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3575 ((ULong)(Long)(Int)i2 << 1)))));
3576 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3577
3578 return "cgfrl";
3579}
3580
3581static HChar *
3582s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3583{
3584 IRTemp op1 = newTemp(Ity_I32);
3585 IRTemp op2 = newTemp(Ity_I32);
3586 IRTemp icc = newTemp(Ity_I32);
3587 IRTemp cond = newTemp(Ity_I32);
3588
3589 if (m3 == 0) {
3590 } else {
3591 if (m3 == 14) {
3592 always_goto(mkexpr(op4addr));
3593 } else {
3594 assign(op1, get_gpr_w1(r1));
3595 assign(op2, get_gpr_w1(r2));
3596 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3597 op2));
3598 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3599 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3600 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3601 mkU32(0)), mkexpr(op4addr));
3602 }
3603 }
3604
3605 return "crb";
3606}
3607
3608static HChar *
3609s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3610{
3611 IRTemp op1 = newTemp(Ity_I64);
3612 IRTemp op2 = newTemp(Ity_I64);
3613 IRTemp icc = newTemp(Ity_I32);
3614 IRTemp cond = newTemp(Ity_I32);
3615
3616 if (m3 == 0) {
3617 } else {
3618 if (m3 == 14) {
3619 always_goto(mkexpr(op4addr));
3620 } else {
3621 assign(op1, get_gpr_dw0(r1));
3622 assign(op2, get_gpr_dw0(r2));
3623 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3624 op2));
3625 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3626 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3627 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3628 mkU32(0)), mkexpr(op4addr));
3629 }
3630 }
3631
3632 return "cgrb";
3633}
3634
3635static HChar *
3636s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3637{
3638 IRTemp op1 = newTemp(Ity_I32);
3639 IRTemp op2 = newTemp(Ity_I32);
3640 IRTemp icc = newTemp(Ity_I32);
3641 IRTemp cond = newTemp(Ity_I32);
3642
3643 if (m3 == 0) {
3644 } else {
3645 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003646 always_goto_and_chase(
3647 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003648 } else {
3649 assign(op1, get_gpr_w1(r1));
3650 assign(op2, get_gpr_w1(r2));
3651 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3652 op2));
3653 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3654 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3655 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3656 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3657
3658 }
3659 }
3660
3661 return "crj";
3662}
3663
3664static HChar *
3665s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3666{
3667 IRTemp op1 = newTemp(Ity_I64);
3668 IRTemp op2 = newTemp(Ity_I64);
3669 IRTemp icc = newTemp(Ity_I32);
3670 IRTemp cond = newTemp(Ity_I32);
3671
3672 if (m3 == 0) {
3673 } else {
3674 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003675 always_goto_and_chase(
3676 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003677 } else {
3678 assign(op1, get_gpr_dw0(r1));
3679 assign(op2, get_gpr_dw0(r2));
3680 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3681 op2));
3682 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3683 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3684 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3685 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3686
3687 }
3688 }
3689
3690 return "cgrj";
3691}
3692
3693static HChar *
3694s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3695{
3696 IRTemp op1 = newTemp(Ity_I32);
3697 Int op2;
3698 IRTemp icc = newTemp(Ity_I32);
3699 IRTemp cond = newTemp(Ity_I32);
3700
3701 if (m3 == 0) {
3702 } else {
3703 if (m3 == 14) {
3704 always_goto(mkexpr(op4addr));
3705 } else {
3706 assign(op1, get_gpr_w1(r1));
3707 op2 = (Int)(Char)i2;
3708 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3709 mktemp(Ity_I32, mkU32((UInt)op2))));
3710 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3711 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3712 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3713 mkU32(0)), mkexpr(op4addr));
3714 }
3715 }
3716
3717 return "cib";
3718}
3719
3720static HChar *
3721s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3722{
3723 IRTemp op1 = newTemp(Ity_I64);
3724 Long op2;
3725 IRTemp icc = newTemp(Ity_I32);
3726 IRTemp cond = newTemp(Ity_I32);
3727
3728 if (m3 == 0) {
3729 } else {
3730 if (m3 == 14) {
3731 always_goto(mkexpr(op4addr));
3732 } else {
3733 assign(op1, get_gpr_dw0(r1));
3734 op2 = (Long)(Char)i2;
3735 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3736 mktemp(Ity_I64, mkU64((ULong)op2))));
3737 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3738 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3739 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3740 mkU32(0)), mkexpr(op4addr));
3741 }
3742 }
3743
3744 return "cgib";
3745}
3746
3747static HChar *
3748s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3749{
3750 IRTemp op1 = newTemp(Ity_I32);
3751 Int op2;
3752 IRTemp icc = newTemp(Ity_I32);
3753 IRTemp cond = newTemp(Ity_I32);
3754
3755 if (m3 == 0) {
3756 } else {
3757 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003758 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003759 } else {
3760 assign(op1, get_gpr_w1(r1));
3761 op2 = (Int)(Char)i2;
3762 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3763 mktemp(Ity_I32, mkU32((UInt)op2))));
3764 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3765 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3766 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3767 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3768
3769 }
3770 }
3771
3772 return "cij";
3773}
3774
3775static HChar *
3776s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3777{
3778 IRTemp op1 = newTemp(Ity_I64);
3779 Long op2;
3780 IRTemp icc = newTemp(Ity_I32);
3781 IRTemp cond = newTemp(Ity_I32);
3782
3783 if (m3 == 0) {
3784 } else {
3785 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003786 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003787 } else {
3788 assign(op1, get_gpr_dw0(r1));
3789 op2 = (Long)(Char)i2;
3790 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3791 mktemp(Ity_I64, mkU64((ULong)op2))));
3792 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3793 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3794 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3795 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3796
3797 }
3798 }
3799
3800 return "cgij";
3801}
3802
3803static HChar *
3804s390_irgen_CH(UChar r1, IRTemp op2addr)
3805{
3806 IRTemp op1 = newTemp(Ity_I32);
3807 IRTemp op2 = newTemp(Ity_I32);
3808
3809 assign(op1, get_gpr_w1(r1));
3810 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3811 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3812
3813 return "ch";
3814}
3815
3816static HChar *
3817s390_irgen_CHY(UChar r1, IRTemp op2addr)
3818{
3819 IRTemp op1 = newTemp(Ity_I32);
3820 IRTemp op2 = newTemp(Ity_I32);
3821
3822 assign(op1, get_gpr_w1(r1));
3823 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3824 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3825
3826 return "chy";
3827}
3828
3829static HChar *
3830s390_irgen_CGH(UChar r1, IRTemp op2addr)
3831{
3832 IRTemp op1 = newTemp(Ity_I64);
3833 IRTemp op2 = newTemp(Ity_I64);
3834
3835 assign(op1, get_gpr_dw0(r1));
3836 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3837 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3838
3839 return "cgh";
3840}
3841
3842static HChar *
3843s390_irgen_CHI(UChar r1, UShort i2)
3844{
3845 IRTemp op1 = newTemp(Ity_I32);
3846 Int op2;
3847
3848 assign(op1, get_gpr_w1(r1));
3849 op2 = (Int)(Short)i2;
3850 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3851 mkU32((UInt)op2)));
3852
3853 return "chi";
3854}
3855
3856static HChar *
3857s390_irgen_CGHI(UChar r1, UShort i2)
3858{
3859 IRTemp op1 = newTemp(Ity_I64);
3860 Long op2;
3861
3862 assign(op1, get_gpr_dw0(r1));
3863 op2 = (Long)(Short)i2;
3864 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3865 mkU64((ULong)op2)));
3866
3867 return "cghi";
3868}
3869
3870static HChar *
3871s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3872{
3873 IRTemp op1 = newTemp(Ity_I16);
3874 Short op2;
3875
3876 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3877 op2 = (Short)i2;
3878 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3879 mkU16((UShort)op2)));
3880
3881 return "chhsi";
3882}
3883
3884static HChar *
3885s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3886{
3887 IRTemp op1 = newTemp(Ity_I32);
3888 Int op2;
3889
3890 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3891 op2 = (Int)(Short)i2;
3892 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3893 mkU32((UInt)op2)));
3894
3895 return "chsi";
3896}
3897
3898static HChar *
3899s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3900{
3901 IRTemp op1 = newTemp(Ity_I64);
3902 Long op2;
3903
3904 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3905 op2 = (Long)(Short)i2;
3906 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3907 mkU64((ULong)op2)));
3908
3909 return "cghsi";
3910}
3911
3912static HChar *
3913s390_irgen_CHRL(UChar r1, UInt i2)
3914{
3915 IRTemp op1 = newTemp(Ity_I32);
3916 IRTemp op2 = newTemp(Ity_I32);
3917
3918 assign(op1, get_gpr_w1(r1));
3919 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3920 ((ULong)(Long)(Int)i2 << 1)))));
3921 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3922
3923 return "chrl";
3924}
3925
3926static HChar *
3927s390_irgen_CGHRL(UChar r1, UInt i2)
3928{
3929 IRTemp op1 = newTemp(Ity_I64);
3930 IRTemp op2 = newTemp(Ity_I64);
3931
3932 assign(op1, get_gpr_dw0(r1));
3933 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3934 ((ULong)(Long)(Int)i2 << 1)))));
3935 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3936
3937 return "cghrl";
3938}
3939
3940static HChar *
3941s390_irgen_CHHR(UChar r1, UChar r2)
3942{
3943 IRTemp op1 = newTemp(Ity_I32);
3944 IRTemp op2 = newTemp(Ity_I32);
3945
3946 assign(op1, get_gpr_w0(r1));
3947 assign(op2, get_gpr_w0(r2));
3948 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3949
3950 return "chhr";
3951}
3952
3953static HChar *
3954s390_irgen_CHLR(UChar r1, UChar r2)
3955{
3956 IRTemp op1 = newTemp(Ity_I32);
3957 IRTemp op2 = newTemp(Ity_I32);
3958
3959 assign(op1, get_gpr_w0(r1));
3960 assign(op2, get_gpr_w1(r2));
3961 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3962
3963 return "chlr";
3964}
3965
3966static HChar *
3967s390_irgen_CHF(UChar r1, IRTemp op2addr)
3968{
3969 IRTemp op1 = newTemp(Ity_I32);
3970 IRTemp op2 = newTemp(Ity_I32);
3971
3972 assign(op1, get_gpr_w0(r1));
3973 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3974 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3975
3976 return "chf";
3977}
3978
3979static HChar *
3980s390_irgen_CIH(UChar r1, UInt i2)
3981{
3982 IRTemp op1 = newTemp(Ity_I32);
3983 Int op2;
3984
3985 assign(op1, get_gpr_w0(r1));
3986 op2 = (Int)i2;
3987 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3988 mkU32((UInt)op2)));
3989
3990 return "cih";
3991}
3992
3993static HChar *
3994s390_irgen_CLR(UChar r1, UChar r2)
3995{
3996 IRTemp op1 = newTemp(Ity_I32);
3997 IRTemp op2 = newTemp(Ity_I32);
3998
3999 assign(op1, get_gpr_w1(r1));
4000 assign(op2, get_gpr_w1(r2));
4001 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4002
4003 return "clr";
4004}
4005
4006static HChar *
4007s390_irgen_CLGR(UChar r1, UChar r2)
4008{
4009 IRTemp op1 = newTemp(Ity_I64);
4010 IRTemp op2 = newTemp(Ity_I64);
4011
4012 assign(op1, get_gpr_dw0(r1));
4013 assign(op2, get_gpr_dw0(r2));
4014 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4015
4016 return "clgr";
4017}
4018
4019static HChar *
4020s390_irgen_CLGFR(UChar r1, UChar r2)
4021{
4022 IRTemp op1 = newTemp(Ity_I64);
4023 IRTemp op2 = newTemp(Ity_I64);
4024
4025 assign(op1, get_gpr_dw0(r1));
4026 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4027 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4028
4029 return "clgfr";
4030}
4031
4032static HChar *
4033s390_irgen_CL(UChar r1, IRTemp op2addr)
4034{
4035 IRTemp op1 = newTemp(Ity_I32);
4036 IRTemp op2 = newTemp(Ity_I32);
4037
4038 assign(op1, get_gpr_w1(r1));
4039 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4040 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4041
4042 return "cl";
4043}
4044
4045static HChar *
4046s390_irgen_CLY(UChar r1, IRTemp op2addr)
4047{
4048 IRTemp op1 = newTemp(Ity_I32);
4049 IRTemp op2 = newTemp(Ity_I32);
4050
4051 assign(op1, get_gpr_w1(r1));
4052 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4053 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4054
4055 return "cly";
4056}
4057
4058static HChar *
4059s390_irgen_CLG(UChar r1, IRTemp op2addr)
4060{
4061 IRTemp op1 = newTemp(Ity_I64);
4062 IRTemp op2 = newTemp(Ity_I64);
4063
4064 assign(op1, get_gpr_dw0(r1));
4065 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4066 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4067
4068 return "clg";
4069}
4070
4071static HChar *
4072s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4073{
4074 IRTemp op1 = newTemp(Ity_I64);
4075 IRTemp op2 = newTemp(Ity_I64);
4076
4077 assign(op1, get_gpr_dw0(r1));
4078 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4079 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4080
4081 return "clgf";
4082}
4083
4084static HChar *
4085s390_irgen_CLFI(UChar r1, UInt i2)
4086{
4087 IRTemp op1 = newTemp(Ity_I32);
4088 UInt op2;
4089
4090 assign(op1, get_gpr_w1(r1));
4091 op2 = i2;
4092 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4093 mkU32(op2)));
4094
4095 return "clfi";
4096}
4097
4098static HChar *
4099s390_irgen_CLGFI(UChar r1, UInt i2)
4100{
4101 IRTemp op1 = newTemp(Ity_I64);
4102 ULong op2;
4103
4104 assign(op1, get_gpr_dw0(r1));
4105 op2 = (ULong)i2;
4106 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4107 mkU64(op2)));
4108
4109 return "clgfi";
4110}
4111
4112static HChar *
4113s390_irgen_CLI(UChar i2, IRTemp op1addr)
4114{
4115 IRTemp op1 = newTemp(Ity_I8);
4116 UChar op2;
4117
4118 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4119 op2 = i2;
4120 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4121 mkU8(op2)));
4122
4123 return "cli";
4124}
4125
4126static HChar *
4127s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4128{
4129 IRTemp op1 = newTemp(Ity_I8);
4130 UChar op2;
4131
4132 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4133 op2 = i2;
4134 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4135 mkU8(op2)));
4136
4137 return "cliy";
4138}
4139
4140static HChar *
4141s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4142{
4143 IRTemp op1 = newTemp(Ity_I32);
4144 UInt op2;
4145
4146 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4147 op2 = (UInt)i2;
4148 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4149 mkU32(op2)));
4150
4151 return "clfhsi";
4152}
4153
4154static HChar *
4155s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4156{
4157 IRTemp op1 = newTemp(Ity_I64);
4158 ULong op2;
4159
4160 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4161 op2 = (ULong)i2;
4162 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4163 mkU64(op2)));
4164
4165 return "clghsi";
4166}
4167
4168static HChar *
4169s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4170{
4171 IRTemp op1 = newTemp(Ity_I16);
4172 UShort op2;
4173
4174 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4175 op2 = i2;
4176 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4177 mkU16(op2)));
4178
4179 return "clhhsi";
4180}
4181
4182static HChar *
4183s390_irgen_CLRL(UChar r1, UInt i2)
4184{
4185 IRTemp op1 = newTemp(Ity_I32);
4186 IRTemp op2 = newTemp(Ity_I32);
4187
4188 assign(op1, get_gpr_w1(r1));
4189 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4190 i2 << 1))));
4191 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4192
4193 return "clrl";
4194}
4195
4196static HChar *
4197s390_irgen_CLGRL(UChar r1, UInt i2)
4198{
4199 IRTemp op1 = newTemp(Ity_I64);
4200 IRTemp op2 = newTemp(Ity_I64);
4201
4202 assign(op1, get_gpr_dw0(r1));
4203 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4204 i2 << 1))));
4205 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4206
4207 return "clgrl";
4208}
4209
4210static HChar *
4211s390_irgen_CLGFRL(UChar r1, UInt i2)
4212{
4213 IRTemp op1 = newTemp(Ity_I64);
4214 IRTemp op2 = newTemp(Ity_I64);
4215
4216 assign(op1, get_gpr_dw0(r1));
4217 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4218 ((ULong)(Long)(Int)i2 << 1)))));
4219 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4220
4221 return "clgfrl";
4222}
4223
4224static HChar *
4225s390_irgen_CLHRL(UChar r1, UInt i2)
4226{
4227 IRTemp op1 = newTemp(Ity_I32);
4228 IRTemp op2 = newTemp(Ity_I32);
4229
4230 assign(op1, get_gpr_w1(r1));
4231 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4232 ((ULong)(Long)(Int)i2 << 1)))));
4233 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4234
4235 return "clhrl";
4236}
4237
4238static HChar *
4239s390_irgen_CLGHRL(UChar r1, UInt i2)
4240{
4241 IRTemp op1 = newTemp(Ity_I64);
4242 IRTemp op2 = newTemp(Ity_I64);
4243
4244 assign(op1, get_gpr_dw0(r1));
4245 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4246 ((ULong)(Long)(Int)i2 << 1)))));
4247 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4248
4249 return "clghrl";
4250}
4251
4252static HChar *
4253s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4254{
4255 IRTemp op1 = newTemp(Ity_I32);
4256 IRTemp op2 = newTemp(Ity_I32);
4257 IRTemp icc = newTemp(Ity_I32);
4258 IRTemp cond = newTemp(Ity_I32);
4259
4260 if (m3 == 0) {
4261 } else {
4262 if (m3 == 14) {
4263 always_goto(mkexpr(op4addr));
4264 } else {
4265 assign(op1, get_gpr_w1(r1));
4266 assign(op2, get_gpr_w1(r2));
4267 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4268 op2));
4269 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4270 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4271 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4272 mkU32(0)), mkexpr(op4addr));
4273 }
4274 }
4275
4276 return "clrb";
4277}
4278
4279static HChar *
4280s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4281{
4282 IRTemp op1 = newTemp(Ity_I64);
4283 IRTemp op2 = newTemp(Ity_I64);
4284 IRTemp icc = newTemp(Ity_I32);
4285 IRTemp cond = newTemp(Ity_I32);
4286
4287 if (m3 == 0) {
4288 } else {
4289 if (m3 == 14) {
4290 always_goto(mkexpr(op4addr));
4291 } else {
4292 assign(op1, get_gpr_dw0(r1));
4293 assign(op2, get_gpr_dw0(r2));
4294 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4295 op2));
4296 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4297 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4298 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4299 mkU32(0)), mkexpr(op4addr));
4300 }
4301 }
4302
4303 return "clgrb";
4304}
4305
4306static HChar *
4307s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4308{
4309 IRTemp op1 = newTemp(Ity_I32);
4310 IRTemp op2 = newTemp(Ity_I32);
4311 IRTemp icc = newTemp(Ity_I32);
4312 IRTemp cond = newTemp(Ity_I32);
4313
4314 if (m3 == 0) {
4315 } else {
4316 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004317 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004318 } else {
4319 assign(op1, get_gpr_w1(r1));
4320 assign(op2, get_gpr_w1(r2));
4321 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4322 op2));
4323 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4324 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4325 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4326 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4327
4328 }
4329 }
4330
4331 return "clrj";
4332}
4333
4334static HChar *
4335s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4336{
4337 IRTemp op1 = newTemp(Ity_I64);
4338 IRTemp op2 = newTemp(Ity_I64);
4339 IRTemp icc = newTemp(Ity_I32);
4340 IRTemp cond = newTemp(Ity_I32);
4341
4342 if (m3 == 0) {
4343 } else {
4344 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004345 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004346 } else {
4347 assign(op1, get_gpr_dw0(r1));
4348 assign(op2, get_gpr_dw0(r2));
4349 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4350 op2));
4351 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4352 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4353 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4354 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4355
4356 }
4357 }
4358
4359 return "clgrj";
4360}
4361
4362static HChar *
4363s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4364{
4365 IRTemp op1 = newTemp(Ity_I32);
4366 UInt op2;
4367 IRTemp icc = newTemp(Ity_I32);
4368 IRTemp cond = newTemp(Ity_I32);
4369
4370 if (m3 == 0) {
4371 } else {
4372 if (m3 == 14) {
4373 always_goto(mkexpr(op4addr));
4374 } else {
4375 assign(op1, get_gpr_w1(r1));
4376 op2 = (UInt)i2;
4377 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4378 mktemp(Ity_I32, mkU32(op2))));
4379 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4380 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4381 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4382 mkU32(0)), mkexpr(op4addr));
4383 }
4384 }
4385
4386 return "clib";
4387}
4388
4389static HChar *
4390s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4391{
4392 IRTemp op1 = newTemp(Ity_I64);
4393 ULong op2;
4394 IRTemp icc = newTemp(Ity_I32);
4395 IRTemp cond = newTemp(Ity_I32);
4396
4397 if (m3 == 0) {
4398 } else {
4399 if (m3 == 14) {
4400 always_goto(mkexpr(op4addr));
4401 } else {
4402 assign(op1, get_gpr_dw0(r1));
4403 op2 = (ULong)i2;
4404 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4405 mktemp(Ity_I64, mkU64(op2))));
4406 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4407 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4408 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4409 mkU32(0)), mkexpr(op4addr));
4410 }
4411 }
4412
4413 return "clgib";
4414}
4415
4416static HChar *
4417s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4418{
4419 IRTemp op1 = newTemp(Ity_I32);
4420 UInt op2;
4421 IRTemp icc = newTemp(Ity_I32);
4422 IRTemp cond = newTemp(Ity_I32);
4423
4424 if (m3 == 0) {
4425 } else {
4426 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004427 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004428 } else {
4429 assign(op1, get_gpr_w1(r1));
4430 op2 = (UInt)i2;
4431 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4432 mktemp(Ity_I32, mkU32(op2))));
4433 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4434 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4435 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4436 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4437
4438 }
4439 }
4440
4441 return "clij";
4442}
4443
4444static HChar *
4445s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4446{
4447 IRTemp op1 = newTemp(Ity_I64);
4448 ULong op2;
4449 IRTemp icc = newTemp(Ity_I32);
4450 IRTemp cond = newTemp(Ity_I32);
4451
4452 if (m3 == 0) {
4453 } else {
4454 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004455 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004456 } else {
4457 assign(op1, get_gpr_dw0(r1));
4458 op2 = (ULong)i2;
4459 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4460 mktemp(Ity_I64, mkU64(op2))));
4461 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4462 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4463 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4464 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4465
4466 }
4467 }
4468
4469 return "clgij";
4470}
4471
4472static HChar *
4473s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4474{
4475 IRTemp op1 = newTemp(Ity_I32);
4476 IRTemp op2 = newTemp(Ity_I32);
4477 IRTemp b0 = newTemp(Ity_I32);
4478 IRTemp b1 = newTemp(Ity_I32);
4479 IRTemp b2 = newTemp(Ity_I32);
4480 IRTemp b3 = newTemp(Ity_I32);
4481 IRTemp c0 = newTemp(Ity_I32);
4482 IRTemp c1 = newTemp(Ity_I32);
4483 IRTemp c2 = newTemp(Ity_I32);
4484 IRTemp c3 = newTemp(Ity_I32);
4485 UChar n;
4486
4487 n = 0;
4488 if ((r3 & 8) != 0) {
4489 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4490 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4491 n = n + 1;
4492 } else {
4493 assign(b0, mkU32(0));
4494 assign(c0, mkU32(0));
4495 }
4496 if ((r3 & 4) != 0) {
4497 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4498 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4499 mkU64(n)))));
4500 n = n + 1;
4501 } else {
4502 assign(b1, mkU32(0));
4503 assign(c1, mkU32(0));
4504 }
4505 if ((r3 & 2) != 0) {
4506 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4507 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4508 mkU64(n)))));
4509 n = n + 1;
4510 } else {
4511 assign(b2, mkU32(0));
4512 assign(c2, mkU32(0));
4513 }
4514 if ((r3 & 1) != 0) {
4515 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4516 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4517 mkU64(n)))));
4518 n = n + 1;
4519 } else {
4520 assign(b3, mkU32(0));
4521 assign(c3, mkU32(0));
4522 }
4523 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4524 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4525 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4526 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4527 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4528 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4529 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4530
4531 return "clm";
4532}
4533
4534static HChar *
4535s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4536{
4537 IRTemp op1 = newTemp(Ity_I32);
4538 IRTemp op2 = newTemp(Ity_I32);
4539 IRTemp b0 = newTemp(Ity_I32);
4540 IRTemp b1 = newTemp(Ity_I32);
4541 IRTemp b2 = newTemp(Ity_I32);
4542 IRTemp b3 = newTemp(Ity_I32);
4543 IRTemp c0 = newTemp(Ity_I32);
4544 IRTemp c1 = newTemp(Ity_I32);
4545 IRTemp c2 = newTemp(Ity_I32);
4546 IRTemp c3 = newTemp(Ity_I32);
4547 UChar n;
4548
4549 n = 0;
4550 if ((r3 & 8) != 0) {
4551 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4552 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4553 n = n + 1;
4554 } else {
4555 assign(b0, mkU32(0));
4556 assign(c0, mkU32(0));
4557 }
4558 if ((r3 & 4) != 0) {
4559 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4560 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4561 mkU64(n)))));
4562 n = n + 1;
4563 } else {
4564 assign(b1, mkU32(0));
4565 assign(c1, mkU32(0));
4566 }
4567 if ((r3 & 2) != 0) {
4568 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4569 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4570 mkU64(n)))));
4571 n = n + 1;
4572 } else {
4573 assign(b2, mkU32(0));
4574 assign(c2, mkU32(0));
4575 }
4576 if ((r3 & 1) != 0) {
4577 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4578 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4579 mkU64(n)))));
4580 n = n + 1;
4581 } else {
4582 assign(b3, mkU32(0));
4583 assign(c3, mkU32(0));
4584 }
4585 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4586 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4587 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4588 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4589 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4590 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4591 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4592
4593 return "clmy";
4594}
4595
4596static HChar *
4597s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4598{
4599 IRTemp op1 = newTemp(Ity_I32);
4600 IRTemp op2 = newTemp(Ity_I32);
4601 IRTemp b0 = newTemp(Ity_I32);
4602 IRTemp b1 = newTemp(Ity_I32);
4603 IRTemp b2 = newTemp(Ity_I32);
4604 IRTemp b3 = newTemp(Ity_I32);
4605 IRTemp c0 = newTemp(Ity_I32);
4606 IRTemp c1 = newTemp(Ity_I32);
4607 IRTemp c2 = newTemp(Ity_I32);
4608 IRTemp c3 = newTemp(Ity_I32);
4609 UChar n;
4610
4611 n = 0;
4612 if ((r3 & 8) != 0) {
4613 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4614 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4615 n = n + 1;
4616 } else {
4617 assign(b0, mkU32(0));
4618 assign(c0, mkU32(0));
4619 }
4620 if ((r3 & 4) != 0) {
4621 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4622 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4623 mkU64(n)))));
4624 n = n + 1;
4625 } else {
4626 assign(b1, mkU32(0));
4627 assign(c1, mkU32(0));
4628 }
4629 if ((r3 & 2) != 0) {
4630 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4631 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4632 mkU64(n)))));
4633 n = n + 1;
4634 } else {
4635 assign(b2, mkU32(0));
4636 assign(c2, mkU32(0));
4637 }
4638 if ((r3 & 1) != 0) {
4639 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4640 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4641 mkU64(n)))));
4642 n = n + 1;
4643 } else {
4644 assign(b3, mkU32(0));
4645 assign(c3, mkU32(0));
4646 }
4647 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4648 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4649 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4650 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4651 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4652 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4653 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4654
4655 return "clmh";
4656}
4657
4658static HChar *
4659s390_irgen_CLHHR(UChar r1, UChar r2)
4660{
4661 IRTemp op1 = newTemp(Ity_I32);
4662 IRTemp op2 = newTemp(Ity_I32);
4663
4664 assign(op1, get_gpr_w0(r1));
4665 assign(op2, get_gpr_w0(r2));
4666 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4667
4668 return "clhhr";
4669}
4670
4671static HChar *
4672s390_irgen_CLHLR(UChar r1, UChar r2)
4673{
4674 IRTemp op1 = newTemp(Ity_I32);
4675 IRTemp op2 = newTemp(Ity_I32);
4676
4677 assign(op1, get_gpr_w0(r1));
4678 assign(op2, get_gpr_w1(r2));
4679 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4680
4681 return "clhlr";
4682}
4683
4684static HChar *
4685s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4686{
4687 IRTemp op1 = newTemp(Ity_I32);
4688 IRTemp op2 = newTemp(Ity_I32);
4689
4690 assign(op1, get_gpr_w0(r1));
4691 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4692 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4693
4694 return "clhf";
4695}
4696
4697static HChar *
4698s390_irgen_CLIH(UChar r1, UInt i2)
4699{
4700 IRTemp op1 = newTemp(Ity_I32);
4701 UInt op2;
4702
4703 assign(op1, get_gpr_w0(r1));
4704 op2 = i2;
4705 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4706 mkU32(op2)));
4707
4708 return "clih";
4709}
4710
4711static HChar *
4712s390_irgen_CPYA(UChar r1, UChar r2)
4713{
4714 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004715 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004716 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4717
4718 return "cpya";
4719}
4720
4721static HChar *
4722s390_irgen_XR(UChar r1, UChar r2)
4723{
4724 IRTemp op1 = newTemp(Ity_I32);
4725 IRTemp op2 = newTemp(Ity_I32);
4726 IRTemp result = newTemp(Ity_I32);
4727
4728 if (r1 == r2) {
4729 assign(result, mkU32(0));
4730 } else {
4731 assign(op1, get_gpr_w1(r1));
4732 assign(op2, get_gpr_w1(r2));
4733 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4734 }
4735 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4736 put_gpr_w1(r1, mkexpr(result));
4737
4738 return "xr";
4739}
4740
4741static HChar *
4742s390_irgen_XGR(UChar r1, UChar r2)
4743{
4744 IRTemp op1 = newTemp(Ity_I64);
4745 IRTemp op2 = newTemp(Ity_I64);
4746 IRTemp result = newTemp(Ity_I64);
4747
4748 if (r1 == r2) {
4749 assign(result, mkU64(0));
4750 } else {
4751 assign(op1, get_gpr_dw0(r1));
4752 assign(op2, get_gpr_dw0(r2));
4753 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4754 }
4755 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4756 put_gpr_dw0(r1, mkexpr(result));
4757
4758 return "xgr";
4759}
4760
4761static HChar *
4762s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4763{
4764 IRTemp op2 = newTemp(Ity_I32);
4765 IRTemp op3 = newTemp(Ity_I32);
4766 IRTemp result = newTemp(Ity_I32);
4767
4768 assign(op2, get_gpr_w1(r2));
4769 assign(op3, get_gpr_w1(r3));
4770 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4771 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4772 put_gpr_w1(r1, mkexpr(result));
4773
4774 return "xrk";
4775}
4776
4777static HChar *
4778s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4779{
4780 IRTemp op2 = newTemp(Ity_I64);
4781 IRTemp op3 = newTemp(Ity_I64);
4782 IRTemp result = newTemp(Ity_I64);
4783
4784 assign(op2, get_gpr_dw0(r2));
4785 assign(op3, get_gpr_dw0(r3));
4786 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4787 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4788 put_gpr_dw0(r1, mkexpr(result));
4789
4790 return "xgrk";
4791}
4792
4793static HChar *
4794s390_irgen_X(UChar r1, IRTemp op2addr)
4795{
4796 IRTemp op1 = newTemp(Ity_I32);
4797 IRTemp op2 = newTemp(Ity_I32);
4798 IRTemp result = newTemp(Ity_I32);
4799
4800 assign(op1, get_gpr_w1(r1));
4801 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4802 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4803 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4804 put_gpr_w1(r1, mkexpr(result));
4805
4806 return "x";
4807}
4808
4809static HChar *
4810s390_irgen_XY(UChar r1, IRTemp op2addr)
4811{
4812 IRTemp op1 = newTemp(Ity_I32);
4813 IRTemp op2 = newTemp(Ity_I32);
4814 IRTemp result = newTemp(Ity_I32);
4815
4816 assign(op1, get_gpr_w1(r1));
4817 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4818 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4819 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4820 put_gpr_w1(r1, mkexpr(result));
4821
4822 return "xy";
4823}
4824
4825static HChar *
4826s390_irgen_XG(UChar r1, IRTemp op2addr)
4827{
4828 IRTemp op1 = newTemp(Ity_I64);
4829 IRTemp op2 = newTemp(Ity_I64);
4830 IRTemp result = newTemp(Ity_I64);
4831
4832 assign(op1, get_gpr_dw0(r1));
4833 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4834 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4835 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4836 put_gpr_dw0(r1, mkexpr(result));
4837
4838 return "xg";
4839}
4840
4841static HChar *
4842s390_irgen_XI(UChar i2, IRTemp op1addr)
4843{
4844 IRTemp op1 = newTemp(Ity_I8);
4845 UChar op2;
4846 IRTemp result = newTemp(Ity_I8);
4847
4848 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4849 op2 = i2;
4850 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4851 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4852 store(mkexpr(op1addr), mkexpr(result));
4853
4854 return "xi";
4855}
4856
4857static HChar *
4858s390_irgen_XIY(UChar i2, IRTemp op1addr)
4859{
4860 IRTemp op1 = newTemp(Ity_I8);
4861 UChar op2;
4862 IRTemp result = newTemp(Ity_I8);
4863
4864 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4865 op2 = i2;
4866 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4867 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4868 store(mkexpr(op1addr), mkexpr(result));
4869
4870 return "xiy";
4871}
4872
4873static HChar *
4874s390_irgen_XIHF(UChar r1, UInt i2)
4875{
4876 IRTemp op1 = newTemp(Ity_I32);
4877 UInt op2;
4878 IRTemp result = newTemp(Ity_I32);
4879
4880 assign(op1, get_gpr_w0(r1));
4881 op2 = i2;
4882 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4883 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4884 put_gpr_w0(r1, mkexpr(result));
4885
4886 return "xihf";
4887}
4888
4889static HChar *
4890s390_irgen_XILF(UChar r1, UInt i2)
4891{
4892 IRTemp op1 = newTemp(Ity_I32);
4893 UInt op2;
4894 IRTemp result = newTemp(Ity_I32);
4895
4896 assign(op1, get_gpr_w1(r1));
4897 op2 = i2;
4898 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4899 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4900 put_gpr_w1(r1, mkexpr(result));
4901
4902 return "xilf";
4903}
4904
4905static HChar *
4906s390_irgen_EAR(UChar r1, UChar r2)
4907{
4908 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004909 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004910 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4911
4912 return "ear";
4913}
4914
4915static HChar *
4916s390_irgen_IC(UChar r1, IRTemp op2addr)
4917{
4918 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4919
4920 return "ic";
4921}
4922
4923static HChar *
4924s390_irgen_ICY(UChar r1, IRTemp op2addr)
4925{
4926 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4927
4928 return "icy";
4929}
4930
4931static HChar *
4932s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4933{
4934 UChar n;
4935 IRTemp result = newTemp(Ity_I32);
4936 UInt mask;
4937
4938 n = 0;
4939 mask = (UInt)r3;
4940 if ((mask & 8) != 0) {
4941 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4942 n = n + 1;
4943 }
4944 if ((mask & 4) != 0) {
4945 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4946
4947 n = n + 1;
4948 }
4949 if ((mask & 2) != 0) {
4950 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4951
4952 n = n + 1;
4953 }
4954 if ((mask & 1) != 0) {
4955 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4956
4957 n = n + 1;
4958 }
4959 assign(result, get_gpr_w1(r1));
4960 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4961 mkU32(mask)));
4962
4963 return "icm";
4964}
4965
4966static HChar *
4967s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4968{
4969 UChar n;
4970 IRTemp result = newTemp(Ity_I32);
4971 UInt mask;
4972
4973 n = 0;
4974 mask = (UInt)r3;
4975 if ((mask & 8) != 0) {
4976 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4977 n = n + 1;
4978 }
4979 if ((mask & 4) != 0) {
4980 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4981
4982 n = n + 1;
4983 }
4984 if ((mask & 2) != 0) {
4985 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4986
4987 n = n + 1;
4988 }
4989 if ((mask & 1) != 0) {
4990 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4991
4992 n = n + 1;
4993 }
4994 assign(result, get_gpr_w1(r1));
4995 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4996 mkU32(mask)));
4997
4998 return "icmy";
4999}
5000
5001static HChar *
5002s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
5003{
5004 UChar n;
5005 IRTemp result = newTemp(Ity_I32);
5006 UInt mask;
5007
5008 n = 0;
5009 mask = (UInt)r3;
5010 if ((mask & 8) != 0) {
5011 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
5012 n = n + 1;
5013 }
5014 if ((mask & 4) != 0) {
5015 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5016
5017 n = n + 1;
5018 }
5019 if ((mask & 2) != 0) {
5020 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5021
5022 n = n + 1;
5023 }
5024 if ((mask & 1) != 0) {
5025 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5026
5027 n = n + 1;
5028 }
5029 assign(result, get_gpr_w0(r1));
5030 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
5031 mkU32(mask)));
5032
5033 return "icmh";
5034}
5035
5036static HChar *
5037s390_irgen_IIHF(UChar r1, UInt i2)
5038{
5039 put_gpr_w0(r1, mkU32(i2));
5040
5041 return "iihf";
5042}
5043
5044static HChar *
5045s390_irgen_IIHH(UChar r1, UShort i2)
5046{
5047 put_gpr_hw0(r1, mkU16(i2));
5048
5049 return "iihh";
5050}
5051
5052static HChar *
5053s390_irgen_IIHL(UChar r1, UShort i2)
5054{
5055 put_gpr_hw1(r1, mkU16(i2));
5056
5057 return "iihl";
5058}
5059
5060static HChar *
5061s390_irgen_IILF(UChar r1, UInt i2)
5062{
5063 put_gpr_w1(r1, mkU32(i2));
5064
5065 return "iilf";
5066}
5067
5068static HChar *
5069s390_irgen_IILH(UChar r1, UShort i2)
5070{
5071 put_gpr_hw2(r1, mkU16(i2));
5072
5073 return "iilh";
5074}
5075
5076static HChar *
5077s390_irgen_IILL(UChar r1, UShort i2)
5078{
5079 put_gpr_hw3(r1, mkU16(i2));
5080
5081 return "iill";
5082}
5083
5084static HChar *
5085s390_irgen_LR(UChar r1, UChar r2)
5086{
5087 put_gpr_w1(r1, get_gpr_w1(r2));
5088
5089 return "lr";
5090}
5091
5092static HChar *
5093s390_irgen_LGR(UChar r1, UChar r2)
5094{
5095 put_gpr_dw0(r1, get_gpr_dw0(r2));
5096
5097 return "lgr";
5098}
5099
5100static HChar *
5101s390_irgen_LGFR(UChar r1, UChar r2)
5102{
5103 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5104
5105 return "lgfr";
5106}
5107
5108static HChar *
5109s390_irgen_L(UChar r1, IRTemp op2addr)
5110{
5111 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5112
5113 return "l";
5114}
5115
5116static HChar *
5117s390_irgen_LY(UChar r1, IRTemp op2addr)
5118{
5119 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5120
5121 return "ly";
5122}
5123
5124static HChar *
5125s390_irgen_LG(UChar r1, IRTemp op2addr)
5126{
5127 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5128
5129 return "lg";
5130}
5131
5132static HChar *
5133s390_irgen_LGF(UChar r1, IRTemp op2addr)
5134{
5135 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5136
5137 return "lgf";
5138}
5139
5140static HChar *
5141s390_irgen_LGFI(UChar r1, UInt i2)
5142{
5143 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5144
5145 return "lgfi";
5146}
5147
5148static HChar *
5149s390_irgen_LRL(UChar r1, UInt i2)
5150{
5151 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5152 i2 << 1))));
5153
5154 return "lrl";
5155}
5156
5157static HChar *
5158s390_irgen_LGRL(UChar r1, UInt i2)
5159{
5160 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5161 i2 << 1))));
5162
5163 return "lgrl";
5164}
5165
5166static HChar *
5167s390_irgen_LGFRL(UChar r1, UInt i2)
5168{
5169 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5170 ((ULong)(Long)(Int)i2 << 1)))));
5171
5172 return "lgfrl";
5173}
5174
5175static HChar *
5176s390_irgen_LA(UChar r1, IRTemp op2addr)
5177{
5178 put_gpr_dw0(r1, mkexpr(op2addr));
5179
5180 return "la";
5181}
5182
5183static HChar *
5184s390_irgen_LAY(UChar r1, IRTemp op2addr)
5185{
5186 put_gpr_dw0(r1, mkexpr(op2addr));
5187
5188 return "lay";
5189}
5190
5191static HChar *
5192s390_irgen_LAE(UChar r1, IRTemp op2addr)
5193{
5194 put_gpr_dw0(r1, mkexpr(op2addr));
5195
5196 return "lae";
5197}
5198
5199static HChar *
5200s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5201{
5202 put_gpr_dw0(r1, mkexpr(op2addr));
5203
5204 return "laey";
5205}
5206
5207static HChar *
5208s390_irgen_LARL(UChar r1, UInt i2)
5209{
5210 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5211
5212 return "larl";
5213}
5214
5215static HChar *
5216s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5217{
5218 IRTemp op2 = newTemp(Ity_I32);
5219 IRTemp op3 = newTemp(Ity_I32);
5220 IRTemp result = newTemp(Ity_I32);
5221
5222 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5223 assign(op3, get_gpr_w1(r3));
5224 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5225 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5226 store(mkexpr(op2addr), mkexpr(result));
5227 put_gpr_w1(r1, mkexpr(op2));
5228
5229 return "laa";
5230}
5231
5232static HChar *
5233s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5234{
5235 IRTemp op2 = newTemp(Ity_I64);
5236 IRTemp op3 = newTemp(Ity_I64);
5237 IRTemp result = newTemp(Ity_I64);
5238
5239 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5240 assign(op3, get_gpr_dw0(r3));
5241 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5242 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5243 store(mkexpr(op2addr), mkexpr(result));
5244 put_gpr_dw0(r1, mkexpr(op2));
5245
5246 return "laag";
5247}
5248
5249static HChar *
5250s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5251{
5252 IRTemp op2 = newTemp(Ity_I32);
5253 IRTemp op3 = newTemp(Ity_I32);
5254 IRTemp result = newTemp(Ity_I32);
5255
5256 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5257 assign(op3, get_gpr_w1(r3));
5258 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5259 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5260 store(mkexpr(op2addr), mkexpr(result));
5261 put_gpr_w1(r1, mkexpr(op2));
5262
5263 return "laal";
5264}
5265
5266static HChar *
5267s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5268{
5269 IRTemp op2 = newTemp(Ity_I64);
5270 IRTemp op3 = newTemp(Ity_I64);
5271 IRTemp result = newTemp(Ity_I64);
5272
5273 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5274 assign(op3, get_gpr_dw0(r3));
5275 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5276 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5277 store(mkexpr(op2addr), mkexpr(result));
5278 put_gpr_dw0(r1, mkexpr(op2));
5279
5280 return "laalg";
5281}
5282
5283static HChar *
5284s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5285{
5286 IRTemp op2 = newTemp(Ity_I32);
5287 IRTemp op3 = newTemp(Ity_I32);
5288 IRTemp result = newTemp(Ity_I32);
5289
5290 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5291 assign(op3, get_gpr_w1(r3));
5292 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5293 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5294 store(mkexpr(op2addr), mkexpr(result));
5295 put_gpr_w1(r1, mkexpr(op2));
5296
5297 return "lan";
5298}
5299
5300static HChar *
5301s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5302{
5303 IRTemp op2 = newTemp(Ity_I64);
5304 IRTemp op3 = newTemp(Ity_I64);
5305 IRTemp result = newTemp(Ity_I64);
5306
5307 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5308 assign(op3, get_gpr_dw0(r3));
5309 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5310 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5311 store(mkexpr(op2addr), mkexpr(result));
5312 put_gpr_dw0(r1, mkexpr(op2));
5313
5314 return "lang";
5315}
5316
5317static HChar *
5318s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5319{
5320 IRTemp op2 = newTemp(Ity_I32);
5321 IRTemp op3 = newTemp(Ity_I32);
5322 IRTemp result = newTemp(Ity_I32);
5323
5324 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5325 assign(op3, get_gpr_w1(r3));
5326 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5327 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5328 store(mkexpr(op2addr), mkexpr(result));
5329 put_gpr_w1(r1, mkexpr(op2));
5330
5331 return "lax";
5332}
5333
5334static HChar *
5335s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5336{
5337 IRTemp op2 = newTemp(Ity_I64);
5338 IRTemp op3 = newTemp(Ity_I64);
5339 IRTemp result = newTemp(Ity_I64);
5340
5341 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5342 assign(op3, get_gpr_dw0(r3));
5343 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5344 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5345 store(mkexpr(op2addr), mkexpr(result));
5346 put_gpr_dw0(r1, mkexpr(op2));
5347
5348 return "laxg";
5349}
5350
5351static HChar *
5352s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5353{
5354 IRTemp op2 = newTemp(Ity_I32);
5355 IRTemp op3 = newTemp(Ity_I32);
5356 IRTemp result = newTemp(Ity_I32);
5357
5358 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5359 assign(op3, get_gpr_w1(r3));
5360 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5361 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5362 store(mkexpr(op2addr), mkexpr(result));
5363 put_gpr_w1(r1, mkexpr(op2));
5364
5365 return "lao";
5366}
5367
5368static HChar *
5369s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5370{
5371 IRTemp op2 = newTemp(Ity_I64);
5372 IRTemp op3 = newTemp(Ity_I64);
5373 IRTemp result = newTemp(Ity_I64);
5374
5375 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5376 assign(op3, get_gpr_dw0(r3));
5377 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5378 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5379 store(mkexpr(op2addr), mkexpr(result));
5380 put_gpr_dw0(r1, mkexpr(op2));
5381
5382 return "laog";
5383}
5384
5385static HChar *
5386s390_irgen_LTR(UChar r1, UChar r2)
5387{
5388 IRTemp op2 = newTemp(Ity_I32);
5389
5390 assign(op2, get_gpr_w1(r2));
5391 put_gpr_w1(r1, mkexpr(op2));
5392 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5393
5394 return "ltr";
5395}
5396
5397static HChar *
5398s390_irgen_LTGR(UChar r1, UChar r2)
5399{
5400 IRTemp op2 = newTemp(Ity_I64);
5401
5402 assign(op2, get_gpr_dw0(r2));
5403 put_gpr_dw0(r1, mkexpr(op2));
5404 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5405
5406 return "ltgr";
5407}
5408
5409static HChar *
5410s390_irgen_LTGFR(UChar r1, UChar r2)
5411{
5412 IRTemp op2 = newTemp(Ity_I64);
5413
5414 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5415 put_gpr_dw0(r1, mkexpr(op2));
5416 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5417
5418 return "ltgfr";
5419}
5420
5421static HChar *
5422s390_irgen_LT(UChar r1, IRTemp op2addr)
5423{
5424 IRTemp op2 = newTemp(Ity_I32);
5425
5426 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5427 put_gpr_w1(r1, mkexpr(op2));
5428 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5429
5430 return "lt";
5431}
5432
5433static HChar *
5434s390_irgen_LTG(UChar r1, IRTemp op2addr)
5435{
5436 IRTemp op2 = newTemp(Ity_I64);
5437
5438 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5439 put_gpr_dw0(r1, mkexpr(op2));
5440 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5441
5442 return "ltg";
5443}
5444
5445static HChar *
5446s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5447{
5448 IRTemp op2 = newTemp(Ity_I64);
5449
5450 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5451 put_gpr_dw0(r1, mkexpr(op2));
5452 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5453
5454 return "ltgf";
5455}
5456
5457static HChar *
5458s390_irgen_LBR(UChar r1, UChar r2)
5459{
5460 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5461
5462 return "lbr";
5463}
5464
5465static HChar *
5466s390_irgen_LGBR(UChar r1, UChar r2)
5467{
5468 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5469
5470 return "lgbr";
5471}
5472
5473static HChar *
5474s390_irgen_LB(UChar r1, IRTemp op2addr)
5475{
5476 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5477
5478 return "lb";
5479}
5480
5481static HChar *
5482s390_irgen_LGB(UChar r1, IRTemp op2addr)
5483{
5484 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5485
5486 return "lgb";
5487}
5488
5489static HChar *
5490s390_irgen_LBH(UChar r1, IRTemp op2addr)
5491{
5492 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5493
5494 return "lbh";
5495}
5496
5497static HChar *
5498s390_irgen_LCR(UChar r1, UChar r2)
5499{
5500 Int op1;
5501 IRTemp op2 = newTemp(Ity_I32);
5502 IRTemp result = newTemp(Ity_I32);
5503
5504 op1 = 0;
5505 assign(op2, get_gpr_w1(r2));
5506 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5507 put_gpr_w1(r1, mkexpr(result));
5508 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5509 op1)), op2);
5510
5511 return "lcr";
5512}
5513
5514static HChar *
5515s390_irgen_LCGR(UChar r1, UChar r2)
5516{
5517 Long op1;
5518 IRTemp op2 = newTemp(Ity_I64);
5519 IRTemp result = newTemp(Ity_I64);
5520
5521 op1 = 0ULL;
5522 assign(op2, get_gpr_dw0(r2));
5523 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5524 put_gpr_dw0(r1, mkexpr(result));
5525 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5526 op1)), op2);
5527
5528 return "lcgr";
5529}
5530
5531static HChar *
5532s390_irgen_LCGFR(UChar r1, UChar r2)
5533{
5534 Long op1;
5535 IRTemp op2 = newTemp(Ity_I64);
5536 IRTemp result = newTemp(Ity_I64);
5537
5538 op1 = 0ULL;
5539 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5540 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5541 put_gpr_dw0(r1, mkexpr(result));
5542 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5543 op1)), op2);
5544
5545 return "lcgfr";
5546}
5547
5548static HChar *
5549s390_irgen_LHR(UChar r1, UChar r2)
5550{
5551 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5552
5553 return "lhr";
5554}
5555
5556static HChar *
5557s390_irgen_LGHR(UChar r1, UChar r2)
5558{
5559 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5560
5561 return "lghr";
5562}
5563
5564static HChar *
5565s390_irgen_LH(UChar r1, IRTemp op2addr)
5566{
5567 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5568
5569 return "lh";
5570}
5571
5572static HChar *
5573s390_irgen_LHY(UChar r1, IRTemp op2addr)
5574{
5575 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5576
5577 return "lhy";
5578}
5579
5580static HChar *
5581s390_irgen_LGH(UChar r1, IRTemp op2addr)
5582{
5583 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5584
5585 return "lgh";
5586}
5587
5588static HChar *
5589s390_irgen_LHI(UChar r1, UShort i2)
5590{
5591 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5592
5593 return "lhi";
5594}
5595
5596static HChar *
5597s390_irgen_LGHI(UChar r1, UShort i2)
5598{
5599 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5600
5601 return "lghi";
5602}
5603
5604static HChar *
5605s390_irgen_LHRL(UChar r1, UInt i2)
5606{
5607 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5608 ((ULong)(Long)(Int)i2 << 1)))));
5609
5610 return "lhrl";
5611}
5612
5613static HChar *
5614s390_irgen_LGHRL(UChar r1, UInt i2)
5615{
5616 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5617 ((ULong)(Long)(Int)i2 << 1)))));
5618
5619 return "lghrl";
5620}
5621
5622static HChar *
5623s390_irgen_LHH(UChar r1, IRTemp op2addr)
5624{
5625 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5626
5627 return "lhh";
5628}
5629
5630static HChar *
5631s390_irgen_LFH(UChar r1, IRTemp op2addr)
5632{
5633 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5634
5635 return "lfh";
5636}
5637
5638static HChar *
5639s390_irgen_LLGFR(UChar r1, UChar r2)
5640{
5641 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5642
5643 return "llgfr";
5644}
5645
5646static HChar *
5647s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5648{
5649 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5650
5651 return "llgf";
5652}
5653
5654static HChar *
5655s390_irgen_LLGFRL(UChar r1, UInt i2)
5656{
5657 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5658 ((ULong)(Long)(Int)i2 << 1)))));
5659
5660 return "llgfrl";
5661}
5662
5663static HChar *
5664s390_irgen_LLCR(UChar r1, UChar r2)
5665{
5666 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5667
5668 return "llcr";
5669}
5670
5671static HChar *
5672s390_irgen_LLGCR(UChar r1, UChar r2)
5673{
5674 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5675
5676 return "llgcr";
5677}
5678
5679static HChar *
5680s390_irgen_LLC(UChar r1, IRTemp op2addr)
5681{
5682 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5683
5684 return "llc";
5685}
5686
5687static HChar *
5688s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5689{
5690 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5691
5692 return "llgc";
5693}
5694
5695static HChar *
5696s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5697{
5698 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5699
5700 return "llch";
5701}
5702
5703static HChar *
5704s390_irgen_LLHR(UChar r1, UChar r2)
5705{
5706 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5707
5708 return "llhr";
5709}
5710
5711static HChar *
5712s390_irgen_LLGHR(UChar r1, UChar r2)
5713{
5714 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5715
5716 return "llghr";
5717}
5718
5719static HChar *
5720s390_irgen_LLH(UChar r1, IRTemp op2addr)
5721{
5722 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5723
5724 return "llh";
5725}
5726
5727static HChar *
5728s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5729{
5730 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5731
5732 return "llgh";
5733}
5734
5735static HChar *
5736s390_irgen_LLHRL(UChar r1, UInt i2)
5737{
5738 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5739 ((ULong)(Long)(Int)i2 << 1)))));
5740
5741 return "llhrl";
5742}
5743
5744static HChar *
5745s390_irgen_LLGHRL(UChar r1, UInt i2)
5746{
5747 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5748 ((ULong)(Long)(Int)i2 << 1)))));
5749
5750 return "llghrl";
5751}
5752
5753static HChar *
5754s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5755{
5756 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5757
5758 return "llhh";
5759}
5760
5761static HChar *
5762s390_irgen_LLIHF(UChar r1, UInt i2)
5763{
5764 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5765
5766 return "llihf";
5767}
5768
5769static HChar *
5770s390_irgen_LLIHH(UChar r1, UShort i2)
5771{
5772 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5773
5774 return "llihh";
5775}
5776
5777static HChar *
5778s390_irgen_LLIHL(UChar r1, UShort i2)
5779{
5780 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5781
5782 return "llihl";
5783}
5784
5785static HChar *
5786s390_irgen_LLILF(UChar r1, UInt i2)
5787{
5788 put_gpr_dw0(r1, mkU64(i2));
5789
5790 return "llilf";
5791}
5792
5793static HChar *
5794s390_irgen_LLILH(UChar r1, UShort i2)
5795{
5796 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5797
5798 return "llilh";
5799}
5800
5801static HChar *
5802s390_irgen_LLILL(UChar r1, UShort i2)
5803{
5804 put_gpr_dw0(r1, mkU64(i2));
5805
5806 return "llill";
5807}
5808
5809static HChar *
5810s390_irgen_LLGTR(UChar r1, UChar r2)
5811{
5812 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5813 mkU32(2147483647))));
5814
5815 return "llgtr";
5816}
5817
5818static HChar *
5819s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5820{
5821 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5822 mkexpr(op2addr)), mkU32(2147483647))));
5823
5824 return "llgt";
5825}
5826
5827static HChar *
5828s390_irgen_LNR(UChar r1, UChar r2)
5829{
5830 IRTemp op2 = newTemp(Ity_I32);
5831 IRTemp result = newTemp(Ity_I32);
5832
5833 assign(op2, get_gpr_w1(r2));
5834 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5835 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5836 put_gpr_w1(r1, mkexpr(result));
5837 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5838
5839 return "lnr";
5840}
5841
5842static HChar *
5843s390_irgen_LNGR(UChar r1, UChar r2)
5844{
5845 IRTemp op2 = newTemp(Ity_I64);
5846 IRTemp result = newTemp(Ity_I64);
5847
5848 assign(op2, get_gpr_dw0(r2));
5849 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5850 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5851 put_gpr_dw0(r1, mkexpr(result));
5852 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5853
5854 return "lngr";
5855}
5856
5857static HChar *
5858s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5859{
5860 IRTemp op2 = newTemp(Ity_I64);
5861 IRTemp result = newTemp(Ity_I64);
5862
5863 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5864 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5865 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5866 put_gpr_dw0(r1, mkexpr(result));
5867 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5868
5869 return "lngfr";
5870}
5871
5872static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005873s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5874{
5875 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5876 guest_IA_next_instr);
5877 put_gpr_w1(r1, get_gpr_w1(r2));
florianf9e1ed72012-04-17 02:41:56 +00005878 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005879
5880 return "locr";
5881}
5882
5883static HChar *
5884s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5885{
5886 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5887 guest_IA_next_instr);
5888 put_gpr_dw0(r1, get_gpr_dw0(r2));
florianf9e1ed72012-04-17 02:41:56 +00005889 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005890
5891 return "locgr";
5892}
5893
5894static HChar *
5895s390_irgen_LOC(UChar r1, IRTemp op2addr)
5896{
5897 /* condition is checked in format handler */
5898 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5899
5900 return "loc";
5901}
5902
5903static HChar *
5904s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5905{
5906 /* condition is checked in format handler */
5907 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5908
5909 return "locg";
5910}
5911
5912static HChar *
sewardj2019a972011-03-07 16:04:07 +00005913s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5914{
5915 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5916 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5917 ));
5918
5919 return "lpq";
5920}
5921
5922static HChar *
5923s390_irgen_LPR(UChar r1, UChar r2)
5924{
5925 IRTemp op2 = newTemp(Ity_I32);
5926 IRTemp result = newTemp(Ity_I32);
5927
5928 assign(op2, get_gpr_w1(r2));
5929 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5930 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5931 put_gpr_w1(r1, mkexpr(result));
5932 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5933
5934 return "lpr";
5935}
5936
5937static HChar *
5938s390_irgen_LPGR(UChar r1, UChar r2)
5939{
5940 IRTemp op2 = newTemp(Ity_I64);
5941 IRTemp result = newTemp(Ity_I64);
5942
5943 assign(op2, get_gpr_dw0(r2));
5944 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5945 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5946 put_gpr_dw0(r1, mkexpr(result));
5947 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5948
5949 return "lpgr";
5950}
5951
5952static HChar *
5953s390_irgen_LPGFR(UChar r1, UChar r2)
5954{
5955 IRTemp op2 = newTemp(Ity_I64);
5956 IRTemp result = newTemp(Ity_I64);
5957
5958 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5959 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5960 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5961 put_gpr_dw0(r1, mkexpr(result));
5962 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5963
5964 return "lpgfr";
5965}
5966
5967static HChar *
5968s390_irgen_LRVR(UChar r1, UChar r2)
5969{
5970 IRTemp b0 = newTemp(Ity_I8);
5971 IRTemp b1 = newTemp(Ity_I8);
5972 IRTemp b2 = newTemp(Ity_I8);
5973 IRTemp b3 = newTemp(Ity_I8);
5974
5975 assign(b3, get_gpr_b7(r2));
5976 assign(b2, get_gpr_b6(r2));
5977 assign(b1, get_gpr_b5(r2));
5978 assign(b0, get_gpr_b4(r2));
5979 put_gpr_b4(r1, mkexpr(b3));
5980 put_gpr_b5(r1, mkexpr(b2));
5981 put_gpr_b6(r1, mkexpr(b1));
5982 put_gpr_b7(r1, mkexpr(b0));
5983
5984 return "lrvr";
5985}
5986
5987static HChar *
5988s390_irgen_LRVGR(UChar r1, UChar r2)
5989{
5990 IRTemp b0 = newTemp(Ity_I8);
5991 IRTemp b1 = newTemp(Ity_I8);
5992 IRTemp b2 = newTemp(Ity_I8);
5993 IRTemp b3 = newTemp(Ity_I8);
5994 IRTemp b4 = newTemp(Ity_I8);
5995 IRTemp b5 = newTemp(Ity_I8);
5996 IRTemp b6 = newTemp(Ity_I8);
5997 IRTemp b7 = newTemp(Ity_I8);
5998
5999 assign(b7, get_gpr_b7(r2));
6000 assign(b6, get_gpr_b6(r2));
6001 assign(b5, get_gpr_b5(r2));
6002 assign(b4, get_gpr_b4(r2));
6003 assign(b3, get_gpr_b3(r2));
6004 assign(b2, get_gpr_b2(r2));
6005 assign(b1, get_gpr_b1(r2));
6006 assign(b0, get_gpr_b0(r2));
6007 put_gpr_b0(r1, mkexpr(b7));
6008 put_gpr_b1(r1, mkexpr(b6));
6009 put_gpr_b2(r1, mkexpr(b5));
6010 put_gpr_b3(r1, mkexpr(b4));
6011 put_gpr_b4(r1, mkexpr(b3));
6012 put_gpr_b5(r1, mkexpr(b2));
6013 put_gpr_b6(r1, mkexpr(b1));
6014 put_gpr_b7(r1, mkexpr(b0));
6015
6016 return "lrvgr";
6017}
6018
6019static HChar *
6020s390_irgen_LRVH(UChar r1, IRTemp op2addr)
6021{
6022 IRTemp op2 = newTemp(Ity_I16);
6023
6024 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6025 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
6026 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
6027
6028 return "lrvh";
6029}
6030
6031static HChar *
6032s390_irgen_LRV(UChar r1, IRTemp op2addr)
6033{
6034 IRTemp op2 = newTemp(Ity_I32);
6035
6036 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6037 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6038 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6039 mkU8(8)), mkU32(255))));
6040 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6041 mkU8(16)), mkU32(255))));
6042 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6043 mkU8(24)), mkU32(255))));
6044
6045 return "lrv";
6046}
6047
6048static HChar *
6049s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6050{
6051 IRTemp op2 = newTemp(Ity_I64);
6052
6053 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6054 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6055 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6056 mkU8(8)), mkU64(255))));
6057 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6058 mkU8(16)), mkU64(255))));
6059 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6060 mkU8(24)), mkU64(255))));
6061 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6062 mkU8(32)), mkU64(255))));
6063 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6064 mkU8(40)), mkU64(255))));
6065 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6066 mkU8(48)), mkU64(255))));
6067 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6068 mkU8(56)), mkU64(255))));
6069
6070 return "lrvg";
6071}
6072
6073static HChar *
6074s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6075{
6076 store(mkexpr(op1addr), mkU16(i2));
6077
6078 return "mvhhi";
6079}
6080
6081static HChar *
6082s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6083{
6084 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6085
6086 return "mvhi";
6087}
6088
6089static HChar *
6090s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6091{
6092 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6093
6094 return "mvghi";
6095}
6096
6097static HChar *
6098s390_irgen_MVI(UChar i2, IRTemp op1addr)
6099{
6100 store(mkexpr(op1addr), mkU8(i2));
6101
6102 return "mvi";
6103}
6104
6105static HChar *
6106s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6107{
6108 store(mkexpr(op1addr), mkU8(i2));
6109
6110 return "mviy";
6111}
6112
6113static HChar *
6114s390_irgen_MR(UChar r1, UChar r2)
6115{
6116 IRTemp op1 = newTemp(Ity_I32);
6117 IRTemp op2 = newTemp(Ity_I32);
6118 IRTemp result = newTemp(Ity_I64);
6119
6120 assign(op1, get_gpr_w1(r1 + 1));
6121 assign(op2, get_gpr_w1(r2));
6122 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6123 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6124 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6125
6126 return "mr";
6127}
6128
6129static HChar *
6130s390_irgen_M(UChar r1, IRTemp op2addr)
6131{
6132 IRTemp op1 = newTemp(Ity_I32);
6133 IRTemp op2 = newTemp(Ity_I32);
6134 IRTemp result = newTemp(Ity_I64);
6135
6136 assign(op1, get_gpr_w1(r1 + 1));
6137 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6138 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6139 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6140 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6141
6142 return "m";
6143}
6144
6145static HChar *
6146s390_irgen_MFY(UChar r1, IRTemp op2addr)
6147{
6148 IRTemp op1 = newTemp(Ity_I32);
6149 IRTemp op2 = newTemp(Ity_I32);
6150 IRTemp result = newTemp(Ity_I64);
6151
6152 assign(op1, get_gpr_w1(r1 + 1));
6153 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6154 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6155 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6156 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6157
6158 return "mfy";
6159}
6160
6161static HChar *
6162s390_irgen_MH(UChar r1, IRTemp op2addr)
6163{
6164 IRTemp op1 = newTemp(Ity_I32);
6165 IRTemp op2 = newTemp(Ity_I16);
6166 IRTemp result = newTemp(Ity_I64);
6167
6168 assign(op1, get_gpr_w1(r1));
6169 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6170 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6171 ));
6172 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6173
6174 return "mh";
6175}
6176
6177static HChar *
6178s390_irgen_MHY(UChar r1, IRTemp op2addr)
6179{
6180 IRTemp op1 = newTemp(Ity_I32);
6181 IRTemp op2 = newTemp(Ity_I16);
6182 IRTemp result = newTemp(Ity_I64);
6183
6184 assign(op1, get_gpr_w1(r1));
6185 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6186 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6187 ));
6188 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6189
6190 return "mhy";
6191}
6192
6193static HChar *
6194s390_irgen_MHI(UChar r1, UShort i2)
6195{
6196 IRTemp op1 = newTemp(Ity_I32);
6197 Short op2;
6198 IRTemp result = newTemp(Ity_I64);
6199
6200 assign(op1, get_gpr_w1(r1));
6201 op2 = (Short)i2;
6202 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6203 mkU16((UShort)op2))));
6204 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6205
6206 return "mhi";
6207}
6208
6209static HChar *
6210s390_irgen_MGHI(UChar r1, UShort i2)
6211{
6212 IRTemp op1 = newTemp(Ity_I64);
6213 Short op2;
6214 IRTemp result = newTemp(Ity_I128);
6215
6216 assign(op1, get_gpr_dw0(r1));
6217 op2 = (Short)i2;
6218 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6219 mkU16((UShort)op2))));
6220 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6221
6222 return "mghi";
6223}
6224
6225static HChar *
6226s390_irgen_MLR(UChar r1, UChar r2)
6227{
6228 IRTemp op1 = newTemp(Ity_I32);
6229 IRTemp op2 = newTemp(Ity_I32);
6230 IRTemp result = newTemp(Ity_I64);
6231
6232 assign(op1, get_gpr_w1(r1 + 1));
6233 assign(op2, get_gpr_w1(r2));
6234 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6235 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6236 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6237
6238 return "mlr";
6239}
6240
6241static HChar *
6242s390_irgen_MLGR(UChar r1, UChar r2)
6243{
6244 IRTemp op1 = newTemp(Ity_I64);
6245 IRTemp op2 = newTemp(Ity_I64);
6246 IRTemp result = newTemp(Ity_I128);
6247
6248 assign(op1, get_gpr_dw0(r1 + 1));
6249 assign(op2, get_gpr_dw0(r2));
6250 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6251 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6252 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6253
6254 return "mlgr";
6255}
6256
6257static HChar *
6258s390_irgen_ML(UChar r1, IRTemp op2addr)
6259{
6260 IRTemp op1 = newTemp(Ity_I32);
6261 IRTemp op2 = newTemp(Ity_I32);
6262 IRTemp result = newTemp(Ity_I64);
6263
6264 assign(op1, get_gpr_w1(r1 + 1));
6265 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6266 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6267 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6268 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6269
6270 return "ml";
6271}
6272
6273static HChar *
6274s390_irgen_MLG(UChar r1, IRTemp op2addr)
6275{
6276 IRTemp op1 = newTemp(Ity_I64);
6277 IRTemp op2 = newTemp(Ity_I64);
6278 IRTemp result = newTemp(Ity_I128);
6279
6280 assign(op1, get_gpr_dw0(r1 + 1));
6281 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6282 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6283 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6284 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6285
6286 return "mlg";
6287}
6288
6289static HChar *
6290s390_irgen_MSR(UChar r1, UChar r2)
6291{
6292 IRTemp op1 = newTemp(Ity_I32);
6293 IRTemp op2 = newTemp(Ity_I32);
6294 IRTemp result = newTemp(Ity_I64);
6295
6296 assign(op1, get_gpr_w1(r1));
6297 assign(op2, get_gpr_w1(r2));
6298 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6299 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6300
6301 return "msr";
6302}
6303
6304static HChar *
6305s390_irgen_MSGR(UChar r1, UChar r2)
6306{
6307 IRTemp op1 = newTemp(Ity_I64);
6308 IRTemp op2 = newTemp(Ity_I64);
6309 IRTemp result = newTemp(Ity_I128);
6310
6311 assign(op1, get_gpr_dw0(r1));
6312 assign(op2, get_gpr_dw0(r2));
6313 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6314 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6315
6316 return "msgr";
6317}
6318
6319static HChar *
6320s390_irgen_MSGFR(UChar r1, UChar r2)
6321{
6322 IRTemp op1 = newTemp(Ity_I64);
6323 IRTemp op2 = newTemp(Ity_I32);
6324 IRTemp result = newTemp(Ity_I128);
6325
6326 assign(op1, get_gpr_dw0(r1));
6327 assign(op2, get_gpr_w1(r2));
6328 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6329 ));
6330 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6331
6332 return "msgfr";
6333}
6334
6335static HChar *
6336s390_irgen_MS(UChar r1, IRTemp op2addr)
6337{
6338 IRTemp op1 = newTemp(Ity_I32);
6339 IRTemp op2 = newTemp(Ity_I32);
6340 IRTemp result = newTemp(Ity_I64);
6341
6342 assign(op1, get_gpr_w1(r1));
6343 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6344 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6345 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6346
6347 return "ms";
6348}
6349
6350static HChar *
6351s390_irgen_MSY(UChar r1, IRTemp op2addr)
6352{
6353 IRTemp op1 = newTemp(Ity_I32);
6354 IRTemp op2 = newTemp(Ity_I32);
6355 IRTemp result = newTemp(Ity_I64);
6356
6357 assign(op1, get_gpr_w1(r1));
6358 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6359 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6360 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6361
6362 return "msy";
6363}
6364
6365static HChar *
6366s390_irgen_MSG(UChar r1, IRTemp op2addr)
6367{
6368 IRTemp op1 = newTemp(Ity_I64);
6369 IRTemp op2 = newTemp(Ity_I64);
6370 IRTemp result = newTemp(Ity_I128);
6371
6372 assign(op1, get_gpr_dw0(r1));
6373 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6374 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6375 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6376
6377 return "msg";
6378}
6379
6380static HChar *
6381s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6382{
6383 IRTemp op1 = newTemp(Ity_I64);
6384 IRTemp op2 = newTemp(Ity_I32);
6385 IRTemp result = newTemp(Ity_I128);
6386
6387 assign(op1, get_gpr_dw0(r1));
6388 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6389 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6390 ));
6391 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6392
6393 return "msgf";
6394}
6395
6396static HChar *
6397s390_irgen_MSFI(UChar r1, UInt i2)
6398{
6399 IRTemp op1 = newTemp(Ity_I32);
6400 Int op2;
6401 IRTemp result = newTemp(Ity_I64);
6402
6403 assign(op1, get_gpr_w1(r1));
6404 op2 = (Int)i2;
6405 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6406 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6407
6408 return "msfi";
6409}
6410
6411static HChar *
6412s390_irgen_MSGFI(UChar r1, UInt i2)
6413{
6414 IRTemp op1 = newTemp(Ity_I64);
6415 Int op2;
6416 IRTemp result = newTemp(Ity_I128);
6417
6418 assign(op1, get_gpr_dw0(r1));
6419 op2 = (Int)i2;
6420 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6421 op2))));
6422 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6423
6424 return "msgfi";
6425}
6426
6427static HChar *
6428s390_irgen_OR(UChar r1, UChar r2)
6429{
6430 IRTemp op1 = newTemp(Ity_I32);
6431 IRTemp op2 = newTemp(Ity_I32);
6432 IRTemp result = newTemp(Ity_I32);
6433
6434 assign(op1, get_gpr_w1(r1));
6435 assign(op2, get_gpr_w1(r2));
6436 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6437 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6438 put_gpr_w1(r1, mkexpr(result));
6439
6440 return "or";
6441}
6442
6443static HChar *
6444s390_irgen_OGR(UChar r1, UChar r2)
6445{
6446 IRTemp op1 = newTemp(Ity_I64);
6447 IRTemp op2 = newTemp(Ity_I64);
6448 IRTemp result = newTemp(Ity_I64);
6449
6450 assign(op1, get_gpr_dw0(r1));
6451 assign(op2, get_gpr_dw0(r2));
6452 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6453 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6454 put_gpr_dw0(r1, mkexpr(result));
6455
6456 return "ogr";
6457}
6458
6459static HChar *
6460s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6461{
6462 IRTemp op2 = newTemp(Ity_I32);
6463 IRTemp op3 = newTemp(Ity_I32);
6464 IRTemp result = newTemp(Ity_I32);
6465
6466 assign(op2, get_gpr_w1(r2));
6467 assign(op3, get_gpr_w1(r3));
6468 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6469 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6470 put_gpr_w1(r1, mkexpr(result));
6471
6472 return "ork";
6473}
6474
6475static HChar *
6476s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6477{
6478 IRTemp op2 = newTemp(Ity_I64);
6479 IRTemp op3 = newTemp(Ity_I64);
6480 IRTemp result = newTemp(Ity_I64);
6481
6482 assign(op2, get_gpr_dw0(r2));
6483 assign(op3, get_gpr_dw0(r3));
6484 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6485 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6486 put_gpr_dw0(r1, mkexpr(result));
6487
6488 return "ogrk";
6489}
6490
6491static HChar *
6492s390_irgen_O(UChar r1, IRTemp op2addr)
6493{
6494 IRTemp op1 = newTemp(Ity_I32);
6495 IRTemp op2 = newTemp(Ity_I32);
6496 IRTemp result = newTemp(Ity_I32);
6497
6498 assign(op1, get_gpr_w1(r1));
6499 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6500 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6501 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6502 put_gpr_w1(r1, mkexpr(result));
6503
6504 return "o";
6505}
6506
6507static HChar *
6508s390_irgen_OY(UChar r1, IRTemp op2addr)
6509{
6510 IRTemp op1 = newTemp(Ity_I32);
6511 IRTemp op2 = newTemp(Ity_I32);
6512 IRTemp result = newTemp(Ity_I32);
6513
6514 assign(op1, get_gpr_w1(r1));
6515 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6516 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6517 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6518 put_gpr_w1(r1, mkexpr(result));
6519
6520 return "oy";
6521}
6522
6523static HChar *
6524s390_irgen_OG(UChar r1, IRTemp op2addr)
6525{
6526 IRTemp op1 = newTemp(Ity_I64);
6527 IRTemp op2 = newTemp(Ity_I64);
6528 IRTemp result = newTemp(Ity_I64);
6529
6530 assign(op1, get_gpr_dw0(r1));
6531 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6532 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6533 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6534 put_gpr_dw0(r1, mkexpr(result));
6535
6536 return "og";
6537}
6538
6539static HChar *
6540s390_irgen_OI(UChar i2, IRTemp op1addr)
6541{
6542 IRTemp op1 = newTemp(Ity_I8);
6543 UChar op2;
6544 IRTemp result = newTemp(Ity_I8);
6545
6546 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6547 op2 = i2;
6548 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6549 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6550 store(mkexpr(op1addr), mkexpr(result));
6551
6552 return "oi";
6553}
6554
6555static HChar *
6556s390_irgen_OIY(UChar i2, IRTemp op1addr)
6557{
6558 IRTemp op1 = newTemp(Ity_I8);
6559 UChar op2;
6560 IRTemp result = newTemp(Ity_I8);
6561
6562 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6563 op2 = i2;
6564 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6565 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6566 store(mkexpr(op1addr), mkexpr(result));
6567
6568 return "oiy";
6569}
6570
6571static HChar *
6572s390_irgen_OIHF(UChar r1, UInt i2)
6573{
6574 IRTemp op1 = newTemp(Ity_I32);
6575 UInt op2;
6576 IRTemp result = newTemp(Ity_I32);
6577
6578 assign(op1, get_gpr_w0(r1));
6579 op2 = i2;
6580 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6581 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6582 put_gpr_w0(r1, mkexpr(result));
6583
6584 return "oihf";
6585}
6586
6587static HChar *
6588s390_irgen_OIHH(UChar r1, UShort i2)
6589{
6590 IRTemp op1 = newTemp(Ity_I16);
6591 UShort op2;
6592 IRTemp result = newTemp(Ity_I16);
6593
6594 assign(op1, get_gpr_hw0(r1));
6595 op2 = i2;
6596 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6597 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6598 put_gpr_hw0(r1, mkexpr(result));
6599
6600 return "oihh";
6601}
6602
6603static HChar *
6604s390_irgen_OIHL(UChar r1, UShort i2)
6605{
6606 IRTemp op1 = newTemp(Ity_I16);
6607 UShort op2;
6608 IRTemp result = newTemp(Ity_I16);
6609
6610 assign(op1, get_gpr_hw1(r1));
6611 op2 = i2;
6612 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6613 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6614 put_gpr_hw1(r1, mkexpr(result));
6615
6616 return "oihl";
6617}
6618
6619static HChar *
6620s390_irgen_OILF(UChar r1, UInt i2)
6621{
6622 IRTemp op1 = newTemp(Ity_I32);
6623 UInt op2;
6624 IRTemp result = newTemp(Ity_I32);
6625
6626 assign(op1, get_gpr_w1(r1));
6627 op2 = i2;
6628 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6629 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6630 put_gpr_w1(r1, mkexpr(result));
6631
6632 return "oilf";
6633}
6634
6635static HChar *
6636s390_irgen_OILH(UChar r1, UShort i2)
6637{
6638 IRTemp op1 = newTemp(Ity_I16);
6639 UShort op2;
6640 IRTemp result = newTemp(Ity_I16);
6641
6642 assign(op1, get_gpr_hw2(r1));
6643 op2 = i2;
6644 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6645 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6646 put_gpr_hw2(r1, mkexpr(result));
6647
6648 return "oilh";
6649}
6650
6651static HChar *
6652s390_irgen_OILL(UChar r1, UShort i2)
6653{
6654 IRTemp op1 = newTemp(Ity_I16);
6655 UShort op2;
6656 IRTemp result = newTemp(Ity_I16);
6657
6658 assign(op1, get_gpr_hw3(r1));
6659 op2 = i2;
6660 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6661 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6662 put_gpr_hw3(r1, mkexpr(result));
6663
6664 return "oill";
6665}
6666
6667static HChar *
6668s390_irgen_PFD(void)
6669{
6670
6671 return "pfd";
6672}
6673
6674static HChar *
6675s390_irgen_PFDRL(void)
6676{
6677
6678 return "pfdrl";
6679}
6680
6681static HChar *
6682s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6683{
6684 IRTemp amount = newTemp(Ity_I64);
6685 IRTemp op = newTemp(Ity_I32);
6686
6687 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6688 assign(op, get_gpr_w1(r3));
6689 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6690 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6691 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6692
6693 return "rll";
6694}
6695
6696static HChar *
6697s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6698{
6699 IRTemp amount = newTemp(Ity_I64);
6700 IRTemp op = newTemp(Ity_I64);
6701
6702 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6703 assign(op, get_gpr_dw0(r3));
6704 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6705 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6706 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6707
6708 return "rllg";
6709}
6710
6711static HChar *
6712s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6713{
6714 UChar from;
6715 UChar to;
6716 UChar rot;
6717 UChar t_bit;
6718 ULong mask;
6719 ULong maskc;
6720 IRTemp result = newTemp(Ity_I64);
6721 IRTemp op2 = newTemp(Ity_I64);
6722
6723 from = i3 & 63;
6724 to = i4 & 63;
6725 rot = i5 & 63;
6726 t_bit = i3 & 128;
6727 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6728 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6729 mkU8(64 - rot))));
6730 if (from <= to) {
6731 mask = ~0ULL;
6732 mask = (mask >> from) & (mask << (63 - to));
6733 maskc = ~mask;
6734 } else {
6735 maskc = ~0ULL;
6736 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6737 mask = ~maskc;
6738 }
6739 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6740 ), mkU64(mask)));
6741 if (t_bit == 0) {
6742 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6743 mkU64(maskc)), mkexpr(result)));
6744 }
6745 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6746
6747 return "rnsbg";
6748}
6749
6750static HChar *
6751s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6752{
6753 UChar from;
6754 UChar to;
6755 UChar rot;
6756 UChar t_bit;
6757 ULong mask;
6758 ULong maskc;
6759 IRTemp result = newTemp(Ity_I64);
6760 IRTemp op2 = newTemp(Ity_I64);
6761
6762 from = i3 & 63;
6763 to = i4 & 63;
6764 rot = i5 & 63;
6765 t_bit = i3 & 128;
6766 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6767 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6768 mkU8(64 - rot))));
6769 if (from <= to) {
6770 mask = ~0ULL;
6771 mask = (mask >> from) & (mask << (63 - to));
6772 maskc = ~mask;
6773 } else {
6774 maskc = ~0ULL;
6775 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6776 mask = ~maskc;
6777 }
6778 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6779 ), mkU64(mask)));
6780 if (t_bit == 0) {
6781 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6782 mkU64(maskc)), mkexpr(result)));
6783 }
6784 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6785
6786 return "rxsbg";
6787}
6788
6789static HChar *
6790s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6791{
6792 UChar from;
6793 UChar to;
6794 UChar rot;
6795 UChar t_bit;
6796 ULong mask;
6797 ULong maskc;
6798 IRTemp result = newTemp(Ity_I64);
6799 IRTemp op2 = newTemp(Ity_I64);
6800
6801 from = i3 & 63;
6802 to = i4 & 63;
6803 rot = i5 & 63;
6804 t_bit = i3 & 128;
6805 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6806 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6807 mkU8(64 - rot))));
6808 if (from <= to) {
6809 mask = ~0ULL;
6810 mask = (mask >> from) & (mask << (63 - to));
6811 maskc = ~mask;
6812 } else {
6813 maskc = ~0ULL;
6814 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6815 mask = ~maskc;
6816 }
6817 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6818 ), mkU64(mask)));
6819 if (t_bit == 0) {
6820 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6821 mkU64(maskc)), mkexpr(result)));
6822 }
6823 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6824
6825 return "rosbg";
6826}
6827
6828static HChar *
6829s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6830{
6831 UChar from;
6832 UChar to;
6833 UChar rot;
6834 UChar z_bit;
6835 ULong mask;
6836 ULong maskc;
6837 IRTemp op2 = newTemp(Ity_I64);
6838 IRTemp result = newTemp(Ity_I64);
6839
6840 from = i3 & 63;
6841 to = i4 & 63;
6842 rot = i5 & 63;
6843 z_bit = i4 & 128;
6844 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6845 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6846 mkU8(64 - rot))));
6847 if (from <= to) {
6848 mask = ~0ULL;
6849 mask = (mask >> from) & (mask << (63 - to));
6850 maskc = ~mask;
6851 } else {
6852 maskc = ~0ULL;
6853 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6854 mask = ~maskc;
6855 }
6856 if (z_bit == 0) {
6857 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6858 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6859 } else {
6860 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6861 }
6862 assign(result, get_gpr_dw0(r1));
6863 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6864
6865 return "risbg";
6866}
6867
6868static HChar *
6869s390_irgen_SAR(UChar r1, UChar r2)
6870{
6871 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006872 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006873 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6874
6875 return "sar";
6876}
6877
6878static HChar *
6879s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6880{
6881 IRTemp p1 = newTemp(Ity_I64);
6882 IRTemp p2 = newTemp(Ity_I64);
6883 IRTemp op = newTemp(Ity_I64);
6884 IRTemp result = newTemp(Ity_I64);
6885 Long sign_mask;
6886 IRTemp shift_amount = newTemp(Ity_I64);
6887
6888 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6889 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6890 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6891 ));
6892 sign_mask = 1ULL << 63;
6893 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6894 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6895 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6896 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6897 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6898 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6899 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6900
6901 return "slda";
6902}
6903
6904static HChar *
6905s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6906{
6907 IRTemp p1 = newTemp(Ity_I64);
6908 IRTemp p2 = newTemp(Ity_I64);
6909 IRTemp result = newTemp(Ity_I64);
6910
6911 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6912 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6913 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6914 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6915 mkexpr(op2addr), mkU64(63)))));
6916 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6917 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6918
6919 return "sldl";
6920}
6921
6922static HChar *
6923s390_irgen_SLA(UChar r1, IRTemp op2addr)
6924{
6925 IRTemp uop = newTemp(Ity_I32);
6926 IRTemp result = newTemp(Ity_I32);
6927 UInt sign_mask;
6928 IRTemp shift_amount = newTemp(Ity_I64);
6929 IRTemp op = newTemp(Ity_I32);
6930
6931 assign(op, get_gpr_w1(r1));
6932 assign(uop, get_gpr_w1(r1));
6933 sign_mask = 2147483648U;
6934 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6935 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6936 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6937 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6938 put_gpr_w1(r1, mkexpr(result));
6939 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6940
6941 return "sla";
6942}
6943
6944static HChar *
6945s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6946{
6947 IRTemp uop = newTemp(Ity_I32);
6948 IRTemp result = newTemp(Ity_I32);
6949 UInt sign_mask;
6950 IRTemp shift_amount = newTemp(Ity_I64);
6951 IRTemp op = newTemp(Ity_I32);
6952
6953 assign(op, get_gpr_w1(r3));
6954 assign(uop, get_gpr_w1(r3));
6955 sign_mask = 2147483648U;
6956 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6957 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6958 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6959 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6960 put_gpr_w1(r1, mkexpr(result));
6961 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6962
6963 return "slak";
6964}
6965
6966static HChar *
6967s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6968{
6969 IRTemp uop = newTemp(Ity_I64);
6970 IRTemp result = newTemp(Ity_I64);
6971 ULong sign_mask;
6972 IRTemp shift_amount = newTemp(Ity_I64);
6973 IRTemp op = newTemp(Ity_I64);
6974
6975 assign(op, get_gpr_dw0(r3));
6976 assign(uop, get_gpr_dw0(r3));
6977 sign_mask = 9223372036854775808ULL;
6978 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6979 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6980 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6981 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6982 put_gpr_dw0(r1, mkexpr(result));
6983 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6984
6985 return "slag";
6986}
6987
6988static HChar *
6989s390_irgen_SLL(UChar r1, IRTemp op2addr)
6990{
6991 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6992 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6993
6994 return "sll";
6995}
6996
6997static HChar *
6998s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6999{
7000 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
7001 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7002
7003 return "sllk";
7004}
7005
7006static HChar *
7007s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
7008{
7009 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
7010 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7011
7012 return "sllg";
7013}
7014
7015static HChar *
7016s390_irgen_SRDA(UChar r1, IRTemp op2addr)
7017{
7018 IRTemp p1 = newTemp(Ity_I64);
7019 IRTemp p2 = newTemp(Ity_I64);
7020 IRTemp result = newTemp(Ity_I64);
7021
7022 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7023 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7024 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7025 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7026 mkexpr(op2addr), mkU64(63)))));
7027 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7028 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7029 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7030
7031 return "srda";
7032}
7033
7034static HChar *
7035s390_irgen_SRDL(UChar r1, IRTemp op2addr)
7036{
7037 IRTemp p1 = newTemp(Ity_I64);
7038 IRTemp p2 = newTemp(Ity_I64);
7039 IRTemp result = newTemp(Ity_I64);
7040
7041 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7042 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7043 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7044 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7045 mkexpr(op2addr), mkU64(63)))));
7046 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7047 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7048
7049 return "srdl";
7050}
7051
7052static HChar *
7053s390_irgen_SRA(UChar r1, IRTemp op2addr)
7054{
7055 IRTemp result = newTemp(Ity_I32);
7056 IRTemp op = newTemp(Ity_I32);
7057
7058 assign(op, get_gpr_w1(r1));
7059 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7060 mkexpr(op2addr), mkU64(63)))));
7061 put_gpr_w1(r1, mkexpr(result));
7062 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7063
7064 return "sra";
7065}
7066
7067static HChar *
7068s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7069{
7070 IRTemp result = newTemp(Ity_I32);
7071 IRTemp op = newTemp(Ity_I32);
7072
7073 assign(op, get_gpr_w1(r3));
7074 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7075 mkexpr(op2addr), mkU64(63)))));
7076 put_gpr_w1(r1, mkexpr(result));
7077 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7078
7079 return "srak";
7080}
7081
7082static HChar *
7083s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7084{
7085 IRTemp result = newTemp(Ity_I64);
7086 IRTemp op = newTemp(Ity_I64);
7087
7088 assign(op, get_gpr_dw0(r3));
7089 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7090 mkexpr(op2addr), mkU64(63)))));
7091 put_gpr_dw0(r1, mkexpr(result));
7092 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7093
7094 return "srag";
7095}
7096
7097static HChar *
7098s390_irgen_SRL(UChar r1, IRTemp op2addr)
7099{
7100 IRTemp op = newTemp(Ity_I32);
7101
7102 assign(op, get_gpr_w1(r1));
7103 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7104 mkexpr(op2addr), mkU64(63)))));
7105
7106 return "srl";
7107}
7108
7109static HChar *
7110s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7111{
7112 IRTemp op = newTemp(Ity_I32);
7113
7114 assign(op, get_gpr_w1(r3));
7115 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7116 mkexpr(op2addr), mkU64(63)))));
7117
7118 return "srlk";
7119}
7120
7121static HChar *
7122s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7123{
7124 IRTemp op = newTemp(Ity_I64);
7125
7126 assign(op, get_gpr_dw0(r3));
7127 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7128 mkexpr(op2addr), mkU64(63)))));
7129
7130 return "srlg";
7131}
7132
7133static HChar *
7134s390_irgen_ST(UChar r1, IRTemp op2addr)
7135{
7136 store(mkexpr(op2addr), get_gpr_w1(r1));
7137
7138 return "st";
7139}
7140
7141static HChar *
7142s390_irgen_STY(UChar r1, IRTemp op2addr)
7143{
7144 store(mkexpr(op2addr), get_gpr_w1(r1));
7145
7146 return "sty";
7147}
7148
7149static HChar *
7150s390_irgen_STG(UChar r1, IRTemp op2addr)
7151{
7152 store(mkexpr(op2addr), get_gpr_dw0(r1));
7153
7154 return "stg";
7155}
7156
7157static HChar *
7158s390_irgen_STRL(UChar r1, UInt i2)
7159{
7160 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7161 get_gpr_w1(r1));
7162
7163 return "strl";
7164}
7165
7166static HChar *
7167s390_irgen_STGRL(UChar r1, UInt i2)
7168{
7169 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7170 get_gpr_dw0(r1));
7171
7172 return "stgrl";
7173}
7174
7175static HChar *
7176s390_irgen_STC(UChar r1, IRTemp op2addr)
7177{
7178 store(mkexpr(op2addr), get_gpr_b7(r1));
7179
7180 return "stc";
7181}
7182
7183static HChar *
7184s390_irgen_STCY(UChar r1, IRTemp op2addr)
7185{
7186 store(mkexpr(op2addr), get_gpr_b7(r1));
7187
7188 return "stcy";
7189}
7190
7191static HChar *
7192s390_irgen_STCH(UChar r1, IRTemp op2addr)
7193{
7194 store(mkexpr(op2addr), get_gpr_b3(r1));
7195
7196 return "stch";
7197}
7198
7199static HChar *
7200s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7201{
7202 UChar mask;
7203 UChar n;
7204
7205 mask = (UChar)r3;
7206 n = 0;
7207 if ((mask & 8) != 0) {
7208 store(mkexpr(op2addr), get_gpr_b4(r1));
7209 n = n + 1;
7210 }
7211 if ((mask & 4) != 0) {
7212 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7213 n = n + 1;
7214 }
7215 if ((mask & 2) != 0) {
7216 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7217 n = n + 1;
7218 }
7219 if ((mask & 1) != 0) {
7220 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7221 }
7222
7223 return "stcm";
7224}
7225
7226static HChar *
7227s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7228{
7229 UChar mask;
7230 UChar n;
7231
7232 mask = (UChar)r3;
7233 n = 0;
7234 if ((mask & 8) != 0) {
7235 store(mkexpr(op2addr), get_gpr_b4(r1));
7236 n = n + 1;
7237 }
7238 if ((mask & 4) != 0) {
7239 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7240 n = n + 1;
7241 }
7242 if ((mask & 2) != 0) {
7243 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7244 n = n + 1;
7245 }
7246 if ((mask & 1) != 0) {
7247 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7248 }
7249
7250 return "stcmy";
7251}
7252
7253static HChar *
7254s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7255{
7256 UChar mask;
7257 UChar n;
7258
7259 mask = (UChar)r3;
7260 n = 0;
7261 if ((mask & 8) != 0) {
7262 store(mkexpr(op2addr), get_gpr_b0(r1));
7263 n = n + 1;
7264 }
7265 if ((mask & 4) != 0) {
7266 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7267 n = n + 1;
7268 }
7269 if ((mask & 2) != 0) {
7270 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7271 n = n + 1;
7272 }
7273 if ((mask & 1) != 0) {
7274 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7275 }
7276
7277 return "stcmh";
7278}
7279
7280static HChar *
7281s390_irgen_STH(UChar r1, IRTemp op2addr)
7282{
7283 store(mkexpr(op2addr), get_gpr_hw3(r1));
7284
7285 return "sth";
7286}
7287
7288static HChar *
7289s390_irgen_STHY(UChar r1, IRTemp op2addr)
7290{
7291 store(mkexpr(op2addr), get_gpr_hw3(r1));
7292
7293 return "sthy";
7294}
7295
7296static HChar *
7297s390_irgen_STHRL(UChar r1, UInt i2)
7298{
7299 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7300 get_gpr_hw3(r1));
7301
7302 return "sthrl";
7303}
7304
7305static HChar *
7306s390_irgen_STHH(UChar r1, IRTemp op2addr)
7307{
7308 store(mkexpr(op2addr), get_gpr_hw1(r1));
7309
7310 return "sthh";
7311}
7312
7313static HChar *
7314s390_irgen_STFH(UChar r1, IRTemp op2addr)
7315{
7316 store(mkexpr(op2addr), get_gpr_w0(r1));
7317
7318 return "stfh";
7319}
7320
7321static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007322s390_irgen_STOC(UChar r1, IRTemp op2addr)
7323{
7324 /* condition is checked in format handler */
7325 store(mkexpr(op2addr), get_gpr_w1(r1));
7326
7327 return "stoc";
7328}
7329
7330static HChar *
7331s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7332{
7333 /* condition is checked in format handler */
7334 store(mkexpr(op2addr), get_gpr_dw0(r1));
7335
7336 return "stocg";
7337}
7338
7339static HChar *
sewardj2019a972011-03-07 16:04:07 +00007340s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7341{
7342 store(mkexpr(op2addr), get_gpr_dw0(r1));
7343 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7344
7345 return "stpq";
7346}
7347
7348static HChar *
7349s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7350{
7351 store(mkexpr(op2addr), get_gpr_b7(r1));
7352 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7353
7354 return "strvh";
7355}
7356
7357static HChar *
7358s390_irgen_STRV(UChar r1, IRTemp op2addr)
7359{
7360 store(mkexpr(op2addr), get_gpr_b7(r1));
7361 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7362 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7363 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7364
7365 return "strv";
7366}
7367
7368static HChar *
7369s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7370{
7371 store(mkexpr(op2addr), get_gpr_b7(r1));
7372 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7373 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7374 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7375 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7376 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7377 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7378 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7379
7380 return "strvg";
7381}
7382
7383static HChar *
7384s390_irgen_SR(UChar r1, UChar r2)
7385{
7386 IRTemp op1 = newTemp(Ity_I32);
7387 IRTemp op2 = newTemp(Ity_I32);
7388 IRTemp result = newTemp(Ity_I32);
7389
7390 assign(op1, get_gpr_w1(r1));
7391 assign(op2, get_gpr_w1(r2));
7392 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7393 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7394 put_gpr_w1(r1, mkexpr(result));
7395
7396 return "sr";
7397}
7398
7399static HChar *
7400s390_irgen_SGR(UChar r1, UChar r2)
7401{
7402 IRTemp op1 = newTemp(Ity_I64);
7403 IRTemp op2 = newTemp(Ity_I64);
7404 IRTemp result = newTemp(Ity_I64);
7405
7406 assign(op1, get_gpr_dw0(r1));
7407 assign(op2, get_gpr_dw0(r2));
7408 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7409 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7410 put_gpr_dw0(r1, mkexpr(result));
7411
7412 return "sgr";
7413}
7414
7415static HChar *
7416s390_irgen_SGFR(UChar r1, UChar r2)
7417{
7418 IRTemp op1 = newTemp(Ity_I64);
7419 IRTemp op2 = newTemp(Ity_I64);
7420 IRTemp result = newTemp(Ity_I64);
7421
7422 assign(op1, get_gpr_dw0(r1));
7423 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7424 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7425 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7426 put_gpr_dw0(r1, mkexpr(result));
7427
7428 return "sgfr";
7429}
7430
7431static HChar *
7432s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7433{
7434 IRTemp op2 = newTemp(Ity_I32);
7435 IRTemp op3 = newTemp(Ity_I32);
7436 IRTemp result = newTemp(Ity_I32);
7437
7438 assign(op2, get_gpr_w1(r2));
7439 assign(op3, get_gpr_w1(r3));
7440 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7441 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7442 put_gpr_w1(r1, mkexpr(result));
7443
7444 return "srk";
7445}
7446
7447static HChar *
7448s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7449{
7450 IRTemp op2 = newTemp(Ity_I64);
7451 IRTemp op3 = newTemp(Ity_I64);
7452 IRTemp result = newTemp(Ity_I64);
7453
7454 assign(op2, get_gpr_dw0(r2));
7455 assign(op3, get_gpr_dw0(r3));
7456 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7457 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7458 put_gpr_dw0(r1, mkexpr(result));
7459
7460 return "sgrk";
7461}
7462
7463static HChar *
7464s390_irgen_S(UChar r1, IRTemp op2addr)
7465{
7466 IRTemp op1 = newTemp(Ity_I32);
7467 IRTemp op2 = newTemp(Ity_I32);
7468 IRTemp result = newTemp(Ity_I32);
7469
7470 assign(op1, get_gpr_w1(r1));
7471 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7472 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7473 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7474 put_gpr_w1(r1, mkexpr(result));
7475
7476 return "s";
7477}
7478
7479static HChar *
7480s390_irgen_SY(UChar r1, IRTemp op2addr)
7481{
7482 IRTemp op1 = newTemp(Ity_I32);
7483 IRTemp op2 = newTemp(Ity_I32);
7484 IRTemp result = newTemp(Ity_I32);
7485
7486 assign(op1, get_gpr_w1(r1));
7487 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7488 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7489 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7490 put_gpr_w1(r1, mkexpr(result));
7491
7492 return "sy";
7493}
7494
7495static HChar *
7496s390_irgen_SG(UChar r1, IRTemp op2addr)
7497{
7498 IRTemp op1 = newTemp(Ity_I64);
7499 IRTemp op2 = newTemp(Ity_I64);
7500 IRTemp result = newTemp(Ity_I64);
7501
7502 assign(op1, get_gpr_dw0(r1));
7503 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7504 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7505 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7506 put_gpr_dw0(r1, mkexpr(result));
7507
7508 return "sg";
7509}
7510
7511static HChar *
7512s390_irgen_SGF(UChar r1, IRTemp op2addr)
7513{
7514 IRTemp op1 = newTemp(Ity_I64);
7515 IRTemp op2 = newTemp(Ity_I64);
7516 IRTemp result = newTemp(Ity_I64);
7517
7518 assign(op1, get_gpr_dw0(r1));
7519 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7520 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7521 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7522 put_gpr_dw0(r1, mkexpr(result));
7523
7524 return "sgf";
7525}
7526
7527static HChar *
7528s390_irgen_SH(UChar r1, IRTemp op2addr)
7529{
7530 IRTemp op1 = newTemp(Ity_I32);
7531 IRTemp op2 = newTemp(Ity_I32);
7532 IRTemp result = newTemp(Ity_I32);
7533
7534 assign(op1, get_gpr_w1(r1));
7535 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7536 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7537 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7538 put_gpr_w1(r1, mkexpr(result));
7539
7540 return "sh";
7541}
7542
7543static HChar *
7544s390_irgen_SHY(UChar r1, IRTemp op2addr)
7545{
7546 IRTemp op1 = newTemp(Ity_I32);
7547 IRTemp op2 = newTemp(Ity_I32);
7548 IRTemp result = newTemp(Ity_I32);
7549
7550 assign(op1, get_gpr_w1(r1));
7551 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7552 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7553 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7554 put_gpr_w1(r1, mkexpr(result));
7555
7556 return "shy";
7557}
7558
7559static HChar *
7560s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7561{
7562 IRTemp op2 = newTemp(Ity_I32);
7563 IRTemp op3 = newTemp(Ity_I32);
7564 IRTemp result = newTemp(Ity_I32);
7565
7566 assign(op2, get_gpr_w0(r1));
7567 assign(op3, get_gpr_w0(r2));
7568 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7569 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7570 put_gpr_w0(r1, mkexpr(result));
7571
7572 return "shhhr";
7573}
7574
7575static HChar *
7576s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7577{
7578 IRTemp op2 = newTemp(Ity_I32);
7579 IRTemp op3 = newTemp(Ity_I32);
7580 IRTemp result = newTemp(Ity_I32);
7581
7582 assign(op2, get_gpr_w0(r1));
7583 assign(op3, get_gpr_w1(r2));
7584 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7585 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7586 put_gpr_w0(r1, mkexpr(result));
7587
7588 return "shhlr";
7589}
7590
7591static HChar *
7592s390_irgen_SLR(UChar r1, UChar r2)
7593{
7594 IRTemp op1 = newTemp(Ity_I32);
7595 IRTemp op2 = newTemp(Ity_I32);
7596 IRTemp result = newTemp(Ity_I32);
7597
7598 assign(op1, get_gpr_w1(r1));
7599 assign(op2, get_gpr_w1(r2));
7600 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7601 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7602 put_gpr_w1(r1, mkexpr(result));
7603
7604 return "slr";
7605}
7606
7607static HChar *
7608s390_irgen_SLGR(UChar r1, UChar r2)
7609{
7610 IRTemp op1 = newTemp(Ity_I64);
7611 IRTemp op2 = newTemp(Ity_I64);
7612 IRTemp result = newTemp(Ity_I64);
7613
7614 assign(op1, get_gpr_dw0(r1));
7615 assign(op2, get_gpr_dw0(r2));
7616 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7617 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7618 put_gpr_dw0(r1, mkexpr(result));
7619
7620 return "slgr";
7621}
7622
7623static HChar *
7624s390_irgen_SLGFR(UChar r1, UChar r2)
7625{
7626 IRTemp op1 = newTemp(Ity_I64);
7627 IRTemp op2 = newTemp(Ity_I64);
7628 IRTemp result = newTemp(Ity_I64);
7629
7630 assign(op1, get_gpr_dw0(r1));
7631 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7632 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7633 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7634 put_gpr_dw0(r1, mkexpr(result));
7635
7636 return "slgfr";
7637}
7638
7639static HChar *
7640s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7641{
7642 IRTemp op2 = newTemp(Ity_I32);
7643 IRTemp op3 = newTemp(Ity_I32);
7644 IRTemp result = newTemp(Ity_I32);
7645
7646 assign(op2, get_gpr_w1(r2));
7647 assign(op3, get_gpr_w1(r3));
7648 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7649 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7650 put_gpr_w1(r1, mkexpr(result));
7651
7652 return "slrk";
7653}
7654
7655static HChar *
7656s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7657{
7658 IRTemp op2 = newTemp(Ity_I64);
7659 IRTemp op3 = newTemp(Ity_I64);
7660 IRTemp result = newTemp(Ity_I64);
7661
7662 assign(op2, get_gpr_dw0(r2));
7663 assign(op3, get_gpr_dw0(r3));
7664 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7665 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7666 put_gpr_dw0(r1, mkexpr(result));
7667
7668 return "slgrk";
7669}
7670
7671static HChar *
7672s390_irgen_SL(UChar r1, IRTemp op2addr)
7673{
7674 IRTemp op1 = newTemp(Ity_I32);
7675 IRTemp op2 = newTemp(Ity_I32);
7676 IRTemp result = newTemp(Ity_I32);
7677
7678 assign(op1, get_gpr_w1(r1));
7679 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7680 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7681 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7682 put_gpr_w1(r1, mkexpr(result));
7683
7684 return "sl";
7685}
7686
7687static HChar *
7688s390_irgen_SLY(UChar r1, IRTemp op2addr)
7689{
7690 IRTemp op1 = newTemp(Ity_I32);
7691 IRTemp op2 = newTemp(Ity_I32);
7692 IRTemp result = newTemp(Ity_I32);
7693
7694 assign(op1, get_gpr_w1(r1));
7695 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7696 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7697 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7698 put_gpr_w1(r1, mkexpr(result));
7699
7700 return "sly";
7701}
7702
7703static HChar *
7704s390_irgen_SLG(UChar r1, IRTemp op2addr)
7705{
7706 IRTemp op1 = newTemp(Ity_I64);
7707 IRTemp op2 = newTemp(Ity_I64);
7708 IRTemp result = newTemp(Ity_I64);
7709
7710 assign(op1, get_gpr_dw0(r1));
7711 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7712 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7713 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7714 put_gpr_dw0(r1, mkexpr(result));
7715
7716 return "slg";
7717}
7718
7719static HChar *
7720s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7721{
7722 IRTemp op1 = newTemp(Ity_I64);
7723 IRTemp op2 = newTemp(Ity_I64);
7724 IRTemp result = newTemp(Ity_I64);
7725
7726 assign(op1, get_gpr_dw0(r1));
7727 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7728 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7729 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7730 put_gpr_dw0(r1, mkexpr(result));
7731
7732 return "slgf";
7733}
7734
7735static HChar *
7736s390_irgen_SLFI(UChar r1, UInt i2)
7737{
7738 IRTemp op1 = newTemp(Ity_I32);
7739 UInt op2;
7740 IRTemp result = newTemp(Ity_I32);
7741
7742 assign(op1, get_gpr_w1(r1));
7743 op2 = i2;
7744 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7745 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7746 mkU32(op2)));
7747 put_gpr_w1(r1, mkexpr(result));
7748
7749 return "slfi";
7750}
7751
7752static HChar *
7753s390_irgen_SLGFI(UChar r1, UInt i2)
7754{
7755 IRTemp op1 = newTemp(Ity_I64);
7756 ULong op2;
7757 IRTemp result = newTemp(Ity_I64);
7758
7759 assign(op1, get_gpr_dw0(r1));
7760 op2 = (ULong)i2;
7761 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7762 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7763 mkU64(op2)));
7764 put_gpr_dw0(r1, mkexpr(result));
7765
7766 return "slgfi";
7767}
7768
7769static HChar *
7770s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7771{
7772 IRTemp op2 = newTemp(Ity_I32);
7773 IRTemp op3 = newTemp(Ity_I32);
7774 IRTemp result = newTemp(Ity_I32);
7775
7776 assign(op2, get_gpr_w0(r1));
7777 assign(op3, get_gpr_w0(r2));
7778 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7779 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7780 put_gpr_w0(r1, mkexpr(result));
7781
7782 return "slhhhr";
7783}
7784
7785static HChar *
7786s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7787{
7788 IRTemp op2 = newTemp(Ity_I32);
7789 IRTemp op3 = newTemp(Ity_I32);
7790 IRTemp result = newTemp(Ity_I32);
7791
7792 assign(op2, get_gpr_w0(r1));
7793 assign(op3, get_gpr_w1(r2));
7794 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7795 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7796 put_gpr_w0(r1, mkexpr(result));
7797
7798 return "slhhlr";
7799}
7800
7801static HChar *
7802s390_irgen_SLBR(UChar r1, UChar r2)
7803{
7804 IRTemp op1 = newTemp(Ity_I32);
7805 IRTemp op2 = newTemp(Ity_I32);
7806 IRTemp result = newTemp(Ity_I32);
7807 IRTemp borrow_in = newTemp(Ity_I32);
7808
7809 assign(op1, get_gpr_w1(r1));
7810 assign(op2, get_gpr_w1(r2));
7811 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7812 s390_call_calculate_cc(), mkU8(1))));
7813 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7814 mkexpr(borrow_in)));
7815 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7816 put_gpr_w1(r1, mkexpr(result));
7817
7818 return "slbr";
7819}
7820
7821static HChar *
7822s390_irgen_SLBGR(UChar r1, UChar r2)
7823{
7824 IRTemp op1 = newTemp(Ity_I64);
7825 IRTemp op2 = newTemp(Ity_I64);
7826 IRTemp result = newTemp(Ity_I64);
7827 IRTemp borrow_in = newTemp(Ity_I64);
7828
7829 assign(op1, get_gpr_dw0(r1));
7830 assign(op2, get_gpr_dw0(r2));
7831 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7832 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7833 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7834 mkexpr(borrow_in)));
7835 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7836 put_gpr_dw0(r1, mkexpr(result));
7837
7838 return "slbgr";
7839}
7840
7841static HChar *
7842s390_irgen_SLB(UChar r1, IRTemp op2addr)
7843{
7844 IRTemp op1 = newTemp(Ity_I32);
7845 IRTemp op2 = newTemp(Ity_I32);
7846 IRTemp result = newTemp(Ity_I32);
7847 IRTemp borrow_in = newTemp(Ity_I32);
7848
7849 assign(op1, get_gpr_w1(r1));
7850 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7851 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7852 s390_call_calculate_cc(), mkU8(1))));
7853 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7854 mkexpr(borrow_in)));
7855 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7856 put_gpr_w1(r1, mkexpr(result));
7857
7858 return "slb";
7859}
7860
7861static HChar *
7862s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7863{
7864 IRTemp op1 = newTemp(Ity_I64);
7865 IRTemp op2 = newTemp(Ity_I64);
7866 IRTemp result = newTemp(Ity_I64);
7867 IRTemp borrow_in = newTemp(Ity_I64);
7868
7869 assign(op1, get_gpr_dw0(r1));
7870 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7871 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7872 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7873 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7874 mkexpr(borrow_in)));
7875 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7876 put_gpr_dw0(r1, mkexpr(result));
7877
7878 return "slbg";
7879}
7880
7881static HChar *
7882s390_irgen_SVC(UChar i)
7883{
7884 IRTemp sysno = newTemp(Ity_I64);
7885
7886 if (i != 0) {
7887 assign(sysno, mkU64(i));
7888 } else {
7889 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7890 }
7891 system_call(mkexpr(sysno));
7892
7893 return "svc";
7894}
7895
7896static HChar *
sewardj2019a972011-03-07 16:04:07 +00007897s390_irgen_TM(UChar i2, IRTemp op1addr)
7898{
7899 UChar mask;
7900 IRTemp value = newTemp(Ity_I8);
7901
7902 mask = i2;
7903 assign(value, load(Ity_I8, mkexpr(op1addr)));
7904 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7905 mkU8(mask)));
7906
7907 return "tm";
7908}
7909
7910static HChar *
7911s390_irgen_TMY(UChar i2, IRTemp op1addr)
7912{
7913 UChar mask;
7914 IRTemp value = newTemp(Ity_I8);
7915
7916 mask = i2;
7917 assign(value, load(Ity_I8, mkexpr(op1addr)));
7918 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7919 mkU8(mask)));
7920
7921 return "tmy";
7922}
7923
7924static HChar *
7925s390_irgen_TMHH(UChar r1, UShort i2)
7926{
7927 UShort mask;
7928 IRTemp value = newTemp(Ity_I16);
7929
7930 mask = i2;
7931 assign(value, get_gpr_hw0(r1));
7932 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7933 mkU16(mask)));
7934
7935 return "tmhh";
7936}
7937
7938static HChar *
7939s390_irgen_TMHL(UChar r1, UShort i2)
7940{
7941 UShort mask;
7942 IRTemp value = newTemp(Ity_I16);
7943
7944 mask = i2;
7945 assign(value, get_gpr_hw1(r1));
7946 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7947 mkU16(mask)));
7948
7949 return "tmhl";
7950}
7951
7952static HChar *
7953s390_irgen_TMLH(UChar r1, UShort i2)
7954{
7955 UShort mask;
7956 IRTemp value = newTemp(Ity_I16);
7957
7958 mask = i2;
7959 assign(value, get_gpr_hw2(r1));
7960 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7961 mkU16(mask)));
7962
7963 return "tmlh";
7964}
7965
7966static HChar *
7967s390_irgen_TMLL(UChar r1, UShort i2)
7968{
7969 UShort mask;
7970 IRTemp value = newTemp(Ity_I16);
7971
7972 mask = i2;
7973 assign(value, get_gpr_hw3(r1));
7974 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7975 mkU16(mask)));
7976
7977 return "tmll";
7978}
7979
7980static HChar *
7981s390_irgen_EFPC(UChar r1)
7982{
7983 put_gpr_w1(r1, get_fpc_w0());
7984
7985 return "efpc";
7986}
7987
7988static HChar *
7989s390_irgen_LER(UChar r1, UChar r2)
7990{
7991 put_fpr_w0(r1, get_fpr_w0(r2));
7992
7993 return "ler";
7994}
7995
7996static HChar *
7997s390_irgen_LDR(UChar r1, UChar r2)
7998{
7999 put_fpr_dw0(r1, get_fpr_dw0(r2));
8000
8001 return "ldr";
8002}
8003
8004static HChar *
8005s390_irgen_LXR(UChar r1, UChar r2)
8006{
8007 put_fpr_dw0(r1, get_fpr_dw0(r2));
8008 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
8009
8010 return "lxr";
8011}
8012
8013static HChar *
8014s390_irgen_LE(UChar r1, IRTemp op2addr)
8015{
8016 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8017
8018 return "le";
8019}
8020
8021static HChar *
8022s390_irgen_LD(UChar r1, IRTemp op2addr)
8023{
8024 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8025
8026 return "ld";
8027}
8028
8029static HChar *
8030s390_irgen_LEY(UChar r1, IRTemp op2addr)
8031{
8032 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8033
8034 return "ley";
8035}
8036
8037static HChar *
8038s390_irgen_LDY(UChar r1, IRTemp op2addr)
8039{
8040 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8041
8042 return "ldy";
8043}
8044
8045static HChar *
8046s390_irgen_LFPC(IRTemp op2addr)
8047{
8048 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8049
8050 return "lfpc";
8051}
8052
8053static HChar *
8054s390_irgen_LZER(UChar r1)
8055{
8056 put_fpr_w0(r1, mkF32i(0x0));
8057
8058 return "lzer";
8059}
8060
8061static HChar *
8062s390_irgen_LZDR(UChar r1)
8063{
8064 put_fpr_dw0(r1, mkF64i(0x0));
8065
8066 return "lzdr";
8067}
8068
8069static HChar *
8070s390_irgen_LZXR(UChar r1)
8071{
8072 put_fpr_dw0(r1, mkF64i(0x0));
8073 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8074
8075 return "lzxr";
8076}
8077
8078static HChar *
8079s390_irgen_SRNM(IRTemp op2addr)
8080{
8081 UInt mask;
8082
8083 mask = 3;
8084 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8085 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8086 );
8087
8088 return "srnm";
8089}
8090
8091static HChar *
8092s390_irgen_SFPC(UChar r1)
8093{
8094 put_fpc_w0(get_gpr_w1(r1));
8095
8096 return "sfpc";
8097}
8098
8099static HChar *
8100s390_irgen_STE(UChar r1, IRTemp op2addr)
8101{
8102 store(mkexpr(op2addr), get_fpr_w0(r1));
8103
8104 return "ste";
8105}
8106
8107static HChar *
8108s390_irgen_STD(UChar r1, IRTemp op2addr)
8109{
8110 store(mkexpr(op2addr), get_fpr_dw0(r1));
8111
8112 return "std";
8113}
8114
8115static HChar *
8116s390_irgen_STEY(UChar r1, IRTemp op2addr)
8117{
8118 store(mkexpr(op2addr), get_fpr_w0(r1));
8119
8120 return "stey";
8121}
8122
8123static HChar *
8124s390_irgen_STDY(UChar r1, IRTemp op2addr)
8125{
8126 store(mkexpr(op2addr), get_fpr_dw0(r1));
8127
8128 return "stdy";
8129}
8130
8131static HChar *
8132s390_irgen_STFPC(IRTemp op2addr)
8133{
8134 store(mkexpr(op2addr), get_fpc_w0());
8135
8136 return "stfpc";
8137}
8138
8139static HChar *
8140s390_irgen_AEBR(UChar r1, UChar r2)
8141{
8142 IRTemp op1 = newTemp(Ity_F32);
8143 IRTemp op2 = newTemp(Ity_F32);
8144 IRTemp result = newTemp(Ity_F32);
8145
8146 assign(op1, get_fpr_w0(r1));
8147 assign(op2, get_fpr_w0(r2));
8148 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8149 mkexpr(op2)));
8150 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8151 put_fpr_w0(r1, mkexpr(result));
8152
8153 return "aebr";
8154}
8155
8156static HChar *
8157s390_irgen_ADBR(UChar r1, UChar r2)
8158{
8159 IRTemp op1 = newTemp(Ity_F64);
8160 IRTemp op2 = newTemp(Ity_F64);
8161 IRTemp result = newTemp(Ity_F64);
8162
8163 assign(op1, get_fpr_dw0(r1));
8164 assign(op2, get_fpr_dw0(r2));
8165 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8166 mkexpr(op2)));
8167 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8168 put_fpr_dw0(r1, mkexpr(result));
8169
8170 return "adbr";
8171}
8172
8173static HChar *
8174s390_irgen_AEB(UChar r1, IRTemp op2addr)
8175{
8176 IRTemp op1 = newTemp(Ity_F32);
8177 IRTemp op2 = newTemp(Ity_F32);
8178 IRTemp result = newTemp(Ity_F32);
8179
8180 assign(op1, get_fpr_w0(r1));
8181 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8182 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8183 mkexpr(op2)));
8184 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8185 put_fpr_w0(r1, mkexpr(result));
8186
8187 return "aeb";
8188}
8189
8190static HChar *
8191s390_irgen_ADB(UChar r1, IRTemp op2addr)
8192{
8193 IRTemp op1 = newTemp(Ity_F64);
8194 IRTemp op2 = newTemp(Ity_F64);
8195 IRTemp result = newTemp(Ity_F64);
8196
8197 assign(op1, get_fpr_dw0(r1));
8198 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8199 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8200 mkexpr(op2)));
8201 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8202 put_fpr_dw0(r1, mkexpr(result));
8203
8204 return "adb";
8205}
8206
8207static HChar *
8208s390_irgen_CEFBR(UChar r1, UChar r2)
8209{
8210 IRTemp op2 = newTemp(Ity_I32);
8211
8212 assign(op2, get_gpr_w1(r2));
8213 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8214
8215 return "cefbr";
8216}
8217
8218static HChar *
8219s390_irgen_CDFBR(UChar r1, UChar r2)
8220{
8221 IRTemp op2 = newTemp(Ity_I32);
8222
8223 assign(op2, get_gpr_w1(r2));
8224 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8225
8226 return "cdfbr";
8227}
8228
8229static HChar *
8230s390_irgen_CEGBR(UChar r1, UChar r2)
8231{
8232 IRTemp op2 = newTemp(Ity_I64);
8233
8234 assign(op2, get_gpr_dw0(r2));
8235 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8236
8237 return "cegbr";
8238}
8239
8240static HChar *
8241s390_irgen_CDGBR(UChar r1, UChar r2)
8242{
8243 IRTemp op2 = newTemp(Ity_I64);
8244
8245 assign(op2, get_gpr_dw0(r2));
8246 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8247
8248 return "cdgbr";
8249}
8250
8251static HChar *
8252s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8253{
8254 IRTemp op = newTemp(Ity_F32);
8255 IRTemp result = newTemp(Ity_I32);
8256
8257 assign(op, get_fpr_w0(r2));
8258 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8259 mkexpr(op)));
8260 put_gpr_w1(r1, mkexpr(result));
8261 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8262
8263 return "cfebr";
8264}
8265
8266static HChar *
8267s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8268{
8269 IRTemp op = newTemp(Ity_F64);
8270 IRTemp result = newTemp(Ity_I32);
8271
8272 assign(op, get_fpr_dw0(r2));
8273 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8274 mkexpr(op)));
8275 put_gpr_w1(r1, mkexpr(result));
8276 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8277
8278 return "cfdbr";
8279}
8280
8281static HChar *
8282s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8283{
8284 IRTemp op = newTemp(Ity_F32);
8285 IRTemp result = newTemp(Ity_I64);
8286
8287 assign(op, get_fpr_w0(r2));
8288 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8289 mkexpr(op)));
8290 put_gpr_dw0(r1, mkexpr(result));
8291 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8292
8293 return "cgebr";
8294}
8295
8296static HChar *
8297s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8298{
8299 IRTemp op = newTemp(Ity_F64);
8300 IRTemp result = newTemp(Ity_I64);
8301
8302 assign(op, get_fpr_dw0(r2));
8303 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8304 mkexpr(op)));
8305 put_gpr_dw0(r1, mkexpr(result));
8306 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8307
8308 return "cgdbr";
8309}
8310
8311static HChar *
8312s390_irgen_DEBR(UChar r1, UChar r2)
8313{
8314 IRTemp op1 = newTemp(Ity_F32);
8315 IRTemp op2 = newTemp(Ity_F32);
8316 IRTemp result = newTemp(Ity_F32);
8317
8318 assign(op1, get_fpr_w0(r1));
8319 assign(op2, get_fpr_w0(r2));
8320 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8321 mkexpr(op2)));
8322 put_fpr_w0(r1, mkexpr(result));
8323
8324 return "debr";
8325}
8326
8327static HChar *
8328s390_irgen_DDBR(UChar r1, UChar r2)
8329{
8330 IRTemp op1 = newTemp(Ity_F64);
8331 IRTemp op2 = newTemp(Ity_F64);
8332 IRTemp result = newTemp(Ity_F64);
8333
8334 assign(op1, get_fpr_dw0(r1));
8335 assign(op2, get_fpr_dw0(r2));
8336 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8337 mkexpr(op2)));
8338 put_fpr_dw0(r1, mkexpr(result));
8339
8340 return "ddbr";
8341}
8342
8343static HChar *
8344s390_irgen_DEB(UChar r1, IRTemp op2addr)
8345{
8346 IRTemp op1 = newTemp(Ity_F32);
8347 IRTemp op2 = newTemp(Ity_F32);
8348 IRTemp result = newTemp(Ity_F32);
8349
8350 assign(op1, get_fpr_w0(r1));
8351 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8352 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8353 mkexpr(op2)));
8354 put_fpr_w0(r1, mkexpr(result));
8355
8356 return "deb";
8357}
8358
8359static HChar *
8360s390_irgen_DDB(UChar r1, IRTemp op2addr)
8361{
8362 IRTemp op1 = newTemp(Ity_F64);
8363 IRTemp op2 = newTemp(Ity_F64);
8364 IRTemp result = newTemp(Ity_F64);
8365
8366 assign(op1, get_fpr_dw0(r1));
8367 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8368 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8369 mkexpr(op2)));
8370 put_fpr_dw0(r1, mkexpr(result));
8371
8372 return "ddb";
8373}
8374
8375static HChar *
8376s390_irgen_LTEBR(UChar r1, UChar r2)
8377{
8378 IRTemp result = newTemp(Ity_F32);
8379
8380 assign(result, get_fpr_w0(r2));
8381 put_fpr_w0(r1, mkexpr(result));
8382 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8383
8384 return "ltebr";
8385}
8386
8387static HChar *
8388s390_irgen_LTDBR(UChar r1, UChar r2)
8389{
8390 IRTemp result = newTemp(Ity_F64);
8391
8392 assign(result, get_fpr_dw0(r2));
8393 put_fpr_dw0(r1, mkexpr(result));
8394 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8395
8396 return "ltdbr";
8397}
8398
8399static HChar *
8400s390_irgen_LCEBR(UChar r1, UChar r2)
8401{
8402 IRTemp result = newTemp(Ity_F32);
8403
8404 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8405 put_fpr_w0(r1, mkexpr(result));
8406 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8407
8408 return "lcebr";
8409}
8410
8411static HChar *
8412s390_irgen_LCDBR(UChar r1, UChar r2)
8413{
8414 IRTemp result = newTemp(Ity_F64);
8415
8416 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8417 put_fpr_dw0(r1, mkexpr(result));
8418 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8419
8420 return "lcdbr";
8421}
8422
8423static HChar *
8424s390_irgen_LDEBR(UChar r1, UChar r2)
8425{
8426 IRTemp op = newTemp(Ity_F32);
8427
8428 assign(op, get_fpr_w0(r2));
8429 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8430
8431 return "ldebr";
8432}
8433
8434static HChar *
8435s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8436{
8437 IRTemp op = newTemp(Ity_F32);
8438
8439 assign(op, load(Ity_F32, mkexpr(op2addr)));
8440 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8441
8442 return "ldeb";
8443}
8444
8445static HChar *
8446s390_irgen_LEDBR(UChar r1, UChar r2)
8447{
8448 IRTemp op = newTemp(Ity_F64);
8449
8450 assign(op, get_fpr_dw0(r2));
8451 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8452
8453 return "ledbr";
8454}
8455
8456static HChar *
8457s390_irgen_MEEBR(UChar r1, UChar r2)
8458{
8459 IRTemp op1 = newTemp(Ity_F32);
8460 IRTemp op2 = newTemp(Ity_F32);
8461 IRTemp result = newTemp(Ity_F32);
8462
8463 assign(op1, get_fpr_w0(r1));
8464 assign(op2, get_fpr_w0(r2));
8465 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8466 mkexpr(op2)));
8467 put_fpr_w0(r1, mkexpr(result));
8468
8469 return "meebr";
8470}
8471
8472static HChar *
8473s390_irgen_MDBR(UChar r1, UChar r2)
8474{
8475 IRTemp op1 = newTemp(Ity_F64);
8476 IRTemp op2 = newTemp(Ity_F64);
8477 IRTemp result = newTemp(Ity_F64);
8478
8479 assign(op1, get_fpr_dw0(r1));
8480 assign(op2, get_fpr_dw0(r2));
8481 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8482 mkexpr(op2)));
8483 put_fpr_dw0(r1, mkexpr(result));
8484
8485 return "mdbr";
8486}
8487
8488static HChar *
8489s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8490{
8491 IRTemp op1 = newTemp(Ity_F32);
8492 IRTemp op2 = newTemp(Ity_F32);
8493 IRTemp result = newTemp(Ity_F32);
8494
8495 assign(op1, get_fpr_w0(r1));
8496 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8497 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8498 mkexpr(op2)));
8499 put_fpr_w0(r1, mkexpr(result));
8500
8501 return "meeb";
8502}
8503
8504static HChar *
8505s390_irgen_MDB(UChar r1, IRTemp op2addr)
8506{
8507 IRTemp op1 = newTemp(Ity_F64);
8508 IRTemp op2 = newTemp(Ity_F64);
8509 IRTemp result = newTemp(Ity_F64);
8510
8511 assign(op1, get_fpr_dw0(r1));
8512 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8513 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8514 mkexpr(op2)));
8515 put_fpr_dw0(r1, mkexpr(result));
8516
8517 return "mdb";
8518}
8519
8520static HChar *
8521s390_irgen_SEBR(UChar r1, UChar r2)
8522{
8523 IRTemp op1 = newTemp(Ity_F32);
8524 IRTemp op2 = newTemp(Ity_F32);
8525 IRTemp result = newTemp(Ity_F32);
8526
8527 assign(op1, get_fpr_w0(r1));
8528 assign(op2, get_fpr_w0(r2));
8529 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8530 mkexpr(op2)));
8531 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8532 put_fpr_w0(r1, mkexpr(result));
8533
8534 return "sebr";
8535}
8536
8537static HChar *
8538s390_irgen_SDBR(UChar r1, UChar r2)
8539{
8540 IRTemp op1 = newTemp(Ity_F64);
8541 IRTemp op2 = newTemp(Ity_F64);
8542 IRTemp result = newTemp(Ity_F64);
8543
8544 assign(op1, get_fpr_dw0(r1));
8545 assign(op2, get_fpr_dw0(r2));
8546 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8547 mkexpr(op2)));
8548 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8549 put_fpr_dw0(r1, mkexpr(result));
8550
8551 return "sdbr";
8552}
8553
8554static HChar *
8555s390_irgen_SEB(UChar r1, IRTemp op2addr)
8556{
8557 IRTemp op1 = newTemp(Ity_F32);
8558 IRTemp op2 = newTemp(Ity_F32);
8559 IRTemp result = newTemp(Ity_F32);
8560
8561 assign(op1, get_fpr_w0(r1));
8562 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8563 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8564 mkexpr(op2)));
8565 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8566 put_fpr_w0(r1, mkexpr(result));
8567
8568 return "seb";
8569}
8570
8571static HChar *
8572s390_irgen_SDB(UChar r1, IRTemp op2addr)
8573{
8574 IRTemp op1 = newTemp(Ity_F64);
8575 IRTemp op2 = newTemp(Ity_F64);
8576 IRTemp result = newTemp(Ity_F64);
8577
8578 assign(op1, get_fpr_dw0(r1));
8579 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8580 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8581 mkexpr(op2)));
8582 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8583 put_fpr_dw0(r1, mkexpr(result));
8584
8585 return "sdb";
8586}
8587
8588
8589static HChar *
8590s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8591{
8592 IRTemp current1 = newTemp(Ity_I8);
8593 IRTemp current2 = newTemp(Ity_I8);
8594 IRTemp counter = newTemp(Ity_I64);
8595
8596 assign(counter, get_counter_dw0());
8597 put_counter_dw0(mkU64(0));
8598
8599 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8600 mkexpr(counter))));
8601 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8602 mkexpr(counter))));
8603 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8604 False);
8605
8606 /* Both fields differ ? */
8607 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8608 guest_IA_next_instr);
8609
8610 /* Check for end of field */
8611 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8612 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8613 guest_IA_curr_instr);
8614 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00008615 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008616
8617 return "clc";
8618}
8619
8620static HChar *
florianb0c9a132011-09-08 15:37:39 +00008621s390_irgen_CLCL(UChar r1, UChar r2)
8622{
8623 IRTemp addr1 = newTemp(Ity_I64);
8624 IRTemp addr2 = newTemp(Ity_I64);
8625 IRTemp addr1_load = newTemp(Ity_I64);
8626 IRTemp addr2_load = newTemp(Ity_I64);
8627 IRTemp len1 = newTemp(Ity_I32);
8628 IRTemp len2 = newTemp(Ity_I32);
8629 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8630 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8631 IRTemp single1 = newTemp(Ity_I8);
8632 IRTemp single2 = newTemp(Ity_I8);
8633 IRTemp pad = newTemp(Ity_I8);
8634
8635 assign(addr1, get_gpr_dw0(r1));
8636 assign(r1p1, get_gpr_w1(r1 + 1));
8637 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8638 assign(addr2, get_gpr_dw0(r2));
8639 assign(r2p1, get_gpr_w1(r2 + 1));
8640 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8641 assign(pad, get_gpr_b4(r2 + 1));
8642
8643 /* len1 == 0 and len2 == 0? Exit */
8644 s390_cc_set(0);
8645 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8646 mkexpr(len2)), mkU32(0)),
8647 guest_IA_next_instr);
8648
8649 /* Because mkite evaluates both the then-clause and the else-clause
8650 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8651 may be NULL and loading from there would segfault. So we provide a
8652 valid dummy address in that case. Loading from there does no harm and
8653 the value will be discarded at runtime. */
8654 assign(addr1_load,
8655 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8656 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8657 assign(single1,
8658 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8659 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8660
8661 assign(addr2_load,
8662 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8663 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8664 assign(single2,
8665 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8666 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8667
8668 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8669 /* Fields differ ? */
8670 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8671 guest_IA_next_instr);
8672
8673 /* Update len1 and addr1, unless len1 == 0. */
8674 put_gpr_dw0(r1,
8675 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8676 mkexpr(addr1),
8677 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8678
8679 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8680 put_gpr_w1(r1 + 1,
8681 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8682 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8683 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8684
8685 /* Update len2 and addr2, unless len2 == 0. */
8686 put_gpr_dw0(r2,
8687 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8688 mkexpr(addr2),
8689 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8690
8691 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8692 put_gpr_w1(r2 + 1,
8693 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8694 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8695 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8696
8697 always_goto_and_chase(guest_IA_curr_instr);
8698
8699 return "clcl";
8700}
8701
8702static HChar *
sewardj2019a972011-03-07 16:04:07 +00008703s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8704{
8705 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8706
8707 addr1 = newTemp(Ity_I64);
8708 addr3 = newTemp(Ity_I64);
8709 addr1_load = newTemp(Ity_I64);
8710 addr3_load = newTemp(Ity_I64);
8711 len1 = newTemp(Ity_I64);
8712 len3 = newTemp(Ity_I64);
8713 single1 = newTemp(Ity_I8);
8714 single3 = newTemp(Ity_I8);
8715
8716 assign(addr1, get_gpr_dw0(r1));
8717 assign(len1, get_gpr_dw0(r1 + 1));
8718 assign(addr3, get_gpr_dw0(r3));
8719 assign(len3, get_gpr_dw0(r3 + 1));
8720
8721 /* len1 == 0 and len3 == 0? Exit */
8722 s390_cc_set(0);
8723 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8724 mkexpr(len3)), mkU64(0)),
8725 guest_IA_next_instr);
8726
8727 /* A mux requires both ways to be possible. This is a way to prevent clcle
8728 from reading from addr1 if it should read from the pad. Since the pad
8729 has no address, just read from the instruction, we discard that anyway */
8730 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008731 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8732 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008733
8734 /* same for addr3 */
8735 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008736 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8737 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008738
8739 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008740 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8741 unop(Iop_64to8, mkexpr(pad2)),
8742 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008743
8744 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008745 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8746 unop(Iop_64to8, mkexpr(pad2)),
8747 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008748
8749 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8750 /* Both fields differ ? */
8751 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8752 guest_IA_next_instr);
8753
8754 /* If a length in 0 we must not change this length and the address */
8755 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008756 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8757 mkexpr(addr1),
8758 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008759
8760 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008761 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8762 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008763
8764 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008765 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8766 mkexpr(addr3),
8767 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008768
8769 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008770 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8771 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008772
8773 /* The architecture requires that we exit with CC3 after a machine specific
8774 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8775 s390_cc_set(3);
8776 if_condition_goto(binop(Iop_CmpEQ64,
8777 binop(Iop_And64,
8778 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8779 mkU64(0xfff)),
8780 mkU64(0)),
8781 guest_IA_next_instr);
8782
floriana64c2432011-07-16 02:11:50 +00008783 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008784
8785 return "clcle";
8786}
floriana64c2432011-07-16 02:11:50 +00008787
florianb0bf6602012-05-05 00:01:16 +00008788
sewardj2019a972011-03-07 16:04:07 +00008789static void
8790s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8791{
florianb0bf6602012-05-05 00:01:16 +00008792 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
8793}
sewardj2019a972011-03-07 16:04:07 +00008794
sewardj2019a972011-03-07 16:04:07 +00008795
florianb0bf6602012-05-05 00:01:16 +00008796static void
8797s390_irgen_NC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8798{
8799 s390_irgen_xonc(Iop_And8, length, start1, start2);
8800}
sewardj2019a972011-03-07 16:04:07 +00008801
sewardj2019a972011-03-07 16:04:07 +00008802
florianb0bf6602012-05-05 00:01:16 +00008803static void
8804s390_irgen_OC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8805{
8806 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00008807}
8808
8809
8810static void
8811s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8812{
8813 IRTemp current1 = newTemp(Ity_I8);
8814 IRTemp current2 = newTemp(Ity_I8);
8815 IRTemp counter = newTemp(Ity_I64);
8816
8817 assign(counter, get_counter_dw0());
8818 put_counter_dw0(mkU64(0));
8819
8820 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8821 mkexpr(counter))));
8822 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8823 mkexpr(counter))));
8824 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8825 False);
8826
8827 /* Both fields differ ? */
8828 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8829 guest_IA_next_instr);
8830
8831 /* Check for end of field */
8832 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8833 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8834 guest_IA_curr_instr);
8835 put_counter_dw0(mkU64(0));
8836}
8837
8838static void
8839s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8840{
8841 IRTemp counter = newTemp(Ity_I64);
8842
8843 assign(counter, get_counter_dw0());
8844
8845 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8846 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8847
8848 /* Check for end of field */
8849 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8850 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8851 guest_IA_curr_instr);
8852 put_counter_dw0(mkU64(0));
8853}
8854
8855
8856
8857static void
8858s390_irgen_EX_SS(UChar r, IRTemp addr2,
8859void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8860{
8861 struct SS {
8862 unsigned int op : 8;
8863 unsigned int l : 8;
8864 unsigned int b1 : 4;
8865 unsigned int d1 : 12;
8866 unsigned int b2 : 4;
8867 unsigned int d2 : 12;
8868 };
8869 union {
8870 struct SS dec;
8871 unsigned long bytes;
8872 } ss;
8873 IRTemp cond;
8874 IRDirty *d;
8875 IRTemp torun;
8876
8877 IRTemp start1 = newTemp(Ity_I64);
8878 IRTemp start2 = newTemp(Ity_I64);
8879 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8880 cond = newTemp(Ity_I1);
8881 torun = newTemp(Ity_I64);
8882
8883 assign(torun, load(Ity_I64, mkexpr(addr2)));
8884 /* Start with a check that the saved code is still correct */
8885 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8886 /* If not, save the new value */
8887 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8888 mkIRExprVec_1(mkexpr(torun)));
8889 d->guard = mkexpr(cond);
8890 stmt(IRStmt_Dirty(d));
8891
8892 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008893 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8894 mkU64(guest_IA_curr_instr)));
8895 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008896 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8897 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008898
8899 ss.bytes = last_execute_target;
8900 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8901 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8902 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8903 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8904 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8905 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8906 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008907 dummy_put_IA();
8908
sewardj2019a972011-03-07 16:04:07 +00008909 last_execute_target = 0;
8910}
8911
8912static HChar *
8913s390_irgen_EX(UChar r1, IRTemp addr2)
8914{
8915 switch(last_execute_target & 0xff00000000000000ULL) {
8916 case 0:
8917 {
8918 /* no code information yet */
8919 IRDirty *d;
8920
8921 /* so safe the code... */
8922 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8923 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8924 stmt(IRStmt_Dirty(d));
8925 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008926 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8927 mkU64(guest_IA_curr_instr)));
8928 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008929 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8930 IRConst_U64(guest_IA_curr_instr),
8931 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008932 /* we know that this will be invalidated */
florianf9e1ed72012-04-17 02:41:56 +00008933 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +00008934 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +00008935 dis_res->jk_StopHere = Ijk_TInval;
sewardj2019a972011-03-07 16:04:07 +00008936 break;
8937 }
8938
8939 case 0xd200000000000000ULL:
8940 /* special case MVC */
8941 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8942 return "mvc via ex";
8943
8944 case 0xd500000000000000ULL:
8945 /* special case CLC */
8946 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8947 return "clc via ex";
8948
8949 case 0xd700000000000000ULL:
8950 /* special case XC */
8951 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8952 return "xc via ex";
8953
florianb0bf6602012-05-05 00:01:16 +00008954 case 0xd600000000000000ULL:
8955 /* special case OC */
8956 s390_irgen_EX_SS(r1, addr2, s390_irgen_OC_EX, 32);
8957 return "oc via ex";
8958
8959 case 0xd400000000000000ULL:
8960 /* special case NC */
8961 s390_irgen_EX_SS(r1, addr2, s390_irgen_NC_EX, 32);
8962 return "nc via ex";
sewardj2019a972011-03-07 16:04:07 +00008963
8964 default:
8965 {
8966 /* everything else will get a self checking prefix that also checks the
8967 register content */
8968 IRDirty *d;
8969 UChar *bytes;
8970 IRTemp cond;
8971 IRTemp orperand;
8972 IRTemp torun;
8973
8974 cond = newTemp(Ity_I1);
8975 orperand = newTemp(Ity_I64);
8976 torun = newTemp(Ity_I64);
8977
8978 if (r1 == 0)
8979 assign(orperand, mkU64(0));
8980 else
8981 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8982 /* This code is going to be translated */
8983 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8984 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8985
8986 /* Start with a check that saved code is still correct */
8987 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8988 mkU64(last_execute_target)));
8989 /* If not, save the new value */
8990 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8991 mkIRExprVec_1(mkexpr(torun)));
8992 d->guard = mkexpr(cond);
8993 stmt(IRStmt_Dirty(d));
8994
8995 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008996 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
8997 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008998 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8999 IRConst_U64(guest_IA_curr_instr),
9000 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009001
9002 /* Now comes the actual translation */
9003 bytes = (UChar *) &last_execute_target;
9004 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
9005 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00009006 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00009007 vex_printf(" which was executed by\n");
9008 /* dont make useless translations in the next execute */
9009 last_execute_target = 0;
florianf9e1ed72012-04-17 02:41:56 +00009010 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009011 }
9012 }
9013 return "ex";
9014}
9015
9016static HChar *
9017s390_irgen_EXRL(UChar r1, UInt offset)
9018{
9019 IRTemp addr = newTemp(Ity_I64);
9020 /* we might save one round trip because we know the target */
9021 if (!last_execute_target)
9022 last_execute_target = *(ULong *)(HWord)
9023 (guest_IA_curr_instr + offset * 2UL);
9024 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9025 s390_irgen_EX(r1, addr);
9026 return "exrl";
9027}
9028
9029static HChar *
9030s390_irgen_IPM(UChar r1)
9031{
9032 // As long as we dont support SPM, lets just assume 0 as program mask
9033 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9034 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9035
9036 return "ipm";
9037}
9038
9039
9040static HChar *
9041s390_irgen_SRST(UChar r1, UChar r2)
9042{
9043 IRTemp address = newTemp(Ity_I64);
9044 IRTemp next = newTemp(Ity_I64);
9045 IRTemp delim = newTemp(Ity_I8);
9046 IRTemp counter = newTemp(Ity_I64);
9047 IRTemp byte = newTemp(Ity_I8);
9048
9049 assign(address, get_gpr_dw0(r2));
9050 assign(next, get_gpr_dw0(r1));
9051
9052 assign(counter, get_counter_dw0());
9053 put_counter_dw0(mkU64(0));
9054
9055 // start = next? CC=2 and out r1 and r2 unchanged
9056 s390_cc_set(2);
9057 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9058 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9059 guest_IA_next_instr);
9060
9061 assign(byte, load(Ity_I8, mkexpr(address)));
9062 assign(delim, get_gpr_b7(0));
9063
9064 // byte = delim? CC=1, R1=address
9065 s390_cc_set(1);
9066 put_gpr_dw0(r1, mkexpr(address));
9067 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9068 guest_IA_next_instr);
9069
9070 // else: all equal, no end yet, loop
9071 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9072 put_gpr_dw0(r1, mkexpr(next));
9073 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009074 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9075 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9076 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009077 // >= 256 bytes done CC=3
9078 s390_cc_set(3);
9079 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009080 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009081
9082 return "srst";
9083}
9084
9085static HChar *
9086s390_irgen_CLST(UChar r1, UChar r2)
9087{
9088 IRTemp address1 = newTemp(Ity_I64);
9089 IRTemp address2 = newTemp(Ity_I64);
9090 IRTemp end = newTemp(Ity_I8);
9091 IRTemp counter = newTemp(Ity_I64);
9092 IRTemp byte1 = newTemp(Ity_I8);
9093 IRTemp byte2 = newTemp(Ity_I8);
9094
9095 assign(address1, get_gpr_dw0(r1));
9096 assign(address2, get_gpr_dw0(r2));
9097 assign(end, get_gpr_b7(0));
9098 assign(counter, get_counter_dw0());
9099 put_counter_dw0(mkU64(0));
9100 assign(byte1, load(Ity_I8, mkexpr(address1)));
9101 assign(byte2, load(Ity_I8, mkexpr(address2)));
9102
9103 // end in both? all equal, reset r1 and r2 to start values
9104 s390_cc_set(0);
9105 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9106 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9107 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9108 binop(Iop_Or8,
9109 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9110 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9111 guest_IA_next_instr);
9112
9113 put_gpr_dw0(r1, mkexpr(address1));
9114 put_gpr_dw0(r2, mkexpr(address2));
9115
9116 // End found in string1
9117 s390_cc_set(1);
9118 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9119 guest_IA_next_instr);
9120
9121 // End found in string2
9122 s390_cc_set(2);
9123 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9124 guest_IA_next_instr);
9125
9126 // string1 < string2
9127 s390_cc_set(1);
9128 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9129 unop(Iop_8Uto32, mkexpr(byte2))),
9130 guest_IA_next_instr);
9131
9132 // string2 < string1
9133 s390_cc_set(2);
9134 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9135 unop(Iop_8Uto32, mkexpr(byte1))),
9136 guest_IA_next_instr);
9137
9138 // else: all equal, no end yet, loop
9139 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9140 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9141 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009142 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9143 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9144 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009145 // >= 256 bytes done CC=3
9146 s390_cc_set(3);
9147 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009148 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009149
9150 return "clst";
9151}
9152
9153static void
9154s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9155{
9156 UChar reg;
9157 IRTemp addr = newTemp(Ity_I64);
9158
9159 assign(addr, mkexpr(op2addr));
9160 reg = r1;
9161 do {
9162 IRTemp old = addr;
9163
9164 reg %= 16;
9165 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9166 addr = newTemp(Ity_I64);
9167 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9168 reg++;
9169 } while (reg != (r3 + 1));
9170}
9171
9172static HChar *
9173s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9174{
9175 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9176
9177 return "lm";
9178}
9179
9180static HChar *
9181s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9182{
9183 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9184
9185 return "lmy";
9186}
9187
9188static HChar *
9189s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9190{
9191 UChar reg;
9192 IRTemp addr = newTemp(Ity_I64);
9193
9194 assign(addr, mkexpr(op2addr));
9195 reg = r1;
9196 do {
9197 IRTemp old = addr;
9198
9199 reg %= 16;
9200 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9201 addr = newTemp(Ity_I64);
9202 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9203 reg++;
9204 } while (reg != (r3 + 1));
9205
9206 return "lmh";
9207}
9208
9209static HChar *
9210s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9211{
9212 UChar reg;
9213 IRTemp addr = newTemp(Ity_I64);
9214
9215 assign(addr, mkexpr(op2addr));
9216 reg = r1;
9217 do {
9218 IRTemp old = addr;
9219
9220 reg %= 16;
9221 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9222 addr = newTemp(Ity_I64);
9223 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9224 reg++;
9225 } while (reg != (r3 + 1));
9226
9227 return "lmg";
9228}
9229
9230static void
9231s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9232{
9233 UChar reg;
9234 IRTemp addr = newTemp(Ity_I64);
9235
9236 assign(addr, mkexpr(op2addr));
9237 reg = r1;
9238 do {
9239 IRTemp old = addr;
9240
9241 reg %= 16;
9242 store(mkexpr(addr), get_gpr_w1(reg));
9243 addr = newTemp(Ity_I64);
9244 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9245 reg++;
9246 } while( reg != (r3 + 1));
9247}
9248
9249static HChar *
9250s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9251{
9252 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9253
9254 return "stm";
9255}
9256
9257static HChar *
9258s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9259{
9260 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9261
9262 return "stmy";
9263}
9264
9265static HChar *
9266s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9267{
9268 UChar reg;
9269 IRTemp addr = newTemp(Ity_I64);
9270
9271 assign(addr, mkexpr(op2addr));
9272 reg = r1;
9273 do {
9274 IRTemp old = addr;
9275
9276 reg %= 16;
9277 store(mkexpr(addr), get_gpr_w0(reg));
9278 addr = newTemp(Ity_I64);
9279 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9280 reg++;
9281 } while( reg != (r3 + 1));
9282
9283 return "stmh";
9284}
9285
9286static HChar *
9287s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9288{
9289 UChar reg;
9290 IRTemp addr = newTemp(Ity_I64);
9291
9292 assign(addr, mkexpr(op2addr));
9293 reg = r1;
9294 do {
9295 IRTemp old = addr;
9296
9297 reg %= 16;
9298 store(mkexpr(addr), get_gpr_dw0(reg));
9299 addr = newTemp(Ity_I64);
9300 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9301 reg++;
9302 } while( reg != (r3 + 1));
9303
9304 return "stmg";
9305}
9306
9307static void
florianb0bf6602012-05-05 00:01:16 +00009308s390_irgen_xonc(IROp op, IRTemp length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009309{
9310 IRTemp old1 = newTemp(Ity_I8);
9311 IRTemp old2 = newTemp(Ity_I8);
9312 IRTemp new1 = newTemp(Ity_I8);
9313 IRTemp counter = newTemp(Ity_I32);
9314 IRTemp addr1 = newTemp(Ity_I64);
9315
9316 assign(counter, get_counter_w0());
9317
9318 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9319 unop(Iop_32Uto64, mkexpr(counter))));
9320
9321 assign(old1, load(Ity_I8, mkexpr(addr1)));
9322 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9323 unop(Iop_32Uto64,mkexpr(counter)))));
9324 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9325
9326 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009327 if (op == Iop_Xor8) {
9328 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009329 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9330 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009331 } else
9332 store(mkexpr(addr1), mkexpr(new1));
9333 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9334 get_counter_w1()));
9335
9336 /* Check for end of field */
9337 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
florianb0bf6602012-05-05 00:01:16 +00009338 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
sewardj2019a972011-03-07 16:04:07 +00009339 guest_IA_curr_instr);
9340 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9341 False);
9342 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009343 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009344}
9345
9346static HChar *
9347s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9348{
florianb0bf6602012-05-05 00:01:16 +00009349 IRTemp len = newTemp(Ity_I32);
9350
9351 assign(len, mkU32(length));
9352 s390_irgen_xonc(Iop_Xor8, len, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009353
9354 return "xc";
9355}
9356
sewardjb63967e2011-03-24 08:50:04 +00009357static void
9358s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9359{
9360 IRTemp counter = newTemp(Ity_I32);
9361 IRTemp start = newTemp(Ity_I64);
9362 IRTemp addr = newTemp(Ity_I64);
9363
9364 assign(start,
9365 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9366
9367 if (length < 8) {
9368 UInt i;
9369
9370 for (i = 0; i <= length; ++i) {
9371 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9372 }
9373 } else {
9374 assign(counter, get_counter_w0());
9375
9376 assign(addr, binop(Iop_Add64, mkexpr(start),
9377 unop(Iop_32Uto64, mkexpr(counter))));
9378
9379 store(mkexpr(addr), mkU8(0));
9380
9381 /* Check for end of field */
9382 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9383 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9384 guest_IA_curr_instr);
9385
9386 /* Reset counter */
9387 put_counter_dw0(mkU64(0));
9388 }
9389
9390 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
florianf9e1ed72012-04-17 02:41:56 +00009391 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009392
sewardj7ee97522011-05-09 21:45:04 +00009393 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009394 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9395}
9396
sewardj2019a972011-03-07 16:04:07 +00009397static HChar *
9398s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9399{
florianb0bf6602012-05-05 00:01:16 +00009400 IRTemp len = newTemp(Ity_I32);
9401
9402 assign(len, mkU32(length));
9403 s390_irgen_xonc(Iop_And8, len, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009404
9405 return "nc";
9406}
9407
9408static HChar *
9409s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9410{
florianb0bf6602012-05-05 00:01:16 +00009411 IRTemp len = newTemp(Ity_I32);
9412
9413 assign(len, mkU32(length));
9414 s390_irgen_xonc(Iop_Or8, len, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00009415
9416 return "oc";
9417}
9418
9419
9420static HChar *
9421s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9422{
9423 IRTemp counter = newTemp(Ity_I64);
9424
9425 assign(counter, get_counter_dw0());
9426
9427 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9428 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9429
9430 /* Check for end of field */
9431 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9432 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9433 guest_IA_curr_instr);
9434 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009435 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009436
9437 return "mvc";
9438}
9439
9440static HChar *
florianb0c9a132011-09-08 15:37:39 +00009441s390_irgen_MVCL(UChar r1, UChar r2)
9442{
9443 IRTemp addr1 = newTemp(Ity_I64);
9444 IRTemp addr2 = newTemp(Ity_I64);
9445 IRTemp addr2_load = newTemp(Ity_I64);
9446 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9447 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9448 IRTemp len1 = newTemp(Ity_I32);
9449 IRTemp len2 = newTemp(Ity_I32);
9450 IRTemp pad = newTemp(Ity_I8);
9451 IRTemp single = newTemp(Ity_I8);
9452
9453 assign(addr1, get_gpr_dw0(r1));
9454 assign(r1p1, get_gpr_w1(r1 + 1));
9455 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9456 assign(addr2, get_gpr_dw0(r2));
9457 assign(r2p1, get_gpr_w1(r2 + 1));
9458 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9459 assign(pad, get_gpr_b4(r2 + 1));
9460
9461 /* len1 == 0 ? */
9462 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9463 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9464 guest_IA_next_instr);
9465
9466 /* Check for destructive overlap:
9467 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9468 s390_cc_set(3);
9469 IRTemp cond1 = newTemp(Ity_I32);
9470 assign(cond1, unop(Iop_1Uto32,
9471 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9472 IRTemp cond2 = newTemp(Ity_I32);
9473 assign(cond2, unop(Iop_1Uto32,
9474 binop(Iop_CmpLT64U, mkexpr(addr1),
9475 binop(Iop_Add64, mkexpr(addr2),
9476 unop(Iop_32Uto64, mkexpr(len1))))));
9477 IRTemp cond3 = newTemp(Ity_I32);
9478 assign(cond3, unop(Iop_1Uto32,
9479 binop(Iop_CmpLT64U,
9480 mkexpr(addr1),
9481 binop(Iop_Add64, mkexpr(addr2),
9482 unop(Iop_32Uto64, mkexpr(len2))))));
9483
9484 if_condition_goto(binop(Iop_CmpEQ32,
9485 binop(Iop_And32,
9486 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9487 mkexpr(cond3)),
9488 mkU32(1)),
9489 guest_IA_next_instr);
9490
9491 /* See s390_irgen_CLCL for explanation why we cannot load directly
9492 and need two steps. */
9493 assign(addr2_load,
9494 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9495 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9496 assign(single,
9497 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9498 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9499
9500 store(mkexpr(addr1), mkexpr(single));
9501
9502 /* Update addr1 and len1 */
9503 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9504 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9505
9506 /* Update addr2 and len2 */
9507 put_gpr_dw0(r2,
9508 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9509 mkexpr(addr2),
9510 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9511
9512 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9513 put_gpr_w1(r2 + 1,
9514 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9515 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9516 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9517
9518 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9519 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9520 guest_IA_curr_instr);
9521
9522 return "mvcl";
9523}
9524
9525
9526static HChar *
sewardj2019a972011-03-07 16:04:07 +00009527s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9528{
9529 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9530
9531 addr1 = newTemp(Ity_I64);
9532 addr3 = newTemp(Ity_I64);
9533 addr3_load = newTemp(Ity_I64);
9534 len1 = newTemp(Ity_I64);
9535 len3 = newTemp(Ity_I64);
9536 single = newTemp(Ity_I8);
9537
9538 assign(addr1, get_gpr_dw0(r1));
9539 assign(len1, get_gpr_dw0(r1 + 1));
9540 assign(addr3, get_gpr_dw0(r3));
9541 assign(len3, get_gpr_dw0(r3 + 1));
9542
9543 // len1 == 0 ?
9544 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9545 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9546 guest_IA_next_instr);
9547
9548 /* This is a hack to prevent mvcle from reading from addr3 if it
9549 should read from the pad. Since the pad has no address, just
9550 read from the instruction, we discard that anyway */
9551 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009552 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9553 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009554
9555 assign(single,
florian6ad49522011-09-09 02:38:55 +00009556 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9557 unop(Iop_64to8, mkexpr(pad2)),
9558 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009559 store(mkexpr(addr1), mkexpr(single));
9560
9561 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9562
9563 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9564
9565 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009566 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9567 mkexpr(addr3),
9568 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009569
9570 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009571 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9572 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009573
9574 /* We should set CC=3 (faked by overflow add) and leave after
9575 a maximum of ~4096 bytes have been processed. This is simpler:
9576 we leave whenever (len1 % 4096) == 0 */
9577 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009578 mktemp(Ity_I64, mkU64(-1ULL)), False);
9579 if_condition_goto(binop(Iop_CmpEQ64,
9580 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9581 mkU64(0)),
9582 guest_IA_next_instr);
9583
9584 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9585 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9586 guest_IA_curr_instr);
9587
9588 return "mvcle";
9589}
9590
9591static HChar *
9592s390_irgen_MVST(UChar r1, UChar r2)
9593{
9594 IRTemp addr1 = newTemp(Ity_I64);
9595 IRTemp addr2 = newTemp(Ity_I64);
9596 IRTemp end = newTemp(Ity_I8);
9597 IRTemp byte = newTemp(Ity_I8);
9598 IRTemp counter = newTemp(Ity_I64);
9599
9600 assign(addr1, get_gpr_dw0(r1));
9601 assign(addr2, get_gpr_dw0(r2));
9602 assign(counter, get_counter_dw0());
9603 assign(end, get_gpr_b7(0));
9604 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9605 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9606
9607 // We use unlimited as cpu-determined number
9608 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9609 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9610 guest_IA_curr_instr);
9611
9612 // and always set cc=1 at the end + update r1
9613 s390_cc_set(1);
9614 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9615 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009616 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009617
9618 return "mvst";
9619}
9620
9621static void
9622s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9623{
9624 IRTemp op1 = newTemp(Ity_I64);
9625 IRTemp result = newTemp(Ity_I64);
9626
9627 assign(op1, binop(Iop_32HLto64,
9628 get_gpr_w1(r1), // high 32 bits
9629 get_gpr_w1(r1 + 1))); // low 32 bits
9630 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9631 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9632 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9633}
9634
9635static void
9636s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9637{
9638 IRTemp op1 = newTemp(Ity_I128);
9639 IRTemp result = newTemp(Ity_I128);
9640
9641 assign(op1, binop(Iop_64HLto128,
9642 get_gpr_dw0(r1), // high 64 bits
9643 get_gpr_dw0(r1 + 1))); // low 64 bits
9644 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9645 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9646 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9647}
9648
9649static void
9650s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9651{
9652 IRTemp op1 = newTemp(Ity_I64);
9653 IRTemp result = newTemp(Ity_I128);
9654
9655 assign(op1, get_gpr_dw0(r1 + 1));
9656 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9657 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9658 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9659}
9660
9661static HChar *
9662s390_irgen_DR(UChar r1, UChar r2)
9663{
9664 IRTemp op2 = newTemp(Ity_I32);
9665
9666 assign(op2, get_gpr_w1(r2));
9667
9668 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9669
9670 return "dr";
9671}
9672
9673static HChar *
9674s390_irgen_D(UChar r1, IRTemp op2addr)
9675{
9676 IRTemp op2 = newTemp(Ity_I32);
9677
9678 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9679
9680 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9681
9682 return "d";
9683}
9684
9685static HChar *
9686s390_irgen_DLR(UChar r1, UChar r2)
9687{
9688 IRTemp op2 = newTemp(Ity_I32);
9689
9690 assign(op2, get_gpr_w1(r2));
9691
9692 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9693
9694 return "dr";
9695}
9696
9697static HChar *
9698s390_irgen_DL(UChar r1, IRTemp op2addr)
9699{
9700 IRTemp op2 = newTemp(Ity_I32);
9701
9702 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9703
9704 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9705
9706 return "dl";
9707}
9708
9709static HChar *
9710s390_irgen_DLG(UChar r1, IRTemp op2addr)
9711{
9712 IRTemp op2 = newTemp(Ity_I64);
9713
9714 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9715
9716 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9717
9718 return "dlg";
9719}
9720
9721static HChar *
9722s390_irgen_DLGR(UChar r1, UChar r2)
9723{
9724 IRTemp op2 = newTemp(Ity_I64);
9725
9726 assign(op2, get_gpr_dw0(r2));
9727
9728 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9729
9730 return "dlgr";
9731}
9732
9733static HChar *
9734s390_irgen_DSGR(UChar r1, UChar r2)
9735{
9736 IRTemp op2 = newTemp(Ity_I64);
9737
9738 assign(op2, get_gpr_dw0(r2));
9739
9740 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9741
9742 return "dsgr";
9743}
9744
9745static HChar *
9746s390_irgen_DSG(UChar r1, IRTemp op2addr)
9747{
9748 IRTemp op2 = newTemp(Ity_I64);
9749
9750 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9751
9752 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9753
9754 return "dsg";
9755}
9756
9757static HChar *
9758s390_irgen_DSGFR(UChar r1, UChar r2)
9759{
9760 IRTemp op2 = newTemp(Ity_I64);
9761
9762 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9763
9764 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9765
9766 return "dsgfr";
9767}
9768
9769static HChar *
9770s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9771{
9772 IRTemp op2 = newTemp(Ity_I64);
9773
9774 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9775
9776 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9777
9778 return "dsgf";
9779}
9780
9781static void
9782s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9783{
9784 UChar reg;
9785 IRTemp addr = newTemp(Ity_I64);
9786
9787 assign(addr, mkexpr(op2addr));
9788 reg = r1;
9789 do {
9790 IRTemp old = addr;
9791
9792 reg %= 16;
9793 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9794 addr = newTemp(Ity_I64);
9795 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9796 reg++;
9797 } while (reg != (r3 + 1));
9798}
9799
9800static HChar *
9801s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9802{
9803 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9804
9805 return "lam";
9806}
9807
9808static HChar *
9809s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9810{
9811 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9812
9813 return "lamy";
9814}
9815
9816static void
9817s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9818{
9819 UChar reg;
9820 IRTemp addr = newTemp(Ity_I64);
9821
9822 assign(addr, mkexpr(op2addr));
9823 reg = r1;
9824 do {
9825 IRTemp old = addr;
9826
9827 reg %= 16;
9828 store(mkexpr(addr), get_ar_w0(reg));
9829 addr = newTemp(Ity_I64);
9830 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9831 reg++;
9832 } while (reg != (r3 + 1));
9833}
9834
9835static HChar *
9836s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9837{
9838 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9839
9840 return "stam";
9841}
9842
9843static HChar *
9844s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9845{
9846 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9847
9848 return "stamy";
9849}
9850
9851
9852/* Implementation for 32-bit compare-and-swap */
9853static void
9854s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9855{
9856 IRCAS *cas;
9857 IRTemp op1 = newTemp(Ity_I32);
9858 IRTemp old_mem = newTemp(Ity_I32);
9859 IRTemp op3 = newTemp(Ity_I32);
9860 IRTemp result = newTemp(Ity_I32);
9861 IRTemp nequal = newTemp(Ity_I1);
9862
9863 assign(op1, get_gpr_w1(r1));
9864 assign(op3, get_gpr_w1(r3));
9865
9866 /* The first and second operands are compared. If they are equal,
9867 the third operand is stored at the second- operand location. */
9868 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9869 Iend_BE, mkexpr(op2addr),
9870 NULL, mkexpr(op1), /* expected value */
9871 NULL, mkexpr(op3) /* new value */);
9872 stmt(IRStmt_CAS(cas));
9873
9874 /* Set CC. Operands compared equal -> 0, else 1. */
9875 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9876 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9877
9878 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9879 Otherwise, store the old_value from memory in r1 and yield. */
9880 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9881 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009882 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9883 IRConst_U64(guest_IA_next_instr),
9884 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009885}
9886
9887static HChar *
9888s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9889{
9890 s390_irgen_cas_32(r1, r3, op2addr);
9891
9892 return "cs";
9893}
9894
9895static HChar *
9896s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9897{
9898 s390_irgen_cas_32(r1, r3, op2addr);
9899
9900 return "csy";
9901}
9902
9903static HChar *
9904s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9905{
9906 IRCAS *cas;
9907 IRTemp op1 = newTemp(Ity_I64);
9908 IRTemp old_mem = newTemp(Ity_I64);
9909 IRTemp op3 = newTemp(Ity_I64);
9910 IRTemp result = newTemp(Ity_I64);
9911 IRTemp nequal = newTemp(Ity_I1);
9912
9913 assign(op1, get_gpr_dw0(r1));
9914 assign(op3, get_gpr_dw0(r3));
9915
9916 /* The first and second operands are compared. If they are equal,
9917 the third operand is stored at the second- operand location. */
9918 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9919 Iend_BE, mkexpr(op2addr),
9920 NULL, mkexpr(op1), /* expected value */
9921 NULL, mkexpr(op3) /* new value */);
9922 stmt(IRStmt_CAS(cas));
9923
9924 /* Set CC. Operands compared equal -> 0, else 1. */
9925 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9926 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9927
9928 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9929 Otherwise, store the old_value from memory in r1 and yield. */
9930 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9931 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009932 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9933 IRConst_U64(guest_IA_next_instr),
9934 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009935
9936 return "csg";
9937}
9938
9939
9940/* Binary floating point */
9941
9942static HChar *
9943s390_irgen_AXBR(UChar r1, UChar r2)
9944{
9945 IRTemp op1 = newTemp(Ity_F128);
9946 IRTemp op2 = newTemp(Ity_F128);
9947 IRTemp result = newTemp(Ity_F128);
9948
9949 assign(op1, get_fpr_pair(r1));
9950 assign(op2, get_fpr_pair(r2));
9951 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9952 mkexpr(op2)));
9953 put_fpr_pair(r1, mkexpr(result));
9954
9955 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9956
9957 return "axbr";
9958}
9959
9960/* The result of a Iop_CmdFxx operation is a condition code. It is
9961 encoded using the values defined in type IRCmpFxxResult.
9962 Before we can store the condition code into the guest state (or do
9963 anything else with it for that matter) we need to convert it to
9964 the encoding that s390 uses. This is what this function does.
9965
9966 s390 VEX b6 b2 b0 cc.1 cc.0
9967 0 0x40 EQ 1 0 0 0 0
9968 1 0x01 LT 0 0 1 0 1
9969 2 0x00 GT 0 0 0 1 0
9970 3 0x45 Unordered 1 1 1 1 1
9971
9972 The following bits from the VEX encoding are interesting:
9973 b0, b2, b6 with b0 being the LSB. We observe:
9974
9975 cc.0 = b0;
9976 cc.1 = b2 | (~b0 & ~b6)
9977
9978 with cc being the s390 condition code.
9979*/
9980static IRExpr *
9981convert_vex_fpcc_to_s390(IRTemp vex_cc)
9982{
9983 IRTemp cc0 = newTemp(Ity_I32);
9984 IRTemp cc1 = newTemp(Ity_I32);
9985 IRTemp b0 = newTemp(Ity_I32);
9986 IRTemp b2 = newTemp(Ity_I32);
9987 IRTemp b6 = newTemp(Ity_I32);
9988
9989 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9990 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9991 mkU32(1)));
9992 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9993 mkU32(1)));
9994
9995 assign(cc0, mkexpr(b0));
9996 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9997 binop(Iop_And32,
9998 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9999 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
10000 )));
10001
10002 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
10003}
10004
10005static HChar *
10006s390_irgen_CEBR(UChar r1, UChar r2)
10007{
10008 IRTemp op1 = newTemp(Ity_F32);
10009 IRTemp op2 = newTemp(Ity_F32);
10010 IRTemp cc_vex = newTemp(Ity_I32);
10011 IRTemp cc_s390 = newTemp(Ity_I32);
10012
10013 assign(op1, get_fpr_w0(r1));
10014 assign(op2, get_fpr_w0(r2));
10015 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10016
10017 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10018 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10019
10020 return "cebr";
10021}
10022
10023static HChar *
10024s390_irgen_CDBR(UChar r1, UChar r2)
10025{
10026 IRTemp op1 = newTemp(Ity_F64);
10027 IRTemp op2 = newTemp(Ity_F64);
10028 IRTemp cc_vex = newTemp(Ity_I32);
10029 IRTemp cc_s390 = newTemp(Ity_I32);
10030
10031 assign(op1, get_fpr_dw0(r1));
10032 assign(op2, get_fpr_dw0(r2));
10033 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10034
10035 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10036 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10037
10038 return "cdbr";
10039}
10040
10041static HChar *
10042s390_irgen_CXBR(UChar r1, UChar r2)
10043{
10044 IRTemp op1 = newTemp(Ity_F128);
10045 IRTemp op2 = newTemp(Ity_F128);
10046 IRTemp cc_vex = newTemp(Ity_I32);
10047 IRTemp cc_s390 = newTemp(Ity_I32);
10048
10049 assign(op1, get_fpr_pair(r1));
10050 assign(op2, get_fpr_pair(r2));
10051 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10052
10053 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10054 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10055
10056 return "cxbr";
10057}
10058
10059static HChar *
10060s390_irgen_CEB(UChar r1, IRTemp op2addr)
10061{
10062 IRTemp op1 = newTemp(Ity_F32);
10063 IRTemp op2 = newTemp(Ity_F32);
10064 IRTemp cc_vex = newTemp(Ity_I32);
10065 IRTemp cc_s390 = newTemp(Ity_I32);
10066
10067 assign(op1, get_fpr_w0(r1));
10068 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10069 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10070
10071 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10072 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10073
10074 return "ceb";
10075}
10076
10077static HChar *
10078s390_irgen_CDB(UChar r1, IRTemp op2addr)
10079{
10080 IRTemp op1 = newTemp(Ity_F64);
10081 IRTemp op2 = newTemp(Ity_F64);
10082 IRTemp cc_vex = newTemp(Ity_I32);
10083 IRTemp cc_s390 = newTemp(Ity_I32);
10084
10085 assign(op1, get_fpr_dw0(r1));
10086 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10087 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10088
10089 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10090 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10091
10092 return "cdb";
10093}
10094
10095static HChar *
10096s390_irgen_CXFBR(UChar r1, UChar r2)
10097{
10098 IRTemp op2 = newTemp(Ity_I32);
10099
10100 assign(op2, get_gpr_w1(r2));
10101 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10102
10103 return "cxfbr";
10104}
10105
10106static HChar *
10107s390_irgen_CXGBR(UChar r1, UChar r2)
10108{
10109 IRTemp op2 = newTemp(Ity_I64);
10110
10111 assign(op2, get_gpr_dw0(r2));
10112 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10113
10114 return "cxgbr";
10115}
10116
10117static HChar *
10118s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10119{
10120 IRTemp op = newTemp(Ity_F128);
10121 IRTemp result = newTemp(Ity_I32);
10122
10123 assign(op, get_fpr_pair(r2));
10124 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10125 mkexpr(op)));
10126 put_gpr_w1(r1, mkexpr(result));
10127 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10128
10129 return "cfxbr";
10130}
10131
10132static HChar *
10133s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10134{
10135 IRTemp op = newTemp(Ity_F128);
10136 IRTemp result = newTemp(Ity_I64);
10137
10138 assign(op, get_fpr_pair(r2));
10139 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10140 mkexpr(op)));
10141 put_gpr_dw0(r1, mkexpr(result));
10142 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10143
10144 return "cgxbr";
10145}
10146
10147static HChar *
10148s390_irgen_DXBR(UChar r1, UChar r2)
10149{
10150 IRTemp op1 = newTemp(Ity_F128);
10151 IRTemp op2 = newTemp(Ity_F128);
10152 IRTemp result = newTemp(Ity_F128);
10153
10154 assign(op1, get_fpr_pair(r1));
10155 assign(op2, get_fpr_pair(r2));
10156 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10157 mkexpr(op2)));
10158 put_fpr_pair(r1, mkexpr(result));
10159
10160 return "dxbr";
10161}
10162
10163static HChar *
10164s390_irgen_LTXBR(UChar r1, UChar r2)
10165{
10166 IRTemp result = newTemp(Ity_F128);
10167
10168 assign(result, get_fpr_pair(r2));
10169 put_fpr_pair(r1, mkexpr(result));
10170 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10171
10172 return "ltxbr";
10173}
10174
10175static HChar *
10176s390_irgen_LCXBR(UChar r1, UChar r2)
10177{
10178 IRTemp result = newTemp(Ity_F128);
10179
10180 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10181 put_fpr_pair(r1, mkexpr(result));
10182 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10183
10184 return "lcxbr";
10185}
10186
10187static HChar *
10188s390_irgen_LXDBR(UChar r1, UChar r2)
10189{
10190 IRTemp op = newTemp(Ity_F64);
10191
10192 assign(op, get_fpr_dw0(r2));
10193 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10194
10195 return "lxdbr";
10196}
10197
10198static HChar *
10199s390_irgen_LXEBR(UChar r1, UChar r2)
10200{
10201 IRTemp op = newTemp(Ity_F32);
10202
10203 assign(op, get_fpr_w0(r2));
10204 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10205
10206 return "lxebr";
10207}
10208
10209static HChar *
10210s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10211{
10212 IRTemp op = newTemp(Ity_F64);
10213
10214 assign(op, load(Ity_F64, mkexpr(op2addr)));
10215 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10216
10217 return "lxdb";
10218}
10219
10220static HChar *
10221s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10222{
10223 IRTemp op = newTemp(Ity_F32);
10224
10225 assign(op, load(Ity_F32, mkexpr(op2addr)));
10226 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10227
10228 return "lxeb";
10229}
10230
10231static HChar *
10232s390_irgen_LNEBR(UChar r1, UChar r2)
10233{
10234 IRTemp result = newTemp(Ity_F32);
10235
10236 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10237 put_fpr_w0(r1, mkexpr(result));
10238 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10239
10240 return "lnebr";
10241}
10242
10243static HChar *
10244s390_irgen_LNDBR(UChar r1, UChar r2)
10245{
10246 IRTemp result = newTemp(Ity_F64);
10247
10248 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10249 put_fpr_dw0(r1, mkexpr(result));
10250 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10251
10252 return "lndbr";
10253}
10254
10255static HChar *
10256s390_irgen_LNXBR(UChar r1, UChar r2)
10257{
10258 IRTemp result = newTemp(Ity_F128);
10259
10260 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10261 put_fpr_pair(r1, mkexpr(result));
10262 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10263
10264 return "lnxbr";
10265}
10266
10267static HChar *
10268s390_irgen_LPEBR(UChar r1, UChar r2)
10269{
10270 IRTemp result = newTemp(Ity_F32);
10271
10272 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10273 put_fpr_w0(r1, mkexpr(result));
10274 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10275
10276 return "lpebr";
10277}
10278
10279static HChar *
10280s390_irgen_LPDBR(UChar r1, UChar r2)
10281{
10282 IRTemp result = newTemp(Ity_F64);
10283
10284 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10285 put_fpr_dw0(r1, mkexpr(result));
10286 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10287
10288 return "lpdbr";
10289}
10290
10291static HChar *
10292s390_irgen_LPXBR(UChar r1, UChar r2)
10293{
10294 IRTemp result = newTemp(Ity_F128);
10295
10296 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10297 put_fpr_pair(r1, mkexpr(result));
10298 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10299
10300 return "lpxbr";
10301}
10302
10303static HChar *
10304s390_irgen_LDXBR(UChar r1, UChar r2)
10305{
10306 IRTemp result = newTemp(Ity_F64);
10307
10308 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10309 put_fpr_dw0(r1, mkexpr(result));
10310
10311 return "ldxbr";
10312}
10313
10314static HChar *
10315s390_irgen_LEXBR(UChar r1, UChar r2)
10316{
10317 IRTemp result = newTemp(Ity_F32);
10318
10319 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10320 put_fpr_w0(r1, mkexpr(result));
10321
10322 return "lexbr";
10323}
10324
10325static HChar *
10326s390_irgen_MXBR(UChar r1, UChar r2)
10327{
10328 IRTemp op1 = newTemp(Ity_F128);
10329 IRTemp op2 = newTemp(Ity_F128);
10330 IRTemp result = newTemp(Ity_F128);
10331
10332 assign(op1, get_fpr_pair(r1));
10333 assign(op2, get_fpr_pair(r2));
10334 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10335 mkexpr(op2)));
10336 put_fpr_pair(r1, mkexpr(result));
10337
10338 return "mxbr";
10339}
10340
10341static HChar *
10342s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10343{
10344 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10345 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10346
10347 return "maebr";
10348}
10349
10350static HChar *
10351s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10352{
10353 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10354 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10355
10356 return "madbr";
10357}
10358
10359static HChar *
10360s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10361{
10362 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10363
10364 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10365 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10366
10367 return "maeb";
10368}
10369
10370static HChar *
10371s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10372{
10373 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10374
10375 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10376 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10377
10378 return "madb";
10379}
10380
10381static HChar *
10382s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10383{
10384 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10385 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10386
10387 return "msebr";
10388}
10389
10390static HChar *
10391s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10392{
10393 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10394 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10395
10396 return "msdbr";
10397}
10398
10399static HChar *
10400s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10401{
10402 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10403
10404 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10405 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10406
10407 return "mseb";
10408}
10409
10410static HChar *
10411s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10412{
10413 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10414
10415 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10416 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10417
10418 return "msdb";
10419}
10420
10421static HChar *
10422s390_irgen_SQEBR(UChar r1, UChar r2)
10423{
10424 IRTemp result = newTemp(Ity_F32);
10425
10426 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10427 put_fpr_w0(r1, mkexpr(result));
10428
10429 return "sqebr";
10430}
10431
10432static HChar *
10433s390_irgen_SQDBR(UChar r1, UChar r2)
10434{
10435 IRTemp result = newTemp(Ity_F64);
10436
10437 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10438 put_fpr_dw0(r1, mkexpr(result));
10439
10440 return "sqdbr";
10441}
10442
10443static HChar *
10444s390_irgen_SQXBR(UChar r1, UChar r2)
10445{
10446 IRTemp result = newTemp(Ity_F128);
10447
10448 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10449 put_fpr_pair(r1, mkexpr(result));
10450
10451 return "sqxbr";
10452}
10453
10454static HChar *
10455s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10456{
10457 IRTemp op = newTemp(Ity_F32);
10458
10459 assign(op, load(Ity_F32, mkexpr(op2addr)));
10460 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10461
10462 return "sqeb";
10463}
10464
10465static HChar *
10466s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10467{
10468 IRTemp op = newTemp(Ity_F64);
10469
10470 assign(op, load(Ity_F64, mkexpr(op2addr)));
10471 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10472
10473 return "sqdb";
10474}
10475
10476static HChar *
10477s390_irgen_SXBR(UChar r1, UChar r2)
10478{
10479 IRTemp op1 = newTemp(Ity_F128);
10480 IRTemp op2 = newTemp(Ity_F128);
10481 IRTemp result = newTemp(Ity_F128);
10482
10483 assign(op1, get_fpr_pair(r1));
10484 assign(op2, get_fpr_pair(r2));
10485 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10486 mkexpr(op2)));
10487 put_fpr_pair(r1, mkexpr(result));
10488 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10489
10490 return "sxbr";
10491}
10492
10493static HChar *
10494s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10495{
10496 IRTemp value = newTemp(Ity_F32);
10497
10498 assign(value, get_fpr_w0(r1));
10499
10500 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10501
10502 return "tceb";
10503}
10504
10505static HChar *
10506s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10507{
10508 IRTemp value = newTemp(Ity_F64);
10509
10510 assign(value, get_fpr_dw0(r1));
10511
10512 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10513
10514 return "tcdb";
10515}
10516
10517static HChar *
10518s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10519{
10520 IRTemp value = newTemp(Ity_F128);
10521
10522 assign(value, get_fpr_pair(r1));
10523
10524 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10525
10526 return "tcxb";
10527}
10528
10529static HChar *
10530s390_irgen_LCDFR(UChar r1, UChar r2)
10531{
10532 IRTemp result = newTemp(Ity_F64);
10533
10534 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10535 put_fpr_dw0(r1, mkexpr(result));
10536
10537 return "lcdfr";
10538}
10539
10540static HChar *
10541s390_irgen_LNDFR(UChar r1, UChar r2)
10542{
10543 IRTemp result = newTemp(Ity_F64);
10544
10545 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10546 put_fpr_dw0(r1, mkexpr(result));
10547
10548 return "lndfr";
10549}
10550
10551static HChar *
10552s390_irgen_LPDFR(UChar r1, UChar r2)
10553{
10554 IRTemp result = newTemp(Ity_F64);
10555
10556 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10557 put_fpr_dw0(r1, mkexpr(result));
10558
10559 return "lpdfr";
10560}
10561
10562static HChar *
10563s390_irgen_LDGR(UChar r1, UChar r2)
10564{
10565 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10566
10567 return "ldgr";
10568}
10569
10570static HChar *
10571s390_irgen_LGDR(UChar r1, UChar r2)
10572{
10573 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10574
10575 return "lgdr";
10576}
10577
10578
10579static HChar *
10580s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10581{
10582 IRTemp sign = newTemp(Ity_I64);
10583 IRTemp value = newTemp(Ity_I64);
10584
10585 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10586 mkU64(1ULL << 63)));
10587 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10588 mkU64((1ULL << 63) - 1)));
10589 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10590 mkexpr(sign))));
10591
10592 return "cpsdr";
10593}
10594
10595
10596static UInt
10597s390_do_cvb(ULong decimal)
10598{
10599#if defined(VGA_s390x)
10600 UInt binary;
10601
10602 __asm__ volatile (
10603 "cvb %[result],%[input]\n\t"
10604 : [result] "=d"(binary)
10605 : [input] "m"(decimal)
10606 );
10607
10608 return binary;
10609#else
10610 return 0;
10611#endif
10612}
10613
10614static IRExpr *
10615s390_call_cvb(IRExpr *in)
10616{
10617 IRExpr **args, *call;
10618
10619 args = mkIRExprVec_1(in);
10620 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10621 "s390_do_cvb", &s390_do_cvb, args);
10622
10623 /* Nothing is excluded from definedness checking. */
10624 call->Iex.CCall.cee->mcx_mask = 0;
10625
10626 return call;
10627}
10628
10629static HChar *
10630s390_irgen_CVB(UChar r1, IRTemp op2addr)
10631{
10632 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10633
10634 return "cvb";
10635}
10636
10637static HChar *
10638s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10639{
10640 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10641
10642 return "cvby";
10643}
10644
10645
10646static ULong
10647s390_do_cvd(ULong binary_in)
10648{
10649#if defined(VGA_s390x)
10650 UInt binary = binary_in & 0xffffffffULL;
10651 ULong decimal;
10652
10653 __asm__ volatile (
10654 "cvd %[input],%[result]\n\t"
10655 : [result] "=m"(decimal)
10656 : [input] "d"(binary)
10657 );
10658
10659 return decimal;
10660#else
10661 return 0;
10662#endif
10663}
10664
10665static IRExpr *
10666s390_call_cvd(IRExpr *in)
10667{
10668 IRExpr **args, *call;
10669
10670 args = mkIRExprVec_1(in);
10671 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10672 "s390_do_cvd", &s390_do_cvd, args);
10673
10674 /* Nothing is excluded from definedness checking. */
10675 call->Iex.CCall.cee->mcx_mask = 0;
10676
10677 return call;
10678}
10679
10680static HChar *
10681s390_irgen_CVD(UChar r1, IRTemp op2addr)
10682{
10683 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10684
10685 return "cvd";
10686}
10687
10688static HChar *
10689s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10690{
10691 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10692
10693 return "cvdy";
10694}
10695
10696static HChar *
10697s390_irgen_FLOGR(UChar r1, UChar r2)
10698{
10699 IRTemp input = newTemp(Ity_I64);
10700 IRTemp not_zero = newTemp(Ity_I64);
10701 IRTemp tmpnum = newTemp(Ity_I64);
10702 IRTemp num = newTemp(Ity_I64);
10703 IRTemp shift_amount = newTemp(Ity_I8);
10704
10705 /* We use the "count leading zeroes" operator because the number of
10706 leading zeroes is identical with the bit position of the first '1' bit.
10707 However, that operator does not work when the input value is zero.
10708 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10709 the modified value. If input == 0, then the result is 64. Otherwise,
10710 the result of Clz64 is what we want. */
10711
10712 assign(input, get_gpr_dw0(r2));
10713 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10714 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10715
10716 /* num = (input == 0) ? 64 : tmpnum */
10717 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10718 /* == 0 */ mkU64(64),
10719 /* != 0 */ mkexpr(tmpnum)));
10720
10721 put_gpr_dw0(r1, mkexpr(num));
10722
10723 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10724 is to first shift the input value by NUM + 1 bits to the left which
10725 causes the leftmost '1' bit to disappear. Then we shift logically to
10726 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10727 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10728 the width of the value-to-be-shifted, we need to special case
10729 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10730 For both such INPUT values the result will be 0. */
10731
10732 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10733 mkU64(1))));
10734
10735 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010736 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10737 /* == 0 || == 1*/ mkU64(0),
10738 /* otherwise */
10739 binop(Iop_Shr64,
10740 binop(Iop_Shl64, mkexpr(input),
10741 mkexpr(shift_amount)),
10742 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010743
10744 /* Compare the original value as an unsigned integer with 0. */
10745 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10746 mktemp(Ity_I64, mkU64(0)), False);
10747
10748 return "flogr";
10749}
10750
sewardj1e5fea62011-05-17 16:18:36 +000010751static HChar *
10752s390_irgen_STCK(IRTemp op2addr)
10753{
10754 IRDirty *d;
10755 IRTemp cc = newTemp(Ity_I64);
10756
10757 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10758 &s390x_dirtyhelper_STCK,
10759 mkIRExprVec_1(mkexpr(op2addr)));
10760 d->mFx = Ifx_Write;
10761 d->mAddr = mkexpr(op2addr);
10762 d->mSize = 8;
10763 stmt(IRStmt_Dirty(d));
10764 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10765 mkexpr(cc), mkU64(0), mkU64(0));
10766 return "stck";
10767}
10768
10769static HChar *
10770s390_irgen_STCKF(IRTemp op2addr)
10771{
10772 IRDirty *d;
10773 IRTemp cc = newTemp(Ity_I64);
10774
10775 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10776 &s390x_dirtyhelper_STCKF,
10777 mkIRExprVec_1(mkexpr(op2addr)));
10778 d->mFx = Ifx_Write;
10779 d->mAddr = mkexpr(op2addr);
10780 d->mSize = 8;
10781 stmt(IRStmt_Dirty(d));
10782 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10783 mkexpr(cc), mkU64(0), mkU64(0));
10784 return "stckf";
10785}
10786
10787static HChar *
10788s390_irgen_STCKE(IRTemp op2addr)
10789{
10790 IRDirty *d;
10791 IRTemp cc = newTemp(Ity_I64);
10792
10793 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10794 &s390x_dirtyhelper_STCKE,
10795 mkIRExprVec_1(mkexpr(op2addr)));
10796 d->mFx = Ifx_Write;
10797 d->mAddr = mkexpr(op2addr);
10798 d->mSize = 16;
10799 stmt(IRStmt_Dirty(d));
10800 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10801 mkexpr(cc), mkU64(0), mkU64(0));
10802 return "stcke";
10803}
10804
florian933065d2011-07-11 01:48:02 +000010805static HChar *
10806s390_irgen_STFLE(IRTemp op2addr)
10807{
10808 IRDirty *d;
10809 IRTemp cc = newTemp(Ity_I64);
10810
10811 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10812 &s390x_dirtyhelper_STFLE,
10813 mkIRExprVec_1(mkexpr(op2addr)));
10814
10815 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10816
10817 d->fxState[0].fx = Ifx_Modify; /* read then write */
10818 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10819 d->fxState[0].size = sizeof(ULong);
10820 d->nFxState = 1;
10821
10822 d->mAddr = mkexpr(op2addr);
10823 /* Pretend all double words are written */
10824 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10825 d->mFx = Ifx_Write;
10826
10827 stmt(IRStmt_Dirty(d));
10828
10829 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10830
10831 return "stfle";
10832}
10833
floriana4384a32011-08-11 16:58:45 +000010834static HChar *
10835s390_irgen_CKSM(UChar r1,UChar r2)
10836{
10837 IRTemp addr = newTemp(Ity_I64);
10838 IRTemp op = newTemp(Ity_I32);
10839 IRTemp len = newTemp(Ity_I64);
10840 IRTemp oldval = newTemp(Ity_I32);
10841 IRTemp mask = newTemp(Ity_I32);
10842 IRTemp newop = newTemp(Ity_I32);
10843 IRTemp result = newTemp(Ity_I32);
10844 IRTemp result1 = newTemp(Ity_I32);
10845 IRTemp inc = newTemp(Ity_I64);
10846
10847 assign(oldval, get_gpr_w1(r1));
10848 assign(addr, get_gpr_dw0(r2));
10849 assign(len, get_gpr_dw0(r2+1));
10850
10851 /* Condition code is always zero. */
10852 s390_cc_set(0);
10853
10854 /* If length is zero, there is no need to calculate the checksum */
10855 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10856 guest_IA_next_instr);
10857
10858 /* Assiging the increment variable to adjust address and length
10859 later on. */
10860 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10861 mkexpr(len), mkU64(4)));
10862
10863 /* If length < 4 the final 4-byte 2nd operand value is computed by
10864 appending the remaining bytes to the right with 0. This is done
10865 by AND'ing the 4 bytes loaded from memory with an appropriate
10866 mask. If length >= 4, that mask is simply 0xffffffff. */
10867
10868 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10869 /* Mask computation when len < 4:
10870 0xffffffff << (32 - (len % 4)*8) */
10871 binop(Iop_Shl32, mkU32(0xffffffff),
10872 unop(Iop_32to8,
10873 binop(Iop_Sub32, mkU32(32),
10874 binop(Iop_Shl32,
10875 unop(Iop_64to32,
10876 binop(Iop_And64,
10877 mkexpr(len), mkU64(3))),
10878 mkU8(3))))),
10879 mkU32(0xffffffff)));
10880
10881 assign(op, load(Ity_I32, mkexpr(addr)));
10882 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10883 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10884
10885 /* Checking for carry */
10886 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10887 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10888 mkexpr(result)));
10889
10890 put_gpr_w1(r1, mkexpr(result1));
10891 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10892 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10893
10894 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10895 guest_IA_curr_instr);
10896
10897 return "cksm";
10898}
10899
florian9af37692012-01-15 21:01:16 +000010900static HChar *
10901s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10902{
10903 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10904 src_addr = newTemp(Ity_I64);
10905 des_addr = newTemp(Ity_I64);
10906 tab_addr = newTemp(Ity_I64);
10907 test_byte = newTemp(Ity_I8);
10908 src_len = newTemp(Ity_I64);
10909
10910 assign(src_addr, get_gpr_dw0(r2));
10911 assign(des_addr, get_gpr_dw0(r1));
10912 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010913 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010914 assign(test_byte, get_gpr_b7(0));
10915
10916 IRTemp op = newTemp(Ity_I8);
10917 IRTemp op1 = newTemp(Ity_I8);
10918 IRTemp result = newTemp(Ity_I64);
10919
10920 /* End of source string? We're done; proceed to next insn */
10921 s390_cc_set(0);
10922 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10923 guest_IA_next_instr);
10924
10925 /* Load character from source string, index translation table and
10926 store translated character in op1. */
10927 assign(op, load(Ity_I8, mkexpr(src_addr)));
10928
10929 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10930 mkexpr(tab_addr)));
10931 assign(op1, load(Ity_I8, mkexpr(result)));
10932
10933 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10934 s390_cc_set(1);
10935 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10936 guest_IA_next_instr);
10937 }
10938 store(get_gpr_dw0(r1), mkexpr(op1));
10939
10940 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10941 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10942 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10943
10944 always_goto_and_chase(guest_IA_curr_instr);
10945
10946 return "troo";
10947}
10948
florian730448f2012-02-04 17:07:07 +000010949static HChar *
10950s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10951{
10952 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10953 src_addr = newTemp(Ity_I64);
10954 des_addr = newTemp(Ity_I64);
10955 tab_addr = newTemp(Ity_I64);
10956 test_byte = newTemp(Ity_I8);
10957 src_len = newTemp(Ity_I64);
10958
10959 assign(src_addr, get_gpr_dw0(r2));
10960 assign(des_addr, get_gpr_dw0(r1));
10961 assign(tab_addr, get_gpr_dw0(1));
10962 assign(src_len, get_gpr_dw0(r1+1));
10963 assign(test_byte, get_gpr_b7(0));
10964
10965 IRTemp op = newTemp(Ity_I16);
10966 IRTemp op1 = newTemp(Ity_I8);
10967 IRTemp result = newTemp(Ity_I64);
10968
10969 /* End of source string? We're done; proceed to next insn */
10970 s390_cc_set(0);
10971 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10972 guest_IA_next_instr);
10973
10974 /* Load character from source string, index translation table and
10975 store translated character in op1. */
10976 assign(op, load(Ity_I16, mkexpr(src_addr)));
10977
10978 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10979 mkexpr(tab_addr)));
10980
10981 assign(op1, load(Ity_I8, mkexpr(result)));
10982
10983 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10984 s390_cc_set(1);
10985 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10986 guest_IA_next_instr);
10987 }
10988 store(get_gpr_dw0(r1), mkexpr(op1));
10989
10990 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10991 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10992 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10993
10994 always_goto_and_chase(guest_IA_curr_instr);
10995
10996 return "trto";
10997}
10998
10999static HChar *
11000s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
11001{
11002 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11003 src_addr = newTemp(Ity_I64);
11004 des_addr = newTemp(Ity_I64);
11005 tab_addr = newTemp(Ity_I64);
11006 test_byte = newTemp(Ity_I16);
11007 src_len = newTemp(Ity_I64);
11008
11009 assign(src_addr, get_gpr_dw0(r2));
11010 assign(des_addr, get_gpr_dw0(r1));
11011 assign(tab_addr, get_gpr_dw0(1));
11012 assign(src_len, get_gpr_dw0(r1+1));
11013 assign(test_byte, get_gpr_hw3(0));
11014
11015 IRTemp op = newTemp(Ity_I8);
11016 IRTemp op1 = newTemp(Ity_I16);
11017 IRTemp result = newTemp(Ity_I64);
11018
11019 /* End of source string? We're done; proceed to next insn */
11020 s390_cc_set(0);
11021 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11022 guest_IA_next_instr);
11023
11024 /* Load character from source string, index translation table and
11025 store translated character in op1. */
11026 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
11027
11028 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11029 mkexpr(tab_addr)));
11030 assign(op1, load(Ity_I16, mkexpr(result)));
11031
11032 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11033 s390_cc_set(1);
11034 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11035 guest_IA_next_instr);
11036 }
11037 store(get_gpr_dw0(r1), mkexpr(op1));
11038
11039 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11040 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11041 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11042
11043 always_goto_and_chase(guest_IA_curr_instr);
11044
11045 return "trot";
11046}
11047
11048static HChar *
11049s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11050{
11051 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11052 src_addr = newTemp(Ity_I64);
11053 des_addr = newTemp(Ity_I64);
11054 tab_addr = newTemp(Ity_I64);
11055 test_byte = newTemp(Ity_I16);
11056 src_len = newTemp(Ity_I64);
11057
11058 assign(src_addr, get_gpr_dw0(r2));
11059 assign(des_addr, get_gpr_dw0(r1));
11060 assign(tab_addr, get_gpr_dw0(1));
11061 assign(src_len, get_gpr_dw0(r1+1));
11062 assign(test_byte, get_gpr_hw3(0));
11063
11064 IRTemp op = newTemp(Ity_I16);
11065 IRTemp op1 = newTemp(Ity_I16);
11066 IRTemp result = newTemp(Ity_I64);
11067
11068 /* End of source string? We're done; proceed to next insn */
11069 s390_cc_set(0);
11070 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11071 guest_IA_next_instr);
11072
11073 /* Load character from source string, index translation table and
11074 store translated character in op1. */
11075 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11076
11077 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11078 mkexpr(tab_addr)));
11079 assign(op1, load(Ity_I16, mkexpr(result)));
11080
11081 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11082 s390_cc_set(1);
11083 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11084 guest_IA_next_instr);
11085 }
11086
11087 store(get_gpr_dw0(r1), mkexpr(op1));
11088
11089 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11090 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11091 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11092
11093 always_goto_and_chase(guest_IA_curr_instr);
11094
11095 return "trtt";
11096}
11097
11098static HChar *
11099s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11100{
11101 IRTemp op = newTemp(Ity_I8);
11102 IRTemp op1 = newTemp(Ity_I8);
11103 IRTemp result = newTemp(Ity_I64);
11104 IRTemp counter = newTemp(Ity_I64);
11105
11106 assign(counter, get_counter_dw0());
11107
11108 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
11109
11110 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
11111
11112 assign(op1, load(Ity_I8, mkexpr(result)));
11113 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
11114
11115 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
11116 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
11117 guest_IA_curr_instr);
11118
11119 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +000011120 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011121
11122 return "tr";
11123}
11124
11125static HChar *
11126s390_irgen_TRE(UChar r1,UChar r2)
11127{
11128 IRTemp src_addr, tab_addr, src_len, test_byte;
11129 src_addr = newTemp(Ity_I64);
11130 tab_addr = newTemp(Ity_I64);
11131 src_len = newTemp(Ity_I64);
11132 test_byte = newTemp(Ity_I8);
11133
11134 assign(src_addr, get_gpr_dw0(r1));
11135 assign(src_len, get_gpr_dw0(r1+1));
11136 assign(tab_addr, get_gpr_dw0(r2));
11137 assign(test_byte, get_gpr_b7(0));
11138
11139 IRTemp op = newTemp(Ity_I8);
11140 IRTemp op1 = newTemp(Ity_I8);
11141 IRTemp result = newTemp(Ity_I64);
11142
11143 /* End of source string? We're done; proceed to next insn */
11144 s390_cc_set(0);
11145 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11146 guest_IA_next_instr);
11147
11148 /* Load character from source string and compare with test byte */
11149 assign(op, load(Ity_I8, mkexpr(src_addr)));
11150
11151 s390_cc_set(1);
11152 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11153 guest_IA_next_instr);
11154
11155 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11156 mkexpr(tab_addr)));
11157
11158 assign(op1, load(Ity_I8, mkexpr(result)));
11159
11160 store(get_gpr_dw0(r1), mkexpr(op1));
11161 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11162 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11163
11164 always_goto(mkU64(guest_IA_curr_instr));
11165
11166 return "tre";
11167}
11168
floriana4384a32011-08-11 16:58:45 +000011169
sewardj2019a972011-03-07 16:04:07 +000011170/*------------------------------------------------------------*/
11171/*--- Build IR for special instructions ---*/
11172/*------------------------------------------------------------*/
11173
florianb4df7682011-07-05 02:09:01 +000011174static void
sewardj2019a972011-03-07 16:04:07 +000011175s390_irgen_client_request(void)
11176{
11177 if (0)
11178 vex_printf("%%R3 = client_request ( %%R2 )\n");
11179
florianf9e1ed72012-04-17 02:41:56 +000011180 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11181 + S390_SPECIAL_OP_SIZE;
sewardj2019a972011-03-07 16:04:07 +000011182
florianf9e1ed72012-04-17 02:41:56 +000011183 dis_res->jk_StopHere = Ijk_ClientReq;
sewardj2019a972011-03-07 16:04:07 +000011184 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011185
11186 put_IA(mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011187}
11188
florianb4df7682011-07-05 02:09:01 +000011189static void
sewardj2019a972011-03-07 16:04:07 +000011190s390_irgen_guest_NRADDR(void)
11191{
11192 if (0)
11193 vex_printf("%%R3 = guest_NRADDR\n");
11194
floriane88b3c92011-07-05 02:48:39 +000011195 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011196}
11197
florianb4df7682011-07-05 02:09:01 +000011198static void
sewardj2019a972011-03-07 16:04:07 +000011199s390_irgen_call_noredir(void)
11200{
florianf9e1ed72012-04-17 02:41:56 +000011201 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11202 + S390_SPECIAL_OP_SIZE;
11203
sewardj2019a972011-03-07 16:04:07 +000011204 /* Continue after special op */
florianf9e1ed72012-04-17 02:41:56 +000011205 put_gpr_dw0(14, mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011206
11207 /* The address is in REG1, all parameters are in the right (guest) places */
florianf9e1ed72012-04-17 02:41:56 +000011208 put_IA(get_gpr_dw0(1));
sewardj2019a972011-03-07 16:04:07 +000011209
11210 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011211 dis_res->jk_StopHere = Ijk_NoRedir;
sewardj2019a972011-03-07 16:04:07 +000011212}
11213
11214/* Force proper alignment for the structures below. */
11215#pragma pack(1)
11216
11217
11218static s390_decode_t
11219s390_decode_2byte_and_irgen(UChar *bytes)
11220{
11221 typedef union {
11222 struct {
11223 unsigned int op : 16;
11224 } E;
11225 struct {
11226 unsigned int op : 8;
11227 unsigned int i : 8;
11228 } I;
11229 struct {
11230 unsigned int op : 8;
11231 unsigned int r1 : 4;
11232 unsigned int r2 : 4;
11233 } RR;
11234 } formats;
11235 union {
11236 formats fmt;
11237 UShort value;
11238 } ovl;
11239
11240 vassert(sizeof(formats) == 2);
11241
11242 ((char *)(&ovl.value))[0] = bytes[0];
11243 ((char *)(&ovl.value))[1] = bytes[1];
11244
11245 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000011246 case 0x0000: /* invalid opcode */
11247 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011248 case 0x0101: /* PR */ goto unimplemented;
11249 case 0x0102: /* UPT */ goto unimplemented;
11250 case 0x0104: /* PTFF */ goto unimplemented;
11251 case 0x0107: /* SCKPF */ goto unimplemented;
11252 case 0x010a: /* PFPO */ goto unimplemented;
11253 case 0x010b: /* TAM */ goto unimplemented;
11254 case 0x010c: /* SAM24 */ goto unimplemented;
11255 case 0x010d: /* SAM31 */ goto unimplemented;
11256 case 0x010e: /* SAM64 */ goto unimplemented;
11257 case 0x01ff: /* TRAP2 */ goto unimplemented;
11258 }
11259
11260 switch ((ovl.value & 0xff00) >> 8) {
11261 case 0x04: /* SPM */ goto unimplemented;
11262 case 0x05: /* BALR */ goto unimplemented;
11263 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11264 goto ok;
11265 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11266 goto ok;
11267 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11268 case 0x0b: /* BSM */ goto unimplemented;
11269 case 0x0c: /* BASSM */ goto unimplemented;
11270 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11271 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011272 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11273 goto ok;
11274 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11275 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011276 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11277 goto ok;
11278 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11279 goto ok;
11280 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11281 goto ok;
11282 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11283 goto ok;
11284 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11285 goto ok;
11286 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11287 goto ok;
11288 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11289 goto ok;
11290 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11291 goto ok;
11292 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11293 goto ok;
11294 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11295 goto ok;
11296 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11297 goto ok;
11298 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11299 goto ok;
11300 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11301 goto ok;
11302 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11303 goto ok;
11304 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11305 goto ok;
11306 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11307 goto ok;
11308 case 0x20: /* LPDR */ goto unimplemented;
11309 case 0x21: /* LNDR */ goto unimplemented;
11310 case 0x22: /* LTDR */ goto unimplemented;
11311 case 0x23: /* LCDR */ goto unimplemented;
11312 case 0x24: /* HDR */ goto unimplemented;
11313 case 0x25: /* LDXR */ goto unimplemented;
11314 case 0x26: /* MXR */ goto unimplemented;
11315 case 0x27: /* MXDR */ goto unimplemented;
11316 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11317 goto ok;
11318 case 0x29: /* CDR */ goto unimplemented;
11319 case 0x2a: /* ADR */ goto unimplemented;
11320 case 0x2b: /* SDR */ goto unimplemented;
11321 case 0x2c: /* MDR */ goto unimplemented;
11322 case 0x2d: /* DDR */ goto unimplemented;
11323 case 0x2e: /* AWR */ goto unimplemented;
11324 case 0x2f: /* SWR */ goto unimplemented;
11325 case 0x30: /* LPER */ goto unimplemented;
11326 case 0x31: /* LNER */ goto unimplemented;
11327 case 0x32: /* LTER */ goto unimplemented;
11328 case 0x33: /* LCER */ goto unimplemented;
11329 case 0x34: /* HER */ goto unimplemented;
11330 case 0x35: /* LEDR */ goto unimplemented;
11331 case 0x36: /* AXR */ goto unimplemented;
11332 case 0x37: /* SXR */ goto unimplemented;
11333 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11334 goto ok;
11335 case 0x39: /* CER */ goto unimplemented;
11336 case 0x3a: /* AER */ goto unimplemented;
11337 case 0x3b: /* SER */ goto unimplemented;
11338 case 0x3c: /* MDER */ goto unimplemented;
11339 case 0x3d: /* DER */ goto unimplemented;
11340 case 0x3e: /* AUR */ goto unimplemented;
11341 case 0x3f: /* SUR */ goto unimplemented;
11342 }
11343
11344 return S390_DECODE_UNKNOWN_INSN;
11345
11346ok:
11347 return S390_DECODE_OK;
11348
11349unimplemented:
11350 return S390_DECODE_UNIMPLEMENTED_INSN;
11351}
11352
11353static s390_decode_t
11354s390_decode_4byte_and_irgen(UChar *bytes)
11355{
11356 typedef union {
11357 struct {
11358 unsigned int op1 : 8;
11359 unsigned int r1 : 4;
11360 unsigned int op2 : 4;
11361 unsigned int i2 : 16;
11362 } RI;
11363 struct {
11364 unsigned int op : 16;
11365 unsigned int : 8;
11366 unsigned int r1 : 4;
11367 unsigned int r2 : 4;
11368 } RRE;
11369 struct {
11370 unsigned int op : 16;
11371 unsigned int r1 : 4;
11372 unsigned int : 4;
11373 unsigned int r3 : 4;
11374 unsigned int r2 : 4;
11375 } RRF;
11376 struct {
11377 unsigned int op : 16;
11378 unsigned int r3 : 4;
11379 unsigned int m4 : 4;
11380 unsigned int r1 : 4;
11381 unsigned int r2 : 4;
11382 } RRF2;
11383 struct {
11384 unsigned int op : 16;
11385 unsigned int r3 : 4;
11386 unsigned int : 4;
11387 unsigned int r1 : 4;
11388 unsigned int r2 : 4;
11389 } RRF3;
11390 struct {
11391 unsigned int op : 16;
11392 unsigned int r3 : 4;
11393 unsigned int : 4;
11394 unsigned int r1 : 4;
11395 unsigned int r2 : 4;
11396 } RRR;
11397 struct {
11398 unsigned int op : 16;
11399 unsigned int r3 : 4;
11400 unsigned int : 4;
11401 unsigned int r1 : 4;
11402 unsigned int r2 : 4;
11403 } RRF4;
11404 struct {
11405 unsigned int op : 8;
11406 unsigned int r1 : 4;
11407 unsigned int r3 : 4;
11408 unsigned int b2 : 4;
11409 unsigned int d2 : 12;
11410 } RS;
11411 struct {
11412 unsigned int op : 8;
11413 unsigned int r1 : 4;
11414 unsigned int r3 : 4;
11415 unsigned int i2 : 16;
11416 } RSI;
11417 struct {
11418 unsigned int op : 8;
11419 unsigned int r1 : 4;
11420 unsigned int x2 : 4;
11421 unsigned int b2 : 4;
11422 unsigned int d2 : 12;
11423 } RX;
11424 struct {
11425 unsigned int op : 16;
11426 unsigned int b2 : 4;
11427 unsigned int d2 : 12;
11428 } S;
11429 struct {
11430 unsigned int op : 8;
11431 unsigned int i2 : 8;
11432 unsigned int b1 : 4;
11433 unsigned int d1 : 12;
11434 } SI;
11435 } formats;
11436 union {
11437 formats fmt;
11438 UInt value;
11439 } ovl;
11440
11441 vassert(sizeof(formats) == 4);
11442
11443 ((char *)(&ovl.value))[0] = bytes[0];
11444 ((char *)(&ovl.value))[1] = bytes[1];
11445 ((char *)(&ovl.value))[2] = bytes[2];
11446 ((char *)(&ovl.value))[3] = bytes[3];
11447
11448 switch ((ovl.value & 0xff0f0000) >> 16) {
11449 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11450 ovl.fmt.RI.i2); goto ok;
11451 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11452 ovl.fmt.RI.i2); goto ok;
11453 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11454 ovl.fmt.RI.i2); goto ok;
11455 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11456 ovl.fmt.RI.i2); goto ok;
11457 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11458 ovl.fmt.RI.i2); goto ok;
11459 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11460 ovl.fmt.RI.i2); goto ok;
11461 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11462 ovl.fmt.RI.i2); goto ok;
11463 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11464 ovl.fmt.RI.i2); goto ok;
11465 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11466 ovl.fmt.RI.i2); goto ok;
11467 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11468 ovl.fmt.RI.i2); goto ok;
11469 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11470 ovl.fmt.RI.i2); goto ok;
11471 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11472 ovl.fmt.RI.i2); goto ok;
11473 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11474 ovl.fmt.RI.i2); goto ok;
11475 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11476 ovl.fmt.RI.i2); goto ok;
11477 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11478 ovl.fmt.RI.i2); goto ok;
11479 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11480 ovl.fmt.RI.i2); goto ok;
11481 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11482 ovl.fmt.RI.i2); goto ok;
11483 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11484 ovl.fmt.RI.i2); goto ok;
11485 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11486 ovl.fmt.RI.i2); goto ok;
11487 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11488 ovl.fmt.RI.i2); goto ok;
11489 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11490 goto ok;
11491 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11492 ovl.fmt.RI.i2); goto ok;
11493 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11494 ovl.fmt.RI.i2); goto ok;
11495 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11496 ovl.fmt.RI.i2); goto ok;
11497 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11498 goto ok;
11499 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11500 ovl.fmt.RI.i2); goto ok;
11501 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11502 goto ok;
11503 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11504 ovl.fmt.RI.i2); goto ok;
11505 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11506 goto ok;
11507 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11508 ovl.fmt.RI.i2); goto ok;
11509 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11510 goto ok;
11511 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11512 ovl.fmt.RI.i2); goto ok;
11513 }
11514
11515 switch ((ovl.value & 0xffff0000) >> 16) {
11516 case 0x8000: /* SSM */ goto unimplemented;
11517 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011518 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011519 case 0xb202: /* STIDP */ goto unimplemented;
11520 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011521 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11522 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011523 case 0xb206: /* SCKC */ goto unimplemented;
11524 case 0xb207: /* STCKC */ goto unimplemented;
11525 case 0xb208: /* SPT */ goto unimplemented;
11526 case 0xb209: /* STPT */ goto unimplemented;
11527 case 0xb20a: /* SPKA */ goto unimplemented;
11528 case 0xb20b: /* IPK */ goto unimplemented;
11529 case 0xb20d: /* PTLB */ goto unimplemented;
11530 case 0xb210: /* SPX */ goto unimplemented;
11531 case 0xb211: /* STPX */ goto unimplemented;
11532 case 0xb212: /* STAP */ goto unimplemented;
11533 case 0xb214: /* SIE */ goto unimplemented;
11534 case 0xb218: /* PC */ goto unimplemented;
11535 case 0xb219: /* SAC */ goto unimplemented;
11536 case 0xb21a: /* CFC */ goto unimplemented;
11537 case 0xb221: /* IPTE */ goto unimplemented;
11538 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11539 case 0xb223: /* IVSK */ goto unimplemented;
11540 case 0xb224: /* IAC */ goto unimplemented;
11541 case 0xb225: /* SSAR */ goto unimplemented;
11542 case 0xb226: /* EPAR */ goto unimplemented;
11543 case 0xb227: /* ESAR */ goto unimplemented;
11544 case 0xb228: /* PT */ goto unimplemented;
11545 case 0xb229: /* ISKE */ goto unimplemented;
11546 case 0xb22a: /* RRBE */ goto unimplemented;
11547 case 0xb22b: /* SSKE */ goto unimplemented;
11548 case 0xb22c: /* TB */ goto unimplemented;
11549 case 0xb22d: /* DXR */ goto unimplemented;
11550 case 0xb22e: /* PGIN */ goto unimplemented;
11551 case 0xb22f: /* PGOUT */ goto unimplemented;
11552 case 0xb230: /* CSCH */ goto unimplemented;
11553 case 0xb231: /* HSCH */ goto unimplemented;
11554 case 0xb232: /* MSCH */ goto unimplemented;
11555 case 0xb233: /* SSCH */ goto unimplemented;
11556 case 0xb234: /* STSCH */ goto unimplemented;
11557 case 0xb235: /* TSCH */ goto unimplemented;
11558 case 0xb236: /* TPI */ goto unimplemented;
11559 case 0xb237: /* SAL */ goto unimplemented;
11560 case 0xb238: /* RSCH */ goto unimplemented;
11561 case 0xb239: /* STCRW */ goto unimplemented;
11562 case 0xb23a: /* STCPS */ goto unimplemented;
11563 case 0xb23b: /* RCHP */ goto unimplemented;
11564 case 0xb23c: /* SCHM */ goto unimplemented;
11565 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011566 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11567 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011568 case 0xb244: /* SQDR */ goto unimplemented;
11569 case 0xb245: /* SQER */ goto unimplemented;
11570 case 0xb246: /* STURA */ goto unimplemented;
11571 case 0xb247: /* MSTA */ goto unimplemented;
11572 case 0xb248: /* PALB */ goto unimplemented;
11573 case 0xb249: /* EREG */ goto unimplemented;
11574 case 0xb24a: /* ESTA */ goto unimplemented;
11575 case 0xb24b: /* LURA */ goto unimplemented;
11576 case 0xb24c: /* TAR */ goto unimplemented;
11577 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11578 ovl.fmt.RRE.r2); goto ok;
11579 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11580 goto ok;
11581 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11582 goto ok;
11583 case 0xb250: /* CSP */ goto unimplemented;
11584 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11585 ovl.fmt.RRE.r2); goto ok;
11586 case 0xb254: /* MVPG */ goto unimplemented;
11587 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11588 ovl.fmt.RRE.r2); goto ok;
11589 case 0xb257: /* CUSE */ goto unimplemented;
11590 case 0xb258: /* BSG */ goto unimplemented;
11591 case 0xb25a: /* BSA */ goto unimplemented;
11592 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11593 ovl.fmt.RRE.r2); goto ok;
11594 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11595 ovl.fmt.RRE.r2); goto ok;
11596 case 0xb263: /* CMPSC */ goto unimplemented;
11597 case 0xb274: /* SIGA */ goto unimplemented;
11598 case 0xb276: /* XSCH */ goto unimplemented;
11599 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011600 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011601 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011602 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011603 case 0xb27d: /* STSI */ goto unimplemented;
11604 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11605 goto ok;
11606 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11607 goto ok;
11608 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11609 goto ok;
florian730448f2012-02-04 17:07:07 +000011610 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011611 case 0xb2a6: /* CU21 */ goto unimplemented;
11612 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011613 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11614 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011615 case 0xb2b1: /* STFL */ goto unimplemented;
11616 case 0xb2b2: /* LPSWE */ goto unimplemented;
11617 case 0xb2b8: /* SRNMB */ goto unimplemented;
11618 case 0xb2b9: /* SRNMT */ goto unimplemented;
11619 case 0xb2bd: /* LFAS */ goto unimplemented;
11620 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11621 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11622 ovl.fmt.RRE.r2); goto ok;
11623 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11624 ovl.fmt.RRE.r2); goto ok;
11625 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11626 ovl.fmt.RRE.r2); goto ok;
11627 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11628 ovl.fmt.RRE.r2); goto ok;
11629 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11630 ovl.fmt.RRE.r2); goto ok;
11631 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11632 ovl.fmt.RRE.r2); goto ok;
11633 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11634 ovl.fmt.RRE.r2); goto ok;
11635 case 0xb307: /* MXDBR */ goto unimplemented;
11636 case 0xb308: /* KEBR */ goto unimplemented;
11637 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11638 ovl.fmt.RRE.r2); goto ok;
11639 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11640 ovl.fmt.RRE.r2); goto ok;
11641 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11642 ovl.fmt.RRE.r2); goto ok;
11643 case 0xb30c: /* MDEBR */ goto unimplemented;
11644 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11645 ovl.fmt.RRE.r2); goto ok;
11646 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11647 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11648 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11649 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11650 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11651 ovl.fmt.RRE.r2); goto ok;
11652 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11653 ovl.fmt.RRE.r2); goto ok;
11654 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11659 ovl.fmt.RRE.r2); goto ok;
11660 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11661 ovl.fmt.RRE.r2); goto ok;
11662 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11663 ovl.fmt.RRE.r2); goto ok;
11664 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11665 ovl.fmt.RRE.r2); goto ok;
11666 case 0xb318: /* KDBR */ goto unimplemented;
11667 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11668 ovl.fmt.RRE.r2); goto ok;
11669 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11670 ovl.fmt.RRE.r2); goto ok;
11671 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11672 ovl.fmt.RRE.r2); goto ok;
11673 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11674 ovl.fmt.RRE.r2); goto ok;
11675 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11676 ovl.fmt.RRE.r2); goto ok;
11677 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11678 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11679 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11680 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11681 case 0xb324: /* LDER */ goto unimplemented;
11682 case 0xb325: /* LXDR */ goto unimplemented;
11683 case 0xb326: /* LXER */ goto unimplemented;
11684 case 0xb32e: /* MAER */ goto unimplemented;
11685 case 0xb32f: /* MSER */ goto unimplemented;
11686 case 0xb336: /* SQXR */ goto unimplemented;
11687 case 0xb337: /* MEER */ goto unimplemented;
11688 case 0xb338: /* MAYLR */ goto unimplemented;
11689 case 0xb339: /* MYLR */ goto unimplemented;
11690 case 0xb33a: /* MAYR */ goto unimplemented;
11691 case 0xb33b: /* MYR */ goto unimplemented;
11692 case 0xb33c: /* MAYHR */ goto unimplemented;
11693 case 0xb33d: /* MYHR */ goto unimplemented;
11694 case 0xb33e: /* MADR */ goto unimplemented;
11695 case 0xb33f: /* MSDR */ goto unimplemented;
11696 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11697 ovl.fmt.RRE.r2); goto ok;
11698 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11699 ovl.fmt.RRE.r2); goto ok;
11700 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11701 ovl.fmt.RRE.r2); goto ok;
11702 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11703 ovl.fmt.RRE.r2); goto ok;
11704 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11705 ovl.fmt.RRE.r2); goto ok;
11706 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11707 ovl.fmt.RRE.r2); goto ok;
11708 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11709 ovl.fmt.RRE.r2); goto ok;
11710 case 0xb347: /* FIXBR */ goto unimplemented;
11711 case 0xb348: /* KXBR */ goto unimplemented;
11712 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11713 ovl.fmt.RRE.r2); goto ok;
11714 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11715 ovl.fmt.RRE.r2); goto ok;
11716 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11717 ovl.fmt.RRE.r2); goto ok;
11718 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11719 ovl.fmt.RRE.r2); goto ok;
11720 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11721 ovl.fmt.RRE.r2); goto ok;
11722 case 0xb350: /* TBEDR */ goto unimplemented;
11723 case 0xb351: /* TBDR */ goto unimplemented;
11724 case 0xb353: /* DIEBR */ goto unimplemented;
11725 case 0xb357: /* FIEBR */ goto unimplemented;
11726 case 0xb358: /* THDER */ goto unimplemented;
11727 case 0xb359: /* THDR */ goto unimplemented;
11728 case 0xb35b: /* DIDBR */ goto unimplemented;
11729 case 0xb35f: /* FIDBR */ goto unimplemented;
11730 case 0xb360: /* LPXR */ goto unimplemented;
11731 case 0xb361: /* LNXR */ goto unimplemented;
11732 case 0xb362: /* LTXR */ goto unimplemented;
11733 case 0xb363: /* LCXR */ goto unimplemented;
11734 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11735 ovl.fmt.RRE.r2); goto ok;
11736 case 0xb366: /* LEXR */ goto unimplemented;
11737 case 0xb367: /* FIXR */ goto unimplemented;
11738 case 0xb369: /* CXR */ goto unimplemented;
11739 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11740 ovl.fmt.RRE.r2); goto ok;
11741 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11742 ovl.fmt.RRE.r2); goto ok;
11743 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11744 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11745 goto ok;
11746 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11747 ovl.fmt.RRE.r2); goto ok;
11748 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11749 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11750 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11751 case 0xb377: /* FIER */ goto unimplemented;
11752 case 0xb37f: /* FIDR */ goto unimplemented;
11753 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11754 case 0xb385: /* SFASR */ goto unimplemented;
11755 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11756 case 0xb390: /* CELFBR */ goto unimplemented;
11757 case 0xb391: /* CDLFBR */ goto unimplemented;
11758 case 0xb392: /* CXLFBR */ goto unimplemented;
11759 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11760 ovl.fmt.RRE.r2); goto ok;
11761 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11762 ovl.fmt.RRE.r2); goto ok;
11763 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11764 ovl.fmt.RRE.r2); goto ok;
11765 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11766 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11767 goto ok;
11768 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11769 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11770 goto ok;
11771 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11772 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11773 goto ok;
11774 case 0xb3a0: /* CELGBR */ goto unimplemented;
11775 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11776 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11777 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11778 ovl.fmt.RRE.r2); goto ok;
11779 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11780 ovl.fmt.RRE.r2); goto ok;
11781 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11782 ovl.fmt.RRE.r2); goto ok;
11783 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11784 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11785 goto ok;
11786 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11787 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11788 goto ok;
11789 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11790 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11791 goto ok;
11792 case 0xb3b4: /* CEFR */ goto unimplemented;
11793 case 0xb3b5: /* CDFR */ goto unimplemented;
11794 case 0xb3b6: /* CXFR */ goto unimplemented;
11795 case 0xb3b8: /* CFER */ goto unimplemented;
11796 case 0xb3b9: /* CFDR */ goto unimplemented;
11797 case 0xb3ba: /* CFXR */ goto unimplemented;
11798 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11799 ovl.fmt.RRE.r2); goto ok;
11800 case 0xb3c4: /* CEGR */ goto unimplemented;
11801 case 0xb3c5: /* CDGR */ goto unimplemented;
11802 case 0xb3c6: /* CXGR */ goto unimplemented;
11803 case 0xb3c8: /* CGER */ goto unimplemented;
11804 case 0xb3c9: /* CGDR */ goto unimplemented;
11805 case 0xb3ca: /* CGXR */ goto unimplemented;
11806 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11807 ovl.fmt.RRE.r2); goto ok;
11808 case 0xb3d0: /* MDTR */ goto unimplemented;
11809 case 0xb3d1: /* DDTR */ goto unimplemented;
11810 case 0xb3d2: /* ADTR */ goto unimplemented;
11811 case 0xb3d3: /* SDTR */ goto unimplemented;
11812 case 0xb3d4: /* LDETR */ goto unimplemented;
11813 case 0xb3d5: /* LEDTR */ goto unimplemented;
11814 case 0xb3d6: /* LTDTR */ goto unimplemented;
11815 case 0xb3d7: /* FIDTR */ goto unimplemented;
11816 case 0xb3d8: /* MXTR */ goto unimplemented;
11817 case 0xb3d9: /* DXTR */ goto unimplemented;
11818 case 0xb3da: /* AXTR */ goto unimplemented;
11819 case 0xb3db: /* SXTR */ goto unimplemented;
11820 case 0xb3dc: /* LXDTR */ goto unimplemented;
11821 case 0xb3dd: /* LDXTR */ goto unimplemented;
11822 case 0xb3de: /* LTXTR */ goto unimplemented;
11823 case 0xb3df: /* FIXTR */ goto unimplemented;
11824 case 0xb3e0: /* KDTR */ goto unimplemented;
11825 case 0xb3e1: /* CGDTR */ goto unimplemented;
11826 case 0xb3e2: /* CUDTR */ goto unimplemented;
11827 case 0xb3e3: /* CSDTR */ goto unimplemented;
11828 case 0xb3e4: /* CDTR */ goto unimplemented;
11829 case 0xb3e5: /* EEDTR */ goto unimplemented;
11830 case 0xb3e7: /* ESDTR */ goto unimplemented;
11831 case 0xb3e8: /* KXTR */ goto unimplemented;
11832 case 0xb3e9: /* CGXTR */ goto unimplemented;
11833 case 0xb3ea: /* CUXTR */ goto unimplemented;
11834 case 0xb3eb: /* CSXTR */ goto unimplemented;
11835 case 0xb3ec: /* CXTR */ goto unimplemented;
11836 case 0xb3ed: /* EEXTR */ goto unimplemented;
11837 case 0xb3ef: /* ESXTR */ goto unimplemented;
11838 case 0xb3f1: /* CDGTR */ goto unimplemented;
11839 case 0xb3f2: /* CDUTR */ goto unimplemented;
11840 case 0xb3f3: /* CDSTR */ goto unimplemented;
11841 case 0xb3f4: /* CEDTR */ goto unimplemented;
11842 case 0xb3f5: /* QADTR */ goto unimplemented;
11843 case 0xb3f6: /* IEDTR */ goto unimplemented;
11844 case 0xb3f7: /* RRDTR */ goto unimplemented;
11845 case 0xb3f9: /* CXGTR */ goto unimplemented;
11846 case 0xb3fa: /* CXUTR */ goto unimplemented;
11847 case 0xb3fb: /* CXSTR */ goto unimplemented;
11848 case 0xb3fc: /* CEXTR */ goto unimplemented;
11849 case 0xb3fd: /* QAXTR */ goto unimplemented;
11850 case 0xb3fe: /* IEXTR */ goto unimplemented;
11851 case 0xb3ff: /* RRXTR */ goto unimplemented;
11852 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11853 ovl.fmt.RRE.r2); goto ok;
11854 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11855 ovl.fmt.RRE.r2); goto ok;
11856 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11857 ovl.fmt.RRE.r2); goto ok;
11858 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11859 ovl.fmt.RRE.r2); goto ok;
11860 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11861 ovl.fmt.RRE.r2); goto ok;
11862 case 0xb905: /* LURAG */ goto unimplemented;
11863 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11864 ovl.fmt.RRE.r2); goto ok;
11865 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11866 ovl.fmt.RRE.r2); goto ok;
11867 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11868 ovl.fmt.RRE.r2); goto ok;
11869 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11870 ovl.fmt.RRE.r2); goto ok;
11871 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11872 ovl.fmt.RRE.r2); goto ok;
11873 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11874 ovl.fmt.RRE.r2); goto ok;
11875 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11876 ovl.fmt.RRE.r2); goto ok;
11877 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11878 ovl.fmt.RRE.r2); goto ok;
11879 case 0xb90e: /* EREGG */ goto unimplemented;
11880 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11881 ovl.fmt.RRE.r2); goto ok;
11882 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11883 ovl.fmt.RRE.r2); goto ok;
11884 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11885 ovl.fmt.RRE.r2); goto ok;
11886 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11887 ovl.fmt.RRE.r2); goto ok;
11888 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11889 ovl.fmt.RRE.r2); goto ok;
11890 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11891 ovl.fmt.RRE.r2); goto ok;
11892 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11893 ovl.fmt.RRE.r2); goto ok;
11894 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11895 ovl.fmt.RRE.r2); goto ok;
11896 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11897 ovl.fmt.RRE.r2); goto ok;
11898 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11899 ovl.fmt.RRE.r2); goto ok;
11900 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11901 ovl.fmt.RRE.r2); goto ok;
11902 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11903 ovl.fmt.RRE.r2); goto ok;
11904 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11905 ovl.fmt.RRE.r2); goto ok;
11906 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11907 ovl.fmt.RRE.r2); goto ok;
11908 case 0xb91e: /* KMAC */ goto unimplemented;
11909 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11910 ovl.fmt.RRE.r2); goto ok;
11911 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11912 ovl.fmt.RRE.r2); goto ok;
11913 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11914 ovl.fmt.RRE.r2); goto ok;
11915 case 0xb925: /* STURG */ goto unimplemented;
11916 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11917 ovl.fmt.RRE.r2); goto ok;
11918 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11919 ovl.fmt.RRE.r2); goto ok;
11920 case 0xb928: /* PCKMO */ goto unimplemented;
11921 case 0xb92b: /* KMO */ goto unimplemented;
11922 case 0xb92c: /* PCC */ goto unimplemented;
11923 case 0xb92d: /* KMCTR */ goto unimplemented;
11924 case 0xb92e: /* KM */ goto unimplemented;
11925 case 0xb92f: /* KMC */ goto unimplemented;
11926 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11927 ovl.fmt.RRE.r2); goto ok;
11928 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11929 ovl.fmt.RRE.r2); goto ok;
11930 case 0xb93e: /* KIMD */ goto unimplemented;
11931 case 0xb93f: /* KLMD */ goto unimplemented;
11932 case 0xb941: /* CFDTR */ goto unimplemented;
11933 case 0xb942: /* CLGDTR */ goto unimplemented;
11934 case 0xb943: /* CLFDTR */ goto unimplemented;
11935 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11936 ovl.fmt.RRE.r2); goto ok;
11937 case 0xb949: /* CFXTR */ goto unimplemented;
11938 case 0xb94a: /* CLGXTR */ goto unimplemented;
11939 case 0xb94b: /* CLFXTR */ goto unimplemented;
11940 case 0xb951: /* CDFTR */ goto unimplemented;
11941 case 0xb952: /* CDLGTR */ goto unimplemented;
11942 case 0xb953: /* CDLFTR */ goto unimplemented;
11943 case 0xb959: /* CXFTR */ goto unimplemented;
11944 case 0xb95a: /* CXLGTR */ goto unimplemented;
11945 case 0xb95b: /* CXLFTR */ goto unimplemented;
11946 case 0xb960: /* CGRT */ goto unimplemented;
11947 case 0xb961: /* CLGRT */ goto unimplemented;
11948 case 0xb972: /* CRT */ goto unimplemented;
11949 case 0xb973: /* CLRT */ goto unimplemented;
11950 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11951 ovl.fmt.RRE.r2); goto ok;
11952 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11953 ovl.fmt.RRE.r2); goto ok;
11954 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11955 ovl.fmt.RRE.r2); goto ok;
11956 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11957 ovl.fmt.RRE.r2); goto ok;
11958 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11959 ovl.fmt.RRE.r2); goto ok;
11960 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11961 ovl.fmt.RRE.r2); goto ok;
11962 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11963 ovl.fmt.RRE.r2); goto ok;
11964 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11965 ovl.fmt.RRE.r2); goto ok;
11966 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11967 ovl.fmt.RRE.r2); goto ok;
11968 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11969 ovl.fmt.RRE.r2); goto ok;
11970 case 0xb98a: /* CSPG */ goto unimplemented;
11971 case 0xb98d: /* EPSW */ goto unimplemented;
11972 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000011973 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
11974 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11975 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
11976 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11977 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
11978 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000011979 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11980 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011981 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11982 ovl.fmt.RRE.r2); goto ok;
11983 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11984 ovl.fmt.RRE.r2); goto ok;
11985 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11986 ovl.fmt.RRE.r2); goto ok;
11987 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11988 ovl.fmt.RRE.r2); goto ok;
11989 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11990 ovl.fmt.RRE.r2); goto ok;
11991 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11992 ovl.fmt.RRE.r2); goto ok;
11993 case 0xb99a: /* EPAIR */ goto unimplemented;
11994 case 0xb99b: /* ESAIR */ goto unimplemented;
11995 case 0xb99d: /* ESEA */ goto unimplemented;
11996 case 0xb99e: /* PTI */ goto unimplemented;
11997 case 0xb99f: /* SSAIR */ goto unimplemented;
11998 case 0xb9a2: /* PTF */ goto unimplemented;
11999 case 0xb9aa: /* LPTEA */ goto unimplemented;
12000 case 0xb9ae: /* RRBM */ goto unimplemented;
12001 case 0xb9af: /* PFMF */ goto unimplemented;
12002 case 0xb9b0: /* CU14 */ goto unimplemented;
12003 case 0xb9b1: /* CU24 */ goto unimplemented;
12004 case 0xb9b2: /* CU41 */ goto unimplemented;
12005 case 0xb9b3: /* CU42 */ goto unimplemented;
12006 case 0xb9bd: /* TRTRE */ goto unimplemented;
12007 case 0xb9be: /* SRSTU */ goto unimplemented;
12008 case 0xb9bf: /* TRTE */ goto unimplemented;
12009 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
12010 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12011 goto ok;
12012 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
12013 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12014 goto ok;
12015 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
12016 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12017 goto ok;
12018 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
12019 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12020 goto ok;
12021 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
12022 ovl.fmt.RRE.r2); goto ok;
12023 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
12024 ovl.fmt.RRE.r2); goto ok;
12025 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
12026 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12027 goto ok;
12028 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
12029 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12030 goto ok;
12031 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
12032 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12033 goto ok;
12034 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
12035 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12036 goto ok;
12037 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
12038 ovl.fmt.RRE.r2); goto ok;
12039 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
12040 ovl.fmt.RRE.r2); goto ok;
12041 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000012042 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
12043 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12044 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012045 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
12046 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12047 goto ok;
12048 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
12049 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12050 goto ok;
12051 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12052 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12053 goto ok;
12054 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12055 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12056 goto ok;
12057 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12058 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12059 goto ok;
12060 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12061 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12062 goto ok;
12063 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12064 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12065 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012066 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12067 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12068 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012069 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12070 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12071 goto ok;
12072 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12073 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12074 goto ok;
12075 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12076 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12077 goto ok;
12078 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12079 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12080 goto ok;
12081 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12082 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12083 goto ok;
12084 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12085 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12086 goto ok;
12087 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12088 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12089 goto ok;
12090 }
12091
12092 switch ((ovl.value & 0xff000000) >> 24) {
12093 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12094 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12095 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12096 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12097 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12098 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12099 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12100 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12101 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12102 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12103 case 0x45: /* BAL */ goto unimplemented;
12104 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12105 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12106 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12107 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12108 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12109 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12110 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12111 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12112 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12113 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12114 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12115 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12116 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12117 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12118 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12119 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12120 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12121 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12122 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12123 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12124 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12125 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12126 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12127 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12128 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12129 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12130 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12131 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12132 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12133 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12134 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12135 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12136 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12137 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12138 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12139 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12140 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12141 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12142 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12143 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12144 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12145 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12146 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12147 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12148 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12149 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12150 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12151 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12152 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12153 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12154 case 0x67: /* MXD */ goto unimplemented;
12155 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12156 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12157 case 0x69: /* CD */ goto unimplemented;
12158 case 0x6a: /* AD */ goto unimplemented;
12159 case 0x6b: /* SD */ goto unimplemented;
12160 case 0x6c: /* MD */ goto unimplemented;
12161 case 0x6d: /* DD */ goto unimplemented;
12162 case 0x6e: /* AW */ goto unimplemented;
12163 case 0x6f: /* SW */ goto unimplemented;
12164 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12165 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12166 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12167 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12168 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12169 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12170 case 0x79: /* CE */ goto unimplemented;
12171 case 0x7a: /* AE */ goto unimplemented;
12172 case 0x7b: /* SE */ goto unimplemented;
12173 case 0x7c: /* MDE */ goto unimplemented;
12174 case 0x7d: /* DE */ goto unimplemented;
12175 case 0x7e: /* AU */ goto unimplemented;
12176 case 0x7f: /* SU */ goto unimplemented;
12177 case 0x83: /* DIAG */ goto unimplemented;
12178 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12179 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12180 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12181 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12182 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12183 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12184 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12185 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12186 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12187 ovl.fmt.RS.d2); goto ok;
12188 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12189 ovl.fmt.RS.d2); goto ok;
12190 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12191 ovl.fmt.RS.d2); goto ok;
12192 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12193 ovl.fmt.RS.d2); goto ok;
12194 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12195 ovl.fmt.RS.d2); goto ok;
12196 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12197 ovl.fmt.RS.d2); goto ok;
12198 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12199 ovl.fmt.RS.d2); goto ok;
12200 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12201 ovl.fmt.RS.d2); goto ok;
12202 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12203 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12204 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12205 ovl.fmt.SI.d1); goto ok;
12206 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12207 ovl.fmt.SI.d1); goto ok;
12208 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12209 ovl.fmt.SI.d1); goto ok;
12210 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12211 ovl.fmt.SI.d1); goto ok;
12212 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12213 ovl.fmt.SI.d1); goto ok;
12214 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12215 ovl.fmt.SI.d1); goto ok;
12216 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12217 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12218 case 0x99: /* TRACE */ goto unimplemented;
12219 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12220 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12221 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12222 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12223 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12224 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12225 goto ok;
12226 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12227 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12228 goto ok;
12229 case 0xac: /* STNSM */ goto unimplemented;
12230 case 0xad: /* STOSM */ goto unimplemented;
12231 case 0xae: /* SIGP */ goto unimplemented;
12232 case 0xaf: /* MC */ goto unimplemented;
12233 case 0xb1: /* LRA */ goto unimplemented;
12234 case 0xb6: /* STCTL */ goto unimplemented;
12235 case 0xb7: /* LCTL */ goto unimplemented;
12236 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12237 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12238 case 0xbb: /* CDS */ goto unimplemented;
12239 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12240 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12241 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12242 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12243 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12244 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12245 }
12246
12247 return S390_DECODE_UNKNOWN_INSN;
12248
12249ok:
12250 return S390_DECODE_OK;
12251
12252unimplemented:
12253 return S390_DECODE_UNIMPLEMENTED_INSN;
12254}
12255
12256static s390_decode_t
12257s390_decode_6byte_and_irgen(UChar *bytes)
12258{
12259 typedef union {
12260 struct {
12261 unsigned int op1 : 8;
12262 unsigned int r1 : 4;
12263 unsigned int r3 : 4;
12264 unsigned int i2 : 16;
12265 unsigned int : 8;
12266 unsigned int op2 : 8;
12267 } RIE;
12268 struct {
12269 unsigned int op1 : 8;
12270 unsigned int r1 : 4;
12271 unsigned int r2 : 4;
12272 unsigned int i3 : 8;
12273 unsigned int i4 : 8;
12274 unsigned int i5 : 8;
12275 unsigned int op2 : 8;
12276 } RIE_RRUUU;
12277 struct {
12278 unsigned int op1 : 8;
12279 unsigned int r1 : 4;
12280 unsigned int : 4;
12281 unsigned int i2 : 16;
12282 unsigned int m3 : 4;
12283 unsigned int : 4;
12284 unsigned int op2 : 8;
12285 } RIEv1;
12286 struct {
12287 unsigned int op1 : 8;
12288 unsigned int r1 : 4;
12289 unsigned int r2 : 4;
12290 unsigned int i4 : 16;
12291 unsigned int m3 : 4;
12292 unsigned int : 4;
12293 unsigned int op2 : 8;
12294 } RIE_RRPU;
12295 struct {
12296 unsigned int op1 : 8;
12297 unsigned int r1 : 4;
12298 unsigned int m3 : 4;
12299 unsigned int i4 : 16;
12300 unsigned int i2 : 8;
12301 unsigned int op2 : 8;
12302 } RIEv3;
12303 struct {
12304 unsigned int op1 : 8;
12305 unsigned int r1 : 4;
12306 unsigned int op2 : 4;
12307 unsigned int i2 : 32;
12308 } RIL;
12309 struct {
12310 unsigned int op1 : 8;
12311 unsigned int r1 : 4;
12312 unsigned int m3 : 4;
12313 unsigned int b4 : 4;
12314 unsigned int d4 : 12;
12315 unsigned int i2 : 8;
12316 unsigned int op2 : 8;
12317 } RIS;
12318 struct {
12319 unsigned int op1 : 8;
12320 unsigned int r1 : 4;
12321 unsigned int r2 : 4;
12322 unsigned int b4 : 4;
12323 unsigned int d4 : 12;
12324 unsigned int m3 : 4;
12325 unsigned int : 4;
12326 unsigned int op2 : 8;
12327 } RRS;
12328 struct {
12329 unsigned int op1 : 8;
12330 unsigned int l1 : 4;
12331 unsigned int : 4;
12332 unsigned int b1 : 4;
12333 unsigned int d1 : 12;
12334 unsigned int : 8;
12335 unsigned int op2 : 8;
12336 } RSL;
12337 struct {
12338 unsigned int op1 : 8;
12339 unsigned int r1 : 4;
12340 unsigned int r3 : 4;
12341 unsigned int b2 : 4;
12342 unsigned int dl2 : 12;
12343 unsigned int dh2 : 8;
12344 unsigned int op2 : 8;
12345 } RSY;
12346 struct {
12347 unsigned int op1 : 8;
12348 unsigned int r1 : 4;
12349 unsigned int x2 : 4;
12350 unsigned int b2 : 4;
12351 unsigned int d2 : 12;
12352 unsigned int : 8;
12353 unsigned int op2 : 8;
12354 } RXE;
12355 struct {
12356 unsigned int op1 : 8;
12357 unsigned int r3 : 4;
12358 unsigned int x2 : 4;
12359 unsigned int b2 : 4;
12360 unsigned int d2 : 12;
12361 unsigned int r1 : 4;
12362 unsigned int : 4;
12363 unsigned int op2 : 8;
12364 } RXF;
12365 struct {
12366 unsigned int op1 : 8;
12367 unsigned int r1 : 4;
12368 unsigned int x2 : 4;
12369 unsigned int b2 : 4;
12370 unsigned int dl2 : 12;
12371 unsigned int dh2 : 8;
12372 unsigned int op2 : 8;
12373 } RXY;
12374 struct {
12375 unsigned int op1 : 8;
12376 unsigned int i2 : 8;
12377 unsigned int b1 : 4;
12378 unsigned int dl1 : 12;
12379 unsigned int dh1 : 8;
12380 unsigned int op2 : 8;
12381 } SIY;
12382 struct {
12383 unsigned int op : 8;
12384 unsigned int l : 8;
12385 unsigned int b1 : 4;
12386 unsigned int d1 : 12;
12387 unsigned int b2 : 4;
12388 unsigned int d2 : 12;
12389 } SS;
12390 struct {
12391 unsigned int op : 8;
12392 unsigned int l1 : 4;
12393 unsigned int l2 : 4;
12394 unsigned int b1 : 4;
12395 unsigned int d1 : 12;
12396 unsigned int b2 : 4;
12397 unsigned int d2 : 12;
12398 } SS_LLRDRD;
12399 struct {
12400 unsigned int op : 8;
12401 unsigned int r1 : 4;
12402 unsigned int r3 : 4;
12403 unsigned int b2 : 4;
12404 unsigned int d2 : 12;
12405 unsigned int b4 : 4;
12406 unsigned int d4 : 12;
12407 } SS_RRRDRD2;
12408 struct {
12409 unsigned int op : 16;
12410 unsigned int b1 : 4;
12411 unsigned int d1 : 12;
12412 unsigned int b2 : 4;
12413 unsigned int d2 : 12;
12414 } SSE;
12415 struct {
12416 unsigned int op1 : 8;
12417 unsigned int r3 : 4;
12418 unsigned int op2 : 4;
12419 unsigned int b1 : 4;
12420 unsigned int d1 : 12;
12421 unsigned int b2 : 4;
12422 unsigned int d2 : 12;
12423 } SSF;
12424 struct {
12425 unsigned int op : 16;
12426 unsigned int b1 : 4;
12427 unsigned int d1 : 12;
12428 unsigned int i2 : 16;
12429 } SIL;
12430 } formats;
12431 union {
12432 formats fmt;
12433 ULong value;
12434 } ovl;
12435
12436 vassert(sizeof(formats) == 6);
12437
12438 ((char *)(&ovl.value))[0] = bytes[0];
12439 ((char *)(&ovl.value))[1] = bytes[1];
12440 ((char *)(&ovl.value))[2] = bytes[2];
12441 ((char *)(&ovl.value))[3] = bytes[3];
12442 ((char *)(&ovl.value))[4] = bytes[4];
12443 ((char *)(&ovl.value))[5] = bytes[5];
12444 ((char *)(&ovl.value))[6] = 0x0;
12445 ((char *)(&ovl.value))[7] = 0x0;
12446
12447 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12448 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12449 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12450 ovl.fmt.RXY.dl2,
12451 ovl.fmt.RXY.dh2); goto ok;
12452 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12453 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12454 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12455 ovl.fmt.RXY.dl2,
12456 ovl.fmt.RXY.dh2); goto ok;
12457 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12458 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12459 ovl.fmt.RXY.dl2,
12460 ovl.fmt.RXY.dh2); goto ok;
12461 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12462 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12463 ovl.fmt.RXY.dl2,
12464 ovl.fmt.RXY.dh2); goto ok;
12465 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12466 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12467 ovl.fmt.RXY.dl2,
12468 ovl.fmt.RXY.dh2); goto ok;
12469 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12470 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12471 ovl.fmt.RXY.dl2,
12472 ovl.fmt.RXY.dh2); goto ok;
12473 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12474 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12475 ovl.fmt.RXY.dl2,
12476 ovl.fmt.RXY.dh2); goto ok;
12477 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12478 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12479 ovl.fmt.RXY.dl2,
12480 ovl.fmt.RXY.dh2); goto ok;
12481 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12482 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12483 ovl.fmt.RXY.dl2,
12484 ovl.fmt.RXY.dh2); goto ok;
12485 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12486 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12487 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12488 ovl.fmt.RXY.dl2,
12489 ovl.fmt.RXY.dh2); goto ok;
12490 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12491 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12492 ovl.fmt.RXY.dl2,
12493 ovl.fmt.RXY.dh2); goto ok;
12494 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12495 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12496 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12497 ovl.fmt.RXY.dl2,
12498 ovl.fmt.RXY.dh2); goto ok;
12499 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12500 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12501 ovl.fmt.RXY.dl2,
12502 ovl.fmt.RXY.dh2); goto ok;
12503 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12504 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12505 ovl.fmt.RXY.dl2,
12506 ovl.fmt.RXY.dh2); goto ok;
12507 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12508 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12509 ovl.fmt.RXY.dl2,
12510 ovl.fmt.RXY.dh2); goto ok;
12511 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12512 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12513 ovl.fmt.RXY.dl2,
12514 ovl.fmt.RXY.dh2); goto ok;
12515 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12516 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12517 ovl.fmt.RXY.dl2,
12518 ovl.fmt.RXY.dh2); goto ok;
12519 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12520 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12521 ovl.fmt.RXY.dl2,
12522 ovl.fmt.RXY.dh2); goto ok;
12523 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12524 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12525 ovl.fmt.RXY.dl2,
12526 ovl.fmt.RXY.dh2); goto ok;
12527 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12528 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12529 ovl.fmt.RXY.dl2,
12530 ovl.fmt.RXY.dh2); goto ok;
12531 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12532 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12533 ovl.fmt.RXY.dl2,
12534 ovl.fmt.RXY.dh2); goto ok;
12535 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12536 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12537 ovl.fmt.RXY.dl2,
12538 ovl.fmt.RXY.dh2); goto ok;
12539 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12540 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12541 ovl.fmt.RXY.dl2,
12542 ovl.fmt.RXY.dh2); goto ok;
12543 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12544 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12545 ovl.fmt.RXY.dl2,
12546 ovl.fmt.RXY.dh2); goto ok;
12547 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12548 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12549 ovl.fmt.RXY.dl2,
12550 ovl.fmt.RXY.dh2); goto ok;
12551 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12552 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12553 ovl.fmt.RXY.dl2,
12554 ovl.fmt.RXY.dh2); goto ok;
12555 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12556 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12557 ovl.fmt.RXY.dl2,
12558 ovl.fmt.RXY.dh2); goto ok;
12559 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12560 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12561 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12562 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12563 ovl.fmt.RXY.dh2); goto ok;
12564 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12565 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12566 ovl.fmt.RXY.dl2,
12567 ovl.fmt.RXY.dh2); goto ok;
12568 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12569 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12570 ovl.fmt.RXY.dl2,
12571 ovl.fmt.RXY.dh2); goto ok;
12572 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12573 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12574 ovl.fmt.RXY.dl2,
12575 ovl.fmt.RXY.dh2); goto ok;
12576 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12577 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12578 ovl.fmt.RXY.dl2,
12579 ovl.fmt.RXY.dh2); goto ok;
12580 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12581 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12582 ovl.fmt.RXY.dl2,
12583 ovl.fmt.RXY.dh2); goto ok;
12584 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12585 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12586 ovl.fmt.RXY.dl2,
12587 ovl.fmt.RXY.dh2); goto ok;
12588 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12589 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12590 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12591 ovl.fmt.RXY.dh2); goto ok;
12592 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12593 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12594 ovl.fmt.RXY.dl2,
12595 ovl.fmt.RXY.dh2); goto ok;
12596 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12597 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12598 ovl.fmt.RXY.dl2,
12599 ovl.fmt.RXY.dh2); goto ok;
12600 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12601 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12602 ovl.fmt.RXY.dl2,
12603 ovl.fmt.RXY.dh2); goto ok;
12604 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12605 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12606 ovl.fmt.RXY.dl2,
12607 ovl.fmt.RXY.dh2); goto ok;
12608 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12609 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12610 ovl.fmt.RXY.dl2,
12611 ovl.fmt.RXY.dh2); goto ok;
12612 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12613 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12614 ovl.fmt.RXY.dl2,
12615 ovl.fmt.RXY.dh2); goto ok;
12616 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12617 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12618 ovl.fmt.RXY.dl2,
12619 ovl.fmt.RXY.dh2); goto ok;
12620 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12621 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12622 ovl.fmt.RXY.dl2,
12623 ovl.fmt.RXY.dh2); goto ok;
12624 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12625 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12626 ovl.fmt.RXY.dl2,
12627 ovl.fmt.RXY.dh2); goto ok;
12628 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12629 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12630 ovl.fmt.RXY.dl2,
12631 ovl.fmt.RXY.dh2); goto ok;
12632 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12633 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12634 ovl.fmt.RXY.dl2,
12635 ovl.fmt.RXY.dh2); goto ok;
12636 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12637 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12638 ovl.fmt.RXY.dl2,
12639 ovl.fmt.RXY.dh2); goto ok;
12640 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12641 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12642 ovl.fmt.RXY.dl2,
12643 ovl.fmt.RXY.dh2); goto ok;
12644 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12645 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12646 ovl.fmt.RXY.dl2,
12647 ovl.fmt.RXY.dh2); goto ok;
12648 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12649 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12650 ovl.fmt.RXY.dl2,
12651 ovl.fmt.RXY.dh2); goto ok;
12652 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12653 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12654 ovl.fmt.RXY.dl2,
12655 ovl.fmt.RXY.dh2); goto ok;
12656 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12657 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12658 ovl.fmt.RXY.dl2,
12659 ovl.fmt.RXY.dh2); goto ok;
12660 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12661 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12662 ovl.fmt.RXY.dl2,
12663 ovl.fmt.RXY.dh2); goto ok;
12664 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12665 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12666 ovl.fmt.RXY.dl2,
12667 ovl.fmt.RXY.dh2); goto ok;
12668 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12669 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12670 ovl.fmt.RXY.dl2,
12671 ovl.fmt.RXY.dh2); goto ok;
12672 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12673 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12674 ovl.fmt.RXY.dl2,
12675 ovl.fmt.RXY.dh2); goto ok;
12676 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12677 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12678 ovl.fmt.RXY.dl2,
12679 ovl.fmt.RXY.dh2); goto ok;
12680 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12681 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12682 ovl.fmt.RXY.dl2,
12683 ovl.fmt.RXY.dh2); goto ok;
12684 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12685 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12686 ovl.fmt.RXY.dl2,
12687 ovl.fmt.RXY.dh2); goto ok;
12688 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12689 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12690 ovl.fmt.RXY.dl2,
12691 ovl.fmt.RXY.dh2); goto ok;
12692 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12693 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12694 ovl.fmt.RXY.dl2,
12695 ovl.fmt.RXY.dh2); goto ok;
12696 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12697 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12698 ovl.fmt.RXY.dl2,
12699 ovl.fmt.RXY.dh2); goto ok;
12700 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12701 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12702 ovl.fmt.RXY.dl2,
12703 ovl.fmt.RXY.dh2); goto ok;
12704 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12705 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12706 ovl.fmt.RXY.dl2,
12707 ovl.fmt.RXY.dh2); goto ok;
12708 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12709 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12710 ovl.fmt.RXY.dl2,
12711 ovl.fmt.RXY.dh2); goto ok;
12712 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12713 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12714 ovl.fmt.RXY.dl2,
12715 ovl.fmt.RXY.dh2); goto ok;
12716 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12717 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12718 ovl.fmt.RXY.dl2,
12719 ovl.fmt.RXY.dh2); goto ok;
12720 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12721 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12722 ovl.fmt.RXY.dl2,
12723 ovl.fmt.RXY.dh2); goto ok;
12724 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12725 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12726 ovl.fmt.RXY.dl2,
12727 ovl.fmt.RXY.dh2); goto ok;
12728 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12729 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12730 ovl.fmt.RXY.dl2,
12731 ovl.fmt.RXY.dh2); goto ok;
12732 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12733 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12734 ovl.fmt.RXY.dl2,
12735 ovl.fmt.RXY.dh2); goto ok;
12736 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12737 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12738 ovl.fmt.RXY.dl2,
12739 ovl.fmt.RXY.dh2); goto ok;
12740 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12741 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12742 ovl.fmt.RXY.dl2,
12743 ovl.fmt.RXY.dh2); goto ok;
12744 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12745 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12746 ovl.fmt.RXY.dl2,
12747 ovl.fmt.RXY.dh2); goto ok;
12748 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12749 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12750 ovl.fmt.RXY.dl2,
12751 ovl.fmt.RXY.dh2); goto ok;
12752 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12753 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12754 ovl.fmt.RXY.dl2,
12755 ovl.fmt.RXY.dh2); goto ok;
12756 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12757 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12758 ovl.fmt.RXY.dl2,
12759 ovl.fmt.RXY.dh2); goto ok;
12760 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12761 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12762 ovl.fmt.RXY.dl2,
12763 ovl.fmt.RXY.dh2); goto ok;
12764 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12765 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12766 ovl.fmt.RXY.dl2,
12767 ovl.fmt.RXY.dh2); goto ok;
12768 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12769 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12770 ovl.fmt.RXY.dl2,
12771 ovl.fmt.RXY.dh2); goto ok;
12772 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12773 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12774 ovl.fmt.RXY.dl2,
12775 ovl.fmt.RXY.dh2); goto ok;
12776 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12777 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12778 ovl.fmt.RXY.dl2,
12779 ovl.fmt.RXY.dh2); goto ok;
12780 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12781 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12782 ovl.fmt.RXY.dl2,
12783 ovl.fmt.RXY.dh2); goto ok;
12784 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12785 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12786 ovl.fmt.RXY.dl2,
12787 ovl.fmt.RXY.dh2); goto ok;
12788 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12789 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12790 ovl.fmt.RXY.dl2,
12791 ovl.fmt.RXY.dh2); goto ok;
12792 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12793 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12794 ovl.fmt.RXY.dl2,
12795 ovl.fmt.RXY.dh2); goto ok;
12796 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12797 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12798 ovl.fmt.RXY.dl2,
12799 ovl.fmt.RXY.dh2); goto ok;
12800 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12801 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12802 ovl.fmt.RXY.dl2,
12803 ovl.fmt.RXY.dh2); goto ok;
12804 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12805 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12806 ovl.fmt.RSY.dl2,
12807 ovl.fmt.RSY.dh2); goto ok;
12808 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12809 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12810 ovl.fmt.RSY.dl2,
12811 ovl.fmt.RSY.dh2); goto ok;
12812 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12813 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12814 ovl.fmt.RSY.dl2,
12815 ovl.fmt.RSY.dh2); goto ok;
12816 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12817 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12818 ovl.fmt.RSY.dl2,
12819 ovl.fmt.RSY.dh2); goto ok;
12820 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12821 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12822 ovl.fmt.RSY.dl2,
12823 ovl.fmt.RSY.dh2); goto ok;
12824 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12825 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12826 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12827 ovl.fmt.RSY.dl2,
12828 ovl.fmt.RSY.dh2); goto ok;
12829 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12830 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12831 ovl.fmt.RSY.dl2,
12832 ovl.fmt.RSY.dh2); goto ok;
12833 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12834 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12835 ovl.fmt.RSY.dl2,
12836 ovl.fmt.RSY.dh2); goto ok;
12837 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12838 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12839 ovl.fmt.RSY.dl2,
12840 ovl.fmt.RSY.dh2); goto ok;
12841 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12842 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12843 ovl.fmt.RSY.dl2,
12844 ovl.fmt.RSY.dh2); goto ok;
12845 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12846 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12847 ovl.fmt.RSY.dl2,
12848 ovl.fmt.RSY.dh2); goto ok;
12849 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12850 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12851 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12852 ovl.fmt.RSY.dl2,
12853 ovl.fmt.RSY.dh2); goto ok;
12854 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12855 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12856 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12857 ovl.fmt.RSY.dh2); goto ok;
12858 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12859 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12860 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12861 ovl.fmt.RSY.dh2); goto ok;
12862 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12863 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12864 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12865 ovl.fmt.RSY.dl2,
12866 ovl.fmt.RSY.dh2); goto ok;
12867 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12868 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12869 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12870 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12871 ovl.fmt.RSY.dl2,
12872 ovl.fmt.RSY.dh2); goto ok;
12873 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12874 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12875 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12876 ovl.fmt.RSY.dh2); goto ok;
12877 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12878 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12879 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12880 ovl.fmt.SIY.dh1); goto ok;
12881 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12882 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12883 ovl.fmt.SIY.dh1); goto ok;
12884 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12885 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12886 ovl.fmt.SIY.dh1); goto ok;
12887 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12888 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12889 ovl.fmt.SIY.dh1); goto ok;
12890 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12891 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12892 ovl.fmt.SIY.dh1); goto ok;
12893 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12894 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12895 ovl.fmt.SIY.dh1); goto ok;
12896 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12897 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12898 ovl.fmt.SIY.dh1); goto ok;
12899 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12900 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12901 ovl.fmt.SIY.dh1); goto ok;
12902 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12903 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12904 ovl.fmt.SIY.dh1); goto ok;
12905 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12906 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12907 ovl.fmt.SIY.dh1); goto ok;
12908 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12909 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12910 ovl.fmt.RSY.dl2,
12911 ovl.fmt.RSY.dh2); goto ok;
12912 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12913 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12914 ovl.fmt.RSY.dl2,
12915 ovl.fmt.RSY.dh2); goto ok;
12916 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12917 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12918 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12919 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12920 ovl.fmt.RSY.dl2,
12921 ovl.fmt.RSY.dh2); goto ok;
12922 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12923 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12924 ovl.fmt.RSY.dl2,
12925 ovl.fmt.RSY.dh2); goto ok;
12926 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12927 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12928 ovl.fmt.RSY.dl2,
12929 ovl.fmt.RSY.dh2); goto ok;
12930 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12931 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12932 ovl.fmt.RSY.dl2,
12933 ovl.fmt.RSY.dh2); goto ok;
12934 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12935 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12936 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12937 ovl.fmt.RSY.dh2); goto ok;
12938 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12939 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12940 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12941 ovl.fmt.RSY.dl2,
12942 ovl.fmt.RSY.dh2); goto ok;
12943 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12944 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12945 ovl.fmt.RSY.dl2,
12946 ovl.fmt.RSY.dh2); goto ok;
12947 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12948 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12949 ovl.fmt.RSY.dl2,
12950 ovl.fmt.RSY.dh2); goto ok;
12951 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12952 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12953 ovl.fmt.RSY.dl2,
12954 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012955 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12956 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12957 ovl.fmt.RSY.dl2,
12958 ovl.fmt.RSY.dh2,
12959 S390_XMNM_LOCG); goto ok;
12960 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12961 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12962 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12963 ovl.fmt.RSY.dh2,
12964 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012965 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12966 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12967 ovl.fmt.RSY.dl2,
12968 ovl.fmt.RSY.dh2); goto ok;
12969 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12970 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12971 ovl.fmt.RSY.dl2,
12972 ovl.fmt.RSY.dh2); goto ok;
12973 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12974 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12975 ovl.fmt.RSY.dl2,
12976 ovl.fmt.RSY.dh2); goto ok;
12977 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12978 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12979 ovl.fmt.RSY.dl2,
12980 ovl.fmt.RSY.dh2); goto ok;
12981 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12982 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12983 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12984 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012985 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12986 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12987 ovl.fmt.RSY.dl2,
12988 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12989 goto ok;
12990 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12991 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12992 ovl.fmt.RSY.dl2,
12993 ovl.fmt.RSY.dh2,
12994 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012995 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12996 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12997 ovl.fmt.RSY.dl2,
12998 ovl.fmt.RSY.dh2); goto ok;
12999 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
13000 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13001 ovl.fmt.RSY.dl2,
13002 ovl.fmt.RSY.dh2); goto ok;
13003 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
13004 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13005 ovl.fmt.RSY.dl2,
13006 ovl.fmt.RSY.dh2); goto ok;
13007 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
13008 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13009 ovl.fmt.RSY.dl2,
13010 ovl.fmt.RSY.dh2); goto ok;
13011 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
13012 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13013 ovl.fmt.RSY.dl2,
13014 ovl.fmt.RSY.dh2); goto ok;
13015 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
13016 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13017 goto ok;
13018 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
13019 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13020 goto ok;
13021 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
13022 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
13023 ovl.fmt.RIE_RRUUU.r1,
13024 ovl.fmt.RIE_RRUUU.r2,
13025 ovl.fmt.RIE_RRUUU.i3,
13026 ovl.fmt.RIE_RRUUU.i4,
13027 ovl.fmt.RIE_RRUUU.i5);
13028 goto ok;
13029 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
13030 ovl.fmt.RIE_RRUUU.r1,
13031 ovl.fmt.RIE_RRUUU.r2,
13032 ovl.fmt.RIE_RRUUU.i3,
13033 ovl.fmt.RIE_RRUUU.i4,
13034 ovl.fmt.RIE_RRUUU.i5);
13035 goto ok;
13036 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
13037 ovl.fmt.RIE_RRUUU.r1,
13038 ovl.fmt.RIE_RRUUU.r2,
13039 ovl.fmt.RIE_RRUUU.i3,
13040 ovl.fmt.RIE_RRUUU.i4,
13041 ovl.fmt.RIE_RRUUU.i5);
13042 goto ok;
13043 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
13044 ovl.fmt.RIE_RRUUU.r1,
13045 ovl.fmt.RIE_RRUUU.r2,
13046 ovl.fmt.RIE_RRUUU.i3,
13047 ovl.fmt.RIE_RRUUU.i4,
13048 ovl.fmt.RIE_RRUUU.i5);
13049 goto ok;
13050 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13051 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13052 ovl.fmt.RIE_RRPU.r1,
13053 ovl.fmt.RIE_RRPU.r2,
13054 ovl.fmt.RIE_RRPU.i4,
13055 ovl.fmt.RIE_RRPU.m3); goto ok;
13056 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13057 ovl.fmt.RIE_RRPU.r1,
13058 ovl.fmt.RIE_RRPU.r2,
13059 ovl.fmt.RIE_RRPU.i4,
13060 ovl.fmt.RIE_RRPU.m3); goto ok;
13061 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13062 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13063 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13064 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13065 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13066 ovl.fmt.RIE_RRPU.r1,
13067 ovl.fmt.RIE_RRPU.r2,
13068 ovl.fmt.RIE_RRPU.i4,
13069 ovl.fmt.RIE_RRPU.m3); goto ok;
13070 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13071 ovl.fmt.RIE_RRPU.r1,
13072 ovl.fmt.RIE_RRPU.r2,
13073 ovl.fmt.RIE_RRPU.i4,
13074 ovl.fmt.RIE_RRPU.m3); goto ok;
13075 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13076 ovl.fmt.RIEv3.r1,
13077 ovl.fmt.RIEv3.m3,
13078 ovl.fmt.RIEv3.i4,
13079 ovl.fmt.RIEv3.i2); goto ok;
13080 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13081 ovl.fmt.RIEv3.r1,
13082 ovl.fmt.RIEv3.m3,
13083 ovl.fmt.RIEv3.i4,
13084 ovl.fmt.RIEv3.i2); goto ok;
13085 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13086 ovl.fmt.RIEv3.r1,
13087 ovl.fmt.RIEv3.m3,
13088 ovl.fmt.RIEv3.i4,
13089 ovl.fmt.RIEv3.i2); goto ok;
13090 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13091 ovl.fmt.RIEv3.r1,
13092 ovl.fmt.RIEv3.m3,
13093 ovl.fmt.RIEv3.i4,
13094 ovl.fmt.RIEv3.i2); goto ok;
13095 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13096 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13097 goto ok;
13098 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13099 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13100 ovl.fmt.RIE.i2); goto ok;
13101 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13102 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13103 ovl.fmt.RIE.i2); goto ok;
13104 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13105 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13106 ovl.fmt.RIE.i2); goto ok;
13107 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13108 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13109 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13110 goto ok;
13111 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13112 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13113 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13114 goto ok;
13115 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13116 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13117 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13118 goto ok;
13119 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13120 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13121 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13122 goto ok;
13123 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13124 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13125 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13126 ovl.fmt.RIS.i2); goto ok;
13127 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13128 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13129 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13130 ovl.fmt.RIS.i2); goto ok;
13131 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13132 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13133 ovl.fmt.RIS.d4,
13134 ovl.fmt.RIS.i2); goto ok;
13135 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13136 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13137 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13138 ovl.fmt.RIS.i2); goto ok;
13139 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13140 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13141 ovl.fmt.RXE.d2); goto ok;
13142 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13143 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13144 ovl.fmt.RXE.d2); goto ok;
13145 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13146 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13147 ovl.fmt.RXE.d2); goto ok;
13148 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13149 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13150 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13151 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13152 ovl.fmt.RXE.d2); goto ok;
13153 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13154 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13155 ovl.fmt.RXE.d2); goto ok;
13156 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13157 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13158 ovl.fmt.RXE.d2); goto ok;
13159 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13160 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13161 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13162 ovl.fmt.RXE.d2); goto ok;
13163 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13164 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13165 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13166 ovl.fmt.RXF.r1); goto ok;
13167 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13168 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13169 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13170 ovl.fmt.RXF.r1); goto ok;
13171 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13172 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13173 ovl.fmt.RXE.d2); goto ok;
13174 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13175 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13176 ovl.fmt.RXE.d2); goto ok;
13177 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13178 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13179 ovl.fmt.RXE.d2); goto ok;
13180 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13181 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13182 ovl.fmt.RXE.d2); goto ok;
13183 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13184 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13185 ovl.fmt.RXE.d2); goto ok;
13186 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13187 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13188 ovl.fmt.RXE.d2); goto ok;
13189 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13190 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13191 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13192 ovl.fmt.RXE.d2); goto ok;
13193 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13194 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13195 ovl.fmt.RXE.d2); goto ok;
13196 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13197 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13198 ovl.fmt.RXE.d2); goto ok;
13199 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13200 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13201 ovl.fmt.RXE.d2); goto ok;
13202 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13203 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13204 ovl.fmt.RXE.d2); goto ok;
13205 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13206 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13207 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13208 ovl.fmt.RXF.r1); goto ok;
13209 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13210 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13211 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13212 ovl.fmt.RXF.r1); goto ok;
13213 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13214 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13215 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13216 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13217 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13218 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13219 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13220 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13221 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13222 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13223 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13224 case 0xed000000003bULL: /* MY */ goto unimplemented;
13225 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13226 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13227 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13228 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13229 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13230 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13231 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13232 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13233 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13234 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13235 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13236 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13237 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13238 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13239 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13240 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13241 ovl.fmt.RXY.dl2,
13242 ovl.fmt.RXY.dh2); goto ok;
13243 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13244 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13245 ovl.fmt.RXY.dl2,
13246 ovl.fmt.RXY.dh2); goto ok;
13247 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13248 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13249 ovl.fmt.RXY.dl2,
13250 ovl.fmt.RXY.dh2); goto ok;
13251 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13252 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13253 ovl.fmt.RXY.dl2,
13254 ovl.fmt.RXY.dh2); goto ok;
13255 }
13256
13257 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13258 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13259 ovl.fmt.RIL.i2); goto ok;
13260 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13261 ovl.fmt.RIL.i2); goto ok;
13262 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13263 ovl.fmt.RIL.i2); goto ok;
13264 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13265 ovl.fmt.RIL.i2); goto ok;
13266 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13267 ovl.fmt.RIL.i2); goto ok;
13268 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13269 ovl.fmt.RIL.i2); goto ok;
13270 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13271 ovl.fmt.RIL.i2); goto ok;
13272 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13273 ovl.fmt.RIL.i2); goto ok;
13274 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13275 ovl.fmt.RIL.i2); goto ok;
13276 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13277 ovl.fmt.RIL.i2); goto ok;
13278 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13279 ovl.fmt.RIL.i2); goto ok;
13280 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13281 ovl.fmt.RIL.i2); goto ok;
13282 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13283 ovl.fmt.RIL.i2); goto ok;
13284 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13285 ovl.fmt.RIL.i2); goto ok;
13286 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13287 ovl.fmt.RIL.i2); goto ok;
13288 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13289 ovl.fmt.RIL.i2); goto ok;
13290 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13291 ovl.fmt.RIL.i2); goto ok;
13292 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13293 ovl.fmt.RIL.i2); goto ok;
13294 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13295 ovl.fmt.RIL.i2); goto ok;
13296 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13297 ovl.fmt.RIL.i2); goto ok;
13298 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13299 ovl.fmt.RIL.i2); goto ok;
13300 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13301 ovl.fmt.RIL.i2); goto ok;
13302 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13303 ovl.fmt.RIL.i2); goto ok;
13304 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13305 ovl.fmt.RIL.i2); goto ok;
13306 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13307 ovl.fmt.RIL.i2); goto ok;
13308 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13309 ovl.fmt.RIL.i2); goto ok;
13310 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13311 ovl.fmt.RIL.i2); goto ok;
13312 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13313 ovl.fmt.RIL.i2); goto ok;
13314 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13315 ovl.fmt.RIL.i2); goto ok;
13316 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13317 ovl.fmt.RIL.i2); goto ok;
13318 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13319 ovl.fmt.RIL.i2); goto ok;
13320 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13321 ovl.fmt.RIL.i2); goto ok;
13322 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13323 ovl.fmt.RIL.i2); goto ok;
13324 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13325 ovl.fmt.RIL.i2); goto ok;
13326 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13327 ovl.fmt.RIL.i2); goto ok;
13328 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13329 ovl.fmt.RIL.i2); goto ok;
13330 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13331 ovl.fmt.RIL.i2); goto ok;
13332 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13333 ovl.fmt.RIL.i2); goto ok;
13334 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13335 ovl.fmt.RIL.i2); goto ok;
13336 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13337 ovl.fmt.RIL.i2); goto ok;
13338 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13339 ovl.fmt.RIL.i2); goto ok;
13340 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13341 ovl.fmt.RIL.i2); goto ok;
13342 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13343 ovl.fmt.RIL.i2); goto ok;
13344 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13345 ovl.fmt.RIL.i2); goto ok;
13346 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13347 ovl.fmt.RIL.i2); goto ok;
13348 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13349 ovl.fmt.RIL.i2); goto ok;
13350 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13351 ovl.fmt.RIL.i2); goto ok;
13352 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13353 ovl.fmt.RIL.i2); goto ok;
13354 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13355 ovl.fmt.RIL.i2); goto ok;
13356 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13357 case 0xc801ULL: /* ECTG */ goto unimplemented;
13358 case 0xc802ULL: /* CSST */ goto unimplemented;
13359 case 0xc804ULL: /* LPD */ goto unimplemented;
13360 case 0xc805ULL: /* LPDG */ goto unimplemented;
13361 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13362 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13363 ovl.fmt.RIL.i2); goto ok;
13364 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13365 ovl.fmt.RIL.i2); goto ok;
13366 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13367 ovl.fmt.RIL.i2); goto ok;
13368 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13369 ovl.fmt.RIL.i2); goto ok;
13370 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13371 ovl.fmt.RIL.i2); goto ok;
13372 }
13373
13374 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13375 case 0xd0ULL: /* TRTR */ goto unimplemented;
13376 case 0xd1ULL: /* MVN */ goto unimplemented;
13377 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13378 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13379 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13380 case 0xd3ULL: /* MVZ */ goto unimplemented;
13381 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13382 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13383 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13384 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13385 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13386 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13387 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13388 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13389 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013390 case 0xd7ULL:
13391 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13392 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13393 else
13394 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13395 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13396 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13397 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013398 case 0xd9ULL: /* MVCK */ goto unimplemented;
13399 case 0xdaULL: /* MVCP */ goto unimplemented;
13400 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013401 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13402 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13403 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013404 case 0xddULL: /* TRT */ goto unimplemented;
13405 case 0xdeULL: /* ED */ goto unimplemented;
13406 case 0xdfULL: /* EDMK */ goto unimplemented;
13407 case 0xe1ULL: /* PKU */ goto unimplemented;
13408 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13409 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13410 case 0xe9ULL: /* PKA */ goto unimplemented;
13411 case 0xeaULL: /* UNPKA */ goto unimplemented;
13412 case 0xeeULL: /* PLO */ goto unimplemented;
13413 case 0xefULL: /* LMD */ goto unimplemented;
13414 case 0xf0ULL: /* SRP */ goto unimplemented;
13415 case 0xf1ULL: /* MVO */ goto unimplemented;
13416 case 0xf2ULL: /* PACK */ goto unimplemented;
13417 case 0xf3ULL: /* UNPK */ goto unimplemented;
13418 case 0xf8ULL: /* ZAP */ goto unimplemented;
13419 case 0xf9ULL: /* CP */ goto unimplemented;
13420 case 0xfaULL: /* AP */ goto unimplemented;
13421 case 0xfbULL: /* SP */ goto unimplemented;
13422 case 0xfcULL: /* MP */ goto unimplemented;
13423 case 0xfdULL: /* DP */ goto unimplemented;
13424 }
13425
13426 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13427 case 0xe500ULL: /* LASP */ goto unimplemented;
13428 case 0xe501ULL: /* TPROT */ goto unimplemented;
13429 case 0xe502ULL: /* STRAG */ goto unimplemented;
13430 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13431 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13432 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13433 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13434 goto ok;
13435 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13436 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13437 goto ok;
13438 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13439 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13440 goto ok;
13441 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13442 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13443 goto ok;
13444 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13445 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13446 goto ok;
13447 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13448 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13449 goto ok;
13450 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13451 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13452 goto ok;
13453 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13454 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13455 goto ok;
13456 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13457 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13458 goto ok;
13459 }
13460
13461 return S390_DECODE_UNKNOWN_INSN;
13462
13463ok:
13464 return S390_DECODE_OK;
13465
13466unimplemented:
13467 return S390_DECODE_UNIMPLEMENTED_INSN;
13468}
13469
13470/* Handle "special" instructions. */
13471static s390_decode_t
13472s390_decode_special_and_irgen(UChar *bytes)
13473{
13474 s390_decode_t status = S390_DECODE_OK;
13475
13476 /* Got a "Special" instruction preamble. Which one is it? */
13477 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13478 s390_irgen_client_request();
13479 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13480 s390_irgen_guest_NRADDR();
13481 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13482 s390_irgen_call_noredir();
13483 } else {
13484 /* We don't know what it is. */
13485 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13486 }
13487
13488 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13489
13490 return status;
13491}
13492
13493
13494/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013495static UInt
sewardj2019a972011-03-07 16:04:07 +000013496s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13497{
13498 s390_decode_t status;
13499
13500 dis_res = dres;
13501
13502 /* Spot the 8-byte preamble: 18ff lr r15,r15
13503 1811 lr r1,r1
13504 1822 lr r2,r2
13505 1833 lr r3,r3 */
13506 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13507 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13508 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13509
13510 /* Handle special instruction that follows that preamble. */
13511 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013512
13513 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13514 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13515
13516 status =
13517 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013518 } else {
13519 /* Handle normal instructions. */
13520 switch (insn_length) {
13521 case 2:
13522 status = s390_decode_2byte_and_irgen(bytes);
13523 break;
13524
13525 case 4:
13526 status = s390_decode_4byte_and_irgen(bytes);
13527 break;
13528
13529 case 6:
13530 status = s390_decode_6byte_and_irgen(bytes);
13531 break;
13532
13533 default:
13534 status = S390_DECODE_ERROR;
13535 break;
13536 }
13537 }
florian5fcbba22011-07-27 20:40:22 +000013538 /* If next instruction is execute, stop here */
florianf9e1ed72012-04-17 02:41:56 +000013539 if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) {
13540 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013541 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000013542 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +000013543 }
13544
13545 if (status == S390_DECODE_OK) return insn_length; /* OK */
13546
13547 /* Decoding failed somehow */
13548 vex_printf("vex s390->IR: ");
13549 switch (status) {
13550 case S390_DECODE_UNKNOWN_INSN:
13551 vex_printf("unknown insn: ");
13552 break;
13553
13554 case S390_DECODE_UNIMPLEMENTED_INSN:
13555 vex_printf("unimplemented insn: ");
13556 break;
13557
13558 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13559 vex_printf("unimplemented special insn: ");
13560 break;
13561
13562 default:
13563 case S390_DECODE_ERROR:
13564 vex_printf("decoding error: ");
13565 break;
13566 }
13567
13568 vex_printf("%02x%02x", bytes[0], bytes[1]);
13569 if (insn_length > 2) {
13570 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13571 }
13572 if (insn_length > 4) {
13573 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13574 }
13575 vex_printf("\n");
13576
13577 return 0; /* Failed */
13578}
13579
13580
sewardj2019a972011-03-07 16:04:07 +000013581/* Disassemble a single instruction INSN into IR. */
13582static DisResult
florian420c5012011-07-22 02:12:28 +000013583disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013584{
13585 UChar byte;
13586 UInt insn_length;
13587 DisResult dres;
13588
13589 /* ---------------------------------------------------- */
13590 /* --- Compute instruction length -- */
13591 /* ---------------------------------------------------- */
13592
13593 /* Get the first byte of the insn. */
13594 byte = insn[0];
13595
13596 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13597 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13598 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13599
13600 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13601
13602 /* ---------------------------------------------------- */
13603 /* --- Initialise the DisResult data -- */
13604 /* ---------------------------------------------------- */
13605 dres.whatNext = Dis_Continue;
13606 dres.len = insn_length;
13607 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013608 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013609
floriana99f20e2011-07-17 14:16:41 +000013610 /* fixs390: consider chasing of conditional jumps */
13611
sewardj2019a972011-03-07 16:04:07 +000013612 /* Normal and special instruction handling starts here. */
13613 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13614 /* All decode failures end up here. The decoder has already issued an
13615 error message.
13616 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013617 not been executed, and (is currently) the next to be executed. */
florian65b5b3f2012-04-22 02:51:27 +000013618 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013619
florian8844a632012-04-13 04:04:06 +000013620 dres.whatNext = Dis_StopHere;
13621 dres.jk_StopHere = Ijk_NoDecode;
13622 dres.continueAt = 0;
13623 dres.len = 0;
13624 } else {
13625 /* Decode success */
13626 switch (dres.whatNext) {
13627 case Dis_Continue:
florian8559e412012-04-19 14:23:48 +000013628 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +000013629 break;
13630 case Dis_ResteerU:
13631 case Dis_ResteerC:
13632 put_IA(mkaddr_expr(dres.continueAt));
13633 break;
13634 case Dis_StopHere:
13635 break;
13636 default:
13637 vassert(0);
13638 }
sewardj2019a972011-03-07 16:04:07 +000013639 }
13640
13641 return dres;
13642}
13643
13644
13645/*------------------------------------------------------------*/
13646/*--- Top-level fn ---*/
13647/*------------------------------------------------------------*/
13648
13649/* Disassemble a single instruction into IR. The instruction
13650 is located in host memory at &guest_code[delta]. */
13651
13652DisResult
13653disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013654 Bool (*resteerOkFn)(void *, Addr64),
13655 Bool resteerCisOk,
13656 void *callback_opaque,
13657 UChar *guest_code,
13658 Long delta,
13659 Addr64 guest_IP,
13660 VexArch guest_arch,
13661 VexArchInfo *archinfo,
13662 VexAbiInfo *abiinfo,
13663 Bool host_bigendian)
13664{
13665 vassert(guest_arch == VexArchS390X);
13666
13667 /* The instruction decoder requires a big-endian machine. */
13668 vassert(host_bigendian == True);
13669
13670 /* Set globals (see top of this file) */
13671 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013672 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013673 resteer_fn = resteerOkFn;
13674 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013675
florian420c5012011-07-22 02:12:28 +000013676 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013677}
13678
13679/*---------------------------------------------------------------*/
13680/*--- end guest_s390_toIR.c ---*/
13681/*---------------------------------------------------------------*/