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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 3c7524b6731765de777b8044f7308c2c63a4b873 / . / asoc / sm6150.c
blob: 4c86706a97a073e582d88448d78ad0e453615096 [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]2/*
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]17#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]24#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]25#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Meng Wang11a25cf2018-10-31 14:11:26 +0800[diff] [blame]30#include <asoc/msm-cdc-pinctrl.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]31#include "codecs/wcd934x/wcd934x.h"
32#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]34#include "codecs/wsa881x.h"
35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]37#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]38#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]39
40#define DRV_NAME "sm6150-asoc-snd"
41
42#define __CHIPSET__ "SM6150 "
43#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
44
45#define SAMPLING_RATE_8KHZ 8000
46#define SAMPLING_RATE_11P025KHZ 11025
47#define SAMPLING_RATE_16KHZ 16000
48#define SAMPLING_RATE_22P05KHZ 22050
49#define SAMPLING_RATE_32KHZ 32000
50#define SAMPLING_RATE_44P1KHZ 44100
51#define SAMPLING_RATE_48KHZ 48000
52#define SAMPLING_RATE_88P2KHZ 88200
53#define SAMPLING_RATE_96KHZ 96000
54#define SAMPLING_RATE_176P4KHZ 176400
55#define SAMPLING_RATE_192KHZ 192000
56#define SAMPLING_RATE_352P8KHZ 352800
57#define SAMPLING_RATE_384KHZ 384000
58
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define CODEC_EXT_CLK_RATE 9600000
62#define ADSP_STATE_READY_TIMEOUT_MS 3000
63#define DEV_NAME_STR_LEN 32
64
65#define WSA8810_NAME_1 "wsa881x.20170211"
66#define WSA8810_NAME_2 "wsa881x.20170212"
67#define WCN_CDC_SLIM_RX_CH_MAX 2
68#define WCN_CDC_SLIM_TX_CH_MAX 3
69#define TDM_CHANNEL_MAX 8
70
71#define ADSP_STATE_READY_TIMEOUT_MS 3000
72#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
73#define MSM_HIFI_ON 1
74
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]75#define SM6150_SOC_VERSION_1_0 0x00010000
76#define SM6150_SOC_MSM_ID 0x163
77
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]78enum {
79 SLIM_RX_0 = 0,
80 SLIM_RX_1,
81 SLIM_RX_2,
82 SLIM_RX_3,
83 SLIM_RX_4,
84 SLIM_RX_5,
85 SLIM_RX_6,
86 SLIM_RX_7,
87 SLIM_RX_MAX,
88};
89enum {
90 SLIM_TX_0 = 0,
91 SLIM_TX_1,
92 SLIM_TX_2,
93 SLIM_TX_3,
94 SLIM_TX_4,
95 SLIM_TX_5,
96 SLIM_TX_6,
97 SLIM_TX_7,
98 SLIM_TX_8,
99 SLIM_TX_MAX,
100};
101
102enum {
103 PRIM_MI2S = 0,
104 SEC_MI2S,
105 TERT_MI2S,
106 QUAT_MI2S,
107 QUIN_MI2S,
108 MI2S_MAX,
109};
110
111enum {
112 PRIM_AUX_PCM = 0,
113 SEC_AUX_PCM,
114 TERT_AUX_PCM,
115 QUAT_AUX_PCM,
116 QUIN_AUX_PCM,
117 AUX_PCM_MAX,
118};
119
120enum {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]121 TDM_0 = 0,
122 TDM_1,
123 TDM_2,
124 TDM_3,
125 TDM_4,
126 TDM_5,
127 TDM_6,
128 TDM_7,
129 TDM_PORT_MAX,
130};
131
132enum {
133 TDM_PRI = 0,
134 TDM_SEC,
135 TDM_TERT,
136 TDM_QUAT,
137 TDM_QUIN,
138 TDM_INTERFACE_MAX,
139};
140
141struct tdm_port {
142 u32 mode;
143 u32 channel;
144};
145
146enum {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]147 WSA_CDC_DMA_RX_0 = 0,
148 WSA_CDC_DMA_RX_1,
149 RX_CDC_DMA_RX_0,
150 RX_CDC_DMA_RX_1,
151 RX_CDC_DMA_RX_2,
152 RX_CDC_DMA_RX_3,
153 RX_CDC_DMA_RX_5,
154 CDC_DMA_RX_MAX,
155};
156
157enum {
158 WSA_CDC_DMA_TX_0 = 0,
159 WSA_CDC_DMA_TX_1,
160 WSA_CDC_DMA_TX_2,
161 TX_CDC_DMA_TX_0,
162 TX_CDC_DMA_TX_3,
163 TX_CDC_DMA_TX_4,
164 CDC_DMA_TX_MAX,
165};
166
167struct mi2s_conf {
168 struct mutex lock;
169 u32 ref_cnt;
170 u32 msm_is_mi2s_master;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]171 u32 msm_is_ext_mclk;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]172};
173
174static u32 mi2s_ebit_clk[MI2S_MAX] = {
175 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
176 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
177 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
178 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
179 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
180};
181
182struct dev_config {
183 u32 sample_rate;
184 u32 bit_format;
185 u32 channels;
186};
187
188enum {
189 DP_RX_IDX = 0,
190 EXT_DISP_RX_IDX_MAX,
191};
192
193struct msm_wsa881x_dev_info {
194 struct device_node *of_node;
195 u32 index;
196};
197
198struct aux_codec_dev_info {
199 struct device_node *of_node;
200 u32 index;
201};
202
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]203struct msm_asoc_mach_data {
204 struct snd_info_entry *codec_root;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]205 int usbc_en2_gpio; /* used by gpio driver API */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]206 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]207 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
208 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
209 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
210 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
211 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
212 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]213 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]214 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]215};
216
217struct msm_asoc_wcd93xx_codec {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]218 void* (*get_afe_config_fn)(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]219 enum afe_config_type config_type);
220};
221
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]222static struct snd_soc_card snd_soc_card_sm6150_msm;
223
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]224/* TDM default config */
225static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
226 { /* PRI TDM */
227 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
228 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
229 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
230 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
231 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
232 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
233 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
234 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
235 },
236 { /* SEC TDM */
237 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
238 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
239 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
240 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
241 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
242 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
245 },
246 { /* TERT TDM */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
255 },
256 { /* QUAT TDM */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
265 },
266 { /* QUIN TDM */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
275 }
276
277};
278
279/* TDM default config */
280static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
281 { /* PRI TDM */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
290 },
291 { /* SEC TDM */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
300 },
301 { /* TERT TDM */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
310 },
311 { /* QUAT TDM */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
320 },
321 { /* QUIN TDM */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
330 }
331};
332
333
334/* Default configuration of slimbus channels */
335static struct dev_config slim_rx_cfg[] = {
336 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
337 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
338 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
339 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
340 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
341 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
342 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
343 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
344};
345
346static struct dev_config slim_tx_cfg[] = {
347 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
348 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
349 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
350 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
351 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
352 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
356};
357
358/* Default configuration of Codec DMA Interface Tx */
359static struct dev_config cdc_dma_rx_cfg[] = {
360 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
361 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
362 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
363 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
364 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
365 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
366 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
367};
368
369/* Default configuration of Codec DMA Interface Rx */
370static struct dev_config cdc_dma_tx_cfg[] = {
371 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377};
378
379/* Default configuration of external display BE */
380static struct dev_config ext_disp_rx_cfg[] = {
381 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382};
383
384static struct dev_config usb_rx_cfg = {
385 .sample_rate = SAMPLING_RATE_48KHZ,
386 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
387 .channels = 2,
388};
389
390static struct dev_config usb_tx_cfg = {
391 .sample_rate = SAMPLING_RATE_48KHZ,
392 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
393 .channels = 1,
394};
395
396static struct dev_config proxy_rx_cfg = {
397 .sample_rate = SAMPLING_RATE_48KHZ,
398 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
399 .channels = 2,
400};
401
402/* Default configuration of MI2S channels */
403static struct dev_config mi2s_rx_cfg[] = {
404 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
405 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
406 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
407 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
408 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
409};
410
411static struct dev_config mi2s_tx_cfg[] = {
412 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
413 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
414 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
415 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
416 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
417};
418
419static struct dev_config aux_pcm_rx_cfg[] = {
420 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
421 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
422 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
423 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
424 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
425};
426
427static struct dev_config aux_pcm_tx_cfg[] = {
428 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433};
434static int msm_vi_feed_tx_ch = 2;
435static const char *const slim_rx_ch_text[] = {"One", "Two"};
436static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
437 "Five", "Six", "Seven",
438 "Eight"};
439static const char *const vi_feed_ch_text[] = {"One", "Two"};
440static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
441 "S32_LE"};
442static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
443 "S24_3LE"};
444static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
445 "KHZ_32", "KHZ_44P1", "KHZ_48",
446 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
447 "KHZ_192", "KHZ_352P8", "KHZ_384"};
448static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
449 "KHZ_44P1", "KHZ_48",
450 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]451static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
452 "KHZ_44P1", "KHZ_48",
453 "KHZ_88P2", "KHZ_96"};
454static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
455 "KHZ_44P1", "KHZ_48",
456 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]457static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
458 "Five", "Six", "Seven",
459 "Eight"};
460static char const *ch_text[] = {"Two", "Three", "Four", "Five",
461 "Six", "Seven", "Eight"};
462static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
463 "KHZ_16", "KHZ_22P05",
464 "KHZ_32", "KHZ_44P1", "KHZ_48",
465 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
466 "KHZ_192", "KHZ_352P8", "KHZ_384"};
467static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
468 "KHZ_192", "KHZ_32", "KHZ_44P1",
469 "KHZ_88P2", "KHZ_176P4" };
470static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
471 "Five", "Six", "Seven", "Eight"};
472static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
473static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
474 "KHZ_48", "KHZ_176P4",
475 "KHZ_352P8"};
476static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
477static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
478 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
479 "KHZ_48", "KHZ_96", "KHZ_192"};
480static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
481 "Five", "Six", "Seven",
482 "Eight"};
483static const char *const hifi_text[] = {"Off", "On"};
484static const char *const qos_text[] = {"Disable", "Enable"};
485
486static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
487static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
488 "Five", "Six", "Seven",
489 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]490static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
491 "KHZ_16", "KHZ_22P05",
492 "KHZ_32", "KHZ_44P1", "KHZ_48",
493 "KHZ_88P2", "KHZ_96",
494 "KHZ_176P4", "KHZ_192",
495 "KHZ_352P8", "KHZ_384"};
496
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]497
498static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
510static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
517static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
518static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
521static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]522static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
523static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]524static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
527 ext_disp_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
529static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
530static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
555static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
556static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
557static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
559static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
565static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
566static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
567static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
568static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
569static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
583static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
588static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
589static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
590static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
595 cdc_dma_sample_rate_text);
596static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
597 cdc_dma_sample_rate_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
599 cdc_dma_sample_rate_text);
600static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
601 cdc_dma_sample_rate_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
603 cdc_dma_sample_rate_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
619 cdc_dma_sample_rate_text);
620
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]621static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]622static bool codec_reg_done;
623static struct snd_soc_aux_dev *msm_aux_dev;
624static struct snd_soc_codec_conf *msm_codec_conf;
625static struct msm_asoc_wcd93xx_codec msm_codec_fn;
626
627static int dmic_0_1_gpio_cnt;
628static int dmic_2_3_gpio_cnt;
629
630static void *def_wcd_mbhc_cal(void);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]631static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]632 int enable, bool dapm);
633static int msm_wsa881x_init(struct snd_soc_component *component);
634static int msm_aux_codec_init(struct snd_soc_component *component);
635
636/*
637 * Need to report LINEIN
638 * if R/L channel impedance is larger than 5K ohm
639 */
640static struct wcd_mbhc_config wcd_mbhc_cfg = {
641 .read_fw_bin = false,
642 .calibration = NULL,
643 .detect_extn_cable = true,
644 .mono_stero_detection = false,
645 .swap_gnd_mic = NULL,
646 .hs_ext_micbias = true,
647 .key_code[0] = KEY_MEDIA,
648 .key_code[1] = KEY_VOICECOMMAND,
649 .key_code[2] = KEY_VOLUMEUP,
650 .key_code[3] = KEY_VOLUMEDOWN,
651 .key_code[4] = 0,
652 .key_code[5] = 0,
653 .key_code[6] = 0,
654 .key_code[7] = 0,
655 .linein_th = 5000,
Vatsal Bucha3c7524b2019-01-11 14:51:52 +0530[diff] [blame^]656 .moisture_en = false,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]657 .mbhc_micbias = MIC_BIAS_2,
658 .anc_micbias = MIC_BIAS_2,
659 .enable_anc_mic_detect = false,
Vatsal Bucha3c7524b2019-01-11 14:51:52 +0530[diff] [blame^]660 .moisture_duty_cycle_en = true,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]661};
662
663static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
664 {"MIC BIAS1", NULL, "MCLK TX"},
665 {"MIC BIAS2", NULL, "MCLK TX"},
666 {"MIC BIAS3", NULL, "MCLK TX"},
667 {"MIC BIAS4", NULL, "MCLK TX"},
668};
669
670static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
671 {
672 AFE_API_VERSION_I2S_CONFIG,
673 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
674 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
675 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
676 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
677 0,
678 },
679 {
680 AFE_API_VERSION_I2S_CONFIG,
681 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
682 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
683 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
684 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
685 0,
686 },
687 {
688 AFE_API_VERSION_I2S_CONFIG,
689 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
690 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
691 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
692 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
693 0,
694 },
695 {
696 AFE_API_VERSION_I2S_CONFIG,
697 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
698 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
699 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
700 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
701 0,
702 },
703 {
704 AFE_API_VERSION_I2S_CONFIG,
705 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
706 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
707 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
708 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
709 0,
710 }
711
712};
713
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]714static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
715 {
716 AFE_API_VERSION_I2S_CONFIG,
717 Q6AFE_LPASS_CLK_ID_MCLK_3,
718 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
719 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
720 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
721 0,
722 },
723 {
724 AFE_API_VERSION_I2S_CONFIG,
725 Q6AFE_LPASS_CLK_ID_MCLK_2,
726 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
727 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
728 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
729 0,
730 },
731 {
732 AFE_API_VERSION_I2S_CONFIG,
733 Q6AFE_LPASS_CLK_ID_MCLK_1,
734 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
735 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
736 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
737 0,
738 },
739 {
740 AFE_API_VERSION_I2S_CONFIG,
741 Q6AFE_LPASS_CLK_ID_MCLK_1,
742 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
743 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
744 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
745 0,
746 },
747 {
748 AFE_API_VERSION_I2S_CONFIG,
749 Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
750 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
751 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
752 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
753 0,
754 }
755};
756
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]757static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
758
759static int slim_get_sample_rate_val(int sample_rate)
760{
761 int sample_rate_val = 0;
762
763 switch (sample_rate) {
764 case SAMPLING_RATE_8KHZ:
765 sample_rate_val = 0;
766 break;
767 case SAMPLING_RATE_16KHZ:
768 sample_rate_val = 1;
769 break;
770 case SAMPLING_RATE_32KHZ:
771 sample_rate_val = 2;
772 break;
773 case SAMPLING_RATE_44P1KHZ:
774 sample_rate_val = 3;
775 break;
776 case SAMPLING_RATE_48KHZ:
777 sample_rate_val = 4;
778 break;
779 case SAMPLING_RATE_88P2KHZ:
780 sample_rate_val = 5;
781 break;
782 case SAMPLING_RATE_96KHZ:
783 sample_rate_val = 6;
784 break;
785 case SAMPLING_RATE_176P4KHZ:
786 sample_rate_val = 7;
787 break;
788 case SAMPLING_RATE_192KHZ:
789 sample_rate_val = 8;
790 break;
791 case SAMPLING_RATE_352P8KHZ:
792 sample_rate_val = 9;
793 break;
794 case SAMPLING_RATE_384KHZ:
795 sample_rate_val = 10;
796 break;
797 default:
798 sample_rate_val = 4;
799 break;
800 }
801 return sample_rate_val;
802}
803
804static int slim_get_sample_rate(int value)
805{
806 int sample_rate = 0;
807
808 switch (value) {
809 case 0:
810 sample_rate = SAMPLING_RATE_8KHZ;
811 break;
812 case 1:
813 sample_rate = SAMPLING_RATE_16KHZ;
814 break;
815 case 2:
816 sample_rate = SAMPLING_RATE_32KHZ;
817 break;
818 case 3:
819 sample_rate = SAMPLING_RATE_44P1KHZ;
820 break;
821 case 4:
822 sample_rate = SAMPLING_RATE_48KHZ;
823 break;
824 case 5:
825 sample_rate = SAMPLING_RATE_88P2KHZ;
826 break;
827 case 6:
828 sample_rate = SAMPLING_RATE_96KHZ;
829 break;
830 case 7:
831 sample_rate = SAMPLING_RATE_176P4KHZ;
832 break;
833 case 8:
834 sample_rate = SAMPLING_RATE_192KHZ;
835 break;
836 case 9:
837 sample_rate = SAMPLING_RATE_352P8KHZ;
838 break;
839 case 10:
840 sample_rate = SAMPLING_RATE_384KHZ;
841 break;
842 default:
843 sample_rate = SAMPLING_RATE_48KHZ;
844 break;
845 }
846 return sample_rate;
847}
848
849static int slim_get_bit_format_val(int bit_format)
850{
851 int val = 0;
852
853 switch (bit_format) {
854 case SNDRV_PCM_FORMAT_S32_LE:
855 val = 3;
856 break;
857 case SNDRV_PCM_FORMAT_S24_3LE:
858 val = 2;
859 break;
860 case SNDRV_PCM_FORMAT_S24_LE:
861 val = 1;
862 break;
863 case SNDRV_PCM_FORMAT_S16_LE:
864 default:
865 val = 0;
866 break;
867 }
868 return val;
869}
870
871static int slim_get_bit_format(int val)
872{
873 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
874
875 switch (val) {
876 case 0:
877 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
878 break;
879 case 1:
880 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
881 break;
882 case 2:
883 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
884 break;
885 case 3:
886 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
887 break;
888 default:
889 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
890 break;
891 }
892 return bit_fmt;
893}
894
895static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
896{
897 int port_id = 0;
898
899 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
900 port_id = SLIM_RX_0;
901 } else if (strnstr(kcontrol->id.name,
902 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
903 port_id = SLIM_RX_2;
904 } else if (strnstr(kcontrol->id.name,
905 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
906 port_id = SLIM_RX_5;
907 } else if (strnstr(kcontrol->id.name,
908 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
909 port_id = SLIM_RX_6;
910 } else if (strnstr(kcontrol->id.name,
911 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
912 port_id = SLIM_TX_0;
913 } else if (strnstr(kcontrol->id.name,
914 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
915 port_id = SLIM_TX_1;
916 } else {
917 pr_err("%s: unsupported channel: %s\n",
918 __func__, kcontrol->id.name);
919 return -EINVAL;
920 }
921
922 return port_id;
923}
924
925static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
926 struct snd_ctl_elem_value *ucontrol)
927{
928 int ch_num = slim_get_port_idx(kcontrol);
929
930 if (ch_num < 0)
931 return ch_num;
932
933 ucontrol->value.enumerated.item[0] =
934 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
935
936 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
937 ch_num, slim_rx_cfg[ch_num].sample_rate,
938 ucontrol->value.enumerated.item[0]);
939
940 return 0;
941}
942
943static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
944 struct snd_ctl_elem_value *ucontrol)
945{
946 int ch_num = slim_get_port_idx(kcontrol);
947
948 if (ch_num < 0)
949 return ch_num;
950
951 slim_rx_cfg[ch_num].sample_rate =
952 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
953
954 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
955 ch_num, slim_rx_cfg[ch_num].sample_rate,
956 ucontrol->value.enumerated.item[0]);
957
958 return 0;
959}
960
961static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
962 struct snd_ctl_elem_value *ucontrol)
963{
964 int ch_num = slim_get_port_idx(kcontrol);
965
966 if (ch_num < 0)
967 return ch_num;
968
969 ucontrol->value.enumerated.item[0] =
970 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
971
972 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
973 ch_num, slim_tx_cfg[ch_num].sample_rate,
974 ucontrol->value.enumerated.item[0]);
975
976 return 0;
977}
978
979static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
980 struct snd_ctl_elem_value *ucontrol)
981{
982 int sample_rate = 0;
983 int ch_num = slim_get_port_idx(kcontrol);
984
985 if (ch_num < 0)
986 return ch_num;
987
988 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
989 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
990 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
991 __func__, sample_rate);
992 return -EINVAL;
993 }
994 slim_tx_cfg[ch_num].sample_rate = sample_rate;
995
996 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
997 ch_num, slim_tx_cfg[ch_num].sample_rate,
998 ucontrol->value.enumerated.item[0]);
999
1000 return 0;
1001}
1002
1003static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
1004 struct snd_ctl_elem_value *ucontrol)
1005{
1006 int ch_num = slim_get_port_idx(kcontrol);
1007
1008 if (ch_num < 0)
1009 return ch_num;
1010
1011 ucontrol->value.enumerated.item[0] =
1012 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
1013
1014 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1015 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1016 ucontrol->value.enumerated.item[0]);
1017
1018 return 0;
1019}
1020
1021static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_value *ucontrol)
1023{
1024 int ch_num = slim_get_port_idx(kcontrol);
1025
1026 if (ch_num < 0)
1027 return ch_num;
1028
1029 slim_rx_cfg[ch_num].bit_format =
1030 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1031
1032 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1033 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1034 ucontrol->value.enumerated.item[0]);
1035
1036 return 0;
1037}
1038
1039static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1040 struct snd_ctl_elem_value *ucontrol)
1041{
1042 int ch_num = slim_get_port_idx(kcontrol);
1043
1044 if (ch_num < 0)
1045 return ch_num;
1046
1047 ucontrol->value.enumerated.item[0] =
1048 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1049
1050 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1051 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1052 ucontrol->value.enumerated.item[0]);
1053
1054 return 0;
1055}
1056
1057static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1058 struct snd_ctl_elem_value *ucontrol)
1059{
1060 int ch_num = slim_get_port_idx(kcontrol);
1061
1062 if (ch_num < 0)
1063 return ch_num;
1064
1065 slim_tx_cfg[ch_num].bit_format =
1066 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1067
1068 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1069 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1070 ucontrol->value.enumerated.item[0]);
1071
1072 return 0;
1073}
1074
1075static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1076 struct snd_ctl_elem_value *ucontrol)
1077{
1078 int ch_num = slim_get_port_idx(kcontrol);
1079
1080 if (ch_num < 0)
1081 return ch_num;
1082
1083 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1084 ch_num, slim_rx_cfg[ch_num].channels);
1085 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1086
1087 return 0;
1088}
1089
1090static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1091 struct snd_ctl_elem_value *ucontrol)
1092{
1093 int ch_num = slim_get_port_idx(kcontrol);
1094
1095 if (ch_num < 0)
1096 return ch_num;
1097
1098 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1099 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1100 ch_num, slim_rx_cfg[ch_num].channels);
1101
1102 return 1;
1103}
1104
1105static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1106 struct snd_ctl_elem_value *ucontrol)
1107{
1108 int ch_num = slim_get_port_idx(kcontrol);
1109
1110 if (ch_num < 0)
1111 return ch_num;
1112
1113 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1114 ch_num, slim_tx_cfg[ch_num].channels);
1115 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1116
1117 return 0;
1118}
1119
1120static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1121 struct snd_ctl_elem_value *ucontrol)
1122{
1123 int ch_num = slim_get_port_idx(kcontrol);
1124
1125 if (ch_num < 0)
1126 return ch_num;
1127
1128 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1129 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1130 ch_num, slim_tx_cfg[ch_num].channels);
1131
1132 return 1;
1133}
1134
1135static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1136 struct snd_ctl_elem_value *ucontrol)
1137{
1138 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1139 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1140 ucontrol->value.integer.value[0]);
1141 return 0;
1142}
1143
1144static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1145 struct snd_ctl_elem_value *ucontrol)
1146{
1147 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1148
1149 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1150 return 1;
1151}
1152
1153static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1154 struct snd_ctl_elem_value *ucontrol)
1155{
1156 /*
1157 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1158 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1159 * value.
1160 */
1161 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1162 case SAMPLING_RATE_96KHZ:
1163 ucontrol->value.integer.value[0] = 5;
1164 break;
1165 case SAMPLING_RATE_88P2KHZ:
1166 ucontrol->value.integer.value[0] = 4;
1167 break;
1168 case SAMPLING_RATE_48KHZ:
1169 ucontrol->value.integer.value[0] = 3;
1170 break;
1171 case SAMPLING_RATE_44P1KHZ:
1172 ucontrol->value.integer.value[0] = 2;
1173 break;
1174 case SAMPLING_RATE_16KHZ:
1175 ucontrol->value.integer.value[0] = 1;
1176 break;
1177 case SAMPLING_RATE_8KHZ:
1178 default:
1179 ucontrol->value.integer.value[0] = 0;
1180 break;
1181 }
1182 pr_debug("%s: sample rate = %d\n", __func__,
1183 slim_rx_cfg[SLIM_RX_7].sample_rate);
1184
1185 return 0;
1186}
1187
1188static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1189 struct snd_ctl_elem_value *ucontrol)
1190{
1191 switch (ucontrol->value.integer.value[0]) {
1192 case 1:
1193 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1194 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1195 break;
1196 case 2:
1197 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1198 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1199 break;
1200 case 3:
1201 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1202 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1203 break;
1204 case 4:
1205 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1206 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1207 break;
1208 case 5:
1209 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1210 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1211 break;
1212 case 0:
1213 default:
1214 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1215 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1216 break;
1217 }
1218 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1219 __func__,
1220 slim_rx_cfg[SLIM_RX_7].sample_rate,
1221 slim_tx_cfg[SLIM_TX_7].sample_rate,
1222 ucontrol->value.enumerated.item[0]);
1223
1224 return 0;
1225}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1226static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1227 struct snd_ctl_elem_value *ucontrol)
1228{
1229 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1230 case SAMPLING_RATE_96KHZ:
1231 ucontrol->value.integer.value[0] = 5;
1232 break;
1233 case SAMPLING_RATE_88P2KHZ:
1234 ucontrol->value.integer.value[0] = 4;
1235 break;
1236 case SAMPLING_RATE_48KHZ:
1237 ucontrol->value.integer.value[0] = 3;
1238 break;
1239 case SAMPLING_RATE_44P1KHZ:
1240 ucontrol->value.integer.value[0] = 2;
1241 break;
1242 case SAMPLING_RATE_16KHZ:
1243 ucontrol->value.integer.value[0] = 1;
1244 break;
1245 case SAMPLING_RATE_8KHZ:
1246 default:
1247 ucontrol->value.integer.value[0] = 0;
1248 break;
1249 }
1250 pr_debug("%s: sample rate rx = %d", __func__,
1251 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1252
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1253 return 0;
1254}
1255
1256static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1257 struct snd_ctl_elem_value *ucontrol)
1258{
1259 switch (ucontrol->value.integer.value[0]) {
1260 case 1:
1261 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1262 break;
1263 case 2:
1264 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1265 break;
1266 case 3:
1267 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1268 break;
1269 case 4:
1270 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1271 break;
1272 case 5:
1273 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1274 break;
1275 case 0:
1276 default:
1277 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1278 break;
1279 }
1280 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1281 __func__,
1282 slim_rx_cfg[SLIM_RX_7].sample_rate,
1283 ucontrol->value.enumerated.item[0]);
1284
1285 return 0;
1286}
1287
1288static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1289 struct snd_ctl_elem_value *ucontrol)
1290{
1291 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1292 case SAMPLING_RATE_96KHZ:
1293 ucontrol->value.integer.value[0] = 5;
1294 break;
1295 case SAMPLING_RATE_88P2KHZ:
1296 ucontrol->value.integer.value[0] = 4;
1297 break;
1298 case SAMPLING_RATE_48KHZ:
1299 ucontrol->value.integer.value[0] = 3;
1300 break;
1301 case SAMPLING_RATE_44P1KHZ:
1302 ucontrol->value.integer.value[0] = 2;
1303 break;
1304 case SAMPLING_RATE_16KHZ:
1305 ucontrol->value.integer.value[0] = 1;
1306 break;
1307 case SAMPLING_RATE_8KHZ:
1308 default:
1309 ucontrol->value.integer.value[0] = 0;
1310 break;
1311 }
1312 pr_debug("%s: sample rate tx = %d", __func__,
1313 slim_tx_cfg[SLIM_TX_7].sample_rate);
1314
1315 return 0;
1316}
1317
1318static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1319 struct snd_ctl_elem_value *ucontrol)
1320{
1321 switch (ucontrol->value.integer.value[0]) {
1322 case 1:
1323 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1324 break;
1325 case 2:
1326 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1327 break;
1328 case 3:
1329 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1330 break;
1331 case 4:
1332 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1333 break;
1334 case 5:
1335 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1336 break;
1337 case 0:
1338 default:
1339 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1340 break;
1341 }
1342 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1343 __func__,
1344 slim_tx_cfg[SLIM_TX_7].sample_rate,
1345 ucontrol->value.enumerated.item[0]);
1346
1347 return 0;
1348}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1349static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1350{
1351 int idx = 0;
1352
1353 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1354 sizeof("WSA_CDC_DMA_RX_0")))
1355 idx = WSA_CDC_DMA_RX_0;
1356 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1357 sizeof("WSA_CDC_DMA_RX_0")))
1358 idx = WSA_CDC_DMA_RX_1;
1359 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1360 sizeof("RX_CDC_DMA_RX_0")))
1361 idx = RX_CDC_DMA_RX_0;
1362 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1363 sizeof("RX_CDC_DMA_RX_1")))
1364 idx = RX_CDC_DMA_RX_1;
1365 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1366 sizeof("RX_CDC_DMA_RX_2")))
1367 idx = RX_CDC_DMA_RX_2;
1368 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1369 sizeof("RX_CDC_DMA_RX_3")))
1370 idx = RX_CDC_DMA_RX_3;
1371 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1372 sizeof("RX_CDC_DMA_RX_5")))
1373 idx = RX_CDC_DMA_RX_5;
1374 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1375 sizeof("WSA_CDC_DMA_TX_0")))
1376 idx = WSA_CDC_DMA_TX_0;
1377 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1378 sizeof("WSA_CDC_DMA_TX_1")))
1379 idx = WSA_CDC_DMA_TX_1;
1380 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1381 sizeof("WSA_CDC_DMA_TX_2")))
1382 idx = WSA_CDC_DMA_TX_2;
1383 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1384 sizeof("TX_CDC_DMA_TX_0")))
1385 idx = TX_CDC_DMA_TX_0;
1386 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1387 sizeof("TX_CDC_DMA_TX_3")))
1388 idx = TX_CDC_DMA_TX_3;
1389 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1390 sizeof("TX_CDC_DMA_TX_4")))
1391 idx = TX_CDC_DMA_TX_4;
1392 else {
1393 pr_err("%s: unsupported channel: %s\n",
1394 __func__, kcontrol->id.name);
1395 return -EINVAL;
1396 }
1397
1398 return idx;
1399}
1400
1401static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1402 struct snd_ctl_elem_value *ucontrol)
1403{
1404 int ch_num = cdc_dma_get_port_idx(kcontrol);
1405
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1406 if (ch_num < 0) {
1407 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1408 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1409 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1410
1411 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1412 cdc_dma_rx_cfg[ch_num].channels - 1);
1413 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1414 return 0;
1415}
1416
1417static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1418 struct snd_ctl_elem_value *ucontrol)
1419{
1420 int ch_num = cdc_dma_get_port_idx(kcontrol);
1421
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1422 if (ch_num < 0) {
1423 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1424 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1425 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1426
1427 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1428
1429 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1430 cdc_dma_rx_cfg[ch_num].channels);
1431 return 1;
1432}
1433
1434static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1435 struct snd_ctl_elem_value *ucontrol)
1436{
1437 int ch_num = cdc_dma_get_port_idx(kcontrol);
1438
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1439 if (ch_num < 0) {
1440 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1441 return ch_num;
1442 }
1443
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1444 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1445 case SNDRV_PCM_FORMAT_S32_LE:
1446 ucontrol->value.integer.value[0] = 3;
1447 break;
1448 case SNDRV_PCM_FORMAT_S24_3LE:
1449 ucontrol->value.integer.value[0] = 2;
1450 break;
1451 case SNDRV_PCM_FORMAT_S24_LE:
1452 ucontrol->value.integer.value[0] = 1;
1453 break;
1454 case SNDRV_PCM_FORMAT_S16_LE:
1455 default:
1456 ucontrol->value.integer.value[0] = 0;
1457 break;
1458 }
1459
1460 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1461 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1462 ucontrol->value.integer.value[0]);
1463 return 0;
1464}
1465
1466static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1467 struct snd_ctl_elem_value *ucontrol)
1468{
1469 int rc = 0;
1470 int ch_num = cdc_dma_get_port_idx(kcontrol);
1471
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1472 if (ch_num < 0) {
1473 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1474 return ch_num;
1475 }
1476
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1477 switch (ucontrol->value.integer.value[0]) {
1478 case 3:
1479 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1480 break;
1481 case 2:
1482 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1483 break;
1484 case 1:
1485 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1486 break;
1487 case 0:
1488 default:
1489 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1490 break;
1491 }
1492 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1493 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1494 ucontrol->value.integer.value[0]);
1495
1496 return rc;
1497}
1498
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1499
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1500static int cdc_dma_get_sample_rate_val(int sample_rate)
1501{
1502 int sample_rate_val = 0;
1503
1504 switch (sample_rate) {
1505 case SAMPLING_RATE_8KHZ:
1506 sample_rate_val = 0;
1507 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1508 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1509 sample_rate_val = 1;
1510 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1511 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1512 sample_rate_val = 2;
1513 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1514 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1515 sample_rate_val = 3;
1516 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1517 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1518 sample_rate_val = 4;
1519 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1520 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1521 sample_rate_val = 5;
1522 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1523 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1524 sample_rate_val = 6;
1525 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1526 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1527 sample_rate_val = 7;
1528 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1529 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1530 sample_rate_val = 8;
1531 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1532 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1533 sample_rate_val = 9;
1534 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1535 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1536 sample_rate_val = 10;
1537 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1538 case SAMPLING_RATE_352P8KHZ:
1539 sample_rate_val = 11;
1540 break;
1541 case SAMPLING_RATE_384KHZ:
1542 sample_rate_val = 12;
1543 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1544 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1545 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1546 break;
1547 }
1548 return sample_rate_val;
1549}
1550
1551static int cdc_dma_get_sample_rate(int value)
1552{
1553 int sample_rate = 0;
1554
1555 switch (value) {
1556 case 0:
1557 sample_rate = SAMPLING_RATE_8KHZ;
1558 break;
1559 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1560 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1561 break;
1562 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1563 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1564 break;
1565 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1566 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1567 break;
1568 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1569 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1570 break;
1571 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1572 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1573 break;
1574 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1575 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1576 break;
1577 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1578 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1579 break;
1580 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1581 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1582 break;
1583 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1584 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1585 break;
1586 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1587 sample_rate = SAMPLING_RATE_192KHZ;
1588 break;
1589 case 11:
1590 sample_rate = SAMPLING_RATE_352P8KHZ;
1591 break;
1592 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1593 sample_rate = SAMPLING_RATE_384KHZ;
1594 break;
1595 default:
1596 sample_rate = SAMPLING_RATE_48KHZ;
1597 break;
1598 }
1599 return sample_rate;
1600}
1601
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1602static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1603 struct snd_ctl_elem_value *ucontrol)
1604{
1605 int ch_num = cdc_dma_get_port_idx(kcontrol);
1606
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1607 if (ch_num < 0) {
1608 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1609 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1610 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1611
1612 ucontrol->value.enumerated.item[0] =
1613 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1614
1615 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1616 cdc_dma_rx_cfg[ch_num].sample_rate);
1617 return 0;
1618}
1619
1620static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1621 struct snd_ctl_elem_value *ucontrol)
1622{
1623 int ch_num = cdc_dma_get_port_idx(kcontrol);
1624
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1625 if (ch_num < 0) {
1626 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1627 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1628 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1629
1630 cdc_dma_rx_cfg[ch_num].sample_rate =
1631 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1632
1633
1634 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1635 __func__, ucontrol->value.enumerated.item[0],
1636 cdc_dma_rx_cfg[ch_num].sample_rate);
1637 return 0;
1638}
1639
1640static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1641 struct snd_ctl_elem_value *ucontrol)
1642{
1643 int ch_num = cdc_dma_get_port_idx(kcontrol);
1644
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1645 if (ch_num < 0) {
1646 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1647 return ch_num;
1648 }
1649
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1650 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1651 cdc_dma_tx_cfg[ch_num].channels);
1652 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1653 return 0;
1654}
1655
1656static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1657 struct snd_ctl_elem_value *ucontrol)
1658{
1659 int ch_num = cdc_dma_get_port_idx(kcontrol);
1660
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1661 if (ch_num < 0) {
1662 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1663 return ch_num;
1664 }
1665
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1666 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1667
1668 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1669 cdc_dma_tx_cfg[ch_num].channels);
1670 return 1;
1671}
1672
1673static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1675{
1676 int sample_rate_val;
1677 int ch_num = cdc_dma_get_port_idx(kcontrol);
1678
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1679 if (ch_num < 0) {
1680 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1681 return ch_num;
1682 }
1683
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1684 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1685 case SAMPLING_RATE_384KHZ:
1686 sample_rate_val = 12;
1687 break;
1688 case SAMPLING_RATE_352P8KHZ:
1689 sample_rate_val = 11;
1690 break;
1691 case SAMPLING_RATE_192KHZ:
1692 sample_rate_val = 10;
1693 break;
1694 case SAMPLING_RATE_176P4KHZ:
1695 sample_rate_val = 9;
1696 break;
1697 case SAMPLING_RATE_96KHZ:
1698 sample_rate_val = 8;
1699 break;
1700 case SAMPLING_RATE_88P2KHZ:
1701 sample_rate_val = 7;
1702 break;
1703 case SAMPLING_RATE_48KHZ:
1704 sample_rate_val = 6;
1705 break;
1706 case SAMPLING_RATE_44P1KHZ:
1707 sample_rate_val = 5;
1708 break;
1709 case SAMPLING_RATE_32KHZ:
1710 sample_rate_val = 4;
1711 break;
1712 case SAMPLING_RATE_22P05KHZ:
1713 sample_rate_val = 3;
1714 break;
1715 case SAMPLING_RATE_16KHZ:
1716 sample_rate_val = 2;
1717 break;
1718 case SAMPLING_RATE_11P025KHZ:
1719 sample_rate_val = 1;
1720 break;
1721 case SAMPLING_RATE_8KHZ:
1722 sample_rate_val = 0;
1723 break;
1724 default:
1725 sample_rate_val = 6;
1726 break;
1727 }
1728
1729 ucontrol->value.integer.value[0] = sample_rate_val;
1730 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1731 cdc_dma_tx_cfg[ch_num].sample_rate);
1732 return 0;
1733}
1734
1735static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
1737{
1738 int ch_num = cdc_dma_get_port_idx(kcontrol);
1739
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1740 if (ch_num < 0) {
1741 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1742 return ch_num;
1743 }
1744
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1745 switch (ucontrol->value.integer.value[0]) {
1746 case 12:
1747 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1748 break;
1749 case 11:
1750 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1751 break;
1752 case 10:
1753 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1754 break;
1755 case 9:
1756 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1757 break;
1758 case 8:
1759 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1760 break;
1761 case 7:
1762 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1763 break;
1764 case 6:
1765 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1766 break;
1767 case 5:
1768 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1769 break;
1770 case 4:
1771 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1772 break;
1773 case 3:
1774 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1775 break;
1776 case 2:
1777 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1778 break;
1779 case 1:
1780 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1781 break;
1782 case 0:
1783 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1784 break;
1785 default:
1786 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1787 break;
1788 }
1789
1790 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1791 __func__, ucontrol->value.integer.value[0],
1792 cdc_dma_tx_cfg[ch_num].sample_rate);
1793 return 0;
1794}
1795
1796static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1797 struct snd_ctl_elem_value *ucontrol)
1798{
1799 int ch_num = cdc_dma_get_port_idx(kcontrol);
1800
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1801 if (ch_num < 0) {
1802 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1803 return ch_num;
1804 }
1805
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1806 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1807 case SNDRV_PCM_FORMAT_S32_LE:
1808 ucontrol->value.integer.value[0] = 3;
1809 break;
1810 case SNDRV_PCM_FORMAT_S24_3LE:
1811 ucontrol->value.integer.value[0] = 2;
1812 break;
1813 case SNDRV_PCM_FORMAT_S24_LE:
1814 ucontrol->value.integer.value[0] = 1;
1815 break;
1816 case SNDRV_PCM_FORMAT_S16_LE:
1817 default:
1818 ucontrol->value.integer.value[0] = 0;
1819 break;
1820 }
1821
1822 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1823 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1824 ucontrol->value.integer.value[0]);
1825 return 0;
1826}
1827
1828static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1829 struct snd_ctl_elem_value *ucontrol)
1830{
1831 int rc = 0;
1832 int ch_num = cdc_dma_get_port_idx(kcontrol);
1833
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1834 if (ch_num < 0) {
1835 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1836 return ch_num;
1837 }
1838
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1839 switch (ucontrol->value.integer.value[0]) {
1840 case 3:
1841 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1842 break;
1843 case 2:
1844 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1845 break;
1846 case 1:
1847 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1848 break;
1849 case 0:
1850 default:
1851 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1852 break;
1853 }
1854 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1855 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1856 ucontrol->value.integer.value[0]);
1857
1858 return rc;
1859}
1860
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1861static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1862 struct snd_ctl_elem_value *ucontrol)
1863{
1864 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1865 usb_rx_cfg.channels);
1866 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1867 return 0;
1868}
1869
1870static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1871 struct snd_ctl_elem_value *ucontrol)
1872{
1873 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1874
1875 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1876 return 1;
1877}
1878
1879static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1880 struct snd_ctl_elem_value *ucontrol)
1881{
1882 int sample_rate_val;
1883
1884 switch (usb_rx_cfg.sample_rate) {
1885 case SAMPLING_RATE_384KHZ:
1886 sample_rate_val = 12;
1887 break;
1888 case SAMPLING_RATE_352P8KHZ:
1889 sample_rate_val = 11;
1890 break;
1891 case SAMPLING_RATE_192KHZ:
1892 sample_rate_val = 10;
1893 break;
1894 case SAMPLING_RATE_176P4KHZ:
1895 sample_rate_val = 9;
1896 break;
1897 case SAMPLING_RATE_96KHZ:
1898 sample_rate_val = 8;
1899 break;
1900 case SAMPLING_RATE_88P2KHZ:
1901 sample_rate_val = 7;
1902 break;
1903 case SAMPLING_RATE_48KHZ:
1904 sample_rate_val = 6;
1905 break;
1906 case SAMPLING_RATE_44P1KHZ:
1907 sample_rate_val = 5;
1908 break;
1909 case SAMPLING_RATE_32KHZ:
1910 sample_rate_val = 4;
1911 break;
1912 case SAMPLING_RATE_22P05KHZ:
1913 sample_rate_val = 3;
1914 break;
1915 case SAMPLING_RATE_16KHZ:
1916 sample_rate_val = 2;
1917 break;
1918 case SAMPLING_RATE_11P025KHZ:
1919 sample_rate_val = 1;
1920 break;
1921 case SAMPLING_RATE_8KHZ:
1922 default:
1923 sample_rate_val = 0;
1924 break;
1925 }
1926
1927 ucontrol->value.integer.value[0] = sample_rate_val;
1928 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1929 usb_rx_cfg.sample_rate);
1930 return 0;
1931}
1932
1933static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1934 struct snd_ctl_elem_value *ucontrol)
1935{
1936 switch (ucontrol->value.integer.value[0]) {
1937 case 12:
1938 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1939 break;
1940 case 11:
1941 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1942 break;
1943 case 10:
1944 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1945 break;
1946 case 9:
1947 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1948 break;
1949 case 8:
1950 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1951 break;
1952 case 7:
1953 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1954 break;
1955 case 6:
1956 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1957 break;
1958 case 5:
1959 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1960 break;
1961 case 4:
1962 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1963 break;
1964 case 3:
1965 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1966 break;
1967 case 2:
1968 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1969 break;
1970 case 1:
1971 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1972 break;
1973 case 0:
1974 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1975 break;
1976 default:
1977 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1978 break;
1979 }
1980
1981 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1982 __func__, ucontrol->value.integer.value[0],
1983 usb_rx_cfg.sample_rate);
1984 return 0;
1985}
1986
1987static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1989{
1990 switch (usb_rx_cfg.bit_format) {
1991 case SNDRV_PCM_FORMAT_S32_LE:
1992 ucontrol->value.integer.value[0] = 3;
1993 break;
1994 case SNDRV_PCM_FORMAT_S24_3LE:
1995 ucontrol->value.integer.value[0] = 2;
1996 break;
1997 case SNDRV_PCM_FORMAT_S24_LE:
1998 ucontrol->value.integer.value[0] = 1;
1999 break;
2000 case SNDRV_PCM_FORMAT_S16_LE:
2001 default:
2002 ucontrol->value.integer.value[0] = 0;
2003 break;
2004 }
2005
2006 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2007 __func__, usb_rx_cfg.bit_format,
2008 ucontrol->value.integer.value[0]);
2009 return 0;
2010}
2011
2012static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
2013 struct snd_ctl_elem_value *ucontrol)
2014{
2015 int rc = 0;
2016
2017 switch (ucontrol->value.integer.value[0]) {
2018 case 3:
2019 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2020 break;
2021 case 2:
2022 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2023 break;
2024 case 1:
2025 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2026 break;
2027 case 0:
2028 default:
2029 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2030 break;
2031 }
2032 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2033 __func__, usb_rx_cfg.bit_format,
2034 ucontrol->value.integer.value[0]);
2035
2036 return rc;
2037}
2038
2039static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2040 struct snd_ctl_elem_value *ucontrol)
2041{
2042 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2043 usb_tx_cfg.channels);
2044 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2045 return 0;
2046}
2047
2048static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2049 struct snd_ctl_elem_value *ucontrol)
2050{
2051 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2052
2053 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2054 return 1;
2055}
2056
2057static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2058 struct snd_ctl_elem_value *ucontrol)
2059{
2060 int sample_rate_val;
2061
2062 switch (usb_tx_cfg.sample_rate) {
2063 case SAMPLING_RATE_384KHZ:
2064 sample_rate_val = 12;
2065 break;
2066 case SAMPLING_RATE_352P8KHZ:
2067 sample_rate_val = 11;
2068 break;
2069 case SAMPLING_RATE_192KHZ:
2070 sample_rate_val = 10;
2071 break;
2072 case SAMPLING_RATE_176P4KHZ:
2073 sample_rate_val = 9;
2074 break;
2075 case SAMPLING_RATE_96KHZ:
2076 sample_rate_val = 8;
2077 break;
2078 case SAMPLING_RATE_88P2KHZ:
2079 sample_rate_val = 7;
2080 break;
2081 case SAMPLING_RATE_48KHZ:
2082 sample_rate_val = 6;
2083 break;
2084 case SAMPLING_RATE_44P1KHZ:
2085 sample_rate_val = 5;
2086 break;
2087 case SAMPLING_RATE_32KHZ:
2088 sample_rate_val = 4;
2089 break;
2090 case SAMPLING_RATE_22P05KHZ:
2091 sample_rate_val = 3;
2092 break;
2093 case SAMPLING_RATE_16KHZ:
2094 sample_rate_val = 2;
2095 break;
2096 case SAMPLING_RATE_11P025KHZ:
2097 sample_rate_val = 1;
2098 break;
2099 case SAMPLING_RATE_8KHZ:
2100 sample_rate_val = 0;
2101 break;
2102 default:
2103 sample_rate_val = 6;
2104 break;
2105 }
2106
2107 ucontrol->value.integer.value[0] = sample_rate_val;
2108 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2109 usb_tx_cfg.sample_rate);
2110 return 0;
2111}
2112
2113static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2114 struct snd_ctl_elem_value *ucontrol)
2115{
2116 switch (ucontrol->value.integer.value[0]) {
2117 case 12:
2118 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2119 break;
2120 case 11:
2121 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2122 break;
2123 case 10:
2124 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2125 break;
2126 case 9:
2127 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2128 break;
2129 case 8:
2130 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2131 break;
2132 case 7:
2133 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2134 break;
2135 case 6:
2136 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2137 break;
2138 case 5:
2139 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2140 break;
2141 case 4:
2142 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2143 break;
2144 case 3:
2145 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2146 break;
2147 case 2:
2148 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2149 break;
2150 case 1:
2151 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2152 break;
2153 case 0:
2154 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2155 break;
2156 default:
2157 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2158 break;
2159 }
2160
2161 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2162 __func__, ucontrol->value.integer.value[0],
2163 usb_tx_cfg.sample_rate);
2164 return 0;
2165}
2166
2167static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2168 struct snd_ctl_elem_value *ucontrol)
2169{
2170 switch (usb_tx_cfg.bit_format) {
2171 case SNDRV_PCM_FORMAT_S32_LE:
2172 ucontrol->value.integer.value[0] = 3;
2173 break;
2174 case SNDRV_PCM_FORMAT_S24_3LE:
2175 ucontrol->value.integer.value[0] = 2;
2176 break;
2177 case SNDRV_PCM_FORMAT_S24_LE:
2178 ucontrol->value.integer.value[0] = 1;
2179 break;
2180 case SNDRV_PCM_FORMAT_S16_LE:
2181 default:
2182 ucontrol->value.integer.value[0] = 0;
2183 break;
2184 }
2185
2186 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2187 __func__, usb_tx_cfg.bit_format,
2188 ucontrol->value.integer.value[0]);
2189 return 0;
2190}
2191
2192static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2193 struct snd_ctl_elem_value *ucontrol)
2194{
2195 int rc = 0;
2196
2197 switch (ucontrol->value.integer.value[0]) {
2198 case 3:
2199 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2200 break;
2201 case 2:
2202 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2203 break;
2204 case 1:
2205 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2206 break;
2207 case 0:
2208 default:
2209 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2210 break;
2211 }
2212 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2213 __func__, usb_tx_cfg.bit_format,
2214 ucontrol->value.integer.value[0]);
2215
2216 return rc;
2217}
2218
2219static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2220{
2221 int idx;
2222
2223 if (strnstr(kcontrol->id.name, "Display Port RX",
2224 sizeof("Display Port RX"))) {
2225 idx = DP_RX_IDX;
2226 } else {
2227 pr_err("%s: unsupported BE: %s\n",
2228 __func__, kcontrol->id.name);
2229 idx = -EINVAL;
2230 }
2231
2232 return idx;
2233}
2234
2235static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2236 struct snd_ctl_elem_value *ucontrol)
2237{
2238 int idx = ext_disp_get_port_idx(kcontrol);
2239
2240 if (idx < 0)
2241 return idx;
2242
2243 switch (ext_disp_rx_cfg[idx].bit_format) {
2244 case SNDRV_PCM_FORMAT_S24_3LE:
2245 ucontrol->value.integer.value[0] = 2;
2246 break;
2247 case SNDRV_PCM_FORMAT_S24_LE:
2248 ucontrol->value.integer.value[0] = 1;
2249 break;
2250 case SNDRV_PCM_FORMAT_S16_LE:
2251 default:
2252 ucontrol->value.integer.value[0] = 0;
2253 break;
2254 }
2255
2256 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2257 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2258 ucontrol->value.integer.value[0]);
2259 return 0;
2260}
2261
2262static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2263 struct snd_ctl_elem_value *ucontrol)
2264{
2265 int idx = ext_disp_get_port_idx(kcontrol);
2266
2267 if (idx < 0)
2268 return idx;
2269
2270 switch (ucontrol->value.integer.value[0]) {
2271 case 2:
2272 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2273 break;
2274 case 1:
2275 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2276 break;
2277 case 0:
2278 default:
2279 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2280 break;
2281 }
2282 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2283 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2284 ucontrol->value.integer.value[0]);
2285
2286 return 0;
2287}
2288
2289static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2290 struct snd_ctl_elem_value *ucontrol)
2291{
2292 int idx = ext_disp_get_port_idx(kcontrol);
2293
2294 if (idx < 0)
2295 return idx;
2296
2297 ucontrol->value.integer.value[0] =
2298 ext_disp_rx_cfg[idx].channels - 2;
2299
2300 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2301 idx, ext_disp_rx_cfg[idx].channels);
2302
2303 return 0;
2304}
2305
2306static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2307 struct snd_ctl_elem_value *ucontrol)
2308{
2309 int idx = ext_disp_get_port_idx(kcontrol);
2310
2311 if (idx < 0)
2312 return idx;
2313
2314 ext_disp_rx_cfg[idx].channels =
2315 ucontrol->value.integer.value[0] + 2;
2316
2317 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2318 idx, ext_disp_rx_cfg[idx].channels);
2319 return 1;
2320}
2321
2322static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2323 struct snd_ctl_elem_value *ucontrol)
2324{
2325 int sample_rate_val;
2326 int idx = ext_disp_get_port_idx(kcontrol);
2327
2328 if (idx < 0)
2329 return idx;
2330
2331 switch (ext_disp_rx_cfg[idx].sample_rate) {
2332 case SAMPLING_RATE_176P4KHZ:
2333 sample_rate_val = 6;
2334 break;
2335
2336 case SAMPLING_RATE_88P2KHZ:
2337 sample_rate_val = 5;
2338 break;
2339
2340 case SAMPLING_RATE_44P1KHZ:
2341 sample_rate_val = 4;
2342 break;
2343
2344 case SAMPLING_RATE_32KHZ:
2345 sample_rate_val = 3;
2346 break;
2347
2348 case SAMPLING_RATE_192KHZ:
2349 sample_rate_val = 2;
2350 break;
2351
2352 case SAMPLING_RATE_96KHZ:
2353 sample_rate_val = 1;
2354 break;
2355
2356 case SAMPLING_RATE_48KHZ:
2357 default:
2358 sample_rate_val = 0;
2359 break;
2360 }
2361
2362 ucontrol->value.integer.value[0] = sample_rate_val;
2363 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2364 idx, ext_disp_rx_cfg[idx].sample_rate);
2365
2366 return 0;
2367}
2368
2369static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2370 struct snd_ctl_elem_value *ucontrol)
2371{
2372 int idx = ext_disp_get_port_idx(kcontrol);
2373
2374 if (idx < 0)
2375 return idx;
2376
2377 switch (ucontrol->value.integer.value[0]) {
2378 case 6:
2379 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2380 break;
2381 case 5:
2382 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2383 break;
2384 case 4:
2385 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2386 break;
2387 case 3:
2388 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2389 break;
2390 case 2:
2391 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2392 break;
2393 case 1:
2394 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2395 break;
2396 case 0:
2397 default:
2398 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2399 break;
2400 }
2401
2402 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2403 __func__, ucontrol->value.integer.value[0], idx,
2404 ext_disp_rx_cfg[idx].sample_rate);
2405 return 0;
2406}
2407
2408static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2409 struct snd_ctl_elem_value *ucontrol)
2410{
2411 pr_debug("%s: proxy_rx channels = %d\n",
2412 __func__, proxy_rx_cfg.channels);
2413 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2414
2415 return 0;
2416}
2417
2418static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2419 struct snd_ctl_elem_value *ucontrol)
2420{
2421 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2422 pr_debug("%s: proxy_rx channels = %d\n",
2423 __func__, proxy_rx_cfg.channels);
2424
2425 return 1;
2426}
2427
2428static int tdm_get_sample_rate(int value)
2429{
2430 int sample_rate = 0;
2431
2432 switch (value) {
2433 case 0:
2434 sample_rate = SAMPLING_RATE_8KHZ;
2435 break;
2436 case 1:
2437 sample_rate = SAMPLING_RATE_16KHZ;
2438 break;
2439 case 2:
2440 sample_rate = SAMPLING_RATE_32KHZ;
2441 break;
2442 case 3:
2443 sample_rate = SAMPLING_RATE_48KHZ;
2444 break;
2445 case 4:
2446 sample_rate = SAMPLING_RATE_176P4KHZ;
2447 break;
2448 case 5:
2449 sample_rate = SAMPLING_RATE_352P8KHZ;
2450 break;
2451 default:
2452 sample_rate = SAMPLING_RATE_48KHZ;
2453 break;
2454 }
2455 return sample_rate;
2456}
2457
2458static int aux_pcm_get_sample_rate(int value)
2459{
2460 int sample_rate;
2461
2462 switch (value) {
2463 case 1:
2464 sample_rate = SAMPLING_RATE_16KHZ;
2465 break;
2466 case 0:
2467 default:
2468 sample_rate = SAMPLING_RATE_8KHZ;
2469 break;
2470 }
2471 return sample_rate;
2472}
2473
2474static int tdm_get_sample_rate_val(int sample_rate)
2475{
2476 int sample_rate_val = 0;
2477
2478 switch (sample_rate) {
2479 case SAMPLING_RATE_8KHZ:
2480 sample_rate_val = 0;
2481 break;
2482 case SAMPLING_RATE_16KHZ:
2483 sample_rate_val = 1;
2484 break;
2485 case SAMPLING_RATE_32KHZ:
2486 sample_rate_val = 2;
2487 break;
2488 case SAMPLING_RATE_48KHZ:
2489 sample_rate_val = 3;
2490 break;
2491 case SAMPLING_RATE_176P4KHZ:
2492 sample_rate_val = 4;
2493 break;
2494 case SAMPLING_RATE_352P8KHZ:
2495 sample_rate_val = 5;
2496 break;
2497 default:
2498 sample_rate_val = 3;
2499 break;
2500 }
2501 return sample_rate_val;
2502}
2503
2504static int aux_pcm_get_sample_rate_val(int sample_rate)
2505{
2506 int sample_rate_val;
2507
2508 switch (sample_rate) {
2509 case SAMPLING_RATE_16KHZ:
2510 sample_rate_val = 1;
2511 break;
2512 case SAMPLING_RATE_8KHZ:
2513 default:
2514 sample_rate_val = 0;
2515 break;
2516 }
2517 return sample_rate_val;
2518}
2519
2520static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2521 struct tdm_port *port)
2522{
2523 if (port) {
2524 if (strnstr(kcontrol->id.name, "PRI",
2525 sizeof(kcontrol->id.name))) {
2526 port->mode = TDM_PRI;
2527 } else if (strnstr(kcontrol->id.name, "SEC",
2528 sizeof(kcontrol->id.name))) {
2529 port->mode = TDM_SEC;
2530 } else if (strnstr(kcontrol->id.name, "TERT",
2531 sizeof(kcontrol->id.name))) {
2532 port->mode = TDM_TERT;
2533 } else if (strnstr(kcontrol->id.name, "QUAT",
2534 sizeof(kcontrol->id.name))) {
2535 port->mode = TDM_QUAT;
2536 } else if (strnstr(kcontrol->id.name, "QUIN",
2537 sizeof(kcontrol->id.name))) {
2538 port->mode = TDM_QUIN;
2539 } else {
2540 pr_err("%s: unsupported mode in: %s\n",
2541 __func__, kcontrol->id.name);
2542 return -EINVAL;
2543 }
2544
2545 if (strnstr(kcontrol->id.name, "RX_0",
2546 sizeof(kcontrol->id.name)) ||
2547 strnstr(kcontrol->id.name, "TX_0",
2548 sizeof(kcontrol->id.name))) {
2549 port->channel = TDM_0;
2550 } else if (strnstr(kcontrol->id.name, "RX_1",
2551 sizeof(kcontrol->id.name)) ||
2552 strnstr(kcontrol->id.name, "TX_1",
2553 sizeof(kcontrol->id.name))) {
2554 port->channel = TDM_1;
2555 } else if (strnstr(kcontrol->id.name, "RX_2",
2556 sizeof(kcontrol->id.name)) ||
2557 strnstr(kcontrol->id.name, "TX_2",
2558 sizeof(kcontrol->id.name))) {
2559 port->channel = TDM_2;
2560 } else if (strnstr(kcontrol->id.name, "RX_3",
2561 sizeof(kcontrol->id.name)) ||
2562 strnstr(kcontrol->id.name, "TX_3",
2563 sizeof(kcontrol->id.name))) {
2564 port->channel = TDM_3;
2565 } else if (strnstr(kcontrol->id.name, "RX_4",
2566 sizeof(kcontrol->id.name)) ||
2567 strnstr(kcontrol->id.name, "TX_4",
2568 sizeof(kcontrol->id.name))) {
2569 port->channel = TDM_4;
2570 } else if (strnstr(kcontrol->id.name, "RX_5",
2571 sizeof(kcontrol->id.name)) ||
2572 strnstr(kcontrol->id.name, "TX_5",
2573 sizeof(kcontrol->id.name))) {
2574 port->channel = TDM_5;
2575 } else if (strnstr(kcontrol->id.name, "RX_6",
2576 sizeof(kcontrol->id.name)) ||
2577 strnstr(kcontrol->id.name, "TX_6",
2578 sizeof(kcontrol->id.name))) {
2579 port->channel = TDM_6;
2580 } else if (strnstr(kcontrol->id.name, "RX_7",
2581 sizeof(kcontrol->id.name)) ||
2582 strnstr(kcontrol->id.name, "TX_7",
2583 sizeof(kcontrol->id.name))) {
2584 port->channel = TDM_7;
2585 } else {
2586 pr_err("%s: unsupported channel in: %s\n",
2587 __func__, kcontrol->id.name);
2588 return -EINVAL;
2589 }
2590 } else {
2591 return -EINVAL;
2592 }
2593 return 0;
2594}
2595
2596static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2597 struct snd_ctl_elem_value *ucontrol)
2598{
2599 struct tdm_port port;
2600 int ret = tdm_get_port_idx(kcontrol, &port);
2601
2602 if (ret) {
2603 pr_err("%s: unsupported control: %s\n",
2604 __func__, kcontrol->id.name);
2605 } else {
2606 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2607 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2608
2609 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2610 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2611 ucontrol->value.enumerated.item[0]);
2612 }
2613 return ret;
2614}
2615
2616static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2617 struct snd_ctl_elem_value *ucontrol)
2618{
2619 struct tdm_port port;
2620 int ret = tdm_get_port_idx(kcontrol, &port);
2621
2622 if (ret) {
2623 pr_err("%s: unsupported control: %s\n",
2624 __func__, kcontrol->id.name);
2625 } else {
2626 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2627 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2628
2629 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2630 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2631 ucontrol->value.enumerated.item[0]);
2632 }
2633 return ret;
2634}
2635
2636static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct tdm_port port;
2640 int ret = tdm_get_port_idx(kcontrol, &port);
2641
2642 if (ret) {
2643 pr_err("%s: unsupported control: %s\n",
2644 __func__, kcontrol->id.name);
2645 } else {
2646 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2647 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2648
2649 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2650 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2651 ucontrol->value.enumerated.item[0]);
2652 }
2653 return ret;
2654}
2655
2656static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2657 struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct tdm_port port;
2660 int ret = tdm_get_port_idx(kcontrol, &port);
2661
2662 if (ret) {
2663 pr_err("%s: unsupported control: %s\n",
2664 __func__, kcontrol->id.name);
2665 } else {
2666 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2667 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2668
2669 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2670 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2671 ucontrol->value.enumerated.item[0]);
2672 }
2673 return ret;
2674}
2675
2676static int tdm_get_format(int value)
2677{
2678 int format = 0;
2679
2680 switch (value) {
2681 case 0:
2682 format = SNDRV_PCM_FORMAT_S16_LE;
2683 break;
2684 case 1:
2685 format = SNDRV_PCM_FORMAT_S24_LE;
2686 break;
2687 case 2:
2688 format = SNDRV_PCM_FORMAT_S32_LE;
2689 break;
2690 default:
2691 format = SNDRV_PCM_FORMAT_S16_LE;
2692 break;
2693 }
2694 return format;
2695}
2696
2697static int tdm_get_format_val(int format)
2698{
2699 int value = 0;
2700
2701 switch (format) {
2702 case SNDRV_PCM_FORMAT_S16_LE:
2703 value = 0;
2704 break;
2705 case SNDRV_PCM_FORMAT_S24_LE:
2706 value = 1;
2707 break;
2708 case SNDRV_PCM_FORMAT_S32_LE:
2709 value = 2;
2710 break;
2711 default:
2712 value = 0;
2713 break;
2714 }
2715 return value;
2716}
2717
2718static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2719 struct snd_ctl_elem_value *ucontrol)
2720{
2721 struct tdm_port port;
2722 int ret = tdm_get_port_idx(kcontrol, &port);
2723
2724 if (ret) {
2725 pr_err("%s: unsupported control: %s\n",
2726 __func__, kcontrol->id.name);
2727 } else {
2728 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2729 tdm_rx_cfg[port.mode][port.channel].bit_format);
2730
2731 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2732 tdm_rx_cfg[port.mode][port.channel].bit_format,
2733 ucontrol->value.enumerated.item[0]);
2734 }
2735 return ret;
2736}
2737
2738static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2739 struct snd_ctl_elem_value *ucontrol)
2740{
2741 struct tdm_port port;
2742 int ret = tdm_get_port_idx(kcontrol, &port);
2743
2744 if (ret) {
2745 pr_err("%s: unsupported control: %s\n",
2746 __func__, kcontrol->id.name);
2747 } else {
2748 tdm_rx_cfg[port.mode][port.channel].bit_format =
2749 tdm_get_format(ucontrol->value.enumerated.item[0]);
2750
2751 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2752 tdm_rx_cfg[port.mode][port.channel].bit_format,
2753 ucontrol->value.enumerated.item[0]);
2754 }
2755 return ret;
2756}
2757
2758static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2759 struct snd_ctl_elem_value *ucontrol)
2760{
2761 struct tdm_port port;
2762 int ret = tdm_get_port_idx(kcontrol, &port);
2763
2764 if (ret) {
2765 pr_err("%s: unsupported control: %s\n",
2766 __func__, kcontrol->id.name);
2767 } else {
2768 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2769 tdm_tx_cfg[port.mode][port.channel].bit_format);
2770
2771 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2772 tdm_tx_cfg[port.mode][port.channel].bit_format,
2773 ucontrol->value.enumerated.item[0]);
2774 }
2775 return ret;
2776}
2777
2778static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2779 struct snd_ctl_elem_value *ucontrol)
2780{
2781 struct tdm_port port;
2782 int ret = tdm_get_port_idx(kcontrol, &port);
2783
2784 if (ret) {
2785 pr_err("%s: unsupported control: %s\n",
2786 __func__, kcontrol->id.name);
2787 } else {
2788 tdm_tx_cfg[port.mode][port.channel].bit_format =
2789 tdm_get_format(ucontrol->value.enumerated.item[0]);
2790
2791 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2792 tdm_tx_cfg[port.mode][port.channel].bit_format,
2793 ucontrol->value.enumerated.item[0]);
2794 }
2795 return ret;
2796}
2797
2798static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2799 struct snd_ctl_elem_value *ucontrol)
2800{
2801 struct tdm_port port;
2802 int ret = tdm_get_port_idx(kcontrol, &port);
2803
2804 if (ret) {
2805 pr_err("%s: unsupported control: %s\n",
2806 __func__, kcontrol->id.name);
2807 } else {
2808
2809 ucontrol->value.enumerated.item[0] =
2810 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2811
2812 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2813 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2814 ucontrol->value.enumerated.item[0]);
2815 }
2816 return ret;
2817}
2818
2819static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2820 struct snd_ctl_elem_value *ucontrol)
2821{
2822 struct tdm_port port;
2823 int ret = tdm_get_port_idx(kcontrol, &port);
2824
2825 if (ret) {
2826 pr_err("%s: unsupported control: %s\n",
2827 __func__, kcontrol->id.name);
2828 } else {
2829 tdm_rx_cfg[port.mode][port.channel].channels =
2830 ucontrol->value.enumerated.item[0] + 1;
2831
2832 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2833 tdm_rx_cfg[port.mode][port.channel].channels,
2834 ucontrol->value.enumerated.item[0] + 1);
2835 }
2836 return ret;
2837}
2838
2839static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2840 struct snd_ctl_elem_value *ucontrol)
2841{
2842 struct tdm_port port;
2843 int ret = tdm_get_port_idx(kcontrol, &port);
2844
2845 if (ret) {
2846 pr_err("%s: unsupported control: %s\n",
2847 __func__, kcontrol->id.name);
2848 } else {
2849 ucontrol->value.enumerated.item[0] =
2850 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2851
2852 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2853 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2854 ucontrol->value.enumerated.item[0]);
2855 }
2856 return ret;
2857}
2858
2859static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2860 struct snd_ctl_elem_value *ucontrol)
2861{
2862 struct tdm_port port;
2863 int ret = tdm_get_port_idx(kcontrol, &port);
2864
2865 if (ret) {
2866 pr_err("%s: unsupported control: %s\n",
2867 __func__, kcontrol->id.name);
2868 } else {
2869 tdm_tx_cfg[port.mode][port.channel].channels =
2870 ucontrol->value.enumerated.item[0] + 1;
2871
2872 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2873 tdm_tx_cfg[port.mode][port.channel].channels,
2874 ucontrol->value.enumerated.item[0] + 1);
2875 }
2876 return ret;
2877}
2878
2879static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2880{
2881 int idx;
2882
2883 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2884 sizeof("PRIM_AUX_PCM"))) {
2885 idx = PRIM_AUX_PCM;
2886 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2887 sizeof("SEC_AUX_PCM"))) {
2888 idx = SEC_AUX_PCM;
2889 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2890 sizeof("TERT_AUX_PCM"))) {
2891 idx = TERT_AUX_PCM;
2892 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2893 sizeof("QUAT_AUX_PCM"))) {
2894 idx = QUAT_AUX_PCM;
2895 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2896 sizeof("QUIN_AUX_PCM"))) {
2897 idx = QUIN_AUX_PCM;
2898 } else {
2899 pr_err("%s: unsupported port: %s\n",
2900 __func__, kcontrol->id.name);
2901 idx = -EINVAL;
2902 }
2903
2904 return idx;
2905}
2906
2907static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2908 struct snd_ctl_elem_value *ucontrol)
2909{
2910 int idx = aux_pcm_get_port_idx(kcontrol);
2911
2912 if (idx < 0)
2913 return idx;
2914
2915 aux_pcm_rx_cfg[idx].sample_rate =
2916 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2917
2918 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2919 idx, aux_pcm_rx_cfg[idx].sample_rate,
2920 ucontrol->value.enumerated.item[0]);
2921
2922 return 0;
2923}
2924
2925static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2926 struct snd_ctl_elem_value *ucontrol)
2927{
2928 int idx = aux_pcm_get_port_idx(kcontrol);
2929
2930 if (idx < 0)
2931 return idx;
2932
2933 ucontrol->value.enumerated.item[0] =
2934 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2935
2936 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2937 idx, aux_pcm_rx_cfg[idx].sample_rate,
2938 ucontrol->value.enumerated.item[0]);
2939
2940 return 0;
2941}
2942
2943static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2944 struct snd_ctl_elem_value *ucontrol)
2945{
2946 int idx = aux_pcm_get_port_idx(kcontrol);
2947
2948 if (idx < 0)
2949 return idx;
2950
2951 aux_pcm_tx_cfg[idx].sample_rate =
2952 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2953
2954 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2955 idx, aux_pcm_tx_cfg[idx].sample_rate,
2956 ucontrol->value.enumerated.item[0]);
2957
2958 return 0;
2959}
2960
2961static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2962 struct snd_ctl_elem_value *ucontrol)
2963{
2964 int idx = aux_pcm_get_port_idx(kcontrol);
2965
2966 if (idx < 0)
2967 return idx;
2968
2969 ucontrol->value.enumerated.item[0] =
2970 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2971
2972 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2973 idx, aux_pcm_tx_cfg[idx].sample_rate,
2974 ucontrol->value.enumerated.item[0]);
2975
2976 return 0;
2977}
2978
2979static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2980{
2981 int idx;
2982
2983 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2984 sizeof("PRIM_MI2S_RX"))) {
2985 idx = PRIM_MI2S;
2986 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2987 sizeof("SEC_MI2S_RX"))) {
2988 idx = SEC_MI2S;
2989 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2990 sizeof("TERT_MI2S_RX"))) {
2991 idx = TERT_MI2S;
2992 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2993 sizeof("QUAT_MI2S_RX"))) {
2994 idx = QUAT_MI2S;
2995 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2996 sizeof("QUIN_MI2S_RX"))) {
2997 idx = QUIN_MI2S;
2998 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2999 sizeof("PRIM_MI2S_TX"))) {
3000 idx = PRIM_MI2S;
3001 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
3002 sizeof("SEC_MI2S_TX"))) {
3003 idx = SEC_MI2S;
3004 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
3005 sizeof("TERT_MI2S_TX"))) {
3006 idx = TERT_MI2S;
3007 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
3008 sizeof("QUAT_MI2S_TX"))) {
3009 idx = QUAT_MI2S;
3010 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
3011 sizeof("QUIN_MI2S_TX"))) {
3012 idx = QUIN_MI2S;
3013 } else {
3014 pr_err("%s: unsupported channel: %s\n",
3015 __func__, kcontrol->id.name);
3016 idx = -EINVAL;
3017 }
3018
3019 return idx;
3020}
3021
3022static int mi2s_get_sample_rate_val(int sample_rate)
3023{
3024 int sample_rate_val;
3025
3026 switch (sample_rate) {
3027 case SAMPLING_RATE_8KHZ:
3028 sample_rate_val = 0;
3029 break;
3030 case SAMPLING_RATE_11P025KHZ:
3031 sample_rate_val = 1;
3032 break;
3033 case SAMPLING_RATE_16KHZ:
3034 sample_rate_val = 2;
3035 break;
3036 case SAMPLING_RATE_22P05KHZ:
3037 sample_rate_val = 3;
3038 break;
3039 case SAMPLING_RATE_32KHZ:
3040 sample_rate_val = 4;
3041 break;
3042 case SAMPLING_RATE_44P1KHZ:
3043 sample_rate_val = 5;
3044 break;
3045 case SAMPLING_RATE_48KHZ:
3046 sample_rate_val = 6;
3047 break;
3048 case SAMPLING_RATE_96KHZ:
3049 sample_rate_val = 7;
3050 break;
3051 case SAMPLING_RATE_192KHZ:
3052 sample_rate_val = 8;
3053 break;
3054 default:
3055 sample_rate_val = 6;
3056 break;
3057 }
3058 return sample_rate_val;
3059}
3060
3061static int mi2s_get_sample_rate(int value)
3062{
3063 int sample_rate;
3064
3065 switch (value) {
3066 case 0:
3067 sample_rate = SAMPLING_RATE_8KHZ;
3068 break;
3069 case 1:
3070 sample_rate = SAMPLING_RATE_11P025KHZ;
3071 break;
3072 case 2:
3073 sample_rate = SAMPLING_RATE_16KHZ;
3074 break;
3075 case 3:
3076 sample_rate = SAMPLING_RATE_22P05KHZ;
3077 break;
3078 case 4:
3079 sample_rate = SAMPLING_RATE_32KHZ;
3080 break;
3081 case 5:
3082 sample_rate = SAMPLING_RATE_44P1KHZ;
3083 break;
3084 case 6:
3085 sample_rate = SAMPLING_RATE_48KHZ;
3086 break;
3087 case 7:
3088 sample_rate = SAMPLING_RATE_96KHZ;
3089 break;
3090 case 8:
3091 sample_rate = SAMPLING_RATE_192KHZ;
3092 break;
3093 default:
3094 sample_rate = SAMPLING_RATE_48KHZ;
3095 break;
3096 }
3097 return sample_rate;
3098}
3099
3100static int mi2s_auxpcm_get_format(int value)
3101{
3102 int format;
3103
3104 switch (value) {
3105 case 0:
3106 format = SNDRV_PCM_FORMAT_S16_LE;
3107 break;
3108 case 1:
3109 format = SNDRV_PCM_FORMAT_S24_LE;
3110 break;
3111 case 2:
3112 format = SNDRV_PCM_FORMAT_S24_3LE;
3113 break;
3114 case 3:
3115 format = SNDRV_PCM_FORMAT_S32_LE;
3116 break;
3117 default:
3118 format = SNDRV_PCM_FORMAT_S16_LE;
3119 break;
3120 }
3121 return format;
3122}
3123
3124static int mi2s_auxpcm_get_format_value(int format)
3125{
3126 int value;
3127
3128 switch (format) {
3129 case SNDRV_PCM_FORMAT_S16_LE:
3130 value = 0;
3131 break;
3132 case SNDRV_PCM_FORMAT_S24_LE:
3133 value = 1;
3134 break;
3135 case SNDRV_PCM_FORMAT_S24_3LE:
3136 value = 2;
3137 break;
3138 case SNDRV_PCM_FORMAT_S32_LE:
3139 value = 3;
3140 break;
3141 default:
3142 value = 0;
3143 break;
3144 }
3145 return value;
3146}
3147
3148static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3149 struct snd_ctl_elem_value *ucontrol)
3150{
3151 int idx = mi2s_get_port_idx(kcontrol);
3152
3153 if (idx < 0)
3154 return idx;
3155
3156 mi2s_rx_cfg[idx].sample_rate =
3157 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3158
3159 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3160 idx, mi2s_rx_cfg[idx].sample_rate,
3161 ucontrol->value.enumerated.item[0]);
3162
3163 return 0;
3164}
3165
3166static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3167 struct snd_ctl_elem_value *ucontrol)
3168{
3169 int idx = mi2s_get_port_idx(kcontrol);
3170
3171 if (idx < 0)
3172 return idx;
3173
3174 ucontrol->value.enumerated.item[0] =
3175 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3176
3177 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3178 idx, mi2s_rx_cfg[idx].sample_rate,
3179 ucontrol->value.enumerated.item[0]);
3180
3181 return 0;
3182}
3183
3184static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3185 struct snd_ctl_elem_value *ucontrol)
3186{
3187 int idx = mi2s_get_port_idx(kcontrol);
3188
3189 if (idx < 0)
3190 return idx;
3191
3192 mi2s_tx_cfg[idx].sample_rate =
3193 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3194
3195 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3196 idx, mi2s_tx_cfg[idx].sample_rate,
3197 ucontrol->value.enumerated.item[0]);
3198
3199 return 0;
3200}
3201
3202static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3203 struct snd_ctl_elem_value *ucontrol)
3204{
3205 int idx = mi2s_get_port_idx(kcontrol);
3206
3207 if (idx < 0)
3208 return idx;
3209
3210 ucontrol->value.enumerated.item[0] =
3211 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3212
3213 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3214 idx, mi2s_tx_cfg[idx].sample_rate,
3215 ucontrol->value.enumerated.item[0]);
3216
3217 return 0;
3218}
3219
3220static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3221 struct snd_ctl_elem_value *ucontrol)
3222{
3223 int idx = mi2s_get_port_idx(kcontrol);
3224
3225 if (idx < 0)
3226 return idx;
3227
3228 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3229 idx, mi2s_rx_cfg[idx].channels);
3230 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3231
3232 return 0;
3233}
3234
3235static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3236 struct snd_ctl_elem_value *ucontrol)
3237{
3238 int idx = mi2s_get_port_idx(kcontrol);
3239
3240 if (idx < 0)
3241 return idx;
3242
3243 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3244 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3245 idx, mi2s_rx_cfg[idx].channels);
3246
3247 return 1;
3248}
3249
3250static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3251 struct snd_ctl_elem_value *ucontrol)
3252{
3253 int idx = mi2s_get_port_idx(kcontrol);
3254
3255 if (idx < 0)
3256 return idx;
3257
3258 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3259 idx, mi2s_tx_cfg[idx].channels);
3260 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3261
3262 return 0;
3263}
3264
3265static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3266 struct snd_ctl_elem_value *ucontrol)
3267{
3268 int idx = mi2s_get_port_idx(kcontrol);
3269
3270 if (idx < 0)
3271 return idx;
3272
3273 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3274 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3275 idx, mi2s_tx_cfg[idx].channels);
3276
3277 return 1;
3278}
3279
3280static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3281 struct snd_ctl_elem_value *ucontrol)
3282{
3283 int idx = mi2s_get_port_idx(kcontrol);
3284
3285 if (idx < 0)
3286 return idx;
3287
3288 ucontrol->value.enumerated.item[0] =
3289 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3290
3291 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3292 idx, mi2s_rx_cfg[idx].bit_format,
3293 ucontrol->value.enumerated.item[0]);
3294
3295 return 0;
3296}
3297
3298static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3299 struct snd_ctl_elem_value *ucontrol)
3300{
3301 int idx = mi2s_get_port_idx(kcontrol);
3302
3303 if (idx < 0)
3304 return idx;
3305
3306 mi2s_rx_cfg[idx].bit_format =
3307 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3308
3309 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3310 idx, mi2s_rx_cfg[idx].bit_format,
3311 ucontrol->value.enumerated.item[0]);
3312
3313 return 0;
3314}
3315
3316static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3317 struct snd_ctl_elem_value *ucontrol)
3318{
3319 int idx = mi2s_get_port_idx(kcontrol);
3320
3321 if (idx < 0)
3322 return idx;
3323
3324 ucontrol->value.enumerated.item[0] =
3325 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3326
3327 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3328 idx, mi2s_tx_cfg[idx].bit_format,
3329 ucontrol->value.enumerated.item[0]);
3330
3331 return 0;
3332}
3333
3334static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3335 struct snd_ctl_elem_value *ucontrol)
3336{
3337 int idx = mi2s_get_port_idx(kcontrol);
3338
3339 if (idx < 0)
3340 return idx;
3341
3342 mi2s_tx_cfg[idx].bit_format =
3343 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3344
3345 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3346 idx, mi2s_tx_cfg[idx].bit_format,
3347 ucontrol->value.enumerated.item[0]);
3348
3349 return 0;
3350}
3351
3352static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3353 struct snd_ctl_elem_value *ucontrol)
3354{
3355 int idx = aux_pcm_get_port_idx(kcontrol);
3356
3357 if (idx < 0)
3358 return idx;
3359
3360 ucontrol->value.enumerated.item[0] =
3361 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3362
3363 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3364 idx, aux_pcm_rx_cfg[idx].bit_format,
3365 ucontrol->value.enumerated.item[0]);
3366
3367 return 0;
3368}
3369
3370static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3371 struct snd_ctl_elem_value *ucontrol)
3372{
3373 int idx = aux_pcm_get_port_idx(kcontrol);
3374
3375 if (idx < 0)
3376 return idx;
3377
3378 aux_pcm_rx_cfg[idx].bit_format =
3379 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3380
3381 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3382 idx, aux_pcm_rx_cfg[idx].bit_format,
3383 ucontrol->value.enumerated.item[0]);
3384
3385 return 0;
3386}
3387
3388static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3389 struct snd_ctl_elem_value *ucontrol)
3390{
3391 int idx = aux_pcm_get_port_idx(kcontrol);
3392
3393 if (idx < 0)
3394 return idx;
3395
3396 ucontrol->value.enumerated.item[0] =
3397 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3398
3399 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3400 idx, aux_pcm_tx_cfg[idx].bit_format,
3401 ucontrol->value.enumerated.item[0]);
3402
3403 return 0;
3404}
3405
3406static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3407 struct snd_ctl_elem_value *ucontrol)
3408{
3409 int idx = aux_pcm_get_port_idx(kcontrol);
3410
3411 if (idx < 0)
3412 return idx;
3413
3414 aux_pcm_tx_cfg[idx].bit_format =
3415 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3416
3417 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3418 idx, aux_pcm_tx_cfg[idx].bit_format,
3419 ucontrol->value.enumerated.item[0]);
3420
3421 return 0;
3422}
3423
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3424static int msm_hifi_ctrl(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3425{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3426 struct snd_soc_dapm_context *dapm =
3427 snd_soc_component_get_dapm(component);
3428 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3429 struct msm_asoc_mach_data *pdata =
3430 snd_soc_card_get_drvdata(card);
3431
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3432 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3433 msm_hifi_control);
3434
3435 if (!pdata || !pdata->hph_en1_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3436 dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
3437 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3438 return -EINVAL;
3439 }
3440 if (msm_hifi_control == MSM_HIFI_ON) {
3441 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3442 /* 5msec delay needed as per HW requirement */
3443 usleep_range(5000, 5010);
3444 } else {
3445 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3446 }
3447 snd_soc_dapm_sync(dapm);
3448
3449 return 0;
3450}
3451
3452static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3453 struct snd_ctl_elem_value *ucontrol)
3454{
3455 pr_debug("%s: msm_hifi_control = %d\n",
3456 __func__, msm_hifi_control);
3457 ucontrol->value.integer.value[0] = msm_hifi_control;
3458
3459 return 0;
3460}
3461
3462static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3463 struct snd_ctl_elem_value *ucontrol)
3464{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3465 struct snd_soc_component *component =
3466 snd_soc_kcontrol_component(kcontrol);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3467
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3468 dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3469 __func__, ucontrol->value.integer.value[0]);
3470
3471 msm_hifi_control = ucontrol->value.integer.value[0];
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3472 msm_hifi_ctrl(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3473
3474 return 0;
3475}
3476
3477static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3478 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3479 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3480 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3481 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3482 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3483 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3484 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3485 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3486 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3487 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3488 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3489 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3490 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3491 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3492 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3493 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3494 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3495 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3496 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3497 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3498 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3499 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3500 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3501 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3502 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3503 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3504 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3505 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3506 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3507 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3508 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3509 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3510 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3511 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3512 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3513 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3514 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3515 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3516 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3517 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3518 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3519 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3520 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3521 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3522 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3523 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3524 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3525 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3526 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3527 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3528 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3529 wsa_cdc_dma_rx_0_sample_rate,
3530 cdc_dma_rx_sample_rate_get,
3531 cdc_dma_rx_sample_rate_put),
3532 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3533 wsa_cdc_dma_rx_1_sample_rate,
3534 cdc_dma_rx_sample_rate_get,
3535 cdc_dma_rx_sample_rate_put),
3536 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3537 rx_cdc_dma_rx_0_sample_rate,
3538 cdc_dma_rx_sample_rate_get,
3539 cdc_dma_rx_sample_rate_put),
3540 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3541 rx_cdc_dma_rx_1_sample_rate,
3542 cdc_dma_rx_sample_rate_get,
3543 cdc_dma_rx_sample_rate_put),
3544 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3545 rx_cdc_dma_rx_2_sample_rate,
3546 cdc_dma_rx_sample_rate_get,
3547 cdc_dma_rx_sample_rate_put),
3548 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3549 rx_cdc_dma_rx_3_sample_rate,
3550 cdc_dma_rx_sample_rate_get,
3551 cdc_dma_rx_sample_rate_put),
3552 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3553 rx_cdc_dma_rx_5_sample_rate,
3554 cdc_dma_rx_sample_rate_get,
3555 cdc_dma_rx_sample_rate_put),
3556 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3557 wsa_cdc_dma_tx_0_sample_rate,
3558 cdc_dma_tx_sample_rate_get,
3559 cdc_dma_tx_sample_rate_put),
3560 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3561 wsa_cdc_dma_tx_1_sample_rate,
3562 cdc_dma_tx_sample_rate_get,
3563 cdc_dma_tx_sample_rate_put),
3564 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3565 wsa_cdc_dma_tx_2_sample_rate,
3566 cdc_dma_tx_sample_rate_get,
3567 cdc_dma_tx_sample_rate_put),
3568 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3569 tx_cdc_dma_tx_0_sample_rate,
3570 cdc_dma_tx_sample_rate_get,
3571 cdc_dma_tx_sample_rate_put),
3572 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3573 tx_cdc_dma_tx_3_sample_rate,
3574 cdc_dma_tx_sample_rate_get,
3575 cdc_dma_tx_sample_rate_put),
3576 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3577 tx_cdc_dma_tx_4_sample_rate,
3578 cdc_dma_tx_sample_rate_get,
3579 cdc_dma_tx_sample_rate_put),
3580};
3581
3582static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3583 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3584 slim_rx_ch_get, slim_rx_ch_put),
3585 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3586 slim_rx_ch_get, slim_rx_ch_put),
3587 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3588 slim_tx_ch_get, slim_tx_ch_put),
3589 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3590 slim_tx_ch_get, slim_tx_ch_put),
3591 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3592 slim_rx_ch_get, slim_rx_ch_put),
3593 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3594 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3595 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3596 slim_rx_bit_format_get, slim_rx_bit_format_put),
3597 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3598 slim_rx_bit_format_get, slim_rx_bit_format_put),
3599 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3600 slim_rx_bit_format_get, slim_rx_bit_format_put),
3601 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3602 slim_tx_bit_format_get, slim_tx_bit_format_put),
3603 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3604 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3605 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3606 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3607 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3608 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3609 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3610 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3611 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3612 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3613};
3614
3615static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3616 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3617 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3618 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3619 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3620 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3621 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3622 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3623 proxy_rx_ch_get, proxy_rx_ch_put),
3624 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3625 usb_audio_rx_format_get, usb_audio_rx_format_put),
3626 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3627 usb_audio_tx_format_get, usb_audio_tx_format_put),
3628 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3629 ext_disp_rx_format_get, ext_disp_rx_format_put),
3630 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3631 usb_audio_rx_sample_rate_get,
3632 usb_audio_rx_sample_rate_put),
3633 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3634 usb_audio_tx_sample_rate_get,
3635 usb_audio_tx_sample_rate_put),
3636 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3637 ext_disp_rx_sample_rate_get,
3638 ext_disp_rx_sample_rate_put),
3639 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3640 tdm_rx_sample_rate_get,
3641 tdm_rx_sample_rate_put),
3642 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3643 tdm_tx_sample_rate_get,
3644 tdm_tx_sample_rate_put),
3645 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3646 tdm_rx_format_get,
3647 tdm_rx_format_put),
3648 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3649 tdm_tx_format_get,
3650 tdm_tx_format_put),
3651 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3652 tdm_rx_ch_get,
3653 tdm_rx_ch_put),
3654 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3655 tdm_tx_ch_get,
3656 tdm_tx_ch_put),
3657 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3658 tdm_rx_sample_rate_get,
3659 tdm_rx_sample_rate_put),
3660 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3661 tdm_tx_sample_rate_get,
3662 tdm_tx_sample_rate_put),
3663 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3664 tdm_rx_format_get,
3665 tdm_rx_format_put),
3666 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3667 tdm_tx_format_get,
3668 tdm_tx_format_put),
3669 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3670 tdm_rx_ch_get,
3671 tdm_rx_ch_put),
3672 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3673 tdm_tx_ch_get,
3674 tdm_tx_ch_put),
3675 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3676 tdm_rx_sample_rate_get,
3677 tdm_rx_sample_rate_put),
3678 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3679 tdm_tx_sample_rate_get,
3680 tdm_tx_sample_rate_put),
3681 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3682 tdm_rx_format_get,
3683 tdm_rx_format_put),
3684 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3685 tdm_tx_format_get,
3686 tdm_tx_format_put),
3687 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3688 tdm_rx_ch_get,
3689 tdm_rx_ch_put),
3690 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3691 tdm_tx_ch_get,
3692 tdm_tx_ch_put),
3693 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3694 tdm_rx_sample_rate_get,
3695 tdm_rx_sample_rate_put),
3696 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3697 tdm_tx_sample_rate_get,
3698 tdm_tx_sample_rate_put),
3699 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3700 tdm_rx_format_get,
3701 tdm_rx_format_put),
3702 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3703 tdm_tx_format_get,
3704 tdm_tx_format_put),
3705 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3706 tdm_rx_ch_get,
3707 tdm_rx_ch_put),
3708 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3709 tdm_tx_ch_get,
3710 tdm_tx_ch_put),
3711 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3712 tdm_rx_sample_rate_get,
3713 tdm_rx_sample_rate_put),
3714 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3715 tdm_tx_sample_rate_get,
3716 tdm_tx_sample_rate_put),
3717 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3718 tdm_rx_format_get,
3719 tdm_rx_format_put),
3720 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3721 tdm_tx_format_get,
3722 tdm_tx_format_put),
3723 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3724 tdm_rx_ch_get,
3725 tdm_rx_ch_put),
3726 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3727 tdm_tx_ch_get,
3728 tdm_tx_ch_put),
3729 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3730 aux_pcm_rx_sample_rate_get,
3731 aux_pcm_rx_sample_rate_put),
3732 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3733 aux_pcm_rx_sample_rate_get,
3734 aux_pcm_rx_sample_rate_put),
3735 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3736 aux_pcm_rx_sample_rate_get,
3737 aux_pcm_rx_sample_rate_put),
3738 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3739 aux_pcm_rx_sample_rate_get,
3740 aux_pcm_rx_sample_rate_put),
3741 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3742 aux_pcm_rx_sample_rate_get,
3743 aux_pcm_rx_sample_rate_put),
3744 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3745 aux_pcm_tx_sample_rate_get,
3746 aux_pcm_tx_sample_rate_put),
3747 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3748 aux_pcm_tx_sample_rate_get,
3749 aux_pcm_tx_sample_rate_put),
3750 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3751 aux_pcm_tx_sample_rate_get,
3752 aux_pcm_tx_sample_rate_put),
3753 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3754 aux_pcm_tx_sample_rate_get,
3755 aux_pcm_tx_sample_rate_put),
3756 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3757 aux_pcm_tx_sample_rate_get,
3758 aux_pcm_tx_sample_rate_put),
3759 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3760 mi2s_rx_sample_rate_get,
3761 mi2s_rx_sample_rate_put),
3762 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3763 mi2s_rx_sample_rate_get,
3764 mi2s_rx_sample_rate_put),
3765 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3766 mi2s_rx_sample_rate_get,
3767 mi2s_rx_sample_rate_put),
3768 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3769 mi2s_rx_sample_rate_get,
3770 mi2s_rx_sample_rate_put),
3771 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3772 mi2s_rx_sample_rate_get,
3773 mi2s_rx_sample_rate_put),
3774 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3775 mi2s_tx_sample_rate_get,
3776 mi2s_tx_sample_rate_put),
3777 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3778 mi2s_tx_sample_rate_get,
3779 mi2s_tx_sample_rate_put),
3780 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3781 mi2s_tx_sample_rate_get,
3782 mi2s_tx_sample_rate_put),
3783 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3784 mi2s_tx_sample_rate_get,
3785 mi2s_tx_sample_rate_put),
3786 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3787 mi2s_tx_sample_rate_get,
3788 mi2s_tx_sample_rate_put),
3789 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3790 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3791 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3792 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3793 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3794 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3795 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3796 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3797 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3798 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3799 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3800 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3801 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3802 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3803 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3804 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3805 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3806 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3807 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3808 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3809 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3810 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3811 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3812 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3813 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3814 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3815 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3816 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3817 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3818 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3819 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3820 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3821 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3822 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3823 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3824 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3825 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3826 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3827 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3828 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3829 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3830 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3831 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3832 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3833 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3834 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3835 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3836 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3837 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3838 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3839 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3840 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3841 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3842 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3843 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3844 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3845 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3846 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3847 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3848 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3849 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3850 msm_hifi_put),
3851 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3852 msm_bt_sample_rate_get,
3853 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3854 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3855 msm_bt_sample_rate_rx_get,
3856 msm_bt_sample_rate_rx_put),
3857 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3858 msm_bt_sample_rate_tx_get,
3859 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3860 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3861 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3862};
3863
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3864static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3865 int enable, bool dapm)
3866{
3867 int ret = 0;
3868
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3869 if (!strcmp(component->name, "tavil_codec")) {
3870 ret = tavil_cdc_mclk_enable(component, enable);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3871 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3872 dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3873 __func__);
3874 ret = -EINVAL;
3875 }
3876 return ret;
3877}
3878
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3879static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3880 int enable, bool dapm)
3881{
3882 int ret = 0;
3883
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3884 if (!strcmp(component->name, "tavil_codec")) {
3885 ret = tavil_cdc_mclk_tx_enable(component, enable);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3886 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3887 dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3888 __func__);
3889 ret = -EINVAL;
3890 }
3891
3892 return ret;
3893}
3894
3895static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3896 struct snd_kcontrol *kcontrol, int event)
3897{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3898 struct snd_soc_component *component =
3899 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3900
3901 pr_debug("%s: event = %d\n", __func__, event);
3902
3903 switch (event) {
3904 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3905 return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3906 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3907 return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3908 }
3909 return 0;
3910}
3911
3912static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3913 struct snd_kcontrol *kcontrol, int event)
3914{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3915 struct snd_soc_component *component =
3916 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3917
3918 pr_debug("%s: event = %d\n", __func__, event);
3919
3920 switch (event) {
3921 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3922 return msm_snd_enable_codec_ext_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3923 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3924 return msm_snd_enable_codec_ext_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3925 }
3926 return 0;
3927}
3928
3929static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3930 struct snd_kcontrol *k, int event)
3931{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3932 struct snd_soc_component *component =
3933 snd_soc_dapm_to_component(w->dapm);
3934 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3935 struct msm_asoc_mach_data *pdata =
3936 snd_soc_card_get_drvdata(card);
3937
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3938 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3939 __func__, msm_hifi_control);
3940
3941 if (!pdata || !pdata->hph_en0_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3942 dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
3943 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3944 return -EINVAL;
3945 }
3946
3947 if (msm_hifi_control != MSM_HIFI_ON) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3948 dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3949 __func__);
3950 return 0;
3951 }
3952
3953 switch (event) {
3954 case SND_SOC_DAPM_POST_PMU:
3955 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3956 break;
3957 case SND_SOC_DAPM_PRE_PMD:
3958 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3959 break;
3960 }
3961
3962 return 0;
3963}
3964
3965static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3966
3967 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3968 msm_mclk_event,
3969 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3970
3971 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3972 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3973
3974 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3975 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3976 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3977 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3978 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3979 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3980 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3981 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3982
3983 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3984 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3985 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3986 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3987 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3988 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3989};
3990
3991static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3992 struct snd_kcontrol *kcontrol, int event)
3993{
3994 struct msm_asoc_mach_data *pdata = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3995 struct snd_soc_component *component =
3996 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3997 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3998 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3999 int *dmic_gpio_cnt;
4000 struct device_node *dmic_gpio;
4001 char *wname;
4002
4003 wname = strpbrk(w->name, "0123");
4004 if (!wname) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4005 dev_err(component->dev, "%s: widget not found\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4006 return -EINVAL;
4007 }
4008
4009 ret = kstrtouint(wname, 10, &dmic_idx);
4010 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4011 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4012 __func__);
4013 return -EINVAL;
4014 }
4015
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4016 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4017
4018 switch (dmic_idx) {
4019 case 0:
4020 case 1:
4021 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4022 dmic_gpio = pdata->dmic01_gpio_p;
4023 break;
4024 case 2:
4025 case 3:
4026 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4027 dmic_gpio = pdata->dmic23_gpio_p;
4028 break;
4029 default:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4030 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4031 __func__);
4032 return -EINVAL;
4033 }
4034
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4035 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4036 __func__, event, dmic_idx, *dmic_gpio_cnt);
4037
4038 switch (event) {
4039 case SND_SOC_DAPM_PRE_PMU:
4040 (*dmic_gpio_cnt)++;
4041 if (*dmic_gpio_cnt == 1) {
4042 ret = msm_cdc_pinctrl_select_active_state(
4043 dmic_gpio);
4044 if (ret < 0) {
4045 pr_err("%s: gpio set cannot be activated %sd",
4046 __func__, "dmic_gpio");
4047 return ret;
4048 }
4049 }
4050
4051 break;
4052 case SND_SOC_DAPM_POST_PMD:
4053 (*dmic_gpio_cnt)--;
4054 if (*dmic_gpio_cnt == 0) {
4055 ret = msm_cdc_pinctrl_select_sleep_state(
4056 dmic_gpio);
4057 if (ret < 0) {
4058 pr_err("%s: gpio set cannot be de-activated %sd",
4059 __func__, "dmic_gpio");
4060 return ret;
4061 }
4062 }
4063 break;
4064 default:
4065 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4066 return -EINVAL;
4067 }
4068 return 0;
4069}
4070
4071static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4072 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4073 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4074 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4075 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4076 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4077 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4078 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4079 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4080};
4081
4082static inline int param_is_mask(int p)
4083{
4084 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4085 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4086}
4087
4088static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4089 int n)
4090{
4091 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4092}
4093
4094static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4095 unsigned int bit)
4096{
4097 if (bit >= SNDRV_MASK_MAX)
4098 return;
4099 if (param_is_mask(n)) {
4100 struct snd_mask *m = param_to_mask(p, n);
4101
4102 m->bits[0] = 0;
4103 m->bits[1] = 0;
4104 m->bits[bit >> 5] |= (1 << (bit & 31));
4105 }
4106}
4107
4108static int msm_slim_get_ch_from_beid(int32_t be_id)
4109{
4110 int ch_id = 0;
4111
4112 switch (be_id) {
4113 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4114 ch_id = SLIM_RX_0;
4115 break;
4116 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4117 ch_id = SLIM_RX_1;
4118 break;
4119 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4120 ch_id = SLIM_RX_2;
4121 break;
4122 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4123 ch_id = SLIM_RX_3;
4124 break;
4125 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4126 ch_id = SLIM_RX_4;
4127 break;
4128 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4129 ch_id = SLIM_RX_6;
4130 break;
4131 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4132 ch_id = SLIM_TX_0;
4133 break;
4134 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4135 ch_id = SLIM_TX_3;
4136 break;
4137 default:
4138 ch_id = SLIM_RX_0;
4139 break;
4140 }
4141
4142 return ch_id;
4143}
4144
4145static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4146{
4147 int idx = 0;
4148
4149 switch (be_id) {
4150 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4151 idx = WSA_CDC_DMA_RX_0;
4152 break;
4153 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4154 idx = WSA_CDC_DMA_TX_0;
4155 break;
4156 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4157 idx = WSA_CDC_DMA_RX_1;
4158 break;
4159 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4160 idx = WSA_CDC_DMA_TX_1;
4161 break;
4162 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4163 idx = WSA_CDC_DMA_TX_2;
4164 break;
4165 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4166 idx = RX_CDC_DMA_RX_0;
4167 break;
4168 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4169 idx = RX_CDC_DMA_RX_1;
4170 break;
4171 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4172 idx = RX_CDC_DMA_RX_2;
4173 break;
4174 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4175 idx = RX_CDC_DMA_RX_3;
4176 break;
4177 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4178 idx = RX_CDC_DMA_RX_5;
4179 break;
4180 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4181 idx = TX_CDC_DMA_TX_0;
4182 break;
4183 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4184 idx = TX_CDC_DMA_TX_3;
4185 break;
4186 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4187 idx = TX_CDC_DMA_TX_4;
4188 break;
4189 default:
4190 idx = RX_CDC_DMA_RX_0;
4191 break;
4192 }
4193
4194 return idx;
4195}
4196
4197static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4198{
4199 int idx = -EINVAL;
4200
4201 switch (be_id) {
4202 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4203 idx = DP_RX_IDX;
4204 break;
4205 default:
4206 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4207 idx = -EINVAL;
4208 break;
4209 }
4210
4211 return idx;
4212}
4213
4214static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4215 struct snd_pcm_hw_params *params)
4216{
4217 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4218 struct snd_interval *rate = hw_param_interval(params,
4219 SNDRV_PCM_HW_PARAM_RATE);
4220 struct snd_interval *channels = hw_param_interval(params,
4221 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4222 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4223
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4224 int rc = 0;
4225 int idx;
4226 void *config = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4227 struct snd_soc_component *component = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4228
4229 pr_debug("%s: format = %d, rate = %d\n",
4230 __func__, params_format(params), params_rate(params));
4231
4232 switch (dai_link->id) {
4233 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4234 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4235 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4236 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4237 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4238 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4239 idx = msm_slim_get_ch_from_beid(dai_link->id);
4240 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4241 slim_rx_cfg[idx].bit_format);
4242 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4243 channels->min = channels->max = slim_rx_cfg[idx].channels;
4244 break;
4245
4246 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4247 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4248 idx = msm_slim_get_ch_from_beid(dai_link->id);
4249 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4250 slim_tx_cfg[idx].bit_format);
4251 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4252 channels->min = channels->max = slim_tx_cfg[idx].channels;
4253 break;
4254
4255 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4256 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4257 slim_tx_cfg[1].bit_format);
4258 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4259 channels->min = channels->max = slim_tx_cfg[1].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 SNDRV_PCM_FORMAT_S32_LE);
4265 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4266 channels->min = channels->max = msm_vi_feed_tx_ch;
4267 break;
4268
4269 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4270 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4271 slim_rx_cfg[5].bit_format);
4272 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4273 channels->min = channels->max = slim_rx_cfg[5].channels;
4274 break;
4275
4276 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4277 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4278 if (!component) {
4279 pr_err("%s: component is NULL\n", __func__);
4280 rc = -EINVAL;
4281 goto done;
4282 }
4283
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4284 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4285 channels->min = channels->max = 1;
4286
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4287 config = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4288 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4289 if (config) {
4290 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4291 config, SLIMBUS_5_TX);
4292 if (rc)
4293 pr_err("%s: Failed to set slimbus slave port config %d\n",
4294 __func__, rc);
4295 }
4296 break;
4297
4298 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 slim_rx_cfg[SLIM_RX_7].bit_format);
4301 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4302 channels->min = channels->max =
4303 slim_rx_cfg[SLIM_RX_7].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4307 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4308 channels->min = channels->max =
4309 slim_tx_cfg[SLIM_TX_7].channels;
4310 break;
4311
4312 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4313 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4314 channels->min = channels->max =
4315 slim_tx_cfg[SLIM_TX_8].channels;
4316 break;
4317
4318 case MSM_BACKEND_DAI_USB_RX:
4319 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4320 usb_rx_cfg.bit_format);
4321 rate->min = rate->max = usb_rx_cfg.sample_rate;
4322 channels->min = channels->max = usb_rx_cfg.channels;
4323 break;
4324
4325 case MSM_BACKEND_DAI_USB_TX:
4326 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4327 usb_tx_cfg.bit_format);
4328 rate->min = rate->max = usb_tx_cfg.sample_rate;
4329 channels->min = channels->max = usb_tx_cfg.channels;
4330 break;
4331
4332 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4333 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4334 if (idx < 0) {
4335 pr_err("%s: Incorrect ext disp idx %d\n",
4336 __func__, idx);
4337 rc = idx;
4338 goto done;
4339 }
4340
4341 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4342 ext_disp_rx_cfg[idx].bit_format);
4343 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4344 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4345 break;
4346
4347 case MSM_BACKEND_DAI_AFE_PCM_RX:
4348 channels->min = channels->max = proxy_rx_cfg.channels;
4349 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4350 break;
4351
4352 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4353 channels->min = channels->max =
4354 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4357 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4358 break;
4359
4360 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4361 channels->min = channels->max =
4362 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4365 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4366 break;
4367
4368 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4369 channels->min = channels->max =
4370 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4373 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4374 break;
4375
4376 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4377 channels->min = channels->max =
4378 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4379 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4380 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4381 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4382 break;
4383
4384 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4385 channels->min = channels->max =
4386 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4387 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4388 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4389 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4390 break;
4391
4392 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4393 channels->min = channels->max =
4394 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4395 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4396 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4397 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4398 break;
4399
4400 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4401 channels->min = channels->max =
4402 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4405 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4406 break;
4407
4408 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4409 channels->min = channels->max =
4410 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4411 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4412 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4413 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4414 break;
4415
4416 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4417 channels->min = channels->max =
4418 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4419 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4420 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4421 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4422 break;
4423
4424 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4425 channels->min = channels->max =
4426 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4427 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4428 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4429 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4430 break;
4431
4432
4433 case MSM_BACKEND_DAI_AUXPCM_RX:
4434 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4435 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4436 rate->min = rate->max =
4437 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4438 channels->min = channels->max =
4439 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4440 break;
4441
4442 case MSM_BACKEND_DAI_AUXPCM_TX:
4443 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4444 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4445 rate->min = rate->max =
4446 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4447 channels->min = channels->max =
4448 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4449 break;
4450
4451 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4452 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4453 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4454 rate->min = rate->max =
4455 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4456 channels->min = channels->max =
4457 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4458 break;
4459
4460 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4461 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4462 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4463 rate->min = rate->max =
4464 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4465 channels->min = channels->max =
4466 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4467 break;
4468
4469 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4470 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4471 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4472 rate->min = rate->max =
4473 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4474 channels->min = channels->max =
4475 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4476 break;
4477
4478 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4479 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4480 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4481 rate->min = rate->max =
4482 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4483 channels->min = channels->max =
4484 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4485 break;
4486
4487 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4488 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4489 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4490 rate->min = rate->max =
4491 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4492 channels->min = channels->max =
4493 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4494 break;
4495
4496 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4497 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4498 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4499 rate->min = rate->max =
4500 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4501 channels->min = channels->max =
4502 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4503 break;
4504
4505 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4506 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4507 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4508 rate->min = rate->max =
4509 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4510 channels->min = channels->max =
4511 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4512 break;
4513
4514 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4515 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4516 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4517 rate->min = rate->max =
4518 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4519 channels->min = channels->max =
4520 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4521 break;
4522
4523 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4524 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4525 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4526 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4527 channels->min = channels->max =
4528 mi2s_rx_cfg[PRIM_MI2S].channels;
4529 break;
4530
4531 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4532 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4533 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4534 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4535 channels->min = channels->max =
4536 mi2s_tx_cfg[PRIM_MI2S].channels;
4537 break;
4538
4539 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4540 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4541 mi2s_rx_cfg[SEC_MI2S].bit_format);
4542 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4543 channels->min = channels->max =
4544 mi2s_rx_cfg[SEC_MI2S].channels;
4545 break;
4546
4547 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4548 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4549 mi2s_tx_cfg[SEC_MI2S].bit_format);
4550 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4551 channels->min = channels->max =
4552 mi2s_tx_cfg[SEC_MI2S].channels;
4553 break;
4554
4555 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4556 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4557 mi2s_rx_cfg[TERT_MI2S].bit_format);
4558 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4559 channels->min = channels->max =
4560 mi2s_rx_cfg[TERT_MI2S].channels;
4561 break;
4562
4563 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4564 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4565 mi2s_tx_cfg[TERT_MI2S].bit_format);
4566 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4567 channels->min = channels->max =
4568 mi2s_tx_cfg[TERT_MI2S].channels;
4569 break;
4570
4571 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4572 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4573 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4574 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4575 channels->min = channels->max =
4576 mi2s_rx_cfg[QUAT_MI2S].channels;
4577 break;
4578
4579 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4580 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4581 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4582 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4583 channels->min = channels->max =
4584 mi2s_tx_cfg[QUAT_MI2S].channels;
4585 break;
4586
4587 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4588 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4589 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4590 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4591 channels->min = channels->max =
4592 mi2s_rx_cfg[QUIN_MI2S].channels;
4593 break;
4594
4595 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4596 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4597 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4598 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4599 channels->min = channels->max =
4600 mi2s_tx_cfg[QUIN_MI2S].channels;
4601 break;
4602
4603 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4604 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4605 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4606 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4607 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4608 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4609 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4610 cdc_dma_rx_cfg[idx].bit_format);
4611 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4612 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4613 break;
4614
4615 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4616 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4617 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4618 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4619 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4620 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4621 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4622 cdc_dma_tx_cfg[idx].bit_format);
4623 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4624 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4625 break;
4626
4627 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4628 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4629 SNDRV_PCM_FORMAT_S32_LE);
4630 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4631 channels->min = channels->max = msm_vi_feed_tx_ch;
4632 break;
4633
4634 default:
4635 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4636 break;
4637 }
4638
4639done:
4640 return rc;
4641}
4642
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4643static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
4644 bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4645{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4646 struct snd_soc_card *card = component->card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4647 struct msm_asoc_mach_data *pdata =
4648 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4649
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4650 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4651 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4652
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4653 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4654}
4655
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4656static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4657{
4658 int value = 0;
4659 bool ret = false;
4660 struct snd_soc_card *card;
4661 struct msm_asoc_mach_data *pdata;
4662
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4663 if (!component) {
4664 pr_err("%s component is NULL\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4665 return false;
4666 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4667 card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4668 pdata = snd_soc_card_get_drvdata(card);
4669
4670 if (!pdata)
4671 return false;
4672
4673 if (wcd_mbhc_cfg.enable_usbc_analog)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4674 return msm_usbc_swap_gnd_mic(component, active);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4675
4676 /* if usbc is not defined, swap using us_euro_gpio_p */
4677 if (pdata->us_euro_gpio_p) {
4678 value = msm_cdc_pinctrl_get_state(
4679 pdata->us_euro_gpio_p);
4680 if (value)
4681 msm_cdc_pinctrl_select_sleep_state(
4682 pdata->us_euro_gpio_p);
4683 else
4684 msm_cdc_pinctrl_select_active_state(
4685 pdata->us_euro_gpio_p);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4686 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4687 __func__, value, !value);
4688 ret = true;
4689 }
4690 return ret;
4691}
4692
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4693static int msm_afe_set_config(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4694{
4695 int ret = 0;
4696 void *config_data = NULL;
4697
4698 if (!msm_codec_fn.get_afe_config_fn) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4699 dev_err(component->dev, "%s: codec get afe config not init'ed\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4700 __func__);
4701 return -EINVAL;
4702 }
4703
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4704 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4705 AFE_CDC_REGISTERS_CONFIG);
4706 if (config_data) {
4707 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4708 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4709 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4710 "%s: Failed to set codec registers config %d\n",
4711 __func__, ret);
4712 return ret;
4713 }
4714 }
4715
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4716 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4717 AFE_CDC_REGISTER_PAGE_CONFIG);
4718 if (config_data) {
4719 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4720 0);
4721 if (ret)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4722 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4723 "%s: Failed to set cdc register page config\n",
4724 __func__);
4725 }
4726
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4727 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4728 AFE_SLIMBUS_SLAVE_CONFIG);
4729 if (config_data) {
4730 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4731 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4732 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4733 "%s: Failed to set slimbus slave config %d\n",
4734 __func__, ret);
4735 return ret;
4736 }
4737 }
4738
4739 return 0;
4740}
4741
4742static void msm_afe_clear_config(void)
4743{
4744 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4745 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4746}
4747
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4748static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4749{
4750 int ret = 0;
4751 void *config_data;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4752 struct snd_soc_component *component = NULL;
4753 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4754 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4755 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4756 struct snd_soc_component *aux_comp;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4757 struct snd_card *card = rtd->card->snd_card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4758 struct snd_info_entry *entry;
4759 struct msm_asoc_mach_data *pdata =
4760 snd_soc_card_get_drvdata(rtd->card);
4761
4762 /*
4763 * Codec SLIMBUS configuration
4764 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4765 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4766 * TX14, TX15, TX16
4767 */
4768 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4769 150, 151};
4770 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4771 134, 135, 136, 137, 138, 139,
4772 140, 141, 142, 143};
4773
4774 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4775
4776 rtd->pmdown_time = 0;
4777
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4778 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4779 if (!component) {
4780 pr_err("%s: component is NULL\n", __func__);
4781 return -EINVAL;
4782 }
4783 dapm = snd_soc_component_get_dapm(component);
4784
4785 ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4786 ARRAY_SIZE(msm_tavil_snd_controls));
4787 if (ret < 0) {
4788 pr_err("%s: add_codec_controls failed, err %d\n",
4789 __func__, ret);
4790 return ret;
4791 }
4792
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4793 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4794 ARRAY_SIZE(msm_common_snd_controls));
4795 if (ret < 0) {
4796 pr_err("%s: add_codec_controls failed, err %d\n",
4797 __func__, ret);
4798 return ret;
4799 }
4800
4801 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4802 ARRAY_SIZE(msm_dapm_widgets_tavil));
4803
4804 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4805 ARRAY_SIZE(wcd_audio_paths_tavil));
4806
4807 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4808 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4809 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4810 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4811 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4812 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4813 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4814 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4815 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4816 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4817 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4818 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4819 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4820 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4821 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4822 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4823 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4824 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4825 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4826 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4827 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4828 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4829 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4830 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4831 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4832 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4833 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4834
4835 snd_soc_dapm_sync(dapm);
4836
4837 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4838 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4839
4840 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4841
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4842 ret = msm_afe_set_config(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4843 if (ret) {
4844 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4845 goto err;
4846 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4847 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4848
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4849 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4850 AFE_AANC_VERSION);
4851 if (config_data) {
4852 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4853 if (ret) {
4854 pr_err("%s: Failed to set aanc version %d\n",
4855 __func__, ret);
4856 goto err;
4857 }
4858 }
4859
4860 /*
4861 * Send speaker configuration only for WSA8810.
4862 * Default configuration is for WSA8815.
4863 */
4864 pr_debug("%s: Number of aux devices: %d\n",
4865 __func__, rtd->card->num_aux_devs);
4866 if (rtd->card->num_aux_devs &&
4867 !list_empty(&rtd->card->aux_comp_list)) {
4868 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4869 struct snd_soc_component, card_aux_list);
4870 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4871 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4872 tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
4873 tavil_set_spkr_gain_offset(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4874 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4875 }
4876 }
4877
4878 card = rtd->card->snd_card;
4879 entry = snd_info_create_subdir(card->module, "codecs",
4880 card->proc_root);
4881 if (!entry) {
4882 pr_debug("%s: Cannot create codecs module entry\n",
4883 __func__);
4884 ret = 0;
4885 goto err;
4886 }
4887 pdata->codec_root = entry;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4888 tavil_codec_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4889
4890 codec_reg_done = true;
4891 return 0;
4892err:
4893 return ret;
4894}
4895
4896static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4897{
4898 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4899 struct snd_soc_component *component;
4900 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4901 struct snd_card *card;
4902 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4903 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4904 struct msm_asoc_mach_data *pdata =
4905 snd_soc_card_get_drvdata(rtd->card);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4906 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4907
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4908 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4909 if (!component) {
4910 pr_err("%s: component is NULL\n", __func__);
4911 return -EINVAL;
4912 }
4913 dapm = snd_soc_component_get_dapm(component);
4914
4915 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4916 ARRAY_SIZE(msm_int_snd_controls));
4917 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4918 pr_err("%s: add_component_controls failed: %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4919 __func__, ret);
4920 return ret;
4921 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4922 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4923 ARRAY_SIZE(msm_common_snd_controls));
4924 if (ret < 0) {
4925 pr_err("%s: add common snd controls failed: %d\n",
4926 __func__, ret);
4927 return ret;
4928 }
4929
4930 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4931 ARRAY_SIZE(msm_int_dapm_widgets));
4932
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4933 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4934 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4935 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4936 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4937
4938 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4939 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4940 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4941 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4942
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4943 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4944 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4945 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4946 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4947
4948 snd_soc_dapm_sync(dapm);
4949
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4950 /*
4951 * Send speaker configuration only for WSA8810.
4952 * Default configuration is for WSA8815.
4953 */
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4954 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4955 __func__, rtd->card->num_aux_devs);
4956 if (rtd->card->num_aux_devs &&
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]4957 !list_empty(&rtd->card->aux_comp_list)) {
4958 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4959 struct snd_soc_component, card_aux_list);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4960 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4961 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4962 wsa_macro_set_spkr_mode(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4963 WSA_MACRO_SPKR_MODE_1);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4964 wsa_macro_set_spkr_gain_offset(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4965 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4966 }
4967 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4968 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4969 if (!pdata->codec_root) {
4970 entry = snd_info_create_subdir(card->module, "codecs",
4971 card->proc_root);
4972 if (!entry) {
4973 pr_debug("%s: Cannot create codecs module entry\n",
4974 __func__);
4975 ret = 0;
4976 goto err;
4977 }
4978 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4979 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4980 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4981 /*
4982 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
4983 * from AOSS to APSS. So, it uses SW workaround and listens to
4984 * interrupt from AFE over IPC.
4985 * Check for MSM version and MSM ID and register wake irq
4986 * accordingly to provide compatibility to all chipsets.
4987 */
4988 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
4989 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4990 bolero_register_wake_irq(component, true);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4991 else
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4992 bolero_register_wake_irq(component, false);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]4993
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4994 codec_reg_done = true;
4995 return 0;
4996err:
4997 return ret;
4998}
4999
5000static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5001{
5002 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5003 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
5004 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5005
5006 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5007 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5008}
5009
5010static void *def_wcd_mbhc_cal(void)
5011{
5012 void *wcd_mbhc_cal;
5013 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5014 u16 *btn_high;
5015
5016 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5017 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5018 if (!wcd_mbhc_cal)
5019 return NULL;
5020
5021#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5022 S(v_hs_max, 1600);
5023#undef S
5024#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5025 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5026#undef S
5027
5028 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5029 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5030 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5031
5032 btn_high[0] = 75;
5033 btn_high[1] = 150;
5034 btn_high[2] = 237;
5035 btn_high[3] = 500;
5036 btn_high[4] = 500;
5037 btn_high[5] = 500;
5038 btn_high[6] = 500;
5039 btn_high[7] = 500;
5040
5041 return wcd_mbhc_cal;
5042}
5043
5044static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5045 struct snd_pcm_hw_params *params)
5046{
5047 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5048 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5049 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5050 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5051
5052 int ret = 0;
5053 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5054 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5055 u32 user_set_tx_ch = 0;
5056 u32 rx_ch_count;
5057
5058 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5059 ret = snd_soc_dai_get_channel_map(codec_dai,
5060 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5061 if (ret < 0) {
5062 pr_err("%s: failed to get codec chan map, err:%d\n",
5063 __func__, ret);
5064 goto err;
5065 }
5066 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5067 pr_debug("%s: rx_5_ch=%d\n", __func__,
5068 slim_rx_cfg[5].channels);
5069 rx_ch_count = slim_rx_cfg[5].channels;
5070 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5071 pr_debug("%s: rx_2_ch=%d\n", __func__,
5072 slim_rx_cfg[2].channels);
5073 rx_ch_count = slim_rx_cfg[2].channels;
5074 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5075 pr_debug("%s: rx_6_ch=%d\n", __func__,
5076 slim_rx_cfg[6].channels);
5077 rx_ch_count = slim_rx_cfg[6].channels;
5078 } else {
5079 pr_debug("%s: rx_0_ch=%d\n", __func__,
5080 slim_rx_cfg[0].channels);
5081 rx_ch_count = slim_rx_cfg[0].channels;
5082 }
5083 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5084 rx_ch_count, rx_ch);
5085 if (ret < 0) {
5086 pr_err("%s: failed to set cpu chan map, err:%d\n",
5087 __func__, ret);
5088 goto err;
5089 }
5090 } else {
5091
5092 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5093 codec_dai->name, codec_dai->id, user_set_tx_ch);
5094 ret = snd_soc_dai_get_channel_map(codec_dai,
5095 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5096 if (ret < 0) {
5097 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5098 __func__, ret);
5099 goto err;
5100 }
5101 /* For <codec>_tx1 case */
5102 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5103 user_set_tx_ch = slim_tx_cfg[0].channels;
5104 /* For <codec>_tx3 case */
5105 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5106 user_set_tx_ch = slim_tx_cfg[1].channels;
5107 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5108 user_set_tx_ch = msm_vi_feed_tx_ch;
5109 else
5110 user_set_tx_ch = tx_ch_cnt;
5111
5112 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5113 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5114 tx_ch_cnt, dai_link->id);
5115
5116 ret = snd_soc_dai_set_channel_map(cpu_dai,
5117 user_set_tx_ch, tx_ch, 0, 0);
5118 if (ret < 0)
5119 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5120 __func__, ret);
5121 }
5122
5123err:
5124 return ret;
5125}
5126
5127
5128static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5129 struct snd_pcm_hw_params *params)
5130{
5131 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5132 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5133 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5134 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5135
5136 int ret = 0;
5137 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5138 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5139 u32 user_set_tx_ch = 0;
5140 u32 user_set_rx_ch = 0;
5141 u32 ch_id;
5142
5143 ret = snd_soc_dai_get_channel_map(codec_dai,
5144 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5145 &rx_ch_cdc_dma);
5146 if (ret < 0) {
5147 pr_err("%s: failed to get codec chan map, err:%d\n",
5148 __func__, ret);
5149 goto err;
5150 }
5151
5152 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5153 switch (dai_link->id) {
5154 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5155 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5156 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5157 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5158 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5159 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5160 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5161 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5162 {
5163 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5164 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5165 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5166 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5167 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5168 user_set_rx_ch, &rx_ch_cdc_dma);
5169 if (ret < 0) {
5170 pr_err("%s: failed to set cpu chan map, err:%d\n",
5171 __func__, ret);
5172 goto err;
5173 }
5174
5175 }
5176 break;
5177 }
5178 } else {
5179 switch (dai_link->id) {
5180 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5181 {
5182 user_set_tx_ch = msm_vi_feed_tx_ch;
5183 }
5184 break;
5185 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5186 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5187 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5188 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5189 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5190 {
5191 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5192 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5193 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5194 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5195 }
5196 break;
5197 }
5198
5199 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5200 &tx_ch_cdc_dma, 0, 0);
5201 if (ret < 0) {
5202 pr_err("%s: failed to set cpu chan map, err:%d\n",
5203 __func__, ret);
5204 goto err;
5205 }
5206 }
5207
5208err:
5209 return ret;
5210}
5211
5212static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5213 struct snd_pcm_hw_params *params)
5214{
5215 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5216 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5217 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5218 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5219 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5220 unsigned int num_tx_ch = 0;
5221 unsigned int num_rx_ch = 0;
5222 int ret = 0;
5223
5224 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5225 num_rx_ch = params_channels(params);
5226 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5227 codec_dai->name, codec_dai->id, num_rx_ch);
5228 ret = snd_soc_dai_get_channel_map(codec_dai,
5229 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5230 if (ret < 0) {
5231 pr_err("%s: failed to get codec chan map, err:%d\n",
5232 __func__, ret);
5233 goto err;
5234 }
5235 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5236 num_rx_ch, rx_ch);
5237 if (ret < 0) {
5238 pr_err("%s: failed to set cpu chan map, err:%d\n",
5239 __func__, ret);
5240 goto err;
5241 }
5242 } else {
5243 num_tx_ch = params_channels(params);
5244 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5245 codec_dai->name, codec_dai->id, num_tx_ch);
5246 ret = snd_soc_dai_get_channel_map(codec_dai,
5247 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5248 if (ret < 0) {
5249 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5250 __func__, ret);
5251 goto err;
5252 }
5253 ret = snd_soc_dai_set_channel_map(cpu_dai,
5254 num_tx_ch, tx_ch, 0, 0);
5255 if (ret < 0) {
5256 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5257 __func__, ret);
5258 goto err;
5259 }
5260 }
5261
5262err:
5263 return ret;
5264}
5265
5266static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5267 struct snd_pcm_hw_params *params)
5268{
5269 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5270 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5271 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5272 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5273 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5274 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5275 int ret;
5276
5277 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5278 codec_dai->name, codec_dai->id);
5279 ret = snd_soc_dai_get_channel_map(codec_dai,
5280 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5281 if (ret) {
5282 dev_err(rtd->dev,
5283 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5284 __func__, ret);
5285 goto err;
5286 }
5287
5288 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5289 __func__, tx_ch_cnt, dai_link->id);
5290
5291 ret = snd_soc_dai_set_channel_map(cpu_dai,
5292 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5293 if (ret)
5294 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5295 __func__, ret);
5296
5297err:
5298 return ret;
5299}
5300
5301static int msm_get_port_id(int be_id)
5302{
5303 int afe_port_id;
5304
5305 switch (be_id) {
5306 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5307 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5308 break;
5309 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5310 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5311 break;
5312 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5313 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5314 break;
5315 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5316 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5317 break;
5318 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5319 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5320 break;
5321 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5322 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5323 break;
5324 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5325 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5326 break;
5327 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5328 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5329 break;
5330 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5331 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5332 break;
5333 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5334 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5335 break;
5336 default:
5337 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5338 afe_port_id = -EINVAL;
5339 }
5340
5341 return afe_port_id;
5342}
5343
5344static u32 get_mi2s_bits_per_sample(u32 bit_format)
5345{
5346 u32 bit_per_sample;
5347
5348 switch (bit_format) {
5349 case SNDRV_PCM_FORMAT_S32_LE:
5350 case SNDRV_PCM_FORMAT_S24_3LE:
5351 case SNDRV_PCM_FORMAT_S24_LE:
5352 bit_per_sample = 32;
5353 break;
5354 case SNDRV_PCM_FORMAT_S16_LE:
5355 default:
5356 bit_per_sample = 16;
5357 break;
5358 }
5359
5360 return bit_per_sample;
5361}
5362
5363static void update_mi2s_clk_val(int dai_id, int stream)
5364{
5365 u32 bit_per_sample;
5366
5367 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5368 bit_per_sample =
5369 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5370 mi2s_clk[dai_id].clk_freq_in_hz =
5371 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5372 } else {
5373 bit_per_sample =
5374 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5375 mi2s_clk[dai_id].clk_freq_in_hz =
5376 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5377 }
5378}
5379
5380static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5381{
5382 int ret = 0;
5383 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5384 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5385 int port_id = 0;
5386 int index = cpu_dai->id;
5387
5388 port_id = msm_get_port_id(rtd->dai_link->id);
5389 if (port_id < 0) {
5390 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5391 ret = port_id;
5392 goto err;
5393 }
5394
5395 if (enable) {
5396 update_mi2s_clk_val(index, substream->stream);
5397 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5398 mi2s_clk[index].clk_freq_in_hz);
5399 }
5400
5401 mi2s_clk[index].enable = enable;
5402 ret = afe_set_lpass_clock_v2(port_id,
5403 &mi2s_clk[index]);
5404 if (ret < 0) {
5405 dev_err(rtd->card->dev,
5406 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5407 __func__, port_id, ret);
5408 goto err;
5409 }
5410
5411err:
5412 return ret;
5413}
5414
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5415static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5416 struct snd_pcm_hw_params *params)
5417{
5418 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5419 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5420 int ret = 0;
5421 int slot_width = 32;
5422 int channels, slots;
5423 unsigned int slot_mask, rate, clk_freq;
5424 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5425
5426 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5427
5428 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5429 switch (cpu_dai->id) {
5430 case AFE_PORT_ID_PRIMARY_TDM_RX:
5431 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5432 break;
5433 case AFE_PORT_ID_SECONDARY_TDM_RX:
5434 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5435 break;
5436 case AFE_PORT_ID_TERTIARY_TDM_RX:
5437 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5438 break;
5439 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5440 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5441 break;
5442 case AFE_PORT_ID_QUINARY_TDM_RX:
5443 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5444 break;
5445 case AFE_PORT_ID_PRIMARY_TDM_TX:
5446 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5447 break;
5448 case AFE_PORT_ID_SECONDARY_TDM_TX:
5449 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5450 break;
5451 case AFE_PORT_ID_TERTIARY_TDM_TX:
5452 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5453 break;
5454 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5455 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5456 break;
5457 case AFE_PORT_ID_QUINARY_TDM_TX:
5458 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5459 break;
5460
5461 default:
5462 pr_err("%s: dai id 0x%x not supported\n",
5463 __func__, cpu_dai->id);
5464 return -EINVAL;
5465 }
5466
5467 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5468 /*2 slot config - bits 0 and 1 set for the first two slots */
5469 slot_mask = 0x0000FFFF >> (16-slots);
5470 channels = slots;
5471
5472 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5473 __func__, slot_width, slots);
5474
5475 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5476 slots, slot_width);
5477 if (ret < 0) {
5478 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5479 __func__, ret);
5480 goto end;
5481 }
5482
5483 ret = snd_soc_dai_set_channel_map(cpu_dai,
5484 0, NULL, channels, slot_offset);
5485 if (ret < 0) {
5486 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5487 __func__, ret);
5488 goto end;
5489 }
5490 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5491 /*2 slot config - bits 0 and 1 set for the first two slots */
5492 slot_mask = 0x0000FFFF >> (16-slots);
5493 channels = slots;
5494
5495 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5496 __func__, slot_width, slots);
5497
5498 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5499 slots, slot_width);
5500 if (ret < 0) {
5501 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5502 __func__, ret);
5503 goto end;
5504 }
5505
5506 ret = snd_soc_dai_set_channel_map(cpu_dai,
5507 channels, slot_offset, 0, NULL);
5508 if (ret < 0) {
5509 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5510 __func__, ret);
5511 goto end;
5512 }
5513 } else {
5514 ret = -EINVAL;
5515 pr_err("%s: invalid use case, err:%d\n",
5516 __func__, ret);
5517 goto end;
5518 }
5519
5520 rate = params_rate(params);
5521 clk_freq = rate * slot_width * slots;
5522 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5523 if (ret < 0)
5524 pr_err("%s: failed to set tdm clk, err:%d\n",
5525 __func__, ret);
5526
5527end:
5528 return ret;
5529}
5530
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5531static int msm_get_tdm_mode(u32 port_id)
5532{
5533 int tdm_mode;
5534
5535 switch (port_id) {
5536 case AFE_PORT_ID_PRIMARY_TDM_RX:
5537 case AFE_PORT_ID_PRIMARY_TDM_TX:
5538 tdm_mode = TDM_PRI;
5539 break;
5540 case AFE_PORT_ID_SECONDARY_TDM_RX:
5541 case AFE_PORT_ID_SECONDARY_TDM_TX:
5542 tdm_mode = TDM_SEC;
5543 break;
5544 case AFE_PORT_ID_TERTIARY_TDM_RX:
5545 case AFE_PORT_ID_TERTIARY_TDM_TX:
5546 tdm_mode = TDM_TERT;
5547 break;
5548 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5549 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5550 tdm_mode = TDM_QUAT;
5551 break;
5552 case AFE_PORT_ID_QUINARY_TDM_RX:
5553 case AFE_PORT_ID_QUINARY_TDM_TX:
5554 tdm_mode = TDM_QUIN;
5555 break;
5556 default:
5557 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
5558 tdm_mode = -EINVAL;
5559 }
5560 return tdm_mode;
5561}
5562
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5563static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5564{
5565 int ret = 0;
5566 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5567 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5568 struct snd_soc_card *card = rtd->card;
5569 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5570 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5571
5572 if (tdm_mode < 0) {
5573 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5574 return tdm_mode;
5575 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5576
5577 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5578 if (pdata->mi2s_gpio_p[tdm_mode])
5579 ret = msm_cdc_pinctrl_select_active_state(
5580 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5581
5582 return ret;
5583}
5584
5585static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5586{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5587 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5588 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5589 struct snd_soc_card *card = rtd->card;
5590 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5591 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5592
5593 if (tdm_mode < 0) {
5594 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5595 return;
5596 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5597
5598 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5599 if (pdata->mi2s_gpio_p[tdm_mode])
5600 msm_cdc_pinctrl_select_sleep_state(
5601 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5602}
5603
5604static struct snd_soc_ops sm6150_tdm_be_ops = {
5605 .hw_params = sm6150_tdm_snd_hw_params,
5606 .startup = sm6150_tdm_snd_startup,
5607 .shutdown = sm6150_tdm_snd_shutdown
5608};
5609
5610static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5611{
5612 cpumask_t mask;
5613
5614 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5615 pm_qos_remove_request(&substream->latency_pm_qos_req);
5616
5617 cpumask_clear(&mask);
5618 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5619 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5620 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5621
5622 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5623
5624 pm_qos_add_request(&substream->latency_pm_qos_req,
5625 PM_QOS_CPU_DMA_LATENCY,
5626 MSM_LL_QOS_VALUE);
5627 return 0;
5628}
5629
5630static struct snd_soc_ops msm_fe_qos_ops = {
5631 .prepare = msm_fe_qos_prepare,
5632};
5633
5634static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5635{
5636 int ret = 0;
5637 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5638 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5639 int index = cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5640 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5641 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5642 struct snd_soc_card *card = rtd->card;
5643 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5644
5645 dev_dbg(rtd->card->dev,
5646 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5647 __func__, substream->name, substream->stream,
5648 cpu_dai->name, cpu_dai->id);
5649
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5650 if (port_id < 0) {
5651 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5652 ret = port_id;
5653 goto err;
5654 }
5655
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5656 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5657 ret = -EINVAL;
5658 dev_err(rtd->card->dev,
5659 "%s: CPU DAI id (%d) out of range\n",
5660 __func__, cpu_dai->id);
5661 goto err;
5662 }
5663 /*
5664 * Mutex protection in case the same MI2S
5665 * interface using for both TX and RX so
5666 * that the same clock won't be enable twice.
5667 */
5668 mutex_lock(&mi2s_intf_conf[index].lock);
5669 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5670 /* Check if msm needs to provide the clock to the interface */
5671 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5672 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5673 fmt = SND_SOC_DAIFMT_CBM_CFM;
5674 }
5675 ret = msm_mi2s_set_sclk(substream, true);
5676 if (ret < 0) {
5677 dev_err(rtd->card->dev,
5678 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5679 __func__, ret);
5680 goto clean_up;
5681 }
5682
5683 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5684 if (ret < 0) {
5685 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5686 __func__, index, ret);
5687 goto clk_off;
5688 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5689 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5690 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
5691 __func__, mi2s_mclk[index].clk_freq_in_hz);
5692 ret = afe_set_lpass_clock_v2(port_id,
5693 &mi2s_mclk[index]);
5694 if (ret < 0) {
5695 pr_err("%s: afe lpass mclk failed, err:%d\n",
5696 __func__, ret);
5697 goto clk_off;
5698 }
5699 mi2s_mclk[index].enable = 1;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5700 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5701 if (pdata->mi2s_gpio_p[index])
5702 msm_cdc_pinctrl_select_active_state(
5703 pdata->mi2s_gpio_p[index]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5704 }
5705clk_off:
5706 if (ret < 0)
5707 msm_mi2s_set_sclk(substream, false);
5708clean_up:
5709 if (ret < 0)
5710 mi2s_intf_conf[index].ref_cnt--;
5711 mutex_unlock(&mi2s_intf_conf[index].lock);
5712err:
5713 return ret;
5714}
5715
5716static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5717{
5718 int ret;
5719 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5720 int index = rtd->cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5721 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5722 struct snd_soc_card *card = rtd->card;
5723 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5724
5725 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5726 substream->name, substream->stream);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5727
5728 if (port_id < 0) {
5729 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5730 return;
5731 }
5732
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5733 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5734 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5735 return;
5736 }
5737
5738 mutex_lock(&mi2s_intf_conf[index].lock);
5739 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5740 if (pdata->mi2s_gpio_p[index])
5741 msm_cdc_pinctrl_select_sleep_state(
5742 pdata->mi2s_gpio_p[index]);
5743
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5744 ret = msm_mi2s_set_sclk(substream, false);
5745 if (ret < 0)
5746 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5747 __func__, index, ret);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5748
5749 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5750 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
5751 __func__, mi2s_mclk[index].clk_freq_in_hz);
5752 ret = afe_set_lpass_clock_v2(port_id,
5753 &mi2s_mclk[index]);
5754 if (ret < 0)
5755 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
5756 __func__, index, ret);
5757 mi2s_mclk[index].enable = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5758 }
5759 }
5760 mutex_unlock(&mi2s_intf_conf[index].lock);
5761}
5762
5763static struct snd_soc_ops msm_mi2s_be_ops = {
5764 .startup = msm_mi2s_snd_startup,
5765 .shutdown = msm_mi2s_snd_shutdown,
5766};
5767
5768static struct snd_soc_ops msm_cdc_dma_be_ops = {
5769 .hw_params = msm_snd_cdc_dma_hw_params,
5770};
5771
5772static struct snd_soc_ops msm_be_ops = {
5773 .hw_params = msm_snd_hw_params,
5774};
5775
5776static struct snd_soc_ops msm_slimbus_2_be_ops = {
5777 .hw_params = msm_slimbus_2_hw_params,
5778};
5779
5780static struct snd_soc_ops msm_wcn_ops = {
5781 .hw_params = msm_wcn_hw_params,
5782};
5783
5784
5785/* Digital audio interface glue - connects codec <---> CPU */
5786static struct snd_soc_dai_link msm_common_dai_links[] = {
5787 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5788 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5789 .name = MSM_DAILINK_NAME(Media1),
5790 .stream_name = "MultiMedia1",
5791 .cpu_dai_name = "MultiMedia1",
5792 .platform_name = "msm-pcm-dsp.0",
5793 .dynamic = 1,
5794 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5795 .dpcm_playback = 1,
5796 .dpcm_capture = 1,
5797 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5798 SND_SOC_DPCM_TRIGGER_POST},
5799 .codec_dai_name = "snd-soc-dummy-dai",
5800 .codec_name = "snd-soc-dummy",
5801 .ignore_suspend = 1,
5802 /* this dainlink has playback support */
5803 .ignore_pmdown_time = 1,
5804 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5805 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5806 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5807 .name = MSM_DAILINK_NAME(Media2),
5808 .stream_name = "MultiMedia2",
5809 .cpu_dai_name = "MultiMedia2",
5810 .platform_name = "msm-pcm-dsp.0",
5811 .dynamic = 1,
5812 .dpcm_playback = 1,
5813 .dpcm_capture = 1,
5814 .codec_dai_name = "snd-soc-dummy-dai",
5815 .codec_name = "snd-soc-dummy",
5816 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5817 SND_SOC_DPCM_TRIGGER_POST},
5818 .ignore_suspend = 1,
5819 /* this dainlink has playback support */
5820 .ignore_pmdown_time = 1,
5821 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5822 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5823 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5824 .name = "VoiceMMode1",
5825 .stream_name = "VoiceMMode1",
5826 .cpu_dai_name = "VoiceMMode1",
5827 .platform_name = "msm-pcm-voice",
5828 .dynamic = 1,
5829 .dpcm_playback = 1,
5830 .dpcm_capture = 1,
5831 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5832 SND_SOC_DPCM_TRIGGER_POST},
5833 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5834 .ignore_suspend = 1,
5835 .ignore_pmdown_time = 1,
5836 .codec_dai_name = "snd-soc-dummy-dai",
5837 .codec_name = "snd-soc-dummy",
5838 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5839 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5840 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5841 .name = "MSM VoIP",
5842 .stream_name = "VoIP",
5843 .cpu_dai_name = "VoIP",
5844 .platform_name = "msm-voip-dsp",
5845 .dynamic = 1,
5846 .dpcm_playback = 1,
5847 .dpcm_capture = 1,
5848 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5849 SND_SOC_DPCM_TRIGGER_POST},
5850 .codec_dai_name = "snd-soc-dummy-dai",
5851 .codec_name = "snd-soc-dummy",
5852 .ignore_suspend = 1,
5853 /* this dainlink has playback support */
5854 .ignore_pmdown_time = 1,
5855 .id = MSM_FRONTEND_DAI_VOIP,
5856 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5857 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5858 .name = MSM_DAILINK_NAME(ULL),
5859 .stream_name = "MultiMedia3",
5860 .cpu_dai_name = "MultiMedia3",
5861 .platform_name = "msm-pcm-dsp.2",
5862 .dynamic = 1,
5863 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5864 .dpcm_playback = 1,
5865 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5866 SND_SOC_DPCM_TRIGGER_POST},
5867 .codec_dai_name = "snd-soc-dummy-dai",
5868 .codec_name = "snd-soc-dummy",
5869 .ignore_suspend = 1,
5870 /* this dainlink has playback support */
5871 .ignore_pmdown_time = 1,
5872 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5873 },
5874 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5875 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5876 .name = "SLIMBUS_0 Hostless",
5877 .stream_name = "SLIMBUS_0 Hostless",
5878 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5879 .platform_name = "msm-pcm-hostless",
5880 .dynamic = 1,
5881 .dpcm_playback = 1,
5882 .dpcm_capture = 1,
5883 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5884 SND_SOC_DPCM_TRIGGER_POST},
5885 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5886 .ignore_suspend = 1,
5887 /* this dailink has playback support */
5888 .ignore_pmdown_time = 1,
5889 .codec_dai_name = "snd-soc-dummy-dai",
5890 .codec_name = "snd-soc-dummy",
5891 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5892 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5893 .name = "MSM AFE-PCM RX",
5894 .stream_name = "AFE-PROXY RX",
5895 .cpu_dai_name = "msm-dai-q6-dev.241",
5896 .codec_name = "msm-stub-codec.1",
5897 .codec_dai_name = "msm-stub-rx",
5898 .platform_name = "msm-pcm-afe",
5899 .dpcm_playback = 1,
5900 .ignore_suspend = 1,
5901 /* this dainlink has playback support */
5902 .ignore_pmdown_time = 1,
5903 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5904 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5905 .name = "MSM AFE-PCM TX",
5906 .stream_name = "AFE-PROXY TX",
5907 .cpu_dai_name = "msm-dai-q6-dev.240",
5908 .codec_name = "msm-stub-codec.1",
5909 .codec_dai_name = "msm-stub-tx",
5910 .platform_name = "msm-pcm-afe",
5911 .dpcm_capture = 1,
5912 .ignore_suspend = 1,
5913 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5914 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5915 .name = MSM_DAILINK_NAME(Compress1),
5916 .stream_name = "Compress1",
5917 .cpu_dai_name = "MultiMedia4",
5918 .platform_name = "msm-compress-dsp",
5919 .dynamic = 1,
5920 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5921 .dpcm_playback = 1,
5922 .dpcm_capture = 1,
5923 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5924 SND_SOC_DPCM_TRIGGER_POST},
5925 .codec_dai_name = "snd-soc-dummy-dai",
5926 .codec_name = "snd-soc-dummy",
5927 .ignore_suspend = 1,
5928 .ignore_pmdown_time = 1,
5929 /* this dainlink has playback support */
5930 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5931 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5932 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5933 .name = "AUXPCM Hostless",
5934 .stream_name = "AUXPCM Hostless",
5935 .cpu_dai_name = "AUXPCM_HOSTLESS",
5936 .platform_name = "msm-pcm-hostless",
5937 .dynamic = 1,
5938 .dpcm_playback = 1,
5939 .dpcm_capture = 1,
5940 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5941 SND_SOC_DPCM_TRIGGER_POST},
5942 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5943 .ignore_suspend = 1,
5944 /* this dainlink has playback support */
5945 .ignore_pmdown_time = 1,
5946 .codec_dai_name = "snd-soc-dummy-dai",
5947 .codec_name = "snd-soc-dummy",
5948 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5949 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5950 .name = "SLIMBUS_1 Hostless",
5951 .stream_name = "SLIMBUS_1 Hostless",
5952 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
5953 .platform_name = "msm-pcm-hostless",
5954 .dynamic = 1,
5955 .dpcm_playback = 1,
5956 .dpcm_capture = 1,
5957 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5958 SND_SOC_DPCM_TRIGGER_POST},
5959 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5960 .ignore_suspend = 1,
5961 /* this dailink has playback support */
5962 .ignore_pmdown_time = 1,
5963 .codec_dai_name = "snd-soc-dummy-dai",
5964 .codec_name = "snd-soc-dummy",
5965 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5966 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5967 .name = "SLIMBUS_3 Hostless",
5968 .stream_name = "SLIMBUS_3 Hostless",
5969 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
5970 .platform_name = "msm-pcm-hostless",
5971 .dynamic = 1,
5972 .dpcm_playback = 1,
5973 .dpcm_capture = 1,
5974 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5975 SND_SOC_DPCM_TRIGGER_POST},
5976 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5977 .ignore_suspend = 1,
5978 /* this dailink has playback support */
5979 .ignore_pmdown_time = 1,
5980 .codec_dai_name = "snd-soc-dummy-dai",
5981 .codec_name = "snd-soc-dummy",
5982 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5983 {/* hw:x,12 */
5984 .name = "SLIMBUS_7 Hostless",
5985 .stream_name = "SLIMBUS_7 Hostless",
5986 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5987 .platform_name = "msm-pcm-hostless",
5988 .dynamic = 1,
5989 .dpcm_playback = 1,
5990 .dpcm_capture = 1,
5991 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5992 SND_SOC_DPCM_TRIGGER_POST},
5993 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5994 .ignore_suspend = 1,
5995 /* this dailink has playback support */
5996 .ignore_pmdown_time = 1,
5997 .codec_dai_name = "snd-soc-dummy-dai",
5998 .codec_name = "snd-soc-dummy",
5999 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6000 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6001 .name = MSM_DAILINK_NAME(LowLatency),
6002 .stream_name = "MultiMedia5",
6003 .cpu_dai_name = "MultiMedia5",
6004 .platform_name = "msm-pcm-dsp.1",
6005 .dynamic = 1,
6006 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6007 .dpcm_playback = 1,
6008 .dpcm_capture = 1,
6009 .codec_dai_name = "snd-soc-dummy-dai",
6010 .codec_name = "snd-soc-dummy",
6011 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6012 SND_SOC_DPCM_TRIGGER_POST},
6013 .ignore_suspend = 1,
6014 /* this dainlink has playback support */
6015 .ignore_pmdown_time = 1,
6016 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6017 .ops = &msm_fe_qos_ops,
6018 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6019 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6020 .name = "Listen 1 Audio Service",
6021 .stream_name = "Listen 1 Audio Service",
6022 .cpu_dai_name = "LSM1",
6023 .platform_name = "msm-lsm-client",
6024 .dynamic = 1,
6025 .dpcm_capture = 1,
6026 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6027 SND_SOC_DPCM_TRIGGER_POST },
6028 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6029 .ignore_suspend = 1,
6030 .codec_dai_name = "snd-soc-dummy-dai",
6031 .codec_name = "snd-soc-dummy",
6032 .id = MSM_FRONTEND_DAI_LSM1,
6033 },
6034 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6035 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6036 .name = MSM_DAILINK_NAME(Compress2),
6037 .stream_name = "Compress2",
6038 .cpu_dai_name = "MultiMedia7",
6039 .platform_name = "msm-compress-dsp",
6040 .dynamic = 1,
6041 .dpcm_playback = 1,
6042 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6043 SND_SOC_DPCM_TRIGGER_POST},
6044 .codec_dai_name = "snd-soc-dummy-dai",
6045 .codec_name = "snd-soc-dummy",
6046 .ignore_suspend = 1,
6047 .ignore_pmdown_time = 1,
6048 /* this dainlink has playback support */
6049 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6050 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6051 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6052 .name = MSM_DAILINK_NAME(MultiMedia10),
6053 .stream_name = "MultiMedia10",
6054 .cpu_dai_name = "MultiMedia10",
6055 .platform_name = "msm-pcm-dsp.1",
6056 .dynamic = 1,
6057 .dpcm_playback = 1,
6058 .dpcm_capture = 1,
6059 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6060 SND_SOC_DPCM_TRIGGER_POST},
6061 .codec_dai_name = "snd-soc-dummy-dai",
6062 .codec_name = "snd-soc-dummy",
6063 .ignore_suspend = 1,
6064 .ignore_pmdown_time = 1,
6065 /* this dainlink has playback support */
6066 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6067 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6068 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6069 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6070 .stream_name = "MM_NOIRQ",
6071 .cpu_dai_name = "MultiMedia8",
6072 .platform_name = "msm-pcm-dsp-noirq",
6073 .dynamic = 1,
6074 .dpcm_playback = 1,
6075 .dpcm_capture = 1,
6076 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6077 SND_SOC_DPCM_TRIGGER_POST},
6078 .codec_dai_name = "snd-soc-dummy-dai",
6079 .codec_name = "snd-soc-dummy",
6080 .ignore_suspend = 1,
6081 .ignore_pmdown_time = 1,
6082 /* this dainlink has playback support */
6083 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6084 .ops = &msm_fe_qos_ops,
6085 },
6086 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6087 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6088 .name = "HDMI_RX_HOSTLESS",
6089 .stream_name = "HDMI_RX_HOSTLESS",
6090 .cpu_dai_name = "HDMI_HOSTLESS",
6091 .platform_name = "msm-pcm-hostless",
6092 .dynamic = 1,
6093 .dpcm_playback = 1,
6094 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6095 SND_SOC_DPCM_TRIGGER_POST},
6096 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6097 .ignore_suspend = 1,
6098 .ignore_pmdown_time = 1,
6099 .codec_dai_name = "snd-soc-dummy-dai",
6100 .codec_name = "snd-soc-dummy",
6101 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6102 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6103 .name = "VoiceMMode2",
6104 .stream_name = "VoiceMMode2",
6105 .cpu_dai_name = "VoiceMMode2",
6106 .platform_name = "msm-pcm-voice",
6107 .dynamic = 1,
6108 .dpcm_playback = 1,
6109 .dpcm_capture = 1,
6110 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6111 SND_SOC_DPCM_TRIGGER_POST},
6112 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6113 .ignore_suspend = 1,
6114 .ignore_pmdown_time = 1,
6115 .codec_dai_name = "snd-soc-dummy-dai",
6116 .codec_name = "snd-soc-dummy",
6117 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6118 },
6119 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6120 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6121 .name = "Listen 2 Audio Service",
6122 .stream_name = "Listen 2 Audio Service",
6123 .cpu_dai_name = "LSM2",
6124 .platform_name = "msm-lsm-client",
6125 .dynamic = 1,
6126 .dpcm_capture = 1,
6127 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6128 SND_SOC_DPCM_TRIGGER_POST },
6129 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6130 .ignore_suspend = 1,
6131 .codec_dai_name = "snd-soc-dummy-dai",
6132 .codec_name = "snd-soc-dummy",
6133 .id = MSM_FRONTEND_DAI_LSM2,
6134 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6135 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6136 .name = "Listen 3 Audio Service",
6137 .stream_name = "Listen 3 Audio Service",
6138 .cpu_dai_name = "LSM3",
6139 .platform_name = "msm-lsm-client",
6140 .dynamic = 1,
6141 .dpcm_capture = 1,
6142 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6143 SND_SOC_DPCM_TRIGGER_POST },
6144 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6145 .ignore_suspend = 1,
6146 .codec_dai_name = "snd-soc-dummy-dai",
6147 .codec_name = "snd-soc-dummy",
6148 .id = MSM_FRONTEND_DAI_LSM3,
6149 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6150 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6151 .name = "Listen 4 Audio Service",
6152 .stream_name = "Listen 4 Audio Service",
6153 .cpu_dai_name = "LSM4",
6154 .platform_name = "msm-lsm-client",
6155 .dynamic = 1,
6156 .dpcm_capture = 1,
6157 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6158 SND_SOC_DPCM_TRIGGER_POST },
6159 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6160 .ignore_suspend = 1,
6161 .codec_dai_name = "snd-soc-dummy-dai",
6162 .codec_name = "snd-soc-dummy",
6163 .id = MSM_FRONTEND_DAI_LSM4,
6164 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6165 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6166 .name = "Listen 5 Audio Service",
6167 .stream_name = "Listen 5 Audio Service",
6168 .cpu_dai_name = "LSM5",
6169 .platform_name = "msm-lsm-client",
6170 .dynamic = 1,
6171 .dpcm_capture = 1,
6172 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6173 SND_SOC_DPCM_TRIGGER_POST },
6174 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6175 .ignore_suspend = 1,
6176 .codec_dai_name = "snd-soc-dummy-dai",
6177 .codec_name = "snd-soc-dummy",
6178 .id = MSM_FRONTEND_DAI_LSM5,
6179 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6180 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6181 .name = "Listen 6 Audio Service",
6182 .stream_name = "Listen 6 Audio Service",
6183 .cpu_dai_name = "LSM6",
6184 .platform_name = "msm-lsm-client",
6185 .dynamic = 1,
6186 .dpcm_capture = 1,
6187 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6188 SND_SOC_DPCM_TRIGGER_POST },
6189 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6190 .ignore_suspend = 1,
6191 .codec_dai_name = "snd-soc-dummy-dai",
6192 .codec_name = "snd-soc-dummy",
6193 .id = MSM_FRONTEND_DAI_LSM6,
6194 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6195 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6196 .name = "Listen 7 Audio Service",
6197 .stream_name = "Listen 7 Audio Service",
6198 .cpu_dai_name = "LSM7",
6199 .platform_name = "msm-lsm-client",
6200 .dynamic = 1,
6201 .dpcm_capture = 1,
6202 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6203 SND_SOC_DPCM_TRIGGER_POST },
6204 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6205 .ignore_suspend = 1,
6206 .codec_dai_name = "snd-soc-dummy-dai",
6207 .codec_name = "snd-soc-dummy",
6208 .id = MSM_FRONTEND_DAI_LSM7,
6209 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6210 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6211 .name = "Listen 8 Audio Service",
6212 .stream_name = "Listen 8 Audio Service",
6213 .cpu_dai_name = "LSM8",
6214 .platform_name = "msm-lsm-client",
6215 .dynamic = 1,
6216 .dpcm_capture = 1,
6217 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6218 SND_SOC_DPCM_TRIGGER_POST },
6219 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6220 .ignore_suspend = 1,
6221 .codec_dai_name = "snd-soc-dummy-dai",
6222 .codec_name = "snd-soc-dummy",
6223 .id = MSM_FRONTEND_DAI_LSM8,
6224 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6225 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6226 .name = MSM_DAILINK_NAME(Media9),
6227 .stream_name = "MultiMedia9",
6228 .cpu_dai_name = "MultiMedia9",
6229 .platform_name = "msm-pcm-dsp.0",
6230 .dynamic = 1,
6231 .dpcm_playback = 1,
6232 .dpcm_capture = 1,
6233 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6234 SND_SOC_DPCM_TRIGGER_POST},
6235 .codec_dai_name = "snd-soc-dummy-dai",
6236 .codec_name = "snd-soc-dummy",
6237 .ignore_suspend = 1,
6238 /* this dainlink has playback support */
6239 .ignore_pmdown_time = 1,
6240 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6241 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6242 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6243 .name = MSM_DAILINK_NAME(Compress4),
6244 .stream_name = "Compress4",
6245 .cpu_dai_name = "MultiMedia11",
6246 .platform_name = "msm-compress-dsp",
6247 .dynamic = 1,
6248 .dpcm_playback = 1,
6249 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6250 SND_SOC_DPCM_TRIGGER_POST},
6251 .codec_dai_name = "snd-soc-dummy-dai",
6252 .codec_name = "snd-soc-dummy",
6253 .ignore_suspend = 1,
6254 .ignore_pmdown_time = 1,
6255 /* this dainlink has playback support */
6256 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6257 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6258 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6259 .name = MSM_DAILINK_NAME(Compress5),
6260 .stream_name = "Compress5",
6261 .cpu_dai_name = "MultiMedia12",
6262 .platform_name = "msm-compress-dsp",
6263 .dynamic = 1,
6264 .dpcm_playback = 1,
6265 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6266 SND_SOC_DPCM_TRIGGER_POST},
6267 .codec_dai_name = "snd-soc-dummy-dai",
6268 .codec_name = "snd-soc-dummy",
6269 .ignore_suspend = 1,
6270 .ignore_pmdown_time = 1,
6271 /* this dainlink has playback support */
6272 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6273 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6274 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6275 .name = MSM_DAILINK_NAME(Compress6),
6276 .stream_name = "Compress6",
6277 .cpu_dai_name = "MultiMedia13",
6278 .platform_name = "msm-compress-dsp",
6279 .dynamic = 1,
6280 .dpcm_playback = 1,
6281 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6282 SND_SOC_DPCM_TRIGGER_POST},
6283 .codec_dai_name = "snd-soc-dummy-dai",
6284 .codec_name = "snd-soc-dummy",
6285 .ignore_suspend = 1,
6286 .ignore_pmdown_time = 1,
6287 /* this dainlink has playback support */
6288 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6289 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6290 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6291 .name = MSM_DAILINK_NAME(Compress7),
6292 .stream_name = "Compress7",
6293 .cpu_dai_name = "MultiMedia14",
6294 .platform_name = "msm-compress-dsp",
6295 .dynamic = 1,
6296 .dpcm_playback = 1,
6297 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6298 SND_SOC_DPCM_TRIGGER_POST},
6299 .codec_dai_name = "snd-soc-dummy-dai",
6300 .codec_name = "snd-soc-dummy",
6301 .ignore_suspend = 1,
6302 .ignore_pmdown_time = 1,
6303 /* this dainlink has playback support */
6304 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6305 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6306 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6307 .name = MSM_DAILINK_NAME(Compress8),
6308 .stream_name = "Compress8",
6309 .cpu_dai_name = "MultiMedia15",
6310 .platform_name = "msm-compress-dsp",
6311 .dynamic = 1,
6312 .dpcm_playback = 1,
6313 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6314 SND_SOC_DPCM_TRIGGER_POST},
6315 .codec_dai_name = "snd-soc-dummy-dai",
6316 .codec_name = "snd-soc-dummy",
6317 .ignore_suspend = 1,
6318 .ignore_pmdown_time = 1,
6319 /* this dainlink has playback support */
6320 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6321 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6322 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6323 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6324 .stream_name = "MM_NOIRQ_2",
6325 .cpu_dai_name = "MultiMedia16",
6326 .platform_name = "msm-pcm-dsp-noirq",
6327 .dynamic = 1,
6328 .dpcm_playback = 1,
6329 .dpcm_capture = 1,
6330 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6331 SND_SOC_DPCM_TRIGGER_POST},
6332 .codec_dai_name = "snd-soc-dummy-dai",
6333 .codec_name = "snd-soc-dummy",
6334 .ignore_suspend = 1,
6335 .ignore_pmdown_time = 1,
6336 /* this dainlink has playback support */
6337 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6338 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6339 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6340 .name = "SLIMBUS_8 Hostless",
6341 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6342 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6343 .platform_name = "msm-pcm-hostless",
6344 .dynamic = 1,
6345 .dpcm_capture = 1,
6346 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6347 SND_SOC_DPCM_TRIGGER_POST},
6348 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6349 .ignore_suspend = 1,
6350 .codec_dai_name = "snd-soc-dummy-dai",
6351 .codec_name = "snd-soc-dummy",
6352 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6353 {/* hw:x,35 */
6354 .name = "CDC_DMA Hostless",
6355 .stream_name = "CDC_DMA Hostless",
6356 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6357 .platform_name = "msm-pcm-hostless",
6358 .dynamic = 1,
6359 .dpcm_playback = 1,
6360 .dpcm_capture = 1,
6361 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6362 SND_SOC_DPCM_TRIGGER_POST},
6363 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6364 .ignore_suspend = 1,
6365 /* this dailink has playback support */
6366 .ignore_pmdown_time = 1,
6367 .codec_dai_name = "snd-soc-dummy-dai",
6368 .codec_name = "snd-soc-dummy",
6369 },
6370 {/* hw:x,36 */
6371 .name = "TX3_CDC_DMA Hostless",
6372 .stream_name = "TX3_CDC_DMA Hostless",
6373 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6374 .platform_name = "msm-pcm-hostless",
6375 .dynamic = 1,
6376 .dpcm_capture = 1,
6377 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6378 SND_SOC_DPCM_TRIGGER_POST},
6379 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6380 .ignore_suspend = 1,
6381 .codec_dai_name = "snd-soc-dummy-dai",
6382 .codec_name = "snd-soc-dummy",
6383 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6384};
6385
6386
6387static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6388 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6389 .name = LPASS_BE_SLIMBUS_4_TX,
6390 .stream_name = "Slimbus4 Capture",
6391 .cpu_dai_name = "msm-dai-q6-dev.16393",
6392 .platform_name = "msm-pcm-hostless",
6393 .codec_name = "tavil_codec",
6394 .codec_dai_name = "tavil_vifeedback",
6395 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6396 .be_hw_params_fixup = msm_be_hw_params_fixup,
6397 .ops = &msm_be_ops,
6398 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6399 .ignore_suspend = 1,
6400 },
6401 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6402 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6403 .name = "SLIMBUS_2 Hostless Playback",
6404 .stream_name = "SLIMBUS_2 Hostless Playback",
6405 .cpu_dai_name = "msm-dai-q6-dev.16388",
6406 .platform_name = "msm-pcm-hostless",
6407 .codec_name = "tavil_codec",
6408 .codec_dai_name = "tavil_rx2",
6409 .ignore_suspend = 1,
6410 .ignore_pmdown_time = 1,
6411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6412 .ops = &msm_slimbus_2_be_ops,
6413 },
6414 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6415 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6416 .name = "SLIMBUS_2 Hostless Capture",
6417 .stream_name = "SLIMBUS_2 Hostless Capture",
6418 .cpu_dai_name = "msm-dai-q6-dev.16389",
6419 .platform_name = "msm-pcm-hostless",
6420 .codec_name = "tavil_codec",
6421 .codec_dai_name = "tavil_tx2",
6422 .ignore_suspend = 1,
6423 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6424 .ops = &msm_slimbus_2_be_ops,
6425 },
6426};
6427
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]6428static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
6429 {
6430 .name = "Compress9",
6431 .stream_name = "Compress9",
6432 .cpu_dai_name = "MultiMedia17",
6433 .platform_name = "msm-compress-dsp",
6434 .dynamic = 1,
6435 .dpcm_capture = 1,
6436 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6437 SND_SOC_DPCM_TRIGGER_POST},
6438 .codec_dai_name = "snd-soc-dummy-dai",
6439 .codec_name = "snd-soc-dummy",
6440 .ignore_suspend = 1,
6441 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6442 },
6443 {
6444 .name = "Compress10",
6445 .stream_name = "Compress10",
6446 .cpu_dai_name = "MultiMedia18",
6447 .platform_name = "msm-compress-dsp",
6448 .dynamic = 1,
6449 .dpcm_capture = 1,
6450 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6451 SND_SOC_DPCM_TRIGGER_POST},
6452 .codec_dai_name = "snd-soc-dummy-dai",
6453 .codec_name = "snd-soc-dummy",
6454 .ignore_suspend = 1,
6455 .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
6456 },
6457 {
6458 .name = "Compress11",
6459 .stream_name = "Compress11",
6460 .cpu_dai_name = "MultiMedia19",
6461 .platform_name = "msm-compress-dsp",
6462 .dynamic = 1,
6463 .dpcm_capture = 1,
6464 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6465 SND_SOC_DPCM_TRIGGER_POST},
6466 .codec_dai_name = "snd-soc-dummy-dai",
6467 .codec_name = "snd-soc-dummy",
6468 .ignore_suspend = 1,
6469 .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
6470 },
6471 {
6472 .name = "Compress12",
6473 .stream_name = "Compress12",
6474 .cpu_dai_name = "MultiMedia28",
6475 .platform_name = "msm-compress-dsp",
6476 .dynamic = 1,
6477 .dpcm_capture = 1,
6478 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6479 SND_SOC_DPCM_TRIGGER_POST},
6480 .codec_dai_name = "snd-soc-dummy-dai",
6481 .codec_name = "snd-soc-dummy",
6482 .ignore_suspend = 1,
6483 .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
6484 },
6485 {
6486 .name = "Compress13",
6487 .stream_name = "Compress13",
6488 .cpu_dai_name = "MultiMedia29",
6489 .platform_name = "msm-compress-dsp",
6490 .dynamic = 1,
6491 .dpcm_capture = 1,
6492 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6493 SND_SOC_DPCM_TRIGGER_POST},
6494 .codec_dai_name = "snd-soc-dummy-dai",
6495 .codec_name = "snd-soc-dummy",
6496 .ignore_suspend = 1,
6497 .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
6498 },
6499};
6500
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6501static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6502 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6503 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6504 .stream_name = "WSA CDC DMA0 Capture",
6505 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6506 .platform_name = "msm-pcm-hostless",
6507 .codec_name = "bolero_codec",
6508 .codec_dai_name = "wsa_macro_vifeedback",
6509 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6510 .be_hw_params_fixup = msm_be_hw_params_fixup,
6511 .ignore_suspend = 1,
6512 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6513 .ops = &msm_cdc_dma_be_ops,
6514 },
6515};
6516
6517static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6518 {
6519 .name = MSM_DAILINK_NAME(ASM Loopback),
6520 .stream_name = "MultiMedia6",
6521 .cpu_dai_name = "MultiMedia6",
6522 .platform_name = "msm-pcm-loopback",
6523 .dynamic = 1,
6524 .dpcm_playback = 1,
6525 .dpcm_capture = 1,
6526 .codec_dai_name = "snd-soc-dummy-dai",
6527 .codec_name = "snd-soc-dummy",
6528 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6529 SND_SOC_DPCM_TRIGGER_POST},
6530 .ignore_suspend = 1,
6531 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6532 .ignore_pmdown_time = 1,
6533 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6534 },
6535 {
6536 .name = "USB Audio Hostless",
6537 .stream_name = "USB Audio Hostless",
6538 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6539 .platform_name = "msm-pcm-hostless",
6540 .dynamic = 1,
6541 .dpcm_playback = 1,
6542 .dpcm_capture = 1,
6543 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6544 SND_SOC_DPCM_TRIGGER_POST},
6545 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6546 .ignore_suspend = 1,
6547 .ignore_pmdown_time = 1,
6548 .codec_dai_name = "snd-soc-dummy-dai",
6549 .codec_name = "snd-soc-dummy",
6550 },
6551};
6552
6553static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6554 /* Backend AFE DAI Links */
6555 {
6556 .name = LPASS_BE_AFE_PCM_RX,
6557 .stream_name = "AFE Playback",
6558 .cpu_dai_name = "msm-dai-q6-dev.224",
6559 .platform_name = "msm-pcm-routing",
6560 .codec_name = "msm-stub-codec.1",
6561 .codec_dai_name = "msm-stub-rx",
6562 .no_pcm = 1,
6563 .dpcm_playback = 1,
6564 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6565 .be_hw_params_fixup = msm_be_hw_params_fixup,
6566 /* this dainlink has playback support */
6567 .ignore_pmdown_time = 1,
6568 .ignore_suspend = 1,
6569 },
6570 {
6571 .name = LPASS_BE_AFE_PCM_TX,
6572 .stream_name = "AFE Capture",
6573 .cpu_dai_name = "msm-dai-q6-dev.225",
6574 .platform_name = "msm-pcm-routing",
6575 .codec_name = "msm-stub-codec.1",
6576 .codec_dai_name = "msm-stub-tx",
6577 .no_pcm = 1,
6578 .dpcm_capture = 1,
6579 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6580 .be_hw_params_fixup = msm_be_hw_params_fixup,
6581 .ignore_suspend = 1,
6582 },
6583 /* Incall Record Uplink BACK END DAI Link */
6584 {
6585 .name = LPASS_BE_INCALL_RECORD_TX,
6586 .stream_name = "Voice Uplink Capture",
6587 .cpu_dai_name = "msm-dai-q6-dev.32772",
6588 .platform_name = "msm-pcm-routing",
6589 .codec_name = "msm-stub-codec.1",
6590 .codec_dai_name = "msm-stub-tx",
6591 .no_pcm = 1,
6592 .dpcm_capture = 1,
6593 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6594 .be_hw_params_fixup = msm_be_hw_params_fixup,
6595 .ignore_suspend = 1,
6596 },
6597 /* Incall Record Downlink BACK END DAI Link */
6598 {
6599 .name = LPASS_BE_INCALL_RECORD_RX,
6600 .stream_name = "Voice Downlink Capture",
6601 .cpu_dai_name = "msm-dai-q6-dev.32771",
6602 .platform_name = "msm-pcm-routing",
6603 .codec_name = "msm-stub-codec.1",
6604 .codec_dai_name = "msm-stub-tx",
6605 .no_pcm = 1,
6606 .dpcm_capture = 1,
6607 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6608 .be_hw_params_fixup = msm_be_hw_params_fixup,
6609 .ignore_suspend = 1,
6610 },
6611 /* Incall Music BACK END DAI Link */
6612 {
6613 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6614 .stream_name = "Voice Farend Playback",
6615 .cpu_dai_name = "msm-dai-q6-dev.32773",
6616 .platform_name = "msm-pcm-routing",
6617 .codec_name = "msm-stub-codec.1",
6618 .codec_dai_name = "msm-stub-rx",
6619 .no_pcm = 1,
6620 .dpcm_playback = 1,
6621 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6622 .be_hw_params_fixup = msm_be_hw_params_fixup,
6623 .ignore_suspend = 1,
6624 .ignore_pmdown_time = 1,
6625 },
6626 /* Incall Music 2 BACK END DAI Link */
6627 {
6628 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6629 .stream_name = "Voice2 Farend Playback",
6630 .cpu_dai_name = "msm-dai-q6-dev.32770",
6631 .platform_name = "msm-pcm-routing",
6632 .codec_name = "msm-stub-codec.1",
6633 .codec_dai_name = "msm-stub-rx",
6634 .no_pcm = 1,
6635 .dpcm_playback = 1,
6636 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6637 .be_hw_params_fixup = msm_be_hw_params_fixup,
6638 .ignore_suspend = 1,
6639 .ignore_pmdown_time = 1,
6640 },
6641 {
6642 .name = LPASS_BE_USB_AUDIO_RX,
6643 .stream_name = "USB Audio Playback",
6644 .cpu_dai_name = "msm-dai-q6-dev.28672",
6645 .platform_name = "msm-pcm-routing",
6646 .codec_name = "msm-stub-codec.1",
6647 .codec_dai_name = "msm-stub-rx",
6648 .no_pcm = 1,
6649 .dpcm_playback = 1,
6650 .id = MSM_BACKEND_DAI_USB_RX,
6651 .be_hw_params_fixup = msm_be_hw_params_fixup,
6652 .ignore_pmdown_time = 1,
6653 .ignore_suspend = 1,
6654 },
6655 {
6656 .name = LPASS_BE_USB_AUDIO_TX,
6657 .stream_name = "USB Audio Capture",
6658 .cpu_dai_name = "msm-dai-q6-dev.28673",
6659 .platform_name = "msm-pcm-routing",
6660 .codec_name = "msm-stub-codec.1",
6661 .codec_dai_name = "msm-stub-tx",
6662 .no_pcm = 1,
6663 .dpcm_capture = 1,
6664 .id = MSM_BACKEND_DAI_USB_TX,
6665 .be_hw_params_fixup = msm_be_hw_params_fixup,
6666 .ignore_suspend = 1,
6667 },
6668 {
6669 .name = LPASS_BE_PRI_TDM_RX_0,
6670 .stream_name = "Primary TDM0 Playback",
6671 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6672 .platform_name = "msm-pcm-routing",
6673 .codec_name = "msm-stub-codec.1",
6674 .codec_dai_name = "msm-stub-rx",
6675 .no_pcm = 1,
6676 .dpcm_playback = 1,
6677 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6678 .be_hw_params_fixup = msm_be_hw_params_fixup,
6679 .ops = &sm6150_tdm_be_ops,
6680 .ignore_suspend = 1,
6681 .ignore_pmdown_time = 1,
6682 },
6683 {
6684 .name = LPASS_BE_PRI_TDM_TX_0,
6685 .stream_name = "Primary TDM0 Capture",
6686 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6687 .platform_name = "msm-pcm-routing",
6688 .codec_name = "msm-stub-codec.1",
6689 .codec_dai_name = "msm-stub-tx",
6690 .no_pcm = 1,
6691 .dpcm_capture = 1,
6692 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6693 .be_hw_params_fixup = msm_be_hw_params_fixup,
6694 .ops = &sm6150_tdm_be_ops,
6695 .ignore_suspend = 1,
6696 },
6697 {
6698 .name = LPASS_BE_SEC_TDM_RX_0,
6699 .stream_name = "Secondary TDM0 Playback",
6700 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6701 .platform_name = "msm-pcm-routing",
6702 .codec_name = "msm-stub-codec.1",
6703 .codec_dai_name = "msm-stub-rx",
6704 .no_pcm = 1,
6705 .dpcm_playback = 1,
6706 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6707 .be_hw_params_fixup = msm_be_hw_params_fixup,
6708 .ops = &sm6150_tdm_be_ops,
6709 .ignore_suspend = 1,
6710 .ignore_pmdown_time = 1,
6711 },
6712 {
6713 .name = LPASS_BE_SEC_TDM_TX_0,
6714 .stream_name = "Secondary TDM0 Capture",
6715 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6716 .platform_name = "msm-pcm-routing",
6717 .codec_name = "msm-stub-codec.1",
6718 .codec_dai_name = "msm-stub-tx",
6719 .no_pcm = 1,
6720 .dpcm_capture = 1,
6721 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6722 .be_hw_params_fixup = msm_be_hw_params_fixup,
6723 .ops = &sm6150_tdm_be_ops,
6724 .ignore_suspend = 1,
6725 },
6726 {
6727 .name = LPASS_BE_TERT_TDM_RX_0,
6728 .stream_name = "Tertiary TDM0 Playback",
6729 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6730 .platform_name = "msm-pcm-routing",
6731 .codec_name = "msm-stub-codec.1",
6732 .codec_dai_name = "msm-stub-rx",
6733 .no_pcm = 1,
6734 .dpcm_playback = 1,
6735 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6736 .be_hw_params_fixup = msm_be_hw_params_fixup,
6737 .ops = &sm6150_tdm_be_ops,
6738 .ignore_suspend = 1,
6739 .ignore_pmdown_time = 1,
6740 },
6741 {
6742 .name = LPASS_BE_TERT_TDM_TX_0,
6743 .stream_name = "Tertiary TDM0 Capture",
6744 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6745 .platform_name = "msm-pcm-routing",
6746 .codec_name = "msm-stub-codec.1",
6747 .codec_dai_name = "msm-stub-tx",
6748 .no_pcm = 1,
6749 .dpcm_capture = 1,
6750 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6751 .be_hw_params_fixup = msm_be_hw_params_fixup,
6752 .ops = &sm6150_tdm_be_ops,
6753 .ignore_suspend = 1,
6754 },
6755 {
6756 .name = LPASS_BE_QUAT_TDM_RX_0,
6757 .stream_name = "Quaternary TDM0 Playback",
6758 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6759 .platform_name = "msm-pcm-routing",
6760 .codec_name = "msm-stub-codec.1",
6761 .codec_dai_name = "msm-stub-rx",
6762 .no_pcm = 1,
6763 .dpcm_playback = 1,
6764 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]6765 .be_hw_params_fixup = msm_be_hw_params_fixup,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6766 .ops = &sm6150_tdm_be_ops,
6767 .ignore_suspend = 1,
6768 .ignore_pmdown_time = 1,
6769 },
6770 {
6771 .name = LPASS_BE_QUAT_TDM_TX_0,
6772 .stream_name = "Quaternary TDM0 Capture",
6773 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6774 .platform_name = "msm-pcm-routing",
6775 .codec_name = "msm-stub-codec.1",
6776 .codec_dai_name = "msm-stub-tx",
6777 .no_pcm = 1,
6778 .dpcm_capture = 1,
6779 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6780 .be_hw_params_fixup = msm_be_hw_params_fixup,
6781 .ops = &sm6150_tdm_be_ops,
6782 .ignore_suspend = 1,
6783 },
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]6784 {
6785 .name = LPASS_BE_QUIN_TDM_RX_0,
6786 .stream_name = "Quinary TDM0 Playback",
6787 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6788 .platform_name = "msm-pcm-routing",
6789 .codec_name = "msm-stub-codec.1",
6790 .codec_dai_name = "msm-stub-rx",
6791 .no_pcm = 1,
6792 .dpcm_playback = 1,
6793 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6794 .be_hw_params_fixup = msm_be_hw_params_fixup,
6795 .ops = &sm6150_tdm_be_ops,
6796 .ignore_suspend = 1,
6797 .ignore_pmdown_time = 1,
6798 },
6799 {
6800 .name = LPASS_BE_QUIN_TDM_TX_0,
6801 .stream_name = "Quinary TDM0 Capture",
6802 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6803 .platform_name = "msm-pcm-routing",
6804 .codec_name = "msm-stub-codec.1",
6805 .codec_dai_name = "msm-stub-tx",
6806 .no_pcm = 1,
6807 .dpcm_capture = 1,
6808 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6809 .be_hw_params_fixup = msm_be_hw_params_fixup,
6810 .ops = &sm6150_tdm_be_ops,
6811 .ignore_suspend = 1,
6812 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6813};
6814
6815static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6816 {
6817 .name = LPASS_BE_SLIMBUS_0_RX,
6818 .stream_name = "Slimbus Playback",
6819 .cpu_dai_name = "msm-dai-q6-dev.16384",
6820 .platform_name = "msm-pcm-routing",
6821 .codec_name = "tavil_codec",
6822 .codec_dai_name = "tavil_rx1",
6823 .no_pcm = 1,
6824 .dpcm_playback = 1,
6825 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6826 .init = &msm_audrx_tavil_init,
6827 .be_hw_params_fixup = msm_be_hw_params_fixup,
6828 /* this dainlink has playback support */
6829 .ignore_pmdown_time = 1,
6830 .ignore_suspend = 1,
6831 .ops = &msm_be_ops,
6832 },
6833 {
6834 .name = LPASS_BE_SLIMBUS_0_TX,
6835 .stream_name = "Slimbus Capture",
6836 .cpu_dai_name = "msm-dai-q6-dev.16385",
6837 .platform_name = "msm-pcm-routing",
6838 .codec_name = "tavil_codec",
6839 .codec_dai_name = "tavil_tx1",
6840 .no_pcm = 1,
6841 .dpcm_capture = 1,
6842 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6843 .be_hw_params_fixup = msm_be_hw_params_fixup,
6844 .ignore_suspend = 1,
6845 .ops = &msm_be_ops,
6846 },
6847 {
6848 .name = LPASS_BE_SLIMBUS_1_RX,
6849 .stream_name = "Slimbus1 Playback",
6850 .cpu_dai_name = "msm-dai-q6-dev.16386",
6851 .platform_name = "msm-pcm-routing",
6852 .codec_name = "tavil_codec",
6853 .codec_dai_name = "tavil_rx1",
6854 .no_pcm = 1,
6855 .dpcm_playback = 1,
6856 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6857 .be_hw_params_fixup = msm_be_hw_params_fixup,
6858 .ops = &msm_be_ops,
6859 /* dai link has playback support */
6860 .ignore_pmdown_time = 1,
6861 .ignore_suspend = 1,
6862 },
6863 {
6864 .name = LPASS_BE_SLIMBUS_1_TX,
6865 .stream_name = "Slimbus1 Capture",
6866 .cpu_dai_name = "msm-dai-q6-dev.16387",
6867 .platform_name = "msm-pcm-routing",
6868 .codec_name = "tavil_codec",
6869 .codec_dai_name = "tavil_tx3",
6870 .no_pcm = 1,
6871 .dpcm_capture = 1,
6872 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6873 .be_hw_params_fixup = msm_be_hw_params_fixup,
6874 .ops = &msm_be_ops,
6875 .ignore_suspend = 1,
6876 },
6877 {
6878 .name = LPASS_BE_SLIMBUS_2_RX,
6879 .stream_name = "Slimbus2 Playback",
6880 .cpu_dai_name = "msm-dai-q6-dev.16388",
6881 .platform_name = "msm-pcm-routing",
6882 .codec_name = "tavil_codec",
6883 .codec_dai_name = "tavil_rx2",
6884 .no_pcm = 1,
6885 .dpcm_playback = 1,
6886 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6887 .be_hw_params_fixup = msm_be_hw_params_fixup,
6888 .ops = &msm_be_ops,
6889 .ignore_pmdown_time = 1,
6890 .ignore_suspend = 1,
6891 },
6892 {
6893 .name = LPASS_BE_SLIMBUS_3_RX,
6894 .stream_name = "Slimbus3 Playback",
6895 .cpu_dai_name = "msm-dai-q6-dev.16390",
6896 .platform_name = "msm-pcm-routing",
6897 .codec_name = "tavil_codec",
6898 .codec_dai_name = "tavil_rx1",
6899 .no_pcm = 1,
6900 .dpcm_playback = 1,
6901 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6902 .be_hw_params_fixup = msm_be_hw_params_fixup,
6903 .ops = &msm_be_ops,
6904 /* dai link has playback support */
6905 .ignore_pmdown_time = 1,
6906 .ignore_suspend = 1,
6907 },
6908 {
6909 .name = LPASS_BE_SLIMBUS_3_TX,
6910 .stream_name = "Slimbus3 Capture",
6911 .cpu_dai_name = "msm-dai-q6-dev.16391",
6912 .platform_name = "msm-pcm-routing",
6913 .codec_name = "tavil_codec",
6914 .codec_dai_name = "tavil_tx1",
6915 .no_pcm = 1,
6916 .dpcm_capture = 1,
6917 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6918 .be_hw_params_fixup = msm_be_hw_params_fixup,
6919 .ops = &msm_be_ops,
6920 .ignore_suspend = 1,
6921 },
6922 {
6923 .name = LPASS_BE_SLIMBUS_4_RX,
6924 .stream_name = "Slimbus4 Playback",
6925 .cpu_dai_name = "msm-dai-q6-dev.16392",
6926 .platform_name = "msm-pcm-routing",
6927 .codec_name = "tavil_codec",
6928 .codec_dai_name = "tavil_rx1",
6929 .no_pcm = 1,
6930 .dpcm_playback = 1,
6931 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6932 .be_hw_params_fixup = msm_be_hw_params_fixup,
6933 .ops = &msm_be_ops,
6934 /* dai link has playback support */
6935 .ignore_pmdown_time = 1,
6936 .ignore_suspend = 1,
6937 },
6938 {
6939 .name = LPASS_BE_SLIMBUS_5_RX,
6940 .stream_name = "Slimbus5 Playback",
6941 .cpu_dai_name = "msm-dai-q6-dev.16394",
6942 .platform_name = "msm-pcm-routing",
6943 .codec_name = "tavil_codec",
6944 .codec_dai_name = "tavil_rx3",
6945 .no_pcm = 1,
6946 .dpcm_playback = 1,
6947 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6948 .be_hw_params_fixup = msm_be_hw_params_fixup,
6949 .ops = &msm_be_ops,
6950 /* dai link has playback support */
6951 .ignore_pmdown_time = 1,
6952 .ignore_suspend = 1,
6953 },
6954 /* MAD BE */
6955 {
6956 .name = LPASS_BE_SLIMBUS_5_TX,
6957 .stream_name = "Slimbus5 Capture",
6958 .cpu_dai_name = "msm-dai-q6-dev.16395",
6959 .platform_name = "msm-pcm-routing",
6960 .codec_name = "tavil_codec",
6961 .codec_dai_name = "tavil_mad1",
6962 .no_pcm = 1,
6963 .dpcm_capture = 1,
6964 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6965 .be_hw_params_fixup = msm_be_hw_params_fixup,
6966 .ops = &msm_be_ops,
6967 .ignore_suspend = 1,
6968 },
6969 {
6970 .name = LPASS_BE_SLIMBUS_6_RX,
6971 .stream_name = "Slimbus6 Playback",
6972 .cpu_dai_name = "msm-dai-q6-dev.16396",
6973 .platform_name = "msm-pcm-routing",
6974 .codec_name = "tavil_codec",
6975 .codec_dai_name = "tavil_rx4",
6976 .no_pcm = 1,
6977 .dpcm_playback = 1,
6978 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6979 .be_hw_params_fixup = msm_be_hw_params_fixup,
6980 .ops = &msm_be_ops,
6981 /* dai link has playback support */
6982 .ignore_pmdown_time = 1,
6983 .ignore_suspend = 1,
6984 },
6985 /* Slimbus VI Recording */
6986 {
6987 .name = LPASS_BE_SLIMBUS_TX_VI,
6988 .stream_name = "Slimbus4 Capture",
6989 .cpu_dai_name = "msm-dai-q6-dev.16393",
6990 .platform_name = "msm-pcm-routing",
6991 .codec_name = "tavil_codec",
6992 .codec_dai_name = "tavil_vifeedback",
6993 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6994 .be_hw_params_fixup = msm_be_hw_params_fixup,
6995 .ops = &msm_be_ops,
6996 .ignore_suspend = 1,
6997 .no_pcm = 1,
6998 .dpcm_capture = 1,
6999 },
7000};
7001
7002static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
7003 {
7004 .name = LPASS_BE_SLIMBUS_7_RX,
7005 .stream_name = "Slimbus7 Playback",
7006 .cpu_dai_name = "msm-dai-q6-dev.16398",
7007 .platform_name = "msm-pcm-routing",
7008 .codec_name = "btfmslim_slave",
7009 /* BT codec driver determines capabilities based on
7010 * dai name, bt codecdai name should always contains
7011 * supported usecase information
7012 */
7013 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
7014 .no_pcm = 1,
7015 .dpcm_playback = 1,
7016 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
7017 .be_hw_params_fixup = msm_be_hw_params_fixup,
7018 .ops = &msm_wcn_ops,
7019 /* dai link has playback support */
7020 .ignore_pmdown_time = 1,
7021 .ignore_suspend = 1,
7022 },
7023 {
7024 .name = LPASS_BE_SLIMBUS_7_TX,
7025 .stream_name = "Slimbus7 Capture",
7026 .cpu_dai_name = "msm-dai-q6-dev.16399",
7027 .platform_name = "msm-pcm-routing",
7028 .codec_name = "btfmslim_slave",
7029 .codec_dai_name = "btfm_bt_sco_slim_tx",
7030 .no_pcm = 1,
7031 .dpcm_capture = 1,
7032 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7033 .be_hw_params_fixup = msm_be_hw_params_fixup,
7034 .ops = &msm_wcn_ops,
7035 .ignore_suspend = 1,
7036 },
7037 {
7038 .name = LPASS_BE_SLIMBUS_8_TX,
7039 .stream_name = "Slimbus8 Capture",
7040 .cpu_dai_name = "msm-dai-q6-dev.16401",
7041 .platform_name = "msm-pcm-routing",
7042 .codec_name = "btfmslim_slave",
7043 .codec_dai_name = "btfm_fm_slim_tx",
7044 .no_pcm = 1,
7045 .dpcm_capture = 1,
7046 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7047 .be_hw_params_fixup = msm_be_hw_params_fixup,
7048 .init = &msm_wcn_init,
7049 .ops = &msm_wcn_ops,
7050 .ignore_suspend = 1,
7051 },
7052};
7053
7054static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7055 /* DISP PORT BACK END DAI Link */
7056 {
7057 .name = LPASS_BE_DISPLAY_PORT,
7058 .stream_name = "Display Port Playback",
7059 .cpu_dai_name = "msm-dai-q6-dp.24608",
7060 .platform_name = "msm-pcm-routing",
7061 .codec_name = "msm-ext-disp-audio-codec-rx",
7062 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7063 .no_pcm = 1,
7064 .dpcm_playback = 1,
7065 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7066 .be_hw_params_fixup = msm_be_hw_params_fixup,
7067 .ignore_pmdown_time = 1,
7068 .ignore_suspend = 1,
7069 },
7070};
7071
7072static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7073 {
7074 .name = LPASS_BE_PRI_MI2S_RX,
7075 .stream_name = "Primary MI2S Playback",
7076 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7077 .platform_name = "msm-pcm-routing",
7078 .codec_name = "msm-stub-codec.1",
7079 .codec_dai_name = "msm-stub-rx",
7080 .no_pcm = 1,
7081 .dpcm_playback = 1,
7082 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7083 .be_hw_params_fixup = msm_be_hw_params_fixup,
7084 .ops = &msm_mi2s_be_ops,
7085 .ignore_suspend = 1,
7086 .ignore_pmdown_time = 1,
7087 },
7088 {
7089 .name = LPASS_BE_PRI_MI2S_TX,
7090 .stream_name = "Primary MI2S Capture",
7091 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7092 .platform_name = "msm-pcm-routing",
7093 .codec_name = "msm-stub-codec.1",
7094 .codec_dai_name = "msm-stub-tx",
7095 .no_pcm = 1,
7096 .dpcm_capture = 1,
7097 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7098 .be_hw_params_fixup = msm_be_hw_params_fixup,
7099 .ops = &msm_mi2s_be_ops,
7100 .ignore_suspend = 1,
7101 },
7102 {
7103 .name = LPASS_BE_SEC_MI2S_RX,
7104 .stream_name = "Secondary MI2S Playback",
7105 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7106 .platform_name = "msm-pcm-routing",
7107 .codec_name = "msm-stub-codec.1",
7108 .codec_dai_name = "msm-stub-rx",
7109 .no_pcm = 1,
7110 .dpcm_playback = 1,
7111 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7112 .be_hw_params_fixup = msm_be_hw_params_fixup,
7113 .ops = &msm_mi2s_be_ops,
7114 .ignore_suspend = 1,
7115 .ignore_pmdown_time = 1,
7116 },
7117 {
7118 .name = LPASS_BE_SEC_MI2S_TX,
7119 .stream_name = "Secondary MI2S Capture",
7120 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7121 .platform_name = "msm-pcm-routing",
7122 .codec_name = "msm-stub-codec.1",
7123 .codec_dai_name = "msm-stub-tx",
7124 .no_pcm = 1,
7125 .dpcm_capture = 1,
7126 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7127 .be_hw_params_fixup = msm_be_hw_params_fixup,
7128 .ops = &msm_mi2s_be_ops,
7129 .ignore_suspend = 1,
7130 },
7131 {
7132 .name = LPASS_BE_TERT_MI2S_RX,
7133 .stream_name = "Tertiary MI2S Playback",
7134 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7135 .platform_name = "msm-pcm-routing",
7136 .codec_name = "msm-stub-codec.1",
7137 .codec_dai_name = "msm-stub-rx",
7138 .no_pcm = 1,
7139 .dpcm_playback = 1,
7140 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7141 .be_hw_params_fixup = msm_be_hw_params_fixup,
7142 .ops = &msm_mi2s_be_ops,
7143 .ignore_suspend = 1,
7144 .ignore_pmdown_time = 1,
7145 },
7146 {
7147 .name = LPASS_BE_TERT_MI2S_TX,
7148 .stream_name = "Tertiary MI2S Capture",
7149 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7150 .platform_name = "msm-pcm-routing",
7151 .codec_name = "msm-stub-codec.1",
7152 .codec_dai_name = "msm-stub-tx",
7153 .no_pcm = 1,
7154 .dpcm_capture = 1,
7155 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7156 .be_hw_params_fixup = msm_be_hw_params_fixup,
7157 .ops = &msm_mi2s_be_ops,
7158 .ignore_suspend = 1,
7159 },
7160 {
7161 .name = LPASS_BE_QUAT_MI2S_RX,
7162 .stream_name = "Quaternary MI2S Playback",
7163 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7164 .platform_name = "msm-pcm-routing",
7165 .codec_name = "msm-stub-codec.1",
7166 .codec_dai_name = "msm-stub-rx",
7167 .no_pcm = 1,
7168 .dpcm_playback = 1,
7169 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7170 .be_hw_params_fixup = msm_be_hw_params_fixup,
7171 .ops = &msm_mi2s_be_ops,
7172 .ignore_suspend = 1,
7173 .ignore_pmdown_time = 1,
7174 },
7175 {
7176 .name = LPASS_BE_QUAT_MI2S_TX,
7177 .stream_name = "Quaternary MI2S Capture",
7178 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7179 .platform_name = "msm-pcm-routing",
7180 .codec_name = "msm-stub-codec.1",
7181 .codec_dai_name = "msm-stub-tx",
7182 .no_pcm = 1,
7183 .dpcm_capture = 1,
7184 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7185 .be_hw_params_fixup = msm_be_hw_params_fixup,
7186 .ops = &msm_mi2s_be_ops,
7187 .ignore_suspend = 1,
7188 },
7189 {
7190 .name = LPASS_BE_QUIN_MI2S_RX,
7191 .stream_name = "Quinary MI2S Playback",
7192 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7193 .platform_name = "msm-pcm-routing",
7194 .codec_name = "msm-stub-codec.1",
7195 .codec_dai_name = "msm-stub-rx",
7196 .no_pcm = 1,
7197 .dpcm_playback = 1,
7198 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7199 .be_hw_params_fixup = msm_be_hw_params_fixup,
7200 .ops = &msm_mi2s_be_ops,
7201 .ignore_suspend = 1,
7202 .ignore_pmdown_time = 1,
7203 },
7204 {
7205 .name = LPASS_BE_QUIN_MI2S_TX,
7206 .stream_name = "Quinary MI2S Capture",
7207 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7208 .platform_name = "msm-pcm-routing",
7209 .codec_name = "msm-stub-codec.1",
7210 .codec_dai_name = "msm-stub-tx",
7211 .no_pcm = 1,
7212 .dpcm_capture = 1,
7213 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7214 .be_hw_params_fixup = msm_be_hw_params_fixup,
7215 .ops = &msm_mi2s_be_ops,
7216 .ignore_suspend = 1,
7217 },
7218
7219};
7220
7221static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7222 /* Primary AUX PCM Backend DAI Links */
7223 {
7224 .name = LPASS_BE_AUXPCM_RX,
7225 .stream_name = "AUX PCM Playback",
7226 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7227 .platform_name = "msm-pcm-routing",
7228 .codec_name = "msm-stub-codec.1",
7229 .codec_dai_name = "msm-stub-rx",
7230 .no_pcm = 1,
7231 .dpcm_playback = 1,
7232 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7233 .be_hw_params_fixup = msm_be_hw_params_fixup,
7234 .ignore_pmdown_time = 1,
7235 .ignore_suspend = 1,
7236 },
7237 {
7238 .name = LPASS_BE_AUXPCM_TX,
7239 .stream_name = "AUX PCM Capture",
7240 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7241 .platform_name = "msm-pcm-routing",
7242 .codec_name = "msm-stub-codec.1",
7243 .codec_dai_name = "msm-stub-tx",
7244 .no_pcm = 1,
7245 .dpcm_capture = 1,
7246 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7247 .be_hw_params_fixup = msm_be_hw_params_fixup,
7248 .ignore_suspend = 1,
7249 },
7250 /* Secondary AUX PCM Backend DAI Links */
7251 {
7252 .name = LPASS_BE_SEC_AUXPCM_RX,
7253 .stream_name = "Sec AUX PCM Playback",
7254 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7255 .platform_name = "msm-pcm-routing",
7256 .codec_name = "msm-stub-codec.1",
7257 .codec_dai_name = "msm-stub-rx",
7258 .no_pcm = 1,
7259 .dpcm_playback = 1,
7260 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7261 .be_hw_params_fixup = msm_be_hw_params_fixup,
7262 .ignore_pmdown_time = 1,
7263 .ignore_suspend = 1,
7264 },
7265 {
7266 .name = LPASS_BE_SEC_AUXPCM_TX,
7267 .stream_name = "Sec AUX PCM Capture",
7268 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7269 .platform_name = "msm-pcm-routing",
7270 .codec_name = "msm-stub-codec.1",
7271 .codec_dai_name = "msm-stub-tx",
7272 .no_pcm = 1,
7273 .dpcm_capture = 1,
7274 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7275 .be_hw_params_fixup = msm_be_hw_params_fixup,
7276 .ignore_suspend = 1,
7277 },
7278 /* Tertiary AUX PCM Backend DAI Links */
7279 {
7280 .name = LPASS_BE_TERT_AUXPCM_RX,
7281 .stream_name = "Tert AUX PCM Playback",
7282 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7283 .platform_name = "msm-pcm-routing",
7284 .codec_name = "msm-stub-codec.1",
7285 .codec_dai_name = "msm-stub-rx",
7286 .no_pcm = 1,
7287 .dpcm_playback = 1,
7288 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7289 .be_hw_params_fixup = msm_be_hw_params_fixup,
7290 .ignore_suspend = 1,
7291 },
7292 {
7293 .name = LPASS_BE_TERT_AUXPCM_TX,
7294 .stream_name = "Tert AUX PCM Capture",
7295 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7296 .platform_name = "msm-pcm-routing",
7297 .codec_name = "msm-stub-codec.1",
7298 .codec_dai_name = "msm-stub-tx",
7299 .no_pcm = 1,
7300 .dpcm_capture = 1,
7301 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7302 .be_hw_params_fixup = msm_be_hw_params_fixup,
7303 .ignore_suspend = 1,
7304 },
7305 /* Quaternary AUX PCM Backend DAI Links */
7306 {
7307 .name = LPASS_BE_QUAT_AUXPCM_RX,
7308 .stream_name = "Quat AUX PCM Playback",
7309 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7310 .platform_name = "msm-pcm-routing",
7311 .codec_name = "msm-stub-codec.1",
7312 .codec_dai_name = "msm-stub-rx",
7313 .no_pcm = 1,
7314 .dpcm_playback = 1,
7315 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7316 .be_hw_params_fixup = msm_be_hw_params_fixup,
7317 .ignore_pmdown_time = 1,
7318 .ignore_suspend = 1,
7319 },
7320 {
7321 .name = LPASS_BE_QUAT_AUXPCM_TX,
7322 .stream_name = "Quat AUX PCM Capture",
7323 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7324 .platform_name = "msm-pcm-routing",
7325 .codec_name = "msm-stub-codec.1",
7326 .codec_dai_name = "msm-stub-tx",
7327 .no_pcm = 1,
7328 .dpcm_capture = 1,
7329 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7330 .be_hw_params_fixup = msm_be_hw_params_fixup,
7331 .ignore_suspend = 1,
7332 },
7333 /* Quinary AUX PCM Backend DAI Links */
7334 {
7335 .name = LPASS_BE_QUIN_AUXPCM_RX,
7336 .stream_name = "Quin AUX PCM Playback",
7337 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7338 .platform_name = "msm-pcm-routing",
7339 .codec_name = "msm-stub-codec.1",
7340 .codec_dai_name = "msm-stub-rx",
7341 .no_pcm = 1,
7342 .dpcm_playback = 1,
7343 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7344 .be_hw_params_fixup = msm_be_hw_params_fixup,
7345 .ignore_pmdown_time = 1,
7346 .ignore_suspend = 1,
7347 },
7348 {
7349 .name = LPASS_BE_QUIN_AUXPCM_TX,
7350 .stream_name = "Quin AUX PCM Capture",
7351 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7352 .platform_name = "msm-pcm-routing",
7353 .codec_name = "msm-stub-codec.1",
7354 .codec_dai_name = "msm-stub-tx",
7355 .no_pcm = 1,
7356 .dpcm_capture = 1,
7357 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7358 .be_hw_params_fixup = msm_be_hw_params_fixup,
7359 .ignore_suspend = 1,
7360 },
7361};
7362
7363static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7364 /* WSA CDC DMA Backend DAI Links */
7365 {
7366 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7367 .stream_name = "WSA CDC DMA0 Playback",
7368 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7369 .platform_name = "msm-pcm-routing",
7370 .codec_name = "bolero_codec",
7371 .codec_dai_name = "wsa_macro_rx1",
7372 .no_pcm = 1,
7373 .dpcm_playback = 1,
7374 .init = &msm_int_audrx_init,
7375 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7376 .be_hw_params_fixup = msm_be_hw_params_fixup,
7377 .ignore_pmdown_time = 1,
7378 .ignore_suspend = 1,
7379 .ops = &msm_cdc_dma_be_ops,
7380 },
7381 {
7382 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7383 .stream_name = "WSA CDC DMA1 Playback",
7384 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7385 .platform_name = "msm-pcm-routing",
7386 .codec_name = "bolero_codec",
7387 .codec_dai_name = "wsa_macro_rx_mix",
7388 .no_pcm = 1,
7389 .dpcm_playback = 1,
7390 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7391 .be_hw_params_fixup = msm_be_hw_params_fixup,
7392 .ignore_pmdown_time = 1,
7393 .ignore_suspend = 1,
7394 .ops = &msm_cdc_dma_be_ops,
7395 },
7396 {
7397 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7398 .stream_name = "WSA CDC DMA1 Capture",
7399 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7400 .platform_name = "msm-pcm-routing",
7401 .codec_name = "bolero_codec",
7402 .codec_dai_name = "wsa_macro_echo",
7403 .no_pcm = 1,
7404 .dpcm_capture = 1,
7405 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7406 .be_hw_params_fixup = msm_be_hw_params_fixup,
7407 .ignore_suspend = 1,
7408 .ops = &msm_cdc_dma_be_ops,
7409 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7410};
7411
7412static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7413 /* RX CDC DMA Backend DAI Links */
7414 {
7415 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7416 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7417 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7418 .platform_name = "msm-pcm-routing",
7419 .codec_name = "bolero_codec",
7420 .codec_dai_name = "rx_macro_rx1",
7421 .no_pcm = 1,
7422 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7423 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7424 .be_hw_params_fixup = msm_be_hw_params_fixup,
7425 .ignore_pmdown_time = 1,
7426 .ignore_suspend = 1,
7427 .ops = &msm_cdc_dma_be_ops,
7428 },
7429 {
7430 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7431 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7432 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7433 .platform_name = "msm-pcm-routing",
7434 .codec_name = "bolero_codec",
7435 .codec_dai_name = "rx_macro_rx2",
7436 .no_pcm = 1,
7437 .dpcm_playback = 1,
7438 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7439 .be_hw_params_fixup = msm_be_hw_params_fixup,
7440 .ignore_pmdown_time = 1,
7441 .ignore_suspend = 1,
7442 .ops = &msm_cdc_dma_be_ops,
7443 },
7444 {
7445 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7446 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7447 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7448 .platform_name = "msm-pcm-routing",
7449 .codec_name = "bolero_codec",
7450 .codec_dai_name = "rx_macro_rx3",
7451 .no_pcm = 1,
7452 .dpcm_playback = 1,
7453 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7454 .be_hw_params_fixup = msm_be_hw_params_fixup,
7455 .ignore_pmdown_time = 1,
7456 .ignore_suspend = 1,
7457 .ops = &msm_cdc_dma_be_ops,
7458 },
7459 {
7460 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7461 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7462 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7463 .platform_name = "msm-pcm-routing",
7464 .codec_name = "bolero_codec",
7465 .codec_dai_name = "rx_macro_rx4",
7466 .no_pcm = 1,
7467 .dpcm_playback = 1,
7468 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7469 .be_hw_params_fixup = msm_be_hw_params_fixup,
7470 .ignore_pmdown_time = 1,
7471 .ignore_suspend = 1,
7472 .ops = &msm_cdc_dma_be_ops,
7473 },
7474 /* TX CDC DMA Backend DAI Links */
7475 {
Vatsal Bucha83e6ee12018-11-30 18:58:31 +0530[diff] [blame]7476 .name = LPASS_BE_TX_CDC_DMA_TX_0,
7477 .stream_name = "TX CDC DMA0 Capture",
7478 .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
7479 .platform_name = "msm-pcm-routing",
7480 .codec_name = "bolero_codec",
7481 .codec_dai_name = "rx_macro_echo",
7482 .no_pcm = 1,
7483 .dpcm_capture = 1,
7484 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
7485 .be_hw_params_fixup = msm_be_hw_params_fixup,
7486 .ignore_suspend = 1,
7487 .ops = &msm_cdc_dma_be_ops,
7488 },
7489 {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7490 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7491 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7492 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7493 .platform_name = "msm-pcm-routing",
7494 .codec_name = "bolero_codec",
7495 .codec_dai_name = "tx_macro_tx1",
7496 .no_pcm = 1,
7497 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7498 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7499 .be_hw_params_fixup = msm_be_hw_params_fixup,
7500 .ignore_suspend = 1,
7501 .ops = &msm_cdc_dma_be_ops,
7502 },
7503 {
7504 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7505 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7506 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7507 .platform_name = "msm-pcm-routing",
7508 .codec_name = "bolero_codec",
7509 .codec_dai_name = "tx_macro_tx2",
7510 .no_pcm = 1,
7511 .dpcm_capture = 1,
7512 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7513 .be_hw_params_fixup = msm_be_hw_params_fixup,
7514 .ignore_suspend = 1,
7515 .ops = &msm_cdc_dma_be_ops,
7516 },
7517};
7518
7519static struct snd_soc_dai_link msm_sm6150_dai_links[
7520 ARRAY_SIZE(msm_common_dai_links) +
7521 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7522 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7523 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]7524 ARRAY_SIZE(msm_int_compress_capture_dai) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7525 ARRAY_SIZE(msm_common_be_dai_links) +
7526 ARRAY_SIZE(msm_tavil_be_dai_links) +
7527 ARRAY_SIZE(msm_wcn_be_dai_links) +
7528 ARRAY_SIZE(ext_disp_be_dai_link) +
7529 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7530 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7531 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7532 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7533
7534static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7535{
7536 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7537 struct snd_soc_pcm_runtime *rtd;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7538 struct snd_soc_component *component;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7539 int ret = 0;
7540 void *mbhc_calibration;
7541
7542 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7543 if (!rtd) {
7544 dev_err(card->dev,
7545 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7546 __func__, be_dl_name);
7547 ret = -EINVAL;
7548 goto err_pcm_runtime;
7549 }
7550
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7551 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
7552 if (!component) {
7553 pr_err("%s: component is NULL\n", __func__);
7554 ret = -EINVAL;
7555 goto err_pcm_runtime;
7556 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7557 mbhc_calibration = def_wcd_mbhc_cal();
7558 if (!mbhc_calibration) {
7559 ret = -ENOMEM;
7560 goto err_mbhc_cal;
7561 }
7562 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7563 ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7564 if (ret) {
7565 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7566 __func__, ret);
7567 goto err_hs_detect;
7568 }
7569 return 0;
7570
7571err_hs_detect:
7572 kfree(mbhc_calibration);
7573err_mbhc_cal:
7574err_pcm_runtime:
7575 return ret;
7576}
7577
7578
7579static int msm_populate_dai_link_component_of_node(
7580 struct snd_soc_card *card)
7581{
7582 int i, index, ret = 0;
7583 struct device *cdev = card->dev;
7584 struct snd_soc_dai_link *dai_link = card->dai_link;
7585 struct device_node *np;
7586
7587 if (!cdev) {
7588 pr_err("%s: Sound card device memory NULL\n", __func__);
7589 return -ENODEV;
7590 }
7591
7592 for (i = 0; i < card->num_links; i++) {
7593 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7594 continue;
7595
7596 /* populate platform_of_node for snd card dai links */
7597 if (dai_link[i].platform_name &&
7598 !dai_link[i].platform_of_node) {
7599 index = of_property_match_string(cdev->of_node,
7600 "asoc-platform-names",
7601 dai_link[i].platform_name);
7602 if (index < 0) {
7603 pr_err("%s: No match found for platform name: %s\n",
7604 __func__, dai_link[i].platform_name);
7605 ret = index;
7606 goto err;
7607 }
7608 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7609 index);
7610 if (!np) {
7611 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7612 __func__, dai_link[i].platform_name,
7613 index);
7614 ret = -ENODEV;
7615 goto err;
7616 }
7617 dai_link[i].platform_of_node = np;
7618 dai_link[i].platform_name = NULL;
7619 }
7620
7621 /* populate cpu_of_node for snd card dai links */
7622 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7623 index = of_property_match_string(cdev->of_node,
7624 "asoc-cpu-names",
7625 dai_link[i].cpu_dai_name);
7626 if (index >= 0) {
7627 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7628 index);
7629 if (!np) {
7630 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7631 __func__,
7632 dai_link[i].cpu_dai_name);
7633 ret = -ENODEV;
7634 goto err;
7635 }
7636 dai_link[i].cpu_of_node = np;
7637 dai_link[i].cpu_dai_name = NULL;
7638 }
7639 }
7640
7641 /* populate codec_of_node for snd card dai links */
7642 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7643 index = of_property_match_string(cdev->of_node,
7644 "asoc-codec-names",
7645 dai_link[i].codec_name);
7646 if (index < 0)
7647 continue;
7648 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7649 index);
7650 if (!np) {
7651 pr_err("%s: retrieving phandle for codec %s failed\n",
7652 __func__, dai_link[i].codec_name);
7653 ret = -ENODEV;
7654 goto err;
7655 }
7656 dai_link[i].codec_of_node = np;
7657 dai_link[i].codec_name = NULL;
7658 }
7659 }
7660
7661err:
7662 return ret;
7663}
7664
7665static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7666{
7667 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7668 struct snd_soc_component *component =
7669 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7670
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7671 ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7672 ARRAY_SIZE(msm_tavil_snd_controls));
7673 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7674 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7675 "%s: add_codec_controls failed, err = %d\n",
7676 __func__, ret);
7677 return ret;
7678 }
7679
7680 return 0;
7681}
7682
7683static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7684 struct snd_pcm_hw_params *params)
7685{
7686 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7687 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7688
7689 int ret = 0;
7690 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7691 151};
7692 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7693 134, 135, 136, 137, 138, 139,
7694 140, 141, 142, 143};
7695
7696 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7697 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7698 slim_rx_cfg[SLIM_RX_0].channels,
7699 rx_ch);
7700 if (ret < 0)
7701 pr_err("%s: RX failed to set cpu chan map error %d\n",
7702 __func__, ret);
7703 } else {
7704 ret = snd_soc_dai_set_channel_map(cpu_dai,
7705 slim_tx_cfg[SLIM_TX_0].channels,
7706 tx_ch, 0, 0);
7707 if (ret < 0)
7708 pr_err("%s: TX failed to set cpu chan map error %d\n",
7709 __func__, ret);
7710 }
7711
7712 return ret;
7713}
7714
7715static struct snd_soc_ops msm_stub_be_ops = {
7716 .hw_params = msm_snd_stub_hw_params,
7717};
7718
7719static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7720
7721 /* FrontEnd DAI Links */
7722 {
7723 .name = "MSMSTUB Media1",
7724 .stream_name = "MultiMedia1",
7725 .cpu_dai_name = "MultiMedia1",
7726 .platform_name = "msm-pcm-dsp.0",
7727 .dynamic = 1,
7728 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7729 .dpcm_playback = 1,
7730 .dpcm_capture = 1,
7731 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7732 SND_SOC_DPCM_TRIGGER_POST},
7733 .codec_dai_name = "snd-soc-dummy-dai",
7734 .codec_name = "snd-soc-dummy",
7735 .ignore_suspend = 1,
7736 /* this dainlink has playback support */
7737 .ignore_pmdown_time = 1,
7738 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7739 },
7740};
7741
7742static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7743
7744 /* Backend DAI Links */
7745 {
7746 .name = LPASS_BE_SLIMBUS_0_RX,
7747 .stream_name = "Slimbus Playback",
7748 .cpu_dai_name = "msm-dai-q6-dev.16384",
7749 .platform_name = "msm-pcm-routing",
7750 .codec_name = "msm-stub-codec.1",
7751 .codec_dai_name = "msm-stub-rx",
7752 .no_pcm = 1,
7753 .dpcm_playback = 1,
7754 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7755 .init = &msm_audrx_stub_init,
7756 .be_hw_params_fixup = msm_be_hw_params_fixup,
7757 .ignore_pmdown_time = 1, /* dai link has playback support */
7758 .ignore_suspend = 1,
7759 .ops = &msm_stub_be_ops,
7760 },
7761 {
7762 .name = LPASS_BE_SLIMBUS_0_TX,
7763 .stream_name = "Slimbus Capture",
7764 .cpu_dai_name = "msm-dai-q6-dev.16385",
7765 .platform_name = "msm-pcm-routing",
7766 .codec_name = "msm-stub-codec.1",
7767 .codec_dai_name = "msm-stub-tx",
7768 .no_pcm = 1,
7769 .dpcm_capture = 1,
7770 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7771 .be_hw_params_fixup = msm_be_hw_params_fixup,
7772 .ignore_suspend = 1,
7773 .ops = &msm_stub_be_ops,
7774 },
7775};
7776
7777static struct snd_soc_dai_link msm_stub_dai_links[
7778 ARRAY_SIZE(msm_stub_fe_dai_links) +
7779 ARRAY_SIZE(msm_stub_be_dai_links)];
7780
7781struct snd_soc_card snd_soc_card_stub_msm = {
7782 .name = "sm6150-stub-snd-card",
7783};
7784
7785static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7786 { .compatible = "qcom,sm6150-asoc-snd",
7787 .data = "codec"},
7788 { .compatible = "qcom,sm6150-asoc-snd-stub",
7789 .data = "stub_codec"},
7790 {},
7791};
7792
7793static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7794{
7795 struct snd_soc_card *card = NULL;
7796 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7797 int total_links = 0, rc = 0;
7798 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7799 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7800 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7801 const struct of_device_id *match;
7802
7803 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7804 if (!match) {
7805 dev_err(dev, "%s: No DT match found for sound card\n",
7806 __func__);
7807 return NULL;
7808 }
7809
7810 if (!strcmp(match->data, "codec")) {
7811 card = &snd_soc_card_sm6150_msm;
7812 memcpy(msm_sm6150_dai_links + total_links,
7813 msm_common_dai_links,
7814 sizeof(msm_common_dai_links));
7815
7816 total_links += ARRAY_SIZE(msm_common_dai_links);
7817
7818 memcpy(msm_sm6150_dai_links + total_links,
7819 msm_common_misc_fe_dai_links,
7820 sizeof(msm_common_misc_fe_dai_links));
7821
7822 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7823
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7824 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7825 &tavil_codec);
7826 if (rc) {
7827 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7828 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7829 } else {
7830 if (tavil_codec) {
7831 card->late_probe =
7832 msm_snd_card_tavil_late_probe;
7833 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7834 msm_tavil_fe_dai_links,
7835 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7836 total_links +=
7837 ARRAY_SIZE(msm_tavil_fe_dai_links);
7838 }
7839 }
7840
7841 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7842 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7843 msm_bolero_fe_dai_links,
7844 sizeof(msm_bolero_fe_dai_links));
7845 total_links +=
7846 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7847 }
7848
7849 memcpy(msm_sm6150_dai_links + total_links,
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]7850 msm_int_compress_capture_dai,
7851 sizeof(msm_int_compress_capture_dai));
7852
7853 total_links += ARRAY_SIZE(msm_int_compress_capture_dai);
7854
7855 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7856 msm_common_be_dai_links,
7857 sizeof(msm_common_be_dai_links));
7858
7859 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7860
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7861 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7862 memcpy(msm_sm6150_dai_links + total_links,
7863 msm_tavil_be_dai_links,
7864 sizeof(msm_tavil_be_dai_links));
7865 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7866 } else {
7867 memcpy(msm_sm6150_dai_links + total_links,
7868 msm_wsa_cdc_dma_be_dai_links,
7869 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7870 total_links +=
7871 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7872
7873 memcpy(msm_sm6150_dai_links + total_links,
7874 msm_rx_tx_cdc_dma_be_dai_links,
7875 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7876 total_links +=
7877 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7878 }
7879
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7880 rc = of_property_read_u32(dev->of_node,
7881 "qcom,ext-disp-audio-rx",
7882 &ext_disp_audio_intf);
7883 if (rc) {
7884 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7885 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7886 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]7887 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7888 memcpy(msm_sm6150_dai_links + total_links,
7889 ext_disp_be_dai_link,
7890 sizeof(ext_disp_be_dai_link));
7891 total_links +=
7892 ARRAY_SIZE(ext_disp_be_dai_link);
7893 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7894 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7895
7896 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7897 &mi2s_audio_intf);
7898 if (rc) {
7899 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7900 __func__);
7901 } else {
7902 if (mi2s_audio_intf) {
7903 memcpy(msm_sm6150_dai_links + total_links,
7904 msm_mi2s_be_dai_links,
7905 sizeof(msm_mi2s_be_dai_links));
7906 total_links +=
7907 ARRAY_SIZE(msm_mi2s_be_dai_links);
7908 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7909 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7910
7911
7912 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7913 &wcn_btfm_intf);
7914 if (rc) {
7915 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7916 __func__);
7917 } else {
7918 if (wcn_btfm_intf) {
7919 memcpy(msm_sm6150_dai_links + total_links,
7920 msm_wcn_be_dai_links,
7921 sizeof(msm_wcn_be_dai_links));
7922 total_links +=
7923 ARRAY_SIZE(msm_wcn_be_dai_links);
7924 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7925 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7926
7927 rc = of_property_read_u32(dev->of_node,
7928 "qcom,auxpcm-audio-intf",
7929 &auxpcm_audio_intf);
7930 if (rc) {
7931 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7932 __func__);
7933 } else {
7934 if (auxpcm_audio_intf) {
7935 memcpy(msm_sm6150_dai_links + total_links,
7936 msm_auxpcm_be_dai_links,
7937 sizeof(msm_auxpcm_be_dai_links));
7938 total_links +=
7939 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7940 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7941 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7942
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7943 dailink = msm_sm6150_dai_links;
7944 } else if (!strcmp(match->data, "stub_codec")) {
7945 card = &snd_soc_card_stub_msm;
7946
7947 memcpy(msm_stub_dai_links + total_links,
7948 msm_stub_fe_dai_links,
7949 sizeof(msm_stub_fe_dai_links));
7950 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7951
7952 memcpy(msm_stub_dai_links + total_links,
7953 msm_stub_be_dai_links,
7954 sizeof(msm_stub_be_dai_links));
7955 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7956
7957 dailink = msm_stub_dai_links;
7958 }
7959
7960 if (card) {
7961 card->dai_link = dailink;
7962 card->num_links = total_links;
7963 }
7964
7965 return card;
7966}
7967
7968static int msm_wsa881x_init(struct snd_soc_component *component)
7969{
7970 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7971 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7972 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7973 SPKR_L_BOOST, SPKR_L_VI};
7974 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7975 SPKR_R_BOOST, SPKR_R_VI};
7976 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7977 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7978 struct msm_asoc_mach_data *pdata;
7979 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7980 struct snd_card *card = component->card->snd_card;
7981 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7982 int ret = 0;
7983
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7984 if (!component) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7985 pr_err("%s codec is NULL\n", __func__);
7986 return -EINVAL;
7987 }
7988
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7989 dapm = snd_soc_component_get_dapm(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7990
7991 if (!strcmp(component->name_prefix, "SpkrLeft")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]7992 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7993 __func__, component->name);
7994 wsa881x_set_channel_map(component, &spkleft_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7995 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7996 &ch_rate[0], &spkleft_port_types[0]);
7997 if (dapm->component) {
7998 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7999 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
8000 }
8001 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8002 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
8003 __func__, component->name);
8004 wsa881x_set_channel_map(component, &spkright_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8005 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8006 &ch_rate[0], &spkright_port_types[0]);
8007 if (dapm->component) {
8008 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
8009 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
8010 }
8011 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8012 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
8013 component->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8014 ret = -EINVAL;
8015 goto err;
8016 }
8017 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8018 if (!pdata->codec_root) {
8019 entry = snd_info_create_subdir(card->module, "codecs",
8020 card->proc_root);
8021 if (!entry) {
8022 pr_err("%s: Cannot create codecs module entry\n",
8023 __func__);
8024 ret = 0;
8025 goto err;
8026 }
8027 pdata->codec_root = entry;
8028 }
8029 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8030 component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8031err:
8032 return ret;
8033}
8034
8035static int msm_aux_codec_init(struct snd_soc_component *component)
8036{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8037 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8038 int ret = 0;
8039 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8040 struct snd_info_entry *entry;
8041 struct snd_card *card = component->card->snd_card;
8042 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8043
8044 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8045 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8046 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8047 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8048 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8049 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8050 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8051 snd_soc_dapm_sync(dapm);
8052
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8053 pdata = snd_soc_card_get_drvdata(component->card);
8054 if (!pdata->codec_root) {
8055 entry = snd_info_create_subdir(card->module, "codecs",
8056 card->proc_root);
8057 if (!entry) {
8058 pr_err("%s: Cannot create codecs module entry\n",
8059 __func__);
8060 ret = 0;
8061 goto codec_root_err;
8062 }
8063 pdata->codec_root = entry;
8064 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8065 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8066codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8067 mbhc_calibration = def_wcd_mbhc_cal();
8068 if (!mbhc_calibration) {
8069 return -ENOMEM;
8070 }
8071 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8072 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8073
8074 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8075}
8076
8077static int msm_init_aux_dev(struct platform_device *pdev,
8078 struct snd_soc_card *card)
8079{
8080 struct device_node *wsa_of_node;
8081 struct device_node *aux_codec_of_node;
8082 u32 wsa_max_devs;
8083 u32 wsa_dev_cnt;
Aditya Bavanari32b3e5e2018-12-04 17:19:56 +0530[diff] [blame]8084 u32 codec_max_aux_devs = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8085 u32 codec_aux_dev_cnt = 0;
8086 int i;
Md Mansoor Ahmed2382aaa2018-11-20 11:06:32 +0530[diff] [blame]8087 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8088 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8089 const char *auxdev_name_prefix[1];
8090 char *dev_name_str = NULL;
8091 int found = 0;
8092 int codecs_found = 0;
8093 int ret = 0;
8094
8095 /* Get maximum WSA device count for this platform */
8096 ret = of_property_read_u32(pdev->dev.of_node,
8097 "qcom,wsa-max-devs", &wsa_max_devs);
8098 if (ret) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8099 dev_err(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8100 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8101 __func__, pdev->dev.of_node->full_name, ret);
8102 wsa_max_devs = 0;
8103 goto codec_aux_dev;
8104 }
8105 if (wsa_max_devs == 0) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8106 dev_dbg(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8107 "%s: Max WSA devices is 0 for this target?\n",
8108 __func__);
8109 goto codec_aux_dev;
8110 }
8111
8112 /* Get count of WSA device phandles for this platform */
8113 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8114 "qcom,wsa-devs", NULL);
8115 if (wsa_dev_cnt == -ENOENT) {
8116 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8117 __func__);
8118 goto err;
8119 } else if (wsa_dev_cnt <= 0) {
8120 dev_err(&pdev->dev,
8121 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8122 __func__, wsa_dev_cnt);
8123 ret = -EINVAL;
8124 goto err;
8125 }
8126
8127 /*
8128 * Expect total phandles count to be NOT less than maximum possible
8129 * WSA count. However, if it is less, then assign same value to
8130 * max count as well.
8131 */
8132 if (wsa_dev_cnt < wsa_max_devs) {
8133 dev_dbg(&pdev->dev,
8134 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8135 __func__, wsa_max_devs, wsa_dev_cnt);
8136 wsa_max_devs = wsa_dev_cnt;
8137 }
8138
8139 /* Make sure prefix string passed for each WSA device */
8140 ret = of_property_count_strings(pdev->dev.of_node,
8141 "qcom,wsa-aux-dev-prefix");
8142 if (ret != wsa_dev_cnt) {
8143 dev_err(&pdev->dev,
8144 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8145 __func__, wsa_dev_cnt, ret);
8146 ret = -EINVAL;
8147 goto err;
8148 }
8149
8150 /*
8151 * Alloc mem to store phandle and index info of WSA device, if already
8152 * registered with ALSA core
8153 */
8154 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8155 sizeof(struct msm_wsa881x_dev_info),
8156 GFP_KERNEL);
8157 if (!wsa881x_dev_info) {
8158 ret = -ENOMEM;
8159 goto err;
8160 }
8161
8162 /*
8163 * search and check whether all WSA devices are already
8164 * registered with ALSA core or not. If found a node, store
8165 * the node and the index in a local array of struct for later
8166 * use.
8167 */
8168 for (i = 0; i < wsa_dev_cnt; i++) {
8169 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8170 "qcom,wsa-devs", i);
8171 if (unlikely(!wsa_of_node)) {
8172 /* we should not be here */
8173 dev_err(&pdev->dev,
8174 "%s: wsa dev node is not present\n",
8175 __func__);
8176 ret = -EINVAL;
8177 goto err;
8178 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8179 if (soc_find_component_locked(wsa_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8180 /* WSA device registered with ALSA core */
8181 wsa881x_dev_info[found].of_node = wsa_of_node;
8182 wsa881x_dev_info[found].index = i;
8183 found++;
8184 if (found == wsa_max_devs)
8185 break;
8186 }
8187 }
8188
8189 if (found < wsa_max_devs) {
8190 dev_dbg(&pdev->dev,
8191 "%s: failed to find %d components. Found only %d\n",
8192 __func__, wsa_max_devs, found);
8193 return -EPROBE_DEFER;
8194 }
8195 dev_info(&pdev->dev,
8196 "%s: found %d wsa881x devices registered with ALSA core\n",
8197 __func__, found);
8198
8199codec_aux_dev:
8200 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8201 /* Get maximum aux codec device count for this platform */
8202 ret = of_property_read_u32(pdev->dev.of_node,
8203 "qcom,codec-max-aux-devs",
8204 &codec_max_aux_devs);
8205 if (ret) {
8206 dev_err(&pdev->dev,
8207 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8208 __func__, pdev->dev.of_node->full_name, ret);
8209 codec_max_aux_devs = 0;
8210 goto aux_dev_register;
8211 }
8212 if (codec_max_aux_devs == 0) {
8213 dev_dbg(&pdev->dev,
8214 "%s: Max aux codec devices is 0 for this target?\n",
8215 __func__);
8216 goto aux_dev_register;
8217 }
8218
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8219 /* Get count of aux codec device phandles for this platform */
8220 codec_aux_dev_cnt = of_count_phandle_with_args(
8221 pdev->dev.of_node,
8222 "qcom,codec-aux-devs", NULL);
8223 if (codec_aux_dev_cnt == -ENOENT) {
8224 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8225 __func__);
8226 goto err;
8227 } else if (codec_aux_dev_cnt <= 0) {
8228 dev_err(&pdev->dev,
8229 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8230 __func__, codec_aux_dev_cnt);
8231 ret = -EINVAL;
8232 goto err;
8233 }
8234
8235 /*
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8236 * Expect total phandles count to be NOT less than maximum possible
8237 * AUX device count. However, if it is less, then assign same value to
8238 * max count as well.
8239 */
8240 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8241 dev_dbg(&pdev->dev,
8242 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8243 __func__, codec_max_aux_devs,
8244 codec_aux_dev_cnt);
8245 codec_max_aux_devs = codec_aux_dev_cnt;
8246 }
8247
8248 /*
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8249 * Alloc mem to store phandle and index info of aux codec
8250 * if already registered with ALSA core
8251 */
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8252 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8253 sizeof(struct aux_codec_dev_info),
8254 GFP_KERNEL);
8255 if (!aux_cdc_dev_info) {
8256 ret = -ENOMEM;
8257 goto err;
8258 }
8259
8260 /*
8261 * search and check whether all aux codecs are already
8262 * registered with ALSA core or not. If found a node, store
8263 * the node and the index in a local array of struct for later
8264 * use.
8265 */
8266 for (i = 0; i < codec_aux_dev_cnt; i++) {
8267 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8268 "qcom,codec-aux-devs", i);
8269 if (unlikely(!aux_codec_of_node)) {
8270 /* we should not be here */
8271 dev_err(&pdev->dev,
8272 "%s: aux codec dev node is not present\n",
8273 __func__);
8274 ret = -EINVAL;
8275 goto err;
8276 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8277 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8278 /* AUX codec registered with ALSA core */
8279 aux_cdc_dev_info[codecs_found].of_node =
8280 aux_codec_of_node;
8281 aux_cdc_dev_info[codecs_found].index = i;
8282 codecs_found++;
8283 }
8284 }
8285
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8286 if (codecs_found < codec_max_aux_devs) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8287 dev_dbg(&pdev->dev,
8288 "%s: failed to find %d components. Found only %d\n",
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8289 __func__, codec_max_aux_devs, codecs_found);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8290 return -EPROBE_DEFER;
8291 }
8292 dev_info(&pdev->dev,
8293 "%s: found %d AUX codecs registered with ALSA core\n",
8294 __func__, codecs_found);
8295
8296 }
8297
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8298aux_dev_register:
8299 card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
8300 card->num_configs = wsa_max_devs + codec_max_aux_devs;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8301
8302 /* Alloc array of AUX devs struct */
8303 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8304 sizeof(struct snd_soc_aux_dev),
8305 GFP_KERNEL);
8306 if (!msm_aux_dev) {
8307 ret = -ENOMEM;
8308 goto err;
8309 }
8310
8311 /* Alloc array of codec conf struct */
8312 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8313 sizeof(struct snd_soc_codec_conf),
8314 GFP_KERNEL);
8315 if (!msm_codec_conf) {
8316 ret = -ENOMEM;
8317 goto err;
8318 }
8319
8320 for (i = 0; i < wsa_max_devs; i++) {
8321 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8322 GFP_KERNEL);
8323 if (!dev_name_str) {
8324 ret = -ENOMEM;
8325 goto err;
8326 }
8327
8328 ret = of_property_read_string_index(pdev->dev.of_node,
8329 "qcom,wsa-aux-dev-prefix",
8330 wsa881x_dev_info[i].index,
8331 auxdev_name_prefix);
8332 if (ret) {
8333 dev_err(&pdev->dev,
8334 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8335 __func__, ret);
8336 ret = -EINVAL;
8337 goto err;
8338 }
8339
8340 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8341 msm_aux_dev[i].name = dev_name_str;
8342 msm_aux_dev[i].codec_name = NULL;
8343 msm_aux_dev[i].codec_of_node =
8344 wsa881x_dev_info[i].of_node;
8345 msm_aux_dev[i].init = msm_wsa881x_init;
8346 msm_codec_conf[i].dev_name = NULL;
8347 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8348 msm_codec_conf[i].of_node =
8349 wsa881x_dev_info[i].of_node;
8350 }
8351
8352 for (i = 0; i < codec_aux_dev_cnt; i++) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8353 msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8354 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8355 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8356 aux_cdc_dev_info[i].of_node;
8357 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8358 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8359 msm_codec_conf[wsa_max_devs + i].name_prefix =
8360 NULL;
8361 msm_codec_conf[wsa_max_devs + i].of_node =
8362 aux_cdc_dev_info[i].of_node;
8363 }
8364
8365 card->codec_conf = msm_codec_conf;
8366 card->aux_dev = msm_aux_dev;
8367err:
8368 return ret;
8369}
8370
8371static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8372{
8373 int count;
8374 u32 mi2s_master_slave[MI2S_MAX];
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8375 u32 mi2s_ext_mclk[MI2S_MAX];
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8376 int ret;
8377
8378 for (count = 0; count < MI2S_MAX; count++) {
8379 mutex_init(&mi2s_intf_conf[count].lock);
8380 mi2s_intf_conf[count].ref_cnt = 0;
8381 }
8382
8383 ret = of_property_read_u32_array(pdev->dev.of_node,
8384 "qcom,msm-mi2s-master",
8385 mi2s_master_slave, MI2S_MAX);
8386 if (ret) {
8387 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8388 __func__);
8389 } else {
8390 for (count = 0; count < MI2S_MAX; count++) {
8391 mi2s_intf_conf[count].msm_is_mi2s_master =
8392 mi2s_master_slave[count];
8393 }
8394 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8395
8396 ret = of_property_read_u32_array(pdev->dev.of_node,
8397 "qcom,msm-mi2s-ext-mclk",
8398 mi2s_ext_mclk, MI2S_MAX);
8399 if (ret) {
8400 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
8401 __func__);
8402 } else {
8403 for (count = 0; count < MI2S_MAX; count++)
8404 mi2s_intf_conf[count].msm_is_ext_mclk =
8405 mi2s_ext_mclk[count];
8406 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8407}
8408
8409static void msm_i2s_auxpcm_deinit(void)
8410{
8411 int count;
8412
8413 for (count = 0; count < MI2S_MAX; count++) {
8414 mutex_destroy(&mi2s_intf_conf[count].lock);
8415 mi2s_intf_conf[count].ref_cnt = 0;
8416 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8417 mi2s_intf_conf[count].msm_is_ext_mclk = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8418 }
8419}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8420
8421static int sm6150_ssr_enable(struct device *dev, void *data)
8422{
8423 struct platform_device *pdev = to_platform_device(dev);
8424 struct snd_soc_card *card = platform_get_drvdata(pdev);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8425 struct msm_asoc_mach_data *pdata = NULL;
8426 struct snd_soc_component *component = NULL;
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8427 int ret = 0;
8428
8429 if (!card) {
8430 dev_err(dev, "%s: card is NULL\n", __func__);
8431 ret = -EINVAL;
8432 goto err;
8433 }
8434
8435 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8436 pdata = snd_soc_card_get_drvdata(card);
8437 if (!pdata->is_afe_config_done) {
8438 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8439 struct snd_soc_pcm_runtime *rtd;
8440
8441 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8442 if (!rtd) {
8443 dev_err(dev,
8444 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8445 __func__, be_dl_name);
8446 ret = -EINVAL;
8447 goto err;
8448 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8449 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
8450 if (!component) {
8451 dev_err(dev, "%s: component is NULL\n",
8452 __func__);
8453 ret = -EINVAL;
8454 goto err;
8455 }
8456 ret = msm_afe_set_config(component);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8457 if (ret)
8458 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8459 __func__, ret);
8460 else
8461 pdata->is_afe_config_done = true;
8462 }
8463 }
8464 snd_soc_card_change_online_state(card, 1);
8465 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8466
8467err:
8468 return ret;
8469}
8470
8471static void sm6150_ssr_disable(struct device *dev, void *data)
8472{
8473 struct platform_device *pdev = to_platform_device(dev);
8474 struct snd_soc_card *card = platform_get_drvdata(pdev);
8475 struct msm_asoc_mach_data *pdata;
8476
8477 if (!card) {
8478 dev_err(dev, "%s: card is NULL\n", __func__);
8479 return;
8480 }
8481
8482 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8483 snd_soc_card_change_online_state(card, 0);
8484
8485 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8486 pdata = snd_soc_card_get_drvdata(card);
8487 msm_afe_clear_config();
8488 pdata->is_afe_config_done = false;
8489 }
8490}
8491
8492static const struct snd_event_ops sm6150_ssr_ops = {
8493 .enable = sm6150_ssr_enable,
8494 .disable = sm6150_ssr_disable,
8495};
8496
8497static int msm_audio_ssr_compare(struct device *dev, void *data)
8498{
8499 struct device_node *node = data;
8500
8501 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8502 __func__, dev->of_node, node);
8503 return (dev->of_node && dev->of_node == node);
8504}
8505
8506static int msm_audio_ssr_register(struct device *dev)
8507{
8508 struct device_node *np = dev->of_node;
8509 struct snd_event_clients *ssr_clients = NULL;
8510 struct device_node *node;
8511 int ret;
8512 int i;
8513
8514 for (i = 0; ; i++) {
8515 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8516 if (!node)
8517 break;
8518 snd_event_mstr_add_client(&ssr_clients,
8519 msm_audio_ssr_compare, node);
8520 }
8521
8522 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8523 ssr_clients, NULL);
8524 if (!ret)
8525 snd_event_notify(dev, SND_EVENT_UP);
8526
8527 return ret;
8528}
8529
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8530static int msm_asoc_machine_probe(struct platform_device *pdev)
8531{
8532 struct snd_soc_card *card;
8533 struct msm_asoc_mach_data *pdata;
8534 const char *mbhc_audio_jack_type = NULL;
8535 int ret;
8536
8537 if (!pdev->dev.of_node) {
8538 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8539 return -EINVAL;
8540 }
8541
8542 pdata = devm_kzalloc(&pdev->dev,
8543 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8544 if (!pdata)
8545 return -ENOMEM;
8546
8547 card = populate_snd_card_dailinks(&pdev->dev);
8548 if (!card) {
8549 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8550 ret = -EINVAL;
8551 goto err;
8552 }
8553 card->dev = &pdev->dev;
8554 platform_set_drvdata(pdev, card);
8555 snd_soc_card_set_drvdata(card, pdata);
8556
8557 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8558 if (ret) {
8559 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8560 ret);
8561 goto err;
8562 }
8563
8564 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8565 if (ret) {
8566 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8567 ret);
8568 goto err;
8569 }
8570
8571 ret = msm_populate_dai_link_component_of_node(card);
8572 if (ret) {
8573 ret = -EPROBE_DEFER;
8574 goto err;
8575 }
8576
8577 ret = msm_init_aux_dev(pdev, card);
8578 if (ret)
8579 goto err;
8580
8581 ret = devm_snd_soc_register_card(&pdev->dev, card);
8582 if (ret == -EPROBE_DEFER) {
8583 if (codec_reg_done)
8584 ret = -EINVAL;
8585 goto err;
8586 } else if (ret) {
8587 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8588 ret);
8589 goto err;
8590 }
8591 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8592
8593 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8594 "qcom,hph-en1-gpio", 0);
8595 if (!pdata->hph_en1_gpio_p) {
8596 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8597 "qcom,hph-en1-gpio",
8598 pdev->dev.of_node->full_name);
8599 }
8600
8601 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8602 "qcom,hph-en0-gpio", 0);
8603 if (!pdata->hph_en0_gpio_p) {
8604 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8605 "qcom,hph-en0-gpio",
8606 pdev->dev.of_node->full_name);
8607 }
8608
8609 ret = of_property_read_string(pdev->dev.of_node,
8610 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8611 if (ret) {
8612 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8613 "qcom,mbhc-audio-jack-type",
8614 pdev->dev.of_node->full_name);
8615 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8616 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8617 } else {
8618 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8619 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8620 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8621 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8622 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8623 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8624 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8625 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8626 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8627 } else {
8628 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8629 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8630 }
8631 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8632
8633 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8634 "qcom,pri-mi2s-gpios", 0);
8635 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8636 "qcom,sec-mi2s-gpios", 0);
8637 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8638 "qcom,tert-mi2s-gpios", 0);
8639 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8640 "qcom,quat-mi2s-gpios", 0);
8641 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8642 "qcom,quin-mi2s-gpios", 0);
8643
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8644 /*
8645 * Parse US-Euro gpio info from DT. Report no error if us-euro
8646 * entry is not found in DT file as some targets do not support
8647 * US-Euro detection
8648 */
8649 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8650 "qcom,us-euro-gpios", 0);
8651 if (!pdata->us_euro_gpio_p) {
8652 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8653 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8654 } else {
8655 dev_dbg(&pdev->dev, "%s detected\n",
8656 "qcom,us-euro-gpios");
8657 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8658 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]8659
8660 if (wcd_mbhc_cfg.enable_usbc_analog) {
8661 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8662
8663 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8664 "fsa4480-i2c-handle", 0);
8665 if (!pdata->fsa_handle)
8666 dev_err(&pdev->dev,
8667 "property %s not detected in node %s\n",
8668 "fsa4480-i2c-handle",
8669 pdev->dev.of_node->full_name);
8670 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8671
8672 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8673 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8674 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8675 "qcom,cdc-dmic01-gpios",
8676 0);
8677 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8678 "qcom,cdc-dmic23-gpios",
8679 0);
8680 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8681
8682 ret = msm_audio_ssr_register(&pdev->dev);
8683 if (ret)
8684 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8685 __func__, ret);
8686
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8687err:
8688 return ret;
8689}
8690
8691static int msm_asoc_machine_remove(struct platform_device *pdev)
8692{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8693 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8694 msm_i2s_auxpcm_deinit();
8695
8696 return 0;
8697}
8698
8699static struct platform_driver sm6150_asoc_machine_driver = {
8700 .driver = {
8701 .name = DRV_NAME,
8702 .owner = THIS_MODULE,
8703 .pm = &snd_soc_pm_ops,
8704 .of_match_table = sm6150_asoc_machine_of_match,
8705 },
8706 .probe = msm_asoc_machine_probe,
8707 .remove = msm_asoc_machine_remove,
8708};
8709module_platform_driver(sm6150_asoc_machine_driver);
8710
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8711MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8712MODULE_LICENSE("GPL v2");
8713MODULE_ALIAS("platform:" DRV_NAME);
8714MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);