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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 5b2d30fa263046a00116145e55a48773edc5725d / . / asoc / sm6150.c
blob: 96533faa9528b487dffec52a90e5055cd6f7c815 [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]2/*
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]17#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]24#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]25#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Meng Wang11a25cf2018-10-31 14:11:26 +0800[diff] [blame]30#include <asoc/msm-cdc-pinctrl.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]31#include "codecs/wcd934x/wcd934x.h"
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]32#include "codecs/wcd9335.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]33#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]34#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]35#include "codecs/wsa881x.h"
36#include "codecs/bolero/bolero-cdc.h"
37#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]38#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]39#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40
41#define DRV_NAME "sm6150-asoc-snd"
42
43#define __CHIPSET__ "SM6150 "
44#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
45
46#define SAMPLING_RATE_8KHZ 8000
47#define SAMPLING_RATE_11P025KHZ 11025
48#define SAMPLING_RATE_16KHZ 16000
49#define SAMPLING_RATE_22P05KHZ 22050
50#define SAMPLING_RATE_32KHZ 32000
51#define SAMPLING_RATE_44P1KHZ 44100
52#define SAMPLING_RATE_48KHZ 48000
53#define SAMPLING_RATE_88P2KHZ 88200
54#define SAMPLING_RATE_96KHZ 96000
55#define SAMPLING_RATE_176P4KHZ 176400
56#define SAMPLING_RATE_192KHZ 192000
57#define SAMPLING_RATE_352P8KHZ 352800
58#define SAMPLING_RATE_384KHZ 384000
59
60#define WCD9XXX_MBHC_DEF_BUTTONS 8
61#define WCD9XXX_MBHC_DEF_RLOADS 5
62#define CODEC_EXT_CLK_RATE 9600000
63#define ADSP_STATE_READY_TIMEOUT_MS 3000
64#define DEV_NAME_STR_LEN 32
65
66#define WSA8810_NAME_1 "wsa881x.20170211"
67#define WSA8810_NAME_2 "wsa881x.20170212"
68#define WCN_CDC_SLIM_RX_CH_MAX 2
69#define WCN_CDC_SLIM_TX_CH_MAX 3
70#define TDM_CHANNEL_MAX 8
71
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
74#define MSM_HIFI_ON 1
75
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]76#define SM6150_SOC_VERSION_1_0 0x00010000
77#define SM6150_SOC_MSM_ID 0x163
78
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]79enum {
80 SLIM_RX_0 = 0,
81 SLIM_RX_1,
82 SLIM_RX_2,
83 SLIM_RX_3,
84 SLIM_RX_4,
85 SLIM_RX_5,
86 SLIM_RX_6,
87 SLIM_RX_7,
88 SLIM_RX_MAX,
89};
90enum {
91 SLIM_TX_0 = 0,
92 SLIM_TX_1,
93 SLIM_TX_2,
94 SLIM_TX_3,
95 SLIM_TX_4,
96 SLIM_TX_5,
97 SLIM_TX_6,
98 SLIM_TX_7,
99 SLIM_TX_8,
100 SLIM_TX_MAX,
101};
102
103enum {
104 PRIM_MI2S = 0,
105 SEC_MI2S,
106 TERT_MI2S,
107 QUAT_MI2S,
108 QUIN_MI2S,
109 MI2S_MAX,
110};
111
112enum {
113 PRIM_AUX_PCM = 0,
114 SEC_AUX_PCM,
115 TERT_AUX_PCM,
116 QUAT_AUX_PCM,
117 QUIN_AUX_PCM,
118 AUX_PCM_MAX,
119};
120
121enum {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]122 TDM_0 = 0,
123 TDM_1,
124 TDM_2,
125 TDM_3,
126 TDM_4,
127 TDM_5,
128 TDM_6,
129 TDM_7,
130 TDM_PORT_MAX,
131};
132
133enum {
134 TDM_PRI = 0,
135 TDM_SEC,
136 TDM_TERT,
137 TDM_QUAT,
138 TDM_QUIN,
139 TDM_INTERFACE_MAX,
140};
141
142struct tdm_port {
143 u32 mode;
144 u32 channel;
145};
146
147enum {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]148 WSA_CDC_DMA_RX_0 = 0,
149 WSA_CDC_DMA_RX_1,
150 RX_CDC_DMA_RX_0,
151 RX_CDC_DMA_RX_1,
152 RX_CDC_DMA_RX_2,
153 RX_CDC_DMA_RX_3,
154 RX_CDC_DMA_RX_5,
155 CDC_DMA_RX_MAX,
156};
157
158enum {
159 WSA_CDC_DMA_TX_0 = 0,
160 WSA_CDC_DMA_TX_1,
161 WSA_CDC_DMA_TX_2,
162 TX_CDC_DMA_TX_0,
163 TX_CDC_DMA_TX_3,
164 TX_CDC_DMA_TX_4,
165 CDC_DMA_TX_MAX,
166};
167
168struct mi2s_conf {
169 struct mutex lock;
170 u32 ref_cnt;
171 u32 msm_is_mi2s_master;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]172 u32 msm_is_ext_mclk;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]173};
174
175static u32 mi2s_ebit_clk[MI2S_MAX] = {
176 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
177 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
178 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
179 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
180 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
181};
182
183struct dev_config {
184 u32 sample_rate;
185 u32 bit_format;
186 u32 channels;
187};
188
189enum {
190 DP_RX_IDX = 0,
191 EXT_DISP_RX_IDX_MAX,
192};
193
194struct msm_wsa881x_dev_info {
195 struct device_node *of_node;
196 u32 index;
197};
198
199struct aux_codec_dev_info {
200 struct device_node *of_node;
201 u32 index;
202};
203
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]204struct msm_asoc_mach_data {
205 struct snd_info_entry *codec_root;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]206 int usbc_en2_gpio; /* used by gpio driver API */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]207 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]208 int hph_en1_gpio;
209 int hph_en0_gpio;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]210 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
211 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
212 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
213 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
214 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
215 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]216 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]217 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]218};
219
220struct msm_asoc_wcd93xx_codec {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]221 void* (*get_afe_config_fn)(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]222 enum afe_config_type config_type);
223};
224
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]225static struct snd_soc_card snd_soc_card_sm6150_msm;
226
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]227/* TDM default config */
228static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
229 { /* PRI TDM */
230 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
231 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
232 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
233 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
234 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
235 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
236 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
237 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
238 },
239 { /* SEC TDM */
240 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
241 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
242 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
248 },
249 { /* TERT TDM */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
258 },
259 { /* QUAT TDM */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
268 },
269 { /* QUIN TDM */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
278 }
279
280};
281
282/* TDM default config */
283static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
284 { /* PRI TDM */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
293 },
294 { /* SEC TDM */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
303 },
304 { /* TERT TDM */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
313 },
314 { /* QUAT TDM */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
323 },
324 { /* QUIN TDM */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
333 }
334};
335
336
337/* Default configuration of slimbus channels */
338static struct dev_config slim_rx_cfg[] = {
339 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
340 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
341 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
342 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
343 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
344 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
345 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
346 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
347};
348
349static struct dev_config slim_tx_cfg[] = {
350 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
351 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
352 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
359};
360
361/* Default configuration of Codec DMA Interface Tx */
362static struct dev_config cdc_dma_rx_cfg[] = {
363 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
364 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
365 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
366 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
367 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
368 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
369 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
370};
371
372/* Default configuration of Codec DMA Interface Rx */
373static struct dev_config cdc_dma_tx_cfg[] = {
374 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380};
381
382/* Default configuration of external display BE */
383static struct dev_config ext_disp_rx_cfg[] = {
384 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385};
386
387static struct dev_config usb_rx_cfg = {
388 .sample_rate = SAMPLING_RATE_48KHZ,
389 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
390 .channels = 2,
391};
392
393static struct dev_config usb_tx_cfg = {
394 .sample_rate = SAMPLING_RATE_48KHZ,
395 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
396 .channels = 1,
397};
398
399static struct dev_config proxy_rx_cfg = {
400 .sample_rate = SAMPLING_RATE_48KHZ,
401 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
402 .channels = 2,
403};
404
405/* Default configuration of MI2S channels */
406static struct dev_config mi2s_rx_cfg[] = {
407 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
408 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
409 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
410 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
411 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
412};
413
414static struct dev_config mi2s_tx_cfg[] = {
415 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
416 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
417 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
418 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
419 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
420};
421
422static struct dev_config aux_pcm_rx_cfg[] = {
423 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
424 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
425 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
426 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
427 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
428};
429
430static struct dev_config aux_pcm_tx_cfg[] = {
431 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
436};
437static int msm_vi_feed_tx_ch = 2;
438static const char *const slim_rx_ch_text[] = {"One", "Two"};
439static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
440 "Five", "Six", "Seven",
441 "Eight"};
442static const char *const vi_feed_ch_text[] = {"One", "Two"};
443static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
444 "S32_LE"};
445static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
446 "S24_3LE"};
447static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
448 "KHZ_32", "KHZ_44P1", "KHZ_48",
449 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
450 "KHZ_192", "KHZ_352P8", "KHZ_384"};
451static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
452 "KHZ_44P1", "KHZ_48",
453 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]454static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
455 "KHZ_44P1", "KHZ_48",
456 "KHZ_88P2", "KHZ_96"};
457static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
458 "KHZ_44P1", "KHZ_48",
459 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]460static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
461 "Five", "Six", "Seven",
462 "Eight"};
463static char const *ch_text[] = {"Two", "Three", "Four", "Five",
464 "Six", "Seven", "Eight"};
465static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
466 "KHZ_16", "KHZ_22P05",
467 "KHZ_32", "KHZ_44P1", "KHZ_48",
468 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
469 "KHZ_192", "KHZ_352P8", "KHZ_384"};
470static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
471 "KHZ_192", "KHZ_32", "KHZ_44P1",
472 "KHZ_88P2", "KHZ_176P4" };
473static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
474 "Five", "Six", "Seven", "Eight"};
475static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
476static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
477 "KHZ_48", "KHZ_176P4",
478 "KHZ_352P8"};
479static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
480static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
481 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
482 "KHZ_48", "KHZ_96", "KHZ_192"};
483static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
484 "Five", "Six", "Seven",
485 "Eight"};
486static const char *const hifi_text[] = {"Off", "On"};
487static const char *const qos_text[] = {"Disable", "Enable"};
488
489static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
490static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
491 "Five", "Six", "Seven",
492 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]493static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
494 "KHZ_16", "KHZ_22P05",
495 "KHZ_32", "KHZ_44P1", "KHZ_48",
496 "KHZ_88P2", "KHZ_96",
497 "KHZ_176P4", "KHZ_192",
498 "KHZ_352P8", "KHZ_384"};
499
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]500
501static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
524static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]525static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
526static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]527static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
530 ext_disp_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
535static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
559static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
560static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
568static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
569static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
570static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
571static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
572static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
588static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
589static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
590static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
598 cdc_dma_sample_rate_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
600 cdc_dma_sample_rate_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
602 cdc_dma_sample_rate_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
604 cdc_dma_sample_rate_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
606 cdc_dma_sample_rate_text);
607static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
608 cdc_dma_sample_rate_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
610 cdc_dma_sample_rate_text);
611static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
622 cdc_dma_sample_rate_text);
623
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]624static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]625static bool codec_reg_done;
626static struct snd_soc_aux_dev *msm_aux_dev;
627static struct snd_soc_codec_conf *msm_codec_conf;
628static struct msm_asoc_wcd93xx_codec msm_codec_fn;
629
630static int dmic_0_1_gpio_cnt;
631static int dmic_2_3_gpio_cnt;
632
633static void *def_wcd_mbhc_cal(void);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]634static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]635 int enable, bool dapm);
636static int msm_wsa881x_init(struct snd_soc_component *component);
637static int msm_aux_codec_init(struct snd_soc_component *component);
638
639/*
640 * Need to report LINEIN
641 * if R/L channel impedance is larger than 5K ohm
642 */
643static struct wcd_mbhc_config wcd_mbhc_cfg = {
644 .read_fw_bin = false,
645 .calibration = NULL,
646 .detect_extn_cable = true,
647 .mono_stero_detection = false,
648 .swap_gnd_mic = NULL,
649 .hs_ext_micbias = true,
650 .key_code[0] = KEY_MEDIA,
651 .key_code[1] = KEY_VOICECOMMAND,
652 .key_code[2] = KEY_VOLUMEUP,
653 .key_code[3] = KEY_VOLUMEDOWN,
654 .key_code[4] = 0,
655 .key_code[5] = 0,
656 .key_code[6] = 0,
657 .key_code[7] = 0,
658 .linein_th = 5000,
659 .moisture_en = true,
660 .mbhc_micbias = MIC_BIAS_2,
661 .anc_micbias = MIC_BIAS_2,
662 .enable_anc_mic_detect = false,
663};
664
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]665static struct snd_soc_dapm_route wcd_audio_paths[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]666 {"MIC BIAS1", NULL, "MCLK TX"},
667 {"MIC BIAS2", NULL, "MCLK TX"},
668 {"MIC BIAS3", NULL, "MCLK TX"},
669 {"MIC BIAS4", NULL, "MCLK TX"},
670};
671
672static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
673 {
674 AFE_API_VERSION_I2S_CONFIG,
675 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
676 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
677 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
678 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
679 0,
680 },
681 {
682 AFE_API_VERSION_I2S_CONFIG,
683 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
684 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
685 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
686 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
687 0,
688 },
689 {
690 AFE_API_VERSION_I2S_CONFIG,
691 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
692 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
693 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
694 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
695 0,
696 },
697 {
698 AFE_API_VERSION_I2S_CONFIG,
699 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
700 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
701 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
702 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
703 0,
704 },
705 {
706 AFE_API_VERSION_I2S_CONFIG,
707 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
708 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
709 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
710 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
711 0,
712 }
713
714};
715
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]716static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
717 {
718 AFE_API_VERSION_I2S_CONFIG,
719 Q6AFE_LPASS_CLK_ID_MCLK_3,
720 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
721 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
722 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
723 0,
724 },
725 {
726 AFE_API_VERSION_I2S_CONFIG,
727 Q6AFE_LPASS_CLK_ID_MCLK_2,
728 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
729 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
730 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
731 0,
732 },
733 {
734 AFE_API_VERSION_I2S_CONFIG,
735 Q6AFE_LPASS_CLK_ID_MCLK_1,
736 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
737 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
738 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
739 0,
740 },
741 {
742 AFE_API_VERSION_I2S_CONFIG,
743 Q6AFE_LPASS_CLK_ID_MCLK_1,
744 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
745 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
746 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
747 0,
748 },
749 {
750 AFE_API_VERSION_I2S_CONFIG,
751 Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
752 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
753 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
754 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
755 0,
756 }
757};
758
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]759static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
760
761static int slim_get_sample_rate_val(int sample_rate)
762{
763 int sample_rate_val = 0;
764
765 switch (sample_rate) {
766 case SAMPLING_RATE_8KHZ:
767 sample_rate_val = 0;
768 break;
769 case SAMPLING_RATE_16KHZ:
770 sample_rate_val = 1;
771 break;
772 case SAMPLING_RATE_32KHZ:
773 sample_rate_val = 2;
774 break;
775 case SAMPLING_RATE_44P1KHZ:
776 sample_rate_val = 3;
777 break;
778 case SAMPLING_RATE_48KHZ:
779 sample_rate_val = 4;
780 break;
781 case SAMPLING_RATE_88P2KHZ:
782 sample_rate_val = 5;
783 break;
784 case SAMPLING_RATE_96KHZ:
785 sample_rate_val = 6;
786 break;
787 case SAMPLING_RATE_176P4KHZ:
788 sample_rate_val = 7;
789 break;
790 case SAMPLING_RATE_192KHZ:
791 sample_rate_val = 8;
792 break;
793 case SAMPLING_RATE_352P8KHZ:
794 sample_rate_val = 9;
795 break;
796 case SAMPLING_RATE_384KHZ:
797 sample_rate_val = 10;
798 break;
799 default:
800 sample_rate_val = 4;
801 break;
802 }
803 return sample_rate_val;
804}
805
806static int slim_get_sample_rate(int value)
807{
808 int sample_rate = 0;
809
810 switch (value) {
811 case 0:
812 sample_rate = SAMPLING_RATE_8KHZ;
813 break;
814 case 1:
815 sample_rate = SAMPLING_RATE_16KHZ;
816 break;
817 case 2:
818 sample_rate = SAMPLING_RATE_32KHZ;
819 break;
820 case 3:
821 sample_rate = SAMPLING_RATE_44P1KHZ;
822 break;
823 case 4:
824 sample_rate = SAMPLING_RATE_48KHZ;
825 break;
826 case 5:
827 sample_rate = SAMPLING_RATE_88P2KHZ;
828 break;
829 case 6:
830 sample_rate = SAMPLING_RATE_96KHZ;
831 break;
832 case 7:
833 sample_rate = SAMPLING_RATE_176P4KHZ;
834 break;
835 case 8:
836 sample_rate = SAMPLING_RATE_192KHZ;
837 break;
838 case 9:
839 sample_rate = SAMPLING_RATE_352P8KHZ;
840 break;
841 case 10:
842 sample_rate = SAMPLING_RATE_384KHZ;
843 break;
844 default:
845 sample_rate = SAMPLING_RATE_48KHZ;
846 break;
847 }
848 return sample_rate;
849}
850
851static int slim_get_bit_format_val(int bit_format)
852{
853 int val = 0;
854
855 switch (bit_format) {
856 case SNDRV_PCM_FORMAT_S32_LE:
857 val = 3;
858 break;
859 case SNDRV_PCM_FORMAT_S24_3LE:
860 val = 2;
861 break;
862 case SNDRV_PCM_FORMAT_S24_LE:
863 val = 1;
864 break;
865 case SNDRV_PCM_FORMAT_S16_LE:
866 default:
867 val = 0;
868 break;
869 }
870 return val;
871}
872
873static int slim_get_bit_format(int val)
874{
875 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
876
877 switch (val) {
878 case 0:
879 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
880 break;
881 case 1:
882 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
883 break;
884 case 2:
885 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
886 break;
887 case 3:
888 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
889 break;
890 default:
891 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
892 break;
893 }
894 return bit_fmt;
895}
896
897static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
898{
899 int port_id = 0;
900
901 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
902 port_id = SLIM_RX_0;
903 } else if (strnstr(kcontrol->id.name,
904 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
905 port_id = SLIM_RX_2;
906 } else if (strnstr(kcontrol->id.name,
907 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
908 port_id = SLIM_RX_5;
909 } else if (strnstr(kcontrol->id.name,
910 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
911 port_id = SLIM_RX_6;
912 } else if (strnstr(kcontrol->id.name,
913 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
914 port_id = SLIM_TX_0;
915 } else if (strnstr(kcontrol->id.name,
916 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
917 port_id = SLIM_TX_1;
918 } else {
919 pr_err("%s: unsupported channel: %s\n",
920 __func__, kcontrol->id.name);
921 return -EINVAL;
922 }
923
924 return port_id;
925}
926
927static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
928 struct snd_ctl_elem_value *ucontrol)
929{
930 int ch_num = slim_get_port_idx(kcontrol);
931
932 if (ch_num < 0)
933 return ch_num;
934
935 ucontrol->value.enumerated.item[0] =
936 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
937
938 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
939 ch_num, slim_rx_cfg[ch_num].sample_rate,
940 ucontrol->value.enumerated.item[0]);
941
942 return 0;
943}
944
945static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
946 struct snd_ctl_elem_value *ucontrol)
947{
948 int ch_num = slim_get_port_idx(kcontrol);
949
950 if (ch_num < 0)
951 return ch_num;
952
953 slim_rx_cfg[ch_num].sample_rate =
954 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
955
956 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
957 ch_num, slim_rx_cfg[ch_num].sample_rate,
958 ucontrol->value.enumerated.item[0]);
959
960 return 0;
961}
962
963static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
964 struct snd_ctl_elem_value *ucontrol)
965{
966 int ch_num = slim_get_port_idx(kcontrol);
967
968 if (ch_num < 0)
969 return ch_num;
970
971 ucontrol->value.enumerated.item[0] =
972 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
973
974 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
975 ch_num, slim_tx_cfg[ch_num].sample_rate,
976 ucontrol->value.enumerated.item[0]);
977
978 return 0;
979}
980
981static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
982 struct snd_ctl_elem_value *ucontrol)
983{
984 int sample_rate = 0;
985 int ch_num = slim_get_port_idx(kcontrol);
986
987 if (ch_num < 0)
988 return ch_num;
989
990 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
991 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
992 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
993 __func__, sample_rate);
994 return -EINVAL;
995 }
996 slim_tx_cfg[ch_num].sample_rate = sample_rate;
997
998 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
999 ch_num, slim_tx_cfg[ch_num].sample_rate,
1000 ucontrol->value.enumerated.item[0]);
1001
1002 return 0;
1003}
1004
1005static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
1006 struct snd_ctl_elem_value *ucontrol)
1007{
1008 int ch_num = slim_get_port_idx(kcontrol);
1009
1010 if (ch_num < 0)
1011 return ch_num;
1012
1013 ucontrol->value.enumerated.item[0] =
1014 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
1015
1016 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1017 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1018 ucontrol->value.enumerated.item[0]);
1019
1020 return 0;
1021}
1022
1023static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1024 struct snd_ctl_elem_value *ucontrol)
1025{
1026 int ch_num = slim_get_port_idx(kcontrol);
1027
1028 if (ch_num < 0)
1029 return ch_num;
1030
1031 slim_rx_cfg[ch_num].bit_format =
1032 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1033
1034 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1035 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1036 ucontrol->value.enumerated.item[0]);
1037
1038 return 0;
1039}
1040
1041static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1042 struct snd_ctl_elem_value *ucontrol)
1043{
1044 int ch_num = slim_get_port_idx(kcontrol);
1045
1046 if (ch_num < 0)
1047 return ch_num;
1048
1049 ucontrol->value.enumerated.item[0] =
1050 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1051
1052 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1053 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1054 ucontrol->value.enumerated.item[0]);
1055
1056 return 0;
1057}
1058
1059static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1060 struct snd_ctl_elem_value *ucontrol)
1061{
1062 int ch_num = slim_get_port_idx(kcontrol);
1063
1064 if (ch_num < 0)
1065 return ch_num;
1066
1067 slim_tx_cfg[ch_num].bit_format =
1068 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1069
1070 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1071 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1072 ucontrol->value.enumerated.item[0]);
1073
1074 return 0;
1075}
1076
1077static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1079{
1080 int ch_num = slim_get_port_idx(kcontrol);
1081
1082 if (ch_num < 0)
1083 return ch_num;
1084
1085 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1086 ch_num, slim_rx_cfg[ch_num].channels);
1087 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1088
1089 return 0;
1090}
1091
1092static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1093 struct snd_ctl_elem_value *ucontrol)
1094{
1095 int ch_num = slim_get_port_idx(kcontrol);
1096
1097 if (ch_num < 0)
1098 return ch_num;
1099
1100 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1101 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1102 ch_num, slim_rx_cfg[ch_num].channels);
1103
1104 return 1;
1105}
1106
1107static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1108 struct snd_ctl_elem_value *ucontrol)
1109{
1110 int ch_num = slim_get_port_idx(kcontrol);
1111
1112 if (ch_num < 0)
1113 return ch_num;
1114
1115 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1116 ch_num, slim_tx_cfg[ch_num].channels);
1117 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1118
1119 return 0;
1120}
1121
1122static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1123 struct snd_ctl_elem_value *ucontrol)
1124{
1125 int ch_num = slim_get_port_idx(kcontrol);
1126
1127 if (ch_num < 0)
1128 return ch_num;
1129
1130 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1131 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1132 ch_num, slim_tx_cfg[ch_num].channels);
1133
1134 return 1;
1135}
1136
1137static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1138 struct snd_ctl_elem_value *ucontrol)
1139{
1140 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1141 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1142 ucontrol->value.integer.value[0]);
1143 return 0;
1144}
1145
1146static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1147 struct snd_ctl_elem_value *ucontrol)
1148{
1149 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1150
1151 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1152 return 1;
1153}
1154
1155static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 /*
1159 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1160 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1161 * value.
1162 */
1163 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1164 case SAMPLING_RATE_96KHZ:
1165 ucontrol->value.integer.value[0] = 5;
1166 break;
1167 case SAMPLING_RATE_88P2KHZ:
1168 ucontrol->value.integer.value[0] = 4;
1169 break;
1170 case SAMPLING_RATE_48KHZ:
1171 ucontrol->value.integer.value[0] = 3;
1172 break;
1173 case SAMPLING_RATE_44P1KHZ:
1174 ucontrol->value.integer.value[0] = 2;
1175 break;
1176 case SAMPLING_RATE_16KHZ:
1177 ucontrol->value.integer.value[0] = 1;
1178 break;
1179 case SAMPLING_RATE_8KHZ:
1180 default:
1181 ucontrol->value.integer.value[0] = 0;
1182 break;
1183 }
1184 pr_debug("%s: sample rate = %d\n", __func__,
1185 slim_rx_cfg[SLIM_RX_7].sample_rate);
1186
1187 return 0;
1188}
1189
1190static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1191 struct snd_ctl_elem_value *ucontrol)
1192{
1193 switch (ucontrol->value.integer.value[0]) {
1194 case 1:
1195 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1196 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1197 break;
1198 case 2:
1199 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1200 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1201 break;
1202 case 3:
1203 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1204 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1205 break;
1206 case 4:
1207 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1208 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1209 break;
1210 case 5:
1211 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1212 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1213 break;
1214 case 0:
1215 default:
1216 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1217 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1218 break;
1219 }
1220 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1221 __func__,
1222 slim_rx_cfg[SLIM_RX_7].sample_rate,
1223 slim_tx_cfg[SLIM_TX_7].sample_rate,
1224 ucontrol->value.enumerated.item[0]);
1225
1226 return 0;
1227}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1228static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1229 struct snd_ctl_elem_value *ucontrol)
1230{
1231 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1232 case SAMPLING_RATE_96KHZ:
1233 ucontrol->value.integer.value[0] = 5;
1234 break;
1235 case SAMPLING_RATE_88P2KHZ:
1236 ucontrol->value.integer.value[0] = 4;
1237 break;
1238 case SAMPLING_RATE_48KHZ:
1239 ucontrol->value.integer.value[0] = 3;
1240 break;
1241 case SAMPLING_RATE_44P1KHZ:
1242 ucontrol->value.integer.value[0] = 2;
1243 break;
1244 case SAMPLING_RATE_16KHZ:
1245 ucontrol->value.integer.value[0] = 1;
1246 break;
1247 case SAMPLING_RATE_8KHZ:
1248 default:
1249 ucontrol->value.integer.value[0] = 0;
1250 break;
1251 }
1252 pr_debug("%s: sample rate rx = %d", __func__,
1253 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1254
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1255 return 0;
1256}
1257
1258static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1259 struct snd_ctl_elem_value *ucontrol)
1260{
1261 switch (ucontrol->value.integer.value[0]) {
1262 case 1:
1263 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1264 break;
1265 case 2:
1266 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1267 break;
1268 case 3:
1269 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1270 break;
1271 case 4:
1272 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1273 break;
1274 case 5:
1275 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1276 break;
1277 case 0:
1278 default:
1279 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1280 break;
1281 }
1282 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1283 __func__,
1284 slim_rx_cfg[SLIM_RX_7].sample_rate,
1285 ucontrol->value.enumerated.item[0]);
1286
1287 return 0;
1288}
1289
1290static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1291 struct snd_ctl_elem_value *ucontrol)
1292{
1293 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1294 case SAMPLING_RATE_96KHZ:
1295 ucontrol->value.integer.value[0] = 5;
1296 break;
1297 case SAMPLING_RATE_88P2KHZ:
1298 ucontrol->value.integer.value[0] = 4;
1299 break;
1300 case SAMPLING_RATE_48KHZ:
1301 ucontrol->value.integer.value[0] = 3;
1302 break;
1303 case SAMPLING_RATE_44P1KHZ:
1304 ucontrol->value.integer.value[0] = 2;
1305 break;
1306 case SAMPLING_RATE_16KHZ:
1307 ucontrol->value.integer.value[0] = 1;
1308 break;
1309 case SAMPLING_RATE_8KHZ:
1310 default:
1311 ucontrol->value.integer.value[0] = 0;
1312 break;
1313 }
1314 pr_debug("%s: sample rate tx = %d", __func__,
1315 slim_tx_cfg[SLIM_TX_7].sample_rate);
1316
1317 return 0;
1318}
1319
1320static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_value *ucontrol)
1322{
1323 switch (ucontrol->value.integer.value[0]) {
1324 case 1:
1325 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1326 break;
1327 case 2:
1328 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1329 break;
1330 case 3:
1331 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1332 break;
1333 case 4:
1334 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1335 break;
1336 case 5:
1337 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1338 break;
1339 case 0:
1340 default:
1341 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1342 break;
1343 }
1344 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1345 __func__,
1346 slim_tx_cfg[SLIM_TX_7].sample_rate,
1347 ucontrol->value.enumerated.item[0]);
1348
1349 return 0;
1350}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1351static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1352{
1353 int idx = 0;
1354
1355 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1356 sizeof("WSA_CDC_DMA_RX_0")))
1357 idx = WSA_CDC_DMA_RX_0;
1358 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1359 sizeof("WSA_CDC_DMA_RX_0")))
1360 idx = WSA_CDC_DMA_RX_1;
1361 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1362 sizeof("RX_CDC_DMA_RX_0")))
1363 idx = RX_CDC_DMA_RX_0;
1364 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1365 sizeof("RX_CDC_DMA_RX_1")))
1366 idx = RX_CDC_DMA_RX_1;
1367 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1368 sizeof("RX_CDC_DMA_RX_2")))
1369 idx = RX_CDC_DMA_RX_2;
1370 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1371 sizeof("RX_CDC_DMA_RX_3")))
1372 idx = RX_CDC_DMA_RX_3;
1373 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1374 sizeof("RX_CDC_DMA_RX_5")))
1375 idx = RX_CDC_DMA_RX_5;
1376 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1377 sizeof("WSA_CDC_DMA_TX_0")))
1378 idx = WSA_CDC_DMA_TX_0;
1379 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1380 sizeof("WSA_CDC_DMA_TX_1")))
1381 idx = WSA_CDC_DMA_TX_1;
1382 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1383 sizeof("WSA_CDC_DMA_TX_2")))
1384 idx = WSA_CDC_DMA_TX_2;
1385 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1386 sizeof("TX_CDC_DMA_TX_0")))
1387 idx = TX_CDC_DMA_TX_0;
1388 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1389 sizeof("TX_CDC_DMA_TX_3")))
1390 idx = TX_CDC_DMA_TX_3;
1391 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1392 sizeof("TX_CDC_DMA_TX_4")))
1393 idx = TX_CDC_DMA_TX_4;
1394 else {
1395 pr_err("%s: unsupported channel: %s\n",
1396 __func__, kcontrol->id.name);
1397 return -EINVAL;
1398 }
1399
1400 return idx;
1401}
1402
1403static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1404 struct snd_ctl_elem_value *ucontrol)
1405{
1406 int ch_num = cdc_dma_get_port_idx(kcontrol);
1407
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1408 if (ch_num < 0) {
1409 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1410 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1411 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1412
1413 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1414 cdc_dma_rx_cfg[ch_num].channels - 1);
1415 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1416 return 0;
1417}
1418
1419static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1420 struct snd_ctl_elem_value *ucontrol)
1421{
1422 int ch_num = cdc_dma_get_port_idx(kcontrol);
1423
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1424 if (ch_num < 0) {
1425 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1426 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1427 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1428
1429 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1430
1431 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1432 cdc_dma_rx_cfg[ch_num].channels);
1433 return 1;
1434}
1435
1436static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1437 struct snd_ctl_elem_value *ucontrol)
1438{
1439 int ch_num = cdc_dma_get_port_idx(kcontrol);
1440
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1441 if (ch_num < 0) {
1442 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1443 return ch_num;
1444 }
1445
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1446 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1447 case SNDRV_PCM_FORMAT_S32_LE:
1448 ucontrol->value.integer.value[0] = 3;
1449 break;
1450 case SNDRV_PCM_FORMAT_S24_3LE:
1451 ucontrol->value.integer.value[0] = 2;
1452 break;
1453 case SNDRV_PCM_FORMAT_S24_LE:
1454 ucontrol->value.integer.value[0] = 1;
1455 break;
1456 case SNDRV_PCM_FORMAT_S16_LE:
1457 default:
1458 ucontrol->value.integer.value[0] = 0;
1459 break;
1460 }
1461
1462 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1463 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1464 ucontrol->value.integer.value[0]);
1465 return 0;
1466}
1467
1468static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1469 struct snd_ctl_elem_value *ucontrol)
1470{
1471 int rc = 0;
1472 int ch_num = cdc_dma_get_port_idx(kcontrol);
1473
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1474 if (ch_num < 0) {
1475 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1476 return ch_num;
1477 }
1478
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1479 switch (ucontrol->value.integer.value[0]) {
1480 case 3:
1481 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1482 break;
1483 case 2:
1484 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1485 break;
1486 case 1:
1487 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1488 break;
1489 case 0:
1490 default:
1491 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1492 break;
1493 }
1494 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1495 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1496 ucontrol->value.integer.value[0]);
1497
1498 return rc;
1499}
1500
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1501
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1502static int cdc_dma_get_sample_rate_val(int sample_rate)
1503{
1504 int sample_rate_val = 0;
1505
1506 switch (sample_rate) {
1507 case SAMPLING_RATE_8KHZ:
1508 sample_rate_val = 0;
1509 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1510 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1511 sample_rate_val = 1;
1512 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1513 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1514 sample_rate_val = 2;
1515 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1516 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1517 sample_rate_val = 3;
1518 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1519 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1520 sample_rate_val = 4;
1521 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1522 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1523 sample_rate_val = 5;
1524 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1525 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1526 sample_rate_val = 6;
1527 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1528 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1529 sample_rate_val = 7;
1530 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1531 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1532 sample_rate_val = 8;
1533 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1534 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1535 sample_rate_val = 9;
1536 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1537 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1538 sample_rate_val = 10;
1539 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1540 case SAMPLING_RATE_352P8KHZ:
1541 sample_rate_val = 11;
1542 break;
1543 case SAMPLING_RATE_384KHZ:
1544 sample_rate_val = 12;
1545 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1546 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1547 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1548 break;
1549 }
1550 return sample_rate_val;
1551}
1552
1553static int cdc_dma_get_sample_rate(int value)
1554{
1555 int sample_rate = 0;
1556
1557 switch (value) {
1558 case 0:
1559 sample_rate = SAMPLING_RATE_8KHZ;
1560 break;
1561 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1562 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1563 break;
1564 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1565 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1566 break;
1567 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1568 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1569 break;
1570 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1571 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1572 break;
1573 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1574 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1575 break;
1576 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1577 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1578 break;
1579 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1580 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1581 break;
1582 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1583 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1584 break;
1585 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1586 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1587 break;
1588 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1589 sample_rate = SAMPLING_RATE_192KHZ;
1590 break;
1591 case 11:
1592 sample_rate = SAMPLING_RATE_352P8KHZ;
1593 break;
1594 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1595 sample_rate = SAMPLING_RATE_384KHZ;
1596 break;
1597 default:
1598 sample_rate = SAMPLING_RATE_48KHZ;
1599 break;
1600 }
1601 return sample_rate;
1602}
1603
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1604static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1605 struct snd_ctl_elem_value *ucontrol)
1606{
1607 int ch_num = cdc_dma_get_port_idx(kcontrol);
1608
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1609 if (ch_num < 0) {
1610 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1611 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1612 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1613
1614 ucontrol->value.enumerated.item[0] =
1615 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1616
1617 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1618 cdc_dma_rx_cfg[ch_num].sample_rate);
1619 return 0;
1620}
1621
1622static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1623 struct snd_ctl_elem_value *ucontrol)
1624{
1625 int ch_num = cdc_dma_get_port_idx(kcontrol);
1626
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1627 if (ch_num < 0) {
1628 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1629 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1630 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1631
1632 cdc_dma_rx_cfg[ch_num].sample_rate =
1633 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1634
1635
1636 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1637 __func__, ucontrol->value.enumerated.item[0],
1638 cdc_dma_rx_cfg[ch_num].sample_rate);
1639 return 0;
1640}
1641
1642static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1644{
1645 int ch_num = cdc_dma_get_port_idx(kcontrol);
1646
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1647 if (ch_num < 0) {
1648 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1649 return ch_num;
1650 }
1651
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1652 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1653 cdc_dma_tx_cfg[ch_num].channels);
1654 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1655 return 0;
1656}
1657
1658static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1660{
1661 int ch_num = cdc_dma_get_port_idx(kcontrol);
1662
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1663 if (ch_num < 0) {
1664 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1665 return ch_num;
1666 }
1667
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1668 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1669
1670 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1671 cdc_dma_tx_cfg[ch_num].channels);
1672 return 1;
1673}
1674
1675static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1676 struct snd_ctl_elem_value *ucontrol)
1677{
1678 int sample_rate_val;
1679 int ch_num = cdc_dma_get_port_idx(kcontrol);
1680
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1681 if (ch_num < 0) {
1682 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1683 return ch_num;
1684 }
1685
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1686 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1687 case SAMPLING_RATE_384KHZ:
1688 sample_rate_val = 12;
1689 break;
1690 case SAMPLING_RATE_352P8KHZ:
1691 sample_rate_val = 11;
1692 break;
1693 case SAMPLING_RATE_192KHZ:
1694 sample_rate_val = 10;
1695 break;
1696 case SAMPLING_RATE_176P4KHZ:
1697 sample_rate_val = 9;
1698 break;
1699 case SAMPLING_RATE_96KHZ:
1700 sample_rate_val = 8;
1701 break;
1702 case SAMPLING_RATE_88P2KHZ:
1703 sample_rate_val = 7;
1704 break;
1705 case SAMPLING_RATE_48KHZ:
1706 sample_rate_val = 6;
1707 break;
1708 case SAMPLING_RATE_44P1KHZ:
1709 sample_rate_val = 5;
1710 break;
1711 case SAMPLING_RATE_32KHZ:
1712 sample_rate_val = 4;
1713 break;
1714 case SAMPLING_RATE_22P05KHZ:
1715 sample_rate_val = 3;
1716 break;
1717 case SAMPLING_RATE_16KHZ:
1718 sample_rate_val = 2;
1719 break;
1720 case SAMPLING_RATE_11P025KHZ:
1721 sample_rate_val = 1;
1722 break;
1723 case SAMPLING_RATE_8KHZ:
1724 sample_rate_val = 0;
1725 break;
1726 default:
1727 sample_rate_val = 6;
1728 break;
1729 }
1730
1731 ucontrol->value.integer.value[0] = sample_rate_val;
1732 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1733 cdc_dma_tx_cfg[ch_num].sample_rate);
1734 return 0;
1735}
1736
1737static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1738 struct snd_ctl_elem_value *ucontrol)
1739{
1740 int ch_num = cdc_dma_get_port_idx(kcontrol);
1741
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1742 if (ch_num < 0) {
1743 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1744 return ch_num;
1745 }
1746
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1747 switch (ucontrol->value.integer.value[0]) {
1748 case 12:
1749 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1750 break;
1751 case 11:
1752 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1753 break;
1754 case 10:
1755 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1756 break;
1757 case 9:
1758 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1759 break;
1760 case 8:
1761 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1762 break;
1763 case 7:
1764 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1765 break;
1766 case 6:
1767 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1768 break;
1769 case 5:
1770 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1771 break;
1772 case 4:
1773 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1774 break;
1775 case 3:
1776 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1777 break;
1778 case 2:
1779 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1780 break;
1781 case 1:
1782 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1783 break;
1784 case 0:
1785 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1786 break;
1787 default:
1788 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1789 break;
1790 }
1791
1792 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1793 __func__, ucontrol->value.integer.value[0],
1794 cdc_dma_tx_cfg[ch_num].sample_rate);
1795 return 0;
1796}
1797
1798static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1799 struct snd_ctl_elem_value *ucontrol)
1800{
1801 int ch_num = cdc_dma_get_port_idx(kcontrol);
1802
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1803 if (ch_num < 0) {
1804 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1805 return ch_num;
1806 }
1807
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1808 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1809 case SNDRV_PCM_FORMAT_S32_LE:
1810 ucontrol->value.integer.value[0] = 3;
1811 break;
1812 case SNDRV_PCM_FORMAT_S24_3LE:
1813 ucontrol->value.integer.value[0] = 2;
1814 break;
1815 case SNDRV_PCM_FORMAT_S24_LE:
1816 ucontrol->value.integer.value[0] = 1;
1817 break;
1818 case SNDRV_PCM_FORMAT_S16_LE:
1819 default:
1820 ucontrol->value.integer.value[0] = 0;
1821 break;
1822 }
1823
1824 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1825 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1826 ucontrol->value.integer.value[0]);
1827 return 0;
1828}
1829
1830static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1831 struct snd_ctl_elem_value *ucontrol)
1832{
1833 int rc = 0;
1834 int ch_num = cdc_dma_get_port_idx(kcontrol);
1835
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1836 if (ch_num < 0) {
1837 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1838 return ch_num;
1839 }
1840
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1841 switch (ucontrol->value.integer.value[0]) {
1842 case 3:
1843 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1844 break;
1845 case 2:
1846 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1847 break;
1848 case 1:
1849 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1850 break;
1851 case 0:
1852 default:
1853 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1854 break;
1855 }
1856 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1857 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1858 ucontrol->value.integer.value[0]);
1859
1860 return rc;
1861}
1862
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1863static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1864 struct snd_ctl_elem_value *ucontrol)
1865{
1866 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1867 usb_rx_cfg.channels);
1868 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1869 return 0;
1870}
1871
1872static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1873 struct snd_ctl_elem_value *ucontrol)
1874{
1875 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1876
1877 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1878 return 1;
1879}
1880
1881static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1882 struct snd_ctl_elem_value *ucontrol)
1883{
1884 int sample_rate_val;
1885
1886 switch (usb_rx_cfg.sample_rate) {
1887 case SAMPLING_RATE_384KHZ:
1888 sample_rate_val = 12;
1889 break;
1890 case SAMPLING_RATE_352P8KHZ:
1891 sample_rate_val = 11;
1892 break;
1893 case SAMPLING_RATE_192KHZ:
1894 sample_rate_val = 10;
1895 break;
1896 case SAMPLING_RATE_176P4KHZ:
1897 sample_rate_val = 9;
1898 break;
1899 case SAMPLING_RATE_96KHZ:
1900 sample_rate_val = 8;
1901 break;
1902 case SAMPLING_RATE_88P2KHZ:
1903 sample_rate_val = 7;
1904 break;
1905 case SAMPLING_RATE_48KHZ:
1906 sample_rate_val = 6;
1907 break;
1908 case SAMPLING_RATE_44P1KHZ:
1909 sample_rate_val = 5;
1910 break;
1911 case SAMPLING_RATE_32KHZ:
1912 sample_rate_val = 4;
1913 break;
1914 case SAMPLING_RATE_22P05KHZ:
1915 sample_rate_val = 3;
1916 break;
1917 case SAMPLING_RATE_16KHZ:
1918 sample_rate_val = 2;
1919 break;
1920 case SAMPLING_RATE_11P025KHZ:
1921 sample_rate_val = 1;
1922 break;
1923 case SAMPLING_RATE_8KHZ:
1924 default:
1925 sample_rate_val = 0;
1926 break;
1927 }
1928
1929 ucontrol->value.integer.value[0] = sample_rate_val;
1930 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1931 usb_rx_cfg.sample_rate);
1932 return 0;
1933}
1934
1935static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1936 struct snd_ctl_elem_value *ucontrol)
1937{
1938 switch (ucontrol->value.integer.value[0]) {
1939 case 12:
1940 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1941 break;
1942 case 11:
1943 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1944 break;
1945 case 10:
1946 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1947 break;
1948 case 9:
1949 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1950 break;
1951 case 8:
1952 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1953 break;
1954 case 7:
1955 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1956 break;
1957 case 6:
1958 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1959 break;
1960 case 5:
1961 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1962 break;
1963 case 4:
1964 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1965 break;
1966 case 3:
1967 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1968 break;
1969 case 2:
1970 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1971 break;
1972 case 1:
1973 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1974 break;
1975 case 0:
1976 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1977 break;
1978 default:
1979 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1980 break;
1981 }
1982
1983 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1984 __func__, ucontrol->value.integer.value[0],
1985 usb_rx_cfg.sample_rate);
1986 return 0;
1987}
1988
1989static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 switch (usb_rx_cfg.bit_format) {
1993 case SNDRV_PCM_FORMAT_S32_LE:
1994 ucontrol->value.integer.value[0] = 3;
1995 break;
1996 case SNDRV_PCM_FORMAT_S24_3LE:
1997 ucontrol->value.integer.value[0] = 2;
1998 break;
1999 case SNDRV_PCM_FORMAT_S24_LE:
2000 ucontrol->value.integer.value[0] = 1;
2001 break;
2002 case SNDRV_PCM_FORMAT_S16_LE:
2003 default:
2004 ucontrol->value.integer.value[0] = 0;
2005 break;
2006 }
2007
2008 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2009 __func__, usb_rx_cfg.bit_format,
2010 ucontrol->value.integer.value[0]);
2011 return 0;
2012}
2013
2014static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
2016{
2017 int rc = 0;
2018
2019 switch (ucontrol->value.integer.value[0]) {
2020 case 3:
2021 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2022 break;
2023 case 2:
2024 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2025 break;
2026 case 1:
2027 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2028 break;
2029 case 0:
2030 default:
2031 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2032 break;
2033 }
2034 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2035 __func__, usb_rx_cfg.bit_format,
2036 ucontrol->value.integer.value[0]);
2037
2038 return rc;
2039}
2040
2041static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2042 struct snd_ctl_elem_value *ucontrol)
2043{
2044 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2045 usb_tx_cfg.channels);
2046 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2047 return 0;
2048}
2049
2050static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2051 struct snd_ctl_elem_value *ucontrol)
2052{
2053 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2054
2055 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2056 return 1;
2057}
2058
2059static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061{
2062 int sample_rate_val;
2063
2064 switch (usb_tx_cfg.sample_rate) {
2065 case SAMPLING_RATE_384KHZ:
2066 sample_rate_val = 12;
2067 break;
2068 case SAMPLING_RATE_352P8KHZ:
2069 sample_rate_val = 11;
2070 break;
2071 case SAMPLING_RATE_192KHZ:
2072 sample_rate_val = 10;
2073 break;
2074 case SAMPLING_RATE_176P4KHZ:
2075 sample_rate_val = 9;
2076 break;
2077 case SAMPLING_RATE_96KHZ:
2078 sample_rate_val = 8;
2079 break;
2080 case SAMPLING_RATE_88P2KHZ:
2081 sample_rate_val = 7;
2082 break;
2083 case SAMPLING_RATE_48KHZ:
2084 sample_rate_val = 6;
2085 break;
2086 case SAMPLING_RATE_44P1KHZ:
2087 sample_rate_val = 5;
2088 break;
2089 case SAMPLING_RATE_32KHZ:
2090 sample_rate_val = 4;
2091 break;
2092 case SAMPLING_RATE_22P05KHZ:
2093 sample_rate_val = 3;
2094 break;
2095 case SAMPLING_RATE_16KHZ:
2096 sample_rate_val = 2;
2097 break;
2098 case SAMPLING_RATE_11P025KHZ:
2099 sample_rate_val = 1;
2100 break;
2101 case SAMPLING_RATE_8KHZ:
2102 sample_rate_val = 0;
2103 break;
2104 default:
2105 sample_rate_val = 6;
2106 break;
2107 }
2108
2109 ucontrol->value.integer.value[0] = sample_rate_val;
2110 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2111 usb_tx_cfg.sample_rate);
2112 return 0;
2113}
2114
2115static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2116 struct snd_ctl_elem_value *ucontrol)
2117{
2118 switch (ucontrol->value.integer.value[0]) {
2119 case 12:
2120 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2121 break;
2122 case 11:
2123 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2124 break;
2125 case 10:
2126 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2127 break;
2128 case 9:
2129 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2130 break;
2131 case 8:
2132 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2133 break;
2134 case 7:
2135 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2136 break;
2137 case 6:
2138 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2139 break;
2140 case 5:
2141 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2142 break;
2143 case 4:
2144 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2145 break;
2146 case 3:
2147 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2148 break;
2149 case 2:
2150 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2151 break;
2152 case 1:
2153 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2154 break;
2155 case 0:
2156 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2157 break;
2158 default:
2159 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2160 break;
2161 }
2162
2163 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2164 __func__, ucontrol->value.integer.value[0],
2165 usb_tx_cfg.sample_rate);
2166 return 0;
2167}
2168
2169static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2170 struct snd_ctl_elem_value *ucontrol)
2171{
2172 switch (usb_tx_cfg.bit_format) {
2173 case SNDRV_PCM_FORMAT_S32_LE:
2174 ucontrol->value.integer.value[0] = 3;
2175 break;
2176 case SNDRV_PCM_FORMAT_S24_3LE:
2177 ucontrol->value.integer.value[0] = 2;
2178 break;
2179 case SNDRV_PCM_FORMAT_S24_LE:
2180 ucontrol->value.integer.value[0] = 1;
2181 break;
2182 case SNDRV_PCM_FORMAT_S16_LE:
2183 default:
2184 ucontrol->value.integer.value[0] = 0;
2185 break;
2186 }
2187
2188 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2189 __func__, usb_tx_cfg.bit_format,
2190 ucontrol->value.integer.value[0]);
2191 return 0;
2192}
2193
2194static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2195 struct snd_ctl_elem_value *ucontrol)
2196{
2197 int rc = 0;
2198
2199 switch (ucontrol->value.integer.value[0]) {
2200 case 3:
2201 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2202 break;
2203 case 2:
2204 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2205 break;
2206 case 1:
2207 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2208 break;
2209 case 0:
2210 default:
2211 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2212 break;
2213 }
2214 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2215 __func__, usb_tx_cfg.bit_format,
2216 ucontrol->value.integer.value[0]);
2217
2218 return rc;
2219}
2220
2221static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2222{
2223 int idx;
2224
2225 if (strnstr(kcontrol->id.name, "Display Port RX",
2226 sizeof("Display Port RX"))) {
2227 idx = DP_RX_IDX;
2228 } else {
2229 pr_err("%s: unsupported BE: %s\n",
2230 __func__, kcontrol->id.name);
2231 idx = -EINVAL;
2232 }
2233
2234 return idx;
2235}
2236
2237static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2238 struct snd_ctl_elem_value *ucontrol)
2239{
2240 int idx = ext_disp_get_port_idx(kcontrol);
2241
2242 if (idx < 0)
2243 return idx;
2244
2245 switch (ext_disp_rx_cfg[idx].bit_format) {
2246 case SNDRV_PCM_FORMAT_S24_3LE:
2247 ucontrol->value.integer.value[0] = 2;
2248 break;
2249 case SNDRV_PCM_FORMAT_S24_LE:
2250 ucontrol->value.integer.value[0] = 1;
2251 break;
2252 case SNDRV_PCM_FORMAT_S16_LE:
2253 default:
2254 ucontrol->value.integer.value[0] = 0;
2255 break;
2256 }
2257
2258 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2259 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2260 ucontrol->value.integer.value[0]);
2261 return 0;
2262}
2263
2264static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2265 struct snd_ctl_elem_value *ucontrol)
2266{
2267 int idx = ext_disp_get_port_idx(kcontrol);
2268
2269 if (idx < 0)
2270 return idx;
2271
2272 switch (ucontrol->value.integer.value[0]) {
2273 case 2:
2274 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2275 break;
2276 case 1:
2277 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2278 break;
2279 case 0:
2280 default:
2281 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2282 break;
2283 }
2284 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2285 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2286 ucontrol->value.integer.value[0]);
2287
2288 return 0;
2289}
2290
2291static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2292 struct snd_ctl_elem_value *ucontrol)
2293{
2294 int idx = ext_disp_get_port_idx(kcontrol);
2295
2296 if (idx < 0)
2297 return idx;
2298
2299 ucontrol->value.integer.value[0] =
2300 ext_disp_rx_cfg[idx].channels - 2;
2301
2302 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2303 idx, ext_disp_rx_cfg[idx].channels);
2304
2305 return 0;
2306}
2307
2308static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2309 struct snd_ctl_elem_value *ucontrol)
2310{
2311 int idx = ext_disp_get_port_idx(kcontrol);
2312
2313 if (idx < 0)
2314 return idx;
2315
2316 ext_disp_rx_cfg[idx].channels =
2317 ucontrol->value.integer.value[0] + 2;
2318
2319 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2320 idx, ext_disp_rx_cfg[idx].channels);
2321 return 1;
2322}
2323
2324static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2325 struct snd_ctl_elem_value *ucontrol)
2326{
2327 int sample_rate_val;
2328 int idx = ext_disp_get_port_idx(kcontrol);
2329
2330 if (idx < 0)
2331 return idx;
2332
2333 switch (ext_disp_rx_cfg[idx].sample_rate) {
2334 case SAMPLING_RATE_176P4KHZ:
2335 sample_rate_val = 6;
2336 break;
2337
2338 case SAMPLING_RATE_88P2KHZ:
2339 sample_rate_val = 5;
2340 break;
2341
2342 case SAMPLING_RATE_44P1KHZ:
2343 sample_rate_val = 4;
2344 break;
2345
2346 case SAMPLING_RATE_32KHZ:
2347 sample_rate_val = 3;
2348 break;
2349
2350 case SAMPLING_RATE_192KHZ:
2351 sample_rate_val = 2;
2352 break;
2353
2354 case SAMPLING_RATE_96KHZ:
2355 sample_rate_val = 1;
2356 break;
2357
2358 case SAMPLING_RATE_48KHZ:
2359 default:
2360 sample_rate_val = 0;
2361 break;
2362 }
2363
2364 ucontrol->value.integer.value[0] = sample_rate_val;
2365 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2366 idx, ext_disp_rx_cfg[idx].sample_rate);
2367
2368 return 0;
2369}
2370
2371static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2372 struct snd_ctl_elem_value *ucontrol)
2373{
2374 int idx = ext_disp_get_port_idx(kcontrol);
2375
2376 if (idx < 0)
2377 return idx;
2378
2379 switch (ucontrol->value.integer.value[0]) {
2380 case 6:
2381 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2382 break;
2383 case 5:
2384 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2385 break;
2386 case 4:
2387 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2388 break;
2389 case 3:
2390 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2391 break;
2392 case 2:
2393 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2394 break;
2395 case 1:
2396 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2397 break;
2398 case 0:
2399 default:
2400 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2401 break;
2402 }
2403
2404 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2405 __func__, ucontrol->value.integer.value[0], idx,
2406 ext_disp_rx_cfg[idx].sample_rate);
2407 return 0;
2408}
2409
2410static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 pr_debug("%s: proxy_rx channels = %d\n",
2414 __func__, proxy_rx_cfg.channels);
2415 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2416
2417 return 0;
2418}
2419
2420static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2421 struct snd_ctl_elem_value *ucontrol)
2422{
2423 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2424 pr_debug("%s: proxy_rx channels = %d\n",
2425 __func__, proxy_rx_cfg.channels);
2426
2427 return 1;
2428}
2429
2430static int tdm_get_sample_rate(int value)
2431{
2432 int sample_rate = 0;
2433
2434 switch (value) {
2435 case 0:
2436 sample_rate = SAMPLING_RATE_8KHZ;
2437 break;
2438 case 1:
2439 sample_rate = SAMPLING_RATE_16KHZ;
2440 break;
2441 case 2:
2442 sample_rate = SAMPLING_RATE_32KHZ;
2443 break;
2444 case 3:
2445 sample_rate = SAMPLING_RATE_48KHZ;
2446 break;
2447 case 4:
2448 sample_rate = SAMPLING_RATE_176P4KHZ;
2449 break;
2450 case 5:
2451 sample_rate = SAMPLING_RATE_352P8KHZ;
2452 break;
2453 default:
2454 sample_rate = SAMPLING_RATE_48KHZ;
2455 break;
2456 }
2457 return sample_rate;
2458}
2459
2460static int aux_pcm_get_sample_rate(int value)
2461{
2462 int sample_rate;
2463
2464 switch (value) {
2465 case 1:
2466 sample_rate = SAMPLING_RATE_16KHZ;
2467 break;
2468 case 0:
2469 default:
2470 sample_rate = SAMPLING_RATE_8KHZ;
2471 break;
2472 }
2473 return sample_rate;
2474}
2475
2476static int tdm_get_sample_rate_val(int sample_rate)
2477{
2478 int sample_rate_val = 0;
2479
2480 switch (sample_rate) {
2481 case SAMPLING_RATE_8KHZ:
2482 sample_rate_val = 0;
2483 break;
2484 case SAMPLING_RATE_16KHZ:
2485 sample_rate_val = 1;
2486 break;
2487 case SAMPLING_RATE_32KHZ:
2488 sample_rate_val = 2;
2489 break;
2490 case SAMPLING_RATE_48KHZ:
2491 sample_rate_val = 3;
2492 break;
2493 case SAMPLING_RATE_176P4KHZ:
2494 sample_rate_val = 4;
2495 break;
2496 case SAMPLING_RATE_352P8KHZ:
2497 sample_rate_val = 5;
2498 break;
2499 default:
2500 sample_rate_val = 3;
2501 break;
2502 }
2503 return sample_rate_val;
2504}
2505
2506static int aux_pcm_get_sample_rate_val(int sample_rate)
2507{
2508 int sample_rate_val;
2509
2510 switch (sample_rate) {
2511 case SAMPLING_RATE_16KHZ:
2512 sample_rate_val = 1;
2513 break;
2514 case SAMPLING_RATE_8KHZ:
2515 default:
2516 sample_rate_val = 0;
2517 break;
2518 }
2519 return sample_rate_val;
2520}
2521
2522static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2523 struct tdm_port *port)
2524{
2525 if (port) {
2526 if (strnstr(kcontrol->id.name, "PRI",
2527 sizeof(kcontrol->id.name))) {
2528 port->mode = TDM_PRI;
2529 } else if (strnstr(kcontrol->id.name, "SEC",
2530 sizeof(kcontrol->id.name))) {
2531 port->mode = TDM_SEC;
2532 } else if (strnstr(kcontrol->id.name, "TERT",
2533 sizeof(kcontrol->id.name))) {
2534 port->mode = TDM_TERT;
2535 } else if (strnstr(kcontrol->id.name, "QUAT",
2536 sizeof(kcontrol->id.name))) {
2537 port->mode = TDM_QUAT;
2538 } else if (strnstr(kcontrol->id.name, "QUIN",
2539 sizeof(kcontrol->id.name))) {
2540 port->mode = TDM_QUIN;
2541 } else {
2542 pr_err("%s: unsupported mode in: %s\n",
2543 __func__, kcontrol->id.name);
2544 return -EINVAL;
2545 }
2546
2547 if (strnstr(kcontrol->id.name, "RX_0",
2548 sizeof(kcontrol->id.name)) ||
2549 strnstr(kcontrol->id.name, "TX_0",
2550 sizeof(kcontrol->id.name))) {
2551 port->channel = TDM_0;
2552 } else if (strnstr(kcontrol->id.name, "RX_1",
2553 sizeof(kcontrol->id.name)) ||
2554 strnstr(kcontrol->id.name, "TX_1",
2555 sizeof(kcontrol->id.name))) {
2556 port->channel = TDM_1;
2557 } else if (strnstr(kcontrol->id.name, "RX_2",
2558 sizeof(kcontrol->id.name)) ||
2559 strnstr(kcontrol->id.name, "TX_2",
2560 sizeof(kcontrol->id.name))) {
2561 port->channel = TDM_2;
2562 } else if (strnstr(kcontrol->id.name, "RX_3",
2563 sizeof(kcontrol->id.name)) ||
2564 strnstr(kcontrol->id.name, "TX_3",
2565 sizeof(kcontrol->id.name))) {
2566 port->channel = TDM_3;
2567 } else if (strnstr(kcontrol->id.name, "RX_4",
2568 sizeof(kcontrol->id.name)) ||
2569 strnstr(kcontrol->id.name, "TX_4",
2570 sizeof(kcontrol->id.name))) {
2571 port->channel = TDM_4;
2572 } else if (strnstr(kcontrol->id.name, "RX_5",
2573 sizeof(kcontrol->id.name)) ||
2574 strnstr(kcontrol->id.name, "TX_5",
2575 sizeof(kcontrol->id.name))) {
2576 port->channel = TDM_5;
2577 } else if (strnstr(kcontrol->id.name, "RX_6",
2578 sizeof(kcontrol->id.name)) ||
2579 strnstr(kcontrol->id.name, "TX_6",
2580 sizeof(kcontrol->id.name))) {
2581 port->channel = TDM_6;
2582 } else if (strnstr(kcontrol->id.name, "RX_7",
2583 sizeof(kcontrol->id.name)) ||
2584 strnstr(kcontrol->id.name, "TX_7",
2585 sizeof(kcontrol->id.name))) {
2586 port->channel = TDM_7;
2587 } else {
2588 pr_err("%s: unsupported channel in: %s\n",
2589 __func__, kcontrol->id.name);
2590 return -EINVAL;
2591 }
2592 } else {
2593 return -EINVAL;
2594 }
2595 return 0;
2596}
2597
2598static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2599 struct snd_ctl_elem_value *ucontrol)
2600{
2601 struct tdm_port port;
2602 int ret = tdm_get_port_idx(kcontrol, &port);
2603
2604 if (ret) {
2605 pr_err("%s: unsupported control: %s\n",
2606 __func__, kcontrol->id.name);
2607 } else {
2608 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2609 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2610
2611 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2612 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2613 ucontrol->value.enumerated.item[0]);
2614 }
2615 return ret;
2616}
2617
2618static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2619 struct snd_ctl_elem_value *ucontrol)
2620{
2621 struct tdm_port port;
2622 int ret = tdm_get_port_idx(kcontrol, &port);
2623
2624 if (ret) {
2625 pr_err("%s: unsupported control: %s\n",
2626 __func__, kcontrol->id.name);
2627 } else {
2628 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2629 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2630
2631 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2632 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2633 ucontrol->value.enumerated.item[0]);
2634 }
2635 return ret;
2636}
2637
2638static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2639 struct snd_ctl_elem_value *ucontrol)
2640{
2641 struct tdm_port port;
2642 int ret = tdm_get_port_idx(kcontrol, &port);
2643
2644 if (ret) {
2645 pr_err("%s: unsupported control: %s\n",
2646 __func__, kcontrol->id.name);
2647 } else {
2648 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2649 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2650
2651 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2652 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2653 ucontrol->value.enumerated.item[0]);
2654 }
2655 return ret;
2656}
2657
2658static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2659 struct snd_ctl_elem_value *ucontrol)
2660{
2661 struct tdm_port port;
2662 int ret = tdm_get_port_idx(kcontrol, &port);
2663
2664 if (ret) {
2665 pr_err("%s: unsupported control: %s\n",
2666 __func__, kcontrol->id.name);
2667 } else {
2668 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2669 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2670
2671 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2672 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2673 ucontrol->value.enumerated.item[0]);
2674 }
2675 return ret;
2676}
2677
2678static int tdm_get_format(int value)
2679{
2680 int format = 0;
2681
2682 switch (value) {
2683 case 0:
2684 format = SNDRV_PCM_FORMAT_S16_LE;
2685 break;
2686 case 1:
2687 format = SNDRV_PCM_FORMAT_S24_LE;
2688 break;
2689 case 2:
2690 format = SNDRV_PCM_FORMAT_S32_LE;
2691 break;
2692 default:
2693 format = SNDRV_PCM_FORMAT_S16_LE;
2694 break;
2695 }
2696 return format;
2697}
2698
2699static int tdm_get_format_val(int format)
2700{
2701 int value = 0;
2702
2703 switch (format) {
2704 case SNDRV_PCM_FORMAT_S16_LE:
2705 value = 0;
2706 break;
2707 case SNDRV_PCM_FORMAT_S24_LE:
2708 value = 1;
2709 break;
2710 case SNDRV_PCM_FORMAT_S32_LE:
2711 value = 2;
2712 break;
2713 default:
2714 value = 0;
2715 break;
2716 }
2717 return value;
2718}
2719
2720static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2721 struct snd_ctl_elem_value *ucontrol)
2722{
2723 struct tdm_port port;
2724 int ret = tdm_get_port_idx(kcontrol, &port);
2725
2726 if (ret) {
2727 pr_err("%s: unsupported control: %s\n",
2728 __func__, kcontrol->id.name);
2729 } else {
2730 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2731 tdm_rx_cfg[port.mode][port.channel].bit_format);
2732
2733 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2734 tdm_rx_cfg[port.mode][port.channel].bit_format,
2735 ucontrol->value.enumerated.item[0]);
2736 }
2737 return ret;
2738}
2739
2740static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2741 struct snd_ctl_elem_value *ucontrol)
2742{
2743 struct tdm_port port;
2744 int ret = tdm_get_port_idx(kcontrol, &port);
2745
2746 if (ret) {
2747 pr_err("%s: unsupported control: %s\n",
2748 __func__, kcontrol->id.name);
2749 } else {
2750 tdm_rx_cfg[port.mode][port.channel].bit_format =
2751 tdm_get_format(ucontrol->value.enumerated.item[0]);
2752
2753 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2754 tdm_rx_cfg[port.mode][port.channel].bit_format,
2755 ucontrol->value.enumerated.item[0]);
2756 }
2757 return ret;
2758}
2759
2760static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2761 struct snd_ctl_elem_value *ucontrol)
2762{
2763 struct tdm_port port;
2764 int ret = tdm_get_port_idx(kcontrol, &port);
2765
2766 if (ret) {
2767 pr_err("%s: unsupported control: %s\n",
2768 __func__, kcontrol->id.name);
2769 } else {
2770 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2771 tdm_tx_cfg[port.mode][port.channel].bit_format);
2772
2773 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2774 tdm_tx_cfg[port.mode][port.channel].bit_format,
2775 ucontrol->value.enumerated.item[0]);
2776 }
2777 return ret;
2778}
2779
2780static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2781 struct snd_ctl_elem_value *ucontrol)
2782{
2783 struct tdm_port port;
2784 int ret = tdm_get_port_idx(kcontrol, &port);
2785
2786 if (ret) {
2787 pr_err("%s: unsupported control: %s\n",
2788 __func__, kcontrol->id.name);
2789 } else {
2790 tdm_tx_cfg[port.mode][port.channel].bit_format =
2791 tdm_get_format(ucontrol->value.enumerated.item[0]);
2792
2793 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2794 tdm_tx_cfg[port.mode][port.channel].bit_format,
2795 ucontrol->value.enumerated.item[0]);
2796 }
2797 return ret;
2798}
2799
2800static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2801 struct snd_ctl_elem_value *ucontrol)
2802{
2803 struct tdm_port port;
2804 int ret = tdm_get_port_idx(kcontrol, &port);
2805
2806 if (ret) {
2807 pr_err("%s: unsupported control: %s\n",
2808 __func__, kcontrol->id.name);
2809 } else {
2810
2811 ucontrol->value.enumerated.item[0] =
2812 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2813
2814 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2815 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2816 ucontrol->value.enumerated.item[0]);
2817 }
2818 return ret;
2819}
2820
2821static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2822 struct snd_ctl_elem_value *ucontrol)
2823{
2824 struct tdm_port port;
2825 int ret = tdm_get_port_idx(kcontrol, &port);
2826
2827 if (ret) {
2828 pr_err("%s: unsupported control: %s\n",
2829 __func__, kcontrol->id.name);
2830 } else {
2831 tdm_rx_cfg[port.mode][port.channel].channels =
2832 ucontrol->value.enumerated.item[0] + 1;
2833
2834 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2835 tdm_rx_cfg[port.mode][port.channel].channels,
2836 ucontrol->value.enumerated.item[0] + 1);
2837 }
2838 return ret;
2839}
2840
2841static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2842 struct snd_ctl_elem_value *ucontrol)
2843{
2844 struct tdm_port port;
2845 int ret = tdm_get_port_idx(kcontrol, &port);
2846
2847 if (ret) {
2848 pr_err("%s: unsupported control: %s\n",
2849 __func__, kcontrol->id.name);
2850 } else {
2851 ucontrol->value.enumerated.item[0] =
2852 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2853
2854 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2855 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2856 ucontrol->value.enumerated.item[0]);
2857 }
2858 return ret;
2859}
2860
2861static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2862 struct snd_ctl_elem_value *ucontrol)
2863{
2864 struct tdm_port port;
2865 int ret = tdm_get_port_idx(kcontrol, &port);
2866
2867 if (ret) {
2868 pr_err("%s: unsupported control: %s\n",
2869 __func__, kcontrol->id.name);
2870 } else {
2871 tdm_tx_cfg[port.mode][port.channel].channels =
2872 ucontrol->value.enumerated.item[0] + 1;
2873
2874 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2875 tdm_tx_cfg[port.mode][port.channel].channels,
2876 ucontrol->value.enumerated.item[0] + 1);
2877 }
2878 return ret;
2879}
2880
2881static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2882{
2883 int idx;
2884
2885 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2886 sizeof("PRIM_AUX_PCM"))) {
2887 idx = PRIM_AUX_PCM;
2888 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2889 sizeof("SEC_AUX_PCM"))) {
2890 idx = SEC_AUX_PCM;
2891 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2892 sizeof("TERT_AUX_PCM"))) {
2893 idx = TERT_AUX_PCM;
2894 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2895 sizeof("QUAT_AUX_PCM"))) {
2896 idx = QUAT_AUX_PCM;
2897 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2898 sizeof("QUIN_AUX_PCM"))) {
2899 idx = QUIN_AUX_PCM;
2900 } else {
2901 pr_err("%s: unsupported port: %s\n",
2902 __func__, kcontrol->id.name);
2903 idx = -EINVAL;
2904 }
2905
2906 return idx;
2907}
2908
2909static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2910 struct snd_ctl_elem_value *ucontrol)
2911{
2912 int idx = aux_pcm_get_port_idx(kcontrol);
2913
2914 if (idx < 0)
2915 return idx;
2916
2917 aux_pcm_rx_cfg[idx].sample_rate =
2918 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2919
2920 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2921 idx, aux_pcm_rx_cfg[idx].sample_rate,
2922 ucontrol->value.enumerated.item[0]);
2923
2924 return 0;
2925}
2926
2927static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2928 struct snd_ctl_elem_value *ucontrol)
2929{
2930 int idx = aux_pcm_get_port_idx(kcontrol);
2931
2932 if (idx < 0)
2933 return idx;
2934
2935 ucontrol->value.enumerated.item[0] =
2936 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2937
2938 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2939 idx, aux_pcm_rx_cfg[idx].sample_rate,
2940 ucontrol->value.enumerated.item[0]);
2941
2942 return 0;
2943}
2944
2945static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2946 struct snd_ctl_elem_value *ucontrol)
2947{
2948 int idx = aux_pcm_get_port_idx(kcontrol);
2949
2950 if (idx < 0)
2951 return idx;
2952
2953 aux_pcm_tx_cfg[idx].sample_rate =
2954 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2955
2956 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2957 idx, aux_pcm_tx_cfg[idx].sample_rate,
2958 ucontrol->value.enumerated.item[0]);
2959
2960 return 0;
2961}
2962
2963static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2964 struct snd_ctl_elem_value *ucontrol)
2965{
2966 int idx = aux_pcm_get_port_idx(kcontrol);
2967
2968 if (idx < 0)
2969 return idx;
2970
2971 ucontrol->value.enumerated.item[0] =
2972 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2973
2974 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2975 idx, aux_pcm_tx_cfg[idx].sample_rate,
2976 ucontrol->value.enumerated.item[0]);
2977
2978 return 0;
2979}
2980
2981static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2982{
2983 int idx;
2984
2985 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2986 sizeof("PRIM_MI2S_RX"))) {
2987 idx = PRIM_MI2S;
2988 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2989 sizeof("SEC_MI2S_RX"))) {
2990 idx = SEC_MI2S;
2991 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2992 sizeof("TERT_MI2S_RX"))) {
2993 idx = TERT_MI2S;
2994 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2995 sizeof("QUAT_MI2S_RX"))) {
2996 idx = QUAT_MI2S;
2997 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2998 sizeof("QUIN_MI2S_RX"))) {
2999 idx = QUIN_MI2S;
3000 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
3001 sizeof("PRIM_MI2S_TX"))) {
3002 idx = PRIM_MI2S;
3003 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
3004 sizeof("SEC_MI2S_TX"))) {
3005 idx = SEC_MI2S;
3006 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
3007 sizeof("TERT_MI2S_TX"))) {
3008 idx = TERT_MI2S;
3009 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
3010 sizeof("QUAT_MI2S_TX"))) {
3011 idx = QUAT_MI2S;
3012 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
3013 sizeof("QUIN_MI2S_TX"))) {
3014 idx = QUIN_MI2S;
3015 } else {
3016 pr_err("%s: unsupported channel: %s\n",
3017 __func__, kcontrol->id.name);
3018 idx = -EINVAL;
3019 }
3020
3021 return idx;
3022}
3023
3024static int mi2s_get_sample_rate_val(int sample_rate)
3025{
3026 int sample_rate_val;
3027
3028 switch (sample_rate) {
3029 case SAMPLING_RATE_8KHZ:
3030 sample_rate_val = 0;
3031 break;
3032 case SAMPLING_RATE_11P025KHZ:
3033 sample_rate_val = 1;
3034 break;
3035 case SAMPLING_RATE_16KHZ:
3036 sample_rate_val = 2;
3037 break;
3038 case SAMPLING_RATE_22P05KHZ:
3039 sample_rate_val = 3;
3040 break;
3041 case SAMPLING_RATE_32KHZ:
3042 sample_rate_val = 4;
3043 break;
3044 case SAMPLING_RATE_44P1KHZ:
3045 sample_rate_val = 5;
3046 break;
3047 case SAMPLING_RATE_48KHZ:
3048 sample_rate_val = 6;
3049 break;
3050 case SAMPLING_RATE_96KHZ:
3051 sample_rate_val = 7;
3052 break;
3053 case SAMPLING_RATE_192KHZ:
3054 sample_rate_val = 8;
3055 break;
3056 default:
3057 sample_rate_val = 6;
3058 break;
3059 }
3060 return sample_rate_val;
3061}
3062
3063static int mi2s_get_sample_rate(int value)
3064{
3065 int sample_rate;
3066
3067 switch (value) {
3068 case 0:
3069 sample_rate = SAMPLING_RATE_8KHZ;
3070 break;
3071 case 1:
3072 sample_rate = SAMPLING_RATE_11P025KHZ;
3073 break;
3074 case 2:
3075 sample_rate = SAMPLING_RATE_16KHZ;
3076 break;
3077 case 3:
3078 sample_rate = SAMPLING_RATE_22P05KHZ;
3079 break;
3080 case 4:
3081 sample_rate = SAMPLING_RATE_32KHZ;
3082 break;
3083 case 5:
3084 sample_rate = SAMPLING_RATE_44P1KHZ;
3085 break;
3086 case 6:
3087 sample_rate = SAMPLING_RATE_48KHZ;
3088 break;
3089 case 7:
3090 sample_rate = SAMPLING_RATE_96KHZ;
3091 break;
3092 case 8:
3093 sample_rate = SAMPLING_RATE_192KHZ;
3094 break;
3095 default:
3096 sample_rate = SAMPLING_RATE_48KHZ;
3097 break;
3098 }
3099 return sample_rate;
3100}
3101
3102static int mi2s_auxpcm_get_format(int value)
3103{
3104 int format;
3105
3106 switch (value) {
3107 case 0:
3108 format = SNDRV_PCM_FORMAT_S16_LE;
3109 break;
3110 case 1:
3111 format = SNDRV_PCM_FORMAT_S24_LE;
3112 break;
3113 case 2:
3114 format = SNDRV_PCM_FORMAT_S24_3LE;
3115 break;
3116 case 3:
3117 format = SNDRV_PCM_FORMAT_S32_LE;
3118 break;
3119 default:
3120 format = SNDRV_PCM_FORMAT_S16_LE;
3121 break;
3122 }
3123 return format;
3124}
3125
3126static int mi2s_auxpcm_get_format_value(int format)
3127{
3128 int value;
3129
3130 switch (format) {
3131 case SNDRV_PCM_FORMAT_S16_LE:
3132 value = 0;
3133 break;
3134 case SNDRV_PCM_FORMAT_S24_LE:
3135 value = 1;
3136 break;
3137 case SNDRV_PCM_FORMAT_S24_3LE:
3138 value = 2;
3139 break;
3140 case SNDRV_PCM_FORMAT_S32_LE:
3141 value = 3;
3142 break;
3143 default:
3144 value = 0;
3145 break;
3146 }
3147 return value;
3148}
3149
3150static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3151 struct snd_ctl_elem_value *ucontrol)
3152{
3153 int idx = mi2s_get_port_idx(kcontrol);
3154
3155 if (idx < 0)
3156 return idx;
3157
3158 mi2s_rx_cfg[idx].sample_rate =
3159 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3160
3161 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3162 idx, mi2s_rx_cfg[idx].sample_rate,
3163 ucontrol->value.enumerated.item[0]);
3164
3165 return 0;
3166}
3167
3168static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3169 struct snd_ctl_elem_value *ucontrol)
3170{
3171 int idx = mi2s_get_port_idx(kcontrol);
3172
3173 if (idx < 0)
3174 return idx;
3175
3176 ucontrol->value.enumerated.item[0] =
3177 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3178
3179 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3180 idx, mi2s_rx_cfg[idx].sample_rate,
3181 ucontrol->value.enumerated.item[0]);
3182
3183 return 0;
3184}
3185
3186static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3187 struct snd_ctl_elem_value *ucontrol)
3188{
3189 int idx = mi2s_get_port_idx(kcontrol);
3190
3191 if (idx < 0)
3192 return idx;
3193
3194 mi2s_tx_cfg[idx].sample_rate =
3195 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3196
3197 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3198 idx, mi2s_tx_cfg[idx].sample_rate,
3199 ucontrol->value.enumerated.item[0]);
3200
3201 return 0;
3202}
3203
3204static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3205 struct snd_ctl_elem_value *ucontrol)
3206{
3207 int idx = mi2s_get_port_idx(kcontrol);
3208
3209 if (idx < 0)
3210 return idx;
3211
3212 ucontrol->value.enumerated.item[0] =
3213 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3214
3215 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3216 idx, mi2s_tx_cfg[idx].sample_rate,
3217 ucontrol->value.enumerated.item[0]);
3218
3219 return 0;
3220}
3221
3222static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3223 struct snd_ctl_elem_value *ucontrol)
3224{
3225 int idx = mi2s_get_port_idx(kcontrol);
3226
3227 if (idx < 0)
3228 return idx;
3229
3230 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3231 idx, mi2s_rx_cfg[idx].channels);
3232 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3233
3234 return 0;
3235}
3236
3237static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3238 struct snd_ctl_elem_value *ucontrol)
3239{
3240 int idx = mi2s_get_port_idx(kcontrol);
3241
3242 if (idx < 0)
3243 return idx;
3244
3245 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3246 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3247 idx, mi2s_rx_cfg[idx].channels);
3248
3249 return 1;
3250}
3251
3252static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3253 struct snd_ctl_elem_value *ucontrol)
3254{
3255 int idx = mi2s_get_port_idx(kcontrol);
3256
3257 if (idx < 0)
3258 return idx;
3259
3260 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3261 idx, mi2s_tx_cfg[idx].channels);
3262 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3263
3264 return 0;
3265}
3266
3267static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3268 struct snd_ctl_elem_value *ucontrol)
3269{
3270 int idx = mi2s_get_port_idx(kcontrol);
3271
3272 if (idx < 0)
3273 return idx;
3274
3275 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3276 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3277 idx, mi2s_tx_cfg[idx].channels);
3278
3279 return 1;
3280}
3281
3282static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3283 struct snd_ctl_elem_value *ucontrol)
3284{
3285 int idx = mi2s_get_port_idx(kcontrol);
3286
3287 if (idx < 0)
3288 return idx;
3289
3290 ucontrol->value.enumerated.item[0] =
3291 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3292
3293 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3294 idx, mi2s_rx_cfg[idx].bit_format,
3295 ucontrol->value.enumerated.item[0]);
3296
3297 return 0;
3298}
3299
3300static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3301 struct snd_ctl_elem_value *ucontrol)
3302{
3303 int idx = mi2s_get_port_idx(kcontrol);
3304
3305 if (idx < 0)
3306 return idx;
3307
3308 mi2s_rx_cfg[idx].bit_format =
3309 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3310
3311 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3312 idx, mi2s_rx_cfg[idx].bit_format,
3313 ucontrol->value.enumerated.item[0]);
3314
3315 return 0;
3316}
3317
3318static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3319 struct snd_ctl_elem_value *ucontrol)
3320{
3321 int idx = mi2s_get_port_idx(kcontrol);
3322
3323 if (idx < 0)
3324 return idx;
3325
3326 ucontrol->value.enumerated.item[0] =
3327 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3328
3329 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3330 idx, mi2s_tx_cfg[idx].bit_format,
3331 ucontrol->value.enumerated.item[0]);
3332
3333 return 0;
3334}
3335
3336static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3337 struct snd_ctl_elem_value *ucontrol)
3338{
3339 int idx = mi2s_get_port_idx(kcontrol);
3340
3341 if (idx < 0)
3342 return idx;
3343
3344 mi2s_tx_cfg[idx].bit_format =
3345 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3346
3347 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3348 idx, mi2s_tx_cfg[idx].bit_format,
3349 ucontrol->value.enumerated.item[0]);
3350
3351 return 0;
3352}
3353
3354static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3355 struct snd_ctl_elem_value *ucontrol)
3356{
3357 int idx = aux_pcm_get_port_idx(kcontrol);
3358
3359 if (idx < 0)
3360 return idx;
3361
3362 ucontrol->value.enumerated.item[0] =
3363 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3364
3365 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3366 idx, aux_pcm_rx_cfg[idx].bit_format,
3367 ucontrol->value.enumerated.item[0]);
3368
3369 return 0;
3370}
3371
3372static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3373 struct snd_ctl_elem_value *ucontrol)
3374{
3375 int idx = aux_pcm_get_port_idx(kcontrol);
3376
3377 if (idx < 0)
3378 return idx;
3379
3380 aux_pcm_rx_cfg[idx].bit_format =
3381 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3382
3383 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3384 idx, aux_pcm_rx_cfg[idx].bit_format,
3385 ucontrol->value.enumerated.item[0]);
3386
3387 return 0;
3388}
3389
3390static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3391 struct snd_ctl_elem_value *ucontrol)
3392{
3393 int idx = aux_pcm_get_port_idx(kcontrol);
3394
3395 if (idx < 0)
3396 return idx;
3397
3398 ucontrol->value.enumerated.item[0] =
3399 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3400
3401 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3402 idx, aux_pcm_tx_cfg[idx].bit_format,
3403 ucontrol->value.enumerated.item[0]);
3404
3405 return 0;
3406}
3407
3408static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3409 struct snd_ctl_elem_value *ucontrol)
3410{
3411 int idx = aux_pcm_get_port_idx(kcontrol);
3412
3413 if (idx < 0)
3414 return idx;
3415
3416 aux_pcm_tx_cfg[idx].bit_format =
3417 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3418
3419 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3420 idx, aux_pcm_tx_cfg[idx].bit_format,
3421 ucontrol->value.enumerated.item[0]);
3422
3423 return 0;
3424}
3425
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3426static int msm_hifi_ctrl(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3427{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3428 struct snd_soc_dapm_context *dapm =
3429 snd_soc_component_get_dapm(component);
3430 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3431 struct msm_asoc_mach_data *pdata =
3432 snd_soc_card_get_drvdata(card);
3433
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3434 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3435 msm_hifi_control);
3436
3437 if (!pdata || !pdata->hph_en1_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3438 dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
3439 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3440 return -EINVAL;
3441 }
3442 if (msm_hifi_control == MSM_HIFI_ON) {
3443 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3444 /* 5msec delay needed as per HW requirement */
3445 usleep_range(5000, 5010);
3446 } else {
3447 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3448 }
3449 snd_soc_dapm_sync(dapm);
3450
3451 return 0;
3452}
3453
3454static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3455 struct snd_ctl_elem_value *ucontrol)
3456{
3457 pr_debug("%s: msm_hifi_control = %d\n",
3458 __func__, msm_hifi_control);
3459 ucontrol->value.integer.value[0] = msm_hifi_control;
3460
3461 return 0;
3462}
3463
3464static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3465 struct snd_ctl_elem_value *ucontrol)
3466{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3467 struct snd_soc_component *component =
3468 snd_soc_kcontrol_component(kcontrol);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3469
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3470 dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3471 __func__, ucontrol->value.integer.value[0]);
3472
3473 msm_hifi_control = ucontrol->value.integer.value[0];
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3474 msm_hifi_ctrl(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3475
3476 return 0;
3477}
3478
3479static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3480 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3481 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3482 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3483 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3484 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3485 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3486 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3487 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3488 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3489 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3490 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3491 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3492 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3493 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3494 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3495 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3496 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3497 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3498 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3499 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3500 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3501 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3502 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3503 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3504 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3505 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3506 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3507 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3508 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3509 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3510 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3511 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3512 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3513 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3514 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3515 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3516 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3517 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3518 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3519 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3520 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3521 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3522 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3523 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3524 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3525 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3526 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3527 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3528 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3529 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3530 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3531 wsa_cdc_dma_rx_0_sample_rate,
3532 cdc_dma_rx_sample_rate_get,
3533 cdc_dma_rx_sample_rate_put),
3534 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3535 wsa_cdc_dma_rx_1_sample_rate,
3536 cdc_dma_rx_sample_rate_get,
3537 cdc_dma_rx_sample_rate_put),
3538 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3539 rx_cdc_dma_rx_0_sample_rate,
3540 cdc_dma_rx_sample_rate_get,
3541 cdc_dma_rx_sample_rate_put),
3542 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3543 rx_cdc_dma_rx_1_sample_rate,
3544 cdc_dma_rx_sample_rate_get,
3545 cdc_dma_rx_sample_rate_put),
3546 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3547 rx_cdc_dma_rx_2_sample_rate,
3548 cdc_dma_rx_sample_rate_get,
3549 cdc_dma_rx_sample_rate_put),
3550 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3551 rx_cdc_dma_rx_3_sample_rate,
3552 cdc_dma_rx_sample_rate_get,
3553 cdc_dma_rx_sample_rate_put),
3554 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3555 rx_cdc_dma_rx_5_sample_rate,
3556 cdc_dma_rx_sample_rate_get,
3557 cdc_dma_rx_sample_rate_put),
3558 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3559 wsa_cdc_dma_tx_0_sample_rate,
3560 cdc_dma_tx_sample_rate_get,
3561 cdc_dma_tx_sample_rate_put),
3562 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3563 wsa_cdc_dma_tx_1_sample_rate,
3564 cdc_dma_tx_sample_rate_get,
3565 cdc_dma_tx_sample_rate_put),
3566 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3567 wsa_cdc_dma_tx_2_sample_rate,
3568 cdc_dma_tx_sample_rate_get,
3569 cdc_dma_tx_sample_rate_put),
3570 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3571 tx_cdc_dma_tx_0_sample_rate,
3572 cdc_dma_tx_sample_rate_get,
3573 cdc_dma_tx_sample_rate_put),
3574 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3575 tx_cdc_dma_tx_3_sample_rate,
3576 cdc_dma_tx_sample_rate_get,
3577 cdc_dma_tx_sample_rate_put),
3578 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3579 tx_cdc_dma_tx_4_sample_rate,
3580 cdc_dma_tx_sample_rate_get,
3581 cdc_dma_tx_sample_rate_put),
3582};
3583
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3584static const struct snd_kcontrol_new msm_ext_snd_controls[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3585 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3586 slim_rx_ch_get, slim_rx_ch_put),
3587 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3588 slim_rx_ch_get, slim_rx_ch_put),
3589 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3590 slim_tx_ch_get, slim_tx_ch_put),
3591 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3592 slim_tx_ch_get, slim_tx_ch_put),
3593 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3594 slim_rx_ch_get, slim_rx_ch_put),
3595 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3596 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3597 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3598 slim_rx_bit_format_get, slim_rx_bit_format_put),
3599 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3600 slim_rx_bit_format_get, slim_rx_bit_format_put),
3601 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3602 slim_rx_bit_format_get, slim_rx_bit_format_put),
3603 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3604 slim_tx_bit_format_get, slim_tx_bit_format_put),
3605 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3606 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3607 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3608 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3609 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3610 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3611 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3612 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3613 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3614 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3615};
3616
3617static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3618 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3619 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3620 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3621 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3622 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3623 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3624 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3625 proxy_rx_ch_get, proxy_rx_ch_put),
3626 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3627 usb_audio_rx_format_get, usb_audio_rx_format_put),
3628 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3629 usb_audio_tx_format_get, usb_audio_tx_format_put),
3630 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3631 ext_disp_rx_format_get, ext_disp_rx_format_put),
3632 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3633 usb_audio_rx_sample_rate_get,
3634 usb_audio_rx_sample_rate_put),
3635 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3636 usb_audio_tx_sample_rate_get,
3637 usb_audio_tx_sample_rate_put),
3638 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3639 ext_disp_rx_sample_rate_get,
3640 ext_disp_rx_sample_rate_put),
3641 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3642 tdm_rx_sample_rate_get,
3643 tdm_rx_sample_rate_put),
3644 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3645 tdm_tx_sample_rate_get,
3646 tdm_tx_sample_rate_put),
3647 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3648 tdm_rx_format_get,
3649 tdm_rx_format_put),
3650 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3651 tdm_tx_format_get,
3652 tdm_tx_format_put),
3653 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3654 tdm_rx_ch_get,
3655 tdm_rx_ch_put),
3656 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3657 tdm_tx_ch_get,
3658 tdm_tx_ch_put),
3659 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3660 tdm_rx_sample_rate_get,
3661 tdm_rx_sample_rate_put),
3662 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3663 tdm_tx_sample_rate_get,
3664 tdm_tx_sample_rate_put),
3665 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3666 tdm_rx_format_get,
3667 tdm_rx_format_put),
3668 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3669 tdm_tx_format_get,
3670 tdm_tx_format_put),
3671 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3672 tdm_rx_ch_get,
3673 tdm_rx_ch_put),
3674 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3675 tdm_tx_ch_get,
3676 tdm_tx_ch_put),
3677 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3678 tdm_rx_sample_rate_get,
3679 tdm_rx_sample_rate_put),
3680 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3681 tdm_tx_sample_rate_get,
3682 tdm_tx_sample_rate_put),
3683 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3684 tdm_rx_format_get,
3685 tdm_rx_format_put),
3686 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3687 tdm_tx_format_get,
3688 tdm_tx_format_put),
3689 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3690 tdm_rx_ch_get,
3691 tdm_rx_ch_put),
3692 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3693 tdm_tx_ch_get,
3694 tdm_tx_ch_put),
3695 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3696 tdm_rx_sample_rate_get,
3697 tdm_rx_sample_rate_put),
3698 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3699 tdm_tx_sample_rate_get,
3700 tdm_tx_sample_rate_put),
3701 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3702 tdm_rx_format_get,
3703 tdm_rx_format_put),
3704 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3705 tdm_tx_format_get,
3706 tdm_tx_format_put),
3707 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3708 tdm_rx_ch_get,
3709 tdm_rx_ch_put),
3710 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3711 tdm_tx_ch_get,
3712 tdm_tx_ch_put),
3713 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3714 tdm_rx_sample_rate_get,
3715 tdm_rx_sample_rate_put),
3716 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3717 tdm_tx_sample_rate_get,
3718 tdm_tx_sample_rate_put),
3719 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3720 tdm_rx_format_get,
3721 tdm_rx_format_put),
3722 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3723 tdm_tx_format_get,
3724 tdm_tx_format_put),
3725 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3726 tdm_rx_ch_get,
3727 tdm_rx_ch_put),
3728 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3729 tdm_tx_ch_get,
3730 tdm_tx_ch_put),
3731 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3732 aux_pcm_rx_sample_rate_get,
3733 aux_pcm_rx_sample_rate_put),
3734 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3735 aux_pcm_rx_sample_rate_get,
3736 aux_pcm_rx_sample_rate_put),
3737 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3738 aux_pcm_rx_sample_rate_get,
3739 aux_pcm_rx_sample_rate_put),
3740 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3741 aux_pcm_rx_sample_rate_get,
3742 aux_pcm_rx_sample_rate_put),
3743 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3744 aux_pcm_rx_sample_rate_get,
3745 aux_pcm_rx_sample_rate_put),
3746 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3747 aux_pcm_tx_sample_rate_get,
3748 aux_pcm_tx_sample_rate_put),
3749 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3750 aux_pcm_tx_sample_rate_get,
3751 aux_pcm_tx_sample_rate_put),
3752 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3753 aux_pcm_tx_sample_rate_get,
3754 aux_pcm_tx_sample_rate_put),
3755 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3756 aux_pcm_tx_sample_rate_get,
3757 aux_pcm_tx_sample_rate_put),
3758 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3759 aux_pcm_tx_sample_rate_get,
3760 aux_pcm_tx_sample_rate_put),
3761 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3762 mi2s_rx_sample_rate_get,
3763 mi2s_rx_sample_rate_put),
3764 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3765 mi2s_rx_sample_rate_get,
3766 mi2s_rx_sample_rate_put),
3767 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3768 mi2s_rx_sample_rate_get,
3769 mi2s_rx_sample_rate_put),
3770 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3771 mi2s_rx_sample_rate_get,
3772 mi2s_rx_sample_rate_put),
3773 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3774 mi2s_rx_sample_rate_get,
3775 mi2s_rx_sample_rate_put),
3776 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3777 mi2s_tx_sample_rate_get,
3778 mi2s_tx_sample_rate_put),
3779 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3780 mi2s_tx_sample_rate_get,
3781 mi2s_tx_sample_rate_put),
3782 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3783 mi2s_tx_sample_rate_get,
3784 mi2s_tx_sample_rate_put),
3785 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3786 mi2s_tx_sample_rate_get,
3787 mi2s_tx_sample_rate_put),
3788 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3789 mi2s_tx_sample_rate_get,
3790 mi2s_tx_sample_rate_put),
3791 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3792 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3793 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3794 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3795 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3796 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3797 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3798 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3799 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3800 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3801 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3802 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3803 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3804 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3805 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3806 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3807 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3808 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3809 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3810 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3811 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3812 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3813 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3814 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3815 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3816 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3817 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3818 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3819 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3820 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3821 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3822 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3823 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3824 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3825 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3826 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3827 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3828 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3829 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3830 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3831 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3832 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3833 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3834 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3835 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3836 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3837 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3838 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3839 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3840 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3841 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3842 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3843 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3844 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3845 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3846 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3847 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3848 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3849 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3850 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3851 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3852 msm_hifi_put),
3853 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3854 msm_bt_sample_rate_get,
3855 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3856 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3857 msm_bt_sample_rate_rx_get,
3858 msm_bt_sample_rate_rx_put),
3859 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3860 msm_bt_sample_rate_tx_get,
3861 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3862 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3863 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3864};
3865
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3866static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3867 int enable, bool dapm)
3868{
3869 int ret = 0;
3870
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3871 if (!strcmp(component->name, "tavil_codec")) {
3872 ret = tavil_cdc_mclk_enable(component, enable);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3873 } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
3874 ret = tasha_cdc_mclk_enable(component, enable, dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3875 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3876 dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3877 __func__);
3878 ret = -EINVAL;
3879 }
3880 return ret;
3881}
3882
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3883static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3884 int enable, bool dapm)
3885{
3886 int ret = 0;
3887
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3888 if (!strcmp(component->name, "tavil_codec")) {
3889 ret = tavil_cdc_mclk_tx_enable(component, enable);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3890 } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
3891 ret = tasha_cdc_mclk_tx_enable(component, enable, dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3892 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3893 dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3894 __func__);
3895 ret = -EINVAL;
3896 }
3897
3898 return ret;
3899}
3900
3901static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3902 struct snd_kcontrol *kcontrol, int event)
3903{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3904 struct snd_soc_component *component =
3905 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3906
3907 pr_debug("%s: event = %d\n", __func__, event);
3908
3909 switch (event) {
3910 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3911 return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3912 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3913 return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3914 }
3915 return 0;
3916}
3917
3918static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3919 struct snd_kcontrol *kcontrol, int event)
3920{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3921 struct snd_soc_component *component =
3922 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3923
3924 pr_debug("%s: event = %d\n", __func__, event);
3925
3926 switch (event) {
3927 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3928 return msm_snd_enable_codec_ext_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3929 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3930 return msm_snd_enable_codec_ext_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3931 }
3932 return 0;
3933}
3934
3935static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3936 struct snd_kcontrol *k, int event)
3937{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3938 struct snd_soc_component *component =
3939 snd_soc_dapm_to_component(w->dapm);
3940 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3941 struct msm_asoc_mach_data *pdata =
3942 snd_soc_card_get_drvdata(card);
3943
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3944 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3945 __func__, msm_hifi_control);
3946
3947 if (!pdata || !pdata->hph_en0_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3948 dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
3949 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3950 return -EINVAL;
3951 }
3952
3953 if (msm_hifi_control != MSM_HIFI_ON) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3954 dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3955 __func__);
3956 return 0;
3957 }
3958
3959 switch (event) {
3960 case SND_SOC_DAPM_POST_PMU:
3961 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3962 break;
3963 case SND_SOC_DAPM_PRE_PMD:
3964 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3965 break;
3966 }
3967
3968 return 0;
3969}
3970
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3971static const struct snd_soc_dapm_widget msm_ext_dapm_widgets[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3972
3973 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3974 msm_mclk_event,
3975 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3976
3977 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3978 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3979
3980 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3981 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3982 SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
3983 SND_SOC_DAPM_SPK("Lineout_4 amp", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3984 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3985 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3986 SND_SOC_DAPM_MIC("Headset Mic", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3987 SND_SOC_DAPM_MIC("Secondary Mic", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3988 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3989 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3990 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3991 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3992 SND_SOC_DAPM_MIC("Analog Mic6", NULL),
3993 SND_SOC_DAPM_MIC("Analog Mic7", NULL),
3994 SND_SOC_DAPM_MIC("Analog Mic8", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3995
3996 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3997 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3998 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3999 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
4000 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
4001 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4002 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4003};
4004
4005static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4006 struct snd_kcontrol *kcontrol, int event)
4007{
4008 struct msm_asoc_mach_data *pdata = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4009 struct snd_soc_component *component =
4010 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4011 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4012 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4013 int *dmic_gpio_cnt;
4014 struct device_node *dmic_gpio;
4015 char *wname;
4016
4017 wname = strpbrk(w->name, "0123");
4018 if (!wname) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4019 dev_err(component->dev, "%s: widget not found\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4020 return -EINVAL;
4021 }
4022
4023 ret = kstrtouint(wname, 10, &dmic_idx);
4024 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4025 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4026 __func__);
4027 return -EINVAL;
4028 }
4029
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4030 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4031
4032 switch (dmic_idx) {
4033 case 0:
4034 case 1:
4035 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4036 dmic_gpio = pdata->dmic01_gpio_p;
4037 break;
4038 case 2:
4039 case 3:
4040 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4041 dmic_gpio = pdata->dmic23_gpio_p;
4042 break;
4043 default:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4044 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4045 __func__);
4046 return -EINVAL;
4047 }
4048
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4049 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4050 __func__, event, dmic_idx, *dmic_gpio_cnt);
4051
4052 switch (event) {
4053 case SND_SOC_DAPM_PRE_PMU:
4054 (*dmic_gpio_cnt)++;
4055 if (*dmic_gpio_cnt == 1) {
4056 ret = msm_cdc_pinctrl_select_active_state(
4057 dmic_gpio);
4058 if (ret < 0) {
4059 pr_err("%s: gpio set cannot be activated %sd",
4060 __func__, "dmic_gpio");
4061 return ret;
4062 }
4063 }
4064
4065 break;
4066 case SND_SOC_DAPM_POST_PMD:
4067 (*dmic_gpio_cnt)--;
4068 if (*dmic_gpio_cnt == 0) {
4069 ret = msm_cdc_pinctrl_select_sleep_state(
4070 dmic_gpio);
4071 if (ret < 0) {
4072 pr_err("%s: gpio set cannot be de-activated %sd",
4073 __func__, "dmic_gpio");
4074 return ret;
4075 }
4076 }
4077 break;
4078 default:
4079 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4080 return -EINVAL;
4081 }
4082 return 0;
4083}
4084
4085static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4086 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4087 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4088 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4089 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4090 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4091 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4092 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4093 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4094};
4095
4096static inline int param_is_mask(int p)
4097{
4098 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4099 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4100}
4101
4102static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4103 int n)
4104{
4105 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4106}
4107
4108static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4109 unsigned int bit)
4110{
4111 if (bit >= SNDRV_MASK_MAX)
4112 return;
4113 if (param_is_mask(n)) {
4114 struct snd_mask *m = param_to_mask(p, n);
4115
4116 m->bits[0] = 0;
4117 m->bits[1] = 0;
4118 m->bits[bit >> 5] |= (1 << (bit & 31));
4119 }
4120}
4121
4122static int msm_slim_get_ch_from_beid(int32_t be_id)
4123{
4124 int ch_id = 0;
4125
4126 switch (be_id) {
4127 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4128 ch_id = SLIM_RX_0;
4129 break;
4130 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4131 ch_id = SLIM_RX_1;
4132 break;
4133 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4134 ch_id = SLIM_RX_2;
4135 break;
4136 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4137 ch_id = SLIM_RX_3;
4138 break;
4139 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4140 ch_id = SLIM_RX_4;
4141 break;
4142 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4143 ch_id = SLIM_RX_6;
4144 break;
4145 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4146 ch_id = SLIM_TX_0;
4147 break;
4148 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4149 ch_id = SLIM_TX_3;
4150 break;
4151 default:
4152 ch_id = SLIM_RX_0;
4153 break;
4154 }
4155
4156 return ch_id;
4157}
4158
4159static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4160{
4161 int idx = 0;
4162
4163 switch (be_id) {
4164 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4165 idx = WSA_CDC_DMA_RX_0;
4166 break;
4167 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4168 idx = WSA_CDC_DMA_TX_0;
4169 break;
4170 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4171 idx = WSA_CDC_DMA_RX_1;
4172 break;
4173 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4174 idx = WSA_CDC_DMA_TX_1;
4175 break;
4176 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4177 idx = WSA_CDC_DMA_TX_2;
4178 break;
4179 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4180 idx = RX_CDC_DMA_RX_0;
4181 break;
4182 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4183 idx = RX_CDC_DMA_RX_1;
4184 break;
4185 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4186 idx = RX_CDC_DMA_RX_2;
4187 break;
4188 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4189 idx = RX_CDC_DMA_RX_3;
4190 break;
4191 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4192 idx = RX_CDC_DMA_RX_5;
4193 break;
4194 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4195 idx = TX_CDC_DMA_TX_0;
4196 break;
4197 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4198 idx = TX_CDC_DMA_TX_3;
4199 break;
4200 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4201 idx = TX_CDC_DMA_TX_4;
4202 break;
4203 default:
4204 idx = RX_CDC_DMA_RX_0;
4205 break;
4206 }
4207
4208 return idx;
4209}
4210
4211static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4212{
4213 int idx = -EINVAL;
4214
4215 switch (be_id) {
4216 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4217 idx = DP_RX_IDX;
4218 break;
4219 default:
4220 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4221 idx = -EINVAL;
4222 break;
4223 }
4224
4225 return idx;
4226}
4227
4228static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4229 struct snd_pcm_hw_params *params)
4230{
4231 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4232 struct snd_interval *rate = hw_param_interval(params,
4233 SNDRV_PCM_HW_PARAM_RATE);
4234 struct snd_interval *channels = hw_param_interval(params,
4235 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4236 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4237
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4238 int rc = 0;
4239 int idx;
4240 void *config = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4241 struct snd_soc_component *component = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4242
4243 pr_debug("%s: format = %d, rate = %d\n",
4244 __func__, params_format(params), params_rate(params));
4245
4246 switch (dai_link->id) {
4247 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4248 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4249 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4250 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4251 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4252 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4253 idx = msm_slim_get_ch_from_beid(dai_link->id);
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 slim_rx_cfg[idx].bit_format);
4256 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4257 channels->min = channels->max = slim_rx_cfg[idx].channels;
4258 break;
4259
4260 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4261 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4262 idx = msm_slim_get_ch_from_beid(dai_link->id);
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 slim_tx_cfg[idx].bit_format);
4265 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4266 channels->min = channels->max = slim_tx_cfg[idx].channels;
4267 break;
4268
4269 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4270 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4271 slim_tx_cfg[1].bit_format);
4272 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4273 channels->min = channels->max = slim_tx_cfg[1].channels;
4274 break;
4275
4276 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4277 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4278 SNDRV_PCM_FORMAT_S32_LE);
4279 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4280 channels->min = channels->max = msm_vi_feed_tx_ch;
4281 break;
4282
4283 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4284 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4285 slim_rx_cfg[5].bit_format);
4286 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4287 channels->min = channels->max = slim_rx_cfg[5].channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4291 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4292 if (!component) {
4293 pr_err("%s: component is NULL\n", __func__);
4294 rc = -EINVAL;
4295 goto done;
4296 }
4297
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4298 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4299 channels->min = channels->max = 1;
4300
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4301 config = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4302 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4303 if (config) {
4304 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4305 config, SLIMBUS_5_TX);
4306 if (rc)
4307 pr_err("%s: Failed to set slimbus slave port config %d\n",
4308 __func__, rc);
4309 }
4310 break;
4311
4312 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4313 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4314 slim_rx_cfg[SLIM_RX_7].bit_format);
4315 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4316 channels->min = channels->max =
4317 slim_rx_cfg[SLIM_RX_7].channels;
4318 break;
4319
4320 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4321 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4322 channels->min = channels->max =
4323 slim_tx_cfg[SLIM_TX_7].channels;
4324 break;
4325
4326 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4327 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4328 channels->min = channels->max =
4329 slim_tx_cfg[SLIM_TX_8].channels;
4330 break;
4331
4332 case MSM_BACKEND_DAI_USB_RX:
4333 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4334 usb_rx_cfg.bit_format);
4335 rate->min = rate->max = usb_rx_cfg.sample_rate;
4336 channels->min = channels->max = usb_rx_cfg.channels;
4337 break;
4338
4339 case MSM_BACKEND_DAI_USB_TX:
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 usb_tx_cfg.bit_format);
4342 rate->min = rate->max = usb_tx_cfg.sample_rate;
4343 channels->min = channels->max = usb_tx_cfg.channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4347 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4348 if (idx < 0) {
4349 pr_err("%s: Incorrect ext disp idx %d\n",
4350 __func__, idx);
4351 rc = idx;
4352 goto done;
4353 }
4354
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 ext_disp_rx_cfg[idx].bit_format);
4357 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4358 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4359 break;
4360
4361 case MSM_BACKEND_DAI_AFE_PCM_RX:
4362 channels->min = channels->max = proxy_rx_cfg.channels;
4363 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4364 break;
4365
4366 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4367 channels->min = channels->max =
4368 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4369 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4370 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4371 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4372 break;
4373
4374 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4375 channels->min = channels->max =
4376 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4377 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4378 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4379 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4380 break;
4381
4382 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4383 channels->min = channels->max =
4384 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4385 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4386 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4387 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4388 break;
4389
4390 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4391 channels->min = channels->max =
4392 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4393 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4394 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4395 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4396 break;
4397
4398 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4399 channels->min = channels->max =
4400 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4401 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4402 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4403 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4404 break;
4405
4406 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4407 channels->min = channels->max =
4408 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4409 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4410 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4411 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4412 break;
4413
4414 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4415 channels->min = channels->max =
4416 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4417 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4418 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4419 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4420 break;
4421
4422 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4423 channels->min = channels->max =
4424 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4425 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4426 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4427 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4428 break;
4429
4430 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4431 channels->min = channels->max =
4432 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4434 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4435 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4436 break;
4437
4438 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4439 channels->min = channels->max =
4440 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4441 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4442 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4443 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4444 break;
4445
4446
4447 case MSM_BACKEND_DAI_AUXPCM_RX:
4448 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4449 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4450 rate->min = rate->max =
4451 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4452 channels->min = channels->max =
4453 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4454 break;
4455
4456 case MSM_BACKEND_DAI_AUXPCM_TX:
4457 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4458 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4459 rate->min = rate->max =
4460 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4461 channels->min = channels->max =
4462 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4463 break;
4464
4465 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4466 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4467 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4468 rate->min = rate->max =
4469 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4470 channels->min = channels->max =
4471 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4472 break;
4473
4474 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4475 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4476 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4477 rate->min = rate->max =
4478 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4479 channels->min = channels->max =
4480 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4481 break;
4482
4483 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4484 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4485 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4486 rate->min = rate->max =
4487 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4488 channels->min = channels->max =
4489 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4490 break;
4491
4492 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4493 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4494 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4495 rate->min = rate->max =
4496 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4497 channels->min = channels->max =
4498 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4499 break;
4500
4501 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4502 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4503 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4504 rate->min = rate->max =
4505 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4506 channels->min = channels->max =
4507 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4508 break;
4509
4510 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4511 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4512 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4513 rate->min = rate->max =
4514 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4515 channels->min = channels->max =
4516 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4517 break;
4518
4519 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4520 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4521 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4522 rate->min = rate->max =
4523 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4524 channels->min = channels->max =
4525 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4526 break;
4527
4528 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4529 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4530 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4531 rate->min = rate->max =
4532 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4533 channels->min = channels->max =
4534 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4535 break;
4536
4537 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4538 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4539 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4540 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4541 channels->min = channels->max =
4542 mi2s_rx_cfg[PRIM_MI2S].channels;
4543 break;
4544
4545 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4546 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4547 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4548 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4549 channels->min = channels->max =
4550 mi2s_tx_cfg[PRIM_MI2S].channels;
4551 break;
4552
4553 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4554 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4555 mi2s_rx_cfg[SEC_MI2S].bit_format);
4556 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4557 channels->min = channels->max =
4558 mi2s_rx_cfg[SEC_MI2S].channels;
4559 break;
4560
4561 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4562 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4563 mi2s_tx_cfg[SEC_MI2S].bit_format);
4564 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4565 channels->min = channels->max =
4566 mi2s_tx_cfg[SEC_MI2S].channels;
4567 break;
4568
4569 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4570 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4571 mi2s_rx_cfg[TERT_MI2S].bit_format);
4572 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4573 channels->min = channels->max =
4574 mi2s_rx_cfg[TERT_MI2S].channels;
4575 break;
4576
4577 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4578 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4579 mi2s_tx_cfg[TERT_MI2S].bit_format);
4580 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4581 channels->min = channels->max =
4582 mi2s_tx_cfg[TERT_MI2S].channels;
4583 break;
4584
4585 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4586 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4587 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4588 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4589 channels->min = channels->max =
4590 mi2s_rx_cfg[QUAT_MI2S].channels;
4591 break;
4592
4593 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4594 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4595 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4596 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4597 channels->min = channels->max =
4598 mi2s_tx_cfg[QUAT_MI2S].channels;
4599 break;
4600
4601 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4602 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4603 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4604 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4605 channels->min = channels->max =
4606 mi2s_rx_cfg[QUIN_MI2S].channels;
4607 break;
4608
4609 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4610 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4611 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4612 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4613 channels->min = channels->max =
4614 mi2s_tx_cfg[QUIN_MI2S].channels;
4615 break;
4616
4617 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4618 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4619 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4620 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4621 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4622 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4623 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4624 cdc_dma_rx_cfg[idx].bit_format);
4625 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4626 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4627 break;
4628
4629 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4630 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4631 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4632 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4633 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4634 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4635 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4636 cdc_dma_tx_cfg[idx].bit_format);
4637 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4638 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4639 break;
4640
4641 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4642 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4643 SNDRV_PCM_FORMAT_S32_LE);
4644 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4645 channels->min = channels->max = msm_vi_feed_tx_ch;
4646 break;
4647
4648 default:
4649 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4650 break;
4651 }
4652
4653done:
4654 return rc;
4655}
4656
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4657static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
4658 bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4659{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4660 struct snd_soc_card *card = component->card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4661 struct msm_asoc_mach_data *pdata =
4662 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4663
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4664 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4665 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4666
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4667 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4668}
4669
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4670static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4671{
4672 int value = 0;
4673 bool ret = false;
4674 struct snd_soc_card *card;
4675 struct msm_asoc_mach_data *pdata;
4676
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4677 if (!component) {
4678 pr_err("%s component is NULL\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4679 return false;
4680 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4681 card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4682 pdata = snd_soc_card_get_drvdata(card);
4683
4684 if (!pdata)
4685 return false;
4686
4687 if (wcd_mbhc_cfg.enable_usbc_analog)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4688 return msm_usbc_swap_gnd_mic(component, active);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4689
4690 /* if usbc is not defined, swap using us_euro_gpio_p */
4691 if (pdata->us_euro_gpio_p) {
4692 value = msm_cdc_pinctrl_get_state(
4693 pdata->us_euro_gpio_p);
4694 if (value)
4695 msm_cdc_pinctrl_select_sleep_state(
4696 pdata->us_euro_gpio_p);
4697 else
4698 msm_cdc_pinctrl_select_active_state(
4699 pdata->us_euro_gpio_p);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4700 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4701 __func__, value, !value);
4702 ret = true;
4703 }
4704 return ret;
4705}
4706
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4707static int msm_afe_set_config(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4708{
4709 int ret = 0;
4710 void *config_data = NULL;
4711
4712 if (!msm_codec_fn.get_afe_config_fn) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4713 dev_err(component->dev, "%s: codec get afe config not init'ed\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4714 __func__);
4715 return -EINVAL;
4716 }
4717
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4718 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4719 AFE_CDC_REGISTERS_CONFIG);
4720 if (config_data) {
4721 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4722 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4723 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4724 "%s: Failed to set codec registers config %d\n",
4725 __func__, ret);
4726 return ret;
4727 }
4728 }
4729
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4730 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4731 AFE_CDC_REGISTER_PAGE_CONFIG);
4732 if (config_data) {
4733 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4734 0);
4735 if (ret)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4736 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4737 "%s: Failed to set cdc register page config\n",
4738 __func__);
4739 }
4740
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4741 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4742 AFE_SLIMBUS_SLAVE_CONFIG);
4743 if (config_data) {
4744 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4745 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4746 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4747 "%s: Failed to set slimbus slave config %d\n",
4748 __func__, ret);
4749 return ret;
4750 }
4751 }
4752
4753 return 0;
4754}
4755
4756static void msm_afe_clear_config(void)
4757{
4758 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4759 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4760}
4761
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4762static int msm_config_hph_en0_gpio(struct snd_soc_component *component, bool high)
4763{
4764 struct snd_soc_card *card = component->card;
4765 struct msm_asoc_mach_data *pdata;
4766 int val;
4767
4768 if (!card)
4769 return 0;
4770
4771 pdata = snd_soc_card_get_drvdata(card);
4772 if (!pdata || !gpio_is_valid(pdata->hph_en0_gpio))
4773 return 0;
4774
4775 val = gpio_get_value_cansleep(pdata->hph_en0_gpio);
4776 if ((!!val) == high)
4777 return 0;
4778
4779 gpio_direction_output(pdata->hph_en0_gpio, (int)high);
4780
4781 return 1;
4782}
4783
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4784static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4785{
4786 int ret = 0;
4787 void *config_data;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4788 struct snd_soc_component *component = NULL;
4789 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4790 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4791 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4792 struct snd_soc_component *aux_comp;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4793 struct snd_card *card = rtd->card->snd_card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4794 struct snd_info_entry *entry;
4795 struct msm_asoc_mach_data *pdata =
4796 snd_soc_card_get_drvdata(rtd->card);
4797
4798 /*
4799 * Codec SLIMBUS configuration
4800 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4801 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4802 * TX14, TX15, TX16
4803 */
4804 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4805 150, 151};
4806 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4807 134, 135, 136, 137, 138, 139,
4808 140, 141, 142, 143};
4809
4810 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4811
4812 rtd->pmdown_time = 0;
4813
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4814 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4815 if (!component) {
4816 pr_err("%s: component is NULL\n", __func__);
4817 return -EINVAL;
4818 }
4819 dapm = snd_soc_component_get_dapm(component);
4820
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4821 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
4822 ARRAY_SIZE(msm_ext_snd_controls));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4823 if (ret < 0) {
4824 pr_err("%s: add_codec_controls failed, err %d\n",
4825 __func__, ret);
4826 return ret;
4827 }
4828
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4829 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4830 ARRAY_SIZE(msm_common_snd_controls));
4831 if (ret < 0) {
4832 pr_err("%s: add_codec_controls failed, err %d\n",
4833 __func__, ret);
4834 return ret;
4835 }
4836
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4837 snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
4838 ARRAY_SIZE(msm_ext_dapm_widgets));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4839
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4840 snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
4841 ARRAY_SIZE(wcd_audio_paths));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4842
4843 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4844 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4845 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4846 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4847 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4848 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4849 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4850 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4851 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4852 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4853 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4854 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4855 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4856 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4857 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4858 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4859 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4860 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4861 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4862 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4863 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4864 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4865 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4866 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4867 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4868 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4869 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4870
4871 snd_soc_dapm_sync(dapm);
4872
4873 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4874 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4875
4876 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4877
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4878 ret = msm_afe_set_config(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4879 if (ret) {
4880 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4881 goto err;
4882 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4883 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4884
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4885 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4886 AFE_AANC_VERSION);
4887 if (config_data) {
4888 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4889 if (ret) {
4890 pr_err("%s: Failed to set aanc version %d\n",
4891 __func__, ret);
4892 goto err;
4893 }
4894 }
4895
4896 /*
4897 * Send speaker configuration only for WSA8810.
4898 * Default configuration is for WSA8815.
4899 */
4900 pr_debug("%s: Number of aux devices: %d\n",
4901 __func__, rtd->card->num_aux_devs);
4902 if (rtd->card->num_aux_devs &&
4903 !list_empty(&rtd->card->aux_comp_list)) {
4904 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4905 struct snd_soc_component, card_aux_list);
4906 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4907 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4908 tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
4909 tavil_set_spkr_gain_offset(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4910 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4911 }
4912 }
4913
4914 card = rtd->card->snd_card;
Aditya Bavanari5b2d30f2019-01-28 20:17:32 +0530[diff] [blame^]4915 if (!pdata->codec_root) {
4916 entry = snd_info_create_subdir(card->module, "codecs",
4917 card->proc_root);
4918 if (!entry) {
4919 pr_debug("%s: Cannot create codecs module entry\n",
4920 __func__);
4921 ret = 0;
4922 goto err;
4923 }
4924 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4925 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4926 tavil_codec_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4927
4928 codec_reg_done = true;
4929 return 0;
4930err:
4931 return ret;
4932}
4933
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4934static int msm_audrx_tasha_init(struct snd_soc_pcm_runtime *rtd)
4935{
4936 int ret = 0;
4937 void *config_data;
4938 struct snd_soc_component *component = NULL;
4939 struct snd_soc_dapm_context *dapm;
4940 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4941 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4942 struct snd_soc_component *aux_comp;
4943 struct snd_card *card;
4944 struct snd_info_entry *entry;
4945 struct msm_asoc_mach_data *pdata =
4946 snd_soc_card_get_drvdata(rtd->card);
4947
4948 /* Codec SLIMBUS configuration
4949 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
4950 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4951 * TX14, TX15, TX16
4952 */
4953 unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
4954 151, 152, 153, 154, 155, 156};
4955 unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
4956 134, 135, 136, 137, 138, 139,
4957 140, 141, 142, 143};
4958
4959 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4960
4961 rtd->pmdown_time = 0;
4962
4963 component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
4964 if (!component) {
4965 pr_err("%s: component is NULL\n", __func__);
4966 return -EINVAL;
4967 }
4968
4969 dapm = snd_soc_component_get_dapm(component);
4970
4971 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
4972 ARRAY_SIZE(msm_ext_snd_controls));
4973 if (ret < 0) {
4974 pr_err("%s: add_component_controls failed, err %d\n",
4975 __func__, ret);
4976 return ret;
4977 }
4978
4979 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4980 ARRAY_SIZE(msm_common_snd_controls));
4981 if (ret < 0) {
4982 pr_err("%s: add_component_controls failed, err %d\n",
4983 __func__, ret);
4984 return ret;
4985 }
4986
4987 snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
4988 ARRAY_SIZE(msm_ext_dapm_widgets));
4989
4990 snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
4991 ARRAY_SIZE(wcd_audio_paths));
4992
4993 snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp");
4994 snd_soc_dapm_enable_pin(dapm, "Lineout_2 amp");
4995 snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp");
4996 snd_soc_dapm_enable_pin(dapm, "Lineout_4 amp");
4997
4998 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4999 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
5000 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
5001 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
5002 snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
5003 snd_soc_dapm_ignore_suspend(dapm, "Lineout_1 amp");
5004 snd_soc_dapm_ignore_suspend(dapm, "Lineout_2 amp");
5005 snd_soc_dapm_ignore_suspend(dapm, "Lineout_3 amp");
5006 snd_soc_dapm_ignore_suspend(dapm, "Lineout_4 amp");
5007 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
5008 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
5009 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5010 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5011 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5012 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
5013 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5014 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
5015 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
5016 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6");
5017 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic7");
5018 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic8");
5019
5020 snd_soc_dapm_ignore_suspend(dapm, "EAR");
5021 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
5022 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
5023 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
5024 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
5025 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
5026 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
5027 snd_soc_dapm_ignore_suspend(dapm, "AMIC5");
5028 snd_soc_dapm_ignore_suspend(dapm, "DMIC0");
5029 snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
5030 snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
5031 snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
5032 snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
5033 snd_soc_dapm_ignore_suspend(dapm, "DMIC5");
5034 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
5035 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
5036 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
5037 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
5038 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
5039 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
5040 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
5041
5042 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3");
5043 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4");
5044 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
5045 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
5046 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1");
5047 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2");
5048
5049 snd_soc_dapm_sync(dapm);
5050
5051 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5052 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5053
5054 msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
5055
5056 ret = msm_afe_set_config(component);
5057 if (ret) {
5058 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
5059 goto err;
5060 }
5061 pdata->is_afe_config_done = true;
5062
5063 config_data = msm_codec_fn.get_afe_config_fn(component,
5064 AFE_AANC_VERSION);
5065 if (config_data) {
5066 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
5067 if (ret) {
5068 pr_err("%s: Failed to set aanc version %d\n",
5069 __func__, ret);
5070 goto err;
5071 }
5072 }
5073
5074 /*
5075 * Send speaker configuration only for WSA8810.
5076 * Default configuration is for WSA8815.
5077 */
5078 pr_debug("%s: Number of aux devices: %d\n",
5079 __func__, rtd->card->num_aux_devs);
5080 if (rtd->card->num_aux_devs &&
5081 !list_empty(&rtd->card->aux_comp_list)) {
5082 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
5083 struct snd_soc_component, card_aux_list);
5084 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5085 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
5086 tasha_set_spkr_mode(component, SPKR_MODE_1);
5087 tasha_set_spkr_gain_offset(component,
5088 RX_GAIN_OFFSET_M1P5_DB);
5089 }
5090 }
5091
5092 card = rtd->card->snd_card;
Aditya Bavanari5b2d30f2019-01-28 20:17:32 +0530[diff] [blame^]5093 if (!pdata->codec_root) {
5094 entry = snd_info_create_subdir(card->module, "codecs",
5095 card->proc_root);
5096 if (!entry) {
5097 pr_debug("%s: Cannot create codecs module entry\n",
5098 __func__);
5099 ret = 0;
5100 goto err;
5101 }
5102 pdata->codec_root = entry;
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5103 }
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5104 tasha_codec_info_create_codec_entry(pdata->codec_root, component);
5105 tasha_mbhc_zdet_gpio_ctrl(msm_config_hph_en0_gpio, component);
5106
5107 codec_reg_done = true;
5108 return 0;
5109err:
5110 return ret;
5111}
5112
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5113static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5114{
5115 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5116 struct snd_soc_component *component;
5117 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5118 struct snd_card *card;
5119 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5120 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5121 struct msm_asoc_mach_data *pdata =
5122 snd_soc_card_get_drvdata(rtd->card);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5123 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5124
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5125 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5126 if (!component) {
5127 pr_err("%s: component is NULL\n", __func__);
5128 return -EINVAL;
5129 }
5130 dapm = snd_soc_component_get_dapm(component);
5131
5132 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5133 ARRAY_SIZE(msm_int_snd_controls));
5134 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5135 pr_err("%s: add_component_controls failed: %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5136 __func__, ret);
5137 return ret;
5138 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5139 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5140 ARRAY_SIZE(msm_common_snd_controls));
5141 if (ret < 0) {
5142 pr_err("%s: add common snd controls failed: %d\n",
5143 __func__, ret);
5144 return ret;
5145 }
5146
5147 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5148 ARRAY_SIZE(msm_int_dapm_widgets));
5149
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5150 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5151 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5152 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5153 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5154
5155 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5156 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5157 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5158 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
5159
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5160 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5161 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5162 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5163 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5164
5165 snd_soc_dapm_sync(dapm);
5166
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5167 /*
5168 * Send speaker configuration only for WSA8810.
5169 * Default configuration is for WSA8815.
5170 */
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5171 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5172 __func__, rtd->card->num_aux_devs);
5173 if (rtd->card->num_aux_devs &&
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5174 !list_empty(&rtd->card->aux_comp_list)) {
5175 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
5176 struct snd_soc_component, card_aux_list);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5177 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5178 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5179 wsa_macro_set_spkr_mode(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5180 WSA_MACRO_SPKR_MODE_1);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5181 wsa_macro_set_spkr_gain_offset(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5182 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5183 }
5184 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5185 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]5186 if (!pdata->codec_root) {
5187 entry = snd_info_create_subdir(card->module, "codecs",
5188 card->proc_root);
5189 if (!entry) {
5190 pr_debug("%s: Cannot create codecs module entry\n",
5191 __func__);
5192 ret = 0;
5193 goto err;
5194 }
5195 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5196 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5197 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5198 /*
5199 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
5200 * from AOSS to APSS. So, it uses SW workaround and listens to
5201 * interrupt from AFE over IPC.
5202 * Check for MSM version and MSM ID and register wake irq
5203 * accordingly to provide compatibility to all chipsets.
5204 */
5205 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
5206 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5207 bolero_register_wake_irq(component, true);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5208 else
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5209 bolero_register_wake_irq(component, false);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5210
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5211 codec_reg_done = true;
5212 return 0;
5213err:
5214 return ret;
5215}
5216
5217static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5218{
5219 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5220 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
5221 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5222
5223 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5224 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5225}
5226
5227static void *def_wcd_mbhc_cal(void)
5228{
5229 void *wcd_mbhc_cal;
5230 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5231 u16 *btn_high;
5232
5233 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5234 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5235 if (!wcd_mbhc_cal)
5236 return NULL;
5237
5238#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5239 S(v_hs_max, 1600);
5240#undef S
5241#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5242 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5243#undef S
5244
5245 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5246 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5247 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5248
5249 btn_high[0] = 75;
5250 btn_high[1] = 150;
5251 btn_high[2] = 237;
5252 btn_high[3] = 500;
5253 btn_high[4] = 500;
5254 btn_high[5] = 500;
5255 btn_high[6] = 500;
5256 btn_high[7] = 500;
5257
5258 return wcd_mbhc_cal;
5259}
5260
5261static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5262 struct snd_pcm_hw_params *params)
5263{
5264 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5265 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5266 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5267 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5268
5269 int ret = 0;
5270 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5271 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5272 u32 user_set_tx_ch = 0;
5273 u32 rx_ch_count;
5274
5275 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5276 ret = snd_soc_dai_get_channel_map(codec_dai,
5277 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5278 if (ret < 0) {
5279 pr_err("%s: failed to get codec chan map, err:%d\n",
5280 __func__, ret);
5281 goto err;
5282 }
5283 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5284 pr_debug("%s: rx_5_ch=%d\n", __func__,
5285 slim_rx_cfg[5].channels);
5286 rx_ch_count = slim_rx_cfg[5].channels;
5287 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5288 pr_debug("%s: rx_2_ch=%d\n", __func__,
5289 slim_rx_cfg[2].channels);
5290 rx_ch_count = slim_rx_cfg[2].channels;
5291 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5292 pr_debug("%s: rx_6_ch=%d\n", __func__,
5293 slim_rx_cfg[6].channels);
5294 rx_ch_count = slim_rx_cfg[6].channels;
5295 } else {
5296 pr_debug("%s: rx_0_ch=%d\n", __func__,
5297 slim_rx_cfg[0].channels);
5298 rx_ch_count = slim_rx_cfg[0].channels;
5299 }
5300 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5301 rx_ch_count, rx_ch);
5302 if (ret < 0) {
5303 pr_err("%s: failed to set cpu chan map, err:%d\n",
5304 __func__, ret);
5305 goto err;
5306 }
5307 } else {
5308
5309 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5310 codec_dai->name, codec_dai->id, user_set_tx_ch);
5311 ret = snd_soc_dai_get_channel_map(codec_dai,
5312 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5313 if (ret < 0) {
5314 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5315 __func__, ret);
5316 goto err;
5317 }
5318 /* For <codec>_tx1 case */
5319 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5320 user_set_tx_ch = slim_tx_cfg[0].channels;
5321 /* For <codec>_tx3 case */
5322 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5323 user_set_tx_ch = slim_tx_cfg[1].channels;
5324 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5325 user_set_tx_ch = msm_vi_feed_tx_ch;
5326 else
5327 user_set_tx_ch = tx_ch_cnt;
5328
5329 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5330 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5331 tx_ch_cnt, dai_link->id);
5332
5333 ret = snd_soc_dai_set_channel_map(cpu_dai,
5334 user_set_tx_ch, tx_ch, 0, 0);
5335 if (ret < 0)
5336 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5337 __func__, ret);
5338 }
5339
5340err:
5341 return ret;
5342}
5343
5344
5345static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5346 struct snd_pcm_hw_params *params)
5347{
5348 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5349 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5350 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5351 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5352
5353 int ret = 0;
5354 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5355 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5356 u32 user_set_tx_ch = 0;
5357 u32 user_set_rx_ch = 0;
5358 u32 ch_id;
5359
5360 ret = snd_soc_dai_get_channel_map(codec_dai,
5361 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5362 &rx_ch_cdc_dma);
5363 if (ret < 0) {
5364 pr_err("%s: failed to get codec chan map, err:%d\n",
5365 __func__, ret);
5366 goto err;
5367 }
5368
5369 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5370 switch (dai_link->id) {
5371 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5372 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5373 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5374 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5375 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5376 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5377 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5378 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5379 {
5380 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5381 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5382 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5383 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5384 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5385 user_set_rx_ch, &rx_ch_cdc_dma);
5386 if (ret < 0) {
5387 pr_err("%s: failed to set cpu chan map, err:%d\n",
5388 __func__, ret);
5389 goto err;
5390 }
5391
5392 }
5393 break;
5394 }
5395 } else {
5396 switch (dai_link->id) {
5397 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5398 {
5399 user_set_tx_ch = msm_vi_feed_tx_ch;
5400 }
5401 break;
5402 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5403 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5404 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5405 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5406 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5407 {
5408 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5409 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5410 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5411 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5412 }
5413 break;
5414 }
5415
5416 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5417 &tx_ch_cdc_dma, 0, 0);
5418 if (ret < 0) {
5419 pr_err("%s: failed to set cpu chan map, err:%d\n",
5420 __func__, ret);
5421 goto err;
5422 }
5423 }
5424
5425err:
5426 return ret;
5427}
5428
5429static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5430 struct snd_pcm_hw_params *params)
5431{
5432 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5433 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5434 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5435 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5436 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5437 unsigned int num_tx_ch = 0;
5438 unsigned int num_rx_ch = 0;
5439 int ret = 0;
5440
5441 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5442 num_rx_ch = params_channels(params);
5443 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5444 codec_dai->name, codec_dai->id, num_rx_ch);
5445 ret = snd_soc_dai_get_channel_map(codec_dai,
5446 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5447 if (ret < 0) {
5448 pr_err("%s: failed to get codec chan map, err:%d\n",
5449 __func__, ret);
5450 goto err;
5451 }
5452 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5453 num_rx_ch, rx_ch);
5454 if (ret < 0) {
5455 pr_err("%s: failed to set cpu chan map, err:%d\n",
5456 __func__, ret);
5457 goto err;
5458 }
5459 } else {
5460 num_tx_ch = params_channels(params);
5461 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5462 codec_dai->name, codec_dai->id, num_tx_ch);
5463 ret = snd_soc_dai_get_channel_map(codec_dai,
5464 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5465 if (ret < 0) {
5466 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5467 __func__, ret);
5468 goto err;
5469 }
5470 ret = snd_soc_dai_set_channel_map(cpu_dai,
5471 num_tx_ch, tx_ch, 0, 0);
5472 if (ret < 0) {
5473 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5474 __func__, ret);
5475 goto err;
5476 }
5477 }
5478
5479err:
5480 return ret;
5481}
5482
5483static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5484 struct snd_pcm_hw_params *params)
5485{
5486 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5487 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5488 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5489 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5490 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5491 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5492 int ret;
5493
5494 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5495 codec_dai->name, codec_dai->id);
5496 ret = snd_soc_dai_get_channel_map(codec_dai,
5497 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5498 if (ret) {
5499 dev_err(rtd->dev,
5500 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5501 __func__, ret);
5502 goto err;
5503 }
5504
5505 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5506 __func__, tx_ch_cnt, dai_link->id);
5507
5508 ret = snd_soc_dai_set_channel_map(cpu_dai,
5509 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5510 if (ret)
5511 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5512 __func__, ret);
5513
5514err:
5515 return ret;
5516}
5517
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5518int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream,
5519 struct snd_pcm_hw_params *params)
5520{
5521 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5522 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5523 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5524 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5525 int ret = 0;
5526 u32 tx_ch[SLIM_MAX_TX_PORTS];
5527 u32 tx_ch_cnt = 0;
5528
5529 if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) {
5530 pr_err("%s: Invalid stream type %d\n",
5531 __func__, substream->stream);
5532 ret = -EINVAL;
5533 goto end;
5534 }
5535
5536 pr_debug("%s: %s_tx_dai_id_%d\n", __func__,
5537 codec_dai->name, codec_dai->id);
5538 ret = snd_soc_dai_get_channel_map(codec_dai,
5539 &tx_ch_cnt, tx_ch, NULL, NULL);
5540 if (ret < 0) {
5541 pr_err("%s: failed to get codec chan map\n, err:%d\n",
5542 __func__, ret);
5543 goto end;
5544 }
5545
5546 pr_debug("%s: tx_ch_cnt(%d) id %d\n",
5547 __func__, tx_ch_cnt, dai_link->id);
5548
5549 ret = snd_soc_dai_set_channel_map(cpu_dai,
5550 tx_ch_cnt, tx_ch, 0, 0);
5551 if (ret < 0) {
5552 pr_err("%s: failed to set cpu chan map, err:%d\n",
5553 __func__, ret);
5554 goto end;
5555 }
5556end:
5557 return ret;
5558}
5559
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5560static int msm_get_port_id(int be_id)
5561{
5562 int afe_port_id;
5563
5564 switch (be_id) {
5565 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5566 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5567 break;
5568 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5569 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5570 break;
5571 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5572 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5573 break;
5574 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5575 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5576 break;
5577 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5578 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5579 break;
5580 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5581 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5582 break;
5583 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5584 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5585 break;
5586 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5587 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5588 break;
5589 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5590 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5591 break;
5592 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5593 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5594 break;
5595 default:
5596 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5597 afe_port_id = -EINVAL;
5598 }
5599
5600 return afe_port_id;
5601}
5602
5603static u32 get_mi2s_bits_per_sample(u32 bit_format)
5604{
5605 u32 bit_per_sample;
5606
5607 switch (bit_format) {
5608 case SNDRV_PCM_FORMAT_S32_LE:
5609 case SNDRV_PCM_FORMAT_S24_3LE:
5610 case SNDRV_PCM_FORMAT_S24_LE:
5611 bit_per_sample = 32;
5612 break;
5613 case SNDRV_PCM_FORMAT_S16_LE:
5614 default:
5615 bit_per_sample = 16;
5616 break;
5617 }
5618
5619 return bit_per_sample;
5620}
5621
5622static void update_mi2s_clk_val(int dai_id, int stream)
5623{
5624 u32 bit_per_sample;
5625
5626 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5627 bit_per_sample =
5628 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5629 mi2s_clk[dai_id].clk_freq_in_hz =
5630 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5631 } else {
5632 bit_per_sample =
5633 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5634 mi2s_clk[dai_id].clk_freq_in_hz =
5635 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5636 }
5637}
5638
5639static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5640{
5641 int ret = 0;
5642 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5643 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5644 int port_id = 0;
5645 int index = cpu_dai->id;
5646
5647 port_id = msm_get_port_id(rtd->dai_link->id);
5648 if (port_id < 0) {
5649 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5650 ret = port_id;
5651 goto err;
5652 }
5653
5654 if (enable) {
5655 update_mi2s_clk_val(index, substream->stream);
5656 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5657 mi2s_clk[index].clk_freq_in_hz);
5658 }
5659
5660 mi2s_clk[index].enable = enable;
5661 ret = afe_set_lpass_clock_v2(port_id,
5662 &mi2s_clk[index]);
5663 if (ret < 0) {
5664 dev_err(rtd->card->dev,
5665 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5666 __func__, port_id, ret);
5667 goto err;
5668 }
5669
5670err:
5671 return ret;
5672}
5673
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5674static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5675 struct snd_pcm_hw_params *params)
5676{
5677 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5678 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5679 int ret = 0;
5680 int slot_width = 32;
5681 int channels, slots;
5682 unsigned int slot_mask, rate, clk_freq;
5683 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5684
5685 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5686
5687 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5688 switch (cpu_dai->id) {
5689 case AFE_PORT_ID_PRIMARY_TDM_RX:
5690 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5691 break;
5692 case AFE_PORT_ID_SECONDARY_TDM_RX:
5693 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5694 break;
5695 case AFE_PORT_ID_TERTIARY_TDM_RX:
5696 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5697 break;
5698 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5699 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5700 break;
5701 case AFE_PORT_ID_QUINARY_TDM_RX:
5702 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5703 break;
5704 case AFE_PORT_ID_PRIMARY_TDM_TX:
5705 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5706 break;
5707 case AFE_PORT_ID_SECONDARY_TDM_TX:
5708 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5709 break;
5710 case AFE_PORT_ID_TERTIARY_TDM_TX:
5711 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5712 break;
5713 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5714 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5715 break;
5716 case AFE_PORT_ID_QUINARY_TDM_TX:
5717 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5718 break;
5719
5720 default:
5721 pr_err("%s: dai id 0x%x not supported\n",
5722 __func__, cpu_dai->id);
5723 return -EINVAL;
5724 }
5725
5726 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5727 /*2 slot config - bits 0 and 1 set for the first two slots */
5728 slot_mask = 0x0000FFFF >> (16-slots);
5729 channels = slots;
5730
5731 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5732 __func__, slot_width, slots);
5733
5734 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5735 slots, slot_width);
5736 if (ret < 0) {
5737 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5738 __func__, ret);
5739 goto end;
5740 }
5741
5742 ret = snd_soc_dai_set_channel_map(cpu_dai,
5743 0, NULL, channels, slot_offset);
5744 if (ret < 0) {
5745 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5746 __func__, ret);
5747 goto end;
5748 }
5749 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5750 /*2 slot config - bits 0 and 1 set for the first two slots */
5751 slot_mask = 0x0000FFFF >> (16-slots);
5752 channels = slots;
5753
5754 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5755 __func__, slot_width, slots);
5756
5757 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5758 slots, slot_width);
5759 if (ret < 0) {
5760 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5761 __func__, ret);
5762 goto end;
5763 }
5764
5765 ret = snd_soc_dai_set_channel_map(cpu_dai,
5766 channels, slot_offset, 0, NULL);
5767 if (ret < 0) {
5768 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5769 __func__, ret);
5770 goto end;
5771 }
5772 } else {
5773 ret = -EINVAL;
5774 pr_err("%s: invalid use case, err:%d\n",
5775 __func__, ret);
5776 goto end;
5777 }
5778
5779 rate = params_rate(params);
5780 clk_freq = rate * slot_width * slots;
5781 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5782 if (ret < 0)
5783 pr_err("%s: failed to set tdm clk, err:%d\n",
5784 __func__, ret);
5785
5786end:
5787 return ret;
5788}
5789
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5790static int msm_get_tdm_mode(u32 port_id)
5791{
5792 int tdm_mode;
5793
5794 switch (port_id) {
5795 case AFE_PORT_ID_PRIMARY_TDM_RX:
5796 case AFE_PORT_ID_PRIMARY_TDM_TX:
5797 tdm_mode = TDM_PRI;
5798 break;
5799 case AFE_PORT_ID_SECONDARY_TDM_RX:
5800 case AFE_PORT_ID_SECONDARY_TDM_TX:
5801 tdm_mode = TDM_SEC;
5802 break;
5803 case AFE_PORT_ID_TERTIARY_TDM_RX:
5804 case AFE_PORT_ID_TERTIARY_TDM_TX:
5805 tdm_mode = TDM_TERT;
5806 break;
5807 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5808 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5809 tdm_mode = TDM_QUAT;
5810 break;
5811 case AFE_PORT_ID_QUINARY_TDM_RX:
5812 case AFE_PORT_ID_QUINARY_TDM_TX:
5813 tdm_mode = TDM_QUIN;
5814 break;
5815 default:
5816 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
5817 tdm_mode = -EINVAL;
5818 }
5819 return tdm_mode;
5820}
5821
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5822static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5823{
5824 int ret = 0;
5825 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5826 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5827 struct snd_soc_card *card = rtd->card;
5828 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5829 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5830
5831 if (tdm_mode < 0) {
5832 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5833 return tdm_mode;
5834 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5835
5836 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5837 if (pdata->mi2s_gpio_p[tdm_mode])
5838 ret = msm_cdc_pinctrl_select_active_state(
5839 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5840
5841 return ret;
5842}
5843
5844static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5845{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5846 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5847 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5848 struct snd_soc_card *card = rtd->card;
5849 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5850 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5851
5852 if (tdm_mode < 0) {
5853 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5854 return;
5855 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5856
5857 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5858 if (pdata->mi2s_gpio_p[tdm_mode])
5859 msm_cdc_pinctrl_select_sleep_state(
5860 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5861}
5862
5863static struct snd_soc_ops sm6150_tdm_be_ops = {
5864 .hw_params = sm6150_tdm_snd_hw_params,
5865 .startup = sm6150_tdm_snd_startup,
5866 .shutdown = sm6150_tdm_snd_shutdown
5867};
5868
5869static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5870{
5871 cpumask_t mask;
5872
5873 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5874 pm_qos_remove_request(&substream->latency_pm_qos_req);
5875
5876 cpumask_clear(&mask);
5877 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5878 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5879 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5880
5881 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5882
5883 pm_qos_add_request(&substream->latency_pm_qos_req,
5884 PM_QOS_CPU_DMA_LATENCY,
5885 MSM_LL_QOS_VALUE);
5886 return 0;
5887}
5888
5889static struct snd_soc_ops msm_fe_qos_ops = {
5890 .prepare = msm_fe_qos_prepare,
5891};
5892
5893static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5894{
5895 int ret = 0;
5896 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5897 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5898 int index = cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5899 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5900 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5901 struct snd_soc_card *card = rtd->card;
5902 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5903
5904 dev_dbg(rtd->card->dev,
5905 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5906 __func__, substream->name, substream->stream,
5907 cpu_dai->name, cpu_dai->id);
5908
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5909 if (port_id < 0) {
5910 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5911 ret = port_id;
5912 goto err;
5913 }
5914
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5915 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5916 ret = -EINVAL;
5917 dev_err(rtd->card->dev,
5918 "%s: CPU DAI id (%d) out of range\n",
5919 __func__, cpu_dai->id);
5920 goto err;
5921 }
5922 /*
5923 * Mutex protection in case the same MI2S
5924 * interface using for both TX and RX so
5925 * that the same clock won't be enable twice.
5926 */
5927 mutex_lock(&mi2s_intf_conf[index].lock);
5928 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5929 /* Check if msm needs to provide the clock to the interface */
5930 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5931 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5932 fmt = SND_SOC_DAIFMT_CBM_CFM;
5933 }
5934 ret = msm_mi2s_set_sclk(substream, true);
5935 if (ret < 0) {
5936 dev_err(rtd->card->dev,
5937 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5938 __func__, ret);
5939 goto clean_up;
5940 }
5941
5942 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5943 if (ret < 0) {
5944 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5945 __func__, index, ret);
5946 goto clk_off;
5947 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5948 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5949 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
5950 __func__, mi2s_mclk[index].clk_freq_in_hz);
5951 ret = afe_set_lpass_clock_v2(port_id,
5952 &mi2s_mclk[index]);
5953 if (ret < 0) {
5954 pr_err("%s: afe lpass mclk failed, err:%d\n",
5955 __func__, ret);
5956 goto clk_off;
5957 }
5958 mi2s_mclk[index].enable = 1;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5959 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5960 if (pdata->mi2s_gpio_p[index])
5961 msm_cdc_pinctrl_select_active_state(
5962 pdata->mi2s_gpio_p[index]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5963 }
5964clk_off:
5965 if (ret < 0)
5966 msm_mi2s_set_sclk(substream, false);
5967clean_up:
5968 if (ret < 0)
5969 mi2s_intf_conf[index].ref_cnt--;
5970 mutex_unlock(&mi2s_intf_conf[index].lock);
5971err:
5972 return ret;
5973}
5974
5975static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5976{
5977 int ret;
5978 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5979 int index = rtd->cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5980 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5981 struct snd_soc_card *card = rtd->card;
5982 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5983
5984 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5985 substream->name, substream->stream);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5986
5987 if (port_id < 0) {
5988 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5989 return;
5990 }
5991
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5992 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5993 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5994 return;
5995 }
5996
5997 mutex_lock(&mi2s_intf_conf[index].lock);
5998 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5999 if (pdata->mi2s_gpio_p[index])
6000 msm_cdc_pinctrl_select_sleep_state(
6001 pdata->mi2s_gpio_p[index]);
6002
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6003 ret = msm_mi2s_set_sclk(substream, false);
6004 if (ret < 0)
6005 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
6006 __func__, index, ret);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]6007
6008 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
6009 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
6010 __func__, mi2s_mclk[index].clk_freq_in_hz);
6011 ret = afe_set_lpass_clock_v2(port_id,
6012 &mi2s_mclk[index]);
6013 if (ret < 0)
6014 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
6015 __func__, index, ret);
6016 mi2s_mclk[index].enable = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6017 }
6018 }
6019 mutex_unlock(&mi2s_intf_conf[index].lock);
6020}
6021
6022static struct snd_soc_ops msm_mi2s_be_ops = {
6023 .startup = msm_mi2s_snd_startup,
6024 .shutdown = msm_mi2s_snd_shutdown,
6025};
6026
6027static struct snd_soc_ops msm_cdc_dma_be_ops = {
6028 .hw_params = msm_snd_cdc_dma_hw_params,
6029};
6030
6031static struct snd_soc_ops msm_be_ops = {
6032 .hw_params = msm_snd_hw_params,
6033};
6034
6035static struct snd_soc_ops msm_slimbus_2_be_ops = {
6036 .hw_params = msm_slimbus_2_hw_params,
6037};
6038
6039static struct snd_soc_ops msm_wcn_ops = {
6040 .hw_params = msm_wcn_hw_params,
6041};
6042
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]6043static struct snd_soc_ops msm_ext_cpe_ops = {
6044 .hw_params = msm_snd_cpe_hw_params,
6045};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6046
6047/* Digital audio interface glue - connects codec <---> CPU */
6048static struct snd_soc_dai_link msm_common_dai_links[] = {
6049 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6050 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6051 .name = MSM_DAILINK_NAME(Media1),
6052 .stream_name = "MultiMedia1",
6053 .cpu_dai_name = "MultiMedia1",
6054 .platform_name = "msm-pcm-dsp.0",
6055 .dynamic = 1,
6056 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6057 .dpcm_playback = 1,
6058 .dpcm_capture = 1,
6059 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6060 SND_SOC_DPCM_TRIGGER_POST},
6061 .codec_dai_name = "snd-soc-dummy-dai",
6062 .codec_name = "snd-soc-dummy",
6063 .ignore_suspend = 1,
6064 /* this dainlink has playback support */
6065 .ignore_pmdown_time = 1,
6066 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6067 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6068 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6069 .name = MSM_DAILINK_NAME(Media2),
6070 .stream_name = "MultiMedia2",
6071 .cpu_dai_name = "MultiMedia2",
6072 .platform_name = "msm-pcm-dsp.0",
6073 .dynamic = 1,
6074 .dpcm_playback = 1,
6075 .dpcm_capture = 1,
6076 .codec_dai_name = "snd-soc-dummy-dai",
6077 .codec_name = "snd-soc-dummy",
6078 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6079 SND_SOC_DPCM_TRIGGER_POST},
6080 .ignore_suspend = 1,
6081 /* this dainlink has playback support */
6082 .ignore_pmdown_time = 1,
6083 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
6084 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6085 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6086 .name = "VoiceMMode1",
6087 .stream_name = "VoiceMMode1",
6088 .cpu_dai_name = "VoiceMMode1",
6089 .platform_name = "msm-pcm-voice",
6090 .dynamic = 1,
6091 .dpcm_playback = 1,
6092 .dpcm_capture = 1,
6093 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6094 SND_SOC_DPCM_TRIGGER_POST},
6095 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6096 .ignore_suspend = 1,
6097 .ignore_pmdown_time = 1,
6098 .codec_dai_name = "snd-soc-dummy-dai",
6099 .codec_name = "snd-soc-dummy",
6100 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
6101 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6102 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6103 .name = "MSM VoIP",
6104 .stream_name = "VoIP",
6105 .cpu_dai_name = "VoIP",
6106 .platform_name = "msm-voip-dsp",
6107 .dynamic = 1,
6108 .dpcm_playback = 1,
6109 .dpcm_capture = 1,
6110 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6111 SND_SOC_DPCM_TRIGGER_POST},
6112 .codec_dai_name = "snd-soc-dummy-dai",
6113 .codec_name = "snd-soc-dummy",
6114 .ignore_suspend = 1,
6115 /* this dainlink has playback support */
6116 .ignore_pmdown_time = 1,
6117 .id = MSM_FRONTEND_DAI_VOIP,
6118 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6119 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6120 .name = MSM_DAILINK_NAME(ULL),
6121 .stream_name = "MultiMedia3",
6122 .cpu_dai_name = "MultiMedia3",
6123 .platform_name = "msm-pcm-dsp.2",
6124 .dynamic = 1,
6125 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6126 .dpcm_playback = 1,
6127 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6128 SND_SOC_DPCM_TRIGGER_POST},
6129 .codec_dai_name = "snd-soc-dummy-dai",
6130 .codec_name = "snd-soc-dummy",
6131 .ignore_suspend = 1,
6132 /* this dainlink has playback support */
6133 .ignore_pmdown_time = 1,
6134 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
6135 },
6136 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6137 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6138 .name = "SLIMBUS_0 Hostless",
6139 .stream_name = "SLIMBUS_0 Hostless",
6140 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
6141 .platform_name = "msm-pcm-hostless",
6142 .dynamic = 1,
6143 .dpcm_playback = 1,
6144 .dpcm_capture = 1,
6145 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6146 SND_SOC_DPCM_TRIGGER_POST},
6147 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6148 .ignore_suspend = 1,
6149 /* this dailink has playback support */
6150 .ignore_pmdown_time = 1,
6151 .codec_dai_name = "snd-soc-dummy-dai",
6152 .codec_name = "snd-soc-dummy",
6153 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6154 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6155 .name = "MSM AFE-PCM RX",
6156 .stream_name = "AFE-PROXY RX",
6157 .cpu_dai_name = "msm-dai-q6-dev.241",
6158 .codec_name = "msm-stub-codec.1",
6159 .codec_dai_name = "msm-stub-rx",
6160 .platform_name = "msm-pcm-afe",
6161 .dpcm_playback = 1,
6162 .ignore_suspend = 1,
6163 /* this dainlink has playback support */
6164 .ignore_pmdown_time = 1,
6165 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6166 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6167 .name = "MSM AFE-PCM TX",
6168 .stream_name = "AFE-PROXY TX",
6169 .cpu_dai_name = "msm-dai-q6-dev.240",
6170 .codec_name = "msm-stub-codec.1",
6171 .codec_dai_name = "msm-stub-tx",
6172 .platform_name = "msm-pcm-afe",
6173 .dpcm_capture = 1,
6174 .ignore_suspend = 1,
6175 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6176 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6177 .name = MSM_DAILINK_NAME(Compress1),
6178 .stream_name = "Compress1",
6179 .cpu_dai_name = "MultiMedia4",
6180 .platform_name = "msm-compress-dsp",
6181 .dynamic = 1,
6182 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6183 .dpcm_playback = 1,
6184 .dpcm_capture = 1,
6185 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6186 SND_SOC_DPCM_TRIGGER_POST},
6187 .codec_dai_name = "snd-soc-dummy-dai",
6188 .codec_name = "snd-soc-dummy",
6189 .ignore_suspend = 1,
6190 .ignore_pmdown_time = 1,
6191 /* this dainlink has playback support */
6192 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6193 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6194 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6195 .name = "AUXPCM Hostless",
6196 .stream_name = "AUXPCM Hostless",
6197 .cpu_dai_name = "AUXPCM_HOSTLESS",
6198 .platform_name = "msm-pcm-hostless",
6199 .dynamic = 1,
6200 .dpcm_playback = 1,
6201 .dpcm_capture = 1,
6202 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6203 SND_SOC_DPCM_TRIGGER_POST},
6204 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6205 .ignore_suspend = 1,
6206 /* this dainlink has playback support */
6207 .ignore_pmdown_time = 1,
6208 .codec_dai_name = "snd-soc-dummy-dai",
6209 .codec_name = "snd-soc-dummy",
6210 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6211 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6212 .name = "SLIMBUS_1 Hostless",
6213 .stream_name = "SLIMBUS_1 Hostless",
6214 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6215 .platform_name = "msm-pcm-hostless",
6216 .dynamic = 1,
6217 .dpcm_playback = 1,
6218 .dpcm_capture = 1,
6219 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6220 SND_SOC_DPCM_TRIGGER_POST},
6221 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6222 .ignore_suspend = 1,
6223 /* this dailink has playback support */
6224 .ignore_pmdown_time = 1,
6225 .codec_dai_name = "snd-soc-dummy-dai",
6226 .codec_name = "snd-soc-dummy",
6227 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6228 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6229 .name = "SLIMBUS_3 Hostless",
6230 .stream_name = "SLIMBUS_3 Hostless",
6231 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6232 .platform_name = "msm-pcm-hostless",
6233 .dynamic = 1,
6234 .dpcm_playback = 1,
6235 .dpcm_capture = 1,
6236 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6237 SND_SOC_DPCM_TRIGGER_POST},
6238 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6239 .ignore_suspend = 1,
6240 /* this dailink has playback support */
6241 .ignore_pmdown_time = 1,
6242 .codec_dai_name = "snd-soc-dummy-dai",
6243 .codec_name = "snd-soc-dummy",
6244 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6245 {/* hw:x,12 */
6246 .name = "SLIMBUS_7 Hostless",
6247 .stream_name = "SLIMBUS_7 Hostless",
6248 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6249 .platform_name = "msm-pcm-hostless",
6250 .dynamic = 1,
6251 .dpcm_playback = 1,
6252 .dpcm_capture = 1,
6253 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6254 SND_SOC_DPCM_TRIGGER_POST},
6255 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6256 .ignore_suspend = 1,
6257 /* this dailink has playback support */
6258 .ignore_pmdown_time = 1,
6259 .codec_dai_name = "snd-soc-dummy-dai",
6260 .codec_name = "snd-soc-dummy",
6261 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6262 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6263 .name = MSM_DAILINK_NAME(LowLatency),
6264 .stream_name = "MultiMedia5",
6265 .cpu_dai_name = "MultiMedia5",
6266 .platform_name = "msm-pcm-dsp.1",
6267 .dynamic = 1,
6268 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6269 .dpcm_playback = 1,
6270 .dpcm_capture = 1,
6271 .codec_dai_name = "snd-soc-dummy-dai",
6272 .codec_name = "snd-soc-dummy",
6273 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6274 SND_SOC_DPCM_TRIGGER_POST},
6275 .ignore_suspend = 1,
6276 /* this dainlink has playback support */
6277 .ignore_pmdown_time = 1,
6278 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6279 .ops = &msm_fe_qos_ops,
6280 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6281 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6282 .name = "Listen 1 Audio Service",
6283 .stream_name = "Listen 1 Audio Service",
6284 .cpu_dai_name = "LSM1",
6285 .platform_name = "msm-lsm-client",
6286 .dynamic = 1,
6287 .dpcm_capture = 1,
6288 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6289 SND_SOC_DPCM_TRIGGER_POST },
6290 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6291 .ignore_suspend = 1,
6292 .codec_dai_name = "snd-soc-dummy-dai",
6293 .codec_name = "snd-soc-dummy",
6294 .id = MSM_FRONTEND_DAI_LSM1,
6295 },
6296 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6297 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6298 .name = MSM_DAILINK_NAME(Compress2),
6299 .stream_name = "Compress2",
6300 .cpu_dai_name = "MultiMedia7",
6301 .platform_name = "msm-compress-dsp",
6302 .dynamic = 1,
6303 .dpcm_playback = 1,
6304 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6305 SND_SOC_DPCM_TRIGGER_POST},
6306 .codec_dai_name = "snd-soc-dummy-dai",
6307 .codec_name = "snd-soc-dummy",
6308 .ignore_suspend = 1,
6309 .ignore_pmdown_time = 1,
6310 /* this dainlink has playback support */
6311 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6312 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6313 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6314 .name = MSM_DAILINK_NAME(MultiMedia10),
6315 .stream_name = "MultiMedia10",
6316 .cpu_dai_name = "MultiMedia10",
6317 .platform_name = "msm-pcm-dsp.1",
6318 .dynamic = 1,
6319 .dpcm_playback = 1,
6320 .dpcm_capture = 1,
6321 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6322 SND_SOC_DPCM_TRIGGER_POST},
6323 .codec_dai_name = "snd-soc-dummy-dai",
6324 .codec_name = "snd-soc-dummy",
6325 .ignore_suspend = 1,
6326 .ignore_pmdown_time = 1,
6327 /* this dainlink has playback support */
6328 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6329 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6330 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6331 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6332 .stream_name = "MM_NOIRQ",
6333 .cpu_dai_name = "MultiMedia8",
6334 .platform_name = "msm-pcm-dsp-noirq",
6335 .dynamic = 1,
6336 .dpcm_playback = 1,
6337 .dpcm_capture = 1,
6338 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6339 SND_SOC_DPCM_TRIGGER_POST},
6340 .codec_dai_name = "snd-soc-dummy-dai",
6341 .codec_name = "snd-soc-dummy",
6342 .ignore_suspend = 1,
6343 .ignore_pmdown_time = 1,
6344 /* this dainlink has playback support */
6345 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6346 .ops = &msm_fe_qos_ops,
6347 },
6348 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6349 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6350 .name = "HDMI_RX_HOSTLESS",
6351 .stream_name = "HDMI_RX_HOSTLESS",
6352 .cpu_dai_name = "HDMI_HOSTLESS",
6353 .platform_name = "msm-pcm-hostless",
6354 .dynamic = 1,
6355 .dpcm_playback = 1,
6356 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6357 SND_SOC_DPCM_TRIGGER_POST},
6358 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6359 .ignore_suspend = 1,
6360 .ignore_pmdown_time = 1,
6361 .codec_dai_name = "snd-soc-dummy-dai",
6362 .codec_name = "snd-soc-dummy",
6363 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6364 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6365 .name = "VoiceMMode2",
6366 .stream_name = "VoiceMMode2",
6367 .cpu_dai_name = "VoiceMMode2",
6368 .platform_name = "msm-pcm-voice",
6369 .dynamic = 1,
6370 .dpcm_playback = 1,
6371 .dpcm_capture = 1,
6372 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6373 SND_SOC_DPCM_TRIGGER_POST},
6374 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6375 .ignore_suspend = 1,
6376 .ignore_pmdown_time = 1,
6377 .codec_dai_name = "snd-soc-dummy-dai",
6378 .codec_name = "snd-soc-dummy",
6379 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6380 },
6381 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6382 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6383 .name = "Listen 2 Audio Service",
6384 .stream_name = "Listen 2 Audio Service",
6385 .cpu_dai_name = "LSM2",
6386 .platform_name = "msm-lsm-client",
6387 .dynamic = 1,
6388 .dpcm_capture = 1,
6389 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6390 SND_SOC_DPCM_TRIGGER_POST },
6391 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6392 .ignore_suspend = 1,
6393 .codec_dai_name = "snd-soc-dummy-dai",
6394 .codec_name = "snd-soc-dummy",
6395 .id = MSM_FRONTEND_DAI_LSM2,
6396 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6397 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6398 .name = "Listen 3 Audio Service",
6399 .stream_name = "Listen 3 Audio Service",
6400 .cpu_dai_name = "LSM3",
6401 .platform_name = "msm-lsm-client",
6402 .dynamic = 1,
6403 .dpcm_capture = 1,
6404 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6405 SND_SOC_DPCM_TRIGGER_POST },
6406 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6407 .ignore_suspend = 1,
6408 .codec_dai_name = "snd-soc-dummy-dai",
6409 .codec_name = "snd-soc-dummy",
6410 .id = MSM_FRONTEND_DAI_LSM3,
6411 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6412 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6413 .name = "Listen 4 Audio Service",
6414 .stream_name = "Listen 4 Audio Service",
6415 .cpu_dai_name = "LSM4",
6416 .platform_name = "msm-lsm-client",
6417 .dynamic = 1,
6418 .dpcm_capture = 1,
6419 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6420 SND_SOC_DPCM_TRIGGER_POST },
6421 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6422 .ignore_suspend = 1,
6423 .codec_dai_name = "snd-soc-dummy-dai",
6424 .codec_name = "snd-soc-dummy",
6425 .id = MSM_FRONTEND_DAI_LSM4,
6426 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6427 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6428 .name = "Listen 5 Audio Service",
6429 .stream_name = "Listen 5 Audio Service",
6430 .cpu_dai_name = "LSM5",
6431 .platform_name = "msm-lsm-client",
6432 .dynamic = 1,
6433 .dpcm_capture = 1,
6434 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6435 SND_SOC_DPCM_TRIGGER_POST },
6436 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6437 .ignore_suspend = 1,
6438 .codec_dai_name = "snd-soc-dummy-dai",
6439 .codec_name = "snd-soc-dummy",
6440 .id = MSM_FRONTEND_DAI_LSM5,
6441 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6442 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6443 .name = "Listen 6 Audio Service",
6444 .stream_name = "Listen 6 Audio Service",
6445 .cpu_dai_name = "LSM6",
6446 .platform_name = "msm-lsm-client",
6447 .dynamic = 1,
6448 .dpcm_capture = 1,
6449 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6450 SND_SOC_DPCM_TRIGGER_POST },
6451 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6452 .ignore_suspend = 1,
6453 .codec_dai_name = "snd-soc-dummy-dai",
6454 .codec_name = "snd-soc-dummy",
6455 .id = MSM_FRONTEND_DAI_LSM6,
6456 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6457 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6458 .name = "Listen 7 Audio Service",
6459 .stream_name = "Listen 7 Audio Service",
6460 .cpu_dai_name = "LSM7",
6461 .platform_name = "msm-lsm-client",
6462 .dynamic = 1,
6463 .dpcm_capture = 1,
6464 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6465 SND_SOC_DPCM_TRIGGER_POST },
6466 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6467 .ignore_suspend = 1,
6468 .codec_dai_name = "snd-soc-dummy-dai",
6469 .codec_name = "snd-soc-dummy",
6470 .id = MSM_FRONTEND_DAI_LSM7,
6471 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6472 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6473 .name = "Listen 8 Audio Service",
6474 .stream_name = "Listen 8 Audio Service",
6475 .cpu_dai_name = "LSM8",
6476 .platform_name = "msm-lsm-client",
6477 .dynamic = 1,
6478 .dpcm_capture = 1,
6479 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6480 SND_SOC_DPCM_TRIGGER_POST },
6481 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6482 .ignore_suspend = 1,
6483 .codec_dai_name = "snd-soc-dummy-dai",
6484 .codec_name = "snd-soc-dummy",
6485 .id = MSM_FRONTEND_DAI_LSM8,
6486 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6487 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6488 .name = MSM_DAILINK_NAME(Media9),
6489 .stream_name = "MultiMedia9",
6490 .cpu_dai_name = "MultiMedia9",
6491 .platform_name = "msm-pcm-dsp.0",
6492 .dynamic = 1,
6493 .dpcm_playback = 1,
6494 .dpcm_capture = 1,
6495 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6496 SND_SOC_DPCM_TRIGGER_POST},
6497 .codec_dai_name = "snd-soc-dummy-dai",
6498 .codec_name = "snd-soc-dummy",
6499 .ignore_suspend = 1,
6500 /* this dainlink has playback support */
6501 .ignore_pmdown_time = 1,
6502 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6503 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6504 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6505 .name = MSM_DAILINK_NAME(Compress4),
6506 .stream_name = "Compress4",
6507 .cpu_dai_name = "MultiMedia11",
6508 .platform_name = "msm-compress-dsp",
6509 .dynamic = 1,
6510 .dpcm_playback = 1,
6511 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6512 SND_SOC_DPCM_TRIGGER_POST},
6513 .codec_dai_name = "snd-soc-dummy-dai",
6514 .codec_name = "snd-soc-dummy",
6515 .ignore_suspend = 1,
6516 .ignore_pmdown_time = 1,
6517 /* this dainlink has playback support */
6518 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6519 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6520 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6521 .name = MSM_DAILINK_NAME(Compress5),
6522 .stream_name = "Compress5",
6523 .cpu_dai_name = "MultiMedia12",
6524 .platform_name = "msm-compress-dsp",
6525 .dynamic = 1,
6526 .dpcm_playback = 1,
6527 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6528 SND_SOC_DPCM_TRIGGER_POST},
6529 .codec_dai_name = "snd-soc-dummy-dai",
6530 .codec_name = "snd-soc-dummy",
6531 .ignore_suspend = 1,
6532 .ignore_pmdown_time = 1,
6533 /* this dainlink has playback support */
6534 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6535 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6536 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6537 .name = MSM_DAILINK_NAME(Compress6),
6538 .stream_name = "Compress6",
6539 .cpu_dai_name = "MultiMedia13",
6540 .platform_name = "msm-compress-dsp",
6541 .dynamic = 1,
6542 .dpcm_playback = 1,
6543 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6544 SND_SOC_DPCM_TRIGGER_POST},
6545 .codec_dai_name = "snd-soc-dummy-dai",
6546 .codec_name = "snd-soc-dummy",
6547 .ignore_suspend = 1,
6548 .ignore_pmdown_time = 1,
6549 /* this dainlink has playback support */
6550 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6551 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6552 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6553 .name = MSM_DAILINK_NAME(Compress7),
6554 .stream_name = "Compress7",
6555 .cpu_dai_name = "MultiMedia14",
6556 .platform_name = "msm-compress-dsp",
6557 .dynamic = 1,
6558 .dpcm_playback = 1,
6559 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6560 SND_SOC_DPCM_TRIGGER_POST},
6561 .codec_dai_name = "snd-soc-dummy-dai",
6562 .codec_name = "snd-soc-dummy",
6563 .ignore_suspend = 1,
6564 .ignore_pmdown_time = 1,
6565 /* this dainlink has playback support */
6566 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6567 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6568 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6569 .name = MSM_DAILINK_NAME(Compress8),
6570 .stream_name = "Compress8",
6571 .cpu_dai_name = "MultiMedia15",
6572 .platform_name = "msm-compress-dsp",
6573 .dynamic = 1,
6574 .dpcm_playback = 1,
6575 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6576 SND_SOC_DPCM_TRIGGER_POST},
6577 .codec_dai_name = "snd-soc-dummy-dai",
6578 .codec_name = "snd-soc-dummy",
6579 .ignore_suspend = 1,
6580 .ignore_pmdown_time = 1,
6581 /* this dainlink has playback support */
6582 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6583 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6584 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6585 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6586 .stream_name = "MM_NOIRQ_2",
6587 .cpu_dai_name = "MultiMedia16",
6588 .platform_name = "msm-pcm-dsp-noirq",
6589 .dynamic = 1,
6590 .dpcm_playback = 1,
6591 .dpcm_capture = 1,
6592 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6593 SND_SOC_DPCM_TRIGGER_POST},
6594 .codec_dai_name = "snd-soc-dummy-dai",
6595 .codec_name = "snd-soc-dummy",
6596 .ignore_suspend = 1,
6597 .ignore_pmdown_time = 1,
6598 /* this dainlink has playback support */
6599 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6600 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6601 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6602 .name = "SLIMBUS_8 Hostless",
6603 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6604 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6605 .platform_name = "msm-pcm-hostless",
6606 .dynamic = 1,
6607 .dpcm_capture = 1,
6608 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6609 SND_SOC_DPCM_TRIGGER_POST},
6610 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6611 .ignore_suspend = 1,
6612 .codec_dai_name = "snd-soc-dummy-dai",
6613 .codec_name = "snd-soc-dummy",
6614 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6615 {/* hw:x,35 */
6616 .name = "CDC_DMA Hostless",
6617 .stream_name = "CDC_DMA Hostless",
6618 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6619 .platform_name = "msm-pcm-hostless",
6620 .dynamic = 1,
6621 .dpcm_playback = 1,
6622 .dpcm_capture = 1,
6623 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6624 SND_SOC_DPCM_TRIGGER_POST},
6625 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6626 .ignore_suspend = 1,
6627 /* this dailink has playback support */
6628 .ignore_pmdown_time = 1,
6629 .codec_dai_name = "snd-soc-dummy-dai",
6630 .codec_name = "snd-soc-dummy",
6631 },
6632 {/* hw:x,36 */
6633 .name = "TX3_CDC_DMA Hostless",
6634 .stream_name = "TX3_CDC_DMA Hostless",
6635 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6636 .platform_name = "msm-pcm-hostless",
6637 .dynamic = 1,
6638 .dpcm_capture = 1,
6639 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6640 SND_SOC_DPCM_TRIGGER_POST},
6641 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6642 .ignore_suspend = 1,
6643 .codec_dai_name = "snd-soc-dummy-dai",
6644 .codec_name = "snd-soc-dummy",
6645 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6646};
6647
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6648static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6649 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6650 .name = LPASS_BE_SLIMBUS_4_TX,
6651 .stream_name = "Slimbus4 Capture",
6652 .cpu_dai_name = "msm-dai-q6-dev.16393",
6653 .platform_name = "msm-pcm-hostless",
6654 .codec_name = "tavil_codec",
6655 .codec_dai_name = "tavil_vifeedback",
6656 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6657 .be_hw_params_fixup = msm_be_hw_params_fixup,
6658 .ops = &msm_be_ops,
6659 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6660 .ignore_suspend = 1,
6661 },
6662 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6663 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6664 .name = "SLIMBUS_2 Hostless Playback",
6665 .stream_name = "SLIMBUS_2 Hostless Playback",
6666 .cpu_dai_name = "msm-dai-q6-dev.16388",
6667 .platform_name = "msm-pcm-hostless",
6668 .codec_name = "tavil_codec",
6669 .codec_dai_name = "tavil_rx2",
6670 .ignore_suspend = 1,
6671 .ignore_pmdown_time = 1,
6672 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6673 .ops = &msm_slimbus_2_be_ops,
6674 },
6675 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6676 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6677 .name = "SLIMBUS_2 Hostless Capture",
6678 .stream_name = "SLIMBUS_2 Hostless Capture",
6679 .cpu_dai_name = "msm-dai-q6-dev.16389",
6680 .platform_name = "msm-pcm-hostless",
6681 .codec_name = "tavil_codec",
6682 .codec_dai_name = "tavil_tx2",
6683 .ignore_suspend = 1,
6684 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6685 .ops = &msm_slimbus_2_be_ops,
6686 },
6687};
6688
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]6689static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
6690 {
6691 .name = "Compress9",
6692 .stream_name = "Compress9",
6693 .cpu_dai_name = "MultiMedia17",
6694 .platform_name = "msm-compress-dsp",
6695 .dynamic = 1,
6696 .dpcm_capture = 1,
6697 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6698 SND_SOC_DPCM_TRIGGER_POST},
6699 .codec_dai_name = "snd-soc-dummy-dai",
6700 .codec_name = "snd-soc-dummy",
6701 .ignore_suspend = 1,
6702 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6703 },
6704 {
6705 .name = "Compress10",
6706 .stream_name = "Compress10",
6707 .cpu_dai_name = "MultiMedia18",
6708 .platform_name = "msm-compress-dsp",
6709 .dynamic = 1,
6710 .dpcm_capture = 1,
6711 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6712 SND_SOC_DPCM_TRIGGER_POST},
6713 .codec_dai_name = "snd-soc-dummy-dai",
6714 .codec_name = "snd-soc-dummy",
6715 .ignore_suspend = 1,
6716 .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
6717 },
6718 {
6719 .name = "Compress11",
6720 .stream_name = "Compress11",
6721 .cpu_dai_name = "MultiMedia19",
6722 .platform_name = "msm-compress-dsp",
6723 .dynamic = 1,
6724 .dpcm_capture = 1,
6725 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6726 SND_SOC_DPCM_TRIGGER_POST},
6727 .codec_dai_name = "snd-soc-dummy-dai",
6728 .codec_name = "snd-soc-dummy",
6729 .ignore_suspend = 1,
6730 .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
6731 },
6732 {
6733 .name = "Compress12",
6734 .stream_name = "Compress12",
6735 .cpu_dai_name = "MultiMedia28",
6736 .platform_name = "msm-compress-dsp",
6737 .dynamic = 1,
6738 .dpcm_capture = 1,
6739 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6740 SND_SOC_DPCM_TRIGGER_POST},
6741 .codec_dai_name = "snd-soc-dummy-dai",
6742 .codec_name = "snd-soc-dummy",
6743 .ignore_suspend = 1,
6744 .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
6745 },
6746 {
6747 .name = "Compress13",
6748 .stream_name = "Compress13",
6749 .cpu_dai_name = "MultiMedia29",
6750 .platform_name = "msm-compress-dsp",
6751 .dynamic = 1,
6752 .dpcm_capture = 1,
6753 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6754 SND_SOC_DPCM_TRIGGER_POST},
6755 .codec_dai_name = "snd-soc-dummy-dai",
6756 .codec_name = "snd-soc-dummy",
6757 .ignore_suspend = 1,
6758 .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
6759 },
6760};
6761
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6762static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6763 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6764 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6765 .stream_name = "WSA CDC DMA0 Capture",
6766 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6767 .platform_name = "msm-pcm-hostless",
6768 .codec_name = "bolero_codec",
6769 .codec_dai_name = "wsa_macro_vifeedback",
6770 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6771 .be_hw_params_fixup = msm_be_hw_params_fixup,
6772 .ignore_suspend = 1,
6773 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6774 .ops = &msm_cdc_dma_be_ops,
6775 },
6776};
6777
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]6778static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
6779 /* tasha_vifeedback for speaker protection */
6780 {
6781 .name = LPASS_BE_SLIMBUS_4_TX,
6782 .stream_name = "Slimbus4 Capture",
6783 .cpu_dai_name = "msm-dai-q6-dev.16393",
6784 .platform_name = "msm-pcm-hostless",
6785 .codec_name = "tasha_codec",
6786 .codec_dai_name = "tasha_vifeedback",
6787 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6788 .be_hw_params_fixup = msm_be_hw_params_fixup,
6789 .ops = &msm_be_ops,
6790 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6791 .ignore_suspend = 1,
6792 },
6793 /* Ultrasound RX DAI Link */
6794 {
6795 .name = "SLIMBUS_2 Hostless Playback",
6796 .stream_name = "SLIMBUS_2 Hostless Playback",
6797 .cpu_dai_name = "msm-dai-q6-dev.16388",
6798 .platform_name = "msm-pcm-hostless",
6799 .codec_name = "tasha_codec",
6800 .codec_dai_name = "tasha_rx2",
6801 .ignore_suspend = 1,
6802 .dpcm_playback = 1,
6803 .dpcm_capture = 1,
6804 .ignore_pmdown_time = 1,
6805 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6806 .ops = &msm_slimbus_2_be_ops,
6807 },
6808 /* Ultrasound TX DAI Link */
6809 {
6810 .name = "SLIMBUS_2 Hostless Capture",
6811 .stream_name = "SLIMBUS_2 Hostless Capture",
6812 .cpu_dai_name = "msm-dai-q6-dev.16389",
6813 .platform_name = "msm-pcm-hostless",
6814 .codec_name = "tasha_codec",
6815 .codec_dai_name = "tasha_tx2",
6816 .ignore_suspend = 1,
6817 .dpcm_capture = 1,
6818 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6819 .ops = &msm_slimbus_2_be_ops,
6820 },
6821 /* CPE LSM direct dai-link */
6822 {
6823 .name = "CPE Listen service",
6824 .stream_name = "CPE Listen Audio Service",
6825 .cpu_dai_name = "msm-dai-slim",
6826 .platform_name = "msm-cpe-lsm",
6827 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6828 SND_SOC_DPCM_TRIGGER_POST},
6829 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6830 .ignore_suspend = 1,
6831 .dpcm_capture = 1,
6832 .codec_dai_name = "tasha_mad1",
6833 .codec_name = "tasha_codec",
6834 .ops = &msm_ext_cpe_ops,
6835 },
6836 {
6837 .name = "SLIMBUS_6 Hostless Playback",
6838 .stream_name = "SLIMBUS_6 Hostless",
6839 .cpu_dai_name = "SLIMBUS6_HOSTLESS",
6840 .platform_name = "msm-pcm-hostless",
6841 .dynamic = 1,
6842 .dpcm_playback = 1,
6843 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6844 SND_SOC_DPCM_TRIGGER_POST},
6845 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6846 .ignore_suspend = 1,
6847 /* this dailink has playback support */
6848 .ignore_pmdown_time = 1,
6849 .codec_dai_name = "snd-soc-dummy-dai",
6850 .codec_name = "snd-soc-dummy",
6851 },
6852 /* CPE LSM EC PP direct dai-link */
6853 {
6854 .name = "CPE Listen service ECPP",
6855 .stream_name = "CPE Listen Audio Service ECPP",
6856 .cpu_dai_name = "CPE_LSM_NOHOST",
6857 .platform_name = "msm-cpe-lsm.3",
6858 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6859 SND_SOC_DPCM_TRIGGER_POST},
6860 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6861 .ignore_suspend = 1,
6862 .ignore_pmdown_time = 1,
6863 .codec_dai_name = "tasha_cpe",
6864 .codec_name = "tasha_codec",
6865 },
6866};
6867
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6868static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6869 {
6870 .name = MSM_DAILINK_NAME(ASM Loopback),
6871 .stream_name = "MultiMedia6",
6872 .cpu_dai_name = "MultiMedia6",
6873 .platform_name = "msm-pcm-loopback",
6874 .dynamic = 1,
6875 .dpcm_playback = 1,
6876 .dpcm_capture = 1,
6877 .codec_dai_name = "snd-soc-dummy-dai",
6878 .codec_name = "snd-soc-dummy",
6879 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6880 SND_SOC_DPCM_TRIGGER_POST},
6881 .ignore_suspend = 1,
6882 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6883 .ignore_pmdown_time = 1,
6884 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6885 },
6886 {
6887 .name = "USB Audio Hostless",
6888 .stream_name = "USB Audio Hostless",
6889 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6890 .platform_name = "msm-pcm-hostless",
6891 .dynamic = 1,
6892 .dpcm_playback = 1,
6893 .dpcm_capture = 1,
6894 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6895 SND_SOC_DPCM_TRIGGER_POST},
6896 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6897 .ignore_suspend = 1,
6898 .ignore_pmdown_time = 1,
6899 .codec_dai_name = "snd-soc-dummy-dai",
6900 .codec_name = "snd-soc-dummy",
6901 },
6902};
6903
6904static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6905 /* Backend AFE DAI Links */
6906 {
6907 .name = LPASS_BE_AFE_PCM_RX,
6908 .stream_name = "AFE Playback",
6909 .cpu_dai_name = "msm-dai-q6-dev.224",
6910 .platform_name = "msm-pcm-routing",
6911 .codec_name = "msm-stub-codec.1",
6912 .codec_dai_name = "msm-stub-rx",
6913 .no_pcm = 1,
6914 .dpcm_playback = 1,
6915 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6916 .be_hw_params_fixup = msm_be_hw_params_fixup,
6917 /* this dainlink has playback support */
6918 .ignore_pmdown_time = 1,
6919 .ignore_suspend = 1,
6920 },
6921 {
6922 .name = LPASS_BE_AFE_PCM_TX,
6923 .stream_name = "AFE Capture",
6924 .cpu_dai_name = "msm-dai-q6-dev.225",
6925 .platform_name = "msm-pcm-routing",
6926 .codec_name = "msm-stub-codec.1",
6927 .codec_dai_name = "msm-stub-tx",
6928 .no_pcm = 1,
6929 .dpcm_capture = 1,
6930 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6931 .be_hw_params_fixup = msm_be_hw_params_fixup,
6932 .ignore_suspend = 1,
6933 },
6934 /* Incall Record Uplink BACK END DAI Link */
6935 {
6936 .name = LPASS_BE_INCALL_RECORD_TX,
6937 .stream_name = "Voice Uplink Capture",
6938 .cpu_dai_name = "msm-dai-q6-dev.32772",
6939 .platform_name = "msm-pcm-routing",
6940 .codec_name = "msm-stub-codec.1",
6941 .codec_dai_name = "msm-stub-tx",
6942 .no_pcm = 1,
6943 .dpcm_capture = 1,
6944 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6945 .be_hw_params_fixup = msm_be_hw_params_fixup,
6946 .ignore_suspend = 1,
6947 },
6948 /* Incall Record Downlink BACK END DAI Link */
6949 {
6950 .name = LPASS_BE_INCALL_RECORD_RX,
6951 .stream_name = "Voice Downlink Capture",
6952 .cpu_dai_name = "msm-dai-q6-dev.32771",
6953 .platform_name = "msm-pcm-routing",
6954 .codec_name = "msm-stub-codec.1",
6955 .codec_dai_name = "msm-stub-tx",
6956 .no_pcm = 1,
6957 .dpcm_capture = 1,
6958 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6959 .be_hw_params_fixup = msm_be_hw_params_fixup,
6960 .ignore_suspend = 1,
6961 },
6962 /* Incall Music BACK END DAI Link */
6963 {
6964 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6965 .stream_name = "Voice Farend Playback",
6966 .cpu_dai_name = "msm-dai-q6-dev.32773",
6967 .platform_name = "msm-pcm-routing",
6968 .codec_name = "msm-stub-codec.1",
6969 .codec_dai_name = "msm-stub-rx",
6970 .no_pcm = 1,
6971 .dpcm_playback = 1,
6972 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6973 .be_hw_params_fixup = msm_be_hw_params_fixup,
6974 .ignore_suspend = 1,
6975 .ignore_pmdown_time = 1,
6976 },
6977 /* Incall Music 2 BACK END DAI Link */
6978 {
6979 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6980 .stream_name = "Voice2 Farend Playback",
6981 .cpu_dai_name = "msm-dai-q6-dev.32770",
6982 .platform_name = "msm-pcm-routing",
6983 .codec_name = "msm-stub-codec.1",
6984 .codec_dai_name = "msm-stub-rx",
6985 .no_pcm = 1,
6986 .dpcm_playback = 1,
6987 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6988 .be_hw_params_fixup = msm_be_hw_params_fixup,
6989 .ignore_suspend = 1,
6990 .ignore_pmdown_time = 1,
6991 },
6992 {
6993 .name = LPASS_BE_USB_AUDIO_RX,
6994 .stream_name = "USB Audio Playback",
6995 .cpu_dai_name = "msm-dai-q6-dev.28672",
6996 .platform_name = "msm-pcm-routing",
6997 .codec_name = "msm-stub-codec.1",
6998 .codec_dai_name = "msm-stub-rx",
6999 .no_pcm = 1,
7000 .dpcm_playback = 1,
7001 .id = MSM_BACKEND_DAI_USB_RX,
7002 .be_hw_params_fixup = msm_be_hw_params_fixup,
7003 .ignore_pmdown_time = 1,
7004 .ignore_suspend = 1,
7005 },
7006 {
7007 .name = LPASS_BE_USB_AUDIO_TX,
7008 .stream_name = "USB Audio Capture",
7009 .cpu_dai_name = "msm-dai-q6-dev.28673",
7010 .platform_name = "msm-pcm-routing",
7011 .codec_name = "msm-stub-codec.1",
7012 .codec_dai_name = "msm-stub-tx",
7013 .no_pcm = 1,
7014 .dpcm_capture = 1,
7015 .id = MSM_BACKEND_DAI_USB_TX,
7016 .be_hw_params_fixup = msm_be_hw_params_fixup,
7017 .ignore_suspend = 1,
7018 },
7019 {
7020 .name = LPASS_BE_PRI_TDM_RX_0,
7021 .stream_name = "Primary TDM0 Playback",
7022 .cpu_dai_name = "msm-dai-q6-tdm.36864",
7023 .platform_name = "msm-pcm-routing",
7024 .codec_name = "msm-stub-codec.1",
7025 .codec_dai_name = "msm-stub-rx",
7026 .no_pcm = 1,
7027 .dpcm_playback = 1,
7028 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
7029 .be_hw_params_fixup = msm_be_hw_params_fixup,
7030 .ops = &sm6150_tdm_be_ops,
7031 .ignore_suspend = 1,
7032 .ignore_pmdown_time = 1,
7033 },
7034 {
7035 .name = LPASS_BE_PRI_TDM_TX_0,
7036 .stream_name = "Primary TDM0 Capture",
7037 .cpu_dai_name = "msm-dai-q6-tdm.36865",
7038 .platform_name = "msm-pcm-routing",
7039 .codec_name = "msm-stub-codec.1",
7040 .codec_dai_name = "msm-stub-tx",
7041 .no_pcm = 1,
7042 .dpcm_capture = 1,
7043 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
7044 .be_hw_params_fixup = msm_be_hw_params_fixup,
7045 .ops = &sm6150_tdm_be_ops,
7046 .ignore_suspend = 1,
7047 },
7048 {
7049 .name = LPASS_BE_SEC_TDM_RX_0,
7050 .stream_name = "Secondary TDM0 Playback",
7051 .cpu_dai_name = "msm-dai-q6-tdm.36880",
7052 .platform_name = "msm-pcm-routing",
7053 .codec_name = "msm-stub-codec.1",
7054 .codec_dai_name = "msm-stub-rx",
7055 .no_pcm = 1,
7056 .dpcm_playback = 1,
7057 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
7058 .be_hw_params_fixup = msm_be_hw_params_fixup,
7059 .ops = &sm6150_tdm_be_ops,
7060 .ignore_suspend = 1,
7061 .ignore_pmdown_time = 1,
7062 },
7063 {
7064 .name = LPASS_BE_SEC_TDM_TX_0,
7065 .stream_name = "Secondary TDM0 Capture",
7066 .cpu_dai_name = "msm-dai-q6-tdm.36881",
7067 .platform_name = "msm-pcm-routing",
7068 .codec_name = "msm-stub-codec.1",
7069 .codec_dai_name = "msm-stub-tx",
7070 .no_pcm = 1,
7071 .dpcm_capture = 1,
7072 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
7073 .be_hw_params_fixup = msm_be_hw_params_fixup,
7074 .ops = &sm6150_tdm_be_ops,
7075 .ignore_suspend = 1,
7076 },
7077 {
7078 .name = LPASS_BE_TERT_TDM_RX_0,
7079 .stream_name = "Tertiary TDM0 Playback",
7080 .cpu_dai_name = "msm-dai-q6-tdm.36896",
7081 .platform_name = "msm-pcm-routing",
7082 .codec_name = "msm-stub-codec.1",
7083 .codec_dai_name = "msm-stub-rx",
7084 .no_pcm = 1,
7085 .dpcm_playback = 1,
7086 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
7087 .be_hw_params_fixup = msm_be_hw_params_fixup,
7088 .ops = &sm6150_tdm_be_ops,
7089 .ignore_suspend = 1,
7090 .ignore_pmdown_time = 1,
7091 },
7092 {
7093 .name = LPASS_BE_TERT_TDM_TX_0,
7094 .stream_name = "Tertiary TDM0 Capture",
7095 .cpu_dai_name = "msm-dai-q6-tdm.36897",
7096 .platform_name = "msm-pcm-routing",
7097 .codec_name = "msm-stub-codec.1",
7098 .codec_dai_name = "msm-stub-tx",
7099 .no_pcm = 1,
7100 .dpcm_capture = 1,
7101 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
7102 .be_hw_params_fixup = msm_be_hw_params_fixup,
7103 .ops = &sm6150_tdm_be_ops,
7104 .ignore_suspend = 1,
7105 },
7106 {
7107 .name = LPASS_BE_QUAT_TDM_RX_0,
7108 .stream_name = "Quaternary TDM0 Playback",
7109 .cpu_dai_name = "msm-dai-q6-tdm.36912",
7110 .platform_name = "msm-pcm-routing",
7111 .codec_name = "msm-stub-codec.1",
7112 .codec_dai_name = "msm-stub-rx",
7113 .no_pcm = 1,
7114 .dpcm_playback = 1,
7115 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]7116 .be_hw_params_fixup = msm_be_hw_params_fixup,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7117 .ops = &sm6150_tdm_be_ops,
7118 .ignore_suspend = 1,
7119 .ignore_pmdown_time = 1,
7120 },
7121 {
7122 .name = LPASS_BE_QUAT_TDM_TX_0,
7123 .stream_name = "Quaternary TDM0 Capture",
7124 .cpu_dai_name = "msm-dai-q6-tdm.36913",
7125 .platform_name = "msm-pcm-routing",
7126 .codec_name = "msm-stub-codec.1",
7127 .codec_dai_name = "msm-stub-tx",
7128 .no_pcm = 1,
7129 .dpcm_capture = 1,
7130 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
7131 .be_hw_params_fixup = msm_be_hw_params_fixup,
7132 .ops = &sm6150_tdm_be_ops,
7133 .ignore_suspend = 1,
7134 },
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]7135 {
7136 .name = LPASS_BE_QUIN_TDM_RX_0,
7137 .stream_name = "Quinary TDM0 Playback",
7138 .cpu_dai_name = "msm-dai-q6-tdm.36928",
7139 .platform_name = "msm-pcm-routing",
7140 .codec_name = "msm-stub-codec.1",
7141 .codec_dai_name = "msm-stub-rx",
7142 .no_pcm = 1,
7143 .dpcm_playback = 1,
7144 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
7145 .be_hw_params_fixup = msm_be_hw_params_fixup,
7146 .ops = &sm6150_tdm_be_ops,
7147 .ignore_suspend = 1,
7148 .ignore_pmdown_time = 1,
7149 },
7150 {
7151 .name = LPASS_BE_QUIN_TDM_TX_0,
7152 .stream_name = "Quinary TDM0 Capture",
7153 .cpu_dai_name = "msm-dai-q6-tdm.36929",
7154 .platform_name = "msm-pcm-routing",
7155 .codec_name = "msm-stub-codec.1",
7156 .codec_dai_name = "msm-stub-tx",
7157 .no_pcm = 1,
7158 .dpcm_capture = 1,
7159 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
7160 .be_hw_params_fixup = msm_be_hw_params_fixup,
7161 .ops = &sm6150_tdm_be_ops,
7162 .ignore_suspend = 1,
7163 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7164};
7165
7166static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
7167 {
7168 .name = LPASS_BE_SLIMBUS_0_RX,
7169 .stream_name = "Slimbus Playback",
7170 .cpu_dai_name = "msm-dai-q6-dev.16384",
7171 .platform_name = "msm-pcm-routing",
7172 .codec_name = "tavil_codec",
7173 .codec_dai_name = "tavil_rx1",
7174 .no_pcm = 1,
7175 .dpcm_playback = 1,
7176 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7177 .init = &msm_audrx_tavil_init,
7178 .be_hw_params_fixup = msm_be_hw_params_fixup,
7179 /* this dainlink has playback support */
7180 .ignore_pmdown_time = 1,
7181 .ignore_suspend = 1,
7182 .ops = &msm_be_ops,
7183 },
7184 {
7185 .name = LPASS_BE_SLIMBUS_0_TX,
7186 .stream_name = "Slimbus Capture",
7187 .cpu_dai_name = "msm-dai-q6-dev.16385",
7188 .platform_name = "msm-pcm-routing",
7189 .codec_name = "tavil_codec",
7190 .codec_dai_name = "tavil_tx1",
7191 .no_pcm = 1,
7192 .dpcm_capture = 1,
7193 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7194 .be_hw_params_fixup = msm_be_hw_params_fixup,
7195 .ignore_suspend = 1,
7196 .ops = &msm_be_ops,
7197 },
7198 {
7199 .name = LPASS_BE_SLIMBUS_1_RX,
7200 .stream_name = "Slimbus1 Playback",
7201 .cpu_dai_name = "msm-dai-q6-dev.16386",
7202 .platform_name = "msm-pcm-routing",
7203 .codec_name = "tavil_codec",
7204 .codec_dai_name = "tavil_rx1",
7205 .no_pcm = 1,
7206 .dpcm_playback = 1,
7207 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7208 .be_hw_params_fixup = msm_be_hw_params_fixup,
7209 .ops = &msm_be_ops,
7210 /* dai link has playback support */
7211 .ignore_pmdown_time = 1,
7212 .ignore_suspend = 1,
7213 },
7214 {
7215 .name = LPASS_BE_SLIMBUS_1_TX,
7216 .stream_name = "Slimbus1 Capture",
7217 .cpu_dai_name = "msm-dai-q6-dev.16387",
7218 .platform_name = "msm-pcm-routing",
7219 .codec_name = "tavil_codec",
7220 .codec_dai_name = "tavil_tx3",
7221 .no_pcm = 1,
7222 .dpcm_capture = 1,
7223 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
7224 .be_hw_params_fixup = msm_be_hw_params_fixup,
7225 .ops = &msm_be_ops,
7226 .ignore_suspend = 1,
7227 },
7228 {
7229 .name = LPASS_BE_SLIMBUS_2_RX,
7230 .stream_name = "Slimbus2 Playback",
7231 .cpu_dai_name = "msm-dai-q6-dev.16388",
7232 .platform_name = "msm-pcm-routing",
7233 .codec_name = "tavil_codec",
7234 .codec_dai_name = "tavil_rx2",
7235 .no_pcm = 1,
7236 .dpcm_playback = 1,
7237 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
7238 .be_hw_params_fixup = msm_be_hw_params_fixup,
7239 .ops = &msm_be_ops,
7240 .ignore_pmdown_time = 1,
7241 .ignore_suspend = 1,
7242 },
7243 {
7244 .name = LPASS_BE_SLIMBUS_3_RX,
7245 .stream_name = "Slimbus3 Playback",
7246 .cpu_dai_name = "msm-dai-q6-dev.16390",
7247 .platform_name = "msm-pcm-routing",
7248 .codec_name = "tavil_codec",
7249 .codec_dai_name = "tavil_rx1",
7250 .no_pcm = 1,
7251 .dpcm_playback = 1,
7252 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7253 .be_hw_params_fixup = msm_be_hw_params_fixup,
7254 .ops = &msm_be_ops,
7255 /* dai link has playback support */
7256 .ignore_pmdown_time = 1,
7257 .ignore_suspend = 1,
7258 },
7259 {
7260 .name = LPASS_BE_SLIMBUS_3_TX,
7261 .stream_name = "Slimbus3 Capture",
7262 .cpu_dai_name = "msm-dai-q6-dev.16391",
7263 .platform_name = "msm-pcm-routing",
7264 .codec_name = "tavil_codec",
7265 .codec_dai_name = "tavil_tx1",
7266 .no_pcm = 1,
7267 .dpcm_capture = 1,
7268 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7269 .be_hw_params_fixup = msm_be_hw_params_fixup,
7270 .ops = &msm_be_ops,
7271 .ignore_suspend = 1,
7272 },
7273 {
7274 .name = LPASS_BE_SLIMBUS_4_RX,
7275 .stream_name = "Slimbus4 Playback",
7276 .cpu_dai_name = "msm-dai-q6-dev.16392",
7277 .platform_name = "msm-pcm-routing",
7278 .codec_name = "tavil_codec",
7279 .codec_dai_name = "tavil_rx1",
7280 .no_pcm = 1,
7281 .dpcm_playback = 1,
7282 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7283 .be_hw_params_fixup = msm_be_hw_params_fixup,
7284 .ops = &msm_be_ops,
7285 /* dai link has playback support */
7286 .ignore_pmdown_time = 1,
7287 .ignore_suspend = 1,
7288 },
7289 {
7290 .name = LPASS_BE_SLIMBUS_5_RX,
7291 .stream_name = "Slimbus5 Playback",
7292 .cpu_dai_name = "msm-dai-q6-dev.16394",
7293 .platform_name = "msm-pcm-routing",
7294 .codec_name = "tavil_codec",
7295 .codec_dai_name = "tavil_rx3",
7296 .no_pcm = 1,
7297 .dpcm_playback = 1,
7298 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7299 .be_hw_params_fixup = msm_be_hw_params_fixup,
7300 .ops = &msm_be_ops,
7301 /* dai link has playback support */
7302 .ignore_pmdown_time = 1,
7303 .ignore_suspend = 1,
7304 },
7305 /* MAD BE */
7306 {
7307 .name = LPASS_BE_SLIMBUS_5_TX,
7308 .stream_name = "Slimbus5 Capture",
7309 .cpu_dai_name = "msm-dai-q6-dev.16395",
7310 .platform_name = "msm-pcm-routing",
7311 .codec_name = "tavil_codec",
7312 .codec_dai_name = "tavil_mad1",
7313 .no_pcm = 1,
7314 .dpcm_capture = 1,
7315 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7316 .be_hw_params_fixup = msm_be_hw_params_fixup,
7317 .ops = &msm_be_ops,
7318 .ignore_suspend = 1,
7319 },
7320 {
7321 .name = LPASS_BE_SLIMBUS_6_RX,
7322 .stream_name = "Slimbus6 Playback",
7323 .cpu_dai_name = "msm-dai-q6-dev.16396",
7324 .platform_name = "msm-pcm-routing",
7325 .codec_name = "tavil_codec",
7326 .codec_dai_name = "tavil_rx4",
7327 .no_pcm = 1,
7328 .dpcm_playback = 1,
7329 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7330 .be_hw_params_fixup = msm_be_hw_params_fixup,
7331 .ops = &msm_be_ops,
7332 /* dai link has playback support */
7333 .ignore_pmdown_time = 1,
7334 .ignore_suspend = 1,
7335 },
7336 /* Slimbus VI Recording */
7337 {
7338 .name = LPASS_BE_SLIMBUS_TX_VI,
7339 .stream_name = "Slimbus4 Capture",
7340 .cpu_dai_name = "msm-dai-q6-dev.16393",
7341 .platform_name = "msm-pcm-routing",
7342 .codec_name = "tavil_codec",
7343 .codec_dai_name = "tavil_vifeedback",
7344 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7345 .be_hw_params_fixup = msm_be_hw_params_fixup,
7346 .ops = &msm_be_ops,
7347 .ignore_suspend = 1,
7348 .no_pcm = 1,
7349 .dpcm_capture = 1,
7350 },
7351};
7352
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]7353static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
7354 /* Backend DAI Links */
7355 {
7356 .name = LPASS_BE_SLIMBUS_0_RX,
7357 .stream_name = "Slimbus Playback",
7358 .cpu_dai_name = "msm-dai-q6-dev.16384",
7359 .platform_name = "msm-pcm-routing",
7360 .codec_name = "tasha_codec",
7361 .codec_dai_name = "tasha_mix_rx1",
7362 .no_pcm = 1,
7363 .dpcm_playback = 1,
7364 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7365 .init = &msm_audrx_tasha_init,
7366 .be_hw_params_fixup = msm_be_hw_params_fixup,
7367 /* this dainlink has playback support */
7368 .ignore_pmdown_time = 1,
7369 .ignore_suspend = 1,
7370 .ops = &msm_be_ops,
7371 },
7372 {
7373 .name = LPASS_BE_SLIMBUS_0_TX,
7374 .stream_name = "Slimbus Capture",
7375 .cpu_dai_name = "msm-dai-q6-dev.16385",
7376 .platform_name = "msm-pcm-routing",
7377 .codec_name = "tasha_codec",
7378 .codec_dai_name = "tasha_tx1",
7379 .no_pcm = 1,
7380 .dpcm_capture = 1,
7381 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7382 .be_hw_params_fixup = msm_be_hw_params_fixup,
7383 .ignore_suspend = 1,
7384 .ops = &msm_be_ops,
7385 },
7386 {
7387 .name = LPASS_BE_SLIMBUS_1_RX,
7388 .stream_name = "Slimbus1 Playback",
7389 .cpu_dai_name = "msm-dai-q6-dev.16386",
7390 .platform_name = "msm-pcm-routing",
7391 .codec_name = "tasha_codec",
7392 .codec_dai_name = "tasha_mix_rx1",
7393 .no_pcm = 1,
7394 .dpcm_playback = 1,
7395 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7396 .be_hw_params_fixup = msm_be_hw_params_fixup,
7397 .ops = &msm_be_ops,
7398 /* dai link has playback support */
7399 .ignore_pmdown_time = 1,
7400 .ignore_suspend = 1,
7401 },
7402 {
7403 .name = LPASS_BE_SLIMBUS_1_TX,
7404 .stream_name = "Slimbus1 Capture",
7405 .cpu_dai_name = "msm-dai-q6-dev.16387",
7406 .platform_name = "msm-pcm-routing",
7407 .codec_name = "tasha_codec",
7408 .codec_dai_name = "tasha_tx3",
7409 .no_pcm = 1,
7410 .dpcm_capture = 1,
7411 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
7412 .be_hw_params_fixup = msm_be_hw_params_fixup,
7413 .ops = &msm_be_ops,
7414 .ignore_suspend = 1,
7415 },
7416 {
7417 .name = LPASS_BE_SLIMBUS_3_RX,
7418 .stream_name = "Slimbus3 Playback",
7419 .cpu_dai_name = "msm-dai-q6-dev.16390",
7420 .platform_name = "msm-pcm-routing",
7421 .codec_name = "tasha_codec",
7422 .codec_dai_name = "tasha_mix_rx1",
7423 .no_pcm = 1,
7424 .dpcm_playback = 1,
7425 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7426 .be_hw_params_fixup = msm_be_hw_params_fixup,
7427 .ops = &msm_be_ops,
7428 /* dai link has playback support */
7429 .ignore_pmdown_time = 1,
7430 .ignore_suspend = 1,
7431 },
7432 {
7433 .name = LPASS_BE_SLIMBUS_3_TX,
7434 .stream_name = "Slimbus3 Capture",
7435 .cpu_dai_name = "msm-dai-q6-dev.16391",
7436 .platform_name = "msm-pcm-routing",
7437 .codec_name = "tasha_codec",
7438 .codec_dai_name = "tasha_tx1",
7439 .no_pcm = 1,
7440 .dpcm_capture = 1,
7441 .dpcm_playback = 1,
7442 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7443 .be_hw_params_fixup = msm_be_hw_params_fixup,
7444 .ops = &msm_be_ops,
7445 .ignore_suspend = 1,
7446 },
7447 {
7448 .name = LPASS_BE_SLIMBUS_4_RX,
7449 .stream_name = "Slimbus4 Playback",
7450 .cpu_dai_name = "msm-dai-q6-dev.16392",
7451 .platform_name = "msm-pcm-routing",
7452 .codec_name = "tasha_codec",
7453 .codec_dai_name = "tasha_mix_rx1",
7454 .no_pcm = 1,
7455 .dpcm_playback = 1,
7456 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7457 .be_hw_params_fixup = msm_be_hw_params_fixup,
7458 .ops = &msm_be_ops,
7459 /* dai link has playback support */
7460 .ignore_pmdown_time = 1,
7461 .ignore_suspend = 1,
7462 },
7463 {
7464 .name = LPASS_BE_SLIMBUS_5_RX,
7465 .stream_name = "Slimbus5 Playback",
7466 .cpu_dai_name = "msm-dai-q6-dev.16394",
7467 .platform_name = "msm-pcm-routing",
7468 .codec_name = "tasha_codec",
7469 .codec_dai_name = "tasha_rx3",
7470 .no_pcm = 1,
7471 .dpcm_playback = 1,
7472 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7473 .be_hw_params_fixup = msm_be_hw_params_fixup,
7474 .ops = &msm_be_ops,
7475 /* dai link has playback support */
7476 .ignore_pmdown_time = 1,
7477 .ignore_suspend = 1,
7478 },
7479 /* MAD BE */
7480 {
7481 .name = LPASS_BE_SLIMBUS_5_TX,
7482 .stream_name = "Slimbus5 Capture",
7483 .cpu_dai_name = "msm-dai-q6-dev.16395",
7484 .platform_name = "msm-pcm-routing",
7485 .codec_name = "tasha_codec",
7486 .codec_dai_name = "tasha_mad1",
7487 .no_pcm = 1,
7488 .dpcm_capture = 1,
7489 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7490 .be_hw_params_fixup = msm_be_hw_params_fixup,
7491 .ops = &msm_be_ops,
7492 .ignore_suspend = 1,
7493 },
7494 {
7495 .name = LPASS_BE_SLIMBUS_6_RX,
7496 .stream_name = "Slimbus6 Playback",
7497 .cpu_dai_name = "msm-dai-q6-dev.16396",
7498 .platform_name = "msm-pcm-routing",
7499 .codec_name = "tasha_codec",
7500 .codec_dai_name = "tasha_rx4",
7501 .no_pcm = 1,
7502 .dpcm_playback = 1,
7503 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7504 .be_hw_params_fixup = msm_be_hw_params_fixup,
7505 .ops = &msm_be_ops,
7506 /* dai link has playback support */
7507 .ignore_pmdown_time = 1,
7508 .ignore_suspend = 1,
7509 },
7510};
7511
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7512static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
7513 {
7514 .name = LPASS_BE_SLIMBUS_7_RX,
7515 .stream_name = "Slimbus7 Playback",
7516 .cpu_dai_name = "msm-dai-q6-dev.16398",
7517 .platform_name = "msm-pcm-routing",
7518 .codec_name = "btfmslim_slave",
7519 /* BT codec driver determines capabilities based on
7520 * dai name, bt codecdai name should always contains
7521 * supported usecase information
7522 */
7523 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
7524 .no_pcm = 1,
7525 .dpcm_playback = 1,
7526 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
7527 .be_hw_params_fixup = msm_be_hw_params_fixup,
7528 .ops = &msm_wcn_ops,
7529 /* dai link has playback support */
7530 .ignore_pmdown_time = 1,
7531 .ignore_suspend = 1,
7532 },
7533 {
7534 .name = LPASS_BE_SLIMBUS_7_TX,
7535 .stream_name = "Slimbus7 Capture",
7536 .cpu_dai_name = "msm-dai-q6-dev.16399",
7537 .platform_name = "msm-pcm-routing",
7538 .codec_name = "btfmslim_slave",
7539 .codec_dai_name = "btfm_bt_sco_slim_tx",
7540 .no_pcm = 1,
7541 .dpcm_capture = 1,
7542 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7543 .be_hw_params_fixup = msm_be_hw_params_fixup,
7544 .ops = &msm_wcn_ops,
7545 .ignore_suspend = 1,
7546 },
7547 {
7548 .name = LPASS_BE_SLIMBUS_8_TX,
7549 .stream_name = "Slimbus8 Capture",
7550 .cpu_dai_name = "msm-dai-q6-dev.16401",
7551 .platform_name = "msm-pcm-routing",
7552 .codec_name = "btfmslim_slave",
7553 .codec_dai_name = "btfm_fm_slim_tx",
7554 .no_pcm = 1,
7555 .dpcm_capture = 1,
7556 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7557 .be_hw_params_fixup = msm_be_hw_params_fixup,
7558 .init = &msm_wcn_init,
7559 .ops = &msm_wcn_ops,
7560 .ignore_suspend = 1,
7561 },
7562};
7563
7564static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7565 /* DISP PORT BACK END DAI Link */
7566 {
7567 .name = LPASS_BE_DISPLAY_PORT,
7568 .stream_name = "Display Port Playback",
7569 .cpu_dai_name = "msm-dai-q6-dp.24608",
7570 .platform_name = "msm-pcm-routing",
7571 .codec_name = "msm-ext-disp-audio-codec-rx",
7572 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7573 .no_pcm = 1,
7574 .dpcm_playback = 1,
7575 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7576 .be_hw_params_fixup = msm_be_hw_params_fixup,
7577 .ignore_pmdown_time = 1,
7578 .ignore_suspend = 1,
7579 },
7580};
7581
7582static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7583 {
7584 .name = LPASS_BE_PRI_MI2S_RX,
7585 .stream_name = "Primary MI2S Playback",
7586 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7587 .platform_name = "msm-pcm-routing",
7588 .codec_name = "msm-stub-codec.1",
7589 .codec_dai_name = "msm-stub-rx",
7590 .no_pcm = 1,
7591 .dpcm_playback = 1,
7592 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7593 .be_hw_params_fixup = msm_be_hw_params_fixup,
7594 .ops = &msm_mi2s_be_ops,
7595 .ignore_suspend = 1,
7596 .ignore_pmdown_time = 1,
7597 },
7598 {
7599 .name = LPASS_BE_PRI_MI2S_TX,
7600 .stream_name = "Primary MI2S Capture",
7601 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7602 .platform_name = "msm-pcm-routing",
7603 .codec_name = "msm-stub-codec.1",
7604 .codec_dai_name = "msm-stub-tx",
7605 .no_pcm = 1,
7606 .dpcm_capture = 1,
7607 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7608 .be_hw_params_fixup = msm_be_hw_params_fixup,
7609 .ops = &msm_mi2s_be_ops,
7610 .ignore_suspend = 1,
7611 },
7612 {
7613 .name = LPASS_BE_SEC_MI2S_RX,
7614 .stream_name = "Secondary MI2S Playback",
7615 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7616 .platform_name = "msm-pcm-routing",
7617 .codec_name = "msm-stub-codec.1",
7618 .codec_dai_name = "msm-stub-rx",
7619 .no_pcm = 1,
7620 .dpcm_playback = 1,
7621 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7622 .be_hw_params_fixup = msm_be_hw_params_fixup,
7623 .ops = &msm_mi2s_be_ops,
7624 .ignore_suspend = 1,
7625 .ignore_pmdown_time = 1,
7626 },
7627 {
7628 .name = LPASS_BE_SEC_MI2S_TX,
7629 .stream_name = "Secondary MI2S Capture",
7630 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7631 .platform_name = "msm-pcm-routing",
7632 .codec_name = "msm-stub-codec.1",
7633 .codec_dai_name = "msm-stub-tx",
7634 .no_pcm = 1,
7635 .dpcm_capture = 1,
7636 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7637 .be_hw_params_fixup = msm_be_hw_params_fixup,
7638 .ops = &msm_mi2s_be_ops,
7639 .ignore_suspend = 1,
7640 },
7641 {
7642 .name = LPASS_BE_TERT_MI2S_RX,
7643 .stream_name = "Tertiary MI2S Playback",
7644 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7645 .platform_name = "msm-pcm-routing",
7646 .codec_name = "msm-stub-codec.1",
7647 .codec_dai_name = "msm-stub-rx",
7648 .no_pcm = 1,
7649 .dpcm_playback = 1,
7650 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7651 .be_hw_params_fixup = msm_be_hw_params_fixup,
7652 .ops = &msm_mi2s_be_ops,
7653 .ignore_suspend = 1,
7654 .ignore_pmdown_time = 1,
7655 },
7656 {
7657 .name = LPASS_BE_TERT_MI2S_TX,
7658 .stream_name = "Tertiary MI2S Capture",
7659 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7660 .platform_name = "msm-pcm-routing",
7661 .codec_name = "msm-stub-codec.1",
7662 .codec_dai_name = "msm-stub-tx",
7663 .no_pcm = 1,
7664 .dpcm_capture = 1,
7665 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7666 .be_hw_params_fixup = msm_be_hw_params_fixup,
7667 .ops = &msm_mi2s_be_ops,
7668 .ignore_suspend = 1,
7669 },
7670 {
7671 .name = LPASS_BE_QUAT_MI2S_RX,
7672 .stream_name = "Quaternary MI2S Playback",
7673 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7674 .platform_name = "msm-pcm-routing",
7675 .codec_name = "msm-stub-codec.1",
7676 .codec_dai_name = "msm-stub-rx",
7677 .no_pcm = 1,
7678 .dpcm_playback = 1,
7679 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7680 .be_hw_params_fixup = msm_be_hw_params_fixup,
7681 .ops = &msm_mi2s_be_ops,
7682 .ignore_suspend = 1,
7683 .ignore_pmdown_time = 1,
7684 },
7685 {
7686 .name = LPASS_BE_QUAT_MI2S_TX,
7687 .stream_name = "Quaternary MI2S Capture",
7688 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7689 .platform_name = "msm-pcm-routing",
7690 .codec_name = "msm-stub-codec.1",
7691 .codec_dai_name = "msm-stub-tx",
7692 .no_pcm = 1,
7693 .dpcm_capture = 1,
7694 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7695 .be_hw_params_fixup = msm_be_hw_params_fixup,
7696 .ops = &msm_mi2s_be_ops,
7697 .ignore_suspend = 1,
7698 },
7699 {
7700 .name = LPASS_BE_QUIN_MI2S_RX,
7701 .stream_name = "Quinary MI2S Playback",
7702 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7703 .platform_name = "msm-pcm-routing",
7704 .codec_name = "msm-stub-codec.1",
7705 .codec_dai_name = "msm-stub-rx",
7706 .no_pcm = 1,
7707 .dpcm_playback = 1,
7708 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7709 .be_hw_params_fixup = msm_be_hw_params_fixup,
7710 .ops = &msm_mi2s_be_ops,
7711 .ignore_suspend = 1,
7712 .ignore_pmdown_time = 1,
7713 },
7714 {
7715 .name = LPASS_BE_QUIN_MI2S_TX,
7716 .stream_name = "Quinary MI2S Capture",
7717 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7718 .platform_name = "msm-pcm-routing",
7719 .codec_name = "msm-stub-codec.1",
7720 .codec_dai_name = "msm-stub-tx",
7721 .no_pcm = 1,
7722 .dpcm_capture = 1,
7723 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7724 .be_hw_params_fixup = msm_be_hw_params_fixup,
7725 .ops = &msm_mi2s_be_ops,
7726 .ignore_suspend = 1,
7727 },
7728
7729};
7730
7731static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7732 /* Primary AUX PCM Backend DAI Links */
7733 {
7734 .name = LPASS_BE_AUXPCM_RX,
7735 .stream_name = "AUX PCM Playback",
7736 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7737 .platform_name = "msm-pcm-routing",
7738 .codec_name = "msm-stub-codec.1",
7739 .codec_dai_name = "msm-stub-rx",
7740 .no_pcm = 1,
7741 .dpcm_playback = 1,
7742 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7743 .be_hw_params_fixup = msm_be_hw_params_fixup,
7744 .ignore_pmdown_time = 1,
7745 .ignore_suspend = 1,
7746 },
7747 {
7748 .name = LPASS_BE_AUXPCM_TX,
7749 .stream_name = "AUX PCM Capture",
7750 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7751 .platform_name = "msm-pcm-routing",
7752 .codec_name = "msm-stub-codec.1",
7753 .codec_dai_name = "msm-stub-tx",
7754 .no_pcm = 1,
7755 .dpcm_capture = 1,
7756 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7757 .be_hw_params_fixup = msm_be_hw_params_fixup,
7758 .ignore_suspend = 1,
7759 },
7760 /* Secondary AUX PCM Backend DAI Links */
7761 {
7762 .name = LPASS_BE_SEC_AUXPCM_RX,
7763 .stream_name = "Sec AUX PCM Playback",
7764 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7765 .platform_name = "msm-pcm-routing",
7766 .codec_name = "msm-stub-codec.1",
7767 .codec_dai_name = "msm-stub-rx",
7768 .no_pcm = 1,
7769 .dpcm_playback = 1,
7770 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7771 .be_hw_params_fixup = msm_be_hw_params_fixup,
7772 .ignore_pmdown_time = 1,
7773 .ignore_suspend = 1,
7774 },
7775 {
7776 .name = LPASS_BE_SEC_AUXPCM_TX,
7777 .stream_name = "Sec AUX PCM Capture",
7778 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7779 .platform_name = "msm-pcm-routing",
7780 .codec_name = "msm-stub-codec.1",
7781 .codec_dai_name = "msm-stub-tx",
7782 .no_pcm = 1,
7783 .dpcm_capture = 1,
7784 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7785 .be_hw_params_fixup = msm_be_hw_params_fixup,
7786 .ignore_suspend = 1,
7787 },
7788 /* Tertiary AUX PCM Backend DAI Links */
7789 {
7790 .name = LPASS_BE_TERT_AUXPCM_RX,
7791 .stream_name = "Tert AUX PCM Playback",
7792 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7793 .platform_name = "msm-pcm-routing",
7794 .codec_name = "msm-stub-codec.1",
7795 .codec_dai_name = "msm-stub-rx",
7796 .no_pcm = 1,
7797 .dpcm_playback = 1,
7798 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7799 .be_hw_params_fixup = msm_be_hw_params_fixup,
7800 .ignore_suspend = 1,
7801 },
7802 {
7803 .name = LPASS_BE_TERT_AUXPCM_TX,
7804 .stream_name = "Tert AUX PCM Capture",
7805 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7806 .platform_name = "msm-pcm-routing",
7807 .codec_name = "msm-stub-codec.1",
7808 .codec_dai_name = "msm-stub-tx",
7809 .no_pcm = 1,
7810 .dpcm_capture = 1,
7811 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7812 .be_hw_params_fixup = msm_be_hw_params_fixup,
7813 .ignore_suspend = 1,
7814 },
7815 /* Quaternary AUX PCM Backend DAI Links */
7816 {
7817 .name = LPASS_BE_QUAT_AUXPCM_RX,
7818 .stream_name = "Quat AUX PCM Playback",
7819 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7820 .platform_name = "msm-pcm-routing",
7821 .codec_name = "msm-stub-codec.1",
7822 .codec_dai_name = "msm-stub-rx",
7823 .no_pcm = 1,
7824 .dpcm_playback = 1,
7825 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7826 .be_hw_params_fixup = msm_be_hw_params_fixup,
7827 .ignore_pmdown_time = 1,
7828 .ignore_suspend = 1,
7829 },
7830 {
7831 .name = LPASS_BE_QUAT_AUXPCM_TX,
7832 .stream_name = "Quat AUX PCM Capture",
7833 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7834 .platform_name = "msm-pcm-routing",
7835 .codec_name = "msm-stub-codec.1",
7836 .codec_dai_name = "msm-stub-tx",
7837 .no_pcm = 1,
7838 .dpcm_capture = 1,
7839 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7840 .be_hw_params_fixup = msm_be_hw_params_fixup,
7841 .ignore_suspend = 1,
7842 },
7843 /* Quinary AUX PCM Backend DAI Links */
7844 {
7845 .name = LPASS_BE_QUIN_AUXPCM_RX,
7846 .stream_name = "Quin AUX PCM Playback",
7847 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7848 .platform_name = "msm-pcm-routing",
7849 .codec_name = "msm-stub-codec.1",
7850 .codec_dai_name = "msm-stub-rx",
7851 .no_pcm = 1,
7852 .dpcm_playback = 1,
7853 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7854 .be_hw_params_fixup = msm_be_hw_params_fixup,
7855 .ignore_pmdown_time = 1,
7856 .ignore_suspend = 1,
7857 },
7858 {
7859 .name = LPASS_BE_QUIN_AUXPCM_TX,
7860 .stream_name = "Quin AUX PCM Capture",
7861 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7862 .platform_name = "msm-pcm-routing",
7863 .codec_name = "msm-stub-codec.1",
7864 .codec_dai_name = "msm-stub-tx",
7865 .no_pcm = 1,
7866 .dpcm_capture = 1,
7867 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7868 .be_hw_params_fixup = msm_be_hw_params_fixup,
7869 .ignore_suspend = 1,
7870 },
7871};
7872
7873static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7874 /* WSA CDC DMA Backend DAI Links */
7875 {
7876 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7877 .stream_name = "WSA CDC DMA0 Playback",
7878 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7879 .platform_name = "msm-pcm-routing",
7880 .codec_name = "bolero_codec",
7881 .codec_dai_name = "wsa_macro_rx1",
7882 .no_pcm = 1,
7883 .dpcm_playback = 1,
7884 .init = &msm_int_audrx_init,
7885 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7886 .be_hw_params_fixup = msm_be_hw_params_fixup,
7887 .ignore_pmdown_time = 1,
7888 .ignore_suspend = 1,
7889 .ops = &msm_cdc_dma_be_ops,
7890 },
7891 {
7892 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7893 .stream_name = "WSA CDC DMA1 Playback",
7894 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7895 .platform_name = "msm-pcm-routing",
7896 .codec_name = "bolero_codec",
7897 .codec_dai_name = "wsa_macro_rx_mix",
7898 .no_pcm = 1,
7899 .dpcm_playback = 1,
7900 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7901 .be_hw_params_fixup = msm_be_hw_params_fixup,
7902 .ignore_pmdown_time = 1,
7903 .ignore_suspend = 1,
7904 .ops = &msm_cdc_dma_be_ops,
7905 },
7906 {
7907 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7908 .stream_name = "WSA CDC DMA1 Capture",
7909 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7910 .platform_name = "msm-pcm-routing",
7911 .codec_name = "bolero_codec",
7912 .codec_dai_name = "wsa_macro_echo",
7913 .no_pcm = 1,
7914 .dpcm_capture = 1,
7915 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7916 .be_hw_params_fixup = msm_be_hw_params_fixup,
7917 .ignore_suspend = 1,
7918 .ops = &msm_cdc_dma_be_ops,
7919 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7920};
7921
7922static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7923 /* RX CDC DMA Backend DAI Links */
7924 {
7925 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7926 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7927 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7928 .platform_name = "msm-pcm-routing",
7929 .codec_name = "bolero_codec",
7930 .codec_dai_name = "rx_macro_rx1",
7931 .no_pcm = 1,
7932 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7933 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7934 .be_hw_params_fixup = msm_be_hw_params_fixup,
7935 .ignore_pmdown_time = 1,
7936 .ignore_suspend = 1,
7937 .ops = &msm_cdc_dma_be_ops,
7938 },
7939 {
7940 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7941 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7942 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7943 .platform_name = "msm-pcm-routing",
7944 .codec_name = "bolero_codec",
7945 .codec_dai_name = "rx_macro_rx2",
7946 .no_pcm = 1,
7947 .dpcm_playback = 1,
7948 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7949 .be_hw_params_fixup = msm_be_hw_params_fixup,
7950 .ignore_pmdown_time = 1,
7951 .ignore_suspend = 1,
7952 .ops = &msm_cdc_dma_be_ops,
7953 },
7954 {
7955 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7956 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7957 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7958 .platform_name = "msm-pcm-routing",
7959 .codec_name = "bolero_codec",
7960 .codec_dai_name = "rx_macro_rx3",
7961 .no_pcm = 1,
7962 .dpcm_playback = 1,
7963 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7964 .be_hw_params_fixup = msm_be_hw_params_fixup,
7965 .ignore_pmdown_time = 1,
7966 .ignore_suspend = 1,
7967 .ops = &msm_cdc_dma_be_ops,
7968 },
7969 {
7970 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7971 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7972 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7973 .platform_name = "msm-pcm-routing",
7974 .codec_name = "bolero_codec",
7975 .codec_dai_name = "rx_macro_rx4",
7976 .no_pcm = 1,
7977 .dpcm_playback = 1,
7978 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7979 .be_hw_params_fixup = msm_be_hw_params_fixup,
7980 .ignore_pmdown_time = 1,
7981 .ignore_suspend = 1,
7982 .ops = &msm_cdc_dma_be_ops,
7983 },
7984 /* TX CDC DMA Backend DAI Links */
7985 {
Vatsal Bucha83e6ee12018-11-30 18:58:31 +0530[diff] [blame]7986 .name = LPASS_BE_TX_CDC_DMA_TX_0,
7987 .stream_name = "TX CDC DMA0 Capture",
7988 .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
7989 .platform_name = "msm-pcm-routing",
7990 .codec_name = "bolero_codec",
7991 .codec_dai_name = "rx_macro_echo",
7992 .no_pcm = 1,
7993 .dpcm_capture = 1,
7994 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
7995 .be_hw_params_fixup = msm_be_hw_params_fixup,
7996 .ignore_suspend = 1,
7997 .ops = &msm_cdc_dma_be_ops,
7998 },
7999 {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8000 .name = LPASS_BE_TX_CDC_DMA_TX_3,
8001 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]8002 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8003 .platform_name = "msm-pcm-routing",
8004 .codec_name = "bolero_codec",
8005 .codec_dai_name = "tx_macro_tx1",
8006 .no_pcm = 1,
8007 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8008 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
8009 .be_hw_params_fixup = msm_be_hw_params_fixup,
8010 .ignore_suspend = 1,
8011 .ops = &msm_cdc_dma_be_ops,
8012 },
8013 {
8014 .name = LPASS_BE_TX_CDC_DMA_TX_4,
8015 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]8016 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8017 .platform_name = "msm-pcm-routing",
8018 .codec_name = "bolero_codec",
8019 .codec_dai_name = "tx_macro_tx2",
8020 .no_pcm = 1,
8021 .dpcm_capture = 1,
8022 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
8023 .be_hw_params_fixup = msm_be_hw_params_fixup,
8024 .ignore_suspend = 1,
8025 .ops = &msm_cdc_dma_be_ops,
8026 },
8027};
8028
8029static struct snd_soc_dai_link msm_sm6150_dai_links[
8030 ARRAY_SIZE(msm_common_dai_links) +
8031 ARRAY_SIZE(msm_tavil_fe_dai_links) +
8032 ARRAY_SIZE(msm_bolero_fe_dai_links) +
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8033 ARRAY_SIZE(msm_tasha_fe_dai_links) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8034 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]8035 ARRAY_SIZE(msm_int_compress_capture_dai) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8036 ARRAY_SIZE(msm_common_be_dai_links) +
8037 ARRAY_SIZE(msm_tavil_be_dai_links) +
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8038 ARRAY_SIZE(msm_tasha_be_dai_links) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8039 ARRAY_SIZE(msm_wcn_be_dai_links) +
8040 ARRAY_SIZE(ext_disp_be_dai_link) +
8041 ARRAY_SIZE(msm_mi2s_be_dai_links) +
8042 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
8043 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
8044 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
8045
8046static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
8047{
8048 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8049 struct snd_soc_pcm_runtime *rtd;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8050 struct snd_soc_component *component;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8051 int ret = 0;
8052 void *mbhc_calibration;
8053
8054 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8055 if (!rtd) {
8056 dev_err(card->dev,
8057 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8058 __func__, be_dl_name);
8059 ret = -EINVAL;
8060 goto err_pcm_runtime;
8061 }
8062
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8063 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
8064 if (!component) {
8065 pr_err("%s: component is NULL\n", __func__);
8066 ret = -EINVAL;
8067 goto err_pcm_runtime;
8068 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8069 mbhc_calibration = def_wcd_mbhc_cal();
8070 if (!mbhc_calibration) {
8071 ret = -ENOMEM;
8072 goto err_mbhc_cal;
8073 }
8074 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8075 ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8076 if (ret) {
8077 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8078 __func__, ret);
8079 goto err_hs_detect;
8080 }
8081 return 0;
8082
8083err_hs_detect:
8084 kfree(mbhc_calibration);
8085err_mbhc_cal:
8086err_pcm_runtime:
8087 return ret;
8088}
8089
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8090static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
8091{
8092 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8093 struct snd_soc_pcm_runtime *rtd;
8094 struct snd_soc_component *component;
8095 int ret = 0;
8096 void *mbhc_calibration;
8097
8098 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8099 if (!rtd) {
8100 dev_err(card->dev,
8101 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8102 __func__, be_dl_name);
8103 ret = -EINVAL;
8104 goto err_pcm_runtime;
8105 }
8106
8107 component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
8108 if (!component) {
8109 pr_err("%s: component is NULL\n", __func__);
8110 ret = -EINVAL;
8111 goto err_pcm_runtime;
8112 }
8113
8114 mbhc_calibration = def_wcd_mbhc_cal();
8115 if (!mbhc_calibration) {
8116 ret = -ENOMEM;
8117 goto err_mbhc_cal;
8118 }
8119 wcd_mbhc_cfg.calibration = mbhc_calibration;
8120 ret = tasha_mbhc_hs_detect(component, &wcd_mbhc_cfg);
8121 if (ret) {
8122 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8123 __func__, ret);
8124 goto err_hs_detect;
8125 }
8126 return 0;
8127
8128err_hs_detect:
8129 kfree(mbhc_calibration);
8130err_mbhc_cal:
8131err_pcm_runtime:
8132 return ret;
8133}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8134
8135static int msm_populate_dai_link_component_of_node(
8136 struct snd_soc_card *card)
8137{
8138 int i, index, ret = 0;
8139 struct device *cdev = card->dev;
8140 struct snd_soc_dai_link *dai_link = card->dai_link;
8141 struct device_node *np;
8142
8143 if (!cdev) {
8144 pr_err("%s: Sound card device memory NULL\n", __func__);
8145 return -ENODEV;
8146 }
8147
8148 for (i = 0; i < card->num_links; i++) {
8149 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
8150 continue;
8151
8152 /* populate platform_of_node for snd card dai links */
8153 if (dai_link[i].platform_name &&
8154 !dai_link[i].platform_of_node) {
8155 index = of_property_match_string(cdev->of_node,
8156 "asoc-platform-names",
8157 dai_link[i].platform_name);
8158 if (index < 0) {
8159 pr_err("%s: No match found for platform name: %s\n",
8160 __func__, dai_link[i].platform_name);
8161 ret = index;
8162 goto err;
8163 }
8164 np = of_parse_phandle(cdev->of_node, "asoc-platform",
8165 index);
8166 if (!np) {
8167 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
8168 __func__, dai_link[i].platform_name,
8169 index);
8170 ret = -ENODEV;
8171 goto err;
8172 }
8173 dai_link[i].platform_of_node = np;
8174 dai_link[i].platform_name = NULL;
8175 }
8176
8177 /* populate cpu_of_node for snd card dai links */
8178 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
8179 index = of_property_match_string(cdev->of_node,
8180 "asoc-cpu-names",
8181 dai_link[i].cpu_dai_name);
8182 if (index >= 0) {
8183 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
8184 index);
8185 if (!np) {
8186 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
8187 __func__,
8188 dai_link[i].cpu_dai_name);
8189 ret = -ENODEV;
8190 goto err;
8191 }
8192 dai_link[i].cpu_of_node = np;
8193 dai_link[i].cpu_dai_name = NULL;
8194 }
8195 }
8196
8197 /* populate codec_of_node for snd card dai links */
8198 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
8199 index = of_property_match_string(cdev->of_node,
8200 "asoc-codec-names",
8201 dai_link[i].codec_name);
8202 if (index < 0)
8203 continue;
8204 np = of_parse_phandle(cdev->of_node, "asoc-codec",
8205 index);
8206 if (!np) {
8207 pr_err("%s: retrieving phandle for codec %s failed\n",
8208 __func__, dai_link[i].codec_name);
8209 ret = -ENODEV;
8210 goto err;
8211 }
8212 dai_link[i].codec_of_node = np;
8213 dai_link[i].codec_name = NULL;
8214 }
8215 }
8216
8217err:
8218 return ret;
8219}
8220
8221static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
8222{
8223 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8224 struct snd_soc_component *component =
8225 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8226
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8227 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
8228 ARRAY_SIZE(msm_ext_snd_controls));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8229 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8230 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8231 "%s: add_codec_controls failed, err = %d\n",
8232 __func__, ret);
8233 return ret;
8234 }
8235
8236 return 0;
8237}
8238
8239static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
8240 struct snd_pcm_hw_params *params)
8241{
8242 struct snd_soc_pcm_runtime *rtd = substream->private_data;
8243 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
8244
8245 int ret = 0;
8246 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
8247 151};
8248 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
8249 134, 135, 136, 137, 138, 139,
8250 140, 141, 142, 143};
8251
8252 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
8253 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
8254 slim_rx_cfg[SLIM_RX_0].channels,
8255 rx_ch);
8256 if (ret < 0)
8257 pr_err("%s: RX failed to set cpu chan map error %d\n",
8258 __func__, ret);
8259 } else {
8260 ret = snd_soc_dai_set_channel_map(cpu_dai,
8261 slim_tx_cfg[SLIM_TX_0].channels,
8262 tx_ch, 0, 0);
8263 if (ret < 0)
8264 pr_err("%s: TX failed to set cpu chan map error %d\n",
8265 __func__, ret);
8266 }
8267
8268 return ret;
8269}
8270
8271static struct snd_soc_ops msm_stub_be_ops = {
8272 .hw_params = msm_snd_stub_hw_params,
8273};
8274
8275static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
8276
8277 /* FrontEnd DAI Links */
8278 {
8279 .name = "MSMSTUB Media1",
8280 .stream_name = "MultiMedia1",
8281 .cpu_dai_name = "MultiMedia1",
8282 .platform_name = "msm-pcm-dsp.0",
8283 .dynamic = 1,
8284 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
8285 .dpcm_playback = 1,
8286 .dpcm_capture = 1,
8287 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
8288 SND_SOC_DPCM_TRIGGER_POST},
8289 .codec_dai_name = "snd-soc-dummy-dai",
8290 .codec_name = "snd-soc-dummy",
8291 .ignore_suspend = 1,
8292 /* this dainlink has playback support */
8293 .ignore_pmdown_time = 1,
8294 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
8295 },
8296};
8297
8298static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
8299
8300 /* Backend DAI Links */
8301 {
8302 .name = LPASS_BE_SLIMBUS_0_RX,
8303 .stream_name = "Slimbus Playback",
8304 .cpu_dai_name = "msm-dai-q6-dev.16384",
8305 .platform_name = "msm-pcm-routing",
8306 .codec_name = "msm-stub-codec.1",
8307 .codec_dai_name = "msm-stub-rx",
8308 .no_pcm = 1,
8309 .dpcm_playback = 1,
8310 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
8311 .init = &msm_audrx_stub_init,
8312 .be_hw_params_fixup = msm_be_hw_params_fixup,
8313 .ignore_pmdown_time = 1, /* dai link has playback support */
8314 .ignore_suspend = 1,
8315 .ops = &msm_stub_be_ops,
8316 },
8317 {
8318 .name = LPASS_BE_SLIMBUS_0_TX,
8319 .stream_name = "Slimbus Capture",
8320 .cpu_dai_name = "msm-dai-q6-dev.16385",
8321 .platform_name = "msm-pcm-routing",
8322 .codec_name = "msm-stub-codec.1",
8323 .codec_dai_name = "msm-stub-tx",
8324 .no_pcm = 1,
8325 .dpcm_capture = 1,
8326 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
8327 .be_hw_params_fixup = msm_be_hw_params_fixup,
8328 .ignore_suspend = 1,
8329 .ops = &msm_stub_be_ops,
8330 },
8331};
8332
8333static struct snd_soc_dai_link msm_stub_dai_links[
8334 ARRAY_SIZE(msm_stub_fe_dai_links) +
8335 ARRAY_SIZE(msm_stub_be_dai_links)];
8336
8337struct snd_soc_card snd_soc_card_stub_msm = {
8338 .name = "sm6150-stub-snd-card",
8339};
8340
8341static const struct of_device_id sm6150_asoc_machine_of_match[] = {
8342 { .compatible = "qcom,sm6150-asoc-snd",
8343 .data = "codec"},
8344 { .compatible = "qcom,sm6150-asoc-snd-stub",
8345 .data = "stub_codec"},
8346 {},
8347};
8348
8349static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
8350{
8351 struct snd_soc_card *card = NULL;
8352 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8353 int total_links = 0, rc = 0;
8354 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
8355 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
8356 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8357 const struct of_device_id *match;
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8358 u32 tasha_codec = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8359
8360 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
8361 if (!match) {
8362 dev_err(dev, "%s: No DT match found for sound card\n",
8363 __func__);
8364 return NULL;
8365 }
8366
8367 if (!strcmp(match->data, "codec")) {
8368 card = &snd_soc_card_sm6150_msm;
8369 memcpy(msm_sm6150_dai_links + total_links,
8370 msm_common_dai_links,
8371 sizeof(msm_common_dai_links));
8372
8373 total_links += ARRAY_SIZE(msm_common_dai_links);
8374
8375 memcpy(msm_sm6150_dai_links + total_links,
8376 msm_common_misc_fe_dai_links,
8377 sizeof(msm_common_misc_fe_dai_links));
8378
8379 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
8380
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8381 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
8382 &tavil_codec);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8383 if (rc)
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8384 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8385 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8386
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8387 rc = of_property_read_u32(dev->of_node, "qcom,tasha_codec",
8388 &tasha_codec);
8389 if (rc)
8390 dev_dbg(dev, "%s: No DT match for tasha codec\n",
8391 __func__);
8392
8393 if (tavil_codec) {
8394 card->late_probe =
8395 msm_snd_card_tavil_late_probe;
8396 memcpy(msm_sm6150_dai_links + total_links,
8397 msm_tavil_fe_dai_links,
8398 sizeof(msm_tavil_fe_dai_links));
8399 total_links +=
8400 ARRAY_SIZE(msm_tavil_fe_dai_links);
8401 } else if (tasha_codec) {
8402 card->late_probe =
8403 msm_snd_card_tasha_late_probe;
8404 memcpy(msm_sm6150_dai_links + total_links,
8405 msm_tasha_fe_dai_links,
8406 sizeof(msm_tasha_fe_dai_links));
8407 total_links +=
8408 ARRAY_SIZE(msm_tasha_fe_dai_links);
8409 } else {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8410 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8411 msm_bolero_fe_dai_links,
8412 sizeof(msm_bolero_fe_dai_links));
8413 total_links +=
8414 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8415 }
8416
8417 memcpy(msm_sm6150_dai_links + total_links,
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]8418 msm_int_compress_capture_dai,
8419 sizeof(msm_int_compress_capture_dai));
8420
8421 total_links += ARRAY_SIZE(msm_int_compress_capture_dai);
8422
8423 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8424 msm_common_be_dai_links,
8425 sizeof(msm_common_be_dai_links));
8426
8427 total_links += ARRAY_SIZE(msm_common_be_dai_links);
8428
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8429 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8430 memcpy(msm_sm6150_dai_links + total_links,
8431 msm_tavil_be_dai_links,
8432 sizeof(msm_tavil_be_dai_links));
8433 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8434 } else if (tasha_codec) {
8435 memcpy(msm_sm6150_dai_links + total_links,
8436 msm_tasha_be_dai_links,
8437 sizeof(msm_tasha_be_dai_links));
8438 total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8439 } else {
8440 memcpy(msm_sm6150_dai_links + total_links,
8441 msm_wsa_cdc_dma_be_dai_links,
8442 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8443 total_links +=
8444 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8445
8446 memcpy(msm_sm6150_dai_links + total_links,
8447 msm_rx_tx_cdc_dma_be_dai_links,
8448 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
8449 total_links +=
8450 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
8451 }
8452
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8453 rc = of_property_read_u32(dev->of_node,
8454 "qcom,ext-disp-audio-rx",
8455 &ext_disp_audio_intf);
8456 if (rc) {
8457 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8458 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8459 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]8460 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8461 memcpy(msm_sm6150_dai_links + total_links,
8462 ext_disp_be_dai_link,
8463 sizeof(ext_disp_be_dai_link));
8464 total_links +=
8465 ARRAY_SIZE(ext_disp_be_dai_link);
8466 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8467 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8468
8469 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
8470 &mi2s_audio_intf);
8471 if (rc) {
8472 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
8473 __func__);
8474 } else {
8475 if (mi2s_audio_intf) {
8476 memcpy(msm_sm6150_dai_links + total_links,
8477 msm_mi2s_be_dai_links,
8478 sizeof(msm_mi2s_be_dai_links));
8479 total_links +=
8480 ARRAY_SIZE(msm_mi2s_be_dai_links);
8481 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8482 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8483
8484
8485 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
8486 &wcn_btfm_intf);
8487 if (rc) {
8488 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
8489 __func__);
8490 } else {
8491 if (wcn_btfm_intf) {
8492 memcpy(msm_sm6150_dai_links + total_links,
8493 msm_wcn_be_dai_links,
8494 sizeof(msm_wcn_be_dai_links));
8495 total_links +=
8496 ARRAY_SIZE(msm_wcn_be_dai_links);
8497 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8498 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8499
8500 rc = of_property_read_u32(dev->of_node,
8501 "qcom,auxpcm-audio-intf",
8502 &auxpcm_audio_intf);
8503 if (rc) {
8504 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
8505 __func__);
8506 } else {
8507 if (auxpcm_audio_intf) {
8508 memcpy(msm_sm6150_dai_links + total_links,
8509 msm_auxpcm_be_dai_links,
8510 sizeof(msm_auxpcm_be_dai_links));
8511 total_links +=
8512 ARRAY_SIZE(msm_auxpcm_be_dai_links);
8513 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8514 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8515
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8516 dailink = msm_sm6150_dai_links;
8517 } else if (!strcmp(match->data, "stub_codec")) {
8518 card = &snd_soc_card_stub_msm;
8519
8520 memcpy(msm_stub_dai_links + total_links,
8521 msm_stub_fe_dai_links,
8522 sizeof(msm_stub_fe_dai_links));
8523 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
8524
8525 memcpy(msm_stub_dai_links + total_links,
8526 msm_stub_be_dai_links,
8527 sizeof(msm_stub_be_dai_links));
8528 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
8529
8530 dailink = msm_stub_dai_links;
8531 }
8532
8533 if (card) {
8534 card->dai_link = dailink;
8535 card->num_links = total_links;
8536 }
8537
8538 return card;
8539}
8540
8541static int msm_wsa881x_init(struct snd_soc_component *component)
8542{
8543 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8544 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8545 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
8546 SPKR_L_BOOST, SPKR_L_VI};
8547 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
8548 SPKR_R_BOOST, SPKR_R_VI};
8549 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
8550 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8551 struct msm_asoc_mach_data *pdata;
8552 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8553 struct snd_card *card = component->card->snd_card;
8554 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8555 int ret = 0;
8556
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8557 if (!component) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8558 pr_err("%s codec is NULL\n", __func__);
8559 return -EINVAL;
8560 }
8561
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8562 dapm = snd_soc_component_get_dapm(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8563
8564 if (!strcmp(component->name_prefix, "SpkrLeft")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8565 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
8566 __func__, component->name);
8567 wsa881x_set_channel_map(component, &spkleft_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8568 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8569 &ch_rate[0], &spkleft_port_types[0]);
8570 if (dapm->component) {
8571 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
8572 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
8573 }
8574 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8575 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
8576 __func__, component->name);
8577 wsa881x_set_channel_map(component, &spkright_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8578 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8579 &ch_rate[0], &spkright_port_types[0]);
8580 if (dapm->component) {
8581 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
8582 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
8583 }
8584 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8585 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
8586 component->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8587 ret = -EINVAL;
8588 goto err;
8589 }
8590 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8591 if (!pdata->codec_root) {
8592 entry = snd_info_create_subdir(card->module, "codecs",
8593 card->proc_root);
8594 if (!entry) {
8595 pr_err("%s: Cannot create codecs module entry\n",
8596 __func__);
8597 ret = 0;
8598 goto err;
8599 }
8600 pdata->codec_root = entry;
8601 }
8602 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8603 component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8604err:
8605 return ret;
8606}
8607
8608static int msm_aux_codec_init(struct snd_soc_component *component)
8609{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8610 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8611 int ret = 0;
8612 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8613 struct snd_info_entry *entry;
8614 struct snd_card *card = component->card->snd_card;
8615 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8616
8617 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8618 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8619 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8620 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8621 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8622 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8623 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8624 snd_soc_dapm_sync(dapm);
8625
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8626 pdata = snd_soc_card_get_drvdata(component->card);
8627 if (!pdata->codec_root) {
8628 entry = snd_info_create_subdir(card->module, "codecs",
8629 card->proc_root);
8630 if (!entry) {
8631 pr_err("%s: Cannot create codecs module entry\n",
8632 __func__);
8633 ret = 0;
8634 goto codec_root_err;
8635 }
8636 pdata->codec_root = entry;
8637 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8638 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8639codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8640 mbhc_calibration = def_wcd_mbhc_cal();
8641 if (!mbhc_calibration) {
8642 return -ENOMEM;
8643 }
8644 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8645 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8646
8647 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8648}
8649
8650static int msm_init_aux_dev(struct platform_device *pdev,
8651 struct snd_soc_card *card)
8652{
8653 struct device_node *wsa_of_node;
8654 struct device_node *aux_codec_of_node;
8655 u32 wsa_max_devs;
8656 u32 wsa_dev_cnt;
Aditya Bavanari32b3e5e2018-12-04 17:19:56 +0530[diff] [blame]8657 u32 codec_max_aux_devs = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8658 u32 codec_aux_dev_cnt = 0;
8659 int i;
Md Mansoor Ahmed2382aaa2018-11-20 11:06:32 +0530[diff] [blame]8660 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8661 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8662 const char *auxdev_name_prefix[1];
8663 char *dev_name_str = NULL;
8664 int found = 0;
8665 int codecs_found = 0;
8666 int ret = 0;
8667
8668 /* Get maximum WSA device count for this platform */
8669 ret = of_property_read_u32(pdev->dev.of_node,
8670 "qcom,wsa-max-devs", &wsa_max_devs);
8671 if (ret) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8672 dev_err(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8673 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8674 __func__, pdev->dev.of_node->full_name, ret);
8675 wsa_max_devs = 0;
8676 goto codec_aux_dev;
8677 }
8678 if (wsa_max_devs == 0) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8679 dev_dbg(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8680 "%s: Max WSA devices is 0 for this target?\n",
8681 __func__);
8682 goto codec_aux_dev;
8683 }
8684
8685 /* Get count of WSA device phandles for this platform */
8686 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8687 "qcom,wsa-devs", NULL);
8688 if (wsa_dev_cnt == -ENOENT) {
8689 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8690 __func__);
8691 goto err;
8692 } else if (wsa_dev_cnt <= 0) {
8693 dev_err(&pdev->dev,
8694 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8695 __func__, wsa_dev_cnt);
8696 ret = -EINVAL;
8697 goto err;
8698 }
8699
8700 /*
8701 * Expect total phandles count to be NOT less than maximum possible
8702 * WSA count. However, if it is less, then assign same value to
8703 * max count as well.
8704 */
8705 if (wsa_dev_cnt < wsa_max_devs) {
8706 dev_dbg(&pdev->dev,
8707 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8708 __func__, wsa_max_devs, wsa_dev_cnt);
8709 wsa_max_devs = wsa_dev_cnt;
8710 }
8711
8712 /* Make sure prefix string passed for each WSA device */
8713 ret = of_property_count_strings(pdev->dev.of_node,
8714 "qcom,wsa-aux-dev-prefix");
8715 if (ret != wsa_dev_cnt) {
8716 dev_err(&pdev->dev,
8717 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8718 __func__, wsa_dev_cnt, ret);
8719 ret = -EINVAL;
8720 goto err;
8721 }
8722
8723 /*
8724 * Alloc mem to store phandle and index info of WSA device, if already
8725 * registered with ALSA core
8726 */
8727 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8728 sizeof(struct msm_wsa881x_dev_info),
8729 GFP_KERNEL);
8730 if (!wsa881x_dev_info) {
8731 ret = -ENOMEM;
8732 goto err;
8733 }
8734
8735 /*
8736 * search and check whether all WSA devices are already
8737 * registered with ALSA core or not. If found a node, store
8738 * the node and the index in a local array of struct for later
8739 * use.
8740 */
8741 for (i = 0; i < wsa_dev_cnt; i++) {
8742 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8743 "qcom,wsa-devs", i);
8744 if (unlikely(!wsa_of_node)) {
8745 /* we should not be here */
8746 dev_err(&pdev->dev,
8747 "%s: wsa dev node is not present\n",
8748 __func__);
8749 ret = -EINVAL;
8750 goto err;
8751 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8752 if (soc_find_component_locked(wsa_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8753 /* WSA device registered with ALSA core */
8754 wsa881x_dev_info[found].of_node = wsa_of_node;
8755 wsa881x_dev_info[found].index = i;
8756 found++;
8757 if (found == wsa_max_devs)
8758 break;
8759 }
8760 }
8761
8762 if (found < wsa_max_devs) {
8763 dev_dbg(&pdev->dev,
8764 "%s: failed to find %d components. Found only %d\n",
8765 __func__, wsa_max_devs, found);
8766 return -EPROBE_DEFER;
8767 }
8768 dev_info(&pdev->dev,
8769 "%s: found %d wsa881x devices registered with ALSA core\n",
8770 __func__, found);
8771
8772codec_aux_dev:
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]8773 if (!strnstr(card->name, "tavil", strlen(card->name)) &&
8774 !strnstr(card->name, "tasha", strlen(card->name))) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8775 /* Get maximum aux codec device count for this platform */
8776 ret = of_property_read_u32(pdev->dev.of_node,
8777 "qcom,codec-max-aux-devs",
8778 &codec_max_aux_devs);
8779 if (ret) {
8780 dev_err(&pdev->dev,
8781 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8782 __func__, pdev->dev.of_node->full_name, ret);
8783 codec_max_aux_devs = 0;
8784 goto aux_dev_register;
8785 }
8786 if (codec_max_aux_devs == 0) {
8787 dev_dbg(&pdev->dev,
8788 "%s: Max aux codec devices is 0 for this target?\n",
8789 __func__);
8790 goto aux_dev_register;
8791 }
8792
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8793 /* Get count of aux codec device phandles for this platform */
8794 codec_aux_dev_cnt = of_count_phandle_with_args(
8795 pdev->dev.of_node,
8796 "qcom,codec-aux-devs", NULL);
8797 if (codec_aux_dev_cnt == -ENOENT) {
8798 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8799 __func__);
8800 goto err;
8801 } else if (codec_aux_dev_cnt <= 0) {
8802 dev_err(&pdev->dev,
8803 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8804 __func__, codec_aux_dev_cnt);
8805 ret = -EINVAL;
8806 goto err;
8807 }
8808
8809 /*
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8810 * Expect total phandles count to be NOT less than maximum possible
8811 * AUX device count. However, if it is less, then assign same value to
8812 * max count as well.
8813 */
8814 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8815 dev_dbg(&pdev->dev,
8816 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8817 __func__, codec_max_aux_devs,
8818 codec_aux_dev_cnt);
8819 codec_max_aux_devs = codec_aux_dev_cnt;
8820 }
8821
8822 /*
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8823 * Alloc mem to store phandle and index info of aux codec
8824 * if already registered with ALSA core
8825 */
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8826 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8827 sizeof(struct aux_codec_dev_info),
8828 GFP_KERNEL);
8829 if (!aux_cdc_dev_info) {
8830 ret = -ENOMEM;
8831 goto err;
8832 }
8833
8834 /*
8835 * search and check whether all aux codecs are already
8836 * registered with ALSA core or not. If found a node, store
8837 * the node and the index in a local array of struct for later
8838 * use.
8839 */
8840 for (i = 0; i < codec_aux_dev_cnt; i++) {
8841 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8842 "qcom,codec-aux-devs", i);
8843 if (unlikely(!aux_codec_of_node)) {
8844 /* we should not be here */
8845 dev_err(&pdev->dev,
8846 "%s: aux codec dev node is not present\n",
8847 __func__);
8848 ret = -EINVAL;
8849 goto err;
8850 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8851 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8852 /* AUX codec registered with ALSA core */
8853 aux_cdc_dev_info[codecs_found].of_node =
8854 aux_codec_of_node;
8855 aux_cdc_dev_info[codecs_found].index = i;
8856 codecs_found++;
8857 }
8858 }
8859
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8860 if (codecs_found < codec_max_aux_devs) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8861 dev_dbg(&pdev->dev,
8862 "%s: failed to find %d components. Found only %d\n",
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8863 __func__, codec_max_aux_devs, codecs_found);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8864 return -EPROBE_DEFER;
8865 }
8866 dev_info(&pdev->dev,
8867 "%s: found %d AUX codecs registered with ALSA core\n",
8868 __func__, codecs_found);
8869
8870 }
8871
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8872aux_dev_register:
8873 card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
8874 card->num_configs = wsa_max_devs + codec_max_aux_devs;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8875
8876 /* Alloc array of AUX devs struct */
8877 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8878 sizeof(struct snd_soc_aux_dev),
8879 GFP_KERNEL);
8880 if (!msm_aux_dev) {
8881 ret = -ENOMEM;
8882 goto err;
8883 }
8884
8885 /* Alloc array of codec conf struct */
8886 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8887 sizeof(struct snd_soc_codec_conf),
8888 GFP_KERNEL);
8889 if (!msm_codec_conf) {
8890 ret = -ENOMEM;
8891 goto err;
8892 }
8893
8894 for (i = 0; i < wsa_max_devs; i++) {
8895 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8896 GFP_KERNEL);
8897 if (!dev_name_str) {
8898 ret = -ENOMEM;
8899 goto err;
8900 }
8901
8902 ret = of_property_read_string_index(pdev->dev.of_node,
8903 "qcom,wsa-aux-dev-prefix",
8904 wsa881x_dev_info[i].index,
8905 auxdev_name_prefix);
8906 if (ret) {
8907 dev_err(&pdev->dev,
8908 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8909 __func__, ret);
8910 ret = -EINVAL;
8911 goto err;
8912 }
8913
8914 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8915 msm_aux_dev[i].name = dev_name_str;
8916 msm_aux_dev[i].codec_name = NULL;
8917 msm_aux_dev[i].codec_of_node =
8918 wsa881x_dev_info[i].of_node;
8919 msm_aux_dev[i].init = msm_wsa881x_init;
8920 msm_codec_conf[i].dev_name = NULL;
8921 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8922 msm_codec_conf[i].of_node =
8923 wsa881x_dev_info[i].of_node;
8924 }
8925
8926 for (i = 0; i < codec_aux_dev_cnt; i++) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8927 msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8928 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8929 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8930 aux_cdc_dev_info[i].of_node;
8931 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8932 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8933 msm_codec_conf[wsa_max_devs + i].name_prefix =
8934 NULL;
8935 msm_codec_conf[wsa_max_devs + i].of_node =
8936 aux_cdc_dev_info[i].of_node;
8937 }
8938
8939 card->codec_conf = msm_codec_conf;
8940 card->aux_dev = msm_aux_dev;
8941err:
8942 return ret;
8943}
8944
8945static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8946{
8947 int count;
8948 u32 mi2s_master_slave[MI2S_MAX];
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8949 u32 mi2s_ext_mclk[MI2S_MAX];
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8950 int ret;
8951
8952 for (count = 0; count < MI2S_MAX; count++) {
8953 mutex_init(&mi2s_intf_conf[count].lock);
8954 mi2s_intf_conf[count].ref_cnt = 0;
8955 }
8956
8957 ret = of_property_read_u32_array(pdev->dev.of_node,
8958 "qcom,msm-mi2s-master",
8959 mi2s_master_slave, MI2S_MAX);
8960 if (ret) {
8961 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8962 __func__);
8963 } else {
8964 for (count = 0; count < MI2S_MAX; count++) {
8965 mi2s_intf_conf[count].msm_is_mi2s_master =
8966 mi2s_master_slave[count];
8967 }
8968 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8969
8970 ret = of_property_read_u32_array(pdev->dev.of_node,
8971 "qcom,msm-mi2s-ext-mclk",
8972 mi2s_ext_mclk, MI2S_MAX);
8973 if (ret) {
8974 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
8975 __func__);
8976 } else {
8977 for (count = 0; count < MI2S_MAX; count++)
8978 mi2s_intf_conf[count].msm_is_ext_mclk =
8979 mi2s_ext_mclk[count];
8980 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8981}
8982
8983static void msm_i2s_auxpcm_deinit(void)
8984{
8985 int count;
8986
8987 for (count = 0; count < MI2S_MAX; count++) {
8988 mutex_destroy(&mi2s_intf_conf[count].lock);
8989 mi2s_intf_conf[count].ref_cnt = 0;
8990 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8991 mi2s_intf_conf[count].msm_is_ext_mclk = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8992 }
8993}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8994
8995static int sm6150_ssr_enable(struct device *dev, void *data)
8996{
8997 struct platform_device *pdev = to_platform_device(dev);
8998 struct snd_soc_card *card = platform_get_drvdata(pdev);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8999 struct msm_asoc_mach_data *pdata = NULL;
9000 struct snd_soc_component *component = NULL;
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9001 int ret = 0;
9002
9003 if (!card) {
9004 dev_err(dev, "%s: card is NULL\n", __func__);
9005 ret = -EINVAL;
9006 goto err;
9007 }
9008
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]9009 if (strnstr(card->name, "tavil", strlen(card->name)) ||
9010 strnstr(card->name, "tasha", strlen(card->name))) {
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9011 pdata = snd_soc_card_get_drvdata(card);
9012 if (!pdata->is_afe_config_done) {
9013 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
9014 struct snd_soc_pcm_runtime *rtd;
9015
9016 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
9017 if (!rtd) {
9018 dev_err(dev,
9019 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
9020 __func__, be_dl_name);
9021 ret = -EINVAL;
9022 goto err;
9023 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]9024 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
9025 if (!component) {
9026 dev_err(dev, "%s: component is NULL\n",
9027 __func__);
9028 ret = -EINVAL;
9029 goto err;
9030 }
9031 ret = msm_afe_set_config(component);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9032 if (ret)
9033 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
9034 __func__, ret);
9035 else
9036 pdata->is_afe_config_done = true;
9037 }
9038 }
9039 snd_soc_card_change_online_state(card, 1);
9040 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
9041
9042err:
9043 return ret;
9044}
9045
9046static void sm6150_ssr_disable(struct device *dev, void *data)
9047{
9048 struct platform_device *pdev = to_platform_device(dev);
9049 struct snd_soc_card *card = platform_get_drvdata(pdev);
9050 struct msm_asoc_mach_data *pdata;
9051
9052 if (!card) {
9053 dev_err(dev, "%s: card is NULL\n", __func__);
9054 return;
9055 }
9056
9057 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
9058 snd_soc_card_change_online_state(card, 0);
9059
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]9060 if (strnstr(card->name, "tavil", strlen(card->name)) ||
9061 strnstr(card->name, "tasha", strlen(card->name))) {
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9062 pdata = snd_soc_card_get_drvdata(card);
9063 msm_afe_clear_config();
9064 pdata->is_afe_config_done = false;
9065 }
9066}
9067
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9068static int msm_ext_prepare_hifi(struct msm_asoc_mach_data *pdata)
9069{
9070 int ret = 0;
9071
9072 if (gpio_is_valid(pdata->hph_en1_gpio)) {
9073 pr_debug("%s: hph_en1_gpio request %d\n", __func__,
9074 pdata->hph_en1_gpio);
9075 ret = gpio_request(pdata->hph_en1_gpio, "hph_en1_gpio");
9076 if (ret) {
9077 pr_err("%s: hph_en1_gpio request failed, ret:%d\n",
9078 __func__, ret);
9079 goto err;
9080 }
9081 }
9082 if (gpio_is_valid(pdata->hph_en0_gpio)) {
9083 pr_debug("%s: hph_en0_gpio request %d\n", __func__,
9084 pdata->hph_en0_gpio);
9085 ret = gpio_request(pdata->hph_en0_gpio, "hph_en0_gpio");
9086 if (ret)
9087 pr_err("%s: hph_en0_gpio request failed, ret:%d\n",
9088 __func__, ret);
9089 }
9090
9091err:
9092 return ret;
9093}
9094
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9095static const struct snd_event_ops sm6150_ssr_ops = {
9096 .enable = sm6150_ssr_enable,
9097 .disable = sm6150_ssr_disable,
9098};
9099
9100static int msm_audio_ssr_compare(struct device *dev, void *data)
9101{
9102 struct device_node *node = data;
9103
9104 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
9105 __func__, dev->of_node, node);
9106 return (dev->of_node && dev->of_node == node);
9107}
9108
9109static int msm_audio_ssr_register(struct device *dev)
9110{
9111 struct device_node *np = dev->of_node;
9112 struct snd_event_clients *ssr_clients = NULL;
9113 struct device_node *node;
9114 int ret;
9115 int i;
9116
9117 for (i = 0; ; i++) {
9118 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
9119 if (!node)
9120 break;
9121 snd_event_mstr_add_client(&ssr_clients,
9122 msm_audio_ssr_compare, node);
9123 }
9124
9125 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
9126 ssr_clients, NULL);
9127 if (!ret)
9128 snd_event_notify(dev, SND_EVENT_UP);
9129
9130 return ret;
9131}
9132
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9133static int msm_asoc_machine_probe(struct platform_device *pdev)
9134{
9135 struct snd_soc_card *card;
9136 struct msm_asoc_mach_data *pdata;
9137 const char *mbhc_audio_jack_type = NULL;
9138 int ret;
9139
9140 if (!pdev->dev.of_node) {
9141 dev_err(&pdev->dev, "No platform supplied from device tree\n");
9142 return -EINVAL;
9143 }
9144
9145 pdata = devm_kzalloc(&pdev->dev,
9146 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
9147 if (!pdata)
9148 return -ENOMEM;
9149
9150 card = populate_snd_card_dailinks(&pdev->dev);
9151 if (!card) {
9152 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
9153 ret = -EINVAL;
9154 goto err;
9155 }
9156 card->dev = &pdev->dev;
9157 platform_set_drvdata(pdev, card);
9158 snd_soc_card_set_drvdata(card, pdata);
9159
9160 ret = snd_soc_of_parse_card_name(card, "qcom,model");
9161 if (ret) {
9162 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
9163 ret);
9164 goto err;
9165 }
9166
9167 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
9168 if (ret) {
9169 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
9170 ret);
9171 goto err;
9172 }
9173
9174 ret = msm_populate_dai_link_component_of_node(card);
9175 if (ret) {
9176 ret = -EPROBE_DEFER;
9177 goto err;
9178 }
9179
9180 ret = msm_init_aux_dev(pdev, card);
9181 if (ret)
9182 goto err;
9183
9184 ret = devm_snd_soc_register_card(&pdev->dev, card);
9185 if (ret == -EPROBE_DEFER) {
9186 if (codec_reg_done)
9187 ret = -EINVAL;
9188 goto err;
9189 } else if (ret) {
9190 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
9191 ret);
9192 goto err;
9193 }
9194 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9195
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9196 pdata->hph_en1_gpio = of_get_named_gpio(pdev->dev.of_node,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9197 "qcom,hph-en1-gpio", 0);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9198 if (!gpio_is_valid(pdata->hph_en1_gpio))
9199 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
9200 "qcom,hph-en1-gpio", 0);
9201 if (!gpio_is_valid(pdata->hph_en1_gpio) && (!pdata->hph_en1_gpio_p)) {
9202 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9203 "qcom,hph-en1-gpio", pdev->dev.of_node->full_name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9204 }
9205
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9206 pdata->hph_en0_gpio = of_get_named_gpio(pdev->dev.of_node,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9207 "qcom,hph-en0-gpio", 0);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9208 if (!gpio_is_valid(pdata->hph_en0_gpio))
9209 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
9210 "qcom,hph-en0-gpio", 0);
9211 if (!gpio_is_valid(pdata->hph_en0_gpio) && (!pdata->hph_en0_gpio_p)) {
9212 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9213 "qcom,hph-en0-gpio", pdev->dev.of_node->full_name);
9214 }
9215
9216 ret = msm_ext_prepare_hifi(pdata);
9217 if (ret) {
9218 dev_dbg(&pdev->dev, "msm_ext_prepare_hifi failed (%d)\n",
9219 ret);
9220 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9221 }
9222
9223 ret = of_property_read_string(pdev->dev.of_node,
9224 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
9225 if (ret) {
9226 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
9227 "qcom,mbhc-audio-jack-type",
9228 pdev->dev.of_node->full_name);
9229 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]9230 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9231 } else {
9232 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
9233 wcd_mbhc_cfg.enable_anc_mic_detect = false;
9234 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
9235 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
9236 wcd_mbhc_cfg.enable_anc_mic_detect = true;
9237 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
9238 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
9239 wcd_mbhc_cfg.enable_anc_mic_detect = true;
9240 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
9241 } else {
9242 wcd_mbhc_cfg.enable_anc_mic_detect = false;
9243 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
9244 }
9245 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]9246
9247 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
9248 "qcom,pri-mi2s-gpios", 0);
9249 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
9250 "qcom,sec-mi2s-gpios", 0);
9251 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
9252 "qcom,tert-mi2s-gpios", 0);
9253 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
9254 "qcom,quat-mi2s-gpios", 0);
9255 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
9256 "qcom,quin-mi2s-gpios", 0);
9257
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9258 /*
9259 * Parse US-Euro gpio info from DT. Report no error if us-euro
9260 * entry is not found in DT file as some targets do not support
9261 * US-Euro detection
9262 */
9263 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
9264 "qcom,us-euro-gpios", 0);
9265 if (!pdata->us_euro_gpio_p) {
9266 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9267 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
9268 } else {
9269 dev_dbg(&pdev->dev, "%s detected\n",
9270 "qcom,us-euro-gpios");
9271 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
9272 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]9273
9274 if (wcd_mbhc_cfg.enable_usbc_analog) {
9275 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
9276
9277 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
9278 "fsa4480-i2c-handle", 0);
9279 if (!pdata->fsa_handle)
9280 dev_err(&pdev->dev,
9281 "property %s not detected in node %s\n",
9282 "fsa4480-i2c-handle",
9283 pdev->dev.of_node->full_name);
9284 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9285
9286 msm_i2s_auxpcm_init(pdev);
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]9287 if (!strnstr(card->name, "tavil", strlen(card->name)) &&
9288 !strnstr(card->name, "tasha", strlen(card->name))) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9289 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
9290 "qcom,cdc-dmic01-gpios",
9291 0);
9292 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
9293 "qcom,cdc-dmic23-gpios",
9294 0);
9295 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9296
9297 ret = msm_audio_ssr_register(&pdev->dev);
9298 if (ret)
9299 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
9300 __func__, ret);
9301
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9302err:
9303 return ret;
9304}
9305
9306static int msm_asoc_machine_remove(struct platform_device *pdev)
9307{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9308 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9309 msm_i2s_auxpcm_deinit();
9310
9311 return 0;
9312}
9313
9314static struct platform_driver sm6150_asoc_machine_driver = {
9315 .driver = {
9316 .name = DRV_NAME,
9317 .owner = THIS_MODULE,
9318 .pm = &snd_soc_pm_ops,
9319 .of_match_table = sm6150_asoc_machine_of_match,
9320 },
9321 .probe = msm_asoc_machine_probe,
9322 .remove = msm_asoc_machine_remove,
9323};
9324module_platform_driver(sm6150_asoc_machine_driver);
9325
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]9326MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9327MODULE_LICENSE("GPL v2");
9328MODULE_ALIAS("platform:" DRV_NAME);
9329MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);