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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 58d303a797f8491211da7eb93b8479a5df9a2e67 / . / arch / arm / boot / dts / msm8226.dtsi
blob: ca3fe99ce37df42a9b8f015e450f8b9154a53643 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]52 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
53 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]54 };
55
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]56 memory {
57 secure_mem: secure_region {
58 linux,contiguous-region;
59 reg = <0 0x3800000>;
60 label = "secure_mem";
61 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]62
63 qsecom_mem: qsecom_region {
64 linux,contiguous-region;
65 reg = <0 0x780000>;
66 label = "qsecom_mem";
67 };
68
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]69 };
70
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame^]71 qcom,mpm2-sleep-counter@fc4a3000 {
72 compatible = "qcom,mpm2-sleep-counter";
73 reg = <0xfc4a3000 0x1000>;
74 clock-frequency = <32768>;
75 };
76
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]77 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]78 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]79 interrupts = <1 2 0 1 3 0>;
80 clock-frequency = <19200000>;
81 };
82
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]83 timer@f9020000 {
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
87 compatible = "arm,armv7-timer-mem";
88 reg = <0xf9020000 0x1000>;
89 clock-frequency = <19200000>;
90
91 frame@f9021000 {
92 frame-number = <0>;
93 interrupts = <0 8 0x4>,
94 <0 7 0x4>;
95 reg = <0xf9021000 0x1000>,
96 <0xf9022000 0x1000>;
97 };
98
99 frame@f9023000 {
100 frame-number = <1>;
101 interrupts = <0 9 0x4>;
102 reg = <0xf9023000 0x1000>;
103 status = "disabled";
104 };
105
106 frame@f9024000 {
107 frame-number = <2>;
108 interrupts = <0 10 0x4>;
109 reg = <0xf9024000 0x1000>;
110 status = "disabled";
111 };
112
113 frame@f9025000 {
114 frame-number = <3>;
115 interrupts = <0 11 0x4>;
116 reg = <0xf9025000 0x1000>;
117 status = "disabled";
118 };
119
120 frame@f9026000 {
121 frame-number = <4>;
122 interrupts = <0 12 0x4>;
123 reg = <0xf9026000 0x1000>;
124 status = "disabled";
125 };
126
127 frame@f9027000 {
128 frame-number = <5>;
129 interrupts = <0 13 0x4>;
130 reg = <0xf9027000 0x1000>;
131 status = "disabled";
132 };
133
134 frame@f9028000 {
135 frame-number = <6>;
136 interrupts = <0 14 0x4>;
137 reg = <0xf9028000 0x1000>;
138 status = "disabled";
139 };
140 };
141
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]142 qcom,vidc@fdc00000 {
143 compatible = "qcom,msm-vidc";
144 reg = <0xfdc00000 0xff000>;
145 interrupts = <0 44 0>;
146 qcom,load-freq-tbl = <352800 160000000>,
147 <244800 133330000>,
148 <108000 66700000>;
149 qcom,hfi = "venus";
150 qcom,bus-ports = <1>;
151 qcom,reg-presets = <0xE0024 0x0>,
152 <0x80124 0x3>,
153 <0xE0020 0x5555556>,
154 <0x800B0 0x10101001>,
155 <0x800B4 0x00101010>,
156 <0x800C0 0x1010100f>,
157 <0x800C4 0x00101010>,
158 <0x800D0 0x00000010>,
159 <0x800D4 0x00000010>,
160 <0x800D8 0x00000707>;
161 qcom,enc-ddr-ab-ib = <0 0>,
162 <129000 142000>,
163 <384000 422000>,
164 <866000 953000>;
165 qcom,dec-ddr-ab-ib = <0 0>,
166 <103000 134000>,
167 <268000 348000>,
168 <505000 657000>;
169 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
170 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
171 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
172 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]173 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]174 };
175
176 qcom,wfd {
177 compatible = "qcom,msm-wfd";
178 };
179
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]180 serial@f991f000 {
181 compatible = "qcom,msm-lsuart-v14";
182 reg = <0xf991f000 0x1000>;
183 interrupts = <0 109 0>;
184 status = "disabled";
185 };
186
187 serial@f995e000 {
188 compatible = "qcom,msm-lsuart-v14";
189 reg = <0xf995e000 0x1000>;
190 interrupts = <0 114 0>;
191 status = "disabled";
192 };
193
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]194 qcom,msm-imem@fe805000 {
195 compatible = "qcom,msm-imem";
196 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
197 };
198
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]199 qcom,sps@f9984000 {
200 compatible = "qcom,msm_sps";
201 reg = <0xf9984000 0x15000>,
202 <0xf9999000 0xb000>;
203 interrupts = <0 94 0>;
204 };
205
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]206 qcom,usbbam@f9a44000 {
207 compatible = "qcom,usb-bam-msm";
208 reg = <0xf9a44000 0x11000>;
209 reg-names = "hsusb";
210 interrupts = <0 135 0>;
211 interrupt-names = "hsusb";
212 qcom,usb-bam-num-pipes = <16>;
213 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
214 qcom,ignore-core-reset-ack;
215 qcom,disable-clk-gating;
216
217 qcom,pipe0 {
218 label = "hsusb-qdss-in-0";
219 qcom,usb-bam-mem-type = <3>;
220 qcom,bam-type = <1>;
221 qcom,dir = <1>;
222 qcom,pipe-num = <0>;
223 qcom,peer-bam = <1>;
224 qcom,src-bam-physical-address = <0xfc37c000>;
225 qcom,src-bam-pipe-index = <0>;
226 qcom,dst-bam-physical-address = <0xf9a44000>;
227 qcom,dst-bam-pipe-index = <2>;
228 qcom,data-fifo-offset = <0x0>;
229 qcom,data-fifo-size = <0x600>;
230 qcom,descriptor-fifo-offset = <0x600>;
231 qcom,descriptor-fifo-size = <0x200>;
232 };
233 };
234
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]235 usb@f9a55000 {
236 compatible = "qcom,hsusb-otg";
237 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]238 interrupts = <0 134 0>, <0 140 0>;
239 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]240 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]241 HSUSB_1p8-supply = <&pm8226_l10>;
242 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]243 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]244
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]245 qcom,hsusb-otg-phy-init-seq =
246 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]247 qcom,hsusb-otg-phy-type = <2>;
248 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]249 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]250 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]251 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]252
253 qcom,msm-bus,name = "usb2";
254 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]255 qcom,msm-bus,num-paths = <1>;
256 qcom,msm-bus,vectors-KBps =
257 <87 512 0 0>,
258 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]259 };
260
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]261 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]262 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]263 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]264 qcom,android-usb-cdrom;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]265 };
266
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]267 wcd9xxx_intc: wcd9xxx-irq {
268 compatible = "qcom,wcd9xxx-irq";
269 interrupt-controller;
270 #interrupt-cells = <1>;
271 interrupt-parent = <&msmgpio>;
272 interrupts = <68 0>;
273 interrupt-names = "cdc-int";
274 };
275
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]276 slim@fe12f000 {
277 cell-index = <1>;
278 compatible = "qcom,slim-ngd";
279 reg = <0xfe12f000 0x35000>,
280 <0xfe104000 0x20000>;
281 reg-names = "slimbus_physical", "slimbus_bam_physical";
282 interrupts = <0 163 0>, <0 164 0>;
283 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]284
285 tapan_codec {
286 compatible = "qcom,tapan-slim-pgd";
287 elemental-addr = [00 01 E0 00 17 02];
288
289 interrupt-parent = <&wcd9xxx_intc>;
290 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
291 17 18 19 20 21 22 23 24 25 26 27 28>;
292 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
293
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]294 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]295 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
296 qcom,cdc-vdd-buck-current = <650000>;
297
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]298 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]299 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
300 qcom,cdc-vdd-h-current = <25000>;
301
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]302 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]303 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
304 qcom,cdc-vdd-px-current = <25000>;
305
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]306 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]307 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
308 qcom,cdc-vdd-a-1p2v-current = <10000>;
309
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]310 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]311 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
312 qcom,cdc-vdd-cx-current = <10000>;
313
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]314 qcom,cdc-static-supplies = "cdc-vdd-buck",
315 "cdc-vdd-h",
316 "cdc-vdd-px",
317 "cdc-vdd-a-1p2v",
318 "cdc-vdd-cx";
319
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]320 qcom,cdc-micbias-ldoh-v = <0x3>;
321 qcom,cdc-micbias-cfilt1-mv = <1800>;
322 qcom,cdc-micbias-cfilt2-mv = <1800>;
323 qcom,cdc-micbias-cfilt3-mv = <1800>;
324
325 qcom,cdc-micbias1-cfilt-sel = <0x0>;
326 qcom,cdc-micbias2-cfilt-sel = <0x1>;
327 qcom,cdc-micbias3-cfilt-sel = <0x2>;
328
329 qcom,cdc-mclk-clk-rate = <9600000>;
330 qcom,cdc-slim-ifd = "tapan-slim-ifd";
331 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
332 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]333 };
334
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]335 qcom,msm-adsp-loader {
336 compatible = "qcom,adsp-loader";
337 qcom,adsp-state = <0>;
338 };
339
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]340 sound {
341 compatible = "qcom,msm8226-audio-tapan";
342 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]343 qcom,tapan-mclk-clk-freq = <9600000>;
344 };
345
346 qcom,msm-pcm {
347 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]348 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]349 };
350
351 qcom,msm-pcm-routing {
352 compatible = "qcom,msm-pcm-routing";
353 };
354
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]355 qcom,msm-pcm-low-latency {
356 compatible = "qcom,msm-pcm-dsp";
357 qcom,msm-pcm-dsp-id = <1>;
358 qcom,msm-pcm-low-latency;
359 };
360
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]361 qcom,msm-pcm-lpa {
362 compatible = "qcom,msm-pcm-lpa";
363 };
364
365 qcom,msm-compr-dsp {
366 compatible = "qcom,msm-compr-dsp";
367 };
368
369 qcom,msm-voip-dsp {
370 compatible = "qcom,msm-voip-dsp";
371 };
372
373 qcom,msm-pcm-voice {
374 compatible = "qcom,msm-pcm-voice";
375 };
376
377 qcom,msm-stub-codec {
378 compatible = "qcom,msm-stub-codec";
379 };
380
381 qcom,msm-dai-fe {
382 compatible = "qcom,msm-dai-fe";
383 };
384
385 qcom,msm-pcm-afe {
386 compatible = "qcom,msm-pcm-afe";
387 };
388
389 qcom,msm-dai-q6-hdmi {
390 compatible = "qcom,msm-dai-q6-hdmi";
391 qcom,msm-dai-q6-dev-id = <8>;
392 };
393
394 qcom,msm-dai-q6 {
395 compatible = "qcom,msm-dai-q6";
396 qcom,msm-dai-q6-sb-0-rx {
397 compatible = "qcom,msm-dai-q6-dev";
398 qcom,msm-dai-q6-dev-id = <16384>;
399 };
400
401 qcom,msm-dai-q6-sb-0-tx {
402 compatible = "qcom,msm-dai-q6-dev";
403 qcom,msm-dai-q6-dev-id = <16385>;
404 };
405
406 qcom,msm-dai-q6-sb-1-rx {
407 compatible = "qcom,msm-dai-q6-dev";
408 qcom,msm-dai-q6-dev-id = <16386>;
409 };
410
411 qcom,msm-dai-q6-sb-1-tx {
412 compatible = "qcom,msm-dai-q6-dev";
413 qcom,msm-dai-q6-dev-id = <16387>;
414 };
415
416 qcom,msm-dai-q6-sb-3-rx {
417 compatible = "qcom,msm-dai-q6-dev";
418 qcom,msm-dai-q6-dev-id = <16390>;
419 };
420
421 qcom,msm-dai-q6-sb-3-tx {
422 compatible = "qcom,msm-dai-q6-dev";
423 qcom,msm-dai-q6-dev-id = <16391>;
424 };
425
426 qcom,msm-dai-q6-sb-4-rx {
427 compatible = "qcom,msm-dai-q6-dev";
428 qcom,msm-dai-q6-dev-id = <16392>;
429 };
430
431 qcom,msm-dai-q6-sb-4-tx {
432 compatible = "qcom,msm-dai-q6-dev";
433 qcom,msm-dai-q6-dev-id = <16393>;
434 };
435
436 qcom,msm-dai-q6-bt-sco-rx {
437 compatible = "qcom,msm-dai-q6-dev";
438 qcom,msm-dai-q6-dev-id = <12288>;
439 };
440
441 qcom,msm-dai-q6-bt-sco-tx {
442 compatible = "qcom,msm-dai-q6-dev";
443 qcom,msm-dai-q6-dev-id = <12289>;
444 };
445
446 qcom,msm-dai-q6-int-fm-rx {
447 compatible = "qcom,msm-dai-q6-dev";
448 qcom,msm-dai-q6-dev-id = <12292>;
449 };
450
451 qcom,msm-dai-q6-int-fm-tx {
452 compatible = "qcom,msm-dai-q6-dev";
453 qcom,msm-dai-q6-dev-id = <12293>;
454 };
455
456 qcom,msm-dai-q6-be-afe-pcm-rx {
457 compatible = "qcom,msm-dai-q6-dev";
458 qcom,msm-dai-q6-dev-id = <224>;
459 };
460
461 qcom,msm-dai-q6-be-afe-pcm-tx {
462 compatible = "qcom,msm-dai-q6-dev";
463 qcom,msm-dai-q6-dev-id = <225>;
464 };
465
466 qcom,msm-dai-q6-afe-proxy-rx {
467 compatible = "qcom,msm-dai-q6-dev";
468 qcom,msm-dai-q6-dev-id = <241>;
469 };
470
471 qcom,msm-dai-q6-afe-proxy-tx {
472 compatible = "qcom,msm-dai-q6-dev";
473 qcom,msm-dai-q6-dev-id = <240>;
474 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]475
476 qcom,msm-dai-q6-incall-record-rx {
477 compatible = "qcom,msm-dai-q6-dev";
478 qcom,msm-dai-q6-dev-id = <32771>;
479 };
480
481 qcom,msm-dai-q6-incall-record-tx {
482 compatible = "qcom,msm-dai-q6-dev";
483 qcom,msm-dai-q6-dev-id = <32772>;
484 };
485
486 qcom,msm-dai-q6-incall-music-rx {
487 compatible = "qcom,msm-dai-q6-dev";
488 qcom,msm-dai-q6-dev-id = <32773>;
489 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]490 };
491
492 qcom,msm-pcm-hostless {
493 compatible = "qcom,msm-pcm-hostless";
494 };
495
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]496 qcom,wcnss-wlan@fb000000 {
497 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]498 reg = <0xfb000000 0x280000>,
499 <0xf9011008 0x04>;
500 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]501 interrupts = <0 145 0 0 146 0>;
502 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
503
504 qcom,pronto-vddmx-supply = <&pm8226_l3>;
505 qcom,pronto-vddcx-supply = <&pm8226_s1>;
506 qcom,pronto-vddpx-supply = <&pm8226_l6>;
507 qcom,iris-vddxo-supply = <&pm8226_l10>;
508 qcom,iris-vddrfa-supply = <&pm8226_l24>;
509 qcom,iris-vddpa-supply = <&pm8226_l16>;
510 qcom,iris-vdddig-supply = <&pm8226_l24>;
511
512 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
513 qcom,has_pronto_hw;
514 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]515
516 qcom,msm-adsp-sensors {
517 compatible = "qcom,msm-adsp-sensors";
518 qcom,src-id = <11>;
519 qcom,dst-id = <604>;
520 qcom,ab = <32505856>;
521 qcom,ib = <32505856>;
522 };
523
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]524 qcom,wdt@f9017000 {
525 compatible = "qcom,msm-watchdog";
526 reg = <0xf9017000 0x1000>;
527 interrupts = <0 3 0>, <0 4 0>;
528 qcom,bark-time = <11000>;
529 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]530 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]531 };
532
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]533 qcom,smem@fa00000 {
534 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]535 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]536 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]537 <0xfc428000 0x4000>;
538 reg-names = "smem", "irq-reg-base", "aux-mem1";
539
540 qcom,smd-modem {
541 compatible = "qcom,smd";
542 qcom,smd-edge = <0>;
543 qcom,smd-irq-offset = <0x8>;
544 qcom,smd-irq-bitmask = <0x1000>;
545 qcom,pil-string = "modem";
546 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]547 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]548
549 qcom,smsm-modem {
550 compatible = "qcom,smsm";
551 qcom,smsm-edge = <0>;
552 qcom,smsm-irq-offset = <0x8>;
553 qcom,smsm-irq-bitmask = <0x2000>;
554 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]555 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]556
557 qcom,smd-adsp {
558 compatible = "qcom,smd";
559 qcom,smd-edge = <1>;
560 qcom,smd-irq-offset = <0x8>;
561 qcom,smd-irq-bitmask = <0x100>;
562 qcom,pil-string = "adsp";
563 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]564 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]565
566 qcom,smsm-adsp {
567 compatible = "qcom,smsm";
568 qcom,smsm-edge = <1>;
569 qcom,smsm-irq-offset = <0x8>;
570 qcom,smsm-irq-bitmask = <0x200>;
571 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]572 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]573
574 qcom,smd-wcnss {
575 compatible = "qcom,smd";
576 qcom,smd-edge = <6>;
577 qcom,smd-irq-offset = <0x8>;
578 qcom,smd-irq-bitmask = <0x20000>;
579 qcom,pil-string = "wcnss";
580 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]581 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]582
583 qcom,smsm-wcnss {
584 compatible = "qcom,smsm";
585 qcom,smsm-edge = <6>;
586 qcom,smsm-irq-offset = <0x8>;
587 qcom,smsm-irq-bitmask = <0x80000>;
588 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]589 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]590
591 qcom,smd-rpm {
592 compatible = "qcom,smd";
593 qcom,smd-edge = <15>;
594 qcom,smd-irq-offset = <0x8>;
595 qcom,smd-irq-bitmask = <0x1>;
596 interrupts = <0 168 1>;
597 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]598 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]599 };
600
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]601 rpm_bus: qcom,rpm-smd {
602 compatible = "qcom,rpm-smd";
603 rpm-channel-name = "rpm_requests";
604 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]605 };
606
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]607 sdcc1: qcom,sdcc@f9824000 {
608 cell-index = <1>; /* SDC1 eMMC slot */
609 compatible = "qcom,msm-sdcc";
610
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]611 reg = <0xf9824000 0x800>,
612 <0xf9824800 0x100>,
613 <0xf9804000 0x7000>;
614 reg-names = "core_mem", "dml_mem", "bam_mem";
615 interrupts = <0 123 0>, <0 137 0>;
616 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]617
618 qcom,bus-width = <8>;
619 status = "disabled";
620 };
621
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]622 sdhc_1: sdhci@f9824900 {
623 compatible = "qcom,sdhci-msm";
624 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
625 reg-names = "hc_mem", "core_mem";
626
627 interrupts = <0 123 0>, <0 138 0>;
628 interrupt-names = "hc_irq", "pwr_irq";
629
630 qcom,bus-width = <8>;
631 status = "disabled";
632 };
633
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]634 sdcc2: qcom,sdcc@f98a4000 {
635 cell-index = <2>; /* SDC2 SD card slot */
636 compatible = "qcom,msm-sdcc";
637
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]638 reg = <0xf98a4000 0x800>,
639 <0xf98a4800 0x100>,
640 <0xf9884000 0x7000>;
641 reg-names = "core_mem", "dml_mem", "bam_mem";
642 interrupts = <0 125 0>, <0 220 0>;
643 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]644
645 qcom,bus-width = <4>;
646 status = "disabled";
647 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]648
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]649 sdhc_2: sdhci@f98a4900 {
650 compatible = "qcom,sdhci-msm";
651 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
652 reg-names = "hc_mem", "core_mem";
653
654 interrupts = <0 125 0>, <0 221 0>;
655 interrupt-names = "hc_irq", "pwr_irq";
656
657 qcom,bus-width = <4>;
658 status = "disabled";
659 };
660
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]661 spmi_bus: qcom,spmi@fc4c0000 {
662 cell-index = <0>;
663 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]664 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]665 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]666 <0Xfc4cb000 0x1000>,
667 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]668 /* 190,ee0_krait_hlos_spmi_periph_irq */
669 /* 187,channel_0_krait_hlos_trans_done_irq */
670 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]671 qcom,pmic-arb-ee = <0>;
672 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]673 };
674
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]675 i2c@f9926000 { /* BLSP-1 QUP-4 */
676 cell-index = <0>;
677 compatible = "qcom,i2c-qup";
678 reg = <0xf9926000 0x1000>;
679 #address-cells = <1>;
680 #size-cells = <0>;
681 reg-names = "qup_phys_addr";
682 interrupts = <0 98 0>;
683 interrupt-names = "qup_err_intr";
684 qcom,i2c-bus-freq = <100000>;
685 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]686
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]687 i2c@f9927000 { /* BLSP1 QUP5 */
688 cell-index = <5>;
689 compatible = "qcom,i2c-qup";
690 #address-cells = <1>;
691 #size-cells = <0>;
692 reg-names = "qup_phys_addr";
693 reg = <0xf9927000 0x1000>;
694 interrupt-names = "qup_err_intr";
695 interrupts = <0 99 0>;
696 qcom,i2c-bus-freq = <100000>;
697 qcom,i2c-src-freq = <19200000>;
698 };
699
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]700 qcom,acpuclk@f9011050 {
701 compatible = "qcom,acpuclk-a7";
702 reg = <0xf9011050 0x8>;
703 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]704 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]705 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]706
707 qcom,ocmem@fdd00000 {
708 compatible = "qcom,msm-ocmem";
709 reg = <0xfdd00000 0x2000>,
710 <0xfdd02000 0x2000>,
711 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]712 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]713 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
714 interrupts = <0 76 0 0 77 0>;
715 interrupt-names = "ocmem_irq", "dm_irq";
716 qcom,ocmem-num-regions = <0x1>;
717 qcom,ocmem-num-macros = <0x2>;
718 qcom,resource-type = <0x706d636f>;
719 #address-cells = <1>;
720 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]721 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]722
723 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]724 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]725 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]726 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]727 };
728 };
729
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]730 qcom,venus@fdce0000 {
731 compatible = "qcom,pil-venus";
732 reg = <0xfdce0000 0x4000>,
733 <0xfdc80000 0x400>;
734 reg-names = "wrapper_base", "vbif_base";
735 vdd-supply = <&gdsc_venus>;
736
737 qcom,firmware-name = "venus";
738 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]739
740 qcom,pronto@fb21b000 {
741 compatible = "qcom,pil-pronto";
742 reg = <0xfb21b000 0x3000>,
743 <0xfc401700 0x4>,
744 <0xfd485300 0xc>;
745 reg-names = "pmu_base", "clk_base", "halt_base";
746 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]747 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]748
749 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]750
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]751 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]752 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]753 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]754
755 /* GPIO output to wcnss */
756 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]757 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]758
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]759 qcom,iris-fm {
760 compatible = "qcom,iris_fm";
761 };
762
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]763 qcom,lpass@fe200000 {
764 compatible = "qcom,pil-q6v5-lpass";
765 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]766 <0xfd485100 0x00010>,
767 <0xfc4016c0 0x00004>;
768 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]769 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]770 interrupts = <0 162 1>;
771
772 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]773
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]774 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]775 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]776 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]777
778 /* GPIO output to lpass */
779 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]780 };
781
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]782 qcom,mss@fc880000 {
783 compatible = "qcom,pil-q6v5-mss";
784 reg = <0xfc880000 0x100>,
785 <0xfd485000 0x400>,
786 <0xfc820000 0x020>,
787 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]788 <0xfd485194 0x4>;
789 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]790 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]791
792 interrupts = <0 24 1>;
793 vdd_mss-supply = <&pm8226_s1>;
794 vdd_cx-supply = <&pm8226_s1_corner>;
795 vdd_mx-supply = <&pm8226_l3>;
796 vdd_pll-supply = <&pm8226_l8>;
797 qcom,vdd_pll = <1800000>;
798
799 qcom,is-loadable;
800 qcom,firmware-name = "mba";
801 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]802
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]803 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]804 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]805 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]806
807 /* GPIO output to mss */
808 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]809 };
810
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]811 qcom,msm-mem-hole {
812 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]813 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]814 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]815
816 tsens: tsens@fc4a8000 {
817 compatible = "qcom,msm-tsens";
818 reg = <0xfc4a8000 0x2000>,
819 <0xfc4b8000 0x1000>;
820 reg-names = "tsens_physical", "tsens_eeprom_physical";
821 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]822 qcom,sensors = <4>;
823 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]824 qcom,calib-mode = "fuse_map2";
825 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]826
827 qcom,msm-thermal {
828 compatible = "qcom,msm-thermal";
829 qcom,sensor-id = <0>;
830 qcom,poll-ms = <250>;
831 qcom,limit-temp = <60>;
832 qcom,temp-hysteresis = <10>;
833 qcom,freq-step = <2>;
834 };
835
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]836 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
837 compatible = "qcom,spi-qup-v2";
838 #address-cells = <1>;
839 #size-cells = <0>;
840 reg-names = "spi_physical", "spi_bam_physical";
841 reg = <0xf9923000 0x1000>,
842 <0xf9904000 0xF000>;
843 interrupt-names = "spi_irq", "spi_bam_irq";
844 interrupts = <0 95 0>, <0 238 0>;
845 spi-max-frequency = <19200000>;
846
847 gpios = <&msmgpio 3 0>, /* CLK */
848 <&msmgpio 1 0>, /* MISO */
849 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]850 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]851
852 qcom,infinite-mode = <0>;
853 qcom,use-bam;
854 qcom,ver-reg-exists;
855 qcom,bam-consumer-pipe-index = <12>;
856 qcom,bam-producer-pipe-index = <13>;
857 };
858
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]859 qcom,bam_dmux@fc834000 {
860 compatible = "qcom,bam_dmux";
861 reg = <0xfc834000 0x7000>;
862 interrupts = <0 29 1>;
863 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]864
865 qcom,msm-rtb {
866 compatible = "qcom,msm-rtb";
867 qcom,memory-reservation-type = "EBI1";
868 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
869 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]870
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]871 qcom,msm-rng@f9bff000 {
872 compatible = "qcom,msm-rng";
873 reg = <0xf9bff000 0x200>;
874 qcom,msm-rng-iface-clk;
875 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]876
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]877 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]878 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]879 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]880 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]881
882 jtag_mm0: jtagmm@fc33c000 {
883 compatible = "qcom,jtag-mm";
884 reg = <0xfc33c000 0x1000>,
885 <0xfc330000 0x1000>;
886 reg-names = "etm-base","debug-base";
887 };
888
889 jtag_mm1: jtagmm@fc33d000 {
890 compatible = "qcom,jtag-mm";
891 reg = <0xfc33d000 0x1000>,
892 <0xfc332000 0x1000>;
893 reg-names = "etm-base","debug-base";
894 };
895
896 jtag_mm2: jtagmm@fc33e000 {
897 compatible = "qcom,jtag-mm";
898 reg = <0xfc33e000 0x1000>,
899 <0xfc334000 0x1000>;
900 reg-names = "etm-base","debug-base";
901 };
902
903 jtag_mm3: jtagmm@fc33f000 {
904 compatible = "qcom,jtag-mm";
905 reg = <0xfc33f000 0x1000>,
906 <0xfc336000 0x1000>;
907 reg-names = "etm-base","debug-base";
908 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]909
910 qcom,ipc-spinlock@fd484000 {
911 compatible = "qcom,ipc-spinlock-sfpb";
912 reg = <0xfd484000 0x400>;
913 qcom,num-locks = <8>;
914 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]915
916 qcom,qseecom@d980000 {
917 compatible = "qcom,qseecom";
918 reg = <0xd980000 0x256000>;
919 reg-names = "secapp-region";
920 qcom,disk-encrypt-pipe-pair = <2>;
921 qcom,hlos-ce-hw-instance = <0>;
922 qcom,qsee-ce-hw-instance = <0>;
923 qcom,msm-bus,name = "qseecom-noc";
924 qcom,msm-bus,num-cases = <4>;
925 qcom,msm-bus,active-only = <0>;
926 qcom,msm-bus,num-paths = <1>;
927 qcom,msm-bus,vectors-KBps =
928 <55 512 0 0>,
929 <55 512 3936000 393600>,
930 <55 512 3936000 393600>,
931 <55 512 3936000 393600>;
932 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]933
934 qcom,qcrypto@fd404000 {
935 compatible = "qcom,qcrypto";
936 reg = <0xfd400000 0x20000>,
937 <0xfd404000 0x8000>;
938 reg-names = "crypto-base","crypto-bam-base";
939 interrupts = <0 207 0>;
940 qcom,bam-pipe-pair = <2>;
941 qcom,ce-hw-instance = <0>;
942 qcom,ce-hw-shared;
943 qcom,msm-bus,name = "qcrypto-noc";
944 qcom,msm-bus,num-cases = <2>;
945 qcom,msm-bus,active-only = <0>;
946 qcom,msm-bus,num-paths = <1>;
947 qcom,msm-bus,vectors-KBps =
948 <56 512 0 0>,
949 <56 512 3936000 393600>;
950 };
951
952 qcom,qcedev@fd400000 {
953 compatible = "qcom,qcedev";
954 reg = <0xfd400000 0x20000>,
955 <0xfd404000 0x8000>;
956 reg-names = "crypto-base","crypto-bam-base";
957 interrupts = <0 207 0>;
958 qcom,bam-pipe-pair = <1>;
959 qcom,ce-hw-instance = <0>;
960 qcom,ce-hw-shared;
961 qcom,msm-bus,name = "qcedev-noc";
962 qcom,msm-bus,num-cases = <2>;
963 qcom,msm-bus,active-only = <0>;
964 qcom,msm-bus,num-paths = <1>;
965 qcom,msm-bus,vectors-KBps =
966 <56 512 0 0>,
967 <56 512 3936000 393600>;
968 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]969};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]970
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]971&gdsc_venus {
972 status = "ok";
973};
974
975&gdsc_mdss {
976 status = "ok";
977};
978
979&gdsc_jpeg {
980 status = "ok";
981};
982
983&gdsc_vfe {
984 status = "ok";
985};
986
987&gdsc_oxili_cx {
988 status = "ok";
989};
990
991&gdsc_usb_hsic {
992 status = "ok";
993};
994
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]995/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]996/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]997/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]998
999&pm8226_vadc {
1000 chan@0 {
1001 label = "usb_in";
1002 reg = <0>;
1003 qcom,decimation = <0>;
1004 qcom,pre-div-channel-scaling = <4>;
1005 qcom,calibration-type = "absolute";
1006 qcom,scale-function = <0>;
1007 qcom,hw-settle-time = <0>;
1008 qcom,fast-avg-setup = <0>;
1009 };
1010
1011 chan@2 {
1012 label = "vchg_sns";
1013 reg = <2>;
1014 qcom,decimation = <0>;
1015 qcom,pre-div-channel-scaling = <3>;
1016 qcom,calibration-type = "absolute";
1017 qcom,scale-function = <0>;
1018 qcom,hw-settle-time = <0>;
1019 qcom,fast-avg-setup = <0>;
1020 };
1021
1022 chan@5 {
1023 label = "vcoin";
1024 reg = <5>;
1025 qcom,decimation = <0>;
1026 qcom,pre-div-channel-scaling = <1>;
1027 qcom,calibration-type = "absolute";
1028 qcom,scale-function = <0>;
1029 qcom,hw-settle-time = <0>;
1030 qcom,fast-avg-setup = <0>;
1031 };
1032
1033 chan@6 {
1034 label = "vbat_sns";
1035 reg = <6>;
1036 qcom,decimation = <0>;
1037 qcom,pre-div-channel-scaling = <1>;
1038 qcom,calibration-type = "absolute";
1039 qcom,scale-function = <0>;
1040 qcom,hw-settle-time = <0>;
1041 qcom,fast-avg-setup = <0>;
1042 };
1043
1044 chan@7 {
1045 label = "vph_pwr";
1046 reg = <7>;
1047 qcom,decimation = <0>;
1048 qcom,pre-div-channel-scaling = <1>;
1049 qcom,calibration-type = "absolute";
1050 qcom,scale-function = <0>;
1051 qcom,hw-settle-time = <0>;
1052 qcom,fast-avg-setup = <0>;
1053 };
1054
1055 chan@30 {
1056 label = "batt_therm";
1057 reg = <0x30>;
1058 qcom,decimation = <0>;
1059 qcom,pre-div-channel-scaling = <0>;
1060 qcom,calibration-type = "ratiometric";
1061 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1062 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1063 qcom,fast-avg-setup = <0>;
1064 };
1065
1066 chan@31 {
1067 label = "batt_id";
1068 reg = <0x31>;
1069 qcom,decimation = <0>;
1070 qcom,pre-div-channel-scaling = <0>;
1071 qcom,calibration-type = "ratiometric";
1072 qcom,scale-function = <0>;
1073 qcom,hw-settle-time = <2>;
1074 qcom,fast-avg-setup = <0>;
1075 };
1076
1077 chan@b2 {
1078 label = "xo_therm_pu2";
1079 reg = <0xb2>;
1080 qcom,decimation = <0>;
1081 qcom,pre-div-channel-scaling = <0>;
1082 qcom,calibration-type = "ratiometric";
1083 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1084 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1085 qcom,fast-avg-setup = <0>;
1086 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1087
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1088 chan@39 {
1089 label = "usb_id_nopull";
1090 reg = <0x39>;
1091 qcom,decimation = <0>;
1092 qcom,pre-div-channel-scaling = <0>;
1093 qcom,calibration-type = "ratiometric";
1094 qcom,scale-function = <0>;
1095 qcom,hw-settle-time = <2>;
1096 qcom,fast-avg-setup = <0>;
1097 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1098};
1099
1100&pm8226_chg {
1101 status = "ok";
1102
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1103 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1104 status = "ok";
1105 };
1106
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1107 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1108 status = "ok";
1109 };
1110
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1111 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1112 status = "ok";
1113 };
1114
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1115 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1116 status = "ok";
1117 };
1118
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1119 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1120 status = "ok";
1121 };
1122
1123 qcom,chg-misc@1600 {
1124 status = "ok";
1125 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1126};