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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmannd6743822012-10-02 17:27:25 -070058const size_t FIMD_GSC_IDX = 0;
59const size_t HDMI_GSC_IDX = 1;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070060const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
61const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
62 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann67b2c312012-10-01 13:31:26 -070063const size_t BURSTLEN_BYTES = 16 * 8;
Benoit Goby93f9f5d2012-09-28 20:37:17 -070064const size_t NUM_HDMI_BUFFERS = 3;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070065
Erik Gilling87e707e2012-06-29 17:35:13 -070066struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Greg Hackmann9130e702012-07-30 14:53:04 -070068struct exynos5_gsc_map_t {
69 enum {
70 GSC_NONE = 0,
71 GSC_M2M,
72 // TODO: GSC_LOCAL_PATH
73 } mode;
74 int idx;
75};
76
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070078 int overlay_map[NUM_HW_WINDOWS];
79 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
80 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070081};
82
Greg Hackmann44a6d422012-09-17 17:31:30 -070083const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070084struct exynos5_gsc_data_t {
85 void *gsc;
86 exynos_gsc_img src_cfg;
87 exynos_gsc_img dst_cfg;
88 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
89 size_t current_buf;
90};
91
Benoit Goby93f9f5d2012-09-28 20:37:17 -070092struct hdmi_layer_t {
93 int id;
94 int fd;
95 bool enabled;
96 exynos_gsc_img cfg;
97
98 bool streaming;
99 size_t current_buf;
100 size_t queued_buf;
101};
102
Erik Gilling87e707e2012-06-29 17:35:13 -0700103struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700104 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700105
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700106 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700107 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700109
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700111 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700112 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -0700114 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700115
Greg Hackmannd92fe212012-09-11 14:28:41 -0700116 int32_t xres;
117 int32_t yres;
118 int32_t xdpi;
119 int32_t ydpi;
120 int32_t vsync_period;
121
Benoit Goby8bad7e32012-08-16 14:17:14 -0700122 int hdmi_mixer0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700123 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700124 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700125 bool hdmi_blanked;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700126 int hdmi_w;
127 int hdmi_h;
Benoit Gobyb5501902012-10-01 00:29:01 -0700128
Benoit Gobyb5501902012-10-01 00:29:01 -0700129 hdmi_layer_t hdmi_layers[2];
Greg Hackmann9130e702012-07-30 14:53:04 -0700130
131 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700132
133 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700134 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700135 const void *last_handles[NUM_HW_WINDOWS];
136 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700137};
138
Greg Hackmannefd98532012-10-02 12:00:42 -0700139static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
140 size_t gsc_idx);
141
Greg Hackmann9130e702012-07-30 14:53:04 -0700142static void dump_handle(private_handle_t *h)
143{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700144 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
145 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700146}
147
Erik Gilling87e707e2012-06-29 17:35:13 -0700148static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700149{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700150 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
151 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
152 l->compositionType, l->flags, l->handle, l->transform,
153 l->blending,
154 l->sourceCrop.left,
155 l->sourceCrop.top,
156 l->sourceCrop.right,
157 l->sourceCrop.bottom,
158 l->displayFrame.left,
159 l->displayFrame.top,
160 l->displayFrame.right,
161 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700162
Greg Hackmann9130e702012-07-30 14:53:04 -0700163 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
164 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700165}
166
167static void dump_config(s3c_fb_win_config &c)
168{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700169 ALOGV("\tstate = %u", c.state);
170 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
171 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
172 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700173 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700174 c.fd, c.offset, c.stride,
175 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700176 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700177 }
178 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
179 ALOGV("\t\tcolor = %u", c.color);
180 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700181}
182
Greg Hackmann9130e702012-07-30 14:53:04 -0700183static void dump_gsc_img(exynos_gsc_img &c)
184{
185 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
186 c.x, c.y, c.w, c.h, c.fw, c.fh);
187 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
188 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
189}
190
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700191inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
192inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700193template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
194template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
195
196static bool is_transformed(const hwc_layer_1_t &layer)
197{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700198 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700199}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700200
Greg Hackmann9130e702012-07-30 14:53:04 -0700201static bool is_rotated(const hwc_layer_1_t &layer)
202{
203 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
204 (layer.transform & HAL_TRANSFORM_ROT_180);
205}
206
Erik Gilling87e707e2012-06-29 17:35:13 -0700207static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700208{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700209 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
210 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700211}
212
Benoit Goby8bad7e32012-08-16 14:17:14 -0700213static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
214{
215 return c1.x != c2.x ||
216 c1.y != c2.y ||
217 c1.w != c2.w ||
218 c1.h != c2.h ||
219 c1.format != c2.format ||
220 c1.rot != c2.rot ||
221 c1.cacheable != c2.cacheable ||
222 c1.drmMode != c2.drmMode;
223}
224
225static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
226{
227 return gsc_dst_cfg_changed(c1, c2) ||
228 c1.fw != c2.fw ||
229 c1.fh != c2.fh;
230}
231
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700232static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
233{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700234 switch (format) {
235 case HAL_PIXEL_FORMAT_RGBA_8888:
236 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
237 case HAL_PIXEL_FORMAT_RGBX_8888:
238 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
239 case HAL_PIXEL_FORMAT_RGBA_5551:
240 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700241 case HAL_PIXEL_FORMAT_RGB_565:
242 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700243 case HAL_PIXEL_FORMAT_BGRA_8888:
244 return S3C_FB_PIXEL_FORMAT_BGRA_8888;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700245 default:
246 return S3C_FB_PIXEL_FORMAT_MAX;
247 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700248}
249
250static bool exynos5_format_is_supported(int format)
251{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700252 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700253}
254
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700255static bool exynos5_format_is_rgb(int format)
256{
257 switch (format) {
258 case HAL_PIXEL_FORMAT_RGBA_8888:
259 case HAL_PIXEL_FORMAT_RGBX_8888:
260 case HAL_PIXEL_FORMAT_RGB_888:
261 case HAL_PIXEL_FORMAT_RGB_565:
262 case HAL_PIXEL_FORMAT_BGRA_8888:
263 case HAL_PIXEL_FORMAT_RGBA_5551:
264 case HAL_PIXEL_FORMAT_RGBA_4444:
265 return true;
266
267 default:
268 return false;
269 }
270}
271
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700272static bool exynos5_format_is_supported_by_gscaler(int format)
273{
Greg Hackmann9130e702012-07-30 14:53:04 -0700274 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700275 case HAL_PIXEL_FORMAT_RGBX_8888:
276 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700277 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700278 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700279 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700280 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700281
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700282 default:
283 return false;
284 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700285}
286
Greg Hackmann296668e2012-08-14 15:51:40 -0700287static bool exynos5_format_is_ycrcb(int format)
288{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700289 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700290}
291
Greg Hackmann9130e702012-07-30 14:53:04 -0700292static bool exynos5_format_requires_gscaler(int format)
293{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700294 return (exynos5_format_is_supported_by_gscaler(format) &&
295 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700296}
297
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700298static uint8_t exynos5_format_to_bpp(int format)
299{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700300 switch (format) {
301 case HAL_PIXEL_FORMAT_RGBA_8888:
302 case HAL_PIXEL_FORMAT_RGBX_8888:
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700303 case HAL_PIXEL_FORMAT_BGRA_8888:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700304 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700305
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700306 case HAL_PIXEL_FORMAT_RGBA_5551:
307 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700308 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700309 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700310
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700311 default:
312 ALOGW("unrecognized pixel format %u", format);
313 return 0;
314 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700315}
316
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700317static bool is_x_aligned(const hwc_layer_1_t &layer, int format)
318{
319 if (!exynos5_format_is_supported(format))
320 return true;
321
322 uint8_t bpp = exynos5_format_to_bpp(format);
323 uint8_t pixel_alignment = 32 / bpp;
324
325 return (layer.displayFrame.left % pixel_alignment) == 0 &&
326 (layer.displayFrame.right % pixel_alignment) == 0;
327}
328
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700329static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
330 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700331{
332 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
333
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700334 int max_w = is_rotated(layer) ? 2048 : 4800;
335 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700336
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700337 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
338 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
339 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700340
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700341 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
342 int dest_w, dest_h;
343 if (rot90or270) {
344 dest_w = HEIGHT(layer.displayFrame);
345 dest_h = WIDTH(layer.displayFrame);
346 } else {
347 dest_w = WIDTH(layer.displayFrame);
348 dest_h = HEIGHT(layer.displayFrame);
349 }
350 int max_downscale = local_path ? 4 : 16;
351 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700352
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700353 return exynos5_format_is_supported_by_gscaler(format) &&
354 handle->stride <= max_w &&
355 handle->stride % GSC_W_ALIGNMENT == 0 &&
356 src_w <= dest_w * max_downscale &&
357 dest_w <= src_w * max_upscale &&
358 handle->vstride <= max_h &&
359 handle->vstride % GSC_H_ALIGNMENT == 0 &&
360 src_h <= dest_h * max_downscale &&
361 dest_h <= src_h * max_upscale &&
362 // per 46.2
363 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
364 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
365 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700366}
367
Greg Hackmann09c45c22012-09-20 09:35:37 -0700368static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
369{
370 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700371 || is_transformed(layer) || !is_x_aligned(layer, format);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700372}
373
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700374int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
375{
376 struct v4l2_dv_preset preset;
377 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700378 int index = 0;
379 bool found = false;
380 int ret;
381
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700382 if (ioctl(dev->hdmi_layers[0].fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700383 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
384 return -1;
385 }
386
387 while (true) {
388 enum_preset.index = index++;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700389 ret = ioctl(dev->hdmi_layers[0].fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700390
391 if (ret < 0) {
392 if (errno == EINVAL)
393 break;
394 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
395 return -1;
396 }
397
398 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
399 __func__, enum_preset.index, enum_preset.preset,
400 enum_preset.width, enum_preset.height, enum_preset.name);
401
402 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700403 dev->hdmi_w = enum_preset.width;
404 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700405 found = true;
406 }
407 }
408
409 return found ? 0 : -1;
410}
411
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700412static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
413{
414 switch (blending) {
415 case HWC_BLENDING_NONE:
416 return S3C_FB_BLENDING_NONE;
417 case HWC_BLENDING_PREMULT:
418 return S3C_FB_BLENDING_PREMULT;
419 case HWC_BLENDING_COVERAGE:
420 return S3C_FB_BLENDING_COVERAGE;
421
422 default:
423 return S3C_FB_BLENDING_MAX;
424 }
425}
426
427static bool exynos5_blending_is_supported(int32_t blending)
428{
429 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
430}
431
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700432
433static int hdmi_enable_layer(struct exynos5_hwc_composer_device_1_t *dev,
434 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700435{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700436 if (hl.enabled)
437 return 0;
438
Benoit Goby8bad7e32012-08-16 14:17:14 -0700439 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700440 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700441 reqbuf.count = NUM_HDMI_BUFFERS;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700442 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700443 reqbuf.memory = V4L2_MEMORY_DMABUF;
444 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0) {
445 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700446 return -1;
447 }
448
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700449 if (reqbuf.count != NUM_HDMI_BUFFERS) {
450 ALOGE("%s: layer%d: didn't get buffer", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700451 return -1;
452 }
453
Benoit Gobyb5501902012-10-01 00:29:01 -0700454 if (hl.id == 1) {
455 if (exynos_v4l2_s_ctrl(hl.fd, V4L2_CID_TV_PIXEL_BLEND_ENABLE, 1) < 0) {
456 ALOGE("%s: layer%d: PIXEL_BLEND_ENABLE failed %d", __func__,
457 hl.id, errno);
458 return -1;
459 }
460 }
461
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700462 ALOGV("%s: layer%d enabled", __func__, hl.id);
463 hl.enabled = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700464 return 0;
465}
466
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700467static void hdmi_disable_layer(struct exynos5_hwc_composer_device_1_t *dev,
468 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700469{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700470 if (!hl.enabled)
471 return;
472
473 if (hl.streaming) {
474 if (exynos_v4l2_streamoff(hl.fd, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0)
475 ALOGE("%s: layer%d: streamoff failed %d", __func__, hl.id, errno);
476 hl.streaming = false;
477 }
478
Benoit Goby8bad7e32012-08-16 14:17:14 -0700479 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700480 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby8bad7e32012-08-16 14:17:14 -0700481 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700482 reqbuf.memory = V4L2_MEMORY_DMABUF;
483 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0)
484 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700485
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700486 memset(&hl.cfg, 0, sizeof(hl.cfg));
487 hl.current_buf = 0;
488 hl.queued_buf = 0;
489 hl.enabled = false;
490
491 ALOGV("%s: layer%d disabled", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700492}
493
Benoit Gobycdd61b32012-07-09 12:09:59 -0700494static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
495{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700496 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700497 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700498
Benoit Gobyad4e3582012-08-30 17:17:34 -0700499 if (dev->hdmi_blanked)
500 return 0;
501
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700502 struct v4l2_subdev_format sd_fmt;
503 memset(&sd_fmt, 0, sizeof(sd_fmt));
504 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SINK;
505 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
506 sd_fmt.format.width = dev->hdmi_w;
507 sd_fmt.format.height = dev->hdmi_h;
508 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
509 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
510 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700511 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700512 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700513
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700514 struct v4l2_subdev_crop sd_crop;
515 memset(&sd_crop, 0, sizeof(sd_crop));
516 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SINK;
517 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
518 sd_crop.rect.width = dev->hdmi_w;
519 sd_crop.rect.height = dev->hdmi_h;
520 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
521 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
522 return -1;
523 }
524
525 memset(&sd_fmt, 0, sizeof(sd_fmt));
526 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
527 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
528 sd_fmt.format.width = dev->hdmi_w;
529 sd_fmt.format.height = dev->hdmi_h;
530 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
531 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
532 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
533 return -1;
534 }
535
536 memset(&sd_crop, 0, sizeof(sd_crop));
537 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
538 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
539 sd_crop.rect.width = dev->hdmi_w;
540 sd_crop.rect.height = dev->hdmi_h;
541 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
542 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
543 return -1;
544 }
545
Benoit Gobyb5501902012-10-01 00:29:01 -0700546 hdmi_enable_layer(dev, dev->hdmi_layers[1]);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700547
Benoit Goby8bad7e32012-08-16 14:17:14 -0700548 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700549 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700550}
551
552static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
553{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700554 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700555 return;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700556
557 hdmi_disable_layer(dev, dev->hdmi_layers[0]);
Benoit Gobyb5501902012-10-01 00:29:01 -0700558 hdmi_disable_layer(dev, dev->hdmi_layers[1]);
559
Greg Hackmannefd98532012-10-02 12:00:42 -0700560 exynos5_cleanup_gsc_m2m(dev, HDMI_GSC_IDX);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700561 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700562}
563
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700564static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev,
565 hdmi_layer_t &hl,
Benoit Gobyb5501902012-10-01 00:29:01 -0700566 hwc_layer_1_t &layer,
567 private_handle_t *h)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700568{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700569 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700570
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700571 exynos_gsc_img cfg;
572 memset(&cfg, 0, sizeof(cfg));
573 cfg.x = layer.displayFrame.left;
574 cfg.y = layer.displayFrame.top;
575 cfg.w = WIDTH(layer.displayFrame);
576 cfg.h = HEIGHT(layer.displayFrame);
577
578 if (gsc_src_cfg_changed(hl.cfg, cfg)) {
Benoit Gobyb5501902012-10-01 00:29:01 -0700579 hdmi_disable_layer(dev, hl);
580
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700581 struct v4l2_format fmt;
582 memset(&fmt, 0, sizeof(fmt));
583 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
584 fmt.fmt.pix_mp.width = cfg.w;
585 fmt.fmt.pix_mp.height = cfg.h;
586 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
587 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
588 fmt.fmt.pix_mp.num_planes = 1;
589 ret = exynos_v4l2_s_fmt(hl.fd, &fmt);
590 if (ret < 0) {
591 ALOGE("%s: layer%d: s_fmt failed %d", __func__, hl.id, errno);
592 goto err;
593 }
594
Benoit Gobyb5501902012-10-01 00:29:01 -0700595 struct v4l2_subdev_crop sd_crop;
596 memset(&sd_crop, 0, sizeof(sd_crop));
597 if (hl.id == 0)
598 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
599 else
600 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
601 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
602 sd_crop.rect.left = cfg.x;
603 sd_crop.rect.top = cfg.y;
604 sd_crop.rect.width = cfg.w;
605 sd_crop.rect.height = cfg.h;
606 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
607 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
608 goto err;
609 }
610
611 hdmi_enable_layer(dev, hl);
612
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700613 ALOGV("HDMI layer%d configuration:", hl.id);
614 dump_gsc_img(cfg);
615 hl.cfg = cfg;
616 }
617
618 struct v4l2_buffer buffer;
619 struct v4l2_plane planes[1];
620
621 if (hl.queued_buf == NUM_HDMI_BUFFERS) {
622 memset(&buffer, 0, sizeof(buffer));
623 memset(planes, 0, sizeof(planes));
624 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
625 buffer.memory = V4L2_MEMORY_DMABUF;
626 buffer.length = 1;
627 buffer.m.planes = planes;
628 ret = exynos_v4l2_dqbuf(hl.fd, &buffer);
629 if (ret < 0) {
630 ALOGE("%s: layer%d: dqbuf failed %d", __func__, hl.id, errno);
631 goto err;
632 }
633 hl.queued_buf--;
634 }
635
636 memset(&buffer, 0, sizeof(buffer));
637 memset(planes, 0, sizeof(planes));
638 buffer.index = hl.current_buf;
639 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
640 buffer.memory = V4L2_MEMORY_DMABUF;
641 buffer.flags = V4L2_BUF_FLAG_USE_SYNC;
642 buffer.reserved = layer.acquireFenceFd;
643 buffer.length = 1;
644 buffer.m.planes = planes;
645 buffer.m.planes[0].m.fd = h->fd;
646 if (exynos_v4l2_qbuf(hl.fd, &buffer) < 0) {
647 ALOGE("%s: layer%d: qbuf failed %d", __func__, hl.id, errno);
648 ret = -1;
649 goto err;
650 }
651
652 layer.releaseFenceFd = buffer.reserved;
653
654 hl.queued_buf++;
655 hl.current_buf = (hl.current_buf + 1) % NUM_HDMI_BUFFERS;
656
657 if (!hl.streaming) {
658 if (exynos_v4l2_streamon(hl.fd, buffer.type) < 0) {
659 ALOGE("%s: layer%d: streamon failed %d", __func__, hl.id, errno);
660 ret = -1;
661 goto err;
662 }
663 hl.streaming = true;
664 }
Benoit Goby105be0b2012-09-21 13:19:30 -0700665
666err:
667 if (layer.acquireFenceFd >= 0)
668 close(layer.acquireFenceFd);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700669
Benoit Goby105be0b2012-09-21 13:19:30 -0700670 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700671}
672
Greg Hackmann81575142012-09-19 15:09:04 -0700673bool exynos5_is_offscreen(hwc_layer_1_t &layer,
674 struct exynos5_hwc_composer_device_1_t *pdev)
675{
676 return layer.sourceCrop.left > pdev->xres ||
677 layer.sourceCrop.right < 0 ||
678 layer.sourceCrop.top > pdev->yres ||
679 layer.sourceCrop.bottom < 0;
680}
681
Greg Hackmann67b2c312012-10-01 13:31:26 -0700682size_t exynos5_visible_width(hwc_layer_1_t &layer, int format,
683 struct exynos5_hwc_composer_device_1_t *pdev)
684{
685 int bpp;
686 if (exynos5_requires_gscaler(layer, format))
687 bpp = 32;
688 else
689 bpp = exynos5_format_to_bpp(format);
690 int left = max(layer.displayFrame.left, 0);
691 int right = min(layer.displayFrame.right, pdev->xres);
692
693 return (right - left) * bpp / 8;
694}
695
Greg Hackmann81575142012-09-19 15:09:04 -0700696bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
697 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700698{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700699 if (layer.flags & HWC_SKIP_LAYER) {
700 ALOGV("\tlayer %u: skipping", i);
701 return false;
702 }
703
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700704 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700705
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700706 if (!handle) {
707 ALOGV("\tlayer %u: handle is NULL", i);
708 return false;
709 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700710 if (!exynos5_format_is_rgb(handle->format) &&
711 !exynos5_format_is_supported_by_gscaler(handle->format)) {
712 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
713 return false;
714 }
715
Greg Hackmann09c45c22012-09-20 09:35:37 -0700716 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700717 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700718 ALOGV("\tlayer %u: gscaler required but not supported", i);
719 return false;
720 }
721 } else {
722 if (!exynos5_format_is_supported(handle->format)) {
723 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
724 return false;
725 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700726 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700727 if (!exynos5_blending_is_supported(layer.blending)) {
728 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700729 return false;
730 }
Greg Hackmann81575142012-09-19 15:09:04 -0700731 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
732 ALOGW("\tlayer %u: off-screen", i);
733 return false;
734 }
Greg Hackmann67b2c312012-10-01 13:31:26 -0700735 if (exynos5_visible_width(layer, handle->format, pdev) < BURSTLEN_BYTES) {
736 ALOGV("\tlayer %u: visible area is too narrow", i);
737 return false;
738 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700739
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700740 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700741}
742
Greg Hackmann31991d52012-07-13 13:23:11 -0700743inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
744{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700745 return !(r1.left > r2.right ||
746 r1.right < r2.left ||
747 r1.top > r2.bottom ||
748 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700749}
750
751inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
752{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700753 hwc_rect i;
754 i.top = max(r1.top, r2.top);
755 i.bottom = min(r1.bottom, r2.bottom);
756 i.left = max(r1.left, r2.left);
757 i.right = min(r1.right, r2.right);
758 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700759}
760
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700761static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700762 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700763{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700764 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700765
Greg Hackmann9130e702012-07-30 14:53:04 -0700766 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700767
Benoit Goby4f439962012-09-21 17:16:45 -0700768 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700769 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
770 pdev->bufs.overlay_map[i] = -1;
771
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700772 bool fb_needed = false;
773 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700774
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700775 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700776 for (size_t i = 0; i < contents->numHwLayers; i++) {
777 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700778
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700779 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
780 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700781 continue;
782 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700783
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700784 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
785 ALOGV("\tlayer %u: background supported", i);
786 dump_layer(&contents->hwLayers[i]);
787 continue;
788 }
789
Greg Hackmann81575142012-09-19 15:09:04 -0700790 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
791 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700792 ALOGV("\tlayer %u: overlay supported", i);
793 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700794 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700795 continue;
796 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700797
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700798 if (!fb_needed) {
799 first_fb = i;
800 fb_needed = true;
801 }
802 last_fb = i;
803 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700804
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700805 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700806 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700807
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700808 // can't composite overlays sandwiched between framebuffers
809 if (fb_needed)
810 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700811 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700812
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700813 // Incrementally try to add our supported layers to hardware windows.
814 // If adding a layer would violate a hardware constraint, force it
815 // into the framebuffer and try again. (Revisiting the entire list is
816 // necessary because adding a layer to the framebuffer can cause other
817 // windows to retroactively violate constraints.)
818 bool changed;
Greg Hackmannd6743822012-10-02 17:27:25 -0700819 bool gsc_used;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700820 do {
821 android::Vector<hwc_rect> rects;
822 android::Vector<hwc_rect> overlaps;
Greg Hackmannd6743822012-10-02 17:27:25 -0700823 size_t pixels_left, windows_left;
824
825 gsc_used = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700826
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700827 if (fb_needed) {
828 hwc_rect_t fb_rect;
829 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700830 fb_rect.right = pdev->xres - 1;
831 fb_rect.bottom = pdev->yres - 1;
832 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700833 windows_left = NUM_HW_WINDOWS - 1;
834 rects.push_back(fb_rect);
835 }
836 else {
837 pixels_left = MAX_PIXELS;
838 windows_left = NUM_HW_WINDOWS;
839 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700840
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700841 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700842
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700843 for (size_t i = 0; i < contents->numHwLayers; i++) {
844 hwc_layer_1_t &layer = contents->hwLayers[i];
845 if ((layer.flags & HWC_SKIP_LAYER) ||
846 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700847 continue;
848
849 private_handle_t *handle = private_handle_t::dynamicCast(
850 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700851
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700852 // we've already accounted for the framebuffer above
853 if (layer.compositionType == HWC_FRAMEBUFFER)
854 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700855
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700856 // only layer 0 can be HWC_BACKGROUND, so we can
857 // unconditionally allow it without extra checks
858 if (layer.compositionType == HWC_BACKGROUND) {
859 windows_left--;
860 continue;
861 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700862
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700863 size_t pixels_needed = WIDTH(layer.displayFrame) *
864 HEIGHT(layer.displayFrame);
865 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700866 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700867 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700868 can_compose = can_compose && !gsc_used;
Greg Hackmann31991d52012-07-13 13:23:11 -0700869
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700870 // hwc_rect_t right and bottom values are normally exclusive;
871 // the intersection logic is simpler if we make them inclusive
872 hwc_rect_t visible_rect = layer.displayFrame;
873 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700874
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700875 // no more than 2 layers can overlap on a given pixel
876 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
877 if (intersect(visible_rect, overlaps.itemAt(j)))
878 can_compose = false;
879 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700880
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700881 if (!can_compose) {
882 layer.compositionType = HWC_FRAMEBUFFER;
883 if (!fb_needed) {
884 first_fb = last_fb = i;
885 fb_needed = true;
886 }
887 else {
888 first_fb = min(i, first_fb);
889 last_fb = max(i, last_fb);
890 }
891 changed = true;
892 break;
893 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700894
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700895 for (size_t j = 0; j < rects.size(); j++) {
896 const hwc_rect_t &other_rect = rects.itemAt(j);
897 if (intersect(visible_rect, other_rect))
898 overlaps.push_back(intersection(visible_rect, other_rect));
899 }
900 rects.push_back(visible_rect);
901 pixels_left -= pixels_needed;
902 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700903 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700904 gsc_used = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700905 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700906
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700907 if (changed)
908 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700909 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700910 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700911
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700912 unsigned int nextWindow = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700913
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700914 for (size_t i = 0; i < contents->numHwLayers; i++) {
915 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700916
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700917 if (fb_needed && i == first_fb) {
918 ALOGV("assigning framebuffer to window %u\n",
919 nextWindow);
920 nextWindow++;
921 continue;
922 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700923
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700924 if (layer.compositionType != HWC_FRAMEBUFFER &&
925 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700926 ALOGV("assigning layer %u to window %u", i, nextWindow);
927 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700928 if (layer.compositionType == HWC_OVERLAY) {
929 private_handle_t *handle =
930 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700931 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmannd6743822012-10-02 17:27:25 -0700932 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[FIMD_GSC_IDX]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700933 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700934 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmannd6743822012-10-02 17:27:25 -0700935 pdev->bufs.gsc_map[nextWindow].idx = FIMD_GSC_IDX;
Greg Hackmann9130e702012-07-30 14:53:04 -0700936 }
937 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700938 nextWindow++;
939 }
940 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700941
Greg Hackmannefd98532012-10-02 12:00:42 -0700942 if (!gsc_used)
943 exynos5_cleanup_gsc_m2m(pdev, FIMD_GSC_IDX);
Greg Hackmann9130e702012-07-30 14:53:04 -0700944
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700945 if (fb_needed)
946 pdev->bufs.fb_window = first_fb;
947 else
948 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700949
Greg Hackmann9130e702012-07-30 14:53:04 -0700950 return 0;
951}
952
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700953static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
954 hwc_display_contents_1_t* contents)
955{
Benoit Goby922abbf2012-09-19 19:24:19 -0700956 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
Benoit Gobyb5501902012-10-01 00:29:01 -0700957 hwc_layer_1_t *video_layer = NULL;
Benoit Goby922abbf2012-09-19 19:24:19 -0700958
959 for (size_t i = 0; i < contents->numHwLayers; i++) {
960 hwc_layer_1_t &layer = contents->hwLayers[i];
961
962 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
963 ALOGV("\tlayer %u: framebuffer target", i);
Benoit Goby922abbf2012-09-19 19:24:19 -0700964 continue;
965 }
966
967 if (layer.compositionType == HWC_BACKGROUND) {
968 ALOGV("\tlayer %u: background layer", i);
969 dump_layer(&layer);
970 continue;
971 }
972
Benoit Gobyb5501902012-10-01 00:29:01 -0700973 if (layer.handle) {
974 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
975 if (h->flags & GRALLOC_USAGE_PROTECTED) {
976 if (!video_layer) {
977 video_layer = &layer;
978 layer.compositionType = HWC_OVERLAY;
979 ALOGV("\tlayer %u: video layer", i);
980 dump_layer(&layer);
981 continue;
982 }
983 }
984 }
985
Benoit Goby922abbf2012-09-19 19:24:19 -0700986 layer.compositionType = HWC_FRAMEBUFFER;
987 dump_layer(&layer);
988 }
989
990 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700991}
992
993static int exynos5_prepare(hwc_composer_device_1_t *dev,
994 size_t numDisplays, hwc_display_contents_1_t** displays)
995{
996 if (!numDisplays || !displays)
997 return 0;
998
999 exynos5_hwc_composer_device_1_t *pdev =
1000 (exynos5_hwc_composer_device_1_t *)dev;
1001 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1002 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
1003
1004 if (pdev->hdmi_hpd) {
1005 hdmi_enable(pdev);
1006 } else {
1007 hdmi_disable(pdev);
1008 }
1009
1010 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -07001011 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001012 if (err)
1013 return err;
1014 }
1015
1016 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001017 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
1018 if (err)
1019 return err;
1020 }
1021
1022 return 0;
1023}
1024
Greg Hackmann9130e702012-07-30 14:53:04 -07001025static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
1026 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001027 int gsc_idx, int dst_format)
Greg Hackmann9130e702012-07-30 14:53:04 -07001028{
Benoit Gobyb5501902012-10-01 00:29:01 -07001029 ALOGV("configuring gscaler %u for memory-to-memory", AVAILABLE_GSC_UNITS[gsc_idx]);
Greg Hackmann9130e702012-07-30 14:53:04 -07001030
1031 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
1032 buffer_handle_t dst_buf;
1033 private_handle_t *dst_handle;
1034 int ret = 0;
1035
Greg Hackmann4eaff152012-10-03 16:28:19 -07001036 if (layer.acquireFenceFd != -1) {
1037 int err = sync_wait(layer.acquireFenceFd, 100);
1038 if (err != 0)
1039 ALOGW("fence didn't signal in 100 ms: %s", strerror(errno));
1040 close(layer.acquireFenceFd);
1041 layer.acquireFenceFd = -1;
1042 }
1043
Greg Hackmann9130e702012-07-30 14:53:04 -07001044 exynos_gsc_img src_cfg, dst_cfg;
1045 memset(&src_cfg, 0, sizeof(src_cfg));
1046 memset(&dst_cfg, 0, sizeof(dst_cfg));
1047
1048 src_cfg.x = layer.sourceCrop.left;
1049 src_cfg.y = layer.sourceCrop.top;
1050 src_cfg.w = WIDTH(layer.sourceCrop);
1051 src_cfg.fw = src_handle->stride;
1052 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -07001053 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001054 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -07001055 if (exynos5_format_is_ycrcb(src_handle->format)) {
1056 src_cfg.uaddr = src_handle->fd2;
1057 src_cfg.vaddr = src_handle->fd1;
1058 } else {
1059 src_cfg.uaddr = src_handle->fd1;
1060 src_cfg.vaddr = src_handle->fd2;
1061 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001062 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001063 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -07001064
1065 dst_cfg.x = 0;
1066 dst_cfg.y = 0;
1067 dst_cfg.w = WIDTH(layer.displayFrame);
1068 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001069 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001070 dst_cfg.drmMode = src_cfg.drmMode;
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001071 dst_cfg.format = dst_format;
Greg Hackmann9130e702012-07-30 14:53:04 -07001072
1073 ALOGV("source configuration:");
1074 dump_gsc_img(src_cfg);
1075
Greg Hackmann4eaff152012-10-03 16:28:19 -07001076 bool reconfigure = gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1077 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg);
1078 if (reconfigure) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001079 int dst_stride;
1080 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1081 GRALLOC_USAGE_SW_WRITE_NEVER |
1082 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001083
1084 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1085 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001086
1087 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1088 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1089
1090 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1091 if (gsc_data->dst_buf[i]) {
1092 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1093 gsc_data->dst_buf[i] = NULL;
1094 }
1095
1096 int ret = alloc_device->alloc(alloc_device, w, h,
1097 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1098 &dst_stride);
1099 if (ret < 0) {
1100 ALOGE("failed to allocate destination buffer: %s",
1101 strerror(-ret));
1102 goto err_alloc;
1103 }
1104 }
1105
1106 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001107 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001108
Greg Hackmann9130e702012-07-30 14:53:04 -07001109 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1110 dst_handle = private_handle_t::dynamicCast(dst_buf);
1111
1112 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001113 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001114 dst_cfg.yaddr = dst_handle->fd;
1115
1116 ALOGV("destination configuration:");
1117 dump_gsc_img(dst_cfg);
1118
Greg Hackmannefd98532012-10-02 12:00:42 -07001119 if (gsc_data->gsc) {
1120 ALOGV("reusing open gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1121 } else {
1122 ALOGV("opening gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1123 gsc_data->gsc = exynos_gsc_create_exclusive(
1124 AVAILABLE_GSC_UNITS[gsc_idx], GSC_M2M_MODE, GSC_DUMMY);
1125 if (!gsc_data->gsc) {
1126 ALOGE("failed to create gscaler handle");
1127 ret = -1;
1128 goto err_alloc;
1129 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001130 }
1131
Greg Hackmann4eaff152012-10-03 16:28:19 -07001132 if (reconfigure) {
1133 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1134 if (ret < 0) {
1135 ALOGE("failed to configure gscaler %u", gsc_idx);
1136 goto err_gsc_config;
1137 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001138 }
1139
1140 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1141 if (ret < 0) {
1142 ALOGE("failed to run gscaler %u", gsc_idx);
1143 goto err_gsc_config;
1144 }
1145
Greg Hackmann4eaff152012-10-03 16:28:19 -07001146 ret = exynos_gsc_wait_frame_done_exclusive(gsc_data->gsc);
1147 if (ret < 0) {
1148 ALOGE("failed to wait for gscaler %u", gsc_idx);
1149 goto err_gsc_config;
1150 }
1151
Greg Hackmann9130e702012-07-30 14:53:04 -07001152 gsc_data->src_cfg = src_cfg;
1153 gsc_data->dst_cfg = dst_cfg;
1154
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001155 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001156
1157err_gsc_config:
1158 exynos_gsc_destroy(gsc_data->gsc);
1159 gsc_data->gsc = NULL;
1160err_alloc:
1161 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1162 if (gsc_data->dst_buf[i]) {
1163 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1164 gsc_data->dst_buf[i] = NULL;
1165 }
1166 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001167 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1168 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001169 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001170}
1171
Greg Hackmannefd98532012-10-02 12:00:42 -07001172
1173static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
1174 size_t gsc_idx)
1175{
1176 exynos5_gsc_data_t &gsc_data = pdev->gsc[gsc_idx];
1177 if (!gsc_data.gsc)
1178 return;
1179
1180 ALOGV("closing gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1181
Greg Hackmann4eaff152012-10-03 16:28:19 -07001182 exynos_gsc_stop_exclusive(gsc_data.gsc);
Greg Hackmannefd98532012-10-02 12:00:42 -07001183 exynos_gsc_destroy(gsc_data.gsc);
1184 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++)
1185 if (gsc_data.dst_buf[i])
1186 pdev->alloc_device->free(pdev->alloc_device, gsc_data.dst_buf[i]);
1187
1188 memset(&gsc_data, 0, sizeof(gsc_data));
1189}
1190
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001191static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001192 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001193 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001194 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001195{
Greg Hackmann81575142012-09-19 15:09:04 -07001196 uint32_t x, y;
1197 uint32_t w = WIDTH(displayFrame);
1198 uint32_t h = HEIGHT(displayFrame);
1199 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1200 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1201
1202 if (displayFrame.left < 0) {
1203 unsigned int crop = -displayFrame.left;
1204 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1205 crop);
1206 x = 0;
1207 w -= crop;
1208 offset += crop * bpp / 8;
1209 } else {
1210 x = displayFrame.left;
1211 }
1212
1213 if (displayFrame.right > pdev->xres) {
1214 unsigned int crop = displayFrame.right - pdev->xres;
1215 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1216 crop);
1217 w -= crop;
1218 }
1219
1220 if (displayFrame.top < 0) {
1221 unsigned int crop = -displayFrame.top;
1222 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1223 crop);
1224 y = 0;
1225 h -= crop;
1226 offset += handle->stride * crop * bpp / 8;
1227 } else {
1228 y = displayFrame.top;
1229 }
1230
1231 if (displayFrame.bottom > pdev->yres) {
1232 int crop = displayFrame.bottom - pdev->yres;
1233 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1234 crop);
1235 h -= crop;
1236 }
1237
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001238 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1239 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001240 cfg.x = x;
1241 cfg.y = y;
1242 cfg.w = w;
1243 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001244 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001245 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001246 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001247 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001248 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001249}
1250
Erik Gilling87e707e2012-06-29 17:35:13 -07001251static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001252 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001253{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001254 if (layer->compositionType == HWC_BACKGROUND) {
1255 hwc_color_t color = layer->backgroundColor;
1256 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1257 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1258 cfg.x = 0;
1259 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001260 cfg.w = pdev->xres;
1261 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001262 return;
1263 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001264
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001265 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001266 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001267 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001268}
1269
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001270static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001271 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001272{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001273 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001274 struct s3c_fb_win_config_data win_data;
1275 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001276
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001277 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001278 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1279 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001280
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001281 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001282 int layer_idx = pdata->overlay_map[i];
1283 if (layer_idx != -1) {
1284 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001285 private_handle_t *handle =
1286 private_handle_t::dynamicCast(layer.handle);
1287
1288 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1289 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001290 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001291
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001292 // RGBX8888 surfaces are already in the right color order from the GPU,
1293 // RGB565 and YUV surfaces need the Gscaler to swap R & B
1294 int dst_format = HAL_PIXEL_FORMAT_BGRA_8888;
1295 if (exynos5_format_is_rgb(handle->format) &&
1296 handle->format != HAL_PIXEL_FORMAT_RGB_565)
1297 dst_format = HAL_PIXEL_FORMAT_RGBX_8888;
1298
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001299 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001300 gsc_idx, dst_format);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001301 if (err < 0) {
Greg Hackmann4eaff152012-10-03 16:28:19 -07001302 ALOGE("failed to configure gscaler %u for layer %u",
Greg Hackmann9130e702012-07-30 14:53:04 -07001303 gsc_idx, i);
1304 continue;
1305 }
1306
Greg Hackmann9130e702012-07-30 14:53:04 -07001307 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1308 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1309 private_handle_t *dst_handle =
1310 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001311 hwc_rect_t sourceCrop = { 0, 0,
1312 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1313 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001314 layer.displayFrame, layer.blending, -1, config[i],
1315 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001316 } else {
1317 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001318 }
1319 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001320 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1321 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1322 config[i].blending = S3C_FB_BLENDING_NONE;
1323 }
1324
Greg Hackmann9130e702012-07-30 14:53:04 -07001325 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001326 dump_config(config[i]);
1327 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001328
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001329 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001330 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1331 if (config[i].fence_fd != -1)
1332 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001333 if (ret < 0) {
1334 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1335 return ret;
1336 }
1337
1338 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1339 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1340 pdev->last_fb_window = pdata->fb_window;
1341 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1342 int layer_idx = pdata->overlay_map[i];
1343 if (layer_idx != -1) {
1344 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1345 pdev->last_handles[i] = layer.handle;
1346 }
1347 }
1348
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001349 return win_data.fence;
1350}
1351
1352static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001353 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001354{
1355 if (!contents->dpy || !contents->sur)
1356 return 0;
1357
1358 hwc_layer_1_t *fb_layer = NULL;
1359
1360 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1361 for (size_t i = 0; i < contents->numHwLayers; i++) {
1362 if (contents->hwLayers[i].compositionType ==
1363 HWC_FRAMEBUFFER_TARGET) {
1364 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1365 fb_layer = &contents->hwLayers[i];
1366 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001367 }
1368 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001369
1370 if (CC_UNLIKELY(!fb_layer)) {
1371 ALOGE("framebuffer target expected, but not provided");
1372 return -EINVAL;
1373 }
1374
1375 ALOGV("framebuffer target buffer:");
1376 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001377 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001378
Benoit Goby922abbf2012-09-19 19:24:19 -07001379 int fence = exynos5_post_fimd(pdev, contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001380 if (fence < 0)
1381 return fence;
1382
1383 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1384 if (pdev->bufs.overlay_map[i] != -1) {
1385 hwc_layer_1_t &layer =
1386 contents->hwLayers[pdev->bufs.overlay_map[i]];
1387 int dup_fd = dup(fence);
1388 if (dup_fd < 0)
1389 ALOGW("release fence dup failed: %s", strerror(errno));
1390 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001391 }
1392 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001393 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001394
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001395 return 0;
1396}
1397
1398static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1399 hwc_display_contents_1_t* contents)
1400{
Benoit Gobyb5501902012-10-01 00:29:01 -07001401 hwc_layer_1_t *fb_layer = NULL;
1402 hwc_layer_1_t *video_layer = NULL;
1403
Benoit Goby105be0b2012-09-21 13:19:30 -07001404 if (!pdev->hdmi_enabled) {
1405 for (size_t i = 0; i < contents->numHwLayers; i++) {
1406 hwc_layer_1_t &layer = contents->hwLayers[i];
1407 if (layer.acquireFenceFd != -1)
1408 close(layer.acquireFenceFd);
Benoit Goby922abbf2012-09-19 19:24:19 -07001409 }
Benoit Goby48a69542012-09-21 17:12:28 -07001410 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001411 }
Benoit Goby48a69542012-09-21 17:12:28 -07001412
1413 for (size_t i = 0; i < contents->numHwLayers; i++) {
1414 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001415
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001416 if (layer.flags & HWC_SKIP_LAYER) {
1417 ALOGV("HDMI skipping layer %d", i);
1418 continue;
1419 }
1420
Benoit Gobyb5501902012-10-01 00:29:01 -07001421 if (layer.compositionType == HWC_OVERLAY) {
1422 if (!layer.handle)
1423 continue;
1424
1425 ALOGV("HDMI video layer:");
1426 dump_layer(&layer);
1427
Greg Hackmannd6743822012-10-02 17:27:25 -07001428 exynos5_gsc_data_t &gsc = pdev->gsc[HDMI_GSC_IDX];
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001429 exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc, 1,
1430 HAL_PIXEL_FORMAT_RGBX_8888);
Benoit Gobyb5501902012-10-01 00:29:01 -07001431
Benoit Gobyb5501902012-10-01 00:29:01 -07001432 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1433 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1434 private_handle_t *h = private_handle_t::dynamicCast(dst_buf);
1435
1436 hdmi_output(pdev, pdev->hdmi_layers[0], layer, h);
1437 video_layer = &layer;
1438 }
1439
Benoit Goby922abbf2012-09-19 19:24:19 -07001440 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1441 if (!layer.handle)
1442 continue;
1443
1444 ALOGV("HDMI FB layer:");
1445 dump_layer(&layer);
1446
Benoit Gobyb5501902012-10-01 00:29:01 -07001447 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
1448 hdmi_output(pdev, pdev->hdmi_layers[1], layer, h);
1449 fb_layer = &layer;
Benoit Goby922abbf2012-09-19 19:24:19 -07001450 }
1451 }
1452
Greg Hackmannefd98532012-10-02 12:00:42 -07001453 if (!video_layer) {
Benoit Gobyb5501902012-10-01 00:29:01 -07001454 hdmi_disable_layer(pdev, pdev->hdmi_layers[0]);
Greg Hackmannefd98532012-10-02 12:00:42 -07001455 exynos5_cleanup_gsc_m2m(pdev, HDMI_GSC_IDX);
1456 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001457 if (!fb_layer)
1458 hdmi_disable_layer(pdev, pdev->hdmi_layers[1]);
1459
Benoit Goby922abbf2012-09-19 19:24:19 -07001460 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001461}
1462
Jesse Halle94046d2012-07-31 14:34:08 -07001463static int exynos5_set(struct hwc_composer_device_1 *dev,
1464 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001465{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001466 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001467 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001468
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001469 exynos5_hwc_composer_device_1_t *pdev =
1470 (exynos5_hwc_composer_device_1_t *)dev;
1471 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1472 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001473
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001474 if (fimd_contents) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001475 int err = exynos5_set_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001476 if (err)
1477 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001478 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001479
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001480 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001481 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1482 if (err)
1483 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001484 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001485
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001486 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001487}
1488
Erik Gilling87e707e2012-06-29 17:35:13 -07001489static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001490 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001491{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001492 struct exynos5_hwc_composer_device_1_t* pdev =
1493 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001494 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001495}
1496
Erik Gilling87e707e2012-06-29 17:35:13 -07001497static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001498{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001499 struct exynos5_hwc_composer_device_1_t *pdev =
1500 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001501
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001502 switch (what) {
1503 case HWC_BACKGROUND_LAYER_SUPPORTED:
1504 // we support the background layer
1505 value[0] = 1;
1506 break;
1507 case HWC_VSYNC_PERIOD:
1508 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001509 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001510 break;
1511 default:
1512 // unsupported query
1513 return -EINVAL;
1514 }
1515 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001516}
1517
Jesse Halle94046d2012-07-31 14:34:08 -07001518static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1519 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001520{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001521 struct exynos5_hwc_composer_device_1_t *pdev =
1522 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001523
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001524 switch (event) {
1525 case HWC_EVENT_VSYNC:
1526 __u32 val = !!enabled;
1527 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1528 if (err < 0) {
1529 ALOGE("vsync ioctl failed");
1530 return -errno;
1531 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001532
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001533 return 0;
1534 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001535
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001536 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001537}
1538
Benoit Gobycdd61b32012-07-09 12:09:59 -07001539static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001540 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001541{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001542 const char *s = buff;
1543 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001544
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001545 while (*s) {
1546 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1547 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001548
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001549 s += strlen(s) + 1;
1550 if (s - buff >= len)
1551 break;
1552 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001553
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001554 if (pdev->hdmi_hpd) {
1555 if (hdmi_get_config(pdev)) {
1556 ALOGE("Error reading HDMI configuration");
1557 pdev->hdmi_hpd = false;
1558 return;
1559 }
1560 }
1561
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001562 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001563 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001564 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001565
Jesse Hallda5a71d2012-08-21 12:12:55 -07001566 /* hwc_dev->procs is set right after the device is opened, but there is
1567 * still a race condition where a hotplug event might occur after the open
1568 * but before the procs are registered. */
1569 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001570 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001571}
1572
Greg Hackmann29724852012-07-23 15:31:10 -07001573static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001574{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001575 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001576 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001577
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001578 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1579 if (err < 0) {
1580 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1581 return;
1582 }
1583
Greg Hackmann29724852012-07-23 15:31:10 -07001584 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001585 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001586 if (err < 0) {
1587 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1588 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001589 }
Greg Hackmann29724852012-07-23 15:31:10 -07001590 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001591
Greg Hackmann29724852012-07-23 15:31:10 -07001592 errno = 0;
1593 uint64_t timestamp = strtoull(buf, NULL, 0);
1594 if (!errno)
1595 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001596}
1597
1598static void *hwc_vsync_thread(void *data)
1599{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001600 struct exynos5_hwc_composer_device_1_t *pdev =
1601 (struct exynos5_hwc_composer_device_1_t *)data;
1602 char uevent_desc[4096];
1603 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001604
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001605 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001606
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001607 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001608
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001609 char temp[4096];
1610 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1611 if (err < 0) {
1612 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1613 return NULL;
1614 }
1615
Greg Hackmann29724852012-07-23 15:31:10 -07001616 struct pollfd fds[2];
1617 fds[0].fd = pdev->vsync_fd;
1618 fds[0].events = POLLPRI;
1619 fds[1].fd = uevent_get_fd();
1620 fds[1].events = POLLIN;
1621
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001622 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001623 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001624
Greg Hackmann29724852012-07-23 15:31:10 -07001625 if (err > 0) {
1626 if (fds[0].revents & POLLPRI) {
1627 handle_vsync_event(pdev);
1628 }
1629 else if (fds[1].revents & POLLIN) {
1630 int len = uevent_next_event(uevent_desc,
1631 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001632
Greg Hackmann29724852012-07-23 15:31:10 -07001633 bool hdmi = !strcmp(uevent_desc,
1634 "change@/devices/virtual/switch/hdmi");
1635 if (hdmi)
1636 handle_hdmi_uevent(pdev, uevent_desc, len);
1637 }
1638 }
1639 else if (err == -1) {
1640 if (errno == EINTR)
1641 break;
1642 ALOGE("error in vsync thread: %s", strerror(errno));
1643 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001644 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001645
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001646 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001647}
1648
Jesse Halle94046d2012-07-31 14:34:08 -07001649static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001650{
1651 struct exynos5_hwc_composer_device_1_t *pdev =
1652 (struct exynos5_hwc_composer_device_1_t *)dev;
1653
1654 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1655 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1656 if (err < 0) {
Greg Hackmann70231562012-09-28 10:28:51 -07001657 if (errno == EBUSY)
1658 ALOGI("%sblank ioctl failed (display already %sblanked)",
1659 blank ? "" : "un", blank ? "" : "un");
1660 else
1661 ALOGE("%sblank ioctl failed: %s", blank ? "" : "un",
1662 strerror(errno));
Colin Cross00359a82012-07-12 17:54:17 -07001663 return -errno;
1664 }
1665
Benoit Gobyad4e3582012-08-30 17:17:34 -07001666 if (pdev->hdmi_hpd) {
1667 if (blank && !pdev->hdmi_blanked)
1668 hdmi_disable(pdev);
1669 pdev->hdmi_blanked = !!blank;
1670 }
1671
Colin Cross00359a82012-07-12 17:54:17 -07001672 return 0;
1673}
1674
Greg Hackmann600867e2012-08-23 12:58:02 -07001675static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1676{
1677 if (buff_len <= 0)
1678 return;
1679
1680 struct exynos5_hwc_composer_device_1_t *pdev =
1681 (struct exynos5_hwc_composer_device_1_t *)dev;
1682
1683 android::String8 result;
1684
Benoit Goby8bad7e32012-08-16 14:17:14 -07001685 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1686 if (pdev->hdmi_enabled)
1687 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001688 result.append(
1689 " type | handle | color | blend | format | position | size | gsc \n"
1690 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1691 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1692
1693 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1694 struct s3c_fb_win_config &config = pdev->last_config[i];
1695 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1696 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1697 "DISABLED", "-", "-", "-", "-", "-", "-");
1698 }
1699 else {
1700 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1701 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1702 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001703 else
1704 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1705 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1706 intptr_t(pdev->last_handles[i]),
1707 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001708
1709 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1710 config.w, config.h);
1711 }
1712 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1713 result.appendFormat(" | %3s", "-");
1714 else
1715 result.appendFormat(" | %3d",
1716 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1717 result.append("\n");
1718 }
1719
1720 strlcpy(buff, result.string(), buff_len);
1721}
1722
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001723static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1724 int disp, uint32_t *configs, size_t *numConfigs)
1725{
1726 struct exynos5_hwc_composer_device_1_t *pdev =
1727 (struct exynos5_hwc_composer_device_1_t *)dev;
1728
1729 if (*numConfigs == 0)
1730 return 0;
1731
1732 if (disp == HWC_DISPLAY_PRIMARY) {
1733 configs[0] = 0;
1734 *numConfigs = 1;
1735 return 0;
1736 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001737 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001738 return -EINVAL;
1739 }
1740
1741 int err = hdmi_get_config(pdev);
1742 if (err) {
1743 return -EINVAL;
1744 }
1745
1746 configs[0] = 0;
1747 *numConfigs = 1;
1748 return 0;
1749 }
1750
1751 return -EINVAL;
1752}
1753
1754static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1755 const uint32_t attribute)
1756{
1757 switch(attribute) {
1758 case HWC_DISPLAY_VSYNC_PERIOD:
1759 return pdev->vsync_period;
1760
1761 case HWC_DISPLAY_WIDTH:
1762 return pdev->xres;
1763
1764 case HWC_DISPLAY_HEIGHT:
1765 return pdev->yres;
1766
1767 case HWC_DISPLAY_DPI_X:
1768 return pdev->xdpi;
1769
1770 case HWC_DISPLAY_DPI_Y:
1771 return pdev->ydpi;
1772
1773 default:
1774 ALOGE("unknown display attribute %u", attribute);
1775 return -EINVAL;
1776 }
1777}
1778
1779static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1780 const uint32_t attribute)
1781{
1782 switch(attribute) {
1783 case HWC_DISPLAY_VSYNC_PERIOD:
1784 return pdev->vsync_period;
1785
1786 case HWC_DISPLAY_WIDTH:
1787 return pdev->hdmi_w;
1788
1789 case HWC_DISPLAY_HEIGHT:
1790 return pdev->hdmi_h;
1791
1792 case HWC_DISPLAY_DPI_X:
1793 case HWC_DISPLAY_DPI_Y:
1794 return 0; // unknown
1795
1796 default:
1797 ALOGE("unknown display attribute %u", attribute);
1798 return -EINVAL;
1799 }
1800}
1801
Jesse Hall54aa0d22012-09-20 11:43:49 -07001802static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001803 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1804{
1805 struct exynos5_hwc_composer_device_1_t *pdev =
1806 (struct exynos5_hwc_composer_device_1_t *)dev;
1807
1808 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1809 if (disp == HWC_DISPLAY_PRIMARY)
1810 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1811 else if (disp == HWC_DISPLAY_EXTERNAL)
1812 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001813 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001814 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001815 return -EINVAL;
1816 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001817 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001818
1819 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001820}
1821
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001822static int exynos5_close(hw_device_t* device);
1823
1824static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001825 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001826{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001827 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001828 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001829 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001830
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001831 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1832 return -EINVAL;
1833 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001834
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001835 struct exynos5_hwc_composer_device_1_t *dev;
1836 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1837 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001838
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001839 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1840 (const struct hw_module_t **)&dev->gralloc_module)) {
1841 ALOGE("failed to get gralloc hw module");
1842 ret = -EINVAL;
1843 goto err_get_module;
1844 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001845
Greg Hackmann9130e702012-07-30 14:53:04 -07001846 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1847 &dev->alloc_device)) {
1848 ALOGE("failed to open gralloc");
1849 ret = -EINVAL;
1850 goto err_get_module;
1851 }
1852
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001853 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1854 if (dev->fd < 0) {
1855 ALOGE("failed to open framebuffer");
1856 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001857 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001858 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001859
Greg Hackmannd92fe212012-09-11 14:28:41 -07001860 struct fb_var_screeninfo info;
1861 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1862 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1863 ret = -errno;
1864 goto err_ioctl;
1865 }
1866
1867 refreshRate = 1000000000000LLU /
1868 (
1869 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1870 * ( info.left_margin + info.right_margin + info.xres )
1871 * info.pixclock
1872 );
1873
1874 if (refreshRate == 0) {
1875 ALOGW("invalid refresh rate, assuming 60 Hz");
1876 refreshRate = 60;
1877 }
1878
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001879 dev->xres = 2560;
1880 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001881 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1882 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1883 dev->vsync_period = 1000000000 / refreshRate;
1884
1885 ALOGV("using\n"
1886 "xres = %d px\n"
1887 "yres = %d px\n"
1888 "width = %d mm (%f dpi)\n"
1889 "height = %d mm (%f dpi)\n"
1890 "refresh rate = %d Hz\n",
1891 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1892 info.height, dev->ydpi / 1000.0, refreshRate);
1893
Benoit Goby8bad7e32012-08-16 14:17:14 -07001894 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001895 if (dev->hdmi_mixer0 < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001896 ALOGE("failed to open hdmi mixer0 subdev");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001897 ret = dev->hdmi_mixer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001898 goto err_ioctl;
1899 }
1900
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001901 dev->hdmi_layers[0].id = 0;
1902 dev->hdmi_layers[0].fd = open("/dev/video16", O_RDWR);
1903 if (dev->hdmi_layers[0].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001904 ALOGE("failed to open hdmi layer0 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001905 ret = dev->hdmi_layers[0].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001906 goto err_mixer0;
1907 }
1908
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001909 dev->hdmi_layers[1].id = 1;
1910 dev->hdmi_layers[1].fd = open("/dev/video17", O_RDWR);
1911 if (dev->hdmi_layers[1].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001912 ALOGE("failed to open hdmi layer1 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001913 ret = dev->hdmi_layers[1].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001914 goto err_hdmi0;
1915 }
1916
Greg Hackmann29724852012-07-23 15:31:10 -07001917 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1918 if (dev->vsync_fd < 0) {
1919 ALOGE("failed to open vsync attribute");
1920 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001921 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001922 }
1923
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001924 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1925 if (sw_fd) {
1926 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001927 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001928 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001929 if (hdmi_get_config(dev)) {
1930 ALOGE("Error reading HDMI configuration");
1931 dev->hdmi_hpd = false;
1932 }
1933 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001934 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001935
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001936 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001937 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001938 dev->base.common.module = const_cast<hw_module_t *>(module);
1939 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001940
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001941 dev->base.prepare = exynos5_prepare;
1942 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001943 dev->base.eventControl = exynos5_eventControl;
1944 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001945 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001946 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001947 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001948 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1949 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001950
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001951 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001952
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001953 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1954 if (ret) {
1955 ALOGE("failed to start vsync thread: %s", strerror(ret));
1956 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001957 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001958 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001959
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001960 char value[PROPERTY_VALUE_MAX];
1961 property_get("debug.hwc.force_gpu", value, "0");
1962 dev->force_gpu = atoi(value);
1963
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001964 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001965
Greg Hackmann29724852012-07-23 15:31:10 -07001966err_vsync:
1967 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001968err_mixer0:
1969 close(dev->hdmi_mixer0);
1970err_hdmi1:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001971 close(dev->hdmi_layers[0].fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001972err_hdmi0:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001973 close(dev->hdmi_layers[1].fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001974err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001975 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001976err_open_fb:
1977 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001978err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001979 free(dev);
1980 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001981}
1982
1983static int exynos5_close(hw_device_t *device)
1984{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001985 struct exynos5_hwc_composer_device_1_t *dev =
1986 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001987 pthread_kill(dev->vsync_thread, SIGTERM);
1988 pthread_join(dev->vsync_thread, NULL);
Greg Hackmannefd98532012-10-02 12:00:42 -07001989 for (size_t i = 0; i < NUM_GSC_UNITS; i++)
1990 exynos5_cleanup_gsc_m2m(dev, i);
Greg Hackmann9130e702012-07-30 14:53:04 -07001991 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001992 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001993 close(dev->hdmi_mixer0);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001994 close(dev->hdmi_layers[0].fd);
1995 close(dev->hdmi_layers[1].fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001996 close(dev->fd);
1997 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001998}
1999
2000static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002001 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002002};
2003
2004hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002005 common: {
2006 tag: HARDWARE_MODULE_TAG,
2007 module_api_version: HWC_MODULE_API_VERSION_0_1,
2008 hal_api_version: HARDWARE_HAL_API_VERSION,
2009 id: HWC_HARDWARE_MODULE_ID,
2010 name: "Samsung exynos5 hwcomposer module",
2011 author: "Google",
2012 methods: &exynos5_hwc_module_methods,
2013 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002014};