blob: 3003fb25aefde4ac697a5d2694d825faec76fe0d [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070076 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
99 uint8_t hotplug_active[2];
100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
Zhao Yakuice6feab2009-08-24 13:50:26 +0800116 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100117 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800118
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800119 /**
120 * This is set if we treat the device as HDMI, instead of DVI.
121 */
122 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000123 bool has_hdmi_monitor;
124 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800125
Ma Ling7086c872009-05-13 11:20:06 +0800126 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100127 * This is set if we detect output of sdvo device as LVDS and
128 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800129 */
130 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800131
132 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800133 * This is sdvo fixed pannel mode pointer
134 */
135 struct drm_display_mode *sdvo_lvds_fixed_mode;
136
Eric Anholtc751ce42010-03-25 11:48:48 -0700137 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800138 uint8_t ddc_bus;
139
Chris Wilson6c9547f2010-08-25 10:05:17 +0100140 /* Input timings for adjusted_mode */
141 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800142};
143
144struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100145 struct intel_connector base;
146
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147 /* Mark the type of connector */
148 uint16_t output_flag;
149
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100150 int force_audio;
151
Zhenyu Wang14571b42010-03-30 14:06:33 +0800152 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100153 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100155 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156
Zhao Yakuib9219c52009-09-10 15:45:46 +0800157 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100158 struct drm_property *left;
159 struct drm_property *right;
160 struct drm_property *top;
161 struct drm_property *bottom;
162 struct drm_property *hpos;
163 struct drm_property *vpos;
164 struct drm_property *contrast;
165 struct drm_property *saturation;
166 struct drm_property *hue;
167 struct drm_property *sharpness;
168 struct drm_property *flicker_filter;
169 struct drm_property *flicker_filter_adaptive;
170 struct drm_property *flicker_filter_2d;
171 struct drm_property *tv_chroma_filter;
172 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100173 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800174
175 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100176 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800177
178 /* Add variable to record current setting for the above property */
179 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100180
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181 /* this is to get the range of margin.*/
182 u32 max_hscan, max_vscan;
183 u32 max_hpos, cur_hpos;
184 u32 max_vpos, cur_vpos;
185 u32 cur_brightness, max_brightness;
186 u32 cur_contrast, max_contrast;
187 u32 cur_saturation, max_saturation;
188 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100189 u32 cur_sharpness, max_sharpness;
190 u32 cur_flicker_filter, max_flicker_filter;
191 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
192 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
193 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
194 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100195 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800196};
197
Chris Wilson890f3352010-09-14 16:46:59 +0100198static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100199{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100200 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100201}
202
Chris Wilsondf0e9242010-09-09 16:20:55 +0100203static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
204{
205 return container_of(intel_attached_encoder(connector),
206 struct intel_sdvo, base);
207}
208
Chris Wilson615fb932010-08-04 13:50:24 +0100209static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
210{
211 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
212}
213
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800214static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100215intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100216static bool
217intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector,
219 int type);
220static bool
221intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800223
Jesse Barnes79e53942008-11-07 14:24:08 -0800224/**
225 * Writes the SDVOB or SDVOC with the given value, but always writes both
226 * SDVOB and SDVOC to work around apparent hardware issues (according to
227 * comments in the BIOS).
228 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100229static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800230{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100231 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 u32 bval = val, cval = val;
234 int i;
235
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800239 return;
240 }
241
Chris Wilsonea5b2132010-08-04 13:50:23 +0100242 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800243 cval = I915_READ(SDVOC);
244 } else {
245 bval = I915_READ(SDVOB);
246 }
247 /*
248 * Write the registers twice for luck. Sometimes,
249 * writing them only once doesn't appear to 'stick'.
250 * The BIOS does this too. Yay, magic
251 */
252 for (i = 0; i < 2; i++)
253 {
254 I915_WRITE(SDVOB, bval);
255 I915_READ(SDVOB);
256 I915_WRITE(SDVOC, cval);
257 I915_READ(SDVOC);
258 }
259}
260
Chris Wilson32aad862010-08-04 13:50:25 +0100261static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800262{
Jesse Barnes79e53942008-11-07 14:24:08 -0800263 struct i2c_msg msgs[] = {
264 {
Chris Wilsone957d772010-09-24 12:52:03 +0100265 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800266 .flags = 0,
267 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100268 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 },
270 {
Chris Wilsone957d772010-09-24 12:52:03 +0100271 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800272 .flags = I2C_M_RD,
273 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100274 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800275 }
276 };
Chris Wilson32aad862010-08-04 13:50:25 +0100277 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800278
Chris Wilsonf899fc62010-07-20 15:44:45 -0700279 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800280 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800282 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800283 return false;
284}
285
Jesse Barnes79e53942008-11-07 14:24:08 -0800286#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
287/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100288static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800289 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100290 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800291} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100335
Akshay Joshi0206e352011-08-16 15:34:10 -0400336 /* Add the op code for SDVO enhancements */
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100381
Akshay Joshi0206e352011-08-16 15:34:10 -0400382 /* HDMI op code */
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800403};
404
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800405#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100406#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800407
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100409 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800410{
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 int i;
412
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800413 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800418 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 break;
423 }
424 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800428}
Jesse Barnes79e53942008-11-07 14:24:08 -0800429
Jesse Barnes79e53942008-11-07 14:24:08 -0800430static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438};
439
Chris Wilsone957d772010-09-24 12:52:03 +0100440static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442{
443 u8 buf[args_len*2 + 2], status;
444 struct i2c_msg msgs[args_len + 3];
445 int i, ret;
446
447 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
448
449 for (i = 0; i < args_len; i++) {
450 msgs[i].addr = intel_sdvo->slave_addr;
451 msgs[i].flags = 0;
452 msgs[i].len = 2;
453 msgs[i].buf = buf + 2 *i;
454 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
455 buf[2*i + 1] = ((u8*)args)[i];
456 }
457 msgs[i].addr = intel_sdvo->slave_addr;
458 msgs[i].flags = 0;
459 msgs[i].len = 2;
460 msgs[i].buf = buf + 2*i;
461 buf[2*i + 0] = SDVO_I2C_OPCODE;
462 buf[2*i + 1] = cmd;
463
464 /* the following two are to read the response */
465 status = SDVO_I2C_CMD_STATUS;
466 msgs[i+1].addr = intel_sdvo->slave_addr;
467 msgs[i+1].flags = 0;
468 msgs[i+1].len = 1;
469 msgs[i+1].buf = &status;
470
471 msgs[i+2].addr = intel_sdvo->slave_addr;
472 msgs[i+2].flags = I2C_M_RD;
473 msgs[i+2].len = 1;
474 msgs[i+2].buf = &status;
475
476 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
477 if (ret < 0) {
478 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
479 return false;
480 }
481 if (ret != i+3) {
482 /* failure in I2C transfer */
483 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
484 return false;
485 }
486
Chris Wilsone957d772010-09-24 12:52:03 +0100487 return true;
488}
489
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100490static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
491 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800492{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100493 u8 retry = 5;
494 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800495 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800496
Chris Wilsond121a5d2011-01-25 15:00:01 +0000497 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
498
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100499 /*
500 * The documentation states that all commands will be
501 * processed within 15µs, and that we need only poll
502 * the status byte a maximum of 3 times in order for the
503 * command to be complete.
504 *
505 * Check 5 times in case the hardware failed to read the docs.
506 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000507 if (!intel_sdvo_read_byte(intel_sdvo,
508 SDVO_I2C_CMD_STATUS,
509 &status))
510 goto log_fail;
511
512 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
513 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 if (!intel_sdvo_read_byte(intel_sdvo,
515 SDVO_I2C_CMD_STATUS,
516 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000517 goto log_fail;
518 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100519
Jesse Barnes79e53942008-11-07 14:24:08 -0800520 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800521 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800522 else
yakui_zhao342dc382009-06-02 14:12:00 +0800523 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800524
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100525 if (status != SDVO_CMD_STATUS_SUCCESS)
526 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800527
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100528 /* Read the command response */
529 for (i = 0; i < response_len; i++) {
530 if (!intel_sdvo_read_byte(intel_sdvo,
531 SDVO_I2C_RETURN_0 + i,
532 &((u8 *)response)[i]))
533 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100534 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100536 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100537 return true;
538
539log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000540 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100541 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542}
543
Hannes Ederb358d0a2008-12-18 21:18:47 +0100544static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800545{
546 if (mode->clock >= 100000)
547 return 1;
548 else if (mode->clock >= 50000)
549 return 2;
550 else
551 return 4;
552}
553
Chris Wilsone957d772010-09-24 12:52:03 +0100554static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
555 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800556{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000557 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100558 return intel_sdvo_write_cmd(intel_sdvo,
559 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
560 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800561}
562
Chris Wilson32aad862010-08-04 13:50:25 +0100563static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
564{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000565 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
566 return false;
567
568 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100569}
570
571static bool
572intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
573{
574 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
575 return false;
576
577 return intel_sdvo_read_response(intel_sdvo, value, len);
578}
579
580static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800581{
582 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100583 return intel_sdvo_set_value(intel_sdvo,
584 SDVO_CMD_SET_TARGET_INPUT,
585 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800586}
587
588/**
589 * Return whether each input is trained.
590 *
591 * This function is making an assumption about the layout of the response,
592 * which should be checked against the docs.
593 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100594static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800595{
596 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800597
Chris Wilson1a3665c2011-01-25 13:59:37 +0000598 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100599 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
600 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800601 return false;
602
603 *input_1 = response.input0_trained;
604 *input_2 = response.input1_trained;
605 return true;
606}
607
Chris Wilsonea5b2132010-08-04 13:50:23 +0100608static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800609 u16 outputs)
610{
Chris Wilson32aad862010-08-04 13:50:25 +0100611 return intel_sdvo_set_value(intel_sdvo,
612 SDVO_CMD_SET_ACTIVE_OUTPUTS,
613 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800614}
615
Chris Wilsonea5b2132010-08-04 13:50:23 +0100616static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800617 int mode)
618{
Chris Wilson32aad862010-08-04 13:50:25 +0100619 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800620
621 switch (mode) {
622 case DRM_MODE_DPMS_ON:
623 state = SDVO_ENCODER_STATE_ON;
624 break;
625 case DRM_MODE_DPMS_STANDBY:
626 state = SDVO_ENCODER_STATE_STANDBY;
627 break;
628 case DRM_MODE_DPMS_SUSPEND:
629 state = SDVO_ENCODER_STATE_SUSPEND;
630 break;
631 case DRM_MODE_DPMS_OFF:
632 state = SDVO_ENCODER_STATE_OFF;
633 break;
634 }
635
Chris Wilson32aad862010-08-04 13:50:25 +0100636 return intel_sdvo_set_value(intel_sdvo,
637 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800638}
639
Chris Wilsonea5b2132010-08-04 13:50:23 +0100640static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800641 int *clock_min,
642 int *clock_max)
643{
644 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800645
Chris Wilson1a3665c2011-01-25 13:59:37 +0000646 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100647 if (!intel_sdvo_get_value(intel_sdvo,
648 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
649 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800650 return false;
651
652 /* Convert the values from units of 10 kHz to kHz. */
653 *clock_min = clocks.min * 10;
654 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800655 return true;
656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 u16 outputs)
660{
Chris Wilson32aad862010-08-04 13:50:25 +0100661 return intel_sdvo_set_value(intel_sdvo,
662 SDVO_CMD_SET_TARGET_OUTPUT,
663 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800664}
665
Chris Wilsonea5b2132010-08-04 13:50:23 +0100666static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800667 struct intel_sdvo_dtd *dtd)
668{
Chris Wilson32aad862010-08-04 13:50:25 +0100669 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
670 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 struct intel_sdvo_dtd *dtd)
675{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100676 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
678}
679
Chris Wilsonea5b2132010-08-04 13:50:23 +0100680static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800681 struct intel_sdvo_dtd *dtd)
682{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100683 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800684 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
685}
686
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800687static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800689 uint16_t clock,
690 uint16_t width,
691 uint16_t height)
692{
693 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800694
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800695 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800696 args.clock = clock;
697 args.width = width;
698 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800699 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800700
Chris Wilsonea5b2132010-08-04 13:50:23 +0100701 if (intel_sdvo->is_lvds &&
702 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
703 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800704 args.scaled = 1;
705
Chris Wilson32aad862010-08-04 13:50:25 +0100706 return intel_sdvo_set_value(intel_sdvo,
707 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
708 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709}
710
Chris Wilsonea5b2132010-08-04 13:50:23 +0100711static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800712 struct intel_sdvo_dtd *dtd)
713{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000714 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
715 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100716 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
717 &dtd->part1, sizeof(dtd->part1)) &&
718 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
719 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800720}
Jesse Barnes79e53942008-11-07 14:24:08 -0800721
Chris Wilsonea5b2132010-08-04 13:50:23 +0100722static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800723{
Chris Wilson32aad862010-08-04 13:50:25 +0100724 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800725}
726
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100728 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800729{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800730 uint16_t width, height;
731 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
732 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800733
734 width = mode->crtc_hdisplay;
735 height = mode->crtc_vdisplay;
736
737 /* do some mode translations */
738 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
739 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
740
741 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
742 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
743
744 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
745 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
746
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800747 dtd->part1.clock = mode->clock / 10;
748 dtd->part1.h_active = width & 0xff;
749 dtd->part1.h_blank = h_blank_len & 0xff;
750 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800751 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 dtd->part1.v_active = height & 0xff;
753 dtd->part1.v_blank = v_blank_len & 0xff;
754 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800755 ((v_blank_len >> 8) & 0xf);
756
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800757 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800758 dtd->part2.h_sync_width = h_sync_len & 0xff;
759 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800760 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800762 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
763 ((v_sync_len & 0x30) >> 4);
764
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800766 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800768 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800770
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771 dtd->part2.sdvo_flags = 0;
772 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
773 dtd->part2.reserved = 0;
774}
Jesse Barnes79e53942008-11-07 14:24:08 -0800775
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100777 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779 mode->hdisplay = dtd->part1.h_active;
780 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
781 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800782 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800783 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
784 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
785 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
786 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
787
788 mode->vdisplay = dtd->part1.v_active;
789 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
790 mode->vsync_start = mode->vdisplay;
791 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800792 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
794 mode->vsync_end = mode->vsync_start +
795 (dtd->part2.v_sync_off_width & 0xf);
796 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
797 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
798 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
799
800 mode->clock = dtd->part1.clock * 10;
801
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800802 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803 if (dtd->part2.dtd_flags & 0x2)
804 mode->flags |= DRM_MODE_FLAG_PHSYNC;
805 if (dtd->part2.dtd_flags & 0x4)
806 mode->flags |= DRM_MODE_FLAG_PVSYNC;
807}
808
Chris Wilsone27d8532010-10-22 09:15:22 +0100809static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810{
Chris Wilsone27d8532010-10-22 09:15:22 +0100811 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812
Chris Wilson1a3665c2011-01-25 13:59:37 +0000813 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100814 return intel_sdvo_get_value(intel_sdvo,
815 SDVO_CMD_GET_SUPP_ENCODE,
816 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800817}
818
Chris Wilsonea5b2132010-08-04 13:50:23 +0100819static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700820 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800821{
Chris Wilson32aad862010-08-04 13:50:25 +0100822 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800823}
824
Chris Wilsonea5b2132010-08-04 13:50:23 +0100825static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826 uint8_t mode)
827{
Chris Wilson32aad862010-08-04 13:50:25 +0100828 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829}
830
831#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100832static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800833{
834 int i, j;
835 uint8_t set_buf_index[2];
836 uint8_t av_split;
837 uint8_t buf_size;
838 uint8_t buf[48];
839 uint8_t *pos;
840
Chris Wilson32aad862010-08-04 13:50:25 +0100841 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842
843 for (i = 0; i <= av_split; i++) {
844 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700845 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700847 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
848 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849
850 pos = buf;
851 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700852 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700854 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800855 pos += 8;
856 }
857 }
858}
859#endif
860
David Härdeman3c17fe42010-09-24 21:44:32 +0200861static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862{
863 struct dip_infoframe avi_if = {
864 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200865 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866 .len = DIP_LEN_AVI,
867 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200868 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
869 uint8_t set_buf_index[2] = { 1, 0 };
870 uint64_t *data = (uint64_t *)&avi_if;
871 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800872
David Härdeman3c17fe42010-09-24 21:44:32 +0200873 intel_dip_infoframe_csum(&avi_if);
874
Chris Wilsond121a5d2011-01-25 15:00:01 +0000875 if (!intel_sdvo_set_value(intel_sdvo,
876 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200877 set_buf_index, 2))
878 return false;
879
880 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000881 if (!intel_sdvo_set_value(intel_sdvo,
882 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200883 data, 8))
884 return false;
885 data++;
886 }
887
Chris Wilsond121a5d2011-01-25 15:00:01 +0000888 return intel_sdvo_set_value(intel_sdvo,
889 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200890 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800891}
892
Chris Wilson32aad862010-08-04 13:50:25 +0100893static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800894{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800895 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100896 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800897
Chris Wilson40039752010-08-04 13:50:26 +0100898 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800899 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100900 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800901
Chris Wilson32aad862010-08-04 13:50:25 +0100902 BUILD_BUG_ON(sizeof(format) != 6);
903 return intel_sdvo_set_value(intel_sdvo,
904 SDVO_CMD_SET_TV_FORMAT,
905 &format, sizeof(format));
906}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800907
Chris Wilson32aad862010-08-04 13:50:25 +0100908static bool
909intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
910 struct drm_display_mode *mode)
911{
912 struct intel_sdvo_dtd output_dtd;
913
914 if (!intel_sdvo_set_target_output(intel_sdvo,
915 intel_sdvo->attached_output))
916 return false;
917
918 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
919 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
920 return false;
921
922 return true;
923}
924
925static bool
926intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
927 struct drm_display_mode *mode,
928 struct drm_display_mode *adjusted_mode)
929{
Chris Wilson32aad862010-08-04 13:50:25 +0100930 /* Reset the input timing to the screen. Assume always input 0. */
931 if (!intel_sdvo_set_target_input(intel_sdvo))
932 return false;
933
934 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
935 mode->clock / 10,
936 mode->hdisplay,
937 mode->vdisplay))
938 return false;
939
940 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100941 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100942 return false;
943
Chris Wilson6c9547f2010-08-25 10:05:17 +0100944 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100945
946 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100947 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800948}
949
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800950static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
951 struct drm_display_mode *mode,
952 struct drm_display_mode *adjusted_mode)
953{
Chris Wilson890f3352010-09-14 16:46:59 +0100954 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100955 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956
Chris Wilson32aad862010-08-04 13:50:25 +0100957 /* We need to construct preferred input timings based on our
958 * output timings. To do that, we have to set the output
959 * timings, even though this isn't really the right place in
960 * the sequence to do it. Oh well.
961 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100962 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100963 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800964 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100965
Pavel Roskinc74696b2010-09-02 14:46:34 -0400966 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
967 mode,
968 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100969 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100970 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100971 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800972 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800973
Pavel Roskinc74696b2010-09-02 14:46:34 -0400974 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
975 mode,
976 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800977 }
Chris Wilson32aad862010-08-04 13:50:25 +0100978
979 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100980 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100981 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100982 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
983 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100984
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800985 return true;
986}
987
988static void intel_sdvo_mode_set(struct drm_encoder *encoder,
989 struct drm_display_mode *mode,
990 struct drm_display_mode *adjusted_mode)
991{
992 struct drm_device *dev = encoder->dev;
993 struct drm_i915_private *dev_priv = dev->dev_private;
994 struct drm_crtc *crtc = encoder->crtc;
995 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100996 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100997 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998 struct intel_sdvo_in_out_map in_out;
999 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001000 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1001 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001002
1003 if (!mode)
1004 return;
1005
1006 /* First, set the input mapping for the first input to our controlled
1007 * output. This is only correct if we're a single-input device, in
1008 * which case the first input is the output from the appropriate SDVO
1009 * channel on the motherboard. In a two-input device, the first input
1010 * will be SDVOB and the second SDVOC.
1011 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001012 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001013 in_out.in1 = 0;
1014
Pavel Roskinc74696b2010-09-02 14:46:34 -04001015 intel_sdvo_set_value(intel_sdvo,
1016 SDVO_CMD_SET_IN_OUT_MAP,
1017 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001018
Chris Wilson6c9547f2010-08-25 10:05:17 +01001019 /* Set the output timings to the screen */
1020 if (!intel_sdvo_set_target_output(intel_sdvo,
1021 intel_sdvo->attached_output))
1022 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001023
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001024 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001025 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001026 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001027 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1028 input_dtd = intel_sdvo->input_dtd;
1029 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001030 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001031 if (!intel_sdvo_set_target_output(intel_sdvo,
1032 intel_sdvo->attached_output))
1033 return;
1034
Chris Wilson6c9547f2010-08-25 10:05:17 +01001035 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001036 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001037 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001038
1039 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001040 if (!intel_sdvo_set_target_input(intel_sdvo))
1041 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001042
Chris Wilson97aaf912011-01-04 20:10:52 +00001043 if (intel_sdvo->has_hdmi_monitor) {
1044 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1045 intel_sdvo_set_colorimetry(intel_sdvo,
1046 SDVO_COLORIMETRY_RGB256);
1047 intel_sdvo_set_avi_infoframe(intel_sdvo);
1048 } else
1049 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001050
Chris Wilson6c9547f2010-08-25 10:05:17 +01001051 if (intel_sdvo->is_tv &&
1052 !intel_sdvo_set_tv_format(intel_sdvo))
1053 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001054
Pavel Roskinc74696b2010-09-02 14:46:34 -04001055 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001056
Chris Wilson6c9547f2010-08-25 10:05:17 +01001057 switch (pixel_multiplier) {
1058 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001059 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1060 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1061 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001062 }
Chris Wilson32aad862010-08-04 13:50:25 +01001063 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1064 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001065
1066 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001067 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001068 sdvox = 0;
Chris Wilsone953fd72011-02-21 22:23:52 +00001069 if (intel_sdvo->is_hdmi)
1070 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001071 if (INTEL_INFO(dev)->gen < 5)
1072 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001073 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1074 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1075 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1076 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001077 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001078 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001079 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001080 case SDVOB:
1081 sdvox &= SDVOB_PRESERVE_MASK;
1082 break;
1083 case SDVOC:
1084 sdvox &= SDVOC_PRESERVE_MASK;
1085 break;
1086 }
1087 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1088 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001089 if (intel_crtc->pipe == 1)
1090 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilsonda79de92010-11-22 11:12:46 +00001091 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001092 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001093
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001094 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001095 /* done in crtc_mode_set as the dpll_md reg must be written early */
1096 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1097 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001098 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001099 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001100 }
1101
Chris Wilson6714afb2010-12-17 04:10:51 +00001102 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1103 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001104 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001105 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001106}
1107
1108static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1109{
1110 struct drm_device *dev = encoder->dev;
1111 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001112 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001113 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001114 u32 temp;
1115
1116 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001117 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001118 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001119 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001120
1121 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001122 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001123 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001124 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001125 }
1126 }
1127 } else {
1128 bool input1, input2;
1129 int i;
1130 u8 status;
1131
Chris Wilsonea5b2132010-08-04 13:50:23 +01001132 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001133 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001134 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001135 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001136 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001137
Chris Wilson32aad862010-08-04 13:50:25 +01001138 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001139 /* Warn if the device reported failure to sync.
1140 * A lot of SDVO devices fail to notify of sync, but it's
1141 * a given it the status is a success, we succeeded.
1142 */
1143 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001144 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001145 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001146 }
1147
1148 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1150 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 }
1152 return;
1153}
1154
Jesse Barnes79e53942008-11-07 14:24:08 -08001155static int intel_sdvo_mode_valid(struct drm_connector *connector,
1156 struct drm_display_mode *mode)
1157{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001158 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001159
1160 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1161 return MODE_NO_DBLESCAN;
1162
Chris Wilsonea5b2132010-08-04 13:50:23 +01001163 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001164 return MODE_CLOCK_LOW;
1165
Chris Wilsonea5b2132010-08-04 13:50:23 +01001166 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001167 return MODE_CLOCK_HIGH;
1168
Chris Wilson85454232010-08-08 14:28:23 +01001169 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001170 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001171 return MODE_PANEL;
1172
Chris Wilsonea5b2132010-08-04 13:50:23 +01001173 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001174 return MODE_PANEL;
1175 }
1176
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 return MODE_OK;
1178}
1179
Chris Wilsonea5b2132010-08-04 13:50:23 +01001180static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001181{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001182 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001183 if (!intel_sdvo_get_value(intel_sdvo,
1184 SDVO_CMD_GET_DEVICE_CAPS,
1185 caps, sizeof(*caps)))
1186 return false;
1187
1188 DRM_DEBUG_KMS("SDVO capabilities:\n"
1189 " vendor_id: %d\n"
1190 " device_id: %d\n"
1191 " device_rev_id: %d\n"
1192 " sdvo_version_major: %d\n"
1193 " sdvo_version_minor: %d\n"
1194 " sdvo_inputs_mask: %d\n"
1195 " smooth_scaling: %d\n"
1196 " sharp_scaling: %d\n"
1197 " up_scaling: %d\n"
1198 " down_scaling: %d\n"
1199 " stall_support: %d\n"
1200 " output_flags: %d\n",
1201 caps->vendor_id,
1202 caps->device_id,
1203 caps->device_rev_id,
1204 caps->sdvo_version_major,
1205 caps->sdvo_version_minor,
1206 caps->sdvo_inputs_mask,
1207 caps->smooth_scaling,
1208 caps->sharp_scaling,
1209 caps->up_scaling,
1210 caps->down_scaling,
1211 caps->stall_support,
1212 caps->output_flags);
1213
1214 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001215}
1216
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001217static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001218{
1219 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001220
Chris Wilson32aad862010-08-04 13:50:25 +01001221 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1222 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001223}
1224
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001225static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001226{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001227 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001228
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001229 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001230}
1231
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001232static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001233intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001234{
Chris Wilsonbc652122011-01-25 13:28:29 +00001235 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001236 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001237}
1238
Chris Wilsonf899fc62010-07-20 15:44:45 -07001239static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001240intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001241{
Chris Wilsone957d772010-09-24 12:52:03 +01001242 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1243 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001244}
1245
Chris Wilsonff482d82010-09-15 10:40:38 +01001246/* Mac mini hack -- use the same DDC as the analog connector */
1247static struct edid *
1248intel_sdvo_get_analog_edid(struct drm_connector *connector)
1249{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001250 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001251
Chris Wilson0c1dab82010-11-23 22:37:01 +00001252 return drm_get_edid(connector,
1253 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001254}
1255
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001256enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001257intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001258{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001259 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001260 enum drm_connector_status status;
1261 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001262
Chris Wilsone957d772010-09-24 12:52:03 +01001263 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001264
Chris Wilsonea5b2132010-08-04 13:50:23 +01001265 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001266 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001267
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001268 /*
1269 * Don't use the 1 as the argument of DDC bus switch to get
1270 * the EDID. It is used for SDVO SPD ROM.
1271 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001272 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001273 intel_sdvo->ddc_bus = ddc;
1274 edid = intel_sdvo_get_edid(connector);
1275 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001276 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001277 }
Chris Wilsone957d772010-09-24 12:52:03 +01001278 /*
1279 * If we found the EDID on the other bus,
1280 * assume that is the correct DDC bus.
1281 */
1282 if (edid == NULL)
1283 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001284 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001285
1286 /*
1287 * When there is no edid and no monitor is connected with VGA
1288 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001289 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001290 if (edid == NULL)
1291 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001292
Chris Wilson2f551c82010-09-15 10:42:50 +01001293 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001294 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001295 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001296 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1297 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001298 if (intel_sdvo->is_hdmi) {
1299 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1300 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1301 }
Chris Wilson139467432011-02-09 20:01:16 +00001302 } else
1303 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001304 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001305 kfree(edid);
1306 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001307
1308 if (status == connector_status_connected) {
1309 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1310 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001311 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001312 }
1313
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001314 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001315}
1316
Chris Wilson7b334fc2010-09-09 23:51:02 +01001317static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001318intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001319{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001320 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001321 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001322 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001323 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001324
Chris Wilson32aad862010-08-04 13:50:25 +01001325 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001326 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001327 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001328
1329 /* add 30ms delay when the output type might be TV */
1330 if (intel_sdvo->caps.output_flags &
1331 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001332 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001333
Chris Wilson32aad862010-08-04 13:50:25 +01001334 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1335 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001336
Chris Wilsone957d772010-09-24 12:52:03 +01001337 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1338 response & 0xff, response >> 8,
1339 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001340
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001341 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001342 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001343
Chris Wilsonea5b2132010-08-04 13:50:23 +01001344 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001345
Chris Wilson97aaf912011-01-04 20:10:52 +00001346 intel_sdvo->has_hdmi_monitor = false;
1347 intel_sdvo->has_hdmi_audio = false;
1348
Chris Wilson615fb932010-08-04 13:50:24 +01001349 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001350 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001351 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001352 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001353 else {
1354 struct edid *edid;
1355
1356 /* if we have an edid check it matches the connection */
1357 edid = intel_sdvo_get_edid(connector);
1358 if (edid == NULL)
1359 edid = intel_sdvo_get_analog_edid(connector);
1360 if (edid != NULL) {
1361 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1362 ret = connector_status_disconnected;
1363 else
1364 ret = connector_status_connected;
1365 connector->display_info.raw_edid = NULL;
1366 kfree(edid);
1367 } else
1368 ret = connector_status_connected;
1369 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001370
1371 /* May update encoder flag for like clock for SDVO TV, etc.*/
1372 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001373 intel_sdvo->is_tv = false;
1374 intel_sdvo->is_lvds = false;
1375 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001376
1377 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001378 intel_sdvo->is_tv = true;
1379 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001380 }
1381 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001382 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001383 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001384
1385 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001386}
1387
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001388static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001389{
Chris Wilsonff482d82010-09-15 10:40:38 +01001390 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001391
1392 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001393 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001394
Keith Packard57cdaf92009-09-04 13:07:54 +08001395 /*
1396 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1397 * link between analog and digital outputs. So, if the regular SDVO
1398 * DDC fails, check to see if the analog output is disconnected, in
1399 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001400 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001401 if (edid == NULL)
1402 edid = intel_sdvo_get_analog_edid(connector);
1403
Chris Wilsonff482d82010-09-15 10:40:38 +01001404 if (edid != NULL) {
Chris Wilson139467432011-02-09 20:01:16 +00001405 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1406 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1407 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1408
1409 if (connector_is_digital == monitor_is_digital) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001410 drm_mode_connector_update_edid_property(connector, edid);
1411 drm_add_edid_modes(connector, edid);
1412 }
Chris Wilson139467432011-02-09 20:01:16 +00001413
Chris Wilsonff482d82010-09-15 10:40:38 +01001414 connector->display_info.raw_edid = NULL;
1415 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001416 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001417}
1418
1419/*
1420 * Set of SDVO TV modes.
1421 * Note! This is in reply order (see loop in get_tv_modes).
1422 * XXX: all 60Hz refresh?
1423 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001424static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001425 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1426 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001427 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001428 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1429 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001430 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001431 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1432 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001433 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001434 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1435 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001436 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001437 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1438 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001440 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1441 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001443 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1444 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001445 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001446 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1447 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001449 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1450 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001452 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1453 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001455 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1456 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001458 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1459 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001461 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1462 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001464 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1465 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001467 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1468 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001470 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1471 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001473 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1474 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1477 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1480 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482};
1483
1484static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1485{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001486 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001487 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001488 uint32_t reply = 0, format_map = 0;
1489 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490
1491 /* Read the list of supported input resolutions for the selected TV
1492 * format.
1493 */
Chris Wilson40039752010-08-04 13:50:26 +01001494 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001495 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001496 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001497
Chris Wilson32aad862010-08-04 13:50:25 +01001498 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1499 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001500
Chris Wilson32aad862010-08-04 13:50:25 +01001501 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001502 if (!intel_sdvo_write_cmd(intel_sdvo,
1503 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001504 &tv_res, sizeof(tv_res)))
1505 return;
1506 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001507 return;
1508
1509 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001510 if (reply & (1 << i)) {
1511 struct drm_display_mode *nmode;
1512 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001513 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001514 if (nmode)
1515 drm_mode_probed_add(connector, nmode);
1516 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517}
1518
Ma Ling7086c872009-05-13 11:20:06 +08001519static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1520{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001521 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001522 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001523 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001524
1525 /*
1526 * Attempt to get the mode list from DDC.
1527 * Assume that the preferred modes are
1528 * arranged in priority order.
1529 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001530 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001531 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001532 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001533
1534 /* Fetch modes from VBT */
1535 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001536 newmode = drm_mode_duplicate(connector->dev,
1537 dev_priv->sdvo_lvds_vbt_mode);
1538 if (newmode != NULL) {
1539 /* Guarantee the mode is preferred */
1540 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1541 DRM_MODE_TYPE_DRIVER);
1542 drm_mode_probed_add(connector, newmode);
1543 }
1544 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001545
1546end:
1547 list_for_each_entry(newmode, &connector->probed_modes, head) {
1548 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001549 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001550 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001551
1552 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1553 0);
1554
Chris Wilson85454232010-08-08 14:28:23 +01001555 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001556 break;
1557 }
1558 }
1559
Ma Ling7086c872009-05-13 11:20:06 +08001560}
1561
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001562static int intel_sdvo_get_modes(struct drm_connector *connector)
1563{
Chris Wilson615fb932010-08-04 13:50:24 +01001564 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001565
Chris Wilson615fb932010-08-04 13:50:24 +01001566 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001567 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001568 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001569 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001570 else
1571 intel_sdvo_get_ddc_modes(connector);
1572
Chris Wilson32aad862010-08-04 13:50:25 +01001573 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001574}
1575
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001576static void
1577intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001578{
Chris Wilson615fb932010-08-04 13:50:24 +01001579 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001580 struct drm_device *dev = connector->dev;
1581
Chris Wilsonc5521702010-08-04 13:50:28 +01001582 if (intel_sdvo_connector->left)
1583 drm_property_destroy(dev, intel_sdvo_connector->left);
1584 if (intel_sdvo_connector->right)
1585 drm_property_destroy(dev, intel_sdvo_connector->right);
1586 if (intel_sdvo_connector->top)
1587 drm_property_destroy(dev, intel_sdvo_connector->top);
1588 if (intel_sdvo_connector->bottom)
1589 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1590 if (intel_sdvo_connector->hpos)
1591 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1592 if (intel_sdvo_connector->vpos)
1593 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1594 if (intel_sdvo_connector->saturation)
1595 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1596 if (intel_sdvo_connector->contrast)
1597 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1598 if (intel_sdvo_connector->hue)
1599 drm_property_destroy(dev, intel_sdvo_connector->hue);
1600 if (intel_sdvo_connector->sharpness)
1601 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1602 if (intel_sdvo_connector->flicker_filter)
1603 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1604 if (intel_sdvo_connector->flicker_filter_2d)
1605 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1606 if (intel_sdvo_connector->flicker_filter_adaptive)
1607 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1608 if (intel_sdvo_connector->tv_luma_filter)
1609 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1610 if (intel_sdvo_connector->tv_chroma_filter)
1611 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001612 if (intel_sdvo_connector->dot_crawl)
1613 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001614 if (intel_sdvo_connector->brightness)
1615 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001616}
1617
Jesse Barnes79e53942008-11-07 14:24:08 -08001618static void intel_sdvo_destroy(struct drm_connector *connector)
1619{
Chris Wilson615fb932010-08-04 13:50:24 +01001620 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001621
Chris Wilsonc5521702010-08-04 13:50:28 +01001622 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001623 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001624 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001625
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001626 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001627 drm_sysfs_connector_remove(connector);
1628 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001629 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001630}
1631
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001632static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1633{
1634 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1635 struct edid *edid;
1636 bool has_audio = false;
1637
1638 if (!intel_sdvo->is_hdmi)
1639 return false;
1640
1641 edid = intel_sdvo_get_edid(connector);
1642 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1643 has_audio = drm_detect_monitor_audio(edid);
1644
1645 return has_audio;
1646}
1647
Zhao Yakuice6feab2009-08-24 13:50:26 +08001648static int
1649intel_sdvo_set_property(struct drm_connector *connector,
1650 struct drm_property *property,
1651 uint64_t val)
1652{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001653 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001654 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001655 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001656 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001657 uint8_t cmd;
1658 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001659
1660 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001661 if (ret)
1662 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001663
Chris Wilson3f43c482011-05-12 22:17:24 +01001664 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001665 int i = val;
1666 bool has_audio;
1667
1668 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001669 return 0;
1670
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001671 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001672
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001673 if (i == 0)
1674 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1675 else
1676 has_audio = i > 0;
1677
1678 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001679 return 0;
1680
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001681 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001682 goto done;
1683 }
1684
Chris Wilsone953fd72011-02-21 22:23:52 +00001685 if (property == dev_priv->broadcast_rgb_property) {
1686 if (val == !!intel_sdvo->color_range)
1687 return 0;
1688
1689 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001690 goto done;
1691 }
1692
Chris Wilsonc5521702010-08-04 13:50:28 +01001693#define CHECK_PROPERTY(name, NAME) \
1694 if (intel_sdvo_connector->name == property) { \
1695 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1696 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1697 cmd = SDVO_CMD_SET_##NAME; \
1698 intel_sdvo_connector->cur_##name = temp_value; \
1699 goto set_value; \
1700 }
1701
1702 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001703 if (val >= TV_FORMAT_NUM)
1704 return -EINVAL;
1705
Chris Wilson40039752010-08-04 13:50:26 +01001706 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001707 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001708 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001709
Chris Wilson40039752010-08-04 13:50:26 +01001710 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001711 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001712 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001713 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001714 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001715 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001716 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001717 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001718 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001719
Chris Wilson615fb932010-08-04 13:50:24 +01001720 intel_sdvo_connector->left_margin = temp_value;
1721 intel_sdvo_connector->right_margin = temp_value;
1722 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001723 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001724 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001725 goto set_value;
1726 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001727 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001728 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001729 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001730 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001731
Chris Wilson615fb932010-08-04 13:50:24 +01001732 intel_sdvo_connector->left_margin = temp_value;
1733 intel_sdvo_connector->right_margin = temp_value;
1734 temp_value = intel_sdvo_connector->max_hscan -
1735 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001736 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001737 goto set_value;
1738 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001739 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001740 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001741 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001742 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001743
Chris Wilson615fb932010-08-04 13:50:24 +01001744 intel_sdvo_connector->top_margin = temp_value;
1745 intel_sdvo_connector->bottom_margin = temp_value;
1746 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001747 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001748 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001749 goto set_value;
1750 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001751 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001752 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001753 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001754 return 0;
1755
Chris Wilson615fb932010-08-04 13:50:24 +01001756 intel_sdvo_connector->top_margin = temp_value;
1757 intel_sdvo_connector->bottom_margin = temp_value;
1758 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001759 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001760 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001761 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001762 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001763 CHECK_PROPERTY(hpos, HPOS)
1764 CHECK_PROPERTY(vpos, VPOS)
1765 CHECK_PROPERTY(saturation, SATURATION)
1766 CHECK_PROPERTY(contrast, CONTRAST)
1767 CHECK_PROPERTY(hue, HUE)
1768 CHECK_PROPERTY(brightness, BRIGHTNESS)
1769 CHECK_PROPERTY(sharpness, SHARPNESS)
1770 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1771 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1772 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1773 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1774 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001775 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001776 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001777
1778 return -EINVAL; /* unknown property */
1779
1780set_value:
1781 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1782 return -EIO;
1783
1784
1785done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001786 if (intel_sdvo->base.base.crtc) {
1787 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001788 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001789 crtc->y, crtc->fb);
1790 }
1791
Chris Wilson32aad862010-08-04 13:50:25 +01001792 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001793#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001794}
1795
Jesse Barnes79e53942008-11-07 14:24:08 -08001796static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1797 .dpms = intel_sdvo_dpms,
1798 .mode_fixup = intel_sdvo_mode_fixup,
1799 .prepare = intel_encoder_prepare,
1800 .mode_set = intel_sdvo_mode_set,
1801 .commit = intel_encoder_commit,
1802};
1803
1804static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001805 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001806 .detect = intel_sdvo_detect,
1807 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001808 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001809 .destroy = intel_sdvo_destroy,
1810};
1811
1812static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1813 .get_modes = intel_sdvo_get_modes,
1814 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001815 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001816};
1817
Hannes Ederb358d0a2008-12-18 21:18:47 +01001818static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001819{
Chris Wilson890f3352010-09-14 16:46:59 +01001820 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001821
Chris Wilsonea5b2132010-08-04 13:50:23 +01001822 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001823 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001824 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001825
Chris Wilsone957d772010-09-24 12:52:03 +01001826 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001827 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001828}
1829
1830static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1831 .destroy = intel_sdvo_enc_destroy,
1832};
1833
Chris Wilsonb66d8422010-08-12 15:26:41 +01001834static void
1835intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1836{
1837 uint16_t mask = 0;
1838 unsigned int num_bits;
1839
1840 /* Make a mask of outputs less than or equal to our own priority in the
1841 * list.
1842 */
1843 switch (sdvo->controlled_output) {
1844 case SDVO_OUTPUT_LVDS1:
1845 mask |= SDVO_OUTPUT_LVDS1;
1846 case SDVO_OUTPUT_LVDS0:
1847 mask |= SDVO_OUTPUT_LVDS0;
1848 case SDVO_OUTPUT_TMDS1:
1849 mask |= SDVO_OUTPUT_TMDS1;
1850 case SDVO_OUTPUT_TMDS0:
1851 mask |= SDVO_OUTPUT_TMDS0;
1852 case SDVO_OUTPUT_RGB1:
1853 mask |= SDVO_OUTPUT_RGB1;
1854 case SDVO_OUTPUT_RGB0:
1855 mask |= SDVO_OUTPUT_RGB0;
1856 break;
1857 }
1858
1859 /* Count bits to find what number we are in the priority list. */
1860 mask &= sdvo->caps.output_flags;
1861 num_bits = hweight16(mask);
1862 /* If more than 3 outputs, default to DDC bus 3 for now. */
1863 if (num_bits > 3)
1864 num_bits = 3;
1865
1866 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1867 sdvo->ddc_bus = 1 << num_bits;
1868}
Jesse Barnes79e53942008-11-07 14:24:08 -08001869
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001870/**
1871 * Choose the appropriate DDC bus for control bus switch command for this
1872 * SDVO output based on the controlled output.
1873 *
1874 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1875 * outputs, then LVDS outputs.
1876 */
1877static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001878intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001879 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001880{
Adam Jacksonb1083332010-04-23 16:07:40 -04001881 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001882
Adam Jacksonb1083332010-04-23 16:07:40 -04001883 if (IS_SDVOB(reg))
1884 mapping = &(dev_priv->sdvo_mappings[0]);
1885 else
1886 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001887
Chris Wilsonb66d8422010-08-12 15:26:41 +01001888 if (mapping->initialized)
1889 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1890 else
1891 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001892}
1893
Chris Wilsone957d772010-09-24 12:52:03 +01001894static void
1895intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1896 struct intel_sdvo *sdvo, u32 reg)
1897{
1898 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001899 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001900
1901 if (IS_SDVOB(reg))
1902 mapping = &dev_priv->sdvo_mappings[0];
1903 else
1904 mapping = &dev_priv->sdvo_mappings[1];
1905
1906 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001907 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001908 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001909
Chris Wilson63abf3e2010-12-08 16:48:21 +00001910 if (pin < GMBUS_NUM_PORTS) {
1911 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
Adam Jacksond5090b92011-06-16 16:36:28 -04001912 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001913 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001914 } else {
Chris Wilson63abf3e2010-12-08 16:48:21 +00001915 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Adam Jackson46eb3032011-06-16 16:36:23 -04001916 }
Chris Wilsone957d772010-09-24 12:52:03 +01001917}
1918
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001919static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001920intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001921{
Chris Wilson97aaf912011-01-04 20:10:52 +00001922 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001923}
1924
yakui_zhao714605e2009-05-31 17:18:07 +08001925static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001926intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001927{
1928 struct drm_i915_private *dev_priv = dev->dev_private;
1929 struct sdvo_device_mapping *my_mapping, *other_mapping;
1930
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001931 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001932 my_mapping = &dev_priv->sdvo_mappings[0];
1933 other_mapping = &dev_priv->sdvo_mappings[1];
1934 } else {
1935 my_mapping = &dev_priv->sdvo_mappings[1];
1936 other_mapping = &dev_priv->sdvo_mappings[0];
1937 }
1938
1939 /* If the BIOS described our SDVO device, take advantage of it. */
1940 if (my_mapping->slave_addr)
1941 return my_mapping->slave_addr;
1942
1943 /* If the BIOS only described a different SDVO device, use the
1944 * address that it isn't using.
1945 */
1946 if (other_mapping->slave_addr) {
1947 if (other_mapping->slave_addr == 0x70)
1948 return 0x72;
1949 else
1950 return 0x70;
1951 }
1952
1953 /* No SDVO device info is found for another DVO port,
1954 * so use mapping assumption we had before BIOS parsing.
1955 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001956 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08001957 return 0x70;
1958 else
1959 return 0x72;
1960}
1961
Zhenyu Wang14571b42010-03-30 14:06:33 +08001962static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001963intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1964 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001965{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001966 drm_connector_init(encoder->base.base.dev,
1967 &connector->base.base,
1968 &intel_sdvo_connector_funcs,
1969 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001970
Chris Wilsondf0e9242010-09-09 16:20:55 +01001971 drm_connector_helper_add(&connector->base.base,
1972 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001973
Chris Wilsondf0e9242010-09-09 16:20:55 +01001974 connector->base.base.interlace_allowed = 0;
1975 connector->base.base.doublescan_allowed = 0;
1976 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001977
Chris Wilsondf0e9242010-09-09 16:20:55 +01001978 intel_connector_attach_encoder(&connector->base, &encoder->base);
1979 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001980}
1981
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001982static void
1983intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1984{
1985 struct drm_device *dev = connector->base.base.dev;
1986
Chris Wilson3f43c482011-05-12 22:17:24 +01001987 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00001988 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
1989 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001990}
1991
Zhenyu Wang14571b42010-03-30 14:06:33 +08001992static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001993intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001994{
Chris Wilson4ef69c72010-09-09 15:14:28 +01001995 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001996 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001997 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001998 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01001999 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002000
Chris Wilson615fb932010-08-04 13:50:24 +01002001 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2002 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002003 return false;
2004
Zhenyu Wang14571b42010-03-30 14:06:33 +08002005 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002006 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002007 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002008 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002009 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002010 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002011 }
2012
Chris Wilson615fb932010-08-04 13:50:24 +01002013 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002014 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002015 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2016 connector->polled = DRM_CONNECTOR_POLL_HPD;
2017 intel_sdvo->hotplug_active[0] |= 1 << device;
2018 /* Some SDVO devices have one-shot hotplug interrupts.
2019 * Ensure that they get re-enabled when an interrupt happens.
2020 */
2021 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2022 intel_sdvo_enable_hotplug(intel_encoder);
2023 }
2024 else
2025 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002026 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2027 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2028
Chris Wilsone27d8532010-10-22 09:15:22 +01002029 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002031 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002032 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002033 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2034 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002035
Chris Wilsondf0e9242010-09-09 16:20:55 +01002036 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002037 if (intel_sdvo->is_hdmi)
2038 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039
2040 return true;
2041}
2042
2043static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002044intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002046 struct drm_encoder *encoder = &intel_sdvo->base.base;
2047 struct drm_connector *connector;
2048 struct intel_connector *intel_connector;
2049 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050
Chris Wilson615fb932010-08-04 13:50:24 +01002051 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2052 if (!intel_sdvo_connector)
2053 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002054
Chris Wilson615fb932010-08-04 13:50:24 +01002055 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002056 connector = &intel_connector->base;
2057 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2058 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059
Chris Wilson4ef69c72010-09-09 15:14:28 +01002060 intel_sdvo->controlled_output |= type;
2061 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002062
Chris Wilson4ef69c72010-09-09 15:14:28 +01002063 intel_sdvo->is_tv = true;
2064 intel_sdvo->base.needs_tv_clock = true;
2065 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066
Chris Wilsondf0e9242010-09-09 16:20:55 +01002067 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002068
Chris Wilson4ef69c72010-09-09 15:14:28 +01002069 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002070 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002071
Chris Wilson4ef69c72010-09-09 15:14:28 +01002072 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002073 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002074
Chris Wilson4ef69c72010-09-09 15:14:28 +01002075 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002076
2077err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002078 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002079 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002080}
2081
2082static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002083intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002084{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002085 struct drm_encoder *encoder = &intel_sdvo->base.base;
2086 struct drm_connector *connector;
2087 struct intel_connector *intel_connector;
2088 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002089
Chris Wilson615fb932010-08-04 13:50:24 +01002090 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2091 if (!intel_sdvo_connector)
2092 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002093
Chris Wilson615fb932010-08-04 13:50:24 +01002094 intel_connector = &intel_sdvo_connector->base;
2095 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002096 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2097 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2098 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002099
Chris Wilson4ef69c72010-09-09 15:14:28 +01002100 if (device == 0) {
2101 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2102 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2103 } else if (device == 1) {
2104 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2105 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2106 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002107
Chris Wilson4ef69c72010-09-09 15:14:28 +01002108 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2109 (1 << INTEL_ANALOG_CLONE_BIT));
2110
Chris Wilsondf0e9242010-09-09 16:20:55 +01002111 intel_sdvo_connector_init(intel_sdvo_connector,
2112 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002113 return true;
2114}
2115
2116static bool
2117intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2118{
2119 struct drm_encoder *encoder = &intel_sdvo->base.base;
2120 struct drm_connector *connector;
2121 struct intel_connector *intel_connector;
2122 struct intel_sdvo_connector *intel_sdvo_connector;
2123
2124 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2125 if (!intel_sdvo_connector)
2126 return false;
2127
2128 intel_connector = &intel_sdvo_connector->base;
2129 connector = &intel_connector->base;
2130 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2131 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2132
2133 if (device == 0) {
2134 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2135 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2136 } else if (device == 1) {
2137 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2138 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2139 }
2140
2141 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002142 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002143
Chris Wilsondf0e9242010-09-09 16:20:55 +01002144 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002145 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002146 goto err;
2147
2148 return true;
2149
2150err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002151 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002152 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002153}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002154
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002155static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002156intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002157{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002158 intel_sdvo->is_tv = false;
2159 intel_sdvo->base.needs_tv_clock = false;
2160 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002161
Zhenyu Wang14571b42010-03-30 14:06:33 +08002162 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002163
Zhenyu Wang14571b42010-03-30 14:06:33 +08002164 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002165 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002166 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002167
Zhenyu Wang14571b42010-03-30 14:06:33 +08002168 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002169 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002170 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002171
Zhenyu Wang14571b42010-03-30 14:06:33 +08002172 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002173 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002174 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002175 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002176
Zhenyu Wang14571b42010-03-30 14:06:33 +08002177 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002178 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002179 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002180
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002182 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002183 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002184
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002186 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002187 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002188
Zhenyu Wang14571b42010-03-30 14:06:33 +08002189 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002190 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002191 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002192
Zhenyu Wang14571b42010-03-30 14:06:33 +08002193 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002194 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002196
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002198 unsigned char bytes[2];
2199
Chris Wilsonea5b2132010-08-04 13:50:23 +01002200 intel_sdvo->controlled_output = 0;
2201 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002202 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002203 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002204 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002206 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002207 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002208
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210}
2211
Chris Wilson32aad862010-08-04 13:50:25 +01002212static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2213 struct intel_sdvo_connector *intel_sdvo_connector,
2214 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002215{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002216 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002217 struct intel_sdvo_tv_format format;
2218 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002219
Chris Wilson32aad862010-08-04 13:50:25 +01002220 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2221 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002222
Chris Wilson1a3665c2011-01-25 13:59:37 +00002223 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002224 if (!intel_sdvo_get_value(intel_sdvo,
2225 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2226 &format, sizeof(format)))
2227 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002228
Chris Wilson32aad862010-08-04 13:50:25 +01002229 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002230
2231 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002232 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002233
Chris Wilson615fb932010-08-04 13:50:24 +01002234 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002235 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002236 if (format_map & (1 << i))
2237 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002238
2239
Chris Wilsonc5521702010-08-04 13:50:28 +01002240 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002241 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2242 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002243 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002244 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002245
Chris Wilson615fb932010-08-04 13:50:24 +01002246 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002247 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002248 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002249 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002250
Chris Wilson40039752010-08-04 13:50:26 +01002251 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002252 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002253 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002254 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002255
2256}
2257
Chris Wilsonc5521702010-08-04 13:50:28 +01002258#define ENHANCEMENT(name, NAME) do { \
2259 if (enhancements.name) { \
2260 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2261 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2262 return false; \
2263 intel_sdvo_connector->max_##name = data_value[0]; \
2264 intel_sdvo_connector->cur_##name = response; \
2265 intel_sdvo_connector->name = \
2266 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2267 if (!intel_sdvo_connector->name) return false; \
2268 intel_sdvo_connector->name->values[0] = 0; \
2269 intel_sdvo_connector->name->values[1] = data_value[0]; \
2270 drm_connector_attach_property(connector, \
2271 intel_sdvo_connector->name, \
2272 intel_sdvo_connector->cur_##name); \
2273 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2274 data_value[0], data_value[1], response); \
2275 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002276} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002277
2278static bool
2279intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2280 struct intel_sdvo_connector *intel_sdvo_connector,
2281 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002282{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002283 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002284 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002285 uint16_t response, data_value[2];
2286
Chris Wilsonc5521702010-08-04 13:50:28 +01002287 /* when horizontal overscan is supported, Add the left/right property */
2288 if (enhancements.overscan_h) {
2289 if (!intel_sdvo_get_value(intel_sdvo,
2290 SDVO_CMD_GET_MAX_OVERSCAN_H,
2291 &data_value, 4))
2292 return false;
2293
2294 if (!intel_sdvo_get_value(intel_sdvo,
2295 SDVO_CMD_GET_OVERSCAN_H,
2296 &response, 2))
2297 return false;
2298
2299 intel_sdvo_connector->max_hscan = data_value[0];
2300 intel_sdvo_connector->left_margin = data_value[0] - response;
2301 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2302 intel_sdvo_connector->left =
2303 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2304 "left_margin", 2);
2305 if (!intel_sdvo_connector->left)
2306 return false;
2307
2308 intel_sdvo_connector->left->values[0] = 0;
2309 intel_sdvo_connector->left->values[1] = data_value[0];
2310 drm_connector_attach_property(connector,
2311 intel_sdvo_connector->left,
2312 intel_sdvo_connector->left_margin);
2313
2314 intel_sdvo_connector->right =
2315 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2316 "right_margin", 2);
2317 if (!intel_sdvo_connector->right)
2318 return false;
2319
2320 intel_sdvo_connector->right->values[0] = 0;
2321 intel_sdvo_connector->right->values[1] = data_value[0];
2322 drm_connector_attach_property(connector,
2323 intel_sdvo_connector->right,
2324 intel_sdvo_connector->right_margin);
2325 DRM_DEBUG_KMS("h_overscan: max %d, "
2326 "default %d, current %d\n",
2327 data_value[0], data_value[1], response);
2328 }
2329
2330 if (enhancements.overscan_v) {
2331 if (!intel_sdvo_get_value(intel_sdvo,
2332 SDVO_CMD_GET_MAX_OVERSCAN_V,
2333 &data_value, 4))
2334 return false;
2335
2336 if (!intel_sdvo_get_value(intel_sdvo,
2337 SDVO_CMD_GET_OVERSCAN_V,
2338 &response, 2))
2339 return false;
2340
2341 intel_sdvo_connector->max_vscan = data_value[0];
2342 intel_sdvo_connector->top_margin = data_value[0] - response;
2343 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2344 intel_sdvo_connector->top =
2345 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2346 "top_margin", 2);
2347 if (!intel_sdvo_connector->top)
2348 return false;
2349
2350 intel_sdvo_connector->top->values[0] = 0;
2351 intel_sdvo_connector->top->values[1] = data_value[0];
2352 drm_connector_attach_property(connector,
2353 intel_sdvo_connector->top,
2354 intel_sdvo_connector->top_margin);
2355
2356 intel_sdvo_connector->bottom =
2357 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2358 "bottom_margin", 2);
2359 if (!intel_sdvo_connector->bottom)
2360 return false;
2361
2362 intel_sdvo_connector->bottom->values[0] = 0;
2363 intel_sdvo_connector->bottom->values[1] = data_value[0];
2364 drm_connector_attach_property(connector,
2365 intel_sdvo_connector->bottom,
2366 intel_sdvo_connector->bottom_margin);
2367 DRM_DEBUG_KMS("v_overscan: max %d, "
2368 "default %d, current %d\n",
2369 data_value[0], data_value[1], response);
2370 }
2371
2372 ENHANCEMENT(hpos, HPOS);
2373 ENHANCEMENT(vpos, VPOS);
2374 ENHANCEMENT(saturation, SATURATION);
2375 ENHANCEMENT(contrast, CONTRAST);
2376 ENHANCEMENT(hue, HUE);
2377 ENHANCEMENT(sharpness, SHARPNESS);
2378 ENHANCEMENT(brightness, BRIGHTNESS);
2379 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2380 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2381 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2382 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2383 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2384
Chris Wilsone0442182010-08-04 13:50:29 +01002385 if (enhancements.dot_crawl) {
2386 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2387 return false;
2388
2389 intel_sdvo_connector->max_dot_crawl = 1;
2390 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2391 intel_sdvo_connector->dot_crawl =
2392 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2393 if (!intel_sdvo_connector->dot_crawl)
2394 return false;
2395
2396 intel_sdvo_connector->dot_crawl->values[0] = 0;
2397 intel_sdvo_connector->dot_crawl->values[1] = 1;
2398 drm_connector_attach_property(connector,
2399 intel_sdvo_connector->dot_crawl,
2400 intel_sdvo_connector->cur_dot_crawl);
2401 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2402 }
2403
Chris Wilsonc5521702010-08-04 13:50:28 +01002404 return true;
2405}
2406
2407static bool
2408intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2409 struct intel_sdvo_connector *intel_sdvo_connector,
2410 struct intel_sdvo_enhancements_reply enhancements)
2411{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002412 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002413 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2414 uint16_t response, data_value[2];
2415
2416 ENHANCEMENT(brightness, BRIGHTNESS);
2417
2418 return true;
2419}
2420#undef ENHANCEMENT
2421
2422static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2423 struct intel_sdvo_connector *intel_sdvo_connector)
2424{
2425 union {
2426 struct intel_sdvo_enhancements_reply reply;
2427 uint16_t response;
2428 } enhancements;
2429
Chris Wilson1a3665c2011-01-25 13:59:37 +00002430 BUILD_BUG_ON(sizeof(enhancements) != 2);
2431
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002432 enhancements.response = 0;
2433 intel_sdvo_get_value(intel_sdvo,
2434 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2435 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002436 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002437 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002438 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002439 }
Chris Wilson32aad862010-08-04 13:50:25 +01002440
Chris Wilsonc5521702010-08-04 13:50:28 +01002441 if (IS_TV(intel_sdvo_connector))
2442 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002443 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002444 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2445 else
2446 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002447}
Chris Wilson32aad862010-08-04 13:50:25 +01002448
Chris Wilsone957d772010-09-24 12:52:03 +01002449static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2450 struct i2c_msg *msgs,
2451 int num)
2452{
2453 struct intel_sdvo *sdvo = adapter->algo_data;
2454
2455 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2456 return -EIO;
2457
2458 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2459}
2460
2461static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2462{
2463 struct intel_sdvo *sdvo = adapter->algo_data;
2464 return sdvo->i2c->algo->functionality(sdvo->i2c);
2465}
2466
2467static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2468 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2469 .functionality = intel_sdvo_ddc_proxy_func
2470};
2471
2472static bool
2473intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2474 struct drm_device *dev)
2475{
2476 sdvo->ddc.owner = THIS_MODULE;
2477 sdvo->ddc.class = I2C_CLASS_DDC;
2478 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2479 sdvo->ddc.dev.parent = &dev->pdev->dev;
2480 sdvo->ddc.algo_data = sdvo;
2481 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2482
2483 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002484}
2485
Eric Anholtc751ce42010-03-25 11:48:48 -07002486bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002487{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002488 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002489 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002490 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002491 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002492
Chris Wilsonea5b2132010-08-04 13:50:23 +01002493 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2494 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002495 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002496
Chris Wilson56184e32011-05-17 14:03:50 +01002497 intel_sdvo->sdvo_reg = sdvo_reg;
2498 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2499 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002500 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2501 kfree(intel_sdvo);
2502 return false;
2503 }
2504
Chris Wilson56184e32011-05-17 14:03:50 +01002505 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002506 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002507 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002508 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002509
Jesse Barnes79e53942008-11-07 14:24:08 -08002510 /* Read the regs to test if we can talk to the device */
2511 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002512 u8 byte;
2513
2514 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002515 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002516 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002517 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002518 }
2519 }
2520
Chris Wilsonf899fc62010-07-20 15:44:45 -07002521 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002522 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002523 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002524 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002525
Chris Wilson4ef69c72010-09-09 15:14:28 +01002526 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002527
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002528 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002529 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002530 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002531
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002532 /* Set up hotplug command - note paranoia about contents of reply.
2533 * We assume that the hardware is in a sane state, and only touch
2534 * the bits we think we understand.
2535 */
2536 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2537 &intel_sdvo->hotplug_active, 2);
2538 intel_sdvo->hotplug_active[0] &= ~0x3;
2539
Chris Wilsonea5b2132010-08-04 13:50:23 +01002540 if (intel_sdvo_output_setup(intel_sdvo,
2541 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002542 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002543 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002544 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002545 }
2546
Chris Wilsonea5b2132010-08-04 13:50:23 +01002547 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002548
Jesse Barnes79e53942008-11-07 14:24:08 -08002549 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002550 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002551 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002552
Chris Wilson32aad862010-08-04 13:50:25 +01002553 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2554 &intel_sdvo->pixel_clock_min,
2555 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002556 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002557
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002558 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002559 "clock range %dMHz - %dMHz, "
2560 "input 1: %c, input 2: %c, "
2561 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002562 SDVO_NAME(intel_sdvo),
2563 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2564 intel_sdvo->caps.device_rev_id,
2565 intel_sdvo->pixel_clock_min / 1000,
2566 intel_sdvo->pixel_clock_max / 1000,
2567 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2568 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002569 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002570 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002571 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002572 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002573 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002574 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002575
Chris Wilsonf899fc62010-07-20 15:44:45 -07002576err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002577 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002578 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002579 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002580
Eric Anholt7d573822009-01-02 13:33:00 -08002581 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002582}