blob: e308d674c669ff251f372e340482a9eeac0ad4b0 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070076 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
99 uint8_t hotplug_active[2];
100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
Zhao Yakuice6feab2009-08-24 13:50:26 +0800116 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100117 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800118
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800119 /**
120 * This is set if we treat the device as HDMI, instead of DVI.
121 */
122 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000123 bool has_hdmi_monitor;
124 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800125
Ma Ling7086c872009-05-13 11:20:06 +0800126 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100127 * This is set if we detect output of sdvo device as LVDS and
128 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800129 */
130 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800131
132 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800133 * This is sdvo fixed pannel mode pointer
134 */
135 struct drm_display_mode *sdvo_lvds_fixed_mode;
136
Eric Anholtc751ce42010-03-25 11:48:48 -0700137 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800138 uint8_t ddc_bus;
139
Chris Wilson6c9547f2010-08-25 10:05:17 +0100140 /* Input timings for adjusted_mode */
141 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800142};
143
144struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100145 struct intel_connector base;
146
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147 /* Mark the type of connector */
148 uint16_t output_flag;
149
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100150 int force_audio;
151
Zhenyu Wang14571b42010-03-30 14:06:33 +0800152 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100153 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800154 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100155 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156
Zhao Yakuib9219c52009-09-10 15:45:46 +0800157 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100158 struct drm_property *left;
159 struct drm_property *right;
160 struct drm_property *top;
161 struct drm_property *bottom;
162 struct drm_property *hpos;
163 struct drm_property *vpos;
164 struct drm_property *contrast;
165 struct drm_property *saturation;
166 struct drm_property *hue;
167 struct drm_property *sharpness;
168 struct drm_property *flicker_filter;
169 struct drm_property *flicker_filter_adaptive;
170 struct drm_property *flicker_filter_2d;
171 struct drm_property *tv_chroma_filter;
172 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100173 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800174
175 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100176 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800177
178 /* Add variable to record current setting for the above property */
179 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100180
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181 /* this is to get the range of margin.*/
182 u32 max_hscan, max_vscan;
183 u32 max_hpos, cur_hpos;
184 u32 max_vpos, cur_vpos;
185 u32 cur_brightness, max_brightness;
186 u32 cur_contrast, max_contrast;
187 u32 cur_saturation, max_saturation;
188 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100189 u32 cur_sharpness, max_sharpness;
190 u32 cur_flicker_filter, max_flicker_filter;
191 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
192 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
193 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
194 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100195 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800196};
197
Chris Wilson890f3352010-09-14 16:46:59 +0100198static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100199{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100200 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100201}
202
Chris Wilsondf0e9242010-09-09 16:20:55 +0100203static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
204{
205 return container_of(intel_attached_encoder(connector),
206 struct intel_sdvo, base);
207}
208
Chris Wilson615fb932010-08-04 13:50:24 +0100209static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
210{
211 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
212}
213
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800214static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100215intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100216static bool
217intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector,
219 int type);
220static bool
221intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800223
Jesse Barnes79e53942008-11-07 14:24:08 -0800224/**
225 * Writes the SDVOB or SDVOC with the given value, but always writes both
226 * SDVOB and SDVOC to work around apparent hardware issues (according to
227 * comments in the BIOS).
228 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100229static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800230{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100231 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800232 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 u32 bval = val, cval = val;
234 int i;
235
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800239 return;
240 }
241
Chris Wilsonea5b2132010-08-04 13:50:23 +0100242 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800243 cval = I915_READ(SDVOC);
244 } else {
245 bval = I915_READ(SDVOB);
246 }
247 /*
248 * Write the registers twice for luck. Sometimes,
249 * writing them only once doesn't appear to 'stick'.
250 * The BIOS does this too. Yay, magic
251 */
252 for (i = 0; i < 2; i++)
253 {
254 I915_WRITE(SDVOB, bval);
255 I915_READ(SDVOB);
256 I915_WRITE(SDVOC, cval);
257 I915_READ(SDVOC);
258 }
259}
260
Chris Wilson32aad862010-08-04 13:50:25 +0100261static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800262{
Jesse Barnes79e53942008-11-07 14:24:08 -0800263 struct i2c_msg msgs[] = {
264 {
Chris Wilsone957d772010-09-24 12:52:03 +0100265 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800266 .flags = 0,
267 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100268 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 },
270 {
Chris Wilsone957d772010-09-24 12:52:03 +0100271 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800272 .flags = I2C_M_RD,
273 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100274 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800275 }
276 };
Chris Wilson32aad862010-08-04 13:50:25 +0100277 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800278
Chris Wilsonf899fc62010-07-20 15:44:45 -0700279 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800280 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800282 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800283 return false;
284}
285
Jesse Barnes79e53942008-11-07 14:24:08 -0800286#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
287/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100288static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800289 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100290 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800291} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100335
Akshay Joshi0206e352011-08-16 15:34:10 -0400336 /* Add the op code for SDVO enhancements */
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100381
Akshay Joshi0206e352011-08-16 15:34:10 -0400382 /* HDMI op code */
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800403};
404
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800405#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100406#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800407
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100409 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800410{
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 int i;
412
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800413 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100414 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800417 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800418 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800422 break;
423 }
424 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400425 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800428}
Jesse Barnes79e53942008-11-07 14:24:08 -0800429
Jesse Barnes79e53942008-11-07 14:24:08 -0800430static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438};
439
Chris Wilsone957d772010-09-24 12:52:03 +0100440static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442{
443 u8 buf[args_len*2 + 2], status;
444 struct i2c_msg msgs[args_len + 3];
445 int i, ret;
446
447 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
448
449 for (i = 0; i < args_len; i++) {
450 msgs[i].addr = intel_sdvo->slave_addr;
451 msgs[i].flags = 0;
452 msgs[i].len = 2;
453 msgs[i].buf = buf + 2 *i;
454 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
455 buf[2*i + 1] = ((u8*)args)[i];
456 }
457 msgs[i].addr = intel_sdvo->slave_addr;
458 msgs[i].flags = 0;
459 msgs[i].len = 2;
460 msgs[i].buf = buf + 2*i;
461 buf[2*i + 0] = SDVO_I2C_OPCODE;
462 buf[2*i + 1] = cmd;
463
464 /* the following two are to read the response */
465 status = SDVO_I2C_CMD_STATUS;
466 msgs[i+1].addr = intel_sdvo->slave_addr;
467 msgs[i+1].flags = 0;
468 msgs[i+1].len = 1;
469 msgs[i+1].buf = &status;
470
471 msgs[i+2].addr = intel_sdvo->slave_addr;
472 msgs[i+2].flags = I2C_M_RD;
473 msgs[i+2].len = 1;
474 msgs[i+2].buf = &status;
475
476 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
477 if (ret < 0) {
478 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
479 return false;
480 }
481 if (ret != i+3) {
482 /* failure in I2C transfer */
483 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
484 return false;
485 }
486
Chris Wilsone957d772010-09-24 12:52:03 +0100487 return true;
488}
489
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100490static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
491 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800492{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100493 u8 retry = 5;
494 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800495 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800496
Chris Wilsond121a5d2011-01-25 15:00:01 +0000497 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
498
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100499 /*
500 * The documentation states that all commands will be
501 * processed within 15µs, and that we need only poll
502 * the status byte a maximum of 3 times in order for the
503 * command to be complete.
504 *
505 * Check 5 times in case the hardware failed to read the docs.
506 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000507 if (!intel_sdvo_read_byte(intel_sdvo,
508 SDVO_I2C_CMD_STATUS,
509 &status))
510 goto log_fail;
511
512 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
513 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 if (!intel_sdvo_read_byte(intel_sdvo,
515 SDVO_I2C_CMD_STATUS,
516 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000517 goto log_fail;
518 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100519
Jesse Barnes79e53942008-11-07 14:24:08 -0800520 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800521 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800522 else
yakui_zhao342dc382009-06-02 14:12:00 +0800523 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800524
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100525 if (status != SDVO_CMD_STATUS_SUCCESS)
526 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800527
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100528 /* Read the command response */
529 for (i = 0; i < response_len; i++) {
530 if (!intel_sdvo_read_byte(intel_sdvo,
531 SDVO_I2C_RETURN_0 + i,
532 &((u8 *)response)[i]))
533 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100534 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100536 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100537 return true;
538
539log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000540 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100541 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542}
543
Hannes Ederb358d0a2008-12-18 21:18:47 +0100544static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800545{
546 if (mode->clock >= 100000)
547 return 1;
548 else if (mode->clock >= 50000)
549 return 2;
550 else
551 return 4;
552}
553
Chris Wilsone957d772010-09-24 12:52:03 +0100554static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
555 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800556{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000557 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100558 return intel_sdvo_write_cmd(intel_sdvo,
559 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
560 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800561}
562
Chris Wilson32aad862010-08-04 13:50:25 +0100563static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
564{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000565 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
566 return false;
567
568 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100569}
570
571static bool
572intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
573{
574 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
575 return false;
576
577 return intel_sdvo_read_response(intel_sdvo, value, len);
578}
579
580static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800581{
582 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100583 return intel_sdvo_set_value(intel_sdvo,
584 SDVO_CMD_SET_TARGET_INPUT,
585 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800586}
587
588/**
589 * Return whether each input is trained.
590 *
591 * This function is making an assumption about the layout of the response,
592 * which should be checked against the docs.
593 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100594static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800595{
596 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800597
Chris Wilson1a3665c2011-01-25 13:59:37 +0000598 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100599 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
600 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800601 return false;
602
603 *input_1 = response.input0_trained;
604 *input_2 = response.input1_trained;
605 return true;
606}
607
Chris Wilsonea5b2132010-08-04 13:50:23 +0100608static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800609 u16 outputs)
610{
Chris Wilson32aad862010-08-04 13:50:25 +0100611 return intel_sdvo_set_value(intel_sdvo,
612 SDVO_CMD_SET_ACTIVE_OUTPUTS,
613 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800614}
615
Chris Wilsonea5b2132010-08-04 13:50:23 +0100616static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800617 int mode)
618{
Chris Wilson32aad862010-08-04 13:50:25 +0100619 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800620
621 switch (mode) {
622 case DRM_MODE_DPMS_ON:
623 state = SDVO_ENCODER_STATE_ON;
624 break;
625 case DRM_MODE_DPMS_STANDBY:
626 state = SDVO_ENCODER_STATE_STANDBY;
627 break;
628 case DRM_MODE_DPMS_SUSPEND:
629 state = SDVO_ENCODER_STATE_SUSPEND;
630 break;
631 case DRM_MODE_DPMS_OFF:
632 state = SDVO_ENCODER_STATE_OFF;
633 break;
634 }
635
Chris Wilson32aad862010-08-04 13:50:25 +0100636 return intel_sdvo_set_value(intel_sdvo,
637 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800638}
639
Chris Wilsonea5b2132010-08-04 13:50:23 +0100640static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800641 int *clock_min,
642 int *clock_max)
643{
644 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800645
Chris Wilson1a3665c2011-01-25 13:59:37 +0000646 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100647 if (!intel_sdvo_get_value(intel_sdvo,
648 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
649 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800650 return false;
651
652 /* Convert the values from units of 10 kHz to kHz. */
653 *clock_min = clocks.min * 10;
654 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800655 return true;
656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 u16 outputs)
660{
Chris Wilson32aad862010-08-04 13:50:25 +0100661 return intel_sdvo_set_value(intel_sdvo,
662 SDVO_CMD_SET_TARGET_OUTPUT,
663 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800664}
665
Chris Wilsonea5b2132010-08-04 13:50:23 +0100666static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800667 struct intel_sdvo_dtd *dtd)
668{
Chris Wilson32aad862010-08-04 13:50:25 +0100669 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
670 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 struct intel_sdvo_dtd *dtd)
675{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100676 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
678}
679
Chris Wilsonea5b2132010-08-04 13:50:23 +0100680static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800681 struct intel_sdvo_dtd *dtd)
682{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100683 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800684 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
685}
686
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800687static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800689 uint16_t clock,
690 uint16_t width,
691 uint16_t height)
692{
693 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800694
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800695 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800696 args.clock = clock;
697 args.width = width;
698 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800699 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800700
Chris Wilsonea5b2132010-08-04 13:50:23 +0100701 if (intel_sdvo->is_lvds &&
702 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
703 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800704 args.scaled = 1;
705
Chris Wilson32aad862010-08-04 13:50:25 +0100706 return intel_sdvo_set_value(intel_sdvo,
707 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
708 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709}
710
Chris Wilsonea5b2132010-08-04 13:50:23 +0100711static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800712 struct intel_sdvo_dtd *dtd)
713{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000714 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
715 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100716 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
717 &dtd->part1, sizeof(dtd->part1)) &&
718 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
719 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800720}
Jesse Barnes79e53942008-11-07 14:24:08 -0800721
Chris Wilsonea5b2132010-08-04 13:50:23 +0100722static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800723{
Chris Wilson32aad862010-08-04 13:50:25 +0100724 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800725}
726
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100728 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800729{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800730 uint16_t width, height;
731 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
732 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800733
734 width = mode->crtc_hdisplay;
735 height = mode->crtc_vdisplay;
736
737 /* do some mode translations */
738 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
739 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
740
741 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
742 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
743
744 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
745 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
746
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800747 dtd->part1.clock = mode->clock / 10;
748 dtd->part1.h_active = width & 0xff;
749 dtd->part1.h_blank = h_blank_len & 0xff;
750 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800751 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 dtd->part1.v_active = height & 0xff;
753 dtd->part1.v_blank = v_blank_len & 0xff;
754 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800755 ((v_blank_len >> 8) & 0xf);
756
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800757 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800758 dtd->part2.h_sync_width = h_sync_len & 0xff;
759 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800760 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800762 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
763 ((v_sync_len & 0x30) >> 4);
764
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800766 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800768 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800770
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771 dtd->part2.sdvo_flags = 0;
772 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
773 dtd->part2.reserved = 0;
774}
Jesse Barnes79e53942008-11-07 14:24:08 -0800775
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100777 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779 mode->hdisplay = dtd->part1.h_active;
780 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
781 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800782 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800783 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
784 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
785 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
786 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
787
788 mode->vdisplay = dtd->part1.v_active;
789 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
790 mode->vsync_start = mode->vdisplay;
791 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800792 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
794 mode->vsync_end = mode->vsync_start +
795 (dtd->part2.v_sync_off_width & 0xf);
796 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
797 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
798 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
799
800 mode->clock = dtd->part1.clock * 10;
801
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800802 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803 if (dtd->part2.dtd_flags & 0x2)
804 mode->flags |= DRM_MODE_FLAG_PHSYNC;
805 if (dtd->part2.dtd_flags & 0x4)
806 mode->flags |= DRM_MODE_FLAG_PVSYNC;
807}
808
Chris Wilsone27d8532010-10-22 09:15:22 +0100809static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810{
Chris Wilsone27d8532010-10-22 09:15:22 +0100811 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812
Chris Wilson1a3665c2011-01-25 13:59:37 +0000813 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100814 return intel_sdvo_get_value(intel_sdvo,
815 SDVO_CMD_GET_SUPP_ENCODE,
816 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800817}
818
Chris Wilsonea5b2132010-08-04 13:50:23 +0100819static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700820 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800821{
Chris Wilson32aad862010-08-04 13:50:25 +0100822 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800823}
824
Chris Wilsonea5b2132010-08-04 13:50:23 +0100825static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826 uint8_t mode)
827{
Chris Wilson32aad862010-08-04 13:50:25 +0100828 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829}
830
831#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100832static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800833{
834 int i, j;
835 uint8_t set_buf_index[2];
836 uint8_t av_split;
837 uint8_t buf_size;
838 uint8_t buf[48];
839 uint8_t *pos;
840
Chris Wilson32aad862010-08-04 13:50:25 +0100841 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842
843 for (i = 0; i <= av_split; i++) {
844 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700845 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700847 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
848 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849
850 pos = buf;
851 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700852 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700854 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800855 pos += 8;
856 }
857 }
858}
859#endif
860
David Härdeman3c17fe42010-09-24 21:44:32 +0200861static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862{
863 struct dip_infoframe avi_if = {
864 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200865 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866 .len = DIP_LEN_AVI,
867 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200868 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
869 uint8_t set_buf_index[2] = { 1, 0 };
870 uint64_t *data = (uint64_t *)&avi_if;
871 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800872
David Härdeman3c17fe42010-09-24 21:44:32 +0200873 intel_dip_infoframe_csum(&avi_if);
874
Chris Wilsond121a5d2011-01-25 15:00:01 +0000875 if (!intel_sdvo_set_value(intel_sdvo,
876 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200877 set_buf_index, 2))
878 return false;
879
880 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000881 if (!intel_sdvo_set_value(intel_sdvo,
882 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200883 data, 8))
884 return false;
885 data++;
886 }
887
Chris Wilsond121a5d2011-01-25 15:00:01 +0000888 return intel_sdvo_set_value(intel_sdvo,
889 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200890 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800891}
892
Chris Wilson32aad862010-08-04 13:50:25 +0100893static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800894{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800895 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100896 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800897
Chris Wilson40039752010-08-04 13:50:26 +0100898 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800899 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100900 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800901
Chris Wilson32aad862010-08-04 13:50:25 +0100902 BUILD_BUG_ON(sizeof(format) != 6);
903 return intel_sdvo_set_value(intel_sdvo,
904 SDVO_CMD_SET_TV_FORMAT,
905 &format, sizeof(format));
906}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800907
Chris Wilson32aad862010-08-04 13:50:25 +0100908static bool
909intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
910 struct drm_display_mode *mode)
911{
912 struct intel_sdvo_dtd output_dtd;
913
914 if (!intel_sdvo_set_target_output(intel_sdvo,
915 intel_sdvo->attached_output))
916 return false;
917
918 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
919 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
920 return false;
921
922 return true;
923}
924
925static bool
926intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
927 struct drm_display_mode *mode,
928 struct drm_display_mode *adjusted_mode)
929{
Chris Wilson32aad862010-08-04 13:50:25 +0100930 /* Reset the input timing to the screen. Assume always input 0. */
931 if (!intel_sdvo_set_target_input(intel_sdvo))
932 return false;
933
934 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
935 mode->clock / 10,
936 mode->hdisplay,
937 mode->vdisplay))
938 return false;
939
940 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100941 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100942 return false;
943
Chris Wilson6c9547f2010-08-25 10:05:17 +0100944 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100945
946 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100947 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800948}
949
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800950static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
951 struct drm_display_mode *mode,
952 struct drm_display_mode *adjusted_mode)
953{
Chris Wilson890f3352010-09-14 16:46:59 +0100954 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100955 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956
Chris Wilson32aad862010-08-04 13:50:25 +0100957 /* We need to construct preferred input timings based on our
958 * output timings. To do that, we have to set the output
959 * timings, even though this isn't really the right place in
960 * the sequence to do it. Oh well.
961 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100962 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100963 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800964 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100965
Pavel Roskinc74696b2010-09-02 14:46:34 -0400966 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
967 mode,
968 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100969 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100970 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100971 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800972 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800973
Pavel Roskinc74696b2010-09-02 14:46:34 -0400974 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
975 mode,
976 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800977 }
Chris Wilson32aad862010-08-04 13:50:25 +0100978
979 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100980 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100981 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100982 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
983 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100984
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800985 return true;
986}
987
988static void intel_sdvo_mode_set(struct drm_encoder *encoder,
989 struct drm_display_mode *mode,
990 struct drm_display_mode *adjusted_mode)
991{
992 struct drm_device *dev = encoder->dev;
993 struct drm_i915_private *dev_priv = dev->dev_private;
994 struct drm_crtc *crtc = encoder->crtc;
995 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100996 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100997 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998 struct intel_sdvo_in_out_map in_out;
999 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001000 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1001 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001002
1003 if (!mode)
1004 return;
1005
1006 /* First, set the input mapping for the first input to our controlled
1007 * output. This is only correct if we're a single-input device, in
1008 * which case the first input is the output from the appropriate SDVO
1009 * channel on the motherboard. In a two-input device, the first input
1010 * will be SDVOB and the second SDVOC.
1011 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001012 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001013 in_out.in1 = 0;
1014
Pavel Roskinc74696b2010-09-02 14:46:34 -04001015 intel_sdvo_set_value(intel_sdvo,
1016 SDVO_CMD_SET_IN_OUT_MAP,
1017 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001018
Chris Wilson6c9547f2010-08-25 10:05:17 +01001019 /* Set the output timings to the screen */
1020 if (!intel_sdvo_set_target_output(intel_sdvo,
1021 intel_sdvo->attached_output))
1022 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001023
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001024 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001025 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001026 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001027 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1028 input_dtd = intel_sdvo->input_dtd;
1029 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001030 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001031 if (!intel_sdvo_set_target_output(intel_sdvo,
1032 intel_sdvo->attached_output))
1033 return;
1034
Chris Wilson6c9547f2010-08-25 10:05:17 +01001035 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001036 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001037 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001038
1039 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001040 if (!intel_sdvo_set_target_input(intel_sdvo))
1041 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001042
Chris Wilson97aaf912011-01-04 20:10:52 +00001043 if (intel_sdvo->has_hdmi_monitor) {
1044 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1045 intel_sdvo_set_colorimetry(intel_sdvo,
1046 SDVO_COLORIMETRY_RGB256);
1047 intel_sdvo_set_avi_infoframe(intel_sdvo);
1048 } else
1049 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001050
Chris Wilson6c9547f2010-08-25 10:05:17 +01001051 if (intel_sdvo->is_tv &&
1052 !intel_sdvo_set_tv_format(intel_sdvo))
1053 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001054
Pavel Roskinc74696b2010-09-02 14:46:34 -04001055 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001056
Chris Wilson6c9547f2010-08-25 10:05:17 +01001057 switch (pixel_multiplier) {
1058 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001059 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1060 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1061 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001062 }
Chris Wilson32aad862010-08-04 13:50:25 +01001063 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1064 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001065
1066 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001067 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001068 sdvox = 0;
Chris Wilsone953fd72011-02-21 22:23:52 +00001069 if (intel_sdvo->is_hdmi)
1070 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001071 if (INTEL_INFO(dev)->gen < 5)
1072 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001073 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1074 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1075 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1076 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001077 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001078 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001079 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001080 case SDVOB:
1081 sdvox &= SDVOB_PRESERVE_MASK;
1082 break;
1083 case SDVOC:
1084 sdvox &= SDVOC_PRESERVE_MASK;
1085 break;
1086 }
1087 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1088 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001089
1090 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1091 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1092 else
1093 sdvox |= TRANSCODER(intel_crtc->pipe);
1094
Chris Wilsonda79de92010-11-22 11:12:46 +00001095 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001096 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001097
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001098 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001099 /* done in crtc_mode_set as the dpll_md reg must be written early */
1100 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1101 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001102 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001103 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001104 }
1105
Chris Wilson6714afb2010-12-17 04:10:51 +00001106 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1107 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001108 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001109 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001110}
1111
1112static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1113{
1114 struct drm_device *dev = encoder->dev;
1115 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001116 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001117 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001118 u32 temp;
1119
1120 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001121 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001122 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001123 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001124
1125 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001126 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001127 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001128 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001129 }
1130 }
1131 } else {
1132 bool input1, input2;
1133 int i;
1134 u8 status;
1135
Chris Wilsonea5b2132010-08-04 13:50:23 +01001136 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001137 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001138 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001139 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001140 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001141
Chris Wilson32aad862010-08-04 13:50:25 +01001142 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143 /* Warn if the device reported failure to sync.
1144 * A lot of SDVO devices fail to notify of sync, but it's
1145 * a given it the status is a success, we succeeded.
1146 */
1147 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001148 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001150 }
1151
1152 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001153 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1154 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001155 }
1156 return;
1157}
1158
Jesse Barnes79e53942008-11-07 14:24:08 -08001159static int intel_sdvo_mode_valid(struct drm_connector *connector,
1160 struct drm_display_mode *mode)
1161{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001162 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001163
1164 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1165 return MODE_NO_DBLESCAN;
1166
Chris Wilsonea5b2132010-08-04 13:50:23 +01001167 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001168 return MODE_CLOCK_LOW;
1169
Chris Wilsonea5b2132010-08-04 13:50:23 +01001170 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001171 return MODE_CLOCK_HIGH;
1172
Chris Wilson85454232010-08-08 14:28:23 +01001173 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001174 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001175 return MODE_PANEL;
1176
Chris Wilsonea5b2132010-08-04 13:50:23 +01001177 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001178 return MODE_PANEL;
1179 }
1180
Jesse Barnes79e53942008-11-07 14:24:08 -08001181 return MODE_OK;
1182}
1183
Chris Wilsonea5b2132010-08-04 13:50:23 +01001184static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001185{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001186 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001187 if (!intel_sdvo_get_value(intel_sdvo,
1188 SDVO_CMD_GET_DEVICE_CAPS,
1189 caps, sizeof(*caps)))
1190 return false;
1191
1192 DRM_DEBUG_KMS("SDVO capabilities:\n"
1193 " vendor_id: %d\n"
1194 " device_id: %d\n"
1195 " device_rev_id: %d\n"
1196 " sdvo_version_major: %d\n"
1197 " sdvo_version_minor: %d\n"
1198 " sdvo_inputs_mask: %d\n"
1199 " smooth_scaling: %d\n"
1200 " sharp_scaling: %d\n"
1201 " up_scaling: %d\n"
1202 " down_scaling: %d\n"
1203 " stall_support: %d\n"
1204 " output_flags: %d\n",
1205 caps->vendor_id,
1206 caps->device_id,
1207 caps->device_rev_id,
1208 caps->sdvo_version_major,
1209 caps->sdvo_version_minor,
1210 caps->sdvo_inputs_mask,
1211 caps->smooth_scaling,
1212 caps->sharp_scaling,
1213 caps->up_scaling,
1214 caps->down_scaling,
1215 caps->stall_support,
1216 caps->output_flags);
1217
1218 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001219}
1220
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001221static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001222{
1223 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
Chris Wilson32aad862010-08-04 13:50:25 +01001225 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1226 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001227}
1228
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001229static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001230{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001231 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001232
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001233 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001234}
1235
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001236static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001237intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001238{
Chris Wilsonbc652122011-01-25 13:28:29 +00001239 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001240 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001241}
1242
Chris Wilsonf899fc62010-07-20 15:44:45 -07001243static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001244intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001245{
Chris Wilsone957d772010-09-24 12:52:03 +01001246 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1247 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001248}
1249
Chris Wilsonff482d82010-09-15 10:40:38 +01001250/* Mac mini hack -- use the same DDC as the analog connector */
1251static struct edid *
1252intel_sdvo_get_analog_edid(struct drm_connector *connector)
1253{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001254 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001255
Chris Wilson0c1dab82010-11-23 22:37:01 +00001256 return drm_get_edid(connector,
1257 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001258}
1259
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001260enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001261intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001262{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001263 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001264 enum drm_connector_status status;
1265 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001266
Chris Wilsone957d772010-09-24 12:52:03 +01001267 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001268
Chris Wilsonea5b2132010-08-04 13:50:23 +01001269 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001270 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001271
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001272 /*
1273 * Don't use the 1 as the argument of DDC bus switch to get
1274 * the EDID. It is used for SDVO SPD ROM.
1275 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001276 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001277 intel_sdvo->ddc_bus = ddc;
1278 edid = intel_sdvo_get_edid(connector);
1279 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001280 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001281 }
Chris Wilsone957d772010-09-24 12:52:03 +01001282 /*
1283 * If we found the EDID on the other bus,
1284 * assume that is the correct DDC bus.
1285 */
1286 if (edid == NULL)
1287 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001288 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001289
1290 /*
1291 * When there is no edid and no monitor is connected with VGA
1292 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001293 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001294 if (edid == NULL)
1295 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001296
Chris Wilson2f551c82010-09-15 10:42:50 +01001297 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001298 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001299 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001300 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1301 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001302 if (intel_sdvo->is_hdmi) {
1303 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1304 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1305 }
Chris Wilson139467432011-02-09 20:01:16 +00001306 } else
1307 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001308 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001309 kfree(edid);
1310 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001311
1312 if (status == connector_status_connected) {
1313 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1314 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001315 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001316 }
1317
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001318 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001319}
1320
Chris Wilson7b334fc2010-09-09 23:51:02 +01001321static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001322intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001323{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001324 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001325 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001326 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001327 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001328
Chris Wilson32aad862010-08-04 13:50:25 +01001329 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001330 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001331 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001332
1333 /* add 30ms delay when the output type might be TV */
1334 if (intel_sdvo->caps.output_flags &
1335 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001336 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001337
Chris Wilson32aad862010-08-04 13:50:25 +01001338 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1339 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001340
Chris Wilsone957d772010-09-24 12:52:03 +01001341 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1342 response & 0xff, response >> 8,
1343 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001344
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001345 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001346 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001347
Chris Wilsonea5b2132010-08-04 13:50:23 +01001348 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001349
Chris Wilson97aaf912011-01-04 20:10:52 +00001350 intel_sdvo->has_hdmi_monitor = false;
1351 intel_sdvo->has_hdmi_audio = false;
1352
Chris Wilson615fb932010-08-04 13:50:24 +01001353 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001354 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001355 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001356 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001357 else {
1358 struct edid *edid;
1359
1360 /* if we have an edid check it matches the connection */
1361 edid = intel_sdvo_get_edid(connector);
1362 if (edid == NULL)
1363 edid = intel_sdvo_get_analog_edid(connector);
1364 if (edid != NULL) {
1365 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1366 ret = connector_status_disconnected;
1367 else
1368 ret = connector_status_connected;
1369 connector->display_info.raw_edid = NULL;
1370 kfree(edid);
1371 } else
1372 ret = connector_status_connected;
1373 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001374
1375 /* May update encoder flag for like clock for SDVO TV, etc.*/
1376 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001377 intel_sdvo->is_tv = false;
1378 intel_sdvo->is_lvds = false;
1379 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001380
1381 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001382 intel_sdvo->is_tv = true;
1383 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001384 }
1385 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001386 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001387 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001388
1389 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001390}
1391
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001392static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001393{
Chris Wilsonff482d82010-09-15 10:40:38 +01001394 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001395
1396 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001397 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001398
Keith Packard57cdaf92009-09-04 13:07:54 +08001399 /*
1400 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1401 * link between analog and digital outputs. So, if the regular SDVO
1402 * DDC fails, check to see if the analog output is disconnected, in
1403 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001404 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001405 if (edid == NULL)
1406 edid = intel_sdvo_get_analog_edid(connector);
1407
Chris Wilsonff482d82010-09-15 10:40:38 +01001408 if (edid != NULL) {
Chris Wilson139467432011-02-09 20:01:16 +00001409 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1410 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1411 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1412
1413 if (connector_is_digital == monitor_is_digital) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001414 drm_mode_connector_update_edid_property(connector, edid);
1415 drm_add_edid_modes(connector, edid);
1416 }
Chris Wilson139467432011-02-09 20:01:16 +00001417
Chris Wilsonff482d82010-09-15 10:40:38 +01001418 connector->display_info.raw_edid = NULL;
1419 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001420 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001421}
1422
1423/*
1424 * Set of SDVO TV modes.
1425 * Note! This is in reply order (see loop in get_tv_modes).
1426 * XXX: all 60Hz refresh?
1427 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001428static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001429 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1430 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001432 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1433 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001435 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1436 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001438 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1439 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001441 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1442 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001444 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1445 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001447 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1448 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001450 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1451 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001453 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1454 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001456 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1457 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001459 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1460 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001462 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1463 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001465 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1466 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001468 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1469 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001471 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1472 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001473 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001474 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1475 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001477 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1478 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001480 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1481 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001483 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1484 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486};
1487
1488static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1489{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001490 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001492 uint32_t reply = 0, format_map = 0;
1493 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001494
1495 /* Read the list of supported input resolutions for the selected TV
1496 * format.
1497 */
Chris Wilson40039752010-08-04 13:50:26 +01001498 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001499 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001500 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001501
Chris Wilson32aad862010-08-04 13:50:25 +01001502 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1503 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001504
Chris Wilson32aad862010-08-04 13:50:25 +01001505 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001506 if (!intel_sdvo_write_cmd(intel_sdvo,
1507 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001508 &tv_res, sizeof(tv_res)))
1509 return;
1510 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001511 return;
1512
1513 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001514 if (reply & (1 << i)) {
1515 struct drm_display_mode *nmode;
1516 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001517 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001518 if (nmode)
1519 drm_mode_probed_add(connector, nmode);
1520 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001521}
1522
Ma Ling7086c872009-05-13 11:20:06 +08001523static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1524{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001525 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001526 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001527 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001528
1529 /*
1530 * Attempt to get the mode list from DDC.
1531 * Assume that the preferred modes are
1532 * arranged in priority order.
1533 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001534 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001535 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001536 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001537
1538 /* Fetch modes from VBT */
1539 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001540 newmode = drm_mode_duplicate(connector->dev,
1541 dev_priv->sdvo_lvds_vbt_mode);
1542 if (newmode != NULL) {
1543 /* Guarantee the mode is preferred */
1544 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1545 DRM_MODE_TYPE_DRIVER);
1546 drm_mode_probed_add(connector, newmode);
1547 }
1548 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001549
1550end:
1551 list_for_each_entry(newmode, &connector->probed_modes, head) {
1552 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001553 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001554 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001555
1556 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1557 0);
1558
Chris Wilson85454232010-08-08 14:28:23 +01001559 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001560 break;
1561 }
1562 }
1563
Ma Ling7086c872009-05-13 11:20:06 +08001564}
1565
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001566static int intel_sdvo_get_modes(struct drm_connector *connector)
1567{
Chris Wilson615fb932010-08-04 13:50:24 +01001568 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001569
Chris Wilson615fb932010-08-04 13:50:24 +01001570 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001571 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001572 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001573 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001574 else
1575 intel_sdvo_get_ddc_modes(connector);
1576
Chris Wilson32aad862010-08-04 13:50:25 +01001577 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001578}
1579
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001580static void
1581intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001582{
Chris Wilson615fb932010-08-04 13:50:24 +01001583 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001584 struct drm_device *dev = connector->dev;
1585
Chris Wilsonc5521702010-08-04 13:50:28 +01001586 if (intel_sdvo_connector->left)
1587 drm_property_destroy(dev, intel_sdvo_connector->left);
1588 if (intel_sdvo_connector->right)
1589 drm_property_destroy(dev, intel_sdvo_connector->right);
1590 if (intel_sdvo_connector->top)
1591 drm_property_destroy(dev, intel_sdvo_connector->top);
1592 if (intel_sdvo_connector->bottom)
1593 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1594 if (intel_sdvo_connector->hpos)
1595 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1596 if (intel_sdvo_connector->vpos)
1597 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1598 if (intel_sdvo_connector->saturation)
1599 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1600 if (intel_sdvo_connector->contrast)
1601 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1602 if (intel_sdvo_connector->hue)
1603 drm_property_destroy(dev, intel_sdvo_connector->hue);
1604 if (intel_sdvo_connector->sharpness)
1605 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1606 if (intel_sdvo_connector->flicker_filter)
1607 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1608 if (intel_sdvo_connector->flicker_filter_2d)
1609 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1610 if (intel_sdvo_connector->flicker_filter_adaptive)
1611 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1612 if (intel_sdvo_connector->tv_luma_filter)
1613 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1614 if (intel_sdvo_connector->tv_chroma_filter)
1615 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001616 if (intel_sdvo_connector->dot_crawl)
1617 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001618 if (intel_sdvo_connector->brightness)
1619 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001620}
1621
Jesse Barnes79e53942008-11-07 14:24:08 -08001622static void intel_sdvo_destroy(struct drm_connector *connector)
1623{
Chris Wilson615fb932010-08-04 13:50:24 +01001624 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001625
Chris Wilsonc5521702010-08-04 13:50:28 +01001626 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001627 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001628 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001629
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001630 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001631 drm_sysfs_connector_remove(connector);
1632 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001633 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001634}
1635
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001636static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1637{
1638 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1639 struct edid *edid;
1640 bool has_audio = false;
1641
1642 if (!intel_sdvo->is_hdmi)
1643 return false;
1644
1645 edid = intel_sdvo_get_edid(connector);
1646 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1647 has_audio = drm_detect_monitor_audio(edid);
1648
1649 return has_audio;
1650}
1651
Zhao Yakuice6feab2009-08-24 13:50:26 +08001652static int
1653intel_sdvo_set_property(struct drm_connector *connector,
1654 struct drm_property *property,
1655 uint64_t val)
1656{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001657 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001658 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001659 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001660 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001661 uint8_t cmd;
1662 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001663
1664 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001665 if (ret)
1666 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001667
Chris Wilson3f43c482011-05-12 22:17:24 +01001668 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001669 int i = val;
1670 bool has_audio;
1671
1672 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001673 return 0;
1674
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001675 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001676
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001677 if (i == 0)
1678 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1679 else
1680 has_audio = i > 0;
1681
1682 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001683 return 0;
1684
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001685 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001686 goto done;
1687 }
1688
Chris Wilsone953fd72011-02-21 22:23:52 +00001689 if (property == dev_priv->broadcast_rgb_property) {
1690 if (val == !!intel_sdvo->color_range)
1691 return 0;
1692
1693 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001694 goto done;
1695 }
1696
Chris Wilsonc5521702010-08-04 13:50:28 +01001697#define CHECK_PROPERTY(name, NAME) \
1698 if (intel_sdvo_connector->name == property) { \
1699 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1700 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1701 cmd = SDVO_CMD_SET_##NAME; \
1702 intel_sdvo_connector->cur_##name = temp_value; \
1703 goto set_value; \
1704 }
1705
1706 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001707 if (val >= TV_FORMAT_NUM)
1708 return -EINVAL;
1709
Chris Wilson40039752010-08-04 13:50:26 +01001710 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001711 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001712 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001713
Chris Wilson40039752010-08-04 13:50:26 +01001714 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001715 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001716 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001717 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001718 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001719 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001720 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001721 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001722 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001723
Chris Wilson615fb932010-08-04 13:50:24 +01001724 intel_sdvo_connector->left_margin = temp_value;
1725 intel_sdvo_connector->right_margin = temp_value;
1726 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001727 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001728 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001729 goto set_value;
1730 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001731 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001732 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001733 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001734 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001735
Chris Wilson615fb932010-08-04 13:50:24 +01001736 intel_sdvo_connector->left_margin = temp_value;
1737 intel_sdvo_connector->right_margin = temp_value;
1738 temp_value = intel_sdvo_connector->max_hscan -
1739 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001740 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001741 goto set_value;
1742 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001743 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001744 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001745 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001746 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001747
Chris Wilson615fb932010-08-04 13:50:24 +01001748 intel_sdvo_connector->top_margin = temp_value;
1749 intel_sdvo_connector->bottom_margin = temp_value;
1750 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001751 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001752 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001753 goto set_value;
1754 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001755 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001756 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001757 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001758 return 0;
1759
Chris Wilson615fb932010-08-04 13:50:24 +01001760 intel_sdvo_connector->top_margin = temp_value;
1761 intel_sdvo_connector->bottom_margin = temp_value;
1762 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001763 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001764 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001765 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 CHECK_PROPERTY(hpos, HPOS)
1768 CHECK_PROPERTY(vpos, VPOS)
1769 CHECK_PROPERTY(saturation, SATURATION)
1770 CHECK_PROPERTY(contrast, CONTRAST)
1771 CHECK_PROPERTY(hue, HUE)
1772 CHECK_PROPERTY(brightness, BRIGHTNESS)
1773 CHECK_PROPERTY(sharpness, SHARPNESS)
1774 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1775 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1776 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1777 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1778 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001779 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001780 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001781
1782 return -EINVAL; /* unknown property */
1783
1784set_value:
1785 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1786 return -EIO;
1787
1788
1789done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001790 if (intel_sdvo->base.base.crtc) {
1791 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001792 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001793 crtc->y, crtc->fb);
1794 }
1795
Chris Wilson32aad862010-08-04 13:50:25 +01001796 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001797#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001798}
1799
Jesse Barnes79e53942008-11-07 14:24:08 -08001800static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1801 .dpms = intel_sdvo_dpms,
1802 .mode_fixup = intel_sdvo_mode_fixup,
1803 .prepare = intel_encoder_prepare,
1804 .mode_set = intel_sdvo_mode_set,
1805 .commit = intel_encoder_commit,
1806};
1807
1808static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001809 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001810 .detect = intel_sdvo_detect,
1811 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001812 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001813 .destroy = intel_sdvo_destroy,
1814};
1815
1816static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1817 .get_modes = intel_sdvo_get_modes,
1818 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001819 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001820};
1821
Hannes Ederb358d0a2008-12-18 21:18:47 +01001822static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001823{
Chris Wilson890f3352010-09-14 16:46:59 +01001824 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001825
Chris Wilsonea5b2132010-08-04 13:50:23 +01001826 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001827 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001828 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001829
Chris Wilsone957d772010-09-24 12:52:03 +01001830 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001831 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001832}
1833
1834static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1835 .destroy = intel_sdvo_enc_destroy,
1836};
1837
Chris Wilsonb66d8422010-08-12 15:26:41 +01001838static void
1839intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1840{
1841 uint16_t mask = 0;
1842 unsigned int num_bits;
1843
1844 /* Make a mask of outputs less than or equal to our own priority in the
1845 * list.
1846 */
1847 switch (sdvo->controlled_output) {
1848 case SDVO_OUTPUT_LVDS1:
1849 mask |= SDVO_OUTPUT_LVDS1;
1850 case SDVO_OUTPUT_LVDS0:
1851 mask |= SDVO_OUTPUT_LVDS0;
1852 case SDVO_OUTPUT_TMDS1:
1853 mask |= SDVO_OUTPUT_TMDS1;
1854 case SDVO_OUTPUT_TMDS0:
1855 mask |= SDVO_OUTPUT_TMDS0;
1856 case SDVO_OUTPUT_RGB1:
1857 mask |= SDVO_OUTPUT_RGB1;
1858 case SDVO_OUTPUT_RGB0:
1859 mask |= SDVO_OUTPUT_RGB0;
1860 break;
1861 }
1862
1863 /* Count bits to find what number we are in the priority list. */
1864 mask &= sdvo->caps.output_flags;
1865 num_bits = hweight16(mask);
1866 /* If more than 3 outputs, default to DDC bus 3 for now. */
1867 if (num_bits > 3)
1868 num_bits = 3;
1869
1870 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1871 sdvo->ddc_bus = 1 << num_bits;
1872}
Jesse Barnes79e53942008-11-07 14:24:08 -08001873
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001874/**
1875 * Choose the appropriate DDC bus for control bus switch command for this
1876 * SDVO output based on the controlled output.
1877 *
1878 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1879 * outputs, then LVDS outputs.
1880 */
1881static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001882intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001883 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001884{
Adam Jacksonb1083332010-04-23 16:07:40 -04001885 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001886
Adam Jacksonb1083332010-04-23 16:07:40 -04001887 if (IS_SDVOB(reg))
1888 mapping = &(dev_priv->sdvo_mappings[0]);
1889 else
1890 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001891
Chris Wilsonb66d8422010-08-12 15:26:41 +01001892 if (mapping->initialized)
1893 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1894 else
1895 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001896}
1897
Chris Wilsone957d772010-09-24 12:52:03 +01001898static void
1899intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1900 struct intel_sdvo *sdvo, u32 reg)
1901{
1902 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001903 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001904
1905 if (IS_SDVOB(reg))
1906 mapping = &dev_priv->sdvo_mappings[0];
1907 else
1908 mapping = &dev_priv->sdvo_mappings[1];
1909
1910 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001911 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001912 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001913
Chris Wilson63abf3e2010-12-08 16:48:21 +00001914 if (pin < GMBUS_NUM_PORTS) {
1915 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
Adam Jacksond5090b92011-06-16 16:36:28 -04001916 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001917 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001918 } else {
Chris Wilson63abf3e2010-12-08 16:48:21 +00001919 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Adam Jackson46eb3032011-06-16 16:36:23 -04001920 }
Chris Wilsone957d772010-09-24 12:52:03 +01001921}
1922
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001923static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001924intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001925{
Chris Wilson97aaf912011-01-04 20:10:52 +00001926 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001927}
1928
yakui_zhao714605e2009-05-31 17:18:07 +08001929static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001930intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001931{
1932 struct drm_i915_private *dev_priv = dev->dev_private;
1933 struct sdvo_device_mapping *my_mapping, *other_mapping;
1934
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001935 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001936 my_mapping = &dev_priv->sdvo_mappings[0];
1937 other_mapping = &dev_priv->sdvo_mappings[1];
1938 } else {
1939 my_mapping = &dev_priv->sdvo_mappings[1];
1940 other_mapping = &dev_priv->sdvo_mappings[0];
1941 }
1942
1943 /* If the BIOS described our SDVO device, take advantage of it. */
1944 if (my_mapping->slave_addr)
1945 return my_mapping->slave_addr;
1946
1947 /* If the BIOS only described a different SDVO device, use the
1948 * address that it isn't using.
1949 */
1950 if (other_mapping->slave_addr) {
1951 if (other_mapping->slave_addr == 0x70)
1952 return 0x72;
1953 else
1954 return 0x70;
1955 }
1956
1957 /* No SDVO device info is found for another DVO port,
1958 * so use mapping assumption we had before BIOS parsing.
1959 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001960 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08001961 return 0x70;
1962 else
1963 return 0x72;
1964}
1965
Zhenyu Wang14571b42010-03-30 14:06:33 +08001966static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001967intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1968 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001969{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001970 drm_connector_init(encoder->base.base.dev,
1971 &connector->base.base,
1972 &intel_sdvo_connector_funcs,
1973 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08001974
Chris Wilsondf0e9242010-09-09 16:20:55 +01001975 drm_connector_helper_add(&connector->base.base,
1976 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001977
Chris Wilsondf0e9242010-09-09 16:20:55 +01001978 connector->base.base.interlace_allowed = 0;
1979 connector->base.base.doublescan_allowed = 0;
1980 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001981
Chris Wilsondf0e9242010-09-09 16:20:55 +01001982 intel_connector_attach_encoder(&connector->base, &encoder->base);
1983 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001984}
1985
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001986static void
1987intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1988{
1989 struct drm_device *dev = connector->base.base.dev;
1990
Chris Wilson3f43c482011-05-12 22:17:24 +01001991 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00001992 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
1993 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001994}
1995
Zhenyu Wang14571b42010-03-30 14:06:33 +08001996static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001997intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001998{
Chris Wilson4ef69c72010-09-09 15:14:28 +01001999 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002000 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002001 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002002 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002003 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002004
Chris Wilson615fb932010-08-04 13:50:24 +01002005 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2006 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002007 return false;
2008
Zhenyu Wang14571b42010-03-30 14:06:33 +08002009 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002010 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002011 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002012 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002013 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002014 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002015 }
2016
Chris Wilson615fb932010-08-04 13:50:24 +01002017 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002018 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002019 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2020 connector->polled = DRM_CONNECTOR_POLL_HPD;
2021 intel_sdvo->hotplug_active[0] |= 1 << device;
2022 /* Some SDVO devices have one-shot hotplug interrupts.
2023 * Ensure that they get re-enabled when an interrupt happens.
2024 */
2025 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2026 intel_sdvo_enable_hotplug(intel_encoder);
2027 }
2028 else
2029 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2031 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2032
Chris Wilsone27d8532010-10-22 09:15:22 +01002033 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002034 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002035 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002036 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002037 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2038 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039
Chris Wilsondf0e9242010-09-09 16:20:55 +01002040 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002041 if (intel_sdvo->is_hdmi)
2042 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002043
2044 return true;
2045}
2046
2047static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002048intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002049{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002050 struct drm_encoder *encoder = &intel_sdvo->base.base;
2051 struct drm_connector *connector;
2052 struct intel_connector *intel_connector;
2053 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002054
Chris Wilson615fb932010-08-04 13:50:24 +01002055 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2056 if (!intel_sdvo_connector)
2057 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002058
Chris Wilson615fb932010-08-04 13:50:24 +01002059 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002060 connector = &intel_connector->base;
2061 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2062 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002063
Chris Wilson4ef69c72010-09-09 15:14:28 +01002064 intel_sdvo->controlled_output |= type;
2065 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066
Chris Wilson4ef69c72010-09-09 15:14:28 +01002067 intel_sdvo->is_tv = true;
2068 intel_sdvo->base.needs_tv_clock = true;
2069 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002070
Chris Wilsondf0e9242010-09-09 16:20:55 +01002071 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002072
Chris Wilson4ef69c72010-09-09 15:14:28 +01002073 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002074 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002075
Chris Wilson4ef69c72010-09-09 15:14:28 +01002076 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002077 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002078
Chris Wilson4ef69c72010-09-09 15:14:28 +01002079 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002080
2081err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002082 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002083 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002084}
2085
2086static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002087intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002089 struct drm_encoder *encoder = &intel_sdvo->base.base;
2090 struct drm_connector *connector;
2091 struct intel_connector *intel_connector;
2092 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002093
Chris Wilson615fb932010-08-04 13:50:24 +01002094 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2095 if (!intel_sdvo_connector)
2096 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilson615fb932010-08-04 13:50:24 +01002098 intel_connector = &intel_sdvo_connector->base;
2099 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002100 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2101 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2102 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002103
Chris Wilson4ef69c72010-09-09 15:14:28 +01002104 if (device == 0) {
2105 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2106 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2107 } else if (device == 1) {
2108 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2109 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2110 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002111
Chris Wilson4ef69c72010-09-09 15:14:28 +01002112 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2113 (1 << INTEL_ANALOG_CLONE_BIT));
2114
Chris Wilsondf0e9242010-09-09 16:20:55 +01002115 intel_sdvo_connector_init(intel_sdvo_connector,
2116 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002117 return true;
2118}
2119
2120static bool
2121intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2122{
2123 struct drm_encoder *encoder = &intel_sdvo->base.base;
2124 struct drm_connector *connector;
2125 struct intel_connector *intel_connector;
2126 struct intel_sdvo_connector *intel_sdvo_connector;
2127
2128 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2129 if (!intel_sdvo_connector)
2130 return false;
2131
2132 intel_connector = &intel_sdvo_connector->base;
2133 connector = &intel_connector->base;
2134 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2135 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2136
2137 if (device == 0) {
2138 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2139 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2140 } else if (device == 1) {
2141 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2142 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2143 }
2144
2145 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002146 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002147
Chris Wilsondf0e9242010-09-09 16:20:55 +01002148 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002149 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002150 goto err;
2151
2152 return true;
2153
2154err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002155 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002156 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002157}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002158
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002159static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002160intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002161{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002162 intel_sdvo->is_tv = false;
2163 intel_sdvo->base.needs_tv_clock = false;
2164 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002165
Zhenyu Wang14571b42010-03-30 14:06:33 +08002166 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002167
Zhenyu Wang14571b42010-03-30 14:06:33 +08002168 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002169 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002170 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002171
Zhenyu Wang14571b42010-03-30 14:06:33 +08002172 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002173 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002174 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002175
Zhenyu Wang14571b42010-03-30 14:06:33 +08002176 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002177 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002178 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002179 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002180
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002182 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002183 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002184
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002186 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002187 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002188
Zhenyu Wang14571b42010-03-30 14:06:33 +08002189 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002190 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002191 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002192
Zhenyu Wang14571b42010-03-30 14:06:33 +08002193 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002194 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002196
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002198 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002199 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002200
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002202 unsigned char bytes[2];
2203
Chris Wilsonea5b2132010-08-04 13:50:23 +01002204 intel_sdvo->controlled_output = 0;
2205 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002206 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002207 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002208 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002211 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002212
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002214}
2215
Chris Wilson32aad862010-08-04 13:50:25 +01002216static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2217 struct intel_sdvo_connector *intel_sdvo_connector,
2218 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002219{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002220 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002221 struct intel_sdvo_tv_format format;
2222 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002223
Chris Wilson32aad862010-08-04 13:50:25 +01002224 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2225 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002226
Chris Wilson1a3665c2011-01-25 13:59:37 +00002227 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002228 if (!intel_sdvo_get_value(intel_sdvo,
2229 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2230 &format, sizeof(format)))
2231 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002232
Chris Wilson32aad862010-08-04 13:50:25 +01002233 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002234
2235 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002236 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002237
Chris Wilson615fb932010-08-04 13:50:24 +01002238 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002239 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002240 if (format_map & (1 << i))
2241 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002242
2243
Chris Wilsonc5521702010-08-04 13:50:28 +01002244 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002245 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2246 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002247 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002248 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002249
Chris Wilson615fb932010-08-04 13:50:24 +01002250 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002251 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002252 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002253 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254
Chris Wilson40039752010-08-04 13:50:26 +01002255 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002256 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002257 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002258 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002259
2260}
2261
Chris Wilsonc5521702010-08-04 13:50:28 +01002262#define ENHANCEMENT(name, NAME) do { \
2263 if (enhancements.name) { \
2264 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2265 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2266 return false; \
2267 intel_sdvo_connector->max_##name = data_value[0]; \
2268 intel_sdvo_connector->cur_##name = response; \
2269 intel_sdvo_connector->name = \
2270 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2271 if (!intel_sdvo_connector->name) return false; \
2272 intel_sdvo_connector->name->values[0] = 0; \
2273 intel_sdvo_connector->name->values[1] = data_value[0]; \
2274 drm_connector_attach_property(connector, \
2275 intel_sdvo_connector->name, \
2276 intel_sdvo_connector->cur_##name); \
2277 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2278 data_value[0], data_value[1], response); \
2279 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002280} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002281
2282static bool
2283intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2284 struct intel_sdvo_connector *intel_sdvo_connector,
2285 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002286{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002287 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002288 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002289 uint16_t response, data_value[2];
2290
Chris Wilsonc5521702010-08-04 13:50:28 +01002291 /* when horizontal overscan is supported, Add the left/right property */
2292 if (enhancements.overscan_h) {
2293 if (!intel_sdvo_get_value(intel_sdvo,
2294 SDVO_CMD_GET_MAX_OVERSCAN_H,
2295 &data_value, 4))
2296 return false;
2297
2298 if (!intel_sdvo_get_value(intel_sdvo,
2299 SDVO_CMD_GET_OVERSCAN_H,
2300 &response, 2))
2301 return false;
2302
2303 intel_sdvo_connector->max_hscan = data_value[0];
2304 intel_sdvo_connector->left_margin = data_value[0] - response;
2305 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2306 intel_sdvo_connector->left =
2307 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2308 "left_margin", 2);
2309 if (!intel_sdvo_connector->left)
2310 return false;
2311
2312 intel_sdvo_connector->left->values[0] = 0;
2313 intel_sdvo_connector->left->values[1] = data_value[0];
2314 drm_connector_attach_property(connector,
2315 intel_sdvo_connector->left,
2316 intel_sdvo_connector->left_margin);
2317
2318 intel_sdvo_connector->right =
2319 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2320 "right_margin", 2);
2321 if (!intel_sdvo_connector->right)
2322 return false;
2323
2324 intel_sdvo_connector->right->values[0] = 0;
2325 intel_sdvo_connector->right->values[1] = data_value[0];
2326 drm_connector_attach_property(connector,
2327 intel_sdvo_connector->right,
2328 intel_sdvo_connector->right_margin);
2329 DRM_DEBUG_KMS("h_overscan: max %d, "
2330 "default %d, current %d\n",
2331 data_value[0], data_value[1], response);
2332 }
2333
2334 if (enhancements.overscan_v) {
2335 if (!intel_sdvo_get_value(intel_sdvo,
2336 SDVO_CMD_GET_MAX_OVERSCAN_V,
2337 &data_value, 4))
2338 return false;
2339
2340 if (!intel_sdvo_get_value(intel_sdvo,
2341 SDVO_CMD_GET_OVERSCAN_V,
2342 &response, 2))
2343 return false;
2344
2345 intel_sdvo_connector->max_vscan = data_value[0];
2346 intel_sdvo_connector->top_margin = data_value[0] - response;
2347 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2348 intel_sdvo_connector->top =
2349 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2350 "top_margin", 2);
2351 if (!intel_sdvo_connector->top)
2352 return false;
2353
2354 intel_sdvo_connector->top->values[0] = 0;
2355 intel_sdvo_connector->top->values[1] = data_value[0];
2356 drm_connector_attach_property(connector,
2357 intel_sdvo_connector->top,
2358 intel_sdvo_connector->top_margin);
2359
2360 intel_sdvo_connector->bottom =
2361 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2362 "bottom_margin", 2);
2363 if (!intel_sdvo_connector->bottom)
2364 return false;
2365
2366 intel_sdvo_connector->bottom->values[0] = 0;
2367 intel_sdvo_connector->bottom->values[1] = data_value[0];
2368 drm_connector_attach_property(connector,
2369 intel_sdvo_connector->bottom,
2370 intel_sdvo_connector->bottom_margin);
2371 DRM_DEBUG_KMS("v_overscan: max %d, "
2372 "default %d, current %d\n",
2373 data_value[0], data_value[1], response);
2374 }
2375
2376 ENHANCEMENT(hpos, HPOS);
2377 ENHANCEMENT(vpos, VPOS);
2378 ENHANCEMENT(saturation, SATURATION);
2379 ENHANCEMENT(contrast, CONTRAST);
2380 ENHANCEMENT(hue, HUE);
2381 ENHANCEMENT(sharpness, SHARPNESS);
2382 ENHANCEMENT(brightness, BRIGHTNESS);
2383 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2384 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2385 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2386 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2387 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2388
Chris Wilsone0442182010-08-04 13:50:29 +01002389 if (enhancements.dot_crawl) {
2390 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2391 return false;
2392
2393 intel_sdvo_connector->max_dot_crawl = 1;
2394 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2395 intel_sdvo_connector->dot_crawl =
2396 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2397 if (!intel_sdvo_connector->dot_crawl)
2398 return false;
2399
2400 intel_sdvo_connector->dot_crawl->values[0] = 0;
2401 intel_sdvo_connector->dot_crawl->values[1] = 1;
2402 drm_connector_attach_property(connector,
2403 intel_sdvo_connector->dot_crawl,
2404 intel_sdvo_connector->cur_dot_crawl);
2405 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2406 }
2407
Chris Wilsonc5521702010-08-04 13:50:28 +01002408 return true;
2409}
2410
2411static bool
2412intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2413 struct intel_sdvo_connector *intel_sdvo_connector,
2414 struct intel_sdvo_enhancements_reply enhancements)
2415{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002416 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002417 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2418 uint16_t response, data_value[2];
2419
2420 ENHANCEMENT(brightness, BRIGHTNESS);
2421
2422 return true;
2423}
2424#undef ENHANCEMENT
2425
2426static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2427 struct intel_sdvo_connector *intel_sdvo_connector)
2428{
2429 union {
2430 struct intel_sdvo_enhancements_reply reply;
2431 uint16_t response;
2432 } enhancements;
2433
Chris Wilson1a3665c2011-01-25 13:59:37 +00002434 BUILD_BUG_ON(sizeof(enhancements) != 2);
2435
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002436 enhancements.response = 0;
2437 intel_sdvo_get_value(intel_sdvo,
2438 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2439 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002440 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002441 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002442 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002443 }
Chris Wilson32aad862010-08-04 13:50:25 +01002444
Chris Wilsonc5521702010-08-04 13:50:28 +01002445 if (IS_TV(intel_sdvo_connector))
2446 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002447 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002448 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2449 else
2450 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002451}
Chris Wilson32aad862010-08-04 13:50:25 +01002452
Chris Wilsone957d772010-09-24 12:52:03 +01002453static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2454 struct i2c_msg *msgs,
2455 int num)
2456{
2457 struct intel_sdvo *sdvo = adapter->algo_data;
2458
2459 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2460 return -EIO;
2461
2462 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2463}
2464
2465static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2466{
2467 struct intel_sdvo *sdvo = adapter->algo_data;
2468 return sdvo->i2c->algo->functionality(sdvo->i2c);
2469}
2470
2471static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2472 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2473 .functionality = intel_sdvo_ddc_proxy_func
2474};
2475
2476static bool
2477intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2478 struct drm_device *dev)
2479{
2480 sdvo->ddc.owner = THIS_MODULE;
2481 sdvo->ddc.class = I2C_CLASS_DDC;
2482 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2483 sdvo->ddc.dev.parent = &dev->pdev->dev;
2484 sdvo->ddc.algo_data = sdvo;
2485 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2486
2487 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002488}
2489
Eric Anholtc751ce42010-03-25 11:48:48 -07002490bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002491{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002492 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002493 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002494 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002495 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002496
Chris Wilsonea5b2132010-08-04 13:50:23 +01002497 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2498 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002499 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002500
Chris Wilson56184e32011-05-17 14:03:50 +01002501 intel_sdvo->sdvo_reg = sdvo_reg;
2502 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2503 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002504 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2505 kfree(intel_sdvo);
2506 return false;
2507 }
2508
Chris Wilson56184e32011-05-17 14:03:50 +01002509 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002510 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002511 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002512 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002513
Jesse Barnes79e53942008-11-07 14:24:08 -08002514 /* Read the regs to test if we can talk to the device */
2515 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002516 u8 byte;
2517
2518 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002519 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002520 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002521 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002522 }
2523 }
2524
Chris Wilsonf899fc62010-07-20 15:44:45 -07002525 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002526 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002527 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002528 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002529
Chris Wilson4ef69c72010-09-09 15:14:28 +01002530 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002531
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002532 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002533 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002534 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002535
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002536 /* Set up hotplug command - note paranoia about contents of reply.
2537 * We assume that the hardware is in a sane state, and only touch
2538 * the bits we think we understand.
2539 */
2540 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2541 &intel_sdvo->hotplug_active, 2);
2542 intel_sdvo->hotplug_active[0] &= ~0x3;
2543
Chris Wilsonea5b2132010-08-04 13:50:23 +01002544 if (intel_sdvo_output_setup(intel_sdvo,
2545 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002546 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002547 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002548 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002549 }
2550
Chris Wilsonea5b2132010-08-04 13:50:23 +01002551 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002552
Jesse Barnes79e53942008-11-07 14:24:08 -08002553 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002554 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002555 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002556
Chris Wilson32aad862010-08-04 13:50:25 +01002557 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2558 &intel_sdvo->pixel_clock_min,
2559 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002560 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002561
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002562 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002563 "clock range %dMHz - %dMHz, "
2564 "input 1: %c, input 2: %c, "
2565 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002566 SDVO_NAME(intel_sdvo),
2567 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2568 intel_sdvo->caps.device_rev_id,
2569 intel_sdvo->pixel_clock_min / 1000,
2570 intel_sdvo->pixel_clock_max / 1000,
2571 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2572 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002573 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002574 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002575 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002576 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002577 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002578 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002579
Chris Wilsonf899fc62010-07-20 15:44:45 -07002580err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002581 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002582 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002583 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002584
Eric Anholt7d573822009-01-02 13:33:00 -08002585 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002586}