blob: 082a8dad9938774f5cc93b87077400e5393c219c [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
Ben Greear384914b2014-08-25 08:37:32 +030025#include <linux/uuid.h>
26#include <linux/time.h>
Kalle Valo5e3dd152013-06-12 20:52:10 +030027
Michal Kazioredb82362013-07-05 16:15:14 +030028#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030029#include "htc.h"
30#include "hw.h"
31#include "targaddrs.h"
32#include "wmi.h"
33#include "../ath.h"
34#include "../regd.h"
Janusz Dziedzic9702c682013-11-20 09:59:41 +020035#include "../dfs_pattern_detector.h"
Simon Wunderlich855aed12014-08-02 09:12:54 +030036#include "spectral.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030037
38#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
39#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
40#define WO(_f) ((_f##_OFFSET) >> 2)
41
42#define ATH10K_SCAN_ID 0
43#define WMI_READY_TIMEOUT (5 * HZ)
44#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020045#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030046
47/* Antenna noise floor */
48#define ATH10K_DEFAULT_NOISE_FLOOR -95
49
Bartosz Markowski71098612013-11-14 09:01:15 +010050#define ATH10K_MAX_NUM_MGMT_PENDING 128
Bartosz Markowski5e00d312013-09-26 17:47:12 +020051
Kalle Valo5a13e762014-01-20 11:01:46 +020052/* number of failed packets */
53#define ATH10K_KICKOUT_THRESHOLD 50
54
55/*
56 * Use insanely high numbers to make sure that the firmware implementation
57 * won't start, we have the same functionality already in hostapd. Unit
58 * is seconds.
59 */
60#define ATH10K_KEEPALIVE_MIN_IDLE 3747
61#define ATH10K_KEEPALIVE_MAX_IDLE 3895
62#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
63
Kalle Valo5e3dd152013-06-12 20:52:10 +030064struct ath10k;
65
Kalle Valo5e3dd152013-06-12 20:52:10 +030066struct ath10k_skb_cb {
67 dma_addr_t paddr;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020068 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030069
70 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030071 u8 tid;
72 bool is_offchan;
Michal Kaziora16942e2014-02-27 18:50:04 +020073 struct ath10k_htt_txbuf *txbuf;
74 u32 txbuf_paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +030075 } __packed htt;
Michal Kazior748afc42014-01-23 12:48:21 +010076
77 struct {
78 bool dtim_zero;
79 bool deliver_cab;
80 } bcn;
Kalle Valo5e3dd152013-06-12 20:52:10 +030081} __packed;
82
83static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
84{
85 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
86 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
87 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
88}
89
Kalle Valo5e3dd152013-06-12 20:52:10 +030090static inline u32 host_interest_item_address(u32 item_offset)
91{
92 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
93}
94
95struct ath10k_bmi {
96 bool done_sent;
97};
98
Bartosz Markowskib3effe62013-09-26 17:47:11 +020099struct ath10k_mem_chunk {
100 void *vaddr;
101 dma_addr_t paddr;
102 u32 len;
103 u32 req_id;
104};
105
Kalle Valo5e3dd152013-06-12 20:52:10 +0300106struct ath10k_wmi {
107 enum ath10k_htc_ep_id eid;
108 struct completion service_ready;
109 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200110 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200111 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200112 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200113 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200114
115 u32 num_mem_chunks;
Michal Kazior5c01aa3d2014-09-18 15:21:24 +0200116 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300117};
118
Michal Kazior60ef4012014-09-25 12:33:48 +0200119struct ath10k_fw_stats_peer {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300120 u8 peer_macaddr[ETH_ALEN];
121 u32 peer_rssi;
122 u32 peer_tx_rate;
Ben Greear23c3aae2014-03-28 14:35:15 +0200123 u32 peer_rx_rate; /* 10x only */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300124};
125
Michal Kazior60ef4012014-09-25 12:33:48 +0200126struct ath10k_fw_stats {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300127 /* PDEV stats */
128 s32 ch_noise_floor;
129 u32 tx_frame_count;
130 u32 rx_frame_count;
131 u32 rx_clear_count;
132 u32 cycle_count;
133 u32 phy_err_count;
134 u32 chan_tx_power;
Chun-Yeow Yeoh52e346d2014-03-28 14:35:16 +0200135 u32 ack_rx_bad;
136 u32 rts_bad;
137 u32 rts_good;
138 u32 fcs_bad;
139 u32 no_beacons;
140 u32 mib_int_count;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300141
142 /* PDEV TX stats */
143 s32 comp_queued;
144 s32 comp_delivered;
145 s32 msdu_enqued;
146 s32 mpdu_enqued;
147 s32 wmm_drop;
148 s32 local_enqued;
149 s32 local_freed;
150 s32 hw_queued;
151 s32 hw_reaped;
152 s32 underrun;
153 s32 tx_abort;
154 s32 mpdus_requed;
155 u32 tx_ko;
156 u32 data_rc;
157 u32 self_triggers;
158 u32 sw_retry_failure;
159 u32 illgl_rate_phy_err;
160 u32 pdev_cont_xretry;
161 u32 pdev_tx_timeout;
162 u32 pdev_resets;
163 u32 phy_underrun;
164 u32 txop_ovf;
165
166 /* PDEV RX stats */
167 s32 mid_ppdu_route_change;
168 s32 status_rcvd;
169 s32 r0_frags;
170 s32 r1_frags;
171 s32 r2_frags;
172 s32 r3_frags;
173 s32 htt_msdus;
174 s32 htt_mpdus;
175 s32 loc_msdus;
176 s32 loc_mpdus;
177 s32 oversize_amsdu;
178 s32 phy_errs;
179 s32 phy_err_drop;
180 s32 mpdu_errs;
181
182 /* VDEV STATS */
183
184 /* PEER STATS */
185 u8 peers;
Michal Kazior60ef4012014-09-25 12:33:48 +0200186 struct ath10k_fw_stats_peer peer_stat[TARGET_NUM_PEERS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187
188 /* TODO: Beacon filter stats */
189
190};
191
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200192struct ath10k_dfs_stats {
193 u32 phy_errors;
194 u32 pulses_total;
195 u32 pulses_detected;
196 u32 pulses_discarded;
197 u32 radar_detected;
198};
199
Kalle Valo5e3dd152013-06-12 20:52:10 +0300200#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
201
202struct ath10k_peer {
203 struct list_head list;
204 int vdev_id;
205 u8 addr[ETH_ALEN];
206 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
207 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
208};
209
Michal Kazior9797feb2014-02-14 14:49:48 +0100210struct ath10k_sta {
211 struct ath10k_vif *arvif;
212
213 /* the following are protected by ar->data_lock */
214 u32 changed; /* IEEE80211_RC_* */
215 u32 bw;
216 u32 nss;
217 u32 smps;
218
219 struct work_struct update_wk;
220};
221
Kalle Valo5e3dd152013-06-12 20:52:10 +0300222#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
223
224struct ath10k_vif {
Michal Kazior05791192013-10-16 15:44:45 +0300225 struct list_head list;
226
Kalle Valo5e3dd152013-06-12 20:52:10 +0300227 u32 vdev_id;
228 enum wmi_vdev_type vdev_type;
229 enum wmi_vdev_subtype vdev_subtype;
230 u32 beacon_interval;
231 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200232 struct sk_buff *beacon;
Michal Kazior748afc42014-01-23 12:48:21 +0100233 /* protected by data_lock */
234 bool beacon_sent;
Michal Kazior64badcb2014-09-18 11:18:02 +0300235 void *beacon_buf;
236 dma_addr_t beacon_paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300237
238 struct ath10k *ar;
239 struct ieee80211_vif *vif;
240
Michal Kaziorc930f742014-01-23 11:38:25 +0100241 bool is_started;
242 bool is_up;
Simon Wunderlich855aed12014-08-02 09:12:54 +0300243 bool spectral_enabled;
Michal Kaziorc930f742014-01-23 11:38:25 +0100244 u32 aid;
245 u8 bssid[ETH_ALEN];
246
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300247 struct work_struct wep_key_work;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300249 u8 def_wep_key_idx;
250 u8 def_wep_key_newidx;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300251
252 u16 tx_seq_no;
253
254 union {
255 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256 u32 uapsd;
257 } sta;
258 struct {
259 /* 127 stations; wmi limit */
260 u8 tim_bitmap[16];
261 u8 tim_len;
262 u32 ssid_len;
263 u8 ssid[IEEE80211_MAX_SSID_LEN];
264 bool hidden_ssid;
265 /* P2P_IE with NoA attribute for P2P_GO case */
266 u32 noa_len;
267 u8 *noa_data;
268 } ap;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300269 } u;
Janusz Dziedzic51ab1a02014-01-08 09:08:33 +0100270
271 u8 fixed_rate;
272 u8 fixed_nss;
Janusz Dziedzic9f81f722014-01-17 20:04:14 +0100273 u8 force_sgi;
Marek Kwaczynskie81bd102014-03-11 12:58:00 +0200274 bool use_cts_prot;
275 int num_legacy_stations;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300276};
277
278struct ath10k_vif_iter {
279 u32 vdev_id;
280 struct ath10k_vif *arvif;
281};
282
Ben Greear384914b2014-08-25 08:37:32 +0300283/* used for crash-dump storage, protected by data-lock */
284struct ath10k_fw_crash_data {
285 bool crashed_since_read;
286
287 uuid_le uuid;
288 struct timespec timestamp;
289 __le32 registers[REG_DUMP_COUNT_QCA988X];
290};
291
Kalle Valo5e3dd152013-06-12 20:52:10 +0300292struct ath10k_debug {
293 struct dentry *debugfs_phy;
294
Michal Kazior60ef4012014-09-25 12:33:48 +0200295 struct ath10k_fw_stats fw_stats;
296 struct completion fw_stats_complete;
Michal Kaziorc4f8c832014-09-04 10:18:32 +0200297 DECLARE_BITMAP(wmi_service_bitmap, WMI_SERVICE_MAX);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300298
Kalle Valoa3d135e2013-09-03 11:44:10 +0300299 unsigned long htt_stats_mask;
300 struct delayed_work htt_stats_dwork;
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200301 struct ath10k_dfs_stats dfs_stats;
302 struct ath_dfs_pool_stats dfs_pool_stats;
Kalle Valof118a3e2014-01-03 12:59:31 +0200303
304 u32 fw_dbglog_mask;
Janusz Dziedzicd3856232014-06-02 21:19:46 +0300305
306 u8 htt_max_amsdu;
307 u8 htt_max_ampdu;
Ben Greear384914b2014-08-25 08:37:32 +0300308
309 struct ath10k_fw_crash_data *fw_crash_data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300310};
311
Michal Kaziorf7843d72013-07-16 09:38:52 +0200312enum ath10k_state {
313 ATH10K_STATE_OFF = 0,
314 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200315
316 /* When doing firmware recovery the device is first powered down.
317 * mac80211 is supposed to call in to start() hook later on. It is
318 * however possible that driver unloading and firmware crash overlap.
319 * mac80211 can wait on conf_mutex in stop() while the device is
320 * stopped in ath10k_core_restart() work holding conf_mutex. The state
321 * RESTARTED means that the device is up and mac80211 has started hw
322 * reconfiguration. Once mac80211 is done with the reconfiguration we
323 * set the state to STATE_ON in restart_complete(). */
324 ATH10K_STATE_RESTARTING,
325 ATH10K_STATE_RESTARTED,
326
327 /* The device has crashed while restarting hw. This state is like ON
328 * but commands are blocked in HTC and -ECOMM response is given. This
329 * prevents completion timeouts and makes the driver more responsive to
330 * userspace commands. This is also prevents recursive recovery. */
331 ATH10K_STATE_WEDGED,
Kalle Valo43d2a302014-09-10 18:23:30 +0300332
333 /* factory tests */
334 ATH10K_STATE_UTF,
335};
336
337enum ath10k_firmware_mode {
338 /* the default mode, standard 802.11 functionality */
339 ATH10K_FIRMWARE_MODE_NORMAL,
340
341 /* factory tests etc */
342 ATH10K_FIRMWARE_MODE_UTF,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200343};
344
Michal Kazior0d9b0432013-08-09 10:13:33 +0200345enum ath10k_fw_features {
346 /* wmi_mgmt_rx_hdr contains extra RSSI information */
347 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
348
Bartosz Markowskice428702013-09-26 17:47:05 +0200349 /* firmware from 10X branch */
350 ATH10K_FW_FEATURE_WMI_10X = 1,
351
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200352 /* firmware support tx frame management over WMI, otherwise it's HTT */
353 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
354
Bartosz Markowskid3541812013-12-10 16:20:40 +0100355 /* Firmware does not support P2P */
356 ATH10K_FW_FEATURE_NO_P2P = 3,
357
Michal Kazior24c88f72014-07-25 13:32:17 +0200358 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature bit
359 * is required to be set as well.
360 */
361 ATH10K_FW_FEATURE_WMI_10_2 = 4,
362
Michal Kazior0d9b0432013-08-09 10:13:33 +0200363 /* keep last */
364 ATH10K_FW_FEATURE_COUNT,
365};
366
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200367enum ath10k_dev_flags {
368 /* Indicates that ath10k device is during CAC phase of DFS */
369 ATH10K_CAC_RUNNING,
Michal Kazior6782cb62014-05-23 12:28:47 +0200370 ATH10K_FLAG_CORE_REGISTERED,
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200371};
372
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200373enum ath10k_scan_state {
374 ATH10K_SCAN_IDLE,
375 ATH10K_SCAN_STARTING,
376 ATH10K_SCAN_RUNNING,
377 ATH10K_SCAN_ABORTING,
378};
379
380static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
381{
382 switch (state) {
383 case ATH10K_SCAN_IDLE:
384 return "idle";
385 case ATH10K_SCAN_STARTING:
386 return "starting";
387 case ATH10K_SCAN_RUNNING:
388 return "running";
389 case ATH10K_SCAN_ABORTING:
390 return "aborting";
391 }
392
393 return "unknown";
394}
395
Kalle Valo5e3dd152013-06-12 20:52:10 +0300396struct ath10k {
397 struct ath_common ath_common;
398 struct ieee80211_hw *hw;
399 struct device *dev;
400 u8 mac_addr[ETH_ALEN];
401
Kalle Valoe01ae682013-09-01 11:22:14 +0300402 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300403 u32 target_version;
404 u8 fw_version_major;
405 u32 fw_version_minor;
406 u16 fw_version_release;
407 u16 fw_version_build;
408 u32 phy_capability;
409 u32 hw_min_tx_power;
410 u32 hw_max_tx_power;
411 u32 ht_cap_info;
412 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200413 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300414
Michal Kazior0d9b0432013-08-09 10:13:33 +0200415 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
416
Kalle Valo5e3dd152013-06-12 20:52:10 +0300417 struct targetdef *targetdef;
418 struct hostdef *hostdef;
419
420 bool p2p;
421
422 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300423 const struct ath10k_hif_ops *ops;
424 } hif;
425
Marek Puzyniak9042e172014-02-10 17:14:23 +0100426 struct completion target_suspend;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300427
428 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300429 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300430 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300431 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300432
433 struct ath10k_hw_params {
434 u32 id;
435 const char *name;
436 u32 patch_load_addr;
437
438 struct ath10k_hw_params_fw {
439 const char *dir;
440 const char *fw;
441 const char *otp;
442 const char *board;
443 } fw;
444 } hw_params;
445
Kalle Valo36527912013-09-27 19:54:55 +0300446 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300447 const void *board_data;
448 size_t board_len;
449
Michal Kazior29385052013-07-16 09:38:58 +0200450 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300451 const void *otp_data;
452 size_t otp_len;
453
Michal Kazior29385052013-07-16 09:38:58 +0200454 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300455 const void *firmware_data;
456 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200457
Kalle Valo1a222432013-09-27 19:55:07 +0300458 int fw_api;
459
Kalle Valo5e3dd152013-06-12 20:52:10 +0300460 struct {
461 struct completion started;
462 struct completion completed;
463 struct completion on_channel;
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200464 struct delayed_work timeout;
465 enum ath10k_scan_state state;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300466 bool is_roc;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300467 int vdev_id;
468 int roc_freq;
469 } scan;
470
471 struct {
472 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
473 } mac;
474
475 /* should never be NULL; needed for regular htt rx */
476 struct ieee80211_channel *rx_channel;
477
478 /* valid during scan; needed for mgmt rx during scan */
479 struct ieee80211_channel *scan_channel;
480
Michal Kaziorc930f742014-01-23 11:38:25 +0100481 /* current operating channel definition */
482 struct cfg80211_chan_def chandef;
483
Kalle Valo5e3dd152013-06-12 20:52:10 +0300484 int free_vdev_map;
Michal Kazior1bbc0972014-04-08 09:45:47 +0300485 bool monitor;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300486 int monitor_vdev_id;
Michal Kazior1bbc0972014-04-08 09:45:47 +0300487 bool monitor_started;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300488 unsigned int filter_flags;
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200489 unsigned long dev_flags;
Marek Puzyniak7d9b40b2013-11-20 10:00:28 +0200490 u32 dfs_block_radar_events;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300491
Michal Kaziord6500972014-04-08 09:56:09 +0300492 /* protected by conf_mutex */
493 bool radar_enabled;
494 int num_started_vdevs;
495
Ben Greear46acf7b2014-05-16 17:15:38 +0300496 /* Protected by conf-mutex */
497 u8 supp_tx_chainmask;
498 u8 supp_rx_chainmask;
499 u8 cfg_tx_chainmask;
500 u8 cfg_rx_chainmask;
501
Kalle Valo5e3dd152013-06-12 20:52:10 +0300502 struct wmi_pdev_set_wmm_params_arg wmm_params;
503 struct completion install_key_done;
504
505 struct completion vdev_setup_done;
506
507 struct workqueue_struct *workqueue;
508
509 /* prevents concurrent FW reconfiguration */
510 struct mutex conf_mutex;
511
512 /* protects shared structure data */
513 spinlock_t data_lock;
514
Michal Kazior05791192013-10-16 15:44:45 +0300515 struct list_head arvifs;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300516 struct list_head peers;
517 wait_queue_head_t peer_mapping_wq;
518
Bartosz Markowski0e759f32014-01-02 14:38:33 +0100519 /* number of created peers; protected by data_lock */
520 int num_peers;
521
Kalle Valo5e3dd152013-06-12 20:52:10 +0300522 struct work_struct offchan_tx_work;
523 struct sk_buff_head offchan_tx_queue;
524 struct completion offchan_tx_completed;
525 struct sk_buff *offchan_tx_skb;
526
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200527 struct work_struct wmi_mgmt_tx_work;
528 struct sk_buff_head wmi_mgmt_tx_queue;
529
Michal Kaziorf7843d72013-07-16 09:38:52 +0200530 enum ath10k_state state;
531
Michal Kazior6782cb62014-05-23 12:28:47 +0200532 struct work_struct register_work;
Michal Kazioraffd3212013-07-16 09:54:35 +0200533 struct work_struct restart_work;
534
Michal Kazior2e1dea42013-07-31 10:32:40 +0200535 /* cycle count is reported twice for each visited channel during scan.
536 * access protected by data_lock */
537 u32 survey_last_rx_clear_count;
538 u32 survey_last_cycle_count;
539 struct survey_info survey[ATH10K_NUM_CHANS];
540
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200541 struct dfs_pattern_detector *dfs_detector;
542
Kalle Valo5e3dd152013-06-12 20:52:10 +0300543#ifdef CONFIG_ATH10K_DEBUGFS
544 struct ath10k_debug debug;
545#endif
Simon Wunderlich855aed12014-08-02 09:12:54 +0300546
547 struct {
548 /* relay(fs) channel for spectral scan */
549 struct rchan *rfs_chan_spec_scan;
550
551 /* spectral_mode and spec_config are protected by conf_mutex */
552 enum ath10k_spectral_mode mode;
553 struct ath10k_spec_scan config;
554 } spectral;
Michal Kaziore7b54192014-08-07 11:03:27 +0200555
Kalle Valo43d2a302014-09-10 18:23:30 +0300556 struct {
557 /* protected by conf_mutex */
558 const struct firmware *utf;
559 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
560
561 /* protected by data_lock */
562 bool utf_monitor;
563 } testmode;
564
Michal Kaziore7b54192014-08-07 11:03:27 +0200565 /* must be last */
566 u8 drv_priv[0] __aligned(sizeof(void *));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300567};
568
Michal Kaziore7b54192014-08-07 11:03:27 +0200569struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300570 const struct ath10k_hif_ops *hif_ops);
571void ath10k_core_destroy(struct ath10k *ar);
572
Kalle Valo43d2a302014-09-10 18:23:30 +0300573int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100574int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200575void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300576int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577void ath10k_core_unregister(struct ath10k *ar);
578
Kalle Valo5e3dd152013-06-12 20:52:10 +0300579#endif /* _CORE_H_ */