blob: c19e611d27826165695aa5017d2bfa1e187651ba [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200146 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300147 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
148 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
149 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
150 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200151 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300152 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300153 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
154 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
155 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
156 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
157 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
158 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300159 MLX5_CMD_OP_ALLOC_PD = 0x800,
160 MLX5_CMD_OP_DEALLOC_PD = 0x801,
161 MLX5_CMD_OP_ALLOC_UAR = 0x802,
162 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
163 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
164 MLX5_CMD_OP_ACCESS_REG = 0x805,
165 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300166 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300167 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
168 MLX5_CMD_OP_MAD_IFC = 0x50d,
169 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
170 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
171 MLX5_CMD_OP_NOP = 0x80d,
172 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
173 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300174 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
175 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
176 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
177 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
178 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
179 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
180 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
181 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
182 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
183 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
184 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
185 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200186 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
187 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300188 MLX5_CMD_OP_CREATE_LAG = 0x840,
189 MLX5_CMD_OP_MODIFY_LAG = 0x841,
190 MLX5_CMD_OP_QUERY_LAG = 0x842,
191 MLX5_CMD_OP_DESTROY_LAG = 0x843,
192 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
193 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_TIR = 0x900,
195 MLX5_CMD_OP_MODIFY_TIR = 0x901,
196 MLX5_CMD_OP_DESTROY_TIR = 0x902,
197 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300198 MLX5_CMD_OP_CREATE_SQ = 0x904,
199 MLX5_CMD_OP_MODIFY_SQ = 0x905,
200 MLX5_CMD_OP_DESTROY_SQ = 0x906,
201 MLX5_CMD_OP_QUERY_SQ = 0x907,
202 MLX5_CMD_OP_CREATE_RQ = 0x908,
203 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300204 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300205 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
206 MLX5_CMD_OP_QUERY_RQ = 0x90b,
207 MLX5_CMD_OP_CREATE_RMP = 0x90c,
208 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
209 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
210 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300211 MLX5_CMD_OP_CREATE_TIS = 0x912,
212 MLX5_CMD_OP_MODIFY_TIS = 0x913,
213 MLX5_CMD_OP_DESTROY_TIS = 0x914,
214 MLX5_CMD_OP_QUERY_TIS = 0x915,
215 MLX5_CMD_OP_CREATE_RQT = 0x916,
216 MLX5_CMD_OP_MODIFY_RQT = 0x917,
217 MLX5_CMD_OP_DESTROY_RQT = 0x918,
218 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200219 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300220 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
221 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
223 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
224 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
225 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
226 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
227 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200228 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000229 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
230 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
231 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300232 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300233 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
234 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200235 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
236 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300237 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
238 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
239 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
240 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
241 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300242 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300243};
244
245struct mlx5_ifc_flow_table_fields_supported_bits {
246 u8 outer_dmac[0x1];
247 u8 outer_smac[0x1];
248 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300249 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300250 u8 outer_first_prio[0x1];
251 u8 outer_first_cfi[0x1];
252 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300253 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300254 u8 outer_second_prio[0x1];
255 u8 outer_second_cfi[0x1];
256 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200257 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300258 u8 outer_sip[0x1];
259 u8 outer_dip[0x1];
260 u8 outer_frag[0x1];
261 u8 outer_ip_protocol[0x1];
262 u8 outer_ip_ecn[0x1];
263 u8 outer_ip_dscp[0x1];
264 u8 outer_udp_sport[0x1];
265 u8 outer_udp_dport[0x1];
266 u8 outer_tcp_sport[0x1];
267 u8 outer_tcp_dport[0x1];
268 u8 outer_tcp_flags[0x1];
269 u8 outer_gre_protocol[0x1];
270 u8 outer_gre_key[0x1];
271 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200272 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300273 u8 source_eswitch_port[0x1];
274
275 u8 inner_dmac[0x1];
276 u8 inner_smac[0x1];
277 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300278 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300279 u8 inner_first_prio[0x1];
280 u8 inner_first_cfi[0x1];
281 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200282 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300283 u8 inner_second_prio[0x1];
284 u8 inner_second_cfi[0x1];
285 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200286 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300287 u8 inner_sip[0x1];
288 u8 inner_dip[0x1];
289 u8 inner_frag[0x1];
290 u8 inner_ip_protocol[0x1];
291 u8 inner_ip_ecn[0x1];
292 u8 inner_ip_dscp[0x1];
293 u8 inner_udp_sport[0x1];
294 u8 inner_udp_dport[0x1];
295 u8 inner_tcp_sport[0x1];
296 u8 inner_tcp_dport[0x1];
297 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300299 u8 reserved_at_40[0x17];
300 u8 outer_esp_spi[0x1];
301 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300302 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300303
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305};
306
307struct mlx5_ifc_flow_table_prop_layout_bits {
308 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000309 u8 reserved_at_1[0x1];
310 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200311 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200312 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200313 u8 identified_miss_table_mode[0x1];
314 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300315 u8 encap[0x1];
316 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200317 u8 reserved_at_9[0x1];
318 u8 pop_vlan[0x1];
319 u8 push_vlan[0x1];
320 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200324 u8 log_max_modify_header_context[0x8];
325 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326 u8 max_ft_level[0x8];
327
Matan Barakb4ff3a32016-02-09 14:57:42 +0200328 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200331 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332
Matan Barakb4ff3a32016-02-09 14:57:42 +0200333 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200334 u8 log_max_destination[0x8];
335
Raed Salem16f1c5b2017-07-30 11:02:51 +0300336 u8 log_max_flow_counter[0x8];
337 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300338 u8 log_max_flow[0x8];
339
Matan Barakb4ff3a32016-02-09 14:57:42 +0200340 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300341
342 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
343
344 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
345};
346
347struct mlx5_ifc_odp_per_transport_service_cap_bits {
348 u8 send[0x1];
349 u8 receive[0x1];
350 u8 write[0x1];
351 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200352 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300353 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300355};
356
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200357struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200358 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200359
360 u8 ipv4[0x20];
361};
362
363struct mlx5_ifc_ipv6_layout_bits {
364 u8 ipv6[16][0x8];
365};
366
367union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
368 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
369 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200370 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200371};
372
Saeed Mahameede2816822015-05-28 22:28:40 +0300373struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
374 u8 smac_47_16[0x20];
375
376 u8 smac_15_0[0x10];
377 u8 ethertype[0x10];
378
379 u8 dmac_47_16[0x20];
380
381 u8 dmac_15_0[0x10];
382 u8 first_prio[0x3];
383 u8 first_cfi[0x1];
384 u8 first_vid[0xc];
385
386 u8 ip_protocol[0x8];
387 u8 ip_dscp[0x6];
388 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300389 u8 cvlan_tag[0x1];
390 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300391 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300392 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393 u8 tcp_flags[0x9];
394
395 u8 tcp_sport[0x10];
396 u8 tcp_dport[0x10];
397
Or Gerlitza8ade552017-06-07 17:49:56 +0300398 u8 reserved_at_c0[0x18];
399 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300400
401 u8 udp_sport[0x10];
402 u8 udp_dport[0x10];
403
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200404 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300405
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200406 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300407};
408
409struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300410 u8 reserved_at_0[0x8];
411 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300412
Matan Barakb4ff3a32016-02-09 14:57:42 +0200413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300414 u8 source_port[0x10];
415
416 u8 outer_second_prio[0x3];
417 u8 outer_second_cfi[0x1];
418 u8 outer_second_vid[0xc];
419 u8 inner_second_prio[0x3];
420 u8 inner_second_cfi[0x1];
421 u8 inner_second_vid[0xc];
422
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300423 u8 outer_second_cvlan_tag[0x1];
424 u8 inner_second_cvlan_tag[0x1];
425 u8 outer_second_svlan_tag[0x1];
426 u8 inner_second_svlan_tag[0x1];
427 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428 u8 gre_protocol[0x10];
429
430 u8 gre_key_h[0x18];
431 u8 gre_key_l[0x8];
432
433 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435
Matan Barakb4ff3a32016-02-09 14:57:42 +0200436 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300437
Matan Barakb4ff3a32016-02-09 14:57:42 +0200438 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300439 u8 outer_ipv6_flow_label[0x14];
440
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442 u8 inner_ipv6_flow_label[0x14];
443
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300444 u8 reserved_at_120[0x28];
445 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300446 u8 reserved_at_160[0x20];
447 u8 outer_esp_spi[0x20];
448 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300449};
450
451struct mlx5_ifc_cmd_pas_bits {
452 u8 pa_h[0x20];
453
454 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200455 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300456};
457
458struct mlx5_ifc_uint64_bits {
459 u8 hi[0x20];
460
461 u8 lo[0x20];
462};
463
464enum {
465 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
466 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
467 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
468 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
469 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
470 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
471 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
472 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
473 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
474 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
475};
476
477struct mlx5_ifc_ads_bits {
478 u8 fl[0x1];
479 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200480 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300481 u8 pkey_index[0x10];
482
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 grh[0x1];
485 u8 mlid[0x7];
486 u8 rlid[0x10];
487
488 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200489 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300490 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 stat_rate[0x4];
493 u8 hop_limit[0x8];
494
Matan Barakb4ff3a32016-02-09 14:57:42 +0200495 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300496 u8 tclass[0x8];
497 u8 flow_label[0x14];
498
499 u8 rgid_rip[16][0x8];
500
Matan Barakb4ff3a32016-02-09 14:57:42 +0200501 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300502 u8 f_dscp[0x1];
503 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200504 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300505 u8 f_eth_prio[0x1];
506 u8 ecn[0x2];
507 u8 dscp[0x6];
508 u8 udp_sport[0x10];
509
510 u8 dei_cfi[0x1];
511 u8 eth_prio[0x3];
512 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200513 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514 u8 rmac_47_32[0x10];
515
516 u8 rmac_31_0[0x20];
517};
518
519struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200520 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300521 u8 nic_rx_multi_path_tirs_fts[0x1];
522 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
523 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
526
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
536
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300538};
539
Saeed Mahameed495716b2015-12-01 18:03:19 +0200540struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
544
545 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
546
547 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
548
Matan Barakb4ff3a32016-02-09 14:57:42 +0200549 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200550};
551
Saeed Mahameedd6666752015-12-01 18:03:22 +0200552struct mlx5_ifc_e_switch_cap_bits {
553 u8 vport_svlan_strip[0x1];
554 u8 vport_cvlan_strip[0x1];
555 u8 vport_svlan_insert[0x1];
556 u8 vport_cvlan_insert_if_not_exist[0x1];
557 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300558 u8 reserved_at_5[0x19];
559 u8 nic_vport_node_guid_modify[0x1];
560 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200561
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300562 u8 vxlan_encap_decap[0x1];
563 u8 nvgre_encap_decap[0x1];
564 u8 reserved_at_22[0x9];
565 u8 log_max_encap_headers[0x5];
566 u8 reserved_2b[0x6];
567 u8 max_encap_header_size[0xa];
568
569 u8 reserved_40[0x7c0];
570
Saeed Mahameedd6666752015-12-01 18:03:22 +0200571};
572
Saeed Mahameed74862162016-06-09 15:11:34 +0300573struct mlx5_ifc_qos_cap_bits {
574 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200576 u8 esw_bw_share[0x1];
577 u8 esw_rate_limit[0x1];
578 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
580 u8 reserved_at_20[0x20];
581
Saeed Mahameed74862162016-06-09 15:11:34 +0300582 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300583
Saeed Mahameed74862162016-06-09 15:11:34 +0300584 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300585
586 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300587 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300588
589 u8 esw_element_type[0x10];
590 u8 esw_tsar_type[0x10];
591
592 u8 reserved_at_c0[0x10];
593 u8 max_qos_para_vport[0x10];
594
595 u8 max_tsar_bw_share[0x20];
596
597 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300598};
599
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300600struct mlx5_ifc_debug_cap_bits {
601 u8 reserved_at_0[0x20];
602
603 u8 reserved_at_20[0x2];
604 u8 stall_detect[0x1];
605 u8 reserved_at_23[0x1d];
606
607 u8 reserved_at_40[0x7c0];
608};
609
Saeed Mahameede2816822015-05-28 22:28:40 +0300610struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
611 u8 csum_cap[0x1];
612 u8 vlan_cap[0x1];
613 u8 lro_cap[0x1];
614 u8 lro_psh_flag[0x1];
615 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200616 u8 reserved_at_5[0x2];
617 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200618 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200621 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300622 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300624 u8 reg_umr_sq[0x1];
625 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300626 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300629 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 tunnel_stateless_vxlan[0x1];
631
Ilan Tayari547eede2017-04-18 16:04:28 +0300632 u8 swp[0x1];
633 u8 swp_csum[0x1];
634 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300635 u8 reserved_at_23[0x1b];
636 u8 max_geneve_opt_len[0x1];
637 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 lro_min_mss_size[0x10];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643
644 u8 lro_timer_supported_periods[4][0x20];
645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647};
648
649struct mlx5_ifc_roce_cap_bits {
650 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652
Matan Barakb4ff3a32016-02-09 14:57:42 +0200653 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300654
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200657 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300658 u8 roce_version[0x8];
659
Matan Barakb4ff3a32016-02-09 14:57:42 +0200660 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300661 u8 r_roce_dest_udp_port[0x10];
662
663 u8 r_roce_max_src_udp_port[0x10];
664 u8 r_roce_min_src_udp_port[0x10];
665
Matan Barakb4ff3a32016-02-09 14:57:42 +0200666 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667 u8 roce_address_table_size[0x10];
668
Matan Barakb4ff3a32016-02-09 14:57:42 +0200669 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300670};
671
672enum {
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
678 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
679 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
680 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
682};
683
684enum {
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
690 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
691 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
692 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
693 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
694};
695
696struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Or Gerlitzbd108382017-05-28 15:24:17 +0300699 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300701 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300702
Matan Barakb4ff3a32016-02-09 14:57:42 +0200703 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300704
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200708 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709
Matan Barakb4ff3a32016-02-09 14:57:42 +0200710 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200711 u8 atomic_size_qp[0x10];
712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714 u8 atomic_size_dc[0x10];
715
Matan Barakb4ff3a32016-02-09 14:57:42 +0200716 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300717};
718
719struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200720 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300721
722 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200723 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300724
Matan Barakb4ff3a32016-02-09 14:57:42 +0200725 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300726
727 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
728
729 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
730
731 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
732
Matan Barakb4ff3a32016-02-09 14:57:42 +0200733 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300734};
735
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200736struct mlx5_ifc_calc_op {
737 u8 reserved_at_0[0x10];
738 u8 reserved_at_10[0x9];
739 u8 op_swap_endianness[0x1];
740 u8 op_min[0x1];
741 u8 op_xor[0x1];
742 u8 op_or[0x1];
743 u8 op_and[0x1];
744 u8 op_max[0x1];
745 u8 op_add[0x1];
746};
747
748struct mlx5_ifc_vector_calc_cap_bits {
749 u8 calc_matrix[0x1];
750 u8 reserved_at_1[0x1f];
751 u8 reserved_at_20[0x8];
752 u8 max_vec_count[0x8];
753 u8 reserved_at_30[0xd];
754 u8 max_chunk_size[0x3];
755 struct mlx5_ifc_calc_op calc0;
756 struct mlx5_ifc_calc_op calc1;
757 struct mlx5_ifc_calc_op calc2;
758 struct mlx5_ifc_calc_op calc3;
759
760 u8 reserved_at_e0[0x720];
761};
762
Saeed Mahameede2816822015-05-28 22:28:40 +0300763enum {
764 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
765 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300766 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300767 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300768};
769
770enum {
771 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
772 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
773};
774
775enum {
776 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
777 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
778 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
779 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
780 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
781};
782
783enum {
784 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
785 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
786 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
787 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
788 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
789 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
790};
791
792enum {
793 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
794 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
795};
796
797enum {
798 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
799 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
800 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
801};
802
803enum {
804 MLX5_CAP_PORT_TYPE_IB = 0x0,
805 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300806};
807
Max Gurtovoy1410a902017-05-28 10:53:10 +0300808enum {
809 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
810 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
811 MLX5_CAP_UMR_FENCE_NONE = 0x2,
812};
813
Eli Cohenb7755162014-10-02 12:19:44 +0300814struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200815 u8 reserved_at_0[0x30];
816 u8 vhca_id[0x10];
817
818 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300819
820 u8 log_max_srq_sz[0x8];
821 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_qp[0x5];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300826 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300828
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_cq[0x5];
833
834 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200835 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300836 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200837 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300838 u8 log_max_eq[0x4];
839
840 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200841 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200843 u8 force_teardown[0x1];
844 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200846 u8 umr_extended_translation_offset[0x1];
847 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300848 u8 log_max_klm_list_size[0x6];
849
Matan Barakb4ff3a32016-02-09 14:57:42 +0200850 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300851 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200852 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 log_max_ra_res_dc[0x6];
854
Matan Barakb4ff3a32016-02-09 14:57:42 +0200855 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300856 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200857 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 log_max_ra_res_qp[0x6];
859
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200860 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 cc_query_allowed[0x1];
862 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200863 u8 start_pad[0x1];
864 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500865 u8 reserved_at_165[0xa];
866 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300867 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300868
Saeed Mahameede2816822015-05-28 22:28:40 +0300869 u8 out_of_seq_cnt[0x1];
870 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300871 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300872 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300873 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300874 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300875 u8 max_qp_cnt[0xa];
876 u8 pkey_table_size[0x10];
877
Saeed Mahameede2816822015-05-28 22:28:40 +0300878 u8 vport_group_manager[0x1];
879 u8 vhca_group_manager[0x1];
880 u8 ib_virt[0x1];
881 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200882 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300883 u8 ets[0x1];
884 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200885 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300886 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200887 u8 mcam_reg[0x1];
888 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300889 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200890 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300891 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300892 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200893 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 disable_link_up[0x1];
895 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300896 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300897 u8 num_ports[0x8];
898
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300899 u8 reserved_at_1c0[0x1];
900 u8 pps[0x1];
901 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300903 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200904 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300905 u8 reserved_at_1d0[0x1];
906 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300907 u8 general_notification_event[0x1];
908 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200909 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200910 u8 rol_s[0x1];
911 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300912 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200913 u8 wol_s[0x1];
914 u8 wol_g[0x1];
915 u8 wol_a[0x1];
916 u8 wol_b[0x1];
917 u8 wol_m[0x1];
918 u8 wol_u[0x1];
919 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920
921 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300924
Saeed Mahameede2816822015-05-28 22:28:40 +0300925 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300926 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300927 u8 reserved_at_202[0x1];
928 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200929 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300930 u8 reserved_at_205[0x5];
931 u8 umr_fence[0x2];
932 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 cmdif_checksum[0x2];
935 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 wq_signature[0x1];
938 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300940 u8 sho[0x1];
941 u8 tph[0x1];
942 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300943 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300944 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300945 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 roce[0x1];
947 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300949
950 u8 cq_oi[0x1];
951 u8 cq_resize[0x1];
952 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300954 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 pg[0x1];
956 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300957 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300959 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200963 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300964 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200965 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 qkv[0x1];
968 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200969 u8 set_deth_sqpn[0x1];
970 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 xrc[0x1];
972 u8 ud[0x1];
973 u8 uc[0x1];
974 u8 rc[0x1];
975
Eli Cohena6d51b62017-01-03 23:55:23 +0200976 u8 uar_4k[0x1];
977 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_pg_sz[0x8];
981
982 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200983 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300987
988 u8 reserved_at_270[0xb];
989 u8 lag_master[0x1];
990 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300991
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300993 u8 max_wqe_sz_sq[0x10];
994
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 max_wqe_sz_rq[0x10];
997
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300998 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 max_wqe_sz_sq_dc[0x10];
1000
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 max_qp_mcg[0x19];
1003
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_mcg[0x8];
1006
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 log_max_xrcd[0x5];
1013
Moshe Shemesh5c298142017-12-26 16:46:29 +02001014 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001015 u8 receive_discard_vport_down[0x1];
1016 u8 transmit_discard_vport_down[0x1];
1017 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001018 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001019 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001020
Eli Cohenb7755162014-10-02 12:19:44 +03001021
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001023 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001025 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001027 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001029 u8 log_max_tis[0x5];
1030
Saeed Mahameede2816822015-05-28 22:28:40 +03001031 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001033 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001035 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001037 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_max_tis_per_sq[0x5];
1040
Tariq Toukane1c9c622016-04-11 23:10:21 +03001041 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001042 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001044 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001046 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001047 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001048 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001049
Or Gerlitz40817cd2017-06-25 12:38:45 +03001050 u8 hairpin[0x1];
1051 u8 reserved_at_3c1[0x2];
1052 u8 log_max_hairpin_queues[0x5];
1053 u8 reserved_at_3c8[0x3];
1054 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001055 u8 reserved_at_3d0[0x3];
1056 u8 log_max_hairpin_num_packets[0x5];
1057 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001058 u8 log_max_wq_sz[0x5];
1059
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001060 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001061 u8 disable_local_lb_uc[0x1];
1062 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001063 u8 log_min_hairpin_wq_data_sz[0x5];
1064 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001065 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001066 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001067 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001068 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001069 u8 log_max_current_uc_list[0x5];
1070
Tariq Toukane1c9c622016-04-11 23:10:21 +03001071 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001072
Tariq Toukane1c9c622016-04-11 23:10:21 +03001073 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001074 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001075 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001076 u8 log_uar_page_sz[0x10];
1077
Tariq Toukane1c9c622016-04-11 23:10:21 +03001078 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001079 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001080 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001081
Eli Cohena6d51b62017-01-03 23:55:23 +02001082 u8 reserved_at_500[0x20];
1083 u8 num_of_uars_per_page[0x20];
1084 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001085
Guy Levi0ff8e792017-10-19 08:25:51 +03001086 u8 reserved_at_580[0x3d];
1087 u8 cqe_128_always[0x1];
1088 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001089 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001090
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001091 u8 cqe_compression_timeout[0x10];
1092 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001093
Saeed Mahameed74862162016-06-09 15:11:34 +03001094 u8 reserved_at_5e0[0x10];
1095 u8 tag_matching[0x1];
1096 u8 rndv_offload_rc[0x1];
1097 u8 rndv_offload_dc[0x1];
1098 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001099 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001100 u8 log_max_xrq[0x5];
1101
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001102 u8 affiliate_nic_vport_criteria[0x8];
1103 u8 native_port_num[0x8];
1104 u8 num_vhca_ports[0x8];
1105 u8 reserved_at_618[0x6];
1106 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001107 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001108};
1109
Saeed Mahameed81848732015-12-01 18:03:20 +02001110enum mlx5_flow_destination_type {
1111 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1112 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1113 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001114
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001115 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001116 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001117};
1118
1119struct mlx5_ifc_dest_format_struct_bits {
1120 u8 destination_type[0x8];
1121 u8 destination_id[0x18];
1122
Matan Barakb4ff3a32016-02-09 14:57:42 +02001123 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001124};
1125
Amir Vadai9dc0b282016-05-13 12:55:39 +00001126struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001127 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001128
1129 u8 reserved_at_20[0x20];
1130};
1131
1132union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1133 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1134 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1135 u8 reserved_at_0[0x40];
1136};
1137
Saeed Mahameede2816822015-05-28 22:28:40 +03001138struct mlx5_ifc_fte_match_param_bits {
1139 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1140
1141 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1142
1143 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1144
Matan Barakb4ff3a32016-02-09 14:57:42 +02001145 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146};
1147
1148enum {
1149 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1150 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1151 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1152 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1153 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1154};
1155
1156struct mlx5_ifc_rx_hash_field_select_bits {
1157 u8 l3_prot_type[0x1];
1158 u8 l4_prot_type[0x1];
1159 u8 selected_fields[0x1e];
1160};
1161
1162enum {
1163 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1164 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1165};
1166
1167enum {
1168 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1169 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1170};
1171
1172struct mlx5_ifc_wq_bits {
1173 u8 wq_type[0x4];
1174 u8 wq_signature[0x1];
1175 u8 end_padding_mode[0x2];
1176 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001178
1179 u8 hds_skip_first_sge[0x1];
1180 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001181 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001182 u8 page_offset[0x5];
1183 u8 lwm[0x10];
1184
Matan Barakb4ff3a32016-02-09 14:57:42 +02001185 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001186 u8 pd[0x18];
1187
Matan Barakb4ff3a32016-02-09 14:57:42 +02001188 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001189 u8 uar_page[0x18];
1190
1191 u8 dbr_addr[0x40];
1192
1193 u8 hw_counter[0x20];
1194
1195 u8 sw_counter[0x20];
1196
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202 u8 log_wq_sz[0x5];
1203
Or Gerlitz4d533e02018-01-04 12:26:21 +02001204 u8 reserved_at_120[0x3];
1205 u8 log_hairpin_num_packets[0x5];
1206 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001207 u8 log_hairpin_data_sz[0x5];
1208 u8 reserved_at_130[0x5];
1209
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001210 u8 log_wqe_num_of_strides[0x3];
1211 u8 two_byte_shift_en[0x1];
1212 u8 reserved_at_139[0x4];
1213 u8 log_wqe_stride_size[0x3];
1214
1215 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216
1217 struct mlx5_ifc_cmd_pas_bits pas[0];
1218};
1219
1220struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001221 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001222 u8 rq_num[0x18];
1223};
1224
1225struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001226 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001227 u8 mac_addr_47_32[0x10];
1228
1229 u8 mac_addr_31_0[0x20];
1230};
1231
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001232struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001234 u8 vlan[0x0c];
1235
Matan Barakb4ff3a32016-02-09 14:57:42 +02001236 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001237};
1238
Saeed Mahameede2816822015-05-28 22:28:40 +03001239struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001240 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001241
1242 u8 min_time_between_cnps[0x20];
1243
Matan Barakb4ff3a32016-02-09 14:57:42 +02001244 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001245 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001246 u8 reserved_at_d8[0x4];
1247 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248 u8 cnp_802p_prio[0x3];
1249
Matan Barakb4ff3a32016-02-09 14:57:42 +02001250 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001251};
1252
1253struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001254 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001255
Matan Barakb4ff3a32016-02-09 14:57:42 +02001256 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001257 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001258 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001259 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001260 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001261
Matan Barakb4ff3a32016-02-09 14:57:42 +02001262 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001263
1264 u8 rpg_time_reset[0x20];
1265
1266 u8 rpg_byte_reset[0x20];
1267
1268 u8 rpg_threshold[0x20];
1269
1270 u8 rpg_max_rate[0x20];
1271
1272 u8 rpg_ai_rate[0x20];
1273
1274 u8 rpg_hai_rate[0x20];
1275
1276 u8 rpg_gd[0x20];
1277
1278 u8 rpg_min_dec_fac[0x20];
1279
1280 u8 rpg_min_rate[0x20];
1281
Matan Barakb4ff3a32016-02-09 14:57:42 +02001282 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001283
1284 u8 rate_to_set_on_first_cnp[0x20];
1285
1286 u8 dce_tcp_g[0x20];
1287
1288 u8 dce_tcp_rtt[0x20];
1289
1290 u8 rate_reduce_monitor_period[0x20];
1291
Matan Barakb4ff3a32016-02-09 14:57:42 +02001292 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001293
1294 u8 initial_alpha_value[0x20];
1295
Matan Barakb4ff3a32016-02-09 14:57:42 +02001296 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001297};
1298
1299struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001300 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001301
1302 u8 rppp_max_rps[0x20];
1303
1304 u8 rpg_time_reset[0x20];
1305
1306 u8 rpg_byte_reset[0x20];
1307
1308 u8 rpg_threshold[0x20];
1309
1310 u8 rpg_max_rate[0x20];
1311
1312 u8 rpg_ai_rate[0x20];
1313
1314 u8 rpg_hai_rate[0x20];
1315
1316 u8 rpg_gd[0x20];
1317
1318 u8 rpg_min_dec_fac[0x20];
1319
1320 u8 rpg_min_rate[0x20];
1321
Matan Barakb4ff3a32016-02-09 14:57:42 +02001322 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001323};
1324
1325enum {
1326 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1327 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1328 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1329};
1330
1331struct mlx5_ifc_resize_field_select_bits {
1332 u8 resize_field_select[0x20];
1333};
1334
1335enum {
1336 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1337 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1338 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1339 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1340};
1341
1342struct mlx5_ifc_modify_field_select_bits {
1343 u8 modify_field_select[0x20];
1344};
1345
1346struct mlx5_ifc_field_select_r_roce_np_bits {
1347 u8 field_select_r_roce_np[0x20];
1348};
1349
1350struct mlx5_ifc_field_select_r_roce_rp_bits {
1351 u8 field_select_r_roce_rp[0x20];
1352};
1353
1354enum {
1355 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1356 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1357 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1358 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1359 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1360 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1361 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1362 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1363 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1364 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1365};
1366
1367struct mlx5_ifc_field_select_802_1qau_rp_bits {
1368 u8 field_select_8021qaurp[0x20];
1369};
1370
1371struct mlx5_ifc_phys_layer_cntrs_bits {
1372 u8 time_since_last_clear_high[0x20];
1373
1374 u8 time_since_last_clear_low[0x20];
1375
1376 u8 symbol_errors_high[0x20];
1377
1378 u8 symbol_errors_low[0x20];
1379
1380 u8 sync_headers_errors_high[0x20];
1381
1382 u8 sync_headers_errors_low[0x20];
1383
1384 u8 edpl_bip_errors_lane0_high[0x20];
1385
1386 u8 edpl_bip_errors_lane0_low[0x20];
1387
1388 u8 edpl_bip_errors_lane1_high[0x20];
1389
1390 u8 edpl_bip_errors_lane1_low[0x20];
1391
1392 u8 edpl_bip_errors_lane2_high[0x20];
1393
1394 u8 edpl_bip_errors_lane2_low[0x20];
1395
1396 u8 edpl_bip_errors_lane3_high[0x20];
1397
1398 u8 edpl_bip_errors_lane3_low[0x20];
1399
1400 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1401
1402 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1403
1404 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1405
1406 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1407
1408 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1409
1410 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1411
1412 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1413
1414 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1415
1416 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1417
1418 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1419
1420 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1421
1422 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1423
1424 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1425
1426 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1427
1428 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1429
1430 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1431
1432 u8 rs_fec_corrected_blocks_high[0x20];
1433
1434 u8 rs_fec_corrected_blocks_low[0x20];
1435
1436 u8 rs_fec_uncorrectable_blocks_high[0x20];
1437
1438 u8 rs_fec_uncorrectable_blocks_low[0x20];
1439
1440 u8 rs_fec_no_errors_blocks_high[0x20];
1441
1442 u8 rs_fec_no_errors_blocks_low[0x20];
1443
1444 u8 rs_fec_single_error_blocks_high[0x20];
1445
1446 u8 rs_fec_single_error_blocks_low[0x20];
1447
1448 u8 rs_fec_corrected_symbols_total_high[0x20];
1449
1450 u8 rs_fec_corrected_symbols_total_low[0x20];
1451
1452 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1453
1454 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1455
1456 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1457
1458 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1459
1460 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1461
1462 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1463
1464 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1465
1466 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1467
1468 u8 link_down_events[0x20];
1469
1470 u8 successful_recovery_events[0x20];
1471
Matan Barakb4ff3a32016-02-09 14:57:42 +02001472 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001473};
1474
Gal Pressmand8dc0502016-09-27 17:04:51 +03001475struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1476 u8 time_since_last_clear_high[0x20];
1477
1478 u8 time_since_last_clear_low[0x20];
1479
1480 u8 phy_received_bits_high[0x20];
1481
1482 u8 phy_received_bits_low[0x20];
1483
1484 u8 phy_symbol_errors_high[0x20];
1485
1486 u8 phy_symbol_errors_low[0x20];
1487
1488 u8 phy_corrected_bits_high[0x20];
1489
1490 u8 phy_corrected_bits_low[0x20];
1491
1492 u8 phy_corrected_bits_lane0_high[0x20];
1493
1494 u8 phy_corrected_bits_lane0_low[0x20];
1495
1496 u8 phy_corrected_bits_lane1_high[0x20];
1497
1498 u8 phy_corrected_bits_lane1_low[0x20];
1499
1500 u8 phy_corrected_bits_lane2_high[0x20];
1501
1502 u8 phy_corrected_bits_lane2_low[0x20];
1503
1504 u8 phy_corrected_bits_lane3_high[0x20];
1505
1506 u8 phy_corrected_bits_lane3_low[0x20];
1507
1508 u8 reserved_at_200[0x5c0];
1509};
1510
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001511struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1512 u8 symbol_error_counter[0x10];
1513
1514 u8 link_error_recovery_counter[0x8];
1515
1516 u8 link_downed_counter[0x8];
1517
1518 u8 port_rcv_errors[0x10];
1519
1520 u8 port_rcv_remote_physical_errors[0x10];
1521
1522 u8 port_rcv_switch_relay_errors[0x10];
1523
1524 u8 port_xmit_discards[0x10];
1525
1526 u8 port_xmit_constraint_errors[0x8];
1527
1528 u8 port_rcv_constraint_errors[0x8];
1529
1530 u8 reserved_at_70[0x8];
1531
1532 u8 link_overrun_errors[0x8];
1533
1534 u8 reserved_at_80[0x10];
1535
1536 u8 vl_15_dropped[0x10];
1537
Tim Wright133bea02017-05-01 17:30:08 +01001538 u8 reserved_at_a0[0x80];
1539
1540 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001541};
1542
Saeed Mahameede2816822015-05-28 22:28:40 +03001543struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1544 u8 transmit_queue_high[0x20];
1545
1546 u8 transmit_queue_low[0x20];
1547
Matan Barakb4ff3a32016-02-09 14:57:42 +02001548 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001549};
1550
1551struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1552 u8 rx_octets_high[0x20];
1553
1554 u8 rx_octets_low[0x20];
1555
Matan Barakb4ff3a32016-02-09 14:57:42 +02001556 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001557
1558 u8 rx_frames_high[0x20];
1559
1560 u8 rx_frames_low[0x20];
1561
1562 u8 tx_octets_high[0x20];
1563
1564 u8 tx_octets_low[0x20];
1565
Matan Barakb4ff3a32016-02-09 14:57:42 +02001566 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001567
1568 u8 tx_frames_high[0x20];
1569
1570 u8 tx_frames_low[0x20];
1571
1572 u8 rx_pause_high[0x20];
1573
1574 u8 rx_pause_low[0x20];
1575
1576 u8 rx_pause_duration_high[0x20];
1577
1578 u8 rx_pause_duration_low[0x20];
1579
1580 u8 tx_pause_high[0x20];
1581
1582 u8 tx_pause_low[0x20];
1583
1584 u8 tx_pause_duration_high[0x20];
1585
1586 u8 tx_pause_duration_low[0x20];
1587
1588 u8 rx_pause_transition_high[0x20];
1589
1590 u8 rx_pause_transition_low[0x20];
1591
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001592 u8 reserved_at_3c0[0x40];
1593
1594 u8 device_stall_minor_watermark_cnt_high[0x20];
1595
1596 u8 device_stall_minor_watermark_cnt_low[0x20];
1597
1598 u8 device_stall_critical_watermark_cnt_high[0x20];
1599
1600 u8 device_stall_critical_watermark_cnt_low[0x20];
1601
1602 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001603};
1604
1605struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1606 u8 port_transmit_wait_high[0x20];
1607
1608 u8 port_transmit_wait_low[0x20];
1609
Gal Pressman2dba0792017-06-18 14:56:45 +03001610 u8 reserved_at_40[0x100];
1611
1612 u8 rx_buffer_almost_full_high[0x20];
1613
1614 u8 rx_buffer_almost_full_low[0x20];
1615
1616 u8 rx_buffer_full_high[0x20];
1617
1618 u8 rx_buffer_full_low[0x20];
1619
1620 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001621};
1622
1623struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1624 u8 dot3stats_alignment_errors_high[0x20];
1625
1626 u8 dot3stats_alignment_errors_low[0x20];
1627
1628 u8 dot3stats_fcs_errors_high[0x20];
1629
1630 u8 dot3stats_fcs_errors_low[0x20];
1631
1632 u8 dot3stats_single_collision_frames_high[0x20];
1633
1634 u8 dot3stats_single_collision_frames_low[0x20];
1635
1636 u8 dot3stats_multiple_collision_frames_high[0x20];
1637
1638 u8 dot3stats_multiple_collision_frames_low[0x20];
1639
1640 u8 dot3stats_sqe_test_errors_high[0x20];
1641
1642 u8 dot3stats_sqe_test_errors_low[0x20];
1643
1644 u8 dot3stats_deferred_transmissions_high[0x20];
1645
1646 u8 dot3stats_deferred_transmissions_low[0x20];
1647
1648 u8 dot3stats_late_collisions_high[0x20];
1649
1650 u8 dot3stats_late_collisions_low[0x20];
1651
1652 u8 dot3stats_excessive_collisions_high[0x20];
1653
1654 u8 dot3stats_excessive_collisions_low[0x20];
1655
1656 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1657
1658 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1659
1660 u8 dot3stats_carrier_sense_errors_high[0x20];
1661
1662 u8 dot3stats_carrier_sense_errors_low[0x20];
1663
1664 u8 dot3stats_frame_too_longs_high[0x20];
1665
1666 u8 dot3stats_frame_too_longs_low[0x20];
1667
1668 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1669
1670 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1671
1672 u8 dot3stats_symbol_errors_high[0x20];
1673
1674 u8 dot3stats_symbol_errors_low[0x20];
1675
1676 u8 dot3control_in_unknown_opcodes_high[0x20];
1677
1678 u8 dot3control_in_unknown_opcodes_low[0x20];
1679
1680 u8 dot3in_pause_frames_high[0x20];
1681
1682 u8 dot3in_pause_frames_low[0x20];
1683
1684 u8 dot3out_pause_frames_high[0x20];
1685
1686 u8 dot3out_pause_frames_low[0x20];
1687
Matan Barakb4ff3a32016-02-09 14:57:42 +02001688 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001689};
1690
1691struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1692 u8 ether_stats_drop_events_high[0x20];
1693
1694 u8 ether_stats_drop_events_low[0x20];
1695
1696 u8 ether_stats_octets_high[0x20];
1697
1698 u8 ether_stats_octets_low[0x20];
1699
1700 u8 ether_stats_pkts_high[0x20];
1701
1702 u8 ether_stats_pkts_low[0x20];
1703
1704 u8 ether_stats_broadcast_pkts_high[0x20];
1705
1706 u8 ether_stats_broadcast_pkts_low[0x20];
1707
1708 u8 ether_stats_multicast_pkts_high[0x20];
1709
1710 u8 ether_stats_multicast_pkts_low[0x20];
1711
1712 u8 ether_stats_crc_align_errors_high[0x20];
1713
1714 u8 ether_stats_crc_align_errors_low[0x20];
1715
1716 u8 ether_stats_undersize_pkts_high[0x20];
1717
1718 u8 ether_stats_undersize_pkts_low[0x20];
1719
1720 u8 ether_stats_oversize_pkts_high[0x20];
1721
1722 u8 ether_stats_oversize_pkts_low[0x20];
1723
1724 u8 ether_stats_fragments_high[0x20];
1725
1726 u8 ether_stats_fragments_low[0x20];
1727
1728 u8 ether_stats_jabbers_high[0x20];
1729
1730 u8 ether_stats_jabbers_low[0x20];
1731
1732 u8 ether_stats_collisions_high[0x20];
1733
1734 u8 ether_stats_collisions_low[0x20];
1735
1736 u8 ether_stats_pkts64octets_high[0x20];
1737
1738 u8 ether_stats_pkts64octets_low[0x20];
1739
1740 u8 ether_stats_pkts65to127octets_high[0x20];
1741
1742 u8 ether_stats_pkts65to127octets_low[0x20];
1743
1744 u8 ether_stats_pkts128to255octets_high[0x20];
1745
1746 u8 ether_stats_pkts128to255octets_low[0x20];
1747
1748 u8 ether_stats_pkts256to511octets_high[0x20];
1749
1750 u8 ether_stats_pkts256to511octets_low[0x20];
1751
1752 u8 ether_stats_pkts512to1023octets_high[0x20];
1753
1754 u8 ether_stats_pkts512to1023octets_low[0x20];
1755
1756 u8 ether_stats_pkts1024to1518octets_high[0x20];
1757
1758 u8 ether_stats_pkts1024to1518octets_low[0x20];
1759
1760 u8 ether_stats_pkts1519to2047octets_high[0x20];
1761
1762 u8 ether_stats_pkts1519to2047octets_low[0x20];
1763
1764 u8 ether_stats_pkts2048to4095octets_high[0x20];
1765
1766 u8 ether_stats_pkts2048to4095octets_low[0x20];
1767
1768 u8 ether_stats_pkts4096to8191octets_high[0x20];
1769
1770 u8 ether_stats_pkts4096to8191octets_low[0x20];
1771
1772 u8 ether_stats_pkts8192to10239octets_high[0x20];
1773
1774 u8 ether_stats_pkts8192to10239octets_low[0x20];
1775
Matan Barakb4ff3a32016-02-09 14:57:42 +02001776 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001777};
1778
1779struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1780 u8 if_in_octets_high[0x20];
1781
1782 u8 if_in_octets_low[0x20];
1783
1784 u8 if_in_ucast_pkts_high[0x20];
1785
1786 u8 if_in_ucast_pkts_low[0x20];
1787
1788 u8 if_in_discards_high[0x20];
1789
1790 u8 if_in_discards_low[0x20];
1791
1792 u8 if_in_errors_high[0x20];
1793
1794 u8 if_in_errors_low[0x20];
1795
1796 u8 if_in_unknown_protos_high[0x20];
1797
1798 u8 if_in_unknown_protos_low[0x20];
1799
1800 u8 if_out_octets_high[0x20];
1801
1802 u8 if_out_octets_low[0x20];
1803
1804 u8 if_out_ucast_pkts_high[0x20];
1805
1806 u8 if_out_ucast_pkts_low[0x20];
1807
1808 u8 if_out_discards_high[0x20];
1809
1810 u8 if_out_discards_low[0x20];
1811
1812 u8 if_out_errors_high[0x20];
1813
1814 u8 if_out_errors_low[0x20];
1815
1816 u8 if_in_multicast_pkts_high[0x20];
1817
1818 u8 if_in_multicast_pkts_low[0x20];
1819
1820 u8 if_in_broadcast_pkts_high[0x20];
1821
1822 u8 if_in_broadcast_pkts_low[0x20];
1823
1824 u8 if_out_multicast_pkts_high[0x20];
1825
1826 u8 if_out_multicast_pkts_low[0x20];
1827
1828 u8 if_out_broadcast_pkts_high[0x20];
1829
1830 u8 if_out_broadcast_pkts_low[0x20];
1831
Matan Barakb4ff3a32016-02-09 14:57:42 +02001832 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001833};
1834
1835struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1836 u8 a_frames_transmitted_ok_high[0x20];
1837
1838 u8 a_frames_transmitted_ok_low[0x20];
1839
1840 u8 a_frames_received_ok_high[0x20];
1841
1842 u8 a_frames_received_ok_low[0x20];
1843
1844 u8 a_frame_check_sequence_errors_high[0x20];
1845
1846 u8 a_frame_check_sequence_errors_low[0x20];
1847
1848 u8 a_alignment_errors_high[0x20];
1849
1850 u8 a_alignment_errors_low[0x20];
1851
1852 u8 a_octets_transmitted_ok_high[0x20];
1853
1854 u8 a_octets_transmitted_ok_low[0x20];
1855
1856 u8 a_octets_received_ok_high[0x20];
1857
1858 u8 a_octets_received_ok_low[0x20];
1859
1860 u8 a_multicast_frames_xmitted_ok_high[0x20];
1861
1862 u8 a_multicast_frames_xmitted_ok_low[0x20];
1863
1864 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1865
1866 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1867
1868 u8 a_multicast_frames_received_ok_high[0x20];
1869
1870 u8 a_multicast_frames_received_ok_low[0x20];
1871
1872 u8 a_broadcast_frames_received_ok_high[0x20];
1873
1874 u8 a_broadcast_frames_received_ok_low[0x20];
1875
1876 u8 a_in_range_length_errors_high[0x20];
1877
1878 u8 a_in_range_length_errors_low[0x20];
1879
1880 u8 a_out_of_range_length_field_high[0x20];
1881
1882 u8 a_out_of_range_length_field_low[0x20];
1883
1884 u8 a_frame_too_long_errors_high[0x20];
1885
1886 u8 a_frame_too_long_errors_low[0x20];
1887
1888 u8 a_symbol_error_during_carrier_high[0x20];
1889
1890 u8 a_symbol_error_during_carrier_low[0x20];
1891
1892 u8 a_mac_control_frames_transmitted_high[0x20];
1893
1894 u8 a_mac_control_frames_transmitted_low[0x20];
1895
1896 u8 a_mac_control_frames_received_high[0x20];
1897
1898 u8 a_mac_control_frames_received_low[0x20];
1899
1900 u8 a_unsupported_opcodes_received_high[0x20];
1901
1902 u8 a_unsupported_opcodes_received_low[0x20];
1903
1904 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1905
1906 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1907
1908 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1909
1910 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1911
Matan Barakb4ff3a32016-02-09 14:57:42 +02001912 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001913};
1914
Gal Pressman8ed1a632016-11-17 13:46:01 +02001915struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1916 u8 life_time_counter_high[0x20];
1917
1918 u8 life_time_counter_low[0x20];
1919
1920 u8 rx_errors[0x20];
1921
1922 u8 tx_errors[0x20];
1923
1924 u8 l0_to_recovery_eieos[0x20];
1925
1926 u8 l0_to_recovery_ts[0x20];
1927
1928 u8 l0_to_recovery_framing[0x20];
1929
1930 u8 l0_to_recovery_retrain[0x20];
1931
1932 u8 crc_error_dllp[0x20];
1933
1934 u8 crc_error_tlp[0x20];
1935
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001936 u8 tx_overflow_buffer_pkt_high[0x20];
1937
1938 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001939
1940 u8 outbound_stalled_reads[0x20];
1941
1942 u8 outbound_stalled_writes[0x20];
1943
1944 u8 outbound_stalled_reads_events[0x20];
1945
1946 u8 outbound_stalled_writes_events[0x20];
1947
1948 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001949};
1950
Saeed Mahameede2816822015-05-28 22:28:40 +03001951struct mlx5_ifc_cmd_inter_comp_event_bits {
1952 u8 command_completion_vector[0x20];
1953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955};
1956
1957struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001960 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001961 u8 vl[0x4];
1962
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964};
1965
1966struct mlx5_ifc_db_bf_congestion_event_bits {
1967 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001970 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001971
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973};
1974
1975struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001976 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001977
1978 u8 gpio_event_hi[0x20];
1979
1980 u8 gpio_event_lo[0x20];
1981
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983};
1984
1985struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001986 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001987
1988 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990
Matan Barakb4ff3a32016-02-09 14:57:42 +02001991 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001992};
1993
1994struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001995 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001996};
1997
1998enum {
1999 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2000 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2001};
2002
2003struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002004 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002005 u8 cqn[0x18];
2006
Matan Barakb4ff3a32016-02-09 14:57:42 +02002007 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002008
Matan Barakb4ff3a32016-02-09 14:57:42 +02002009 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002010 u8 syndrome[0x8];
2011
Matan Barakb4ff3a32016-02-09 14:57:42 +02002012 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002013};
2014
2015struct mlx5_ifc_rdma_page_fault_event_bits {
2016 u8 bytes_committed[0x20];
2017
2018 u8 r_key[0x20];
2019
Matan Barakb4ff3a32016-02-09 14:57:42 +02002020 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002021 u8 packet_len[0x10];
2022
2023 u8 rdma_op_len[0x20];
2024
2025 u8 rdma_va[0x40];
2026
Matan Barakb4ff3a32016-02-09 14:57:42 +02002027 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002028 u8 rdma[0x1];
2029 u8 write[0x1];
2030 u8 requestor[0x1];
2031 u8 qp_number[0x18];
2032};
2033
2034struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2035 u8 bytes_committed[0x20];
2036
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038 u8 wqe_index[0x10];
2039
Matan Barakb4ff3a32016-02-09 14:57:42 +02002040 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002041 u8 len[0x10];
2042
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044
Matan Barakb4ff3a32016-02-09 14:57:42 +02002045 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002046 u8 rdma[0x1];
2047 u8 write_read[0x1];
2048 u8 requestor[0x1];
2049 u8 qpn[0x18];
2050};
2051
2052struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002053 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054
2055 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 qpn_rqn_sqn[0x18];
2060};
2061
2062struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002063 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002064
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 dct_number[0x18];
2067};
2068
2069struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073 u8 cq_number[0x18];
2074};
2075
2076enum {
2077 MLX5_QPC_STATE_RST = 0x0,
2078 MLX5_QPC_STATE_INIT = 0x1,
2079 MLX5_QPC_STATE_RTR = 0x2,
2080 MLX5_QPC_STATE_RTS = 0x3,
2081 MLX5_QPC_STATE_SQER = 0x4,
2082 MLX5_QPC_STATE_ERR = 0x6,
2083 MLX5_QPC_STATE_SQD = 0x7,
2084 MLX5_QPC_STATE_SUSPENDED = 0x9,
2085};
2086
2087enum {
2088 MLX5_QPC_ST_RC = 0x0,
2089 MLX5_QPC_ST_UC = 0x1,
2090 MLX5_QPC_ST_UD = 0x2,
2091 MLX5_QPC_ST_XRC = 0x3,
2092 MLX5_QPC_ST_DCI = 0x5,
2093 MLX5_QPC_ST_QP0 = 0x7,
2094 MLX5_QPC_ST_QP1 = 0x8,
2095 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2096 MLX5_QPC_ST_REG_UMR = 0xc,
2097};
2098
2099enum {
2100 MLX5_QPC_PM_STATE_ARMED = 0x0,
2101 MLX5_QPC_PM_STATE_REARM = 0x1,
2102 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2103 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2104};
2105
2106enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002107 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2108};
2109
2110enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2112 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2113};
2114
2115enum {
2116 MLX5_QPC_MTU_256_BYTES = 0x1,
2117 MLX5_QPC_MTU_512_BYTES = 0x2,
2118 MLX5_QPC_MTU_1K_BYTES = 0x3,
2119 MLX5_QPC_MTU_2K_BYTES = 0x4,
2120 MLX5_QPC_MTU_4K_BYTES = 0x5,
2121 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2122};
2123
2124enum {
2125 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2126 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2127 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2128 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2129 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2130 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2131 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2132 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2133};
2134
2135enum {
2136 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2137 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2138 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2139};
2140
2141enum {
2142 MLX5_QPC_CS_RES_DISABLE = 0x0,
2143 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2144 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2145};
2146
2147struct mlx5_ifc_qpc_bits {
2148 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002149 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002153 u8 reserved_at_15[0x3];
2154 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157
2158 u8 wq_signature[0x1];
2159 u8 block_lb_mc[0x1];
2160 u8 atomic_like_write_en[0x1];
2161 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002164 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002165 u8 pd[0x18];
2166
2167 u8 mtu[0x3];
2168 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002169 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002170 u8 log_rq_size[0x4];
2171 u8 log_rq_stride[0x3];
2172 u8 no_sq[0x1];
2173 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002174 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002176 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002177
2178 u8 counter_set_id[0x8];
2179 u8 uar_page[0x18];
2180
Matan Barakb4ff3a32016-02-09 14:57:42 +02002181 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002182 u8 user_index[0x18];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185 u8 log_page_size[0x5];
2186 u8 remote_qpn[0x18];
2187
2188 struct mlx5_ifc_ads_bits primary_address_path;
2189
2190 struct mlx5_ifc_ads_bits secondary_address_path;
2191
2192 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002195 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002196 u8 retry_count[0x3];
2197 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002198 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199 u8 fre[0x1];
2200 u8 cur_rnr_retry[0x3];
2201 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002202 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002203
Matan Barakb4ff3a32016-02-09 14:57:42 +02002204 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207 u8 next_send_psn[0x18];
2208
Matan Barakb4ff3a32016-02-09 14:57:42 +02002209 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002210 u8 cqn_snd[0x18];
2211
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002212 u8 reserved_at_400[0x8];
2213 u8 deth_sqpn[0x18];
2214
2215 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216
Matan Barakb4ff3a32016-02-09 14:57:42 +02002217 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218 u8 last_acked_psn[0x18];
2219
Matan Barakb4ff3a32016-02-09 14:57:42 +02002220 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221 u8 ssn[0x18];
2222
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 atomic_mode[0x4];
2227 u8 rre[0x1];
2228 u8 rwe[0x1];
2229 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 cd_slave_receive[0x1];
2234 u8 cd_slave_send[0x1];
2235 u8 cd_master[0x1];
2236
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 min_rnr_nak[0x5];
2239 u8 next_rcv_psn[0x18];
2240
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 xrcd[0x18];
2243
Matan Barakb4ff3a32016-02-09 14:57:42 +02002244 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002245 u8 cqn_rcv[0x18];
2246
2247 u8 dbr_addr[0x40];
2248
2249 u8 q_key[0x20];
2250
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002253 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002254
Matan Barakb4ff3a32016-02-09 14:57:42 +02002255 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002256 u8 rmsn[0x18];
2257
2258 u8 hw_sq_wqebb_counter[0x10];
2259 u8 sw_sq_wqebb_counter[0x10];
2260
2261 u8 hw_rq_counter[0x20];
2262
2263 u8 sw_rq_counter[0x20];
2264
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 cgs[0x1];
2269 u8 cs_req[0x8];
2270 u8 cs_res[0x8];
2271
2272 u8 dc_access_key[0x40];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275};
2276
2277struct mlx5_ifc_roce_addr_layout_bits {
2278 u8 source_l3_address[16][0x8];
2279
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281 u8 vlan_valid[0x1];
2282 u8 vlan_id[0xc];
2283 u8 source_mac_47_32[0x10];
2284
2285 u8 source_mac_31_0[0x20];
2286
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288 u8 roce_l3_type[0x4];
2289 u8 roce_version[0x8];
2290
Matan Barakb4ff3a32016-02-09 14:57:42 +02002291 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292};
2293
2294union mlx5_ifc_hca_cap_union_bits {
2295 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2296 struct mlx5_ifc_odp_cap_bits odp_cap;
2297 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2298 struct mlx5_ifc_roce_cap_bits roce_cap;
2299 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2300 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002301 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002302 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002303 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002304 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002305 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307};
2308
2309enum {
2310 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2311 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2312 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002313 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002314 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2315 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002316 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002317 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2318 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2319};
2320
2321struct mlx5_ifc_vlan_bits {
2322 u8 ethtype[0x10];
2323 u8 prio[0x3];
2324 u8 cfi[0x1];
2325 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326};
2327
2328struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002329 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002330
2331 u8 group_id[0x20];
2332
Matan Barakb4ff3a32016-02-09 14:57:42 +02002333 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334 u8 flow_tag[0x18];
2335
Matan Barakb4ff3a32016-02-09 14:57:42 +02002336 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002337 u8 action[0x10];
2338
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340 u8 destination_list_size[0x18];
2341
Amir Vadai9dc0b282016-05-13 12:55:39 +00002342 u8 reserved_at_a0[0x8];
2343 u8 flow_counter_list_size[0x18];
2344
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002345 u8 encap_id[0x20];
2346
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002347 u8 modify_header_id[0x20];
2348
2349 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002350
2351 struct mlx5_ifc_fte_match_param_bits match_value;
2352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354
Amir Vadai9dc0b282016-05-13 12:55:39 +00002355 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356};
2357
2358enum {
2359 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2360 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2361};
2362
2363struct mlx5_ifc_xrc_srqc_bits {
2364 u8 state[0x4];
2365 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367
2368 u8 wq_signature[0x1];
2369 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371 u8 rlky[0x1];
2372 u8 basic_cyclic_rcv_wqe[0x1];
2373 u8 log_rq_stride[0x3];
2374 u8 xrcd[0x18];
2375
2376 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378 u8 cqn[0x18];
2379
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381
2382 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384 u8 log_page_size[0x6];
2385 u8 user_index[0x18];
2386
Matan Barakb4ff3a32016-02-09 14:57:42 +02002387 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390 u8 pd[0x18];
2391
2392 u8 lwm[0x10];
2393 u8 wqe_cnt[0x10];
2394
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396
2397 u8 db_record_addr_h[0x20];
2398
2399 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002400 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403};
2404
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002405struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2406 u8 counter_error_queues[0x20];
2407
2408 u8 total_error_queues[0x20];
2409
2410 u8 send_queue_priority_update_flow[0x20];
2411
2412 u8 reserved_at_60[0x20];
2413
2414 u8 nic_receive_steering_discard[0x40];
2415
2416 u8 receive_discard_vport_down[0x40];
2417
2418 u8 transmit_discard_vport_down[0x40];
2419
2420 u8 reserved_at_140[0xec0];
2421};
2422
Saeed Mahameede2816822015-05-28 22:28:40 +03002423struct mlx5_ifc_traffic_counter_bits {
2424 u8 packets[0x40];
2425
2426 u8 octets[0x40];
2427};
2428
2429struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002430 u8 strict_lag_tx_port_affinity[0x1];
2431 u8 reserved_at_1[0x3];
2432 u8 lag_tx_port_affinity[0x04];
2433
2434 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002435 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002436 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437
Matan Barakb4ff3a32016-02-09 14:57:42 +02002438 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002439
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 transport_domain[0x18];
2442
Erez Shitrit500a3d02017-04-13 06:36:51 +03002443 u8 reserved_at_140[0x8];
2444 u8 underlay_qpn[0x18];
2445 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446};
2447
2448enum {
2449 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2450 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2451};
2452
2453enum {
2454 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2455 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2456};
2457
2458enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002459 MLX5_RX_HASH_FN_NONE = 0x0,
2460 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2461 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002462};
2463
2464enum {
2465 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2466 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2467};
2468
2469struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471
2472 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002473 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002474
Matan Barakb4ff3a32016-02-09 14:57:42 +02002475 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002476
Matan Barakb4ff3a32016-02-09 14:57:42 +02002477 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002478 u8 lro_timeout_period_usecs[0x10];
2479 u8 lro_enable_mask[0x4];
2480 u8 lro_max_ip_payload_size[0x8];
2481
Matan Barakb4ff3a32016-02-09 14:57:42 +02002482 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483
Matan Barakb4ff3a32016-02-09 14:57:42 +02002484 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485 u8 inline_rqn[0x18];
2486
2487 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002488 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 indirect_table[0x18];
2492
2493 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002494 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 self_lb_block[0x2];
2496 u8 transport_domain[0x18];
2497
2498 u8 rx_hash_toeplitz_key[10][0x20];
2499
2500 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2501
2502 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2503
Matan Barakb4ff3a32016-02-09 14:57:42 +02002504 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002505};
2506
2507enum {
2508 MLX5_SRQC_STATE_GOOD = 0x0,
2509 MLX5_SRQC_STATE_ERROR = 0x1,
2510};
2511
2512struct mlx5_ifc_srqc_bits {
2513 u8 state[0x4];
2514 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002516
2517 u8 wq_signature[0x1];
2518 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522 u8 log_rq_stride[0x3];
2523 u8 xrcd[0x18];
2524
2525 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527 u8 cqn[0x18];
2528
Matan Barakb4ff3a32016-02-09 14:57:42 +02002529 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536
Matan Barakb4ff3a32016-02-09 14:57:42 +02002537 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002538 u8 pd[0x18];
2539
2540 u8 lwm[0x10];
2541 u8 wqe_cnt[0x10];
2542
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002545 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548};
2549
2550enum {
2551 MLX5_SQC_STATE_RST = 0x0,
2552 MLX5_SQC_STATE_RDY = 0x1,
2553 MLX5_SQC_STATE_ERR = 0x3,
2554};
2555
2556struct mlx5_ifc_sqc_bits {
2557 u8 rlky[0x1];
2558 u8 cd_master[0x1];
2559 u8 fre[0x1];
2560 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002561 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002562 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002564 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002565 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002566 u8 hairpin[0x1];
2567 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002568
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570 u8 user_index[0x18];
2571
Matan Barakb4ff3a32016-02-09 14:57:42 +02002572 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002573 u8 cqn[0x18];
2574
Or Gerlitz40817cd2017-06-25 12:38:45 +03002575 u8 reserved_at_60[0x8];
2576 u8 hairpin_peer_rq[0x18];
2577
2578 u8 reserved_at_80[0x10];
2579 u8 hairpin_peer_vhca[0x10];
2580
2581 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002582
Saeed Mahameed74862162016-06-09 15:11:34 +03002583 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002584 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002585 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002586
Matan Barakb4ff3a32016-02-09 14:57:42 +02002587 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002588
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590 u8 tis_num_0[0x18];
2591
2592 struct mlx5_ifc_wq_bits wq;
2593};
2594
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002595enum {
2596 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2597 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2598 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2599 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2600};
2601
2602struct mlx5_ifc_scheduling_context_bits {
2603 u8 element_type[0x8];
2604 u8 reserved_at_8[0x18];
2605
2606 u8 element_attributes[0x20];
2607
2608 u8 parent_element_id[0x20];
2609
2610 u8 reserved_at_60[0x40];
2611
2612 u8 bw_share[0x20];
2613
2614 u8 max_average_bw[0x20];
2615
2616 u8 reserved_at_e0[0x120];
2617};
2618
Saeed Mahameede2816822015-05-28 22:28:40 +03002619struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002620 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623 u8 rqt_max_size[0x10];
2624
Matan Barakb4ff3a32016-02-09 14:57:42 +02002625 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002626 u8 rqt_actual_size[0x10];
2627
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629
2630 struct mlx5_ifc_rq_num_bits rq_num[0];
2631};
2632
2633enum {
2634 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2635 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2636};
2637
2638enum {
2639 MLX5_RQC_STATE_RST = 0x0,
2640 MLX5_RQC_STATE_RDY = 0x1,
2641 MLX5_RQC_STATE_ERR = 0x3,
2642};
2643
2644struct mlx5_ifc_rqc_bits {
2645 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002646 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002647 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648 u8 vsd[0x1];
2649 u8 mem_rq_type[0x4];
2650 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002651 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002653 u8 hairpin[0x1];
2654 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657 u8 user_index[0x18];
2658
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660 u8 cqn[0x18];
2661
2662 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666 u8 rmpn[0x18];
2667
Or Gerlitz40817cd2017-06-25 12:38:45 +03002668 u8 reserved_at_a0[0x8];
2669 u8 hairpin_peer_sq[0x18];
2670
2671 u8 reserved_at_c0[0x10];
2672 u8 hairpin_peer_vhca[0x10];
2673
2674 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002675
2676 struct mlx5_ifc_wq_bits wq;
2677};
2678
2679enum {
2680 MLX5_RMPC_STATE_RDY = 0x1,
2681 MLX5_RMPC_STATE_ERR = 0x3,
2682};
2683
2684struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002685 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002686 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002687 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002688
2689 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002690 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002693
2694 struct mlx5_ifc_wq_bits wq;
2695};
2696
Saeed Mahameede2816822015-05-28 22:28:40 +03002697struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002698 u8 reserved_at_0[0x5];
2699 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002700 u8 reserved_at_8[0x15];
2701 u8 disable_mc_local_lb[0x1];
2702 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002703 u8 roce_en[0x1];
2704
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002705 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002707 u8 event_on_mtu[0x1];
2708 u8 event_on_promisc_change[0x1];
2709 u8 event_on_vlan_change[0x1];
2710 u8 event_on_mc_address_change[0x1];
2711 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002712
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002713 u8 reserved_at_40[0xc];
2714
2715 u8 affiliation_criteria[0x4];
2716 u8 affiliated_vhca_id[0x10];
2717
2718 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002719
2720 u8 mtu[0x10];
2721
Achiad Shochat9efa7522015-12-23 18:47:20 +02002722 u8 system_image_guid[0x40];
2723 u8 port_guid[0x40];
2724 u8 node_guid[0x40];
2725
Matan Barakb4ff3a32016-02-09 14:57:42 +02002726 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002727 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002729
2730 u8 promisc_uc[0x1];
2731 u8 promisc_mc[0x1];
2732 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002734 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736 u8 allowed_list_size[0xc];
2737
2738 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741
2742 u8 current_uc_mac_address[0][0x40];
2743};
2744
2745enum {
2746 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2747 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2748 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002749 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002750};
2751
2752struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002753 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002756 u8 small_fence_on_rdma_read_response[0x1];
2757 u8 umr_en[0x1];
2758 u8 a[0x1];
2759 u8 rw[0x1];
2760 u8 rr[0x1];
2761 u8 lw[0x1];
2762 u8 lr[0x1];
2763 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765
2766 u8 qpn[0x18];
2767 u8 mkey_7_0[0x8];
2768
Matan Barakb4ff3a32016-02-09 14:57:42 +02002769 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002770
2771 u8 length64[0x1];
2772 u8 bsf_en[0x1];
2773 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002776 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777 u8 en_rinval[0x1];
2778 u8 pd[0x18];
2779
2780 u8 start_addr[0x40];
2781
2782 u8 len[0x40];
2783
2784 u8 bsf_octword_size[0x20];
2785
Matan Barakb4ff3a32016-02-09 14:57:42 +02002786 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002787
2788 u8 translations_octword_size[0x20];
2789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 log_page_size[0x5];
2792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794};
2795
2796struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002797 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002798 u8 pkey[0x10];
2799};
2800
2801struct mlx5_ifc_array128_auto_bits {
2802 u8 array128_auto[16][0x8];
2803};
2804
2805struct mlx5_ifc_hca_vport_context_bits {
2806 u8 field_select[0x20];
2807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809
2810 u8 sm_virt_aware[0x1];
2811 u8 has_smi[0x1];
2812 u8 has_raw[0x1];
2813 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002814 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002815 u8 port_physical_state[0x4];
2816 u8 vport_state_policy[0x4];
2817 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818 u8 vport_state[0x4];
2819
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002821
2822 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823
2824 u8 port_guid[0x40];
2825
2826 u8 node_guid[0x40];
2827
2828 u8 cap_mask1[0x20];
2829
2830 u8 cap_mask1_field_select[0x20];
2831
2832 u8 cap_mask2[0x20];
2833
2834 u8 cap_mask2_field_select[0x20];
2835
Matan Barakb4ff3a32016-02-09 14:57:42 +02002836 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002837
2838 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002839 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002840 u8 init_type_reply[0x4];
2841 u8 lmc[0x3];
2842 u8 subnet_timeout[0x5];
2843
2844 u8 sm_lid[0x10];
2845 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847
2848 u8 qkey_violation_counter[0x10];
2849 u8 pkey_violation_counter[0x10];
2850
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852};
2853
Saeed Mahameedd6666752015-12-01 18:03:22 +02002854struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002855 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002856 u8 vport_svlan_strip[0x1];
2857 u8 vport_cvlan_strip[0x1];
2858 u8 vport_svlan_insert[0x1];
2859 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002860 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002861
Matan Barakb4ff3a32016-02-09 14:57:42 +02002862 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002863
2864 u8 svlan_cfi[0x1];
2865 u8 svlan_pcp[0x3];
2866 u8 svlan_id[0xc];
2867 u8 cvlan_cfi[0x1];
2868 u8 cvlan_pcp[0x3];
2869 u8 cvlan_id[0xc];
2870
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002872};
2873
Saeed Mahameede2816822015-05-28 22:28:40 +03002874enum {
2875 MLX5_EQC_STATUS_OK = 0x0,
2876 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2877};
2878
2879enum {
2880 MLX5_EQC_ST_ARMED = 0x9,
2881 MLX5_EQC_ST_FIRED = 0xa,
2882};
2883
2884struct mlx5_ifc_eqc_bits {
2885 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887 u8 ec[0x1];
2888 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002891 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900 u8 log_eq_size[0x5];
2901 u8 uar_page[0x18];
2902
Matan Barakb4ff3a32016-02-09 14:57:42 +02002903 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 intr[0x8];
2907
Matan Barakb4ff3a32016-02-09 14:57:42 +02002908 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002909 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002910 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 consumer_counter[0x18];
2916
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918 u8 producer_counter[0x18];
2919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921};
2922
2923enum {
2924 MLX5_DCTC_STATE_ACTIVE = 0x0,
2925 MLX5_DCTC_STATE_DRAINING = 0x1,
2926 MLX5_DCTC_STATE_DRAINED = 0x2,
2927};
2928
2929enum {
2930 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2931 MLX5_DCTC_CS_RES_NA = 0x1,
2932 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2933};
2934
2935enum {
2936 MLX5_DCTC_MTU_256_BYTES = 0x1,
2937 MLX5_DCTC_MTU_512_BYTES = 0x2,
2938 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2939 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2940 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2941};
2942
2943struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002945 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949 u8 user_index[0x18];
2950
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 cqn[0x18];
2953
2954 u8 counter_set_id[0x8];
2955 u8 atomic_mode[0x4];
2956 u8 rre[0x1];
2957 u8 rwe[0x1];
2958 u8 rae[0x1];
2959 u8 atomic_like_write_en[0x1];
2960 u8 latency_sensitive[0x1];
2961 u8 rlky[0x1];
2962 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964
Matan Barakb4ff3a32016-02-09 14:57:42 +02002965 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002966 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002969 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002970
Matan Barakb4ff3a32016-02-09 14:57:42 +02002971 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002972 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973
Matan Barakb4ff3a32016-02-09 14:57:42 +02002974 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002975 u8 pd[0x18];
2976
2977 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002978 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002979 u8 flow_label[0x14];
2980
2981 u8 dc_access_key[0x40];
2982
Matan Barakb4ff3a32016-02-09 14:57:42 +02002983 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002984 u8 mtu[0x3];
2985 u8 port[0x8];
2986 u8 pkey_index[0x10];
2987
Matan Barakb4ff3a32016-02-09 14:57:42 +02002988 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002989 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002990 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002991 u8 hop_limit[0x8];
2992
2993 u8 dc_access_key_violation_count[0x20];
2994
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996 u8 dei_cfi[0x1];
2997 u8 eth_prio[0x3];
2998 u8 ecn[0x2];
2999 u8 dscp[0x6];
3000
Matan Barakb4ff3a32016-02-09 14:57:42 +02003001 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003002};
3003
3004enum {
3005 MLX5_CQC_STATUS_OK = 0x0,
3006 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3007 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3008};
3009
3010enum {
3011 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3012 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3013};
3014
3015enum {
3016 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3017 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3018 MLX5_CQC_ST_FIRED = 0xa,
3019};
3020
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003021enum {
3022 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3023 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003024 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003025};
3026
Saeed Mahameede2816822015-05-28 22:28:40 +03003027struct mlx5_ifc_cqc_bits {
3028 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003029 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003030 u8 cqe_sz[0x3];
3031 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003032 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003033 u8 scqe_break_moderation_en[0x1];
3034 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003035 u8 cq_period_mode[0x2];
3036 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003037 u8 mini_cqe_res_format[0x2];
3038 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003039 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003040
Matan Barakb4ff3a32016-02-09 14:57:42 +02003041 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003042
Matan Barakb4ff3a32016-02-09 14:57:42 +02003043 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003044 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003045 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003046
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048 u8 log_cq_size[0x5];
3049 u8 uar_page[0x18];
3050
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052 u8 cq_period[0xc];
3053 u8 cq_max_count[0x10];
3054
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056 u8 c_eqn[0x8];
3057
Matan Barakb4ff3a32016-02-09 14:57:42 +02003058 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003059 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003060 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003061
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063
Matan Barakb4ff3a32016-02-09 14:57:42 +02003064 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065 u8 last_notified_index[0x18];
3066
Matan Barakb4ff3a32016-02-09 14:57:42 +02003067 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003068 u8 last_solicit_index[0x18];
3069
Matan Barakb4ff3a32016-02-09 14:57:42 +02003070 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003071 u8 consumer_counter[0x18];
3072
Matan Barakb4ff3a32016-02-09 14:57:42 +02003073 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003074 u8 producer_counter[0x18];
3075
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077
3078 u8 dbr_addr[0x40];
3079};
3080
3081union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3082 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3083 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3084 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003085 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003086};
3087
3088struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003089 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003090
Matan Barakb4ff3a32016-02-09 14:57:42 +02003091 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003092 u8 ieee_vendor_id[0x18];
3093
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095 u8 vsd_vendor_id[0x10];
3096
3097 u8 vsd[208][0x8];
3098
3099 u8 vsd_contd_psid[16][0x8];
3100};
3101
Saeed Mahameed74862162016-06-09 15:11:34 +03003102enum {
3103 MLX5_XRQC_STATE_GOOD = 0x0,
3104 MLX5_XRQC_STATE_ERROR = 0x1,
3105};
3106
3107enum {
3108 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3109 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3110};
3111
3112enum {
3113 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3114};
3115
3116struct mlx5_ifc_tag_matching_topology_context_bits {
3117 u8 log_matching_list_sz[0x4];
3118 u8 reserved_at_4[0xc];
3119 u8 append_next_index[0x10];
3120
3121 u8 sw_phase_cnt[0x10];
3122 u8 hw_phase_cnt[0x10];
3123
3124 u8 reserved_at_40[0x40];
3125};
3126
3127struct mlx5_ifc_xrqc_bits {
3128 u8 state[0x4];
3129 u8 rlkey[0x1];
3130 u8 reserved_at_5[0xf];
3131 u8 topology[0x4];
3132 u8 reserved_at_18[0x4];
3133 u8 offload[0x4];
3134
3135 u8 reserved_at_20[0x8];
3136 u8 user_index[0x18];
3137
3138 u8 reserved_at_40[0x8];
3139 u8 cqn[0x18];
3140
3141 u8 reserved_at_60[0xa0];
3142
3143 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3144
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003145 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003146
3147 struct mlx5_ifc_wq_bits wq;
3148};
3149
Saeed Mahameede2816822015-05-28 22:28:40 +03003150union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3151 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3152 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003153 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003154};
3155
3156union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3157 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3158 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3159 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003160 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003161};
3162
3163union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3164 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3165 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3166 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3167 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3168 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3169 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3170 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003171 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003172 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003173 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175};
3176
Gal Pressman8ed1a632016-11-17 13:46:01 +02003177union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3178 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3179 u8 reserved_at_0[0x7c0];
3180};
3181
Saeed Mahameede2816822015-05-28 22:28:40 +03003182union mlx5_ifc_event_auto_bits {
3183 struct mlx5_ifc_comp_event_bits comp_event;
3184 struct mlx5_ifc_dct_events_bits dct_events;
3185 struct mlx5_ifc_qp_events_bits qp_events;
3186 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3187 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3188 struct mlx5_ifc_cq_error_bits cq_error;
3189 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3190 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3191 struct mlx5_ifc_gpio_event_bits gpio_event;
3192 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3193 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3194 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
3198struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003199 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003200
3201 u8 assert_existptr[0x20];
3202
3203 u8 assert_callra[0x20];
3204
Matan Barakb4ff3a32016-02-09 14:57:42 +02003205 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003206
3207 u8 fw_version[0x20];
3208
3209 u8 hw_id[0x20];
3210
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
3213 u8 irisc_index[0x8];
3214 u8 synd[0x8];
3215 u8 ext_synd[0x10];
3216};
3217
3218struct mlx5_ifc_register_loopback_control_bits {
3219 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003222 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225};
3226
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003227struct mlx5_ifc_vport_tc_element_bits {
3228 u8 traffic_class[0x4];
3229 u8 reserved_at_4[0xc];
3230 u8 vport_number[0x10];
3231};
3232
3233struct mlx5_ifc_vport_element_bits {
3234 u8 reserved_at_0[0x10];
3235 u8 vport_number[0x10];
3236};
3237
3238enum {
3239 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3240 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3241 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3242};
3243
3244struct mlx5_ifc_tsar_element_bits {
3245 u8 reserved_at_0[0x8];
3246 u8 tsar_type[0x8];
3247 u8 reserved_at_10[0x10];
3248};
3249
Majd Dibbiny8812c242017-02-09 14:20:12 +02003250enum {
3251 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3252 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3253};
3254
Saeed Mahameede2816822015-05-28 22:28:40 +03003255struct mlx5_ifc_teardown_hca_out_bits {
3256 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
3259 u8 syndrome[0x20];
3260
Majd Dibbiny8812c242017-02-09 14:20:12 +02003261 u8 reserved_at_40[0x3f];
3262
3263 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264};
3265
3266enum {
3267 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003268 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003269};
3270
3271struct mlx5_ifc_teardown_hca_in_bits {
3272 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276 u8 op_mod[0x10];
3277
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003279 u8 profile[0x10];
3280
Matan Barakb4ff3a32016-02-09 14:57:42 +02003281 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003282};
3283
3284struct mlx5_ifc_sqerr2rts_qp_out_bits {
3285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003287
3288 u8 syndrome[0x20];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291};
3292
3293struct mlx5_ifc_sqerr2rts_qp_in_bits {
3294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298 u8 op_mod[0x10];
3299
Matan Barakb4ff3a32016-02-09 14:57:42 +02003300 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003301 u8 qpn[0x18];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304
3305 u8 opt_param_mask[0x20];
3306
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308
3309 struct mlx5_ifc_qpc_bits qpc;
3310
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312};
3313
3314struct mlx5_ifc_sqd2rts_qp_out_bits {
3315 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317
3318 u8 syndrome[0x20];
3319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321};
3322
3323struct mlx5_ifc_sqd2rts_qp_in_bits {
3324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326
Matan Barakb4ff3a32016-02-09 14:57:42 +02003327 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003328 u8 op_mod[0x10];
3329
Matan Barakb4ff3a32016-02-09 14:57:42 +02003330 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003331 u8 qpn[0x18];
3332
Matan Barakb4ff3a32016-02-09 14:57:42 +02003333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334
3335 u8 opt_param_mask[0x20];
3336
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338
3339 struct mlx5_ifc_qpc_bits qpc;
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342};
3343
3344struct mlx5_ifc_set_roce_address_out_bits {
3345 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347
3348 u8 syndrome[0x20];
3349
Matan Barakb4ff3a32016-02-09 14:57:42 +02003350 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003351};
3352
3353struct mlx5_ifc_set_roce_address_in_bits {
3354 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358 u8 op_mod[0x10];
3359
3360 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003361 u8 reserved_at_50[0xc];
3362 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365
3366 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3367};
3368
3369struct mlx5_ifc_set_mad_demux_out_bits {
3370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372
3373 u8 syndrome[0x20];
3374
Matan Barakb4ff3a32016-02-09 14:57:42 +02003375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003376};
3377
3378enum {
3379 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3380 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3381};
3382
3383struct mlx5_ifc_set_mad_demux_in_bits {
3384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388 u8 op_mod[0x10];
3389
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395};
3396
3397struct mlx5_ifc_set_l2_table_entry_out_bits {
3398 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 u8 syndrome[0x20];
3402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404};
3405
3406struct mlx5_ifc_set_l2_table_entry_in_bits {
3407 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411 u8 op_mod[0x10];
3412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416 u8 table_index[0x18];
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419
Matan Barakb4ff3a32016-02-09 14:57:42 +02003420 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003421 u8 vlan_valid[0x1];
3422 u8 vlan[0xc];
3423
3424 struct mlx5_ifc_mac_address_layout_bits mac_address;
3425
Matan Barakb4ff3a32016-02-09 14:57:42 +02003426 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003427};
3428
3429struct mlx5_ifc_set_issi_out_bits {
3430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003432
3433 u8 syndrome[0x20];
3434
Matan Barakb4ff3a32016-02-09 14:57:42 +02003435 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003436};
3437
3438struct mlx5_ifc_set_issi_in_bits {
3439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441
Matan Barakb4ff3a32016-02-09 14:57:42 +02003442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003443 u8 op_mod[0x10];
3444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446 u8 current_issi[0x10];
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449};
3450
3451struct mlx5_ifc_set_hca_cap_out_bits {
3452 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
3455 u8 syndrome[0x20];
3456
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003458};
3459
3460struct mlx5_ifc_set_hca_cap_in_bits {
3461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003465 u8 op_mod[0x10];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003468
Saeed Mahameede2816822015-05-28 22:28:40 +03003469 union mlx5_ifc_hca_cap_union_bits capability;
3470};
3471
Maor Gottlieb26a81452015-12-10 17:12:39 +02003472enum {
3473 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3474 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3475 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3476 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3477};
3478
Saeed Mahameede2816822015-05-28 22:28:40 +03003479struct mlx5_ifc_set_fte_out_bits {
3480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003482
3483 u8 syndrome[0x20];
3484
Matan Barakb4ff3a32016-02-09 14:57:42 +02003485 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003486};
3487
3488struct mlx5_ifc_set_fte_in_bits {
3489 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493 u8 op_mod[0x10];
3494
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003495 u8 other_vport[0x1];
3496 u8 reserved_at_41[0xf];
3497 u8 vport_number[0x10];
3498
3499 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003500
3501 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505 u8 table_id[0x18];
3506
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003508 u8 modify_enable_mask[0x8];
3509
Matan Barakb4ff3a32016-02-09 14:57:42 +02003510 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003511
3512 u8 flow_index[0x20];
3513
Matan Barakb4ff3a32016-02-09 14:57:42 +02003514 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003515
3516 struct mlx5_ifc_flow_context_bits flow_context;
3517};
3518
3519struct mlx5_ifc_rts2rts_qp_out_bits {
3520 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522
3523 u8 syndrome[0x20];
3524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526};
3527
3528struct mlx5_ifc_rts2rts_qp_in_bits {
3529 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003530 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003531
Matan Barakb4ff3a32016-02-09 14:57:42 +02003532 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003533 u8 op_mod[0x10];
3534
Matan Barakb4ff3a32016-02-09 14:57:42 +02003535 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003536 u8 qpn[0x18];
3537
Matan Barakb4ff3a32016-02-09 14:57:42 +02003538 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003539
3540 u8 opt_param_mask[0x20];
3541
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543
3544 struct mlx5_ifc_qpc_bits qpc;
3545
Matan Barakb4ff3a32016-02-09 14:57:42 +02003546 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003547};
3548
3549struct mlx5_ifc_rtr2rts_qp_out_bits {
3550 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552
3553 u8 syndrome[0x20];
3554
Matan Barakb4ff3a32016-02-09 14:57:42 +02003555 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003556};
3557
3558struct mlx5_ifc_rtr2rts_qp_in_bits {
3559 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561
Matan Barakb4ff3a32016-02-09 14:57:42 +02003562 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003563 u8 op_mod[0x10];
3564
Matan Barakb4ff3a32016-02-09 14:57:42 +02003565 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003566 u8 qpn[0x18];
3567
Matan Barakb4ff3a32016-02-09 14:57:42 +02003568 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003569
3570 u8 opt_param_mask[0x20];
3571
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573
3574 struct mlx5_ifc_qpc_bits qpc;
3575
Matan Barakb4ff3a32016-02-09 14:57:42 +02003576 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003577};
3578
3579struct mlx5_ifc_rst2init_qp_out_bits {
3580 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003581 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003582
3583 u8 syndrome[0x20];
3584
Matan Barakb4ff3a32016-02-09 14:57:42 +02003585 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003586};
3587
3588struct mlx5_ifc_rst2init_qp_in_bits {
3589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003590 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003591
Matan Barakb4ff3a32016-02-09 14:57:42 +02003592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003593 u8 op_mod[0x10];
3594
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596 u8 qpn[0x18];
3597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
3600 u8 opt_param_mask[0x20];
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 struct mlx5_ifc_qpc_bits qpc;
3605
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607};
3608
Saeed Mahameed74862162016-06-09 15:11:34 +03003609struct mlx5_ifc_query_xrq_out_bits {
3610 u8 status[0x8];
3611 u8 reserved_at_8[0x18];
3612
3613 u8 syndrome[0x20];
3614
3615 u8 reserved_at_40[0x40];
3616
3617 struct mlx5_ifc_xrqc_bits xrq_context;
3618};
3619
3620struct mlx5_ifc_query_xrq_in_bits {
3621 u8 opcode[0x10];
3622 u8 reserved_at_10[0x10];
3623
3624 u8 reserved_at_20[0x10];
3625 u8 op_mod[0x10];
3626
3627 u8 reserved_at_40[0x8];
3628 u8 xrqn[0x18];
3629
3630 u8 reserved_at_60[0x20];
3631};
3632
Saeed Mahameede2816822015-05-28 22:28:40 +03003633struct mlx5_ifc_query_xrc_srq_out_bits {
3634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636
3637 u8 syndrome[0x20];
3638
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640
3641 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3642
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
3645 u8 pas[0][0x40];
3646};
3647
3648struct mlx5_ifc_query_xrc_srq_in_bits {
3649 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653 u8 op_mod[0x10];
3654
Matan Barakb4ff3a32016-02-09 14:57:42 +02003655 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003656 u8 xrc_srqn[0x18];
3657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659};
3660
3661enum {
3662 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3663 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3664};
3665
3666struct mlx5_ifc_query_vport_state_out_bits {
3667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669
3670 u8 syndrome[0x20];
3671
Matan Barakb4ff3a32016-02-09 14:57:42 +02003672 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675 u8 admin_state[0x4];
3676 u8 state[0x4];
3677};
3678
3679enum {
3680 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003681 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003682};
3683
3684struct mlx5_ifc_query_vport_state_in_bits {
3685 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003686 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003687
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689 u8 op_mod[0x10];
3690
3691 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693 u8 vport_number[0x10];
3694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696};
3697
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003698struct mlx5_ifc_query_vnic_env_out_bits {
3699 u8 status[0x8];
3700 u8 reserved_at_8[0x18];
3701
3702 u8 syndrome[0x20];
3703
3704 u8 reserved_at_40[0x40];
3705
3706 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3707};
3708
3709enum {
3710 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3711};
3712
3713struct mlx5_ifc_query_vnic_env_in_bits {
3714 u8 opcode[0x10];
3715 u8 reserved_at_10[0x10];
3716
3717 u8 reserved_at_20[0x10];
3718 u8 op_mod[0x10];
3719
3720 u8 other_vport[0x1];
3721 u8 reserved_at_41[0xf];
3722 u8 vport_number[0x10];
3723
3724 u8 reserved_at_60[0x20];
3725};
3726
Saeed Mahameede2816822015-05-28 22:28:40 +03003727struct mlx5_ifc_query_vport_counter_out_bits {
3728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
3731 u8 syndrome[0x20];
3732
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 struct mlx5_ifc_traffic_counter_bits received_errors;
3736
3737 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3738
3739 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3740
3741 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3742
3743 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3744
3745 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3746
3747 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3748
3749 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3750
3751 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3752
3753 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3754
3755 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3756
3757 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3758
Matan Barakb4ff3a32016-02-09 14:57:42 +02003759 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003760};
3761
3762enum {
3763 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3764};
3765
3766struct mlx5_ifc_query_vport_counter_in_bits {
3767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003769
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771 u8 op_mod[0x10];
3772
3773 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003774 u8 reserved_at_41[0xb];
3775 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776 u8 vport_number[0x10];
3777
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779
3780 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782
Matan Barakb4ff3a32016-02-09 14:57:42 +02003783 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003784};
3785
3786struct mlx5_ifc_query_tis_out_bits {
3787 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
3790 u8 syndrome[0x20];
3791
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793
3794 struct mlx5_ifc_tisc_bits tis_context;
3795};
3796
3797struct mlx5_ifc_query_tis_in_bits {
3798 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802 u8 op_mod[0x10];
3803
Matan Barakb4ff3a32016-02-09 14:57:42 +02003804 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003805 u8 tisn[0x18];
3806
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808};
3809
3810struct mlx5_ifc_query_tir_out_bits {
3811 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
3814 u8 syndrome[0x20];
3815
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817
3818 struct mlx5_ifc_tirc_bits tir_context;
3819};
3820
3821struct mlx5_ifc_query_tir_in_bits {
3822 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826 u8 op_mod[0x10];
3827
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829 u8 tirn[0x18];
3830
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832};
3833
3834struct mlx5_ifc_query_srq_out_bits {
3835 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003836 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003837
3838 u8 syndrome[0x20];
3839
Matan Barakb4ff3a32016-02-09 14:57:42 +02003840 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841
3842 struct mlx5_ifc_srqc_bits srq_context_entry;
3843
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
3846 u8 pas[0][0x40];
3847};
3848
3849struct mlx5_ifc_query_srq_in_bits {
3850 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854 u8 op_mod[0x10];
3855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857 u8 srqn[0x18];
3858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860};
3861
3862struct mlx5_ifc_query_sq_out_bits {
3863 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003864 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003865
3866 u8 syndrome[0x20];
3867
Matan Barakb4ff3a32016-02-09 14:57:42 +02003868 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003869
3870 struct mlx5_ifc_sqc_bits sq_context;
3871};
3872
3873struct mlx5_ifc_query_sq_in_bits {
3874 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878 u8 op_mod[0x10];
3879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881 u8 sqn[0x18];
3882
Matan Barakb4ff3a32016-02-09 14:57:42 +02003883 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003884};
3885
3886struct mlx5_ifc_query_special_contexts_out_bits {
3887 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
3890 u8 syndrome[0x20];
3891
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003892 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003893
3894 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003895
3896 u8 null_mkey[0x20];
3897
3898 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899};
3900
3901struct mlx5_ifc_query_special_contexts_in_bits {
3902 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904
Matan Barakb4ff3a32016-02-09 14:57:42 +02003905 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003906 u8 op_mod[0x10];
3907
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909};
3910
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003911struct mlx5_ifc_query_scheduling_element_out_bits {
3912 u8 opcode[0x10];
3913 u8 reserved_at_10[0x10];
3914
3915 u8 reserved_at_20[0x10];
3916 u8 op_mod[0x10];
3917
3918 u8 reserved_at_40[0xc0];
3919
3920 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3921
3922 u8 reserved_at_300[0x100];
3923};
3924
3925enum {
3926 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3927};
3928
3929struct mlx5_ifc_query_scheduling_element_in_bits {
3930 u8 opcode[0x10];
3931 u8 reserved_at_10[0x10];
3932
3933 u8 reserved_at_20[0x10];
3934 u8 op_mod[0x10];
3935
3936 u8 scheduling_hierarchy[0x8];
3937 u8 reserved_at_48[0x18];
3938
3939 u8 scheduling_element_id[0x20];
3940
3941 u8 reserved_at_80[0x180];
3942};
3943
Saeed Mahameede2816822015-05-28 22:28:40 +03003944struct mlx5_ifc_query_rqt_out_bits {
3945 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003946 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003947
3948 u8 syndrome[0x20];
3949
Matan Barakb4ff3a32016-02-09 14:57:42 +02003950 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003951
3952 struct mlx5_ifc_rqtc_bits rqt_context;
3953};
3954
3955struct mlx5_ifc_query_rqt_in_bits {
3956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003958
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960 u8 op_mod[0x10];
3961
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963 u8 rqtn[0x18];
3964
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966};
3967
3968struct mlx5_ifc_query_rq_out_bits {
3969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971
3972 u8 syndrome[0x20];
3973
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975
3976 struct mlx5_ifc_rqc_bits rq_context;
3977};
3978
3979struct mlx5_ifc_query_rq_in_bits {
3980 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003981 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003982
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984 u8 op_mod[0x10];
3985
Matan Barakb4ff3a32016-02-09 14:57:42 +02003986 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003987 u8 rqn[0x18];
3988
Matan Barakb4ff3a32016-02-09 14:57:42 +02003989 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003990};
3991
3992struct mlx5_ifc_query_roce_address_out_bits {
3993 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003994 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003995
3996 u8 syndrome[0x20];
3997
Matan Barakb4ff3a32016-02-09 14:57:42 +02003998 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003999
4000 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4001};
4002
4003struct mlx5_ifc_query_roce_address_in_bits {
4004 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004005 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006
Matan Barakb4ff3a32016-02-09 14:57:42 +02004007 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004008 u8 op_mod[0x10];
4009
4010 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004011 u8 reserved_at_50[0xc];
4012 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013
Matan Barakb4ff3a32016-02-09 14:57:42 +02004014 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004015};
4016
4017struct mlx5_ifc_query_rmp_out_bits {
4018 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 u8 syndrome[0x20];
4022
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024
4025 struct mlx5_ifc_rmpc_bits rmp_context;
4026};
4027
4028struct mlx5_ifc_query_rmp_in_bits {
4029 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004030 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004031
Matan Barakb4ff3a32016-02-09 14:57:42 +02004032 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033 u8 op_mod[0x10];
4034
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036 u8 rmpn[0x18];
4037
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039};
4040
4041struct mlx5_ifc_query_qp_out_bits {
4042 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004043 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004044
4045 u8 syndrome[0x20];
4046
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048
4049 u8 opt_param_mask[0x20];
4050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052
4053 struct mlx5_ifc_qpc_bits qpc;
4054
Matan Barakb4ff3a32016-02-09 14:57:42 +02004055 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004056
4057 u8 pas[0][0x40];
4058};
4059
4060struct mlx5_ifc_query_qp_in_bits {
4061 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065 u8 op_mod[0x10];
4066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068 u8 qpn[0x18];
4069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071};
4072
4073struct mlx5_ifc_query_q_counter_out_bits {
4074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076
4077 u8 syndrome[0x20];
4078
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080
4081 u8 rx_write_requests[0x20];
4082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
4085 u8 rx_read_requests[0x20];
4086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088
4089 u8 rx_atomic_requests[0x20];
4090
Matan Barakb4ff3a32016-02-09 14:57:42 +02004091 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004092
4093 u8 rx_dct_connect[0x20];
4094
Matan Barakb4ff3a32016-02-09 14:57:42 +02004095 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004096
4097 u8 out_of_buffer[0x20];
4098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100
4101 u8 out_of_sequence[0x20];
4102
Saeed Mahameed74862162016-06-09 15:11:34 +03004103 u8 reserved_at_1e0[0x20];
4104
4105 u8 duplicate_request[0x20];
4106
4107 u8 reserved_at_220[0x20];
4108
4109 u8 rnr_nak_retry_err[0x20];
4110
4111 u8 reserved_at_260[0x20];
4112
4113 u8 packet_seq_err[0x20];
4114
4115 u8 reserved_at_2a0[0x20];
4116
4117 u8 implied_nak_seq_err[0x20];
4118
4119 u8 reserved_at_2e0[0x20];
4120
4121 u8 local_ack_timeout_err[0x20];
4122
Parav Pandit58dcb602017-06-19 07:19:37 +03004123 u8 reserved_at_320[0xa0];
4124
4125 u8 resp_local_length_error[0x20];
4126
4127 u8 req_local_length_error[0x20];
4128
4129 u8 resp_local_qp_error[0x20];
4130
4131 u8 local_operation_error[0x20];
4132
4133 u8 resp_local_protection[0x20];
4134
4135 u8 req_local_protection[0x20];
4136
4137 u8 resp_cqe_error[0x20];
4138
4139 u8 req_cqe_error[0x20];
4140
4141 u8 req_mw_binding[0x20];
4142
4143 u8 req_bad_response[0x20];
4144
4145 u8 req_remote_invalid_request[0x20];
4146
4147 u8 resp_remote_invalid_request[0x20];
4148
4149 u8 req_remote_access_errors[0x20];
4150
4151 u8 resp_remote_access_errors[0x20];
4152
4153 u8 req_remote_operation_errors[0x20];
4154
4155 u8 req_transport_retries_exceeded[0x20];
4156
4157 u8 cq_overflow[0x20];
4158
4159 u8 resp_cqe_flush_error[0x20];
4160
4161 u8 req_cqe_flush_error[0x20];
4162
4163 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164};
4165
4166struct mlx5_ifc_query_q_counter_in_bits {
4167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171 u8 op_mod[0x10];
4172
Matan Barakb4ff3a32016-02-09 14:57:42 +02004173 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004174
4175 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004176 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004177
Matan Barakb4ff3a32016-02-09 14:57:42 +02004178 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004179 u8 counter_set_id[0x8];
4180};
4181
4182struct mlx5_ifc_query_pages_out_bits {
4183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185
4186 u8 syndrome[0x20];
4187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 function_id[0x10];
4190
4191 u8 num_pages[0x20];
4192};
4193
4194enum {
4195 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4196 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4197 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4198};
4199
4200struct mlx5_ifc_query_pages_in_bits {
4201 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203
Matan Barakb4ff3a32016-02-09 14:57:42 +02004204 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004205 u8 op_mod[0x10];
4206
Matan Barakb4ff3a32016-02-09 14:57:42 +02004207 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208 u8 function_id[0x10];
4209
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211};
4212
4213struct mlx5_ifc_query_nic_vport_context_out_bits {
4214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004216
4217 u8 syndrome[0x20];
4218
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220
4221 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4222};
4223
4224struct mlx5_ifc_query_nic_vport_context_in_bits {
4225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004227
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229 u8 op_mod[0x10];
4230
4231 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004232 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004233 u8 vport_number[0x10];
4234
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004236 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238};
4239
4240struct mlx5_ifc_query_mkey_out_bits {
4241 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243
4244 u8 syndrome[0x20];
4245
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247
4248 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
4252 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4253
4254 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4255};
4256
4257struct mlx5_ifc_query_mkey_in_bits {
4258 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004260
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262 u8 op_mod[0x10];
4263
Matan Barakb4ff3a32016-02-09 14:57:42 +02004264 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004265 u8 mkey_index[0x18];
4266
4267 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004268 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004269};
4270
4271struct mlx5_ifc_query_mad_demux_out_bits {
4272 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274
4275 u8 syndrome[0x20];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278
4279 u8 mad_dumux_parameters_block[0x20];
4280};
4281
4282struct mlx5_ifc_query_mad_demux_in_bits {
4283 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287 u8 op_mod[0x10];
4288
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290};
4291
4292struct mlx5_ifc_query_l2_table_entry_out_bits {
4293 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
4296 u8 syndrome[0x20];
4297
Matan Barakb4ff3a32016-02-09 14:57:42 +02004298 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004299
Matan Barakb4ff3a32016-02-09 14:57:42 +02004300 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004301 u8 vlan_valid[0x1];
4302 u8 vlan[0xc];
4303
4304 struct mlx5_ifc_mac_address_layout_bits mac_address;
4305
Matan Barakb4ff3a32016-02-09 14:57:42 +02004306 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004307};
4308
4309struct mlx5_ifc_query_l2_table_entry_in_bits {
4310 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314 u8 op_mod[0x10];
4315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319 u8 table_index[0x18];
4320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322};
4323
4324struct mlx5_ifc_query_issi_out_bits {
4325 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004326 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004327
4328 u8 syndrome[0x20];
4329
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331 u8 current_issi[0x10];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
Matan Barakb4ff3a32016-02-09 14:57:42 +02004335 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004336 u8 supported_issi_dw0[0x20];
4337};
4338
4339struct mlx5_ifc_query_issi_in_bits {
4340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344 u8 op_mod[0x10];
4345
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347};
4348
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004349struct mlx5_ifc_set_driver_version_out_bits {
4350 u8 status[0x8];
4351 u8 reserved_0[0x18];
4352
4353 u8 syndrome[0x20];
4354 u8 reserved_1[0x40];
4355};
4356
4357struct mlx5_ifc_set_driver_version_in_bits {
4358 u8 opcode[0x10];
4359 u8 reserved_0[0x10];
4360
4361 u8 reserved_1[0x10];
4362 u8 op_mod[0x10];
4363
4364 u8 reserved_2[0x40];
4365 u8 driver_version[64][0x8];
4366};
4367
Saeed Mahameede2816822015-05-28 22:28:40 +03004368struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4369 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371
4372 u8 syndrome[0x20];
4373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375
4376 struct mlx5_ifc_pkey_bits pkey[0];
4377};
4378
4379struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382
Matan Barakb4ff3a32016-02-09 14:57:42 +02004383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004384 u8 op_mod[0x10];
4385
4386 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004388 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004389 u8 vport_number[0x10];
4390
Matan Barakb4ff3a32016-02-09 14:57:42 +02004391 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004392 u8 pkey_index[0x10];
4393};
4394
Eli Coheneff901d2016-03-11 22:58:42 +02004395enum {
4396 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4397 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4398 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4399};
4400
Saeed Mahameede2816822015-05-28 22:28:40 +03004401struct mlx5_ifc_query_hca_vport_gid_out_bits {
4402 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404
4405 u8 syndrome[0x20];
4406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408
4409 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411
4412 struct mlx5_ifc_array128_auto_bits gid[0];
4413};
4414
4415struct mlx5_ifc_query_hca_vport_gid_in_bits {
4416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004418
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004420 u8 op_mod[0x10];
4421
4422 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004424 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004425 u8 vport_number[0x10];
4426
Matan Barakb4ff3a32016-02-09 14:57:42 +02004427 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004428 u8 gid_index[0x10];
4429};
4430
4431struct mlx5_ifc_query_hca_vport_context_out_bits {
4432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434
4435 u8 syndrome[0x20];
4436
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004438
4439 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4440};
4441
4442struct mlx5_ifc_query_hca_vport_context_in_bits {
4443 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447 u8 op_mod[0x10];
4448
4449 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004451 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004452 u8 vport_number[0x10];
4453
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004455};
4456
4457struct mlx5_ifc_query_hca_cap_out_bits {
4458 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004460
4461 u8 syndrome[0x20];
4462
Matan Barakb4ff3a32016-02-09 14:57:42 +02004463 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004464
4465 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004466};
4467
4468struct mlx5_ifc_query_hca_cap_in_bits {
4469 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004470 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004471
Matan Barakb4ff3a32016-02-09 14:57:42 +02004472 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004473 u8 op_mod[0x10];
4474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004476};
4477
Saeed Mahameede2816822015-05-28 22:28:40 +03004478struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004479 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004480 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004481
4482 u8 syndrome[0x20];
4483
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004485
Matan Barakb4ff3a32016-02-09 14:57:42 +02004486 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004487 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004489 u8 log_size[0x8];
4490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004492};
4493
Saeed Mahameede2816822015-05-28 22:28:40 +03004494struct mlx5_ifc_query_flow_table_in_bits {
4495 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004497
Matan Barakb4ff3a32016-02-09 14:57:42 +02004498 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004499 u8 op_mod[0x10];
4500
Matan Barakb4ff3a32016-02-09 14:57:42 +02004501 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004502
4503 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004504 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004505
Matan Barakb4ff3a32016-02-09 14:57:42 +02004506 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004507 u8 table_id[0x18];
4508
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510};
4511
4512struct mlx5_ifc_query_fte_out_bits {
4513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004515
4516 u8 syndrome[0x20];
4517
Matan Barakb4ff3a32016-02-09 14:57:42 +02004518 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004519
4520 struct mlx5_ifc_flow_context_bits flow_context;
4521};
4522
4523struct mlx5_ifc_query_fte_in_bits {
4524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004526
Matan Barakb4ff3a32016-02-09 14:57:42 +02004527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004528 u8 op_mod[0x10];
4529
Matan Barakb4ff3a32016-02-09 14:57:42 +02004530 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004531
4532 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004533 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004534
Matan Barakb4ff3a32016-02-09 14:57:42 +02004535 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004536 u8 table_id[0x18];
4537
Matan Barakb4ff3a32016-02-09 14:57:42 +02004538 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004539
4540 u8 flow_index[0x20];
4541
Matan Barakb4ff3a32016-02-09 14:57:42 +02004542 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004543};
4544
4545enum {
4546 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4547 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4548 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4549};
4550
4551struct mlx5_ifc_query_flow_group_out_bits {
4552 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004553 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004554
4555 u8 syndrome[0x20];
4556
Matan Barakb4ff3a32016-02-09 14:57:42 +02004557 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004558
4559 u8 start_flow_index[0x20];
4560
Matan Barakb4ff3a32016-02-09 14:57:42 +02004561 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004562
4563 u8 end_flow_index[0x20];
4564
Matan Barakb4ff3a32016-02-09 14:57:42 +02004565 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004566
Matan Barakb4ff3a32016-02-09 14:57:42 +02004567 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004568 u8 match_criteria_enable[0x8];
4569
4570 struct mlx5_ifc_fte_match_param_bits match_criteria;
4571
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004573};
4574
4575struct mlx5_ifc_query_flow_group_in_bits {
4576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004578
Matan Barakb4ff3a32016-02-09 14:57:42 +02004579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004580 u8 op_mod[0x10];
4581
Matan Barakb4ff3a32016-02-09 14:57:42 +02004582 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004583
4584 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004585 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004586
Matan Barakb4ff3a32016-02-09 14:57:42 +02004587 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004588 u8 table_id[0x18];
4589
4590 u8 group_id[0x20];
4591
Matan Barakb4ff3a32016-02-09 14:57:42 +02004592 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004593};
4594
Amir Vadai9dc0b282016-05-13 12:55:39 +00004595struct mlx5_ifc_query_flow_counter_out_bits {
4596 u8 status[0x8];
4597 u8 reserved_at_8[0x18];
4598
4599 u8 syndrome[0x20];
4600
4601 u8 reserved_at_40[0x40];
4602
4603 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4604};
4605
4606struct mlx5_ifc_query_flow_counter_in_bits {
4607 u8 opcode[0x10];
4608 u8 reserved_at_10[0x10];
4609
4610 u8 reserved_at_20[0x10];
4611 u8 op_mod[0x10];
4612
4613 u8 reserved_at_40[0x80];
4614
4615 u8 clear[0x1];
4616 u8 reserved_at_c1[0xf];
4617 u8 num_of_counters[0x10];
4618
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004619 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004620};
4621
Saeed Mahameedd6666752015-12-01 18:03:22 +02004622struct mlx5_ifc_query_esw_vport_context_out_bits {
4623 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004624 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004625
4626 u8 syndrome[0x20];
4627
Matan Barakb4ff3a32016-02-09 14:57:42 +02004628 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004629
4630 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4631};
4632
4633struct mlx5_ifc_query_esw_vport_context_in_bits {
4634 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004635 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004636
Matan Barakb4ff3a32016-02-09 14:57:42 +02004637 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004638 u8 op_mod[0x10];
4639
4640 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004641 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004642 u8 vport_number[0x10];
4643
Matan Barakb4ff3a32016-02-09 14:57:42 +02004644 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004645};
4646
4647struct mlx5_ifc_modify_esw_vport_context_out_bits {
4648 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004649 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004650
4651 u8 syndrome[0x20];
4652
Matan Barakb4ff3a32016-02-09 14:57:42 +02004653 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004654};
4655
4656struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004657 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004658 u8 vport_cvlan_insert[0x1];
4659 u8 vport_svlan_insert[0x1];
4660 u8 vport_cvlan_strip[0x1];
4661 u8 vport_svlan_strip[0x1];
4662};
4663
4664struct mlx5_ifc_modify_esw_vport_context_in_bits {
4665 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004666 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004667
Matan Barakb4ff3a32016-02-09 14:57:42 +02004668 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004669 u8 op_mod[0x10];
4670
4671 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004672 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004673 u8 vport_number[0x10];
4674
4675 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4676
4677 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4678};
4679
Saeed Mahameede2816822015-05-28 22:28:40 +03004680struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004681 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004683
4684 u8 syndrome[0x20];
4685
Matan Barakb4ff3a32016-02-09 14:57:42 +02004686 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004687
4688 struct mlx5_ifc_eqc_bits eq_context_entry;
4689
Matan Barakb4ff3a32016-02-09 14:57:42 +02004690 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004691
4692 u8 event_bitmask[0x40];
4693
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004695
4696 u8 pas[0][0x40];
4697};
4698
4699struct mlx5_ifc_query_eq_in_bits {
4700 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004701 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004702
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004704 u8 op_mod[0x10];
4705
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004707 u8 eq_number[0x8];
4708
Matan Barakb4ff3a32016-02-09 14:57:42 +02004709 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004710};
4711
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004712struct mlx5_ifc_encap_header_in_bits {
4713 u8 reserved_at_0[0x5];
4714 u8 header_type[0x3];
4715 u8 reserved_at_8[0xe];
4716 u8 encap_header_size[0xa];
4717
4718 u8 reserved_at_20[0x10];
4719 u8 encap_header[2][0x8];
4720
4721 u8 more_encap_header[0][0x8];
4722};
4723
4724struct mlx5_ifc_query_encap_header_out_bits {
4725 u8 status[0x8];
4726 u8 reserved_at_8[0x18];
4727
4728 u8 syndrome[0x20];
4729
4730 u8 reserved_at_40[0xa0];
4731
4732 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4733};
4734
4735struct mlx5_ifc_query_encap_header_in_bits {
4736 u8 opcode[0x10];
4737 u8 reserved_at_10[0x10];
4738
4739 u8 reserved_at_20[0x10];
4740 u8 op_mod[0x10];
4741
4742 u8 encap_id[0x20];
4743
4744 u8 reserved_at_60[0xa0];
4745};
4746
4747struct mlx5_ifc_alloc_encap_header_out_bits {
4748 u8 status[0x8];
4749 u8 reserved_at_8[0x18];
4750
4751 u8 syndrome[0x20];
4752
4753 u8 encap_id[0x20];
4754
4755 u8 reserved_at_60[0x20];
4756};
4757
4758struct mlx5_ifc_alloc_encap_header_in_bits {
4759 u8 opcode[0x10];
4760 u8 reserved_at_10[0x10];
4761
4762 u8 reserved_at_20[0x10];
4763 u8 op_mod[0x10];
4764
4765 u8 reserved_at_40[0xa0];
4766
4767 struct mlx5_ifc_encap_header_in_bits encap_header;
4768};
4769
4770struct mlx5_ifc_dealloc_encap_header_out_bits {
4771 u8 status[0x8];
4772 u8 reserved_at_8[0x18];
4773
4774 u8 syndrome[0x20];
4775
4776 u8 reserved_at_40[0x40];
4777};
4778
4779struct mlx5_ifc_dealloc_encap_header_in_bits {
4780 u8 opcode[0x10];
4781 u8 reserved_at_10[0x10];
4782
4783 u8 reserved_20[0x10];
4784 u8 op_mod[0x10];
4785
4786 u8 encap_id[0x20];
4787
4788 u8 reserved_60[0x20];
4789};
4790
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004791struct mlx5_ifc_set_action_in_bits {
4792 u8 action_type[0x4];
4793 u8 field[0xc];
4794 u8 reserved_at_10[0x3];
4795 u8 offset[0x5];
4796 u8 reserved_at_18[0x3];
4797 u8 length[0x5];
4798
4799 u8 data[0x20];
4800};
4801
4802struct mlx5_ifc_add_action_in_bits {
4803 u8 action_type[0x4];
4804 u8 field[0xc];
4805 u8 reserved_at_10[0x10];
4806
4807 u8 data[0x20];
4808};
4809
4810union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4811 struct mlx5_ifc_set_action_in_bits set_action_in;
4812 struct mlx5_ifc_add_action_in_bits add_action_in;
4813 u8 reserved_at_0[0x40];
4814};
4815
4816enum {
4817 MLX5_ACTION_TYPE_SET = 0x1,
4818 MLX5_ACTION_TYPE_ADD = 0x2,
4819};
4820
4821enum {
4822 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4823 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4824 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4825 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4826 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4827 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4828 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4829 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4830 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4831 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4832 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4833 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4834 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4835 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4836 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4837 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4838 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4839 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4840 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4841 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4842 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4843 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004844 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004845};
4846
4847struct mlx5_ifc_alloc_modify_header_context_out_bits {
4848 u8 status[0x8];
4849 u8 reserved_at_8[0x18];
4850
4851 u8 syndrome[0x20];
4852
4853 u8 modify_header_id[0x20];
4854
4855 u8 reserved_at_60[0x20];
4856};
4857
4858struct mlx5_ifc_alloc_modify_header_context_in_bits {
4859 u8 opcode[0x10];
4860 u8 reserved_at_10[0x10];
4861
4862 u8 reserved_at_20[0x10];
4863 u8 op_mod[0x10];
4864
4865 u8 reserved_at_40[0x20];
4866
4867 u8 table_type[0x8];
4868 u8 reserved_at_68[0x10];
4869 u8 num_of_actions[0x8];
4870
4871 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4872};
4873
4874struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4875 u8 status[0x8];
4876 u8 reserved_at_8[0x18];
4877
4878 u8 syndrome[0x20];
4879
4880 u8 reserved_at_40[0x40];
4881};
4882
4883struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4884 u8 opcode[0x10];
4885 u8 reserved_at_10[0x10];
4886
4887 u8 reserved_at_20[0x10];
4888 u8 op_mod[0x10];
4889
4890 u8 modify_header_id[0x20];
4891
4892 u8 reserved_at_60[0x20];
4893};
4894
Saeed Mahameede2816822015-05-28 22:28:40 +03004895struct mlx5_ifc_query_dct_out_bits {
4896 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898
4899 u8 syndrome[0x20];
4900
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902
4903 struct mlx5_ifc_dctc_bits dct_context_entry;
4904
Matan Barakb4ff3a32016-02-09 14:57:42 +02004905 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004906};
4907
4908struct mlx5_ifc_query_dct_in_bits {
4909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913 u8 op_mod[0x10];
4914
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916 u8 dctn[0x18];
4917
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919};
4920
4921struct mlx5_ifc_query_cq_out_bits {
4922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924
4925 u8 syndrome[0x20];
4926
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
4929 struct mlx5_ifc_cqc_bits cq_context;
4930
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932
4933 u8 pas[0][0x40];
4934};
4935
4936struct mlx5_ifc_query_cq_in_bits {
4937 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941 u8 op_mod[0x10];
4942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944 u8 cqn[0x18];
4945
Matan Barakb4ff3a32016-02-09 14:57:42 +02004946 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947};
4948
4949struct mlx5_ifc_query_cong_status_out_bits {
4950 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952
4953 u8 syndrome[0x20];
4954
Matan Barakb4ff3a32016-02-09 14:57:42 +02004955 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004956
4957 u8 enable[0x1];
4958 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960};
4961
4962struct mlx5_ifc_query_cong_status_in_bits {
4963 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004964 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967 u8 op_mod[0x10];
4968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970 u8 priority[0x4];
4971 u8 cong_protocol[0x4];
4972
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974};
4975
4976struct mlx5_ifc_query_cong_statistics_out_bits {
4977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004979
4980 u8 syndrome[0x20];
4981
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983
Parav Pandite1f24a72017-04-16 07:29:29 +03004984 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004985
4986 u8 sum_flows[0x20];
4987
Parav Pandite1f24a72017-04-16 07:29:29 +03004988 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004989
Parav Pandite1f24a72017-04-16 07:29:29 +03004990 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991
Parav Pandite1f24a72017-04-16 07:29:29 +03004992 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993
Parav Pandite1f24a72017-04-16 07:29:29 +03004994 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
4998 u8 time_stamp_high[0x20];
4999
5000 u8 time_stamp_low[0x20];
5001
5002 u8 accumulators_period[0x20];
5003
Parav Pandite1f24a72017-04-16 07:29:29 +03005004 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005
Parav Pandite1f24a72017-04-16 07:29:29 +03005006 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005007
Parav Pandite1f24a72017-04-16 07:29:29 +03005008 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
Parav Pandite1f24a72017-04-16 07:29:29 +03005010 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013};
5014
5015struct mlx5_ifc_query_cong_statistics_in_bits {
5016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020 u8 op_mod[0x10];
5021
5022 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026};
5027
5028struct mlx5_ifc_query_cong_params_out_bits {
5029 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031
5032 u8 syndrome[0x20];
5033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035
5036 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5037};
5038
5039struct mlx5_ifc_query_cong_params_in_bits {
5040 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
Matan Barakb4ff3a32016-02-09 14:57:42 +02005043 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005044 u8 op_mod[0x10];
5045
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047 u8 cong_protocol[0x4];
5048
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050};
5051
5052struct mlx5_ifc_query_adapter_out_bits {
5053 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055
5056 u8 syndrome[0x20];
5057
Matan Barakb4ff3a32016-02-09 14:57:42 +02005058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005059
5060 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5061};
5062
5063struct mlx5_ifc_query_adapter_in_bits {
5064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068 u8 op_mod[0x10];
5069
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071};
5072
5073struct mlx5_ifc_qp_2rst_out_bits {
5074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005076
5077 u8 syndrome[0x20];
5078
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080};
5081
5082struct mlx5_ifc_qp_2rst_in_bits {
5083 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005084 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005085
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087 u8 op_mod[0x10];
5088
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005090 u8 qpn[0x18];
5091
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005093};
5094
5095struct mlx5_ifc_qp_2err_out_bits {
5096 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005097 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005098
5099 u8 syndrome[0x20];
5100
Matan Barakb4ff3a32016-02-09 14:57:42 +02005101 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005102};
5103
5104struct mlx5_ifc_qp_2err_in_bits {
5105 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005106 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005107
Matan Barakb4ff3a32016-02-09 14:57:42 +02005108 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109 u8 op_mod[0x10];
5110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112 u8 qpn[0x18];
5113
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115};
5116
5117struct mlx5_ifc_page_fault_resume_out_bits {
5118 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005119 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005120
5121 u8 syndrome[0x20];
5122
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124};
5125
5126struct mlx5_ifc_page_fault_resume_in_bits {
5127 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005129
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131 u8 op_mod[0x10];
5132
5133 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005135 u8 page_fault_type[0x3];
5136 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005138 u8 reserved_at_60[0x8];
5139 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140};
5141
5142struct mlx5_ifc_nop_out_bits {
5143 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145
5146 u8 syndrome[0x20];
5147
Matan Barakb4ff3a32016-02-09 14:57:42 +02005148 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005149};
5150
5151struct mlx5_ifc_nop_in_bits {
5152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156 u8 op_mod[0x10];
5157
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005159};
5160
5161struct mlx5_ifc_modify_vport_state_out_bits {
5162 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
5165 u8 syndrome[0x20];
5166
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168};
5169
5170struct mlx5_ifc_modify_vport_state_in_bits {
5171 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005173
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175 u8 op_mod[0x10];
5176
5177 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005179 u8 vport_number[0x10];
5180
Matan Barakb4ff3a32016-02-09 14:57:42 +02005181 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005182 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005183 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005184};
5185
5186struct mlx5_ifc_modify_tis_out_bits {
5187 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189
5190 u8 syndrome[0x20];
5191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193};
5194
majd@mellanox.com75850d02016-01-14 19:13:06 +02005195struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005197
Aviv Heller84df61e2016-05-10 13:47:50 +03005198 u8 reserved_at_20[0x1d];
5199 u8 lag_tx_port_affinity[0x1];
5200 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005201 u8 prio[0x1];
5202};
5203
Saeed Mahameede2816822015-05-28 22:28:40 +03005204struct mlx5_ifc_modify_tis_in_bits {
5205 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005209 u8 op_mod[0x10];
5210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212 u8 tisn[0x18];
5213
Matan Barakb4ff3a32016-02-09 14:57:42 +02005214 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005215
majd@mellanox.com75850d02016-01-14 19:13:06 +02005216 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005217
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219
5220 struct mlx5_ifc_tisc_bits ctx;
5221};
5222
Achiad Shochatd9eea402015-08-04 14:05:42 +03005223struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005225
Matan Barakb4ff3a32016-02-09 14:57:42 +02005226 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005227 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005228 u8 reserved_at_3c[0x1];
5229 u8 hash[0x1];
5230 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005231 u8 lro[0x1];
5232};
5233
Saeed Mahameede2816822015-05-28 22:28:40 +03005234struct mlx5_ifc_modify_tir_out_bits {
5235 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005236 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005237
5238 u8 syndrome[0x20];
5239
Matan Barakb4ff3a32016-02-09 14:57:42 +02005240 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005241};
5242
5243struct mlx5_ifc_modify_tir_in_bits {
5244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248 u8 op_mod[0x10];
5249
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251 u8 tirn[0x18];
5252
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254
Achiad Shochatd9eea402015-08-04 14:05:42 +03005255 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258
5259 struct mlx5_ifc_tirc_bits ctx;
5260};
5261
5262struct mlx5_ifc_modify_sq_out_bits {
5263 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005264 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005265
5266 u8 syndrome[0x20];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269};
5270
5271struct mlx5_ifc_modify_sq_in_bits {
5272 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276 u8 op_mod[0x10];
5277
5278 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280 u8 sqn[0x18];
5281
Matan Barakb4ff3a32016-02-09 14:57:42 +02005282 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005283
5284 u8 modify_bitmask[0x40];
5285
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
5288 struct mlx5_ifc_sqc_bits ctx;
5289};
5290
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005291struct mlx5_ifc_modify_scheduling_element_out_bits {
5292 u8 status[0x8];
5293 u8 reserved_at_8[0x18];
5294
5295 u8 syndrome[0x20];
5296
5297 u8 reserved_at_40[0x1c0];
5298};
5299
5300enum {
5301 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5302 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5303};
5304
5305struct mlx5_ifc_modify_scheduling_element_in_bits {
5306 u8 opcode[0x10];
5307 u8 reserved_at_10[0x10];
5308
5309 u8 reserved_at_20[0x10];
5310 u8 op_mod[0x10];
5311
5312 u8 scheduling_hierarchy[0x8];
5313 u8 reserved_at_48[0x18];
5314
5315 u8 scheduling_element_id[0x20];
5316
5317 u8 reserved_at_80[0x20];
5318
5319 u8 modify_bitmask[0x20];
5320
5321 u8 reserved_at_c0[0x40];
5322
5323 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5324
5325 u8 reserved_at_300[0x100];
5326};
5327
Saeed Mahameede2816822015-05-28 22:28:40 +03005328struct mlx5_ifc_modify_rqt_out_bits {
5329 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
5332 u8 syndrome[0x20];
5333
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335};
5336
Achiad Shochat5c503682015-08-04 14:05:43 +03005337struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005338 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005339
Matan Barakb4ff3a32016-02-09 14:57:42 +02005340 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005341 u8 rqn_list[0x1];
5342};
5343
Saeed Mahameede2816822015-05-28 22:28:40 +03005344struct mlx5_ifc_modify_rqt_in_bits {
5345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349 u8 op_mod[0x10];
5350
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352 u8 rqtn[0x18];
5353
Matan Barakb4ff3a32016-02-09 14:57:42 +02005354 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005355
Achiad Shochat5c503682015-08-04 14:05:43 +03005356 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359
5360 struct mlx5_ifc_rqtc_bits ctx;
5361};
5362
5363struct mlx5_ifc_modify_rq_out_bits {
5364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
5367 u8 syndrome[0x20];
5368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370};
5371
Alex Vesker83b502a2016-08-04 17:32:02 +03005372enum {
5373 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005374 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005375 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005376};
5377
Saeed Mahameede2816822015-05-28 22:28:40 +03005378struct mlx5_ifc_modify_rq_in_bits {
5379 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383 u8 op_mod[0x10];
5384
5385 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005386 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005387 u8 rqn[0x18];
5388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390
5391 u8 modify_bitmask[0x40];
5392
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394
5395 struct mlx5_ifc_rqc_bits ctx;
5396};
5397
5398struct mlx5_ifc_modify_rmp_out_bits {
5399 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005400 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005401
5402 u8 syndrome[0x20];
5403
Matan Barakb4ff3a32016-02-09 14:57:42 +02005404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005405};
5406
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005407struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005408 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005411 u8 lwm[0x1];
5412};
5413
Saeed Mahameede2816822015-05-28 22:28:40 +03005414struct mlx5_ifc_modify_rmp_in_bits {
5415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419 u8 op_mod[0x10];
5420
5421 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423 u8 rmpn[0x18];
5424
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005427 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430
5431 struct mlx5_ifc_rmpc_bits ctx;
5432};
5433
5434struct mlx5_ifc_modify_nic_vport_context_out_bits {
5435 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437
5438 u8 syndrome[0x20];
5439
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441};
5442
5443struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005444 u8 reserved_at_0[0x12];
5445 u8 affiliation[0x1];
5446 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005447 u8 disable_uc_local_lb[0x1];
5448 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005449 u8 node_guid[0x1];
5450 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005451 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005452 u8 mtu[0x1];
5453 u8 change_event[0x1];
5454 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005455 u8 permanent_address[0x1];
5456 u8 addresses_list[0x1];
5457 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459};
5460
5461struct mlx5_ifc_modify_nic_vport_context_in_bits {
5462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466 u8 op_mod[0x10];
5467
5468 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005469 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005470 u8 vport_number[0x10];
5471
5472 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5473
Matan Barakb4ff3a32016-02-09 14:57:42 +02005474 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005475
5476 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5477};
5478
5479struct mlx5_ifc_modify_hca_vport_context_out_bits {
5480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482
5483 u8 syndrome[0x20];
5484
Matan Barakb4ff3a32016-02-09 14:57:42 +02005485 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486};
5487
5488struct mlx5_ifc_modify_hca_vport_context_in_bits {
5489 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005491
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493 u8 op_mod[0x10];
5494
5495 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005497 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498 u8 vport_number[0x10];
5499
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501
5502 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5503};
5504
5505struct mlx5_ifc_modify_cq_out_bits {
5506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508
5509 u8 syndrome[0x20];
5510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512};
5513
5514enum {
5515 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5516 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5517};
5518
5519struct mlx5_ifc_modify_cq_in_bits {
5520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524 u8 op_mod[0x10];
5525
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527 u8 cqn[0x18];
5528
5529 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5530
5531 struct mlx5_ifc_cqc_bits cq_context;
5532
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
5535 u8 pas[0][0x40];
5536};
5537
5538struct mlx5_ifc_modify_cong_status_out_bits {
5539 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005540 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005541
5542 u8 syndrome[0x20];
5543
Matan Barakb4ff3a32016-02-09 14:57:42 +02005544 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005545};
5546
5547struct mlx5_ifc_modify_cong_status_in_bits {
5548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550
Matan Barakb4ff3a32016-02-09 14:57:42 +02005551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005552 u8 op_mod[0x10];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555 u8 priority[0x4];
5556 u8 cong_protocol[0x4];
5557
5558 u8 enable[0x1];
5559 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561};
5562
5563struct mlx5_ifc_modify_cong_params_out_bits {
5564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566
5567 u8 syndrome[0x20];
5568
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570};
5571
5572struct mlx5_ifc_modify_cong_params_in_bits {
5573 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005574 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577 u8 op_mod[0x10];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 cong_protocol[0x4];
5581
5582 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5583
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
5586 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5587};
5588
5589struct mlx5_ifc_manage_pages_out_bits {
5590 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005591 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592
5593 u8 syndrome[0x20];
5594
5595 u8 output_num_entries[0x20];
5596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598
5599 u8 pas[0][0x40];
5600};
5601
5602enum {
5603 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5604 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5605 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5606};
5607
5608struct mlx5_ifc_manage_pages_in_bits {
5609 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613 u8 op_mod[0x10];
5614
Matan Barakb4ff3a32016-02-09 14:57:42 +02005615 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005616 u8 function_id[0x10];
5617
5618 u8 input_num_entries[0x20];
5619
5620 u8 pas[0][0x40];
5621};
5622
5623struct mlx5_ifc_mad_ifc_out_bits {
5624 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626
5627 u8 syndrome[0x20];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630
5631 u8 response_mad_packet[256][0x8];
5632};
5633
5634struct mlx5_ifc_mad_ifc_in_bits {
5635 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
Matan Barakb4ff3a32016-02-09 14:57:42 +02005638 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005639 u8 op_mod[0x10];
5640
5641 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005642 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005643 u8 port[0x8];
5644
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
5647 u8 mad[256][0x8];
5648};
5649
5650struct mlx5_ifc_init_hca_out_bits {
5651 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005652 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005653
5654 u8 syndrome[0x20];
5655
Matan Barakb4ff3a32016-02-09 14:57:42 +02005656 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005657};
5658
5659struct mlx5_ifc_init_hca_in_bits {
5660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664 u8 op_mod[0x10];
5665
Matan Barakb4ff3a32016-02-09 14:57:42 +02005666 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005667 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_init2rtr_qp_out_bits {
5671 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
5674 u8 syndrome[0x20];
5675
Matan Barakb4ff3a32016-02-09 14:57:42 +02005676 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005677};
5678
5679struct mlx5_ifc_init2rtr_qp_in_bits {
5680 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684 u8 op_mod[0x10];
5685
Matan Barakb4ff3a32016-02-09 14:57:42 +02005686 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005687 u8 qpn[0x18];
5688
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
5691 u8 opt_param_mask[0x20];
5692
Matan Barakb4ff3a32016-02-09 14:57:42 +02005693 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005694
5695 struct mlx5_ifc_qpc_bits qpc;
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_init2init_qp_out_bits {
5701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
5704 u8 syndrome[0x20];
5705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707};
5708
5709struct mlx5_ifc_init2init_qp_in_bits {
5710 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714 u8 op_mod[0x10];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717 u8 qpn[0x18];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720
5721 u8 opt_param_mask[0x20];
5722
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
5725 struct mlx5_ifc_qpc_bits qpc;
5726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728};
5729
5730struct mlx5_ifc_get_dropped_packet_log_out_bits {
5731 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733
5734 u8 syndrome[0x20];
5735
Matan Barakb4ff3a32016-02-09 14:57:42 +02005736 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005737
5738 u8 packet_headers_log[128][0x8];
5739
5740 u8 packet_syndrome[64][0x8];
5741};
5742
5743struct mlx5_ifc_get_dropped_packet_log_in_bits {
5744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005746
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748 u8 op_mod[0x10];
5749
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751};
5752
5753struct mlx5_ifc_gen_eqe_in_bits {
5754 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758 u8 op_mod[0x10];
5759
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761 u8 eq_number[0x8];
5762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764
5765 u8 eqe[64][0x8];
5766};
5767
5768struct mlx5_ifc_gen_eq_out_bits {
5769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
5772 u8 syndrome[0x20];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_enable_hca_out_bits {
5778 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
5781 u8 syndrome[0x20];
5782
Matan Barakb4ff3a32016-02-09 14:57:42 +02005783 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005784};
5785
5786struct mlx5_ifc_enable_hca_in_bits {
5787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005789
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791 u8 op_mod[0x10];
5792
Matan Barakb4ff3a32016-02-09 14:57:42 +02005793 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005794 u8 function_id[0x10];
5795
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797};
5798
5799struct mlx5_ifc_drain_dct_out_bits {
5800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802
5803 u8 syndrome[0x20];
5804
Matan Barakb4ff3a32016-02-09 14:57:42 +02005805 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005806};
5807
5808struct mlx5_ifc_drain_dct_in_bits {
5809 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813 u8 op_mod[0x10];
5814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816 u8 dctn[0x18];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819};
5820
5821struct mlx5_ifc_disable_hca_out_bits {
5822 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824
5825 u8 syndrome[0x20];
5826
Matan Barakb4ff3a32016-02-09 14:57:42 +02005827 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005828};
5829
5830struct mlx5_ifc_disable_hca_in_bits {
5831 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835 u8 op_mod[0x10];
5836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838 u8 function_id[0x10];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841};
5842
5843struct mlx5_ifc_detach_from_mcg_out_bits {
5844 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846
5847 u8 syndrome[0x20];
5848
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850};
5851
5852struct mlx5_ifc_detach_from_mcg_in_bits {
5853 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857 u8 op_mod[0x10];
5858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860 u8 qpn[0x18];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863
5864 u8 multicast_gid[16][0x8];
5865};
5866
Saeed Mahameed74862162016-06-09 15:11:34 +03005867struct mlx5_ifc_destroy_xrq_out_bits {
5868 u8 status[0x8];
5869 u8 reserved_at_8[0x18];
5870
5871 u8 syndrome[0x20];
5872
5873 u8 reserved_at_40[0x40];
5874};
5875
5876struct mlx5_ifc_destroy_xrq_in_bits {
5877 u8 opcode[0x10];
5878 u8 reserved_at_10[0x10];
5879
5880 u8 reserved_at_20[0x10];
5881 u8 op_mod[0x10];
5882
5883 u8 reserved_at_40[0x8];
5884 u8 xrqn[0x18];
5885
5886 u8 reserved_at_60[0x20];
5887};
5888
Saeed Mahameede2816822015-05-28 22:28:40 +03005889struct mlx5_ifc_destroy_xrc_srq_out_bits {
5890 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892
5893 u8 syndrome[0x20];
5894
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896};
5897
5898struct mlx5_ifc_destroy_xrc_srq_in_bits {
5899 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005900 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005901
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903 u8 op_mod[0x10];
5904
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906 u8 xrc_srqn[0x18];
5907
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909};
5910
5911struct mlx5_ifc_destroy_tis_out_bits {
5912 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914
5915 u8 syndrome[0x20];
5916
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918};
5919
5920struct mlx5_ifc_destroy_tis_in_bits {
5921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005923
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925 u8 op_mod[0x10];
5926
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928 u8 tisn[0x18];
5929
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931};
5932
5933struct mlx5_ifc_destroy_tir_out_bits {
5934 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936
5937 u8 syndrome[0x20];
5938
Matan Barakb4ff3a32016-02-09 14:57:42 +02005939 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005940};
5941
5942struct mlx5_ifc_destroy_tir_in_bits {
5943 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005944 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005945
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947 u8 op_mod[0x10];
5948
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950 u8 tirn[0x18];
5951
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953};
5954
5955struct mlx5_ifc_destroy_srq_out_bits {
5956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
5959 u8 syndrome[0x20];
5960
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962};
5963
5964struct mlx5_ifc_destroy_srq_in_bits {
5965 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967
Matan Barakb4ff3a32016-02-09 14:57:42 +02005968 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005969 u8 op_mod[0x10];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972 u8 srqn[0x18];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_sq_out_bits {
5978 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
5981 u8 syndrome[0x20];
5982
Matan Barakb4ff3a32016-02-09 14:57:42 +02005983 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005984};
5985
5986struct mlx5_ifc_destroy_sq_in_bits {
5987 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991 u8 op_mod[0x10];
5992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994 u8 sqn[0x18];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005999struct mlx5_ifc_destroy_scheduling_element_out_bits {
6000 u8 status[0x8];
6001 u8 reserved_at_8[0x18];
6002
6003 u8 syndrome[0x20];
6004
6005 u8 reserved_at_40[0x1c0];
6006};
6007
6008struct mlx5_ifc_destroy_scheduling_element_in_bits {
6009 u8 opcode[0x10];
6010 u8 reserved_at_10[0x10];
6011
6012 u8 reserved_at_20[0x10];
6013 u8 op_mod[0x10];
6014
6015 u8 scheduling_hierarchy[0x8];
6016 u8 reserved_at_48[0x18];
6017
6018 u8 scheduling_element_id[0x20];
6019
6020 u8 reserved_at_80[0x180];
6021};
6022
Saeed Mahameede2816822015-05-28 22:28:40 +03006023struct mlx5_ifc_destroy_rqt_out_bits {
6024 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026
6027 u8 syndrome[0x20];
6028
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030};
6031
6032struct mlx5_ifc_destroy_rqt_in_bits {
6033 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037 u8 op_mod[0x10];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040 u8 rqtn[0x18];
6041
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043};
6044
6045struct mlx5_ifc_destroy_rq_out_bits {
6046 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048
6049 u8 syndrome[0x20];
6050
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052};
6053
6054struct mlx5_ifc_destroy_rq_in_bits {
6055 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057
Matan Barakb4ff3a32016-02-09 14:57:42 +02006058 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059 u8 op_mod[0x10];
6060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062 u8 rqn[0x18];
6063
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065};
6066
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006067struct mlx5_ifc_set_delay_drop_params_in_bits {
6068 u8 opcode[0x10];
6069 u8 reserved_at_10[0x10];
6070
6071 u8 reserved_at_20[0x10];
6072 u8 op_mod[0x10];
6073
6074 u8 reserved_at_40[0x20];
6075
6076 u8 reserved_at_60[0x10];
6077 u8 delay_drop_timeout[0x10];
6078};
6079
6080struct mlx5_ifc_set_delay_drop_params_out_bits {
6081 u8 status[0x8];
6082 u8 reserved_at_8[0x18];
6083
6084 u8 syndrome[0x20];
6085
6086 u8 reserved_at_40[0x40];
6087};
6088
Saeed Mahameede2816822015-05-28 22:28:40 +03006089struct mlx5_ifc_destroy_rmp_out_bits {
6090 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092
6093 u8 syndrome[0x20];
6094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096};
6097
6098struct mlx5_ifc_destroy_rmp_in_bits {
6099 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101
Matan Barakb4ff3a32016-02-09 14:57:42 +02006102 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006103 u8 op_mod[0x10];
6104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106 u8 rmpn[0x18];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109};
6110
6111struct mlx5_ifc_destroy_qp_out_bits {
6112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
6115 u8 syndrome[0x20];
6116
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118};
6119
6120struct mlx5_ifc_destroy_qp_in_bits {
6121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125 u8 op_mod[0x10];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128 u8 qpn[0x18];
6129
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131};
6132
6133struct mlx5_ifc_destroy_psv_out_bits {
6134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
6137 u8 syndrome[0x20];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140};
6141
6142struct mlx5_ifc_destroy_psv_in_bits {
6143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 op_mod[0x10];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150 u8 psvn[0x18];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_destroy_mkey_out_bits {
6156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
6159 u8 syndrome[0x20];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162};
6163
6164struct mlx5_ifc_destroy_mkey_in_bits {
6165 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 op_mod[0x10];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172 u8 mkey_index[0x18];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_destroy_flow_table_out_bits {
6178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
6181 u8 syndrome[0x20];
6182
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184};
6185
6186struct mlx5_ifc_destroy_flow_table_in_bits {
6187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 op_mod[0x10];
6192
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006193 u8 other_vport[0x1];
6194 u8 reserved_at_41[0xf];
6195 u8 vport_number[0x10];
6196
6197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198
6199 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203 u8 table_id[0x18];
6204
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206};
6207
6208struct mlx5_ifc_destroy_flow_group_out_bits {
6209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006211
6212 u8 syndrome[0x20];
6213
Matan Barakb4ff3a32016-02-09 14:57:42 +02006214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006215};
6216
6217struct mlx5_ifc_destroy_flow_group_in_bits {
6218 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006219 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222 u8 op_mod[0x10];
6223
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006224 u8 other_vport[0x1];
6225 u8 reserved_at_41[0xf];
6226 u8 vport_number[0x10];
6227
6228 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229
6230 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234 u8 table_id[0x18];
6235
6236 u8 group_id[0x20];
6237
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239};
6240
6241struct mlx5_ifc_destroy_eq_out_bits {
6242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244
6245 u8 syndrome[0x20];
6246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248};
6249
6250struct mlx5_ifc_destroy_eq_in_bits {
6251 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253
Matan Barakb4ff3a32016-02-09 14:57:42 +02006254 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255 u8 op_mod[0x10];
6256
Matan Barakb4ff3a32016-02-09 14:57:42 +02006257 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006258 u8 eq_number[0x8];
6259
Matan Barakb4ff3a32016-02-09 14:57:42 +02006260 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006261};
6262
6263struct mlx5_ifc_destroy_dct_out_bits {
6264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006266
6267 u8 syndrome[0x20];
6268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270};
6271
6272struct mlx5_ifc_destroy_dct_in_bits {
6273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006274 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006275
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277 u8 op_mod[0x10];
6278
Matan Barakb4ff3a32016-02-09 14:57:42 +02006279 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006280 u8 dctn[0x18];
6281
Matan Barakb4ff3a32016-02-09 14:57:42 +02006282 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006283};
6284
6285struct mlx5_ifc_destroy_cq_out_bits {
6286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006288
6289 u8 syndrome[0x20];
6290
Matan Barakb4ff3a32016-02-09 14:57:42 +02006291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006292};
6293
6294struct mlx5_ifc_destroy_cq_in_bits {
6295 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006296 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006297
Matan Barakb4ff3a32016-02-09 14:57:42 +02006298 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006299 u8 op_mod[0x10];
6300
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302 u8 cqn[0x18];
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305};
6306
6307struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6308 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
6311 u8 syndrome[0x20];
6312
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314};
6315
6316struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321 u8 op_mod[0x10];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326 u8 vxlan_udp_port[0x10];
6327};
6328
6329struct mlx5_ifc_delete_l2_table_entry_out_bits {
6330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
6333 u8 syndrome[0x20];
6334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336};
6337
6338struct mlx5_ifc_delete_l2_table_entry_in_bits {
6339 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006340 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343 u8 op_mod[0x10];
6344
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348 u8 table_index[0x18];
6349
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351};
6352
6353struct mlx5_ifc_delete_fte_out_bits {
6354 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356
6357 u8 syndrome[0x20];
6358
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360};
6361
6362struct mlx5_ifc_delete_fte_in_bits {
6363 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006364 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367 u8 op_mod[0x10];
6368
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006369 u8 other_vport[0x1];
6370 u8 reserved_at_41[0xf];
6371 u8 vport_number[0x10];
6372
6373 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374
6375 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
Matan Barakb4ff3a32016-02-09 14:57:42 +02006378 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006379 u8 table_id[0x18];
6380
Matan Barakb4ff3a32016-02-09 14:57:42 +02006381 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006382
6383 u8 flow_index[0x20];
6384
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386};
6387
6388struct mlx5_ifc_dealloc_xrcd_out_bits {
6389 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391
6392 u8 syndrome[0x20];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395};
6396
6397struct mlx5_ifc_dealloc_xrcd_in_bits {
6398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402 u8 op_mod[0x10];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405 u8 xrcd[0x18];
6406
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408};
6409
6410struct mlx5_ifc_dealloc_uar_out_bits {
6411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413
6414 u8 syndrome[0x20];
6415
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417};
6418
6419struct mlx5_ifc_dealloc_uar_in_bits {
6420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424 u8 op_mod[0x10];
6425
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427 u8 uar[0x18];
6428
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430};
6431
6432struct mlx5_ifc_dealloc_transport_domain_out_bits {
6433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435
6436 u8 syndrome[0x20];
6437
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439};
6440
6441struct mlx5_ifc_dealloc_transport_domain_in_bits {
6442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446 u8 op_mod[0x10];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449 u8 transport_domain[0x18];
6450
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452};
6453
6454struct mlx5_ifc_dealloc_q_counter_out_bits {
6455 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006456 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006457
6458 u8 syndrome[0x20];
6459
Matan Barakb4ff3a32016-02-09 14:57:42 +02006460 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006461};
6462
6463struct mlx5_ifc_dealloc_q_counter_in_bits {
6464 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466
Matan Barakb4ff3a32016-02-09 14:57:42 +02006467 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006468 u8 op_mod[0x10];
6469
Matan Barakb4ff3a32016-02-09 14:57:42 +02006470 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006471 u8 counter_set_id[0x8];
6472
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474};
6475
6476struct mlx5_ifc_dealloc_pd_out_bits {
6477 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
6480 u8 syndrome[0x20];
6481
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483};
6484
6485struct mlx5_ifc_dealloc_pd_in_bits {
6486 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 op_mod[0x10];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493 u8 pd[0x18];
6494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496};
6497
Amir Vadai9dc0b282016-05-13 12:55:39 +00006498struct mlx5_ifc_dealloc_flow_counter_out_bits {
6499 u8 status[0x8];
6500 u8 reserved_at_8[0x18];
6501
6502 u8 syndrome[0x20];
6503
6504 u8 reserved_at_40[0x40];
6505};
6506
6507struct mlx5_ifc_dealloc_flow_counter_in_bits {
6508 u8 opcode[0x10];
6509 u8 reserved_at_10[0x10];
6510
6511 u8 reserved_at_20[0x10];
6512 u8 op_mod[0x10];
6513
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006514 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006515
6516 u8 reserved_at_60[0x20];
6517};
6518
Saeed Mahameed74862162016-06-09 15:11:34 +03006519struct mlx5_ifc_create_xrq_out_bits {
6520 u8 status[0x8];
6521 u8 reserved_at_8[0x18];
6522
6523 u8 syndrome[0x20];
6524
6525 u8 reserved_at_40[0x8];
6526 u8 xrqn[0x18];
6527
6528 u8 reserved_at_60[0x20];
6529};
6530
6531struct mlx5_ifc_create_xrq_in_bits {
6532 u8 opcode[0x10];
6533 u8 reserved_at_10[0x10];
6534
6535 u8 reserved_at_20[0x10];
6536 u8 op_mod[0x10];
6537
6538 u8 reserved_at_40[0x40];
6539
6540 struct mlx5_ifc_xrqc_bits xrq_context;
6541};
6542
Saeed Mahameede2816822015-05-28 22:28:40 +03006543struct mlx5_ifc_create_xrc_srq_out_bits {
6544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
6547 u8 syndrome[0x20];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550 u8 xrc_srqn[0x18];
6551
Matan Barakb4ff3a32016-02-09 14:57:42 +02006552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006553};
6554
6555struct mlx5_ifc_create_xrc_srq_in_bits {
6556 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006557 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006558
Matan Barakb4ff3a32016-02-09 14:57:42 +02006559 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006560 u8 op_mod[0x10];
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563
6564 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6565
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 pas[0][0x40];
6569};
6570
6571struct mlx5_ifc_create_tis_out_bits {
6572 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574
6575 u8 syndrome[0x20];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 tisn[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581};
6582
6583struct mlx5_ifc_create_tis_in_bits {
6584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588 u8 op_mod[0x10];
6589
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591
6592 struct mlx5_ifc_tisc_bits ctx;
6593};
6594
6595struct mlx5_ifc_create_tir_out_bits {
6596 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006597 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006598
6599 u8 syndrome[0x20];
6600
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602 u8 tirn[0x18];
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605};
6606
6607struct mlx5_ifc_create_tir_in_bits {
6608 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612 u8 op_mod[0x10];
6613
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615
6616 struct mlx5_ifc_tirc_bits ctx;
6617};
6618
6619struct mlx5_ifc_create_srq_out_bits {
6620 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006621 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006622
6623 u8 syndrome[0x20];
6624
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626 u8 srqn[0x18];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629};
6630
6631struct mlx5_ifc_create_srq_in_bits {
6632 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006634
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636 u8 op_mod[0x10];
6637
Matan Barakb4ff3a32016-02-09 14:57:42 +02006638 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006639
6640 struct mlx5_ifc_srqc_bits srq_context_entry;
6641
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643
6644 u8 pas[0][0x40];
6645};
6646
6647struct mlx5_ifc_create_sq_out_bits {
6648 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650
6651 u8 syndrome[0x20];
6652
Matan Barakb4ff3a32016-02-09 14:57:42 +02006653 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006654 u8 sqn[0x18];
6655
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657};
6658
6659struct mlx5_ifc_create_sq_in_bits {
6660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664 u8 op_mod[0x10];
6665
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667
6668 struct mlx5_ifc_sqc_bits ctx;
6669};
6670
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006671struct mlx5_ifc_create_scheduling_element_out_bits {
6672 u8 status[0x8];
6673 u8 reserved_at_8[0x18];
6674
6675 u8 syndrome[0x20];
6676
6677 u8 reserved_at_40[0x40];
6678
6679 u8 scheduling_element_id[0x20];
6680
6681 u8 reserved_at_a0[0x160];
6682};
6683
6684struct mlx5_ifc_create_scheduling_element_in_bits {
6685 u8 opcode[0x10];
6686 u8 reserved_at_10[0x10];
6687
6688 u8 reserved_at_20[0x10];
6689 u8 op_mod[0x10];
6690
6691 u8 scheduling_hierarchy[0x8];
6692 u8 reserved_at_48[0x18];
6693
6694 u8 reserved_at_60[0xa0];
6695
6696 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6697
6698 u8 reserved_at_300[0x100];
6699};
6700
Saeed Mahameede2816822015-05-28 22:28:40 +03006701struct mlx5_ifc_create_rqt_out_bits {
6702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704
6705 u8 syndrome[0x20];
6706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708 u8 rqtn[0x18];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711};
6712
6713struct mlx5_ifc_create_rqt_in_bits {
6714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718 u8 op_mod[0x10];
6719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
6722 struct mlx5_ifc_rqtc_bits rqt_context;
6723};
6724
6725struct mlx5_ifc_create_rq_out_bits {
6726 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728
6729 u8 syndrome[0x20];
6730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732 u8 rqn[0x18];
6733
Matan Barakb4ff3a32016-02-09 14:57:42 +02006734 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006735};
6736
6737struct mlx5_ifc_create_rq_in_bits {
6738 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740
Matan Barakb4ff3a32016-02-09 14:57:42 +02006741 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006742 u8 op_mod[0x10];
6743
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745
6746 struct mlx5_ifc_rqc_bits ctx;
6747};
6748
6749struct mlx5_ifc_create_rmp_out_bits {
6750 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752
6753 u8 syndrome[0x20];
6754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756 u8 rmpn[0x18];
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759};
6760
6761struct mlx5_ifc_create_rmp_in_bits {
6762 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006763 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766 u8 op_mod[0x10];
6767
Matan Barakb4ff3a32016-02-09 14:57:42 +02006768 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006769
6770 struct mlx5_ifc_rmpc_bits ctx;
6771};
6772
6773struct mlx5_ifc_create_qp_out_bits {
6774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776
6777 u8 syndrome[0x20];
6778
Matan Barakb4ff3a32016-02-09 14:57:42 +02006779 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006780 u8 qpn[0x18];
6781
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783};
6784
6785struct mlx5_ifc_create_qp_in_bits {
6786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790 u8 op_mod[0x10];
6791
Matan Barakb4ff3a32016-02-09 14:57:42 +02006792 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006793
6794 u8 opt_param_mask[0x20];
6795
Matan Barakb4ff3a32016-02-09 14:57:42 +02006796 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 struct mlx5_ifc_qpc_bits qpc;
6799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801
6802 u8 pas[0][0x40];
6803};
6804
6805struct mlx5_ifc_create_psv_out_bits {
6806 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
6809 u8 syndrome[0x20];
6810
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814 u8 psv0_index[0x18];
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817 u8 psv1_index[0x18];
6818
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820 u8 psv2_index[0x18];
6821
Matan Barakb4ff3a32016-02-09 14:57:42 +02006822 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823 u8 psv3_index[0x18];
6824};
6825
6826struct mlx5_ifc_create_psv_in_bits {
6827 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831 u8 op_mod[0x10];
6832
6833 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835 u8 pd[0x18];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838};
6839
6840struct mlx5_ifc_create_mkey_out_bits {
6841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006843
6844 u8 syndrome[0x20];
6845
Matan Barakb4ff3a32016-02-09 14:57:42 +02006846 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006847 u8 mkey_index[0x18];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850};
6851
6852struct mlx5_ifc_create_mkey_in_bits {
6853 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857 u8 op_mod[0x10];
6858
Matan Barakb4ff3a32016-02-09 14:57:42 +02006859 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006860
6861 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006862 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006863
6864 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6865
Matan Barakb4ff3a32016-02-09 14:57:42 +02006866 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006867
6868 u8 translations_octword_actual_size[0x20];
6869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871
6872 u8 klm_pas_mtt[0][0x20];
6873};
6874
6875struct mlx5_ifc_create_flow_table_out_bits {
6876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878
6879 u8 syndrome[0x20];
6880
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882 u8 table_id[0x18];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885};
6886
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006887struct mlx5_ifc_flow_table_context_bits {
6888 u8 encap_en[0x1];
6889 u8 decap_en[0x1];
6890 u8 reserved_at_2[0x2];
6891 u8 table_miss_action[0x4];
6892 u8 level[0x8];
6893 u8 reserved_at_10[0x8];
6894 u8 log_size[0x8];
6895
6896 u8 reserved_at_20[0x8];
6897 u8 table_miss_id[0x18];
6898
6899 u8 reserved_at_40[0x8];
6900 u8 lag_master_next_table_id[0x18];
6901
6902 u8 reserved_at_60[0xe0];
6903};
6904
Saeed Mahameede2816822015-05-28 22:28:40 +03006905struct mlx5_ifc_create_flow_table_in_bits {
6906 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006907 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910 u8 op_mod[0x10];
6911
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006912 u8 other_vport[0x1];
6913 u8 reserved_at_41[0xf];
6914 u8 vport_number[0x10];
6915
6916 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917
6918 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006923 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006924};
6925
6926struct mlx5_ifc_create_flow_group_out_bits {
6927 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
6930 u8 syndrome[0x20];
6931
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933 u8 group_id[0x18];
6934
Matan Barakb4ff3a32016-02-09 14:57:42 +02006935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006936};
6937
6938enum {
6939 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6940 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6941 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6942};
6943
6944struct mlx5_ifc_create_flow_group_in_bits {
6945 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947
Matan Barakb4ff3a32016-02-09 14:57:42 +02006948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006949 u8 op_mod[0x10];
6950
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006951 u8 other_vport[0x1];
6952 u8 reserved_at_41[0xf];
6953 u8 vport_number[0x10];
6954
6955 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956
6957 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006958 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006959
Matan Barakb4ff3a32016-02-09 14:57:42 +02006960 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006961 u8 table_id[0x18];
6962
Matan Barakb4ff3a32016-02-09 14:57:42 +02006963 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006964
6965 u8 start_flow_index[0x20];
6966
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968
6969 u8 end_flow_index[0x20];
6970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974 u8 match_criteria_enable[0x8];
6975
6976 struct mlx5_ifc_fte_match_param_bits match_criteria;
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979};
6980
6981struct mlx5_ifc_create_eq_out_bits {
6982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 syndrome[0x20];
6986
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988 u8 eq_number[0x8];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991};
6992
6993struct mlx5_ifc_create_eq_in_bits {
6994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 op_mod[0x10];
6999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001
7002 struct mlx5_ifc_eqc_bits eq_context_entry;
7003
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005
7006 u8 event_bitmask[0x40];
7007
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009
7010 u8 pas[0][0x40];
7011};
7012
7013struct mlx5_ifc_create_dct_out_bits {
7014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016
7017 u8 syndrome[0x20];
7018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020 u8 dctn[0x18];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023};
7024
7025struct mlx5_ifc_create_dct_in_bits {
7026 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 op_mod[0x10];
7031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033
7034 struct mlx5_ifc_dctc_bits dct_context_entry;
7035
Matan Barakb4ff3a32016-02-09 14:57:42 +02007036 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007037};
7038
7039struct mlx5_ifc_create_cq_out_bits {
7040 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042
7043 u8 syndrome[0x20];
7044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046 u8 cqn[0x18];
7047
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049};
7050
7051struct mlx5_ifc_create_cq_in_bits {
7052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056 u8 op_mod[0x10];
7057
Matan Barakb4ff3a32016-02-09 14:57:42 +02007058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007059
7060 struct mlx5_ifc_cqc_bits cq_context;
7061
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063
7064 u8 pas[0][0x40];
7065};
7066
7067struct mlx5_ifc_config_int_moderation_out_bits {
7068 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007069 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007070
7071 u8 syndrome[0x20];
7072
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074 u8 min_delay[0xc];
7075 u8 int_vector[0x10];
7076
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078};
7079
7080enum {
7081 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7082 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7083};
7084
7085struct mlx5_ifc_config_int_moderation_in_bits {
7086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090 u8 op_mod[0x10];
7091
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093 u8 min_delay[0xc];
7094 u8 int_vector[0x10];
7095
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097};
7098
7099struct mlx5_ifc_attach_to_mcg_out_bits {
7100 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007101 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007102
7103 u8 syndrome[0x20];
7104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106};
7107
7108struct mlx5_ifc_attach_to_mcg_in_bits {
7109 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113 u8 op_mod[0x10];
7114
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116 u8 qpn[0x18];
7117
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119
7120 u8 multicast_gid[16][0x8];
7121};
7122
Saeed Mahameed74862162016-06-09 15:11:34 +03007123struct mlx5_ifc_arm_xrq_out_bits {
7124 u8 status[0x8];
7125 u8 reserved_at_8[0x18];
7126
7127 u8 syndrome[0x20];
7128
7129 u8 reserved_at_40[0x40];
7130};
7131
7132struct mlx5_ifc_arm_xrq_in_bits {
7133 u8 opcode[0x10];
7134 u8 reserved_at_10[0x10];
7135
7136 u8 reserved_at_20[0x10];
7137 u8 op_mod[0x10];
7138
7139 u8 reserved_at_40[0x8];
7140 u8 xrqn[0x18];
7141
7142 u8 reserved_at_60[0x10];
7143 u8 lwm[0x10];
7144};
7145
Saeed Mahameede2816822015-05-28 22:28:40 +03007146struct mlx5_ifc_arm_xrc_srq_out_bits {
7147 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007148 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007149
7150 u8 syndrome[0x20];
7151
Matan Barakb4ff3a32016-02-09 14:57:42 +02007152 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007153};
7154
7155enum {
7156 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7157};
7158
7159struct mlx5_ifc_arm_xrc_srq_in_bits {
7160 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164 u8 op_mod[0x10];
7165
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167 u8 xrc_srqn[0x18];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170 u8 lwm[0x10];
7171};
7172
7173struct mlx5_ifc_arm_rq_out_bits {
7174 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007175 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007176
7177 u8 syndrome[0x20];
7178
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180};
7181
7182enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007183 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7184 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007185};
7186
7187struct mlx5_ifc_arm_rq_in_bits {
7188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007190
Matan Barakb4ff3a32016-02-09 14:57:42 +02007191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007192 u8 op_mod[0x10];
7193
Matan Barakb4ff3a32016-02-09 14:57:42 +02007194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007195 u8 srq_number[0x18];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198 u8 lwm[0x10];
7199};
7200
7201struct mlx5_ifc_arm_dct_out_bits {
7202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204
7205 u8 syndrome[0x20];
7206
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208};
7209
7210struct mlx5_ifc_arm_dct_in_bits {
7211 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213
Matan Barakb4ff3a32016-02-09 14:57:42 +02007214 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007215 u8 op_mod[0x10];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218 u8 dct_number[0x18];
7219
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221};
7222
7223struct mlx5_ifc_alloc_xrcd_out_bits {
7224 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
7227 u8 syndrome[0x20];
7228
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 xrcd[0x18];
7231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233};
7234
7235struct mlx5_ifc_alloc_xrcd_in_bits {
7236 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238
Matan Barakb4ff3a32016-02-09 14:57:42 +02007239 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007240 u8 op_mod[0x10];
7241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243};
7244
7245struct mlx5_ifc_alloc_uar_out_bits {
7246 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248
7249 u8 syndrome[0x20];
7250
Matan Barakb4ff3a32016-02-09 14:57:42 +02007251 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007252 u8 uar[0x18];
7253
Matan Barakb4ff3a32016-02-09 14:57:42 +02007254 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255};
7256
7257struct mlx5_ifc_alloc_uar_in_bits {
7258 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 op_mod[0x10];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265};
7266
7267struct mlx5_ifc_alloc_transport_domain_out_bits {
7268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007270
7271 u8 syndrome[0x20];
7272
Matan Barakb4ff3a32016-02-09 14:57:42 +02007273 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007274 u8 transport_domain[0x18];
7275
Matan Barakb4ff3a32016-02-09 14:57:42 +02007276 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007277};
7278
7279struct mlx5_ifc_alloc_transport_domain_in_bits {
7280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007282
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284 u8 op_mod[0x10];
7285
Matan Barakb4ff3a32016-02-09 14:57:42 +02007286 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287};
7288
7289struct mlx5_ifc_alloc_q_counter_out_bits {
7290 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292
7293 u8 syndrome[0x20];
7294
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296 u8 counter_set_id[0x8];
7297
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299};
7300
7301struct mlx5_ifc_alloc_q_counter_in_bits {
7302 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306 u8 op_mod[0x10];
7307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309};
7310
7311struct mlx5_ifc_alloc_pd_out_bits {
7312 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
7315 u8 syndrome[0x20];
7316
Matan Barakb4ff3a32016-02-09 14:57:42 +02007317 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007318 u8 pd[0x18];
7319
Matan Barakb4ff3a32016-02-09 14:57:42 +02007320 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007321};
7322
7323struct mlx5_ifc_alloc_pd_in_bits {
7324 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007325 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007326
Matan Barakb4ff3a32016-02-09 14:57:42 +02007327 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007328 u8 op_mod[0x10];
7329
Matan Barakb4ff3a32016-02-09 14:57:42 +02007330 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007331};
7332
Amir Vadai9dc0b282016-05-13 12:55:39 +00007333struct mlx5_ifc_alloc_flow_counter_out_bits {
7334 u8 status[0x8];
7335 u8 reserved_at_8[0x18];
7336
7337 u8 syndrome[0x20];
7338
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007339 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007340
7341 u8 reserved_at_60[0x20];
7342};
7343
7344struct mlx5_ifc_alloc_flow_counter_in_bits {
7345 u8 opcode[0x10];
7346 u8 reserved_at_10[0x10];
7347
7348 u8 reserved_at_20[0x10];
7349 u8 op_mod[0x10];
7350
7351 u8 reserved_at_40[0x40];
7352};
7353
Saeed Mahameede2816822015-05-28 22:28:40 +03007354struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007357
7358 u8 syndrome[0x20];
7359
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361};
7362
7363struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 op_mod[0x10];
7369
Matan Barakb4ff3a32016-02-09 14:57:42 +02007370 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371
Matan Barakb4ff3a32016-02-09 14:57:42 +02007372 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007373 u8 vxlan_udp_port[0x10];
7374};
7375
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007376struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007377 u8 status[0x8];
7378 u8 reserved_at_8[0x18];
7379
7380 u8 syndrome[0x20];
7381
7382 u8 reserved_at_40[0x40];
7383};
7384
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007385struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007386 u8 opcode[0x10];
7387 u8 reserved_at_10[0x10];
7388
7389 u8 reserved_at_20[0x10];
7390 u8 op_mod[0x10];
7391
7392 u8 reserved_at_40[0x10];
7393 u8 rate_limit_index[0x10];
7394
7395 u8 reserved_at_60[0x20];
7396
7397 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007398
7399 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007400};
7401
Saeed Mahameede2816822015-05-28 22:28:40 +03007402struct mlx5_ifc_access_register_out_bits {
7403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405
7406 u8 syndrome[0x20];
7407
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409
7410 u8 register_data[0][0x20];
7411};
7412
7413enum {
7414 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7415 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7416};
7417
7418struct mlx5_ifc_access_register_in_bits {
7419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 op_mod[0x10];
7424
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426 u8 register_id[0x10];
7427
7428 u8 argument[0x20];
7429
7430 u8 register_data[0][0x20];
7431};
7432
7433struct mlx5_ifc_sltp_reg_bits {
7434 u8 status[0x4];
7435 u8 version[0x4];
7436 u8 local_port[0x8];
7437 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 polarity[0x1];
7446 u8 ob_tap0[0x8];
7447 u8 ob_tap1[0x8];
7448 u8 ob_tap2[0x8];
7449
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451 u8 ob_preemp_mode[0x4];
7452 u8 ob_reg[0x8];
7453 u8 ob_bias[0x8];
7454
Matan Barakb4ff3a32016-02-09 14:57:42 +02007455 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007456};
7457
7458struct mlx5_ifc_slrg_reg_bits {
7459 u8 status[0x4];
7460 u8 version[0x4];
7461 u8 local_port[0x8];
7462 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007463 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007464 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466
7467 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 grade_lane_speed[0x4];
7470
7471 u8 grade_version[0x8];
7472 u8 grade[0x18];
7473
Matan Barakb4ff3a32016-02-09 14:57:42 +02007474 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475 u8 height_grade_type[0x4];
7476 u8 height_grade[0x18];
7477
7478 u8 height_dz[0x10];
7479 u8 height_dv[0x10];
7480
Matan Barakb4ff3a32016-02-09 14:57:42 +02007481 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007482 u8 height_sigma[0x10];
7483
Matan Barakb4ff3a32016-02-09 14:57:42 +02007484 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487 u8 phase_grade_type[0x4];
7488 u8 phase_grade[0x18];
7489
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 phase_eo_neg[0x8];
7494
7495 u8 ffe_set_tested[0x10];
7496 u8 test_errors_per_lane[0x10];
7497};
7498
7499struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 vl_hw_cap[0x4];
7506
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508 u8 vl_admin[0x4];
7509
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511 u8 vl_operational[0x4];
7512};
7513
7514struct mlx5_ifc_pude_reg_bits {
7515 u8 swid[0x8];
7516 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 oper_status[0x4];
7521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523};
7524
7525struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007526 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007527 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007528 u8 an_disable_cap[0x1];
7529 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532 u8 proto_mask[0x3];
7533
Saeed Mahameed74862162016-06-09 15:11:34 +03007534 u8 an_status[0x4];
7535 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536
7537 u8 eth_proto_capability[0x20];
7538
7539 u8 ib_link_width_capability[0x10];
7540 u8 ib_proto_capability[0x10];
7541
Matan Barakb4ff3a32016-02-09 14:57:42 +02007542 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007543
7544 u8 eth_proto_admin[0x20];
7545
7546 u8 ib_link_width_admin[0x10];
7547 u8 ib_proto_admin[0x10];
7548
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550
7551 u8 eth_proto_oper[0x20];
7552
7553 u8 ib_link_width_oper[0x10];
7554 u8 ib_proto_oper[0x10];
7555
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007556 u8 reserved_at_160[0x1c];
7557 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558
7559 u8 eth_proto_lp_advertise[0x20];
7560
Matan Barakb4ff3a32016-02-09 14:57:42 +02007561 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007562};
7563
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007564struct mlx5_ifc_mlcr_reg_bits {
7565 u8 reserved_at_0[0x8];
7566 u8 local_port[0x8];
7567 u8 reserved_at_10[0x20];
7568
7569 u8 beacon_duration[0x10];
7570 u8 reserved_at_40[0x10];
7571
7572 u8 beacon_remain[0x10];
7573};
7574
Saeed Mahameede2816822015-05-28 22:28:40 +03007575struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577
7578 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580 u8 repetitions_mode[0x4];
7581 u8 num_of_repetitions[0x8];
7582
7583 u8 grade_version[0x8];
7584 u8 height_grade_type[0x4];
7585 u8 phase_grade_type[0x4];
7586 u8 height_grade_weight[0x8];
7587 u8 phase_grade_weight[0x8];
7588
7589 u8 gisim_measure_bits[0x10];
7590 u8 adaptive_tap_measure_bits[0x10];
7591
7592 u8 ber_bath_high_error_threshold[0x10];
7593 u8 ber_bath_mid_error_threshold[0x10];
7594
7595 u8 ber_bath_low_error_threshold[0x10];
7596 u8 one_ratio_high_threshold[0x10];
7597
7598 u8 one_ratio_high_mid_threshold[0x10];
7599 u8 one_ratio_low_mid_threshold[0x10];
7600
7601 u8 one_ratio_low_threshold[0x10];
7602 u8 ndeo_error_threshold[0x10];
7603
7604 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 mix90_phase_for_voltage_bath[0x8];
7607
7608 u8 mixer_offset_start[0x10];
7609 u8 mixer_offset_end[0x10];
7610
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612 u8 ber_test_time[0xb];
7613};
7614
7615struct mlx5_ifc_pspa_reg_bits {
7616 u8 swid[0x8];
7617 u8 local_port[0x8];
7618 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622};
7623
7624struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630 u8 mode[0x2];
7631
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 min_threshold[0x10];
7636
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638 u8 max_threshold[0x10];
7639
Matan Barakb4ff3a32016-02-09 14:57:42 +02007640 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007641 u8 mark_probability_denominator[0x10];
7642
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644};
7645
7646struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650
Matan Barakb4ff3a32016-02-09 14:57:42 +02007651 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007652
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 wrps_admin[0x4];
7655
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657 u8 wrps_status[0x4];
7658
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662 u8 down_threshold[0x8];
7663
Matan Barakb4ff3a32016-02-09 14:57:42 +02007664 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007665
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 srps_admin[0x4];
7668
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670 u8 srps_status[0x4];
7671
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673};
7674
7675struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007678 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007679
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 lb_en[0x8];
7684};
7685
7686struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690
Matan Barakb4ff3a32016-02-09 14:57:42 +02007691 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007692
7693 u8 port_profile_mode[0x8];
7694 u8 static_port_profile[0x8];
7695 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697
7698 u8 retransmission_active[0x8];
7699 u8 fec_mode_active[0x18];
7700
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702};
7703
7704struct mlx5_ifc_ppcnt_reg_bits {
7705 u8 swid[0x8];
7706 u8 local_port[0x8];
7707 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709 u8 grp[0x6];
7710
7711 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713 u8 prio_tc[0x3];
7714
7715 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7716};
7717
Gal Pressman8ed1a632016-11-17 13:46:01 +02007718struct mlx5_ifc_mpcnt_reg_bits {
7719 u8 reserved_at_0[0x8];
7720 u8 pcie_index[0x8];
7721 u8 reserved_at_10[0xa];
7722 u8 grp[0x6];
7723
7724 u8 clr[0x1];
7725 u8 reserved_at_21[0x1f];
7726
7727 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7728};
7729
Saeed Mahameede2816822015-05-28 22:28:40 +03007730struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 local_port[0x8];
7735 u8 mac_47_32[0x10];
7736
7737 u8 mac_31_0[0x20];
7738
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740};
7741
7742struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746
7747 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749
7750 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752
7753 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007754 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007755};
7756
7757struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007758 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007759 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007760 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007761
Matan Barakb4ff3a32016-02-09 14:57:42 +02007762 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007763 u8 attenuation_5g[0x8];
7764
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 attenuation_7g[0x8];
7767
Matan Barakb4ff3a32016-02-09 14:57:42 +02007768 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007769 u8 attenuation_12g[0x8];
7770};
7771
7772struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007773 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007774 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776 u8 module_status[0x4];
7777
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779};
7780
7781struct mlx5_ifc_pmpc_reg_bits {
7782 u8 module_state_updated[32][0x8];
7783};
7784
7785struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787 u8 mlpn_status[0x4];
7788 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007790
7791 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007792 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007793};
7794
7795struct mlx5_ifc_pmlp_reg_bits {
7796 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007797 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007798 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800 u8 width[0x8];
7801
7802 u8 lane0_module_mapping[0x20];
7803
7804 u8 lane1_module_mapping[0x20];
7805
7806 u8 lane2_module_mapping[0x20];
7807
7808 u8 lane3_module_mapping[0x20];
7809
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811};
7812
7813struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 oper_status[0x4];
7820
7821 u8 ase[0x1];
7822 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 e[0x2];
7825
Matan Barakb4ff3a32016-02-09 14:57:42 +02007826 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007827};
7828
7829struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007830 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007831 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007834 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007835
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837 u8 lane_speed[0x10];
7838
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 lpbf[0x1];
7841 u8 fec_mode_policy[0x8];
7842
7843 u8 retransmission_capability[0x8];
7844 u8 fec_mode_capability[0x18];
7845
7846 u8 retransmission_support_admin[0x8];
7847 u8 fec_mode_support_admin[0x18];
7848
7849 u8 retransmission_request_admin[0x8];
7850 u8 fec_mode_request_admin[0x18];
7851
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853};
7854
7855struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007856 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007857 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007858 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007859 u8 ib_port[0x8];
7860
Matan Barakb4ff3a32016-02-09 14:57:42 +02007861 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007862};
7863
7864struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007865 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007866 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007867 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007868 u8 lbf_mode[0x3];
7869
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871};
7872
7873struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007876 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007877
7878 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007881 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007882};
7883
7884struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007885 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007886 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007887 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007888
Matan Barakb4ff3a32016-02-09 14:57:42 +02007889 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007890
7891 u8 port_filter[8][0x20];
7892
7893 u8 port_filter_update_en[8][0x20];
7894};
7895
7896struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007899 u8 reserved_at_10[0xb];
7900 u8 ppan_mask_n[0x1];
7901 u8 minor_stall_mask[0x1];
7902 u8 critical_stall_mask[0x1];
7903 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007904
7905 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007906 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007907 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007908 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007909 u8 prio_mask_rx[0x8];
7910
7911 u8 pptx[0x1];
7912 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007913 u8 pptx_mask_n[0x1];
7914 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007915 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917
7918 u8 pprx[0x1];
7919 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007920 u8 pprx_mask_n[0x1];
7921 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924
Inbar Karmy2afa6092017-11-20 18:06:20 +02007925 u8 device_stall_minor_watermark[0x10];
7926 u8 device_stall_critical_watermark[0x10];
7927
7928 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007929};
7930
7931struct mlx5_ifc_pelc_reg_bits {
7932 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007933 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007934 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007935 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007936
7937 u8 op_admin[0x8];
7938 u8 op_capability[0x8];
7939 u8 op_request[0x8];
7940 u8 op_active[0x8];
7941
7942 u8 admin[0x40];
7943
7944 u8 capability[0x40];
7945
7946 u8 request[0x40];
7947
7948 u8 active[0x40];
7949
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951};
7952
7953struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007954 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007955 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007960 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007961
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007964 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007965 u8 error_type[0x8];
7966};
7967
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007968struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007969 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007970
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007971 u8 pfcc_mask[0x1];
7972 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03007973 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007974 u8 ptys_connector_type[0x1];
7975 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007976 u8 ppcnt_discard_group[0x1];
7977 u8 ppcnt_statistical_group[0x1];
7978};
7979
7980struct mlx5_ifc_pcam_reg_bits {
7981 u8 reserved_at_0[0x8];
7982 u8 feature_group[0x8];
7983 u8 reserved_at_10[0x8];
7984 u8 access_reg_group[0x8];
7985
7986 u8 reserved_at_20[0x20];
7987
7988 union {
7989 u8 reserved_at_0[0x80];
7990 } port_access_reg_cap_mask;
7991
7992 u8 reserved_at_c0[0x80];
7993
7994 union {
7995 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7996 u8 reserved_at_0[0x80];
7997 } feature_cap_mask;
7998
7999 u8 reserved_at_1c0[0xc0];
8000};
8001
8002struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008003 u8 reserved_at_0[0x7b];
8004 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008005 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008006 u8 mtpps_enh_out_per_adj[0x1];
8007 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008008 u8 pcie_performance_group[0x1];
8009};
8010
Or Gerlitz0ab87742017-06-11 15:25:38 +03008011struct mlx5_ifc_mcam_access_reg_bits {
8012 u8 reserved_at_0[0x1c];
8013 u8 mcda[0x1];
8014 u8 mcc[0x1];
8015 u8 mcqi[0x1];
8016 u8 reserved_at_1f[0x1];
8017
8018 u8 regs_95_to_64[0x20];
8019 u8 regs_63_to_32[0x20];
8020 u8 regs_31_to_0[0x20];
8021};
8022
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008023struct mlx5_ifc_mcam_reg_bits {
8024 u8 reserved_at_0[0x8];
8025 u8 feature_group[0x8];
8026 u8 reserved_at_10[0x8];
8027 u8 access_reg_group[0x8];
8028
8029 u8 reserved_at_20[0x20];
8030
8031 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008032 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008033 u8 reserved_at_0[0x80];
8034 } mng_access_reg_cap_mask;
8035
8036 u8 reserved_at_c0[0x80];
8037
8038 union {
8039 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8040 u8 reserved_at_0[0x80];
8041 } mng_feature_cap_mask;
8042
8043 u8 reserved_at_1c0[0x80];
8044};
8045
Huy Nguyenc02762e2017-07-18 16:03:17 -05008046struct mlx5_ifc_qcam_access_reg_cap_mask {
8047 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8048 u8 qpdpm[0x1];
8049 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8050 u8 qdpm[0x1];
8051 u8 qpts[0x1];
8052 u8 qcap[0x1];
8053 u8 qcam_access_reg_cap_mask_0[0x1];
8054};
8055
8056struct mlx5_ifc_qcam_qos_feature_cap_mask {
8057 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8058 u8 qpts_trust_both[0x1];
8059};
8060
8061struct mlx5_ifc_qcam_reg_bits {
8062 u8 reserved_at_0[0x8];
8063 u8 feature_group[0x8];
8064 u8 reserved_at_10[0x8];
8065 u8 access_reg_group[0x8];
8066 u8 reserved_at_20[0x20];
8067
8068 union {
8069 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8070 u8 reserved_at_0[0x80];
8071 } qos_access_reg_cap_mask;
8072
8073 u8 reserved_at_c0[0x80];
8074
8075 union {
8076 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8077 u8 reserved_at_0[0x80];
8078 } qos_feature_cap_mask;
8079
8080 u8 reserved_at_1c0[0x80];
8081};
8082
Saeed Mahameede2816822015-05-28 22:28:40 +03008083struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008084 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008085 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008087
8088 u8 port_capability_mask[4][0x20];
8089};
8090
8091struct mlx5_ifc_paos_reg_bits {
8092 u8 swid[0x8];
8093 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008094 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008095 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008096 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008097 u8 oper_status[0x4];
8098
8099 u8 ase[0x1];
8100 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008101 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008102 u8 e[0x2];
8103
Matan Barakb4ff3a32016-02-09 14:57:42 +02008104 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008105};
8106
8107struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008108 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008109 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008110 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008111 u8 opamp_group_type[0x4];
8112
8113 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008114 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008115 u8 num_of_indices[0xc];
8116
8117 u8 index_data[18][0x10];
8118};
8119
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008120struct mlx5_ifc_pcmr_reg_bits {
8121 u8 reserved_at_0[0x8];
8122 u8 local_port[0x8];
8123 u8 reserved_at_10[0x2e];
8124 u8 fcs_cap[0x1];
8125 u8 reserved_at_3f[0x1f];
8126 u8 fcs_chk[0x1];
8127 u8 reserved_at_5f[0x1];
8128};
8129
Saeed Mahameede2816822015-05-28 22:28:40 +03008130struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008131 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008132 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008133 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008134 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008135 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008136 u8 module[0x8];
8137};
8138
8139struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008140 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008141 u8 lossy[0x1];
8142 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008143 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008144 u8 size[0xc];
8145
8146 u8 xoff_threshold[0x10];
8147 u8 xon_threshold[0x10];
8148};
8149
8150struct mlx5_ifc_set_node_in_bits {
8151 u8 node_description[64][0x8];
8152};
8153
8154struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008155 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008156 u8 power_settings_level[0x8];
8157
Matan Barakb4ff3a32016-02-09 14:57:42 +02008158 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008159};
8160
8161struct mlx5_ifc_register_host_endianness_bits {
8162 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008163 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008164
Matan Barakb4ff3a32016-02-09 14:57:42 +02008165 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008166};
8167
8168struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008169 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008170
8171 u8 mkey[0x20];
8172
8173 u8 addressh_63_32[0x20];
8174
8175 u8 addressl_31_0[0x20];
8176};
8177
8178struct mlx5_ifc_ud_adrs_vector_bits {
8179 u8 dc_key[0x40];
8180
8181 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008182 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008183 u8 destination_qp_dct[0x18];
8184
8185 u8 static_rate[0x4];
8186 u8 sl_eth_prio[0x4];
8187 u8 fl[0x1];
8188 u8 mlid[0x7];
8189 u8 rlid_udp_sport[0x10];
8190
Matan Barakb4ff3a32016-02-09 14:57:42 +02008191 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008192
8193 u8 rmac_47_16[0x20];
8194
8195 u8 rmac_15_0[0x10];
8196 u8 tclass[0x8];
8197 u8 hop_limit[0x8];
8198
Matan Barakb4ff3a32016-02-09 14:57:42 +02008199 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008200 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008201 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008202 u8 src_addr_index[0x8];
8203 u8 flow_label[0x14];
8204
8205 u8 rgid_rip[16][0x8];
8206};
8207
8208struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008209 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008210 u8 function_id[0x10];
8211
8212 u8 num_pages[0x20];
8213
Matan Barakb4ff3a32016-02-09 14:57:42 +02008214 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008215};
8216
8217struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008218 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008219 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008221 u8 event_sub_type[0x8];
8222
Matan Barakb4ff3a32016-02-09 14:57:42 +02008223 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008224
8225 union mlx5_ifc_event_auto_bits event_data;
8226
Matan Barakb4ff3a32016-02-09 14:57:42 +02008227 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008228 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008229 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008230 u8 owner[0x1];
8231};
8232
8233enum {
8234 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8235};
8236
8237struct mlx5_ifc_cmd_queue_entry_bits {
8238 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008240
8241 u8 input_length[0x20];
8242
8243 u8 input_mailbox_pointer_63_32[0x20];
8244
8245 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008246 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008247
8248 u8 command_input_inline_data[16][0x8];
8249
8250 u8 command_output_inline_data[16][0x8];
8251
8252 u8 output_mailbox_pointer_63_32[0x20];
8253
8254 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008255 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008256
8257 u8 output_length[0x20];
8258
8259 u8 token[0x8];
8260 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008261 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008262 u8 status[0x7];
8263 u8 ownership[0x1];
8264};
8265
8266struct mlx5_ifc_cmd_out_bits {
8267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008269
8270 u8 syndrome[0x20];
8271
8272 u8 command_output[0x20];
8273};
8274
8275struct mlx5_ifc_cmd_in_bits {
8276 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008277 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008278
Matan Barakb4ff3a32016-02-09 14:57:42 +02008279 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008280 u8 op_mod[0x10];
8281
8282 u8 command[0][0x20];
8283};
8284
8285struct mlx5_ifc_cmd_if_box_bits {
8286 u8 mailbox_data[512][0x8];
8287
Matan Barakb4ff3a32016-02-09 14:57:42 +02008288 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008289
8290 u8 next_pointer_63_32[0x20];
8291
8292 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008293 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008294
8295 u8 block_number[0x20];
8296
Matan Barakb4ff3a32016-02-09 14:57:42 +02008297 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008298 u8 token[0x8];
8299 u8 ctrl_signature[0x8];
8300 u8 signature[0x8];
8301};
8302
8303struct mlx5_ifc_mtt_bits {
8304 u8 ptag_63_32[0x20];
8305
8306 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008307 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008308 u8 wr_en[0x1];
8309 u8 rd_en[0x1];
8310};
8311
Tariq Toukan928cfe82016-02-22 18:17:29 +02008312struct mlx5_ifc_query_wol_rol_out_bits {
8313 u8 status[0x8];
8314 u8 reserved_at_8[0x18];
8315
8316 u8 syndrome[0x20];
8317
8318 u8 reserved_at_40[0x10];
8319 u8 rol_mode[0x8];
8320 u8 wol_mode[0x8];
8321
8322 u8 reserved_at_60[0x20];
8323};
8324
8325struct mlx5_ifc_query_wol_rol_in_bits {
8326 u8 opcode[0x10];
8327 u8 reserved_at_10[0x10];
8328
8329 u8 reserved_at_20[0x10];
8330 u8 op_mod[0x10];
8331
8332 u8 reserved_at_40[0x40];
8333};
8334
8335struct mlx5_ifc_set_wol_rol_out_bits {
8336 u8 status[0x8];
8337 u8 reserved_at_8[0x18];
8338
8339 u8 syndrome[0x20];
8340
8341 u8 reserved_at_40[0x40];
8342};
8343
8344struct mlx5_ifc_set_wol_rol_in_bits {
8345 u8 opcode[0x10];
8346 u8 reserved_at_10[0x10];
8347
8348 u8 reserved_at_20[0x10];
8349 u8 op_mod[0x10];
8350
8351 u8 rol_mode_valid[0x1];
8352 u8 wol_mode_valid[0x1];
8353 u8 reserved_at_42[0xe];
8354 u8 rol_mode[0x8];
8355 u8 wol_mode[0x8];
8356
8357 u8 reserved_at_60[0x20];
8358};
8359
Saeed Mahameede2816822015-05-28 22:28:40 +03008360enum {
8361 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8362 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8363 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8364};
8365
8366enum {
8367 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8368 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8369 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8370};
8371
8372enum {
8373 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8374 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8375 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8376 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8377 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8378 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8379 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8380 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8381 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8382 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8383 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8384};
8385
8386struct mlx5_ifc_initial_seg_bits {
8387 u8 fw_rev_minor[0x10];
8388 u8 fw_rev_major[0x10];
8389
8390 u8 cmd_interface_rev[0x10];
8391 u8 fw_rev_subminor[0x10];
8392
Matan Barakb4ff3a32016-02-09 14:57:42 +02008393 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008394
8395 u8 cmdq_phy_addr_63_32[0x20];
8396
8397 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008398 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008399 u8 nic_interface[0x2];
8400 u8 log_cmdq_size[0x4];
8401 u8 log_cmdq_stride[0x4];
8402
8403 u8 command_doorbell_vector[0x20];
8404
Matan Barakb4ff3a32016-02-09 14:57:42 +02008405 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008406
8407 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008408 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008409 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008410 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008411
8412 struct mlx5_ifc_health_buffer_bits health_buffer;
8413
8414 u8 no_dram_nic_offset[0x20];
8415
Matan Barakb4ff3a32016-02-09 14:57:42 +02008416 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008417
Matan Barakb4ff3a32016-02-09 14:57:42 +02008418 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008419 u8 clear_int[0x1];
8420
8421 u8 health_syndrome[0x8];
8422 u8 health_counter[0x18];
8423
Matan Barakb4ff3a32016-02-09 14:57:42 +02008424 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008425};
8426
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008427struct mlx5_ifc_mtpps_reg_bits {
8428 u8 reserved_at_0[0xc];
8429 u8 cap_number_of_pps_pins[0x4];
8430 u8 reserved_at_10[0x4];
8431 u8 cap_max_num_of_pps_in_pins[0x4];
8432 u8 reserved_at_18[0x4];
8433 u8 cap_max_num_of_pps_out_pins[0x4];
8434
8435 u8 reserved_at_20[0x24];
8436 u8 cap_pin_3_mode[0x4];
8437 u8 reserved_at_48[0x4];
8438 u8 cap_pin_2_mode[0x4];
8439 u8 reserved_at_50[0x4];
8440 u8 cap_pin_1_mode[0x4];
8441 u8 reserved_at_58[0x4];
8442 u8 cap_pin_0_mode[0x4];
8443
8444 u8 reserved_at_60[0x4];
8445 u8 cap_pin_7_mode[0x4];
8446 u8 reserved_at_68[0x4];
8447 u8 cap_pin_6_mode[0x4];
8448 u8 reserved_at_70[0x4];
8449 u8 cap_pin_5_mode[0x4];
8450 u8 reserved_at_78[0x4];
8451 u8 cap_pin_4_mode[0x4];
8452
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008453 u8 field_select[0x20];
8454 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008455
8456 u8 enable[0x1];
8457 u8 reserved_at_101[0xb];
8458 u8 pattern[0x4];
8459 u8 reserved_at_110[0x4];
8460 u8 pin_mode[0x4];
8461 u8 pin[0x8];
8462
8463 u8 reserved_at_120[0x20];
8464
8465 u8 time_stamp[0x40];
8466
8467 u8 out_pulse_duration[0x10];
8468 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008469 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008470
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008471 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008472};
8473
8474struct mlx5_ifc_mtppse_reg_bits {
8475 u8 reserved_at_0[0x18];
8476 u8 pin[0x8];
8477 u8 event_arm[0x1];
8478 u8 reserved_at_21[0x1b];
8479 u8 event_generation_mode[0x4];
8480 u8 reserved_at_40[0x40];
8481};
8482
Or Gerlitz47176282017-04-18 13:35:39 +03008483struct mlx5_ifc_mcqi_cap_bits {
8484 u8 supported_info_bitmask[0x20];
8485
8486 u8 component_size[0x20];
8487
8488 u8 max_component_size[0x20];
8489
8490 u8 log_mcda_word_size[0x4];
8491 u8 reserved_at_64[0xc];
8492 u8 mcda_max_write_size[0x10];
8493
8494 u8 rd_en[0x1];
8495 u8 reserved_at_81[0x1];
8496 u8 match_chip_id[0x1];
8497 u8 match_psid[0x1];
8498 u8 check_user_timestamp[0x1];
8499 u8 match_base_guid_mac[0x1];
8500 u8 reserved_at_86[0x1a];
8501};
8502
8503struct mlx5_ifc_mcqi_reg_bits {
8504 u8 read_pending_component[0x1];
8505 u8 reserved_at_1[0xf];
8506 u8 component_index[0x10];
8507
8508 u8 reserved_at_20[0x20];
8509
8510 u8 reserved_at_40[0x1b];
8511 u8 info_type[0x5];
8512
8513 u8 info_size[0x20];
8514
8515 u8 offset[0x20];
8516
8517 u8 reserved_at_a0[0x10];
8518 u8 data_size[0x10];
8519
8520 u8 data[0][0x20];
8521};
8522
8523struct mlx5_ifc_mcc_reg_bits {
8524 u8 reserved_at_0[0x4];
8525 u8 time_elapsed_since_last_cmd[0xc];
8526 u8 reserved_at_10[0x8];
8527 u8 instruction[0x8];
8528
8529 u8 reserved_at_20[0x10];
8530 u8 component_index[0x10];
8531
8532 u8 reserved_at_40[0x8];
8533 u8 update_handle[0x18];
8534
8535 u8 handle_owner_type[0x4];
8536 u8 handle_owner_host_id[0x4];
8537 u8 reserved_at_68[0x1];
8538 u8 control_progress[0x7];
8539 u8 error_code[0x8];
8540 u8 reserved_at_78[0x4];
8541 u8 control_state[0x4];
8542
8543 u8 component_size[0x20];
8544
8545 u8 reserved_at_a0[0x60];
8546};
8547
8548struct mlx5_ifc_mcda_reg_bits {
8549 u8 reserved_at_0[0x8];
8550 u8 update_handle[0x18];
8551
8552 u8 offset[0x20];
8553
8554 u8 reserved_at_40[0x10];
8555 u8 size[0x10];
8556
8557 u8 reserved_at_60[0x20];
8558
8559 u8 data[0][0x20];
8560};
8561
Saeed Mahameede2816822015-05-28 22:28:40 +03008562union mlx5_ifc_ports_control_registers_document_bits {
8563 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8564 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8565 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8566 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8567 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8568 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8569 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8570 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8571 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8572 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8573 struct mlx5_ifc_paos_reg_bits paos_reg;
8574 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8575 struct mlx5_ifc_peir_reg_bits peir_reg;
8576 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8577 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008578 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008579 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8580 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8581 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8582 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8583 struct mlx5_ifc_plib_reg_bits plib_reg;
8584 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8585 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8586 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8587 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8588 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8589 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8590 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8591 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8592 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8593 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008594 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008595 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8596 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8597 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8598 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8599 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8600 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8601 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008602 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008603 struct mlx5_ifc_pude_reg_bits pude_reg;
8604 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8605 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8606 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008607 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8608 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008609 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008610 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8611 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008612 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8613 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8614 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008615 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008616};
8617
8618union mlx5_ifc_debug_enhancements_document_bits {
8619 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008620 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008621};
8622
8623union mlx5_ifc_uplink_pci_interface_document_bits {
8624 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008625 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008626};
8627
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008628struct mlx5_ifc_set_flow_table_root_out_bits {
8629 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008630 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008631
8632 u8 syndrome[0x20];
8633
Matan Barakb4ff3a32016-02-09 14:57:42 +02008634 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008635};
8636
8637struct mlx5_ifc_set_flow_table_root_in_bits {
8638 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008639 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008640
Matan Barakb4ff3a32016-02-09 14:57:42 +02008641 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008642 u8 op_mod[0x10];
8643
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008644 u8 other_vport[0x1];
8645 u8 reserved_at_41[0xf];
8646 u8 vport_number[0x10];
8647
8648 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008649
8650 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008651 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008652
Matan Barakb4ff3a32016-02-09 14:57:42 +02008653 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008654 u8 table_id[0x18];
8655
Erez Shitrit500a3d02017-04-13 06:36:51 +03008656 u8 reserved_at_c0[0x8];
8657 u8 underlay_qpn[0x18];
8658 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008659};
8660
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008661enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008662 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8663 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008664};
8665
8666struct mlx5_ifc_modify_flow_table_out_bits {
8667 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008668 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008669
8670 u8 syndrome[0x20];
8671
Matan Barakb4ff3a32016-02-09 14:57:42 +02008672 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008673};
8674
8675struct mlx5_ifc_modify_flow_table_in_bits {
8676 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008677 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008678
Matan Barakb4ff3a32016-02-09 14:57:42 +02008679 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008680 u8 op_mod[0x10];
8681
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008682 u8 other_vport[0x1];
8683 u8 reserved_at_41[0xf];
8684 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008685
Matan Barakb4ff3a32016-02-09 14:57:42 +02008686 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008687 u8 modify_field_select[0x10];
8688
8689 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008690 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008691
Matan Barakb4ff3a32016-02-09 14:57:42 +02008692 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008693 u8 table_id[0x18];
8694
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008695 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008696};
8697
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008698struct mlx5_ifc_ets_tcn_config_reg_bits {
8699 u8 g[0x1];
8700 u8 b[0x1];
8701 u8 r[0x1];
8702 u8 reserved_at_3[0x9];
8703 u8 group[0x4];
8704 u8 reserved_at_10[0x9];
8705 u8 bw_allocation[0x7];
8706
8707 u8 reserved_at_20[0xc];
8708 u8 max_bw_units[0x4];
8709 u8 reserved_at_30[0x8];
8710 u8 max_bw_value[0x8];
8711};
8712
8713struct mlx5_ifc_ets_global_config_reg_bits {
8714 u8 reserved_at_0[0x2];
8715 u8 r[0x1];
8716 u8 reserved_at_3[0x1d];
8717
8718 u8 reserved_at_20[0xc];
8719 u8 max_bw_units[0x4];
8720 u8 reserved_at_30[0x8];
8721 u8 max_bw_value[0x8];
8722};
8723
8724struct mlx5_ifc_qetc_reg_bits {
8725 u8 reserved_at_0[0x8];
8726 u8 port_number[0x8];
8727 u8 reserved_at_10[0x30];
8728
8729 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8730 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8731};
8732
Huy Nguyen415a64a2017-07-18 16:08:46 -05008733struct mlx5_ifc_qpdpm_dscp_reg_bits {
8734 u8 e[0x1];
8735 u8 reserved_at_01[0x0b];
8736 u8 prio[0x04];
8737};
8738
8739struct mlx5_ifc_qpdpm_reg_bits {
8740 u8 reserved_at_0[0x8];
8741 u8 local_port[0x8];
8742 u8 reserved_at_10[0x10];
8743 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8744};
8745
8746struct mlx5_ifc_qpts_reg_bits {
8747 u8 reserved_at_0[0x8];
8748 u8 local_port[0x8];
8749 u8 reserved_at_10[0x2d];
8750 u8 trust_state[0x3];
8751};
8752
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008753struct mlx5_ifc_qtct_reg_bits {
8754 u8 reserved_at_0[0x8];
8755 u8 port_number[0x8];
8756 u8 reserved_at_10[0xd];
8757 u8 prio[0x3];
8758
8759 u8 reserved_at_20[0x1d];
8760 u8 tclass[0x3];
8761};
8762
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008763struct mlx5_ifc_mcia_reg_bits {
8764 u8 l[0x1];
8765 u8 reserved_at_1[0x7];
8766 u8 module[0x8];
8767 u8 reserved_at_10[0x8];
8768 u8 status[0x8];
8769
8770 u8 i2c_device_address[0x8];
8771 u8 page_number[0x8];
8772 u8 device_address[0x10];
8773
8774 u8 reserved_at_40[0x10];
8775 u8 size[0x10];
8776
8777 u8 reserved_at_60[0x20];
8778
8779 u8 dword_0[0x20];
8780 u8 dword_1[0x20];
8781 u8 dword_2[0x20];
8782 u8 dword_3[0x20];
8783 u8 dword_4[0x20];
8784 u8 dword_5[0x20];
8785 u8 dword_6[0x20];
8786 u8 dword_7[0x20];
8787 u8 dword_8[0x20];
8788 u8 dword_9[0x20];
8789 u8 dword_10[0x20];
8790 u8 dword_11[0x20];
8791};
8792
Saeed Mahameed74862162016-06-09 15:11:34 +03008793struct mlx5_ifc_dcbx_param_bits {
8794 u8 dcbx_cee_cap[0x1];
8795 u8 dcbx_ieee_cap[0x1];
8796 u8 dcbx_standby_cap[0x1];
8797 u8 reserved_at_0[0x5];
8798 u8 port_number[0x8];
8799 u8 reserved_at_10[0xa];
8800 u8 max_application_table_size[6];
8801 u8 reserved_at_20[0x15];
8802 u8 version_oper[0x3];
8803 u8 reserved_at_38[5];
8804 u8 version_admin[0x3];
8805 u8 willing_admin[0x1];
8806 u8 reserved_at_41[0x3];
8807 u8 pfc_cap_oper[0x4];
8808 u8 reserved_at_48[0x4];
8809 u8 pfc_cap_admin[0x4];
8810 u8 reserved_at_50[0x4];
8811 u8 num_of_tc_oper[0x4];
8812 u8 reserved_at_58[0x4];
8813 u8 num_of_tc_admin[0x4];
8814 u8 remote_willing[0x1];
8815 u8 reserved_at_61[3];
8816 u8 remote_pfc_cap[4];
8817 u8 reserved_at_68[0x14];
8818 u8 remote_num_of_tc[0x4];
8819 u8 reserved_at_80[0x18];
8820 u8 error[0x8];
8821 u8 reserved_at_a0[0x160];
8822};
Aviv Heller84df61e2016-05-10 13:47:50 +03008823
8824struct mlx5_ifc_lagc_bits {
8825 u8 reserved_at_0[0x1d];
8826 u8 lag_state[0x3];
8827
8828 u8 reserved_at_20[0x14];
8829 u8 tx_remap_affinity_2[0x4];
8830 u8 reserved_at_38[0x4];
8831 u8 tx_remap_affinity_1[0x4];
8832};
8833
8834struct mlx5_ifc_create_lag_out_bits {
8835 u8 status[0x8];
8836 u8 reserved_at_8[0x18];
8837
8838 u8 syndrome[0x20];
8839
8840 u8 reserved_at_40[0x40];
8841};
8842
8843struct mlx5_ifc_create_lag_in_bits {
8844 u8 opcode[0x10];
8845 u8 reserved_at_10[0x10];
8846
8847 u8 reserved_at_20[0x10];
8848 u8 op_mod[0x10];
8849
8850 struct mlx5_ifc_lagc_bits ctx;
8851};
8852
8853struct mlx5_ifc_modify_lag_out_bits {
8854 u8 status[0x8];
8855 u8 reserved_at_8[0x18];
8856
8857 u8 syndrome[0x20];
8858
8859 u8 reserved_at_40[0x40];
8860};
8861
8862struct mlx5_ifc_modify_lag_in_bits {
8863 u8 opcode[0x10];
8864 u8 reserved_at_10[0x10];
8865
8866 u8 reserved_at_20[0x10];
8867 u8 op_mod[0x10];
8868
8869 u8 reserved_at_40[0x20];
8870 u8 field_select[0x20];
8871
8872 struct mlx5_ifc_lagc_bits ctx;
8873};
8874
8875struct mlx5_ifc_query_lag_out_bits {
8876 u8 status[0x8];
8877 u8 reserved_at_8[0x18];
8878
8879 u8 syndrome[0x20];
8880
8881 u8 reserved_at_40[0x40];
8882
8883 struct mlx5_ifc_lagc_bits ctx;
8884};
8885
8886struct mlx5_ifc_query_lag_in_bits {
8887 u8 opcode[0x10];
8888 u8 reserved_at_10[0x10];
8889
8890 u8 reserved_at_20[0x10];
8891 u8 op_mod[0x10];
8892
8893 u8 reserved_at_40[0x40];
8894};
8895
8896struct mlx5_ifc_destroy_lag_out_bits {
8897 u8 status[0x8];
8898 u8 reserved_at_8[0x18];
8899
8900 u8 syndrome[0x20];
8901
8902 u8 reserved_at_40[0x40];
8903};
8904
8905struct mlx5_ifc_destroy_lag_in_bits {
8906 u8 opcode[0x10];
8907 u8 reserved_at_10[0x10];
8908
8909 u8 reserved_at_20[0x10];
8910 u8 op_mod[0x10];
8911
8912 u8 reserved_at_40[0x40];
8913};
8914
8915struct mlx5_ifc_create_vport_lag_out_bits {
8916 u8 status[0x8];
8917 u8 reserved_at_8[0x18];
8918
8919 u8 syndrome[0x20];
8920
8921 u8 reserved_at_40[0x40];
8922};
8923
8924struct mlx5_ifc_create_vport_lag_in_bits {
8925 u8 opcode[0x10];
8926 u8 reserved_at_10[0x10];
8927
8928 u8 reserved_at_20[0x10];
8929 u8 op_mod[0x10];
8930
8931 u8 reserved_at_40[0x40];
8932};
8933
8934struct mlx5_ifc_destroy_vport_lag_out_bits {
8935 u8 status[0x8];
8936 u8 reserved_at_8[0x18];
8937
8938 u8 syndrome[0x20];
8939
8940 u8 reserved_at_40[0x40];
8941};
8942
8943struct mlx5_ifc_destroy_vport_lag_in_bits {
8944 u8 opcode[0x10];
8945 u8 reserved_at_10[0x10];
8946
8947 u8 reserved_at_20[0x10];
8948 u8 op_mod[0x10];
8949
8950 u8 reserved_at_40[0x40];
8951};
8952
Eli Cohend29b7962014-10-02 12:19:43 +03008953#endif /* MLX5_IFC_H */