blob: ad4ff278cceeef11a7da5db0085ac68a65a2d720 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
57#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020058#include <net/pkt_cls.h>
59#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020060#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
69
70static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71static const char mlxsw_sp_driver_version[] = "1.0";
72
73/* tx_hdr_version
74 * Tx header version.
75 * Must be set to 1.
76 */
77MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78
79/* tx_hdr_ctl
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
82 * 1 - Ethernet data
83 */
84MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85
86/* tx_hdr_proto
87 * Packet protocol type. Must be set to 1 (Ethernet).
88 */
89MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
90
91/* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95
96/* tx_hdr_fid_valid
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
99 */
100MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101
102/* tx_hdr_swid
103 * Switch partition ID. Must be set to 0.
104 */
105MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
106
107/* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
110 */
111MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112
113/* tx_hdr_etclass
114 * Egress TClass to be used on the egress device on the egress port.
115 */
116MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117
118/* tx_hdr_port_mid
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
121 *
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
125 */
126MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127
128/* tx_hdr_fid
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
132 */
133MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134
135/* tx_hdr_type
136 * 0 - Data packets
137 * 6 - Control packets
138 */
139MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
140
Yotam Gigi763b4b72016-07-21 12:03:17 +0200141static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
142
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200143static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
144 const struct mlxsw_tx_info *tx_info)
145{
146 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
147
148 memset(txhdr, 0, MLXSW_TXHDR_LEN);
149
150 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
151 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
152 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
153 mlxsw_tx_hdr_swid_set(txhdr, 0);
154 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
155 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
156 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
157}
158
159static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
160{
Elad Raz5b090742016-10-28 21:35:46 +0200161 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200162 int err;
163
164 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
165 if (err)
166 return err;
167 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
168 return 0;
169}
170
Yotam Gigi763b4b72016-07-21 12:03:17 +0200171static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
172{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200173 int i;
174
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200175 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200176 return -EIO;
177
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200178 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
179 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200180 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
181 sizeof(struct mlxsw_sp_span_entry),
182 GFP_KERNEL);
183 if (!mlxsw_sp->span.entries)
184 return -ENOMEM;
185
186 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
187 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
188
189 return 0;
190}
191
192static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
193{
194 int i;
195
196 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
197 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
198
199 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
200 }
201 kfree(mlxsw_sp->span.entries);
202}
203
204static struct mlxsw_sp_span_entry *
205mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
206{
207 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
208 struct mlxsw_sp_span_entry *span_entry;
209 char mpat_pl[MLXSW_REG_MPAT_LEN];
210 u8 local_port = port->local_port;
211 int index;
212 int i;
213 int err;
214
215 /* find a free entry to use */
216 index = -1;
217 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
218 if (!mlxsw_sp->span.entries[i].used) {
219 index = i;
220 span_entry = &mlxsw_sp->span.entries[i];
221 break;
222 }
223 }
224 if (index < 0)
225 return NULL;
226
227 /* create a new port analayzer entry for local_port */
228 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
229 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
230 if (err)
231 return NULL;
232
233 span_entry->used = true;
234 span_entry->id = index;
235 span_entry->ref_count = 0;
236 span_entry->local_port = local_port;
237 return span_entry;
238}
239
240static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
241 struct mlxsw_sp_span_entry *span_entry)
242{
243 u8 local_port = span_entry->local_port;
244 char mpat_pl[MLXSW_REG_MPAT_LEN];
245 int pa_id = span_entry->id;
246
247 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
248 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
249 span_entry->used = false;
250}
251
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200252static struct mlxsw_sp_span_entry *
253mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200254{
255 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
256 int i;
257
258 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
259 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
260
261 if (curr->used && curr->local_port == port->local_port)
262 return curr;
263 }
264 return NULL;
265}
266
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200267static struct mlxsw_sp_span_entry
268*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200269{
270 struct mlxsw_sp_span_entry *span_entry;
271
272 span_entry = mlxsw_sp_span_entry_find(port);
273 if (span_entry) {
274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 return 0;
287}
288
289static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
290{
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
293 int i;
294
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
297
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
301 return true;
302 }
303
304 return false;
305}
306
307static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
308{
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
310}
311
312static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
313{
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
316 int err;
317
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
320 */
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
325 if (err) {
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
327 return err;
328 }
329 }
330
331 return 0;
332}
333
334static struct mlxsw_sp_span_inspected_port *
335mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
337{
338 struct mlxsw_sp_span_inspected_port *p;
339
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
342 return p;
343 return NULL;
344}
345
346static int
347mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
350{
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
356 int err;
357
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
363 if (err) {
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 return err;
366 }
367 }
368
369 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
373 if (err)
374 goto err_mpar_reg_write;
375
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
378 err = -ENOMEM;
379 goto err_inspected_port_alloc;
380 }
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384
385 return 0;
386
387err_mpar_reg_write:
388err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 }
393 return err;
394}
395
396static void
397mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
400{
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
406
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
408 if (!inspected_port)
409 return;
410
411 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
415
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
420 }
421
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
423
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
426}
427
428static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
431{
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
434 int err;
435
436 span_entry = mlxsw_sp_span_entry_get(to);
437 if (!span_entry)
438 return -ENOENT;
439
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
441 span_entry->id);
442
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 if (err)
445 goto err_port_bind;
446
447 return 0;
448
449err_port_bind:
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
451 return err;
452}
453
454static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
457{
458 struct mlxsw_sp_span_entry *span_entry;
459
460 span_entry = mlxsw_sp_span_entry_find(to);
461 if (!span_entry) {
462 netdev_err(from->dev, "no span entry found\n");
463 return;
464 }
465
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
467 span_entry->id);
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
469}
470
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200471static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool is_up)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char paos_pl[MLXSW_REG_PAOS_LEN];
476
477 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
478 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
479 MLXSW_PORT_ADMIN_STATUS_DOWN);
480 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
481}
482
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200483static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
484 unsigned char *addr)
485{
486 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
487 char ppad_pl[MLXSW_REG_PPAD_LEN];
488
489 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
490 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
491 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
492}
493
494static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
495{
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
498
499 ether_addr_copy(addr, mlxsw_sp->base_mac);
500 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
501 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
502}
503
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200504static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
505{
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 char pmtu_pl[MLXSW_REG_PMTU_LEN];
508 int max_mtu;
509 int err;
510
511 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
512 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
513 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
514 if (err)
515 return err;
516 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
517
518 if (mtu > max_mtu)
519 return -EINVAL;
520
521 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
522 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
523}
524
Ido Schimmelbe945352016-06-09 09:51:39 +0200525static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
526 u8 swid)
527{
528 char pspa_pl[MLXSW_REG_PSPA_LEN];
529
530 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
531 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
532}
533
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200534static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
535{
536 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200537
Ido Schimmelbe945352016-06-09 09:51:39 +0200538 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
539 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200540}
541
542static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
543 bool enable)
544{
545 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
546 char svpe_pl[MLXSW_REG_SVPE_LEN];
547
548 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
549 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
550}
551
552int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
554 u16 vid)
555{
556 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
557 char svfa_pl[MLXSW_REG_SVFA_LEN];
558
559 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
560 fid, vid);
561 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
562}
563
Ido Schimmel584d73d2016-08-24 12:00:26 +0200564int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
565 u16 vid_begin, u16 vid_end,
566 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200567{
568 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
569 char *spvmlr_pl;
570 int err;
571
572 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
573 if (!spvmlr_pl)
574 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200575 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
576 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200577 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
578 kfree(spvmlr_pl);
579 return err;
580}
581
Ido Schimmel584d73d2016-08-24 12:00:26 +0200582static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
583 u16 vid, bool learn_enable)
584{
585 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
586 learn_enable);
587}
588
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200589static int
590mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
591{
592 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
593 char sspr_pl[MLXSW_REG_SSPR_LEN];
594
595 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
596 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
597}
598
Ido Schimmeld664b412016-06-09 09:51:40 +0200599static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
600 u8 local_port, u8 *p_module,
601 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603 char pmlp_pl[MLXSW_REG_PMLP_LEN];
604 int err;
605
Ido Schimmel558c2d52016-02-26 17:32:29 +0100606 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200607 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
608 if (err)
609 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100610 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
611 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200612 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613 return 0;
614}
615
Ido Schimmel18f1e702016-02-26 17:32:31 +0100616static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
617 u8 module, u8 width, u8 lane)
618{
619 char pmlp_pl[MLXSW_REG_PMLP_LEN];
620 int i;
621
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
624 for (i = 0; i < width; i++) {
625 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
626 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
627 }
628
629 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
630}
631
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100632static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
633{
634 char pmlp_pl[MLXSW_REG_PMLP_LEN];
635
636 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
637 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
638 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
639}
640
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200641static int mlxsw_sp_port_open(struct net_device *dev)
642{
643 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
644 int err;
645
646 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
647 if (err)
648 return err;
649 netif_start_queue(dev);
650 return 0;
651}
652
653static int mlxsw_sp_port_stop(struct net_device *dev)
654{
655 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
656
657 netif_stop_queue(dev);
658 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
659}
660
661static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
662 struct net_device *dev)
663{
664 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
665 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
666 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
667 const struct mlxsw_tx_info tx_info = {
668 .local_port = mlxsw_sp_port->local_port,
669 .is_emad = false,
670 };
671 u64 len;
672 int err;
673
Jiri Pirko307c2432016-04-08 19:11:22 +0200674 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200675 return NETDEV_TX_BUSY;
676
677 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
678 struct sk_buff *skb_orig = skb;
679
680 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
681 if (!skb) {
682 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
683 dev_kfree_skb_any(skb_orig);
684 return NETDEV_TX_OK;
685 }
686 }
687
688 if (eth_skb_pad(skb)) {
689 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
690 return NETDEV_TX_OK;
691 }
692
693 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200694 /* TX header is consumed by HW on the way so we shouldn't count its
695 * bytes as being sent.
696 */
697 len = skb->len - MLXSW_TXHDR_LEN;
698
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200699 /* Due to a race we might fail here because of a full queue. In that
700 * unlikely case we simply drop the packet.
701 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200702 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200703
704 if (!err) {
705 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
706 u64_stats_update_begin(&pcpu_stats->syncp);
707 pcpu_stats->tx_packets++;
708 pcpu_stats->tx_bytes += len;
709 u64_stats_update_end(&pcpu_stats->syncp);
710 } else {
711 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
712 dev_kfree_skb_any(skb);
713 }
714 return NETDEV_TX_OK;
715}
716
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100717static void mlxsw_sp_set_rx_mode(struct net_device *dev)
718{
719}
720
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200721static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
722{
723 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
724 struct sockaddr *addr = p;
725 int err;
726
727 if (!is_valid_ether_addr(addr->sa_data))
728 return -EADDRNOTAVAIL;
729
730 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
731 if (err)
732 return err;
733 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
734 return 0;
735}
736
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200737static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200738 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200739{
740 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
741
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
743 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200745 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200746 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200747 pg_size + delay, pg_size);
748 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200749 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200750}
751
752int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200753 u8 *prio_tc, bool pause_en,
754 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200755{
756 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200757 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
758 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200759 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200760 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200761
762 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
763 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
764 if (err)
765 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200766
767 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
768 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200769 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200770
771 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
772 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200773 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200774 configure = true;
775 break;
776 }
777 }
778
779 if (!configure)
780 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200781 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782 }
783
Ido Schimmelff6551e2016-04-06 17:10:03 +0200784 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
785}
786
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200787static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200788 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200789{
790 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
791 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200792 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200793 u8 *prio_tc;
794
795 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200796 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200797
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200798 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200799 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800}
801
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200802static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
803{
804 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200805 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200806 int err;
807
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200808 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200809 if (err)
810 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200811 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
812 if (err)
813 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
815 if (err)
816 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 dev->mtu = mtu;
818 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819
820err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200821 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
822err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200823 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200824 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200825}
826
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300827static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200828mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
829 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830{
831 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
832 struct mlxsw_sp_port_pcpu_stats *p;
833 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
834 u32 tx_dropped = 0;
835 unsigned int start;
836 int i;
837
838 for_each_possible_cpu(i) {
839 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
840 do {
841 start = u64_stats_fetch_begin_irq(&p->syncp);
842 rx_packets = p->rx_packets;
843 rx_bytes = p->rx_bytes;
844 tx_packets = p->tx_packets;
845 tx_bytes = p->tx_bytes;
846 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
847
848 stats->rx_packets += rx_packets;
849 stats->rx_bytes += rx_bytes;
850 stats->tx_packets += tx_packets;
851 stats->tx_bytes += tx_bytes;
852 /* tx_dropped is u32, updated without syncp protection. */
853 tx_dropped += p->tx_dropped;
854 }
855 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200856 return 0;
857}
858
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300859static bool mlxsw_sp_port_has_offload_stats(int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200860{
861 switch (attr_id) {
862 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
863 return true;
864 }
865
866 return false;
867}
868
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300869static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
870 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200871{
872 switch (attr_id) {
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
874 return mlxsw_sp_port_get_sw_stats64(dev, sp);
875 }
876
877 return -EINVAL;
878}
879
880static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
881 int prio, char *ppcnt_pl)
882{
883 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
884 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
885
886 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
887 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
888}
889
890static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
891 struct rtnl_link_stats64 *stats)
892{
893 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
894 int err;
895
896 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
897 0, ppcnt_pl);
898 if (err)
899 goto out;
900
901 stats->tx_packets =
902 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
903 stats->rx_packets =
904 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
905 stats->tx_bytes =
906 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
907 stats->rx_bytes =
908 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
909 stats->multicast =
910 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
911
912 stats->rx_crc_errors =
913 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
914 stats->rx_frame_errors =
915 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
916
917 stats->rx_length_errors = (
918 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
919 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
920 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
921
922 stats->rx_errors = (stats->rx_crc_errors +
923 stats->rx_frame_errors + stats->rx_length_errors);
924
925out:
926 return err;
927}
928
929static void update_stats_cache(struct work_struct *work)
930{
931 struct mlxsw_sp_port *mlxsw_sp_port =
932 container_of(work, struct mlxsw_sp_port,
933 hw_stats.update_dw.work);
934
935 if (!netif_carrier_ok(mlxsw_sp_port->dev))
936 goto out;
937
938 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
939 mlxsw_sp_port->hw_stats.cache);
940
941out:
942 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
943 MLXSW_HW_STATS_UPDATE_TIME);
944}
945
946/* Return the stats from a cache that is updated periodically,
947 * as this function might get called in an atomic context.
948 */
949static struct rtnl_link_stats64 *
950mlxsw_sp_port_get_stats64(struct net_device *dev,
951 struct rtnl_link_stats64 *stats)
952{
953 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
954
955 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
956
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200957 return stats;
958}
959
960int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
961 u16 vid_end, bool is_member, bool untagged)
962{
963 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
964 char *spvm_pl;
965 int err;
966
967 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
968 if (!spvm_pl)
969 return -ENOMEM;
970
971 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
972 vid_end, is_member, untagged);
973 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
974 kfree(spvm_pl);
975 return err;
976}
977
978static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
979{
980 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
981 u16 vid, last_visited_vid;
982 int err;
983
984 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
985 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
986 vid);
987 if (err) {
988 last_visited_vid = vid;
989 goto err_port_vid_to_fid_set;
990 }
991 }
992
993 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
994 if (err) {
995 last_visited_vid = VLAN_N_VID;
996 goto err_port_vid_to_fid_set;
997 }
998
999 return 0;
1000
1001err_port_vid_to_fid_set:
1002 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1003 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1004 vid);
1005 return err;
1006}
1007
1008static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1009{
1010 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1011 u16 vid;
1012 int err;
1013
1014 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1015 if (err)
1016 return err;
1017
1018 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1019 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1020 vid, vid);
1021 if (err)
1022 return err;
1023 }
1024
1025 return 0;
1026}
1027
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001028static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001029mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001030{
1031 struct mlxsw_sp_port *mlxsw_sp_vport;
1032
1033 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1034 if (!mlxsw_sp_vport)
1035 return NULL;
1036
1037 /* dev will be set correctly after the VLAN device is linked
1038 * with the real device. In case of bridge SELF invocation, dev
1039 * will remain as is.
1040 */
1041 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1042 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1043 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1044 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001045 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1046 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001047 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001048
1049 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1050
1051 return mlxsw_sp_vport;
1052}
1053
1054static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1055{
1056 list_del(&mlxsw_sp_vport->vport.list);
1057 kfree(mlxsw_sp_vport);
1058}
1059
Ido Schimmel05978482016-08-17 16:39:30 +02001060static int mlxsw_sp_port_add_vid(struct net_device *dev,
1061 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001062{
1063 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001064 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001065 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001066 int err;
1067
1068 /* VLAN 0 is added to HW filter when device goes up, but it is
1069 * reserved in our case, so simply return.
1070 */
1071 if (!vid)
1072 return 0;
1073
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001074 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001076
Ido Schimmel0355b592016-06-20 23:04:13 +02001077 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001078 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001079 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001080
1081 /* When adding the first VLAN interface on a bridged port we need to
1082 * transition all the active 802.1Q bridge VLANs to use explicit
1083 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1084 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001085 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001086 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001088 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089 }
1090
Ido Schimmel52697a92016-07-02 11:00:09 +02001091 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001092 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 return 0;
1096
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001098 if (list_is_singular(&mlxsw_sp_port->vports_list))
1099 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1100err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001101 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102 return err;
1103}
1104
Ido Schimmel32d863f2016-07-02 11:00:10 +02001105static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1106 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001107{
1108 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001109 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001110 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001111
1112 /* VLAN 0 is removed from HW filter when device goes down, but
1113 * it is reserved in our case, so simply return.
1114 */
1115 if (!vid)
1116 return 0;
1117
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001118 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001119 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001121
Ido Schimmel7a355832016-08-17 16:39:28 +02001122 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001123
Ido Schimmel1c800752016-06-20 23:04:20 +02001124 /* Drop FID reference. If this was the last reference the
1125 * resources will be freed.
1126 */
1127 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1128 if (f && !WARN_ON(!f->leave))
1129 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130
1131 /* When removing the last VLAN interface on a bridged port we need to
1132 * transition all active 802.1Q bridge VLANs to use VID to FID
1133 * mappings and set port's mode to VLAN mode.
1134 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001135 if (list_is_singular(&mlxsw_sp_port->vports_list))
1136 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001137
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001138 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1139
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001140 return 0;
1141}
1142
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001143static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1144 size_t len)
1145{
1146 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001147 u8 module = mlxsw_sp_port->mapping.module;
1148 u8 width = mlxsw_sp_port->mapping.width;
1149 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001150 int err;
1151
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001152 if (!mlxsw_sp_port->split)
1153 err = snprintf(name, len, "p%d", module + 1);
1154 else
1155 err = snprintf(name, len, "p%ds%d", module + 1,
1156 lane / width);
1157
1158 if (err >= len)
1159 return -EINVAL;
1160
1161 return 0;
1162}
1163
Yotam Gigi763b4b72016-07-21 12:03:17 +02001164static struct mlxsw_sp_port_mall_tc_entry *
1165mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1166 unsigned long cookie) {
1167 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1168
1169 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1170 if (mall_tc_entry->cookie == cookie)
1171 return mall_tc_entry;
1172
1173 return NULL;
1174}
1175
1176static int
1177mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1178 struct tc_cls_matchall_offload *cls,
1179 const struct tc_action *a,
1180 bool ingress)
1181{
1182 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1183 struct net *net = dev_net(mlxsw_sp_port->dev);
1184 enum mlxsw_sp_span_type span_type;
1185 struct mlxsw_sp_port *to_port;
1186 struct net_device *to_dev;
1187 int ifindex;
1188 int err;
1189
1190 ifindex = tcf_mirred_ifindex(a);
1191 to_dev = __dev_get_by_index(net, ifindex);
1192 if (!to_dev) {
1193 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1194 return -EINVAL;
1195 }
1196
1197 if (!mlxsw_sp_port_dev_check(to_dev)) {
1198 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1199 return -ENOTSUPP;
1200 }
1201 to_port = netdev_priv(to_dev);
1202
1203 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1204 if (!mall_tc_entry)
1205 return -ENOMEM;
1206
1207 mall_tc_entry->cookie = cls->cookie;
1208 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1209 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1210 mall_tc_entry->mirror.ingress = ingress;
1211 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1212
1213 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1214 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1215 if (err)
1216 goto err_mirror_add;
1217 return 0;
1218
1219err_mirror_add:
1220 list_del(&mall_tc_entry->list);
1221 kfree(mall_tc_entry);
1222 return err;
1223}
1224
1225static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1226 __be16 protocol,
1227 struct tc_cls_matchall_offload *cls,
1228 bool ingress)
1229{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001230 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001231 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001232 int err;
1233
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001234 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001235 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1236 return -ENOTSUPP;
1237 }
1238
WANG Cong22dc13c2016-08-13 22:35:00 -07001239 tcf_exts_to_list(cls->exts, &actions);
1240 list_for_each_entry(a, &actions, list) {
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001241 if (!is_tcf_mirred_egress_mirror(a) ||
1242 protocol != htons(ETH_P_ALL)) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001243 return -ENOTSUPP;
Shmulik Ladkani5724b8b2016-10-13 09:06:43 +03001244 }
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001245
Yotam Gigi763b4b72016-07-21 12:03:17 +02001246 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1247 a, ingress);
1248 if (err)
1249 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001250 }
1251
1252 return 0;
1253}
1254
1255static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1256 struct tc_cls_matchall_offload *cls)
1257{
1258 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1259 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1260 enum mlxsw_sp_span_type span_type;
1261 struct mlxsw_sp_port *to_port;
1262
1263 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1264 cls->cookie);
1265 if (!mall_tc_entry) {
1266 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1267 return;
1268 }
1269
1270 switch (mall_tc_entry->type) {
1271 case MLXSW_SP_PORT_MALL_MIRROR:
1272 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1273 span_type = mall_tc_entry->mirror.ingress ?
1274 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1275
1276 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1277 break;
1278 default:
1279 WARN_ON(1);
1280 }
1281
1282 list_del(&mall_tc_entry->list);
1283 kfree(mall_tc_entry);
1284}
1285
1286static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1287 __be16 proto, struct tc_to_netdev *tc)
1288{
1289 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1290 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1291
1292 if (tc->type == TC_SETUP_MATCHALL) {
1293 switch (tc->cls_mall->command) {
1294 case TC_CLSMATCHALL_REPLACE:
1295 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1296 proto,
1297 tc->cls_mall,
1298 ingress);
1299 case TC_CLSMATCHALL_DESTROY:
1300 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1301 tc->cls_mall);
1302 return 0;
1303 default:
1304 return -EINVAL;
1305 }
1306 }
1307
1308 return -ENOTSUPP;
1309}
1310
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1312 .ndo_open = mlxsw_sp_port_open,
1313 .ndo_stop = mlxsw_sp_port_stop,
1314 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001315 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001316 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001317 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1318 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1319 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001320 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1321 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001322 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1323 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001324 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1325 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001326 .ndo_fdb_add = switchdev_port_fdb_add,
1327 .ndo_fdb_del = switchdev_port_fdb_del,
1328 .ndo_fdb_dump = switchdev_port_fdb_dump,
1329 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1330 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1331 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001332 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001333};
1334
1335static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1336 struct ethtool_drvinfo *drvinfo)
1337{
1338 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1339 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1340
1341 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1342 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1343 sizeof(drvinfo->version));
1344 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1345 "%d.%d.%d",
1346 mlxsw_sp->bus_info->fw_rev.major,
1347 mlxsw_sp->bus_info->fw_rev.minor,
1348 mlxsw_sp->bus_info->fw_rev.subminor);
1349 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1350 sizeof(drvinfo->bus_info));
1351}
1352
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001353static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1354 struct ethtool_pauseparam *pause)
1355{
1356 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1357
1358 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1359 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1360}
1361
1362static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1363 struct ethtool_pauseparam *pause)
1364{
1365 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1366
1367 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1368 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1369 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1370
1371 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1372 pfcc_pl);
1373}
1374
1375static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1376 struct ethtool_pauseparam *pause)
1377{
1378 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1379 bool pause_en = pause->tx_pause || pause->rx_pause;
1380 int err;
1381
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001382 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1383 netdev_err(dev, "PFC already enabled on port\n");
1384 return -EINVAL;
1385 }
1386
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001387 if (pause->autoneg) {
1388 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1389 return -EINVAL;
1390 }
1391
1392 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1393 if (err) {
1394 netdev_err(dev, "Failed to configure port's headroom\n");
1395 return err;
1396 }
1397
1398 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1399 if (err) {
1400 netdev_err(dev, "Failed to set PAUSE parameters\n");
1401 goto err_port_pause_configure;
1402 }
1403
1404 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1405 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1406
1407 return 0;
1408
1409err_port_pause_configure:
1410 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1411 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1412 return err;
1413}
1414
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001415struct mlxsw_sp_port_hw_stats {
1416 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001417 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001418};
1419
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001420static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001421 {
1422 .str = "a_frames_transmitted_ok",
1423 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1424 },
1425 {
1426 .str = "a_frames_received_ok",
1427 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1428 },
1429 {
1430 .str = "a_frame_check_sequence_errors",
1431 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1432 },
1433 {
1434 .str = "a_alignment_errors",
1435 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1436 },
1437 {
1438 .str = "a_octets_transmitted_ok",
1439 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1440 },
1441 {
1442 .str = "a_octets_received_ok",
1443 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1444 },
1445 {
1446 .str = "a_multicast_frames_xmitted_ok",
1447 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1448 },
1449 {
1450 .str = "a_broadcast_frames_xmitted_ok",
1451 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1452 },
1453 {
1454 .str = "a_multicast_frames_received_ok",
1455 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1456 },
1457 {
1458 .str = "a_broadcast_frames_received_ok",
1459 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1460 },
1461 {
1462 .str = "a_in_range_length_errors",
1463 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1464 },
1465 {
1466 .str = "a_out_of_range_length_field",
1467 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1468 },
1469 {
1470 .str = "a_frame_too_long_errors",
1471 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1472 },
1473 {
1474 .str = "a_symbol_error_during_carrier",
1475 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1476 },
1477 {
1478 .str = "a_mac_control_frames_transmitted",
1479 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1480 },
1481 {
1482 .str = "a_mac_control_frames_received",
1483 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1484 },
1485 {
1486 .str = "a_unsupported_opcodes_received",
1487 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1488 },
1489 {
1490 .str = "a_pause_mac_ctrl_frames_received",
1491 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1492 },
1493 {
1494 .str = "a_pause_mac_ctrl_frames_xmitted",
1495 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1496 },
1497};
1498
1499#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1500
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001501static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1502 {
1503 .str = "rx_octets_prio",
1504 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1505 },
1506 {
1507 .str = "rx_frames_prio",
1508 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1509 },
1510 {
1511 .str = "tx_octets_prio",
1512 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1513 },
1514 {
1515 .str = "tx_frames_prio",
1516 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1517 },
1518 {
1519 .str = "rx_pause_prio",
1520 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1521 },
1522 {
1523 .str = "rx_pause_duration_prio",
1524 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1525 },
1526 {
1527 .str = "tx_pause_prio",
1528 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1529 },
1530 {
1531 .str = "tx_pause_duration_prio",
1532 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1533 },
1534};
1535
1536#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1537
Jiri Pirko412791d2016-10-21 16:07:19 +02001538static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001539{
1540 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1541
1542 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1543}
1544
1545static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1546 {
1547 .str = "tc_transmit_queue_tc",
1548 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1549 },
1550 {
1551 .str = "tc_no_buffer_discard_uc_tc",
1552 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1553 },
1554};
1555
1556#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1557
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001558#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001559 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1560 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001561 IEEE_8021QAZ_MAX_TCS)
1562
1563static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1564{
1565 int i;
1566
1567 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1568 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1569 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1570 *p += ETH_GSTRING_LEN;
1571 }
1572}
1573
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001574static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1575{
1576 int i;
1577
1578 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1579 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1580 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1581 *p += ETH_GSTRING_LEN;
1582 }
1583}
1584
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001585static void mlxsw_sp_port_get_strings(struct net_device *dev,
1586 u32 stringset, u8 *data)
1587{
1588 u8 *p = data;
1589 int i;
1590
1591 switch (stringset) {
1592 case ETH_SS_STATS:
1593 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1594 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1595 ETH_GSTRING_LEN);
1596 p += ETH_GSTRING_LEN;
1597 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001598
1599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1600 mlxsw_sp_port_get_prio_strings(&p, i);
1601
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001602 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1603 mlxsw_sp_port_get_tc_strings(&p, i);
1604
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001605 break;
1606 }
1607}
1608
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001609static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1610 enum ethtool_phys_id_state state)
1611{
1612 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1613 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1614 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1615 bool active;
1616
1617 switch (state) {
1618 case ETHTOOL_ID_ACTIVE:
1619 active = true;
1620 break;
1621 case ETHTOOL_ID_INACTIVE:
1622 active = false;
1623 break;
1624 default:
1625 return -EOPNOTSUPP;
1626 }
1627
1628 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1629 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1630}
1631
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001632static int
1633mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1634 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1635{
1636 switch (grp) {
1637 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1638 *p_hw_stats = mlxsw_sp_port_hw_stats;
1639 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1640 break;
1641 case MLXSW_REG_PPCNT_PRIO_CNT:
1642 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1643 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1644 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001645 case MLXSW_REG_PPCNT_TC_CNT:
1646 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1647 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1648 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001649 default:
1650 WARN_ON(1);
1651 return -ENOTSUPP;
1652 }
1653 return 0;
1654}
1655
1656static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1657 enum mlxsw_reg_ppcnt_grp grp, int prio,
1658 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001659{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001660 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001661 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001662 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001663 int err;
1664
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001665 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1666 if (err)
1667 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001668 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001669 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001670 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001671}
1672
1673static void mlxsw_sp_port_get_stats(struct net_device *dev,
1674 struct ethtool_stats *stats, u64 *data)
1675{
1676 int i, data_index = 0;
1677
1678 /* IEEE 802.3 Counters */
1679 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1680 data, data_index);
1681 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1682
1683 /* Per-Priority Counters */
1684 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1685 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1686 data, data_index);
1687 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1688 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001689
1690 /* Per-TC Counters */
1691 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1692 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1693 data, data_index);
1694 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1695 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001696}
1697
1698static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1699{
1700 switch (sset) {
1701 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001702 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001703 default:
1704 return -EOPNOTSUPP;
1705 }
1706}
1707
1708struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001709 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001710 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001711 u32 speed;
1712};
1713
1714static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1715 {
1716 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001717 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1718 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001719 },
1720 {
1721 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1722 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001723 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1724 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001725 },
1726 {
1727 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001728 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1729 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001730 },
1731 {
1732 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1733 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001734 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1735 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001736 },
1737 {
1738 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1739 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1740 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1741 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001742 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1743 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001744 },
1745 {
1746 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001747 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1748 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001749 },
1750 {
1751 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001752 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1753 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001754 },
1755 {
1756 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001757 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1758 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001759 },
1760 {
1761 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001762 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1763 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001764 },
1765 {
1766 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001767 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1768 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001769 },
1770 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001771 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1772 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1773 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001774 },
1775 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001776 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1777 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1778 .speed = SPEED_25000,
1779 },
1780 {
1781 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1782 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1783 .speed = SPEED_25000,
1784 },
1785 {
1786 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1787 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1788 .speed = SPEED_25000,
1789 },
1790 {
1791 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1792 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1793 .speed = SPEED_50000,
1794 },
1795 {
1796 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1797 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1798 .speed = SPEED_50000,
1799 },
1800 {
1801 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1802 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1803 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001804 },
1805 {
1806 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001807 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1808 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001809 },
1810 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001811 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1812 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1813 .speed = SPEED_56000,
1814 },
1815 {
1816 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1817 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1818 .speed = SPEED_56000,
1819 },
1820 {
1821 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1822 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1823 .speed = SPEED_56000,
1824 },
1825 {
1826 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1827 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1828 .speed = SPEED_100000,
1829 },
1830 {
1831 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1832 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1833 .speed = SPEED_100000,
1834 },
1835 {
1836 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1837 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1838 .speed = SPEED_100000,
1839 },
1840 {
1841 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1842 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1843 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001844 },
1845};
1846
1847#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1848
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001849static void
1850mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1851 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001852{
1853 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1854 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1855 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1856 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1857 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1858 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001859 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001860
1861 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1862 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1863 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1864 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1865 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001866 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001867}
1868
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001869static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001870{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871 int i;
1872
1873 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1874 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001875 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1876 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001877 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001878}
1879
1880static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001881 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882{
1883 u32 speed = SPEED_UNKNOWN;
1884 u8 duplex = DUPLEX_UNKNOWN;
1885 int i;
1886
1887 if (!carrier_ok)
1888 goto out;
1889
1890 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1891 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1892 speed = mlxsw_sp_port_link_mode[i].speed;
1893 duplex = DUPLEX_FULL;
1894 break;
1895 }
1896 }
1897out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001898 cmd->base.speed = speed;
1899 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001900}
1901
1902static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1903{
1904 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1905 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1906 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1907 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1908 return PORT_FIBRE;
1909
1910 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1911 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1912 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1913 return PORT_DA;
1914
1915 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1916 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1917 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1918 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1919 return PORT_NONE;
1920
1921 return PORT_OTHER;
1922}
1923
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001924static u32
1925mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001926{
1927 u32 ptys_proto = 0;
1928 int i;
1929
1930 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001931 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1932 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001933 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1934 }
1935 return ptys_proto;
1936}
1937
1938static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1939{
1940 u32 ptys_proto = 0;
1941 int i;
1942
1943 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1944 if (speed == mlxsw_sp_port_link_mode[i].speed)
1945 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1946 }
1947 return ptys_proto;
1948}
1949
Ido Schimmel18f1e702016-02-26 17:32:31 +01001950static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1951{
1952 u32 ptys_proto = 0;
1953 int i;
1954
1955 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1956 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1957 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1958 }
1959 return ptys_proto;
1960}
1961
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001962static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1963 struct ethtool_link_ksettings *cmd)
1964{
1965 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1966 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1967 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1968
1969 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1970 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1971}
1972
1973static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1974 struct ethtool_link_ksettings *cmd)
1975{
1976 if (!autoneg)
1977 return;
1978
1979 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1980 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1981}
1982
1983static void
1984mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1985 struct ethtool_link_ksettings *cmd)
1986{
1987 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1988 return;
1989
1990 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1991 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1992}
1993
1994static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1995 struct ethtool_link_ksettings *cmd)
1996{
1997 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1998 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1999 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2000 char ptys_pl[MLXSW_REG_PTYS_LEN];
2001 u8 autoneg_status;
2002 bool autoneg;
2003 int err;
2004
2005 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002006 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002007 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2008 if (err)
2009 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002010 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2011 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002012
2013 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2014
2015 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2016
2017 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2018 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2019 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2020
2021 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2022 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2023 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2024 cmd);
2025
2026 return 0;
2027}
2028
2029static int
2030mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2031 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002032{
2033 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2034 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2035 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002036 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002037 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002038 int err;
2039
Elad Raz401c8b42016-10-28 21:35:52 +02002040 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002041 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002042 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002043 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002044 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002045
2046 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2047 eth_proto_new = autoneg ?
2048 mlxsw_sp_to_ptys_advert_link(cmd) :
2049 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002050
2051 eth_proto_new = eth_proto_new & eth_proto_cap;
2052 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002053 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002054 return -EINVAL;
2055 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002056
Elad Raz401c8b42016-10-28 21:35:52 +02002057 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2058 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002059 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002060 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002061 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002062
Ido Schimmel6277d462016-07-15 11:14:58 +02002063 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002064 return 0;
2065
Ido Schimmel0c83f882016-09-12 13:26:23 +02002066 mlxsw_sp_port->link.autoneg = autoneg;
2067
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002068 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2069 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002070
2071 return 0;
2072}
2073
2074static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2075 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2076 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002077 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2078 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002079 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002080 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002081 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2082 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002083 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2084 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002085};
2086
Ido Schimmel18f1e702016-02-26 17:32:31 +01002087static int
2088mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2089{
2090 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2091 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2092 char ptys_pl[MLXSW_REG_PTYS_LEN];
2093 u32 eth_proto_admin;
2094
2095 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002096 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2097 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002098 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2099}
2100
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002101int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2102 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2103 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002104{
2105 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2106 char qeec_pl[MLXSW_REG_QEEC_LEN];
2107
2108 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2109 next_index);
2110 mlxsw_reg_qeec_de_set(qeec_pl, true);
2111 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2112 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2113 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2114}
2115
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002116int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2117 enum mlxsw_reg_qeec_hr hr, u8 index,
2118 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002119{
2120 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2121 char qeec_pl[MLXSW_REG_QEEC_LEN];
2122
2123 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2124 next_index);
2125 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2126 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2127 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2128}
2129
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002130int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2131 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002132{
2133 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2134 char qtct_pl[MLXSW_REG_QTCT_LEN];
2135
2136 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2137 tclass);
2138 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2139}
2140
2141static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2142{
2143 int err, i;
2144
2145 /* Setup the elements hierarcy, so that each TC is linked to
2146 * one subgroup, which are all member in the same group.
2147 */
2148 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2149 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2150 0);
2151 if (err)
2152 return err;
2153 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2154 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2155 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2156 0, false, 0);
2157 if (err)
2158 return err;
2159 }
2160 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2161 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2162 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2163 false, 0);
2164 if (err)
2165 return err;
2166 }
2167
2168 /* Make sure the max shaper is disabled in all hierarcies that
2169 * support it.
2170 */
2171 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2172 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2173 MLXSW_REG_QEEC_MAS_DIS);
2174 if (err)
2175 return err;
2176 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2177 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2178 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2179 i, 0,
2180 MLXSW_REG_QEEC_MAS_DIS);
2181 if (err)
2182 return err;
2183 }
2184 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2185 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2186 MLXSW_REG_QEEC_HIERARCY_TC,
2187 i, i,
2188 MLXSW_REG_QEEC_MAS_DIS);
2189 if (err)
2190 return err;
2191 }
2192
2193 /* Map all priorities to traffic class 0. */
2194 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2195 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2196 if (err)
2197 return err;
2198 }
2199
2200 return 0;
2201}
2202
Ido Schimmel05978482016-08-17 16:39:30 +02002203static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2204{
2205 mlxsw_sp_port->pvid = 1;
2206
2207 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2208}
2209
2210static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2211{
2212 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2213}
2214
Jiri Pirko67963a32016-10-28 21:35:55 +02002215static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2216 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002217{
2218 struct mlxsw_sp_port *mlxsw_sp_port;
2219 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002220 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002221 int err;
2222
2223 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2224 if (!dev)
2225 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002226 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002227 mlxsw_sp_port = netdev_priv(dev);
2228 mlxsw_sp_port->dev = dev;
2229 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2230 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002231 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002232 mlxsw_sp_port->mapping.module = module;
2233 mlxsw_sp_port->mapping.width = width;
2234 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002235 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002236 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2237 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2238 if (!mlxsw_sp_port->active_vlans) {
2239 err = -ENOMEM;
2240 goto err_port_active_vlans_alloc;
2241 }
Elad Razfc1273a2016-01-06 13:01:11 +01002242 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2243 if (!mlxsw_sp_port->untagged_vlans) {
2244 err = -ENOMEM;
2245 goto err_port_untagged_vlans_alloc;
2246 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002247 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002248 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002249
2250 mlxsw_sp_port->pcpu_stats =
2251 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2252 if (!mlxsw_sp_port->pcpu_stats) {
2253 err = -ENOMEM;
2254 goto err_alloc_stats;
2255 }
2256
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002257 mlxsw_sp_port->hw_stats.cache =
2258 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2259
2260 if (!mlxsw_sp_port->hw_stats.cache) {
2261 err = -ENOMEM;
2262 goto err_alloc_hw_stats;
2263 }
2264 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2265 &update_stats_cache);
2266
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002267 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2268 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2269
Ido Schimmel3247ff22016-09-08 08:16:02 +02002270 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2271 if (err) {
2272 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2273 mlxsw_sp_port->local_port);
2274 goto err_port_swid_set;
2275 }
2276
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002277 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2278 if (err) {
2279 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2280 mlxsw_sp_port->local_port);
2281 goto err_dev_addr_init;
2282 }
2283
2284 netif_carrier_off(dev);
2285
2286 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002287 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2288 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002289
Jarod Wilsond894be52016-10-20 13:55:16 -04002290 dev->min_mtu = 0;
2291 dev->max_mtu = ETH_MAX_MTU;
2292
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002293 /* Each packet needs to have a Tx header (metadata) on top all other
2294 * headers.
2295 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002296 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002297
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002298 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2299 if (err) {
2300 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2301 mlxsw_sp_port->local_port);
2302 goto err_port_system_port_mapping_set;
2303 }
2304
Ido Schimmel18f1e702016-02-26 17:32:31 +01002305 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2306 if (err) {
2307 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2308 mlxsw_sp_port->local_port);
2309 goto err_port_speed_by_width_set;
2310 }
2311
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002312 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2313 if (err) {
2314 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2315 mlxsw_sp_port->local_port);
2316 goto err_port_mtu_set;
2317 }
2318
2319 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2320 if (err)
2321 goto err_port_admin_status_set;
2322
2323 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2324 if (err) {
2325 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2326 mlxsw_sp_port->local_port);
2327 goto err_port_buffers_init;
2328 }
2329
Ido Schimmel90183b92016-04-06 17:10:08 +02002330 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2331 if (err) {
2332 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2333 mlxsw_sp_port->local_port);
2334 goto err_port_ets_init;
2335 }
2336
Ido Schimmelf00817d2016-04-06 17:10:09 +02002337 /* ETS and buffers must be initialized before DCB. */
2338 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2339 if (err) {
2340 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2341 mlxsw_sp_port->local_port);
2342 goto err_port_dcb_init;
2343 }
2344
Ido Schimmel05978482016-08-17 16:39:30 +02002345 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2346 if (err) {
2347 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2348 mlxsw_sp_port->local_port);
2349 goto err_port_pvid_vport_create;
2350 }
2351
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002352 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002353 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002354 err = register_netdev(dev);
2355 if (err) {
2356 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2357 mlxsw_sp_port->local_port);
2358 goto err_register_netdev;
2359 }
2360
Jiri Pirko67963a32016-10-28 21:35:55 +02002361 mlxsw_core_port_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2362 mlxsw_sp_port, dev, mlxsw_sp_port->split, module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002363 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002364 return 0;
2365
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002366err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002367 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002368 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002369 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2370err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002371 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002372err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002373err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002374err_port_buffers_init:
2375err_port_admin_status_set:
2376err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002377err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002378err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002379err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002380 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2381err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002382 kfree(mlxsw_sp_port->hw_stats.cache);
2383err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002384 free_percpu(mlxsw_sp_port->pcpu_stats);
2385err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002386 kfree(mlxsw_sp_port->untagged_vlans);
2387err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002388 kfree(mlxsw_sp_port->active_vlans);
2389err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002390 free_netdev(dev);
2391 return err;
2392}
2393
Jiri Pirko67963a32016-10-28 21:35:55 +02002394static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2395 bool split, u8 module, u8 width, u8 lane)
2396{
2397 int err;
2398
2399 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2400 if (err) {
2401 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2402 local_port);
2403 return err;
2404 }
2405 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, false,
2406 module, width, lane);
2407 if (err)
2408 goto err_port_create;
2409 return 0;
2410
2411err_port_create:
2412 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2413 return err;
2414}
2415
2416static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002417{
2418 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2419
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002420 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002421 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002422 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002423 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002424 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002425 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002426 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002427 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2428 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002429 free_percpu(mlxsw_sp_port->pcpu_stats);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002430 kfree(mlxsw_sp_port->hw_stats.cache);
Elad Razfc1273a2016-01-06 13:01:11 +01002431 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002432 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002433 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002434 free_netdev(mlxsw_sp_port->dev);
2435}
2436
Jiri Pirko67963a32016-10-28 21:35:55 +02002437static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2438{
2439 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2440 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2441}
2442
Jiri Pirkof83e2102016-10-28 21:35:49 +02002443static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2444{
2445 return mlxsw_sp->ports[local_port] != NULL;
2446}
2447
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002448static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2449{
2450 int i;
2451
2452 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002453 if (mlxsw_sp_port_created(mlxsw_sp, i))
2454 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002455 kfree(mlxsw_sp->ports);
2456}
2457
2458static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2459{
Ido Schimmeld664b412016-06-09 09:51:40 +02002460 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002461 size_t alloc_size;
2462 int i;
2463 int err;
2464
2465 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2466 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2467 if (!mlxsw_sp->ports)
2468 return -ENOMEM;
2469
2470 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002471 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002472 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002473 if (err)
2474 goto err_port_module_info_get;
2475 if (!width)
2476 continue;
2477 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002478 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2479 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002480 if (err)
2481 goto err_port_create;
2482 }
2483 return 0;
2484
2485err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002486err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002487 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002488 if (mlxsw_sp_port_created(mlxsw_sp, i))
2489 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002490 kfree(mlxsw_sp->ports);
2491 return err;
2492}
2493
Ido Schimmel18f1e702016-02-26 17:32:31 +01002494static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2495{
2496 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2497
2498 return local_port - offset;
2499}
2500
Ido Schimmelbe945352016-06-09 09:51:39 +02002501static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2502 u8 module, unsigned int count)
2503{
2504 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2505 int err, i;
2506
2507 for (i = 0; i < count; i++) {
2508 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2509 width, i * width);
2510 if (err)
2511 goto err_port_module_map;
2512 }
2513
2514 for (i = 0; i < count; i++) {
2515 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2516 if (err)
2517 goto err_port_swid_set;
2518 }
2519
2520 for (i = 0; i < count; i++) {
2521 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002522 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002523 if (err)
2524 goto err_port_create;
2525 }
2526
2527 return 0;
2528
2529err_port_create:
2530 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002531 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2532 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002533 i = count;
2534err_port_swid_set:
2535 for (i--; i >= 0; i--)
2536 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2537 MLXSW_PORT_SWID_DISABLED_PORT);
2538 i = count;
2539err_port_module_map:
2540 for (i--; i >= 0; i--)
2541 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2542 return err;
2543}
2544
2545static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2546 u8 base_port, unsigned int count)
2547{
2548 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2549 int i;
2550
2551 /* Split by four means we need to re-create two ports, otherwise
2552 * only one.
2553 */
2554 count = count / 2;
2555
2556 for (i = 0; i < count; i++) {
2557 local_port = base_port + i * 2;
2558 module = mlxsw_sp->port_to_module[local_port];
2559
2560 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2561 0);
2562 }
2563
2564 for (i = 0; i < count; i++)
2565 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2566
2567 for (i = 0; i < count; i++) {
2568 local_port = base_port + i * 2;
2569 module = mlxsw_sp->port_to_module[local_port];
2570
2571 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002572 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002573 }
2574}
2575
Jiri Pirkob2f10572016-04-08 19:11:23 +02002576static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2577 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002578{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002579 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002580 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002581 u8 module, cur_width, base_port;
2582 int i;
2583 int err;
2584
2585 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2586 if (!mlxsw_sp_port) {
2587 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2588 local_port);
2589 return -EINVAL;
2590 }
2591
Ido Schimmeld664b412016-06-09 09:51:40 +02002592 module = mlxsw_sp_port->mapping.module;
2593 cur_width = mlxsw_sp_port->mapping.width;
2594
Ido Schimmel18f1e702016-02-26 17:32:31 +01002595 if (count != 2 && count != 4) {
2596 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2597 return -EINVAL;
2598 }
2599
Ido Schimmel18f1e702016-02-26 17:32:31 +01002600 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2601 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2602 return -EINVAL;
2603 }
2604
2605 /* Make sure we have enough slave (even) ports for the split. */
2606 if (count == 2) {
2607 base_port = local_port;
2608 if (mlxsw_sp->ports[base_port + 1]) {
2609 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2610 return -EINVAL;
2611 }
2612 } else {
2613 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2614 if (mlxsw_sp->ports[base_port + 1] ||
2615 mlxsw_sp->ports[base_port + 3]) {
2616 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2617 return -EINVAL;
2618 }
2619 }
2620
2621 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002622 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2623 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002624
Ido Schimmelbe945352016-06-09 09:51:39 +02002625 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2626 if (err) {
2627 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2628 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002629 }
2630
2631 return 0;
2632
Ido Schimmelbe945352016-06-09 09:51:39 +02002633err_port_split_create:
2634 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002635 return err;
2636}
2637
Jiri Pirkob2f10572016-04-08 19:11:23 +02002638static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002639{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002640 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002641 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002642 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002643 unsigned int count;
2644 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002645
2646 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2647 if (!mlxsw_sp_port) {
2648 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2649 local_port);
2650 return -EINVAL;
2651 }
2652
2653 if (!mlxsw_sp_port->split) {
2654 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2655 return -EINVAL;
2656 }
2657
Ido Schimmeld664b412016-06-09 09:51:40 +02002658 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002659 count = cur_width == 1 ? 4 : 2;
2660
2661 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2662
2663 /* Determine which ports to remove. */
2664 if (count == 2 && local_port >= base_port + 2)
2665 base_port = base_port + 2;
2666
2667 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002668 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2669 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002670
Ido Schimmelbe945352016-06-09 09:51:39 +02002671 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002672
2673 return 0;
2674}
2675
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002676static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2677 char *pude_pl, void *priv)
2678{
2679 struct mlxsw_sp *mlxsw_sp = priv;
2680 struct mlxsw_sp_port *mlxsw_sp_port;
2681 enum mlxsw_reg_pude_oper_status status;
2682 u8 local_port;
2683
2684 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2685 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002686 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002687 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002688
2689 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2690 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2691 netdev_info(mlxsw_sp_port->dev, "link up\n");
2692 netif_carrier_on(mlxsw_sp_port->dev);
2693 } else {
2694 netdev_info(mlxsw_sp_port->dev, "link down\n");
2695 netif_carrier_off(mlxsw_sp_port->dev);
2696 }
2697}
2698
2699static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2700 .func = mlxsw_sp_pude_event_func,
2701 .trap_id = MLXSW_TRAP_ID_PUDE,
2702};
2703
2704static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2705 enum mlxsw_event_trap_id trap_id)
2706{
2707 struct mlxsw_event_listener *el;
2708 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2709 int err;
2710
2711 switch (trap_id) {
2712 case MLXSW_TRAP_ID_PUDE:
2713 el = &mlxsw_sp_pude_event;
2714 break;
2715 }
2716 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2717 if (err)
2718 return err;
2719
2720 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2721 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2722 if (err)
2723 goto err_event_trap_set;
2724
2725 return 0;
2726
2727err_event_trap_set:
2728 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2729 return err;
2730}
2731
2732static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2733 enum mlxsw_event_trap_id trap_id)
2734{
2735 struct mlxsw_event_listener *el;
2736
2737 switch (trap_id) {
2738 case MLXSW_TRAP_ID_PUDE:
2739 el = &mlxsw_sp_pude_event;
2740 break;
2741 }
2742 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2743}
2744
2745static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2746 void *priv)
2747{
2748 struct mlxsw_sp *mlxsw_sp = priv;
2749 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2750 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2751
2752 if (unlikely(!mlxsw_sp_port)) {
2753 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2754 local_port);
2755 return;
2756 }
2757
2758 skb->dev = mlxsw_sp_port->dev;
2759
2760 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2761 u64_stats_update_begin(&pcpu_stats->syncp);
2762 pcpu_stats->rx_packets++;
2763 pcpu_stats->rx_bytes += skb->len;
2764 u64_stats_update_end(&pcpu_stats->syncp);
2765
2766 skb->protocol = eth_type_trans(skb, skb->dev);
2767 netif_receive_skb(skb);
2768}
2769
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002770static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2771 void *priv)
2772{
2773 skb->offload_fwd_mark = 1;
2774 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2775}
2776
Ido Schimmel63a81142016-08-25 18:42:39 +02002777#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2778 { \
2779 .func = _func, \
2780 .local_port = MLXSW_PORT_DONT_CARE, \
2781 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2782 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002783 }
2784
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002785static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002786 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002787 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002788 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2789 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2790 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2791 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2792 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2793 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2794 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002795 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2796 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002797 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2798 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2799 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2800 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002801 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2802 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002803 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002804 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2805 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2806 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002807 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002808 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2809 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2810 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002811};
2812
2813static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2814{
2815 char htgt_pl[MLXSW_REG_HTGT_LEN];
2816 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2817 int i;
2818 int err;
2819
2820 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2821 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2822 if (err)
2823 return err;
2824
2825 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2826 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2827 if (err)
2828 return err;
2829
2830 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2831 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2832 &mlxsw_sp_rx_listener[i],
2833 mlxsw_sp);
2834 if (err)
2835 goto err_rx_listener_register;
2836
Ido Schimmel63a81142016-08-25 18:42:39 +02002837 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002838 mlxsw_sp_rx_listener[i].trap_id);
2839 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2840 if (err)
2841 goto err_rx_trap_set;
2842 }
2843 return 0;
2844
2845err_rx_trap_set:
2846 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2847 &mlxsw_sp_rx_listener[i],
2848 mlxsw_sp);
2849err_rx_listener_register:
2850 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002851 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002852 mlxsw_sp_rx_listener[i].trap_id);
2853 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2854
2855 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2856 &mlxsw_sp_rx_listener[i],
2857 mlxsw_sp);
2858 }
2859 return err;
2860}
2861
2862static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2863{
2864 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2865 int i;
2866
2867 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002868 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002869 mlxsw_sp_rx_listener[i].trap_id);
2870 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2871
2872 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2873 &mlxsw_sp_rx_listener[i],
2874 mlxsw_sp);
2875 }
2876}
2877
2878static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2879 enum mlxsw_reg_sfgc_type type,
2880 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2881{
2882 enum mlxsw_flood_table_type table_type;
2883 enum mlxsw_sp_flood_table flood_table;
2884 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2885
Ido Schimmel19ae6122015-12-15 16:03:39 +01002886 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002887 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002888 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002889 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002890
2891 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2892 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2893 else
2894 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002895
2896 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2897 flood_table);
2898 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2899}
2900
2901static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2902{
2903 int type, err;
2904
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002905 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2906 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2907 continue;
2908
2909 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2910 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2911 if (err)
2912 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002913
2914 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2915 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2916 if (err)
2917 return err;
2918 }
2919
2920 return 0;
2921}
2922
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002923static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2924{
2925 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002926 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002927
2928 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2929 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2930 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2931 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2932 MLXSW_REG_SLCR_LAG_HASH_SIP |
2933 MLXSW_REG_SLCR_LAG_HASH_DIP |
2934 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2935 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2936 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002937 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2938 if (err)
2939 return err;
2940
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002941 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
2942 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002943 return -EIO;
2944
Jiri Pirkoc1a38312016-10-21 16:07:23 +02002945 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002946 sizeof(struct mlxsw_sp_upper),
2947 GFP_KERNEL);
2948 if (!mlxsw_sp->lags)
2949 return -ENOMEM;
2950
2951 return 0;
2952}
2953
2954static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
2955{
2956 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002957}
2958
Jiri Pirkob2f10572016-04-08 19:11:23 +02002959static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002960 const struct mlxsw_bus_info *mlxsw_bus_info)
2961{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002962 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002963 int err;
2964
2965 mlxsw_sp->core = mlxsw_core;
2966 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002967 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002968 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002969 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002970
2971 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2972 if (err) {
2973 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2974 return err;
2975 }
2976
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002977 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2978 if (err) {
2979 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002980 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002981 }
2982
2983 err = mlxsw_sp_traps_init(mlxsw_sp);
2984 if (err) {
2985 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2986 goto err_rx_listener_register;
2987 }
2988
2989 err = mlxsw_sp_flood_init(mlxsw_sp);
2990 if (err) {
2991 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2992 goto err_flood_init;
2993 }
2994
2995 err = mlxsw_sp_buffers_init(mlxsw_sp);
2996 if (err) {
2997 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2998 goto err_buffers_init;
2999 }
3000
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003001 err = mlxsw_sp_lag_init(mlxsw_sp);
3002 if (err) {
3003 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3004 goto err_lag_init;
3005 }
3006
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003007 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3008 if (err) {
3009 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3010 goto err_switchdev_init;
3011 }
3012
Ido Schimmel464dce12016-07-02 11:00:15 +02003013 err = mlxsw_sp_router_init(mlxsw_sp);
3014 if (err) {
3015 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3016 goto err_router_init;
3017 }
3018
Yotam Gigi763b4b72016-07-21 12:03:17 +02003019 err = mlxsw_sp_span_init(mlxsw_sp);
3020 if (err) {
3021 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3022 goto err_span_init;
3023 }
3024
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003025 err = mlxsw_sp_ports_create(mlxsw_sp);
3026 if (err) {
3027 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3028 goto err_ports_create;
3029 }
3030
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003031 return 0;
3032
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003033err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003034 mlxsw_sp_span_fini(mlxsw_sp);
3035err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003036 mlxsw_sp_router_fini(mlxsw_sp);
3037err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003038 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003039err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003040 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003041err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003042 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003043err_buffers_init:
3044err_flood_init:
3045 mlxsw_sp_traps_fini(mlxsw_sp);
3046err_rx_listener_register:
3047 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003048 return err;
3049}
3050
Jiri Pirkob2f10572016-04-08 19:11:23 +02003051static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003053 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003054
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003055 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003056 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003057 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003058 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003059 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003060 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003061 mlxsw_sp_traps_fini(mlxsw_sp);
3062 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003063 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003064 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003065}
3066
3067static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3068 .used_max_vepa_channels = 1,
3069 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003070 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003071 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003072 .used_max_pgt = 1,
3073 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003074 .used_flood_tables = 1,
3075 .used_flood_mode = 1,
3076 .flood_mode = 3,
3077 .max_fid_offset_flood_tables = 2,
3078 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003079 .max_fid_flood_tables = 2,
3080 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003081 .used_max_ib_mc = 1,
3082 .max_ib_mc = 0,
3083 .used_max_pkey = 1,
3084 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003085 .used_kvd_split_data = 1,
3086 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3087 .kvd_hash_single_parts = 2,
3088 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003089 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003090 .swid_config = {
3091 {
3092 .used_type = 1,
3093 .type = MLXSW_PORT_SWID_TYPE_ETH,
3094 }
3095 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003096 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003097};
3098
3099static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003100 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003101 .priv_size = sizeof(struct mlxsw_sp),
3102 .init = mlxsw_sp_init,
3103 .fini = mlxsw_sp_fini,
3104 .port_split = mlxsw_sp_port_split,
3105 .port_unsplit = mlxsw_sp_port_unsplit,
3106 .sb_pool_get = mlxsw_sp_sb_pool_get,
3107 .sb_pool_set = mlxsw_sp_sb_pool_set,
3108 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3109 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3110 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3111 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3112 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3113 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3114 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3115 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3116 .txhdr_construct = mlxsw_sp_txhdr_construct,
3117 .txhdr_len = MLXSW_TXHDR_LEN,
3118 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003119};
3120
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003121static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3122{
3123 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3124}
3125
David Aherndd823642016-10-17 19:15:49 -07003126static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3127{
3128 struct mlxsw_sp_port **port = data;
3129 int ret = 0;
3130
3131 if (mlxsw_sp_port_dev_check(lower_dev)) {
3132 *port = netdev_priv(lower_dev);
3133 ret = 1;
3134 }
3135
3136 return ret;
3137}
3138
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003139static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3140{
David Aherndd823642016-10-17 19:15:49 -07003141 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003142
3143 if (mlxsw_sp_port_dev_check(dev))
3144 return netdev_priv(dev);
3145
David Aherndd823642016-10-17 19:15:49 -07003146 port = NULL;
3147 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3148
3149 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003150}
3151
3152static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3153{
3154 struct mlxsw_sp_port *mlxsw_sp_port;
3155
3156 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3157 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3158}
3159
3160static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3161{
David Aherndd823642016-10-17 19:15:49 -07003162 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003163
3164 if (mlxsw_sp_port_dev_check(dev))
3165 return netdev_priv(dev);
3166
David Aherndd823642016-10-17 19:15:49 -07003167 port = NULL;
3168 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3169
3170 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003171}
3172
3173struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3174{
3175 struct mlxsw_sp_port *mlxsw_sp_port;
3176
3177 rcu_read_lock();
3178 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3179 if (mlxsw_sp_port)
3180 dev_hold(mlxsw_sp_port->dev);
3181 rcu_read_unlock();
3182 return mlxsw_sp_port;
3183}
3184
3185void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3186{
3187 dev_put(mlxsw_sp_port->dev);
3188}
3189
Ido Schimmel99724c12016-07-04 08:23:14 +02003190static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3191 unsigned long event)
3192{
3193 switch (event) {
3194 case NETDEV_UP:
3195 if (!r)
3196 return true;
3197 r->ref_count++;
3198 return false;
3199 case NETDEV_DOWN:
3200 if (r && --r->ref_count == 0)
3201 return true;
3202 /* It is possible we already removed the RIF ourselves
3203 * if it was assigned to a netdev that is now a bridge
3204 * or LAG slave.
3205 */
3206 return false;
3207 }
3208
3209 return false;
3210}
3211
3212static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3213{
3214 int i;
3215
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003216 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003217 if (!mlxsw_sp->rifs[i])
3218 return i;
3219
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003220 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003221}
3222
3223static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3224 bool *p_lagged, u16 *p_system_port)
3225{
3226 u8 local_port = mlxsw_sp_vport->local_port;
3227
3228 *p_lagged = mlxsw_sp_vport->lagged;
3229 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3230}
3231
3232static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3233 struct net_device *l3_dev, u16 rif,
3234 bool create)
3235{
3236 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3237 bool lagged = mlxsw_sp_vport->lagged;
3238 char ritr_pl[MLXSW_REG_RITR_LEN];
3239 u16 system_port;
3240
3241 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3242 l3_dev->mtu, l3_dev->dev_addr);
3243
3244 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3245 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3246 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3247
3248 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3249}
3250
3251static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3252
3253static struct mlxsw_sp_fid *
3254mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3255{
3256 struct mlxsw_sp_fid *f;
3257
3258 f = kzalloc(sizeof(*f), GFP_KERNEL);
3259 if (!f)
3260 return NULL;
3261
3262 f->leave = mlxsw_sp_vport_rif_sp_leave;
3263 f->ref_count = 0;
3264 f->dev = l3_dev;
3265 f->fid = fid;
3266
3267 return f;
3268}
3269
3270static struct mlxsw_sp_rif *
3271mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3272{
3273 struct mlxsw_sp_rif *r;
3274
3275 r = kzalloc(sizeof(*r), GFP_KERNEL);
3276 if (!r)
3277 return NULL;
3278
3279 ether_addr_copy(r->addr, l3_dev->dev_addr);
3280 r->mtu = l3_dev->mtu;
3281 r->ref_count = 1;
3282 r->dev = l3_dev;
3283 r->rif = rif;
3284 r->f = f;
3285
3286 return r;
3287}
3288
3289static struct mlxsw_sp_rif *
3290mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3291 struct net_device *l3_dev)
3292{
3293 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3294 struct mlxsw_sp_fid *f;
3295 struct mlxsw_sp_rif *r;
3296 u16 fid, rif;
3297 int err;
3298
3299 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003300 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003301 return ERR_PTR(-ERANGE);
3302
3303 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3304 if (err)
3305 return ERR_PTR(err);
3306
3307 fid = mlxsw_sp_rif_sp_to_fid(rif);
3308 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3309 if (err)
3310 goto err_rif_fdb_op;
3311
3312 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3313 if (!f) {
3314 err = -ENOMEM;
3315 goto err_rfid_alloc;
3316 }
3317
3318 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3319 if (!r) {
3320 err = -ENOMEM;
3321 goto err_rif_alloc;
3322 }
3323
3324 f->r = r;
3325 mlxsw_sp->rifs[rif] = r;
3326
3327 return r;
3328
3329err_rif_alloc:
3330 kfree(f);
3331err_rfid_alloc:
3332 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3333err_rif_fdb_op:
3334 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3335 return ERR_PTR(err);
3336}
3337
3338static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3339 struct mlxsw_sp_rif *r)
3340{
3341 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3342 struct net_device *l3_dev = r->dev;
3343 struct mlxsw_sp_fid *f = r->f;
3344 u16 fid = f->fid;
3345 u16 rif = r->rif;
3346
3347 mlxsw_sp->rifs[rif] = NULL;
3348 f->r = NULL;
3349
3350 kfree(r);
3351
3352 kfree(f);
3353
3354 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3355
3356 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3357}
3358
3359static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3360 struct net_device *l3_dev)
3361{
3362 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3363 struct mlxsw_sp_rif *r;
3364
3365 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3366 if (!r) {
3367 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3368 if (IS_ERR(r))
3369 return PTR_ERR(r);
3370 }
3371
3372 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3373 r->f->ref_count++;
3374
3375 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3376
3377 return 0;
3378}
3379
3380static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3381{
3382 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3383
3384 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3385
3386 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3387 if (--f->ref_count == 0)
3388 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3389}
3390
3391static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3392 struct net_device *port_dev,
3393 unsigned long event, u16 vid)
3394{
3395 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3396 struct mlxsw_sp_port *mlxsw_sp_vport;
3397
3398 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3399 if (WARN_ON(!mlxsw_sp_vport))
3400 return -EINVAL;
3401
3402 switch (event) {
3403 case NETDEV_UP:
3404 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3405 case NETDEV_DOWN:
3406 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3407 break;
3408 }
3409
3410 return 0;
3411}
3412
3413static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3414 unsigned long event)
3415{
3416 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3417 return 0;
3418
3419 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3420}
3421
3422static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3423 struct net_device *lag_dev,
3424 unsigned long event, u16 vid)
3425{
3426 struct net_device *port_dev;
3427 struct list_head *iter;
3428 int err;
3429
3430 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3431 if (mlxsw_sp_port_dev_check(port_dev)) {
3432 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3433 event, vid);
3434 if (err)
3435 return err;
3436 }
3437 }
3438
3439 return 0;
3440}
3441
3442static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3443 unsigned long event)
3444{
3445 if (netif_is_bridge_port(lag_dev))
3446 return 0;
3447
3448 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3449}
3450
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003451static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3452 struct net_device *l3_dev)
3453{
3454 u16 fid;
3455
3456 if (is_vlan_dev(l3_dev))
3457 fid = vlan_dev_vlan_id(l3_dev);
3458 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3459 fid = 1;
3460 else
3461 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3462
3463 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3464}
3465
Ido Schimmelf888f582016-08-24 11:18:51 +02003466static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3467{
3468 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3469 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3470}
3471
3472static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3473{
3474 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3475}
3476
3477static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3478 bool set)
3479{
3480 enum mlxsw_flood_table_type table_type;
3481 char *sftr_pl;
3482 u16 index;
3483 int err;
3484
3485 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3486 if (!sftr_pl)
3487 return -ENOMEM;
3488
3489 table_type = mlxsw_sp_flood_table_type_get(fid);
3490 index = mlxsw_sp_flood_table_index_get(fid);
3491 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3492 1, MLXSW_PORT_ROUTER_PORT, set);
3493 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3494
3495 kfree(sftr_pl);
3496 return err;
3497}
3498
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003499static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3500{
3501 if (mlxsw_sp_fid_is_vfid(fid))
3502 return MLXSW_REG_RITR_FID_IF;
3503 else
3504 return MLXSW_REG_RITR_VLAN_IF;
3505}
3506
3507static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3508 struct net_device *l3_dev,
3509 u16 fid, u16 rif,
3510 bool create)
3511{
3512 enum mlxsw_reg_ritr_if_type rif_type;
3513 char ritr_pl[MLXSW_REG_RITR_LEN];
3514
3515 rif_type = mlxsw_sp_rif_type_get(fid);
3516 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3517 l3_dev->dev_addr);
3518 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3519
3520 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3521}
3522
3523static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3524 struct net_device *l3_dev,
3525 struct mlxsw_sp_fid *f)
3526{
3527 struct mlxsw_sp_rif *r;
3528 u16 rif;
3529 int err;
3530
3531 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003532 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003533 return -ERANGE;
3534
Ido Schimmelf888f582016-08-24 11:18:51 +02003535 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003536 if (err)
3537 return err;
3538
Ido Schimmelf888f582016-08-24 11:18:51 +02003539 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3540 if (err)
3541 goto err_rif_bridge_op;
3542
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003543 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3544 if (err)
3545 goto err_rif_fdb_op;
3546
3547 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3548 if (!r) {
3549 err = -ENOMEM;
3550 goto err_rif_alloc;
3551 }
3552
3553 f->r = r;
3554 mlxsw_sp->rifs[rif] = r;
3555
3556 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3557
3558 return 0;
3559
3560err_rif_alloc:
3561 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3562err_rif_fdb_op:
3563 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003564err_rif_bridge_op:
3565 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003566 return err;
3567}
3568
3569void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3570 struct mlxsw_sp_rif *r)
3571{
3572 struct net_device *l3_dev = r->dev;
3573 struct mlxsw_sp_fid *f = r->f;
3574 u16 rif = r->rif;
3575
3576 mlxsw_sp->rifs[rif] = NULL;
3577 f->r = NULL;
3578
3579 kfree(r);
3580
3581 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3582
3583 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3584
Ido Schimmelf888f582016-08-24 11:18:51 +02003585 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3586
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003587 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3588}
3589
3590static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3591 struct net_device *br_dev,
3592 unsigned long event)
3593{
3594 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3595 struct mlxsw_sp_fid *f;
3596
3597 /* FID can either be an actual FID if the L3 device is the
3598 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3599 * L3 device is a VLAN-unaware bridge and we get a vFID.
3600 */
3601 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3602 if (WARN_ON(!f))
3603 return -EINVAL;
3604
3605 switch (event) {
3606 case NETDEV_UP:
3607 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3608 case NETDEV_DOWN:
3609 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3610 break;
3611 }
3612
3613 return 0;
3614}
3615
Ido Schimmel99724c12016-07-04 08:23:14 +02003616static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3617 unsigned long event)
3618{
3619 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003620 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003621 u16 vid = vlan_dev_vlan_id(vlan_dev);
3622
3623 if (mlxsw_sp_port_dev_check(real_dev))
3624 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3625 vid);
3626 else if (netif_is_lag_master(real_dev))
3627 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3628 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003629 else if (netif_is_bridge_master(real_dev) &&
3630 mlxsw_sp->master_bridge.dev == real_dev)
3631 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3632 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003633
3634 return 0;
3635}
3636
3637static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3638 unsigned long event, void *ptr)
3639{
3640 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3641 struct net_device *dev = ifa->ifa_dev->dev;
3642 struct mlxsw_sp *mlxsw_sp;
3643 struct mlxsw_sp_rif *r;
3644 int err = 0;
3645
3646 mlxsw_sp = mlxsw_sp_lower_get(dev);
3647 if (!mlxsw_sp)
3648 goto out;
3649
3650 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3651 if (!mlxsw_sp_rif_should_config(r, event))
3652 goto out;
3653
3654 if (mlxsw_sp_port_dev_check(dev))
3655 err = mlxsw_sp_inetaddr_port_event(dev, event);
3656 else if (netif_is_lag_master(dev))
3657 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003658 else if (netif_is_bridge_master(dev))
3659 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003660 else if (is_vlan_dev(dev))
3661 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3662
3663out:
3664 return notifier_from_errno(err);
3665}
3666
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003667static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3668 const char *mac, int mtu)
3669{
3670 char ritr_pl[MLXSW_REG_RITR_LEN];
3671 int err;
3672
3673 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3674 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3675 if (err)
3676 return err;
3677
3678 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3679 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3680 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3681 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3682}
3683
3684static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3685{
3686 struct mlxsw_sp *mlxsw_sp;
3687 struct mlxsw_sp_rif *r;
3688 int err;
3689
3690 mlxsw_sp = mlxsw_sp_lower_get(dev);
3691 if (!mlxsw_sp)
3692 return 0;
3693
3694 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3695 if (!r)
3696 return 0;
3697
3698 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3699 if (err)
3700 return err;
3701
3702 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3703 if (err)
3704 goto err_rif_edit;
3705
3706 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3707 if (err)
3708 goto err_rif_fdb_op;
3709
3710 ether_addr_copy(r->addr, dev->dev_addr);
3711 r->mtu = dev->mtu;
3712
3713 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3714
3715 return 0;
3716
3717err_rif_fdb_op:
3718 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3719err_rif_edit:
3720 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3721 return err;
3722}
3723
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003724static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3725 u16 fid)
3726{
3727 if (mlxsw_sp_fid_is_vfid(fid))
3728 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3729 else
3730 return test_bit(fid, lag_port->active_vlans);
3731}
3732
3733static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3734 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003735{
3736 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003737 u8 local_port = mlxsw_sp_port->local_port;
3738 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003739 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003740 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003741
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003742 if (!mlxsw_sp_port->lagged)
3743 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003744
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003745 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3746 MAX_LAG_MEMBERS);
3747 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003748 struct mlxsw_sp_port *lag_port;
3749
3750 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3751 if (!lag_port || lag_port->local_port == local_port)
3752 continue;
3753 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3754 count++;
3755 }
3756
3757 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003758}
3759
3760static int
3761mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3762 u16 fid)
3763{
3764 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3765 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3766
3767 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3768 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3769 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3770 mlxsw_sp_port->local_port);
3771
Ido Schimmel22305372016-06-20 23:04:21 +02003772 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3773 mlxsw_sp_port->local_port, fid);
3774
Ido Schimmel039c49a2016-01-27 15:20:18 +01003775 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3776}
3777
3778static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003779mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3780 u16 fid)
3781{
3782 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3783 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3784
3785 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3786 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3787 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3788
Ido Schimmel22305372016-06-20 23:04:21 +02003789 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3790 mlxsw_sp_port->lag_id, fid);
3791
Ido Schimmel039c49a2016-01-27 15:20:18 +01003792 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3793}
3794
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003795int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003796{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003797 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3798 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003799
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003800 if (mlxsw_sp_port->lagged)
3801 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003802 fid);
3803 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003804 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003805}
3806
Ido Schimmel701b1862016-07-04 08:23:16 +02003807static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3808{
3809 struct mlxsw_sp_fid *f, *tmp;
3810
3811 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3812 if (--f->ref_count == 0)
3813 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3814 else
3815 WARN_ON_ONCE(1);
3816}
3817
Ido Schimmel7117a572016-06-20 23:04:06 +02003818static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3819 struct net_device *br_dev)
3820{
3821 return !mlxsw_sp->master_bridge.dev ||
3822 mlxsw_sp->master_bridge.dev == br_dev;
3823}
3824
3825static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3826 struct net_device *br_dev)
3827{
3828 mlxsw_sp->master_bridge.dev = br_dev;
3829 mlxsw_sp->master_bridge.ref_count++;
3830}
3831
3832static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3833{
Ido Schimmel701b1862016-07-04 08:23:16 +02003834 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003835 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003836 /* It's possible upper VLAN devices are still holding
3837 * references to underlying FIDs. Drop the reference
3838 * and release the resources if it was the last one.
3839 * If it wasn't, then something bad happened.
3840 */
3841 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3842 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003843}
3844
3845static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3846 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003847{
3848 struct net_device *dev = mlxsw_sp_port->dev;
3849 int err;
3850
3851 /* When port is not bridged untagged packets are tagged with
3852 * PVID=VID=1, thereby creating an implicit VLAN interface in
3853 * the device. Remove it and let bridge code take care of its
3854 * own VLANs.
3855 */
3856 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003857 if (err)
3858 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003859
Ido Schimmel7117a572016-06-20 23:04:06 +02003860 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3861
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003862 mlxsw_sp_port->learning = 1;
3863 mlxsw_sp_port->learning_sync = 1;
3864 mlxsw_sp_port->uc_flood = 1;
3865 mlxsw_sp_port->bridged = 1;
3866
3867 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003868}
3869
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003870static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003871{
3872 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003873
Ido Schimmel28a01d22016-02-18 11:30:02 +01003874 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3875
Ido Schimmel7117a572016-06-20 23:04:06 +02003876 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3877
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003878 mlxsw_sp_port->learning = 0;
3879 mlxsw_sp_port->learning_sync = 0;
3880 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003881 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003882
3883 /* Add implicit VLAN interface in the device, so that untagged
3884 * packets will be classified to the default vFID.
3885 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003886 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003887}
3888
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003889static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003890{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003891 char sldr_pl[MLXSW_REG_SLDR_LEN];
3892
3893 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3894 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3895}
3896
3897static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3898{
3899 char sldr_pl[MLXSW_REG_SLDR_LEN];
3900
3901 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3902 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3903}
3904
3905static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3906 u16 lag_id, u8 port_index)
3907{
3908 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3909 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3910
3911 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3912 lag_id, port_index);
3913 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3914}
3915
3916static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3917 u16 lag_id)
3918{
3919 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3920 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3921
3922 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3923 lag_id);
3924 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3925}
3926
3927static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3928 u16 lag_id)
3929{
3930 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3931 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3932
3933 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3934 lag_id);
3935 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3936}
3937
3938static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3939 u16 lag_id)
3940{
3941 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3942 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3943
3944 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3945 lag_id);
3946 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3947}
3948
3949static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3950 struct net_device *lag_dev,
3951 u16 *p_lag_id)
3952{
3953 struct mlxsw_sp_upper *lag;
3954 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003955 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003956 int i;
3957
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003958 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
3959 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003960 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3961 if (lag->ref_count) {
3962 if (lag->dev == lag_dev) {
3963 *p_lag_id = i;
3964 return 0;
3965 }
3966 } else if (free_lag_id < 0) {
3967 free_lag_id = i;
3968 }
3969 }
3970 if (free_lag_id < 0)
3971 return -EBUSY;
3972 *p_lag_id = free_lag_id;
3973 return 0;
3974}
3975
3976static bool
3977mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3978 struct net_device *lag_dev,
3979 struct netdev_lag_upper_info *lag_upper_info)
3980{
3981 u16 lag_id;
3982
3983 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3984 return false;
3985 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3986 return false;
3987 return true;
3988}
3989
3990static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3991 u16 lag_id, u8 *p_port_index)
3992{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003993 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003994 int i;
3995
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003996 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3997 MAX_LAG_MEMBERS);
3998 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003999 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4000 *p_port_index = i;
4001 return 0;
4002 }
4003 }
4004 return -EBUSY;
4005}
4006
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004007static void
4008mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4009 u16 lag_id)
4010{
4011 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004012 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004013
4014 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4015 if (WARN_ON(!mlxsw_sp_vport))
4016 return;
4017
Ido Schimmel11943ff2016-07-02 11:00:12 +02004018 /* If vPort is assigned a RIF, then leave it since it's no
4019 * longer valid.
4020 */
4021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4022 if (f)
4023 f->leave(mlxsw_sp_vport);
4024
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004025 mlxsw_sp_vport->lag_id = lag_id;
4026 mlxsw_sp_vport->lagged = 1;
4027}
4028
4029static void
4030mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4031{
4032 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004033 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004034
4035 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4036 if (WARN_ON(!mlxsw_sp_vport))
4037 return;
4038
Ido Schimmel11943ff2016-07-02 11:00:12 +02004039 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4040 if (f)
4041 f->leave(mlxsw_sp_vport);
4042
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004043 mlxsw_sp_vport->lagged = 0;
4044}
4045
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004046static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4047 struct net_device *lag_dev)
4048{
4049 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4050 struct mlxsw_sp_upper *lag;
4051 u16 lag_id;
4052 u8 port_index;
4053 int err;
4054
4055 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4056 if (err)
4057 return err;
4058 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4059 if (!lag->ref_count) {
4060 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4061 if (err)
4062 return err;
4063 lag->dev = lag_dev;
4064 }
4065
4066 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4067 if (err)
4068 return err;
4069 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4070 if (err)
4071 goto err_col_port_add;
4072 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4073 if (err)
4074 goto err_col_port_enable;
4075
4076 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4077 mlxsw_sp_port->local_port);
4078 mlxsw_sp_port->lag_id = lag_id;
4079 mlxsw_sp_port->lagged = 1;
4080 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004081
4082 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4083
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004084 return 0;
4085
Ido Schimmel51554db2016-05-06 22:18:39 +02004086err_col_port_enable:
4087 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004088err_col_port_add:
4089 if (!lag->ref_count)
4090 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004091 return err;
4092}
4093
Ido Schimmel82e6db02016-06-20 23:04:04 +02004094static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4095 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004096{
4097 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004098 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004099 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004100
4101 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004102 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004103 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4104 WARN_ON(lag->ref_count == 0);
4105
Ido Schimmel82e6db02016-06-20 23:04:04 +02004106 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4107 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004108
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004109 if (mlxsw_sp_port->bridged) {
4110 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004111 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004112 }
4113
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004114 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004115 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004116
4117 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4118 mlxsw_sp_port->local_port);
4119 mlxsw_sp_port->lagged = 0;
4120 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004121
4122 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004123}
4124
Jiri Pirko74581202015-12-03 12:12:30 +01004125static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4126 u16 lag_id)
4127{
4128 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4129 char sldr_pl[MLXSW_REG_SLDR_LEN];
4130
4131 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4132 mlxsw_sp_port->local_port);
4133 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4134}
4135
4136static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4137 u16 lag_id)
4138{
4139 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4140 char sldr_pl[MLXSW_REG_SLDR_LEN];
4141
4142 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4143 mlxsw_sp_port->local_port);
4144 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4145}
4146
4147static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4148 bool lag_tx_enabled)
4149{
4150 if (lag_tx_enabled)
4151 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4152 mlxsw_sp_port->lag_id);
4153 else
4154 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4155 mlxsw_sp_port->lag_id);
4156}
4157
4158static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4159 struct netdev_lag_lower_state_info *info)
4160{
4161 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4162}
4163
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004164static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4165 struct net_device *vlan_dev)
4166{
4167 struct mlxsw_sp_port *mlxsw_sp_vport;
4168 u16 vid = vlan_dev_vlan_id(vlan_dev);
4169
4170 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004171 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004172 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004173
4174 mlxsw_sp_vport->dev = vlan_dev;
4175
4176 return 0;
4177}
4178
Ido Schimmel82e6db02016-06-20 23:04:04 +02004179static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4180 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004181{
4182 struct mlxsw_sp_port *mlxsw_sp_vport;
4183 u16 vid = vlan_dev_vlan_id(vlan_dev);
4184
4185 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004186 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004187 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004188
4189 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004190}
4191
Jiri Pirko74581202015-12-03 12:12:30 +01004192static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4193 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004194{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004195 struct netdev_notifier_changeupper_info *info;
4196 struct mlxsw_sp_port *mlxsw_sp_port;
4197 struct net_device *upper_dev;
4198 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004199 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004200
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004201 mlxsw_sp_port = netdev_priv(dev);
4202 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4203 info = ptr;
4204
4205 switch (event) {
4206 case NETDEV_PRECHANGEUPPER:
4207 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004208 if (!is_vlan_dev(upper_dev) &&
4209 !netif_is_lag_master(upper_dev) &&
4210 !netif_is_bridge_master(upper_dev))
4211 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004212 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004213 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004214 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004215 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004216 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004217 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004218 if (netif_is_lag_master(upper_dev) &&
4219 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4220 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004221 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004222 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4223 return -EINVAL;
4224 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4225 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4226 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004227 break;
4228 case NETDEV_CHANGEUPPER:
4229 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004230 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004231 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004232 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4233 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004234 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004235 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4236 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004237 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004238 if (info->linking)
4239 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4240 upper_dev);
4241 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004242 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004243 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004244 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004245 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4246 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004247 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004248 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4249 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004250 } else {
4251 err = -EINVAL;
4252 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004253 }
4254 break;
4255 }
4256
Ido Schimmel80bedf12016-06-20 23:03:59 +02004257 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004258}
4259
Jiri Pirko74581202015-12-03 12:12:30 +01004260static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4261 unsigned long event, void *ptr)
4262{
4263 struct netdev_notifier_changelowerstate_info *info;
4264 struct mlxsw_sp_port *mlxsw_sp_port;
4265 int err;
4266
4267 mlxsw_sp_port = netdev_priv(dev);
4268 info = ptr;
4269
4270 switch (event) {
4271 case NETDEV_CHANGELOWERSTATE:
4272 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4273 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4274 info->lower_state_info);
4275 if (err)
4276 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4277 }
4278 break;
4279 }
4280
Ido Schimmel80bedf12016-06-20 23:03:59 +02004281 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004282}
4283
4284static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4285 unsigned long event, void *ptr)
4286{
4287 switch (event) {
4288 case NETDEV_PRECHANGEUPPER:
4289 case NETDEV_CHANGEUPPER:
4290 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4291 case NETDEV_CHANGELOWERSTATE:
4292 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4293 }
4294
Ido Schimmel80bedf12016-06-20 23:03:59 +02004295 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004296}
4297
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004298static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4299 unsigned long event, void *ptr)
4300{
4301 struct net_device *dev;
4302 struct list_head *iter;
4303 int ret;
4304
4305 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4306 if (mlxsw_sp_port_dev_check(dev)) {
4307 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004308 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004309 return ret;
4310 }
4311 }
4312
Ido Schimmel80bedf12016-06-20 23:03:59 +02004313 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004314}
4315
Ido Schimmel701b1862016-07-04 08:23:16 +02004316static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4317 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004318{
Ido Schimmel701b1862016-07-04 08:23:16 +02004319 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004320 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004321
Ido Schimmel701b1862016-07-04 08:23:16 +02004322 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4323 if (!f) {
4324 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4325 if (IS_ERR(f))
4326 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004327 }
4328
Ido Schimmel701b1862016-07-04 08:23:16 +02004329 f->ref_count++;
4330
4331 return 0;
4332}
4333
4334static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4335 struct net_device *vlan_dev)
4336{
4337 u16 fid = vlan_dev_vlan_id(vlan_dev);
4338 struct mlxsw_sp_fid *f;
4339
4340 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004341 if (f && f->r)
4342 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004343 if (f && --f->ref_count == 0)
4344 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4345}
4346
4347static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4348 unsigned long event, void *ptr)
4349{
4350 struct netdev_notifier_changeupper_info *info;
4351 struct net_device *upper_dev;
4352 struct mlxsw_sp *mlxsw_sp;
4353 int err;
4354
4355 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4356 if (!mlxsw_sp)
4357 return 0;
4358 if (br_dev != mlxsw_sp->master_bridge.dev)
4359 return 0;
4360
4361 info = ptr;
4362
4363 switch (event) {
4364 case NETDEV_CHANGEUPPER:
4365 upper_dev = info->upper_dev;
4366 if (!is_vlan_dev(upper_dev))
4367 break;
4368 if (info->linking) {
4369 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4370 upper_dev);
4371 if (err)
4372 return err;
4373 } else {
4374 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4375 }
4376 break;
4377 }
4378
4379 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004380}
4381
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004382static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004383{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004384 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004385 MLXSW_SP_VFID_MAX);
4386}
4387
4388static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4389{
4390 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4391
4392 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4393 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004394}
4395
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004396static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004397
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004398static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4399 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004400{
4401 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004402 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004403 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004404 int err;
4405
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004406 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004407 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 dev_err(dev, "No available vFIDs\n");
4409 return ERR_PTR(-ERANGE);
4410 }
4411
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004412 fid = mlxsw_sp_vfid_to_fid(vfid);
4413 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004414 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004415 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004416 return ERR_PTR(err);
4417 }
4418
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004419 f = kzalloc(sizeof(*f), GFP_KERNEL);
4420 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004421 goto err_allocate_vfid;
4422
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004423 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004424 f->fid = fid;
4425 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004426
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004427 list_add(&f->list, &mlxsw_sp->vfids.list);
4428 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004429
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004430 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004431
4432err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004433 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434 return ERR_PTR(-ENOMEM);
4435}
4436
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004437static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4438 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004439{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004440 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004441 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004442
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004443 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004444 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004445
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004446 if (f->r)
4447 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004448
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004449 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004450
4451 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004452}
4453
Ido Schimmel99724c12016-07-04 08:23:14 +02004454static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4455 bool valid)
4456{
4457 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4458 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4459
4460 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4461 vid);
4462}
4463
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004464static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4465 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004466{
Ido Schimmel0355b592016-06-20 23:04:13 +02004467 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004468 int err;
4469
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004470 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004471 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004472 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004473 if (IS_ERR(f))
4474 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004475 }
4476
Ido Schimmel0355b592016-06-20 23:04:13 +02004477 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4478 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004479 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004480
Ido Schimmel0355b592016-06-20 23:04:13 +02004481 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4482 if (err)
4483 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004484
Ido Schimmel41b996c2016-06-20 23:04:17 +02004485 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004486 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004487
Ido Schimmel22305372016-06-20 23:04:21 +02004488 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4489
Ido Schimmel0355b592016-06-20 23:04:13 +02004490 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004491
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004492err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004493 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4494err_vport_flood_set:
4495 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004496 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004497 return err;
4498}
4499
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004500static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004501{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004502 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004503
Ido Schimmel22305372016-06-20 23:04:21 +02004504 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4505
Ido Schimmel0355b592016-06-20 23:04:13 +02004506 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4507
4508 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4509
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004510 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4511
Ido Schimmel41b996c2016-06-20 23:04:17 +02004512 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004513 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004514 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004515}
4516
4517static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4518 struct net_device *br_dev)
4519{
Ido Schimmel99724c12016-07-04 08:23:14 +02004520 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004521 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4522 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004523 int err;
4524
Ido Schimmel99724c12016-07-04 08:23:14 +02004525 if (f && !WARN_ON(!f->leave))
4526 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004527
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004528 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004529 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004530 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004531 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004532 }
4533
4534 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4535 if (err) {
4536 netdev_err(dev, "Failed to enable learning\n");
4537 goto err_port_vid_learning_set;
4538 }
4539
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004540 mlxsw_sp_vport->learning = 1;
4541 mlxsw_sp_vport->learning_sync = 1;
4542 mlxsw_sp_vport->uc_flood = 1;
4543 mlxsw_sp_vport->bridged = 1;
4544
4545 return 0;
4546
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004547err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004548 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004549 return err;
4550}
4551
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004552static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004553{
4554 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004555
4556 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4557
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004558 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004559
Ido Schimmel0355b592016-06-20 23:04:13 +02004560 mlxsw_sp_vport->learning = 0;
4561 mlxsw_sp_vport->learning_sync = 0;
4562 mlxsw_sp_vport->uc_flood = 0;
4563 mlxsw_sp_vport->bridged = 0;
4564}
4565
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004566static bool
4567mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4568 const struct net_device *br_dev)
4569{
4570 struct mlxsw_sp_port *mlxsw_sp_vport;
4571
4572 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4573 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004574 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004575
4576 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004577 return false;
4578 }
4579
4580 return true;
4581}
4582
4583static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4584 unsigned long event, void *ptr,
4585 u16 vid)
4586{
4587 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4588 struct netdev_notifier_changeupper_info *info = ptr;
4589 struct mlxsw_sp_port *mlxsw_sp_vport;
4590 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004591 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004592
4593 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4594
4595 switch (event) {
4596 case NETDEV_PRECHANGEUPPER:
4597 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004598 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004599 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004600 if (!info->linking)
4601 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004602 /* We can't have multiple VLAN interfaces configured on
4603 * the same port and being members in the same bridge.
4604 */
4605 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4606 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004607 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004608 break;
4609 case NETDEV_CHANGEUPPER:
4610 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004611 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004612 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004613 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004614 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4615 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004616 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004617 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004618 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004619 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004620 }
4621 }
4622
Ido Schimmel80bedf12016-06-20 23:03:59 +02004623 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004624}
4625
Ido Schimmel272c4472015-12-15 16:03:47 +01004626static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4627 unsigned long event, void *ptr,
4628 u16 vid)
4629{
4630 struct net_device *dev;
4631 struct list_head *iter;
4632 int ret;
4633
4634 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4635 if (mlxsw_sp_port_dev_check(dev)) {
4636 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4637 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004638 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004639 return ret;
4640 }
4641 }
4642
Ido Schimmel80bedf12016-06-20 23:03:59 +02004643 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004644}
4645
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004646static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4647 unsigned long event, void *ptr)
4648{
4649 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4650 u16 vid = vlan_dev_vlan_id(vlan_dev);
4651
Ido Schimmel272c4472015-12-15 16:03:47 +01004652 if (mlxsw_sp_port_dev_check(real_dev))
4653 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4654 vid);
4655 else if (netif_is_lag_master(real_dev))
4656 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4657 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004658
Ido Schimmel80bedf12016-06-20 23:03:59 +02004659 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004660}
4661
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004662static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4663 unsigned long event, void *ptr)
4664{
4665 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004666 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004667
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004668 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4669 err = mlxsw_sp_netdevice_router_port_event(dev);
4670 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004671 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4672 else if (netif_is_lag_master(dev))
4673 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004674 else if (netif_is_bridge_master(dev))
4675 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004676 else if (is_vlan_dev(dev))
4677 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004678
Ido Schimmel80bedf12016-06-20 23:03:59 +02004679 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004680}
4681
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004682static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4683 .notifier_call = mlxsw_sp_netdevice_event,
4684};
4685
Ido Schimmel99724c12016-07-04 08:23:14 +02004686static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4687 .notifier_call = mlxsw_sp_inetaddr_event,
4688 .priority = 10, /* Must be called before FIB notifier block */
4689};
4690
Jiri Pirkoe7322632016-09-01 10:37:43 +02004691static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4692 .notifier_call = mlxsw_sp_router_netevent_event,
4693};
4694
Jiri Pirko1d20d232016-10-27 15:12:59 +02004695static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4696 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4697 {0, },
4698};
4699
4700static struct pci_driver mlxsw_sp_pci_driver = {
4701 .name = mlxsw_sp_driver_name,
4702 .id_table = mlxsw_sp_pci_id_table,
4703};
4704
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004705static int __init mlxsw_sp_module_init(void)
4706{
4707 int err;
4708
4709 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004710 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004711 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4712
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004713 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4714 if (err)
4715 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004716
4717 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4718 if (err)
4719 goto err_pci_driver_register;
4720
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004721 return 0;
4722
Jiri Pirko1d20d232016-10-27 15:12:59 +02004723err_pci_driver_register:
4724 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004725err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004726 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004727 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004728 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4729 return err;
4730}
4731
4732static void __exit mlxsw_sp_module_exit(void)
4733{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004734 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004735 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004736 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004737 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004738 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4739}
4740
4741module_init(mlxsw_sp_module_init);
4742module_exit(mlxsw_sp_module_exit);
4743
4744MODULE_LICENSE("Dual BSD/GPL");
4745MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4746MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004747MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);