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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusib703b502014-01-03 15:27:56 +0200114static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200117 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200118
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200119 /* Decide if the given register can be written */
120 switch (reg) {
121 case TWL4030_REG_EAR_CTL:
122 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200123 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200124 break;
125 case TWL4030_REG_PREDL_CTL:
126 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200127 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200128 break;
129 case TWL4030_REG_PREDR_CTL:
130 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200131 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200132 break;
133 case TWL4030_REG_PRECKL_CTL:
134 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200135 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200136 break;
137 case TWL4030_REG_PRECKR_CTL:
138 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200139 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200140 break;
141 case TWL4030_REG_HS_GAIN_SET:
142 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 default:
146 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200149 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200150
151 return write_to_reg;
152}
153
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200154static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200156{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158
159 /* Update the ctl cache */
160 switch (reg) {
161 case TWL4030_REG_EAR_CTL:
162 case TWL4030_REG_PREDL_CTL:
163 case TWL4030_REG_PREDR_CTL:
164 case TWL4030_REG_PRECKL_CTL:
165 case TWL4030_REG_PRECKR_CTL:
166 case TWL4030_REG_HS_GAIN_SET:
167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 break;
169 default:
170 break;
171 }
172
Peter Ujfalusib703b502014-01-03 15:27:56 +0200173 if (twl4030_can_write_to_chip(twl4030, reg))
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200175
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200176 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700177}
178
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300179static inline void twl4030_wait_ms(int time)
180{
181 if (time < 60) {
182 time *= 1000;
183 usleep_range(time, time + 500);
184 } else {
185 msleep(time);
186 }
187}
188
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200189static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700190{
Mark Brownb2c812e2010-04-14 15:35:19 +0900191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300192 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700193
Peter Ujfalusi73939582009-01-29 14:57:50 +0200194 if (enable == twl4030->codec_powered)
195 return;
196
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200197 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700201
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200202 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300203 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700204
205 /* REVISIT: this delay is present in TI sample drivers */
206 /* but there seems to be no TRM requirement for it */
207 udelay(10);
208}
209
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300210static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 struct device_node *node)
212{
213 int value;
214
215 of_property_read_u32(node, "ti,digimic_delay",
216 &pdata->digimic_delay);
217 of_property_read_u32(node, "ti,ramp_delay_value",
218 &pdata->ramp_delay_value);
219 of_property_read_u32(node, "ti,offset_cncl_path",
220 &pdata->offset_cncl_path);
221 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 pdata->hs_extmute = value;
223
224 pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 "ti,hs_extmute_gpio", 0);
226 if (gpio_is_valid(pdata->hs_extmute_gpio))
227 pdata->hs_extmute = 1;
228}
229
230static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700231{
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300233 struct device_node *twl4030_codec_node = NULL;
234
235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
236 "codec");
237
238 if (!pdata && twl4030_codec_node) {
239 pdata = devm_kzalloc(codec->dev,
240 sizeof(struct twl4030_codec_data),
241 GFP_KERNEL);
242 if (!pdata) {
243 dev_err(codec->dev, "Can not allocate memory\n");
244 return NULL;
245 }
246 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 }
248
249 return pdata;
250}
251
252static void twl4030_init_chip(struct snd_soc_codec *codec)
253{
254 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
256 u8 reg, byte;
257 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700258
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300259 pdata = twl4030_get_pdata(codec);
260
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100261 if (pdata && pdata->hs_extmute) {
262 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
263 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300264
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100265 if (!pdata->hs_extmute_gpio)
266 dev_warn(codec->dev,
267 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300268
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100269 ret = gpio_request_one(pdata->hs_extmute_gpio,
270 GPIOF_OUT_INIT_LOW,
271 "hs_extmute");
272 if (ret) {
273 dev_err(codec->dev,
274 "Failed to get hs_extmute GPIO\n");
275 pdata->hs_extmute_gpio = -1;
276 }
277 } else {
278 u8 pin_mux;
279
280 /* Set TWL4030 GPIO6 as EXTMUTE signal */
281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
282 TWL4030_PMBR1_REG);
283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
286 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300287 }
288 }
289
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200290 /* Initialize the local ctl register cache */
291 tw4030_init_ctl_cache(twl4030);
292
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300293 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200296 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300297
298 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300301
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
304
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300305 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000306 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300307 return;
308
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300309 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000313 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
316 /* initiate offset cancellation */
317 twl4030_codec_enable(codec, 1);
318
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000321 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300322 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200323 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300324
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300325 /*
326 * Wait for offset cancellation to complete.
327 * Since this takes a while, do not slam the i2c.
328 * Start polling the status after ~20ms.
329 */
330 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300331 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300332 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200335 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300337 } while ((i++ < 100) &&
338 ((byte & TWL4030_CNCL_OFFSET_START) ==
339 TWL4030_CNCL_OFFSET_START));
340
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200341 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700342}
343
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200344static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200345{
Mark Brownb2c812e2010-04-14 15:35:19 +0900346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300347 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200348
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300349 if (enable) {
350 twl4030->apll_enabled++;
351 if (twl4030->apll_enabled == 1)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300352 status = twl4030_audio_enable_resource(
353 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300354 } else {
355 twl4030->apll_enabled--;
356 if (!twl4030->apll_enabled)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 status = twl4030_audio_disable_resource(
358 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300359 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200360}
361
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200362/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900363static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
364 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
365 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
366 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
367 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
368};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200369
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200370/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900371static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
372 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
373 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
374 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
375 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
376};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200377
378/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900379static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
380 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
381 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
382 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
383 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
384};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200385
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200386/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900387static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
388 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
389 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
390 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
391};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200392
393/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900394static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
395 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
396 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
397 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
398};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200399
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200400/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900401static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
402 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
403 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
404 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
405};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200406
407/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900408static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
409 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
410 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
411 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
412};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200413
Peter Ujfalusidf339802008-12-09 12:35:51 +0200414/* Handsfree Left */
415static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900416 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200417
418static const struct soc_enum twl4030_handsfreel_enum =
419 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
420 ARRAY_SIZE(twl4030_handsfreel_texts),
421 twl4030_handsfreel_texts);
422
423static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
424SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
425
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300426/* Handsfree Left virtual mute */
427static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200428 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300429
Peter Ujfalusidf339802008-12-09 12:35:51 +0200430/* Handsfree Right */
431static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900432 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200433
434static const struct soc_enum twl4030_handsfreer_enum =
435 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
436 ARRAY_SIZE(twl4030_handsfreer_texts),
437 twl4030_handsfreer_texts);
438
439static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
440SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
441
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300442/* Handsfree Right virtual mute */
443static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200444 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300445
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300446/* Vibra */
447/* Vibra audio path selection */
448static const char *twl4030_vibra_texts[] =
449 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
450
451static const struct soc_enum twl4030_vibra_enum =
452 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
453 ARRAY_SIZE(twl4030_vibra_texts),
454 twl4030_vibra_texts);
455
456static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
457SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
458
459/* Vibra path selection: local vibrator (PWM) or audio driven */
460static const char *twl4030_vibrapath_texts[] =
461 {"Local vibrator", "Audio"};
462
463static const struct soc_enum twl4030_vibrapath_enum =
464 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
465 ARRAY_SIZE(twl4030_vibrapath_texts),
466 twl4030_vibrapath_texts);
467
468static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
469SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
470
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200471/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900472static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300473 SOC_DAPM_SINGLE("Main Mic Capture Switch",
474 TWL4030_REG_ANAMICL, 0, 1, 0),
475 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
476 TWL4030_REG_ANAMICL, 1, 1, 0),
477 SOC_DAPM_SINGLE("AUXL Capture Switch",
478 TWL4030_REG_ANAMICL, 2, 1, 0),
479 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
480 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900481};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200482
483/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900484static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300485 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
486 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900487};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200488
489/* TX1 L/R Analog/Digital microphone selection */
490static const char *twl4030_micpathtx1_texts[] =
491 {"Analog", "Digimic0"};
492
493static const struct soc_enum twl4030_micpathtx1_enum =
494 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
495 ARRAY_SIZE(twl4030_micpathtx1_texts),
496 twl4030_micpathtx1_texts);
497
498static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
499SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
500
501/* TX2 L/R Analog/Digital microphone selection */
502static const char *twl4030_micpathtx2_texts[] =
503 {"Analog", "Digimic1"};
504
505static const struct soc_enum twl4030_micpathtx2_enum =
506 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
507 ARRAY_SIZE(twl4030_micpathtx2_texts),
508 twl4030_micpathtx2_texts);
509
510static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
511SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
512
Peter Ujfalusi73939582009-01-29 14:57:50 +0200513/* Analog bypass for AudioR1 */
514static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
515 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
516
517/* Analog bypass for AudioL1 */
518static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
519 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
520
521/* Analog bypass for AudioR2 */
522static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
523 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
524
525/* Analog bypass for AudioL2 */
526static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
527 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
528
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500529/* Analog bypass for Voice */
530static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
531 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
532
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300533/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200534static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300535 TLV_DB_RANGE_HEAD(3),
536 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
537 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200538 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
539};
540
541/* Digital bypass left (TX1L -> RX2L) */
542static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
543 SOC_DAPM_SINGLE_TLV("Volume",
544 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
545 twl4030_dapm_dbypass_tlv);
546
547/* Digital bypass right (TX1R -> RX2R) */
548static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
549 SOC_DAPM_SINGLE_TLV("Volume",
550 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
551 twl4030_dapm_dbypass_tlv);
552
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500553/*
554 * Voice Sidetone GAIN volume control:
555 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
556 */
557static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
558
559/* Digital bypass voice: sidetone (VUL -> VDL)*/
560static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
561 SOC_DAPM_SINGLE_TLV("Volume",
562 TWL4030_REG_VSTPGA, 0, 0x29, 0,
563 twl4030_dapm_dbypassv_tlv);
564
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300565/*
566 * Output PGA builder:
567 * Handle the muting and unmuting of the given output (turning off the
568 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200569 * On mute bypass the reg_cache and write 0 to the register
570 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300571 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
572 */
573#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
574static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200575 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300576{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900577 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300578 \
579 switch (event) { \
580 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200581 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200582 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300583 break; \
584 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200585 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200586 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300587 break; \
588 } \
589 return 0; \
590}
591
592TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
593TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
594TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
595TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
596TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
597
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300598static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800599{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800600 unsigned char hs_ctl;
601
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200602 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800603
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300604 if (ramp) {
605 /* HF ramp-up */
606 hs_ctl |= TWL4030_HF_CTL_REF_EN;
607 twl4030_write(codec, reg, hs_ctl);
608 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800609 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300610 twl4030_write(codec, reg, hs_ctl);
611 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800612 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800613 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300614 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800615 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300616 /* HF ramp-down */
617 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
618 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
619 twl4030_write(codec, reg, hs_ctl);
620 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
621 twl4030_write(codec, reg, hs_ctl);
622 udelay(40);
623 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
624 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800625 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300626}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800627
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300628static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200629 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300630{
631 switch (event) {
632 case SND_SOC_DAPM_POST_PMU:
633 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
634 break;
635 case SND_SOC_DAPM_POST_PMD:
636 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
637 break;
638 }
639 return 0;
640}
641
642static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200643 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300644{
645 switch (event) {
646 case SND_SOC_DAPM_POST_PMU:
647 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
648 break;
649 case SND_SOC_DAPM_POST_PMD:
650 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
651 break;
652 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800653 return 0;
654}
655
Jari Vanhala86139a12009-10-29 11:58:09 +0200656static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200657 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200658{
659 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
660 return 0;
661}
662
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200663static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200664 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200665{
666 switch (event) {
667 case SND_SOC_DAPM_PRE_PMU:
668 twl4030_apll_enable(w->codec, 1);
669 break;
670 case SND_SOC_DAPM_POST_PMD:
671 twl4030_apll_enable(w->codec, 0);
672 break;
673 }
674 return 0;
675}
676
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300677static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200678 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300679{
680 u8 audio_if;
681
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200682 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300683 switch (event) {
684 case SND_SOC_DAPM_PRE_PMU:
685 /* Enable AIF */
686 /* enable the PLL before we use it to clock the DAI */
687 twl4030_apll_enable(w->codec, 1);
688
689 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200690 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300691 break;
692 case SND_SOC_DAPM_POST_PMD:
693 /* disable the DAI before we stop it's source PLL */
694 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200695 audio_if & ~TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300696 twl4030_apll_enable(w->codec, 0);
697 break;
698 }
699 return 0;
700}
701
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300702static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200703{
704 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900705 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300706 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300707 /* Base values for ramp delay calculation: 2^19 - 2^26 */
708 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
709 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300710 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200711
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200712 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
713 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300714 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
715 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200716
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500717 /* Enable external mute control, this dramatically reduces
718 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000719 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300720 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
721 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500722 } else {
723 hs_pop |= TWL4030_EXTMUTE;
724 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
725 }
726 }
727
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300728 if (ramp) {
729 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200730 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300731 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200732 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200733 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
734 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200735 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300736 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500737 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300738 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300739 } else {
740 /* Headset ramp-down _not_ according to
741 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200742 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300743 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
744 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300745 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200746 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200747 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
748 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300749
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200750 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300751 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
752 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500753
754 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000755 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300756 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
757 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500758 } else {
759 hs_pop &= ~TWL4030_EXTMUTE;
760 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
761 }
762 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300763}
764
765static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200766 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300767{
Mark Brownb2c812e2010-04-14 15:35:19 +0900768 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300769
770 switch (event) {
771 case SND_SOC_DAPM_POST_PMU:
772 /* Do the ramp-up only once */
773 if (!twl4030->hsr_enabled)
774 headset_ramp(w->codec, 1);
775
776 twl4030->hsl_enabled = 1;
777 break;
778 case SND_SOC_DAPM_POST_PMD:
779 /* Do the ramp-down only if both headsetL/R is disabled */
780 if (!twl4030->hsr_enabled)
781 headset_ramp(w->codec, 0);
782
783 twl4030->hsl_enabled = 0;
784 break;
785 }
786 return 0;
787}
788
789static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200790 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300791{
Mark Brownb2c812e2010-04-14 15:35:19 +0900792 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300793
794 switch (event) {
795 case SND_SOC_DAPM_POST_PMU:
796 /* Do the ramp-up only once */
797 if (!twl4030->hsl_enabled)
798 headset_ramp(w->codec, 1);
799
800 twl4030->hsr_enabled = 1;
801 break;
802 case SND_SOC_DAPM_POST_PMD:
803 /* Do the ramp-down only if both headsetL/R is disabled */
804 if (!twl4030->hsl_enabled)
805 headset_ramp(w->codec, 0);
806
807 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200808 break;
809 }
810 return 0;
811}
812
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300813static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200814 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300815{
816 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300817 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300818
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300819 if (pdata && pdata->digimic_delay)
820 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300821 return 0;
822}
823
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200824/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200825 * Some of the gain controls in TWL (mostly those which are associated with
826 * the outputs) are implemented in an interesting way:
827 * 0x0 : Power down (mute)
828 * 0x1 : 6dB
829 * 0x2 : 0 dB
830 * 0x3 : -6 dB
831 * Inverting not going to help with these.
832 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
833 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200834static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200835 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200836{
837 struct soc_mixer_control *mc =
838 (struct soc_mixer_control *)kcontrol->private_value;
839 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
840 unsigned int reg = mc->reg;
841 unsigned int shift = mc->shift;
842 unsigned int rshift = mc->rshift;
843 int max = mc->max;
844 int mask = (1 << fls(max)) - 1;
845
846 ucontrol->value.integer.value[0] =
847 (snd_soc_read(codec, reg) >> shift) & mask;
848 if (ucontrol->value.integer.value[0])
849 ucontrol->value.integer.value[0] =
850 max + 1 - ucontrol->value.integer.value[0];
851
852 if (shift != rshift) {
853 ucontrol->value.integer.value[1] =
854 (snd_soc_read(codec, reg) >> rshift) & mask;
855 if (ucontrol->value.integer.value[1])
856 ucontrol->value.integer.value[1] =
857 max + 1 - ucontrol->value.integer.value[1];
858 }
859
860 return 0;
861}
862
863static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200864 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200865{
866 struct soc_mixer_control *mc =
867 (struct soc_mixer_control *)kcontrol->private_value;
868 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
869 unsigned int reg = mc->reg;
870 unsigned int shift = mc->shift;
871 unsigned int rshift = mc->rshift;
872 int max = mc->max;
873 int mask = (1 << fls(max)) - 1;
874 unsigned short val, val2, val_mask;
875
876 val = (ucontrol->value.integer.value[0] & mask);
877
878 val_mask = mask << shift;
879 if (val)
880 val = max + 1 - val;
881 val = val << shift;
882 if (shift != rshift) {
883 val2 = (ucontrol->value.integer.value[1] & mask);
884 val_mask |= mask << rshift;
885 if (val2)
886 val2 = max + 1 - val2;
887 val |= val2 << rshift;
888 }
889 return snd_soc_update_bits(codec, reg, val_mask, val);
890}
891
892static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200893 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200894{
895 struct soc_mixer_control *mc =
896 (struct soc_mixer_control *)kcontrol->private_value;
897 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
898 unsigned int reg = mc->reg;
899 unsigned int reg2 = mc->rreg;
900 unsigned int shift = mc->shift;
901 int max = mc->max;
902 int mask = (1<<fls(max))-1;
903
904 ucontrol->value.integer.value[0] =
905 (snd_soc_read(codec, reg) >> shift) & mask;
906 ucontrol->value.integer.value[1] =
907 (snd_soc_read(codec, reg2) >> shift) & mask;
908
909 if (ucontrol->value.integer.value[0])
910 ucontrol->value.integer.value[0] =
911 max + 1 - ucontrol->value.integer.value[0];
912 if (ucontrol->value.integer.value[1])
913 ucontrol->value.integer.value[1] =
914 max + 1 - ucontrol->value.integer.value[1];
915
916 return 0;
917}
918
919static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200920 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200921{
922 struct soc_mixer_control *mc =
923 (struct soc_mixer_control *)kcontrol->private_value;
924 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
925 unsigned int reg = mc->reg;
926 unsigned int reg2 = mc->rreg;
927 unsigned int shift = mc->shift;
928 int max = mc->max;
929 int mask = (1 << fls(max)) - 1;
930 int err;
931 unsigned short val, val2, val_mask;
932
933 val_mask = mask << shift;
934 val = (ucontrol->value.integer.value[0] & mask);
935 val2 = (ucontrol->value.integer.value[1] & mask);
936
937 if (val)
938 val = max + 1 - val;
939 if (val2)
940 val2 = max + 1 - val2;
941
942 val = val << shift;
943 val2 = val2 << shift;
944
945 err = snd_soc_update_bits(codec, reg, val_mask, val);
946 if (err < 0)
947 return err;
948
949 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
950 return err;
951}
952
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500953/* Codec operation modes */
954static const char *twl4030_op_modes_texts[] = {
955 "Option 2 (voice/audio)", "Option 1 (audio)"
956};
957
958static const struct soc_enum twl4030_op_modes_enum =
959 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
960 ARRAY_SIZE(twl4030_op_modes_texts),
961 twl4030_op_modes_texts);
962
Mark Brown423c2382009-06-20 13:54:02 +0100963static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500964 struct snd_ctl_elem_value *ucontrol)
965{
966 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900967 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500968
969 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200970 dev_err(codec->dev,
971 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500972 return -EBUSY;
973 }
974
Takashi Iwai6b207c02014-02-18 08:56:39 +0100975 return snd_soc_put_enum_double(kcontrol, ucontrol);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500976}
977
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200978/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200979 * FGAIN volume control:
980 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
981 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200982static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200983
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200984/*
985 * CGAIN volume control:
986 * 0 dB to 12 dB in 6 dB steps
987 * value 2 and 3 means 12 dB
988 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200989static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
990
991/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900992 * Voice Downlink GAIN volume control:
993 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
994 */
995static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
996
997/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200998 * Analog playback gain
999 * -24 dB to 12 dB in 2 dB steps
1000 */
1001static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001002
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001003/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001004 * Gain controls tied to outputs
1005 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1006 */
1007static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1008
1009/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001010 * Gain control for earpiece amplifier
1011 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1012 */
1013static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1014
1015/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001016 * Capture gain after the ADCs
1017 * from 0 dB to 31 dB in 1 dB steps
1018 */
1019static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1020
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001021/*
1022 * Gain control for input amplifiers
1023 * 0 dB to 30 dB in 6 dB steps
1024 */
1025static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1026
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001027/* AVADC clock priority */
1028static const char *twl4030_avadc_clk_priority_texts[] = {
1029 "Voice high priority", "HiFi high priority"
1030};
1031
1032static const struct soc_enum twl4030_avadc_clk_priority_enum =
1033 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1034 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1035 twl4030_avadc_clk_priority_texts);
1036
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001037static const char *twl4030_rampdelay_texts[] = {
1038 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1039 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1040 "3495/2581/1748 ms"
1041};
1042
1043static const struct soc_enum twl4030_rampdelay_enum =
1044 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1045 ARRAY_SIZE(twl4030_rampdelay_texts),
1046 twl4030_rampdelay_texts);
1047
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001048/* Vibra H-bridge direction mode */
1049static const char *twl4030_vibradirmode_texts[] = {
1050 "Vibra H-bridge direction", "Audio data MSB",
1051};
1052
1053static const struct soc_enum twl4030_vibradirmode_enum =
1054 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1055 ARRAY_SIZE(twl4030_vibradirmode_texts),
1056 twl4030_vibradirmode_texts);
1057
1058/* Vibra H-bridge direction */
1059static const char *twl4030_vibradir_texts[] = {
1060 "Positive polarity", "Negative polarity",
1061};
1062
1063static const struct soc_enum twl4030_vibradir_enum =
1064 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1065 ARRAY_SIZE(twl4030_vibradir_texts),
1066 twl4030_vibradir_texts);
1067
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001068/* Digimic Left and right swapping */
1069static const char *twl4030_digimicswap_texts[] = {
1070 "Not swapped", "Swapped",
1071};
1072
1073static const struct soc_enum twl4030_digimicswap_enum =
1074 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1075 ARRAY_SIZE(twl4030_digimicswap_texts),
1076 twl4030_digimicswap_texts);
1077
Steve Sakomancc175572008-10-30 21:35:26 -07001078static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001079 /* Codec operation mode control */
1080 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1081 snd_soc_get_enum_double,
1082 snd_soc_put_twl4030_opmode_enum_double),
1083
Peter Ujfalusid889a722008-12-01 10:03:46 +02001084 /* Common playback gain controls */
1085 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1086 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1087 0, 0x3f, 0, digital_fine_tlv),
1088 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1089 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1090 0, 0x3f, 0, digital_fine_tlv),
1091
1092 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1093 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1094 6, 0x2, 0, digital_coarse_tlv),
1095 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1096 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1097 6, 0x2, 0, digital_coarse_tlv),
1098
1099 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1100 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1101 3, 0x12, 1, analog_tlv),
1102 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1103 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1104 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001105 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1106 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1107 1, 1, 0),
1108 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1109 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1110 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001111
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001112 /* Common voice downlink gain controls */
1113 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1114 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1115
1116 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1117 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1118
1119 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1120 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1121
Peter Ujfalusi42902392008-12-01 10:03:47 +02001122 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001123 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001124 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001125 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1126 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001127
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001128 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1129 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1130 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001131
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001132 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001133 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001134 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1135 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001136
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001137 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1138 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1139 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001140
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001141 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001142 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001143 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1144 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001145 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1146 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1147 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001148
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001149 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001150 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001151
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001152 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1153
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001154 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001155
1156 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1157 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001158
1159 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001160};
1161
Steve Sakomancc175572008-10-30 21:35:26 -07001162static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001163 /* Left channel inputs */
1164 SND_SOC_DAPM_INPUT("MAINMIC"),
1165 SND_SOC_DAPM_INPUT("HSMIC"),
1166 SND_SOC_DAPM_INPUT("AUXL"),
1167 SND_SOC_DAPM_INPUT("CARKITMIC"),
1168 /* Right channel inputs */
1169 SND_SOC_DAPM_INPUT("SUBMIC"),
1170 SND_SOC_DAPM_INPUT("AUXR"),
1171 /* Digital microphones (Stereo) */
1172 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1173 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001174
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001175 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001176 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001177 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1178 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001179 SND_SOC_DAPM_OUTPUT("HSOL"),
1180 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001181 SND_SOC_DAPM_OUTPUT("CARKITL"),
1182 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001183 SND_SOC_DAPM_OUTPUT("HFL"),
1184 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001185 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001186
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001187 /* AIF and APLL clocks for running DAIs (including loopback) */
1188 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1189 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1190 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1191
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001192 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001193 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1194 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1195 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1196 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1197 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001198
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001199 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1200 TWL4030_REG_VOICE_IF, 6, 0),
1201
Peter Ujfalusi73939582009-01-29 14:57:50 +02001202 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001203 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1204 &twl4030_dapm_abypassr1_control),
1205 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1206 &twl4030_dapm_abypassl1_control),
1207 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1208 &twl4030_dapm_abypassr2_control),
1209 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1210 &twl4030_dapm_abypassl2_control),
1211 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1212 &twl4030_dapm_abypassv_control),
1213
1214 /* Master analog loopback switch */
1215 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1216 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001217
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001218 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001219 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1220 &twl4030_dapm_dbypassl_control),
1221 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1222 &twl4030_dapm_dbypassr_control),
1223 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1224 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001225
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001226 /* Digital mixers, power control for the physical DACs */
1227 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1228 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1229 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1230 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1231 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1232 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1233 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1234 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1235 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1236 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1237
1238 /* Analog mixers, power control for the physical PGAs */
1239 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1240 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1241 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1242 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1243 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1244 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1245 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1246 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1247 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1248 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001249
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001250 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1251 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1252
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001253 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1254 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001255
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001256 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001257 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001258 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1259 &twl4030_dapm_earpiece_controls[0],
1260 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001261 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1262 0, 0, NULL, 0, earpiecepga_event,
1263 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001264 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001265 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1266 &twl4030_dapm_predrivel_controls[0],
1267 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001268 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1269 0, 0, NULL, 0, predrivelpga_event,
1270 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001271 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1272 &twl4030_dapm_predriver_controls[0],
1273 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001274 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1275 0, 0, NULL, 0, predriverpga_event,
1276 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001277 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001278 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001279 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001280 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1281 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1282 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001283 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1284 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1285 &twl4030_dapm_hsor_controls[0],
1286 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001287 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1288 0, 0, NULL, 0, headsetrpga_event,
1289 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001290 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001291 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1292 &twl4030_dapm_carkitl_controls[0],
1293 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001294 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1295 0, 0, NULL, 0, carkitlpga_event,
1296 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001297 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1298 &twl4030_dapm_carkitr_controls[0],
1299 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001300 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1301 0, 0, NULL, 0, carkitrpga_event,
1302 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001303
1304 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001305 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001306 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1307 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001308 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001309 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001310 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1311 0, 0, NULL, 0, handsfreelpga_event,
1312 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1313 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1314 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001315 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001316 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001317 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1318 0, 0, NULL, 0, handsfreerpga_event,
1319 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001320 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001321 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1322 &twl4030_dapm_vibra_control, vibramux_event,
1323 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001324 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1325 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001326
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001327 /* Introducing four virtual ADC, since TWL4030 have four channel for
1328 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001329 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1330 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1331 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1332 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001333
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001334 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1335 TWL4030_REG_VOICE_IF, 5, 0),
1336
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001337 /* Analog/Digital mic path selection.
1338 TX1 Left/Right: either analog Left/Right or Digimic0
1339 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001340 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_micpathtx1_control),
1342 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1343 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001344
Joonyoung Shim97b80962009-05-11 20:36:08 +09001345 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001346 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001347 TWL4030_REG_ANAMICL, 4, 0,
1348 &twl4030_dapm_analoglmic_controls[0],
1349 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001350 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001351 TWL4030_REG_ANAMICR, 4, 0,
1352 &twl4030_dapm_analogrmic_controls[0],
1353 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001354
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001355 SND_SOC_DAPM_PGA("ADC Physical Left",
1356 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1357 SND_SOC_DAPM_PGA("ADC Physical Right",
1358 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001359
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001360 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1361 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1362 digimic_event, SND_SOC_DAPM_POST_PMU),
1363 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1364 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1365 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001366
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001367 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1368 NULL, 0),
1369 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1370 NULL, 0),
1371
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001372 /* Microphone bias */
1373 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1374 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1375 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1376 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1377 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1378 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001379
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001380 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001381};
1382
1383static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001384 /* Stream -> DAC mapping */
1385 {"DAC Right1", NULL, "HiFi Playback"},
1386 {"DAC Left1", NULL, "HiFi Playback"},
1387 {"DAC Right2", NULL, "HiFi Playback"},
1388 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001389 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001390
1391 /* ADC -> Stream mapping */
1392 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1393 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1394 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1395 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001396 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1397 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1398 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001399
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001400 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1401 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1402 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1403 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1404 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001405
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001406 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001407 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1408
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001409 {"DAC Left1", NULL, "AIF Enable"},
1410 {"DAC Right1", NULL, "AIF Enable"},
1411 {"DAC Left2", NULL, "AIF Enable"},
1412 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001413 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001414
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001415 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1416 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1417
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001418 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1419 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1420 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1421 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1422 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001423
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001424 /* Internal playback routings */
1425 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001426 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1427 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1428 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1429 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001430 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001431 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001432 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1433 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1434 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1435 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001436 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001437 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001438 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1439 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1440 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1441 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001442 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001443 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001444 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1445 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1446 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001447 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001448 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001449 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1450 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1451 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001452 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001453 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001454 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1455 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1456 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001457 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001458 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001459 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1460 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1461 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001462 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001463 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001464 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1465 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1466 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1467 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001468 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1469 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001470 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001471 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1472 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1473 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1474 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001475 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1476 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001477 /* Vibra */
1478 {"Vibra Mux", "AudioL1", "DAC Left1"},
1479 {"Vibra Mux", "AudioR1", "DAC Right1"},
1480 {"Vibra Mux", "AudioL2", "DAC Left2"},
1481 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001482
Steve Sakomancc175572008-10-30 21:35:26 -07001483 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001484 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001485 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1486 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1487 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1488 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001489 /* Must be always connected (for APLL) */
1490 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1491 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001492 {"EARPIECE", NULL, "Earpiece PGA"},
1493 {"PREDRIVEL", NULL, "PredriveL PGA"},
1494 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001495 {"HSOL", NULL, "HeadsetL PGA"},
1496 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001497 {"CARKITL", NULL, "CarkitL PGA"},
1498 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001499 {"HFL", NULL, "HandsfreeL PGA"},
1500 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001501 {"Vibra Route", "Audio", "Vibra Mux"},
1502 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001503
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001504 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001505 /* Must be always connected (for AIF and APLL) */
1506 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1507 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1508 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1509 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1510 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001511 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1512 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1513 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1514 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001515
Peter Ujfalusi90289352009-08-14 08:44:00 +03001516 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1517 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001518
Peter Ujfalusi90289352009-08-14 08:44:00 +03001519 {"ADC Physical Left", NULL, "Analog Left"},
1520 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001521
1522 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1523 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1524
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001525 {"DIGIMIC0", NULL, "micbias1 select"},
1526 {"DIGIMIC1", NULL, "micbias2 select"},
1527
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001528 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001529 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001530 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1531 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001532 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001533 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1534 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001535 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001536 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1537 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001538 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001539 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1540
1541 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1542 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1543 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1544 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1545
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001546 {"ADC Virtual Left1", NULL, "AIF Enable"},
1547 {"ADC Virtual Right1", NULL, "AIF Enable"},
1548 {"ADC Virtual Left2", NULL, "AIF Enable"},
1549 {"ADC Virtual Right2", NULL, "AIF Enable"},
1550
Peter Ujfalusi73939582009-01-29 14:57:50 +02001551 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001552 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1553 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1554 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1555 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1556 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001557
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001558 /* Supply for the Analog loopbacks */
1559 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1560 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1561 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1562 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1563 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1564
Peter Ujfalusi73939582009-01-29 14:57:50 +02001565 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1566 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1567 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1568 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001569 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001570
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001571 /* Digital bypass routes */
1572 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1573 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001574 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001575
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001576 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1577 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1578 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001579
Steve Sakomancc175572008-10-30 21:35:26 -07001580};
1581
Steve Sakomancc175572008-10-30 21:35:26 -07001582static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1583 enum snd_soc_bias_level level)
1584{
1585 switch (level) {
1586 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001587 break;
1588 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001589 break;
1590 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001591 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001592 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001593 break;
1594 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001595 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001596 break;
1597 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001598 codec->dapm.bias_level = level;
Steve Sakomancc175572008-10-30 21:35:26 -07001599
1600 return 0;
1601}
1602
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001603static void twl4030_constraints(struct twl4030_priv *twl4030,
1604 struct snd_pcm_substream *mst_substream)
1605{
1606 struct snd_pcm_substream *slv_substream;
1607
1608 /* Pick the stream, which need to be constrained */
1609 if (mst_substream == twl4030->master_substream)
1610 slv_substream = twl4030->slave_substream;
1611 else if (mst_substream == twl4030->slave_substream)
1612 slv_substream = twl4030->master_substream;
1613 else /* This should not happen.. */
1614 return;
1615
1616 /* Set the constraints according to the already configured stream */
1617 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1618 SNDRV_PCM_HW_PARAM_RATE,
1619 twl4030->rate,
1620 twl4030->rate);
1621
1622 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1623 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1624 twl4030->sample_bits,
1625 twl4030->sample_bits);
1626
1627 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1628 SNDRV_PCM_HW_PARAM_CHANNELS,
1629 twl4030->channels,
1630 twl4030->channels);
1631}
1632
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001633/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1634 * capture has to be enabled/disabled. */
1635static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001636 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001637{
1638 u8 reg, mask;
1639
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001640 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001641
1642 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1643 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1644 else
1645 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1646
1647 if (enable)
1648 reg |= mask;
1649 else
1650 reg &= ~mask;
1651
1652 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1653}
1654
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001655static int twl4030_startup(struct snd_pcm_substream *substream,
1656 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001657{
Mark Browne6968a12012-04-04 15:58:16 +01001658 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001659 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001660
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001661 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001662 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001663 /* The DAI has one configuration for playback and capture, so
1664 * if the DAI has been already configured then constrain this
1665 * substream to match it. */
1666 if (twl4030->configured)
1667 twl4030_constraints(twl4030, twl4030->master_substream);
1668 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001669 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001670 TWL4030_OPTION_1)) {
1671 /* In option2 4 channel is not supported, set the
1672 * constraint for the first stream for channels, the
1673 * second stream will 'inherit' this cosntraint */
1674 snd_pcm_hw_constraint_minmax(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001675 SNDRV_PCM_HW_PARAM_CHANNELS,
1676 2, 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001677 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001678 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001679 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001680
1681 return 0;
1682}
1683
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001684static void twl4030_shutdown(struct snd_pcm_substream *substream,
1685 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001686{
Mark Browne6968a12012-04-04 15:58:16 +01001687 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001688 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001689
1690 if (twl4030->master_substream == substream)
1691 twl4030->master_substream = twl4030->slave_substream;
1692
1693 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001694
1695 /* If all streams are closed, or the remaining stream has not yet
1696 * been configured than set the DAI as not configured. */
1697 if (!twl4030->master_substream)
1698 twl4030->configured = 0;
1699 else if (!twl4030->master_substream->runtime->channels)
1700 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001701
1702 /* If the closing substream had 4 channel, do the necessary cleanup */
1703 if (substream->runtime->channels == 4)
1704 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001705}
1706
Steve Sakomancc175572008-10-30 21:35:26 -07001707static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001708 struct snd_pcm_hw_params *params,
1709 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001710{
Mark Browne6968a12012-04-04 15:58:16 +01001711 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001712 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001713 u8 mode, old_mode, format, old_format;
1714
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001715 /* If the substream has 4 channel, do the necessary setup */
1716 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001717 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1718 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001719
1720 /* Safety check: are we in the correct operating mode and
1721 * the interface is in TDM mode? */
1722 if ((mode & TWL4030_OPTION_1) &&
1723 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001724 twl4030_tdm_enable(codec, substream->stream, 1);
1725 else
1726 return -EINVAL;
1727 }
1728
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001729 if (twl4030->configured)
1730 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001731 return 0;
1732
Steve Sakomancc175572008-10-30 21:35:26 -07001733 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001734 old_mode = twl4030_read(codec,
1735 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001736 mode = old_mode & ~TWL4030_APLL_RATE;
1737
1738 switch (params_rate(params)) {
1739 case 8000:
1740 mode |= TWL4030_APLL_RATE_8000;
1741 break;
1742 case 11025:
1743 mode |= TWL4030_APLL_RATE_11025;
1744 break;
1745 case 12000:
1746 mode |= TWL4030_APLL_RATE_12000;
1747 break;
1748 case 16000:
1749 mode |= TWL4030_APLL_RATE_16000;
1750 break;
1751 case 22050:
1752 mode |= TWL4030_APLL_RATE_22050;
1753 break;
1754 case 24000:
1755 mode |= TWL4030_APLL_RATE_24000;
1756 break;
1757 case 32000:
1758 mode |= TWL4030_APLL_RATE_32000;
1759 break;
1760 case 44100:
1761 mode |= TWL4030_APLL_RATE_44100;
1762 break;
1763 case 48000:
1764 mode |= TWL4030_APLL_RATE_48000;
1765 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001766 case 96000:
1767 mode |= TWL4030_APLL_RATE_96000;
1768 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001769 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001770 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001771 params_rate(params));
1772 return -EINVAL;
1773 }
1774
Steve Sakomancc175572008-10-30 21:35:26 -07001775 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001776 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001777 format = old_format;
1778 format &= ~TWL4030_DATA_WIDTH;
1779 switch (params_format(params)) {
1780 case SNDRV_PCM_FORMAT_S16_LE:
1781 format |= TWL4030_DATA_WIDTH_16S_16W;
1782 break;
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02001783 case SNDRV_PCM_FORMAT_S32_LE:
Steve Sakomancc175572008-10-30 21:35:26 -07001784 format |= TWL4030_DATA_WIDTH_32S_24W;
1785 break;
1786 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001787 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001788 params_format(params));
1789 return -EINVAL;
1790 }
1791
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001792 if (format != old_format || mode != old_mode) {
1793 if (twl4030->codec_powered) {
1794 /*
1795 * If the codec is powered, than we need to toggle the
1796 * codec power.
1797 */
1798 twl4030_codec_enable(codec, 0);
1799 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1800 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1801 twl4030_codec_enable(codec, 1);
1802 } else {
1803 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1804 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1805 }
Steve Sakomancc175572008-10-30 21:35:26 -07001806 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001807
1808 /* Store the important parameters for the DAI configuration and set
1809 * the DAI as configured */
1810 twl4030->configured = 1;
1811 twl4030->rate = params_rate(params);
1812 twl4030->sample_bits = hw_param_interval(params,
1813 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1814 twl4030->channels = params_channels(params);
1815
1816 /* If both playback and capture streams are open, and one of them
1817 * is setting the hw parameters right now (since we are here), set
1818 * constraints to the other stream to match the current one. */
1819 if (twl4030->slave_substream)
1820 twl4030_constraints(twl4030, substream);
1821
Steve Sakomancc175572008-10-30 21:35:26 -07001822 return 0;
1823}
1824
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001825static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1826 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001827{
1828 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001829 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001830
1831 switch (freq) {
1832 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001833 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001834 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001835 break;
1836 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001837 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001838 return -EINVAL;
1839 }
1840
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001841 if ((freq / 1000) != twl4030->sysclk) {
1842 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001843 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001844 freq, twl4030->sysclk * 1000);
1845 return -EINVAL;
1846 }
Steve Sakomancc175572008-10-30 21:35:26 -07001847
1848 return 0;
1849}
1850
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001851static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001852{
1853 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001854 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001855 u8 old_format, format;
1856
1857 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001858 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001859 format = old_format;
1860
1861 /* set master/slave audio interface */
1862 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1863 case SND_SOC_DAIFMT_CBM_CFM:
1864 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001865 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001866 break;
1867 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001868 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001869 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001870 break;
1871 default:
1872 return -EINVAL;
1873 }
1874
1875 /* interface format */
1876 format &= ~TWL4030_AIF_FORMAT;
1877 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1878 case SND_SOC_DAIFMT_I2S:
1879 format |= TWL4030_AIF_FORMAT_CODEC;
1880 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001881 case SND_SOC_DAIFMT_DSP_A:
1882 format |= TWL4030_AIF_FORMAT_TDM;
1883 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001884 default:
1885 return -EINVAL;
1886 }
1887
1888 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001889 if (twl4030->codec_powered) {
1890 /*
1891 * If the codec is powered, than we need to toggle the
1892 * codec power.
1893 */
1894 twl4030_codec_enable(codec, 0);
1895 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1896 twl4030_codec_enable(codec, 1);
1897 } else {
1898 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1899 }
Steve Sakomancc175572008-10-30 21:35:26 -07001900 }
1901
1902 return 0;
1903}
1904
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001905static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1906{
1907 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001908 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001909
1910 if (tristate)
1911 reg |= TWL4030_AIF_TRI_EN;
1912 else
1913 reg &= ~TWL4030_AIF_TRI_EN;
1914
1915 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1916}
1917
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001918/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1919 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1920static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001921 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001922{
1923 u8 reg, mask;
1924
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001925 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001926
1927 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1928 mask = TWL4030_ARXL1_VRX_EN;
1929 else
1930 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1931
1932 if (enable)
1933 reg |= mask;
1934 else
1935 reg &= ~mask;
1936
1937 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1938}
1939
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001940static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001941 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001942{
Mark Browne6968a12012-04-04 15:58:16 +01001943 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001944 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001945 u8 mode;
1946
1947 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001948 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001949 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001950 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001951 dev_err(codec->dev,
1952 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1953 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001954 return -EINVAL;
1955 }
1956
1957 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001958 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001959 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001960 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001961 & TWL4030_OPT_MODE;
1962
1963 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001964 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1965 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001966 return -EINVAL;
1967 }
1968
1969 return 0;
1970}
1971
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001972static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001973 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001974{
Mark Browne6968a12012-04-04 15:58:16 +01001975 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001976
1977 /* Enable voice digital filters */
1978 twl4030_voice_enable(codec, substream->stream, 0);
1979}
1980
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001981static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001982 struct snd_pcm_hw_params *params,
1983 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001984{
Mark Browne6968a12012-04-04 15:58:16 +01001985 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001986 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001987 u8 old_mode, mode;
1988
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001989 /* Enable voice digital filters */
1990 twl4030_voice_enable(codec, substream->stream, 1);
1991
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001992 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001993 old_mode = twl4030_read(codec,
1994 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001995 mode = old_mode;
1996
1997 switch (params_rate(params)) {
1998 case 8000:
1999 mode &= ~(TWL4030_SEL_16K);
2000 break;
2001 case 16000:
2002 mode |= TWL4030_SEL_16K;
2003 break;
2004 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002005 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002006 params_rate(params));
2007 return -EINVAL;
2008 }
2009
2010 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002011 if (twl4030->codec_powered) {
2012 /*
2013 * If the codec is powered, than we need to toggle the
2014 * codec power.
2015 */
2016 twl4030_codec_enable(codec, 0);
2017 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2018 twl4030_codec_enable(codec, 1);
2019 } else {
2020 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2021 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002022 }
2023
2024 return 0;
2025}
2026
2027static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002028 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002029{
2030 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002031 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002032
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002033 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002034 dev_err(codec->dev,
2035 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2036 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002037 return -EINVAL;
2038 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002039 if ((freq / 1000) != twl4030->sysclk) {
2040 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002041 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002042 freq, twl4030->sysclk * 1000);
2043 return -EINVAL;
2044 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002045 return 0;
2046}
2047
2048static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002049 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002050{
2051 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002052 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002053 u8 old_format, format;
2054
2055 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002056 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002057 format = old_format;
2058
2059 /* set master/slave audio interface */
2060 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002061 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002062 format &= ~(TWL4030_VIF_SLAVE_EN);
2063 break;
2064 case SND_SOC_DAIFMT_CBS_CFS:
2065 format |= TWL4030_VIF_SLAVE_EN;
2066 break;
2067 default:
2068 return -EINVAL;
2069 }
2070
2071 /* clock inversion */
2072 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2073 case SND_SOC_DAIFMT_IB_NF:
2074 format &= ~(TWL4030_VIF_FORMAT);
2075 break;
2076 case SND_SOC_DAIFMT_NB_IF:
2077 format |= TWL4030_VIF_FORMAT;
2078 break;
2079 default:
2080 return -EINVAL;
2081 }
2082
2083 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002084 if (twl4030->codec_powered) {
2085 /*
2086 * If the codec is powered, than we need to toggle the
2087 * codec power.
2088 */
2089 twl4030_codec_enable(codec, 0);
2090 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2091 twl4030_codec_enable(codec, 1);
2092 } else {
2093 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2094 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002095 }
2096
2097 return 0;
2098}
2099
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002100static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2101{
2102 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002103 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002104
2105 if (tristate)
2106 reg |= TWL4030_VIF_TRI_EN;
2107 else
2108 reg &= ~TWL4030_VIF_TRI_EN;
2109
2110 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2111}
2112
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002113#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002114#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002115
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002116static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002117 .startup = twl4030_startup,
2118 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002119 .hw_params = twl4030_hw_params,
2120 .set_sysclk = twl4030_set_dai_sysclk,
2121 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002122 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002123};
2124
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002125static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002126 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002127 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002128 .hw_params = twl4030_voice_hw_params,
2129 .set_sysclk = twl4030_voice_set_dai_sysclk,
2130 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002131 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002132};
2133
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002134static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002135{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002136 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002137 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002138 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002139 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002140 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002141 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002142 .formats = TWL4030_FORMATS,
2143 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002144 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002145 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002146 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002147 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002148 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002149 .formats = TWL4030_FORMATS,
2150 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002151 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002152},
2153{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002154 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002155 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002156 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002157 .channels_min = 1,
2158 .channels_max = 1,
2159 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2160 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2161 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002162 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002163 .channels_min = 1,
2164 .channels_max = 2,
2165 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2166 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2167 .ops = &twl4030_dai_voice_ops,
2168},
Steve Sakomancc175572008-10-30 21:35:26 -07002169};
Steve Sakomancc175572008-10-30 21:35:26 -07002170
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002171static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002172{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002173 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002174
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002175 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2176 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002177 if (twl4030 == NULL) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002178 dev_err(codec->dev, "Can not allocate memory\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002179 return -ENOMEM;
Steve Sakomancc175572008-10-30 21:35:26 -07002180 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002181 snd_soc_codec_set_drvdata(codec, twl4030);
2182 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002183 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002184
2185 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002186
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002187 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002188}
2189
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002190static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002191{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002192 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002193 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002194
Peter Ujfalusi73939582009-01-29 14:57:50 +02002195 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002196
2197 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2198 gpio_free(pdata->hs_extmute_gpio);
2199
Steve Sakomancc175572008-10-30 21:35:26 -07002200 return 0;
2201}
2202
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002203static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2204 .probe = twl4030_soc_probe,
2205 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002206 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002207 .write = twl4030_write,
2208 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002209 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002210
2211 .controls = twl4030_snd_controls,
2212 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2213 .dapm_widgets = twl4030_dapm_widgets,
2214 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2215 .dapm_routes = intercon,
2216 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002217};
2218
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002219static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002220{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002221 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002222 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002223}
2224
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002225static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002226{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002227 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002228 return 0;
2229}
2230
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002231MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002232
2233static struct platform_driver twl4030_codec_driver = {
2234 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002235 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002236 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002237 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002238 .owner = THIS_MODULE,
2239 },
Steve Sakomancc175572008-10-30 21:35:26 -07002240};
Steve Sakomancc175572008-10-30 21:35:26 -07002241
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002242module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002243
Steve Sakomancc175572008-10-30 21:35:26 -07002244MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2245MODULE_AUTHOR("Steve Sakoman");
2246MODULE_LICENSE("GPL");