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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
sewardj2019a972011-03-07 16:04:07 +000037#include "libvex.h" /* needed for bb_to_IR.h */
florian933065d2011-07-11 01:48:02 +000038#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000039#include "main_util.h" /* vassert */
40#include "main_globals.h" /* vex_traceflags */
41#include "guest_generic_bb_to_IR.h" /* DisResult */
42#include "guest_s390_defs.h" /* prototypes for this file's functions */
43#include "host_s390_disasm.h"
44#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
45
sewardj2019a972011-03-07 16:04:07 +000046
47/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000048/*--- Forward declarations ---*/
49/*------------------------------------------------------------*/
50static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
florianb0bf6602012-05-05 00:01:16 +000051static void s390_irgen_xonc(IROp, IRTemp, IRTemp, IRTemp);
florian79e839e2012-05-05 02:20:30 +000052static void s390_irgen_CLC_EX(IRTemp, IRTemp, IRTemp);
florianb4df7682011-07-05 02:09:01 +000053
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
florian428dfdd2012-03-27 03:09:49 +000088
sewardj2019a972011-03-07 16:04:07 +000089/*------------------------------------------------------------*/
90/*--- Helpers for constructing IR. ---*/
91/*------------------------------------------------------------*/
92
93/* Sign extend a value with the given number of bits. This is a
94 macro because it allows us to overload the type of the value.
95 Note that VALUE must have a signed type! */
96#undef sign_extend
97#define sign_extend(value,num_bits) \
98(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
99 (sizeof(__typeof__(value)) * 8 - (num_bits)))
100
101
102/* Add a statement to the current irsb. */
103static __inline__ void
104stmt(IRStmt *st)
105{
106 addStmtToIRSB(irsb, st);
107}
108
109/* Allocate a new temporary of the given type. */
110static __inline__ IRTemp
111newTemp(IRType type)
112{
113 vassert(isPlausibleIRType(type));
114
115 return newIRTemp(irsb->tyenv, type);
116}
117
118/* Create an expression node for a temporary */
119static __inline__ IRExpr *
120mkexpr(IRTemp tmp)
121{
122 return IRExpr_RdTmp(tmp);
123}
124
florian8844a632012-04-13 04:04:06 +0000125/* Generate an expression node for an address. */
126static __inline__ IRExpr *
127mkaddr_expr(Addr64 addr)
128{
129 return IRExpr_Const(IRConst_U64(addr));
130}
131
sewardj2019a972011-03-07 16:04:07 +0000132/* Add a statement that assigns to a temporary */
133static __inline__ void
134assign(IRTemp dst, IRExpr *expr)
135{
136 stmt(IRStmt_WrTmp(dst, expr));
137}
138
florian8844a632012-04-13 04:04:06 +0000139/* Write an address into the guest_IA */
140static __inline__ void
141put_IA(IRExpr *address)
142{
143 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IA), address));
144}
145
146/* Add a dummy put to the guest_IA to satisfy an assert in bb_to_IR
147 that wants the last statement in an IRSB to be a put to the guest_IA.
148 Mostly used for insns that use the "counter" pseudo guest reg. */
149static __inline__ void
150dummy_put_IA(void)
151{
152 put_IA(IRExpr_Get(S390X_GUEST_OFFSET(guest_IA), Ity_I64));
153}
154
sewardj2019a972011-03-07 16:04:07 +0000155/* Create a temporary of the given type and assign the expression to it */
156static __inline__ IRTemp
157mktemp(IRType type, IRExpr *expr)
158{
159 IRTemp temp = newTemp(type);
160
161 assign(temp, expr);
162
163 return temp;
164}
165
166/* Create a unary expression */
167static __inline__ IRExpr *
168unop(IROp kind, IRExpr *op)
169{
170 return IRExpr_Unop(kind, op);
171}
172
173/* Create a binary expression */
174static __inline__ IRExpr *
175binop(IROp kind, IRExpr *op1, IRExpr *op2)
176{
177 return IRExpr_Binop(kind, op1, op2);
178}
179
180/* Create a ternary expression */
181static __inline__ IRExpr *
182triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
183{
184 return IRExpr_Triop(kind, op1, op2, op3);
185}
186
187/* Create a quaternary expression */
188static __inline__ IRExpr *
189qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
190{
191 return IRExpr_Qop(kind, op1, op2, op3, op4);
192}
193
194/* Create an expression node for an 8-bit integer constant */
195static __inline__ IRExpr *
196mkU8(UInt value)
197{
198 vassert(value < 256);
199
200 return IRExpr_Const(IRConst_U8((UChar)value));
201}
202
203/* Create an expression node for a 16-bit integer constant */
204static __inline__ IRExpr *
205mkU16(UInt value)
206{
207 vassert(value < 65536);
208
209 return IRExpr_Const(IRConst_U16((UShort)value));
210}
211
212/* Create an expression node for a 32-bit integer constant */
213static __inline__ IRExpr *
214mkU32(UInt value)
215{
216 return IRExpr_Const(IRConst_U32(value));
217}
218
219/* Create an expression node for a 64-bit integer constant */
220static __inline__ IRExpr *
221mkU64(ULong value)
222{
223 return IRExpr_Const(IRConst_U64(value));
224}
225
226/* Create an expression node for a 32-bit floating point constant
227 whose value is given by a bit pattern. */
228static __inline__ IRExpr *
229mkF32i(UInt value)
230{
231 return IRExpr_Const(IRConst_F32i(value));
232}
233
234/* Create an expression node for a 32-bit floating point constant
235 whose value is given by a bit pattern. */
236static __inline__ IRExpr *
237mkF64i(ULong value)
238{
239 return IRExpr_Const(IRConst_F64i(value));
240}
241
242/* Little helper function for my sanity. ITE = if-then-else */
243static IRExpr *
244mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
245{
246 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
247
248 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
249}
250
251/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
252static void __inline__
253store(IRExpr *addr, IRExpr *data)
254{
255 stmt(IRStmt_Store(Iend_BE, addr, data));
256}
257
258/* Create an expression that loads a TYPE sized value from ADDR.
259 This is a big-endian machine. */
260static __inline__ IRExpr *
261load(IRType type, IRExpr *addr)
262{
263 return IRExpr_Load(Iend_BE, type, addr);
264}
265
266/* Function call */
267static void
268call_function(IRExpr *callee_address)
269{
florian8844a632012-04-13 04:04:06 +0000270 put_IA(callee_address);
sewardj2019a972011-03-07 16:04:07 +0000271
florian8844a632012-04-13 04:04:06 +0000272 dis_res->whatNext = Dis_StopHere;
273 dis_res->jk_StopHere = Ijk_Call;
sewardj2019a972011-03-07 16:04:07 +0000274}
275
floriana64c2432011-07-16 02:11:50 +0000276/* Function call with known target. */
277static void
278call_function_and_chase(Addr64 callee_address)
279{
280 if (resteer_fn(resteer_data, callee_address)) {
281 dis_res->whatNext = Dis_ResteerU;
282 dis_res->continueAt = callee_address;
283 } else {
florian8844a632012-04-13 04:04:06 +0000284 put_IA(mkaddr_expr(callee_address));
285
floriana64c2432011-07-16 02:11:50 +0000286 dis_res->whatNext = Dis_StopHere;
florian8844a632012-04-13 04:04:06 +0000287 dis_res->jk_StopHere = Ijk_Call;
floriana64c2432011-07-16 02:11:50 +0000288 }
289}
290
sewardj2019a972011-03-07 16:04:07 +0000291/* Function return sequence */
292static void
293return_from_function(IRExpr *return_address)
294{
florian8844a632012-04-13 04:04:06 +0000295 put_IA(return_address);
sewardj2019a972011-03-07 16:04:07 +0000296
florian8844a632012-04-13 04:04:06 +0000297 dis_res->whatNext = Dis_StopHere;
298 dis_res->jk_StopHere = Ijk_Ret;
sewardj2019a972011-03-07 16:04:07 +0000299}
300
301/* A conditional branch whose target is not known at instrumentation time.
302
303 if (condition) goto computed_target;
304
305 Needs to be represented as:
306
307 if (! condition) goto next_instruction;
308 goto computed_target;
309
310 This inversion is being handled at code generation time. So we just
311 take the condition here as is.
312*/
313static void
314if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
315{
316 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
317
florian8844a632012-04-13 04:04:06 +0000318 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr),
319 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +0000320
florian8844a632012-04-13 04:04:06 +0000321 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000322
florian8844a632012-04-13 04:04:06 +0000323 dis_res->whatNext = Dis_StopHere;
324 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000325}
326
327/* A conditional branch whose target is known at instrumentation time. */
328static void
329if_condition_goto(IRExpr *condition, Addr64 target)
330{
331 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
332
florian8844a632012-04-13 04:04:06 +0000333 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target),
334 S390X_GUEST_OFFSET(guest_IA)));
335
florian7346c7a2012-04-13 21:14:24 +0000336 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +0000337
338 dis_res->whatNext = Dis_StopHere;
339 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000340}
341
342/* An unconditional branch. Target may or may not be known at instrumentation
343 time. */
344static void
345always_goto(IRExpr *target)
346{
florian8844a632012-04-13 04:04:06 +0000347 put_IA(target);
sewardj2019a972011-03-07 16:04:07 +0000348
florian8844a632012-04-13 04:04:06 +0000349 dis_res->whatNext = Dis_StopHere;
350 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +0000351}
352
florian8844a632012-04-13 04:04:06 +0000353
floriana64c2432011-07-16 02:11:50 +0000354/* An unconditional branch to a known target. */
355static void
356always_goto_and_chase(Addr64 target)
357{
358 if (resteer_fn(resteer_data, target)) {
florian8844a632012-04-13 04:04:06 +0000359 /* Follow into the target */
floriana64c2432011-07-16 02:11:50 +0000360 dis_res->whatNext = Dis_ResteerU;
361 dis_res->continueAt = target;
362 } else {
florian8844a632012-04-13 04:04:06 +0000363 put_IA(mkaddr_expr(target));
364
365 dis_res->whatNext = Dis_StopHere;
366 dis_res->jk_StopHere = Ijk_Boring;
floriana64c2432011-07-16 02:11:50 +0000367 }
368}
369
sewardj2019a972011-03-07 16:04:07 +0000370/* A system call */
371static void
372system_call(IRExpr *sysno)
373{
374 /* Store the system call number in the pseudo register. */
florian428dfdd2012-03-27 03:09:49 +0000375 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_SYSNO), sysno));
sewardj2019a972011-03-07 16:04:07 +0000376
sewardj69007022011-04-28 20:13:45 +0000377 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
florian428dfdd2012-03-27 03:09:49 +0000378 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_IP_AT_SYSCALL),
379 mkU64(guest_IA_curr_instr)));
sewardj2019a972011-03-07 16:04:07 +0000380
florian8844a632012-04-13 04:04:06 +0000381 put_IA(mkaddr_expr(guest_IA_next_instr));
382
sewardj2019a972011-03-07 16:04:07 +0000383 /* It's important that all ArchRegs carry their up-to-date value
384 at this point. So we declare an end-of-block here, which
385 forces any TempRegs caching ArchRegs to be flushed. */
florian8844a632012-04-13 04:04:06 +0000386 dis_res->whatNext = Dis_StopHere;
387 dis_res->jk_StopHere = Ijk_Sys_syscall;
sewardj2019a972011-03-07 16:04:07 +0000388}
389
390/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
391 instructions to VEX's IRRoundingMode. */
392static IRRoundingMode
393encode_rounding_mode(UChar mode)
394{
395 switch (mode) {
396 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
397 case S390_ROUND_ZERO: return Irrm_ZERO;
398 case S390_ROUND_POSINF: return Irrm_PosINF;
399 case S390_ROUND_NEGINF: return Irrm_NegINF;
400 }
401 vpanic("encode_rounding_mode");
402}
403
404static __inline__ IRExpr *get_fpr_dw0(UInt);
405static __inline__ void put_fpr_dw0(UInt, IRExpr *);
406
407/* Read a floating point register pair and combine their contents into a
408 128-bit value */
409static IRExpr *
410get_fpr_pair(UInt archreg)
411{
412 IRExpr *high = get_fpr_dw0(archreg);
413 IRExpr *low = get_fpr_dw0(archreg + 2);
414
415 return binop(Iop_F64HLtoF128, high, low);
416}
417
418/* Write a 128-bit floating point value into a register pair. */
419static void
420put_fpr_pair(UInt archreg, IRExpr *expr)
421{
422 IRExpr *high = unop(Iop_F128HItoF64, expr);
423 IRExpr *low = unop(Iop_F128LOtoF64, expr);
424
425 put_fpr_dw0(archreg, high);
426 put_fpr_dw0(archreg + 2, low);
427}
428
429
sewardj2019a972011-03-07 16:04:07 +0000430/*------------------------------------------------------------*/
431/*--- Build the flags thunk. ---*/
432/*------------------------------------------------------------*/
433
434/* Completely fill the flags thunk. We're always filling all fields.
435 Apparently, that is better for redundant PUT elimination. */
436static void
437s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
438{
439 UInt op_off, dep1_off, dep2_off, ndep_off;
440
florian428dfdd2012-03-27 03:09:49 +0000441 op_off = S390X_GUEST_OFFSET(guest_CC_OP);
442 dep1_off = S390X_GUEST_OFFSET(guest_CC_DEP1);
443 dep2_off = S390X_GUEST_OFFSET(guest_CC_DEP2);
444 ndep_off = S390X_GUEST_OFFSET(guest_CC_NDEP);
sewardj2019a972011-03-07 16:04:07 +0000445
446 stmt(IRStmt_Put(op_off, op));
447 stmt(IRStmt_Put(dep1_off, dep1));
448 stmt(IRStmt_Put(dep2_off, dep2));
449 stmt(IRStmt_Put(ndep_off, ndep));
450}
451
452
453/* Create an expression for V and widen the result to 64 bit. */
454static IRExpr *
455s390_cc_widen(IRTemp v, Bool sign_extend)
456{
457 IRExpr *expr;
458
459 expr = mkexpr(v);
460
461 switch (typeOfIRTemp(irsb->tyenv, v)) {
462 case Ity_I64:
463 break;
464 case Ity_I32:
465 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
466 break;
467 case Ity_I16:
468 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
469 break;
470 case Ity_I8:
471 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
472 break;
473 default:
474 vpanic("s390_cc_widen");
475 }
476
477 return expr;
478}
479
480static void
481s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
482{
483 IRExpr *op, *dep1, *dep2, *ndep;
484
485 op = mkU64(opc);
486 dep1 = s390_cc_widen(d1, sign_extend);
487 dep2 = mkU64(0);
488 ndep = mkU64(0);
489
490 s390_cc_thunk_fill(op, dep1, dep2, ndep);
491}
492
493
494static void
495s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
496{
497 IRExpr *op, *dep1, *dep2, *ndep;
498
499 op = mkU64(opc);
500 dep1 = s390_cc_widen(d1, sign_extend);
501 dep2 = s390_cc_widen(d2, sign_extend);
502 ndep = mkU64(0);
503
504 s390_cc_thunk_fill(op, dep1, dep2, ndep);
505}
506
507
508/* memcheck believes that the NDEP field in the flags thunk is always
509 defined. But for some flag computations (e.g. add with carry) that is
510 just not true. We therefore need to convey to memcheck that the value
511 of the ndep field does matter and therefore we make the DEP2 field
512 depend on it:
513
514 DEP2 = original_DEP2 ^ NDEP
515
516 In s390_calculate_cc we exploit that (a^b)^b == a
517 I.e. we xor the DEP2 value with the NDEP value to recover the
518 original_DEP2 value. */
519static void
520s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
521{
522 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
523
524 op = mkU64(opc);
525 dep1 = s390_cc_widen(d1, sign_extend);
526 dep2 = s390_cc_widen(d2, sign_extend);
527 ndep = s390_cc_widen(nd, sign_extend);
528
529 dep2x = binop(Iop_Xor64, dep2, ndep);
530
531 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
532}
533
534
535/* Write one floating point value into the flags thunk */
536static void
537s390_cc_thunk_put1f(UInt opc, IRTemp d1)
538{
539 IRExpr *op, *dep1, *dep2, *ndep;
540
541 op = mkU64(opc);
542 dep1 = mkexpr(d1);
543 dep2 = mkU64(0);
544 ndep = mkU64(0);
545
546 s390_cc_thunk_fill(op, dep1, dep2, ndep);
547}
548
549
550/* Write a floating point value and an integer into the flags thunk. The
551 integer value is zero-extended first. */
552static void
553s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
554{
555 IRExpr *op, *dep1, *dep2, *ndep;
556
557 op = mkU64(opc);
558 dep1 = mkexpr(d1);
559 dep2 = s390_cc_widen(d2, False);
560 ndep = mkU64(0);
561
562 s390_cc_thunk_fill(op, dep1, dep2, ndep);
563}
564
565
566/* Write a 128-bit floating point value into the flags thunk. This is
567 done by splitting the value into two 64-bits values. */
568static void
569s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
570{
571 IRExpr *op, *hi, *lo, *ndep;
572
573 op = mkU64(opc);
574 hi = unop(Iop_F128HItoF64, mkexpr(d1));
575 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
576 ndep = mkU64(0);
577
578 s390_cc_thunk_fill(op, hi, lo, ndep);
579}
580
581
582/* Write a 128-bit floating point value and an integer into the flags thunk.
583 The integer value is zero-extended first. */
584static void
585s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
586{
587 IRExpr *op, *hi, *lo, *lox, *ndep;
588
589 op = mkU64(opc);
590 hi = unop(Iop_F128HItoF64, mkexpr(d1));
591 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
592 ndep = s390_cc_widen(nd, False);
593
594 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
595
596 s390_cc_thunk_fill(op, hi, lox, ndep);
597}
598
599
600static void
601s390_cc_set(UInt val)
602{
603 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
604 mkU64(val), mkU64(0), mkU64(0));
605}
606
607/* Build IR to calculate the condition code from flags thunk.
608 Returns an expression of type Ity_I32 */
609static IRExpr *
610s390_call_calculate_cc(void)
611{
612 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
613
florian428dfdd2012-03-27 03:09:49 +0000614 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
615 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
616 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
617 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000618
619 args = mkIRExprVec_4(op, dep1, dep2, ndep);
620 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
621 "s390_calculate_cc", &s390_calculate_cc, args);
622
623 /* Exclude OP and NDEP from definedness checking. We're only
624 interested in DEP1 and DEP2. */
625 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
626
627 return call;
628}
629
630/* Build IR to calculate the internal condition code for a "compare and branch"
631 insn. Returns an expression of type Ity_I32 */
632static IRExpr *
633s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
634{
635 IRExpr **args, *call, *op, *dep1, *dep2;
636
637 op = mkU64(opc);
638 dep1 = s390_cc_widen(op1, sign_extend);
639 dep2 = s390_cc_widen(op2, sign_extend);
640
641 args = mkIRExprVec_3(op, dep1, dep2);
642 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
643 "s390_calculate_icc", &s390_calculate_icc, args);
644
645 /* Exclude OP from definedness checking. We're only
646 interested in DEP1 and DEP2. */
647 call->Iex.CCall.cee->mcx_mask = (1<<0);
648
649 return call;
650}
651
652/* Build IR to calculate the condition code from flags thunk.
653 Returns an expression of type Ity_I32 */
654static IRExpr *
655s390_call_calculate_cond(UInt m)
656{
657 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
658
659 mask = mkU64(m);
florian428dfdd2012-03-27 03:09:49 +0000660 op = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_OP), Ity_I64);
661 dep1 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP1), Ity_I64);
662 dep2 = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_DEP2), Ity_I64);
663 ndep = IRExpr_Get(S390X_GUEST_OFFSET(guest_CC_NDEP), Ity_I64);
sewardj2019a972011-03-07 16:04:07 +0000664
665 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
666 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
667 "s390_calculate_cond", &s390_calculate_cond, args);
668
669 /* Exclude the requested condition, OP and NDEP from definedness
670 checking. We're only interested in DEP1 and DEP2. */
671 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
672
673 return call;
674}
675
676#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
677#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
678#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
679#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
680#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
681#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
682#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
683 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
684#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
685 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
686#define s390_call_calculate_iccZZ(op,dep1,dep2) \
687 s390_call_calculate_icc(op,dep1,dep2,False)
688#define s390_call_calculate_iccSS(op,dep1,dep2) \
689 s390_call_calculate_icc(op,dep1,dep2,True)
690
691
sewardj2019a972011-03-07 16:04:07 +0000692
693
694/*------------------------------------------------------------*/
695/*--- Guest register access ---*/
696/*------------------------------------------------------------*/
697
698
699/*------------------------------------------------------------*/
700/*--- ar registers ---*/
701/*------------------------------------------------------------*/
702
703/* Return the guest state offset of a ar register. */
704static UInt
705ar_offset(UInt archreg)
706{
707 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000708 S390X_GUEST_OFFSET(guest_a0),
709 S390X_GUEST_OFFSET(guest_a1),
710 S390X_GUEST_OFFSET(guest_a2),
711 S390X_GUEST_OFFSET(guest_a3),
712 S390X_GUEST_OFFSET(guest_a4),
713 S390X_GUEST_OFFSET(guest_a5),
714 S390X_GUEST_OFFSET(guest_a6),
715 S390X_GUEST_OFFSET(guest_a7),
716 S390X_GUEST_OFFSET(guest_a8),
717 S390X_GUEST_OFFSET(guest_a9),
718 S390X_GUEST_OFFSET(guest_a10),
719 S390X_GUEST_OFFSET(guest_a11),
720 S390X_GUEST_OFFSET(guest_a12),
721 S390X_GUEST_OFFSET(guest_a13),
722 S390X_GUEST_OFFSET(guest_a14),
723 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000724 };
725
726 vassert(archreg < 16);
727
728 return offset[archreg];
729}
730
731
732/* Return the guest state offset of word #0 of a ar register. */
733static __inline__ UInt
734ar_w0_offset(UInt archreg)
735{
736 return ar_offset(archreg) + 0;
737}
738
739/* Write word #0 of a ar to the guest state. */
740static __inline__ void
741put_ar_w0(UInt archreg, IRExpr *expr)
742{
743 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
744
745 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
746}
747
748/* Read word #0 of a ar register. */
749static __inline__ IRExpr *
750get_ar_w0(UInt archreg)
751{
752 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
753}
754
755
756/*------------------------------------------------------------*/
757/*--- fpr registers ---*/
758/*------------------------------------------------------------*/
759
760/* Return the guest state offset of a fpr register. */
761static UInt
762fpr_offset(UInt archreg)
763{
764 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000765 S390X_GUEST_OFFSET(guest_f0),
766 S390X_GUEST_OFFSET(guest_f1),
767 S390X_GUEST_OFFSET(guest_f2),
768 S390X_GUEST_OFFSET(guest_f3),
769 S390X_GUEST_OFFSET(guest_f4),
770 S390X_GUEST_OFFSET(guest_f5),
771 S390X_GUEST_OFFSET(guest_f6),
772 S390X_GUEST_OFFSET(guest_f7),
773 S390X_GUEST_OFFSET(guest_f8),
774 S390X_GUEST_OFFSET(guest_f9),
775 S390X_GUEST_OFFSET(guest_f10),
776 S390X_GUEST_OFFSET(guest_f11),
777 S390X_GUEST_OFFSET(guest_f12),
778 S390X_GUEST_OFFSET(guest_f13),
779 S390X_GUEST_OFFSET(guest_f14),
780 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000781 };
782
783 vassert(archreg < 16);
784
785 return offset[archreg];
786}
787
788
789/* Return the guest state offset of word #0 of a fpr register. */
790static __inline__ UInt
791fpr_w0_offset(UInt archreg)
792{
793 return fpr_offset(archreg) + 0;
794}
795
796/* Write word #0 of a fpr to the guest state. */
797static __inline__ void
798put_fpr_w0(UInt archreg, IRExpr *expr)
799{
800 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
801
802 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
803}
804
805/* Read word #0 of a fpr register. */
806static __inline__ IRExpr *
807get_fpr_w0(UInt archreg)
808{
809 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
810}
811
812/* Return the guest state offset of double word #0 of a fpr register. */
813static __inline__ UInt
814fpr_dw0_offset(UInt archreg)
815{
816 return fpr_offset(archreg) + 0;
817}
818
819/* Write double word #0 of a fpr to the guest state. */
820static __inline__ void
821put_fpr_dw0(UInt archreg, IRExpr *expr)
822{
823 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
824
825 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
826}
827
828/* Read double word #0 of a fpr register. */
829static __inline__ IRExpr *
830get_fpr_dw0(UInt archreg)
831{
832 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
833}
834
835
836/*------------------------------------------------------------*/
837/*--- gpr registers ---*/
838/*------------------------------------------------------------*/
839
840/* Return the guest state offset of a gpr register. */
841static UInt
842gpr_offset(UInt archreg)
843{
844 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000845 S390X_GUEST_OFFSET(guest_r0),
846 S390X_GUEST_OFFSET(guest_r1),
847 S390X_GUEST_OFFSET(guest_r2),
848 S390X_GUEST_OFFSET(guest_r3),
849 S390X_GUEST_OFFSET(guest_r4),
850 S390X_GUEST_OFFSET(guest_r5),
851 S390X_GUEST_OFFSET(guest_r6),
852 S390X_GUEST_OFFSET(guest_r7),
853 S390X_GUEST_OFFSET(guest_r8),
854 S390X_GUEST_OFFSET(guest_r9),
855 S390X_GUEST_OFFSET(guest_r10),
856 S390X_GUEST_OFFSET(guest_r11),
857 S390X_GUEST_OFFSET(guest_r12),
858 S390X_GUEST_OFFSET(guest_r13),
859 S390X_GUEST_OFFSET(guest_r14),
860 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000861 };
862
863 vassert(archreg < 16);
864
865 return offset[archreg];
866}
867
868
869/* Return the guest state offset of word #0 of a gpr register. */
870static __inline__ UInt
871gpr_w0_offset(UInt archreg)
872{
873 return gpr_offset(archreg) + 0;
874}
875
876/* Write word #0 of a gpr to the guest state. */
877static __inline__ void
878put_gpr_w0(UInt archreg, IRExpr *expr)
879{
880 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
881
882 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
883}
884
885/* Read word #0 of a gpr register. */
886static __inline__ IRExpr *
887get_gpr_w0(UInt archreg)
888{
889 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
890}
891
892/* Return the guest state offset of double word #0 of a gpr register. */
893static __inline__ UInt
894gpr_dw0_offset(UInt archreg)
895{
896 return gpr_offset(archreg) + 0;
897}
898
899/* Write double word #0 of a gpr to the guest state. */
900static __inline__ void
901put_gpr_dw0(UInt archreg, IRExpr *expr)
902{
903 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
904
905 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
906}
907
908/* Read double word #0 of a gpr register. */
909static __inline__ IRExpr *
910get_gpr_dw0(UInt archreg)
911{
912 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
913}
914
915/* Return the guest state offset of half word #1 of a gpr register. */
916static __inline__ UInt
917gpr_hw1_offset(UInt archreg)
918{
919 return gpr_offset(archreg) + 2;
920}
921
922/* Write half word #1 of a gpr to the guest state. */
923static __inline__ void
924put_gpr_hw1(UInt archreg, IRExpr *expr)
925{
926 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
927
928 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
929}
930
931/* Read half word #1 of a gpr register. */
932static __inline__ IRExpr *
933get_gpr_hw1(UInt archreg)
934{
935 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
936}
937
938/* Return the guest state offset of byte #6 of a gpr register. */
939static __inline__ UInt
940gpr_b6_offset(UInt archreg)
941{
942 return gpr_offset(archreg) + 6;
943}
944
945/* Write byte #6 of a gpr to the guest state. */
946static __inline__ void
947put_gpr_b6(UInt archreg, IRExpr *expr)
948{
949 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
950
951 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
952}
953
954/* Read byte #6 of a gpr register. */
955static __inline__ IRExpr *
956get_gpr_b6(UInt archreg)
957{
958 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
959}
960
961/* Return the guest state offset of byte #3 of a gpr register. */
962static __inline__ UInt
963gpr_b3_offset(UInt archreg)
964{
965 return gpr_offset(archreg) + 3;
966}
967
968/* Write byte #3 of a gpr to the guest state. */
969static __inline__ void
970put_gpr_b3(UInt archreg, IRExpr *expr)
971{
972 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
973
974 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
975}
976
977/* Read byte #3 of a gpr register. */
978static __inline__ IRExpr *
979get_gpr_b3(UInt archreg)
980{
981 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
982}
983
984/* Return the guest state offset of byte #0 of a gpr register. */
985static __inline__ UInt
986gpr_b0_offset(UInt archreg)
987{
988 return gpr_offset(archreg) + 0;
989}
990
991/* Write byte #0 of a gpr to the guest state. */
992static __inline__ void
993put_gpr_b0(UInt archreg, IRExpr *expr)
994{
995 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
996
997 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
998}
999
1000/* Read byte #0 of a gpr register. */
1001static __inline__ IRExpr *
1002get_gpr_b0(UInt archreg)
1003{
1004 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
1005}
1006
1007/* Return the guest state offset of word #1 of a gpr register. */
1008static __inline__ UInt
1009gpr_w1_offset(UInt archreg)
1010{
1011 return gpr_offset(archreg) + 4;
1012}
1013
1014/* Write word #1 of a gpr to the guest state. */
1015static __inline__ void
1016put_gpr_w1(UInt archreg, IRExpr *expr)
1017{
1018 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1019
1020 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
1021}
1022
1023/* Read word #1 of a gpr register. */
1024static __inline__ IRExpr *
1025get_gpr_w1(UInt archreg)
1026{
1027 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1028}
1029
1030/* Return the guest state offset of half word #3 of a gpr register. */
1031static __inline__ UInt
1032gpr_hw3_offset(UInt archreg)
1033{
1034 return gpr_offset(archreg) + 6;
1035}
1036
1037/* Write half word #3 of a gpr to the guest state. */
1038static __inline__ void
1039put_gpr_hw3(UInt archreg, IRExpr *expr)
1040{
1041 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1042
1043 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1044}
1045
1046/* Read half word #3 of a gpr register. */
1047static __inline__ IRExpr *
1048get_gpr_hw3(UInt archreg)
1049{
1050 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1051}
1052
1053/* Return the guest state offset of byte #7 of a gpr register. */
1054static __inline__ UInt
1055gpr_b7_offset(UInt archreg)
1056{
1057 return gpr_offset(archreg) + 7;
1058}
1059
1060/* Write byte #7 of a gpr to the guest state. */
1061static __inline__ void
1062put_gpr_b7(UInt archreg, IRExpr *expr)
1063{
1064 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1065
1066 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1067}
1068
1069/* Read byte #7 of a gpr register. */
1070static __inline__ IRExpr *
1071get_gpr_b7(UInt archreg)
1072{
1073 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1074}
1075
1076/* Return the guest state offset of half word #0 of a gpr register. */
1077static __inline__ UInt
1078gpr_hw0_offset(UInt archreg)
1079{
1080 return gpr_offset(archreg) + 0;
1081}
1082
1083/* Write half word #0 of a gpr to the guest state. */
1084static __inline__ void
1085put_gpr_hw0(UInt archreg, IRExpr *expr)
1086{
1087 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1088
1089 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1090}
1091
1092/* Read half word #0 of a gpr register. */
1093static __inline__ IRExpr *
1094get_gpr_hw0(UInt archreg)
1095{
1096 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1097}
1098
1099/* Return the guest state offset of byte #4 of a gpr register. */
1100static __inline__ UInt
1101gpr_b4_offset(UInt archreg)
1102{
1103 return gpr_offset(archreg) + 4;
1104}
1105
1106/* Write byte #4 of a gpr to the guest state. */
1107static __inline__ void
1108put_gpr_b4(UInt archreg, IRExpr *expr)
1109{
1110 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1111
1112 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1113}
1114
1115/* Read byte #4 of a gpr register. */
1116static __inline__ IRExpr *
1117get_gpr_b4(UInt archreg)
1118{
1119 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1120}
1121
1122/* Return the guest state offset of byte #1 of a gpr register. */
1123static __inline__ UInt
1124gpr_b1_offset(UInt archreg)
1125{
1126 return gpr_offset(archreg) + 1;
1127}
1128
1129/* Write byte #1 of a gpr to the guest state. */
1130static __inline__ void
1131put_gpr_b1(UInt archreg, IRExpr *expr)
1132{
1133 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1134
1135 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1136}
1137
1138/* Read byte #1 of a gpr register. */
1139static __inline__ IRExpr *
1140get_gpr_b1(UInt archreg)
1141{
1142 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1143}
1144
1145/* Return the guest state offset of half word #2 of a gpr register. */
1146static __inline__ UInt
1147gpr_hw2_offset(UInt archreg)
1148{
1149 return gpr_offset(archreg) + 4;
1150}
1151
1152/* Write half word #2 of a gpr to the guest state. */
1153static __inline__ void
1154put_gpr_hw2(UInt archreg, IRExpr *expr)
1155{
1156 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1157
1158 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1159}
1160
1161/* Read half word #2 of a gpr register. */
1162static __inline__ IRExpr *
1163get_gpr_hw2(UInt archreg)
1164{
1165 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1166}
1167
1168/* Return the guest state offset of byte #5 of a gpr register. */
1169static __inline__ UInt
1170gpr_b5_offset(UInt archreg)
1171{
1172 return gpr_offset(archreg) + 5;
1173}
1174
1175/* Write byte #5 of a gpr to the guest state. */
1176static __inline__ void
1177put_gpr_b5(UInt archreg, IRExpr *expr)
1178{
1179 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1180
1181 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1182}
1183
1184/* Read byte #5 of a gpr register. */
1185static __inline__ IRExpr *
1186get_gpr_b5(UInt archreg)
1187{
1188 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1189}
1190
1191/* Return the guest state offset of byte #2 of a gpr register. */
1192static __inline__ UInt
1193gpr_b2_offset(UInt archreg)
1194{
1195 return gpr_offset(archreg) + 2;
1196}
1197
1198/* Write byte #2 of a gpr to the guest state. */
1199static __inline__ void
1200put_gpr_b2(UInt archreg, IRExpr *expr)
1201{
1202 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1203
1204 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1205}
1206
1207/* Read byte #2 of a gpr register. */
1208static __inline__ IRExpr *
1209get_gpr_b2(UInt archreg)
1210{
1211 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1212}
1213
1214/* Return the guest state offset of the counter register. */
1215static UInt
1216counter_offset(void)
1217{
floriane88b3c92011-07-05 02:48:39 +00001218 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001219}
1220
1221/* Return the guest state offset of double word #0 of the counter register. */
1222static __inline__ UInt
1223counter_dw0_offset(void)
1224{
1225 return counter_offset() + 0;
1226}
1227
1228/* Write double word #0 of the counter to the guest state. */
1229static __inline__ void
1230put_counter_dw0(IRExpr *expr)
1231{
1232 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1233
1234 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1235}
1236
1237/* Read double word #0 of the counter register. */
1238static __inline__ IRExpr *
1239get_counter_dw0(void)
1240{
1241 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1242}
1243
1244/* Return the guest state offset of word #0 of the counter register. */
1245static __inline__ UInt
1246counter_w0_offset(void)
1247{
1248 return counter_offset() + 0;
1249}
1250
1251/* Return the guest state offset of word #1 of the counter register. */
1252static __inline__ UInt
1253counter_w1_offset(void)
1254{
1255 return counter_offset() + 4;
1256}
1257
1258/* Write word #0 of the counter to the guest state. */
1259static __inline__ void
1260put_counter_w0(IRExpr *expr)
1261{
1262 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1263
1264 stmt(IRStmt_Put(counter_w0_offset(), expr));
1265}
1266
1267/* Read word #0 of the counter register. */
1268static __inline__ IRExpr *
1269get_counter_w0(void)
1270{
1271 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1272}
1273
1274/* Write word #1 of the counter to the guest state. */
1275static __inline__ void
1276put_counter_w1(IRExpr *expr)
1277{
1278 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1279
1280 stmt(IRStmt_Put(counter_w1_offset(), expr));
1281}
1282
1283/* Read word #1 of the counter register. */
1284static __inline__ IRExpr *
1285get_counter_w1(void)
1286{
1287 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1288}
1289
1290/* Return the guest state offset of the fpc register. */
1291static UInt
1292fpc_offset(void)
1293{
floriane88b3c92011-07-05 02:48:39 +00001294 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001295}
1296
1297/* Return the guest state offset of word #0 of the fpc register. */
1298static __inline__ UInt
1299fpc_w0_offset(void)
1300{
1301 return fpc_offset() + 0;
1302}
1303
1304/* Write word #0 of the fpc to the guest state. */
1305static __inline__ void
1306put_fpc_w0(IRExpr *expr)
1307{
1308 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1309
1310 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1311}
1312
1313/* Read word #0 of the fpc register. */
1314static __inline__ IRExpr *
1315get_fpc_w0(void)
1316{
1317 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1318}
1319
1320
1321/*------------------------------------------------------------*/
1322/*--- Build IR for formats ---*/
1323/*------------------------------------------------------------*/
1324static void
1325s390_format_I(HChar *(*irgen)(UChar i),
1326 UChar i)
1327{
1328 HChar *mnm = irgen(i);
1329
sewardj7ee97522011-05-09 21:45:04 +00001330 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001331 s390_disasm(ENC2(MNM, UINT), mnm, i);
1332}
1333
1334static void
1335s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1336 UChar r1, UShort i2)
1337{
1338 irgen(r1, i2);
1339}
1340
1341static void
1342s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1343 UChar r1, UShort i2)
1344{
1345 HChar *mnm = irgen(r1, i2);
1346
sewardj7ee97522011-05-09 21:45:04 +00001347 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001348 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1349}
1350
1351static void
1352s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1353 UChar r1, UShort i2)
1354{
1355 HChar *mnm = irgen(r1, i2);
1356
sewardj7ee97522011-05-09 21:45:04 +00001357 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001358 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1359}
1360
1361static void
1362s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1363 UChar r1, UShort i2)
1364{
1365 HChar *mnm = irgen(r1, i2);
1366
sewardj7ee97522011-05-09 21:45:04 +00001367 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001368 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1369}
1370
1371static void
1372s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1373 UChar r1, UChar r3, UShort i2)
1374{
1375 HChar *mnm = irgen(r1, r3, i2);
1376
sewardj7ee97522011-05-09 21:45:04 +00001377 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001378 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1379}
1380
1381static void
1382s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1383 UChar r1, UChar r3, UShort i2)
1384{
1385 HChar *mnm = irgen(r1, r3, i2);
1386
sewardj7ee97522011-05-09 21:45:04 +00001387 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001388 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1389}
1390
1391static void
1392s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1393 UChar i5),
1394 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1395{
1396 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1397
sewardj7ee97522011-05-09 21:45:04 +00001398 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001399 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1400 i5);
1401}
1402
1403static void
1404s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1405 UChar r1, UChar r2, UShort i4, UChar m3)
1406{
1407 HChar *mnm = irgen(r1, r2, i4, m3);
1408
sewardj7ee97522011-05-09 21:45:04 +00001409 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001410 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1411 r2, m3, (Int)(Short)i4);
1412}
1413
1414static void
1415s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1416 UChar r1, UChar m3, UShort i4, UChar i2)
1417{
1418 HChar *mnm = irgen(r1, m3, i4, i2);
1419
sewardj7ee97522011-05-09 21:45:04 +00001420 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001421 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1422 r1, i2, m3, (Int)(Short)i4);
1423}
1424
1425static void
1426s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1427 UChar r1, UChar m3, UShort i4, UChar i2)
1428{
1429 HChar *mnm = irgen(r1, m3, i4, i2);
1430
sewardj7ee97522011-05-09 21:45:04 +00001431 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001432 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1433 (Int)(Char)i2, m3, (Int)(Short)i4);
1434}
1435
1436static void
1437s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1438 UChar r1, UInt i2)
1439{
1440 irgen(r1, i2);
1441}
1442
1443static void
1444s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1445 UChar r1, UInt i2)
1446{
1447 HChar *mnm = irgen(r1, i2);
1448
sewardj7ee97522011-05-09 21:45:04 +00001449 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001450 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1451}
1452
1453static void
1454s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1455 UChar r1, UInt i2)
1456{
1457 HChar *mnm = irgen(r1, i2);
1458
sewardj7ee97522011-05-09 21:45:04 +00001459 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001460 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1461}
1462
1463static void
1464s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1465 UChar r1, UInt i2)
1466{
1467 HChar *mnm = irgen(r1, i2);
1468
sewardj7ee97522011-05-09 21:45:04 +00001469 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001470 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1471}
1472
1473static void
1474s390_format_RIL_UP(HChar *(*irgen)(void),
1475 UChar r1, UInt i2)
1476{
1477 HChar *mnm = irgen();
1478
sewardj7ee97522011-05-09 21:45:04 +00001479 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001480 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1481}
1482
1483static void
1484s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1485 IRTemp op4addr),
1486 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1487{
1488 HChar *mnm;
1489 IRTemp op4addr = newTemp(Ity_I64);
1490
1491 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1492 mkU64(0)));
1493
1494 mnm = irgen(r1, m3, i2, op4addr);
1495
sewardj7ee97522011-05-09 21:45:04 +00001496 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001497 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1498 (Int)(Char)i2, m3, d4, 0, b4);
1499}
1500
1501static void
1502s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1503 IRTemp op4addr),
1504 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1505{
1506 HChar *mnm;
1507 IRTemp op4addr = newTemp(Ity_I64);
1508
1509 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1510 mkU64(0)));
1511
1512 mnm = irgen(r1, m3, i2, op4addr);
1513
sewardj7ee97522011-05-09 21:45:04 +00001514 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001515 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1516 i2, m3, d4, 0, b4);
1517}
1518
1519static void
1520s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1521 UChar r1, UChar r2)
1522{
1523 irgen(r1, r2);
1524}
1525
1526static void
1527s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1528 UChar r1, UChar r2)
1529{
1530 HChar *mnm = irgen(r1, r2);
1531
sewardj7ee97522011-05-09 21:45:04 +00001532 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001533 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1534}
1535
1536static void
1537s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1538 UChar r1, UChar r2)
1539{
1540 HChar *mnm = irgen(r1, r2);
1541
sewardj7ee97522011-05-09 21:45:04 +00001542 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001543 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1544}
1545
1546static void
1547s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1548 UChar r1, UChar r2)
1549{
1550 irgen(r1, r2);
1551}
1552
1553static void
1554s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1555 UChar r1, UChar r2)
1556{
1557 HChar *mnm = irgen(r1, r2);
1558
sewardj7ee97522011-05-09 21:45:04 +00001559 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001560 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1561}
1562
1563static void
1564s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1565 UChar r1, UChar r2)
1566{
1567 HChar *mnm = irgen(r1, r2);
1568
sewardj7ee97522011-05-09 21:45:04 +00001569 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001570 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1571}
1572
1573static void
1574s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1575 UChar r1, UChar r2)
1576{
1577 HChar *mnm = irgen(r1, r2);
1578
sewardj7ee97522011-05-09 21:45:04 +00001579 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001580 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1581}
1582
1583static void
1584s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1585 UChar r1, UChar r2)
1586{
1587 HChar *mnm = irgen(r1, r2);
1588
sewardj7ee97522011-05-09 21:45:04 +00001589 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001590 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1591}
1592
1593static void
1594s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1595 UChar r1)
1596{
1597 HChar *mnm = irgen(r1);
1598
sewardj7ee97522011-05-09 21:45:04 +00001599 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001600 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1601}
1602
1603static void
1604s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1605 UChar r1)
1606{
1607 HChar *mnm = irgen(r1);
1608
sewardj7ee97522011-05-09 21:45:04 +00001609 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001610 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1611}
1612
1613static void
florian9af37692012-01-15 21:01:16 +00001614s390_format_RRF_M0RERE(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1615 UChar m3, UChar r1, UChar r2)
1616{
1617 irgen(m3, r1, r2);
1618
1619 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
1620 s390_disasm(ENC3(MNM, GPR, GPR), m3, r1, r2);
1621}
1622
1623static void
sewardj2019a972011-03-07 16:04:07 +00001624s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1625 UChar r1, UChar r3, UChar r2)
1626{
1627 HChar *mnm = irgen(r1, r3, r2);
1628
sewardj7ee97522011-05-09 21:45:04 +00001629 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001630 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1631}
1632
1633static void
sewardjd7bde722011-04-05 13:19:33 +00001634s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1635 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1636{
1637 irgen(m3, r1, r2);
1638
sewardj7ee97522011-05-09 21:45:04 +00001639 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001640 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1641}
1642
1643static void
sewardj2019a972011-03-07 16:04:07 +00001644s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1645 UChar r3, UChar r1, UChar r2)
1646{
1647 HChar *mnm = irgen(r3, r1, r2);
1648
sewardj7ee97522011-05-09 21:45:04 +00001649 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001650 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1651}
1652
1653static void
1654s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1655 UChar r3, UChar r1, UChar r2)
1656{
1657 HChar *mnm = irgen(r3, r1, r2);
1658
sewardj7ee97522011-05-09 21:45:04 +00001659 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001660 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1661}
1662
1663static void
1664s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1665 UChar r3, UChar r1, UChar r2)
1666{
1667 HChar *mnm = irgen(r3, r1, r2);
1668
sewardj7ee97522011-05-09 21:45:04 +00001669 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001670 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1671}
1672
1673static void
1674s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1675 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1676{
1677 HChar *mnm;
1678 IRTemp op4addr = newTemp(Ity_I64);
1679
1680 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1681 mkU64(0)));
1682
1683 mnm = irgen(r1, r2, m3, op4addr);
1684
sewardj7ee97522011-05-09 21:45:04 +00001685 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001686 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1687 r2, m3, d4, 0, b4);
1688}
1689
1690static void
1691s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1692 UChar r1, UChar b2, UShort d2)
1693{
1694 HChar *mnm;
1695 IRTemp op2addr = newTemp(Ity_I64);
1696
1697 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1698 mkU64(0)));
1699
1700 mnm = irgen(r1, op2addr);
1701
sewardj7ee97522011-05-09 21:45:04 +00001702 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001703 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1704}
1705
1706static void
1707s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1708 UChar r1, UChar r3, UChar b2, UShort d2)
1709{
1710 HChar *mnm;
1711 IRTemp op2addr = newTemp(Ity_I64);
1712
1713 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1714 mkU64(0)));
1715
1716 mnm = irgen(r1, r3, op2addr);
1717
sewardj7ee97522011-05-09 21:45:04 +00001718 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001719 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1720}
1721
1722static void
1723s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1724 UChar r1, UChar r3, UChar b2, UShort d2)
1725{
1726 HChar *mnm;
1727 IRTemp op2addr = newTemp(Ity_I64);
1728
1729 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1730 mkU64(0)));
1731
1732 mnm = irgen(r1, r3, op2addr);
1733
sewardj7ee97522011-05-09 21:45:04 +00001734 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001735 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1736}
1737
1738static void
1739s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1740 UChar r1, UChar r3, UChar b2, UShort d2)
1741{
1742 HChar *mnm;
1743 IRTemp op2addr = newTemp(Ity_I64);
1744
1745 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1746 mkU64(0)));
1747
1748 mnm = irgen(r1, r3, op2addr);
1749
sewardj7ee97522011-05-09 21:45:04 +00001750 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001751 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1752}
1753
1754static void
1755s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1756 UChar r1, UChar r3, UShort i2)
1757{
1758 HChar *mnm = irgen(r1, r3, i2);
1759
sewardj7ee97522011-05-09 21:45:04 +00001760 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001761 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1762}
1763
1764static void
1765s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1766 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1767{
1768 HChar *mnm;
1769 IRTemp op2addr = newTemp(Ity_I64);
1770 IRTemp d2 = newTemp(Ity_I64);
1771
1772 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1773 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1774 mkU64(0)));
1775
1776 mnm = irgen(r1, r3, op2addr);
1777
sewardj7ee97522011-05-09 21:45:04 +00001778 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001779 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1780}
1781
1782static void
1783s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1784 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1785{
1786 HChar *mnm;
1787 IRTemp op2addr = newTemp(Ity_I64);
1788 IRTemp d2 = newTemp(Ity_I64);
1789
1790 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1791 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1792 mkU64(0)));
1793
1794 mnm = irgen(r1, r3, op2addr);
1795
sewardj7ee97522011-05-09 21:45:04 +00001796 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001797 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1798}
1799
1800static void
1801s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1802 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1803{
1804 HChar *mnm;
1805 IRTemp op2addr = newTemp(Ity_I64);
1806 IRTemp d2 = newTemp(Ity_I64);
1807
1808 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1809 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1810 mkU64(0)));
1811
1812 mnm = irgen(r1, r3, op2addr);
1813
sewardj7ee97522011-05-09 21:45:04 +00001814 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001815 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1816}
1817
1818static void
sewardjd7bde722011-04-05 13:19:33 +00001819s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1820 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1821 Int xmnm_kind)
1822{
1823 IRTemp op2addr = newTemp(Ity_I64);
1824 IRTemp d2 = newTemp(Ity_I64);
1825
1826 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1827 guest_IA_next_instr);
1828 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1829 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1830 mkU64(0)));
1831
1832 irgen(r1, op2addr);
florianf9e1ed72012-04-17 02:41:56 +00001833 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00001834
sewardj7ee97522011-05-09 21:45:04 +00001835 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001836 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1837}
1838
1839static void
sewardj2019a972011-03-07 16:04:07 +00001840s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1841 IRTemp op2addr),
1842 UChar r1, UChar x2, UChar b2, UShort d2)
1843{
1844 IRTemp op2addr = newTemp(Ity_I64);
1845
1846 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1847 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1848 mkU64(0)));
1849
1850 irgen(r1, x2, b2, d2, op2addr);
1851}
1852
1853static void
1854s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1855 UChar r1, UChar x2, UChar b2, UShort d2)
1856{
1857 HChar *mnm;
1858 IRTemp op2addr = newTemp(Ity_I64);
1859
1860 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1861 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1862 mkU64(0)));
1863
1864 mnm = irgen(r1, op2addr);
1865
sewardj7ee97522011-05-09 21:45:04 +00001866 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001867 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1868}
1869
1870static void
1871s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1872 UChar r1, UChar x2, UChar b2, UShort d2)
1873{
1874 HChar *mnm;
1875 IRTemp op2addr = newTemp(Ity_I64);
1876
1877 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1878 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1879 mkU64(0)));
1880
1881 mnm = irgen(r1, op2addr);
1882
sewardj7ee97522011-05-09 21:45:04 +00001883 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001884 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1885}
1886
1887static void
1888s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1889 UChar r1, UChar x2, UChar b2, UShort d2)
1890{
1891 HChar *mnm;
1892 IRTemp op2addr = newTemp(Ity_I64);
1893
1894 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1895 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1896 mkU64(0)));
1897
1898 mnm = irgen(r1, op2addr);
1899
sewardj7ee97522011-05-09 21:45:04 +00001900 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001901 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1902}
1903
1904static void
1905s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1906 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1907{
1908 HChar *mnm;
1909 IRTemp op2addr = newTemp(Ity_I64);
1910
1911 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1912 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1913 mkU64(0)));
1914
1915 mnm = irgen(r3, op2addr, r1);
1916
sewardj7ee97522011-05-09 21:45:04 +00001917 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001918 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1919}
1920
1921static void
1922s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1923 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1924{
1925 HChar *mnm;
1926 IRTemp op2addr = newTemp(Ity_I64);
1927 IRTemp d2 = newTemp(Ity_I64);
1928
1929 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1930 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1931 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1932 mkU64(0)));
1933
1934 mnm = irgen(r1, op2addr);
1935
sewardj7ee97522011-05-09 21:45:04 +00001936 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001937 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1938}
1939
1940static void
1941s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1942 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1943{
1944 HChar *mnm;
1945 IRTemp op2addr = newTemp(Ity_I64);
1946 IRTemp d2 = newTemp(Ity_I64);
1947
1948 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1949 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1950 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1951 mkU64(0)));
1952
1953 mnm = irgen(r1, op2addr);
1954
sewardj7ee97522011-05-09 21:45:04 +00001955 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001956 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1957}
1958
1959static void
1960s390_format_RXY_URRD(HChar *(*irgen)(void),
1961 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1962{
1963 HChar *mnm;
1964 IRTemp op2addr = newTemp(Ity_I64);
1965 IRTemp d2 = newTemp(Ity_I64);
1966
1967 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1968 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1969 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1970 mkU64(0)));
1971
1972 mnm = irgen();
1973
sewardj7ee97522011-05-09 21:45:04 +00001974 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001975 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1976}
1977
1978static void
1979s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1980 UChar b2, UShort d2)
1981{
1982 HChar *mnm;
1983 IRTemp op2addr = newTemp(Ity_I64);
1984
1985 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1986 mkU64(0)));
1987
1988 mnm = irgen(op2addr);
1989
sewardj7ee97522011-05-09 21:45:04 +00001990 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001991 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1992}
1993
1994static void
1995s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1996 UChar i2, UChar b1, UShort d1)
1997{
1998 HChar *mnm;
1999 IRTemp op1addr = newTemp(Ity_I64);
2000
2001 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2002 mkU64(0)));
2003
2004 mnm = irgen(i2, op1addr);
2005
sewardj7ee97522011-05-09 21:45:04 +00002006 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002007 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2008}
2009
2010static void
2011s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2012 UChar i2, UChar b1, UShort dl1, UChar dh1)
2013{
2014 HChar *mnm;
2015 IRTemp op1addr = newTemp(Ity_I64);
2016 IRTemp d1 = newTemp(Ity_I64);
2017
2018 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2019 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2020 mkU64(0)));
2021
2022 mnm = irgen(i2, op1addr);
2023
sewardj7ee97522011-05-09 21:45:04 +00002024 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002025 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
2026}
2027
2028static void
2029s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
2030 UChar i2, UChar b1, UShort dl1, UChar dh1)
2031{
2032 HChar *mnm;
2033 IRTemp op1addr = newTemp(Ity_I64);
2034 IRTemp d1 = newTemp(Ity_I64);
2035
2036 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2037 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2038 mkU64(0)));
2039
2040 mnm = irgen(i2, op1addr);
2041
sewardj7ee97522011-05-09 21:45:04 +00002042 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002043 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2044}
2045
2046static void
2047s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2048 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2049{
2050 HChar *mnm;
2051 IRTemp op1addr = newTemp(Ity_I64);
2052 IRTemp op2addr = newTemp(Ity_I64);
2053
2054 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2055 mkU64(0)));
2056 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2057 mkU64(0)));
2058
2059 mnm = irgen(l, op1addr, op2addr);
2060
sewardj7ee97522011-05-09 21:45:04 +00002061 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002062 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2063}
2064
2065static void
2066s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2067 UChar b1, UShort d1, UShort i2)
2068{
2069 HChar *mnm;
2070 IRTemp op1addr = newTemp(Ity_I64);
2071
2072 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2073 mkU64(0)));
2074
2075 mnm = irgen(i2, op1addr);
2076
sewardj7ee97522011-05-09 21:45:04 +00002077 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002078 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2079}
2080
2081static void
2082s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2083 UChar b1, UShort d1, UShort i2)
2084{
2085 HChar *mnm;
2086 IRTemp op1addr = newTemp(Ity_I64);
2087
2088 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2089 mkU64(0)));
2090
2091 mnm = irgen(i2, op1addr);
2092
sewardj7ee97522011-05-09 21:45:04 +00002093 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002094 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2095}
2096
2097
2098
2099/*------------------------------------------------------------*/
2100/*--- Build IR for opcodes ---*/
2101/*------------------------------------------------------------*/
2102
2103static HChar *
florian30e89012011-08-08 18:22:58 +00002104s390_irgen_00(UChar r1 __attribute__((unused)),
2105 UChar r2 __attribute__((unused)))
2106{
2107 IRDirty *d;
2108
2109 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2110 mkIRExprVec_0());
2111 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2112
2113 d->fxState[0].fx = Ifx_Modify; /* read then write */
2114 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2115 d->fxState[0].size = sizeof(ULong);
2116 d->nFxState = 1;
2117
2118 stmt(IRStmt_Dirty(d));
2119
2120 return "00";
2121}
2122
2123static HChar *
sewardj2019a972011-03-07 16:04:07 +00002124s390_irgen_AR(UChar r1, UChar r2)
2125{
2126 IRTemp op1 = newTemp(Ity_I32);
2127 IRTemp op2 = newTemp(Ity_I32);
2128 IRTemp result = newTemp(Ity_I32);
2129
2130 assign(op1, get_gpr_w1(r1));
2131 assign(op2, get_gpr_w1(r2));
2132 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2133 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2134 put_gpr_w1(r1, mkexpr(result));
2135
2136 return "ar";
2137}
2138
2139static HChar *
2140s390_irgen_AGR(UChar r1, UChar r2)
2141{
2142 IRTemp op1 = newTemp(Ity_I64);
2143 IRTemp op2 = newTemp(Ity_I64);
2144 IRTemp result = newTemp(Ity_I64);
2145
2146 assign(op1, get_gpr_dw0(r1));
2147 assign(op2, get_gpr_dw0(r2));
2148 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2149 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2150 put_gpr_dw0(r1, mkexpr(result));
2151
2152 return "agr";
2153}
2154
2155static HChar *
2156s390_irgen_AGFR(UChar r1, UChar r2)
2157{
2158 IRTemp op1 = newTemp(Ity_I64);
2159 IRTemp op2 = newTemp(Ity_I64);
2160 IRTemp result = newTemp(Ity_I64);
2161
2162 assign(op1, get_gpr_dw0(r1));
2163 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2164 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2165 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2166 put_gpr_dw0(r1, mkexpr(result));
2167
2168 return "agfr";
2169}
2170
2171static HChar *
2172s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2173{
2174 IRTemp op2 = newTemp(Ity_I32);
2175 IRTemp op3 = newTemp(Ity_I32);
2176 IRTemp result = newTemp(Ity_I32);
2177
2178 assign(op2, get_gpr_w1(r2));
2179 assign(op3, get_gpr_w1(r3));
2180 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2181 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2182 put_gpr_w1(r1, mkexpr(result));
2183
2184 return "ark";
2185}
2186
2187static HChar *
2188s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2189{
2190 IRTemp op2 = newTemp(Ity_I64);
2191 IRTemp op3 = newTemp(Ity_I64);
2192 IRTemp result = newTemp(Ity_I64);
2193
2194 assign(op2, get_gpr_dw0(r2));
2195 assign(op3, get_gpr_dw0(r3));
2196 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2197 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2198 put_gpr_dw0(r1, mkexpr(result));
2199
2200 return "agrk";
2201}
2202
2203static HChar *
2204s390_irgen_A(UChar r1, IRTemp op2addr)
2205{
2206 IRTemp op1 = newTemp(Ity_I32);
2207 IRTemp op2 = newTemp(Ity_I32);
2208 IRTemp result = newTemp(Ity_I32);
2209
2210 assign(op1, get_gpr_w1(r1));
2211 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2212 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2213 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2214 put_gpr_w1(r1, mkexpr(result));
2215
2216 return "a";
2217}
2218
2219static HChar *
2220s390_irgen_AY(UChar r1, IRTemp op2addr)
2221{
2222 IRTemp op1 = newTemp(Ity_I32);
2223 IRTemp op2 = newTemp(Ity_I32);
2224 IRTemp result = newTemp(Ity_I32);
2225
2226 assign(op1, get_gpr_w1(r1));
2227 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2228 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2229 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2230 put_gpr_w1(r1, mkexpr(result));
2231
2232 return "ay";
2233}
2234
2235static HChar *
2236s390_irgen_AG(UChar r1, IRTemp op2addr)
2237{
2238 IRTemp op1 = newTemp(Ity_I64);
2239 IRTemp op2 = newTemp(Ity_I64);
2240 IRTemp result = newTemp(Ity_I64);
2241
2242 assign(op1, get_gpr_dw0(r1));
2243 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2244 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2245 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2246 put_gpr_dw0(r1, mkexpr(result));
2247
2248 return "ag";
2249}
2250
2251static HChar *
2252s390_irgen_AGF(UChar r1, IRTemp op2addr)
2253{
2254 IRTemp op1 = newTemp(Ity_I64);
2255 IRTemp op2 = newTemp(Ity_I64);
2256 IRTemp result = newTemp(Ity_I64);
2257
2258 assign(op1, get_gpr_dw0(r1));
2259 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2260 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2261 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2262 put_gpr_dw0(r1, mkexpr(result));
2263
2264 return "agf";
2265}
2266
2267static HChar *
2268s390_irgen_AFI(UChar r1, UInt i2)
2269{
2270 IRTemp op1 = newTemp(Ity_I32);
2271 Int op2;
2272 IRTemp result = newTemp(Ity_I32);
2273
2274 assign(op1, get_gpr_w1(r1));
2275 op2 = (Int)i2;
2276 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2277 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2278 mkU32((UInt)op2)));
2279 put_gpr_w1(r1, mkexpr(result));
2280
2281 return "afi";
2282}
2283
2284static HChar *
2285s390_irgen_AGFI(UChar r1, UInt i2)
2286{
2287 IRTemp op1 = newTemp(Ity_I64);
2288 Long op2;
2289 IRTemp result = newTemp(Ity_I64);
2290
2291 assign(op1, get_gpr_dw0(r1));
2292 op2 = (Long)(Int)i2;
2293 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2294 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2295 mkU64((ULong)op2)));
2296 put_gpr_dw0(r1, mkexpr(result));
2297
2298 return "agfi";
2299}
2300
2301static HChar *
2302s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2303{
2304 Int op2;
2305 IRTemp op3 = newTemp(Ity_I32);
2306 IRTemp result = newTemp(Ity_I32);
2307
2308 op2 = (Int)(Short)i2;
2309 assign(op3, get_gpr_w1(r3));
2310 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2311 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2312 op2)), op3);
2313 put_gpr_w1(r1, mkexpr(result));
2314
2315 return "ahik";
2316}
2317
2318static HChar *
2319s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2320{
2321 Long op2;
2322 IRTemp op3 = newTemp(Ity_I64);
2323 IRTemp result = newTemp(Ity_I64);
2324
2325 op2 = (Long)(Short)i2;
2326 assign(op3, get_gpr_dw0(r3));
2327 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2328 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2329 op2)), op3);
2330 put_gpr_dw0(r1, mkexpr(result));
2331
2332 return "aghik";
2333}
2334
2335static HChar *
2336s390_irgen_ASI(UChar i2, IRTemp op1addr)
2337{
2338 IRTemp op1 = newTemp(Ity_I32);
2339 Int op2;
2340 IRTemp result = newTemp(Ity_I32);
2341
2342 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2343 op2 = (Int)(Char)i2;
2344 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2345 store(mkexpr(op1addr), mkexpr(result));
2346 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2347 mkU32((UInt)op2)));
2348
2349 return "asi";
2350}
2351
2352static HChar *
2353s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2354{
2355 IRTemp op1 = newTemp(Ity_I64);
2356 Long op2;
2357 IRTemp result = newTemp(Ity_I64);
2358
2359 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2360 op2 = (Long)(Char)i2;
2361 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2362 store(mkexpr(op1addr), mkexpr(result));
2363 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2364 mkU64((ULong)op2)));
2365
2366 return "agsi";
2367}
2368
2369static HChar *
2370s390_irgen_AH(UChar r1, IRTemp op2addr)
2371{
2372 IRTemp op1 = newTemp(Ity_I32);
2373 IRTemp op2 = newTemp(Ity_I32);
2374 IRTemp result = newTemp(Ity_I32);
2375
2376 assign(op1, get_gpr_w1(r1));
2377 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2378 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2379 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2380 put_gpr_w1(r1, mkexpr(result));
2381
2382 return "ah";
2383}
2384
2385static HChar *
2386s390_irgen_AHY(UChar r1, IRTemp op2addr)
2387{
2388 IRTemp op1 = newTemp(Ity_I32);
2389 IRTemp op2 = newTemp(Ity_I32);
2390 IRTemp result = newTemp(Ity_I32);
2391
2392 assign(op1, get_gpr_w1(r1));
2393 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2394 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2395 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2396 put_gpr_w1(r1, mkexpr(result));
2397
2398 return "ahy";
2399}
2400
2401static HChar *
2402s390_irgen_AHI(UChar r1, UShort i2)
2403{
2404 IRTemp op1 = newTemp(Ity_I32);
2405 Int op2;
2406 IRTemp result = newTemp(Ity_I32);
2407
2408 assign(op1, get_gpr_w1(r1));
2409 op2 = (Int)(Short)i2;
2410 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2411 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2412 mkU32((UInt)op2)));
2413 put_gpr_w1(r1, mkexpr(result));
2414
2415 return "ahi";
2416}
2417
2418static HChar *
2419s390_irgen_AGHI(UChar r1, UShort i2)
2420{
2421 IRTemp op1 = newTemp(Ity_I64);
2422 Long op2;
2423 IRTemp result = newTemp(Ity_I64);
2424
2425 assign(op1, get_gpr_dw0(r1));
2426 op2 = (Long)(Short)i2;
2427 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2428 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2429 mkU64((ULong)op2)));
2430 put_gpr_dw0(r1, mkexpr(result));
2431
2432 return "aghi";
2433}
2434
2435static HChar *
2436s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2437{
2438 IRTemp op2 = newTemp(Ity_I32);
2439 IRTemp op3 = newTemp(Ity_I32);
2440 IRTemp result = newTemp(Ity_I32);
2441
2442 assign(op2, get_gpr_w0(r2));
2443 assign(op3, get_gpr_w0(r3));
2444 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2445 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2446 put_gpr_w0(r1, mkexpr(result));
2447
2448 return "ahhhr";
2449}
2450
2451static HChar *
2452s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2453{
2454 IRTemp op2 = newTemp(Ity_I32);
2455 IRTemp op3 = newTemp(Ity_I32);
2456 IRTemp result = newTemp(Ity_I32);
2457
2458 assign(op2, get_gpr_w0(r2));
2459 assign(op3, get_gpr_w1(r3));
2460 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2461 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2462 put_gpr_w0(r1, mkexpr(result));
2463
2464 return "ahhlr";
2465}
2466
2467static HChar *
2468s390_irgen_AIH(UChar r1, UInt i2)
2469{
2470 IRTemp op1 = newTemp(Ity_I32);
2471 Int op2;
2472 IRTemp result = newTemp(Ity_I32);
2473
2474 assign(op1, get_gpr_w0(r1));
2475 op2 = (Int)i2;
2476 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2477 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2478 mkU32((UInt)op2)));
2479 put_gpr_w0(r1, mkexpr(result));
2480
2481 return "aih";
2482}
2483
2484static HChar *
2485s390_irgen_ALR(UChar r1, UChar r2)
2486{
2487 IRTemp op1 = newTemp(Ity_I32);
2488 IRTemp op2 = newTemp(Ity_I32);
2489 IRTemp result = newTemp(Ity_I32);
2490
2491 assign(op1, get_gpr_w1(r1));
2492 assign(op2, get_gpr_w1(r2));
2493 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2494 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2495 put_gpr_w1(r1, mkexpr(result));
2496
2497 return "alr";
2498}
2499
2500static HChar *
2501s390_irgen_ALGR(UChar r1, UChar r2)
2502{
2503 IRTemp op1 = newTemp(Ity_I64);
2504 IRTemp op2 = newTemp(Ity_I64);
2505 IRTemp result = newTemp(Ity_I64);
2506
2507 assign(op1, get_gpr_dw0(r1));
2508 assign(op2, get_gpr_dw0(r2));
2509 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2510 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2511 put_gpr_dw0(r1, mkexpr(result));
2512
2513 return "algr";
2514}
2515
2516static HChar *
2517s390_irgen_ALGFR(UChar r1, UChar r2)
2518{
2519 IRTemp op1 = newTemp(Ity_I64);
2520 IRTemp op2 = newTemp(Ity_I64);
2521 IRTemp result = newTemp(Ity_I64);
2522
2523 assign(op1, get_gpr_dw0(r1));
2524 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2525 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2526 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2527 put_gpr_dw0(r1, mkexpr(result));
2528
2529 return "algfr";
2530}
2531
2532static HChar *
2533s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2534{
2535 IRTemp op2 = newTemp(Ity_I32);
2536 IRTemp op3 = newTemp(Ity_I32);
2537 IRTemp result = newTemp(Ity_I32);
2538
2539 assign(op2, get_gpr_w1(r2));
2540 assign(op3, get_gpr_w1(r3));
2541 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2542 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2543 put_gpr_w1(r1, mkexpr(result));
2544
2545 return "alrk";
2546}
2547
2548static HChar *
2549s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2550{
2551 IRTemp op2 = newTemp(Ity_I64);
2552 IRTemp op3 = newTemp(Ity_I64);
2553 IRTemp result = newTemp(Ity_I64);
2554
2555 assign(op2, get_gpr_dw0(r2));
2556 assign(op3, get_gpr_dw0(r3));
2557 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2558 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2559 put_gpr_dw0(r1, mkexpr(result));
2560
2561 return "algrk";
2562}
2563
2564static HChar *
2565s390_irgen_AL(UChar r1, IRTemp op2addr)
2566{
2567 IRTemp op1 = newTemp(Ity_I32);
2568 IRTemp op2 = newTemp(Ity_I32);
2569 IRTemp result = newTemp(Ity_I32);
2570
2571 assign(op1, get_gpr_w1(r1));
2572 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2573 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2574 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2575 put_gpr_w1(r1, mkexpr(result));
2576
2577 return "al";
2578}
2579
2580static HChar *
2581s390_irgen_ALY(UChar r1, IRTemp op2addr)
2582{
2583 IRTemp op1 = newTemp(Ity_I32);
2584 IRTemp op2 = newTemp(Ity_I32);
2585 IRTemp result = newTemp(Ity_I32);
2586
2587 assign(op1, get_gpr_w1(r1));
2588 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2589 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2590 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2591 put_gpr_w1(r1, mkexpr(result));
2592
2593 return "aly";
2594}
2595
2596static HChar *
2597s390_irgen_ALG(UChar r1, IRTemp op2addr)
2598{
2599 IRTemp op1 = newTemp(Ity_I64);
2600 IRTemp op2 = newTemp(Ity_I64);
2601 IRTemp result = newTemp(Ity_I64);
2602
2603 assign(op1, get_gpr_dw0(r1));
2604 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2605 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2606 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2607 put_gpr_dw0(r1, mkexpr(result));
2608
2609 return "alg";
2610}
2611
2612static HChar *
2613s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2614{
2615 IRTemp op1 = newTemp(Ity_I64);
2616 IRTemp op2 = newTemp(Ity_I64);
2617 IRTemp result = newTemp(Ity_I64);
2618
2619 assign(op1, get_gpr_dw0(r1));
2620 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2621 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2622 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2623 put_gpr_dw0(r1, mkexpr(result));
2624
2625 return "algf";
2626}
2627
2628static HChar *
2629s390_irgen_ALFI(UChar r1, UInt i2)
2630{
2631 IRTemp op1 = newTemp(Ity_I32);
2632 UInt op2;
2633 IRTemp result = newTemp(Ity_I32);
2634
2635 assign(op1, get_gpr_w1(r1));
2636 op2 = i2;
2637 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2638 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2639 mkU32(op2)));
2640 put_gpr_w1(r1, mkexpr(result));
2641
2642 return "alfi";
2643}
2644
2645static HChar *
2646s390_irgen_ALGFI(UChar r1, UInt i2)
2647{
2648 IRTemp op1 = newTemp(Ity_I64);
2649 ULong op2;
2650 IRTemp result = newTemp(Ity_I64);
2651
2652 assign(op1, get_gpr_dw0(r1));
2653 op2 = (ULong)i2;
2654 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2655 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2656 mkU64(op2)));
2657 put_gpr_dw0(r1, mkexpr(result));
2658
2659 return "algfi";
2660}
2661
2662static HChar *
2663s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2664{
2665 IRTemp op2 = newTemp(Ity_I32);
2666 IRTemp op3 = newTemp(Ity_I32);
2667 IRTemp result = newTemp(Ity_I32);
2668
2669 assign(op2, get_gpr_w0(r2));
2670 assign(op3, get_gpr_w0(r3));
2671 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2672 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2673 put_gpr_w0(r1, mkexpr(result));
2674
2675 return "alhhhr";
2676}
2677
2678static HChar *
2679s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2680{
2681 IRTemp op2 = newTemp(Ity_I32);
2682 IRTemp op3 = newTemp(Ity_I32);
2683 IRTemp result = newTemp(Ity_I32);
2684
2685 assign(op2, get_gpr_w0(r2));
2686 assign(op3, get_gpr_w1(r3));
2687 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2688 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2689 put_gpr_w0(r1, mkexpr(result));
2690
2691 return "alhhlr";
2692}
2693
2694static HChar *
2695s390_irgen_ALCR(UChar r1, UChar r2)
2696{
2697 IRTemp op1 = newTemp(Ity_I32);
2698 IRTemp op2 = newTemp(Ity_I32);
2699 IRTemp result = newTemp(Ity_I32);
2700 IRTemp carry_in = newTemp(Ity_I32);
2701
2702 assign(op1, get_gpr_w1(r1));
2703 assign(op2, get_gpr_w1(r2));
2704 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2705 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2706 mkexpr(carry_in)));
2707 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2708 put_gpr_w1(r1, mkexpr(result));
2709
2710 return "alcr";
2711}
2712
2713static HChar *
2714s390_irgen_ALCGR(UChar r1, UChar r2)
2715{
2716 IRTemp op1 = newTemp(Ity_I64);
2717 IRTemp op2 = newTemp(Ity_I64);
2718 IRTemp result = newTemp(Ity_I64);
2719 IRTemp carry_in = newTemp(Ity_I64);
2720
2721 assign(op1, get_gpr_dw0(r1));
2722 assign(op2, get_gpr_dw0(r2));
2723 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2724 mkU8(1))));
2725 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2726 mkexpr(carry_in)));
2727 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2728 put_gpr_dw0(r1, mkexpr(result));
2729
2730 return "alcgr";
2731}
2732
2733static HChar *
2734s390_irgen_ALC(UChar r1, IRTemp op2addr)
2735{
2736 IRTemp op1 = newTemp(Ity_I32);
2737 IRTemp op2 = newTemp(Ity_I32);
2738 IRTemp result = newTemp(Ity_I32);
2739 IRTemp carry_in = newTemp(Ity_I32);
2740
2741 assign(op1, get_gpr_w1(r1));
2742 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2743 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2744 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2745 mkexpr(carry_in)));
2746 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2747 put_gpr_w1(r1, mkexpr(result));
2748
2749 return "alc";
2750}
2751
2752static HChar *
2753s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2754{
2755 IRTemp op1 = newTemp(Ity_I64);
2756 IRTemp op2 = newTemp(Ity_I64);
2757 IRTemp result = newTemp(Ity_I64);
2758 IRTemp carry_in = newTemp(Ity_I64);
2759
2760 assign(op1, get_gpr_dw0(r1));
2761 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2762 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2763 mkU8(1))));
2764 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2765 mkexpr(carry_in)));
2766 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2767 put_gpr_dw0(r1, mkexpr(result));
2768
2769 return "alcg";
2770}
2771
2772static HChar *
2773s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2774{
2775 IRTemp op1 = newTemp(Ity_I32);
2776 UInt op2;
2777 IRTemp result = newTemp(Ity_I32);
2778
2779 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2780 op2 = (UInt)(Int)(Char)i2;
2781 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2782 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2783 mkU32(op2)));
2784 store(mkexpr(op1addr), mkexpr(result));
2785
2786 return "alsi";
2787}
2788
2789static HChar *
2790s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2791{
2792 IRTemp op1 = newTemp(Ity_I64);
2793 ULong op2;
2794 IRTemp result = newTemp(Ity_I64);
2795
2796 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2797 op2 = (ULong)(Long)(Char)i2;
2798 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2799 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2800 mkU64(op2)));
2801 store(mkexpr(op1addr), mkexpr(result));
2802
2803 return "algsi";
2804}
2805
2806static HChar *
2807s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2808{
2809 UInt op2;
2810 IRTemp op3 = newTemp(Ity_I32);
2811 IRTemp result = newTemp(Ity_I32);
2812
2813 op2 = (UInt)(Int)(Short)i2;
2814 assign(op3, get_gpr_w1(r3));
2815 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2816 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2817 op3);
2818 put_gpr_w1(r1, mkexpr(result));
2819
2820 return "alhsik";
2821}
2822
2823static HChar *
2824s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2825{
2826 ULong op2;
2827 IRTemp op3 = newTemp(Ity_I64);
2828 IRTemp result = newTemp(Ity_I64);
2829
2830 op2 = (ULong)(Long)(Short)i2;
2831 assign(op3, get_gpr_dw0(r3));
2832 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2833 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2834 op3);
2835 put_gpr_dw0(r1, mkexpr(result));
2836
2837 return "alghsik";
2838}
2839
2840static HChar *
2841s390_irgen_ALSIH(UChar r1, UInt i2)
2842{
2843 IRTemp op1 = newTemp(Ity_I32);
2844 UInt op2;
2845 IRTemp result = newTemp(Ity_I32);
2846
2847 assign(op1, get_gpr_w0(r1));
2848 op2 = i2;
2849 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2850 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2851 mkU32(op2)));
2852 put_gpr_w0(r1, mkexpr(result));
2853
2854 return "alsih";
2855}
2856
2857static HChar *
2858s390_irgen_ALSIHN(UChar r1, UInt i2)
2859{
2860 IRTemp op1 = newTemp(Ity_I32);
2861 UInt op2;
2862 IRTemp result = newTemp(Ity_I32);
2863
2864 assign(op1, get_gpr_w0(r1));
2865 op2 = i2;
2866 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2867 put_gpr_w0(r1, mkexpr(result));
2868
2869 return "alsihn";
2870}
2871
2872static HChar *
2873s390_irgen_NR(UChar r1, UChar r2)
2874{
2875 IRTemp op1 = newTemp(Ity_I32);
2876 IRTemp op2 = newTemp(Ity_I32);
2877 IRTemp result = newTemp(Ity_I32);
2878
2879 assign(op1, get_gpr_w1(r1));
2880 assign(op2, get_gpr_w1(r2));
2881 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2882 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2883 put_gpr_w1(r1, mkexpr(result));
2884
2885 return "nr";
2886}
2887
2888static HChar *
2889s390_irgen_NGR(UChar r1, UChar r2)
2890{
2891 IRTemp op1 = newTemp(Ity_I64);
2892 IRTemp op2 = newTemp(Ity_I64);
2893 IRTemp result = newTemp(Ity_I64);
2894
2895 assign(op1, get_gpr_dw0(r1));
2896 assign(op2, get_gpr_dw0(r2));
2897 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2898 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2899 put_gpr_dw0(r1, mkexpr(result));
2900
2901 return "ngr";
2902}
2903
2904static HChar *
2905s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2906{
2907 IRTemp op2 = newTemp(Ity_I32);
2908 IRTemp op3 = newTemp(Ity_I32);
2909 IRTemp result = newTemp(Ity_I32);
2910
2911 assign(op2, get_gpr_w1(r2));
2912 assign(op3, get_gpr_w1(r3));
2913 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2914 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2915 put_gpr_w1(r1, mkexpr(result));
2916
2917 return "nrk";
2918}
2919
2920static HChar *
2921s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2922{
2923 IRTemp op2 = newTemp(Ity_I64);
2924 IRTemp op3 = newTemp(Ity_I64);
2925 IRTemp result = newTemp(Ity_I64);
2926
2927 assign(op2, get_gpr_dw0(r2));
2928 assign(op3, get_gpr_dw0(r3));
2929 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2930 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2931 put_gpr_dw0(r1, mkexpr(result));
2932
2933 return "ngrk";
2934}
2935
2936static HChar *
2937s390_irgen_N(UChar r1, IRTemp op2addr)
2938{
2939 IRTemp op1 = newTemp(Ity_I32);
2940 IRTemp op2 = newTemp(Ity_I32);
2941 IRTemp result = newTemp(Ity_I32);
2942
2943 assign(op1, get_gpr_w1(r1));
2944 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2945 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2946 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2947 put_gpr_w1(r1, mkexpr(result));
2948
2949 return "n";
2950}
2951
2952static HChar *
2953s390_irgen_NY(UChar r1, IRTemp op2addr)
2954{
2955 IRTemp op1 = newTemp(Ity_I32);
2956 IRTemp op2 = newTemp(Ity_I32);
2957 IRTemp result = newTemp(Ity_I32);
2958
2959 assign(op1, get_gpr_w1(r1));
2960 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2961 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2962 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2963 put_gpr_w1(r1, mkexpr(result));
2964
2965 return "ny";
2966}
2967
2968static HChar *
2969s390_irgen_NG(UChar r1, IRTemp op2addr)
2970{
2971 IRTemp op1 = newTemp(Ity_I64);
2972 IRTemp op2 = newTemp(Ity_I64);
2973 IRTemp result = newTemp(Ity_I64);
2974
2975 assign(op1, get_gpr_dw0(r1));
2976 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2977 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2978 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2979 put_gpr_dw0(r1, mkexpr(result));
2980
2981 return "ng";
2982}
2983
2984static HChar *
2985s390_irgen_NI(UChar i2, IRTemp op1addr)
2986{
2987 IRTemp op1 = newTemp(Ity_I8);
2988 UChar op2;
2989 IRTemp result = newTemp(Ity_I8);
2990
2991 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2992 op2 = i2;
2993 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2994 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2995 store(mkexpr(op1addr), mkexpr(result));
2996
2997 return "ni";
2998}
2999
3000static HChar *
3001s390_irgen_NIY(UChar i2, IRTemp op1addr)
3002{
3003 IRTemp op1 = newTemp(Ity_I8);
3004 UChar op2;
3005 IRTemp result = newTemp(Ity_I8);
3006
3007 assign(op1, load(Ity_I8, mkexpr(op1addr)));
3008 op2 = i2;
3009 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
3010 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3011 store(mkexpr(op1addr), mkexpr(result));
3012
3013 return "niy";
3014}
3015
3016static HChar *
3017s390_irgen_NIHF(UChar r1, UInt i2)
3018{
3019 IRTemp op1 = newTemp(Ity_I32);
3020 UInt op2;
3021 IRTemp result = newTemp(Ity_I32);
3022
3023 assign(op1, get_gpr_w0(r1));
3024 op2 = i2;
3025 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3026 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3027 put_gpr_w0(r1, mkexpr(result));
3028
3029 return "nihf";
3030}
3031
3032static HChar *
3033s390_irgen_NIHH(UChar r1, UShort i2)
3034{
3035 IRTemp op1 = newTemp(Ity_I16);
3036 UShort op2;
3037 IRTemp result = newTemp(Ity_I16);
3038
3039 assign(op1, get_gpr_hw0(r1));
3040 op2 = i2;
3041 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3042 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3043 put_gpr_hw0(r1, mkexpr(result));
3044
3045 return "nihh";
3046}
3047
3048static HChar *
3049s390_irgen_NIHL(UChar r1, UShort i2)
3050{
3051 IRTemp op1 = newTemp(Ity_I16);
3052 UShort op2;
3053 IRTemp result = newTemp(Ity_I16);
3054
3055 assign(op1, get_gpr_hw1(r1));
3056 op2 = i2;
3057 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3058 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3059 put_gpr_hw1(r1, mkexpr(result));
3060
3061 return "nihl";
3062}
3063
3064static HChar *
3065s390_irgen_NILF(UChar r1, UInt i2)
3066{
3067 IRTemp op1 = newTemp(Ity_I32);
3068 UInt op2;
3069 IRTemp result = newTemp(Ity_I32);
3070
3071 assign(op1, get_gpr_w1(r1));
3072 op2 = i2;
3073 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3074 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3075 put_gpr_w1(r1, mkexpr(result));
3076
3077 return "nilf";
3078}
3079
3080static HChar *
3081s390_irgen_NILH(UChar r1, UShort i2)
3082{
3083 IRTemp op1 = newTemp(Ity_I16);
3084 UShort op2;
3085 IRTemp result = newTemp(Ity_I16);
3086
3087 assign(op1, get_gpr_hw2(r1));
3088 op2 = i2;
3089 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3090 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3091 put_gpr_hw2(r1, mkexpr(result));
3092
3093 return "nilh";
3094}
3095
3096static HChar *
3097s390_irgen_NILL(UChar r1, UShort i2)
3098{
3099 IRTemp op1 = newTemp(Ity_I16);
3100 UShort op2;
3101 IRTemp result = newTemp(Ity_I16);
3102
3103 assign(op1, get_gpr_hw3(r1));
3104 op2 = i2;
3105 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3106 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3107 put_gpr_hw3(r1, mkexpr(result));
3108
3109 return "nill";
3110}
3111
3112static HChar *
3113s390_irgen_BASR(UChar r1, UChar r2)
3114{
3115 IRTemp target = newTemp(Ity_I64);
3116
3117 if (r2 == 0) {
3118 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3119 } else {
3120 if (r1 != r2) {
3121 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3122 call_function(get_gpr_dw0(r2));
3123 } else {
3124 assign(target, get_gpr_dw0(r2));
3125 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3126 call_function(mkexpr(target));
3127 }
3128 }
3129
3130 return "basr";
3131}
3132
3133static HChar *
3134s390_irgen_BAS(UChar r1, IRTemp op2addr)
3135{
3136 IRTemp target = newTemp(Ity_I64);
3137
3138 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3139 assign(target, mkexpr(op2addr));
3140 call_function(mkexpr(target));
3141
3142 return "bas";
3143}
3144
3145static HChar *
3146s390_irgen_BCR(UChar r1, UChar r2)
3147{
3148 IRTemp cond = newTemp(Ity_I32);
3149
sewardja52e37e2011-04-28 18:48:06 +00003150 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3151 stmt(IRStmt_MBE(Imbe_Fence));
3152 }
3153
sewardj2019a972011-03-07 16:04:07 +00003154 if ((r2 == 0) || (r1 == 0)) {
3155 } else {
3156 if (r1 == 15) {
3157 return_from_function(get_gpr_dw0(r2));
3158 } else {
3159 assign(cond, s390_call_calculate_cond(r1));
3160 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3161 mkU32(0)), get_gpr_dw0(r2));
3162 }
3163 }
sewardj7ee97522011-05-09 21:45:04 +00003164 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003165 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3166
3167 return "bcr";
3168}
3169
3170static HChar *
3171s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3172{
3173 IRTemp cond = newTemp(Ity_I32);
3174
3175 if (r1 == 0) {
3176 } else {
3177 if (r1 == 15) {
3178 always_goto(mkexpr(op2addr));
3179 } else {
3180 assign(cond, s390_call_calculate_cond(r1));
3181 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3182 mkU32(0)), mkexpr(op2addr));
3183 }
3184 }
sewardj7ee97522011-05-09 21:45:04 +00003185 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003186 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3187
3188 return "bc";
3189}
3190
3191static HChar *
3192s390_irgen_BCTR(UChar r1, UChar r2)
3193{
3194 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3195 if (r2 != 0) {
3196 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3197 ), get_gpr_dw0(r2));
3198 }
3199
3200 return "bctr";
3201}
3202
3203static HChar *
3204s390_irgen_BCTGR(UChar r1, UChar r2)
3205{
3206 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3207 if (r2 != 0) {
3208 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3209 mkU64(0)), get_gpr_dw0(r2));
3210 }
3211
3212 return "bctgr";
3213}
3214
3215static HChar *
3216s390_irgen_BCT(UChar r1, IRTemp op2addr)
3217{
3218 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3219 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3220 mkexpr(op2addr));
3221
3222 return "bct";
3223}
3224
3225static HChar *
3226s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3227{
3228 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3229 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3230 mkexpr(op2addr));
3231
3232 return "bctg";
3233}
3234
3235static HChar *
3236s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3237{
3238 IRTemp value = newTemp(Ity_I32);
3239
3240 assign(value, get_gpr_w1(r3 | 1));
3241 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3242 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3243 mkexpr(value)), mkexpr(op2addr));
3244
3245 return "bxh";
3246}
3247
3248static HChar *
3249s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3250{
3251 IRTemp value = newTemp(Ity_I64);
3252
3253 assign(value, get_gpr_dw0(r3 | 1));
3254 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3255 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3256 mkexpr(value)), mkexpr(op2addr));
3257
3258 return "bxhg";
3259}
3260
3261static HChar *
3262s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3263{
3264 IRTemp value = newTemp(Ity_I32);
3265
3266 assign(value, get_gpr_w1(r3 | 1));
3267 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3268 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3269 get_gpr_w1(r1)), mkexpr(op2addr));
3270
3271 return "bxle";
3272}
3273
3274static HChar *
3275s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3276{
3277 IRTemp value = newTemp(Ity_I64);
3278
3279 assign(value, get_gpr_dw0(r3 | 1));
3280 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3281 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3282 get_gpr_dw0(r1)), mkexpr(op2addr));
3283
3284 return "bxleg";
3285}
3286
3287static HChar *
3288s390_irgen_BRAS(UChar r1, UShort i2)
3289{
3290 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003291 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003292
3293 return "bras";
3294}
3295
3296static HChar *
3297s390_irgen_BRASL(UChar r1, UInt i2)
3298{
3299 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003300 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003301
3302 return "brasl";
3303}
3304
3305static HChar *
3306s390_irgen_BRC(UChar r1, UShort i2)
3307{
3308 IRTemp cond = newTemp(Ity_I32);
3309
3310 if (r1 == 0) {
3311 } else {
3312 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003313 always_goto_and_chase(
3314 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003315 } else {
3316 assign(cond, s390_call_calculate_cond(r1));
3317 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3318 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3319
3320 }
3321 }
sewardj7ee97522011-05-09 21:45:04 +00003322 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003323 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3324
3325 return "brc";
3326}
3327
3328static HChar *
3329s390_irgen_BRCL(UChar r1, UInt i2)
3330{
3331 IRTemp cond = newTemp(Ity_I32);
3332
3333 if (r1 == 0) {
3334 } else {
3335 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003336 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003337 } else {
3338 assign(cond, s390_call_calculate_cond(r1));
3339 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3340 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3341 }
3342 }
sewardj7ee97522011-05-09 21:45:04 +00003343 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003344 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3345
3346 return "brcl";
3347}
3348
3349static HChar *
3350s390_irgen_BRCT(UChar r1, UShort i2)
3351{
3352 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3353 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3354 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3355
3356 return "brct";
3357}
3358
3359static HChar *
3360s390_irgen_BRCTG(UChar r1, UShort i2)
3361{
3362 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3363 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3364 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3365
3366 return "brctg";
3367}
3368
3369static HChar *
3370s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3371{
3372 IRTemp value = newTemp(Ity_I32);
3373
3374 assign(value, get_gpr_w1(r3 | 1));
3375 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3376 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3377 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3378
3379 return "brxh";
3380}
3381
3382static HChar *
3383s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3384{
3385 IRTemp value = newTemp(Ity_I64);
3386
3387 assign(value, get_gpr_dw0(r3 | 1));
3388 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3389 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3390 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3391
3392 return "brxhg";
3393}
3394
3395static HChar *
3396s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3397{
3398 IRTemp value = newTemp(Ity_I32);
3399
3400 assign(value, get_gpr_w1(r3 | 1));
3401 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3402 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3403 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3404
3405 return "brxle";
3406}
3407
3408static HChar *
3409s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3410{
3411 IRTemp value = newTemp(Ity_I64);
3412
3413 assign(value, get_gpr_dw0(r3 | 1));
3414 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3415 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3416 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3417
3418 return "brxlg";
3419}
3420
3421static HChar *
3422s390_irgen_CR(UChar r1, UChar r2)
3423{
3424 IRTemp op1 = newTemp(Ity_I32);
3425 IRTemp op2 = newTemp(Ity_I32);
3426
3427 assign(op1, get_gpr_w1(r1));
3428 assign(op2, get_gpr_w1(r2));
3429 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3430
3431 return "cr";
3432}
3433
3434static HChar *
3435s390_irgen_CGR(UChar r1, UChar r2)
3436{
3437 IRTemp op1 = newTemp(Ity_I64);
3438 IRTemp op2 = newTemp(Ity_I64);
3439
3440 assign(op1, get_gpr_dw0(r1));
3441 assign(op2, get_gpr_dw0(r2));
3442 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3443
3444 return "cgr";
3445}
3446
3447static HChar *
3448s390_irgen_CGFR(UChar r1, UChar r2)
3449{
3450 IRTemp op1 = newTemp(Ity_I64);
3451 IRTemp op2 = newTemp(Ity_I64);
3452
3453 assign(op1, get_gpr_dw0(r1));
3454 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3455 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3456
3457 return "cgfr";
3458}
3459
3460static HChar *
3461s390_irgen_C(UChar r1, IRTemp op2addr)
3462{
3463 IRTemp op1 = newTemp(Ity_I32);
3464 IRTemp op2 = newTemp(Ity_I32);
3465
3466 assign(op1, get_gpr_w1(r1));
3467 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3468 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3469
3470 return "c";
3471}
3472
3473static HChar *
3474s390_irgen_CY(UChar r1, IRTemp op2addr)
3475{
3476 IRTemp op1 = newTemp(Ity_I32);
3477 IRTemp op2 = newTemp(Ity_I32);
3478
3479 assign(op1, get_gpr_w1(r1));
3480 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3481 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3482
3483 return "cy";
3484}
3485
3486static HChar *
3487s390_irgen_CG(UChar r1, IRTemp op2addr)
3488{
3489 IRTemp op1 = newTemp(Ity_I64);
3490 IRTemp op2 = newTemp(Ity_I64);
3491
3492 assign(op1, get_gpr_dw0(r1));
3493 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3494 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3495
3496 return "cg";
3497}
3498
3499static HChar *
3500s390_irgen_CGF(UChar r1, IRTemp op2addr)
3501{
3502 IRTemp op1 = newTemp(Ity_I64);
3503 IRTemp op2 = newTemp(Ity_I64);
3504
3505 assign(op1, get_gpr_dw0(r1));
3506 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3507 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3508
3509 return "cgf";
3510}
3511
3512static HChar *
3513s390_irgen_CFI(UChar r1, UInt i2)
3514{
3515 IRTemp op1 = newTemp(Ity_I32);
3516 Int op2;
3517
3518 assign(op1, get_gpr_w1(r1));
3519 op2 = (Int)i2;
3520 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3521 mkU32((UInt)op2)));
3522
3523 return "cfi";
3524}
3525
3526static HChar *
3527s390_irgen_CGFI(UChar r1, UInt i2)
3528{
3529 IRTemp op1 = newTemp(Ity_I64);
3530 Long op2;
3531
3532 assign(op1, get_gpr_dw0(r1));
3533 op2 = (Long)(Int)i2;
3534 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3535 mkU64((ULong)op2)));
3536
3537 return "cgfi";
3538}
3539
3540static HChar *
3541s390_irgen_CRL(UChar r1, UInt i2)
3542{
3543 IRTemp op1 = newTemp(Ity_I32);
3544 IRTemp op2 = newTemp(Ity_I32);
3545
3546 assign(op1, get_gpr_w1(r1));
3547 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3548 i2 << 1))));
3549 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3550
3551 return "crl";
3552}
3553
3554static HChar *
3555s390_irgen_CGRL(UChar r1, UInt i2)
3556{
3557 IRTemp op1 = newTemp(Ity_I64);
3558 IRTemp op2 = newTemp(Ity_I64);
3559
3560 assign(op1, get_gpr_dw0(r1));
3561 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3562 i2 << 1))));
3563 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3564
3565 return "cgrl";
3566}
3567
3568static HChar *
3569s390_irgen_CGFRL(UChar r1, UInt i2)
3570{
3571 IRTemp op1 = newTemp(Ity_I64);
3572 IRTemp op2 = newTemp(Ity_I64);
3573
3574 assign(op1, get_gpr_dw0(r1));
3575 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3576 ((ULong)(Long)(Int)i2 << 1)))));
3577 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3578
3579 return "cgfrl";
3580}
3581
3582static HChar *
3583s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3584{
3585 IRTemp op1 = newTemp(Ity_I32);
3586 IRTemp op2 = newTemp(Ity_I32);
3587 IRTemp icc = newTemp(Ity_I32);
3588 IRTemp cond = newTemp(Ity_I32);
3589
3590 if (m3 == 0) {
3591 } else {
3592 if (m3 == 14) {
3593 always_goto(mkexpr(op4addr));
3594 } else {
3595 assign(op1, get_gpr_w1(r1));
3596 assign(op2, get_gpr_w1(r2));
3597 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3598 op2));
3599 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3600 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3601 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3602 mkU32(0)), mkexpr(op4addr));
3603 }
3604 }
3605
3606 return "crb";
3607}
3608
3609static HChar *
3610s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3611{
3612 IRTemp op1 = newTemp(Ity_I64);
3613 IRTemp op2 = newTemp(Ity_I64);
3614 IRTemp icc = newTemp(Ity_I32);
3615 IRTemp cond = newTemp(Ity_I32);
3616
3617 if (m3 == 0) {
3618 } else {
3619 if (m3 == 14) {
3620 always_goto(mkexpr(op4addr));
3621 } else {
3622 assign(op1, get_gpr_dw0(r1));
3623 assign(op2, get_gpr_dw0(r2));
3624 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3625 op2));
3626 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3627 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3628 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3629 mkU32(0)), mkexpr(op4addr));
3630 }
3631 }
3632
3633 return "cgrb";
3634}
3635
3636static HChar *
3637s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3638{
3639 IRTemp op1 = newTemp(Ity_I32);
3640 IRTemp op2 = newTemp(Ity_I32);
3641 IRTemp icc = newTemp(Ity_I32);
3642 IRTemp cond = newTemp(Ity_I32);
3643
3644 if (m3 == 0) {
3645 } else {
3646 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003647 always_goto_and_chase(
3648 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003649 } else {
3650 assign(op1, get_gpr_w1(r1));
3651 assign(op2, get_gpr_w1(r2));
3652 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3653 op2));
3654 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3655 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3656 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3657 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3658
3659 }
3660 }
3661
3662 return "crj";
3663}
3664
3665static HChar *
3666s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3667{
3668 IRTemp op1 = newTemp(Ity_I64);
3669 IRTemp op2 = newTemp(Ity_I64);
3670 IRTemp icc = newTemp(Ity_I32);
3671 IRTemp cond = newTemp(Ity_I32);
3672
3673 if (m3 == 0) {
3674 } else {
3675 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003676 always_goto_and_chase(
3677 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003678 } else {
3679 assign(op1, get_gpr_dw0(r1));
3680 assign(op2, get_gpr_dw0(r2));
3681 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3682 op2));
3683 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3684 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3685 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3686 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3687
3688 }
3689 }
3690
3691 return "cgrj";
3692}
3693
3694static HChar *
3695s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3696{
3697 IRTemp op1 = newTemp(Ity_I32);
3698 Int op2;
3699 IRTemp icc = newTemp(Ity_I32);
3700 IRTemp cond = newTemp(Ity_I32);
3701
3702 if (m3 == 0) {
3703 } else {
3704 if (m3 == 14) {
3705 always_goto(mkexpr(op4addr));
3706 } else {
3707 assign(op1, get_gpr_w1(r1));
3708 op2 = (Int)(Char)i2;
3709 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3710 mktemp(Ity_I32, mkU32((UInt)op2))));
3711 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3712 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3713 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3714 mkU32(0)), mkexpr(op4addr));
3715 }
3716 }
3717
3718 return "cib";
3719}
3720
3721static HChar *
3722s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3723{
3724 IRTemp op1 = newTemp(Ity_I64);
3725 Long op2;
3726 IRTemp icc = newTemp(Ity_I32);
3727 IRTemp cond = newTemp(Ity_I32);
3728
3729 if (m3 == 0) {
3730 } else {
3731 if (m3 == 14) {
3732 always_goto(mkexpr(op4addr));
3733 } else {
3734 assign(op1, get_gpr_dw0(r1));
3735 op2 = (Long)(Char)i2;
3736 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3737 mktemp(Ity_I64, mkU64((ULong)op2))));
3738 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3739 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3740 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3741 mkU32(0)), mkexpr(op4addr));
3742 }
3743 }
3744
3745 return "cgib";
3746}
3747
3748static HChar *
3749s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3750{
3751 IRTemp op1 = newTemp(Ity_I32);
3752 Int op2;
3753 IRTemp icc = newTemp(Ity_I32);
3754 IRTemp cond = newTemp(Ity_I32);
3755
3756 if (m3 == 0) {
3757 } else {
3758 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003759 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003760 } else {
3761 assign(op1, get_gpr_w1(r1));
3762 op2 = (Int)(Char)i2;
3763 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3764 mktemp(Ity_I32, mkU32((UInt)op2))));
3765 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3766 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3767 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3768 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3769
3770 }
3771 }
3772
3773 return "cij";
3774}
3775
3776static HChar *
3777s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3778{
3779 IRTemp op1 = newTemp(Ity_I64);
3780 Long op2;
3781 IRTemp icc = newTemp(Ity_I32);
3782 IRTemp cond = newTemp(Ity_I32);
3783
3784 if (m3 == 0) {
3785 } else {
3786 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003787 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003788 } else {
3789 assign(op1, get_gpr_dw0(r1));
3790 op2 = (Long)(Char)i2;
3791 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3792 mktemp(Ity_I64, mkU64((ULong)op2))));
3793 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3794 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3795 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3796 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3797
3798 }
3799 }
3800
3801 return "cgij";
3802}
3803
3804static HChar *
3805s390_irgen_CH(UChar r1, IRTemp op2addr)
3806{
3807 IRTemp op1 = newTemp(Ity_I32);
3808 IRTemp op2 = newTemp(Ity_I32);
3809
3810 assign(op1, get_gpr_w1(r1));
3811 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3812 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3813
3814 return "ch";
3815}
3816
3817static HChar *
3818s390_irgen_CHY(UChar r1, IRTemp op2addr)
3819{
3820 IRTemp op1 = newTemp(Ity_I32);
3821 IRTemp op2 = newTemp(Ity_I32);
3822
3823 assign(op1, get_gpr_w1(r1));
3824 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3825 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3826
3827 return "chy";
3828}
3829
3830static HChar *
3831s390_irgen_CGH(UChar r1, IRTemp op2addr)
3832{
3833 IRTemp op1 = newTemp(Ity_I64);
3834 IRTemp op2 = newTemp(Ity_I64);
3835
3836 assign(op1, get_gpr_dw0(r1));
3837 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3838 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3839
3840 return "cgh";
3841}
3842
3843static HChar *
3844s390_irgen_CHI(UChar r1, UShort i2)
3845{
3846 IRTemp op1 = newTemp(Ity_I32);
3847 Int op2;
3848
3849 assign(op1, get_gpr_w1(r1));
3850 op2 = (Int)(Short)i2;
3851 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3852 mkU32((UInt)op2)));
3853
3854 return "chi";
3855}
3856
3857static HChar *
3858s390_irgen_CGHI(UChar r1, UShort i2)
3859{
3860 IRTemp op1 = newTemp(Ity_I64);
3861 Long op2;
3862
3863 assign(op1, get_gpr_dw0(r1));
3864 op2 = (Long)(Short)i2;
3865 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3866 mkU64((ULong)op2)));
3867
3868 return "cghi";
3869}
3870
3871static HChar *
3872s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3873{
3874 IRTemp op1 = newTemp(Ity_I16);
3875 Short op2;
3876
3877 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3878 op2 = (Short)i2;
3879 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3880 mkU16((UShort)op2)));
3881
3882 return "chhsi";
3883}
3884
3885static HChar *
3886s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3887{
3888 IRTemp op1 = newTemp(Ity_I32);
3889 Int op2;
3890
3891 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3892 op2 = (Int)(Short)i2;
3893 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3894 mkU32((UInt)op2)));
3895
3896 return "chsi";
3897}
3898
3899static HChar *
3900s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3901{
3902 IRTemp op1 = newTemp(Ity_I64);
3903 Long op2;
3904
3905 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3906 op2 = (Long)(Short)i2;
3907 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3908 mkU64((ULong)op2)));
3909
3910 return "cghsi";
3911}
3912
3913static HChar *
3914s390_irgen_CHRL(UChar r1, UInt i2)
3915{
3916 IRTemp op1 = newTemp(Ity_I32);
3917 IRTemp op2 = newTemp(Ity_I32);
3918
3919 assign(op1, get_gpr_w1(r1));
3920 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3921 ((ULong)(Long)(Int)i2 << 1)))));
3922 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3923
3924 return "chrl";
3925}
3926
3927static HChar *
3928s390_irgen_CGHRL(UChar r1, UInt i2)
3929{
3930 IRTemp op1 = newTemp(Ity_I64);
3931 IRTemp op2 = newTemp(Ity_I64);
3932
3933 assign(op1, get_gpr_dw0(r1));
3934 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3935 ((ULong)(Long)(Int)i2 << 1)))));
3936 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3937
3938 return "cghrl";
3939}
3940
3941static HChar *
3942s390_irgen_CHHR(UChar r1, UChar r2)
3943{
3944 IRTemp op1 = newTemp(Ity_I32);
3945 IRTemp op2 = newTemp(Ity_I32);
3946
3947 assign(op1, get_gpr_w0(r1));
3948 assign(op2, get_gpr_w0(r2));
3949 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3950
3951 return "chhr";
3952}
3953
3954static HChar *
3955s390_irgen_CHLR(UChar r1, UChar r2)
3956{
3957 IRTemp op1 = newTemp(Ity_I32);
3958 IRTemp op2 = newTemp(Ity_I32);
3959
3960 assign(op1, get_gpr_w0(r1));
3961 assign(op2, get_gpr_w1(r2));
3962 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3963
3964 return "chlr";
3965}
3966
3967static HChar *
3968s390_irgen_CHF(UChar r1, IRTemp op2addr)
3969{
3970 IRTemp op1 = newTemp(Ity_I32);
3971 IRTemp op2 = newTemp(Ity_I32);
3972
3973 assign(op1, get_gpr_w0(r1));
3974 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3975 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3976
3977 return "chf";
3978}
3979
3980static HChar *
3981s390_irgen_CIH(UChar r1, UInt i2)
3982{
3983 IRTemp op1 = newTemp(Ity_I32);
3984 Int op2;
3985
3986 assign(op1, get_gpr_w0(r1));
3987 op2 = (Int)i2;
3988 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3989 mkU32((UInt)op2)));
3990
3991 return "cih";
3992}
3993
3994static HChar *
3995s390_irgen_CLR(UChar r1, UChar r2)
3996{
3997 IRTemp op1 = newTemp(Ity_I32);
3998 IRTemp op2 = newTemp(Ity_I32);
3999
4000 assign(op1, get_gpr_w1(r1));
4001 assign(op2, get_gpr_w1(r2));
4002 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4003
4004 return "clr";
4005}
4006
4007static HChar *
4008s390_irgen_CLGR(UChar r1, UChar r2)
4009{
4010 IRTemp op1 = newTemp(Ity_I64);
4011 IRTemp op2 = newTemp(Ity_I64);
4012
4013 assign(op1, get_gpr_dw0(r1));
4014 assign(op2, get_gpr_dw0(r2));
4015 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4016
4017 return "clgr";
4018}
4019
4020static HChar *
4021s390_irgen_CLGFR(UChar r1, UChar r2)
4022{
4023 IRTemp op1 = newTemp(Ity_I64);
4024 IRTemp op2 = newTemp(Ity_I64);
4025
4026 assign(op1, get_gpr_dw0(r1));
4027 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
4028 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4029
4030 return "clgfr";
4031}
4032
4033static HChar *
4034s390_irgen_CL(UChar r1, IRTemp op2addr)
4035{
4036 IRTemp op1 = newTemp(Ity_I32);
4037 IRTemp op2 = newTemp(Ity_I32);
4038
4039 assign(op1, get_gpr_w1(r1));
4040 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4041 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4042
4043 return "cl";
4044}
4045
4046static HChar *
4047s390_irgen_CLY(UChar r1, IRTemp op2addr)
4048{
4049 IRTemp op1 = newTemp(Ity_I32);
4050 IRTemp op2 = newTemp(Ity_I32);
4051
4052 assign(op1, get_gpr_w1(r1));
4053 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4054 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4055
4056 return "cly";
4057}
4058
4059static HChar *
4060s390_irgen_CLG(UChar r1, IRTemp op2addr)
4061{
4062 IRTemp op1 = newTemp(Ity_I64);
4063 IRTemp op2 = newTemp(Ity_I64);
4064
4065 assign(op1, get_gpr_dw0(r1));
4066 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4067 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4068
4069 return "clg";
4070}
4071
4072static HChar *
4073s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4074{
4075 IRTemp op1 = newTemp(Ity_I64);
4076 IRTemp op2 = newTemp(Ity_I64);
4077
4078 assign(op1, get_gpr_dw0(r1));
4079 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4080 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4081
4082 return "clgf";
4083}
4084
4085static HChar *
4086s390_irgen_CLFI(UChar r1, UInt i2)
4087{
4088 IRTemp op1 = newTemp(Ity_I32);
4089 UInt op2;
4090
4091 assign(op1, get_gpr_w1(r1));
4092 op2 = i2;
4093 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4094 mkU32(op2)));
4095
4096 return "clfi";
4097}
4098
4099static HChar *
4100s390_irgen_CLGFI(UChar r1, UInt i2)
4101{
4102 IRTemp op1 = newTemp(Ity_I64);
4103 ULong op2;
4104
4105 assign(op1, get_gpr_dw0(r1));
4106 op2 = (ULong)i2;
4107 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4108 mkU64(op2)));
4109
4110 return "clgfi";
4111}
4112
4113static HChar *
4114s390_irgen_CLI(UChar i2, IRTemp op1addr)
4115{
4116 IRTemp op1 = newTemp(Ity_I8);
4117 UChar op2;
4118
4119 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4120 op2 = i2;
4121 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4122 mkU8(op2)));
4123
4124 return "cli";
4125}
4126
4127static HChar *
4128s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4129{
4130 IRTemp op1 = newTemp(Ity_I8);
4131 UChar op2;
4132
4133 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4134 op2 = i2;
4135 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4136 mkU8(op2)));
4137
4138 return "cliy";
4139}
4140
4141static HChar *
4142s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4143{
4144 IRTemp op1 = newTemp(Ity_I32);
4145 UInt op2;
4146
4147 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4148 op2 = (UInt)i2;
4149 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4150 mkU32(op2)));
4151
4152 return "clfhsi";
4153}
4154
4155static HChar *
4156s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4157{
4158 IRTemp op1 = newTemp(Ity_I64);
4159 ULong op2;
4160
4161 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4162 op2 = (ULong)i2;
4163 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4164 mkU64(op2)));
4165
4166 return "clghsi";
4167}
4168
4169static HChar *
4170s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4171{
4172 IRTemp op1 = newTemp(Ity_I16);
4173 UShort op2;
4174
4175 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4176 op2 = i2;
4177 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4178 mkU16(op2)));
4179
4180 return "clhhsi";
4181}
4182
4183static HChar *
4184s390_irgen_CLRL(UChar r1, UInt i2)
4185{
4186 IRTemp op1 = newTemp(Ity_I32);
4187 IRTemp op2 = newTemp(Ity_I32);
4188
4189 assign(op1, get_gpr_w1(r1));
4190 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4191 i2 << 1))));
4192 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4193
4194 return "clrl";
4195}
4196
4197static HChar *
4198s390_irgen_CLGRL(UChar r1, UInt i2)
4199{
4200 IRTemp op1 = newTemp(Ity_I64);
4201 IRTemp op2 = newTemp(Ity_I64);
4202
4203 assign(op1, get_gpr_dw0(r1));
4204 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4205 i2 << 1))));
4206 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4207
4208 return "clgrl";
4209}
4210
4211static HChar *
4212s390_irgen_CLGFRL(UChar r1, UInt i2)
4213{
4214 IRTemp op1 = newTemp(Ity_I64);
4215 IRTemp op2 = newTemp(Ity_I64);
4216
4217 assign(op1, get_gpr_dw0(r1));
4218 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4219 ((ULong)(Long)(Int)i2 << 1)))));
4220 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4221
4222 return "clgfrl";
4223}
4224
4225static HChar *
4226s390_irgen_CLHRL(UChar r1, UInt i2)
4227{
4228 IRTemp op1 = newTemp(Ity_I32);
4229 IRTemp op2 = newTemp(Ity_I32);
4230
4231 assign(op1, get_gpr_w1(r1));
4232 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4233 ((ULong)(Long)(Int)i2 << 1)))));
4234 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4235
4236 return "clhrl";
4237}
4238
4239static HChar *
4240s390_irgen_CLGHRL(UChar r1, UInt i2)
4241{
4242 IRTemp op1 = newTemp(Ity_I64);
4243 IRTemp op2 = newTemp(Ity_I64);
4244
4245 assign(op1, get_gpr_dw0(r1));
4246 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4247 ((ULong)(Long)(Int)i2 << 1)))));
4248 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4249
4250 return "clghrl";
4251}
4252
4253static HChar *
4254s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4255{
4256 IRTemp op1 = newTemp(Ity_I32);
4257 IRTemp op2 = newTemp(Ity_I32);
4258 IRTemp icc = newTemp(Ity_I32);
4259 IRTemp cond = newTemp(Ity_I32);
4260
4261 if (m3 == 0) {
4262 } else {
4263 if (m3 == 14) {
4264 always_goto(mkexpr(op4addr));
4265 } else {
4266 assign(op1, get_gpr_w1(r1));
4267 assign(op2, get_gpr_w1(r2));
4268 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4269 op2));
4270 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4271 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4272 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4273 mkU32(0)), mkexpr(op4addr));
4274 }
4275 }
4276
4277 return "clrb";
4278}
4279
4280static HChar *
4281s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4282{
4283 IRTemp op1 = newTemp(Ity_I64);
4284 IRTemp op2 = newTemp(Ity_I64);
4285 IRTemp icc = newTemp(Ity_I32);
4286 IRTemp cond = newTemp(Ity_I32);
4287
4288 if (m3 == 0) {
4289 } else {
4290 if (m3 == 14) {
4291 always_goto(mkexpr(op4addr));
4292 } else {
4293 assign(op1, get_gpr_dw0(r1));
4294 assign(op2, get_gpr_dw0(r2));
4295 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4296 op2));
4297 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4298 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4299 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4300 mkU32(0)), mkexpr(op4addr));
4301 }
4302 }
4303
4304 return "clgrb";
4305}
4306
4307static HChar *
4308s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4309{
4310 IRTemp op1 = newTemp(Ity_I32);
4311 IRTemp op2 = newTemp(Ity_I32);
4312 IRTemp icc = newTemp(Ity_I32);
4313 IRTemp cond = newTemp(Ity_I32);
4314
4315 if (m3 == 0) {
4316 } else {
4317 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004318 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004319 } else {
4320 assign(op1, get_gpr_w1(r1));
4321 assign(op2, get_gpr_w1(r2));
4322 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4323 op2));
4324 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4325 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4326 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4327 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4328
4329 }
4330 }
4331
4332 return "clrj";
4333}
4334
4335static HChar *
4336s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4337{
4338 IRTemp op1 = newTemp(Ity_I64);
4339 IRTemp op2 = newTemp(Ity_I64);
4340 IRTemp icc = newTemp(Ity_I32);
4341 IRTemp cond = newTemp(Ity_I32);
4342
4343 if (m3 == 0) {
4344 } else {
4345 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004346 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004347 } else {
4348 assign(op1, get_gpr_dw0(r1));
4349 assign(op2, get_gpr_dw0(r2));
4350 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4351 op2));
4352 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4353 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4354 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4355 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4356
4357 }
4358 }
4359
4360 return "clgrj";
4361}
4362
4363static HChar *
4364s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4365{
4366 IRTemp op1 = newTemp(Ity_I32);
4367 UInt op2;
4368 IRTemp icc = newTemp(Ity_I32);
4369 IRTemp cond = newTemp(Ity_I32);
4370
4371 if (m3 == 0) {
4372 } else {
4373 if (m3 == 14) {
4374 always_goto(mkexpr(op4addr));
4375 } else {
4376 assign(op1, get_gpr_w1(r1));
4377 op2 = (UInt)i2;
4378 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4379 mktemp(Ity_I32, mkU32(op2))));
4380 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4381 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4382 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4383 mkU32(0)), mkexpr(op4addr));
4384 }
4385 }
4386
4387 return "clib";
4388}
4389
4390static HChar *
4391s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4392{
4393 IRTemp op1 = newTemp(Ity_I64);
4394 ULong op2;
4395 IRTemp icc = newTemp(Ity_I32);
4396 IRTemp cond = newTemp(Ity_I32);
4397
4398 if (m3 == 0) {
4399 } else {
4400 if (m3 == 14) {
4401 always_goto(mkexpr(op4addr));
4402 } else {
4403 assign(op1, get_gpr_dw0(r1));
4404 op2 = (ULong)i2;
4405 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4406 mktemp(Ity_I64, mkU64(op2))));
4407 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4408 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4409 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4410 mkU32(0)), mkexpr(op4addr));
4411 }
4412 }
4413
4414 return "clgib";
4415}
4416
4417static HChar *
4418s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4419{
4420 IRTemp op1 = newTemp(Ity_I32);
4421 UInt op2;
4422 IRTemp icc = newTemp(Ity_I32);
4423 IRTemp cond = newTemp(Ity_I32);
4424
4425 if (m3 == 0) {
4426 } else {
4427 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004428 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004429 } else {
4430 assign(op1, get_gpr_w1(r1));
4431 op2 = (UInt)i2;
4432 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4433 mktemp(Ity_I32, mkU32(op2))));
4434 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4435 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4436 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4437 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4438
4439 }
4440 }
4441
4442 return "clij";
4443}
4444
4445static HChar *
4446s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4447{
4448 IRTemp op1 = newTemp(Ity_I64);
4449 ULong op2;
4450 IRTemp icc = newTemp(Ity_I32);
4451 IRTemp cond = newTemp(Ity_I32);
4452
4453 if (m3 == 0) {
4454 } else {
4455 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004456 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004457 } else {
4458 assign(op1, get_gpr_dw0(r1));
4459 op2 = (ULong)i2;
4460 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4461 mktemp(Ity_I64, mkU64(op2))));
4462 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4463 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4464 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4465 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4466
4467 }
4468 }
4469
4470 return "clgij";
4471}
4472
4473static HChar *
4474s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4475{
4476 IRTemp op1 = newTemp(Ity_I32);
4477 IRTemp op2 = newTemp(Ity_I32);
4478 IRTemp b0 = newTemp(Ity_I32);
4479 IRTemp b1 = newTemp(Ity_I32);
4480 IRTemp b2 = newTemp(Ity_I32);
4481 IRTemp b3 = newTemp(Ity_I32);
4482 IRTemp c0 = newTemp(Ity_I32);
4483 IRTemp c1 = newTemp(Ity_I32);
4484 IRTemp c2 = newTemp(Ity_I32);
4485 IRTemp c3 = newTemp(Ity_I32);
4486 UChar n;
4487
4488 n = 0;
4489 if ((r3 & 8) != 0) {
4490 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4491 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4492 n = n + 1;
4493 } else {
4494 assign(b0, mkU32(0));
4495 assign(c0, mkU32(0));
4496 }
4497 if ((r3 & 4) != 0) {
4498 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4499 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4500 mkU64(n)))));
4501 n = n + 1;
4502 } else {
4503 assign(b1, mkU32(0));
4504 assign(c1, mkU32(0));
4505 }
4506 if ((r3 & 2) != 0) {
4507 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4508 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4509 mkU64(n)))));
4510 n = n + 1;
4511 } else {
4512 assign(b2, mkU32(0));
4513 assign(c2, mkU32(0));
4514 }
4515 if ((r3 & 1) != 0) {
4516 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4517 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4518 mkU64(n)))));
4519 n = n + 1;
4520 } else {
4521 assign(b3, mkU32(0));
4522 assign(c3, mkU32(0));
4523 }
4524 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4525 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4526 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4527 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4528 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4529 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4530 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4531
4532 return "clm";
4533}
4534
4535static HChar *
4536s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4537{
4538 IRTemp op1 = newTemp(Ity_I32);
4539 IRTemp op2 = newTemp(Ity_I32);
4540 IRTemp b0 = newTemp(Ity_I32);
4541 IRTemp b1 = newTemp(Ity_I32);
4542 IRTemp b2 = newTemp(Ity_I32);
4543 IRTemp b3 = newTemp(Ity_I32);
4544 IRTemp c0 = newTemp(Ity_I32);
4545 IRTemp c1 = newTemp(Ity_I32);
4546 IRTemp c2 = newTemp(Ity_I32);
4547 IRTemp c3 = newTemp(Ity_I32);
4548 UChar n;
4549
4550 n = 0;
4551 if ((r3 & 8) != 0) {
4552 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4553 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4554 n = n + 1;
4555 } else {
4556 assign(b0, mkU32(0));
4557 assign(c0, mkU32(0));
4558 }
4559 if ((r3 & 4) != 0) {
4560 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4561 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4562 mkU64(n)))));
4563 n = n + 1;
4564 } else {
4565 assign(b1, mkU32(0));
4566 assign(c1, mkU32(0));
4567 }
4568 if ((r3 & 2) != 0) {
4569 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4570 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4571 mkU64(n)))));
4572 n = n + 1;
4573 } else {
4574 assign(b2, mkU32(0));
4575 assign(c2, mkU32(0));
4576 }
4577 if ((r3 & 1) != 0) {
4578 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4579 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4580 mkU64(n)))));
4581 n = n + 1;
4582 } else {
4583 assign(b3, mkU32(0));
4584 assign(c3, mkU32(0));
4585 }
4586 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4587 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4588 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4589 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4590 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4591 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4592 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4593
4594 return "clmy";
4595}
4596
4597static HChar *
4598s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4599{
4600 IRTemp op1 = newTemp(Ity_I32);
4601 IRTemp op2 = newTemp(Ity_I32);
4602 IRTemp b0 = newTemp(Ity_I32);
4603 IRTemp b1 = newTemp(Ity_I32);
4604 IRTemp b2 = newTemp(Ity_I32);
4605 IRTemp b3 = newTemp(Ity_I32);
4606 IRTemp c0 = newTemp(Ity_I32);
4607 IRTemp c1 = newTemp(Ity_I32);
4608 IRTemp c2 = newTemp(Ity_I32);
4609 IRTemp c3 = newTemp(Ity_I32);
4610 UChar n;
4611
4612 n = 0;
4613 if ((r3 & 8) != 0) {
4614 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4615 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4616 n = n + 1;
4617 } else {
4618 assign(b0, mkU32(0));
4619 assign(c0, mkU32(0));
4620 }
4621 if ((r3 & 4) != 0) {
4622 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4623 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4624 mkU64(n)))));
4625 n = n + 1;
4626 } else {
4627 assign(b1, mkU32(0));
4628 assign(c1, mkU32(0));
4629 }
4630 if ((r3 & 2) != 0) {
4631 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4632 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4633 mkU64(n)))));
4634 n = n + 1;
4635 } else {
4636 assign(b2, mkU32(0));
4637 assign(c2, mkU32(0));
4638 }
4639 if ((r3 & 1) != 0) {
4640 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4641 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4642 mkU64(n)))));
4643 n = n + 1;
4644 } else {
4645 assign(b3, mkU32(0));
4646 assign(c3, mkU32(0));
4647 }
4648 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4649 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4650 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4651 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4652 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4653 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4654 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4655
4656 return "clmh";
4657}
4658
4659static HChar *
4660s390_irgen_CLHHR(UChar r1, UChar r2)
4661{
4662 IRTemp op1 = newTemp(Ity_I32);
4663 IRTemp op2 = newTemp(Ity_I32);
4664
4665 assign(op1, get_gpr_w0(r1));
4666 assign(op2, get_gpr_w0(r2));
4667 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4668
4669 return "clhhr";
4670}
4671
4672static HChar *
4673s390_irgen_CLHLR(UChar r1, UChar r2)
4674{
4675 IRTemp op1 = newTemp(Ity_I32);
4676 IRTemp op2 = newTemp(Ity_I32);
4677
4678 assign(op1, get_gpr_w0(r1));
4679 assign(op2, get_gpr_w1(r2));
4680 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4681
4682 return "clhlr";
4683}
4684
4685static HChar *
4686s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4687{
4688 IRTemp op1 = newTemp(Ity_I32);
4689 IRTemp op2 = newTemp(Ity_I32);
4690
4691 assign(op1, get_gpr_w0(r1));
4692 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4693 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4694
4695 return "clhf";
4696}
4697
4698static HChar *
4699s390_irgen_CLIH(UChar r1, UInt i2)
4700{
4701 IRTemp op1 = newTemp(Ity_I32);
4702 UInt op2;
4703
4704 assign(op1, get_gpr_w0(r1));
4705 op2 = i2;
4706 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4707 mkU32(op2)));
4708
4709 return "clih";
4710}
4711
4712static HChar *
4713s390_irgen_CPYA(UChar r1, UChar r2)
4714{
4715 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004716 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004717 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4718
4719 return "cpya";
4720}
4721
4722static HChar *
4723s390_irgen_XR(UChar r1, UChar r2)
4724{
4725 IRTemp op1 = newTemp(Ity_I32);
4726 IRTemp op2 = newTemp(Ity_I32);
4727 IRTemp result = newTemp(Ity_I32);
4728
4729 if (r1 == r2) {
4730 assign(result, mkU32(0));
4731 } else {
4732 assign(op1, get_gpr_w1(r1));
4733 assign(op2, get_gpr_w1(r2));
4734 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4735 }
4736 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4737 put_gpr_w1(r1, mkexpr(result));
4738
4739 return "xr";
4740}
4741
4742static HChar *
4743s390_irgen_XGR(UChar r1, UChar r2)
4744{
4745 IRTemp op1 = newTemp(Ity_I64);
4746 IRTemp op2 = newTemp(Ity_I64);
4747 IRTemp result = newTemp(Ity_I64);
4748
4749 if (r1 == r2) {
4750 assign(result, mkU64(0));
4751 } else {
4752 assign(op1, get_gpr_dw0(r1));
4753 assign(op2, get_gpr_dw0(r2));
4754 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4755 }
4756 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4757 put_gpr_dw0(r1, mkexpr(result));
4758
4759 return "xgr";
4760}
4761
4762static HChar *
4763s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4764{
4765 IRTemp op2 = newTemp(Ity_I32);
4766 IRTemp op3 = newTemp(Ity_I32);
4767 IRTemp result = newTemp(Ity_I32);
4768
4769 assign(op2, get_gpr_w1(r2));
4770 assign(op3, get_gpr_w1(r3));
4771 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4772 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4773 put_gpr_w1(r1, mkexpr(result));
4774
4775 return "xrk";
4776}
4777
4778static HChar *
4779s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4780{
4781 IRTemp op2 = newTemp(Ity_I64);
4782 IRTemp op3 = newTemp(Ity_I64);
4783 IRTemp result = newTemp(Ity_I64);
4784
4785 assign(op2, get_gpr_dw0(r2));
4786 assign(op3, get_gpr_dw0(r3));
4787 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4788 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4789 put_gpr_dw0(r1, mkexpr(result));
4790
4791 return "xgrk";
4792}
4793
4794static HChar *
4795s390_irgen_X(UChar r1, IRTemp op2addr)
4796{
4797 IRTemp op1 = newTemp(Ity_I32);
4798 IRTemp op2 = newTemp(Ity_I32);
4799 IRTemp result = newTemp(Ity_I32);
4800
4801 assign(op1, get_gpr_w1(r1));
4802 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4803 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4804 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4805 put_gpr_w1(r1, mkexpr(result));
4806
4807 return "x";
4808}
4809
4810static HChar *
4811s390_irgen_XY(UChar r1, IRTemp op2addr)
4812{
4813 IRTemp op1 = newTemp(Ity_I32);
4814 IRTemp op2 = newTemp(Ity_I32);
4815 IRTemp result = newTemp(Ity_I32);
4816
4817 assign(op1, get_gpr_w1(r1));
4818 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4819 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4820 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4821 put_gpr_w1(r1, mkexpr(result));
4822
4823 return "xy";
4824}
4825
4826static HChar *
4827s390_irgen_XG(UChar r1, IRTemp op2addr)
4828{
4829 IRTemp op1 = newTemp(Ity_I64);
4830 IRTemp op2 = newTemp(Ity_I64);
4831 IRTemp result = newTemp(Ity_I64);
4832
4833 assign(op1, get_gpr_dw0(r1));
4834 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4835 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4836 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4837 put_gpr_dw0(r1, mkexpr(result));
4838
4839 return "xg";
4840}
4841
4842static HChar *
4843s390_irgen_XI(UChar i2, IRTemp op1addr)
4844{
4845 IRTemp op1 = newTemp(Ity_I8);
4846 UChar op2;
4847 IRTemp result = newTemp(Ity_I8);
4848
4849 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4850 op2 = i2;
4851 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4852 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4853 store(mkexpr(op1addr), mkexpr(result));
4854
4855 return "xi";
4856}
4857
4858static HChar *
4859s390_irgen_XIY(UChar i2, IRTemp op1addr)
4860{
4861 IRTemp op1 = newTemp(Ity_I8);
4862 UChar op2;
4863 IRTemp result = newTemp(Ity_I8);
4864
4865 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4866 op2 = i2;
4867 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4868 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4869 store(mkexpr(op1addr), mkexpr(result));
4870
4871 return "xiy";
4872}
4873
4874static HChar *
4875s390_irgen_XIHF(UChar r1, UInt i2)
4876{
4877 IRTemp op1 = newTemp(Ity_I32);
4878 UInt op2;
4879 IRTemp result = newTemp(Ity_I32);
4880
4881 assign(op1, get_gpr_w0(r1));
4882 op2 = i2;
4883 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4884 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4885 put_gpr_w0(r1, mkexpr(result));
4886
4887 return "xihf";
4888}
4889
4890static HChar *
4891s390_irgen_XILF(UChar r1, UInt i2)
4892{
4893 IRTemp op1 = newTemp(Ity_I32);
4894 UInt op2;
4895 IRTemp result = newTemp(Ity_I32);
4896
4897 assign(op1, get_gpr_w1(r1));
4898 op2 = i2;
4899 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4900 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4901 put_gpr_w1(r1, mkexpr(result));
4902
4903 return "xilf";
4904}
4905
4906static HChar *
4907s390_irgen_EAR(UChar r1, UChar r2)
4908{
4909 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004910 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004911 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4912
4913 return "ear";
4914}
4915
4916static HChar *
4917s390_irgen_IC(UChar r1, IRTemp op2addr)
4918{
4919 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4920
4921 return "ic";
4922}
4923
4924static HChar *
4925s390_irgen_ICY(UChar r1, IRTemp op2addr)
4926{
4927 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4928
4929 return "icy";
4930}
4931
4932static HChar *
4933s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4934{
4935 UChar n;
4936 IRTemp result = newTemp(Ity_I32);
4937 UInt mask;
4938
4939 n = 0;
4940 mask = (UInt)r3;
4941 if ((mask & 8) != 0) {
4942 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4943 n = n + 1;
4944 }
4945 if ((mask & 4) != 0) {
4946 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4947
4948 n = n + 1;
4949 }
4950 if ((mask & 2) != 0) {
4951 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4952
4953 n = n + 1;
4954 }
4955 if ((mask & 1) != 0) {
4956 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4957
4958 n = n + 1;
4959 }
4960 assign(result, get_gpr_w1(r1));
4961 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4962 mkU32(mask)));
4963
4964 return "icm";
4965}
4966
4967static HChar *
4968s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4969{
4970 UChar n;
4971 IRTemp result = newTemp(Ity_I32);
4972 UInt mask;
4973
4974 n = 0;
4975 mask = (UInt)r3;
4976 if ((mask & 8) != 0) {
4977 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4978 n = n + 1;
4979 }
4980 if ((mask & 4) != 0) {
4981 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4982
4983 n = n + 1;
4984 }
4985 if ((mask & 2) != 0) {
4986 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4987
4988 n = n + 1;
4989 }
4990 if ((mask & 1) != 0) {
4991 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4992
4993 n = n + 1;
4994 }
4995 assign(result, get_gpr_w1(r1));
4996 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4997 mkU32(mask)));
4998
4999 return "icmy";
5000}
5001
5002static HChar *
5003s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
5004{
5005 UChar n;
5006 IRTemp result = newTemp(Ity_I32);
5007 UInt mask;
5008
5009 n = 0;
5010 mask = (UInt)r3;
5011 if ((mask & 8) != 0) {
5012 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
5013 n = n + 1;
5014 }
5015 if ((mask & 4) != 0) {
5016 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5017
5018 n = n + 1;
5019 }
5020 if ((mask & 2) != 0) {
5021 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5022
5023 n = n + 1;
5024 }
5025 if ((mask & 1) != 0) {
5026 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
5027
5028 n = n + 1;
5029 }
5030 assign(result, get_gpr_w0(r1));
5031 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
5032 mkU32(mask)));
5033
5034 return "icmh";
5035}
5036
5037static HChar *
5038s390_irgen_IIHF(UChar r1, UInt i2)
5039{
5040 put_gpr_w0(r1, mkU32(i2));
5041
5042 return "iihf";
5043}
5044
5045static HChar *
5046s390_irgen_IIHH(UChar r1, UShort i2)
5047{
5048 put_gpr_hw0(r1, mkU16(i2));
5049
5050 return "iihh";
5051}
5052
5053static HChar *
5054s390_irgen_IIHL(UChar r1, UShort i2)
5055{
5056 put_gpr_hw1(r1, mkU16(i2));
5057
5058 return "iihl";
5059}
5060
5061static HChar *
5062s390_irgen_IILF(UChar r1, UInt i2)
5063{
5064 put_gpr_w1(r1, mkU32(i2));
5065
5066 return "iilf";
5067}
5068
5069static HChar *
5070s390_irgen_IILH(UChar r1, UShort i2)
5071{
5072 put_gpr_hw2(r1, mkU16(i2));
5073
5074 return "iilh";
5075}
5076
5077static HChar *
5078s390_irgen_IILL(UChar r1, UShort i2)
5079{
5080 put_gpr_hw3(r1, mkU16(i2));
5081
5082 return "iill";
5083}
5084
5085static HChar *
5086s390_irgen_LR(UChar r1, UChar r2)
5087{
5088 put_gpr_w1(r1, get_gpr_w1(r2));
5089
5090 return "lr";
5091}
5092
5093static HChar *
5094s390_irgen_LGR(UChar r1, UChar r2)
5095{
5096 put_gpr_dw0(r1, get_gpr_dw0(r2));
5097
5098 return "lgr";
5099}
5100
5101static HChar *
5102s390_irgen_LGFR(UChar r1, UChar r2)
5103{
5104 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5105
5106 return "lgfr";
5107}
5108
5109static HChar *
5110s390_irgen_L(UChar r1, IRTemp op2addr)
5111{
5112 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5113
5114 return "l";
5115}
5116
5117static HChar *
5118s390_irgen_LY(UChar r1, IRTemp op2addr)
5119{
5120 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5121
5122 return "ly";
5123}
5124
5125static HChar *
5126s390_irgen_LG(UChar r1, IRTemp op2addr)
5127{
5128 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5129
5130 return "lg";
5131}
5132
5133static HChar *
5134s390_irgen_LGF(UChar r1, IRTemp op2addr)
5135{
5136 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5137
5138 return "lgf";
5139}
5140
5141static HChar *
5142s390_irgen_LGFI(UChar r1, UInt i2)
5143{
5144 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5145
5146 return "lgfi";
5147}
5148
5149static HChar *
5150s390_irgen_LRL(UChar r1, UInt i2)
5151{
5152 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5153 i2 << 1))));
5154
5155 return "lrl";
5156}
5157
5158static HChar *
5159s390_irgen_LGRL(UChar r1, UInt i2)
5160{
5161 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5162 i2 << 1))));
5163
5164 return "lgrl";
5165}
5166
5167static HChar *
5168s390_irgen_LGFRL(UChar r1, UInt i2)
5169{
5170 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5171 ((ULong)(Long)(Int)i2 << 1)))));
5172
5173 return "lgfrl";
5174}
5175
5176static HChar *
5177s390_irgen_LA(UChar r1, IRTemp op2addr)
5178{
5179 put_gpr_dw0(r1, mkexpr(op2addr));
5180
5181 return "la";
5182}
5183
5184static HChar *
5185s390_irgen_LAY(UChar r1, IRTemp op2addr)
5186{
5187 put_gpr_dw0(r1, mkexpr(op2addr));
5188
5189 return "lay";
5190}
5191
5192static HChar *
5193s390_irgen_LAE(UChar r1, IRTemp op2addr)
5194{
5195 put_gpr_dw0(r1, mkexpr(op2addr));
5196
5197 return "lae";
5198}
5199
5200static HChar *
5201s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5202{
5203 put_gpr_dw0(r1, mkexpr(op2addr));
5204
5205 return "laey";
5206}
5207
5208static HChar *
5209s390_irgen_LARL(UChar r1, UInt i2)
5210{
5211 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5212
5213 return "larl";
5214}
5215
5216static HChar *
5217s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5218{
5219 IRTemp op2 = newTemp(Ity_I32);
5220 IRTemp op3 = newTemp(Ity_I32);
5221 IRTemp result = newTemp(Ity_I32);
5222
5223 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5224 assign(op3, get_gpr_w1(r3));
5225 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5226 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5227 store(mkexpr(op2addr), mkexpr(result));
5228 put_gpr_w1(r1, mkexpr(op2));
5229
5230 return "laa";
5231}
5232
5233static HChar *
5234s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5235{
5236 IRTemp op2 = newTemp(Ity_I64);
5237 IRTemp op3 = newTemp(Ity_I64);
5238 IRTemp result = newTemp(Ity_I64);
5239
5240 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5241 assign(op3, get_gpr_dw0(r3));
5242 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5243 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5244 store(mkexpr(op2addr), mkexpr(result));
5245 put_gpr_dw0(r1, mkexpr(op2));
5246
5247 return "laag";
5248}
5249
5250static HChar *
5251s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5252{
5253 IRTemp op2 = newTemp(Ity_I32);
5254 IRTemp op3 = newTemp(Ity_I32);
5255 IRTemp result = newTemp(Ity_I32);
5256
5257 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5258 assign(op3, get_gpr_w1(r3));
5259 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5260 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5261 store(mkexpr(op2addr), mkexpr(result));
5262 put_gpr_w1(r1, mkexpr(op2));
5263
5264 return "laal";
5265}
5266
5267static HChar *
5268s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5269{
5270 IRTemp op2 = newTemp(Ity_I64);
5271 IRTemp op3 = newTemp(Ity_I64);
5272 IRTemp result = newTemp(Ity_I64);
5273
5274 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5275 assign(op3, get_gpr_dw0(r3));
5276 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5277 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5278 store(mkexpr(op2addr), mkexpr(result));
5279 put_gpr_dw0(r1, mkexpr(op2));
5280
5281 return "laalg";
5282}
5283
5284static HChar *
5285s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5286{
5287 IRTemp op2 = newTemp(Ity_I32);
5288 IRTemp op3 = newTemp(Ity_I32);
5289 IRTemp result = newTemp(Ity_I32);
5290
5291 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5292 assign(op3, get_gpr_w1(r3));
5293 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5294 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5295 store(mkexpr(op2addr), mkexpr(result));
5296 put_gpr_w1(r1, mkexpr(op2));
5297
5298 return "lan";
5299}
5300
5301static HChar *
5302s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5303{
5304 IRTemp op2 = newTemp(Ity_I64);
5305 IRTemp op3 = newTemp(Ity_I64);
5306 IRTemp result = newTemp(Ity_I64);
5307
5308 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5309 assign(op3, get_gpr_dw0(r3));
5310 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5311 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5312 store(mkexpr(op2addr), mkexpr(result));
5313 put_gpr_dw0(r1, mkexpr(op2));
5314
5315 return "lang";
5316}
5317
5318static HChar *
5319s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5320{
5321 IRTemp op2 = newTemp(Ity_I32);
5322 IRTemp op3 = newTemp(Ity_I32);
5323 IRTemp result = newTemp(Ity_I32);
5324
5325 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5326 assign(op3, get_gpr_w1(r3));
5327 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5328 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5329 store(mkexpr(op2addr), mkexpr(result));
5330 put_gpr_w1(r1, mkexpr(op2));
5331
5332 return "lax";
5333}
5334
5335static HChar *
5336s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5337{
5338 IRTemp op2 = newTemp(Ity_I64);
5339 IRTemp op3 = newTemp(Ity_I64);
5340 IRTemp result = newTemp(Ity_I64);
5341
5342 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5343 assign(op3, get_gpr_dw0(r3));
5344 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5345 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5346 store(mkexpr(op2addr), mkexpr(result));
5347 put_gpr_dw0(r1, mkexpr(op2));
5348
5349 return "laxg";
5350}
5351
5352static HChar *
5353s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5354{
5355 IRTemp op2 = newTemp(Ity_I32);
5356 IRTemp op3 = newTemp(Ity_I32);
5357 IRTemp result = newTemp(Ity_I32);
5358
5359 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5360 assign(op3, get_gpr_w1(r3));
5361 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5362 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5363 store(mkexpr(op2addr), mkexpr(result));
5364 put_gpr_w1(r1, mkexpr(op2));
5365
5366 return "lao";
5367}
5368
5369static HChar *
5370s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5371{
5372 IRTemp op2 = newTemp(Ity_I64);
5373 IRTemp op3 = newTemp(Ity_I64);
5374 IRTemp result = newTemp(Ity_I64);
5375
5376 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5377 assign(op3, get_gpr_dw0(r3));
5378 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5379 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5380 store(mkexpr(op2addr), mkexpr(result));
5381 put_gpr_dw0(r1, mkexpr(op2));
5382
5383 return "laog";
5384}
5385
5386static HChar *
5387s390_irgen_LTR(UChar r1, UChar r2)
5388{
5389 IRTemp op2 = newTemp(Ity_I32);
5390
5391 assign(op2, get_gpr_w1(r2));
5392 put_gpr_w1(r1, mkexpr(op2));
5393 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5394
5395 return "ltr";
5396}
5397
5398static HChar *
5399s390_irgen_LTGR(UChar r1, UChar r2)
5400{
5401 IRTemp op2 = newTemp(Ity_I64);
5402
5403 assign(op2, get_gpr_dw0(r2));
5404 put_gpr_dw0(r1, mkexpr(op2));
5405 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5406
5407 return "ltgr";
5408}
5409
5410static HChar *
5411s390_irgen_LTGFR(UChar r1, UChar r2)
5412{
5413 IRTemp op2 = newTemp(Ity_I64);
5414
5415 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5416 put_gpr_dw0(r1, mkexpr(op2));
5417 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5418
5419 return "ltgfr";
5420}
5421
5422static HChar *
5423s390_irgen_LT(UChar r1, IRTemp op2addr)
5424{
5425 IRTemp op2 = newTemp(Ity_I32);
5426
5427 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5428 put_gpr_w1(r1, mkexpr(op2));
5429 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5430
5431 return "lt";
5432}
5433
5434static HChar *
5435s390_irgen_LTG(UChar r1, IRTemp op2addr)
5436{
5437 IRTemp op2 = newTemp(Ity_I64);
5438
5439 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5440 put_gpr_dw0(r1, mkexpr(op2));
5441 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5442
5443 return "ltg";
5444}
5445
5446static HChar *
5447s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5448{
5449 IRTemp op2 = newTemp(Ity_I64);
5450
5451 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5452 put_gpr_dw0(r1, mkexpr(op2));
5453 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5454
5455 return "ltgf";
5456}
5457
5458static HChar *
5459s390_irgen_LBR(UChar r1, UChar r2)
5460{
5461 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5462
5463 return "lbr";
5464}
5465
5466static HChar *
5467s390_irgen_LGBR(UChar r1, UChar r2)
5468{
5469 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5470
5471 return "lgbr";
5472}
5473
5474static HChar *
5475s390_irgen_LB(UChar r1, IRTemp op2addr)
5476{
5477 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5478
5479 return "lb";
5480}
5481
5482static HChar *
5483s390_irgen_LGB(UChar r1, IRTemp op2addr)
5484{
5485 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5486
5487 return "lgb";
5488}
5489
5490static HChar *
5491s390_irgen_LBH(UChar r1, IRTemp op2addr)
5492{
5493 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5494
5495 return "lbh";
5496}
5497
5498static HChar *
5499s390_irgen_LCR(UChar r1, UChar r2)
5500{
5501 Int op1;
5502 IRTemp op2 = newTemp(Ity_I32);
5503 IRTemp result = newTemp(Ity_I32);
5504
5505 op1 = 0;
5506 assign(op2, get_gpr_w1(r2));
5507 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5508 put_gpr_w1(r1, mkexpr(result));
5509 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5510 op1)), op2);
5511
5512 return "lcr";
5513}
5514
5515static HChar *
5516s390_irgen_LCGR(UChar r1, UChar r2)
5517{
5518 Long op1;
5519 IRTemp op2 = newTemp(Ity_I64);
5520 IRTemp result = newTemp(Ity_I64);
5521
5522 op1 = 0ULL;
5523 assign(op2, get_gpr_dw0(r2));
5524 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5525 put_gpr_dw0(r1, mkexpr(result));
5526 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5527 op1)), op2);
5528
5529 return "lcgr";
5530}
5531
5532static HChar *
5533s390_irgen_LCGFR(UChar r1, UChar r2)
5534{
5535 Long op1;
5536 IRTemp op2 = newTemp(Ity_I64);
5537 IRTemp result = newTemp(Ity_I64);
5538
5539 op1 = 0ULL;
5540 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5541 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5542 put_gpr_dw0(r1, mkexpr(result));
5543 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5544 op1)), op2);
5545
5546 return "lcgfr";
5547}
5548
5549static HChar *
5550s390_irgen_LHR(UChar r1, UChar r2)
5551{
5552 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5553
5554 return "lhr";
5555}
5556
5557static HChar *
5558s390_irgen_LGHR(UChar r1, UChar r2)
5559{
5560 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5561
5562 return "lghr";
5563}
5564
5565static HChar *
5566s390_irgen_LH(UChar r1, IRTemp op2addr)
5567{
5568 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5569
5570 return "lh";
5571}
5572
5573static HChar *
5574s390_irgen_LHY(UChar r1, IRTemp op2addr)
5575{
5576 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5577
5578 return "lhy";
5579}
5580
5581static HChar *
5582s390_irgen_LGH(UChar r1, IRTemp op2addr)
5583{
5584 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5585
5586 return "lgh";
5587}
5588
5589static HChar *
5590s390_irgen_LHI(UChar r1, UShort i2)
5591{
5592 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5593
5594 return "lhi";
5595}
5596
5597static HChar *
5598s390_irgen_LGHI(UChar r1, UShort i2)
5599{
5600 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5601
5602 return "lghi";
5603}
5604
5605static HChar *
5606s390_irgen_LHRL(UChar r1, UInt i2)
5607{
5608 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5609 ((ULong)(Long)(Int)i2 << 1)))));
5610
5611 return "lhrl";
5612}
5613
5614static HChar *
5615s390_irgen_LGHRL(UChar r1, UInt i2)
5616{
5617 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5618 ((ULong)(Long)(Int)i2 << 1)))));
5619
5620 return "lghrl";
5621}
5622
5623static HChar *
5624s390_irgen_LHH(UChar r1, IRTemp op2addr)
5625{
5626 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5627
5628 return "lhh";
5629}
5630
5631static HChar *
5632s390_irgen_LFH(UChar r1, IRTemp op2addr)
5633{
5634 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5635
5636 return "lfh";
5637}
5638
5639static HChar *
5640s390_irgen_LLGFR(UChar r1, UChar r2)
5641{
5642 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5643
5644 return "llgfr";
5645}
5646
5647static HChar *
5648s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5649{
5650 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5651
5652 return "llgf";
5653}
5654
5655static HChar *
5656s390_irgen_LLGFRL(UChar r1, UInt i2)
5657{
5658 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5659 ((ULong)(Long)(Int)i2 << 1)))));
5660
5661 return "llgfrl";
5662}
5663
5664static HChar *
5665s390_irgen_LLCR(UChar r1, UChar r2)
5666{
5667 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5668
5669 return "llcr";
5670}
5671
5672static HChar *
5673s390_irgen_LLGCR(UChar r1, UChar r2)
5674{
5675 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5676
5677 return "llgcr";
5678}
5679
5680static HChar *
5681s390_irgen_LLC(UChar r1, IRTemp op2addr)
5682{
5683 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5684
5685 return "llc";
5686}
5687
5688static HChar *
5689s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5690{
5691 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5692
5693 return "llgc";
5694}
5695
5696static HChar *
5697s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5698{
5699 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5700
5701 return "llch";
5702}
5703
5704static HChar *
5705s390_irgen_LLHR(UChar r1, UChar r2)
5706{
5707 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5708
5709 return "llhr";
5710}
5711
5712static HChar *
5713s390_irgen_LLGHR(UChar r1, UChar r2)
5714{
5715 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5716
5717 return "llghr";
5718}
5719
5720static HChar *
5721s390_irgen_LLH(UChar r1, IRTemp op2addr)
5722{
5723 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5724
5725 return "llh";
5726}
5727
5728static HChar *
5729s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5730{
5731 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5732
5733 return "llgh";
5734}
5735
5736static HChar *
5737s390_irgen_LLHRL(UChar r1, UInt i2)
5738{
5739 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5740 ((ULong)(Long)(Int)i2 << 1)))));
5741
5742 return "llhrl";
5743}
5744
5745static HChar *
5746s390_irgen_LLGHRL(UChar r1, UInt i2)
5747{
5748 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5749 ((ULong)(Long)(Int)i2 << 1)))));
5750
5751 return "llghrl";
5752}
5753
5754static HChar *
5755s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5756{
5757 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5758
5759 return "llhh";
5760}
5761
5762static HChar *
5763s390_irgen_LLIHF(UChar r1, UInt i2)
5764{
5765 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5766
5767 return "llihf";
5768}
5769
5770static HChar *
5771s390_irgen_LLIHH(UChar r1, UShort i2)
5772{
5773 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5774
5775 return "llihh";
5776}
5777
5778static HChar *
5779s390_irgen_LLIHL(UChar r1, UShort i2)
5780{
5781 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5782
5783 return "llihl";
5784}
5785
5786static HChar *
5787s390_irgen_LLILF(UChar r1, UInt i2)
5788{
5789 put_gpr_dw0(r1, mkU64(i2));
5790
5791 return "llilf";
5792}
5793
5794static HChar *
5795s390_irgen_LLILH(UChar r1, UShort i2)
5796{
5797 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5798
5799 return "llilh";
5800}
5801
5802static HChar *
5803s390_irgen_LLILL(UChar r1, UShort i2)
5804{
5805 put_gpr_dw0(r1, mkU64(i2));
5806
5807 return "llill";
5808}
5809
5810static HChar *
5811s390_irgen_LLGTR(UChar r1, UChar r2)
5812{
5813 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5814 mkU32(2147483647))));
5815
5816 return "llgtr";
5817}
5818
5819static HChar *
5820s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5821{
5822 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5823 mkexpr(op2addr)), mkU32(2147483647))));
5824
5825 return "llgt";
5826}
5827
5828static HChar *
5829s390_irgen_LNR(UChar r1, UChar r2)
5830{
5831 IRTemp op2 = newTemp(Ity_I32);
5832 IRTemp result = newTemp(Ity_I32);
5833
5834 assign(op2, get_gpr_w1(r2));
5835 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5836 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5837 put_gpr_w1(r1, mkexpr(result));
5838 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5839
5840 return "lnr";
5841}
5842
5843static HChar *
5844s390_irgen_LNGR(UChar r1, UChar r2)
5845{
5846 IRTemp op2 = newTemp(Ity_I64);
5847 IRTemp result = newTemp(Ity_I64);
5848
5849 assign(op2, get_gpr_dw0(r2));
5850 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5851 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5852 put_gpr_dw0(r1, mkexpr(result));
5853 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5854
5855 return "lngr";
5856}
5857
5858static HChar *
5859s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5860{
5861 IRTemp op2 = newTemp(Ity_I64);
5862 IRTemp result = newTemp(Ity_I64);
5863
5864 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5865 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5866 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5867 put_gpr_dw0(r1, mkexpr(result));
5868 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5869
5870 return "lngfr";
5871}
5872
5873static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005874s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5875{
5876 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5877 guest_IA_next_instr);
5878 put_gpr_w1(r1, get_gpr_w1(r2));
florianf9e1ed72012-04-17 02:41:56 +00005879 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005880
5881 return "locr";
5882}
5883
5884static HChar *
5885s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5886{
5887 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5888 guest_IA_next_instr);
5889 put_gpr_dw0(r1, get_gpr_dw0(r2));
florianf9e1ed72012-04-17 02:41:56 +00005890 dummy_put_IA();
sewardjd7bde722011-04-05 13:19:33 +00005891
5892 return "locgr";
5893}
5894
5895static HChar *
5896s390_irgen_LOC(UChar r1, IRTemp op2addr)
5897{
5898 /* condition is checked in format handler */
5899 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5900
5901 return "loc";
5902}
5903
5904static HChar *
5905s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5906{
5907 /* condition is checked in format handler */
5908 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5909
5910 return "locg";
5911}
5912
5913static HChar *
sewardj2019a972011-03-07 16:04:07 +00005914s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5915{
5916 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5917 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5918 ));
5919
5920 return "lpq";
5921}
5922
5923static HChar *
5924s390_irgen_LPR(UChar r1, UChar r2)
5925{
5926 IRTemp op2 = newTemp(Ity_I32);
5927 IRTemp result = newTemp(Ity_I32);
5928
5929 assign(op2, get_gpr_w1(r2));
5930 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5931 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5932 put_gpr_w1(r1, mkexpr(result));
5933 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5934
5935 return "lpr";
5936}
5937
5938static HChar *
5939s390_irgen_LPGR(UChar r1, UChar r2)
5940{
5941 IRTemp op2 = newTemp(Ity_I64);
5942 IRTemp result = newTemp(Ity_I64);
5943
5944 assign(op2, get_gpr_dw0(r2));
5945 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5946 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5947 put_gpr_dw0(r1, mkexpr(result));
5948 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5949
5950 return "lpgr";
5951}
5952
5953static HChar *
5954s390_irgen_LPGFR(UChar r1, UChar r2)
5955{
5956 IRTemp op2 = newTemp(Ity_I64);
5957 IRTemp result = newTemp(Ity_I64);
5958
5959 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5960 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5961 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5962 put_gpr_dw0(r1, mkexpr(result));
5963 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5964
5965 return "lpgfr";
5966}
5967
5968static HChar *
5969s390_irgen_LRVR(UChar r1, UChar r2)
5970{
5971 IRTemp b0 = newTemp(Ity_I8);
5972 IRTemp b1 = newTemp(Ity_I8);
5973 IRTemp b2 = newTemp(Ity_I8);
5974 IRTemp b3 = newTemp(Ity_I8);
5975
5976 assign(b3, get_gpr_b7(r2));
5977 assign(b2, get_gpr_b6(r2));
5978 assign(b1, get_gpr_b5(r2));
5979 assign(b0, get_gpr_b4(r2));
5980 put_gpr_b4(r1, mkexpr(b3));
5981 put_gpr_b5(r1, mkexpr(b2));
5982 put_gpr_b6(r1, mkexpr(b1));
5983 put_gpr_b7(r1, mkexpr(b0));
5984
5985 return "lrvr";
5986}
5987
5988static HChar *
5989s390_irgen_LRVGR(UChar r1, UChar r2)
5990{
5991 IRTemp b0 = newTemp(Ity_I8);
5992 IRTemp b1 = newTemp(Ity_I8);
5993 IRTemp b2 = newTemp(Ity_I8);
5994 IRTemp b3 = newTemp(Ity_I8);
5995 IRTemp b4 = newTemp(Ity_I8);
5996 IRTemp b5 = newTemp(Ity_I8);
5997 IRTemp b6 = newTemp(Ity_I8);
5998 IRTemp b7 = newTemp(Ity_I8);
5999
6000 assign(b7, get_gpr_b7(r2));
6001 assign(b6, get_gpr_b6(r2));
6002 assign(b5, get_gpr_b5(r2));
6003 assign(b4, get_gpr_b4(r2));
6004 assign(b3, get_gpr_b3(r2));
6005 assign(b2, get_gpr_b2(r2));
6006 assign(b1, get_gpr_b1(r2));
6007 assign(b0, get_gpr_b0(r2));
6008 put_gpr_b0(r1, mkexpr(b7));
6009 put_gpr_b1(r1, mkexpr(b6));
6010 put_gpr_b2(r1, mkexpr(b5));
6011 put_gpr_b3(r1, mkexpr(b4));
6012 put_gpr_b4(r1, mkexpr(b3));
6013 put_gpr_b5(r1, mkexpr(b2));
6014 put_gpr_b6(r1, mkexpr(b1));
6015 put_gpr_b7(r1, mkexpr(b0));
6016
6017 return "lrvgr";
6018}
6019
6020static HChar *
6021s390_irgen_LRVH(UChar r1, IRTemp op2addr)
6022{
6023 IRTemp op2 = newTemp(Ity_I16);
6024
6025 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6026 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
6027 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
6028
6029 return "lrvh";
6030}
6031
6032static HChar *
6033s390_irgen_LRV(UChar r1, IRTemp op2addr)
6034{
6035 IRTemp op2 = newTemp(Ity_I32);
6036
6037 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6038 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6039 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6040 mkU8(8)), mkU32(255))));
6041 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6042 mkU8(16)), mkU32(255))));
6043 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6044 mkU8(24)), mkU32(255))));
6045
6046 return "lrv";
6047}
6048
6049static HChar *
6050s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6051{
6052 IRTemp op2 = newTemp(Ity_I64);
6053
6054 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6055 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6056 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6057 mkU8(8)), mkU64(255))));
6058 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6059 mkU8(16)), mkU64(255))));
6060 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6061 mkU8(24)), mkU64(255))));
6062 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6063 mkU8(32)), mkU64(255))));
6064 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6065 mkU8(40)), mkU64(255))));
6066 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6067 mkU8(48)), mkU64(255))));
6068 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6069 mkU8(56)), mkU64(255))));
6070
6071 return "lrvg";
6072}
6073
6074static HChar *
6075s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6076{
6077 store(mkexpr(op1addr), mkU16(i2));
6078
6079 return "mvhhi";
6080}
6081
6082static HChar *
6083s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6084{
6085 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6086
6087 return "mvhi";
6088}
6089
6090static HChar *
6091s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6092{
6093 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6094
6095 return "mvghi";
6096}
6097
6098static HChar *
6099s390_irgen_MVI(UChar i2, IRTemp op1addr)
6100{
6101 store(mkexpr(op1addr), mkU8(i2));
6102
6103 return "mvi";
6104}
6105
6106static HChar *
6107s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6108{
6109 store(mkexpr(op1addr), mkU8(i2));
6110
6111 return "mviy";
6112}
6113
6114static HChar *
6115s390_irgen_MR(UChar r1, UChar r2)
6116{
6117 IRTemp op1 = newTemp(Ity_I32);
6118 IRTemp op2 = newTemp(Ity_I32);
6119 IRTemp result = newTemp(Ity_I64);
6120
6121 assign(op1, get_gpr_w1(r1 + 1));
6122 assign(op2, get_gpr_w1(r2));
6123 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6124 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6125 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6126
6127 return "mr";
6128}
6129
6130static HChar *
6131s390_irgen_M(UChar r1, IRTemp op2addr)
6132{
6133 IRTemp op1 = newTemp(Ity_I32);
6134 IRTemp op2 = newTemp(Ity_I32);
6135 IRTemp result = newTemp(Ity_I64);
6136
6137 assign(op1, get_gpr_w1(r1 + 1));
6138 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6139 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6140 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6141 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6142
6143 return "m";
6144}
6145
6146static HChar *
6147s390_irgen_MFY(UChar r1, IRTemp op2addr)
6148{
6149 IRTemp op1 = newTemp(Ity_I32);
6150 IRTemp op2 = newTemp(Ity_I32);
6151 IRTemp result = newTemp(Ity_I64);
6152
6153 assign(op1, get_gpr_w1(r1 + 1));
6154 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6155 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6156 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6157 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6158
6159 return "mfy";
6160}
6161
6162static HChar *
6163s390_irgen_MH(UChar r1, IRTemp op2addr)
6164{
6165 IRTemp op1 = newTemp(Ity_I32);
6166 IRTemp op2 = newTemp(Ity_I16);
6167 IRTemp result = newTemp(Ity_I64);
6168
6169 assign(op1, get_gpr_w1(r1));
6170 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6171 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6172 ));
6173 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6174
6175 return "mh";
6176}
6177
6178static HChar *
6179s390_irgen_MHY(UChar r1, IRTemp op2addr)
6180{
6181 IRTemp op1 = newTemp(Ity_I32);
6182 IRTemp op2 = newTemp(Ity_I16);
6183 IRTemp result = newTemp(Ity_I64);
6184
6185 assign(op1, get_gpr_w1(r1));
6186 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6187 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6188 ));
6189 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6190
6191 return "mhy";
6192}
6193
6194static HChar *
6195s390_irgen_MHI(UChar r1, UShort i2)
6196{
6197 IRTemp op1 = newTemp(Ity_I32);
6198 Short op2;
6199 IRTemp result = newTemp(Ity_I64);
6200
6201 assign(op1, get_gpr_w1(r1));
6202 op2 = (Short)i2;
6203 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6204 mkU16((UShort)op2))));
6205 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6206
6207 return "mhi";
6208}
6209
6210static HChar *
6211s390_irgen_MGHI(UChar r1, UShort i2)
6212{
6213 IRTemp op1 = newTemp(Ity_I64);
6214 Short op2;
6215 IRTemp result = newTemp(Ity_I128);
6216
6217 assign(op1, get_gpr_dw0(r1));
6218 op2 = (Short)i2;
6219 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6220 mkU16((UShort)op2))));
6221 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6222
6223 return "mghi";
6224}
6225
6226static HChar *
6227s390_irgen_MLR(UChar r1, UChar r2)
6228{
6229 IRTemp op1 = newTemp(Ity_I32);
6230 IRTemp op2 = newTemp(Ity_I32);
6231 IRTemp result = newTemp(Ity_I64);
6232
6233 assign(op1, get_gpr_w1(r1 + 1));
6234 assign(op2, get_gpr_w1(r2));
6235 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6236 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6237 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6238
6239 return "mlr";
6240}
6241
6242static HChar *
6243s390_irgen_MLGR(UChar r1, UChar r2)
6244{
6245 IRTemp op1 = newTemp(Ity_I64);
6246 IRTemp op2 = newTemp(Ity_I64);
6247 IRTemp result = newTemp(Ity_I128);
6248
6249 assign(op1, get_gpr_dw0(r1 + 1));
6250 assign(op2, get_gpr_dw0(r2));
6251 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6252 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6253 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6254
6255 return "mlgr";
6256}
6257
6258static HChar *
6259s390_irgen_ML(UChar r1, IRTemp op2addr)
6260{
6261 IRTemp op1 = newTemp(Ity_I32);
6262 IRTemp op2 = newTemp(Ity_I32);
6263 IRTemp result = newTemp(Ity_I64);
6264
6265 assign(op1, get_gpr_w1(r1 + 1));
6266 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6267 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6268 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6269 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6270
6271 return "ml";
6272}
6273
6274static HChar *
6275s390_irgen_MLG(UChar r1, IRTemp op2addr)
6276{
6277 IRTemp op1 = newTemp(Ity_I64);
6278 IRTemp op2 = newTemp(Ity_I64);
6279 IRTemp result = newTemp(Ity_I128);
6280
6281 assign(op1, get_gpr_dw0(r1 + 1));
6282 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6283 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6284 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6285 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6286
6287 return "mlg";
6288}
6289
6290static HChar *
6291s390_irgen_MSR(UChar r1, UChar r2)
6292{
6293 IRTemp op1 = newTemp(Ity_I32);
6294 IRTemp op2 = newTemp(Ity_I32);
6295 IRTemp result = newTemp(Ity_I64);
6296
6297 assign(op1, get_gpr_w1(r1));
6298 assign(op2, get_gpr_w1(r2));
6299 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6300 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6301
6302 return "msr";
6303}
6304
6305static HChar *
6306s390_irgen_MSGR(UChar r1, UChar r2)
6307{
6308 IRTemp op1 = newTemp(Ity_I64);
6309 IRTemp op2 = newTemp(Ity_I64);
6310 IRTemp result = newTemp(Ity_I128);
6311
6312 assign(op1, get_gpr_dw0(r1));
6313 assign(op2, get_gpr_dw0(r2));
6314 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6315 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6316
6317 return "msgr";
6318}
6319
6320static HChar *
6321s390_irgen_MSGFR(UChar r1, UChar r2)
6322{
6323 IRTemp op1 = newTemp(Ity_I64);
6324 IRTemp op2 = newTemp(Ity_I32);
6325 IRTemp result = newTemp(Ity_I128);
6326
6327 assign(op1, get_gpr_dw0(r1));
6328 assign(op2, get_gpr_w1(r2));
6329 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6330 ));
6331 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6332
6333 return "msgfr";
6334}
6335
6336static HChar *
6337s390_irgen_MS(UChar r1, IRTemp op2addr)
6338{
6339 IRTemp op1 = newTemp(Ity_I32);
6340 IRTemp op2 = newTemp(Ity_I32);
6341 IRTemp result = newTemp(Ity_I64);
6342
6343 assign(op1, get_gpr_w1(r1));
6344 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6345 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6346 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6347
6348 return "ms";
6349}
6350
6351static HChar *
6352s390_irgen_MSY(UChar r1, IRTemp op2addr)
6353{
6354 IRTemp op1 = newTemp(Ity_I32);
6355 IRTemp op2 = newTemp(Ity_I32);
6356 IRTemp result = newTemp(Ity_I64);
6357
6358 assign(op1, get_gpr_w1(r1));
6359 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6360 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6361 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6362
6363 return "msy";
6364}
6365
6366static HChar *
6367s390_irgen_MSG(UChar r1, IRTemp op2addr)
6368{
6369 IRTemp op1 = newTemp(Ity_I64);
6370 IRTemp op2 = newTemp(Ity_I64);
6371 IRTemp result = newTemp(Ity_I128);
6372
6373 assign(op1, get_gpr_dw0(r1));
6374 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6375 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6376 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6377
6378 return "msg";
6379}
6380
6381static HChar *
6382s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6383{
6384 IRTemp op1 = newTemp(Ity_I64);
6385 IRTemp op2 = newTemp(Ity_I32);
6386 IRTemp result = newTemp(Ity_I128);
6387
6388 assign(op1, get_gpr_dw0(r1));
6389 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6390 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6391 ));
6392 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6393
6394 return "msgf";
6395}
6396
6397static HChar *
6398s390_irgen_MSFI(UChar r1, UInt i2)
6399{
6400 IRTemp op1 = newTemp(Ity_I32);
6401 Int op2;
6402 IRTemp result = newTemp(Ity_I64);
6403
6404 assign(op1, get_gpr_w1(r1));
6405 op2 = (Int)i2;
6406 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6407 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6408
6409 return "msfi";
6410}
6411
6412static HChar *
6413s390_irgen_MSGFI(UChar r1, UInt i2)
6414{
6415 IRTemp op1 = newTemp(Ity_I64);
6416 Int op2;
6417 IRTemp result = newTemp(Ity_I128);
6418
6419 assign(op1, get_gpr_dw0(r1));
6420 op2 = (Int)i2;
6421 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6422 op2))));
6423 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6424
6425 return "msgfi";
6426}
6427
6428static HChar *
6429s390_irgen_OR(UChar r1, UChar r2)
6430{
6431 IRTemp op1 = newTemp(Ity_I32);
6432 IRTemp op2 = newTemp(Ity_I32);
6433 IRTemp result = newTemp(Ity_I32);
6434
6435 assign(op1, get_gpr_w1(r1));
6436 assign(op2, get_gpr_w1(r2));
6437 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6438 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6439 put_gpr_w1(r1, mkexpr(result));
6440
6441 return "or";
6442}
6443
6444static HChar *
6445s390_irgen_OGR(UChar r1, UChar r2)
6446{
6447 IRTemp op1 = newTemp(Ity_I64);
6448 IRTemp op2 = newTemp(Ity_I64);
6449 IRTemp result = newTemp(Ity_I64);
6450
6451 assign(op1, get_gpr_dw0(r1));
6452 assign(op2, get_gpr_dw0(r2));
6453 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6454 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6455 put_gpr_dw0(r1, mkexpr(result));
6456
6457 return "ogr";
6458}
6459
6460static HChar *
6461s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6462{
6463 IRTemp op2 = newTemp(Ity_I32);
6464 IRTemp op3 = newTemp(Ity_I32);
6465 IRTemp result = newTemp(Ity_I32);
6466
6467 assign(op2, get_gpr_w1(r2));
6468 assign(op3, get_gpr_w1(r3));
6469 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6470 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6471 put_gpr_w1(r1, mkexpr(result));
6472
6473 return "ork";
6474}
6475
6476static HChar *
6477s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6478{
6479 IRTemp op2 = newTemp(Ity_I64);
6480 IRTemp op3 = newTemp(Ity_I64);
6481 IRTemp result = newTemp(Ity_I64);
6482
6483 assign(op2, get_gpr_dw0(r2));
6484 assign(op3, get_gpr_dw0(r3));
6485 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6486 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6487 put_gpr_dw0(r1, mkexpr(result));
6488
6489 return "ogrk";
6490}
6491
6492static HChar *
6493s390_irgen_O(UChar r1, IRTemp op2addr)
6494{
6495 IRTemp op1 = newTemp(Ity_I32);
6496 IRTemp op2 = newTemp(Ity_I32);
6497 IRTemp result = newTemp(Ity_I32);
6498
6499 assign(op1, get_gpr_w1(r1));
6500 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6501 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6502 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6503 put_gpr_w1(r1, mkexpr(result));
6504
6505 return "o";
6506}
6507
6508static HChar *
6509s390_irgen_OY(UChar r1, IRTemp op2addr)
6510{
6511 IRTemp op1 = newTemp(Ity_I32);
6512 IRTemp op2 = newTemp(Ity_I32);
6513 IRTemp result = newTemp(Ity_I32);
6514
6515 assign(op1, get_gpr_w1(r1));
6516 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6517 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6518 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6519 put_gpr_w1(r1, mkexpr(result));
6520
6521 return "oy";
6522}
6523
6524static HChar *
6525s390_irgen_OG(UChar r1, IRTemp op2addr)
6526{
6527 IRTemp op1 = newTemp(Ity_I64);
6528 IRTemp op2 = newTemp(Ity_I64);
6529 IRTemp result = newTemp(Ity_I64);
6530
6531 assign(op1, get_gpr_dw0(r1));
6532 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6533 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6534 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6535 put_gpr_dw0(r1, mkexpr(result));
6536
6537 return "og";
6538}
6539
6540static HChar *
6541s390_irgen_OI(UChar i2, IRTemp op1addr)
6542{
6543 IRTemp op1 = newTemp(Ity_I8);
6544 UChar op2;
6545 IRTemp result = newTemp(Ity_I8);
6546
6547 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6548 op2 = i2;
6549 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6550 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6551 store(mkexpr(op1addr), mkexpr(result));
6552
6553 return "oi";
6554}
6555
6556static HChar *
6557s390_irgen_OIY(UChar i2, IRTemp op1addr)
6558{
6559 IRTemp op1 = newTemp(Ity_I8);
6560 UChar op2;
6561 IRTemp result = newTemp(Ity_I8);
6562
6563 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6564 op2 = i2;
6565 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6566 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6567 store(mkexpr(op1addr), mkexpr(result));
6568
6569 return "oiy";
6570}
6571
6572static HChar *
6573s390_irgen_OIHF(UChar r1, UInt i2)
6574{
6575 IRTemp op1 = newTemp(Ity_I32);
6576 UInt op2;
6577 IRTemp result = newTemp(Ity_I32);
6578
6579 assign(op1, get_gpr_w0(r1));
6580 op2 = i2;
6581 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6582 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6583 put_gpr_w0(r1, mkexpr(result));
6584
6585 return "oihf";
6586}
6587
6588static HChar *
6589s390_irgen_OIHH(UChar r1, UShort i2)
6590{
6591 IRTemp op1 = newTemp(Ity_I16);
6592 UShort op2;
6593 IRTemp result = newTemp(Ity_I16);
6594
6595 assign(op1, get_gpr_hw0(r1));
6596 op2 = i2;
6597 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6598 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6599 put_gpr_hw0(r1, mkexpr(result));
6600
6601 return "oihh";
6602}
6603
6604static HChar *
6605s390_irgen_OIHL(UChar r1, UShort i2)
6606{
6607 IRTemp op1 = newTemp(Ity_I16);
6608 UShort op2;
6609 IRTemp result = newTemp(Ity_I16);
6610
6611 assign(op1, get_gpr_hw1(r1));
6612 op2 = i2;
6613 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6614 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6615 put_gpr_hw1(r1, mkexpr(result));
6616
6617 return "oihl";
6618}
6619
6620static HChar *
6621s390_irgen_OILF(UChar r1, UInt i2)
6622{
6623 IRTemp op1 = newTemp(Ity_I32);
6624 UInt op2;
6625 IRTemp result = newTemp(Ity_I32);
6626
6627 assign(op1, get_gpr_w1(r1));
6628 op2 = i2;
6629 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6630 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6631 put_gpr_w1(r1, mkexpr(result));
6632
6633 return "oilf";
6634}
6635
6636static HChar *
6637s390_irgen_OILH(UChar r1, UShort i2)
6638{
6639 IRTemp op1 = newTemp(Ity_I16);
6640 UShort op2;
6641 IRTemp result = newTemp(Ity_I16);
6642
6643 assign(op1, get_gpr_hw2(r1));
6644 op2 = i2;
6645 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6646 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6647 put_gpr_hw2(r1, mkexpr(result));
6648
6649 return "oilh";
6650}
6651
6652static HChar *
6653s390_irgen_OILL(UChar r1, UShort i2)
6654{
6655 IRTemp op1 = newTemp(Ity_I16);
6656 UShort op2;
6657 IRTemp result = newTemp(Ity_I16);
6658
6659 assign(op1, get_gpr_hw3(r1));
6660 op2 = i2;
6661 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6662 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6663 put_gpr_hw3(r1, mkexpr(result));
6664
6665 return "oill";
6666}
6667
6668static HChar *
6669s390_irgen_PFD(void)
6670{
6671
6672 return "pfd";
6673}
6674
6675static HChar *
6676s390_irgen_PFDRL(void)
6677{
6678
6679 return "pfdrl";
6680}
6681
6682static HChar *
6683s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6684{
6685 IRTemp amount = newTemp(Ity_I64);
6686 IRTemp op = newTemp(Ity_I32);
6687
6688 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6689 assign(op, get_gpr_w1(r3));
6690 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6691 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6692 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6693
6694 return "rll";
6695}
6696
6697static HChar *
6698s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6699{
6700 IRTemp amount = newTemp(Ity_I64);
6701 IRTemp op = newTemp(Ity_I64);
6702
6703 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6704 assign(op, get_gpr_dw0(r3));
6705 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6706 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6707 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6708
6709 return "rllg";
6710}
6711
6712static HChar *
6713s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6714{
6715 UChar from;
6716 UChar to;
6717 UChar rot;
6718 UChar t_bit;
6719 ULong mask;
6720 ULong maskc;
6721 IRTemp result = newTemp(Ity_I64);
6722 IRTemp op2 = newTemp(Ity_I64);
6723
6724 from = i3 & 63;
6725 to = i4 & 63;
6726 rot = i5 & 63;
6727 t_bit = i3 & 128;
6728 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6729 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6730 mkU8(64 - rot))));
6731 if (from <= to) {
6732 mask = ~0ULL;
6733 mask = (mask >> from) & (mask << (63 - to));
6734 maskc = ~mask;
6735 } else {
6736 maskc = ~0ULL;
6737 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6738 mask = ~maskc;
6739 }
6740 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6741 ), mkU64(mask)));
6742 if (t_bit == 0) {
6743 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6744 mkU64(maskc)), mkexpr(result)));
6745 }
6746 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6747
6748 return "rnsbg";
6749}
6750
6751static HChar *
6752s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6753{
6754 UChar from;
6755 UChar to;
6756 UChar rot;
6757 UChar t_bit;
6758 ULong mask;
6759 ULong maskc;
6760 IRTemp result = newTemp(Ity_I64);
6761 IRTemp op2 = newTemp(Ity_I64);
6762
6763 from = i3 & 63;
6764 to = i4 & 63;
6765 rot = i5 & 63;
6766 t_bit = i3 & 128;
6767 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6768 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6769 mkU8(64 - rot))));
6770 if (from <= to) {
6771 mask = ~0ULL;
6772 mask = (mask >> from) & (mask << (63 - to));
6773 maskc = ~mask;
6774 } else {
6775 maskc = ~0ULL;
6776 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6777 mask = ~maskc;
6778 }
6779 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6780 ), mkU64(mask)));
6781 if (t_bit == 0) {
6782 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6783 mkU64(maskc)), mkexpr(result)));
6784 }
6785 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6786
6787 return "rxsbg";
6788}
6789
6790static HChar *
6791s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6792{
6793 UChar from;
6794 UChar to;
6795 UChar rot;
6796 UChar t_bit;
6797 ULong mask;
6798 ULong maskc;
6799 IRTemp result = newTemp(Ity_I64);
6800 IRTemp op2 = newTemp(Ity_I64);
6801
6802 from = i3 & 63;
6803 to = i4 & 63;
6804 rot = i5 & 63;
6805 t_bit = i3 & 128;
6806 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6807 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6808 mkU8(64 - rot))));
6809 if (from <= to) {
6810 mask = ~0ULL;
6811 mask = (mask >> from) & (mask << (63 - to));
6812 maskc = ~mask;
6813 } else {
6814 maskc = ~0ULL;
6815 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6816 mask = ~maskc;
6817 }
6818 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6819 ), mkU64(mask)));
6820 if (t_bit == 0) {
6821 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6822 mkU64(maskc)), mkexpr(result)));
6823 }
6824 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6825
6826 return "rosbg";
6827}
6828
6829static HChar *
6830s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6831{
6832 UChar from;
6833 UChar to;
6834 UChar rot;
6835 UChar z_bit;
6836 ULong mask;
6837 ULong maskc;
6838 IRTemp op2 = newTemp(Ity_I64);
6839 IRTemp result = newTemp(Ity_I64);
6840
6841 from = i3 & 63;
6842 to = i4 & 63;
6843 rot = i5 & 63;
6844 z_bit = i4 & 128;
6845 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6846 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6847 mkU8(64 - rot))));
6848 if (from <= to) {
6849 mask = ~0ULL;
6850 mask = (mask >> from) & (mask << (63 - to));
6851 maskc = ~mask;
6852 } else {
6853 maskc = ~0ULL;
6854 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6855 mask = ~maskc;
6856 }
6857 if (z_bit == 0) {
6858 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6859 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6860 } else {
6861 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6862 }
6863 assign(result, get_gpr_dw0(r1));
6864 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6865
6866 return "risbg";
6867}
6868
6869static HChar *
6870s390_irgen_SAR(UChar r1, UChar r2)
6871{
6872 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006873 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006874 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6875
6876 return "sar";
6877}
6878
6879static HChar *
6880s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6881{
6882 IRTemp p1 = newTemp(Ity_I64);
6883 IRTemp p2 = newTemp(Ity_I64);
6884 IRTemp op = newTemp(Ity_I64);
6885 IRTemp result = newTemp(Ity_I64);
6886 Long sign_mask;
6887 IRTemp shift_amount = newTemp(Ity_I64);
6888
6889 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6890 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6891 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6892 ));
6893 sign_mask = 1ULL << 63;
6894 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6895 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6896 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6897 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6898 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6899 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6900 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6901
6902 return "slda";
6903}
6904
6905static HChar *
6906s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6907{
6908 IRTemp p1 = newTemp(Ity_I64);
6909 IRTemp p2 = newTemp(Ity_I64);
6910 IRTemp result = newTemp(Ity_I64);
6911
6912 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6913 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6914 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6915 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6916 mkexpr(op2addr), mkU64(63)))));
6917 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6918 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6919
6920 return "sldl";
6921}
6922
6923static HChar *
6924s390_irgen_SLA(UChar r1, IRTemp op2addr)
6925{
6926 IRTemp uop = newTemp(Ity_I32);
6927 IRTemp result = newTemp(Ity_I32);
6928 UInt sign_mask;
6929 IRTemp shift_amount = newTemp(Ity_I64);
6930 IRTemp op = newTemp(Ity_I32);
6931
6932 assign(op, get_gpr_w1(r1));
6933 assign(uop, get_gpr_w1(r1));
6934 sign_mask = 2147483648U;
6935 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6936 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6937 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6938 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6939 put_gpr_w1(r1, mkexpr(result));
6940 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6941
6942 return "sla";
6943}
6944
6945static HChar *
6946s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6947{
6948 IRTemp uop = newTemp(Ity_I32);
6949 IRTemp result = newTemp(Ity_I32);
6950 UInt sign_mask;
6951 IRTemp shift_amount = newTemp(Ity_I64);
6952 IRTemp op = newTemp(Ity_I32);
6953
6954 assign(op, get_gpr_w1(r3));
6955 assign(uop, get_gpr_w1(r3));
6956 sign_mask = 2147483648U;
6957 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6958 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6959 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6960 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6961 put_gpr_w1(r1, mkexpr(result));
6962 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6963
6964 return "slak";
6965}
6966
6967static HChar *
6968s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6969{
6970 IRTemp uop = newTemp(Ity_I64);
6971 IRTemp result = newTemp(Ity_I64);
6972 ULong sign_mask;
6973 IRTemp shift_amount = newTemp(Ity_I64);
6974 IRTemp op = newTemp(Ity_I64);
6975
6976 assign(op, get_gpr_dw0(r3));
6977 assign(uop, get_gpr_dw0(r3));
6978 sign_mask = 9223372036854775808ULL;
6979 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6980 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6981 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6982 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6983 put_gpr_dw0(r1, mkexpr(result));
6984 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6985
6986 return "slag";
6987}
6988
6989static HChar *
6990s390_irgen_SLL(UChar r1, IRTemp op2addr)
6991{
6992 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6993 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6994
6995 return "sll";
6996}
6997
6998static HChar *
6999s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
7000{
7001 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
7002 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7003
7004 return "sllk";
7005}
7006
7007static HChar *
7008s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
7009{
7010 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
7011 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
7012
7013 return "sllg";
7014}
7015
7016static HChar *
7017s390_irgen_SRDA(UChar r1, IRTemp op2addr)
7018{
7019 IRTemp p1 = newTemp(Ity_I64);
7020 IRTemp p2 = newTemp(Ity_I64);
7021 IRTemp result = newTemp(Ity_I64);
7022
7023 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7024 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7025 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7026 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7027 mkexpr(op2addr), mkU64(63)))));
7028 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7029 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7030 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7031
7032 return "srda";
7033}
7034
7035static HChar *
7036s390_irgen_SRDL(UChar r1, IRTemp op2addr)
7037{
7038 IRTemp p1 = newTemp(Ity_I64);
7039 IRTemp p2 = newTemp(Ity_I64);
7040 IRTemp result = newTemp(Ity_I64);
7041
7042 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7043 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7044 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7045 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7046 mkexpr(op2addr), mkU64(63)))));
7047 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7048 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7049
7050 return "srdl";
7051}
7052
7053static HChar *
7054s390_irgen_SRA(UChar r1, IRTemp op2addr)
7055{
7056 IRTemp result = newTemp(Ity_I32);
7057 IRTemp op = newTemp(Ity_I32);
7058
7059 assign(op, get_gpr_w1(r1));
7060 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7061 mkexpr(op2addr), mkU64(63)))));
7062 put_gpr_w1(r1, mkexpr(result));
7063 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7064
7065 return "sra";
7066}
7067
7068static HChar *
7069s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7070{
7071 IRTemp result = newTemp(Ity_I32);
7072 IRTemp op = newTemp(Ity_I32);
7073
7074 assign(op, get_gpr_w1(r3));
7075 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7076 mkexpr(op2addr), mkU64(63)))));
7077 put_gpr_w1(r1, mkexpr(result));
7078 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7079
7080 return "srak";
7081}
7082
7083static HChar *
7084s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7085{
7086 IRTemp result = newTemp(Ity_I64);
7087 IRTemp op = newTemp(Ity_I64);
7088
7089 assign(op, get_gpr_dw0(r3));
7090 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7091 mkexpr(op2addr), mkU64(63)))));
7092 put_gpr_dw0(r1, mkexpr(result));
7093 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7094
7095 return "srag";
7096}
7097
7098static HChar *
7099s390_irgen_SRL(UChar r1, IRTemp op2addr)
7100{
7101 IRTemp op = newTemp(Ity_I32);
7102
7103 assign(op, get_gpr_w1(r1));
7104 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7105 mkexpr(op2addr), mkU64(63)))));
7106
7107 return "srl";
7108}
7109
7110static HChar *
7111s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7112{
7113 IRTemp op = newTemp(Ity_I32);
7114
7115 assign(op, get_gpr_w1(r3));
7116 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7117 mkexpr(op2addr), mkU64(63)))));
7118
7119 return "srlk";
7120}
7121
7122static HChar *
7123s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7124{
7125 IRTemp op = newTemp(Ity_I64);
7126
7127 assign(op, get_gpr_dw0(r3));
7128 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7129 mkexpr(op2addr), mkU64(63)))));
7130
7131 return "srlg";
7132}
7133
7134static HChar *
7135s390_irgen_ST(UChar r1, IRTemp op2addr)
7136{
7137 store(mkexpr(op2addr), get_gpr_w1(r1));
7138
7139 return "st";
7140}
7141
7142static HChar *
7143s390_irgen_STY(UChar r1, IRTemp op2addr)
7144{
7145 store(mkexpr(op2addr), get_gpr_w1(r1));
7146
7147 return "sty";
7148}
7149
7150static HChar *
7151s390_irgen_STG(UChar r1, IRTemp op2addr)
7152{
7153 store(mkexpr(op2addr), get_gpr_dw0(r1));
7154
7155 return "stg";
7156}
7157
7158static HChar *
7159s390_irgen_STRL(UChar r1, UInt i2)
7160{
7161 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7162 get_gpr_w1(r1));
7163
7164 return "strl";
7165}
7166
7167static HChar *
7168s390_irgen_STGRL(UChar r1, UInt i2)
7169{
7170 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7171 get_gpr_dw0(r1));
7172
7173 return "stgrl";
7174}
7175
7176static HChar *
7177s390_irgen_STC(UChar r1, IRTemp op2addr)
7178{
7179 store(mkexpr(op2addr), get_gpr_b7(r1));
7180
7181 return "stc";
7182}
7183
7184static HChar *
7185s390_irgen_STCY(UChar r1, IRTemp op2addr)
7186{
7187 store(mkexpr(op2addr), get_gpr_b7(r1));
7188
7189 return "stcy";
7190}
7191
7192static HChar *
7193s390_irgen_STCH(UChar r1, IRTemp op2addr)
7194{
7195 store(mkexpr(op2addr), get_gpr_b3(r1));
7196
7197 return "stch";
7198}
7199
7200static HChar *
7201s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7202{
7203 UChar mask;
7204 UChar n;
7205
7206 mask = (UChar)r3;
7207 n = 0;
7208 if ((mask & 8) != 0) {
7209 store(mkexpr(op2addr), get_gpr_b4(r1));
7210 n = n + 1;
7211 }
7212 if ((mask & 4) != 0) {
7213 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7214 n = n + 1;
7215 }
7216 if ((mask & 2) != 0) {
7217 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7218 n = n + 1;
7219 }
7220 if ((mask & 1) != 0) {
7221 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7222 }
7223
7224 return "stcm";
7225}
7226
7227static HChar *
7228s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7229{
7230 UChar mask;
7231 UChar n;
7232
7233 mask = (UChar)r3;
7234 n = 0;
7235 if ((mask & 8) != 0) {
7236 store(mkexpr(op2addr), get_gpr_b4(r1));
7237 n = n + 1;
7238 }
7239 if ((mask & 4) != 0) {
7240 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7241 n = n + 1;
7242 }
7243 if ((mask & 2) != 0) {
7244 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7245 n = n + 1;
7246 }
7247 if ((mask & 1) != 0) {
7248 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7249 }
7250
7251 return "stcmy";
7252}
7253
7254static HChar *
7255s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7256{
7257 UChar mask;
7258 UChar n;
7259
7260 mask = (UChar)r3;
7261 n = 0;
7262 if ((mask & 8) != 0) {
7263 store(mkexpr(op2addr), get_gpr_b0(r1));
7264 n = n + 1;
7265 }
7266 if ((mask & 4) != 0) {
7267 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7268 n = n + 1;
7269 }
7270 if ((mask & 2) != 0) {
7271 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7272 n = n + 1;
7273 }
7274 if ((mask & 1) != 0) {
7275 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7276 }
7277
7278 return "stcmh";
7279}
7280
7281static HChar *
7282s390_irgen_STH(UChar r1, IRTemp op2addr)
7283{
7284 store(mkexpr(op2addr), get_gpr_hw3(r1));
7285
7286 return "sth";
7287}
7288
7289static HChar *
7290s390_irgen_STHY(UChar r1, IRTemp op2addr)
7291{
7292 store(mkexpr(op2addr), get_gpr_hw3(r1));
7293
7294 return "sthy";
7295}
7296
7297static HChar *
7298s390_irgen_STHRL(UChar r1, UInt i2)
7299{
7300 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7301 get_gpr_hw3(r1));
7302
7303 return "sthrl";
7304}
7305
7306static HChar *
7307s390_irgen_STHH(UChar r1, IRTemp op2addr)
7308{
7309 store(mkexpr(op2addr), get_gpr_hw1(r1));
7310
7311 return "sthh";
7312}
7313
7314static HChar *
7315s390_irgen_STFH(UChar r1, IRTemp op2addr)
7316{
7317 store(mkexpr(op2addr), get_gpr_w0(r1));
7318
7319 return "stfh";
7320}
7321
7322static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007323s390_irgen_STOC(UChar r1, IRTemp op2addr)
7324{
7325 /* condition is checked in format handler */
7326 store(mkexpr(op2addr), get_gpr_w1(r1));
7327
7328 return "stoc";
7329}
7330
7331static HChar *
7332s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7333{
7334 /* condition is checked in format handler */
7335 store(mkexpr(op2addr), get_gpr_dw0(r1));
7336
7337 return "stocg";
7338}
7339
7340static HChar *
sewardj2019a972011-03-07 16:04:07 +00007341s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7342{
7343 store(mkexpr(op2addr), get_gpr_dw0(r1));
7344 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7345
7346 return "stpq";
7347}
7348
7349static HChar *
7350s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7351{
7352 store(mkexpr(op2addr), get_gpr_b7(r1));
7353 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7354
7355 return "strvh";
7356}
7357
7358static HChar *
7359s390_irgen_STRV(UChar r1, IRTemp op2addr)
7360{
7361 store(mkexpr(op2addr), get_gpr_b7(r1));
7362 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7363 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7364 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7365
7366 return "strv";
7367}
7368
7369static HChar *
7370s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7371{
7372 store(mkexpr(op2addr), get_gpr_b7(r1));
7373 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7374 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7375 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7376 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7377 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7378 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7379 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7380
7381 return "strvg";
7382}
7383
7384static HChar *
7385s390_irgen_SR(UChar r1, UChar r2)
7386{
7387 IRTemp op1 = newTemp(Ity_I32);
7388 IRTemp op2 = newTemp(Ity_I32);
7389 IRTemp result = newTemp(Ity_I32);
7390
7391 assign(op1, get_gpr_w1(r1));
7392 assign(op2, get_gpr_w1(r2));
7393 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7394 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7395 put_gpr_w1(r1, mkexpr(result));
7396
7397 return "sr";
7398}
7399
7400static HChar *
7401s390_irgen_SGR(UChar r1, UChar r2)
7402{
7403 IRTemp op1 = newTemp(Ity_I64);
7404 IRTemp op2 = newTemp(Ity_I64);
7405 IRTemp result = newTemp(Ity_I64);
7406
7407 assign(op1, get_gpr_dw0(r1));
7408 assign(op2, get_gpr_dw0(r2));
7409 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7410 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7411 put_gpr_dw0(r1, mkexpr(result));
7412
7413 return "sgr";
7414}
7415
7416static HChar *
7417s390_irgen_SGFR(UChar r1, UChar r2)
7418{
7419 IRTemp op1 = newTemp(Ity_I64);
7420 IRTemp op2 = newTemp(Ity_I64);
7421 IRTemp result = newTemp(Ity_I64);
7422
7423 assign(op1, get_gpr_dw0(r1));
7424 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7425 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7426 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7427 put_gpr_dw0(r1, mkexpr(result));
7428
7429 return "sgfr";
7430}
7431
7432static HChar *
7433s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7434{
7435 IRTemp op2 = newTemp(Ity_I32);
7436 IRTemp op3 = newTemp(Ity_I32);
7437 IRTemp result = newTemp(Ity_I32);
7438
7439 assign(op2, get_gpr_w1(r2));
7440 assign(op3, get_gpr_w1(r3));
7441 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7442 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7443 put_gpr_w1(r1, mkexpr(result));
7444
7445 return "srk";
7446}
7447
7448static HChar *
7449s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7450{
7451 IRTemp op2 = newTemp(Ity_I64);
7452 IRTemp op3 = newTemp(Ity_I64);
7453 IRTemp result = newTemp(Ity_I64);
7454
7455 assign(op2, get_gpr_dw0(r2));
7456 assign(op3, get_gpr_dw0(r3));
7457 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7458 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7459 put_gpr_dw0(r1, mkexpr(result));
7460
7461 return "sgrk";
7462}
7463
7464static HChar *
7465s390_irgen_S(UChar r1, IRTemp op2addr)
7466{
7467 IRTemp op1 = newTemp(Ity_I32);
7468 IRTemp op2 = newTemp(Ity_I32);
7469 IRTemp result = newTemp(Ity_I32);
7470
7471 assign(op1, get_gpr_w1(r1));
7472 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7473 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7474 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7475 put_gpr_w1(r1, mkexpr(result));
7476
7477 return "s";
7478}
7479
7480static HChar *
7481s390_irgen_SY(UChar r1, IRTemp op2addr)
7482{
7483 IRTemp op1 = newTemp(Ity_I32);
7484 IRTemp op2 = newTemp(Ity_I32);
7485 IRTemp result = newTemp(Ity_I32);
7486
7487 assign(op1, get_gpr_w1(r1));
7488 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7489 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7490 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7491 put_gpr_w1(r1, mkexpr(result));
7492
7493 return "sy";
7494}
7495
7496static HChar *
7497s390_irgen_SG(UChar r1, IRTemp op2addr)
7498{
7499 IRTemp op1 = newTemp(Ity_I64);
7500 IRTemp op2 = newTemp(Ity_I64);
7501 IRTemp result = newTemp(Ity_I64);
7502
7503 assign(op1, get_gpr_dw0(r1));
7504 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7505 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7506 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7507 put_gpr_dw0(r1, mkexpr(result));
7508
7509 return "sg";
7510}
7511
7512static HChar *
7513s390_irgen_SGF(UChar r1, IRTemp op2addr)
7514{
7515 IRTemp op1 = newTemp(Ity_I64);
7516 IRTemp op2 = newTemp(Ity_I64);
7517 IRTemp result = newTemp(Ity_I64);
7518
7519 assign(op1, get_gpr_dw0(r1));
7520 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7521 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7522 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7523 put_gpr_dw0(r1, mkexpr(result));
7524
7525 return "sgf";
7526}
7527
7528static HChar *
7529s390_irgen_SH(UChar r1, IRTemp op2addr)
7530{
7531 IRTemp op1 = newTemp(Ity_I32);
7532 IRTemp op2 = newTemp(Ity_I32);
7533 IRTemp result = newTemp(Ity_I32);
7534
7535 assign(op1, get_gpr_w1(r1));
7536 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7537 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7538 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7539 put_gpr_w1(r1, mkexpr(result));
7540
7541 return "sh";
7542}
7543
7544static HChar *
7545s390_irgen_SHY(UChar r1, IRTemp op2addr)
7546{
7547 IRTemp op1 = newTemp(Ity_I32);
7548 IRTemp op2 = newTemp(Ity_I32);
7549 IRTemp result = newTemp(Ity_I32);
7550
7551 assign(op1, get_gpr_w1(r1));
7552 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7553 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7554 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7555 put_gpr_w1(r1, mkexpr(result));
7556
7557 return "shy";
7558}
7559
7560static HChar *
7561s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7562{
7563 IRTemp op2 = newTemp(Ity_I32);
7564 IRTemp op3 = newTemp(Ity_I32);
7565 IRTemp result = newTemp(Ity_I32);
7566
7567 assign(op2, get_gpr_w0(r1));
7568 assign(op3, get_gpr_w0(r2));
7569 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7570 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7571 put_gpr_w0(r1, mkexpr(result));
7572
7573 return "shhhr";
7574}
7575
7576static HChar *
7577s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7578{
7579 IRTemp op2 = newTemp(Ity_I32);
7580 IRTemp op3 = newTemp(Ity_I32);
7581 IRTemp result = newTemp(Ity_I32);
7582
7583 assign(op2, get_gpr_w0(r1));
7584 assign(op3, get_gpr_w1(r2));
7585 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7586 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7587 put_gpr_w0(r1, mkexpr(result));
7588
7589 return "shhlr";
7590}
7591
7592static HChar *
7593s390_irgen_SLR(UChar r1, UChar r2)
7594{
7595 IRTemp op1 = newTemp(Ity_I32);
7596 IRTemp op2 = newTemp(Ity_I32);
7597 IRTemp result = newTemp(Ity_I32);
7598
7599 assign(op1, get_gpr_w1(r1));
7600 assign(op2, get_gpr_w1(r2));
7601 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7602 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7603 put_gpr_w1(r1, mkexpr(result));
7604
7605 return "slr";
7606}
7607
7608static HChar *
7609s390_irgen_SLGR(UChar r1, UChar r2)
7610{
7611 IRTemp op1 = newTemp(Ity_I64);
7612 IRTemp op2 = newTemp(Ity_I64);
7613 IRTemp result = newTemp(Ity_I64);
7614
7615 assign(op1, get_gpr_dw0(r1));
7616 assign(op2, get_gpr_dw0(r2));
7617 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7618 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7619 put_gpr_dw0(r1, mkexpr(result));
7620
7621 return "slgr";
7622}
7623
7624static HChar *
7625s390_irgen_SLGFR(UChar r1, UChar r2)
7626{
7627 IRTemp op1 = newTemp(Ity_I64);
7628 IRTemp op2 = newTemp(Ity_I64);
7629 IRTemp result = newTemp(Ity_I64);
7630
7631 assign(op1, get_gpr_dw0(r1));
7632 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7633 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7634 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7635 put_gpr_dw0(r1, mkexpr(result));
7636
7637 return "slgfr";
7638}
7639
7640static HChar *
7641s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7642{
7643 IRTemp op2 = newTemp(Ity_I32);
7644 IRTemp op3 = newTemp(Ity_I32);
7645 IRTemp result = newTemp(Ity_I32);
7646
7647 assign(op2, get_gpr_w1(r2));
7648 assign(op3, get_gpr_w1(r3));
7649 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7650 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7651 put_gpr_w1(r1, mkexpr(result));
7652
7653 return "slrk";
7654}
7655
7656static HChar *
7657s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7658{
7659 IRTemp op2 = newTemp(Ity_I64);
7660 IRTemp op3 = newTemp(Ity_I64);
7661 IRTemp result = newTemp(Ity_I64);
7662
7663 assign(op2, get_gpr_dw0(r2));
7664 assign(op3, get_gpr_dw0(r3));
7665 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7666 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7667 put_gpr_dw0(r1, mkexpr(result));
7668
7669 return "slgrk";
7670}
7671
7672static HChar *
7673s390_irgen_SL(UChar r1, IRTemp op2addr)
7674{
7675 IRTemp op1 = newTemp(Ity_I32);
7676 IRTemp op2 = newTemp(Ity_I32);
7677 IRTemp result = newTemp(Ity_I32);
7678
7679 assign(op1, get_gpr_w1(r1));
7680 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7681 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7682 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7683 put_gpr_w1(r1, mkexpr(result));
7684
7685 return "sl";
7686}
7687
7688static HChar *
7689s390_irgen_SLY(UChar r1, IRTemp op2addr)
7690{
7691 IRTemp op1 = newTemp(Ity_I32);
7692 IRTemp op2 = newTemp(Ity_I32);
7693 IRTemp result = newTemp(Ity_I32);
7694
7695 assign(op1, get_gpr_w1(r1));
7696 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7697 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7698 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7699 put_gpr_w1(r1, mkexpr(result));
7700
7701 return "sly";
7702}
7703
7704static HChar *
7705s390_irgen_SLG(UChar r1, IRTemp op2addr)
7706{
7707 IRTemp op1 = newTemp(Ity_I64);
7708 IRTemp op2 = newTemp(Ity_I64);
7709 IRTemp result = newTemp(Ity_I64);
7710
7711 assign(op1, get_gpr_dw0(r1));
7712 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7713 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7714 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7715 put_gpr_dw0(r1, mkexpr(result));
7716
7717 return "slg";
7718}
7719
7720static HChar *
7721s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7722{
7723 IRTemp op1 = newTemp(Ity_I64);
7724 IRTemp op2 = newTemp(Ity_I64);
7725 IRTemp result = newTemp(Ity_I64);
7726
7727 assign(op1, get_gpr_dw0(r1));
7728 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7729 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7730 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7731 put_gpr_dw0(r1, mkexpr(result));
7732
7733 return "slgf";
7734}
7735
7736static HChar *
7737s390_irgen_SLFI(UChar r1, UInt i2)
7738{
7739 IRTemp op1 = newTemp(Ity_I32);
7740 UInt op2;
7741 IRTemp result = newTemp(Ity_I32);
7742
7743 assign(op1, get_gpr_w1(r1));
7744 op2 = i2;
7745 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7746 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7747 mkU32(op2)));
7748 put_gpr_w1(r1, mkexpr(result));
7749
7750 return "slfi";
7751}
7752
7753static HChar *
7754s390_irgen_SLGFI(UChar r1, UInt i2)
7755{
7756 IRTemp op1 = newTemp(Ity_I64);
7757 ULong op2;
7758 IRTemp result = newTemp(Ity_I64);
7759
7760 assign(op1, get_gpr_dw0(r1));
7761 op2 = (ULong)i2;
7762 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7763 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7764 mkU64(op2)));
7765 put_gpr_dw0(r1, mkexpr(result));
7766
7767 return "slgfi";
7768}
7769
7770static HChar *
7771s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7772{
7773 IRTemp op2 = newTemp(Ity_I32);
7774 IRTemp op3 = newTemp(Ity_I32);
7775 IRTemp result = newTemp(Ity_I32);
7776
7777 assign(op2, get_gpr_w0(r1));
7778 assign(op3, get_gpr_w0(r2));
7779 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7780 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7781 put_gpr_w0(r1, mkexpr(result));
7782
7783 return "slhhhr";
7784}
7785
7786static HChar *
7787s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7788{
7789 IRTemp op2 = newTemp(Ity_I32);
7790 IRTemp op3 = newTemp(Ity_I32);
7791 IRTemp result = newTemp(Ity_I32);
7792
7793 assign(op2, get_gpr_w0(r1));
7794 assign(op3, get_gpr_w1(r2));
7795 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7796 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7797 put_gpr_w0(r1, mkexpr(result));
7798
7799 return "slhhlr";
7800}
7801
7802static HChar *
7803s390_irgen_SLBR(UChar r1, UChar r2)
7804{
7805 IRTemp op1 = newTemp(Ity_I32);
7806 IRTemp op2 = newTemp(Ity_I32);
7807 IRTemp result = newTemp(Ity_I32);
7808 IRTemp borrow_in = newTemp(Ity_I32);
7809
7810 assign(op1, get_gpr_w1(r1));
7811 assign(op2, get_gpr_w1(r2));
7812 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7813 s390_call_calculate_cc(), mkU8(1))));
7814 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7815 mkexpr(borrow_in)));
7816 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7817 put_gpr_w1(r1, mkexpr(result));
7818
7819 return "slbr";
7820}
7821
7822static HChar *
7823s390_irgen_SLBGR(UChar r1, UChar r2)
7824{
7825 IRTemp op1 = newTemp(Ity_I64);
7826 IRTemp op2 = newTemp(Ity_I64);
7827 IRTemp result = newTemp(Ity_I64);
7828 IRTemp borrow_in = newTemp(Ity_I64);
7829
7830 assign(op1, get_gpr_dw0(r1));
7831 assign(op2, get_gpr_dw0(r2));
7832 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7833 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7834 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7835 mkexpr(borrow_in)));
7836 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7837 put_gpr_dw0(r1, mkexpr(result));
7838
7839 return "slbgr";
7840}
7841
7842static HChar *
7843s390_irgen_SLB(UChar r1, IRTemp op2addr)
7844{
7845 IRTemp op1 = newTemp(Ity_I32);
7846 IRTemp op2 = newTemp(Ity_I32);
7847 IRTemp result = newTemp(Ity_I32);
7848 IRTemp borrow_in = newTemp(Ity_I32);
7849
7850 assign(op1, get_gpr_w1(r1));
7851 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7852 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7853 s390_call_calculate_cc(), mkU8(1))));
7854 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7855 mkexpr(borrow_in)));
7856 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7857 put_gpr_w1(r1, mkexpr(result));
7858
7859 return "slb";
7860}
7861
7862static HChar *
7863s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7864{
7865 IRTemp op1 = newTemp(Ity_I64);
7866 IRTemp op2 = newTemp(Ity_I64);
7867 IRTemp result = newTemp(Ity_I64);
7868 IRTemp borrow_in = newTemp(Ity_I64);
7869
7870 assign(op1, get_gpr_dw0(r1));
7871 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7872 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7873 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7874 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7875 mkexpr(borrow_in)));
7876 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7877 put_gpr_dw0(r1, mkexpr(result));
7878
7879 return "slbg";
7880}
7881
7882static HChar *
7883s390_irgen_SVC(UChar i)
7884{
7885 IRTemp sysno = newTemp(Ity_I64);
7886
7887 if (i != 0) {
7888 assign(sysno, mkU64(i));
7889 } else {
7890 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7891 }
7892 system_call(mkexpr(sysno));
7893
7894 return "svc";
7895}
7896
7897static HChar *
sewardj2019a972011-03-07 16:04:07 +00007898s390_irgen_TM(UChar i2, IRTemp op1addr)
7899{
7900 UChar mask;
7901 IRTemp value = newTemp(Ity_I8);
7902
7903 mask = i2;
7904 assign(value, load(Ity_I8, mkexpr(op1addr)));
7905 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7906 mkU8(mask)));
7907
7908 return "tm";
7909}
7910
7911static HChar *
7912s390_irgen_TMY(UChar i2, IRTemp op1addr)
7913{
7914 UChar mask;
7915 IRTemp value = newTemp(Ity_I8);
7916
7917 mask = i2;
7918 assign(value, load(Ity_I8, mkexpr(op1addr)));
7919 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7920 mkU8(mask)));
7921
7922 return "tmy";
7923}
7924
7925static HChar *
7926s390_irgen_TMHH(UChar r1, UShort i2)
7927{
7928 UShort mask;
7929 IRTemp value = newTemp(Ity_I16);
7930
7931 mask = i2;
7932 assign(value, get_gpr_hw0(r1));
7933 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7934 mkU16(mask)));
7935
7936 return "tmhh";
7937}
7938
7939static HChar *
7940s390_irgen_TMHL(UChar r1, UShort i2)
7941{
7942 UShort mask;
7943 IRTemp value = newTemp(Ity_I16);
7944
7945 mask = i2;
7946 assign(value, get_gpr_hw1(r1));
7947 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7948 mkU16(mask)));
7949
7950 return "tmhl";
7951}
7952
7953static HChar *
7954s390_irgen_TMLH(UChar r1, UShort i2)
7955{
7956 UShort mask;
7957 IRTemp value = newTemp(Ity_I16);
7958
7959 mask = i2;
7960 assign(value, get_gpr_hw2(r1));
7961 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7962 mkU16(mask)));
7963
7964 return "tmlh";
7965}
7966
7967static HChar *
7968s390_irgen_TMLL(UChar r1, UShort i2)
7969{
7970 UShort mask;
7971 IRTemp value = newTemp(Ity_I16);
7972
7973 mask = i2;
7974 assign(value, get_gpr_hw3(r1));
7975 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7976 mkU16(mask)));
7977
7978 return "tmll";
7979}
7980
7981static HChar *
7982s390_irgen_EFPC(UChar r1)
7983{
7984 put_gpr_w1(r1, get_fpc_w0());
7985
7986 return "efpc";
7987}
7988
7989static HChar *
7990s390_irgen_LER(UChar r1, UChar r2)
7991{
7992 put_fpr_w0(r1, get_fpr_w0(r2));
7993
7994 return "ler";
7995}
7996
7997static HChar *
7998s390_irgen_LDR(UChar r1, UChar r2)
7999{
8000 put_fpr_dw0(r1, get_fpr_dw0(r2));
8001
8002 return "ldr";
8003}
8004
8005static HChar *
8006s390_irgen_LXR(UChar r1, UChar r2)
8007{
8008 put_fpr_dw0(r1, get_fpr_dw0(r2));
8009 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
8010
8011 return "lxr";
8012}
8013
8014static HChar *
8015s390_irgen_LE(UChar r1, IRTemp op2addr)
8016{
8017 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8018
8019 return "le";
8020}
8021
8022static HChar *
8023s390_irgen_LD(UChar r1, IRTemp op2addr)
8024{
8025 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8026
8027 return "ld";
8028}
8029
8030static HChar *
8031s390_irgen_LEY(UChar r1, IRTemp op2addr)
8032{
8033 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8034
8035 return "ley";
8036}
8037
8038static HChar *
8039s390_irgen_LDY(UChar r1, IRTemp op2addr)
8040{
8041 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8042
8043 return "ldy";
8044}
8045
8046static HChar *
8047s390_irgen_LFPC(IRTemp op2addr)
8048{
8049 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8050
8051 return "lfpc";
8052}
8053
8054static HChar *
8055s390_irgen_LZER(UChar r1)
8056{
8057 put_fpr_w0(r1, mkF32i(0x0));
8058
8059 return "lzer";
8060}
8061
8062static HChar *
8063s390_irgen_LZDR(UChar r1)
8064{
8065 put_fpr_dw0(r1, mkF64i(0x0));
8066
8067 return "lzdr";
8068}
8069
8070static HChar *
8071s390_irgen_LZXR(UChar r1)
8072{
8073 put_fpr_dw0(r1, mkF64i(0x0));
8074 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8075
8076 return "lzxr";
8077}
8078
8079static HChar *
8080s390_irgen_SRNM(IRTemp op2addr)
8081{
8082 UInt mask;
8083
8084 mask = 3;
8085 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8086 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8087 );
8088
8089 return "srnm";
8090}
8091
8092static HChar *
8093s390_irgen_SFPC(UChar r1)
8094{
8095 put_fpc_w0(get_gpr_w1(r1));
8096
8097 return "sfpc";
8098}
8099
8100static HChar *
8101s390_irgen_STE(UChar r1, IRTemp op2addr)
8102{
8103 store(mkexpr(op2addr), get_fpr_w0(r1));
8104
8105 return "ste";
8106}
8107
8108static HChar *
8109s390_irgen_STD(UChar r1, IRTemp op2addr)
8110{
8111 store(mkexpr(op2addr), get_fpr_dw0(r1));
8112
8113 return "std";
8114}
8115
8116static HChar *
8117s390_irgen_STEY(UChar r1, IRTemp op2addr)
8118{
8119 store(mkexpr(op2addr), get_fpr_w0(r1));
8120
8121 return "stey";
8122}
8123
8124static HChar *
8125s390_irgen_STDY(UChar r1, IRTemp op2addr)
8126{
8127 store(mkexpr(op2addr), get_fpr_dw0(r1));
8128
8129 return "stdy";
8130}
8131
8132static HChar *
8133s390_irgen_STFPC(IRTemp op2addr)
8134{
8135 store(mkexpr(op2addr), get_fpc_w0());
8136
8137 return "stfpc";
8138}
8139
8140static HChar *
8141s390_irgen_AEBR(UChar r1, UChar r2)
8142{
8143 IRTemp op1 = newTemp(Ity_F32);
8144 IRTemp op2 = newTemp(Ity_F32);
8145 IRTemp result = newTemp(Ity_F32);
8146
8147 assign(op1, get_fpr_w0(r1));
8148 assign(op2, get_fpr_w0(r2));
8149 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8150 mkexpr(op2)));
8151 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8152 put_fpr_w0(r1, mkexpr(result));
8153
8154 return "aebr";
8155}
8156
8157static HChar *
8158s390_irgen_ADBR(UChar r1, UChar r2)
8159{
8160 IRTemp op1 = newTemp(Ity_F64);
8161 IRTemp op2 = newTemp(Ity_F64);
8162 IRTemp result = newTemp(Ity_F64);
8163
8164 assign(op1, get_fpr_dw0(r1));
8165 assign(op2, get_fpr_dw0(r2));
8166 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8167 mkexpr(op2)));
8168 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8169 put_fpr_dw0(r1, mkexpr(result));
8170
8171 return "adbr";
8172}
8173
8174static HChar *
8175s390_irgen_AEB(UChar r1, IRTemp op2addr)
8176{
8177 IRTemp op1 = newTemp(Ity_F32);
8178 IRTemp op2 = newTemp(Ity_F32);
8179 IRTemp result = newTemp(Ity_F32);
8180
8181 assign(op1, get_fpr_w0(r1));
8182 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8183 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8184 mkexpr(op2)));
8185 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8186 put_fpr_w0(r1, mkexpr(result));
8187
8188 return "aeb";
8189}
8190
8191static HChar *
8192s390_irgen_ADB(UChar r1, IRTemp op2addr)
8193{
8194 IRTemp op1 = newTemp(Ity_F64);
8195 IRTemp op2 = newTemp(Ity_F64);
8196 IRTemp result = newTemp(Ity_F64);
8197
8198 assign(op1, get_fpr_dw0(r1));
8199 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8200 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8201 mkexpr(op2)));
8202 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8203 put_fpr_dw0(r1, mkexpr(result));
8204
8205 return "adb";
8206}
8207
8208static HChar *
8209s390_irgen_CEFBR(UChar r1, UChar r2)
8210{
8211 IRTemp op2 = newTemp(Ity_I32);
8212
8213 assign(op2, get_gpr_w1(r2));
8214 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8215
8216 return "cefbr";
8217}
8218
8219static HChar *
8220s390_irgen_CDFBR(UChar r1, UChar r2)
8221{
8222 IRTemp op2 = newTemp(Ity_I32);
8223
8224 assign(op2, get_gpr_w1(r2));
8225 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8226
8227 return "cdfbr";
8228}
8229
8230static HChar *
8231s390_irgen_CEGBR(UChar r1, UChar r2)
8232{
8233 IRTemp op2 = newTemp(Ity_I64);
8234
8235 assign(op2, get_gpr_dw0(r2));
8236 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8237
8238 return "cegbr";
8239}
8240
8241static HChar *
8242s390_irgen_CDGBR(UChar r1, UChar r2)
8243{
8244 IRTemp op2 = newTemp(Ity_I64);
8245
8246 assign(op2, get_gpr_dw0(r2));
8247 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8248
8249 return "cdgbr";
8250}
8251
8252static HChar *
8253s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8254{
8255 IRTemp op = newTemp(Ity_F32);
8256 IRTemp result = newTemp(Ity_I32);
8257
8258 assign(op, get_fpr_w0(r2));
8259 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8260 mkexpr(op)));
8261 put_gpr_w1(r1, mkexpr(result));
8262 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8263
8264 return "cfebr";
8265}
8266
8267static HChar *
8268s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8269{
8270 IRTemp op = newTemp(Ity_F64);
8271 IRTemp result = newTemp(Ity_I32);
8272
8273 assign(op, get_fpr_dw0(r2));
8274 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8275 mkexpr(op)));
8276 put_gpr_w1(r1, mkexpr(result));
8277 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8278
8279 return "cfdbr";
8280}
8281
8282static HChar *
8283s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8284{
8285 IRTemp op = newTemp(Ity_F32);
8286 IRTemp result = newTemp(Ity_I64);
8287
8288 assign(op, get_fpr_w0(r2));
8289 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8290 mkexpr(op)));
8291 put_gpr_dw0(r1, mkexpr(result));
8292 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8293
8294 return "cgebr";
8295}
8296
8297static HChar *
8298s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8299{
8300 IRTemp op = newTemp(Ity_F64);
8301 IRTemp result = newTemp(Ity_I64);
8302
8303 assign(op, get_fpr_dw0(r2));
8304 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8305 mkexpr(op)));
8306 put_gpr_dw0(r1, mkexpr(result));
8307 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8308
8309 return "cgdbr";
8310}
8311
8312static HChar *
8313s390_irgen_DEBR(UChar r1, UChar r2)
8314{
8315 IRTemp op1 = newTemp(Ity_F32);
8316 IRTemp op2 = newTemp(Ity_F32);
8317 IRTemp result = newTemp(Ity_F32);
8318
8319 assign(op1, get_fpr_w0(r1));
8320 assign(op2, get_fpr_w0(r2));
8321 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8322 mkexpr(op2)));
8323 put_fpr_w0(r1, mkexpr(result));
8324
8325 return "debr";
8326}
8327
8328static HChar *
8329s390_irgen_DDBR(UChar r1, UChar r2)
8330{
8331 IRTemp op1 = newTemp(Ity_F64);
8332 IRTemp op2 = newTemp(Ity_F64);
8333 IRTemp result = newTemp(Ity_F64);
8334
8335 assign(op1, get_fpr_dw0(r1));
8336 assign(op2, get_fpr_dw0(r2));
8337 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8338 mkexpr(op2)));
8339 put_fpr_dw0(r1, mkexpr(result));
8340
8341 return "ddbr";
8342}
8343
8344static HChar *
8345s390_irgen_DEB(UChar r1, IRTemp op2addr)
8346{
8347 IRTemp op1 = newTemp(Ity_F32);
8348 IRTemp op2 = newTemp(Ity_F32);
8349 IRTemp result = newTemp(Ity_F32);
8350
8351 assign(op1, get_fpr_w0(r1));
8352 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8353 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8354 mkexpr(op2)));
8355 put_fpr_w0(r1, mkexpr(result));
8356
8357 return "deb";
8358}
8359
8360static HChar *
8361s390_irgen_DDB(UChar r1, IRTemp op2addr)
8362{
8363 IRTemp op1 = newTemp(Ity_F64);
8364 IRTemp op2 = newTemp(Ity_F64);
8365 IRTemp result = newTemp(Ity_F64);
8366
8367 assign(op1, get_fpr_dw0(r1));
8368 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8369 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8370 mkexpr(op2)));
8371 put_fpr_dw0(r1, mkexpr(result));
8372
8373 return "ddb";
8374}
8375
8376static HChar *
8377s390_irgen_LTEBR(UChar r1, UChar r2)
8378{
8379 IRTemp result = newTemp(Ity_F32);
8380
8381 assign(result, get_fpr_w0(r2));
8382 put_fpr_w0(r1, mkexpr(result));
8383 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8384
8385 return "ltebr";
8386}
8387
8388static HChar *
8389s390_irgen_LTDBR(UChar r1, UChar r2)
8390{
8391 IRTemp result = newTemp(Ity_F64);
8392
8393 assign(result, get_fpr_dw0(r2));
8394 put_fpr_dw0(r1, mkexpr(result));
8395 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8396
8397 return "ltdbr";
8398}
8399
8400static HChar *
8401s390_irgen_LCEBR(UChar r1, UChar r2)
8402{
8403 IRTemp result = newTemp(Ity_F32);
8404
8405 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8406 put_fpr_w0(r1, mkexpr(result));
8407 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8408
8409 return "lcebr";
8410}
8411
8412static HChar *
8413s390_irgen_LCDBR(UChar r1, UChar r2)
8414{
8415 IRTemp result = newTemp(Ity_F64);
8416
8417 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8418 put_fpr_dw0(r1, mkexpr(result));
8419 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8420
8421 return "lcdbr";
8422}
8423
8424static HChar *
8425s390_irgen_LDEBR(UChar r1, UChar r2)
8426{
8427 IRTemp op = newTemp(Ity_F32);
8428
8429 assign(op, get_fpr_w0(r2));
8430 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8431
8432 return "ldebr";
8433}
8434
8435static HChar *
8436s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8437{
8438 IRTemp op = newTemp(Ity_F32);
8439
8440 assign(op, load(Ity_F32, mkexpr(op2addr)));
8441 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8442
8443 return "ldeb";
8444}
8445
8446static HChar *
8447s390_irgen_LEDBR(UChar r1, UChar r2)
8448{
8449 IRTemp op = newTemp(Ity_F64);
8450
8451 assign(op, get_fpr_dw0(r2));
8452 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8453
8454 return "ledbr";
8455}
8456
8457static HChar *
8458s390_irgen_MEEBR(UChar r1, UChar r2)
8459{
8460 IRTemp op1 = newTemp(Ity_F32);
8461 IRTemp op2 = newTemp(Ity_F32);
8462 IRTemp result = newTemp(Ity_F32);
8463
8464 assign(op1, get_fpr_w0(r1));
8465 assign(op2, get_fpr_w0(r2));
8466 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8467 mkexpr(op2)));
8468 put_fpr_w0(r1, mkexpr(result));
8469
8470 return "meebr";
8471}
8472
8473static HChar *
8474s390_irgen_MDBR(UChar r1, UChar r2)
8475{
8476 IRTemp op1 = newTemp(Ity_F64);
8477 IRTemp op2 = newTemp(Ity_F64);
8478 IRTemp result = newTemp(Ity_F64);
8479
8480 assign(op1, get_fpr_dw0(r1));
8481 assign(op2, get_fpr_dw0(r2));
8482 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8483 mkexpr(op2)));
8484 put_fpr_dw0(r1, mkexpr(result));
8485
8486 return "mdbr";
8487}
8488
8489static HChar *
8490s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8491{
8492 IRTemp op1 = newTemp(Ity_F32);
8493 IRTemp op2 = newTemp(Ity_F32);
8494 IRTemp result = newTemp(Ity_F32);
8495
8496 assign(op1, get_fpr_w0(r1));
8497 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8498 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8499 mkexpr(op2)));
8500 put_fpr_w0(r1, mkexpr(result));
8501
8502 return "meeb";
8503}
8504
8505static HChar *
8506s390_irgen_MDB(UChar r1, IRTemp op2addr)
8507{
8508 IRTemp op1 = newTemp(Ity_F64);
8509 IRTemp op2 = newTemp(Ity_F64);
8510 IRTemp result = newTemp(Ity_F64);
8511
8512 assign(op1, get_fpr_dw0(r1));
8513 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8514 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8515 mkexpr(op2)));
8516 put_fpr_dw0(r1, mkexpr(result));
8517
8518 return "mdb";
8519}
8520
8521static HChar *
8522s390_irgen_SEBR(UChar r1, UChar r2)
8523{
8524 IRTemp op1 = newTemp(Ity_F32);
8525 IRTemp op2 = newTemp(Ity_F32);
8526 IRTemp result = newTemp(Ity_F32);
8527
8528 assign(op1, get_fpr_w0(r1));
8529 assign(op2, get_fpr_w0(r2));
8530 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8531 mkexpr(op2)));
8532 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8533 put_fpr_w0(r1, mkexpr(result));
8534
8535 return "sebr";
8536}
8537
8538static HChar *
8539s390_irgen_SDBR(UChar r1, UChar r2)
8540{
8541 IRTemp op1 = newTemp(Ity_F64);
8542 IRTemp op2 = newTemp(Ity_F64);
8543 IRTemp result = newTemp(Ity_F64);
8544
8545 assign(op1, get_fpr_dw0(r1));
8546 assign(op2, get_fpr_dw0(r2));
8547 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8548 mkexpr(op2)));
8549 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8550 put_fpr_dw0(r1, mkexpr(result));
8551
8552 return "sdbr";
8553}
8554
8555static HChar *
8556s390_irgen_SEB(UChar r1, IRTemp op2addr)
8557{
8558 IRTemp op1 = newTemp(Ity_F32);
8559 IRTemp op2 = newTemp(Ity_F32);
8560 IRTemp result = newTemp(Ity_F32);
8561
8562 assign(op1, get_fpr_w0(r1));
8563 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8564 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8565 mkexpr(op2)));
8566 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8567 put_fpr_w0(r1, mkexpr(result));
8568
8569 return "seb";
8570}
8571
8572static HChar *
8573s390_irgen_SDB(UChar r1, IRTemp op2addr)
8574{
8575 IRTemp op1 = newTemp(Ity_F64);
8576 IRTemp op2 = newTemp(Ity_F64);
8577 IRTemp result = newTemp(Ity_F64);
8578
8579 assign(op1, get_fpr_dw0(r1));
8580 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8581 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8582 mkexpr(op2)));
8583 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8584 put_fpr_dw0(r1, mkexpr(result));
8585
8586 return "sdb";
8587}
8588
8589
8590static HChar *
8591s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8592{
florian79e839e2012-05-05 02:20:30 +00008593 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00008594
florian79e839e2012-05-05 02:20:30 +00008595 assign(len, mkU64(length));
8596 s390_irgen_CLC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008597 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00008598
8599 return "clc";
8600}
8601
8602static HChar *
florianb0c9a132011-09-08 15:37:39 +00008603s390_irgen_CLCL(UChar r1, UChar r2)
8604{
8605 IRTemp addr1 = newTemp(Ity_I64);
8606 IRTemp addr2 = newTemp(Ity_I64);
8607 IRTemp addr1_load = newTemp(Ity_I64);
8608 IRTemp addr2_load = newTemp(Ity_I64);
8609 IRTemp len1 = newTemp(Ity_I32);
8610 IRTemp len2 = newTemp(Ity_I32);
8611 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8612 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8613 IRTemp single1 = newTemp(Ity_I8);
8614 IRTemp single2 = newTemp(Ity_I8);
8615 IRTemp pad = newTemp(Ity_I8);
8616
8617 assign(addr1, get_gpr_dw0(r1));
8618 assign(r1p1, get_gpr_w1(r1 + 1));
8619 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8620 assign(addr2, get_gpr_dw0(r2));
8621 assign(r2p1, get_gpr_w1(r2 + 1));
8622 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8623 assign(pad, get_gpr_b4(r2 + 1));
8624
8625 /* len1 == 0 and len2 == 0? Exit */
8626 s390_cc_set(0);
8627 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8628 mkexpr(len2)), mkU32(0)),
8629 guest_IA_next_instr);
8630
8631 /* Because mkite evaluates both the then-clause and the else-clause
8632 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8633 may be NULL and loading from there would segfault. So we provide a
8634 valid dummy address in that case. Loading from there does no harm and
8635 the value will be discarded at runtime. */
8636 assign(addr1_load,
8637 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8638 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8639 assign(single1,
8640 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8641 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8642
8643 assign(addr2_load,
8644 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8645 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8646 assign(single2,
8647 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8648 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8649
8650 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8651 /* Fields differ ? */
8652 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8653 guest_IA_next_instr);
8654
8655 /* Update len1 and addr1, unless len1 == 0. */
8656 put_gpr_dw0(r1,
8657 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8658 mkexpr(addr1),
8659 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8660
8661 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8662 put_gpr_w1(r1 + 1,
8663 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8664 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8665 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8666
8667 /* Update len2 and addr2, unless len2 == 0. */
8668 put_gpr_dw0(r2,
8669 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8670 mkexpr(addr2),
8671 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8672
8673 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8674 put_gpr_w1(r2 + 1,
8675 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8676 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8677 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8678
8679 always_goto_and_chase(guest_IA_curr_instr);
8680
8681 return "clcl";
8682}
8683
8684static HChar *
sewardj2019a972011-03-07 16:04:07 +00008685s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8686{
8687 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8688
8689 addr1 = newTemp(Ity_I64);
8690 addr3 = newTemp(Ity_I64);
8691 addr1_load = newTemp(Ity_I64);
8692 addr3_load = newTemp(Ity_I64);
8693 len1 = newTemp(Ity_I64);
8694 len3 = newTemp(Ity_I64);
8695 single1 = newTemp(Ity_I8);
8696 single3 = newTemp(Ity_I8);
8697
8698 assign(addr1, get_gpr_dw0(r1));
8699 assign(len1, get_gpr_dw0(r1 + 1));
8700 assign(addr3, get_gpr_dw0(r3));
8701 assign(len3, get_gpr_dw0(r3 + 1));
8702
8703 /* len1 == 0 and len3 == 0? Exit */
8704 s390_cc_set(0);
8705 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8706 mkexpr(len3)), mkU64(0)),
8707 guest_IA_next_instr);
8708
8709 /* A mux requires both ways to be possible. This is a way to prevent clcle
8710 from reading from addr1 if it should read from the pad. Since the pad
8711 has no address, just read from the instruction, we discard that anyway */
8712 assign(addr1_load,
florian6ad49522011-09-09 02:38:55 +00008713 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8714 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
sewardj2019a972011-03-07 16:04:07 +00008715
8716 /* same for addr3 */
8717 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00008718 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8719 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00008720
8721 assign(single1,
florian6ad49522011-09-09 02:38:55 +00008722 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8723 unop(Iop_64to8, mkexpr(pad2)),
8724 load(Ity_I8, mkexpr(addr1_load))));
sewardj2019a972011-03-07 16:04:07 +00008725
8726 assign(single3,
florian6ad49522011-09-09 02:38:55 +00008727 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8728 unop(Iop_64to8, mkexpr(pad2)),
8729 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00008730
8731 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8732 /* Both fields differ ? */
8733 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8734 guest_IA_next_instr);
8735
8736 /* If a length in 0 we must not change this length and the address */
8737 put_gpr_dw0(r1,
florian6ad49522011-09-09 02:38:55 +00008738 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8739 mkexpr(addr1),
8740 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008741
8742 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +00008743 mkite(binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0)),
8744 mkU64(0), binop(Iop_Sub64, mkexpr(len1), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008745
8746 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00008747 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8748 mkexpr(addr3),
8749 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008750
8751 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00008752 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
8753 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00008754
8755 /* The architecture requires that we exit with CC3 after a machine specific
8756 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8757 s390_cc_set(3);
8758 if_condition_goto(binop(Iop_CmpEQ64,
8759 binop(Iop_And64,
8760 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8761 mkU64(0xfff)),
8762 mkU64(0)),
8763 guest_IA_next_instr);
8764
floriana64c2432011-07-16 02:11:50 +00008765 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008766
8767 return "clcle";
8768}
floriana64c2432011-07-16 02:11:50 +00008769
florianb0bf6602012-05-05 00:01:16 +00008770
sewardj2019a972011-03-07 16:04:07 +00008771static void
8772s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8773{
florianb0bf6602012-05-05 00:01:16 +00008774 s390_irgen_xonc(Iop_Xor8, length, start1, start2);
8775}
sewardj2019a972011-03-07 16:04:07 +00008776
sewardj2019a972011-03-07 16:04:07 +00008777
florianb0bf6602012-05-05 00:01:16 +00008778static void
8779s390_irgen_NC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8780{
8781 s390_irgen_xonc(Iop_And8, length, start1, start2);
8782}
sewardj2019a972011-03-07 16:04:07 +00008783
sewardj2019a972011-03-07 16:04:07 +00008784
florianb0bf6602012-05-05 00:01:16 +00008785static void
8786s390_irgen_OC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8787{
8788 s390_irgen_xonc(Iop_Or8, length, start1, start2);
sewardj2019a972011-03-07 16:04:07 +00008789}
8790
8791
8792static void
8793s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8794{
8795 IRTemp current1 = newTemp(Ity_I8);
8796 IRTemp current2 = newTemp(Ity_I8);
8797 IRTemp counter = newTemp(Ity_I64);
8798
8799 assign(counter, get_counter_dw0());
8800 put_counter_dw0(mkU64(0));
8801
8802 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8803 mkexpr(counter))));
8804 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8805 mkexpr(counter))));
8806 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8807 False);
8808
8809 /* Both fields differ ? */
8810 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8811 guest_IA_next_instr);
8812
8813 /* Check for end of field */
8814 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8815 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8816 guest_IA_curr_instr);
8817 put_counter_dw0(mkU64(0));
8818}
8819
8820static void
8821s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8822{
8823 IRTemp counter = newTemp(Ity_I64);
8824
8825 assign(counter, get_counter_dw0());
8826
8827 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8828 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8829
8830 /* Check for end of field */
8831 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8832 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8833 guest_IA_curr_instr);
8834 put_counter_dw0(mkU64(0));
8835}
8836
florianf87d4fb2012-05-05 02:55:24 +00008837static void
8838s390_irgen_TR_EX(IRTemp length, IRTemp start1, IRTemp start2)
8839{
8840 IRTemp op = newTemp(Ity_I8);
8841 IRTemp op1 = newTemp(Ity_I8);
8842 IRTemp result = newTemp(Ity_I64);
8843 IRTemp counter = newTemp(Ity_I64);
8844
8845 assign(counter, get_counter_dw0());
8846
8847 assign(op, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), mkexpr(counter))));
8848
8849 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)), mkexpr(start2)));
8850
8851 assign(op1, load(Ity_I8, mkexpr(result)));
8852 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), mkexpr(op1));
8853
8854 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8855 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8856 guest_IA_curr_instr);
8857 put_counter_dw0(mkU64(0));
8858}
sewardj2019a972011-03-07 16:04:07 +00008859
8860
8861static void
8862s390_irgen_EX_SS(UChar r, IRTemp addr2,
8863void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8864{
8865 struct SS {
8866 unsigned int op : 8;
8867 unsigned int l : 8;
8868 unsigned int b1 : 4;
8869 unsigned int d1 : 12;
8870 unsigned int b2 : 4;
8871 unsigned int d2 : 12;
8872 };
8873 union {
8874 struct SS dec;
8875 unsigned long bytes;
8876 } ss;
8877 IRTemp cond;
8878 IRDirty *d;
8879 IRTemp torun;
8880
8881 IRTemp start1 = newTemp(Ity_I64);
8882 IRTemp start2 = newTemp(Ity_I64);
8883 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8884 cond = newTemp(Ity_I1);
8885 torun = newTemp(Ity_I64);
8886
8887 assign(torun, load(Ity_I64, mkexpr(addr2)));
8888 /* Start with a check that the saved code is still correct */
8889 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8890 /* If not, save the new value */
8891 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8892 mkIRExprVec_1(mkexpr(torun)));
8893 d->guard = mkexpr(cond);
8894 stmt(IRStmt_Dirty(d));
8895
8896 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008897 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8898 mkU64(guest_IA_curr_instr)));
8899 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008900 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, IRConst_U64(guest_IA_curr_instr),
8901 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008902
8903 ss.bytes = last_execute_target;
8904 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8905 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8906 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8907 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8908 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8909 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8910 irgen(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00008911 dummy_put_IA();
8912
sewardj2019a972011-03-07 16:04:07 +00008913 last_execute_target = 0;
8914}
8915
8916static HChar *
8917s390_irgen_EX(UChar r1, IRTemp addr2)
8918{
8919 switch(last_execute_target & 0xff00000000000000ULL) {
8920 case 0:
8921 {
8922 /* no code information yet */
8923 IRDirty *d;
8924
8925 /* so safe the code... */
8926 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8927 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8928 stmt(IRStmt_Dirty(d));
8929 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00008930 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART),
8931 mkU64(guest_IA_curr_instr)));
8932 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00008933 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8934 IRConst_U64(guest_IA_curr_instr),
8935 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00008936 /* we know that this will be invalidated */
florianf9e1ed72012-04-17 02:41:56 +00008937 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +00008938 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +00008939 dis_res->jk_StopHere = Ijk_TInval;
sewardj2019a972011-03-07 16:04:07 +00008940 break;
8941 }
8942
8943 case 0xd200000000000000ULL:
8944 /* special case MVC */
8945 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8946 return "mvc via ex";
8947
8948 case 0xd500000000000000ULL:
8949 /* special case CLC */
8950 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8951 return "clc via ex";
8952
8953 case 0xd700000000000000ULL:
8954 /* special case XC */
8955 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8956 return "xc via ex";
8957
florianb0bf6602012-05-05 00:01:16 +00008958 case 0xd600000000000000ULL:
8959 /* special case OC */
8960 s390_irgen_EX_SS(r1, addr2, s390_irgen_OC_EX, 32);
8961 return "oc via ex";
8962
8963 case 0xd400000000000000ULL:
8964 /* special case NC */
8965 s390_irgen_EX_SS(r1, addr2, s390_irgen_NC_EX, 32);
8966 return "nc via ex";
sewardj2019a972011-03-07 16:04:07 +00008967
florianf87d4fb2012-05-05 02:55:24 +00008968 case 0xdc00000000000000ULL:
8969 /* special case TR */
8970 s390_irgen_EX_SS(r1, addr2, s390_irgen_TR_EX, 64);
8971 return "tr via ex";
8972
sewardj2019a972011-03-07 16:04:07 +00008973 default:
8974 {
8975 /* everything else will get a self checking prefix that also checks the
8976 register content */
8977 IRDirty *d;
8978 UChar *bytes;
8979 IRTemp cond;
8980 IRTemp orperand;
8981 IRTemp torun;
8982
8983 cond = newTemp(Ity_I1);
8984 orperand = newTemp(Ity_I64);
8985 torun = newTemp(Ity_I64);
8986
8987 if (r1 == 0)
8988 assign(orperand, mkU64(0));
8989 else
8990 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8991 /* This code is going to be translated */
8992 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8993 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8994
8995 /* Start with a check that saved code is still correct */
8996 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8997 mkU64(last_execute_target)));
8998 /* If not, save the new value */
8999 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
9000 mkIRExprVec_1(mkexpr(torun)));
9001 d->guard = mkexpr(cond);
9002 stmt(IRStmt_Dirty(d));
9003
9004 /* and restart */
florian428dfdd2012-03-27 03:09:49 +00009005 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TISTART), mkU64(guest_IA_curr_instr)));
9006 stmt(IRStmt_Put(S390X_GUEST_OFFSET(guest_TILEN), mkU64(4)));
florian8844a632012-04-13 04:04:06 +00009007 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
9008 IRConst_U64(guest_IA_curr_instr),
9009 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009010
9011 /* Now comes the actual translation */
9012 bytes = (UChar *) &last_execute_target;
9013 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
9014 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00009015 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00009016 vex_printf(" which was executed by\n");
9017 /* dont make useless translations in the next execute */
9018 last_execute_target = 0;
florianf9e1ed72012-04-17 02:41:56 +00009019 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009020 }
9021 }
9022 return "ex";
9023}
9024
9025static HChar *
9026s390_irgen_EXRL(UChar r1, UInt offset)
9027{
9028 IRTemp addr = newTemp(Ity_I64);
9029 /* we might save one round trip because we know the target */
9030 if (!last_execute_target)
9031 last_execute_target = *(ULong *)(HWord)
9032 (guest_IA_curr_instr + offset * 2UL);
9033 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9034 s390_irgen_EX(r1, addr);
9035 return "exrl";
9036}
9037
9038static HChar *
9039s390_irgen_IPM(UChar r1)
9040{
9041 // As long as we dont support SPM, lets just assume 0 as program mask
9042 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9043 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9044
9045 return "ipm";
9046}
9047
9048
9049static HChar *
9050s390_irgen_SRST(UChar r1, UChar r2)
9051{
9052 IRTemp address = newTemp(Ity_I64);
9053 IRTemp next = newTemp(Ity_I64);
9054 IRTemp delim = newTemp(Ity_I8);
9055 IRTemp counter = newTemp(Ity_I64);
9056 IRTemp byte = newTemp(Ity_I8);
9057
9058 assign(address, get_gpr_dw0(r2));
9059 assign(next, get_gpr_dw0(r1));
9060
9061 assign(counter, get_counter_dw0());
9062 put_counter_dw0(mkU64(0));
9063
9064 // start = next? CC=2 and out r1 and r2 unchanged
9065 s390_cc_set(2);
9066 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9067 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9068 guest_IA_next_instr);
9069
9070 assign(byte, load(Ity_I8, mkexpr(address)));
9071 assign(delim, get_gpr_b7(0));
9072
9073 // byte = delim? CC=1, R1=address
9074 s390_cc_set(1);
9075 put_gpr_dw0(r1, mkexpr(address));
9076 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9077 guest_IA_next_instr);
9078
9079 // else: all equal, no end yet, loop
9080 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9081 put_gpr_dw0(r1, mkexpr(next));
9082 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009083 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9084 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9085 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009086 // >= 256 bytes done CC=3
9087 s390_cc_set(3);
9088 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009089 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009090
9091 return "srst";
9092}
9093
9094static HChar *
9095s390_irgen_CLST(UChar r1, UChar r2)
9096{
9097 IRTemp address1 = newTemp(Ity_I64);
9098 IRTemp address2 = newTemp(Ity_I64);
9099 IRTemp end = newTemp(Ity_I8);
9100 IRTemp counter = newTemp(Ity_I64);
9101 IRTemp byte1 = newTemp(Ity_I8);
9102 IRTemp byte2 = newTemp(Ity_I8);
9103
9104 assign(address1, get_gpr_dw0(r1));
9105 assign(address2, get_gpr_dw0(r2));
9106 assign(end, get_gpr_b7(0));
9107 assign(counter, get_counter_dw0());
9108 put_counter_dw0(mkU64(0));
9109 assign(byte1, load(Ity_I8, mkexpr(address1)));
9110 assign(byte2, load(Ity_I8, mkexpr(address2)));
9111
9112 // end in both? all equal, reset r1 and r2 to start values
9113 s390_cc_set(0);
9114 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9115 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9116 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9117 binop(Iop_Or8,
9118 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9119 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9120 guest_IA_next_instr);
9121
9122 put_gpr_dw0(r1, mkexpr(address1));
9123 put_gpr_dw0(r2, mkexpr(address2));
9124
9125 // End found in string1
9126 s390_cc_set(1);
9127 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9128 guest_IA_next_instr);
9129
9130 // End found in string2
9131 s390_cc_set(2);
9132 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9133 guest_IA_next_instr);
9134
9135 // string1 < string2
9136 s390_cc_set(1);
9137 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9138 unop(Iop_8Uto32, mkexpr(byte2))),
9139 guest_IA_next_instr);
9140
9141 // string2 < string1
9142 s390_cc_set(2);
9143 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9144 unop(Iop_8Uto32, mkexpr(byte1))),
9145 guest_IA_next_instr);
9146
9147 // else: all equal, no end yet, loop
9148 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9149 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9150 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
florian8844a632012-04-13 04:04:06 +00009151 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9152 Ijk_Boring, IRConst_U64(guest_IA_curr_instr),
9153 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009154 // >= 256 bytes done CC=3
9155 s390_cc_set(3);
9156 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009157 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009158
9159 return "clst";
9160}
9161
9162static void
9163s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9164{
9165 UChar reg;
9166 IRTemp addr = newTemp(Ity_I64);
9167
9168 assign(addr, mkexpr(op2addr));
9169 reg = r1;
9170 do {
9171 IRTemp old = addr;
9172
9173 reg %= 16;
9174 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9175 addr = newTemp(Ity_I64);
9176 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9177 reg++;
9178 } while (reg != (r3 + 1));
9179}
9180
9181static HChar *
9182s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9183{
9184 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9185
9186 return "lm";
9187}
9188
9189static HChar *
9190s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9191{
9192 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9193
9194 return "lmy";
9195}
9196
9197static HChar *
9198s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9199{
9200 UChar reg;
9201 IRTemp addr = newTemp(Ity_I64);
9202
9203 assign(addr, mkexpr(op2addr));
9204 reg = r1;
9205 do {
9206 IRTemp old = addr;
9207
9208 reg %= 16;
9209 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9210 addr = newTemp(Ity_I64);
9211 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9212 reg++;
9213 } while (reg != (r3 + 1));
9214
9215 return "lmh";
9216}
9217
9218static HChar *
9219s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9220{
9221 UChar reg;
9222 IRTemp addr = newTemp(Ity_I64);
9223
9224 assign(addr, mkexpr(op2addr));
9225 reg = r1;
9226 do {
9227 IRTemp old = addr;
9228
9229 reg %= 16;
9230 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9231 addr = newTemp(Ity_I64);
9232 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9233 reg++;
9234 } while (reg != (r3 + 1));
9235
9236 return "lmg";
9237}
9238
9239static void
9240s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9241{
9242 UChar reg;
9243 IRTemp addr = newTemp(Ity_I64);
9244
9245 assign(addr, mkexpr(op2addr));
9246 reg = r1;
9247 do {
9248 IRTemp old = addr;
9249
9250 reg %= 16;
9251 store(mkexpr(addr), get_gpr_w1(reg));
9252 addr = newTemp(Ity_I64);
9253 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9254 reg++;
9255 } while( reg != (r3 + 1));
9256}
9257
9258static HChar *
9259s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9260{
9261 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9262
9263 return "stm";
9264}
9265
9266static HChar *
9267s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9268{
9269 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9270
9271 return "stmy";
9272}
9273
9274static HChar *
9275s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9276{
9277 UChar reg;
9278 IRTemp addr = newTemp(Ity_I64);
9279
9280 assign(addr, mkexpr(op2addr));
9281 reg = r1;
9282 do {
9283 IRTemp old = addr;
9284
9285 reg %= 16;
9286 store(mkexpr(addr), get_gpr_w0(reg));
9287 addr = newTemp(Ity_I64);
9288 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9289 reg++;
9290 } while( reg != (r3 + 1));
9291
9292 return "stmh";
9293}
9294
9295static HChar *
9296s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9297{
9298 UChar reg;
9299 IRTemp addr = newTemp(Ity_I64);
9300
9301 assign(addr, mkexpr(op2addr));
9302 reg = r1;
9303 do {
9304 IRTemp old = addr;
9305
9306 reg %= 16;
9307 store(mkexpr(addr), get_gpr_dw0(reg));
9308 addr = newTemp(Ity_I64);
9309 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9310 reg++;
9311 } while( reg != (r3 + 1));
9312
9313 return "stmg";
9314}
9315
9316static void
florianb0bf6602012-05-05 00:01:16 +00009317s390_irgen_xonc(IROp op, IRTemp length, IRTemp start1, IRTemp start2)
sewardj2019a972011-03-07 16:04:07 +00009318{
9319 IRTemp old1 = newTemp(Ity_I8);
9320 IRTemp old2 = newTemp(Ity_I8);
9321 IRTemp new1 = newTemp(Ity_I8);
9322 IRTemp counter = newTemp(Ity_I32);
9323 IRTemp addr1 = newTemp(Ity_I64);
9324
9325 assign(counter, get_counter_w0());
9326
9327 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9328 unop(Iop_32Uto64, mkexpr(counter))));
9329
9330 assign(old1, load(Ity_I8, mkexpr(addr1)));
9331 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9332 unop(Iop_32Uto64,mkexpr(counter)))));
9333 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9334
9335 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009336 if (op == Iop_Xor8) {
9337 store(mkexpr(addr1),
florian6ad49522011-09-09 02:38:55 +00009338 mkite(binop(Iop_CmpEQ64, mkexpr(start1), mkexpr(start2)),
9339 mkU8(0), mkexpr(new1)));
sewardj2019a972011-03-07 16:04:07 +00009340 } else
9341 store(mkexpr(addr1), mkexpr(new1));
9342 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9343 get_counter_w1()));
9344
9345 /* Check for end of field */
9346 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
florianb0bf6602012-05-05 00:01:16 +00009347 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
sewardj2019a972011-03-07 16:04:07 +00009348 guest_IA_curr_instr);
9349 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9350 False);
9351 put_counter_dw0(mkU64(0));
9352}
9353
9354static HChar *
9355s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9356{
florianb0bf6602012-05-05 00:01:16 +00009357 IRTemp len = newTemp(Ity_I32);
9358
9359 assign(len, mkU32(length));
9360 s390_irgen_xonc(Iop_Xor8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009361 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009362
9363 return "xc";
9364}
9365
sewardjb63967e2011-03-24 08:50:04 +00009366static void
9367s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9368{
9369 IRTemp counter = newTemp(Ity_I32);
9370 IRTemp start = newTemp(Ity_I64);
9371 IRTemp addr = newTemp(Ity_I64);
9372
9373 assign(start,
9374 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9375
9376 if (length < 8) {
9377 UInt i;
9378
9379 for (i = 0; i <= length; ++i) {
9380 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9381 }
9382 } else {
9383 assign(counter, get_counter_w0());
9384
9385 assign(addr, binop(Iop_Add64, mkexpr(start),
9386 unop(Iop_32Uto64, mkexpr(counter))));
9387
9388 store(mkexpr(addr), mkU8(0));
9389
9390 /* Check for end of field */
9391 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9392 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9393 guest_IA_curr_instr);
9394
9395 /* Reset counter */
9396 put_counter_dw0(mkU64(0));
9397 }
9398
9399 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
florianf9e1ed72012-04-17 02:41:56 +00009400 dummy_put_IA();
sewardjb63967e2011-03-24 08:50:04 +00009401
sewardj7ee97522011-05-09 21:45:04 +00009402 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009403 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9404}
9405
sewardj2019a972011-03-07 16:04:07 +00009406static HChar *
9407s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9408{
florianb0bf6602012-05-05 00:01:16 +00009409 IRTemp len = newTemp(Ity_I32);
9410
9411 assign(len, mkU32(length));
9412 s390_irgen_xonc(Iop_And8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009413 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009414
9415 return "nc";
9416}
9417
9418static HChar *
9419s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9420{
florianb0bf6602012-05-05 00:01:16 +00009421 IRTemp len = newTemp(Ity_I32);
9422
9423 assign(len, mkU32(length));
9424 s390_irgen_xonc(Iop_Or8, len, start1, start2);
florian79e839e2012-05-05 02:20:30 +00009425 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009426
9427 return "oc";
9428}
9429
9430
9431static HChar *
9432s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9433{
florian79e839e2012-05-05 02:20:30 +00009434 IRTemp len = newTemp(Ity_I64);
sewardj2019a972011-03-07 16:04:07 +00009435
florian79e839e2012-05-05 02:20:30 +00009436 assign(len, mkU64(length));
9437 s390_irgen_MVC_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +00009438 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009439
9440 return "mvc";
9441}
9442
9443static HChar *
florianb0c9a132011-09-08 15:37:39 +00009444s390_irgen_MVCL(UChar r1, UChar r2)
9445{
9446 IRTemp addr1 = newTemp(Ity_I64);
9447 IRTemp addr2 = newTemp(Ity_I64);
9448 IRTemp addr2_load = newTemp(Ity_I64);
9449 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9450 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9451 IRTemp len1 = newTemp(Ity_I32);
9452 IRTemp len2 = newTemp(Ity_I32);
9453 IRTemp pad = newTemp(Ity_I8);
9454 IRTemp single = newTemp(Ity_I8);
9455
9456 assign(addr1, get_gpr_dw0(r1));
9457 assign(r1p1, get_gpr_w1(r1 + 1));
9458 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9459 assign(addr2, get_gpr_dw0(r2));
9460 assign(r2p1, get_gpr_w1(r2 + 1));
9461 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9462 assign(pad, get_gpr_b4(r2 + 1));
9463
9464 /* len1 == 0 ? */
9465 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9466 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9467 guest_IA_next_instr);
9468
9469 /* Check for destructive overlap:
9470 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9471 s390_cc_set(3);
9472 IRTemp cond1 = newTemp(Ity_I32);
9473 assign(cond1, unop(Iop_1Uto32,
9474 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9475 IRTemp cond2 = newTemp(Ity_I32);
9476 assign(cond2, unop(Iop_1Uto32,
9477 binop(Iop_CmpLT64U, mkexpr(addr1),
9478 binop(Iop_Add64, mkexpr(addr2),
9479 unop(Iop_32Uto64, mkexpr(len1))))));
9480 IRTemp cond3 = newTemp(Ity_I32);
9481 assign(cond3, unop(Iop_1Uto32,
9482 binop(Iop_CmpLT64U,
9483 mkexpr(addr1),
9484 binop(Iop_Add64, mkexpr(addr2),
9485 unop(Iop_32Uto64, mkexpr(len2))))));
9486
9487 if_condition_goto(binop(Iop_CmpEQ32,
9488 binop(Iop_And32,
9489 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9490 mkexpr(cond3)),
9491 mkU32(1)),
9492 guest_IA_next_instr);
9493
9494 /* See s390_irgen_CLCL for explanation why we cannot load directly
9495 and need two steps. */
9496 assign(addr2_load,
9497 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9498 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9499 assign(single,
9500 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9501 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9502
9503 store(mkexpr(addr1), mkexpr(single));
9504
9505 /* Update addr1 and len1 */
9506 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9507 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9508
9509 /* Update addr2 and len2 */
9510 put_gpr_dw0(r2,
9511 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9512 mkexpr(addr2),
9513 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9514
9515 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9516 put_gpr_w1(r2 + 1,
9517 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9518 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9519 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9520
9521 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9522 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9523 guest_IA_curr_instr);
9524
9525 return "mvcl";
9526}
9527
9528
9529static HChar *
sewardj2019a972011-03-07 16:04:07 +00009530s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9531{
9532 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9533
9534 addr1 = newTemp(Ity_I64);
9535 addr3 = newTemp(Ity_I64);
9536 addr3_load = newTemp(Ity_I64);
9537 len1 = newTemp(Ity_I64);
9538 len3 = newTemp(Ity_I64);
9539 single = newTemp(Ity_I8);
9540
9541 assign(addr1, get_gpr_dw0(r1));
9542 assign(len1, get_gpr_dw0(r1 + 1));
9543 assign(addr3, get_gpr_dw0(r3));
9544 assign(len3, get_gpr_dw0(r3 + 1));
9545
9546 // len1 == 0 ?
9547 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9548 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9549 guest_IA_next_instr);
9550
9551 /* This is a hack to prevent mvcle from reading from addr3 if it
9552 should read from the pad. Since the pad has no address, just
9553 read from the instruction, we discard that anyway */
9554 assign(addr3_load,
florian6ad49522011-09-09 02:38:55 +00009555 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9556 mkU64(guest_IA_curr_instr), mkexpr(addr3)));
sewardj2019a972011-03-07 16:04:07 +00009557
9558 assign(single,
florian6ad49522011-09-09 02:38:55 +00009559 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9560 unop(Iop_64to8, mkexpr(pad2)),
9561 load(Ity_I8, mkexpr(addr3_load))));
sewardj2019a972011-03-07 16:04:07 +00009562 store(mkexpr(addr1), mkexpr(single));
9563
9564 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9565
9566 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9567
9568 put_gpr_dw0(r3,
florian6ad49522011-09-09 02:38:55 +00009569 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9570 mkexpr(addr3),
9571 binop(Iop_Add64, mkexpr(addr3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009572
9573 put_gpr_dw0(r3 + 1,
florian6ad49522011-09-09 02:38:55 +00009574 mkite(binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0)),
9575 mkU64(0), binop(Iop_Sub64, mkexpr(len3), mkU64(1))));
sewardj2019a972011-03-07 16:04:07 +00009576
9577 /* We should set CC=3 (faked by overflow add) and leave after
9578 a maximum of ~4096 bytes have been processed. This is simpler:
9579 we leave whenever (len1 % 4096) == 0 */
9580 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
sewardj2019a972011-03-07 16:04:07 +00009581 mktemp(Ity_I64, mkU64(-1ULL)), False);
9582 if_condition_goto(binop(Iop_CmpEQ64,
9583 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9584 mkU64(0)),
9585 guest_IA_next_instr);
9586
9587 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9588 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9589 guest_IA_curr_instr);
9590
9591 return "mvcle";
9592}
9593
9594static HChar *
9595s390_irgen_MVST(UChar r1, UChar r2)
9596{
9597 IRTemp addr1 = newTemp(Ity_I64);
9598 IRTemp addr2 = newTemp(Ity_I64);
9599 IRTemp end = newTemp(Ity_I8);
9600 IRTemp byte = newTemp(Ity_I8);
9601 IRTemp counter = newTemp(Ity_I64);
9602
9603 assign(addr1, get_gpr_dw0(r1));
9604 assign(addr2, get_gpr_dw0(r2));
9605 assign(counter, get_counter_dw0());
9606 assign(end, get_gpr_b7(0));
9607 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9608 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9609
9610 // We use unlimited as cpu-determined number
9611 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9612 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9613 guest_IA_curr_instr);
9614
9615 // and always set cc=1 at the end + update r1
9616 s390_cc_set(1);
9617 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9618 put_counter_dw0(mkU64(0));
florian8844a632012-04-13 04:04:06 +00009619 dummy_put_IA();
sewardj2019a972011-03-07 16:04:07 +00009620
9621 return "mvst";
9622}
9623
9624static void
9625s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9626{
9627 IRTemp op1 = newTemp(Ity_I64);
9628 IRTemp result = newTemp(Ity_I64);
9629
9630 assign(op1, binop(Iop_32HLto64,
9631 get_gpr_w1(r1), // high 32 bits
9632 get_gpr_w1(r1 + 1))); // low 32 bits
9633 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9634 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9635 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9636}
9637
9638static void
9639s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9640{
9641 IRTemp op1 = newTemp(Ity_I128);
9642 IRTemp result = newTemp(Ity_I128);
9643
9644 assign(op1, binop(Iop_64HLto128,
9645 get_gpr_dw0(r1), // high 64 bits
9646 get_gpr_dw0(r1 + 1))); // low 64 bits
9647 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9648 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9649 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9650}
9651
9652static void
9653s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9654{
9655 IRTemp op1 = newTemp(Ity_I64);
9656 IRTemp result = newTemp(Ity_I128);
9657
9658 assign(op1, get_gpr_dw0(r1 + 1));
9659 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9660 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9661 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9662}
9663
9664static HChar *
9665s390_irgen_DR(UChar r1, UChar r2)
9666{
9667 IRTemp op2 = newTemp(Ity_I32);
9668
9669 assign(op2, get_gpr_w1(r2));
9670
9671 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9672
9673 return "dr";
9674}
9675
9676static HChar *
9677s390_irgen_D(UChar r1, IRTemp op2addr)
9678{
9679 IRTemp op2 = newTemp(Ity_I32);
9680
9681 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9682
9683 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9684
9685 return "d";
9686}
9687
9688static HChar *
9689s390_irgen_DLR(UChar r1, UChar r2)
9690{
9691 IRTemp op2 = newTemp(Ity_I32);
9692
9693 assign(op2, get_gpr_w1(r2));
9694
9695 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9696
9697 return "dr";
9698}
9699
9700static HChar *
9701s390_irgen_DL(UChar r1, IRTemp op2addr)
9702{
9703 IRTemp op2 = newTemp(Ity_I32);
9704
9705 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9706
9707 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9708
9709 return "dl";
9710}
9711
9712static HChar *
9713s390_irgen_DLG(UChar r1, IRTemp op2addr)
9714{
9715 IRTemp op2 = newTemp(Ity_I64);
9716
9717 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9718
9719 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9720
9721 return "dlg";
9722}
9723
9724static HChar *
9725s390_irgen_DLGR(UChar r1, UChar r2)
9726{
9727 IRTemp op2 = newTemp(Ity_I64);
9728
9729 assign(op2, get_gpr_dw0(r2));
9730
9731 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9732
9733 return "dlgr";
9734}
9735
9736static HChar *
9737s390_irgen_DSGR(UChar r1, UChar r2)
9738{
9739 IRTemp op2 = newTemp(Ity_I64);
9740
9741 assign(op2, get_gpr_dw0(r2));
9742
9743 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9744
9745 return "dsgr";
9746}
9747
9748static HChar *
9749s390_irgen_DSG(UChar r1, IRTemp op2addr)
9750{
9751 IRTemp op2 = newTemp(Ity_I64);
9752
9753 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9754
9755 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9756
9757 return "dsg";
9758}
9759
9760static HChar *
9761s390_irgen_DSGFR(UChar r1, UChar r2)
9762{
9763 IRTemp op2 = newTemp(Ity_I64);
9764
9765 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9766
9767 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9768
9769 return "dsgfr";
9770}
9771
9772static HChar *
9773s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9774{
9775 IRTemp op2 = newTemp(Ity_I64);
9776
9777 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9778
9779 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9780
9781 return "dsgf";
9782}
9783
9784static void
9785s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9786{
9787 UChar reg;
9788 IRTemp addr = newTemp(Ity_I64);
9789
9790 assign(addr, mkexpr(op2addr));
9791 reg = r1;
9792 do {
9793 IRTemp old = addr;
9794
9795 reg %= 16;
9796 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9797 addr = newTemp(Ity_I64);
9798 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9799 reg++;
9800 } while (reg != (r3 + 1));
9801}
9802
9803static HChar *
9804s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9805{
9806 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9807
9808 return "lam";
9809}
9810
9811static HChar *
9812s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9813{
9814 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9815
9816 return "lamy";
9817}
9818
9819static void
9820s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9821{
9822 UChar reg;
9823 IRTemp addr = newTemp(Ity_I64);
9824
9825 assign(addr, mkexpr(op2addr));
9826 reg = r1;
9827 do {
9828 IRTemp old = addr;
9829
9830 reg %= 16;
9831 store(mkexpr(addr), get_ar_w0(reg));
9832 addr = newTemp(Ity_I64);
9833 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9834 reg++;
9835 } while (reg != (r3 + 1));
9836}
9837
9838static HChar *
9839s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9840{
9841 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9842
9843 return "stam";
9844}
9845
9846static HChar *
9847s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9848{
9849 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9850
9851 return "stamy";
9852}
9853
9854
9855/* Implementation for 32-bit compare-and-swap */
9856static void
9857s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9858{
9859 IRCAS *cas;
9860 IRTemp op1 = newTemp(Ity_I32);
9861 IRTemp old_mem = newTemp(Ity_I32);
9862 IRTemp op3 = newTemp(Ity_I32);
9863 IRTemp result = newTemp(Ity_I32);
9864 IRTemp nequal = newTemp(Ity_I1);
9865
9866 assign(op1, get_gpr_w1(r1));
9867 assign(op3, get_gpr_w1(r3));
9868
9869 /* The first and second operands are compared. If they are equal,
9870 the third operand is stored at the second- operand location. */
9871 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9872 Iend_BE, mkexpr(op2addr),
9873 NULL, mkexpr(op1), /* expected value */
9874 NULL, mkexpr(op3) /* new value */);
9875 stmt(IRStmt_CAS(cas));
9876
9877 /* Set CC. Operands compared equal -> 0, else 1. */
9878 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9879 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9880
9881 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9882 Otherwise, store the old_value from memory in r1 and yield. */
9883 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9884 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009885 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9886 IRConst_U64(guest_IA_next_instr),
9887 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009888}
9889
9890static HChar *
9891s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9892{
9893 s390_irgen_cas_32(r1, r3, op2addr);
9894
9895 return "cs";
9896}
9897
9898static HChar *
9899s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9900{
9901 s390_irgen_cas_32(r1, r3, op2addr);
9902
9903 return "csy";
9904}
9905
9906static HChar *
9907s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9908{
9909 IRCAS *cas;
9910 IRTemp op1 = newTemp(Ity_I64);
9911 IRTemp old_mem = newTemp(Ity_I64);
9912 IRTemp op3 = newTemp(Ity_I64);
9913 IRTemp result = newTemp(Ity_I64);
9914 IRTemp nequal = newTemp(Ity_I1);
9915
9916 assign(op1, get_gpr_dw0(r1));
9917 assign(op3, get_gpr_dw0(r3));
9918
9919 /* The first and second operands are compared. If they are equal,
9920 the third operand is stored at the second- operand location. */
9921 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9922 Iend_BE, mkexpr(op2addr),
9923 NULL, mkexpr(op1), /* expected value */
9924 NULL, mkexpr(op3) /* new value */);
9925 stmt(IRStmt_CAS(cas));
9926
9927 /* Set CC. Operands compared equal -> 0, else 1. */
9928 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9929 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9930
9931 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9932 Otherwise, store the old_value from memory in r1 and yield. */
9933 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9934 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
florian8844a632012-04-13 04:04:06 +00009935 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9936 IRConst_U64(guest_IA_next_instr),
9937 S390X_GUEST_OFFSET(guest_IA)));
sewardj2019a972011-03-07 16:04:07 +00009938
9939 return "csg";
9940}
9941
9942
9943/* Binary floating point */
9944
9945static HChar *
9946s390_irgen_AXBR(UChar r1, UChar r2)
9947{
9948 IRTemp op1 = newTemp(Ity_F128);
9949 IRTemp op2 = newTemp(Ity_F128);
9950 IRTemp result = newTemp(Ity_F128);
9951
9952 assign(op1, get_fpr_pair(r1));
9953 assign(op2, get_fpr_pair(r2));
9954 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9955 mkexpr(op2)));
9956 put_fpr_pair(r1, mkexpr(result));
9957
9958 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9959
9960 return "axbr";
9961}
9962
9963/* The result of a Iop_CmdFxx operation is a condition code. It is
9964 encoded using the values defined in type IRCmpFxxResult.
9965 Before we can store the condition code into the guest state (or do
9966 anything else with it for that matter) we need to convert it to
9967 the encoding that s390 uses. This is what this function does.
9968
9969 s390 VEX b6 b2 b0 cc.1 cc.0
9970 0 0x40 EQ 1 0 0 0 0
9971 1 0x01 LT 0 0 1 0 1
9972 2 0x00 GT 0 0 0 1 0
9973 3 0x45 Unordered 1 1 1 1 1
9974
9975 The following bits from the VEX encoding are interesting:
9976 b0, b2, b6 with b0 being the LSB. We observe:
9977
9978 cc.0 = b0;
9979 cc.1 = b2 | (~b0 & ~b6)
9980
9981 with cc being the s390 condition code.
9982*/
9983static IRExpr *
9984convert_vex_fpcc_to_s390(IRTemp vex_cc)
9985{
9986 IRTemp cc0 = newTemp(Ity_I32);
9987 IRTemp cc1 = newTemp(Ity_I32);
9988 IRTemp b0 = newTemp(Ity_I32);
9989 IRTemp b2 = newTemp(Ity_I32);
9990 IRTemp b6 = newTemp(Ity_I32);
9991
9992 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9993 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9994 mkU32(1)));
9995 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9996 mkU32(1)));
9997
9998 assign(cc0, mkexpr(b0));
9999 assign(cc1, binop(Iop_Or32, mkexpr(b2),
10000 binop(Iop_And32,
10001 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
10002 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
10003 )));
10004
10005 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
10006}
10007
10008static HChar *
10009s390_irgen_CEBR(UChar r1, UChar r2)
10010{
10011 IRTemp op1 = newTemp(Ity_F32);
10012 IRTemp op2 = newTemp(Ity_F32);
10013 IRTemp cc_vex = newTemp(Ity_I32);
10014 IRTemp cc_s390 = newTemp(Ity_I32);
10015
10016 assign(op1, get_fpr_w0(r1));
10017 assign(op2, get_fpr_w0(r2));
10018 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10019
10020 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10021 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10022
10023 return "cebr";
10024}
10025
10026static HChar *
10027s390_irgen_CDBR(UChar r1, UChar r2)
10028{
10029 IRTemp op1 = newTemp(Ity_F64);
10030 IRTemp op2 = newTemp(Ity_F64);
10031 IRTemp cc_vex = newTemp(Ity_I32);
10032 IRTemp cc_s390 = newTemp(Ity_I32);
10033
10034 assign(op1, get_fpr_dw0(r1));
10035 assign(op2, get_fpr_dw0(r2));
10036 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10037
10038 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10039 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10040
10041 return "cdbr";
10042}
10043
10044static HChar *
10045s390_irgen_CXBR(UChar r1, UChar r2)
10046{
10047 IRTemp op1 = newTemp(Ity_F128);
10048 IRTemp op2 = newTemp(Ity_F128);
10049 IRTemp cc_vex = newTemp(Ity_I32);
10050 IRTemp cc_s390 = newTemp(Ity_I32);
10051
10052 assign(op1, get_fpr_pair(r1));
10053 assign(op2, get_fpr_pair(r2));
10054 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10055
10056 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10057 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10058
10059 return "cxbr";
10060}
10061
10062static HChar *
10063s390_irgen_CEB(UChar r1, IRTemp op2addr)
10064{
10065 IRTemp op1 = newTemp(Ity_F32);
10066 IRTemp op2 = newTemp(Ity_F32);
10067 IRTemp cc_vex = newTemp(Ity_I32);
10068 IRTemp cc_s390 = newTemp(Ity_I32);
10069
10070 assign(op1, get_fpr_w0(r1));
10071 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10072 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10073
10074 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10075 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10076
10077 return "ceb";
10078}
10079
10080static HChar *
10081s390_irgen_CDB(UChar r1, IRTemp op2addr)
10082{
10083 IRTemp op1 = newTemp(Ity_F64);
10084 IRTemp op2 = newTemp(Ity_F64);
10085 IRTemp cc_vex = newTemp(Ity_I32);
10086 IRTemp cc_s390 = newTemp(Ity_I32);
10087
10088 assign(op1, get_fpr_dw0(r1));
10089 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10090 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10091
10092 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10093 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10094
10095 return "cdb";
10096}
10097
10098static HChar *
10099s390_irgen_CXFBR(UChar r1, UChar r2)
10100{
10101 IRTemp op2 = newTemp(Ity_I32);
10102
10103 assign(op2, get_gpr_w1(r2));
10104 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10105
10106 return "cxfbr";
10107}
10108
10109static HChar *
10110s390_irgen_CXGBR(UChar r1, UChar r2)
10111{
10112 IRTemp op2 = newTemp(Ity_I64);
10113
10114 assign(op2, get_gpr_dw0(r2));
10115 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10116
10117 return "cxgbr";
10118}
10119
10120static HChar *
10121s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10122{
10123 IRTemp op = newTemp(Ity_F128);
10124 IRTemp result = newTemp(Ity_I32);
10125
10126 assign(op, get_fpr_pair(r2));
10127 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10128 mkexpr(op)));
10129 put_gpr_w1(r1, mkexpr(result));
10130 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10131
10132 return "cfxbr";
10133}
10134
10135static HChar *
10136s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10137{
10138 IRTemp op = newTemp(Ity_F128);
10139 IRTemp result = newTemp(Ity_I64);
10140
10141 assign(op, get_fpr_pair(r2));
10142 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10143 mkexpr(op)));
10144 put_gpr_dw0(r1, mkexpr(result));
10145 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10146
10147 return "cgxbr";
10148}
10149
10150static HChar *
10151s390_irgen_DXBR(UChar r1, UChar r2)
10152{
10153 IRTemp op1 = newTemp(Ity_F128);
10154 IRTemp op2 = newTemp(Ity_F128);
10155 IRTemp result = newTemp(Ity_F128);
10156
10157 assign(op1, get_fpr_pair(r1));
10158 assign(op2, get_fpr_pair(r2));
10159 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10160 mkexpr(op2)));
10161 put_fpr_pair(r1, mkexpr(result));
10162
10163 return "dxbr";
10164}
10165
10166static HChar *
10167s390_irgen_LTXBR(UChar r1, UChar r2)
10168{
10169 IRTemp result = newTemp(Ity_F128);
10170
10171 assign(result, get_fpr_pair(r2));
10172 put_fpr_pair(r1, mkexpr(result));
10173 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10174
10175 return "ltxbr";
10176}
10177
10178static HChar *
10179s390_irgen_LCXBR(UChar r1, UChar r2)
10180{
10181 IRTemp result = newTemp(Ity_F128);
10182
10183 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10184 put_fpr_pair(r1, mkexpr(result));
10185 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10186
10187 return "lcxbr";
10188}
10189
10190static HChar *
10191s390_irgen_LXDBR(UChar r1, UChar r2)
10192{
10193 IRTemp op = newTemp(Ity_F64);
10194
10195 assign(op, get_fpr_dw0(r2));
10196 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10197
10198 return "lxdbr";
10199}
10200
10201static HChar *
10202s390_irgen_LXEBR(UChar r1, UChar r2)
10203{
10204 IRTemp op = newTemp(Ity_F32);
10205
10206 assign(op, get_fpr_w0(r2));
10207 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10208
10209 return "lxebr";
10210}
10211
10212static HChar *
10213s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10214{
10215 IRTemp op = newTemp(Ity_F64);
10216
10217 assign(op, load(Ity_F64, mkexpr(op2addr)));
10218 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10219
10220 return "lxdb";
10221}
10222
10223static HChar *
10224s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10225{
10226 IRTemp op = newTemp(Ity_F32);
10227
10228 assign(op, load(Ity_F32, mkexpr(op2addr)));
10229 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10230
10231 return "lxeb";
10232}
10233
10234static HChar *
10235s390_irgen_LNEBR(UChar r1, UChar r2)
10236{
10237 IRTemp result = newTemp(Ity_F32);
10238
10239 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10240 put_fpr_w0(r1, mkexpr(result));
10241 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10242
10243 return "lnebr";
10244}
10245
10246static HChar *
10247s390_irgen_LNDBR(UChar r1, UChar r2)
10248{
10249 IRTemp result = newTemp(Ity_F64);
10250
10251 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10252 put_fpr_dw0(r1, mkexpr(result));
10253 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10254
10255 return "lndbr";
10256}
10257
10258static HChar *
10259s390_irgen_LNXBR(UChar r1, UChar r2)
10260{
10261 IRTemp result = newTemp(Ity_F128);
10262
10263 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10264 put_fpr_pair(r1, mkexpr(result));
10265 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10266
10267 return "lnxbr";
10268}
10269
10270static HChar *
10271s390_irgen_LPEBR(UChar r1, UChar r2)
10272{
10273 IRTemp result = newTemp(Ity_F32);
10274
10275 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10276 put_fpr_w0(r1, mkexpr(result));
10277 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10278
10279 return "lpebr";
10280}
10281
10282static HChar *
10283s390_irgen_LPDBR(UChar r1, UChar r2)
10284{
10285 IRTemp result = newTemp(Ity_F64);
10286
10287 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10288 put_fpr_dw0(r1, mkexpr(result));
10289 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10290
10291 return "lpdbr";
10292}
10293
10294static HChar *
10295s390_irgen_LPXBR(UChar r1, UChar r2)
10296{
10297 IRTemp result = newTemp(Ity_F128);
10298
10299 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10300 put_fpr_pair(r1, mkexpr(result));
10301 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10302
10303 return "lpxbr";
10304}
10305
10306static HChar *
10307s390_irgen_LDXBR(UChar r1, UChar r2)
10308{
10309 IRTemp result = newTemp(Ity_F64);
10310
10311 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10312 put_fpr_dw0(r1, mkexpr(result));
10313
10314 return "ldxbr";
10315}
10316
10317static HChar *
10318s390_irgen_LEXBR(UChar r1, UChar r2)
10319{
10320 IRTemp result = newTemp(Ity_F32);
10321
10322 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10323 put_fpr_w0(r1, mkexpr(result));
10324
10325 return "lexbr";
10326}
10327
10328static HChar *
10329s390_irgen_MXBR(UChar r1, UChar r2)
10330{
10331 IRTemp op1 = newTemp(Ity_F128);
10332 IRTemp op2 = newTemp(Ity_F128);
10333 IRTemp result = newTemp(Ity_F128);
10334
10335 assign(op1, get_fpr_pair(r1));
10336 assign(op2, get_fpr_pair(r2));
10337 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10338 mkexpr(op2)));
10339 put_fpr_pair(r1, mkexpr(result));
10340
10341 return "mxbr";
10342}
10343
10344static HChar *
10345s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10346{
10347 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10348 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10349
10350 return "maebr";
10351}
10352
10353static HChar *
10354s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10355{
10356 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10357 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10358
10359 return "madbr";
10360}
10361
10362static HChar *
10363s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10364{
10365 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10366
10367 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10368 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10369
10370 return "maeb";
10371}
10372
10373static HChar *
10374s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10375{
10376 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10377
10378 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10379 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10380
10381 return "madb";
10382}
10383
10384static HChar *
10385s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10386{
10387 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10388 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10389
10390 return "msebr";
10391}
10392
10393static HChar *
10394s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10395{
10396 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10397 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10398
10399 return "msdbr";
10400}
10401
10402static HChar *
10403s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10404{
10405 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10406
10407 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10408 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10409
10410 return "mseb";
10411}
10412
10413static HChar *
10414s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10415{
10416 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10417
10418 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10419 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10420
10421 return "msdb";
10422}
10423
10424static HChar *
10425s390_irgen_SQEBR(UChar r1, UChar r2)
10426{
10427 IRTemp result = newTemp(Ity_F32);
10428
10429 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10430 put_fpr_w0(r1, mkexpr(result));
10431
10432 return "sqebr";
10433}
10434
10435static HChar *
10436s390_irgen_SQDBR(UChar r1, UChar r2)
10437{
10438 IRTemp result = newTemp(Ity_F64);
10439
10440 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10441 put_fpr_dw0(r1, mkexpr(result));
10442
10443 return "sqdbr";
10444}
10445
10446static HChar *
10447s390_irgen_SQXBR(UChar r1, UChar r2)
10448{
10449 IRTemp result = newTemp(Ity_F128);
10450
10451 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10452 put_fpr_pair(r1, mkexpr(result));
10453
10454 return "sqxbr";
10455}
10456
10457static HChar *
10458s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10459{
10460 IRTemp op = newTemp(Ity_F32);
10461
10462 assign(op, load(Ity_F32, mkexpr(op2addr)));
10463 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10464
10465 return "sqeb";
10466}
10467
10468static HChar *
10469s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10470{
10471 IRTemp op = newTemp(Ity_F64);
10472
10473 assign(op, load(Ity_F64, mkexpr(op2addr)));
10474 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10475
10476 return "sqdb";
10477}
10478
10479static HChar *
10480s390_irgen_SXBR(UChar r1, UChar r2)
10481{
10482 IRTemp op1 = newTemp(Ity_F128);
10483 IRTemp op2 = newTemp(Ity_F128);
10484 IRTemp result = newTemp(Ity_F128);
10485
10486 assign(op1, get_fpr_pair(r1));
10487 assign(op2, get_fpr_pair(r2));
10488 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10489 mkexpr(op2)));
10490 put_fpr_pair(r1, mkexpr(result));
10491 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10492
10493 return "sxbr";
10494}
10495
10496static HChar *
10497s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10498{
10499 IRTemp value = newTemp(Ity_F32);
10500
10501 assign(value, get_fpr_w0(r1));
10502
10503 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10504
10505 return "tceb";
10506}
10507
10508static HChar *
10509s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10510{
10511 IRTemp value = newTemp(Ity_F64);
10512
10513 assign(value, get_fpr_dw0(r1));
10514
10515 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10516
10517 return "tcdb";
10518}
10519
10520static HChar *
10521s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10522{
10523 IRTemp value = newTemp(Ity_F128);
10524
10525 assign(value, get_fpr_pair(r1));
10526
10527 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10528
10529 return "tcxb";
10530}
10531
10532static HChar *
10533s390_irgen_LCDFR(UChar r1, UChar r2)
10534{
10535 IRTemp result = newTemp(Ity_F64);
10536
10537 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10538 put_fpr_dw0(r1, mkexpr(result));
10539
10540 return "lcdfr";
10541}
10542
10543static HChar *
10544s390_irgen_LNDFR(UChar r1, UChar r2)
10545{
10546 IRTemp result = newTemp(Ity_F64);
10547
10548 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10549 put_fpr_dw0(r1, mkexpr(result));
10550
10551 return "lndfr";
10552}
10553
10554static HChar *
10555s390_irgen_LPDFR(UChar r1, UChar r2)
10556{
10557 IRTemp result = newTemp(Ity_F64);
10558
10559 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10560 put_fpr_dw0(r1, mkexpr(result));
10561
10562 return "lpdfr";
10563}
10564
10565static HChar *
10566s390_irgen_LDGR(UChar r1, UChar r2)
10567{
10568 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10569
10570 return "ldgr";
10571}
10572
10573static HChar *
10574s390_irgen_LGDR(UChar r1, UChar r2)
10575{
10576 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10577
10578 return "lgdr";
10579}
10580
10581
10582static HChar *
10583s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10584{
10585 IRTemp sign = newTemp(Ity_I64);
10586 IRTemp value = newTemp(Ity_I64);
10587
10588 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10589 mkU64(1ULL << 63)));
10590 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10591 mkU64((1ULL << 63) - 1)));
10592 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10593 mkexpr(sign))));
10594
10595 return "cpsdr";
10596}
10597
10598
10599static UInt
10600s390_do_cvb(ULong decimal)
10601{
10602#if defined(VGA_s390x)
10603 UInt binary;
10604
10605 __asm__ volatile (
10606 "cvb %[result],%[input]\n\t"
10607 : [result] "=d"(binary)
10608 : [input] "m"(decimal)
10609 );
10610
10611 return binary;
10612#else
10613 return 0;
10614#endif
10615}
10616
10617static IRExpr *
10618s390_call_cvb(IRExpr *in)
10619{
10620 IRExpr **args, *call;
10621
10622 args = mkIRExprVec_1(in);
10623 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10624 "s390_do_cvb", &s390_do_cvb, args);
10625
10626 /* Nothing is excluded from definedness checking. */
10627 call->Iex.CCall.cee->mcx_mask = 0;
10628
10629 return call;
10630}
10631
10632static HChar *
10633s390_irgen_CVB(UChar r1, IRTemp op2addr)
10634{
10635 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10636
10637 return "cvb";
10638}
10639
10640static HChar *
10641s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10642{
10643 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10644
10645 return "cvby";
10646}
10647
10648
10649static ULong
10650s390_do_cvd(ULong binary_in)
10651{
10652#if defined(VGA_s390x)
10653 UInt binary = binary_in & 0xffffffffULL;
10654 ULong decimal;
10655
10656 __asm__ volatile (
10657 "cvd %[input],%[result]\n\t"
10658 : [result] "=m"(decimal)
10659 : [input] "d"(binary)
10660 );
10661
10662 return decimal;
10663#else
10664 return 0;
10665#endif
10666}
10667
10668static IRExpr *
10669s390_call_cvd(IRExpr *in)
10670{
10671 IRExpr **args, *call;
10672
10673 args = mkIRExprVec_1(in);
10674 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10675 "s390_do_cvd", &s390_do_cvd, args);
10676
10677 /* Nothing is excluded from definedness checking. */
10678 call->Iex.CCall.cee->mcx_mask = 0;
10679
10680 return call;
10681}
10682
10683static HChar *
10684s390_irgen_CVD(UChar r1, IRTemp op2addr)
10685{
10686 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10687
10688 return "cvd";
10689}
10690
10691static HChar *
10692s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10693{
10694 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10695
10696 return "cvdy";
10697}
10698
10699static HChar *
10700s390_irgen_FLOGR(UChar r1, UChar r2)
10701{
10702 IRTemp input = newTemp(Ity_I64);
10703 IRTemp not_zero = newTemp(Ity_I64);
10704 IRTemp tmpnum = newTemp(Ity_I64);
10705 IRTemp num = newTemp(Ity_I64);
10706 IRTemp shift_amount = newTemp(Ity_I8);
10707
10708 /* We use the "count leading zeroes" operator because the number of
10709 leading zeroes is identical with the bit position of the first '1' bit.
10710 However, that operator does not work when the input value is zero.
10711 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10712 the modified value. If input == 0, then the result is 64. Otherwise,
10713 the result of Clz64 is what we want. */
10714
10715 assign(input, get_gpr_dw0(r2));
10716 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10717 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10718
10719 /* num = (input == 0) ? 64 : tmpnum */
10720 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10721 /* == 0 */ mkU64(64),
10722 /* != 0 */ mkexpr(tmpnum)));
10723
10724 put_gpr_dw0(r1, mkexpr(num));
10725
10726 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10727 is to first shift the input value by NUM + 1 bits to the left which
10728 causes the leftmost '1' bit to disappear. Then we shift logically to
10729 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10730 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10731 the width of the value-to-be-shifted, we need to special case
10732 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10733 For both such INPUT values the result will be 0. */
10734
10735 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10736 mkU64(1))));
10737
10738 put_gpr_dw0(r1 + 1,
florian6ad49522011-09-09 02:38:55 +000010739 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10740 /* == 0 || == 1*/ mkU64(0),
10741 /* otherwise */
10742 binop(Iop_Shr64,
10743 binop(Iop_Shl64, mkexpr(input),
10744 mkexpr(shift_amount)),
10745 mkexpr(shift_amount))));
sewardj2019a972011-03-07 16:04:07 +000010746
10747 /* Compare the original value as an unsigned integer with 0. */
10748 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10749 mktemp(Ity_I64, mkU64(0)), False);
10750
10751 return "flogr";
10752}
10753
sewardj1e5fea62011-05-17 16:18:36 +000010754static HChar *
10755s390_irgen_STCK(IRTemp op2addr)
10756{
10757 IRDirty *d;
10758 IRTemp cc = newTemp(Ity_I64);
10759
10760 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10761 &s390x_dirtyhelper_STCK,
10762 mkIRExprVec_1(mkexpr(op2addr)));
10763 d->mFx = Ifx_Write;
10764 d->mAddr = mkexpr(op2addr);
10765 d->mSize = 8;
10766 stmt(IRStmt_Dirty(d));
10767 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10768 mkexpr(cc), mkU64(0), mkU64(0));
10769 return "stck";
10770}
10771
10772static HChar *
10773s390_irgen_STCKF(IRTemp op2addr)
10774{
10775 IRDirty *d;
10776 IRTemp cc = newTemp(Ity_I64);
10777
10778 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10779 &s390x_dirtyhelper_STCKF,
10780 mkIRExprVec_1(mkexpr(op2addr)));
10781 d->mFx = Ifx_Write;
10782 d->mAddr = mkexpr(op2addr);
10783 d->mSize = 8;
10784 stmt(IRStmt_Dirty(d));
10785 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10786 mkexpr(cc), mkU64(0), mkU64(0));
10787 return "stckf";
10788}
10789
10790static HChar *
10791s390_irgen_STCKE(IRTemp op2addr)
10792{
10793 IRDirty *d;
10794 IRTemp cc = newTemp(Ity_I64);
10795
10796 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10797 &s390x_dirtyhelper_STCKE,
10798 mkIRExprVec_1(mkexpr(op2addr)));
10799 d->mFx = Ifx_Write;
10800 d->mAddr = mkexpr(op2addr);
10801 d->mSize = 16;
10802 stmt(IRStmt_Dirty(d));
10803 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10804 mkexpr(cc), mkU64(0), mkU64(0));
10805 return "stcke";
10806}
10807
florian933065d2011-07-11 01:48:02 +000010808static HChar *
10809s390_irgen_STFLE(IRTemp op2addr)
10810{
10811 IRDirty *d;
10812 IRTemp cc = newTemp(Ity_I64);
10813
10814 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10815 &s390x_dirtyhelper_STFLE,
10816 mkIRExprVec_1(mkexpr(op2addr)));
10817
10818 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10819
10820 d->fxState[0].fx = Ifx_Modify; /* read then write */
10821 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10822 d->fxState[0].size = sizeof(ULong);
10823 d->nFxState = 1;
10824
10825 d->mAddr = mkexpr(op2addr);
10826 /* Pretend all double words are written */
10827 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10828 d->mFx = Ifx_Write;
10829
10830 stmt(IRStmt_Dirty(d));
10831
10832 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10833
10834 return "stfle";
10835}
10836
floriana4384a32011-08-11 16:58:45 +000010837static HChar *
10838s390_irgen_CKSM(UChar r1,UChar r2)
10839{
10840 IRTemp addr = newTemp(Ity_I64);
10841 IRTemp op = newTemp(Ity_I32);
10842 IRTemp len = newTemp(Ity_I64);
10843 IRTemp oldval = newTemp(Ity_I32);
10844 IRTemp mask = newTemp(Ity_I32);
10845 IRTemp newop = newTemp(Ity_I32);
10846 IRTemp result = newTemp(Ity_I32);
10847 IRTemp result1 = newTemp(Ity_I32);
10848 IRTemp inc = newTemp(Ity_I64);
10849
10850 assign(oldval, get_gpr_w1(r1));
10851 assign(addr, get_gpr_dw0(r2));
10852 assign(len, get_gpr_dw0(r2+1));
10853
10854 /* Condition code is always zero. */
10855 s390_cc_set(0);
10856
10857 /* If length is zero, there is no need to calculate the checksum */
10858 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10859 guest_IA_next_instr);
10860
10861 /* Assiging the increment variable to adjust address and length
10862 later on. */
10863 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10864 mkexpr(len), mkU64(4)));
10865
10866 /* If length < 4 the final 4-byte 2nd operand value is computed by
10867 appending the remaining bytes to the right with 0. This is done
10868 by AND'ing the 4 bytes loaded from memory with an appropriate
10869 mask. If length >= 4, that mask is simply 0xffffffff. */
10870
10871 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10872 /* Mask computation when len < 4:
10873 0xffffffff << (32 - (len % 4)*8) */
10874 binop(Iop_Shl32, mkU32(0xffffffff),
10875 unop(Iop_32to8,
10876 binop(Iop_Sub32, mkU32(32),
10877 binop(Iop_Shl32,
10878 unop(Iop_64to32,
10879 binop(Iop_And64,
10880 mkexpr(len), mkU64(3))),
10881 mkU8(3))))),
10882 mkU32(0xffffffff)));
10883
10884 assign(op, load(Ity_I32, mkexpr(addr)));
10885 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10886 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10887
10888 /* Checking for carry */
10889 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10890 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10891 mkexpr(result)));
10892
10893 put_gpr_w1(r1, mkexpr(result1));
10894 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10895 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10896
10897 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10898 guest_IA_curr_instr);
10899
10900 return "cksm";
10901}
10902
florian9af37692012-01-15 21:01:16 +000010903static HChar *
10904s390_irgen_TROO(UChar m3, UChar r1, UChar r2)
10905{
10906 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10907 src_addr = newTemp(Ity_I64);
10908 des_addr = newTemp(Ity_I64);
10909 tab_addr = newTemp(Ity_I64);
10910 test_byte = newTemp(Ity_I8);
10911 src_len = newTemp(Ity_I64);
10912
10913 assign(src_addr, get_gpr_dw0(r2));
10914 assign(des_addr, get_gpr_dw0(r1));
10915 assign(tab_addr, get_gpr_dw0(1));
florian53518532012-01-18 14:00:31 +000010916 assign(src_len, get_gpr_dw0(r1+1));
florian9af37692012-01-15 21:01:16 +000010917 assign(test_byte, get_gpr_b7(0));
10918
10919 IRTemp op = newTemp(Ity_I8);
10920 IRTemp op1 = newTemp(Ity_I8);
10921 IRTemp result = newTemp(Ity_I64);
10922
10923 /* End of source string? We're done; proceed to next insn */
10924 s390_cc_set(0);
10925 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10926 guest_IA_next_instr);
10927
10928 /* Load character from source string, index translation table and
10929 store translated character in op1. */
10930 assign(op, load(Ity_I8, mkexpr(src_addr)));
10931
10932 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
10933 mkexpr(tab_addr)));
10934 assign(op1, load(Ity_I8, mkexpr(result)));
10935
10936 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10937 s390_cc_set(1);
10938 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10939 guest_IA_next_instr);
10940 }
10941 store(get_gpr_dw0(r1), mkexpr(op1));
10942
10943 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10944 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
10945 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
10946
10947 always_goto_and_chase(guest_IA_curr_instr);
10948
10949 return "troo";
10950}
10951
florian730448f2012-02-04 17:07:07 +000010952static HChar *
10953s390_irgen_TRTO(UChar m3, UChar r1, UChar r2)
10954{
10955 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
10956 src_addr = newTemp(Ity_I64);
10957 des_addr = newTemp(Ity_I64);
10958 tab_addr = newTemp(Ity_I64);
10959 test_byte = newTemp(Ity_I8);
10960 src_len = newTemp(Ity_I64);
10961
10962 assign(src_addr, get_gpr_dw0(r2));
10963 assign(des_addr, get_gpr_dw0(r1));
10964 assign(tab_addr, get_gpr_dw0(1));
10965 assign(src_len, get_gpr_dw0(r1+1));
10966 assign(test_byte, get_gpr_b7(0));
10967
10968 IRTemp op = newTemp(Ity_I16);
10969 IRTemp op1 = newTemp(Ity_I8);
10970 IRTemp result = newTemp(Ity_I64);
10971
10972 /* End of source string? We're done; proceed to next insn */
10973 s390_cc_set(0);
10974 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
10975 guest_IA_next_instr);
10976
10977 /* Load character from source string, index translation table and
10978 store translated character in op1. */
10979 assign(op, load(Ity_I16, mkexpr(src_addr)));
10980
10981 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
10982 mkexpr(tab_addr)));
10983
10984 assign(op1, load(Ity_I8, mkexpr(result)));
10985
10986 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
10987 s390_cc_set(1);
10988 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op1), mkexpr(test_byte)),
10989 guest_IA_next_instr);
10990 }
10991 store(get_gpr_dw0(r1), mkexpr(op1));
10992
10993 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
10994 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(1)));
10995 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
10996
10997 always_goto_and_chase(guest_IA_curr_instr);
10998
10999 return "trto";
11000}
11001
11002static HChar *
11003s390_irgen_TROT(UChar m3, UChar r1, UChar r2)
11004{
11005 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11006 src_addr = newTemp(Ity_I64);
11007 des_addr = newTemp(Ity_I64);
11008 tab_addr = newTemp(Ity_I64);
11009 test_byte = newTemp(Ity_I16);
11010 src_len = newTemp(Ity_I64);
11011
11012 assign(src_addr, get_gpr_dw0(r2));
11013 assign(des_addr, get_gpr_dw0(r1));
11014 assign(tab_addr, get_gpr_dw0(1));
11015 assign(src_len, get_gpr_dw0(r1+1));
11016 assign(test_byte, get_gpr_hw3(0));
11017
11018 IRTemp op = newTemp(Ity_I8);
11019 IRTemp op1 = newTemp(Ity_I16);
11020 IRTemp result = newTemp(Ity_I64);
11021
11022 /* End of source string? We're done; proceed to next insn */
11023 s390_cc_set(0);
11024 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11025 guest_IA_next_instr);
11026
11027 /* Load character from source string, index translation table and
11028 store translated character in op1. */
11029 assign(op, binop(Iop_Shl8, load(Ity_I8, mkexpr(src_addr)), mkU8(1)));
11030
11031 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11032 mkexpr(tab_addr)));
11033 assign(op1, load(Ity_I16, mkexpr(result)));
11034
11035 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11036 s390_cc_set(1);
11037 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11038 guest_IA_next_instr);
11039 }
11040 store(get_gpr_dw0(r1), mkexpr(op1));
11041
11042 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11043 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11044 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11045
11046 always_goto_and_chase(guest_IA_curr_instr);
11047
11048 return "trot";
11049}
11050
11051static HChar *
11052s390_irgen_TRTT(UChar m3, UChar r1, UChar r2)
11053{
11054 IRTemp src_addr, des_addr, tab_addr, src_len, test_byte;
11055 src_addr = newTemp(Ity_I64);
11056 des_addr = newTemp(Ity_I64);
11057 tab_addr = newTemp(Ity_I64);
11058 test_byte = newTemp(Ity_I16);
11059 src_len = newTemp(Ity_I64);
11060
11061 assign(src_addr, get_gpr_dw0(r2));
11062 assign(des_addr, get_gpr_dw0(r1));
11063 assign(tab_addr, get_gpr_dw0(1));
11064 assign(src_len, get_gpr_dw0(r1+1));
11065 assign(test_byte, get_gpr_hw3(0));
11066
11067 IRTemp op = newTemp(Ity_I16);
11068 IRTemp op1 = newTemp(Ity_I16);
11069 IRTemp result = newTemp(Ity_I64);
11070
11071 /* End of source string? We're done; proceed to next insn */
11072 s390_cc_set(0);
11073 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11074 guest_IA_next_instr);
11075
11076 /* Load character from source string, index translation table and
11077 store translated character in op1. */
11078 assign(op, binop(Iop_Shl16, load(Ity_I16, mkexpr(src_addr)), mkU8(1)));
11079
11080 assign(result, binop(Iop_Add64, unop(Iop_16Uto64, mkexpr(op)),
11081 mkexpr(tab_addr)));
11082 assign(op1, load(Ity_I16, mkexpr(result)));
11083
11084 if (! s390_host_has_etf2 || (m3 & 0x1) == 0) {
11085 s390_cc_set(1);
11086 if_condition_goto(binop(Iop_CmpEQ16, mkexpr(op1), mkexpr(test_byte)),
11087 guest_IA_next_instr);
11088 }
11089
11090 store(get_gpr_dw0(r1), mkexpr(op1));
11091
11092 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(src_addr), mkU64(2)));
11093 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(des_addr), mkU64(2)));
11094 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(2)));
11095
11096 always_goto_and_chase(guest_IA_curr_instr);
11097
11098 return "trtt";
11099}
11100
11101static HChar *
11102s390_irgen_TR(UChar length, IRTemp start1, IRTemp start2)
11103{
florianf87d4fb2012-05-05 02:55:24 +000011104 IRTemp len = newTemp(Ity_I64);
florian730448f2012-02-04 17:07:07 +000011105
florianf87d4fb2012-05-05 02:55:24 +000011106 assign(len, mkU64(length));
11107 s390_irgen_TR_EX(len, start1, start2);
florian8844a632012-04-13 04:04:06 +000011108 dummy_put_IA();
florian730448f2012-02-04 17:07:07 +000011109
11110 return "tr";
11111}
11112
11113static HChar *
11114s390_irgen_TRE(UChar r1,UChar r2)
11115{
11116 IRTemp src_addr, tab_addr, src_len, test_byte;
11117 src_addr = newTemp(Ity_I64);
11118 tab_addr = newTemp(Ity_I64);
11119 src_len = newTemp(Ity_I64);
11120 test_byte = newTemp(Ity_I8);
11121
11122 assign(src_addr, get_gpr_dw0(r1));
11123 assign(src_len, get_gpr_dw0(r1+1));
11124 assign(tab_addr, get_gpr_dw0(r2));
11125 assign(test_byte, get_gpr_b7(0));
11126
11127 IRTemp op = newTemp(Ity_I8);
11128 IRTemp op1 = newTemp(Ity_I8);
11129 IRTemp result = newTemp(Ity_I64);
11130
11131 /* End of source string? We're done; proceed to next insn */
11132 s390_cc_set(0);
11133 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(src_len), mkU64(0)),
11134 guest_IA_next_instr);
11135
11136 /* Load character from source string and compare with test byte */
11137 assign(op, load(Ity_I8, mkexpr(src_addr)));
11138
11139 s390_cc_set(1);
11140 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(op), mkexpr(test_byte)),
11141 guest_IA_next_instr);
11142
11143 assign(result, binop(Iop_Add64, unop(Iop_8Uto64, mkexpr(op)),
11144 mkexpr(tab_addr)));
11145
11146 assign(op1, load(Ity_I8, mkexpr(result)));
11147
11148 store(get_gpr_dw0(r1), mkexpr(op1));
11149 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(src_addr), mkU64(1)));
11150 put_gpr_dw0(r1+1, binop(Iop_Sub64, mkexpr(src_len), mkU64(1)));
11151
11152 always_goto(mkU64(guest_IA_curr_instr));
11153
11154 return "tre";
11155}
11156
floriana4384a32011-08-11 16:58:45 +000011157
sewardj2019a972011-03-07 16:04:07 +000011158/*------------------------------------------------------------*/
11159/*--- Build IR for special instructions ---*/
11160/*------------------------------------------------------------*/
11161
florianb4df7682011-07-05 02:09:01 +000011162static void
sewardj2019a972011-03-07 16:04:07 +000011163s390_irgen_client_request(void)
11164{
11165 if (0)
11166 vex_printf("%%R3 = client_request ( %%R2 )\n");
11167
florianf9e1ed72012-04-17 02:41:56 +000011168 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11169 + S390_SPECIAL_OP_SIZE;
sewardj2019a972011-03-07 16:04:07 +000011170
florianf9e1ed72012-04-17 02:41:56 +000011171 dis_res->jk_StopHere = Ijk_ClientReq;
sewardj2019a972011-03-07 16:04:07 +000011172 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011173
11174 put_IA(mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011175}
11176
florianb4df7682011-07-05 02:09:01 +000011177static void
sewardj2019a972011-03-07 16:04:07 +000011178s390_irgen_guest_NRADDR(void)
11179{
11180 if (0)
11181 vex_printf("%%R3 = guest_NRADDR\n");
11182
floriane88b3c92011-07-05 02:48:39 +000011183 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000011184}
11185
florianb4df7682011-07-05 02:09:01 +000011186static void
sewardj2019a972011-03-07 16:04:07 +000011187s390_irgen_call_noredir(void)
11188{
florianf9e1ed72012-04-17 02:41:56 +000011189 Addr64 next = guest_IA_curr_instr + S390_SPECIAL_OP_PREAMBLE_SIZE
11190 + S390_SPECIAL_OP_SIZE;
11191
sewardj2019a972011-03-07 16:04:07 +000011192 /* Continue after special op */
florianf9e1ed72012-04-17 02:41:56 +000011193 put_gpr_dw0(14, mkaddr_expr(next));
sewardj2019a972011-03-07 16:04:07 +000011194
11195 /* The address is in REG1, all parameters are in the right (guest) places */
florianf9e1ed72012-04-17 02:41:56 +000011196 put_IA(get_gpr_dw0(1));
sewardj2019a972011-03-07 16:04:07 +000011197
11198 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000011199 dis_res->jk_StopHere = Ijk_NoRedir;
sewardj2019a972011-03-07 16:04:07 +000011200}
11201
11202/* Force proper alignment for the structures below. */
11203#pragma pack(1)
11204
11205
11206static s390_decode_t
11207s390_decode_2byte_and_irgen(UChar *bytes)
11208{
11209 typedef union {
11210 struct {
11211 unsigned int op : 16;
11212 } E;
11213 struct {
11214 unsigned int op : 8;
11215 unsigned int i : 8;
11216 } I;
11217 struct {
11218 unsigned int op : 8;
11219 unsigned int r1 : 4;
11220 unsigned int r2 : 4;
11221 } RR;
11222 } formats;
11223 union {
11224 formats fmt;
11225 UShort value;
11226 } ovl;
11227
11228 vassert(sizeof(formats) == 2);
11229
11230 ((char *)(&ovl.value))[0] = bytes[0];
11231 ((char *)(&ovl.value))[1] = bytes[1];
11232
11233 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000011234 case 0x0000: /* invalid opcode */
11235 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011236 case 0x0101: /* PR */ goto unimplemented;
11237 case 0x0102: /* UPT */ goto unimplemented;
11238 case 0x0104: /* PTFF */ goto unimplemented;
11239 case 0x0107: /* SCKPF */ goto unimplemented;
11240 case 0x010a: /* PFPO */ goto unimplemented;
11241 case 0x010b: /* TAM */ goto unimplemented;
11242 case 0x010c: /* SAM24 */ goto unimplemented;
11243 case 0x010d: /* SAM31 */ goto unimplemented;
11244 case 0x010e: /* SAM64 */ goto unimplemented;
11245 case 0x01ff: /* TRAP2 */ goto unimplemented;
11246 }
11247
11248 switch ((ovl.value & 0xff00) >> 8) {
11249 case 0x04: /* SPM */ goto unimplemented;
11250 case 0x05: /* BALR */ goto unimplemented;
11251 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11252 goto ok;
11253 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11254 goto ok;
11255 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
11256 case 0x0b: /* BSM */ goto unimplemented;
11257 case 0x0c: /* BASSM */ goto unimplemented;
11258 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11259 goto ok;
florianb0c9a132011-09-08 15:37:39 +000011260 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11261 goto ok;
11262 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11263 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011264 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11265 goto ok;
11266 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11267 goto ok;
11268 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11269 goto ok;
11270 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11271 goto ok;
11272 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11273 goto ok;
11274 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11275 goto ok;
11276 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11277 goto ok;
11278 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11279 goto ok;
11280 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11281 goto ok;
11282 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11283 goto ok;
11284 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11285 goto ok;
11286 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11287 goto ok;
11288 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11289 goto ok;
11290 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11291 goto ok;
11292 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11293 goto ok;
11294 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11295 goto ok;
11296 case 0x20: /* LPDR */ goto unimplemented;
11297 case 0x21: /* LNDR */ goto unimplemented;
11298 case 0x22: /* LTDR */ goto unimplemented;
11299 case 0x23: /* LCDR */ goto unimplemented;
11300 case 0x24: /* HDR */ goto unimplemented;
11301 case 0x25: /* LDXR */ goto unimplemented;
11302 case 0x26: /* MXR */ goto unimplemented;
11303 case 0x27: /* MXDR */ goto unimplemented;
11304 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11305 goto ok;
11306 case 0x29: /* CDR */ goto unimplemented;
11307 case 0x2a: /* ADR */ goto unimplemented;
11308 case 0x2b: /* SDR */ goto unimplemented;
11309 case 0x2c: /* MDR */ goto unimplemented;
11310 case 0x2d: /* DDR */ goto unimplemented;
11311 case 0x2e: /* AWR */ goto unimplemented;
11312 case 0x2f: /* SWR */ goto unimplemented;
11313 case 0x30: /* LPER */ goto unimplemented;
11314 case 0x31: /* LNER */ goto unimplemented;
11315 case 0x32: /* LTER */ goto unimplemented;
11316 case 0x33: /* LCER */ goto unimplemented;
11317 case 0x34: /* HER */ goto unimplemented;
11318 case 0x35: /* LEDR */ goto unimplemented;
11319 case 0x36: /* AXR */ goto unimplemented;
11320 case 0x37: /* SXR */ goto unimplemented;
11321 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11322 goto ok;
11323 case 0x39: /* CER */ goto unimplemented;
11324 case 0x3a: /* AER */ goto unimplemented;
11325 case 0x3b: /* SER */ goto unimplemented;
11326 case 0x3c: /* MDER */ goto unimplemented;
11327 case 0x3d: /* DER */ goto unimplemented;
11328 case 0x3e: /* AUR */ goto unimplemented;
11329 case 0x3f: /* SUR */ goto unimplemented;
11330 }
11331
11332 return S390_DECODE_UNKNOWN_INSN;
11333
11334ok:
11335 return S390_DECODE_OK;
11336
11337unimplemented:
11338 return S390_DECODE_UNIMPLEMENTED_INSN;
11339}
11340
11341static s390_decode_t
11342s390_decode_4byte_and_irgen(UChar *bytes)
11343{
11344 typedef union {
11345 struct {
11346 unsigned int op1 : 8;
11347 unsigned int r1 : 4;
11348 unsigned int op2 : 4;
11349 unsigned int i2 : 16;
11350 } RI;
11351 struct {
11352 unsigned int op : 16;
11353 unsigned int : 8;
11354 unsigned int r1 : 4;
11355 unsigned int r2 : 4;
11356 } RRE;
11357 struct {
11358 unsigned int op : 16;
11359 unsigned int r1 : 4;
11360 unsigned int : 4;
11361 unsigned int r3 : 4;
11362 unsigned int r2 : 4;
11363 } RRF;
11364 struct {
11365 unsigned int op : 16;
11366 unsigned int r3 : 4;
11367 unsigned int m4 : 4;
11368 unsigned int r1 : 4;
11369 unsigned int r2 : 4;
11370 } RRF2;
11371 struct {
11372 unsigned int op : 16;
11373 unsigned int r3 : 4;
11374 unsigned int : 4;
11375 unsigned int r1 : 4;
11376 unsigned int r2 : 4;
11377 } RRF3;
11378 struct {
11379 unsigned int op : 16;
11380 unsigned int r3 : 4;
11381 unsigned int : 4;
11382 unsigned int r1 : 4;
11383 unsigned int r2 : 4;
11384 } RRR;
11385 struct {
11386 unsigned int op : 16;
11387 unsigned int r3 : 4;
11388 unsigned int : 4;
11389 unsigned int r1 : 4;
11390 unsigned int r2 : 4;
11391 } RRF4;
11392 struct {
11393 unsigned int op : 8;
11394 unsigned int r1 : 4;
11395 unsigned int r3 : 4;
11396 unsigned int b2 : 4;
11397 unsigned int d2 : 12;
11398 } RS;
11399 struct {
11400 unsigned int op : 8;
11401 unsigned int r1 : 4;
11402 unsigned int r3 : 4;
11403 unsigned int i2 : 16;
11404 } RSI;
11405 struct {
11406 unsigned int op : 8;
11407 unsigned int r1 : 4;
11408 unsigned int x2 : 4;
11409 unsigned int b2 : 4;
11410 unsigned int d2 : 12;
11411 } RX;
11412 struct {
11413 unsigned int op : 16;
11414 unsigned int b2 : 4;
11415 unsigned int d2 : 12;
11416 } S;
11417 struct {
11418 unsigned int op : 8;
11419 unsigned int i2 : 8;
11420 unsigned int b1 : 4;
11421 unsigned int d1 : 12;
11422 } SI;
11423 } formats;
11424 union {
11425 formats fmt;
11426 UInt value;
11427 } ovl;
11428
11429 vassert(sizeof(formats) == 4);
11430
11431 ((char *)(&ovl.value))[0] = bytes[0];
11432 ((char *)(&ovl.value))[1] = bytes[1];
11433 ((char *)(&ovl.value))[2] = bytes[2];
11434 ((char *)(&ovl.value))[3] = bytes[3];
11435
11436 switch ((ovl.value & 0xff0f0000) >> 16) {
11437 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11438 ovl.fmt.RI.i2); goto ok;
11439 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11440 ovl.fmt.RI.i2); goto ok;
11441 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11442 ovl.fmt.RI.i2); goto ok;
11443 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11444 ovl.fmt.RI.i2); goto ok;
11445 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11446 ovl.fmt.RI.i2); goto ok;
11447 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11448 ovl.fmt.RI.i2); goto ok;
11449 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11450 ovl.fmt.RI.i2); goto ok;
11451 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11452 ovl.fmt.RI.i2); goto ok;
11453 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11454 ovl.fmt.RI.i2); goto ok;
11455 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11456 ovl.fmt.RI.i2); goto ok;
11457 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11458 ovl.fmt.RI.i2); goto ok;
11459 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11460 ovl.fmt.RI.i2); goto ok;
11461 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11462 ovl.fmt.RI.i2); goto ok;
11463 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11464 ovl.fmt.RI.i2); goto ok;
11465 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11466 ovl.fmt.RI.i2); goto ok;
11467 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11468 ovl.fmt.RI.i2); goto ok;
11469 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11470 ovl.fmt.RI.i2); goto ok;
11471 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11472 ovl.fmt.RI.i2); goto ok;
11473 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11474 ovl.fmt.RI.i2); goto ok;
11475 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11476 ovl.fmt.RI.i2); goto ok;
11477 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11478 goto ok;
11479 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11480 ovl.fmt.RI.i2); goto ok;
11481 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11482 ovl.fmt.RI.i2); goto ok;
11483 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11484 ovl.fmt.RI.i2); goto ok;
11485 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11486 goto ok;
11487 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11488 ovl.fmt.RI.i2); goto ok;
11489 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11490 goto ok;
11491 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11492 ovl.fmt.RI.i2); goto ok;
11493 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11494 goto ok;
11495 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11496 ovl.fmt.RI.i2); goto ok;
11497 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11498 goto ok;
11499 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11500 ovl.fmt.RI.i2); goto ok;
11501 }
11502
11503 switch ((ovl.value & 0xffff0000) >> 16) {
11504 case 0x8000: /* SSM */ goto unimplemented;
11505 case 0x8200: /* LPSW */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011506 case 0x9300: /* TS */ goto unimplemented;
sewardj2019a972011-03-07 16:04:07 +000011507 case 0xb202: /* STIDP */ goto unimplemented;
11508 case 0xb204: /* SCK */ goto unimplemented;
florian7700fc92012-01-16 17:25:55 +000011509 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);
11510 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011511 case 0xb206: /* SCKC */ goto unimplemented;
11512 case 0xb207: /* STCKC */ goto unimplemented;
11513 case 0xb208: /* SPT */ goto unimplemented;
11514 case 0xb209: /* STPT */ goto unimplemented;
11515 case 0xb20a: /* SPKA */ goto unimplemented;
11516 case 0xb20b: /* IPK */ goto unimplemented;
11517 case 0xb20d: /* PTLB */ goto unimplemented;
11518 case 0xb210: /* SPX */ goto unimplemented;
11519 case 0xb211: /* STPX */ goto unimplemented;
11520 case 0xb212: /* STAP */ goto unimplemented;
11521 case 0xb214: /* SIE */ goto unimplemented;
11522 case 0xb218: /* PC */ goto unimplemented;
11523 case 0xb219: /* SAC */ goto unimplemented;
11524 case 0xb21a: /* CFC */ goto unimplemented;
11525 case 0xb221: /* IPTE */ goto unimplemented;
11526 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11527 case 0xb223: /* IVSK */ goto unimplemented;
11528 case 0xb224: /* IAC */ goto unimplemented;
11529 case 0xb225: /* SSAR */ goto unimplemented;
11530 case 0xb226: /* EPAR */ goto unimplemented;
11531 case 0xb227: /* ESAR */ goto unimplemented;
11532 case 0xb228: /* PT */ goto unimplemented;
11533 case 0xb229: /* ISKE */ goto unimplemented;
11534 case 0xb22a: /* RRBE */ goto unimplemented;
11535 case 0xb22b: /* SSKE */ goto unimplemented;
11536 case 0xb22c: /* TB */ goto unimplemented;
11537 case 0xb22d: /* DXR */ goto unimplemented;
11538 case 0xb22e: /* PGIN */ goto unimplemented;
11539 case 0xb22f: /* PGOUT */ goto unimplemented;
11540 case 0xb230: /* CSCH */ goto unimplemented;
11541 case 0xb231: /* HSCH */ goto unimplemented;
11542 case 0xb232: /* MSCH */ goto unimplemented;
11543 case 0xb233: /* SSCH */ goto unimplemented;
11544 case 0xb234: /* STSCH */ goto unimplemented;
11545 case 0xb235: /* TSCH */ goto unimplemented;
11546 case 0xb236: /* TPI */ goto unimplemented;
11547 case 0xb237: /* SAL */ goto unimplemented;
11548 case 0xb238: /* RSCH */ goto unimplemented;
11549 case 0xb239: /* STCRW */ goto unimplemented;
11550 case 0xb23a: /* STCPS */ goto unimplemented;
11551 case 0xb23b: /* RCHP */ goto unimplemented;
11552 case 0xb23c: /* SCHM */ goto unimplemented;
11553 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011554 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11555 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011556 case 0xb244: /* SQDR */ goto unimplemented;
11557 case 0xb245: /* SQER */ goto unimplemented;
11558 case 0xb246: /* STURA */ goto unimplemented;
11559 case 0xb247: /* MSTA */ goto unimplemented;
11560 case 0xb248: /* PALB */ goto unimplemented;
11561 case 0xb249: /* EREG */ goto unimplemented;
11562 case 0xb24a: /* ESTA */ goto unimplemented;
11563 case 0xb24b: /* LURA */ goto unimplemented;
11564 case 0xb24c: /* TAR */ goto unimplemented;
11565 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11566 ovl.fmt.RRE.r2); goto ok;
11567 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11568 goto ok;
11569 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11570 goto ok;
11571 case 0xb250: /* CSP */ goto unimplemented;
11572 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11573 ovl.fmt.RRE.r2); goto ok;
11574 case 0xb254: /* MVPG */ goto unimplemented;
11575 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11576 ovl.fmt.RRE.r2); goto ok;
11577 case 0xb257: /* CUSE */ goto unimplemented;
11578 case 0xb258: /* BSG */ goto unimplemented;
11579 case 0xb25a: /* BSA */ goto unimplemented;
11580 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11581 ovl.fmt.RRE.r2); goto ok;
11582 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11583 ovl.fmt.RRE.r2); goto ok;
11584 case 0xb263: /* CMPSC */ goto unimplemented;
11585 case 0xb274: /* SIGA */ goto unimplemented;
11586 case 0xb276: /* XSCH */ goto unimplemented;
11587 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011588 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011589 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011590 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011591 case 0xb27d: /* STSI */ goto unimplemented;
11592 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11593 goto ok;
11594 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11595 goto ok;
11596 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11597 goto ok;
florian730448f2012-02-04 17:07:07 +000011598 case 0xb2a5: s390_format_RRE_FF(s390_irgen_TRE, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011599 case 0xb2a6: /* CU21 */ goto unimplemented;
11600 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011601 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11602 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011603 case 0xb2b1: /* STFL */ goto unimplemented;
11604 case 0xb2b2: /* LPSWE */ goto unimplemented;
11605 case 0xb2b8: /* SRNMB */ goto unimplemented;
11606 case 0xb2b9: /* SRNMT */ goto unimplemented;
11607 case 0xb2bd: /* LFAS */ goto unimplemented;
11608 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11609 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11610 ovl.fmt.RRE.r2); goto ok;
11611 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11612 ovl.fmt.RRE.r2); goto ok;
11613 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11614 ovl.fmt.RRE.r2); goto ok;
11615 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11616 ovl.fmt.RRE.r2); goto ok;
11617 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11618 ovl.fmt.RRE.r2); goto ok;
11619 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11620 ovl.fmt.RRE.r2); goto ok;
11621 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11622 ovl.fmt.RRE.r2); goto ok;
11623 case 0xb307: /* MXDBR */ goto unimplemented;
11624 case 0xb308: /* KEBR */ goto unimplemented;
11625 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11626 ovl.fmt.RRE.r2); goto ok;
11627 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11628 ovl.fmt.RRE.r2); goto ok;
11629 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11630 ovl.fmt.RRE.r2); goto ok;
11631 case 0xb30c: /* MDEBR */ goto unimplemented;
11632 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11633 ovl.fmt.RRE.r2); goto ok;
11634 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11635 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11636 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11637 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11638 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11639 ovl.fmt.RRE.r2); goto ok;
11640 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11641 ovl.fmt.RRE.r2); goto ok;
11642 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11643 ovl.fmt.RRE.r2); goto ok;
11644 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11645 ovl.fmt.RRE.r2); goto ok;
11646 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11647 ovl.fmt.RRE.r2); goto ok;
11648 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11649 ovl.fmt.RRE.r2); goto ok;
11650 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11651 ovl.fmt.RRE.r2); goto ok;
11652 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11653 ovl.fmt.RRE.r2); goto ok;
11654 case 0xb318: /* KDBR */ goto unimplemented;
11655 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11656 ovl.fmt.RRE.r2); goto ok;
11657 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11658 ovl.fmt.RRE.r2); goto ok;
11659 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11660 ovl.fmt.RRE.r2); goto ok;
11661 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11662 ovl.fmt.RRE.r2); goto ok;
11663 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11664 ovl.fmt.RRE.r2); goto ok;
11665 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11666 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11667 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11668 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11669 case 0xb324: /* LDER */ goto unimplemented;
11670 case 0xb325: /* LXDR */ goto unimplemented;
11671 case 0xb326: /* LXER */ goto unimplemented;
11672 case 0xb32e: /* MAER */ goto unimplemented;
11673 case 0xb32f: /* MSER */ goto unimplemented;
11674 case 0xb336: /* SQXR */ goto unimplemented;
11675 case 0xb337: /* MEER */ goto unimplemented;
11676 case 0xb338: /* MAYLR */ goto unimplemented;
11677 case 0xb339: /* MYLR */ goto unimplemented;
11678 case 0xb33a: /* MAYR */ goto unimplemented;
11679 case 0xb33b: /* MYR */ goto unimplemented;
11680 case 0xb33c: /* MAYHR */ goto unimplemented;
11681 case 0xb33d: /* MYHR */ goto unimplemented;
11682 case 0xb33e: /* MADR */ goto unimplemented;
11683 case 0xb33f: /* MSDR */ goto unimplemented;
11684 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11685 ovl.fmt.RRE.r2); goto ok;
11686 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11687 ovl.fmt.RRE.r2); goto ok;
11688 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11689 ovl.fmt.RRE.r2); goto ok;
11690 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11691 ovl.fmt.RRE.r2); goto ok;
11692 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11693 ovl.fmt.RRE.r2); goto ok;
11694 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11695 ovl.fmt.RRE.r2); goto ok;
11696 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11697 ovl.fmt.RRE.r2); goto ok;
11698 case 0xb347: /* FIXBR */ goto unimplemented;
11699 case 0xb348: /* KXBR */ goto unimplemented;
11700 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11701 ovl.fmt.RRE.r2); goto ok;
11702 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11703 ovl.fmt.RRE.r2); goto ok;
11704 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11705 ovl.fmt.RRE.r2); goto ok;
11706 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11707 ovl.fmt.RRE.r2); goto ok;
11708 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11709 ovl.fmt.RRE.r2); goto ok;
11710 case 0xb350: /* TBEDR */ goto unimplemented;
11711 case 0xb351: /* TBDR */ goto unimplemented;
11712 case 0xb353: /* DIEBR */ goto unimplemented;
11713 case 0xb357: /* FIEBR */ goto unimplemented;
11714 case 0xb358: /* THDER */ goto unimplemented;
11715 case 0xb359: /* THDR */ goto unimplemented;
11716 case 0xb35b: /* DIDBR */ goto unimplemented;
11717 case 0xb35f: /* FIDBR */ goto unimplemented;
11718 case 0xb360: /* LPXR */ goto unimplemented;
11719 case 0xb361: /* LNXR */ goto unimplemented;
11720 case 0xb362: /* LTXR */ goto unimplemented;
11721 case 0xb363: /* LCXR */ goto unimplemented;
11722 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11723 ovl.fmt.RRE.r2); goto ok;
11724 case 0xb366: /* LEXR */ goto unimplemented;
11725 case 0xb367: /* FIXR */ goto unimplemented;
11726 case 0xb369: /* CXR */ goto unimplemented;
11727 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11728 ovl.fmt.RRE.r2); goto ok;
11729 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11730 ovl.fmt.RRE.r2); goto ok;
11731 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11732 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11733 goto ok;
11734 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11735 ovl.fmt.RRE.r2); goto ok;
11736 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11737 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11738 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11739 case 0xb377: /* FIER */ goto unimplemented;
11740 case 0xb37f: /* FIDR */ goto unimplemented;
11741 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11742 case 0xb385: /* SFASR */ goto unimplemented;
11743 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11744 case 0xb390: /* CELFBR */ goto unimplemented;
11745 case 0xb391: /* CDLFBR */ goto unimplemented;
11746 case 0xb392: /* CXLFBR */ goto unimplemented;
11747 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11748 ovl.fmt.RRE.r2); goto ok;
11749 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11750 ovl.fmt.RRE.r2); goto ok;
11751 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11752 ovl.fmt.RRE.r2); goto ok;
11753 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11754 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11755 goto ok;
11756 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11757 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11758 goto ok;
11759 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11760 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11761 goto ok;
11762 case 0xb3a0: /* CELGBR */ goto unimplemented;
11763 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11764 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11765 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11766 ovl.fmt.RRE.r2); goto ok;
11767 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11768 ovl.fmt.RRE.r2); goto ok;
11769 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11770 ovl.fmt.RRE.r2); goto ok;
11771 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11772 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11773 goto ok;
11774 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11775 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11776 goto ok;
11777 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11778 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11779 goto ok;
11780 case 0xb3b4: /* CEFR */ goto unimplemented;
11781 case 0xb3b5: /* CDFR */ goto unimplemented;
11782 case 0xb3b6: /* CXFR */ goto unimplemented;
11783 case 0xb3b8: /* CFER */ goto unimplemented;
11784 case 0xb3b9: /* CFDR */ goto unimplemented;
11785 case 0xb3ba: /* CFXR */ goto unimplemented;
11786 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11787 ovl.fmt.RRE.r2); goto ok;
11788 case 0xb3c4: /* CEGR */ goto unimplemented;
11789 case 0xb3c5: /* CDGR */ goto unimplemented;
11790 case 0xb3c6: /* CXGR */ goto unimplemented;
11791 case 0xb3c8: /* CGER */ goto unimplemented;
11792 case 0xb3c9: /* CGDR */ goto unimplemented;
11793 case 0xb3ca: /* CGXR */ goto unimplemented;
11794 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11795 ovl.fmt.RRE.r2); goto ok;
11796 case 0xb3d0: /* MDTR */ goto unimplemented;
11797 case 0xb3d1: /* DDTR */ goto unimplemented;
11798 case 0xb3d2: /* ADTR */ goto unimplemented;
11799 case 0xb3d3: /* SDTR */ goto unimplemented;
11800 case 0xb3d4: /* LDETR */ goto unimplemented;
11801 case 0xb3d5: /* LEDTR */ goto unimplemented;
11802 case 0xb3d6: /* LTDTR */ goto unimplemented;
11803 case 0xb3d7: /* FIDTR */ goto unimplemented;
11804 case 0xb3d8: /* MXTR */ goto unimplemented;
11805 case 0xb3d9: /* DXTR */ goto unimplemented;
11806 case 0xb3da: /* AXTR */ goto unimplemented;
11807 case 0xb3db: /* SXTR */ goto unimplemented;
11808 case 0xb3dc: /* LXDTR */ goto unimplemented;
11809 case 0xb3dd: /* LDXTR */ goto unimplemented;
11810 case 0xb3de: /* LTXTR */ goto unimplemented;
11811 case 0xb3df: /* FIXTR */ goto unimplemented;
11812 case 0xb3e0: /* KDTR */ goto unimplemented;
11813 case 0xb3e1: /* CGDTR */ goto unimplemented;
11814 case 0xb3e2: /* CUDTR */ goto unimplemented;
11815 case 0xb3e3: /* CSDTR */ goto unimplemented;
11816 case 0xb3e4: /* CDTR */ goto unimplemented;
11817 case 0xb3e5: /* EEDTR */ goto unimplemented;
11818 case 0xb3e7: /* ESDTR */ goto unimplemented;
11819 case 0xb3e8: /* KXTR */ goto unimplemented;
11820 case 0xb3e9: /* CGXTR */ goto unimplemented;
11821 case 0xb3ea: /* CUXTR */ goto unimplemented;
11822 case 0xb3eb: /* CSXTR */ goto unimplemented;
11823 case 0xb3ec: /* CXTR */ goto unimplemented;
11824 case 0xb3ed: /* EEXTR */ goto unimplemented;
11825 case 0xb3ef: /* ESXTR */ goto unimplemented;
11826 case 0xb3f1: /* CDGTR */ goto unimplemented;
11827 case 0xb3f2: /* CDUTR */ goto unimplemented;
11828 case 0xb3f3: /* CDSTR */ goto unimplemented;
11829 case 0xb3f4: /* CEDTR */ goto unimplemented;
11830 case 0xb3f5: /* QADTR */ goto unimplemented;
11831 case 0xb3f6: /* IEDTR */ goto unimplemented;
11832 case 0xb3f7: /* RRDTR */ goto unimplemented;
11833 case 0xb3f9: /* CXGTR */ goto unimplemented;
11834 case 0xb3fa: /* CXUTR */ goto unimplemented;
11835 case 0xb3fb: /* CXSTR */ goto unimplemented;
11836 case 0xb3fc: /* CEXTR */ goto unimplemented;
11837 case 0xb3fd: /* QAXTR */ goto unimplemented;
11838 case 0xb3fe: /* IEXTR */ goto unimplemented;
11839 case 0xb3ff: /* RRXTR */ goto unimplemented;
11840 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11841 ovl.fmt.RRE.r2); goto ok;
11842 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11843 ovl.fmt.RRE.r2); goto ok;
11844 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11845 ovl.fmt.RRE.r2); goto ok;
11846 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11847 ovl.fmt.RRE.r2); goto ok;
11848 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11849 ovl.fmt.RRE.r2); goto ok;
11850 case 0xb905: /* LURAG */ goto unimplemented;
11851 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11852 ovl.fmt.RRE.r2); goto ok;
11853 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11854 ovl.fmt.RRE.r2); goto ok;
11855 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11856 ovl.fmt.RRE.r2); goto ok;
11857 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11858 ovl.fmt.RRE.r2); goto ok;
11859 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11860 ovl.fmt.RRE.r2); goto ok;
11861 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11862 ovl.fmt.RRE.r2); goto ok;
11863 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11864 ovl.fmt.RRE.r2); goto ok;
11865 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11866 ovl.fmt.RRE.r2); goto ok;
11867 case 0xb90e: /* EREGG */ goto unimplemented;
11868 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11869 ovl.fmt.RRE.r2); goto ok;
11870 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11871 ovl.fmt.RRE.r2); goto ok;
11872 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11873 ovl.fmt.RRE.r2); goto ok;
11874 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11875 ovl.fmt.RRE.r2); goto ok;
11876 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11877 ovl.fmt.RRE.r2); goto ok;
11878 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11879 ovl.fmt.RRE.r2); goto ok;
11880 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11881 ovl.fmt.RRE.r2); goto ok;
11882 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11883 ovl.fmt.RRE.r2); goto ok;
11884 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11885 ovl.fmt.RRE.r2); goto ok;
11886 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11887 ovl.fmt.RRE.r2); goto ok;
11888 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11889 ovl.fmt.RRE.r2); goto ok;
11890 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11891 ovl.fmt.RRE.r2); goto ok;
11892 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11893 ovl.fmt.RRE.r2); goto ok;
11894 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11895 ovl.fmt.RRE.r2); goto ok;
11896 case 0xb91e: /* KMAC */ goto unimplemented;
11897 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11898 ovl.fmt.RRE.r2); goto ok;
11899 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11900 ovl.fmt.RRE.r2); goto ok;
11901 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11902 ovl.fmt.RRE.r2); goto ok;
11903 case 0xb925: /* STURG */ goto unimplemented;
11904 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11905 ovl.fmt.RRE.r2); goto ok;
11906 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11907 ovl.fmt.RRE.r2); goto ok;
11908 case 0xb928: /* PCKMO */ goto unimplemented;
11909 case 0xb92b: /* KMO */ goto unimplemented;
11910 case 0xb92c: /* PCC */ goto unimplemented;
11911 case 0xb92d: /* KMCTR */ goto unimplemented;
11912 case 0xb92e: /* KM */ goto unimplemented;
11913 case 0xb92f: /* KMC */ goto unimplemented;
11914 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11915 ovl.fmt.RRE.r2); goto ok;
11916 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11917 ovl.fmt.RRE.r2); goto ok;
11918 case 0xb93e: /* KIMD */ goto unimplemented;
11919 case 0xb93f: /* KLMD */ goto unimplemented;
11920 case 0xb941: /* CFDTR */ goto unimplemented;
11921 case 0xb942: /* CLGDTR */ goto unimplemented;
11922 case 0xb943: /* CLFDTR */ goto unimplemented;
11923 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11924 ovl.fmt.RRE.r2); goto ok;
11925 case 0xb949: /* CFXTR */ goto unimplemented;
11926 case 0xb94a: /* CLGXTR */ goto unimplemented;
11927 case 0xb94b: /* CLFXTR */ goto unimplemented;
11928 case 0xb951: /* CDFTR */ goto unimplemented;
11929 case 0xb952: /* CDLGTR */ goto unimplemented;
11930 case 0xb953: /* CDLFTR */ goto unimplemented;
11931 case 0xb959: /* CXFTR */ goto unimplemented;
11932 case 0xb95a: /* CXLGTR */ goto unimplemented;
11933 case 0xb95b: /* CXLFTR */ goto unimplemented;
11934 case 0xb960: /* CGRT */ goto unimplemented;
11935 case 0xb961: /* CLGRT */ goto unimplemented;
11936 case 0xb972: /* CRT */ goto unimplemented;
11937 case 0xb973: /* CLRT */ goto unimplemented;
11938 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11939 ovl.fmt.RRE.r2); goto ok;
11940 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11941 ovl.fmt.RRE.r2); goto ok;
11942 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11943 ovl.fmt.RRE.r2); goto ok;
11944 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11945 ovl.fmt.RRE.r2); goto ok;
11946 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11947 ovl.fmt.RRE.r2); goto ok;
11948 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11949 ovl.fmt.RRE.r2); goto ok;
11950 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11951 ovl.fmt.RRE.r2); goto ok;
11952 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11953 ovl.fmt.RRE.r2); goto ok;
11954 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11955 ovl.fmt.RRE.r2); goto ok;
11956 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11957 ovl.fmt.RRE.r2); goto ok;
11958 case 0xb98a: /* CSPG */ goto unimplemented;
11959 case 0xb98d: /* EPSW */ goto unimplemented;
11960 case 0xb98e: /* IDTE */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000011961 case 0xb990: s390_format_RRF_M0RERE(s390_irgen_TRTT, ovl.fmt.RRF3.r3,
11962 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11963 case 0xb991: s390_format_RRF_M0RERE(s390_irgen_TRTO, ovl.fmt.RRF3.r3,
11964 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
11965 case 0xb992: s390_format_RRF_M0RERE(s390_irgen_TROT, ovl.fmt.RRF3.r3,
11966 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
florian9af37692012-01-15 21:01:16 +000011967 case 0xb993: s390_format_RRF_M0RERE(s390_irgen_TROO, ovl.fmt.RRF3.r3,
11968 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011969 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11970 ovl.fmt.RRE.r2); goto ok;
11971 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11972 ovl.fmt.RRE.r2); goto ok;
11973 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11974 ovl.fmt.RRE.r2); goto ok;
11975 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11976 ovl.fmt.RRE.r2); goto ok;
11977 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11978 ovl.fmt.RRE.r2); goto ok;
11979 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11980 ovl.fmt.RRE.r2); goto ok;
11981 case 0xb99a: /* EPAIR */ goto unimplemented;
11982 case 0xb99b: /* ESAIR */ goto unimplemented;
11983 case 0xb99d: /* ESEA */ goto unimplemented;
11984 case 0xb99e: /* PTI */ goto unimplemented;
11985 case 0xb99f: /* SSAIR */ goto unimplemented;
11986 case 0xb9a2: /* PTF */ goto unimplemented;
11987 case 0xb9aa: /* LPTEA */ goto unimplemented;
11988 case 0xb9ae: /* RRBM */ goto unimplemented;
11989 case 0xb9af: /* PFMF */ goto unimplemented;
11990 case 0xb9b0: /* CU14 */ goto unimplemented;
11991 case 0xb9b1: /* CU24 */ goto unimplemented;
11992 case 0xb9b2: /* CU41 */ goto unimplemented;
11993 case 0xb9b3: /* CU42 */ goto unimplemented;
11994 case 0xb9bd: /* TRTRE */ goto unimplemented;
11995 case 0xb9be: /* SRSTU */ goto unimplemented;
11996 case 0xb9bf: /* TRTE */ goto unimplemented;
11997 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11998 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11999 goto ok;
12000 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
12001 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12002 goto ok;
12003 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
12004 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12005 goto ok;
12006 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
12007 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12008 goto ok;
12009 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
12010 ovl.fmt.RRE.r2); goto ok;
12011 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
12012 ovl.fmt.RRE.r2); goto ok;
12013 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
12014 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12015 goto ok;
12016 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
12017 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12018 goto ok;
12019 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
12020 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12021 goto ok;
12022 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
12023 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12024 goto ok;
12025 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
12026 ovl.fmt.RRE.r2); goto ok;
12027 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
12028 ovl.fmt.RRE.r2); goto ok;
12029 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000012030 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
12031 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12032 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012033 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
12034 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12035 goto ok;
12036 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
12037 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12038 goto ok;
12039 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
12040 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12041 goto ok;
12042 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
12043 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12044 goto ok;
12045 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
12046 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12047 goto ok;
12048 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
12049 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12050 goto ok;
12051 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
12052 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12053 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012054 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
12055 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
12056 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012057 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
12058 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12059 goto ok;
12060 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
12061 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12062 goto ok;
12063 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
12064 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12065 goto ok;
12066 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
12067 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12068 goto ok;
12069 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
12070 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12071 goto ok;
12072 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
12073 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12074 goto ok;
12075 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
12076 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
12077 goto ok;
12078 }
12079
12080 switch ((ovl.value & 0xff000000) >> 24) {
12081 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12082 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12083 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12084 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12085 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12086 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12087 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12088 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12089 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12090 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12091 case 0x45: /* BAL */ goto unimplemented;
12092 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12093 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12094 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12095 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12096 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12097 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12098 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12099 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12100 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12101 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12102 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12103 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12104 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12105 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12106 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12107 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12108 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12109 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12110 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12111 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12112 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12113 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12114 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12115 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12116 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12117 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12118 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12119 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12120 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12121 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12122 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12123 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12124 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12125 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12126 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12127 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12128 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12129 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12130 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12131 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12132 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12133 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12134 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12135 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12136 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12137 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12138 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12139 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12140 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12141 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12142 case 0x67: /* MXD */ goto unimplemented;
12143 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12144 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12145 case 0x69: /* CD */ goto unimplemented;
12146 case 0x6a: /* AD */ goto unimplemented;
12147 case 0x6b: /* SD */ goto unimplemented;
12148 case 0x6c: /* MD */ goto unimplemented;
12149 case 0x6d: /* DD */ goto unimplemented;
12150 case 0x6e: /* AW */ goto unimplemented;
12151 case 0x6f: /* SW */ goto unimplemented;
12152 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12153 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12154 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12155 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12156 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
12157 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
12158 case 0x79: /* CE */ goto unimplemented;
12159 case 0x7a: /* AE */ goto unimplemented;
12160 case 0x7b: /* SE */ goto unimplemented;
12161 case 0x7c: /* MDE */ goto unimplemented;
12162 case 0x7d: /* DE */ goto unimplemented;
12163 case 0x7e: /* AU */ goto unimplemented;
12164 case 0x7f: /* SU */ goto unimplemented;
12165 case 0x83: /* DIAG */ goto unimplemented;
12166 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
12167 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12168 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
12169 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
12170 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12171 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12172 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12173 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12174 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12175 ovl.fmt.RS.d2); goto ok;
12176 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12177 ovl.fmt.RS.d2); goto ok;
12178 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12179 ovl.fmt.RS.d2); goto ok;
12180 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12181 ovl.fmt.RS.d2); goto ok;
12182 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12183 ovl.fmt.RS.d2); goto ok;
12184 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12185 ovl.fmt.RS.d2); goto ok;
12186 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12187 ovl.fmt.RS.d2); goto ok;
12188 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
12189 ovl.fmt.RS.d2); goto ok;
12190 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12191 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12192 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12193 ovl.fmt.SI.d1); goto ok;
12194 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12195 ovl.fmt.SI.d1); goto ok;
12196 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12197 ovl.fmt.SI.d1); goto ok;
12198 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12199 ovl.fmt.SI.d1); goto ok;
12200 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12201 ovl.fmt.SI.d1); goto ok;
12202 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
12203 ovl.fmt.SI.d1); goto ok;
12204 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12205 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12206 case 0x99: /* TRACE */ goto unimplemented;
12207 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12208 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12209 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12210 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12211 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
12212 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12213 goto ok;
12214 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
12215 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
12216 goto ok;
12217 case 0xac: /* STNSM */ goto unimplemented;
12218 case 0xad: /* STOSM */ goto unimplemented;
12219 case 0xae: /* SIGP */ goto unimplemented;
12220 case 0xaf: /* MC */ goto unimplemented;
12221 case 0xb1: /* LRA */ goto unimplemented;
12222 case 0xb6: /* STCTL */ goto unimplemented;
12223 case 0xb7: /* LCTL */ goto unimplemented;
12224 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12225 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12226 case 0xbb: /* CDS */ goto unimplemented;
12227 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12228 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12229 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12230 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12231 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
12232 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
12233 }
12234
12235 return S390_DECODE_UNKNOWN_INSN;
12236
12237ok:
12238 return S390_DECODE_OK;
12239
12240unimplemented:
12241 return S390_DECODE_UNIMPLEMENTED_INSN;
12242}
12243
12244static s390_decode_t
12245s390_decode_6byte_and_irgen(UChar *bytes)
12246{
12247 typedef union {
12248 struct {
12249 unsigned int op1 : 8;
12250 unsigned int r1 : 4;
12251 unsigned int r3 : 4;
12252 unsigned int i2 : 16;
12253 unsigned int : 8;
12254 unsigned int op2 : 8;
12255 } RIE;
12256 struct {
12257 unsigned int op1 : 8;
12258 unsigned int r1 : 4;
12259 unsigned int r2 : 4;
12260 unsigned int i3 : 8;
12261 unsigned int i4 : 8;
12262 unsigned int i5 : 8;
12263 unsigned int op2 : 8;
12264 } RIE_RRUUU;
12265 struct {
12266 unsigned int op1 : 8;
12267 unsigned int r1 : 4;
12268 unsigned int : 4;
12269 unsigned int i2 : 16;
12270 unsigned int m3 : 4;
12271 unsigned int : 4;
12272 unsigned int op2 : 8;
12273 } RIEv1;
12274 struct {
12275 unsigned int op1 : 8;
12276 unsigned int r1 : 4;
12277 unsigned int r2 : 4;
12278 unsigned int i4 : 16;
12279 unsigned int m3 : 4;
12280 unsigned int : 4;
12281 unsigned int op2 : 8;
12282 } RIE_RRPU;
12283 struct {
12284 unsigned int op1 : 8;
12285 unsigned int r1 : 4;
12286 unsigned int m3 : 4;
12287 unsigned int i4 : 16;
12288 unsigned int i2 : 8;
12289 unsigned int op2 : 8;
12290 } RIEv3;
12291 struct {
12292 unsigned int op1 : 8;
12293 unsigned int r1 : 4;
12294 unsigned int op2 : 4;
12295 unsigned int i2 : 32;
12296 } RIL;
12297 struct {
12298 unsigned int op1 : 8;
12299 unsigned int r1 : 4;
12300 unsigned int m3 : 4;
12301 unsigned int b4 : 4;
12302 unsigned int d4 : 12;
12303 unsigned int i2 : 8;
12304 unsigned int op2 : 8;
12305 } RIS;
12306 struct {
12307 unsigned int op1 : 8;
12308 unsigned int r1 : 4;
12309 unsigned int r2 : 4;
12310 unsigned int b4 : 4;
12311 unsigned int d4 : 12;
12312 unsigned int m3 : 4;
12313 unsigned int : 4;
12314 unsigned int op2 : 8;
12315 } RRS;
12316 struct {
12317 unsigned int op1 : 8;
12318 unsigned int l1 : 4;
12319 unsigned int : 4;
12320 unsigned int b1 : 4;
12321 unsigned int d1 : 12;
12322 unsigned int : 8;
12323 unsigned int op2 : 8;
12324 } RSL;
12325 struct {
12326 unsigned int op1 : 8;
12327 unsigned int r1 : 4;
12328 unsigned int r3 : 4;
12329 unsigned int b2 : 4;
12330 unsigned int dl2 : 12;
12331 unsigned int dh2 : 8;
12332 unsigned int op2 : 8;
12333 } RSY;
12334 struct {
12335 unsigned int op1 : 8;
12336 unsigned int r1 : 4;
12337 unsigned int x2 : 4;
12338 unsigned int b2 : 4;
12339 unsigned int d2 : 12;
12340 unsigned int : 8;
12341 unsigned int op2 : 8;
12342 } RXE;
12343 struct {
12344 unsigned int op1 : 8;
12345 unsigned int r3 : 4;
12346 unsigned int x2 : 4;
12347 unsigned int b2 : 4;
12348 unsigned int d2 : 12;
12349 unsigned int r1 : 4;
12350 unsigned int : 4;
12351 unsigned int op2 : 8;
12352 } RXF;
12353 struct {
12354 unsigned int op1 : 8;
12355 unsigned int r1 : 4;
12356 unsigned int x2 : 4;
12357 unsigned int b2 : 4;
12358 unsigned int dl2 : 12;
12359 unsigned int dh2 : 8;
12360 unsigned int op2 : 8;
12361 } RXY;
12362 struct {
12363 unsigned int op1 : 8;
12364 unsigned int i2 : 8;
12365 unsigned int b1 : 4;
12366 unsigned int dl1 : 12;
12367 unsigned int dh1 : 8;
12368 unsigned int op2 : 8;
12369 } SIY;
12370 struct {
12371 unsigned int op : 8;
12372 unsigned int l : 8;
12373 unsigned int b1 : 4;
12374 unsigned int d1 : 12;
12375 unsigned int b2 : 4;
12376 unsigned int d2 : 12;
12377 } SS;
12378 struct {
12379 unsigned int op : 8;
12380 unsigned int l1 : 4;
12381 unsigned int l2 : 4;
12382 unsigned int b1 : 4;
12383 unsigned int d1 : 12;
12384 unsigned int b2 : 4;
12385 unsigned int d2 : 12;
12386 } SS_LLRDRD;
12387 struct {
12388 unsigned int op : 8;
12389 unsigned int r1 : 4;
12390 unsigned int r3 : 4;
12391 unsigned int b2 : 4;
12392 unsigned int d2 : 12;
12393 unsigned int b4 : 4;
12394 unsigned int d4 : 12;
12395 } SS_RRRDRD2;
12396 struct {
12397 unsigned int op : 16;
12398 unsigned int b1 : 4;
12399 unsigned int d1 : 12;
12400 unsigned int b2 : 4;
12401 unsigned int d2 : 12;
12402 } SSE;
12403 struct {
12404 unsigned int op1 : 8;
12405 unsigned int r3 : 4;
12406 unsigned int op2 : 4;
12407 unsigned int b1 : 4;
12408 unsigned int d1 : 12;
12409 unsigned int b2 : 4;
12410 unsigned int d2 : 12;
12411 } SSF;
12412 struct {
12413 unsigned int op : 16;
12414 unsigned int b1 : 4;
12415 unsigned int d1 : 12;
12416 unsigned int i2 : 16;
12417 } SIL;
12418 } formats;
12419 union {
12420 formats fmt;
12421 ULong value;
12422 } ovl;
12423
12424 vassert(sizeof(formats) == 6);
12425
12426 ((char *)(&ovl.value))[0] = bytes[0];
12427 ((char *)(&ovl.value))[1] = bytes[1];
12428 ((char *)(&ovl.value))[2] = bytes[2];
12429 ((char *)(&ovl.value))[3] = bytes[3];
12430 ((char *)(&ovl.value))[4] = bytes[4];
12431 ((char *)(&ovl.value))[5] = bytes[5];
12432 ((char *)(&ovl.value))[6] = 0x0;
12433 ((char *)(&ovl.value))[7] = 0x0;
12434
12435 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12436 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12437 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12438 ovl.fmt.RXY.dl2,
12439 ovl.fmt.RXY.dh2); goto ok;
12440 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12441 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12442 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12443 ovl.fmt.RXY.dl2,
12444 ovl.fmt.RXY.dh2); goto ok;
12445 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12446 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12447 ovl.fmt.RXY.dl2,
12448 ovl.fmt.RXY.dh2); goto ok;
12449 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12450 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12451 ovl.fmt.RXY.dl2,
12452 ovl.fmt.RXY.dh2); goto ok;
12453 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12454 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12455 ovl.fmt.RXY.dl2,
12456 ovl.fmt.RXY.dh2); goto ok;
12457 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12458 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12459 ovl.fmt.RXY.dl2,
12460 ovl.fmt.RXY.dh2); goto ok;
12461 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12462 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12463 ovl.fmt.RXY.dl2,
12464 ovl.fmt.RXY.dh2); goto ok;
12465 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12466 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12467 ovl.fmt.RXY.dl2,
12468 ovl.fmt.RXY.dh2); goto ok;
12469 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12470 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12471 ovl.fmt.RXY.dl2,
12472 ovl.fmt.RXY.dh2); goto ok;
12473 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12474 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12475 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12476 ovl.fmt.RXY.dl2,
12477 ovl.fmt.RXY.dh2); goto ok;
12478 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12479 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12480 ovl.fmt.RXY.dl2,
12481 ovl.fmt.RXY.dh2); goto ok;
12482 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12483 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12484 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12485 ovl.fmt.RXY.dl2,
12486 ovl.fmt.RXY.dh2); goto ok;
12487 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12488 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12489 ovl.fmt.RXY.dl2,
12490 ovl.fmt.RXY.dh2); goto ok;
12491 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12492 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12493 ovl.fmt.RXY.dl2,
12494 ovl.fmt.RXY.dh2); goto ok;
12495 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12496 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12497 ovl.fmt.RXY.dl2,
12498 ovl.fmt.RXY.dh2); goto ok;
12499 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12500 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12501 ovl.fmt.RXY.dl2,
12502 ovl.fmt.RXY.dh2); goto ok;
12503 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12504 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12505 ovl.fmt.RXY.dl2,
12506 ovl.fmt.RXY.dh2); goto ok;
12507 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12508 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12509 ovl.fmt.RXY.dl2,
12510 ovl.fmt.RXY.dh2); goto ok;
12511 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12512 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12513 ovl.fmt.RXY.dl2,
12514 ovl.fmt.RXY.dh2); goto ok;
12515 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12516 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12517 ovl.fmt.RXY.dl2,
12518 ovl.fmt.RXY.dh2); goto ok;
12519 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12520 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12521 ovl.fmt.RXY.dl2,
12522 ovl.fmt.RXY.dh2); goto ok;
12523 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12524 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12525 ovl.fmt.RXY.dl2,
12526 ovl.fmt.RXY.dh2); goto ok;
12527 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12528 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12529 ovl.fmt.RXY.dl2,
12530 ovl.fmt.RXY.dh2); goto ok;
12531 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12532 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12533 ovl.fmt.RXY.dl2,
12534 ovl.fmt.RXY.dh2); goto ok;
12535 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12536 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12537 ovl.fmt.RXY.dl2,
12538 ovl.fmt.RXY.dh2); goto ok;
12539 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12540 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12541 ovl.fmt.RXY.dl2,
12542 ovl.fmt.RXY.dh2); goto ok;
12543 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12544 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12545 ovl.fmt.RXY.dl2,
12546 ovl.fmt.RXY.dh2); goto ok;
12547 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12548 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12549 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12550 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12551 ovl.fmt.RXY.dh2); goto ok;
12552 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12553 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12554 ovl.fmt.RXY.dl2,
12555 ovl.fmt.RXY.dh2); goto ok;
12556 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12557 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12558 ovl.fmt.RXY.dl2,
12559 ovl.fmt.RXY.dh2); goto ok;
12560 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12561 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12562 ovl.fmt.RXY.dl2,
12563 ovl.fmt.RXY.dh2); goto ok;
12564 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12565 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12566 ovl.fmt.RXY.dl2,
12567 ovl.fmt.RXY.dh2); goto ok;
12568 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12569 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12570 ovl.fmt.RXY.dl2,
12571 ovl.fmt.RXY.dh2); goto ok;
12572 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12573 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12574 ovl.fmt.RXY.dl2,
12575 ovl.fmt.RXY.dh2); goto ok;
12576 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12577 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12578 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12579 ovl.fmt.RXY.dh2); goto ok;
12580 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12581 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12582 ovl.fmt.RXY.dl2,
12583 ovl.fmt.RXY.dh2); goto ok;
12584 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12585 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12586 ovl.fmt.RXY.dl2,
12587 ovl.fmt.RXY.dh2); goto ok;
12588 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12589 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12590 ovl.fmt.RXY.dl2,
12591 ovl.fmt.RXY.dh2); goto ok;
12592 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12593 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12594 ovl.fmt.RXY.dl2,
12595 ovl.fmt.RXY.dh2); goto ok;
12596 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12597 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12598 ovl.fmt.RXY.dl2,
12599 ovl.fmt.RXY.dh2); goto ok;
12600 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12601 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12602 ovl.fmt.RXY.dl2,
12603 ovl.fmt.RXY.dh2); goto ok;
12604 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12605 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12606 ovl.fmt.RXY.dl2,
12607 ovl.fmt.RXY.dh2); goto ok;
12608 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12609 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12610 ovl.fmt.RXY.dl2,
12611 ovl.fmt.RXY.dh2); goto ok;
12612 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12613 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12614 ovl.fmt.RXY.dl2,
12615 ovl.fmt.RXY.dh2); goto ok;
12616 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12617 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12618 ovl.fmt.RXY.dl2,
12619 ovl.fmt.RXY.dh2); goto ok;
12620 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12621 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12622 ovl.fmt.RXY.dl2,
12623 ovl.fmt.RXY.dh2); goto ok;
12624 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12625 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12626 ovl.fmt.RXY.dl2,
12627 ovl.fmt.RXY.dh2); goto ok;
12628 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12629 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12630 ovl.fmt.RXY.dl2,
12631 ovl.fmt.RXY.dh2); goto ok;
12632 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12633 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12634 ovl.fmt.RXY.dl2,
12635 ovl.fmt.RXY.dh2); goto ok;
12636 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12637 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12638 ovl.fmt.RXY.dl2,
12639 ovl.fmt.RXY.dh2); goto ok;
12640 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12641 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12642 ovl.fmt.RXY.dl2,
12643 ovl.fmt.RXY.dh2); goto ok;
12644 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12645 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12646 ovl.fmt.RXY.dl2,
12647 ovl.fmt.RXY.dh2); goto ok;
12648 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12649 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12650 ovl.fmt.RXY.dl2,
12651 ovl.fmt.RXY.dh2); goto ok;
12652 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12653 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12654 ovl.fmt.RXY.dl2,
12655 ovl.fmt.RXY.dh2); goto ok;
12656 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12657 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12658 ovl.fmt.RXY.dl2,
12659 ovl.fmt.RXY.dh2); goto ok;
12660 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12661 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12662 ovl.fmt.RXY.dl2,
12663 ovl.fmt.RXY.dh2); goto ok;
12664 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12665 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12666 ovl.fmt.RXY.dl2,
12667 ovl.fmt.RXY.dh2); goto ok;
12668 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12669 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12670 ovl.fmt.RXY.dl2,
12671 ovl.fmt.RXY.dh2); goto ok;
12672 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12673 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12674 ovl.fmt.RXY.dl2,
12675 ovl.fmt.RXY.dh2); goto ok;
12676 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12677 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12678 ovl.fmt.RXY.dl2,
12679 ovl.fmt.RXY.dh2); goto ok;
12680 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12681 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12682 ovl.fmt.RXY.dl2,
12683 ovl.fmt.RXY.dh2); goto ok;
12684 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12685 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12686 ovl.fmt.RXY.dl2,
12687 ovl.fmt.RXY.dh2); goto ok;
12688 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12689 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12690 ovl.fmt.RXY.dl2,
12691 ovl.fmt.RXY.dh2); goto ok;
12692 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12693 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12694 ovl.fmt.RXY.dl2,
12695 ovl.fmt.RXY.dh2); goto ok;
12696 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12697 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12698 ovl.fmt.RXY.dl2,
12699 ovl.fmt.RXY.dh2); goto ok;
12700 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12701 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12702 ovl.fmt.RXY.dl2,
12703 ovl.fmt.RXY.dh2); goto ok;
12704 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12705 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12706 ovl.fmt.RXY.dl2,
12707 ovl.fmt.RXY.dh2); goto ok;
12708 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12709 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12710 ovl.fmt.RXY.dl2,
12711 ovl.fmt.RXY.dh2); goto ok;
12712 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12713 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12714 ovl.fmt.RXY.dl2,
12715 ovl.fmt.RXY.dh2); goto ok;
12716 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12717 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12718 ovl.fmt.RXY.dl2,
12719 ovl.fmt.RXY.dh2); goto ok;
12720 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12721 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12722 ovl.fmt.RXY.dl2,
12723 ovl.fmt.RXY.dh2); goto ok;
12724 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12725 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12726 ovl.fmt.RXY.dl2,
12727 ovl.fmt.RXY.dh2); goto ok;
12728 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12729 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12730 ovl.fmt.RXY.dl2,
12731 ovl.fmt.RXY.dh2); goto ok;
12732 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12733 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12734 ovl.fmt.RXY.dl2,
12735 ovl.fmt.RXY.dh2); goto ok;
12736 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12737 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12738 ovl.fmt.RXY.dl2,
12739 ovl.fmt.RXY.dh2); goto ok;
12740 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12741 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12742 ovl.fmt.RXY.dl2,
12743 ovl.fmt.RXY.dh2); goto ok;
12744 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12745 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12746 ovl.fmt.RXY.dl2,
12747 ovl.fmt.RXY.dh2); goto ok;
12748 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12749 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12750 ovl.fmt.RXY.dl2,
12751 ovl.fmt.RXY.dh2); goto ok;
12752 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12753 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12754 ovl.fmt.RXY.dl2,
12755 ovl.fmt.RXY.dh2); goto ok;
12756 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12757 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12758 ovl.fmt.RXY.dl2,
12759 ovl.fmt.RXY.dh2); goto ok;
12760 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12761 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12762 ovl.fmt.RXY.dl2,
12763 ovl.fmt.RXY.dh2); goto ok;
12764 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12765 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12766 ovl.fmt.RXY.dl2,
12767 ovl.fmt.RXY.dh2); goto ok;
12768 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12769 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12770 ovl.fmt.RXY.dl2,
12771 ovl.fmt.RXY.dh2); goto ok;
12772 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12773 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12774 ovl.fmt.RXY.dl2,
12775 ovl.fmt.RXY.dh2); goto ok;
12776 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12777 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12778 ovl.fmt.RXY.dl2,
12779 ovl.fmt.RXY.dh2); goto ok;
12780 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12781 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12782 ovl.fmt.RXY.dl2,
12783 ovl.fmt.RXY.dh2); goto ok;
12784 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12785 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12786 ovl.fmt.RXY.dl2,
12787 ovl.fmt.RXY.dh2); goto ok;
12788 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12789 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12790 ovl.fmt.RXY.dl2,
12791 ovl.fmt.RXY.dh2); goto ok;
12792 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12793 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12794 ovl.fmt.RSY.dl2,
12795 ovl.fmt.RSY.dh2); goto ok;
12796 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12797 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12798 ovl.fmt.RSY.dl2,
12799 ovl.fmt.RSY.dh2); goto ok;
12800 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12801 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12802 ovl.fmt.RSY.dl2,
12803 ovl.fmt.RSY.dh2); goto ok;
12804 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12805 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12806 ovl.fmt.RSY.dl2,
12807 ovl.fmt.RSY.dh2); goto ok;
12808 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12809 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12810 ovl.fmt.RSY.dl2,
12811 ovl.fmt.RSY.dh2); goto ok;
12812 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12813 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12814 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12815 ovl.fmt.RSY.dl2,
12816 ovl.fmt.RSY.dh2); goto ok;
12817 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12818 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12819 ovl.fmt.RSY.dl2,
12820 ovl.fmt.RSY.dh2); goto ok;
12821 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12822 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12823 ovl.fmt.RSY.dl2,
12824 ovl.fmt.RSY.dh2); goto ok;
12825 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12826 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12827 ovl.fmt.RSY.dl2,
12828 ovl.fmt.RSY.dh2); goto ok;
12829 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12830 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12831 ovl.fmt.RSY.dl2,
12832 ovl.fmt.RSY.dh2); goto ok;
12833 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12834 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12835 ovl.fmt.RSY.dl2,
12836 ovl.fmt.RSY.dh2); goto ok;
12837 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12838 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12839 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12840 ovl.fmt.RSY.dl2,
12841 ovl.fmt.RSY.dh2); goto ok;
12842 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12843 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12844 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12845 ovl.fmt.RSY.dh2); goto ok;
12846 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12847 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12848 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12849 ovl.fmt.RSY.dh2); goto ok;
12850 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12851 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12852 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12853 ovl.fmt.RSY.dl2,
12854 ovl.fmt.RSY.dh2); goto ok;
12855 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12856 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12857 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12858 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12859 ovl.fmt.RSY.dl2,
12860 ovl.fmt.RSY.dh2); goto ok;
12861 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12862 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12863 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12864 ovl.fmt.RSY.dh2); goto ok;
12865 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12866 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12867 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12868 ovl.fmt.SIY.dh1); goto ok;
12869 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12870 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12871 ovl.fmt.SIY.dh1); goto ok;
12872 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12873 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12874 ovl.fmt.SIY.dh1); goto ok;
12875 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12876 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12877 ovl.fmt.SIY.dh1); goto ok;
12878 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12879 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12880 ovl.fmt.SIY.dh1); goto ok;
12881 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12882 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12883 ovl.fmt.SIY.dh1); goto ok;
12884 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12885 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12886 ovl.fmt.SIY.dh1); goto ok;
12887 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12888 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12889 ovl.fmt.SIY.dh1); goto ok;
12890 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12891 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12892 ovl.fmt.SIY.dh1); goto ok;
12893 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12894 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12895 ovl.fmt.SIY.dh1); goto ok;
12896 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12897 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12898 ovl.fmt.RSY.dl2,
12899 ovl.fmt.RSY.dh2); goto ok;
12900 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12901 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12902 ovl.fmt.RSY.dl2,
12903 ovl.fmt.RSY.dh2); goto ok;
12904 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12905 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12906 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12907 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12908 ovl.fmt.RSY.dl2,
12909 ovl.fmt.RSY.dh2); goto ok;
12910 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12911 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12912 ovl.fmt.RSY.dl2,
12913 ovl.fmt.RSY.dh2); goto ok;
12914 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12915 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12916 ovl.fmt.RSY.dl2,
12917 ovl.fmt.RSY.dh2); goto ok;
12918 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12919 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12920 ovl.fmt.RSY.dl2,
12921 ovl.fmt.RSY.dh2); goto ok;
12922 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12923 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12924 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12925 ovl.fmt.RSY.dh2); goto ok;
12926 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12927 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12928 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12929 ovl.fmt.RSY.dl2,
12930 ovl.fmt.RSY.dh2); goto ok;
12931 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12932 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12933 ovl.fmt.RSY.dl2,
12934 ovl.fmt.RSY.dh2); goto ok;
12935 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12936 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12937 ovl.fmt.RSY.dl2,
12938 ovl.fmt.RSY.dh2); goto ok;
12939 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12940 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12941 ovl.fmt.RSY.dl2,
12942 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012943 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12944 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12945 ovl.fmt.RSY.dl2,
12946 ovl.fmt.RSY.dh2,
12947 S390_XMNM_LOCG); goto ok;
12948 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12949 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12950 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12951 ovl.fmt.RSY.dh2,
12952 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012953 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12954 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12955 ovl.fmt.RSY.dl2,
12956 ovl.fmt.RSY.dh2); goto ok;
12957 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12958 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12959 ovl.fmt.RSY.dl2,
12960 ovl.fmt.RSY.dh2); goto ok;
12961 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12962 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12963 ovl.fmt.RSY.dl2,
12964 ovl.fmt.RSY.dh2); goto ok;
12965 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12966 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12967 ovl.fmt.RSY.dl2,
12968 ovl.fmt.RSY.dh2); goto ok;
12969 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12970 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12971 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12972 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012973 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12974 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12975 ovl.fmt.RSY.dl2,
12976 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12977 goto ok;
12978 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12979 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12980 ovl.fmt.RSY.dl2,
12981 ovl.fmt.RSY.dh2,
12982 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012983 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12984 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12985 ovl.fmt.RSY.dl2,
12986 ovl.fmt.RSY.dh2); goto ok;
12987 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12988 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12989 ovl.fmt.RSY.dl2,
12990 ovl.fmt.RSY.dh2); goto ok;
12991 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12992 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12993 ovl.fmt.RSY.dl2,
12994 ovl.fmt.RSY.dh2); goto ok;
12995 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12996 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12997 ovl.fmt.RSY.dl2,
12998 ovl.fmt.RSY.dh2); goto ok;
12999 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
13000 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
13001 ovl.fmt.RSY.dl2,
13002 ovl.fmt.RSY.dh2); goto ok;
13003 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
13004 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13005 goto ok;
13006 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
13007 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13008 goto ok;
13009 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
13010 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
13011 ovl.fmt.RIE_RRUUU.r1,
13012 ovl.fmt.RIE_RRUUU.r2,
13013 ovl.fmt.RIE_RRUUU.i3,
13014 ovl.fmt.RIE_RRUUU.i4,
13015 ovl.fmt.RIE_RRUUU.i5);
13016 goto ok;
13017 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
13018 ovl.fmt.RIE_RRUUU.r1,
13019 ovl.fmt.RIE_RRUUU.r2,
13020 ovl.fmt.RIE_RRUUU.i3,
13021 ovl.fmt.RIE_RRUUU.i4,
13022 ovl.fmt.RIE_RRUUU.i5);
13023 goto ok;
13024 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
13025 ovl.fmt.RIE_RRUUU.r1,
13026 ovl.fmt.RIE_RRUUU.r2,
13027 ovl.fmt.RIE_RRUUU.i3,
13028 ovl.fmt.RIE_RRUUU.i4,
13029 ovl.fmt.RIE_RRUUU.i5);
13030 goto ok;
13031 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
13032 ovl.fmt.RIE_RRUUU.r1,
13033 ovl.fmt.RIE_RRUUU.r2,
13034 ovl.fmt.RIE_RRUUU.i3,
13035 ovl.fmt.RIE_RRUUU.i4,
13036 ovl.fmt.RIE_RRUUU.i5);
13037 goto ok;
13038 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
13039 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
13040 ovl.fmt.RIE_RRPU.r1,
13041 ovl.fmt.RIE_RRPU.r2,
13042 ovl.fmt.RIE_RRPU.i4,
13043 ovl.fmt.RIE_RRPU.m3); goto ok;
13044 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
13045 ovl.fmt.RIE_RRPU.r1,
13046 ovl.fmt.RIE_RRPU.r2,
13047 ovl.fmt.RIE_RRPU.i4,
13048 ovl.fmt.RIE_RRPU.m3); goto ok;
13049 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
13050 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
13051 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
13052 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
13053 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
13054 ovl.fmt.RIE_RRPU.r1,
13055 ovl.fmt.RIE_RRPU.r2,
13056 ovl.fmt.RIE_RRPU.i4,
13057 ovl.fmt.RIE_RRPU.m3); goto ok;
13058 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
13059 ovl.fmt.RIE_RRPU.r1,
13060 ovl.fmt.RIE_RRPU.r2,
13061 ovl.fmt.RIE_RRPU.i4,
13062 ovl.fmt.RIE_RRPU.m3); goto ok;
13063 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
13064 ovl.fmt.RIEv3.r1,
13065 ovl.fmt.RIEv3.m3,
13066 ovl.fmt.RIEv3.i4,
13067 ovl.fmt.RIEv3.i2); goto ok;
13068 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
13069 ovl.fmt.RIEv3.r1,
13070 ovl.fmt.RIEv3.m3,
13071 ovl.fmt.RIEv3.i4,
13072 ovl.fmt.RIEv3.i2); goto ok;
13073 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
13074 ovl.fmt.RIEv3.r1,
13075 ovl.fmt.RIEv3.m3,
13076 ovl.fmt.RIEv3.i4,
13077 ovl.fmt.RIEv3.i2); goto ok;
13078 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
13079 ovl.fmt.RIEv3.r1,
13080 ovl.fmt.RIEv3.m3,
13081 ovl.fmt.RIEv3.i4,
13082 ovl.fmt.RIEv3.i2); goto ok;
13083 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
13084 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
13085 goto ok;
13086 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
13087 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13088 ovl.fmt.RIE.i2); goto ok;
13089 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
13090 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13091 ovl.fmt.RIE.i2); goto ok;
13092 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
13093 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
13094 ovl.fmt.RIE.i2); goto ok;
13095 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
13096 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13097 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13098 goto ok;
13099 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
13100 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13101 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13102 goto ok;
13103 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
13104 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13105 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13106 goto ok;
13107 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
13108 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
13109 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
13110 goto ok;
13111 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
13112 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13113 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13114 ovl.fmt.RIS.i2); goto ok;
13115 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
13116 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13117 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13118 ovl.fmt.RIS.i2); goto ok;
13119 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
13120 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
13121 ovl.fmt.RIS.d4,
13122 ovl.fmt.RIS.i2); goto ok;
13123 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
13124 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
13125 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
13126 ovl.fmt.RIS.i2); goto ok;
13127 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
13128 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13129 ovl.fmt.RXE.d2); goto ok;
13130 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
13131 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13132 ovl.fmt.RXE.d2); goto ok;
13133 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
13134 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13135 ovl.fmt.RXE.d2); goto ok;
13136 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
13137 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
13138 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
13139 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13140 ovl.fmt.RXE.d2); goto ok;
13141 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
13142 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13143 ovl.fmt.RXE.d2); goto ok;
13144 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
13145 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13146 ovl.fmt.RXE.d2); goto ok;
13147 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
13148 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
13149 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13150 ovl.fmt.RXE.d2); goto ok;
13151 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
13152 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13153 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13154 ovl.fmt.RXF.r1); goto ok;
13155 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
13156 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13157 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13158 ovl.fmt.RXF.r1); goto ok;
13159 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
13160 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13161 ovl.fmt.RXE.d2); goto ok;
13162 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
13163 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13164 ovl.fmt.RXE.d2); goto ok;
13165 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
13166 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13167 ovl.fmt.RXE.d2); goto ok;
13168 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
13169 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13170 ovl.fmt.RXE.d2); goto ok;
13171 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
13172 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13173 ovl.fmt.RXE.d2); goto ok;
13174 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
13175 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13176 ovl.fmt.RXE.d2); goto ok;
13177 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
13178 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
13179 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13180 ovl.fmt.RXE.d2); goto ok;
13181 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
13182 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13183 ovl.fmt.RXE.d2); goto ok;
13184 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
13185 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13186 ovl.fmt.RXE.d2); goto ok;
13187 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
13188 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13189 ovl.fmt.RXE.d2); goto ok;
13190 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
13191 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
13192 ovl.fmt.RXE.d2); goto ok;
13193 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
13194 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13195 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13196 ovl.fmt.RXF.r1); goto ok;
13197 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
13198 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
13199 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
13200 ovl.fmt.RXF.r1); goto ok;
13201 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
13202 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
13203 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
13204 case 0xed000000002eULL: /* MAE */ goto unimplemented;
13205 case 0xed000000002fULL: /* MSE */ goto unimplemented;
13206 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
13207 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
13208 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
13209 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
13210 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
13211 case 0xed000000003aULL: /* MAY */ goto unimplemented;
13212 case 0xed000000003bULL: /* MY */ goto unimplemented;
13213 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
13214 case 0xed000000003dULL: /* MYH */ goto unimplemented;
13215 case 0xed000000003eULL: /* MAD */ goto unimplemented;
13216 case 0xed000000003fULL: /* MSD */ goto unimplemented;
13217 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
13218 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
13219 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
13220 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
13221 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
13222 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
13223 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
13224 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
13225 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
13226 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
13227 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
13228 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13229 ovl.fmt.RXY.dl2,
13230 ovl.fmt.RXY.dh2); goto ok;
13231 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
13232 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13233 ovl.fmt.RXY.dl2,
13234 ovl.fmt.RXY.dh2); goto ok;
13235 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
13236 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13237 ovl.fmt.RXY.dl2,
13238 ovl.fmt.RXY.dh2); goto ok;
13239 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
13240 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
13241 ovl.fmt.RXY.dl2,
13242 ovl.fmt.RXY.dh2); goto ok;
13243 }
13244
13245 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
13246 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
13247 ovl.fmt.RIL.i2); goto ok;
13248 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
13249 ovl.fmt.RIL.i2); goto ok;
13250 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
13251 ovl.fmt.RIL.i2); goto ok;
13252 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
13253 ovl.fmt.RIL.i2); goto ok;
13254 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
13255 ovl.fmt.RIL.i2); goto ok;
13256 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
13257 ovl.fmt.RIL.i2); goto ok;
13258 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
13259 ovl.fmt.RIL.i2); goto ok;
13260 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
13261 ovl.fmt.RIL.i2); goto ok;
13262 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
13263 ovl.fmt.RIL.i2); goto ok;
13264 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
13265 ovl.fmt.RIL.i2); goto ok;
13266 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
13267 ovl.fmt.RIL.i2); goto ok;
13268 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
13269 ovl.fmt.RIL.i2); goto ok;
13270 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
13271 ovl.fmt.RIL.i2); goto ok;
13272 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
13273 ovl.fmt.RIL.i2); goto ok;
13274 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
13275 ovl.fmt.RIL.i2); goto ok;
13276 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
13277 ovl.fmt.RIL.i2); goto ok;
13278 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
13279 ovl.fmt.RIL.i2); goto ok;
13280 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
13281 ovl.fmt.RIL.i2); goto ok;
13282 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
13283 ovl.fmt.RIL.i2); goto ok;
13284 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
13285 ovl.fmt.RIL.i2); goto ok;
13286 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
13287 ovl.fmt.RIL.i2); goto ok;
13288 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
13289 ovl.fmt.RIL.i2); goto ok;
13290 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
13291 ovl.fmt.RIL.i2); goto ok;
13292 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13293 ovl.fmt.RIL.i2); goto ok;
13294 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13295 ovl.fmt.RIL.i2); goto ok;
13296 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13297 ovl.fmt.RIL.i2); goto ok;
13298 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13299 ovl.fmt.RIL.i2); goto ok;
13300 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13301 ovl.fmt.RIL.i2); goto ok;
13302 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13303 ovl.fmt.RIL.i2); goto ok;
13304 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13305 ovl.fmt.RIL.i2); goto ok;
13306 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13307 ovl.fmt.RIL.i2); goto ok;
13308 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13309 ovl.fmt.RIL.i2); goto ok;
13310 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13311 ovl.fmt.RIL.i2); goto ok;
13312 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13313 ovl.fmt.RIL.i2); goto ok;
13314 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13315 ovl.fmt.RIL.i2); goto ok;
13316 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13317 ovl.fmt.RIL.i2); goto ok;
13318 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13319 ovl.fmt.RIL.i2); goto ok;
13320 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13321 ovl.fmt.RIL.i2); goto ok;
13322 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13323 ovl.fmt.RIL.i2); goto ok;
13324 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13325 ovl.fmt.RIL.i2); goto ok;
13326 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13327 ovl.fmt.RIL.i2); goto ok;
13328 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13329 ovl.fmt.RIL.i2); goto ok;
13330 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13331 ovl.fmt.RIL.i2); goto ok;
13332 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13333 ovl.fmt.RIL.i2); goto ok;
13334 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13335 ovl.fmt.RIL.i2); goto ok;
13336 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13337 ovl.fmt.RIL.i2); goto ok;
13338 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13339 ovl.fmt.RIL.i2); goto ok;
13340 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13341 ovl.fmt.RIL.i2); goto ok;
13342 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13343 ovl.fmt.RIL.i2); goto ok;
13344 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13345 case 0xc801ULL: /* ECTG */ goto unimplemented;
13346 case 0xc802ULL: /* CSST */ goto unimplemented;
13347 case 0xc804ULL: /* LPD */ goto unimplemented;
13348 case 0xc805ULL: /* LPDG */ goto unimplemented;
13349 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13350 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13351 ovl.fmt.RIL.i2); goto ok;
13352 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13353 ovl.fmt.RIL.i2); goto ok;
13354 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13355 ovl.fmt.RIL.i2); goto ok;
13356 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13357 ovl.fmt.RIL.i2); goto ok;
13358 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13359 ovl.fmt.RIL.i2); goto ok;
13360 }
13361
13362 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13363 case 0xd0ULL: /* TRTR */ goto unimplemented;
13364 case 0xd1ULL: /* MVN */ goto unimplemented;
13365 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13366 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13367 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13368 case 0xd3ULL: /* MVZ */ goto unimplemented;
13369 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13370 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13371 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13372 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13373 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13374 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13375 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13376 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13377 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013378 case 0xd7ULL:
13379 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13380 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13381 else
13382 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13383 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13384 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13385 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013386 case 0xd9ULL: /* MVCK */ goto unimplemented;
13387 case 0xdaULL: /* MVCP */ goto unimplemented;
13388 case 0xdbULL: /* MVCS */ goto unimplemented;
florian730448f2012-02-04 17:07:07 +000013389 case 0xdcULL: s390_format_SS_L0RDRD(s390_irgen_TR, ovl.fmt.SS.l,
13390 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13391 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000013392 case 0xddULL: /* TRT */ goto unimplemented;
13393 case 0xdeULL: /* ED */ goto unimplemented;
13394 case 0xdfULL: /* EDMK */ goto unimplemented;
13395 case 0xe1ULL: /* PKU */ goto unimplemented;
13396 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13397 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13398 case 0xe9ULL: /* PKA */ goto unimplemented;
13399 case 0xeaULL: /* UNPKA */ goto unimplemented;
13400 case 0xeeULL: /* PLO */ goto unimplemented;
13401 case 0xefULL: /* LMD */ goto unimplemented;
13402 case 0xf0ULL: /* SRP */ goto unimplemented;
13403 case 0xf1ULL: /* MVO */ goto unimplemented;
13404 case 0xf2ULL: /* PACK */ goto unimplemented;
13405 case 0xf3ULL: /* UNPK */ goto unimplemented;
13406 case 0xf8ULL: /* ZAP */ goto unimplemented;
13407 case 0xf9ULL: /* CP */ goto unimplemented;
13408 case 0xfaULL: /* AP */ goto unimplemented;
13409 case 0xfbULL: /* SP */ goto unimplemented;
13410 case 0xfcULL: /* MP */ goto unimplemented;
13411 case 0xfdULL: /* DP */ goto unimplemented;
13412 }
13413
13414 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13415 case 0xe500ULL: /* LASP */ goto unimplemented;
13416 case 0xe501ULL: /* TPROT */ goto unimplemented;
13417 case 0xe502ULL: /* STRAG */ goto unimplemented;
13418 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13419 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13420 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13421 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13422 goto ok;
13423 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13424 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13425 goto ok;
13426 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13427 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13428 goto ok;
13429 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13430 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13431 goto ok;
13432 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13433 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13434 goto ok;
13435 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13436 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13437 goto ok;
13438 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13439 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13440 goto ok;
13441 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13442 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13443 goto ok;
13444 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13445 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13446 goto ok;
13447 }
13448
13449 return S390_DECODE_UNKNOWN_INSN;
13450
13451ok:
13452 return S390_DECODE_OK;
13453
13454unimplemented:
13455 return S390_DECODE_UNIMPLEMENTED_INSN;
13456}
13457
13458/* Handle "special" instructions. */
13459static s390_decode_t
13460s390_decode_special_and_irgen(UChar *bytes)
13461{
13462 s390_decode_t status = S390_DECODE_OK;
13463
13464 /* Got a "Special" instruction preamble. Which one is it? */
13465 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13466 s390_irgen_client_request();
13467 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13468 s390_irgen_guest_NRADDR();
13469 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13470 s390_irgen_call_noredir();
13471 } else {
13472 /* We don't know what it is. */
13473 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13474 }
13475
13476 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13477
13478 return status;
13479}
13480
13481
13482/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013483static UInt
sewardj2019a972011-03-07 16:04:07 +000013484s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13485{
13486 s390_decode_t status;
13487
13488 dis_res = dres;
13489
13490 /* Spot the 8-byte preamble: 18ff lr r15,r15
13491 1811 lr r1,r1
13492 1822 lr r2,r2
13493 1833 lr r3,r3 */
13494 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13495 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13496 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13497
13498 /* Handle special instruction that follows that preamble. */
13499 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013500
13501 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13502 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13503
13504 status =
13505 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013506 } else {
13507 /* Handle normal instructions. */
13508 switch (insn_length) {
13509 case 2:
13510 status = s390_decode_2byte_and_irgen(bytes);
13511 break;
13512
13513 case 4:
13514 status = s390_decode_4byte_and_irgen(bytes);
13515 break;
13516
13517 case 6:
13518 status = s390_decode_6byte_and_irgen(bytes);
13519 break;
13520
13521 default:
13522 status = S390_DECODE_ERROR;
13523 break;
13524 }
13525 }
florian5fcbba22011-07-27 20:40:22 +000013526 /* If next instruction is execute, stop here */
florianf9e1ed72012-04-17 02:41:56 +000013527 if (dis_res->whatNext == Dis_Continue && bytes[insn_length] == 0x44) {
13528 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013529 dis_res->whatNext = Dis_StopHere;
florianf9e1ed72012-04-17 02:41:56 +000013530 dis_res->jk_StopHere = Ijk_Boring;
sewardj2019a972011-03-07 16:04:07 +000013531 }
13532
13533 if (status == S390_DECODE_OK) return insn_length; /* OK */
13534
13535 /* Decoding failed somehow */
13536 vex_printf("vex s390->IR: ");
13537 switch (status) {
13538 case S390_DECODE_UNKNOWN_INSN:
13539 vex_printf("unknown insn: ");
13540 break;
13541
13542 case S390_DECODE_UNIMPLEMENTED_INSN:
13543 vex_printf("unimplemented insn: ");
13544 break;
13545
13546 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13547 vex_printf("unimplemented special insn: ");
13548 break;
13549
13550 default:
13551 case S390_DECODE_ERROR:
13552 vex_printf("decoding error: ");
13553 break;
13554 }
13555
13556 vex_printf("%02x%02x", bytes[0], bytes[1]);
13557 if (insn_length > 2) {
13558 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13559 }
13560 if (insn_length > 4) {
13561 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13562 }
13563 vex_printf("\n");
13564
13565 return 0; /* Failed */
13566}
13567
13568
sewardj2019a972011-03-07 16:04:07 +000013569/* Disassemble a single instruction INSN into IR. */
13570static DisResult
florian420c5012011-07-22 02:12:28 +000013571disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013572{
13573 UChar byte;
13574 UInt insn_length;
13575 DisResult dres;
13576
13577 /* ---------------------------------------------------- */
13578 /* --- Compute instruction length -- */
13579 /* ---------------------------------------------------- */
13580
13581 /* Get the first byte of the insn. */
13582 byte = insn[0];
13583
13584 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13585 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13586 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13587
13588 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13589
13590 /* ---------------------------------------------------- */
13591 /* --- Initialise the DisResult data -- */
13592 /* ---------------------------------------------------- */
13593 dres.whatNext = Dis_Continue;
13594 dres.len = insn_length;
13595 dres.continueAt = 0;
florian8844a632012-04-13 04:04:06 +000013596 dres.jk_StopHere = Ijk_INVALID;
sewardj2019a972011-03-07 16:04:07 +000013597
floriana99f20e2011-07-17 14:16:41 +000013598 /* fixs390: consider chasing of conditional jumps */
13599
sewardj2019a972011-03-07 16:04:07 +000013600 /* Normal and special instruction handling starts here. */
13601 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13602 /* All decode failures end up here. The decoder has already issued an
13603 error message.
13604 Tell the dispatcher that this insn cannot be decoded, and so has
florian8844a632012-04-13 04:04:06 +000013605 not been executed, and (is currently) the next to be executed. */
florian65b5b3f2012-04-22 02:51:27 +000013606 put_IA(mkaddr_expr(guest_IA_next_instr));
sewardj2019a972011-03-07 16:04:07 +000013607
florian8844a632012-04-13 04:04:06 +000013608 dres.whatNext = Dis_StopHere;
13609 dres.jk_StopHere = Ijk_NoDecode;
13610 dres.continueAt = 0;
13611 dres.len = 0;
13612 } else {
13613 /* Decode success */
13614 switch (dres.whatNext) {
13615 case Dis_Continue:
florian8559e412012-04-19 14:23:48 +000013616 put_IA(mkaddr_expr(guest_IA_next_instr));
florian8844a632012-04-13 04:04:06 +000013617 break;
13618 case Dis_ResteerU:
13619 case Dis_ResteerC:
13620 put_IA(mkaddr_expr(dres.continueAt));
13621 break;
13622 case Dis_StopHere:
13623 break;
13624 default:
13625 vassert(0);
13626 }
sewardj2019a972011-03-07 16:04:07 +000013627 }
13628
13629 return dres;
13630}
13631
13632
13633/*------------------------------------------------------------*/
13634/*--- Top-level fn ---*/
13635/*------------------------------------------------------------*/
13636
13637/* Disassemble a single instruction into IR. The instruction
13638 is located in host memory at &guest_code[delta]. */
13639
13640DisResult
13641disInstr_S390(IRSB *irsb_IN,
sewardj2019a972011-03-07 16:04:07 +000013642 Bool (*resteerOkFn)(void *, Addr64),
13643 Bool resteerCisOk,
13644 void *callback_opaque,
13645 UChar *guest_code,
13646 Long delta,
13647 Addr64 guest_IP,
13648 VexArch guest_arch,
13649 VexArchInfo *archinfo,
13650 VexAbiInfo *abiinfo,
13651 Bool host_bigendian)
13652{
13653 vassert(guest_arch == VexArchS390X);
13654
13655 /* The instruction decoder requires a big-endian machine. */
13656 vassert(host_bigendian == True);
13657
13658 /* Set globals (see top of this file) */
13659 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013660 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013661 resteer_fn = resteerOkFn;
13662 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013663
florian420c5012011-07-22 02:12:28 +000013664 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013665}
13666
13667/*---------------------------------------------------------------*/
13668/*--- end guest_s390_toIR.c ---*/
13669/*---------------------------------------------------------------*/