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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / e039f16fa42042615cfdfd3ec6a3a23a09f6e589 / . / asoc / sm6150.c
blob: 11bb6115d0ed25ee19eb2ede8501daf1db0e5e9c [file] [log] [blame]
Meng Wang43bbb872018-12-10 12:32:05 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]2/*
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]17#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]24#include <soc/snd_event.h>
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]25#include <soc/qcom/socinfo.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Meng Wang11a25cf2018-10-31 14:11:26 +0800[diff] [blame]30#include <asoc/msm-cdc-pinctrl.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]31#include "codecs/wcd934x/wcd934x.h"
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]32#include "codecs/wcd9335.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]33#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]34#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]35#include "codecs/wsa881x.h"
36#include "codecs/bolero/bolero-cdc.h"
37#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]38#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]39#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40
41#define DRV_NAME "sm6150-asoc-snd"
42
43#define __CHIPSET__ "SM6150 "
44#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
45
46#define SAMPLING_RATE_8KHZ 8000
47#define SAMPLING_RATE_11P025KHZ 11025
48#define SAMPLING_RATE_16KHZ 16000
49#define SAMPLING_RATE_22P05KHZ 22050
50#define SAMPLING_RATE_32KHZ 32000
51#define SAMPLING_RATE_44P1KHZ 44100
52#define SAMPLING_RATE_48KHZ 48000
53#define SAMPLING_RATE_88P2KHZ 88200
54#define SAMPLING_RATE_96KHZ 96000
55#define SAMPLING_RATE_176P4KHZ 176400
56#define SAMPLING_RATE_192KHZ 192000
57#define SAMPLING_RATE_352P8KHZ 352800
58#define SAMPLING_RATE_384KHZ 384000
59
60#define WCD9XXX_MBHC_DEF_BUTTONS 8
61#define WCD9XXX_MBHC_DEF_RLOADS 5
62#define CODEC_EXT_CLK_RATE 9600000
63#define ADSP_STATE_READY_TIMEOUT_MS 3000
64#define DEV_NAME_STR_LEN 32
65
66#define WSA8810_NAME_1 "wsa881x.20170211"
67#define WSA8810_NAME_2 "wsa881x.20170212"
68#define WCN_CDC_SLIM_RX_CH_MAX 2
69#define WCN_CDC_SLIM_TX_CH_MAX 3
70#define TDM_CHANNEL_MAX 8
71
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
74#define MSM_HIFI_ON 1
75
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]76#define SM6150_SOC_VERSION_1_0 0x00010000
77#define SM6150_SOC_MSM_ID 0x163
78
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]79enum {
80 SLIM_RX_0 = 0,
81 SLIM_RX_1,
82 SLIM_RX_2,
83 SLIM_RX_3,
84 SLIM_RX_4,
85 SLIM_RX_5,
86 SLIM_RX_6,
87 SLIM_RX_7,
88 SLIM_RX_MAX,
89};
90enum {
91 SLIM_TX_0 = 0,
92 SLIM_TX_1,
93 SLIM_TX_2,
94 SLIM_TX_3,
95 SLIM_TX_4,
96 SLIM_TX_5,
97 SLIM_TX_6,
98 SLIM_TX_7,
99 SLIM_TX_8,
100 SLIM_TX_MAX,
101};
102
103enum {
104 PRIM_MI2S = 0,
105 SEC_MI2S,
106 TERT_MI2S,
107 QUAT_MI2S,
108 QUIN_MI2S,
109 MI2S_MAX,
110};
111
112enum {
113 PRIM_AUX_PCM = 0,
114 SEC_AUX_PCM,
115 TERT_AUX_PCM,
116 QUAT_AUX_PCM,
117 QUIN_AUX_PCM,
118 AUX_PCM_MAX,
119};
120
121enum {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]122 TDM_0 = 0,
123 TDM_1,
124 TDM_2,
125 TDM_3,
126 TDM_4,
127 TDM_5,
128 TDM_6,
129 TDM_7,
130 TDM_PORT_MAX,
131};
132
133enum {
134 TDM_PRI = 0,
135 TDM_SEC,
136 TDM_TERT,
137 TDM_QUAT,
138 TDM_QUIN,
139 TDM_INTERFACE_MAX,
140};
141
142struct tdm_port {
143 u32 mode;
144 u32 channel;
145};
146
147enum {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]148 WSA_CDC_DMA_RX_0 = 0,
149 WSA_CDC_DMA_RX_1,
150 RX_CDC_DMA_RX_0,
151 RX_CDC_DMA_RX_1,
152 RX_CDC_DMA_RX_2,
153 RX_CDC_DMA_RX_3,
154 RX_CDC_DMA_RX_5,
155 CDC_DMA_RX_MAX,
156};
157
158enum {
159 WSA_CDC_DMA_TX_0 = 0,
160 WSA_CDC_DMA_TX_1,
161 WSA_CDC_DMA_TX_2,
162 TX_CDC_DMA_TX_0,
163 TX_CDC_DMA_TX_3,
164 TX_CDC_DMA_TX_4,
165 CDC_DMA_TX_MAX,
166};
167
168struct mi2s_conf {
169 struct mutex lock;
170 u32 ref_cnt;
171 u32 msm_is_mi2s_master;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]172 u32 msm_is_ext_mclk;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]173};
174
175static u32 mi2s_ebit_clk[MI2S_MAX] = {
176 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
177 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
178 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
179 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
180 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
181};
182
183struct dev_config {
184 u32 sample_rate;
185 u32 bit_format;
186 u32 channels;
187};
188
189enum {
190 DP_RX_IDX = 0,
191 EXT_DISP_RX_IDX_MAX,
192};
193
194struct msm_wsa881x_dev_info {
195 struct device_node *of_node;
196 u32 index;
197};
198
199struct aux_codec_dev_info {
200 struct device_node *of_node;
201 u32 index;
202};
203
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]204struct msm_asoc_mach_data {
205 struct snd_info_entry *codec_root;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]206 int usbc_en2_gpio; /* used by gpio driver API */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]207 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]208 int hph_en1_gpio;
209 int hph_en0_gpio;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]210 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
211 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
212 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
213 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
214 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
215 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]216 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]217 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]218};
219
220struct msm_asoc_wcd93xx_codec {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]221 void* (*get_afe_config_fn)(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]222 enum afe_config_type config_type);
223};
224
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]225static struct snd_soc_card snd_soc_card_sm6150_msm;
226
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]227/* TDM default config */
228static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
229 { /* PRI TDM */
230 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
231 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
232 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
233 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
234 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
235 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
236 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
237 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
238 },
239 { /* SEC TDM */
240 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
241 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
242 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
248 },
249 { /* TERT TDM */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
258 },
259 { /* QUAT TDM */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
268 },
269 { /* QUIN TDM */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
278 }
279
280};
281
282/* TDM default config */
283static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
284 { /* PRI TDM */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
293 },
294 { /* SEC TDM */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
303 },
304 { /* TERT TDM */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
313 },
314 { /* QUAT TDM */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
323 },
324 { /* QUIN TDM */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
333 }
334};
335
336
337/* Default configuration of slimbus channels */
338static struct dev_config slim_rx_cfg[] = {
339 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
340 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
341 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
342 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
343 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
344 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
345 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
346 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
347};
348
349static struct dev_config slim_tx_cfg[] = {
350 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
351 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
352 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
359};
360
361/* Default configuration of Codec DMA Interface Tx */
362static struct dev_config cdc_dma_rx_cfg[] = {
363 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
364 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
365 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
366 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
367 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
368 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
369 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
370};
371
372/* Default configuration of Codec DMA Interface Rx */
373static struct dev_config cdc_dma_tx_cfg[] = {
374 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380};
381
382/* Default configuration of external display BE */
383static struct dev_config ext_disp_rx_cfg[] = {
384 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385};
386
387static struct dev_config usb_rx_cfg = {
388 .sample_rate = SAMPLING_RATE_48KHZ,
389 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
390 .channels = 2,
391};
392
393static struct dev_config usb_tx_cfg = {
394 .sample_rate = SAMPLING_RATE_48KHZ,
395 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
396 .channels = 1,
397};
398
399static struct dev_config proxy_rx_cfg = {
400 .sample_rate = SAMPLING_RATE_48KHZ,
401 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
402 .channels = 2,
403};
404
405/* Default configuration of MI2S channels */
406static struct dev_config mi2s_rx_cfg[] = {
407 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
408 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
409 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
410 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
411 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
412};
413
414static struct dev_config mi2s_tx_cfg[] = {
415 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
416 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
417 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
418 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
419 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
420};
421
422static struct dev_config aux_pcm_rx_cfg[] = {
423 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
424 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
425 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
426 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
427 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
428};
429
430static struct dev_config aux_pcm_tx_cfg[] = {
431 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
436};
437static int msm_vi_feed_tx_ch = 2;
438static const char *const slim_rx_ch_text[] = {"One", "Two"};
439static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
440 "Five", "Six", "Seven",
441 "Eight"};
442static const char *const vi_feed_ch_text[] = {"One", "Two"};
443static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
444 "S32_LE"};
445static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
446 "S24_3LE"};
447static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
448 "KHZ_32", "KHZ_44P1", "KHZ_48",
449 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
450 "KHZ_192", "KHZ_352P8", "KHZ_384"};
451static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
452 "KHZ_44P1", "KHZ_48",
453 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]454static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
455 "KHZ_44P1", "KHZ_48",
456 "KHZ_88P2", "KHZ_96"};
457static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
458 "KHZ_44P1", "KHZ_48",
459 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]460static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
461 "Five", "Six", "Seven",
462 "Eight"};
463static char const *ch_text[] = {"Two", "Three", "Four", "Five",
464 "Six", "Seven", "Eight"};
465static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
466 "KHZ_16", "KHZ_22P05",
467 "KHZ_32", "KHZ_44P1", "KHZ_48",
468 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
469 "KHZ_192", "KHZ_352P8", "KHZ_384"};
470static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
471 "KHZ_192", "KHZ_32", "KHZ_44P1",
472 "KHZ_88P2", "KHZ_176P4" };
473static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
474 "Five", "Six", "Seven", "Eight"};
475static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
476static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
477 "KHZ_48", "KHZ_176P4",
478 "KHZ_352P8"};
479static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
480static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
481 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
482 "KHZ_48", "KHZ_96", "KHZ_192"};
483static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
484 "Five", "Six", "Seven",
485 "Eight"};
486static const char *const hifi_text[] = {"Off", "On"};
487static const char *const qos_text[] = {"Disable", "Enable"};
488
489static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
490static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
491 "Five", "Six", "Seven",
492 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]493static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
494 "KHZ_16", "KHZ_22P05",
495 "KHZ_32", "KHZ_44P1", "KHZ_48",
496 "KHZ_88P2", "KHZ_96",
497 "KHZ_176P4", "KHZ_192",
498 "KHZ_352P8", "KHZ_384"};
499
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]500
501static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
524static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]525static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
526static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]527static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
530 ext_disp_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
535static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
559static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
560static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
568static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
569static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
570static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
571static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
572static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
588static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
589static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
590static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
598 cdc_dma_sample_rate_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
600 cdc_dma_sample_rate_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
602 cdc_dma_sample_rate_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
604 cdc_dma_sample_rate_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
606 cdc_dma_sample_rate_text);
607static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
608 cdc_dma_sample_rate_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
610 cdc_dma_sample_rate_text);
611static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
622 cdc_dma_sample_rate_text);
623
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]624static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]625static bool codec_reg_done;
626static struct snd_soc_aux_dev *msm_aux_dev;
627static struct snd_soc_codec_conf *msm_codec_conf;
628static struct msm_asoc_wcd93xx_codec msm_codec_fn;
629
630static int dmic_0_1_gpio_cnt;
631static int dmic_2_3_gpio_cnt;
632
633static void *def_wcd_mbhc_cal(void);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]634static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]635 int enable, bool dapm);
636static int msm_wsa881x_init(struct snd_soc_component *component);
637static int msm_aux_codec_init(struct snd_soc_component *component);
638
639/*
640 * Need to report LINEIN
641 * if R/L channel impedance is larger than 5K ohm
642 */
643static struct wcd_mbhc_config wcd_mbhc_cfg = {
644 .read_fw_bin = false,
645 .calibration = NULL,
646 .detect_extn_cable = true,
647 .mono_stero_detection = false,
648 .swap_gnd_mic = NULL,
649 .hs_ext_micbias = true,
650 .key_code[0] = KEY_MEDIA,
651 .key_code[1] = KEY_VOICECOMMAND,
652 .key_code[2] = KEY_VOLUMEUP,
653 .key_code[3] = KEY_VOLUMEDOWN,
654 .key_code[4] = 0,
655 .key_code[5] = 0,
656 .key_code[6] = 0,
657 .key_code[7] = 0,
658 .linein_th = 5000,
Vatsal Bucha3c7524b2019-01-11 14:51:52 +0530[diff] [blame]659 .moisture_en = false,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]660 .mbhc_micbias = MIC_BIAS_2,
661 .anc_micbias = MIC_BIAS_2,
662 .enable_anc_mic_detect = false,
Vatsal Bucha3c7524b2019-01-11 14:51:52 +0530[diff] [blame]663 .moisture_duty_cycle_en = true,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]664};
665
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]666static struct snd_soc_dapm_route wcd_audio_paths[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]667 {"MIC BIAS1", NULL, "MCLK TX"},
668 {"MIC BIAS2", NULL, "MCLK TX"},
669 {"MIC BIAS3", NULL, "MCLK TX"},
670 {"MIC BIAS4", NULL, "MCLK TX"},
671};
672
673static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
674 {
675 AFE_API_VERSION_I2S_CONFIG,
676 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
677 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
678 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
679 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
680 0,
681 },
682 {
683 AFE_API_VERSION_I2S_CONFIG,
684 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
685 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
686 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
687 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
688 0,
689 },
690 {
691 AFE_API_VERSION_I2S_CONFIG,
692 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
693 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
694 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
695 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
696 0,
697 },
698 {
699 AFE_API_VERSION_I2S_CONFIG,
700 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
701 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
702 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
703 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
704 0,
705 },
706 {
707 AFE_API_VERSION_I2S_CONFIG,
708 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
709 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
710 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
711 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
712 0,
713 }
714
715};
716
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]717static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
718 {
719 AFE_API_VERSION_I2S_CONFIG,
720 Q6AFE_LPASS_CLK_ID_MCLK_3,
721 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
722 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
723 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
724 0,
725 },
726 {
727 AFE_API_VERSION_I2S_CONFIG,
728 Q6AFE_LPASS_CLK_ID_MCLK_2,
729 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
730 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
731 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
732 0,
733 },
734 {
735 AFE_API_VERSION_I2S_CONFIG,
736 Q6AFE_LPASS_CLK_ID_MCLK_1,
737 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
738 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
739 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
740 0,
741 },
742 {
743 AFE_API_VERSION_I2S_CONFIG,
744 Q6AFE_LPASS_CLK_ID_MCLK_1,
745 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
746 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
747 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
748 0,
749 },
750 {
751 AFE_API_VERSION_I2S_CONFIG,
752 Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
753 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
754 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
755 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
756 0,
757 }
758};
759
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]760static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
761
762static int slim_get_sample_rate_val(int sample_rate)
763{
764 int sample_rate_val = 0;
765
766 switch (sample_rate) {
767 case SAMPLING_RATE_8KHZ:
768 sample_rate_val = 0;
769 break;
770 case SAMPLING_RATE_16KHZ:
771 sample_rate_val = 1;
772 break;
773 case SAMPLING_RATE_32KHZ:
774 sample_rate_val = 2;
775 break;
776 case SAMPLING_RATE_44P1KHZ:
777 sample_rate_val = 3;
778 break;
779 case SAMPLING_RATE_48KHZ:
780 sample_rate_val = 4;
781 break;
782 case SAMPLING_RATE_88P2KHZ:
783 sample_rate_val = 5;
784 break;
785 case SAMPLING_RATE_96KHZ:
786 sample_rate_val = 6;
787 break;
788 case SAMPLING_RATE_176P4KHZ:
789 sample_rate_val = 7;
790 break;
791 case SAMPLING_RATE_192KHZ:
792 sample_rate_val = 8;
793 break;
794 case SAMPLING_RATE_352P8KHZ:
795 sample_rate_val = 9;
796 break;
797 case SAMPLING_RATE_384KHZ:
798 sample_rate_val = 10;
799 break;
800 default:
801 sample_rate_val = 4;
802 break;
803 }
804 return sample_rate_val;
805}
806
807static int slim_get_sample_rate(int value)
808{
809 int sample_rate = 0;
810
811 switch (value) {
812 case 0:
813 sample_rate = SAMPLING_RATE_8KHZ;
814 break;
815 case 1:
816 sample_rate = SAMPLING_RATE_16KHZ;
817 break;
818 case 2:
819 sample_rate = SAMPLING_RATE_32KHZ;
820 break;
821 case 3:
822 sample_rate = SAMPLING_RATE_44P1KHZ;
823 break;
824 case 4:
825 sample_rate = SAMPLING_RATE_48KHZ;
826 break;
827 case 5:
828 sample_rate = SAMPLING_RATE_88P2KHZ;
829 break;
830 case 6:
831 sample_rate = SAMPLING_RATE_96KHZ;
832 break;
833 case 7:
834 sample_rate = SAMPLING_RATE_176P4KHZ;
835 break;
836 case 8:
837 sample_rate = SAMPLING_RATE_192KHZ;
838 break;
839 case 9:
840 sample_rate = SAMPLING_RATE_352P8KHZ;
841 break;
842 case 10:
843 sample_rate = SAMPLING_RATE_384KHZ;
844 break;
845 default:
846 sample_rate = SAMPLING_RATE_48KHZ;
847 break;
848 }
849 return sample_rate;
850}
851
852static int slim_get_bit_format_val(int bit_format)
853{
854 int val = 0;
855
856 switch (bit_format) {
857 case SNDRV_PCM_FORMAT_S32_LE:
858 val = 3;
859 break;
860 case SNDRV_PCM_FORMAT_S24_3LE:
861 val = 2;
862 break;
863 case SNDRV_PCM_FORMAT_S24_LE:
864 val = 1;
865 break;
866 case SNDRV_PCM_FORMAT_S16_LE:
867 default:
868 val = 0;
869 break;
870 }
871 return val;
872}
873
874static int slim_get_bit_format(int val)
875{
876 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
877
878 switch (val) {
879 case 0:
880 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
881 break;
882 case 1:
883 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
884 break;
885 case 2:
886 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
887 break;
888 case 3:
889 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
890 break;
891 default:
892 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
893 break;
894 }
895 return bit_fmt;
896}
897
898static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
899{
900 int port_id = 0;
901
902 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
903 port_id = SLIM_RX_0;
904 } else if (strnstr(kcontrol->id.name,
905 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
906 port_id = SLIM_RX_2;
907 } else if (strnstr(kcontrol->id.name,
908 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
909 port_id = SLIM_RX_5;
910 } else if (strnstr(kcontrol->id.name,
911 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
912 port_id = SLIM_RX_6;
913 } else if (strnstr(kcontrol->id.name,
914 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
915 port_id = SLIM_TX_0;
916 } else if (strnstr(kcontrol->id.name,
917 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
918 port_id = SLIM_TX_1;
919 } else {
920 pr_err("%s: unsupported channel: %s\n",
921 __func__, kcontrol->id.name);
922 return -EINVAL;
923 }
924
925 return port_id;
926}
927
928static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int ch_num = slim_get_port_idx(kcontrol);
932
933 if (ch_num < 0)
934 return ch_num;
935
936 ucontrol->value.enumerated.item[0] =
937 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
938
939 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
940 ch_num, slim_rx_cfg[ch_num].sample_rate,
941 ucontrol->value.enumerated.item[0]);
942
943 return 0;
944}
945
946static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 int ch_num = slim_get_port_idx(kcontrol);
950
951 if (ch_num < 0)
952 return ch_num;
953
954 slim_rx_cfg[ch_num].sample_rate =
955 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
956
957 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
958 ch_num, slim_rx_cfg[ch_num].sample_rate,
959 ucontrol->value.enumerated.item[0]);
960
961 return 0;
962}
963
964static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
965 struct snd_ctl_elem_value *ucontrol)
966{
967 int ch_num = slim_get_port_idx(kcontrol);
968
969 if (ch_num < 0)
970 return ch_num;
971
972 ucontrol->value.enumerated.item[0] =
973 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
974
975 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
976 ch_num, slim_tx_cfg[ch_num].sample_rate,
977 ucontrol->value.enumerated.item[0]);
978
979 return 0;
980}
981
982static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
983 struct snd_ctl_elem_value *ucontrol)
984{
985 int sample_rate = 0;
986 int ch_num = slim_get_port_idx(kcontrol);
987
988 if (ch_num < 0)
989 return ch_num;
990
991 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
992 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
993 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
994 __func__, sample_rate);
995 return -EINVAL;
996 }
997 slim_tx_cfg[ch_num].sample_rate = sample_rate;
998
999 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
1000 ch_num, slim_tx_cfg[ch_num].sample_rate,
1001 ucontrol->value.enumerated.item[0]);
1002
1003 return 0;
1004}
1005
1006static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 int ch_num = slim_get_port_idx(kcontrol);
1010
1011 if (ch_num < 0)
1012 return ch_num;
1013
1014 ucontrol->value.enumerated.item[0] =
1015 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
1016
1017 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1018 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1019 ucontrol->value.enumerated.item[0]);
1020
1021 return 0;
1022}
1023
1024static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 int ch_num = slim_get_port_idx(kcontrol);
1028
1029 if (ch_num < 0)
1030 return ch_num;
1031
1032 slim_rx_cfg[ch_num].bit_format =
1033 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1034
1035 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1036 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1037 ucontrol->value.enumerated.item[0]);
1038
1039 return 0;
1040}
1041
1042static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044{
1045 int ch_num = slim_get_port_idx(kcontrol);
1046
1047 if (ch_num < 0)
1048 return ch_num;
1049
1050 ucontrol->value.enumerated.item[0] =
1051 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1052
1053 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1054 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1055 ucontrol->value.enumerated.item[0]);
1056
1057 return 0;
1058}
1059
1060static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1061 struct snd_ctl_elem_value *ucontrol)
1062{
1063 int ch_num = slim_get_port_idx(kcontrol);
1064
1065 if (ch_num < 0)
1066 return ch_num;
1067
1068 slim_tx_cfg[ch_num].bit_format =
1069 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1070
1071 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1072 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1073 ucontrol->value.enumerated.item[0]);
1074
1075 return 0;
1076}
1077
1078static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 int ch_num = slim_get_port_idx(kcontrol);
1082
1083 if (ch_num < 0)
1084 return ch_num;
1085
1086 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1087 ch_num, slim_rx_cfg[ch_num].channels);
1088 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1089
1090 return 0;
1091}
1092
1093static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1095{
1096 int ch_num = slim_get_port_idx(kcontrol);
1097
1098 if (ch_num < 0)
1099 return ch_num;
1100
1101 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1102 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1103 ch_num, slim_rx_cfg[ch_num].channels);
1104
1105 return 1;
1106}
1107
1108static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1109 struct snd_ctl_elem_value *ucontrol)
1110{
1111 int ch_num = slim_get_port_idx(kcontrol);
1112
1113 if (ch_num < 0)
1114 return ch_num;
1115
1116 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1117 ch_num, slim_tx_cfg[ch_num].channels);
1118 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1119
1120 return 0;
1121}
1122
1123static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125{
1126 int ch_num = slim_get_port_idx(kcontrol);
1127
1128 if (ch_num < 0)
1129 return ch_num;
1130
1131 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1132 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1133 ch_num, slim_tx_cfg[ch_num].channels);
1134
1135 return 1;
1136}
1137
1138static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1139 struct snd_ctl_elem_value *ucontrol)
1140{
1141 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1142 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1143 ucontrol->value.integer.value[0]);
1144 return 0;
1145}
1146
1147static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_value *ucontrol)
1149{
1150 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1151
1152 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1153 return 1;
1154}
1155
1156static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1157 struct snd_ctl_elem_value *ucontrol)
1158{
1159 /*
1160 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1161 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1162 * value.
1163 */
1164 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1165 case SAMPLING_RATE_96KHZ:
1166 ucontrol->value.integer.value[0] = 5;
1167 break;
1168 case SAMPLING_RATE_88P2KHZ:
1169 ucontrol->value.integer.value[0] = 4;
1170 break;
1171 case SAMPLING_RATE_48KHZ:
1172 ucontrol->value.integer.value[0] = 3;
1173 break;
1174 case SAMPLING_RATE_44P1KHZ:
1175 ucontrol->value.integer.value[0] = 2;
1176 break;
1177 case SAMPLING_RATE_16KHZ:
1178 ucontrol->value.integer.value[0] = 1;
1179 break;
1180 case SAMPLING_RATE_8KHZ:
1181 default:
1182 ucontrol->value.integer.value[0] = 0;
1183 break;
1184 }
1185 pr_debug("%s: sample rate = %d\n", __func__,
1186 slim_rx_cfg[SLIM_RX_7].sample_rate);
1187
1188 return 0;
1189}
1190
1191static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1192 struct snd_ctl_elem_value *ucontrol)
1193{
1194 switch (ucontrol->value.integer.value[0]) {
1195 case 1:
1196 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1197 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1198 break;
1199 case 2:
1200 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1201 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1202 break;
1203 case 3:
1204 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1205 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1206 break;
1207 case 4:
1208 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1209 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1210 break;
1211 case 5:
1212 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1213 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1214 break;
1215 case 0:
1216 default:
1217 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1218 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1219 break;
1220 }
1221 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1222 __func__,
1223 slim_rx_cfg[SLIM_RX_7].sample_rate,
1224 slim_tx_cfg[SLIM_TX_7].sample_rate,
1225 ucontrol->value.enumerated.item[0]);
1226
1227 return 0;
1228}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1229static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1230 struct snd_ctl_elem_value *ucontrol)
1231{
1232 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1233 case SAMPLING_RATE_96KHZ:
1234 ucontrol->value.integer.value[0] = 5;
1235 break;
1236 case SAMPLING_RATE_88P2KHZ:
1237 ucontrol->value.integer.value[0] = 4;
1238 break;
1239 case SAMPLING_RATE_48KHZ:
1240 ucontrol->value.integer.value[0] = 3;
1241 break;
1242 case SAMPLING_RATE_44P1KHZ:
1243 ucontrol->value.integer.value[0] = 2;
1244 break;
1245 case SAMPLING_RATE_16KHZ:
1246 ucontrol->value.integer.value[0] = 1;
1247 break;
1248 case SAMPLING_RATE_8KHZ:
1249 default:
1250 ucontrol->value.integer.value[0] = 0;
1251 break;
1252 }
1253 pr_debug("%s: sample rate rx = %d", __func__,
1254 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1255
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1256 return 0;
1257}
1258
1259static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1260 struct snd_ctl_elem_value *ucontrol)
1261{
1262 switch (ucontrol->value.integer.value[0]) {
1263 case 1:
1264 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1265 break;
1266 case 2:
1267 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1268 break;
1269 case 3:
1270 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1271 break;
1272 case 4:
1273 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1274 break;
1275 case 5:
1276 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1277 break;
1278 case 0:
1279 default:
1280 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1281 break;
1282 }
1283 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1284 __func__,
1285 slim_rx_cfg[SLIM_RX_7].sample_rate,
1286 ucontrol->value.enumerated.item[0]);
1287
1288 return 0;
1289}
1290
1291static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1292 struct snd_ctl_elem_value *ucontrol)
1293{
1294 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1295 case SAMPLING_RATE_96KHZ:
1296 ucontrol->value.integer.value[0] = 5;
1297 break;
1298 case SAMPLING_RATE_88P2KHZ:
1299 ucontrol->value.integer.value[0] = 4;
1300 break;
1301 case SAMPLING_RATE_48KHZ:
1302 ucontrol->value.integer.value[0] = 3;
1303 break;
1304 case SAMPLING_RATE_44P1KHZ:
1305 ucontrol->value.integer.value[0] = 2;
1306 break;
1307 case SAMPLING_RATE_16KHZ:
1308 ucontrol->value.integer.value[0] = 1;
1309 break;
1310 case SAMPLING_RATE_8KHZ:
1311 default:
1312 ucontrol->value.integer.value[0] = 0;
1313 break;
1314 }
1315 pr_debug("%s: sample rate tx = %d", __func__,
1316 slim_tx_cfg[SLIM_TX_7].sample_rate);
1317
1318 return 0;
1319}
1320
1321static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1322 struct snd_ctl_elem_value *ucontrol)
1323{
1324 switch (ucontrol->value.integer.value[0]) {
1325 case 1:
1326 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1327 break;
1328 case 2:
1329 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1330 break;
1331 case 3:
1332 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1333 break;
1334 case 4:
1335 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1336 break;
1337 case 5:
1338 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1339 break;
1340 case 0:
1341 default:
1342 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1343 break;
1344 }
1345 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1346 __func__,
1347 slim_tx_cfg[SLIM_TX_7].sample_rate,
1348 ucontrol->value.enumerated.item[0]);
1349
1350 return 0;
1351}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1352static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1353{
1354 int idx = 0;
1355
1356 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1357 sizeof("WSA_CDC_DMA_RX_0")))
1358 idx = WSA_CDC_DMA_RX_0;
1359 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1360 sizeof("WSA_CDC_DMA_RX_0")))
1361 idx = WSA_CDC_DMA_RX_1;
1362 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1363 sizeof("RX_CDC_DMA_RX_0")))
1364 idx = RX_CDC_DMA_RX_0;
1365 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1366 sizeof("RX_CDC_DMA_RX_1")))
1367 idx = RX_CDC_DMA_RX_1;
1368 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1369 sizeof("RX_CDC_DMA_RX_2")))
1370 idx = RX_CDC_DMA_RX_2;
1371 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1372 sizeof("RX_CDC_DMA_RX_3")))
1373 idx = RX_CDC_DMA_RX_3;
1374 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1375 sizeof("RX_CDC_DMA_RX_5")))
1376 idx = RX_CDC_DMA_RX_5;
1377 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1378 sizeof("WSA_CDC_DMA_TX_0")))
1379 idx = WSA_CDC_DMA_TX_0;
1380 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1381 sizeof("WSA_CDC_DMA_TX_1")))
1382 idx = WSA_CDC_DMA_TX_1;
1383 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1384 sizeof("WSA_CDC_DMA_TX_2")))
1385 idx = WSA_CDC_DMA_TX_2;
1386 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1387 sizeof("TX_CDC_DMA_TX_0")))
1388 idx = TX_CDC_DMA_TX_0;
1389 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1390 sizeof("TX_CDC_DMA_TX_3")))
1391 idx = TX_CDC_DMA_TX_3;
1392 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1393 sizeof("TX_CDC_DMA_TX_4")))
1394 idx = TX_CDC_DMA_TX_4;
1395 else {
1396 pr_err("%s: unsupported channel: %s\n",
1397 __func__, kcontrol->id.name);
1398 return -EINVAL;
1399 }
1400
1401 return idx;
1402}
1403
1404static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 int ch_num = cdc_dma_get_port_idx(kcontrol);
1408
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1409 if (ch_num < 0) {
1410 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1411 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1412 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1413
1414 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1415 cdc_dma_rx_cfg[ch_num].channels - 1);
1416 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1417 return 0;
1418}
1419
1420static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1421 struct snd_ctl_elem_value *ucontrol)
1422{
1423 int ch_num = cdc_dma_get_port_idx(kcontrol);
1424
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1425 if (ch_num < 0) {
1426 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1427 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1428 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1429
1430 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1431
1432 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1433 cdc_dma_rx_cfg[ch_num].channels);
1434 return 1;
1435}
1436
1437static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1438 struct snd_ctl_elem_value *ucontrol)
1439{
1440 int ch_num = cdc_dma_get_port_idx(kcontrol);
1441
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1442 if (ch_num < 0) {
1443 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1444 return ch_num;
1445 }
1446
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1447 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1448 case SNDRV_PCM_FORMAT_S32_LE:
1449 ucontrol->value.integer.value[0] = 3;
1450 break;
1451 case SNDRV_PCM_FORMAT_S24_3LE:
1452 ucontrol->value.integer.value[0] = 2;
1453 break;
1454 case SNDRV_PCM_FORMAT_S24_LE:
1455 ucontrol->value.integer.value[0] = 1;
1456 break;
1457 case SNDRV_PCM_FORMAT_S16_LE:
1458 default:
1459 ucontrol->value.integer.value[0] = 0;
1460 break;
1461 }
1462
1463 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1464 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1465 ucontrol->value.integer.value[0]);
1466 return 0;
1467}
1468
1469static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1470 struct snd_ctl_elem_value *ucontrol)
1471{
1472 int rc = 0;
1473 int ch_num = cdc_dma_get_port_idx(kcontrol);
1474
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1475 if (ch_num < 0) {
1476 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1477 return ch_num;
1478 }
1479
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1480 switch (ucontrol->value.integer.value[0]) {
1481 case 3:
1482 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1483 break;
1484 case 2:
1485 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1486 break;
1487 case 1:
1488 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1489 break;
1490 case 0:
1491 default:
1492 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1493 break;
1494 }
1495 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1496 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1497 ucontrol->value.integer.value[0]);
1498
1499 return rc;
1500}
1501
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1502
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1503static int cdc_dma_get_sample_rate_val(int sample_rate)
1504{
1505 int sample_rate_val = 0;
1506
1507 switch (sample_rate) {
1508 case SAMPLING_RATE_8KHZ:
1509 sample_rate_val = 0;
1510 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1511 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1512 sample_rate_val = 1;
1513 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1514 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1515 sample_rate_val = 2;
1516 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1517 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1518 sample_rate_val = 3;
1519 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1520 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1521 sample_rate_val = 4;
1522 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1523 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1524 sample_rate_val = 5;
1525 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1526 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1527 sample_rate_val = 6;
1528 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1529 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1530 sample_rate_val = 7;
1531 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1532 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1533 sample_rate_val = 8;
1534 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1535 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1536 sample_rate_val = 9;
1537 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1538 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1539 sample_rate_val = 10;
1540 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1541 case SAMPLING_RATE_352P8KHZ:
1542 sample_rate_val = 11;
1543 break;
1544 case SAMPLING_RATE_384KHZ:
1545 sample_rate_val = 12;
1546 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1547 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1548 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1549 break;
1550 }
1551 return sample_rate_val;
1552}
1553
1554static int cdc_dma_get_sample_rate(int value)
1555{
1556 int sample_rate = 0;
1557
1558 switch (value) {
1559 case 0:
1560 sample_rate = SAMPLING_RATE_8KHZ;
1561 break;
1562 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1563 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1564 break;
1565 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1566 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1567 break;
1568 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1569 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1570 break;
1571 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1572 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1573 break;
1574 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1575 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1576 break;
1577 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1578 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1579 break;
1580 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1581 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1582 break;
1583 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1584 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1585 break;
1586 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1587 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1588 break;
1589 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1590 sample_rate = SAMPLING_RATE_192KHZ;
1591 break;
1592 case 11:
1593 sample_rate = SAMPLING_RATE_352P8KHZ;
1594 break;
1595 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1596 sample_rate = SAMPLING_RATE_384KHZ;
1597 break;
1598 default:
1599 sample_rate = SAMPLING_RATE_48KHZ;
1600 break;
1601 }
1602 return sample_rate;
1603}
1604
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1605static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1606 struct snd_ctl_elem_value *ucontrol)
1607{
1608 int ch_num = cdc_dma_get_port_idx(kcontrol);
1609
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1610 if (ch_num < 0) {
1611 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1612 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1613 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1614
1615 ucontrol->value.enumerated.item[0] =
1616 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1617
1618 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1619 cdc_dma_rx_cfg[ch_num].sample_rate);
1620 return 0;
1621}
1622
1623static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1624 struct snd_ctl_elem_value *ucontrol)
1625{
1626 int ch_num = cdc_dma_get_port_idx(kcontrol);
1627
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1628 if (ch_num < 0) {
1629 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1630 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1631 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1632
1633 cdc_dma_rx_cfg[ch_num].sample_rate =
1634 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1635
1636
1637 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1638 __func__, ucontrol->value.enumerated.item[0],
1639 cdc_dma_rx_cfg[ch_num].sample_rate);
1640 return 0;
1641}
1642
1643static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1644 struct snd_ctl_elem_value *ucontrol)
1645{
1646 int ch_num = cdc_dma_get_port_idx(kcontrol);
1647
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1648 if (ch_num < 0) {
1649 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1650 return ch_num;
1651 }
1652
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1653 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1654 cdc_dma_tx_cfg[ch_num].channels);
1655 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1656 return 0;
1657}
1658
1659static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1660 struct snd_ctl_elem_value *ucontrol)
1661{
1662 int ch_num = cdc_dma_get_port_idx(kcontrol);
1663
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1664 if (ch_num < 0) {
1665 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1666 return ch_num;
1667 }
1668
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1669 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1670
1671 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1672 cdc_dma_tx_cfg[ch_num].channels);
1673 return 1;
1674}
1675
1676static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1678{
1679 int sample_rate_val;
1680 int ch_num = cdc_dma_get_port_idx(kcontrol);
1681
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1682 if (ch_num < 0) {
1683 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1684 return ch_num;
1685 }
1686
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1687 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1688 case SAMPLING_RATE_384KHZ:
1689 sample_rate_val = 12;
1690 break;
1691 case SAMPLING_RATE_352P8KHZ:
1692 sample_rate_val = 11;
1693 break;
1694 case SAMPLING_RATE_192KHZ:
1695 sample_rate_val = 10;
1696 break;
1697 case SAMPLING_RATE_176P4KHZ:
1698 sample_rate_val = 9;
1699 break;
1700 case SAMPLING_RATE_96KHZ:
1701 sample_rate_val = 8;
1702 break;
1703 case SAMPLING_RATE_88P2KHZ:
1704 sample_rate_val = 7;
1705 break;
1706 case SAMPLING_RATE_48KHZ:
1707 sample_rate_val = 6;
1708 break;
1709 case SAMPLING_RATE_44P1KHZ:
1710 sample_rate_val = 5;
1711 break;
1712 case SAMPLING_RATE_32KHZ:
1713 sample_rate_val = 4;
1714 break;
1715 case SAMPLING_RATE_22P05KHZ:
1716 sample_rate_val = 3;
1717 break;
1718 case SAMPLING_RATE_16KHZ:
1719 sample_rate_val = 2;
1720 break;
1721 case SAMPLING_RATE_11P025KHZ:
1722 sample_rate_val = 1;
1723 break;
1724 case SAMPLING_RATE_8KHZ:
1725 sample_rate_val = 0;
1726 break;
1727 default:
1728 sample_rate_val = 6;
1729 break;
1730 }
1731
1732 ucontrol->value.integer.value[0] = sample_rate_val;
1733 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1734 cdc_dma_tx_cfg[ch_num].sample_rate);
1735 return 0;
1736}
1737
1738static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1739 struct snd_ctl_elem_value *ucontrol)
1740{
1741 int ch_num = cdc_dma_get_port_idx(kcontrol);
1742
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1743 if (ch_num < 0) {
1744 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1745 return ch_num;
1746 }
1747
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1748 switch (ucontrol->value.integer.value[0]) {
1749 case 12:
1750 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1751 break;
1752 case 11:
1753 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1754 break;
1755 case 10:
1756 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1757 break;
1758 case 9:
1759 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1760 break;
1761 case 8:
1762 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1763 break;
1764 case 7:
1765 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1766 break;
1767 case 6:
1768 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1769 break;
1770 case 5:
1771 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1772 break;
1773 case 4:
1774 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1775 break;
1776 case 3:
1777 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1778 break;
1779 case 2:
1780 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1781 break;
1782 case 1:
1783 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1784 break;
1785 case 0:
1786 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1787 break;
1788 default:
1789 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1790 break;
1791 }
1792
1793 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1794 __func__, ucontrol->value.integer.value[0],
1795 cdc_dma_tx_cfg[ch_num].sample_rate);
1796 return 0;
1797}
1798
1799static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1800 struct snd_ctl_elem_value *ucontrol)
1801{
1802 int ch_num = cdc_dma_get_port_idx(kcontrol);
1803
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1804 if (ch_num < 0) {
1805 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1806 return ch_num;
1807 }
1808
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1809 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1810 case SNDRV_PCM_FORMAT_S32_LE:
1811 ucontrol->value.integer.value[0] = 3;
1812 break;
1813 case SNDRV_PCM_FORMAT_S24_3LE:
1814 ucontrol->value.integer.value[0] = 2;
1815 break;
1816 case SNDRV_PCM_FORMAT_S24_LE:
1817 ucontrol->value.integer.value[0] = 1;
1818 break;
1819 case SNDRV_PCM_FORMAT_S16_LE:
1820 default:
1821 ucontrol->value.integer.value[0] = 0;
1822 break;
1823 }
1824
1825 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1826 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1827 ucontrol->value.integer.value[0]);
1828 return 0;
1829}
1830
1831static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1832 struct snd_ctl_elem_value *ucontrol)
1833{
1834 int rc = 0;
1835 int ch_num = cdc_dma_get_port_idx(kcontrol);
1836
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1837 if (ch_num < 0) {
1838 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1839 return ch_num;
1840 }
1841
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1842 switch (ucontrol->value.integer.value[0]) {
1843 case 3:
1844 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1845 break;
1846 case 2:
1847 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1848 break;
1849 case 1:
1850 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1851 break;
1852 case 0:
1853 default:
1854 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1855 break;
1856 }
1857 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1858 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1859 ucontrol->value.integer.value[0]);
1860
1861 return rc;
1862}
1863
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1864static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866{
1867 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1868 usb_rx_cfg.channels);
1869 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1870 return 0;
1871}
1872
1873static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1874 struct snd_ctl_elem_value *ucontrol)
1875{
1876 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1877
1878 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1879 return 1;
1880}
1881
1882static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1883 struct snd_ctl_elem_value *ucontrol)
1884{
1885 int sample_rate_val;
1886
1887 switch (usb_rx_cfg.sample_rate) {
1888 case SAMPLING_RATE_384KHZ:
1889 sample_rate_val = 12;
1890 break;
1891 case SAMPLING_RATE_352P8KHZ:
1892 sample_rate_val = 11;
1893 break;
1894 case SAMPLING_RATE_192KHZ:
1895 sample_rate_val = 10;
1896 break;
1897 case SAMPLING_RATE_176P4KHZ:
1898 sample_rate_val = 9;
1899 break;
1900 case SAMPLING_RATE_96KHZ:
1901 sample_rate_val = 8;
1902 break;
1903 case SAMPLING_RATE_88P2KHZ:
1904 sample_rate_val = 7;
1905 break;
1906 case SAMPLING_RATE_48KHZ:
1907 sample_rate_val = 6;
1908 break;
1909 case SAMPLING_RATE_44P1KHZ:
1910 sample_rate_val = 5;
1911 break;
1912 case SAMPLING_RATE_32KHZ:
1913 sample_rate_val = 4;
1914 break;
1915 case SAMPLING_RATE_22P05KHZ:
1916 sample_rate_val = 3;
1917 break;
1918 case SAMPLING_RATE_16KHZ:
1919 sample_rate_val = 2;
1920 break;
1921 case SAMPLING_RATE_11P025KHZ:
1922 sample_rate_val = 1;
1923 break;
1924 case SAMPLING_RATE_8KHZ:
1925 default:
1926 sample_rate_val = 0;
1927 break;
1928 }
1929
1930 ucontrol->value.integer.value[0] = sample_rate_val;
1931 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1932 usb_rx_cfg.sample_rate);
1933 return 0;
1934}
1935
1936static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1937 struct snd_ctl_elem_value *ucontrol)
1938{
1939 switch (ucontrol->value.integer.value[0]) {
1940 case 12:
1941 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1942 break;
1943 case 11:
1944 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1945 break;
1946 case 10:
1947 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1948 break;
1949 case 9:
1950 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1951 break;
1952 case 8:
1953 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1954 break;
1955 case 7:
1956 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1957 break;
1958 case 6:
1959 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1960 break;
1961 case 5:
1962 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1963 break;
1964 case 4:
1965 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1966 break;
1967 case 3:
1968 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1969 break;
1970 case 2:
1971 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1972 break;
1973 case 1:
1974 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1975 break;
1976 case 0:
1977 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1978 break;
1979 default:
1980 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1981 break;
1982 }
1983
1984 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1985 __func__, ucontrol->value.integer.value[0],
1986 usb_rx_cfg.sample_rate);
1987 return 0;
1988}
1989
1990static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1991 struct snd_ctl_elem_value *ucontrol)
1992{
1993 switch (usb_rx_cfg.bit_format) {
1994 case SNDRV_PCM_FORMAT_S32_LE:
1995 ucontrol->value.integer.value[0] = 3;
1996 break;
1997 case SNDRV_PCM_FORMAT_S24_3LE:
1998 ucontrol->value.integer.value[0] = 2;
1999 break;
2000 case SNDRV_PCM_FORMAT_S24_LE:
2001 ucontrol->value.integer.value[0] = 1;
2002 break;
2003 case SNDRV_PCM_FORMAT_S16_LE:
2004 default:
2005 ucontrol->value.integer.value[0] = 0;
2006 break;
2007 }
2008
2009 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2010 __func__, usb_rx_cfg.bit_format,
2011 ucontrol->value.integer.value[0]);
2012 return 0;
2013}
2014
2015static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
2016 struct snd_ctl_elem_value *ucontrol)
2017{
2018 int rc = 0;
2019
2020 switch (ucontrol->value.integer.value[0]) {
2021 case 3:
2022 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2023 break;
2024 case 2:
2025 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2026 break;
2027 case 1:
2028 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2029 break;
2030 case 0:
2031 default:
2032 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2033 break;
2034 }
2035 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2036 __func__, usb_rx_cfg.bit_format,
2037 ucontrol->value.integer.value[0]);
2038
2039 return rc;
2040}
2041
2042static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2043 struct snd_ctl_elem_value *ucontrol)
2044{
2045 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2046 usb_tx_cfg.channels);
2047 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2048 return 0;
2049}
2050
2051static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2052 struct snd_ctl_elem_value *ucontrol)
2053{
2054 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2055
2056 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2057 return 1;
2058}
2059
2060static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2061 struct snd_ctl_elem_value *ucontrol)
2062{
2063 int sample_rate_val;
2064
2065 switch (usb_tx_cfg.sample_rate) {
2066 case SAMPLING_RATE_384KHZ:
2067 sample_rate_val = 12;
2068 break;
2069 case SAMPLING_RATE_352P8KHZ:
2070 sample_rate_val = 11;
2071 break;
2072 case SAMPLING_RATE_192KHZ:
2073 sample_rate_val = 10;
2074 break;
2075 case SAMPLING_RATE_176P4KHZ:
2076 sample_rate_val = 9;
2077 break;
2078 case SAMPLING_RATE_96KHZ:
2079 sample_rate_val = 8;
2080 break;
2081 case SAMPLING_RATE_88P2KHZ:
2082 sample_rate_val = 7;
2083 break;
2084 case SAMPLING_RATE_48KHZ:
2085 sample_rate_val = 6;
2086 break;
2087 case SAMPLING_RATE_44P1KHZ:
2088 sample_rate_val = 5;
2089 break;
2090 case SAMPLING_RATE_32KHZ:
2091 sample_rate_val = 4;
2092 break;
2093 case SAMPLING_RATE_22P05KHZ:
2094 sample_rate_val = 3;
2095 break;
2096 case SAMPLING_RATE_16KHZ:
2097 sample_rate_val = 2;
2098 break;
2099 case SAMPLING_RATE_11P025KHZ:
2100 sample_rate_val = 1;
2101 break;
2102 case SAMPLING_RATE_8KHZ:
2103 sample_rate_val = 0;
2104 break;
2105 default:
2106 sample_rate_val = 6;
2107 break;
2108 }
2109
2110 ucontrol->value.integer.value[0] = sample_rate_val;
2111 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2112 usb_tx_cfg.sample_rate);
2113 return 0;
2114}
2115
2116static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2117 struct snd_ctl_elem_value *ucontrol)
2118{
2119 switch (ucontrol->value.integer.value[0]) {
2120 case 12:
2121 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2122 break;
2123 case 11:
2124 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2125 break;
2126 case 10:
2127 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2128 break;
2129 case 9:
2130 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2131 break;
2132 case 8:
2133 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2134 break;
2135 case 7:
2136 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2137 break;
2138 case 6:
2139 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2140 break;
2141 case 5:
2142 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2143 break;
2144 case 4:
2145 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2146 break;
2147 case 3:
2148 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2149 break;
2150 case 2:
2151 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2152 break;
2153 case 1:
2154 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2155 break;
2156 case 0:
2157 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2158 break;
2159 default:
2160 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2161 break;
2162 }
2163
2164 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2165 __func__, ucontrol->value.integer.value[0],
2166 usb_tx_cfg.sample_rate);
2167 return 0;
2168}
2169
2170static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2171 struct snd_ctl_elem_value *ucontrol)
2172{
2173 switch (usb_tx_cfg.bit_format) {
2174 case SNDRV_PCM_FORMAT_S32_LE:
2175 ucontrol->value.integer.value[0] = 3;
2176 break;
2177 case SNDRV_PCM_FORMAT_S24_3LE:
2178 ucontrol->value.integer.value[0] = 2;
2179 break;
2180 case SNDRV_PCM_FORMAT_S24_LE:
2181 ucontrol->value.integer.value[0] = 1;
2182 break;
2183 case SNDRV_PCM_FORMAT_S16_LE:
2184 default:
2185 ucontrol->value.integer.value[0] = 0;
2186 break;
2187 }
2188
2189 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2190 __func__, usb_tx_cfg.bit_format,
2191 ucontrol->value.integer.value[0]);
2192 return 0;
2193}
2194
2195static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2196 struct snd_ctl_elem_value *ucontrol)
2197{
2198 int rc = 0;
2199
2200 switch (ucontrol->value.integer.value[0]) {
2201 case 3:
2202 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2203 break;
2204 case 2:
2205 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2206 break;
2207 case 1:
2208 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2209 break;
2210 case 0:
2211 default:
2212 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2213 break;
2214 }
2215 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2216 __func__, usb_tx_cfg.bit_format,
2217 ucontrol->value.integer.value[0]);
2218
2219 return rc;
2220}
2221
2222static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2223{
2224 int idx;
2225
2226 if (strnstr(kcontrol->id.name, "Display Port RX",
2227 sizeof("Display Port RX"))) {
2228 idx = DP_RX_IDX;
2229 } else {
2230 pr_err("%s: unsupported BE: %s\n",
2231 __func__, kcontrol->id.name);
2232 idx = -EINVAL;
2233 }
2234
2235 return idx;
2236}
2237
2238static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2239 struct snd_ctl_elem_value *ucontrol)
2240{
2241 int idx = ext_disp_get_port_idx(kcontrol);
2242
2243 if (idx < 0)
2244 return idx;
2245
2246 switch (ext_disp_rx_cfg[idx].bit_format) {
2247 case SNDRV_PCM_FORMAT_S24_3LE:
2248 ucontrol->value.integer.value[0] = 2;
2249 break;
2250 case SNDRV_PCM_FORMAT_S24_LE:
2251 ucontrol->value.integer.value[0] = 1;
2252 break;
2253 case SNDRV_PCM_FORMAT_S16_LE:
2254 default:
2255 ucontrol->value.integer.value[0] = 0;
2256 break;
2257 }
2258
2259 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2260 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2261 ucontrol->value.integer.value[0]);
2262 return 0;
2263}
2264
2265static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2266 struct snd_ctl_elem_value *ucontrol)
2267{
2268 int idx = ext_disp_get_port_idx(kcontrol);
2269
2270 if (idx < 0)
2271 return idx;
2272
2273 switch (ucontrol->value.integer.value[0]) {
2274 case 2:
2275 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2276 break;
2277 case 1:
2278 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2279 break;
2280 case 0:
2281 default:
2282 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2283 break;
2284 }
2285 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2286 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2287 ucontrol->value.integer.value[0]);
2288
2289 return 0;
2290}
2291
2292static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2293 struct snd_ctl_elem_value *ucontrol)
2294{
2295 int idx = ext_disp_get_port_idx(kcontrol);
2296
2297 if (idx < 0)
2298 return idx;
2299
2300 ucontrol->value.integer.value[0] =
2301 ext_disp_rx_cfg[idx].channels - 2;
2302
2303 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2304 idx, ext_disp_rx_cfg[idx].channels);
2305
2306 return 0;
2307}
2308
2309static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2310 struct snd_ctl_elem_value *ucontrol)
2311{
2312 int idx = ext_disp_get_port_idx(kcontrol);
2313
2314 if (idx < 0)
2315 return idx;
2316
2317 ext_disp_rx_cfg[idx].channels =
2318 ucontrol->value.integer.value[0] + 2;
2319
2320 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2321 idx, ext_disp_rx_cfg[idx].channels);
2322 return 1;
2323}
2324
2325static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2326 struct snd_ctl_elem_value *ucontrol)
2327{
2328 int sample_rate_val;
2329 int idx = ext_disp_get_port_idx(kcontrol);
2330
2331 if (idx < 0)
2332 return idx;
2333
2334 switch (ext_disp_rx_cfg[idx].sample_rate) {
2335 case SAMPLING_RATE_176P4KHZ:
2336 sample_rate_val = 6;
2337 break;
2338
2339 case SAMPLING_RATE_88P2KHZ:
2340 sample_rate_val = 5;
2341 break;
2342
2343 case SAMPLING_RATE_44P1KHZ:
2344 sample_rate_val = 4;
2345 break;
2346
2347 case SAMPLING_RATE_32KHZ:
2348 sample_rate_val = 3;
2349 break;
2350
2351 case SAMPLING_RATE_192KHZ:
2352 sample_rate_val = 2;
2353 break;
2354
2355 case SAMPLING_RATE_96KHZ:
2356 sample_rate_val = 1;
2357 break;
2358
2359 case SAMPLING_RATE_48KHZ:
2360 default:
2361 sample_rate_val = 0;
2362 break;
2363 }
2364
2365 ucontrol->value.integer.value[0] = sample_rate_val;
2366 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2367 idx, ext_disp_rx_cfg[idx].sample_rate);
2368
2369 return 0;
2370}
2371
2372static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2373 struct snd_ctl_elem_value *ucontrol)
2374{
2375 int idx = ext_disp_get_port_idx(kcontrol);
2376
2377 if (idx < 0)
2378 return idx;
2379
2380 switch (ucontrol->value.integer.value[0]) {
2381 case 6:
2382 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2383 break;
2384 case 5:
2385 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2386 break;
2387 case 4:
2388 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2389 break;
2390 case 3:
2391 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2392 break;
2393 case 2:
2394 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2395 break;
2396 case 1:
2397 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2398 break;
2399 case 0:
2400 default:
2401 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2402 break;
2403 }
2404
2405 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2406 __func__, ucontrol->value.integer.value[0], idx,
2407 ext_disp_rx_cfg[idx].sample_rate);
2408 return 0;
2409}
2410
2411static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2412 struct snd_ctl_elem_value *ucontrol)
2413{
2414 pr_debug("%s: proxy_rx channels = %d\n",
2415 __func__, proxy_rx_cfg.channels);
2416 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2417
2418 return 0;
2419}
2420
2421static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2422 struct snd_ctl_elem_value *ucontrol)
2423{
2424 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2425 pr_debug("%s: proxy_rx channels = %d\n",
2426 __func__, proxy_rx_cfg.channels);
2427
2428 return 1;
2429}
2430
2431static int tdm_get_sample_rate(int value)
2432{
2433 int sample_rate = 0;
2434
2435 switch (value) {
2436 case 0:
2437 sample_rate = SAMPLING_RATE_8KHZ;
2438 break;
2439 case 1:
2440 sample_rate = SAMPLING_RATE_16KHZ;
2441 break;
2442 case 2:
2443 sample_rate = SAMPLING_RATE_32KHZ;
2444 break;
2445 case 3:
2446 sample_rate = SAMPLING_RATE_48KHZ;
2447 break;
2448 case 4:
2449 sample_rate = SAMPLING_RATE_176P4KHZ;
2450 break;
2451 case 5:
2452 sample_rate = SAMPLING_RATE_352P8KHZ;
2453 break;
2454 default:
2455 sample_rate = SAMPLING_RATE_48KHZ;
2456 break;
2457 }
2458 return sample_rate;
2459}
2460
2461static int aux_pcm_get_sample_rate(int value)
2462{
2463 int sample_rate;
2464
2465 switch (value) {
2466 case 1:
2467 sample_rate = SAMPLING_RATE_16KHZ;
2468 break;
2469 case 0:
2470 default:
2471 sample_rate = SAMPLING_RATE_8KHZ;
2472 break;
2473 }
2474 return sample_rate;
2475}
2476
2477static int tdm_get_sample_rate_val(int sample_rate)
2478{
2479 int sample_rate_val = 0;
2480
2481 switch (sample_rate) {
2482 case SAMPLING_RATE_8KHZ:
2483 sample_rate_val = 0;
2484 break;
2485 case SAMPLING_RATE_16KHZ:
2486 sample_rate_val = 1;
2487 break;
2488 case SAMPLING_RATE_32KHZ:
2489 sample_rate_val = 2;
2490 break;
2491 case SAMPLING_RATE_48KHZ:
2492 sample_rate_val = 3;
2493 break;
2494 case SAMPLING_RATE_176P4KHZ:
2495 sample_rate_val = 4;
2496 break;
2497 case SAMPLING_RATE_352P8KHZ:
2498 sample_rate_val = 5;
2499 break;
2500 default:
2501 sample_rate_val = 3;
2502 break;
2503 }
2504 return sample_rate_val;
2505}
2506
2507static int aux_pcm_get_sample_rate_val(int sample_rate)
2508{
2509 int sample_rate_val;
2510
2511 switch (sample_rate) {
2512 case SAMPLING_RATE_16KHZ:
2513 sample_rate_val = 1;
2514 break;
2515 case SAMPLING_RATE_8KHZ:
2516 default:
2517 sample_rate_val = 0;
2518 break;
2519 }
2520 return sample_rate_val;
2521}
2522
2523static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2524 struct tdm_port *port)
2525{
2526 if (port) {
2527 if (strnstr(kcontrol->id.name, "PRI",
2528 sizeof(kcontrol->id.name))) {
2529 port->mode = TDM_PRI;
2530 } else if (strnstr(kcontrol->id.name, "SEC",
2531 sizeof(kcontrol->id.name))) {
2532 port->mode = TDM_SEC;
2533 } else if (strnstr(kcontrol->id.name, "TERT",
2534 sizeof(kcontrol->id.name))) {
2535 port->mode = TDM_TERT;
2536 } else if (strnstr(kcontrol->id.name, "QUAT",
2537 sizeof(kcontrol->id.name))) {
2538 port->mode = TDM_QUAT;
2539 } else if (strnstr(kcontrol->id.name, "QUIN",
2540 sizeof(kcontrol->id.name))) {
2541 port->mode = TDM_QUIN;
2542 } else {
2543 pr_err("%s: unsupported mode in: %s\n",
2544 __func__, kcontrol->id.name);
2545 return -EINVAL;
2546 }
2547
2548 if (strnstr(kcontrol->id.name, "RX_0",
2549 sizeof(kcontrol->id.name)) ||
2550 strnstr(kcontrol->id.name, "TX_0",
2551 sizeof(kcontrol->id.name))) {
2552 port->channel = TDM_0;
2553 } else if (strnstr(kcontrol->id.name, "RX_1",
2554 sizeof(kcontrol->id.name)) ||
2555 strnstr(kcontrol->id.name, "TX_1",
2556 sizeof(kcontrol->id.name))) {
2557 port->channel = TDM_1;
2558 } else if (strnstr(kcontrol->id.name, "RX_2",
2559 sizeof(kcontrol->id.name)) ||
2560 strnstr(kcontrol->id.name, "TX_2",
2561 sizeof(kcontrol->id.name))) {
2562 port->channel = TDM_2;
2563 } else if (strnstr(kcontrol->id.name, "RX_3",
2564 sizeof(kcontrol->id.name)) ||
2565 strnstr(kcontrol->id.name, "TX_3",
2566 sizeof(kcontrol->id.name))) {
2567 port->channel = TDM_3;
2568 } else if (strnstr(kcontrol->id.name, "RX_4",
2569 sizeof(kcontrol->id.name)) ||
2570 strnstr(kcontrol->id.name, "TX_4",
2571 sizeof(kcontrol->id.name))) {
2572 port->channel = TDM_4;
2573 } else if (strnstr(kcontrol->id.name, "RX_5",
2574 sizeof(kcontrol->id.name)) ||
2575 strnstr(kcontrol->id.name, "TX_5",
2576 sizeof(kcontrol->id.name))) {
2577 port->channel = TDM_5;
2578 } else if (strnstr(kcontrol->id.name, "RX_6",
2579 sizeof(kcontrol->id.name)) ||
2580 strnstr(kcontrol->id.name, "TX_6",
2581 sizeof(kcontrol->id.name))) {
2582 port->channel = TDM_6;
2583 } else if (strnstr(kcontrol->id.name, "RX_7",
2584 sizeof(kcontrol->id.name)) ||
2585 strnstr(kcontrol->id.name, "TX_7",
2586 sizeof(kcontrol->id.name))) {
2587 port->channel = TDM_7;
2588 } else {
2589 pr_err("%s: unsupported channel in: %s\n",
2590 __func__, kcontrol->id.name);
2591 return -EINVAL;
2592 }
2593 } else {
2594 return -EINVAL;
2595 }
2596 return 0;
2597}
2598
2599static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 struct tdm_port port;
2603 int ret = tdm_get_port_idx(kcontrol, &port);
2604
2605 if (ret) {
2606 pr_err("%s: unsupported control: %s\n",
2607 __func__, kcontrol->id.name);
2608 } else {
2609 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2610 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2611
2612 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2613 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2614 ucontrol->value.enumerated.item[0]);
2615 }
2616 return ret;
2617}
2618
2619static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2620 struct snd_ctl_elem_value *ucontrol)
2621{
2622 struct tdm_port port;
2623 int ret = tdm_get_port_idx(kcontrol, &port);
2624
2625 if (ret) {
2626 pr_err("%s: unsupported control: %s\n",
2627 __func__, kcontrol->id.name);
2628 } else {
2629 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2630 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2631
2632 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2633 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2634 ucontrol->value.enumerated.item[0]);
2635 }
2636 return ret;
2637}
2638
2639static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2640 struct snd_ctl_elem_value *ucontrol)
2641{
2642 struct tdm_port port;
2643 int ret = tdm_get_port_idx(kcontrol, &port);
2644
2645 if (ret) {
2646 pr_err("%s: unsupported control: %s\n",
2647 __func__, kcontrol->id.name);
2648 } else {
2649 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2650 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2651
2652 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2653 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2654 ucontrol->value.enumerated.item[0]);
2655 }
2656 return ret;
2657}
2658
2659static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2660 struct snd_ctl_elem_value *ucontrol)
2661{
2662 struct tdm_port port;
2663 int ret = tdm_get_port_idx(kcontrol, &port);
2664
2665 if (ret) {
2666 pr_err("%s: unsupported control: %s\n",
2667 __func__, kcontrol->id.name);
2668 } else {
2669 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2670 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2671
2672 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2673 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2674 ucontrol->value.enumerated.item[0]);
2675 }
2676 return ret;
2677}
2678
2679static int tdm_get_format(int value)
2680{
2681 int format = 0;
2682
2683 switch (value) {
2684 case 0:
2685 format = SNDRV_PCM_FORMAT_S16_LE;
2686 break;
2687 case 1:
2688 format = SNDRV_PCM_FORMAT_S24_LE;
2689 break;
2690 case 2:
2691 format = SNDRV_PCM_FORMAT_S32_LE;
2692 break;
2693 default:
2694 format = SNDRV_PCM_FORMAT_S16_LE;
2695 break;
2696 }
2697 return format;
2698}
2699
2700static int tdm_get_format_val(int format)
2701{
2702 int value = 0;
2703
2704 switch (format) {
2705 case SNDRV_PCM_FORMAT_S16_LE:
2706 value = 0;
2707 break;
2708 case SNDRV_PCM_FORMAT_S24_LE:
2709 value = 1;
2710 break;
2711 case SNDRV_PCM_FORMAT_S32_LE:
2712 value = 2;
2713 break;
2714 default:
2715 value = 0;
2716 break;
2717 }
2718 return value;
2719}
2720
2721static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2722 struct snd_ctl_elem_value *ucontrol)
2723{
2724 struct tdm_port port;
2725 int ret = tdm_get_port_idx(kcontrol, &port);
2726
2727 if (ret) {
2728 pr_err("%s: unsupported control: %s\n",
2729 __func__, kcontrol->id.name);
2730 } else {
2731 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2732 tdm_rx_cfg[port.mode][port.channel].bit_format);
2733
2734 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2735 tdm_rx_cfg[port.mode][port.channel].bit_format,
2736 ucontrol->value.enumerated.item[0]);
2737 }
2738 return ret;
2739}
2740
2741static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2742 struct snd_ctl_elem_value *ucontrol)
2743{
2744 struct tdm_port port;
2745 int ret = tdm_get_port_idx(kcontrol, &port);
2746
2747 if (ret) {
2748 pr_err("%s: unsupported control: %s\n",
2749 __func__, kcontrol->id.name);
2750 } else {
2751 tdm_rx_cfg[port.mode][port.channel].bit_format =
2752 tdm_get_format(ucontrol->value.enumerated.item[0]);
2753
2754 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2755 tdm_rx_cfg[port.mode][port.channel].bit_format,
2756 ucontrol->value.enumerated.item[0]);
2757 }
2758 return ret;
2759}
2760
2761static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2762 struct snd_ctl_elem_value *ucontrol)
2763{
2764 struct tdm_port port;
2765 int ret = tdm_get_port_idx(kcontrol, &port);
2766
2767 if (ret) {
2768 pr_err("%s: unsupported control: %s\n",
2769 __func__, kcontrol->id.name);
2770 } else {
2771 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2772 tdm_tx_cfg[port.mode][port.channel].bit_format);
2773
2774 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2775 tdm_tx_cfg[port.mode][port.channel].bit_format,
2776 ucontrol->value.enumerated.item[0]);
2777 }
2778 return ret;
2779}
2780
2781static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2782 struct snd_ctl_elem_value *ucontrol)
2783{
2784 struct tdm_port port;
2785 int ret = tdm_get_port_idx(kcontrol, &port);
2786
2787 if (ret) {
2788 pr_err("%s: unsupported control: %s\n",
2789 __func__, kcontrol->id.name);
2790 } else {
2791 tdm_tx_cfg[port.mode][port.channel].bit_format =
2792 tdm_get_format(ucontrol->value.enumerated.item[0]);
2793
2794 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2795 tdm_tx_cfg[port.mode][port.channel].bit_format,
2796 ucontrol->value.enumerated.item[0]);
2797 }
2798 return ret;
2799}
2800
2801static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2802 struct snd_ctl_elem_value *ucontrol)
2803{
2804 struct tdm_port port;
2805 int ret = tdm_get_port_idx(kcontrol, &port);
2806
2807 if (ret) {
2808 pr_err("%s: unsupported control: %s\n",
2809 __func__, kcontrol->id.name);
2810 } else {
2811
2812 ucontrol->value.enumerated.item[0] =
2813 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2814
2815 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2816 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2817 ucontrol->value.enumerated.item[0]);
2818 }
2819 return ret;
2820}
2821
2822static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2823 struct snd_ctl_elem_value *ucontrol)
2824{
2825 struct tdm_port port;
2826 int ret = tdm_get_port_idx(kcontrol, &port);
2827
2828 if (ret) {
2829 pr_err("%s: unsupported control: %s\n",
2830 __func__, kcontrol->id.name);
2831 } else {
2832 tdm_rx_cfg[port.mode][port.channel].channels =
2833 ucontrol->value.enumerated.item[0] + 1;
2834
2835 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2836 tdm_rx_cfg[port.mode][port.channel].channels,
2837 ucontrol->value.enumerated.item[0] + 1);
2838 }
2839 return ret;
2840}
2841
2842static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2843 struct snd_ctl_elem_value *ucontrol)
2844{
2845 struct tdm_port port;
2846 int ret = tdm_get_port_idx(kcontrol, &port);
2847
2848 if (ret) {
2849 pr_err("%s: unsupported control: %s\n",
2850 __func__, kcontrol->id.name);
2851 } else {
2852 ucontrol->value.enumerated.item[0] =
2853 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2854
2855 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2856 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2857 ucontrol->value.enumerated.item[0]);
2858 }
2859 return ret;
2860}
2861
2862static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2863 struct snd_ctl_elem_value *ucontrol)
2864{
2865 struct tdm_port port;
2866 int ret = tdm_get_port_idx(kcontrol, &port);
2867
2868 if (ret) {
2869 pr_err("%s: unsupported control: %s\n",
2870 __func__, kcontrol->id.name);
2871 } else {
2872 tdm_tx_cfg[port.mode][port.channel].channels =
2873 ucontrol->value.enumerated.item[0] + 1;
2874
2875 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2876 tdm_tx_cfg[port.mode][port.channel].channels,
2877 ucontrol->value.enumerated.item[0] + 1);
2878 }
2879 return ret;
2880}
2881
2882static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2883{
2884 int idx;
2885
2886 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2887 sizeof("PRIM_AUX_PCM"))) {
2888 idx = PRIM_AUX_PCM;
2889 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2890 sizeof("SEC_AUX_PCM"))) {
2891 idx = SEC_AUX_PCM;
2892 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2893 sizeof("TERT_AUX_PCM"))) {
2894 idx = TERT_AUX_PCM;
2895 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2896 sizeof("QUAT_AUX_PCM"))) {
2897 idx = QUAT_AUX_PCM;
2898 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2899 sizeof("QUIN_AUX_PCM"))) {
2900 idx = QUIN_AUX_PCM;
2901 } else {
2902 pr_err("%s: unsupported port: %s\n",
2903 __func__, kcontrol->id.name);
2904 idx = -EINVAL;
2905 }
2906
2907 return idx;
2908}
2909
2910static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2911 struct snd_ctl_elem_value *ucontrol)
2912{
2913 int idx = aux_pcm_get_port_idx(kcontrol);
2914
2915 if (idx < 0)
2916 return idx;
2917
2918 aux_pcm_rx_cfg[idx].sample_rate =
2919 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2920
2921 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2922 idx, aux_pcm_rx_cfg[idx].sample_rate,
2923 ucontrol->value.enumerated.item[0]);
2924
2925 return 0;
2926}
2927
2928static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2929 struct snd_ctl_elem_value *ucontrol)
2930{
2931 int idx = aux_pcm_get_port_idx(kcontrol);
2932
2933 if (idx < 0)
2934 return idx;
2935
2936 ucontrol->value.enumerated.item[0] =
2937 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2938
2939 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2940 idx, aux_pcm_rx_cfg[idx].sample_rate,
2941 ucontrol->value.enumerated.item[0]);
2942
2943 return 0;
2944}
2945
2946static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2947 struct snd_ctl_elem_value *ucontrol)
2948{
2949 int idx = aux_pcm_get_port_idx(kcontrol);
2950
2951 if (idx < 0)
2952 return idx;
2953
2954 aux_pcm_tx_cfg[idx].sample_rate =
2955 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2956
2957 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2958 idx, aux_pcm_tx_cfg[idx].sample_rate,
2959 ucontrol->value.enumerated.item[0]);
2960
2961 return 0;
2962}
2963
2964static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2965 struct snd_ctl_elem_value *ucontrol)
2966{
2967 int idx = aux_pcm_get_port_idx(kcontrol);
2968
2969 if (idx < 0)
2970 return idx;
2971
2972 ucontrol->value.enumerated.item[0] =
2973 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2974
2975 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2976 idx, aux_pcm_tx_cfg[idx].sample_rate,
2977 ucontrol->value.enumerated.item[0]);
2978
2979 return 0;
2980}
2981
2982static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2983{
2984 int idx;
2985
2986 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2987 sizeof("PRIM_MI2S_RX"))) {
2988 idx = PRIM_MI2S;
2989 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2990 sizeof("SEC_MI2S_RX"))) {
2991 idx = SEC_MI2S;
2992 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2993 sizeof("TERT_MI2S_RX"))) {
2994 idx = TERT_MI2S;
2995 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2996 sizeof("QUAT_MI2S_RX"))) {
2997 idx = QUAT_MI2S;
2998 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2999 sizeof("QUIN_MI2S_RX"))) {
3000 idx = QUIN_MI2S;
3001 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
3002 sizeof("PRIM_MI2S_TX"))) {
3003 idx = PRIM_MI2S;
3004 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
3005 sizeof("SEC_MI2S_TX"))) {
3006 idx = SEC_MI2S;
3007 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
3008 sizeof("TERT_MI2S_TX"))) {
3009 idx = TERT_MI2S;
3010 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
3011 sizeof("QUAT_MI2S_TX"))) {
3012 idx = QUAT_MI2S;
3013 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
3014 sizeof("QUIN_MI2S_TX"))) {
3015 idx = QUIN_MI2S;
3016 } else {
3017 pr_err("%s: unsupported channel: %s\n",
3018 __func__, kcontrol->id.name);
3019 idx = -EINVAL;
3020 }
3021
3022 return idx;
3023}
3024
3025static int mi2s_get_sample_rate_val(int sample_rate)
3026{
3027 int sample_rate_val;
3028
3029 switch (sample_rate) {
3030 case SAMPLING_RATE_8KHZ:
3031 sample_rate_val = 0;
3032 break;
3033 case SAMPLING_RATE_11P025KHZ:
3034 sample_rate_val = 1;
3035 break;
3036 case SAMPLING_RATE_16KHZ:
3037 sample_rate_val = 2;
3038 break;
3039 case SAMPLING_RATE_22P05KHZ:
3040 sample_rate_val = 3;
3041 break;
3042 case SAMPLING_RATE_32KHZ:
3043 sample_rate_val = 4;
3044 break;
3045 case SAMPLING_RATE_44P1KHZ:
3046 sample_rate_val = 5;
3047 break;
3048 case SAMPLING_RATE_48KHZ:
3049 sample_rate_val = 6;
3050 break;
3051 case SAMPLING_RATE_96KHZ:
3052 sample_rate_val = 7;
3053 break;
3054 case SAMPLING_RATE_192KHZ:
3055 sample_rate_val = 8;
3056 break;
3057 default:
3058 sample_rate_val = 6;
3059 break;
3060 }
3061 return sample_rate_val;
3062}
3063
3064static int mi2s_get_sample_rate(int value)
3065{
3066 int sample_rate;
3067
3068 switch (value) {
3069 case 0:
3070 sample_rate = SAMPLING_RATE_8KHZ;
3071 break;
3072 case 1:
3073 sample_rate = SAMPLING_RATE_11P025KHZ;
3074 break;
3075 case 2:
3076 sample_rate = SAMPLING_RATE_16KHZ;
3077 break;
3078 case 3:
3079 sample_rate = SAMPLING_RATE_22P05KHZ;
3080 break;
3081 case 4:
3082 sample_rate = SAMPLING_RATE_32KHZ;
3083 break;
3084 case 5:
3085 sample_rate = SAMPLING_RATE_44P1KHZ;
3086 break;
3087 case 6:
3088 sample_rate = SAMPLING_RATE_48KHZ;
3089 break;
3090 case 7:
3091 sample_rate = SAMPLING_RATE_96KHZ;
3092 break;
3093 case 8:
3094 sample_rate = SAMPLING_RATE_192KHZ;
3095 break;
3096 default:
3097 sample_rate = SAMPLING_RATE_48KHZ;
3098 break;
3099 }
3100 return sample_rate;
3101}
3102
3103static int mi2s_auxpcm_get_format(int value)
3104{
3105 int format;
3106
3107 switch (value) {
3108 case 0:
3109 format = SNDRV_PCM_FORMAT_S16_LE;
3110 break;
3111 case 1:
3112 format = SNDRV_PCM_FORMAT_S24_LE;
3113 break;
3114 case 2:
3115 format = SNDRV_PCM_FORMAT_S24_3LE;
3116 break;
3117 case 3:
3118 format = SNDRV_PCM_FORMAT_S32_LE;
3119 break;
3120 default:
3121 format = SNDRV_PCM_FORMAT_S16_LE;
3122 break;
3123 }
3124 return format;
3125}
3126
3127static int mi2s_auxpcm_get_format_value(int format)
3128{
3129 int value;
3130
3131 switch (format) {
3132 case SNDRV_PCM_FORMAT_S16_LE:
3133 value = 0;
3134 break;
3135 case SNDRV_PCM_FORMAT_S24_LE:
3136 value = 1;
3137 break;
3138 case SNDRV_PCM_FORMAT_S24_3LE:
3139 value = 2;
3140 break;
3141 case SNDRV_PCM_FORMAT_S32_LE:
3142 value = 3;
3143 break;
3144 default:
3145 value = 0;
3146 break;
3147 }
3148 return value;
3149}
3150
3151static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3152 struct snd_ctl_elem_value *ucontrol)
3153{
3154 int idx = mi2s_get_port_idx(kcontrol);
3155
3156 if (idx < 0)
3157 return idx;
3158
3159 mi2s_rx_cfg[idx].sample_rate =
3160 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3161
3162 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3163 idx, mi2s_rx_cfg[idx].sample_rate,
3164 ucontrol->value.enumerated.item[0]);
3165
3166 return 0;
3167}
3168
3169static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3170 struct snd_ctl_elem_value *ucontrol)
3171{
3172 int idx = mi2s_get_port_idx(kcontrol);
3173
3174 if (idx < 0)
3175 return idx;
3176
3177 ucontrol->value.enumerated.item[0] =
3178 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3179
3180 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3181 idx, mi2s_rx_cfg[idx].sample_rate,
3182 ucontrol->value.enumerated.item[0]);
3183
3184 return 0;
3185}
3186
3187static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3188 struct snd_ctl_elem_value *ucontrol)
3189{
3190 int idx = mi2s_get_port_idx(kcontrol);
3191
3192 if (idx < 0)
3193 return idx;
3194
3195 mi2s_tx_cfg[idx].sample_rate =
3196 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3197
3198 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3199 idx, mi2s_tx_cfg[idx].sample_rate,
3200 ucontrol->value.enumerated.item[0]);
3201
3202 return 0;
3203}
3204
3205static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3206 struct snd_ctl_elem_value *ucontrol)
3207{
3208 int idx = mi2s_get_port_idx(kcontrol);
3209
3210 if (idx < 0)
3211 return idx;
3212
3213 ucontrol->value.enumerated.item[0] =
3214 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3215
3216 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3217 idx, mi2s_tx_cfg[idx].sample_rate,
3218 ucontrol->value.enumerated.item[0]);
3219
3220 return 0;
3221}
3222
3223static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3224 struct snd_ctl_elem_value *ucontrol)
3225{
3226 int idx = mi2s_get_port_idx(kcontrol);
3227
3228 if (idx < 0)
3229 return idx;
3230
3231 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3232 idx, mi2s_rx_cfg[idx].channels);
3233 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3234
3235 return 0;
3236}
3237
3238static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3239 struct snd_ctl_elem_value *ucontrol)
3240{
3241 int idx = mi2s_get_port_idx(kcontrol);
3242
3243 if (idx < 0)
3244 return idx;
3245
3246 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3247 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3248 idx, mi2s_rx_cfg[idx].channels);
3249
3250 return 1;
3251}
3252
3253static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3254 struct snd_ctl_elem_value *ucontrol)
3255{
3256 int idx = mi2s_get_port_idx(kcontrol);
3257
3258 if (idx < 0)
3259 return idx;
3260
3261 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3262 idx, mi2s_tx_cfg[idx].channels);
3263 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3264
3265 return 0;
3266}
3267
3268static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3269 struct snd_ctl_elem_value *ucontrol)
3270{
3271 int idx = mi2s_get_port_idx(kcontrol);
3272
3273 if (idx < 0)
3274 return idx;
3275
3276 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3277 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3278 idx, mi2s_tx_cfg[idx].channels);
3279
3280 return 1;
3281}
3282
3283static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3284 struct snd_ctl_elem_value *ucontrol)
3285{
3286 int idx = mi2s_get_port_idx(kcontrol);
3287
3288 if (idx < 0)
3289 return idx;
3290
3291 ucontrol->value.enumerated.item[0] =
3292 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3293
3294 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3295 idx, mi2s_rx_cfg[idx].bit_format,
3296 ucontrol->value.enumerated.item[0]);
3297
3298 return 0;
3299}
3300
3301static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3302 struct snd_ctl_elem_value *ucontrol)
3303{
3304 int idx = mi2s_get_port_idx(kcontrol);
3305
3306 if (idx < 0)
3307 return idx;
3308
3309 mi2s_rx_cfg[idx].bit_format =
3310 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3311
3312 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3313 idx, mi2s_rx_cfg[idx].bit_format,
3314 ucontrol->value.enumerated.item[0]);
3315
3316 return 0;
3317}
3318
3319static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3320 struct snd_ctl_elem_value *ucontrol)
3321{
3322 int idx = mi2s_get_port_idx(kcontrol);
3323
3324 if (idx < 0)
3325 return idx;
3326
3327 ucontrol->value.enumerated.item[0] =
3328 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3329
3330 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3331 idx, mi2s_tx_cfg[idx].bit_format,
3332 ucontrol->value.enumerated.item[0]);
3333
3334 return 0;
3335}
3336
3337static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3338 struct snd_ctl_elem_value *ucontrol)
3339{
3340 int idx = mi2s_get_port_idx(kcontrol);
3341
3342 if (idx < 0)
3343 return idx;
3344
3345 mi2s_tx_cfg[idx].bit_format =
3346 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3347
3348 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3349 idx, mi2s_tx_cfg[idx].bit_format,
3350 ucontrol->value.enumerated.item[0]);
3351
3352 return 0;
3353}
3354
3355static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3356 struct snd_ctl_elem_value *ucontrol)
3357{
3358 int idx = aux_pcm_get_port_idx(kcontrol);
3359
3360 if (idx < 0)
3361 return idx;
3362
3363 ucontrol->value.enumerated.item[0] =
3364 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3365
3366 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3367 idx, aux_pcm_rx_cfg[idx].bit_format,
3368 ucontrol->value.enumerated.item[0]);
3369
3370 return 0;
3371}
3372
3373static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3374 struct snd_ctl_elem_value *ucontrol)
3375{
3376 int idx = aux_pcm_get_port_idx(kcontrol);
3377
3378 if (idx < 0)
3379 return idx;
3380
3381 aux_pcm_rx_cfg[idx].bit_format =
3382 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3383
3384 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3385 idx, aux_pcm_rx_cfg[idx].bit_format,
3386 ucontrol->value.enumerated.item[0]);
3387
3388 return 0;
3389}
3390
3391static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3392 struct snd_ctl_elem_value *ucontrol)
3393{
3394 int idx = aux_pcm_get_port_idx(kcontrol);
3395
3396 if (idx < 0)
3397 return idx;
3398
3399 ucontrol->value.enumerated.item[0] =
3400 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3401
3402 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3403 idx, aux_pcm_tx_cfg[idx].bit_format,
3404 ucontrol->value.enumerated.item[0]);
3405
3406 return 0;
3407}
3408
3409static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3410 struct snd_ctl_elem_value *ucontrol)
3411{
3412 int idx = aux_pcm_get_port_idx(kcontrol);
3413
3414 if (idx < 0)
3415 return idx;
3416
3417 aux_pcm_tx_cfg[idx].bit_format =
3418 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3419
3420 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3421 idx, aux_pcm_tx_cfg[idx].bit_format,
3422 ucontrol->value.enumerated.item[0]);
3423
3424 return 0;
3425}
3426
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3427static int msm_hifi_ctrl(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3428{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3429 struct snd_soc_dapm_context *dapm =
3430 snd_soc_component_get_dapm(component);
3431 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3432 struct msm_asoc_mach_data *pdata =
3433 snd_soc_card_get_drvdata(card);
3434
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3435 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3436 msm_hifi_control);
3437
3438 if (!pdata || !pdata->hph_en1_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3439 dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
3440 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3441 return -EINVAL;
3442 }
3443 if (msm_hifi_control == MSM_HIFI_ON) {
3444 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3445 /* 5msec delay needed as per HW requirement */
3446 usleep_range(5000, 5010);
3447 } else {
3448 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3449 }
3450 snd_soc_dapm_sync(dapm);
3451
3452 return 0;
3453}
3454
3455static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3456 struct snd_ctl_elem_value *ucontrol)
3457{
3458 pr_debug("%s: msm_hifi_control = %d\n",
3459 __func__, msm_hifi_control);
3460 ucontrol->value.integer.value[0] = msm_hifi_control;
3461
3462 return 0;
3463}
3464
3465static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3466 struct snd_ctl_elem_value *ucontrol)
3467{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3468 struct snd_soc_component *component =
3469 snd_soc_kcontrol_component(kcontrol);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3470
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3471 dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3472 __func__, ucontrol->value.integer.value[0]);
3473
3474 msm_hifi_control = ucontrol->value.integer.value[0];
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3475 msm_hifi_ctrl(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3476
3477 return 0;
3478}
3479
3480static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3481 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3482 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3483 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3484 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3485 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3486 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3487 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3488 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3489 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3490 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3491 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3492 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3493 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3494 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3495 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3496 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3497 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3498 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3499 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3500 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3501 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3502 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3503 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3504 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3505 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3506 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3507 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3508 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3509 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3510 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3511 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3512 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3513 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3514 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3515 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3516 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3517 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3518 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3519 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3520 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3521 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3522 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3523 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3524 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3525 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3526 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3527 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3528 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3529 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3530 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3531 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3532 wsa_cdc_dma_rx_0_sample_rate,
3533 cdc_dma_rx_sample_rate_get,
3534 cdc_dma_rx_sample_rate_put),
3535 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3536 wsa_cdc_dma_rx_1_sample_rate,
3537 cdc_dma_rx_sample_rate_get,
3538 cdc_dma_rx_sample_rate_put),
3539 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3540 rx_cdc_dma_rx_0_sample_rate,
3541 cdc_dma_rx_sample_rate_get,
3542 cdc_dma_rx_sample_rate_put),
3543 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3544 rx_cdc_dma_rx_1_sample_rate,
3545 cdc_dma_rx_sample_rate_get,
3546 cdc_dma_rx_sample_rate_put),
3547 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3548 rx_cdc_dma_rx_2_sample_rate,
3549 cdc_dma_rx_sample_rate_get,
3550 cdc_dma_rx_sample_rate_put),
3551 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3552 rx_cdc_dma_rx_3_sample_rate,
3553 cdc_dma_rx_sample_rate_get,
3554 cdc_dma_rx_sample_rate_put),
3555 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3556 rx_cdc_dma_rx_5_sample_rate,
3557 cdc_dma_rx_sample_rate_get,
3558 cdc_dma_rx_sample_rate_put),
3559 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3560 wsa_cdc_dma_tx_0_sample_rate,
3561 cdc_dma_tx_sample_rate_get,
3562 cdc_dma_tx_sample_rate_put),
3563 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3564 wsa_cdc_dma_tx_1_sample_rate,
3565 cdc_dma_tx_sample_rate_get,
3566 cdc_dma_tx_sample_rate_put),
3567 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3568 wsa_cdc_dma_tx_2_sample_rate,
3569 cdc_dma_tx_sample_rate_get,
3570 cdc_dma_tx_sample_rate_put),
3571 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3572 tx_cdc_dma_tx_0_sample_rate,
3573 cdc_dma_tx_sample_rate_get,
3574 cdc_dma_tx_sample_rate_put),
3575 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3576 tx_cdc_dma_tx_3_sample_rate,
3577 cdc_dma_tx_sample_rate_get,
3578 cdc_dma_tx_sample_rate_put),
3579 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3580 tx_cdc_dma_tx_4_sample_rate,
3581 cdc_dma_tx_sample_rate_get,
3582 cdc_dma_tx_sample_rate_put),
3583};
3584
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3585static const struct snd_kcontrol_new msm_ext_snd_controls[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3586 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3587 slim_rx_ch_get, slim_rx_ch_put),
3588 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3589 slim_rx_ch_get, slim_rx_ch_put),
3590 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3591 slim_tx_ch_get, slim_tx_ch_put),
3592 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3593 slim_tx_ch_get, slim_tx_ch_put),
3594 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3595 slim_rx_ch_get, slim_rx_ch_put),
3596 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3597 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3598 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3599 slim_rx_bit_format_get, slim_rx_bit_format_put),
3600 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3601 slim_rx_bit_format_get, slim_rx_bit_format_put),
3602 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3603 slim_rx_bit_format_get, slim_rx_bit_format_put),
3604 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3605 slim_tx_bit_format_get, slim_tx_bit_format_put),
3606 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3607 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3608 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3609 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3610 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3611 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3612 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3613 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3614 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3615 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3616};
3617
3618static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3619 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3620 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3621 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3622 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3623 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3624 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3625 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3626 proxy_rx_ch_get, proxy_rx_ch_put),
3627 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3628 usb_audio_rx_format_get, usb_audio_rx_format_put),
3629 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3630 usb_audio_tx_format_get, usb_audio_tx_format_put),
3631 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3632 ext_disp_rx_format_get, ext_disp_rx_format_put),
3633 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3634 usb_audio_rx_sample_rate_get,
3635 usb_audio_rx_sample_rate_put),
3636 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3637 usb_audio_tx_sample_rate_get,
3638 usb_audio_tx_sample_rate_put),
3639 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3640 ext_disp_rx_sample_rate_get,
3641 ext_disp_rx_sample_rate_put),
3642 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3643 tdm_rx_sample_rate_get,
3644 tdm_rx_sample_rate_put),
3645 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3646 tdm_tx_sample_rate_get,
3647 tdm_tx_sample_rate_put),
3648 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3649 tdm_rx_format_get,
3650 tdm_rx_format_put),
3651 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3652 tdm_tx_format_get,
3653 tdm_tx_format_put),
3654 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3655 tdm_rx_ch_get,
3656 tdm_rx_ch_put),
3657 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3658 tdm_tx_ch_get,
3659 tdm_tx_ch_put),
3660 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3661 tdm_rx_sample_rate_get,
3662 tdm_rx_sample_rate_put),
3663 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3664 tdm_tx_sample_rate_get,
3665 tdm_tx_sample_rate_put),
3666 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3667 tdm_rx_format_get,
3668 tdm_rx_format_put),
3669 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3670 tdm_tx_format_get,
3671 tdm_tx_format_put),
3672 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3673 tdm_rx_ch_get,
3674 tdm_rx_ch_put),
3675 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3676 tdm_tx_ch_get,
3677 tdm_tx_ch_put),
3678 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3679 tdm_rx_sample_rate_get,
3680 tdm_rx_sample_rate_put),
3681 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3682 tdm_tx_sample_rate_get,
3683 tdm_tx_sample_rate_put),
3684 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3685 tdm_rx_format_get,
3686 tdm_rx_format_put),
3687 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3688 tdm_tx_format_get,
3689 tdm_tx_format_put),
3690 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3691 tdm_rx_ch_get,
3692 tdm_rx_ch_put),
3693 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3694 tdm_tx_ch_get,
3695 tdm_tx_ch_put),
3696 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3697 tdm_rx_sample_rate_get,
3698 tdm_rx_sample_rate_put),
3699 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3700 tdm_tx_sample_rate_get,
3701 tdm_tx_sample_rate_put),
3702 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3703 tdm_rx_format_get,
3704 tdm_rx_format_put),
3705 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3706 tdm_tx_format_get,
3707 tdm_tx_format_put),
3708 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3709 tdm_rx_ch_get,
3710 tdm_rx_ch_put),
3711 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3712 tdm_tx_ch_get,
3713 tdm_tx_ch_put),
3714 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3715 tdm_rx_sample_rate_get,
3716 tdm_rx_sample_rate_put),
3717 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3718 tdm_tx_sample_rate_get,
3719 tdm_tx_sample_rate_put),
3720 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3721 tdm_rx_format_get,
3722 tdm_rx_format_put),
3723 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3724 tdm_tx_format_get,
3725 tdm_tx_format_put),
3726 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3727 tdm_rx_ch_get,
3728 tdm_rx_ch_put),
3729 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3730 tdm_tx_ch_get,
3731 tdm_tx_ch_put),
3732 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3733 aux_pcm_rx_sample_rate_get,
3734 aux_pcm_rx_sample_rate_put),
3735 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3736 aux_pcm_rx_sample_rate_get,
3737 aux_pcm_rx_sample_rate_put),
3738 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3739 aux_pcm_rx_sample_rate_get,
3740 aux_pcm_rx_sample_rate_put),
3741 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3742 aux_pcm_rx_sample_rate_get,
3743 aux_pcm_rx_sample_rate_put),
3744 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3745 aux_pcm_rx_sample_rate_get,
3746 aux_pcm_rx_sample_rate_put),
3747 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3748 aux_pcm_tx_sample_rate_get,
3749 aux_pcm_tx_sample_rate_put),
3750 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3751 aux_pcm_tx_sample_rate_get,
3752 aux_pcm_tx_sample_rate_put),
3753 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3754 aux_pcm_tx_sample_rate_get,
3755 aux_pcm_tx_sample_rate_put),
3756 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3757 aux_pcm_tx_sample_rate_get,
3758 aux_pcm_tx_sample_rate_put),
3759 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3760 aux_pcm_tx_sample_rate_get,
3761 aux_pcm_tx_sample_rate_put),
3762 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3763 mi2s_rx_sample_rate_get,
3764 mi2s_rx_sample_rate_put),
3765 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3766 mi2s_rx_sample_rate_get,
3767 mi2s_rx_sample_rate_put),
3768 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3769 mi2s_rx_sample_rate_get,
3770 mi2s_rx_sample_rate_put),
3771 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3772 mi2s_rx_sample_rate_get,
3773 mi2s_rx_sample_rate_put),
3774 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3775 mi2s_rx_sample_rate_get,
3776 mi2s_rx_sample_rate_put),
3777 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3778 mi2s_tx_sample_rate_get,
3779 mi2s_tx_sample_rate_put),
3780 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3781 mi2s_tx_sample_rate_get,
3782 mi2s_tx_sample_rate_put),
3783 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3784 mi2s_tx_sample_rate_get,
3785 mi2s_tx_sample_rate_put),
3786 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3787 mi2s_tx_sample_rate_get,
3788 mi2s_tx_sample_rate_put),
3789 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3790 mi2s_tx_sample_rate_get,
3791 mi2s_tx_sample_rate_put),
3792 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3793 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3794 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3795 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3796 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3797 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3798 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3799 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3800 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3801 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3802 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3803 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3804 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3805 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3806 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3807 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3808 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3809 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3810 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3811 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3812 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3813 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3814 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3815 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3816 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3817 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3818 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3819 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3820 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3821 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3822 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3823 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3824 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3825 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3826 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3827 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3828 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3829 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3830 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3831 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3832 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3833 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3834 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3835 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3836 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3837 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3838 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3839 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3840 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3841 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3842 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3843 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3844 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3845 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3846 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3847 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3848 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3849 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3850 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3851 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3852 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3853 msm_hifi_put),
3854 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3855 msm_bt_sample_rate_get,
3856 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3857 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3858 msm_bt_sample_rate_rx_get,
3859 msm_bt_sample_rate_rx_put),
3860 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3861 msm_bt_sample_rate_tx_get,
3862 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3863 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3864 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3865};
3866
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3867static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3868 int enable, bool dapm)
3869{
3870 int ret = 0;
3871
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3872 if (!strcmp(component->name, "tavil_codec")) {
3873 ret = tavil_cdc_mclk_enable(component, enable);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3874 } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
3875 ret = tasha_cdc_mclk_enable(component, enable, dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3876 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3877 dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3878 __func__);
3879 ret = -EINVAL;
3880 }
3881 return ret;
3882}
3883
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3884static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3885 int enable, bool dapm)
3886{
3887 int ret = 0;
3888
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3889 if (!strcmp(component->name, "tavil_codec")) {
3890 ret = tavil_cdc_mclk_tx_enable(component, enable);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3891 } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
3892 ret = tasha_cdc_mclk_tx_enable(component, enable, dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3893 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3894 dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3895 __func__);
3896 ret = -EINVAL;
3897 }
3898
3899 return ret;
3900}
3901
3902static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3903 struct snd_kcontrol *kcontrol, int event)
3904{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3905 struct snd_soc_component *component =
3906 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3907
3908 pr_debug("%s: event = %d\n", __func__, event);
3909
3910 switch (event) {
3911 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3912 return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3913 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3914 return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3915 }
3916 return 0;
3917}
3918
3919static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3920 struct snd_kcontrol *kcontrol, int event)
3921{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3922 struct snd_soc_component *component =
3923 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3924
3925 pr_debug("%s: event = %d\n", __func__, event);
3926
3927 switch (event) {
3928 case SND_SOC_DAPM_PRE_PMU:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3929 return msm_snd_enable_codec_ext_clk(component, 1, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3930 case SND_SOC_DAPM_POST_PMD:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3931 return msm_snd_enable_codec_ext_clk(component, 0, true);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3932 }
3933 return 0;
3934}
3935
3936static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3937 struct snd_kcontrol *k, int event)
3938{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3939 struct snd_soc_component *component =
3940 snd_soc_dapm_to_component(w->dapm);
3941 struct snd_soc_card *card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3942 struct msm_asoc_mach_data *pdata =
3943 snd_soc_card_get_drvdata(card);
3944
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3945 dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3946 __func__, msm_hifi_control);
3947
3948 if (!pdata || !pdata->hph_en0_gpio_p) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3949 dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
3950 __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3951 return -EINVAL;
3952 }
3953
3954 if (msm_hifi_control != MSM_HIFI_ON) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]3955 dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3956 __func__);
3957 return 0;
3958 }
3959
3960 switch (event) {
3961 case SND_SOC_DAPM_POST_PMU:
3962 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3963 break;
3964 case SND_SOC_DAPM_PRE_PMD:
3965 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3966 break;
3967 }
3968
3969 return 0;
3970}
3971
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3972static const struct snd_soc_dapm_widget msm_ext_dapm_widgets[] = {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3973
3974 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3975 msm_mclk_event,
3976 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3977
3978 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3979 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3980
3981 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3982 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3983 SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
3984 SND_SOC_DAPM_SPK("Lineout_4 amp", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3985 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3986 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3987 SND_SOC_DAPM_MIC("Headset Mic", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3988 SND_SOC_DAPM_MIC("Secondary Mic", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3989 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3990 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3991 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3992 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]3993 SND_SOC_DAPM_MIC("Analog Mic6", NULL),
3994 SND_SOC_DAPM_MIC("Analog Mic7", NULL),
3995 SND_SOC_DAPM_MIC("Analog Mic8", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3996
3997 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3998 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3999 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
4000 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
4001 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
4002 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4003 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4004};
4005
4006static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4007 struct snd_kcontrol *kcontrol, int event)
4008{
4009 struct msm_asoc_mach_data *pdata = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4010 struct snd_soc_component *component =
4011 snd_soc_dapm_to_component(w->dapm);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4012 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4013 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4014 int *dmic_gpio_cnt;
4015 struct device_node *dmic_gpio;
4016 char *wname;
4017
4018 wname = strpbrk(w->name, "0123");
4019 if (!wname) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4020 dev_err(component->dev, "%s: widget not found\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4021 return -EINVAL;
4022 }
4023
4024 ret = kstrtouint(wname, 10, &dmic_idx);
4025 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4026 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4027 __func__);
4028 return -EINVAL;
4029 }
4030
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4031 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4032
4033 switch (dmic_idx) {
4034 case 0:
4035 case 1:
4036 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4037 dmic_gpio = pdata->dmic01_gpio_p;
4038 break;
4039 case 2:
4040 case 3:
4041 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4042 dmic_gpio = pdata->dmic23_gpio_p;
4043 break;
4044 default:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4045 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4046 __func__);
4047 return -EINVAL;
4048 }
4049
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4050 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4051 __func__, event, dmic_idx, *dmic_gpio_cnt);
4052
4053 switch (event) {
4054 case SND_SOC_DAPM_PRE_PMU:
4055 (*dmic_gpio_cnt)++;
4056 if (*dmic_gpio_cnt == 1) {
4057 ret = msm_cdc_pinctrl_select_active_state(
4058 dmic_gpio);
4059 if (ret < 0) {
4060 pr_err("%s: gpio set cannot be activated %sd",
4061 __func__, "dmic_gpio");
4062 return ret;
4063 }
4064 }
4065
4066 break;
4067 case SND_SOC_DAPM_POST_PMD:
4068 (*dmic_gpio_cnt)--;
4069 if (*dmic_gpio_cnt == 0) {
4070 ret = msm_cdc_pinctrl_select_sleep_state(
4071 dmic_gpio);
4072 if (ret < 0) {
4073 pr_err("%s: gpio set cannot be de-activated %sd",
4074 __func__, "dmic_gpio");
4075 return ret;
4076 }
4077 }
4078 break;
4079 default:
4080 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4081 return -EINVAL;
4082 }
4083 return 0;
4084}
4085
4086static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4087 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4088 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4089 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4090 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4091 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4092 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4093 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4094 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4095};
4096
4097static inline int param_is_mask(int p)
4098{
4099 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4100 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4101}
4102
4103static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4104 int n)
4105{
4106 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4107}
4108
4109static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4110 unsigned int bit)
4111{
4112 if (bit >= SNDRV_MASK_MAX)
4113 return;
4114 if (param_is_mask(n)) {
4115 struct snd_mask *m = param_to_mask(p, n);
4116
4117 m->bits[0] = 0;
4118 m->bits[1] = 0;
4119 m->bits[bit >> 5] |= (1 << (bit & 31));
4120 }
4121}
4122
4123static int msm_slim_get_ch_from_beid(int32_t be_id)
4124{
4125 int ch_id = 0;
4126
4127 switch (be_id) {
4128 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4129 ch_id = SLIM_RX_0;
4130 break;
4131 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4132 ch_id = SLIM_RX_1;
4133 break;
4134 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4135 ch_id = SLIM_RX_2;
4136 break;
4137 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4138 ch_id = SLIM_RX_3;
4139 break;
4140 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4141 ch_id = SLIM_RX_4;
4142 break;
4143 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4144 ch_id = SLIM_RX_6;
4145 break;
4146 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4147 ch_id = SLIM_TX_0;
4148 break;
4149 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4150 ch_id = SLIM_TX_3;
4151 break;
4152 default:
4153 ch_id = SLIM_RX_0;
4154 break;
4155 }
4156
4157 return ch_id;
4158}
4159
4160static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4161{
4162 int idx = 0;
4163
4164 switch (be_id) {
4165 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4166 idx = WSA_CDC_DMA_RX_0;
4167 break;
4168 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4169 idx = WSA_CDC_DMA_TX_0;
4170 break;
4171 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4172 idx = WSA_CDC_DMA_RX_1;
4173 break;
4174 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4175 idx = WSA_CDC_DMA_TX_1;
4176 break;
4177 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4178 idx = WSA_CDC_DMA_TX_2;
4179 break;
4180 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4181 idx = RX_CDC_DMA_RX_0;
4182 break;
4183 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4184 idx = RX_CDC_DMA_RX_1;
4185 break;
4186 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4187 idx = RX_CDC_DMA_RX_2;
4188 break;
4189 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4190 idx = RX_CDC_DMA_RX_3;
4191 break;
4192 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4193 idx = RX_CDC_DMA_RX_5;
4194 break;
4195 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4196 idx = TX_CDC_DMA_TX_0;
4197 break;
4198 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4199 idx = TX_CDC_DMA_TX_3;
4200 break;
4201 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4202 idx = TX_CDC_DMA_TX_4;
4203 break;
4204 default:
4205 idx = RX_CDC_DMA_RX_0;
4206 break;
4207 }
4208
4209 return idx;
4210}
4211
4212static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4213{
4214 int idx = -EINVAL;
4215
4216 switch (be_id) {
4217 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4218 idx = DP_RX_IDX;
4219 break;
4220 default:
4221 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4222 idx = -EINVAL;
4223 break;
4224 }
4225
4226 return idx;
4227}
4228
4229static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4230 struct snd_pcm_hw_params *params)
4231{
4232 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4233 struct snd_interval *rate = hw_param_interval(params,
4234 SNDRV_PCM_HW_PARAM_RATE);
4235 struct snd_interval *channels = hw_param_interval(params,
4236 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4237 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4238
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4239 int rc = 0;
4240 int idx;
4241 void *config = NULL;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4242 struct snd_soc_component *component = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4243
4244 pr_debug("%s: format = %d, rate = %d\n",
4245 __func__, params_format(params), params_rate(params));
4246
4247 switch (dai_link->id) {
4248 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4249 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4250 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4251 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4252 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4253 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4254 idx = msm_slim_get_ch_from_beid(dai_link->id);
4255 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4256 slim_rx_cfg[idx].bit_format);
4257 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4258 channels->min = channels->max = slim_rx_cfg[idx].channels;
4259 break;
4260
4261 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4262 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4263 idx = msm_slim_get_ch_from_beid(dai_link->id);
4264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4265 slim_tx_cfg[idx].bit_format);
4266 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4267 channels->min = channels->max = slim_tx_cfg[idx].channels;
4268 break;
4269
4270 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4271 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4272 slim_tx_cfg[1].bit_format);
4273 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4274 channels->min = channels->max = slim_tx_cfg[1].channels;
4275 break;
4276
4277 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4278 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4279 SNDRV_PCM_FORMAT_S32_LE);
4280 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4281 channels->min = channels->max = msm_vi_feed_tx_ch;
4282 break;
4283
4284 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4285 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4286 slim_rx_cfg[5].bit_format);
4287 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4288 channels->min = channels->max = slim_rx_cfg[5].channels;
4289 break;
4290
4291 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4292 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4293 if (!component) {
4294 pr_err("%s: component is NULL\n", __func__);
4295 rc = -EINVAL;
4296 goto done;
4297 }
4298
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4299 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4300 channels->min = channels->max = 1;
4301
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4302 config = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4303 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4304 if (config) {
4305 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4306 config, SLIMBUS_5_TX);
4307 if (rc)
4308 pr_err("%s: Failed to set slimbus slave port config %d\n",
4309 __func__, rc);
4310 }
4311 break;
4312
4313 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4314 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4315 slim_rx_cfg[SLIM_RX_7].bit_format);
4316 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4317 channels->min = channels->max =
4318 slim_rx_cfg[SLIM_RX_7].channels;
4319 break;
4320
4321 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4322 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4323 channels->min = channels->max =
4324 slim_tx_cfg[SLIM_TX_7].channels;
4325 break;
4326
4327 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4328 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4329 channels->min = channels->max =
4330 slim_tx_cfg[SLIM_TX_8].channels;
4331 break;
4332
4333 case MSM_BACKEND_DAI_USB_RX:
4334 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4335 usb_rx_cfg.bit_format);
4336 rate->min = rate->max = usb_rx_cfg.sample_rate;
4337 channels->min = channels->max = usb_rx_cfg.channels;
4338 break;
4339
4340 case MSM_BACKEND_DAI_USB_TX:
4341 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4342 usb_tx_cfg.bit_format);
4343 rate->min = rate->max = usb_tx_cfg.sample_rate;
4344 channels->min = channels->max = usb_tx_cfg.channels;
4345 break;
4346
4347 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4348 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4349 if (idx < 0) {
4350 pr_err("%s: Incorrect ext disp idx %d\n",
4351 __func__, idx);
4352 rc = idx;
4353 goto done;
4354 }
4355
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 ext_disp_rx_cfg[idx].bit_format);
4358 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4359 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_AFE_PCM_RX:
4363 channels->min = channels->max = proxy_rx_cfg.channels;
4364 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4365 break;
4366
4367 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4368 channels->min = channels->max =
4369 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4370 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4371 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4372 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4373 break;
4374
4375 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4376 channels->min = channels->max =
4377 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4378 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4379 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4380 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4381 break;
4382
4383 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4384 channels->min = channels->max =
4385 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4386 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4387 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4388 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4389 break;
4390
4391 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4392 channels->min = channels->max =
4393 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4394 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4395 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4396 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4397 break;
4398
4399 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4400 channels->min = channels->max =
4401 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4402 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4403 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4404 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4405 break;
4406
4407 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4408 channels->min = channels->max =
4409 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4410 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4411 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4412 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4413 break;
4414
4415 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4416 channels->min = channels->max =
4417 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4418 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4419 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4420 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4421 break;
4422
4423 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4424 channels->min = channels->max =
4425 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4426 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4427 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4428 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4429 break;
4430
4431 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4432 channels->min = channels->max =
4433 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4434 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4435 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4436 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4437 break;
4438
4439 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4440 channels->min = channels->max =
4441 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4442 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4443 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4444 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4445 break;
4446
4447
4448 case MSM_BACKEND_DAI_AUXPCM_RX:
4449 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4450 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4451 rate->min = rate->max =
4452 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4453 channels->min = channels->max =
4454 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4455 break;
4456
4457 case MSM_BACKEND_DAI_AUXPCM_TX:
4458 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4459 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4460 rate->min = rate->max =
4461 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4462 channels->min = channels->max =
4463 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4464 break;
4465
4466 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4467 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4468 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4469 rate->min = rate->max =
4470 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4471 channels->min = channels->max =
4472 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4473 break;
4474
4475 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4476 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4477 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4478 rate->min = rate->max =
4479 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4480 channels->min = channels->max =
4481 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4482 break;
4483
4484 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4485 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4486 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4487 rate->min = rate->max =
4488 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4489 channels->min = channels->max =
4490 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4491 break;
4492
4493 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4494 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4495 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4496 rate->min = rate->max =
4497 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4498 channels->min = channels->max =
4499 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4500 break;
4501
4502 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4503 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4504 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4505 rate->min = rate->max =
4506 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4507 channels->min = channels->max =
4508 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4509 break;
4510
4511 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4512 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4513 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4514 rate->min = rate->max =
4515 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4516 channels->min = channels->max =
4517 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4518 break;
4519
4520 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4522 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4523 rate->min = rate->max =
4524 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4525 channels->min = channels->max =
4526 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4527 break;
4528
4529 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4530 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4531 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4532 rate->min = rate->max =
4533 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4534 channels->min = channels->max =
4535 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4536 break;
4537
4538 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4539 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4540 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4541 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4542 channels->min = channels->max =
4543 mi2s_rx_cfg[PRIM_MI2S].channels;
4544 break;
4545
4546 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4547 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4548 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4549 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4550 channels->min = channels->max =
4551 mi2s_tx_cfg[PRIM_MI2S].channels;
4552 break;
4553
4554 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4555 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4556 mi2s_rx_cfg[SEC_MI2S].bit_format);
4557 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4558 channels->min = channels->max =
4559 mi2s_rx_cfg[SEC_MI2S].channels;
4560 break;
4561
4562 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4563 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4564 mi2s_tx_cfg[SEC_MI2S].bit_format);
4565 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4566 channels->min = channels->max =
4567 mi2s_tx_cfg[SEC_MI2S].channels;
4568 break;
4569
4570 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4571 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4572 mi2s_rx_cfg[TERT_MI2S].bit_format);
4573 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4574 channels->min = channels->max =
4575 mi2s_rx_cfg[TERT_MI2S].channels;
4576 break;
4577
4578 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4579 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4580 mi2s_tx_cfg[TERT_MI2S].bit_format);
4581 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4582 channels->min = channels->max =
4583 mi2s_tx_cfg[TERT_MI2S].channels;
4584 break;
4585
4586 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4587 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4588 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4589 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4590 channels->min = channels->max =
4591 mi2s_rx_cfg[QUAT_MI2S].channels;
4592 break;
4593
4594 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4595 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4596 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4597 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4598 channels->min = channels->max =
4599 mi2s_tx_cfg[QUAT_MI2S].channels;
4600 break;
4601
4602 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4603 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4604 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4605 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4606 channels->min = channels->max =
4607 mi2s_rx_cfg[QUIN_MI2S].channels;
4608 break;
4609
4610 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4611 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4612 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4613 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4614 channels->min = channels->max =
4615 mi2s_tx_cfg[QUIN_MI2S].channels;
4616 break;
4617
4618 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4619 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4620 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4621 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4622 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4623 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4624 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4625 cdc_dma_rx_cfg[idx].bit_format);
4626 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4627 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4628 break;
4629
4630 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4631 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4632 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4633 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4634 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4635 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4636 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4637 cdc_dma_tx_cfg[idx].bit_format);
4638 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4639 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4640 break;
4641
4642 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4643 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4644 SNDRV_PCM_FORMAT_S32_LE);
4645 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4646 channels->min = channels->max = msm_vi_feed_tx_ch;
4647 break;
4648
4649 default:
4650 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4651 break;
4652 }
4653
4654done:
4655 return rc;
4656}
4657
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4658static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
4659 bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4660{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4661 struct snd_soc_card *card = component->card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4662 struct msm_asoc_mach_data *pdata =
4663 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4664
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4665 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4666 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4667
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4668 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4669}
4670
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4671static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4672{
4673 int value = 0;
4674 bool ret = false;
4675 struct snd_soc_card *card;
4676 struct msm_asoc_mach_data *pdata;
4677
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4678 if (!component) {
4679 pr_err("%s component is NULL\n", __func__);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4680 return false;
4681 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4682 card = component->card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4683 pdata = snd_soc_card_get_drvdata(card);
4684
4685 if (!pdata)
4686 return false;
4687
4688 if (wcd_mbhc_cfg.enable_usbc_analog)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4689 return msm_usbc_swap_gnd_mic(component, active);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4690
4691 /* if usbc is not defined, swap using us_euro_gpio_p */
4692 if (pdata->us_euro_gpio_p) {
4693 value = msm_cdc_pinctrl_get_state(
4694 pdata->us_euro_gpio_p);
4695 if (value)
4696 msm_cdc_pinctrl_select_sleep_state(
4697 pdata->us_euro_gpio_p);
4698 else
4699 msm_cdc_pinctrl_select_active_state(
4700 pdata->us_euro_gpio_p);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4701 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4702 __func__, value, !value);
4703 ret = true;
4704 }
4705 return ret;
4706}
4707
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4708static int msm_afe_set_config(struct snd_soc_component *component)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4709{
4710 int ret = 0;
4711 void *config_data = NULL;
4712
4713 if (!msm_codec_fn.get_afe_config_fn) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4714 dev_err(component->dev, "%s: codec get afe config not init'ed\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4715 __func__);
4716 return -EINVAL;
4717 }
4718
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4719 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4720 AFE_CDC_REGISTERS_CONFIG);
4721 if (config_data) {
4722 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4723 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4724 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4725 "%s: Failed to set codec registers config %d\n",
4726 __func__, ret);
4727 return ret;
4728 }
4729 }
4730
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4731 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4732 AFE_CDC_REGISTER_PAGE_CONFIG);
4733 if (config_data) {
4734 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4735 0);
4736 if (ret)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4737 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4738 "%s: Failed to set cdc register page config\n",
4739 __func__);
4740 }
4741
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4742 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4743 AFE_SLIMBUS_SLAVE_CONFIG);
4744 if (config_data) {
4745 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4746 if (ret) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4747 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4748 "%s: Failed to set slimbus slave config %d\n",
4749 __func__, ret);
4750 return ret;
4751 }
4752 }
4753
4754 return 0;
4755}
4756
4757static void msm_afe_clear_config(void)
4758{
4759 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4760 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4761}
4762
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4763static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4764{
4765 int ret = 0;
4766 void *config_data;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4767 struct snd_soc_component *component = NULL;
4768 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4769 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4770 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4771 struct snd_soc_component *aux_comp;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4772 struct snd_card *card = rtd->card->snd_card;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4773 struct snd_info_entry *entry;
4774 struct msm_asoc_mach_data *pdata =
4775 snd_soc_card_get_drvdata(rtd->card);
4776
4777 /*
4778 * Codec SLIMBUS configuration
4779 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4780 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4781 * TX14, TX15, TX16
4782 */
4783 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4784 150, 151};
4785 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4786 134, 135, 136, 137, 138, 139,
4787 140, 141, 142, 143};
4788
4789 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4790
4791 rtd->pmdown_time = 0;
4792
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4793 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
4794 if (!component) {
4795 pr_err("%s: component is NULL\n", __func__);
4796 return -EINVAL;
4797 }
4798 dapm = snd_soc_component_get_dapm(component);
4799
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4800 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
4801 ARRAY_SIZE(msm_ext_snd_controls));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4802 if (ret < 0) {
4803 pr_err("%s: add_codec_controls failed, err %d\n",
4804 __func__, ret);
4805 return ret;
4806 }
4807
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4808 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4809 ARRAY_SIZE(msm_common_snd_controls));
4810 if (ret < 0) {
4811 pr_err("%s: add_codec_controls failed, err %d\n",
4812 __func__, ret);
4813 return ret;
4814 }
4815
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4816 snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
4817 ARRAY_SIZE(msm_ext_dapm_widgets));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4818
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4819 snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
4820 ARRAY_SIZE(wcd_audio_paths));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4821
4822 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4823 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4824 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4825 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4826 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4827 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4828 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4829 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4830 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4831 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4832 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4833 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4834 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4835 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4836 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4837 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4838 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4839 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4840 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4841 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4842 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4843 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4844 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4845 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4846 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4847 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4848 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4849
4850 snd_soc_dapm_sync(dapm);
4851
4852 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4853 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4854
4855 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4856
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4857 ret = msm_afe_set_config(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4858 if (ret) {
4859 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4860 goto err;
4861 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4862 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4863
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4864 config_data = msm_codec_fn.get_afe_config_fn(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4865 AFE_AANC_VERSION);
4866 if (config_data) {
4867 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4868 if (ret) {
4869 pr_err("%s: Failed to set aanc version %d\n",
4870 __func__, ret);
4871 goto err;
4872 }
4873 }
4874
4875 /*
4876 * Send speaker configuration only for WSA8810.
4877 * Default configuration is for WSA8815.
4878 */
4879 pr_debug("%s: Number of aux devices: %d\n",
4880 __func__, rtd->card->num_aux_devs);
4881 if (rtd->card->num_aux_devs &&
4882 !list_empty(&rtd->card->aux_comp_list)) {
4883 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4884 struct snd_soc_component, card_aux_list);
4885 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4886 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4887 tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
4888 tavil_set_spkr_gain_offset(component,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4889 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4890 }
4891 }
4892
4893 card = rtd->card->snd_card;
Aditya Bavanari5b2d30f2019-01-28 20:17:32 +0530[diff] [blame]4894 if (!pdata->codec_root) {
4895 entry = snd_info_create_subdir(card->module, "codecs",
4896 card->proc_root);
4897 if (!entry) {
4898 pr_debug("%s: Cannot create codecs module entry\n",
4899 __func__);
4900 ret = 0;
4901 goto err;
4902 }
4903 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4904 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]4905 tavil_codec_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4906
4907 codec_reg_done = true;
4908 return 0;
4909err:
4910 return ret;
4911}
4912
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]4913static int msm_audrx_tasha_init(struct snd_soc_pcm_runtime *rtd)
4914{
4915 int ret = 0;
4916 void *config_data;
4917 struct snd_soc_component *component = NULL;
4918 struct snd_soc_dapm_context *dapm;
4919 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4920 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4921 struct snd_soc_component *aux_comp;
4922 struct snd_card *card;
4923 struct snd_info_entry *entry;
4924 struct msm_asoc_mach_data *pdata =
4925 snd_soc_card_get_drvdata(rtd->card);
4926
4927 /* Codec SLIMBUS configuration
4928 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
4929 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4930 * TX14, TX15, TX16
4931 */
4932 unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
4933 151, 152, 153, 154, 155, 156};
4934 unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
4935 134, 135, 136, 137, 138, 139,
4936 140, 141, 142, 143};
4937
4938 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4939
4940 rtd->pmdown_time = 0;
4941
4942 component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
4943 if (!component) {
4944 pr_err("%s: component is NULL\n", __func__);
4945 return -EINVAL;
4946 }
4947
4948 dapm = snd_soc_component_get_dapm(component);
4949
4950 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
4951 ARRAY_SIZE(msm_ext_snd_controls));
4952 if (ret < 0) {
4953 pr_err("%s: add_component_controls failed, err %d\n",
4954 __func__, ret);
4955 return ret;
4956 }
4957
4958 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4959 ARRAY_SIZE(msm_common_snd_controls));
4960 if (ret < 0) {
4961 pr_err("%s: add_component_controls failed, err %d\n",
4962 __func__, ret);
4963 return ret;
4964 }
4965
4966 snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
4967 ARRAY_SIZE(msm_ext_dapm_widgets));
4968
4969 snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
4970 ARRAY_SIZE(wcd_audio_paths));
4971
4972 snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp");
4973 snd_soc_dapm_enable_pin(dapm, "Lineout_2 amp");
4974 snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp");
4975 snd_soc_dapm_enable_pin(dapm, "Lineout_4 amp");
4976
4977 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4978 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4979 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4980 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4981 snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
4982 snd_soc_dapm_ignore_suspend(dapm, "Lineout_1 amp");
4983 snd_soc_dapm_ignore_suspend(dapm, "Lineout_2 amp");
4984 snd_soc_dapm_ignore_suspend(dapm, "Lineout_3 amp");
4985 snd_soc_dapm_ignore_suspend(dapm, "Lineout_4 amp");
4986 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4987 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4988 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4989 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4990 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4991 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4992 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4993 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4994 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4995 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6");
4996 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic7");
4997 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic8");
4998
4999 snd_soc_dapm_ignore_suspend(dapm, "EAR");
5000 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
5001 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
5002 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
5003 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
5004 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
5005 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
5006 snd_soc_dapm_ignore_suspend(dapm, "AMIC5");
5007 snd_soc_dapm_ignore_suspend(dapm, "DMIC0");
5008 snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
5009 snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
5010 snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
5011 snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
5012 snd_soc_dapm_ignore_suspend(dapm, "DMIC5");
5013 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
5014 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
5015 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
5016 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
5017 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
5018 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
5019 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
5020
5021 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3");
5022 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4");
5023 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
5024 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
5025 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1");
5026 snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2");
5027
5028 snd_soc_dapm_sync(dapm);
5029
5030 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5031 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5032
5033 msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
5034
5035 ret = msm_afe_set_config(component);
5036 if (ret) {
5037 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
5038 goto err;
5039 }
5040 pdata->is_afe_config_done = true;
5041
5042 config_data = msm_codec_fn.get_afe_config_fn(component,
5043 AFE_AANC_VERSION);
5044 if (config_data) {
5045 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
5046 if (ret) {
5047 pr_err("%s: Failed to set aanc version %d\n",
5048 __func__, ret);
5049 goto err;
5050 }
5051 }
5052
5053 /*
5054 * Send speaker configuration only for WSA8810.
5055 * Default configuration is for WSA8815.
5056 */
5057 pr_debug("%s: Number of aux devices: %d\n",
5058 __func__, rtd->card->num_aux_devs);
5059 if (rtd->card->num_aux_devs &&
5060 !list_empty(&rtd->card->aux_comp_list)) {
5061 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
5062 struct snd_soc_component, card_aux_list);
5063 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5064 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
5065 tasha_set_spkr_mode(component, SPKR_MODE_1);
5066 tasha_set_spkr_gain_offset(component,
5067 RX_GAIN_OFFSET_M1P5_DB);
5068 }
5069 }
5070
5071 card = rtd->card->snd_card;
Aditya Bavanari5b2d30f2019-01-28 20:17:32 +0530[diff] [blame]5072 if (!pdata->codec_root) {
5073 entry = snd_info_create_subdir(card->module, "codecs",
5074 card->proc_root);
5075 if (!entry) {
5076 pr_debug("%s: Cannot create codecs module entry\n",
5077 __func__);
5078 ret = 0;
5079 goto err;
5080 }
5081 pdata->codec_root = entry;
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5082 }
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5083 tasha_codec_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5084
5085 codec_reg_done = true;
5086 return 0;
5087err:
5088 return ret;
5089}
5090
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5091static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5092{
5093 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5094 struct snd_soc_component *component;
5095 struct snd_soc_dapm_context *dapm;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5096 struct snd_card *card;
5097 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5098 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5099 struct msm_asoc_mach_data *pdata =
5100 snd_soc_card_get_drvdata(rtd->card);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5101 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5102
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5103 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5104 if (!component) {
5105 pr_err("%s: component is NULL\n", __func__);
5106 return -EINVAL;
5107 }
5108 dapm = snd_soc_component_get_dapm(component);
5109
5110 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5111 ARRAY_SIZE(msm_int_snd_controls));
5112 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5113 pr_err("%s: add_component_controls failed: %d\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5114 __func__, ret);
5115 return ret;
5116 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5117 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5118 ARRAY_SIZE(msm_common_snd_controls));
5119 if (ret < 0) {
5120 pr_err("%s: add common snd controls failed: %d\n",
5121 __func__, ret);
5122 return ret;
5123 }
5124
5125 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5126 ARRAY_SIZE(msm_int_dapm_widgets));
5127
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5128 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5129 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5130 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5131 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5132
5133 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5134 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5135 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5136 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
5137
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5138 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5139 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5140 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5141 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5142
5143 snd_soc_dapm_sync(dapm);
5144
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5145 /*
5146 * Send speaker configuration only for WSA8810.
5147 * Default configuration is for WSA8815.
5148 */
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5149 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5150 __func__, rtd->card->num_aux_devs);
5151 if (rtd->card->num_aux_devs &&
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5152 !list_empty(&rtd->card->aux_comp_list)) {
5153 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
5154 struct snd_soc_component, card_aux_list);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5155 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5156 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5157 wsa_macro_set_spkr_mode(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5158 WSA_MACRO_SPKR_MODE_1);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5159 wsa_macro_set_spkr_gain_offset(component,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]5160 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5161 }
5162 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5163 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]5164 if (!pdata->codec_root) {
5165 entry = snd_info_create_subdir(card->module, "codecs",
5166 card->proc_root);
5167 if (!entry) {
5168 pr_debug("%s: Cannot create codecs module entry\n",
5169 __func__);
5170 ret = 0;
5171 goto err;
5172 }
5173 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5174 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5175 bolero_info_create_codec_entry(pdata->codec_root, codec);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5176 /*
5177 * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
5178 * from AOSS to APSS. So, it uses SW workaround and listens to
5179 * interrupt from AFE over IPC.
5180 * Check for MSM version and MSM ID and register wake irq
5181 * accordingly to provide compatibility to all chipsets.
5182 */
5183 if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
5184 socinfo_get_version() == SM6150_SOC_VERSION_1_0)
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5185 bolero_register_wake_irq(component, true);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5186 else
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]5187 bolero_register_wake_irq(component, false);
Aditya Bavanari3e19f3c2018-11-12 19:29:50 +0530[diff] [blame]5188
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5189 codec_reg_done = true;
5190 return 0;
5191err:
5192 return ret;
5193}
5194
5195static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5196{
5197 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5198 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
5199 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5200
5201 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5202 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5203}
5204
5205static void *def_wcd_mbhc_cal(void)
5206{
5207 void *wcd_mbhc_cal;
5208 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5209 u16 *btn_high;
5210
5211 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5212 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5213 if (!wcd_mbhc_cal)
5214 return NULL;
5215
5216#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5217 S(v_hs_max, 1600);
5218#undef S
5219#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5220 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5221#undef S
5222
5223 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5224 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5225 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5226
5227 btn_high[0] = 75;
5228 btn_high[1] = 150;
5229 btn_high[2] = 237;
5230 btn_high[3] = 500;
5231 btn_high[4] = 500;
5232 btn_high[5] = 500;
5233 btn_high[6] = 500;
5234 btn_high[7] = 500;
5235
5236 return wcd_mbhc_cal;
5237}
5238
5239static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5240 struct snd_pcm_hw_params *params)
5241{
5242 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5243 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5244 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5245 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5246
5247 int ret = 0;
5248 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5249 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5250 u32 user_set_tx_ch = 0;
5251 u32 rx_ch_count;
5252
5253 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5254 ret = snd_soc_dai_get_channel_map(codec_dai,
5255 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5256 if (ret < 0) {
5257 pr_err("%s: failed to get codec chan map, err:%d\n",
5258 __func__, ret);
5259 goto err;
5260 }
5261 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5262 pr_debug("%s: rx_5_ch=%d\n", __func__,
5263 slim_rx_cfg[5].channels);
5264 rx_ch_count = slim_rx_cfg[5].channels;
5265 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5266 pr_debug("%s: rx_2_ch=%d\n", __func__,
5267 slim_rx_cfg[2].channels);
5268 rx_ch_count = slim_rx_cfg[2].channels;
5269 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5270 pr_debug("%s: rx_6_ch=%d\n", __func__,
5271 slim_rx_cfg[6].channels);
5272 rx_ch_count = slim_rx_cfg[6].channels;
5273 } else {
5274 pr_debug("%s: rx_0_ch=%d\n", __func__,
5275 slim_rx_cfg[0].channels);
5276 rx_ch_count = slim_rx_cfg[0].channels;
5277 }
5278 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5279 rx_ch_count, rx_ch);
5280 if (ret < 0) {
5281 pr_err("%s: failed to set cpu chan map, err:%d\n",
5282 __func__, ret);
5283 goto err;
5284 }
5285 } else {
5286
5287 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5288 codec_dai->name, codec_dai->id, user_set_tx_ch);
5289 ret = snd_soc_dai_get_channel_map(codec_dai,
5290 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5291 if (ret < 0) {
5292 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5293 __func__, ret);
5294 goto err;
5295 }
5296 /* For <codec>_tx1 case */
5297 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5298 user_set_tx_ch = slim_tx_cfg[0].channels;
5299 /* For <codec>_tx3 case */
5300 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5301 user_set_tx_ch = slim_tx_cfg[1].channels;
5302 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5303 user_set_tx_ch = msm_vi_feed_tx_ch;
5304 else
5305 user_set_tx_ch = tx_ch_cnt;
5306
5307 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5308 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5309 tx_ch_cnt, dai_link->id);
5310
5311 ret = snd_soc_dai_set_channel_map(cpu_dai,
5312 user_set_tx_ch, tx_ch, 0, 0);
5313 if (ret < 0)
5314 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5315 __func__, ret);
5316 }
5317
5318err:
5319 return ret;
5320}
5321
5322
5323static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5324 struct snd_pcm_hw_params *params)
5325{
5326 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5327 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5328 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5329 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5330
5331 int ret = 0;
5332 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5333 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5334 u32 user_set_tx_ch = 0;
5335 u32 user_set_rx_ch = 0;
5336 u32 ch_id;
5337
5338 ret = snd_soc_dai_get_channel_map(codec_dai,
5339 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5340 &rx_ch_cdc_dma);
5341 if (ret < 0) {
5342 pr_err("%s: failed to get codec chan map, err:%d\n",
5343 __func__, ret);
5344 goto err;
5345 }
5346
5347 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5348 switch (dai_link->id) {
5349 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5350 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5351 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5352 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5353 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5354 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5355 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5356 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5357 {
5358 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5359 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5360 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5361 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5362 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5363 user_set_rx_ch, &rx_ch_cdc_dma);
5364 if (ret < 0) {
5365 pr_err("%s: failed to set cpu chan map, err:%d\n",
5366 __func__, ret);
5367 goto err;
5368 }
5369
5370 }
5371 break;
5372 }
5373 } else {
5374 switch (dai_link->id) {
5375 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5376 {
5377 user_set_tx_ch = msm_vi_feed_tx_ch;
5378 }
5379 break;
5380 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5381 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5382 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5383 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5384 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5385 {
5386 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5387 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5388 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5389 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5390 }
5391 break;
5392 }
5393
5394 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5395 &tx_ch_cdc_dma, 0, 0);
5396 if (ret < 0) {
5397 pr_err("%s: failed to set cpu chan map, err:%d\n",
5398 __func__, ret);
5399 goto err;
5400 }
5401 }
5402
5403err:
5404 return ret;
5405}
5406
5407static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5408 struct snd_pcm_hw_params *params)
5409{
5410 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5411 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5412 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5413 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5414 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5415 unsigned int num_tx_ch = 0;
5416 unsigned int num_rx_ch = 0;
5417 int ret = 0;
5418
5419 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5420 num_rx_ch = params_channels(params);
5421 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5422 codec_dai->name, codec_dai->id, num_rx_ch);
5423 ret = snd_soc_dai_get_channel_map(codec_dai,
5424 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5425 if (ret < 0) {
5426 pr_err("%s: failed to get codec chan map, err:%d\n",
5427 __func__, ret);
5428 goto err;
5429 }
5430 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5431 num_rx_ch, rx_ch);
5432 if (ret < 0) {
5433 pr_err("%s: failed to set cpu chan map, err:%d\n",
5434 __func__, ret);
5435 goto err;
5436 }
5437 } else {
5438 num_tx_ch = params_channels(params);
5439 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5440 codec_dai->name, codec_dai->id, num_tx_ch);
5441 ret = snd_soc_dai_get_channel_map(codec_dai,
5442 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5443 if (ret < 0) {
5444 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5445 __func__, ret);
5446 goto err;
5447 }
5448 ret = snd_soc_dai_set_channel_map(cpu_dai,
5449 num_tx_ch, tx_ch, 0, 0);
5450 if (ret < 0) {
5451 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5452 __func__, ret);
5453 goto err;
5454 }
5455 }
5456
5457err:
5458 return ret;
5459}
5460
5461static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5462 struct snd_pcm_hw_params *params)
5463{
5464 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5465 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5466 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5467 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5468 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5469 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5470 int ret;
5471
5472 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5473 codec_dai->name, codec_dai->id);
5474 ret = snd_soc_dai_get_channel_map(codec_dai,
5475 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5476 if (ret) {
5477 dev_err(rtd->dev,
5478 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5479 __func__, ret);
5480 goto err;
5481 }
5482
5483 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5484 __func__, tx_ch_cnt, dai_link->id);
5485
5486 ret = snd_soc_dai_set_channel_map(cpu_dai,
5487 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5488 if (ret)
5489 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5490 __func__, ret);
5491
5492err:
5493 return ret;
5494}
5495
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]5496int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream,
5497 struct snd_pcm_hw_params *params)
5498{
5499 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5500 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5501 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5502 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5503 int ret = 0;
5504 u32 tx_ch[SLIM_MAX_TX_PORTS];
5505 u32 tx_ch_cnt = 0;
5506
5507 if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) {
5508 pr_err("%s: Invalid stream type %d\n",
5509 __func__, substream->stream);
5510 ret = -EINVAL;
5511 goto end;
5512 }
5513
5514 pr_debug("%s: %s_tx_dai_id_%d\n", __func__,
5515 codec_dai->name, codec_dai->id);
5516 ret = snd_soc_dai_get_channel_map(codec_dai,
5517 &tx_ch_cnt, tx_ch, NULL, NULL);
5518 if (ret < 0) {
5519 pr_err("%s: failed to get codec chan map\n, err:%d\n",
5520 __func__, ret);
5521 goto end;
5522 }
5523
5524 pr_debug("%s: tx_ch_cnt(%d) id %d\n",
5525 __func__, tx_ch_cnt, dai_link->id);
5526
5527 ret = snd_soc_dai_set_channel_map(cpu_dai,
5528 tx_ch_cnt, tx_ch, 0, 0);
5529 if (ret < 0) {
5530 pr_err("%s: failed to set cpu chan map, err:%d\n",
5531 __func__, ret);
5532 goto end;
5533 }
5534end:
5535 return ret;
5536}
5537
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5538static int msm_get_port_id(int be_id)
5539{
5540 int afe_port_id;
5541
5542 switch (be_id) {
5543 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5544 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5545 break;
5546 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5547 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5548 break;
5549 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5550 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5551 break;
5552 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5553 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5554 break;
5555 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5556 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5557 break;
5558 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5559 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5560 break;
5561 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5562 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5563 break;
5564 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5565 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5566 break;
5567 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5568 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5569 break;
5570 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5571 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5572 break;
5573 default:
5574 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5575 afe_port_id = -EINVAL;
5576 }
5577
5578 return afe_port_id;
5579}
5580
5581static u32 get_mi2s_bits_per_sample(u32 bit_format)
5582{
5583 u32 bit_per_sample;
5584
5585 switch (bit_format) {
5586 case SNDRV_PCM_FORMAT_S32_LE:
5587 case SNDRV_PCM_FORMAT_S24_3LE:
5588 case SNDRV_PCM_FORMAT_S24_LE:
5589 bit_per_sample = 32;
5590 break;
5591 case SNDRV_PCM_FORMAT_S16_LE:
5592 default:
5593 bit_per_sample = 16;
5594 break;
5595 }
5596
5597 return bit_per_sample;
5598}
5599
5600static void update_mi2s_clk_val(int dai_id, int stream)
5601{
5602 u32 bit_per_sample;
5603
5604 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5605 bit_per_sample =
5606 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5607 mi2s_clk[dai_id].clk_freq_in_hz =
5608 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5609 } else {
5610 bit_per_sample =
5611 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5612 mi2s_clk[dai_id].clk_freq_in_hz =
5613 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5614 }
5615}
5616
5617static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5618{
5619 int ret = 0;
5620 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5621 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5622 int port_id = 0;
5623 int index = cpu_dai->id;
5624
5625 port_id = msm_get_port_id(rtd->dai_link->id);
5626 if (port_id < 0) {
5627 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5628 ret = port_id;
5629 goto err;
5630 }
5631
5632 if (enable) {
5633 update_mi2s_clk_val(index, substream->stream);
5634 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5635 mi2s_clk[index].clk_freq_in_hz);
5636 }
5637
5638 mi2s_clk[index].enable = enable;
5639 ret = afe_set_lpass_clock_v2(port_id,
5640 &mi2s_clk[index]);
5641 if (ret < 0) {
5642 dev_err(rtd->card->dev,
5643 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5644 __func__, port_id, ret);
5645 goto err;
5646 }
5647
5648err:
5649 return ret;
5650}
5651
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5652static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5653 struct snd_pcm_hw_params *params)
5654{
5655 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5656 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5657 int ret = 0;
5658 int slot_width = 32;
5659 int channels, slots;
5660 unsigned int slot_mask, rate, clk_freq;
5661 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5662
5663 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5664
5665 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5666 switch (cpu_dai->id) {
5667 case AFE_PORT_ID_PRIMARY_TDM_RX:
5668 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5669 break;
5670 case AFE_PORT_ID_SECONDARY_TDM_RX:
5671 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5672 break;
5673 case AFE_PORT_ID_TERTIARY_TDM_RX:
5674 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5675 break;
5676 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5677 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5678 break;
5679 case AFE_PORT_ID_QUINARY_TDM_RX:
5680 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5681 break;
5682 case AFE_PORT_ID_PRIMARY_TDM_TX:
5683 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5684 break;
5685 case AFE_PORT_ID_SECONDARY_TDM_TX:
5686 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5687 break;
5688 case AFE_PORT_ID_TERTIARY_TDM_TX:
5689 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5690 break;
5691 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5692 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5693 break;
5694 case AFE_PORT_ID_QUINARY_TDM_TX:
5695 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5696 break;
5697
5698 default:
5699 pr_err("%s: dai id 0x%x not supported\n",
5700 __func__, cpu_dai->id);
5701 return -EINVAL;
5702 }
5703
5704 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5705 /*2 slot config - bits 0 and 1 set for the first two slots */
5706 slot_mask = 0x0000FFFF >> (16-slots);
5707 channels = slots;
5708
5709 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5710 __func__, slot_width, slots);
5711
5712 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5713 slots, slot_width);
5714 if (ret < 0) {
5715 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5716 __func__, ret);
5717 goto end;
5718 }
5719
5720 ret = snd_soc_dai_set_channel_map(cpu_dai,
5721 0, NULL, channels, slot_offset);
5722 if (ret < 0) {
5723 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5724 __func__, ret);
5725 goto end;
5726 }
5727 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5728 /*2 slot config - bits 0 and 1 set for the first two slots */
5729 slot_mask = 0x0000FFFF >> (16-slots);
5730 channels = slots;
5731
5732 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5733 __func__, slot_width, slots);
5734
5735 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5736 slots, slot_width);
5737 if (ret < 0) {
5738 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5739 __func__, ret);
5740 goto end;
5741 }
5742
5743 ret = snd_soc_dai_set_channel_map(cpu_dai,
5744 channels, slot_offset, 0, NULL);
5745 if (ret < 0) {
5746 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5747 __func__, ret);
5748 goto end;
5749 }
5750 } else {
5751 ret = -EINVAL;
5752 pr_err("%s: invalid use case, err:%d\n",
5753 __func__, ret);
5754 goto end;
5755 }
5756
5757 rate = params_rate(params);
5758 clk_freq = rate * slot_width * slots;
5759 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5760 if (ret < 0)
5761 pr_err("%s: failed to set tdm clk, err:%d\n",
5762 __func__, ret);
5763
5764end:
5765 return ret;
5766}
5767
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5768static int msm_get_tdm_mode(u32 port_id)
5769{
5770 int tdm_mode;
5771
5772 switch (port_id) {
5773 case AFE_PORT_ID_PRIMARY_TDM_RX:
5774 case AFE_PORT_ID_PRIMARY_TDM_TX:
5775 tdm_mode = TDM_PRI;
5776 break;
5777 case AFE_PORT_ID_SECONDARY_TDM_RX:
5778 case AFE_PORT_ID_SECONDARY_TDM_TX:
5779 tdm_mode = TDM_SEC;
5780 break;
5781 case AFE_PORT_ID_TERTIARY_TDM_RX:
5782 case AFE_PORT_ID_TERTIARY_TDM_TX:
5783 tdm_mode = TDM_TERT;
5784 break;
5785 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5786 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5787 tdm_mode = TDM_QUAT;
5788 break;
5789 case AFE_PORT_ID_QUINARY_TDM_RX:
5790 case AFE_PORT_ID_QUINARY_TDM_TX:
5791 tdm_mode = TDM_QUIN;
5792 break;
5793 default:
5794 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
5795 tdm_mode = -EINVAL;
5796 }
5797 return tdm_mode;
5798}
5799
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5800static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5801{
5802 int ret = 0;
5803 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5804 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5805 struct snd_soc_card *card = rtd->card;
5806 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5807 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5808
5809 if (tdm_mode < 0) {
5810 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5811 return tdm_mode;
5812 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5813
5814 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5815 if (pdata->mi2s_gpio_p[tdm_mode])
5816 ret = msm_cdc_pinctrl_select_active_state(
5817 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5818
5819 return ret;
5820}
5821
5822static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5823{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5824 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5825 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5826 struct snd_soc_card *card = rtd->card;
5827 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5828 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
5829
5830 if (tdm_mode < 0) {
5831 dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
5832 return;
5833 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5834
5835 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5836 if (pdata->mi2s_gpio_p[tdm_mode])
5837 msm_cdc_pinctrl_select_sleep_state(
5838 pdata->mi2s_gpio_p[tdm_mode]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5839}
5840
5841static struct snd_soc_ops sm6150_tdm_be_ops = {
5842 .hw_params = sm6150_tdm_snd_hw_params,
5843 .startup = sm6150_tdm_snd_startup,
5844 .shutdown = sm6150_tdm_snd_shutdown
5845};
5846
5847static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5848{
5849 cpumask_t mask;
5850
5851 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5852 pm_qos_remove_request(&substream->latency_pm_qos_req);
5853
5854 cpumask_clear(&mask);
5855 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5856 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5857 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5858
5859 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5860
5861 pm_qos_add_request(&substream->latency_pm_qos_req,
5862 PM_QOS_CPU_DMA_LATENCY,
5863 MSM_LL_QOS_VALUE);
5864 return 0;
5865}
5866
5867static struct snd_soc_ops msm_fe_qos_ops = {
5868 .prepare = msm_fe_qos_prepare,
5869};
5870
5871static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5872{
5873 int ret = 0;
5874 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5875 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5876 int index = cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5877 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5878 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5879 struct snd_soc_card *card = rtd->card;
5880 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5881
5882 dev_dbg(rtd->card->dev,
5883 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5884 __func__, substream->name, substream->stream,
5885 cpu_dai->name, cpu_dai->id);
5886
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5887 if (port_id < 0) {
5888 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5889 ret = port_id;
5890 goto err;
5891 }
5892
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5893 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5894 ret = -EINVAL;
5895 dev_err(rtd->card->dev,
5896 "%s: CPU DAI id (%d) out of range\n",
5897 __func__, cpu_dai->id);
5898 goto err;
5899 }
5900 /*
5901 * Mutex protection in case the same MI2S
5902 * interface using for both TX and RX so
5903 * that the same clock won't be enable twice.
5904 */
5905 mutex_lock(&mi2s_intf_conf[index].lock);
5906 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5907 /* Check if msm needs to provide the clock to the interface */
5908 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5909 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5910 fmt = SND_SOC_DAIFMT_CBM_CFM;
5911 }
5912 ret = msm_mi2s_set_sclk(substream, true);
5913 if (ret < 0) {
5914 dev_err(rtd->card->dev,
5915 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5916 __func__, ret);
5917 goto clean_up;
5918 }
5919
5920 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5921 if (ret < 0) {
5922 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5923 __func__, index, ret);
5924 goto clk_off;
5925 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5926 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5927 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
5928 __func__, mi2s_mclk[index].clk_freq_in_hz);
5929 ret = afe_set_lpass_clock_v2(port_id,
5930 &mi2s_mclk[index]);
5931 if (ret < 0) {
5932 pr_err("%s: afe lpass mclk failed, err:%d\n",
5933 __func__, ret);
5934 goto clk_off;
5935 }
5936 mi2s_mclk[index].enable = 1;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5937 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5938 if (pdata->mi2s_gpio_p[index])
5939 msm_cdc_pinctrl_select_active_state(
5940 pdata->mi2s_gpio_p[index]);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5941 }
5942clk_off:
5943 if (ret < 0)
5944 msm_mi2s_set_sclk(substream, false);
5945clean_up:
5946 if (ret < 0)
5947 mi2s_intf_conf[index].ref_cnt--;
5948 mutex_unlock(&mi2s_intf_conf[index].lock);
5949err:
5950 return ret;
5951}
5952
5953static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5954{
5955 int ret;
5956 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5957 int index = rtd->cpu_dai->id;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5958 int port_id = msm_get_port_id(rtd->dai_link->id);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5959 struct snd_soc_card *card = rtd->card;
5960 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5961
5962 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5963 substream->name, substream->stream);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5964
5965 if (port_id < 0) {
5966 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5967 return;
5968 }
5969
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5970 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5971 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5972 return;
5973 }
5974
5975 mutex_lock(&mi2s_intf_conf[index].lock);
5976 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5977 if (pdata->mi2s_gpio_p[index])
5978 msm_cdc_pinctrl_select_sleep_state(
5979 pdata->mi2s_gpio_p[index]);
5980
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5981 ret = msm_mi2s_set_sclk(substream, false);
5982 if (ret < 0)
5983 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5984 __func__, index, ret);
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]5985
5986 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
5987 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
5988 __func__, mi2s_mclk[index].clk_freq_in_hz);
5989 ret = afe_set_lpass_clock_v2(port_id,
5990 &mi2s_mclk[index]);
5991 if (ret < 0)
5992 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
5993 __func__, index, ret);
5994 mi2s_mclk[index].enable = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5995 }
5996 }
5997 mutex_unlock(&mi2s_intf_conf[index].lock);
5998}
5999
6000static struct snd_soc_ops msm_mi2s_be_ops = {
6001 .startup = msm_mi2s_snd_startup,
6002 .shutdown = msm_mi2s_snd_shutdown,
6003};
6004
6005static struct snd_soc_ops msm_cdc_dma_be_ops = {
6006 .hw_params = msm_snd_cdc_dma_hw_params,
6007};
6008
6009static struct snd_soc_ops msm_be_ops = {
6010 .hw_params = msm_snd_hw_params,
6011};
6012
6013static struct snd_soc_ops msm_slimbus_2_be_ops = {
6014 .hw_params = msm_slimbus_2_hw_params,
6015};
6016
6017static struct snd_soc_ops msm_wcn_ops = {
6018 .hw_params = msm_wcn_hw_params,
6019};
6020
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]6021static struct snd_soc_ops msm_ext_cpe_ops = {
6022 .hw_params = msm_snd_cpe_hw_params,
6023};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6024
6025/* Digital audio interface glue - connects codec <---> CPU */
6026static struct snd_soc_dai_link msm_common_dai_links[] = {
6027 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6028 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6029 .name = MSM_DAILINK_NAME(Media1),
6030 .stream_name = "MultiMedia1",
6031 .cpu_dai_name = "MultiMedia1",
6032 .platform_name = "msm-pcm-dsp.0",
6033 .dynamic = 1,
6034 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6035 .dpcm_playback = 1,
6036 .dpcm_capture = 1,
6037 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6038 SND_SOC_DPCM_TRIGGER_POST},
6039 .codec_dai_name = "snd-soc-dummy-dai",
6040 .codec_name = "snd-soc-dummy",
6041 .ignore_suspend = 1,
6042 /* this dainlink has playback support */
6043 .ignore_pmdown_time = 1,
6044 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6045 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6046 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6047 .name = MSM_DAILINK_NAME(Media2),
6048 .stream_name = "MultiMedia2",
6049 .cpu_dai_name = "MultiMedia2",
6050 .platform_name = "msm-pcm-dsp.0",
6051 .dynamic = 1,
6052 .dpcm_playback = 1,
6053 .dpcm_capture = 1,
6054 .codec_dai_name = "snd-soc-dummy-dai",
6055 .codec_name = "snd-soc-dummy",
6056 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6057 SND_SOC_DPCM_TRIGGER_POST},
6058 .ignore_suspend = 1,
6059 /* this dainlink has playback support */
6060 .ignore_pmdown_time = 1,
6061 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
6062 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6063 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6064 .name = "VoiceMMode1",
6065 .stream_name = "VoiceMMode1",
6066 .cpu_dai_name = "VoiceMMode1",
6067 .platform_name = "msm-pcm-voice",
6068 .dynamic = 1,
6069 .dpcm_playback = 1,
6070 .dpcm_capture = 1,
6071 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6072 SND_SOC_DPCM_TRIGGER_POST},
6073 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6074 .ignore_suspend = 1,
6075 .ignore_pmdown_time = 1,
6076 .codec_dai_name = "snd-soc-dummy-dai",
6077 .codec_name = "snd-soc-dummy",
6078 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
6079 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6080 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6081 .name = "MSM VoIP",
6082 .stream_name = "VoIP",
6083 .cpu_dai_name = "VoIP",
6084 .platform_name = "msm-voip-dsp",
6085 .dynamic = 1,
6086 .dpcm_playback = 1,
6087 .dpcm_capture = 1,
6088 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6089 SND_SOC_DPCM_TRIGGER_POST},
6090 .codec_dai_name = "snd-soc-dummy-dai",
6091 .codec_name = "snd-soc-dummy",
6092 .ignore_suspend = 1,
6093 /* this dainlink has playback support */
6094 .ignore_pmdown_time = 1,
6095 .id = MSM_FRONTEND_DAI_VOIP,
6096 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6097 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6098 .name = MSM_DAILINK_NAME(ULL),
6099 .stream_name = "MultiMedia3",
6100 .cpu_dai_name = "MultiMedia3",
6101 .platform_name = "msm-pcm-dsp.2",
6102 .dynamic = 1,
6103 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6104 .dpcm_playback = 1,
6105 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6106 SND_SOC_DPCM_TRIGGER_POST},
6107 .codec_dai_name = "snd-soc-dummy-dai",
6108 .codec_name = "snd-soc-dummy",
6109 .ignore_suspend = 1,
6110 /* this dainlink has playback support */
6111 .ignore_pmdown_time = 1,
6112 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
6113 },
6114 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6115 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6116 .name = "SLIMBUS_0 Hostless",
6117 .stream_name = "SLIMBUS_0 Hostless",
6118 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
6119 .platform_name = "msm-pcm-hostless",
6120 .dynamic = 1,
6121 .dpcm_playback = 1,
6122 .dpcm_capture = 1,
6123 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6124 SND_SOC_DPCM_TRIGGER_POST},
6125 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6126 .ignore_suspend = 1,
6127 /* this dailink has playback support */
6128 .ignore_pmdown_time = 1,
6129 .codec_dai_name = "snd-soc-dummy-dai",
6130 .codec_name = "snd-soc-dummy",
6131 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6132 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6133 .name = "MSM AFE-PCM RX",
6134 .stream_name = "AFE-PROXY RX",
6135 .cpu_dai_name = "msm-dai-q6-dev.241",
6136 .codec_name = "msm-stub-codec.1",
6137 .codec_dai_name = "msm-stub-rx",
6138 .platform_name = "msm-pcm-afe",
6139 .dpcm_playback = 1,
6140 .ignore_suspend = 1,
6141 /* this dainlink has playback support */
6142 .ignore_pmdown_time = 1,
6143 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6144 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6145 .name = "MSM AFE-PCM TX",
6146 .stream_name = "AFE-PROXY TX",
6147 .cpu_dai_name = "msm-dai-q6-dev.240",
6148 .codec_name = "msm-stub-codec.1",
6149 .codec_dai_name = "msm-stub-tx",
6150 .platform_name = "msm-pcm-afe",
6151 .dpcm_capture = 1,
6152 .ignore_suspend = 1,
6153 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6154 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6155 .name = MSM_DAILINK_NAME(Compress1),
6156 .stream_name = "Compress1",
6157 .cpu_dai_name = "MultiMedia4",
6158 .platform_name = "msm-compress-dsp",
6159 .dynamic = 1,
6160 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6161 .dpcm_playback = 1,
6162 .dpcm_capture = 1,
6163 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6164 SND_SOC_DPCM_TRIGGER_POST},
6165 .codec_dai_name = "snd-soc-dummy-dai",
6166 .codec_name = "snd-soc-dummy",
6167 .ignore_suspend = 1,
6168 .ignore_pmdown_time = 1,
6169 /* this dainlink has playback support */
6170 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6171 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6172 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6173 .name = "AUXPCM Hostless",
6174 .stream_name = "AUXPCM Hostless",
6175 .cpu_dai_name = "AUXPCM_HOSTLESS",
6176 .platform_name = "msm-pcm-hostless",
6177 .dynamic = 1,
6178 .dpcm_playback = 1,
6179 .dpcm_capture = 1,
6180 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6181 SND_SOC_DPCM_TRIGGER_POST},
6182 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6183 .ignore_suspend = 1,
6184 /* this dainlink has playback support */
6185 .ignore_pmdown_time = 1,
6186 .codec_dai_name = "snd-soc-dummy-dai",
6187 .codec_name = "snd-soc-dummy",
6188 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6189 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6190 .name = "SLIMBUS_1 Hostless",
6191 .stream_name = "SLIMBUS_1 Hostless",
6192 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6193 .platform_name = "msm-pcm-hostless",
6194 .dynamic = 1,
6195 .dpcm_playback = 1,
6196 .dpcm_capture = 1,
6197 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6198 SND_SOC_DPCM_TRIGGER_POST},
6199 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6200 .ignore_suspend = 1,
6201 /* this dailink has playback support */
6202 .ignore_pmdown_time = 1,
6203 .codec_dai_name = "snd-soc-dummy-dai",
6204 .codec_name = "snd-soc-dummy",
6205 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6206 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6207 .name = "SLIMBUS_3 Hostless",
6208 .stream_name = "SLIMBUS_3 Hostless",
6209 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6210 .platform_name = "msm-pcm-hostless",
6211 .dynamic = 1,
6212 .dpcm_playback = 1,
6213 .dpcm_capture = 1,
6214 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6215 SND_SOC_DPCM_TRIGGER_POST},
6216 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6217 .ignore_suspend = 1,
6218 /* this dailink has playback support */
6219 .ignore_pmdown_time = 1,
6220 .codec_dai_name = "snd-soc-dummy-dai",
6221 .codec_name = "snd-soc-dummy",
6222 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6223 {/* hw:x,12 */
6224 .name = "SLIMBUS_7 Hostless",
6225 .stream_name = "SLIMBUS_7 Hostless",
6226 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6227 .platform_name = "msm-pcm-hostless",
6228 .dynamic = 1,
6229 .dpcm_playback = 1,
6230 .dpcm_capture = 1,
6231 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6232 SND_SOC_DPCM_TRIGGER_POST},
6233 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6234 .ignore_suspend = 1,
6235 /* this dailink has playback support */
6236 .ignore_pmdown_time = 1,
6237 .codec_dai_name = "snd-soc-dummy-dai",
6238 .codec_name = "snd-soc-dummy",
6239 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6240 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6241 .name = MSM_DAILINK_NAME(LowLatency),
6242 .stream_name = "MultiMedia5",
6243 .cpu_dai_name = "MultiMedia5",
6244 .platform_name = "msm-pcm-dsp.1",
6245 .dynamic = 1,
6246 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6247 .dpcm_playback = 1,
6248 .dpcm_capture = 1,
6249 .codec_dai_name = "snd-soc-dummy-dai",
6250 .codec_name = "snd-soc-dummy",
6251 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6252 SND_SOC_DPCM_TRIGGER_POST},
6253 .ignore_suspend = 1,
6254 /* this dainlink has playback support */
6255 .ignore_pmdown_time = 1,
6256 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6257 .ops = &msm_fe_qos_ops,
6258 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6259 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6260 .name = "Listen 1 Audio Service",
6261 .stream_name = "Listen 1 Audio Service",
6262 .cpu_dai_name = "LSM1",
6263 .platform_name = "msm-lsm-client",
6264 .dynamic = 1,
6265 .dpcm_capture = 1,
6266 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6267 SND_SOC_DPCM_TRIGGER_POST },
6268 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6269 .ignore_suspend = 1,
6270 .codec_dai_name = "snd-soc-dummy-dai",
6271 .codec_name = "snd-soc-dummy",
6272 .id = MSM_FRONTEND_DAI_LSM1,
6273 },
6274 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6275 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6276 .name = MSM_DAILINK_NAME(Compress2),
6277 .stream_name = "Compress2",
6278 .cpu_dai_name = "MultiMedia7",
6279 .platform_name = "msm-compress-dsp",
6280 .dynamic = 1,
6281 .dpcm_playback = 1,
6282 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6283 SND_SOC_DPCM_TRIGGER_POST},
6284 .codec_dai_name = "snd-soc-dummy-dai",
6285 .codec_name = "snd-soc-dummy",
6286 .ignore_suspend = 1,
6287 .ignore_pmdown_time = 1,
6288 /* this dainlink has playback support */
6289 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6290 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6291 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6292 .name = MSM_DAILINK_NAME(MultiMedia10),
6293 .stream_name = "MultiMedia10",
6294 .cpu_dai_name = "MultiMedia10",
6295 .platform_name = "msm-pcm-dsp.1",
6296 .dynamic = 1,
6297 .dpcm_playback = 1,
6298 .dpcm_capture = 1,
6299 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6300 SND_SOC_DPCM_TRIGGER_POST},
6301 .codec_dai_name = "snd-soc-dummy-dai",
6302 .codec_name = "snd-soc-dummy",
6303 .ignore_suspend = 1,
6304 .ignore_pmdown_time = 1,
6305 /* this dainlink has playback support */
6306 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6307 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6308 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6309 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6310 .stream_name = "MM_NOIRQ",
6311 .cpu_dai_name = "MultiMedia8",
6312 .platform_name = "msm-pcm-dsp-noirq",
6313 .dynamic = 1,
6314 .dpcm_playback = 1,
6315 .dpcm_capture = 1,
6316 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6317 SND_SOC_DPCM_TRIGGER_POST},
6318 .codec_dai_name = "snd-soc-dummy-dai",
6319 .codec_name = "snd-soc-dummy",
6320 .ignore_suspend = 1,
6321 .ignore_pmdown_time = 1,
6322 /* this dainlink has playback support */
6323 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6324 .ops = &msm_fe_qos_ops,
6325 },
6326 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6327 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6328 .name = "HDMI_RX_HOSTLESS",
6329 .stream_name = "HDMI_RX_HOSTLESS",
6330 .cpu_dai_name = "HDMI_HOSTLESS",
6331 .platform_name = "msm-pcm-hostless",
6332 .dynamic = 1,
6333 .dpcm_playback = 1,
6334 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6335 SND_SOC_DPCM_TRIGGER_POST},
6336 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6337 .ignore_suspend = 1,
6338 .ignore_pmdown_time = 1,
6339 .codec_dai_name = "snd-soc-dummy-dai",
6340 .codec_name = "snd-soc-dummy",
6341 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6342 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6343 .name = "VoiceMMode2",
6344 .stream_name = "VoiceMMode2",
6345 .cpu_dai_name = "VoiceMMode2",
6346 .platform_name = "msm-pcm-voice",
6347 .dynamic = 1,
6348 .dpcm_playback = 1,
6349 .dpcm_capture = 1,
6350 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6351 SND_SOC_DPCM_TRIGGER_POST},
6352 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6353 .ignore_suspend = 1,
6354 .ignore_pmdown_time = 1,
6355 .codec_dai_name = "snd-soc-dummy-dai",
6356 .codec_name = "snd-soc-dummy",
6357 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6358 },
6359 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6360 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6361 .name = "Listen 2 Audio Service",
6362 .stream_name = "Listen 2 Audio Service",
6363 .cpu_dai_name = "LSM2",
6364 .platform_name = "msm-lsm-client",
6365 .dynamic = 1,
6366 .dpcm_capture = 1,
6367 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6368 SND_SOC_DPCM_TRIGGER_POST },
6369 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6370 .ignore_suspend = 1,
6371 .codec_dai_name = "snd-soc-dummy-dai",
6372 .codec_name = "snd-soc-dummy",
6373 .id = MSM_FRONTEND_DAI_LSM2,
6374 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6375 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6376 .name = "Listen 3 Audio Service",
6377 .stream_name = "Listen 3 Audio Service",
6378 .cpu_dai_name = "LSM3",
6379 .platform_name = "msm-lsm-client",
6380 .dynamic = 1,
6381 .dpcm_capture = 1,
6382 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6383 SND_SOC_DPCM_TRIGGER_POST },
6384 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6385 .ignore_suspend = 1,
6386 .codec_dai_name = "snd-soc-dummy-dai",
6387 .codec_name = "snd-soc-dummy",
6388 .id = MSM_FRONTEND_DAI_LSM3,
6389 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6390 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6391 .name = "Listen 4 Audio Service",
6392 .stream_name = "Listen 4 Audio Service",
6393 .cpu_dai_name = "LSM4",
6394 .platform_name = "msm-lsm-client",
6395 .dynamic = 1,
6396 .dpcm_capture = 1,
6397 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6398 SND_SOC_DPCM_TRIGGER_POST },
6399 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6400 .ignore_suspend = 1,
6401 .codec_dai_name = "snd-soc-dummy-dai",
6402 .codec_name = "snd-soc-dummy",
6403 .id = MSM_FRONTEND_DAI_LSM4,
6404 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6405 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6406 .name = "Listen 5 Audio Service",
6407 .stream_name = "Listen 5 Audio Service",
6408 .cpu_dai_name = "LSM5",
6409 .platform_name = "msm-lsm-client",
6410 .dynamic = 1,
6411 .dpcm_capture = 1,
6412 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6413 SND_SOC_DPCM_TRIGGER_POST },
6414 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6415 .ignore_suspend = 1,
6416 .codec_dai_name = "snd-soc-dummy-dai",
6417 .codec_name = "snd-soc-dummy",
6418 .id = MSM_FRONTEND_DAI_LSM5,
6419 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6420 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6421 .name = "Listen 6 Audio Service",
6422 .stream_name = "Listen 6 Audio Service",
6423 .cpu_dai_name = "LSM6",
6424 .platform_name = "msm-lsm-client",
6425 .dynamic = 1,
6426 .dpcm_capture = 1,
6427 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6428 SND_SOC_DPCM_TRIGGER_POST },
6429 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6430 .ignore_suspend = 1,
6431 .codec_dai_name = "snd-soc-dummy-dai",
6432 .codec_name = "snd-soc-dummy",
6433 .id = MSM_FRONTEND_DAI_LSM6,
6434 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6435 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6436 .name = "Listen 7 Audio Service",
6437 .stream_name = "Listen 7 Audio Service",
6438 .cpu_dai_name = "LSM7",
6439 .platform_name = "msm-lsm-client",
6440 .dynamic = 1,
6441 .dpcm_capture = 1,
6442 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6443 SND_SOC_DPCM_TRIGGER_POST },
6444 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6445 .ignore_suspend = 1,
6446 .codec_dai_name = "snd-soc-dummy-dai",
6447 .codec_name = "snd-soc-dummy",
6448 .id = MSM_FRONTEND_DAI_LSM7,
6449 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6450 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6451 .name = "Listen 8 Audio Service",
6452 .stream_name = "Listen 8 Audio Service",
6453 .cpu_dai_name = "LSM8",
6454 .platform_name = "msm-lsm-client",
6455 .dynamic = 1,
6456 .dpcm_capture = 1,
6457 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6458 SND_SOC_DPCM_TRIGGER_POST },
6459 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6460 .ignore_suspend = 1,
6461 .codec_dai_name = "snd-soc-dummy-dai",
6462 .codec_name = "snd-soc-dummy",
6463 .id = MSM_FRONTEND_DAI_LSM8,
6464 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6465 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6466 .name = MSM_DAILINK_NAME(Media9),
6467 .stream_name = "MultiMedia9",
6468 .cpu_dai_name = "MultiMedia9",
6469 .platform_name = "msm-pcm-dsp.0",
6470 .dynamic = 1,
6471 .dpcm_playback = 1,
6472 .dpcm_capture = 1,
6473 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6474 SND_SOC_DPCM_TRIGGER_POST},
6475 .codec_dai_name = "snd-soc-dummy-dai",
6476 .codec_name = "snd-soc-dummy",
6477 .ignore_suspend = 1,
6478 /* this dainlink has playback support */
6479 .ignore_pmdown_time = 1,
6480 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6481 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6482 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6483 .name = MSM_DAILINK_NAME(Compress4),
6484 .stream_name = "Compress4",
6485 .cpu_dai_name = "MultiMedia11",
6486 .platform_name = "msm-compress-dsp",
6487 .dynamic = 1,
6488 .dpcm_playback = 1,
6489 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6490 SND_SOC_DPCM_TRIGGER_POST},
6491 .codec_dai_name = "snd-soc-dummy-dai",
6492 .codec_name = "snd-soc-dummy",
6493 .ignore_suspend = 1,
6494 .ignore_pmdown_time = 1,
6495 /* this dainlink has playback support */
6496 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6497 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6498 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6499 .name = MSM_DAILINK_NAME(Compress5),
6500 .stream_name = "Compress5",
6501 .cpu_dai_name = "MultiMedia12",
6502 .platform_name = "msm-compress-dsp",
6503 .dynamic = 1,
6504 .dpcm_playback = 1,
6505 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6506 SND_SOC_DPCM_TRIGGER_POST},
6507 .codec_dai_name = "snd-soc-dummy-dai",
6508 .codec_name = "snd-soc-dummy",
6509 .ignore_suspend = 1,
6510 .ignore_pmdown_time = 1,
6511 /* this dainlink has playback support */
6512 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6513 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6514 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6515 .name = MSM_DAILINK_NAME(Compress6),
6516 .stream_name = "Compress6",
6517 .cpu_dai_name = "MultiMedia13",
6518 .platform_name = "msm-compress-dsp",
6519 .dynamic = 1,
6520 .dpcm_playback = 1,
6521 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6522 SND_SOC_DPCM_TRIGGER_POST},
6523 .codec_dai_name = "snd-soc-dummy-dai",
6524 .codec_name = "snd-soc-dummy",
6525 .ignore_suspend = 1,
6526 .ignore_pmdown_time = 1,
6527 /* this dainlink has playback support */
6528 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6529 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6530 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6531 .name = MSM_DAILINK_NAME(Compress7),
6532 .stream_name = "Compress7",
6533 .cpu_dai_name = "MultiMedia14",
6534 .platform_name = "msm-compress-dsp",
6535 .dynamic = 1,
6536 .dpcm_playback = 1,
6537 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6538 SND_SOC_DPCM_TRIGGER_POST},
6539 .codec_dai_name = "snd-soc-dummy-dai",
6540 .codec_name = "snd-soc-dummy",
6541 .ignore_suspend = 1,
6542 .ignore_pmdown_time = 1,
6543 /* this dainlink has playback support */
6544 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6545 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6546 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6547 .name = MSM_DAILINK_NAME(Compress8),
6548 .stream_name = "Compress8",
6549 .cpu_dai_name = "MultiMedia15",
6550 .platform_name = "msm-compress-dsp",
6551 .dynamic = 1,
6552 .dpcm_playback = 1,
6553 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6554 SND_SOC_DPCM_TRIGGER_POST},
6555 .codec_dai_name = "snd-soc-dummy-dai",
6556 .codec_name = "snd-soc-dummy",
6557 .ignore_suspend = 1,
6558 .ignore_pmdown_time = 1,
6559 /* this dainlink has playback support */
6560 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6561 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6562 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6563 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6564 .stream_name = "MM_NOIRQ_2",
6565 .cpu_dai_name = "MultiMedia16",
6566 .platform_name = "msm-pcm-dsp-noirq",
6567 .dynamic = 1,
6568 .dpcm_playback = 1,
6569 .dpcm_capture = 1,
6570 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6571 SND_SOC_DPCM_TRIGGER_POST},
6572 .codec_dai_name = "snd-soc-dummy-dai",
6573 .codec_name = "snd-soc-dummy",
6574 .ignore_suspend = 1,
6575 .ignore_pmdown_time = 1,
6576 /* this dainlink has playback support */
6577 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6578 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6579 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6580 .name = "SLIMBUS_8 Hostless",
6581 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6582 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6583 .platform_name = "msm-pcm-hostless",
6584 .dynamic = 1,
6585 .dpcm_capture = 1,
6586 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6587 SND_SOC_DPCM_TRIGGER_POST},
6588 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6589 .ignore_suspend = 1,
6590 .codec_dai_name = "snd-soc-dummy-dai",
6591 .codec_name = "snd-soc-dummy",
6592 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6593 {/* hw:x,35 */
6594 .name = "CDC_DMA Hostless",
6595 .stream_name = "CDC_DMA Hostless",
6596 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6597 .platform_name = "msm-pcm-hostless",
6598 .dynamic = 1,
6599 .dpcm_playback = 1,
6600 .dpcm_capture = 1,
6601 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6602 SND_SOC_DPCM_TRIGGER_POST},
6603 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6604 .ignore_suspend = 1,
6605 /* this dailink has playback support */
6606 .ignore_pmdown_time = 1,
6607 .codec_dai_name = "snd-soc-dummy-dai",
6608 .codec_name = "snd-soc-dummy",
6609 },
6610 {/* hw:x,36 */
6611 .name = "TX3_CDC_DMA Hostless",
6612 .stream_name = "TX3_CDC_DMA Hostless",
6613 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6614 .platform_name = "msm-pcm-hostless",
6615 .dynamic = 1,
6616 .dpcm_capture = 1,
6617 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6618 SND_SOC_DPCM_TRIGGER_POST},
6619 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6620 .ignore_suspend = 1,
6621 .codec_dai_name = "snd-soc-dummy-dai",
6622 .codec_name = "snd-soc-dummy",
6623 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6624};
6625
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6626static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6627 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6628 .name = LPASS_BE_SLIMBUS_4_TX,
6629 .stream_name = "Slimbus4 Capture",
6630 .cpu_dai_name = "msm-dai-q6-dev.16393",
6631 .platform_name = "msm-pcm-hostless",
6632 .codec_name = "tavil_codec",
6633 .codec_dai_name = "tavil_vifeedback",
6634 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6635 .be_hw_params_fixup = msm_be_hw_params_fixup,
6636 .ops = &msm_be_ops,
6637 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6638 .ignore_suspend = 1,
6639 },
6640 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6641 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6642 .name = "SLIMBUS_2 Hostless Playback",
6643 .stream_name = "SLIMBUS_2 Hostless Playback",
6644 .cpu_dai_name = "msm-dai-q6-dev.16388",
6645 .platform_name = "msm-pcm-hostless",
6646 .codec_name = "tavil_codec",
6647 .codec_dai_name = "tavil_rx2",
6648 .ignore_suspend = 1,
6649 .ignore_pmdown_time = 1,
6650 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6651 .ops = &msm_slimbus_2_be_ops,
6652 },
6653 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6654 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6655 .name = "SLIMBUS_2 Hostless Capture",
6656 .stream_name = "SLIMBUS_2 Hostless Capture",
6657 .cpu_dai_name = "msm-dai-q6-dev.16389",
6658 .platform_name = "msm-pcm-hostless",
6659 .codec_name = "tavil_codec",
6660 .codec_dai_name = "tavil_tx2",
6661 .ignore_suspend = 1,
6662 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6663 .ops = &msm_slimbus_2_be_ops,
6664 },
6665};
6666
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]6667static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
6668 {
6669 .name = "Compress9",
6670 .stream_name = "Compress9",
6671 .cpu_dai_name = "MultiMedia17",
6672 .platform_name = "msm-compress-dsp",
6673 .dynamic = 1,
6674 .dpcm_capture = 1,
6675 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6676 SND_SOC_DPCM_TRIGGER_POST},
6677 .codec_dai_name = "snd-soc-dummy-dai",
6678 .codec_name = "snd-soc-dummy",
6679 .ignore_suspend = 1,
6680 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6681 },
6682 {
6683 .name = "Compress10",
6684 .stream_name = "Compress10",
6685 .cpu_dai_name = "MultiMedia18",
6686 .platform_name = "msm-compress-dsp",
6687 .dynamic = 1,
6688 .dpcm_capture = 1,
6689 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6690 SND_SOC_DPCM_TRIGGER_POST},
6691 .codec_dai_name = "snd-soc-dummy-dai",
6692 .codec_name = "snd-soc-dummy",
6693 .ignore_suspend = 1,
6694 .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
6695 },
6696 {
6697 .name = "Compress11",
6698 .stream_name = "Compress11",
6699 .cpu_dai_name = "MultiMedia19",
6700 .platform_name = "msm-compress-dsp",
6701 .dynamic = 1,
6702 .dpcm_capture = 1,
6703 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6704 SND_SOC_DPCM_TRIGGER_POST},
6705 .codec_dai_name = "snd-soc-dummy-dai",
6706 .codec_name = "snd-soc-dummy",
6707 .ignore_suspend = 1,
6708 .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
6709 },
6710 {
6711 .name = "Compress12",
6712 .stream_name = "Compress12",
6713 .cpu_dai_name = "MultiMedia28",
6714 .platform_name = "msm-compress-dsp",
6715 .dynamic = 1,
6716 .dpcm_capture = 1,
6717 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6718 SND_SOC_DPCM_TRIGGER_POST},
6719 .codec_dai_name = "snd-soc-dummy-dai",
6720 .codec_name = "snd-soc-dummy",
6721 .ignore_suspend = 1,
6722 .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
6723 },
6724 {
6725 .name = "Compress13",
6726 .stream_name = "Compress13",
6727 .cpu_dai_name = "MultiMedia29",
6728 .platform_name = "msm-compress-dsp",
6729 .dynamic = 1,
6730 .dpcm_capture = 1,
6731 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6732 SND_SOC_DPCM_TRIGGER_POST},
6733 .codec_dai_name = "snd-soc-dummy-dai",
6734 .codec_name = "snd-soc-dummy",
6735 .ignore_suspend = 1,
6736 .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
6737 },
6738};
6739
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6740static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6741 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6742 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6743 .stream_name = "WSA CDC DMA0 Capture",
6744 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6745 .platform_name = "msm-pcm-hostless",
6746 .codec_name = "bolero_codec",
6747 .codec_dai_name = "wsa_macro_vifeedback",
6748 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6749 .be_hw_params_fixup = msm_be_hw_params_fixup,
6750 .ignore_suspend = 1,
6751 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6752 .ops = &msm_cdc_dma_be_ops,
6753 },
6754};
6755
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]6756static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
6757 /* tasha_vifeedback for speaker protection */
6758 {
6759 .name = LPASS_BE_SLIMBUS_4_TX,
6760 .stream_name = "Slimbus4 Capture",
6761 .cpu_dai_name = "msm-dai-q6-dev.16393",
6762 .platform_name = "msm-pcm-hostless",
6763 .codec_name = "tasha_codec",
6764 .codec_dai_name = "tasha_vifeedback",
6765 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6766 .be_hw_params_fixup = msm_be_hw_params_fixup,
6767 .ops = &msm_be_ops,
6768 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6769 .ignore_suspend = 1,
6770 },
6771 /* Ultrasound RX DAI Link */
6772 {
6773 .name = "SLIMBUS_2 Hostless Playback",
6774 .stream_name = "SLIMBUS_2 Hostless Playback",
6775 .cpu_dai_name = "msm-dai-q6-dev.16388",
6776 .platform_name = "msm-pcm-hostless",
6777 .codec_name = "tasha_codec",
6778 .codec_dai_name = "tasha_rx2",
6779 .ignore_suspend = 1,
6780 .dpcm_playback = 1,
6781 .dpcm_capture = 1,
6782 .ignore_pmdown_time = 1,
6783 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6784 .ops = &msm_slimbus_2_be_ops,
6785 },
6786 /* Ultrasound TX DAI Link */
6787 {
6788 .name = "SLIMBUS_2 Hostless Capture",
6789 .stream_name = "SLIMBUS_2 Hostless Capture",
6790 .cpu_dai_name = "msm-dai-q6-dev.16389",
6791 .platform_name = "msm-pcm-hostless",
6792 .codec_name = "tasha_codec",
6793 .codec_dai_name = "tasha_tx2",
6794 .ignore_suspend = 1,
6795 .dpcm_capture = 1,
6796 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6797 .ops = &msm_slimbus_2_be_ops,
6798 },
6799 /* CPE LSM direct dai-link */
6800 {
6801 .name = "CPE Listen service",
6802 .stream_name = "CPE Listen Audio Service",
6803 .cpu_dai_name = "msm-dai-slim",
6804 .platform_name = "msm-cpe-lsm",
6805 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6806 SND_SOC_DPCM_TRIGGER_POST},
6807 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6808 .ignore_suspend = 1,
6809 .dpcm_capture = 1,
6810 .codec_dai_name = "tasha_mad1",
6811 .codec_name = "tasha_codec",
6812 .ops = &msm_ext_cpe_ops,
6813 },
6814 {
6815 .name = "SLIMBUS_6 Hostless Playback",
6816 .stream_name = "SLIMBUS_6 Hostless",
6817 .cpu_dai_name = "SLIMBUS6_HOSTLESS",
6818 .platform_name = "msm-pcm-hostless",
6819 .dynamic = 1,
6820 .dpcm_playback = 1,
6821 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6822 SND_SOC_DPCM_TRIGGER_POST},
6823 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6824 .ignore_suspend = 1,
6825 /* this dailink has playback support */
6826 .ignore_pmdown_time = 1,
6827 .codec_dai_name = "snd-soc-dummy-dai",
6828 .codec_name = "snd-soc-dummy",
6829 },
6830 /* CPE LSM EC PP direct dai-link */
6831 {
6832 .name = "CPE Listen service ECPP",
6833 .stream_name = "CPE Listen Audio Service ECPP",
6834 .cpu_dai_name = "CPE_LSM_NOHOST",
6835 .platform_name = "msm-cpe-lsm.3",
6836 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6837 SND_SOC_DPCM_TRIGGER_POST},
6838 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6839 .ignore_suspend = 1,
6840 .ignore_pmdown_time = 1,
6841 .codec_dai_name = "tasha_cpe",
6842 .codec_name = "tasha_codec",
6843 },
6844};
6845
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6846static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6847 {
6848 .name = MSM_DAILINK_NAME(ASM Loopback),
6849 .stream_name = "MultiMedia6",
6850 .cpu_dai_name = "MultiMedia6",
6851 .platform_name = "msm-pcm-loopback",
6852 .dynamic = 1,
6853 .dpcm_playback = 1,
6854 .dpcm_capture = 1,
6855 .codec_dai_name = "snd-soc-dummy-dai",
6856 .codec_name = "snd-soc-dummy",
6857 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6858 SND_SOC_DPCM_TRIGGER_POST},
6859 .ignore_suspend = 1,
6860 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6861 .ignore_pmdown_time = 1,
6862 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6863 },
6864 {
6865 .name = "USB Audio Hostless",
6866 .stream_name = "USB Audio Hostless",
6867 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6868 .platform_name = "msm-pcm-hostless",
6869 .dynamic = 1,
6870 .dpcm_playback = 1,
6871 .dpcm_capture = 1,
6872 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6873 SND_SOC_DPCM_TRIGGER_POST},
6874 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6875 .ignore_suspend = 1,
6876 .ignore_pmdown_time = 1,
6877 .codec_dai_name = "snd-soc-dummy-dai",
6878 .codec_name = "snd-soc-dummy",
6879 },
6880};
6881
6882static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6883 /* Backend AFE DAI Links */
6884 {
6885 .name = LPASS_BE_AFE_PCM_RX,
6886 .stream_name = "AFE Playback",
6887 .cpu_dai_name = "msm-dai-q6-dev.224",
6888 .platform_name = "msm-pcm-routing",
6889 .codec_name = "msm-stub-codec.1",
6890 .codec_dai_name = "msm-stub-rx",
6891 .no_pcm = 1,
6892 .dpcm_playback = 1,
6893 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6894 .be_hw_params_fixup = msm_be_hw_params_fixup,
6895 /* this dainlink has playback support */
6896 .ignore_pmdown_time = 1,
6897 .ignore_suspend = 1,
6898 },
6899 {
6900 .name = LPASS_BE_AFE_PCM_TX,
6901 .stream_name = "AFE Capture",
6902 .cpu_dai_name = "msm-dai-q6-dev.225",
6903 .platform_name = "msm-pcm-routing",
6904 .codec_name = "msm-stub-codec.1",
6905 .codec_dai_name = "msm-stub-tx",
6906 .no_pcm = 1,
6907 .dpcm_capture = 1,
6908 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6909 .be_hw_params_fixup = msm_be_hw_params_fixup,
6910 .ignore_suspend = 1,
6911 },
6912 /* Incall Record Uplink BACK END DAI Link */
6913 {
6914 .name = LPASS_BE_INCALL_RECORD_TX,
6915 .stream_name = "Voice Uplink Capture",
6916 .cpu_dai_name = "msm-dai-q6-dev.32772",
6917 .platform_name = "msm-pcm-routing",
6918 .codec_name = "msm-stub-codec.1",
6919 .codec_dai_name = "msm-stub-tx",
6920 .no_pcm = 1,
6921 .dpcm_capture = 1,
6922 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6923 .be_hw_params_fixup = msm_be_hw_params_fixup,
6924 .ignore_suspend = 1,
6925 },
6926 /* Incall Record Downlink BACK END DAI Link */
6927 {
6928 .name = LPASS_BE_INCALL_RECORD_RX,
6929 .stream_name = "Voice Downlink Capture",
6930 .cpu_dai_name = "msm-dai-q6-dev.32771",
6931 .platform_name = "msm-pcm-routing",
6932 .codec_name = "msm-stub-codec.1",
6933 .codec_dai_name = "msm-stub-tx",
6934 .no_pcm = 1,
6935 .dpcm_capture = 1,
6936 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6937 .be_hw_params_fixup = msm_be_hw_params_fixup,
6938 .ignore_suspend = 1,
6939 },
6940 /* Incall Music BACK END DAI Link */
6941 {
6942 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6943 .stream_name = "Voice Farend Playback",
6944 .cpu_dai_name = "msm-dai-q6-dev.32773",
6945 .platform_name = "msm-pcm-routing",
6946 .codec_name = "msm-stub-codec.1",
6947 .codec_dai_name = "msm-stub-rx",
6948 .no_pcm = 1,
6949 .dpcm_playback = 1,
6950 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6951 .be_hw_params_fixup = msm_be_hw_params_fixup,
6952 .ignore_suspend = 1,
6953 .ignore_pmdown_time = 1,
6954 },
6955 /* Incall Music 2 BACK END DAI Link */
6956 {
6957 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6958 .stream_name = "Voice2 Farend Playback",
6959 .cpu_dai_name = "msm-dai-q6-dev.32770",
6960 .platform_name = "msm-pcm-routing",
6961 .codec_name = "msm-stub-codec.1",
6962 .codec_dai_name = "msm-stub-rx",
6963 .no_pcm = 1,
6964 .dpcm_playback = 1,
6965 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6966 .be_hw_params_fixup = msm_be_hw_params_fixup,
6967 .ignore_suspend = 1,
6968 .ignore_pmdown_time = 1,
6969 },
6970 {
6971 .name = LPASS_BE_USB_AUDIO_RX,
6972 .stream_name = "USB Audio Playback",
6973 .cpu_dai_name = "msm-dai-q6-dev.28672",
6974 .platform_name = "msm-pcm-routing",
6975 .codec_name = "msm-stub-codec.1",
6976 .codec_dai_name = "msm-stub-rx",
6977 .no_pcm = 1,
6978 .dpcm_playback = 1,
6979 .id = MSM_BACKEND_DAI_USB_RX,
6980 .be_hw_params_fixup = msm_be_hw_params_fixup,
6981 .ignore_pmdown_time = 1,
6982 .ignore_suspend = 1,
6983 },
6984 {
6985 .name = LPASS_BE_USB_AUDIO_TX,
6986 .stream_name = "USB Audio Capture",
6987 .cpu_dai_name = "msm-dai-q6-dev.28673",
6988 .platform_name = "msm-pcm-routing",
6989 .codec_name = "msm-stub-codec.1",
6990 .codec_dai_name = "msm-stub-tx",
6991 .no_pcm = 1,
6992 .dpcm_capture = 1,
6993 .id = MSM_BACKEND_DAI_USB_TX,
6994 .be_hw_params_fixup = msm_be_hw_params_fixup,
6995 .ignore_suspend = 1,
6996 },
6997 {
6998 .name = LPASS_BE_PRI_TDM_RX_0,
6999 .stream_name = "Primary TDM0 Playback",
7000 .cpu_dai_name = "msm-dai-q6-tdm.36864",
7001 .platform_name = "msm-pcm-routing",
7002 .codec_name = "msm-stub-codec.1",
7003 .codec_dai_name = "msm-stub-rx",
7004 .no_pcm = 1,
7005 .dpcm_playback = 1,
7006 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
7007 .be_hw_params_fixup = msm_be_hw_params_fixup,
7008 .ops = &sm6150_tdm_be_ops,
7009 .ignore_suspend = 1,
7010 .ignore_pmdown_time = 1,
7011 },
7012 {
7013 .name = LPASS_BE_PRI_TDM_TX_0,
7014 .stream_name = "Primary TDM0 Capture",
7015 .cpu_dai_name = "msm-dai-q6-tdm.36865",
7016 .platform_name = "msm-pcm-routing",
7017 .codec_name = "msm-stub-codec.1",
7018 .codec_dai_name = "msm-stub-tx",
7019 .no_pcm = 1,
7020 .dpcm_capture = 1,
7021 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
7022 .be_hw_params_fixup = msm_be_hw_params_fixup,
7023 .ops = &sm6150_tdm_be_ops,
7024 .ignore_suspend = 1,
7025 },
7026 {
7027 .name = LPASS_BE_SEC_TDM_RX_0,
7028 .stream_name = "Secondary TDM0 Playback",
7029 .cpu_dai_name = "msm-dai-q6-tdm.36880",
7030 .platform_name = "msm-pcm-routing",
7031 .codec_name = "msm-stub-codec.1",
7032 .codec_dai_name = "msm-stub-rx",
7033 .no_pcm = 1,
7034 .dpcm_playback = 1,
7035 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
7036 .be_hw_params_fixup = msm_be_hw_params_fixup,
7037 .ops = &sm6150_tdm_be_ops,
7038 .ignore_suspend = 1,
7039 .ignore_pmdown_time = 1,
7040 },
7041 {
7042 .name = LPASS_BE_SEC_TDM_TX_0,
7043 .stream_name = "Secondary TDM0 Capture",
7044 .cpu_dai_name = "msm-dai-q6-tdm.36881",
7045 .platform_name = "msm-pcm-routing",
7046 .codec_name = "msm-stub-codec.1",
7047 .codec_dai_name = "msm-stub-tx",
7048 .no_pcm = 1,
7049 .dpcm_capture = 1,
7050 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
7051 .be_hw_params_fixup = msm_be_hw_params_fixup,
7052 .ops = &sm6150_tdm_be_ops,
7053 .ignore_suspend = 1,
7054 },
7055 {
7056 .name = LPASS_BE_TERT_TDM_RX_0,
7057 .stream_name = "Tertiary TDM0 Playback",
7058 .cpu_dai_name = "msm-dai-q6-tdm.36896",
7059 .platform_name = "msm-pcm-routing",
7060 .codec_name = "msm-stub-codec.1",
7061 .codec_dai_name = "msm-stub-rx",
7062 .no_pcm = 1,
7063 .dpcm_playback = 1,
7064 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
7065 .be_hw_params_fixup = msm_be_hw_params_fixup,
7066 .ops = &sm6150_tdm_be_ops,
7067 .ignore_suspend = 1,
7068 .ignore_pmdown_time = 1,
7069 },
7070 {
7071 .name = LPASS_BE_TERT_TDM_TX_0,
7072 .stream_name = "Tertiary TDM0 Capture",
7073 .cpu_dai_name = "msm-dai-q6-tdm.36897",
7074 .platform_name = "msm-pcm-routing",
7075 .codec_name = "msm-stub-codec.1",
7076 .codec_dai_name = "msm-stub-tx",
7077 .no_pcm = 1,
7078 .dpcm_capture = 1,
7079 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
7080 .be_hw_params_fixup = msm_be_hw_params_fixup,
7081 .ops = &sm6150_tdm_be_ops,
7082 .ignore_suspend = 1,
7083 },
7084 {
7085 .name = LPASS_BE_QUAT_TDM_RX_0,
7086 .stream_name = "Quaternary TDM0 Playback",
7087 .cpu_dai_name = "msm-dai-q6-tdm.36912",
7088 .platform_name = "msm-pcm-routing",
7089 .codec_name = "msm-stub-codec.1",
7090 .codec_dai_name = "msm-stub-rx",
7091 .no_pcm = 1,
7092 .dpcm_playback = 1,
7093 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]7094 .be_hw_params_fixup = msm_be_hw_params_fixup,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7095 .ops = &sm6150_tdm_be_ops,
7096 .ignore_suspend = 1,
7097 .ignore_pmdown_time = 1,
7098 },
7099 {
7100 .name = LPASS_BE_QUAT_TDM_TX_0,
7101 .stream_name = "Quaternary TDM0 Capture",
7102 .cpu_dai_name = "msm-dai-q6-tdm.36913",
7103 .platform_name = "msm-pcm-routing",
7104 .codec_name = "msm-stub-codec.1",
7105 .codec_dai_name = "msm-stub-tx",
7106 .no_pcm = 1,
7107 .dpcm_capture = 1,
7108 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
7109 .be_hw_params_fixup = msm_be_hw_params_fixup,
7110 .ops = &sm6150_tdm_be_ops,
7111 .ignore_suspend = 1,
7112 },
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]7113 {
7114 .name = LPASS_BE_QUIN_TDM_RX_0,
7115 .stream_name = "Quinary TDM0 Playback",
7116 .cpu_dai_name = "msm-dai-q6-tdm.36928",
7117 .platform_name = "msm-pcm-routing",
7118 .codec_name = "msm-stub-codec.1",
7119 .codec_dai_name = "msm-stub-rx",
7120 .no_pcm = 1,
7121 .dpcm_playback = 1,
7122 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
7123 .be_hw_params_fixup = msm_be_hw_params_fixup,
7124 .ops = &sm6150_tdm_be_ops,
7125 .ignore_suspend = 1,
7126 .ignore_pmdown_time = 1,
7127 },
7128 {
7129 .name = LPASS_BE_QUIN_TDM_TX_0,
7130 .stream_name = "Quinary TDM0 Capture",
7131 .cpu_dai_name = "msm-dai-q6-tdm.36929",
7132 .platform_name = "msm-pcm-routing",
7133 .codec_name = "msm-stub-codec.1",
7134 .codec_dai_name = "msm-stub-tx",
7135 .no_pcm = 1,
7136 .dpcm_capture = 1,
7137 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
7138 .be_hw_params_fixup = msm_be_hw_params_fixup,
7139 .ops = &sm6150_tdm_be_ops,
7140 .ignore_suspend = 1,
7141 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7142};
7143
7144static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
7145 {
7146 .name = LPASS_BE_SLIMBUS_0_RX,
7147 .stream_name = "Slimbus Playback",
7148 .cpu_dai_name = "msm-dai-q6-dev.16384",
7149 .platform_name = "msm-pcm-routing",
7150 .codec_name = "tavil_codec",
7151 .codec_dai_name = "tavil_rx1",
7152 .no_pcm = 1,
7153 .dpcm_playback = 1,
7154 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7155 .init = &msm_audrx_tavil_init,
7156 .be_hw_params_fixup = msm_be_hw_params_fixup,
7157 /* this dainlink has playback support */
7158 .ignore_pmdown_time = 1,
7159 .ignore_suspend = 1,
7160 .ops = &msm_be_ops,
7161 },
7162 {
7163 .name = LPASS_BE_SLIMBUS_0_TX,
7164 .stream_name = "Slimbus Capture",
7165 .cpu_dai_name = "msm-dai-q6-dev.16385",
7166 .platform_name = "msm-pcm-routing",
7167 .codec_name = "tavil_codec",
7168 .codec_dai_name = "tavil_tx1",
7169 .no_pcm = 1,
7170 .dpcm_capture = 1,
7171 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7172 .be_hw_params_fixup = msm_be_hw_params_fixup,
7173 .ignore_suspend = 1,
7174 .ops = &msm_be_ops,
7175 },
7176 {
7177 .name = LPASS_BE_SLIMBUS_1_RX,
7178 .stream_name = "Slimbus1 Playback",
7179 .cpu_dai_name = "msm-dai-q6-dev.16386",
7180 .platform_name = "msm-pcm-routing",
7181 .codec_name = "tavil_codec",
7182 .codec_dai_name = "tavil_rx1",
7183 .no_pcm = 1,
7184 .dpcm_playback = 1,
7185 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7186 .be_hw_params_fixup = msm_be_hw_params_fixup,
7187 .ops = &msm_be_ops,
7188 /* dai link has playback support */
7189 .ignore_pmdown_time = 1,
7190 .ignore_suspend = 1,
7191 },
7192 {
7193 .name = LPASS_BE_SLIMBUS_1_TX,
7194 .stream_name = "Slimbus1 Capture",
7195 .cpu_dai_name = "msm-dai-q6-dev.16387",
7196 .platform_name = "msm-pcm-routing",
7197 .codec_name = "tavil_codec",
7198 .codec_dai_name = "tavil_tx3",
7199 .no_pcm = 1,
7200 .dpcm_capture = 1,
7201 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
7202 .be_hw_params_fixup = msm_be_hw_params_fixup,
7203 .ops = &msm_be_ops,
7204 .ignore_suspend = 1,
7205 },
7206 {
7207 .name = LPASS_BE_SLIMBUS_2_RX,
7208 .stream_name = "Slimbus2 Playback",
7209 .cpu_dai_name = "msm-dai-q6-dev.16388",
7210 .platform_name = "msm-pcm-routing",
7211 .codec_name = "tavil_codec",
7212 .codec_dai_name = "tavil_rx2",
7213 .no_pcm = 1,
7214 .dpcm_playback = 1,
7215 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
7216 .be_hw_params_fixup = msm_be_hw_params_fixup,
7217 .ops = &msm_be_ops,
7218 .ignore_pmdown_time = 1,
7219 .ignore_suspend = 1,
7220 },
7221 {
7222 .name = LPASS_BE_SLIMBUS_3_RX,
7223 .stream_name = "Slimbus3 Playback",
7224 .cpu_dai_name = "msm-dai-q6-dev.16390",
7225 .platform_name = "msm-pcm-routing",
7226 .codec_name = "tavil_codec",
7227 .codec_dai_name = "tavil_rx1",
7228 .no_pcm = 1,
7229 .dpcm_playback = 1,
7230 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7231 .be_hw_params_fixup = msm_be_hw_params_fixup,
7232 .ops = &msm_be_ops,
7233 /* dai link has playback support */
7234 .ignore_pmdown_time = 1,
7235 .ignore_suspend = 1,
7236 },
7237 {
7238 .name = LPASS_BE_SLIMBUS_3_TX,
7239 .stream_name = "Slimbus3 Capture",
7240 .cpu_dai_name = "msm-dai-q6-dev.16391",
7241 .platform_name = "msm-pcm-routing",
7242 .codec_name = "tavil_codec",
7243 .codec_dai_name = "tavil_tx1",
7244 .no_pcm = 1,
7245 .dpcm_capture = 1,
7246 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7247 .be_hw_params_fixup = msm_be_hw_params_fixup,
7248 .ops = &msm_be_ops,
7249 .ignore_suspend = 1,
7250 },
7251 {
7252 .name = LPASS_BE_SLIMBUS_4_RX,
7253 .stream_name = "Slimbus4 Playback",
7254 .cpu_dai_name = "msm-dai-q6-dev.16392",
7255 .platform_name = "msm-pcm-routing",
7256 .codec_name = "tavil_codec",
7257 .codec_dai_name = "tavil_rx1",
7258 .no_pcm = 1,
7259 .dpcm_playback = 1,
7260 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7261 .be_hw_params_fixup = msm_be_hw_params_fixup,
7262 .ops = &msm_be_ops,
7263 /* dai link has playback support */
7264 .ignore_pmdown_time = 1,
7265 .ignore_suspend = 1,
7266 },
7267 {
7268 .name = LPASS_BE_SLIMBUS_5_RX,
7269 .stream_name = "Slimbus5 Playback",
7270 .cpu_dai_name = "msm-dai-q6-dev.16394",
7271 .platform_name = "msm-pcm-routing",
7272 .codec_name = "tavil_codec",
7273 .codec_dai_name = "tavil_rx3",
7274 .no_pcm = 1,
7275 .dpcm_playback = 1,
7276 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7277 .be_hw_params_fixup = msm_be_hw_params_fixup,
7278 .ops = &msm_be_ops,
7279 /* dai link has playback support */
7280 .ignore_pmdown_time = 1,
7281 .ignore_suspend = 1,
7282 },
7283 /* MAD BE */
7284 {
7285 .name = LPASS_BE_SLIMBUS_5_TX,
7286 .stream_name = "Slimbus5 Capture",
7287 .cpu_dai_name = "msm-dai-q6-dev.16395",
7288 .platform_name = "msm-pcm-routing",
7289 .codec_name = "tavil_codec",
7290 .codec_dai_name = "tavil_mad1",
7291 .no_pcm = 1,
7292 .dpcm_capture = 1,
7293 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7294 .be_hw_params_fixup = msm_be_hw_params_fixup,
7295 .ops = &msm_be_ops,
7296 .ignore_suspend = 1,
7297 },
7298 {
7299 .name = LPASS_BE_SLIMBUS_6_RX,
7300 .stream_name = "Slimbus6 Playback",
7301 .cpu_dai_name = "msm-dai-q6-dev.16396",
7302 .platform_name = "msm-pcm-routing",
7303 .codec_name = "tavil_codec",
7304 .codec_dai_name = "tavil_rx4",
7305 .no_pcm = 1,
7306 .dpcm_playback = 1,
7307 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7308 .be_hw_params_fixup = msm_be_hw_params_fixup,
7309 .ops = &msm_be_ops,
7310 /* dai link has playback support */
7311 .ignore_pmdown_time = 1,
7312 .ignore_suspend = 1,
7313 },
7314 /* Slimbus VI Recording */
7315 {
7316 .name = LPASS_BE_SLIMBUS_TX_VI,
7317 .stream_name = "Slimbus4 Capture",
7318 .cpu_dai_name = "msm-dai-q6-dev.16393",
7319 .platform_name = "msm-pcm-routing",
7320 .codec_name = "tavil_codec",
7321 .codec_dai_name = "tavil_vifeedback",
7322 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7323 .be_hw_params_fixup = msm_be_hw_params_fixup,
7324 .ops = &msm_be_ops,
7325 .ignore_suspend = 1,
7326 .no_pcm = 1,
7327 .dpcm_capture = 1,
7328 },
7329};
7330
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]7331static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
7332 /* Backend DAI Links */
7333 {
7334 .name = LPASS_BE_SLIMBUS_0_RX,
7335 .stream_name = "Slimbus Playback",
7336 .cpu_dai_name = "msm-dai-q6-dev.16384",
7337 .platform_name = "msm-pcm-routing",
7338 .codec_name = "tasha_codec",
7339 .codec_dai_name = "tasha_mix_rx1",
7340 .no_pcm = 1,
7341 .dpcm_playback = 1,
7342 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7343 .init = &msm_audrx_tasha_init,
7344 .be_hw_params_fixup = msm_be_hw_params_fixup,
7345 /* this dainlink has playback support */
7346 .ignore_pmdown_time = 1,
7347 .ignore_suspend = 1,
7348 .ops = &msm_be_ops,
7349 },
7350 {
7351 .name = LPASS_BE_SLIMBUS_0_TX,
7352 .stream_name = "Slimbus Capture",
7353 .cpu_dai_name = "msm-dai-q6-dev.16385",
7354 .platform_name = "msm-pcm-routing",
7355 .codec_name = "tasha_codec",
7356 .codec_dai_name = "tasha_tx1",
7357 .no_pcm = 1,
7358 .dpcm_capture = 1,
7359 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7360 .be_hw_params_fixup = msm_be_hw_params_fixup,
7361 .ignore_suspend = 1,
7362 .ops = &msm_be_ops,
7363 },
7364 {
7365 .name = LPASS_BE_SLIMBUS_1_RX,
7366 .stream_name = "Slimbus1 Playback",
7367 .cpu_dai_name = "msm-dai-q6-dev.16386",
7368 .platform_name = "msm-pcm-routing",
7369 .codec_name = "tasha_codec",
7370 .codec_dai_name = "tasha_mix_rx1",
7371 .no_pcm = 1,
7372 .dpcm_playback = 1,
7373 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
7374 .be_hw_params_fixup = msm_be_hw_params_fixup,
7375 .ops = &msm_be_ops,
7376 /* dai link has playback support */
7377 .ignore_pmdown_time = 1,
7378 .ignore_suspend = 1,
7379 },
7380 {
7381 .name = LPASS_BE_SLIMBUS_1_TX,
7382 .stream_name = "Slimbus1 Capture",
7383 .cpu_dai_name = "msm-dai-q6-dev.16387",
7384 .platform_name = "msm-pcm-routing",
7385 .codec_name = "tasha_codec",
7386 .codec_dai_name = "tasha_tx3",
7387 .no_pcm = 1,
7388 .dpcm_capture = 1,
7389 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
7390 .be_hw_params_fixup = msm_be_hw_params_fixup,
7391 .ops = &msm_be_ops,
7392 .ignore_suspend = 1,
7393 },
7394 {
7395 .name = LPASS_BE_SLIMBUS_3_RX,
7396 .stream_name = "Slimbus3 Playback",
7397 .cpu_dai_name = "msm-dai-q6-dev.16390",
7398 .platform_name = "msm-pcm-routing",
7399 .codec_name = "tasha_codec",
7400 .codec_dai_name = "tasha_mix_rx1",
7401 .no_pcm = 1,
7402 .dpcm_playback = 1,
7403 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
7404 .be_hw_params_fixup = msm_be_hw_params_fixup,
7405 .ops = &msm_be_ops,
7406 /* dai link has playback support */
7407 .ignore_pmdown_time = 1,
7408 .ignore_suspend = 1,
7409 },
7410 {
7411 .name = LPASS_BE_SLIMBUS_3_TX,
7412 .stream_name = "Slimbus3 Capture",
7413 .cpu_dai_name = "msm-dai-q6-dev.16391",
7414 .platform_name = "msm-pcm-routing",
7415 .codec_name = "tasha_codec",
7416 .codec_dai_name = "tasha_tx1",
7417 .no_pcm = 1,
7418 .dpcm_capture = 1,
7419 .dpcm_playback = 1,
7420 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
7421 .be_hw_params_fixup = msm_be_hw_params_fixup,
7422 .ops = &msm_be_ops,
7423 .ignore_suspend = 1,
7424 },
7425 {
7426 .name = LPASS_BE_SLIMBUS_4_RX,
7427 .stream_name = "Slimbus4 Playback",
7428 .cpu_dai_name = "msm-dai-q6-dev.16392",
7429 .platform_name = "msm-pcm-routing",
7430 .codec_name = "tasha_codec",
7431 .codec_dai_name = "tasha_mix_rx1",
7432 .no_pcm = 1,
7433 .dpcm_playback = 1,
7434 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
7435 .be_hw_params_fixup = msm_be_hw_params_fixup,
7436 .ops = &msm_be_ops,
7437 /* dai link has playback support */
7438 .ignore_pmdown_time = 1,
7439 .ignore_suspend = 1,
7440 },
7441 {
7442 .name = LPASS_BE_SLIMBUS_5_RX,
7443 .stream_name = "Slimbus5 Playback",
7444 .cpu_dai_name = "msm-dai-q6-dev.16394",
7445 .platform_name = "msm-pcm-routing",
7446 .codec_name = "tasha_codec",
7447 .codec_dai_name = "tasha_rx3",
7448 .no_pcm = 1,
7449 .dpcm_playback = 1,
7450 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
7451 .be_hw_params_fixup = msm_be_hw_params_fixup,
7452 .ops = &msm_be_ops,
7453 /* dai link has playback support */
7454 .ignore_pmdown_time = 1,
7455 .ignore_suspend = 1,
7456 },
7457 /* MAD BE */
7458 {
7459 .name = LPASS_BE_SLIMBUS_5_TX,
7460 .stream_name = "Slimbus5 Capture",
7461 .cpu_dai_name = "msm-dai-q6-dev.16395",
7462 .platform_name = "msm-pcm-routing",
7463 .codec_name = "tasha_codec",
7464 .codec_dai_name = "tasha_mad1",
7465 .no_pcm = 1,
7466 .dpcm_capture = 1,
7467 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
7468 .be_hw_params_fixup = msm_be_hw_params_fixup,
7469 .ops = &msm_be_ops,
7470 .ignore_suspend = 1,
7471 },
7472 {
7473 .name = LPASS_BE_SLIMBUS_6_RX,
7474 .stream_name = "Slimbus6 Playback",
7475 .cpu_dai_name = "msm-dai-q6-dev.16396",
7476 .platform_name = "msm-pcm-routing",
7477 .codec_name = "tasha_codec",
7478 .codec_dai_name = "tasha_rx4",
7479 .no_pcm = 1,
7480 .dpcm_playback = 1,
7481 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
7482 .be_hw_params_fixup = msm_be_hw_params_fixup,
7483 .ops = &msm_be_ops,
7484 /* dai link has playback support */
7485 .ignore_pmdown_time = 1,
7486 .ignore_suspend = 1,
7487 },
7488};
7489
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7490static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
7491 {
7492 .name = LPASS_BE_SLIMBUS_7_RX,
7493 .stream_name = "Slimbus7 Playback",
7494 .cpu_dai_name = "msm-dai-q6-dev.16398",
7495 .platform_name = "msm-pcm-routing",
7496 .codec_name = "btfmslim_slave",
7497 /* BT codec driver determines capabilities based on
7498 * dai name, bt codecdai name should always contains
7499 * supported usecase information
7500 */
7501 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
7502 .no_pcm = 1,
7503 .dpcm_playback = 1,
7504 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
7505 .be_hw_params_fixup = msm_be_hw_params_fixup,
7506 .ops = &msm_wcn_ops,
7507 /* dai link has playback support */
7508 .ignore_pmdown_time = 1,
7509 .ignore_suspend = 1,
7510 },
7511 {
7512 .name = LPASS_BE_SLIMBUS_7_TX,
7513 .stream_name = "Slimbus7 Capture",
7514 .cpu_dai_name = "msm-dai-q6-dev.16399",
7515 .platform_name = "msm-pcm-routing",
7516 .codec_name = "btfmslim_slave",
7517 .codec_dai_name = "btfm_bt_sco_slim_tx",
7518 .no_pcm = 1,
7519 .dpcm_capture = 1,
7520 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7521 .be_hw_params_fixup = msm_be_hw_params_fixup,
7522 .ops = &msm_wcn_ops,
7523 .ignore_suspend = 1,
7524 },
7525 {
7526 .name = LPASS_BE_SLIMBUS_8_TX,
7527 .stream_name = "Slimbus8 Capture",
7528 .cpu_dai_name = "msm-dai-q6-dev.16401",
7529 .platform_name = "msm-pcm-routing",
7530 .codec_name = "btfmslim_slave",
7531 .codec_dai_name = "btfm_fm_slim_tx",
7532 .no_pcm = 1,
7533 .dpcm_capture = 1,
7534 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7535 .be_hw_params_fixup = msm_be_hw_params_fixup,
7536 .init = &msm_wcn_init,
7537 .ops = &msm_wcn_ops,
7538 .ignore_suspend = 1,
7539 },
7540};
7541
7542static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7543 /* DISP PORT BACK END DAI Link */
7544 {
7545 .name = LPASS_BE_DISPLAY_PORT,
7546 .stream_name = "Display Port Playback",
7547 .cpu_dai_name = "msm-dai-q6-dp.24608",
7548 .platform_name = "msm-pcm-routing",
7549 .codec_name = "msm-ext-disp-audio-codec-rx",
7550 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7551 .no_pcm = 1,
7552 .dpcm_playback = 1,
7553 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7554 .be_hw_params_fixup = msm_be_hw_params_fixup,
7555 .ignore_pmdown_time = 1,
7556 .ignore_suspend = 1,
7557 },
7558};
7559
7560static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7561 {
7562 .name = LPASS_BE_PRI_MI2S_RX,
7563 .stream_name = "Primary MI2S Playback",
7564 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7565 .platform_name = "msm-pcm-routing",
7566 .codec_name = "msm-stub-codec.1",
7567 .codec_dai_name = "msm-stub-rx",
7568 .no_pcm = 1,
7569 .dpcm_playback = 1,
7570 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7571 .be_hw_params_fixup = msm_be_hw_params_fixup,
7572 .ops = &msm_mi2s_be_ops,
7573 .ignore_suspend = 1,
7574 .ignore_pmdown_time = 1,
7575 },
7576 {
7577 .name = LPASS_BE_PRI_MI2S_TX,
7578 .stream_name = "Primary MI2S Capture",
7579 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7580 .platform_name = "msm-pcm-routing",
7581 .codec_name = "msm-stub-codec.1",
7582 .codec_dai_name = "msm-stub-tx",
7583 .no_pcm = 1,
7584 .dpcm_capture = 1,
7585 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7586 .be_hw_params_fixup = msm_be_hw_params_fixup,
7587 .ops = &msm_mi2s_be_ops,
7588 .ignore_suspend = 1,
7589 },
7590 {
7591 .name = LPASS_BE_SEC_MI2S_RX,
7592 .stream_name = "Secondary MI2S Playback",
7593 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7594 .platform_name = "msm-pcm-routing",
7595 .codec_name = "msm-stub-codec.1",
7596 .codec_dai_name = "msm-stub-rx",
7597 .no_pcm = 1,
7598 .dpcm_playback = 1,
7599 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7600 .be_hw_params_fixup = msm_be_hw_params_fixup,
7601 .ops = &msm_mi2s_be_ops,
7602 .ignore_suspend = 1,
7603 .ignore_pmdown_time = 1,
7604 },
7605 {
7606 .name = LPASS_BE_SEC_MI2S_TX,
7607 .stream_name = "Secondary MI2S Capture",
7608 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7609 .platform_name = "msm-pcm-routing",
7610 .codec_name = "msm-stub-codec.1",
7611 .codec_dai_name = "msm-stub-tx",
7612 .no_pcm = 1,
7613 .dpcm_capture = 1,
7614 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7615 .be_hw_params_fixup = msm_be_hw_params_fixup,
7616 .ops = &msm_mi2s_be_ops,
7617 .ignore_suspend = 1,
7618 },
7619 {
7620 .name = LPASS_BE_TERT_MI2S_RX,
7621 .stream_name = "Tertiary MI2S Playback",
7622 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7623 .platform_name = "msm-pcm-routing",
7624 .codec_name = "msm-stub-codec.1",
7625 .codec_dai_name = "msm-stub-rx",
7626 .no_pcm = 1,
7627 .dpcm_playback = 1,
7628 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7629 .be_hw_params_fixup = msm_be_hw_params_fixup,
7630 .ops = &msm_mi2s_be_ops,
7631 .ignore_suspend = 1,
7632 .ignore_pmdown_time = 1,
7633 },
7634 {
7635 .name = LPASS_BE_TERT_MI2S_TX,
7636 .stream_name = "Tertiary MI2S Capture",
7637 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7638 .platform_name = "msm-pcm-routing",
7639 .codec_name = "msm-stub-codec.1",
7640 .codec_dai_name = "msm-stub-tx",
7641 .no_pcm = 1,
7642 .dpcm_capture = 1,
7643 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7644 .be_hw_params_fixup = msm_be_hw_params_fixup,
7645 .ops = &msm_mi2s_be_ops,
7646 .ignore_suspend = 1,
7647 },
7648 {
7649 .name = LPASS_BE_QUAT_MI2S_RX,
7650 .stream_name = "Quaternary MI2S Playback",
7651 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7652 .platform_name = "msm-pcm-routing",
7653 .codec_name = "msm-stub-codec.1",
7654 .codec_dai_name = "msm-stub-rx",
7655 .no_pcm = 1,
7656 .dpcm_playback = 1,
7657 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7658 .be_hw_params_fixup = msm_be_hw_params_fixup,
7659 .ops = &msm_mi2s_be_ops,
7660 .ignore_suspend = 1,
7661 .ignore_pmdown_time = 1,
7662 },
7663 {
7664 .name = LPASS_BE_QUAT_MI2S_TX,
7665 .stream_name = "Quaternary MI2S Capture",
7666 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7667 .platform_name = "msm-pcm-routing",
7668 .codec_name = "msm-stub-codec.1",
7669 .codec_dai_name = "msm-stub-tx",
7670 .no_pcm = 1,
7671 .dpcm_capture = 1,
7672 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7673 .be_hw_params_fixup = msm_be_hw_params_fixup,
7674 .ops = &msm_mi2s_be_ops,
7675 .ignore_suspend = 1,
7676 },
7677 {
7678 .name = LPASS_BE_QUIN_MI2S_RX,
7679 .stream_name = "Quinary MI2S Playback",
7680 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7681 .platform_name = "msm-pcm-routing",
7682 .codec_name = "msm-stub-codec.1",
7683 .codec_dai_name = "msm-stub-rx",
7684 .no_pcm = 1,
7685 .dpcm_playback = 1,
7686 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7687 .be_hw_params_fixup = msm_be_hw_params_fixup,
7688 .ops = &msm_mi2s_be_ops,
7689 .ignore_suspend = 1,
7690 .ignore_pmdown_time = 1,
7691 },
7692 {
7693 .name = LPASS_BE_QUIN_MI2S_TX,
7694 .stream_name = "Quinary MI2S Capture",
7695 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7696 .platform_name = "msm-pcm-routing",
7697 .codec_name = "msm-stub-codec.1",
7698 .codec_dai_name = "msm-stub-tx",
7699 .no_pcm = 1,
7700 .dpcm_capture = 1,
7701 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7702 .be_hw_params_fixup = msm_be_hw_params_fixup,
7703 .ops = &msm_mi2s_be_ops,
7704 .ignore_suspend = 1,
7705 },
7706
7707};
7708
7709static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7710 /* Primary AUX PCM Backend DAI Links */
7711 {
7712 .name = LPASS_BE_AUXPCM_RX,
7713 .stream_name = "AUX PCM Playback",
7714 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7715 .platform_name = "msm-pcm-routing",
7716 .codec_name = "msm-stub-codec.1",
7717 .codec_dai_name = "msm-stub-rx",
7718 .no_pcm = 1,
7719 .dpcm_playback = 1,
7720 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7721 .be_hw_params_fixup = msm_be_hw_params_fixup,
7722 .ignore_pmdown_time = 1,
7723 .ignore_suspend = 1,
7724 },
7725 {
7726 .name = LPASS_BE_AUXPCM_TX,
7727 .stream_name = "AUX PCM Capture",
7728 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7729 .platform_name = "msm-pcm-routing",
7730 .codec_name = "msm-stub-codec.1",
7731 .codec_dai_name = "msm-stub-tx",
7732 .no_pcm = 1,
7733 .dpcm_capture = 1,
7734 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7735 .be_hw_params_fixup = msm_be_hw_params_fixup,
7736 .ignore_suspend = 1,
7737 },
7738 /* Secondary AUX PCM Backend DAI Links */
7739 {
7740 .name = LPASS_BE_SEC_AUXPCM_RX,
7741 .stream_name = "Sec AUX PCM Playback",
7742 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7743 .platform_name = "msm-pcm-routing",
7744 .codec_name = "msm-stub-codec.1",
7745 .codec_dai_name = "msm-stub-rx",
7746 .no_pcm = 1,
7747 .dpcm_playback = 1,
7748 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7749 .be_hw_params_fixup = msm_be_hw_params_fixup,
7750 .ignore_pmdown_time = 1,
7751 .ignore_suspend = 1,
7752 },
7753 {
7754 .name = LPASS_BE_SEC_AUXPCM_TX,
7755 .stream_name = "Sec AUX PCM Capture",
7756 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7757 .platform_name = "msm-pcm-routing",
7758 .codec_name = "msm-stub-codec.1",
7759 .codec_dai_name = "msm-stub-tx",
7760 .no_pcm = 1,
7761 .dpcm_capture = 1,
7762 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7763 .be_hw_params_fixup = msm_be_hw_params_fixup,
7764 .ignore_suspend = 1,
7765 },
7766 /* Tertiary AUX PCM Backend DAI Links */
7767 {
7768 .name = LPASS_BE_TERT_AUXPCM_RX,
7769 .stream_name = "Tert AUX PCM Playback",
7770 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7771 .platform_name = "msm-pcm-routing",
7772 .codec_name = "msm-stub-codec.1",
7773 .codec_dai_name = "msm-stub-rx",
7774 .no_pcm = 1,
7775 .dpcm_playback = 1,
7776 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7777 .be_hw_params_fixup = msm_be_hw_params_fixup,
7778 .ignore_suspend = 1,
7779 },
7780 {
7781 .name = LPASS_BE_TERT_AUXPCM_TX,
7782 .stream_name = "Tert AUX PCM Capture",
7783 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7784 .platform_name = "msm-pcm-routing",
7785 .codec_name = "msm-stub-codec.1",
7786 .codec_dai_name = "msm-stub-tx",
7787 .no_pcm = 1,
7788 .dpcm_capture = 1,
7789 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7790 .be_hw_params_fixup = msm_be_hw_params_fixup,
7791 .ignore_suspend = 1,
7792 },
7793 /* Quaternary AUX PCM Backend DAI Links */
7794 {
7795 .name = LPASS_BE_QUAT_AUXPCM_RX,
7796 .stream_name = "Quat AUX PCM Playback",
7797 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7798 .platform_name = "msm-pcm-routing",
7799 .codec_name = "msm-stub-codec.1",
7800 .codec_dai_name = "msm-stub-rx",
7801 .no_pcm = 1,
7802 .dpcm_playback = 1,
7803 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7804 .be_hw_params_fixup = msm_be_hw_params_fixup,
7805 .ignore_pmdown_time = 1,
7806 .ignore_suspend = 1,
7807 },
7808 {
7809 .name = LPASS_BE_QUAT_AUXPCM_TX,
7810 .stream_name = "Quat AUX PCM Capture",
7811 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7812 .platform_name = "msm-pcm-routing",
7813 .codec_name = "msm-stub-codec.1",
7814 .codec_dai_name = "msm-stub-tx",
7815 .no_pcm = 1,
7816 .dpcm_capture = 1,
7817 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7818 .be_hw_params_fixup = msm_be_hw_params_fixup,
7819 .ignore_suspend = 1,
7820 },
7821 /* Quinary AUX PCM Backend DAI Links */
7822 {
7823 .name = LPASS_BE_QUIN_AUXPCM_RX,
7824 .stream_name = "Quin AUX PCM Playback",
7825 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7826 .platform_name = "msm-pcm-routing",
7827 .codec_name = "msm-stub-codec.1",
7828 .codec_dai_name = "msm-stub-rx",
7829 .no_pcm = 1,
7830 .dpcm_playback = 1,
7831 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7832 .be_hw_params_fixup = msm_be_hw_params_fixup,
7833 .ignore_pmdown_time = 1,
7834 .ignore_suspend = 1,
7835 },
7836 {
7837 .name = LPASS_BE_QUIN_AUXPCM_TX,
7838 .stream_name = "Quin AUX PCM Capture",
7839 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7840 .platform_name = "msm-pcm-routing",
7841 .codec_name = "msm-stub-codec.1",
7842 .codec_dai_name = "msm-stub-tx",
7843 .no_pcm = 1,
7844 .dpcm_capture = 1,
7845 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7846 .be_hw_params_fixup = msm_be_hw_params_fixup,
7847 .ignore_suspend = 1,
7848 },
7849};
7850
7851static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7852 /* WSA CDC DMA Backend DAI Links */
7853 {
7854 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7855 .stream_name = "WSA CDC DMA0 Playback",
7856 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7857 .platform_name = "msm-pcm-routing",
7858 .codec_name = "bolero_codec",
7859 .codec_dai_name = "wsa_macro_rx1",
7860 .no_pcm = 1,
7861 .dpcm_playback = 1,
7862 .init = &msm_int_audrx_init,
7863 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7864 .be_hw_params_fixup = msm_be_hw_params_fixup,
7865 .ignore_pmdown_time = 1,
7866 .ignore_suspend = 1,
7867 .ops = &msm_cdc_dma_be_ops,
7868 },
7869 {
7870 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7871 .stream_name = "WSA CDC DMA1 Playback",
7872 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7873 .platform_name = "msm-pcm-routing",
7874 .codec_name = "bolero_codec",
7875 .codec_dai_name = "wsa_macro_rx_mix",
7876 .no_pcm = 1,
7877 .dpcm_playback = 1,
7878 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7879 .be_hw_params_fixup = msm_be_hw_params_fixup,
7880 .ignore_pmdown_time = 1,
7881 .ignore_suspend = 1,
7882 .ops = &msm_cdc_dma_be_ops,
7883 },
7884 {
7885 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7886 .stream_name = "WSA CDC DMA1 Capture",
7887 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7888 .platform_name = "msm-pcm-routing",
7889 .codec_name = "bolero_codec",
7890 .codec_dai_name = "wsa_macro_echo",
7891 .no_pcm = 1,
7892 .dpcm_capture = 1,
7893 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7894 .be_hw_params_fixup = msm_be_hw_params_fixup,
7895 .ignore_suspend = 1,
7896 .ops = &msm_cdc_dma_be_ops,
7897 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7898};
7899
7900static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7901 /* RX CDC DMA Backend DAI Links */
7902 {
7903 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7904 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7905 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7906 .platform_name = "msm-pcm-routing",
7907 .codec_name = "bolero_codec",
7908 .codec_dai_name = "rx_macro_rx1",
7909 .no_pcm = 1,
7910 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7911 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7912 .be_hw_params_fixup = msm_be_hw_params_fixup,
7913 .ignore_pmdown_time = 1,
7914 .ignore_suspend = 1,
7915 .ops = &msm_cdc_dma_be_ops,
7916 },
7917 {
7918 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7919 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7920 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7921 .platform_name = "msm-pcm-routing",
7922 .codec_name = "bolero_codec",
7923 .codec_dai_name = "rx_macro_rx2",
7924 .no_pcm = 1,
7925 .dpcm_playback = 1,
7926 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7927 .be_hw_params_fixup = msm_be_hw_params_fixup,
7928 .ignore_pmdown_time = 1,
7929 .ignore_suspend = 1,
7930 .ops = &msm_cdc_dma_be_ops,
7931 },
7932 {
7933 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7934 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7935 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7936 .platform_name = "msm-pcm-routing",
7937 .codec_name = "bolero_codec",
7938 .codec_dai_name = "rx_macro_rx3",
7939 .no_pcm = 1,
7940 .dpcm_playback = 1,
7941 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7942 .be_hw_params_fixup = msm_be_hw_params_fixup,
7943 .ignore_pmdown_time = 1,
7944 .ignore_suspend = 1,
7945 .ops = &msm_cdc_dma_be_ops,
7946 },
7947 {
7948 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7949 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7950 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7951 .platform_name = "msm-pcm-routing",
7952 .codec_name = "bolero_codec",
7953 .codec_dai_name = "rx_macro_rx4",
7954 .no_pcm = 1,
7955 .dpcm_playback = 1,
7956 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7957 .be_hw_params_fixup = msm_be_hw_params_fixup,
7958 .ignore_pmdown_time = 1,
7959 .ignore_suspend = 1,
7960 .ops = &msm_cdc_dma_be_ops,
7961 },
7962 /* TX CDC DMA Backend DAI Links */
7963 {
Vatsal Bucha83e6ee12018-11-30 18:58:31 +0530[diff] [blame]7964 .name = LPASS_BE_TX_CDC_DMA_TX_0,
7965 .stream_name = "TX CDC DMA0 Capture",
7966 .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
7967 .platform_name = "msm-pcm-routing",
7968 .codec_name = "bolero_codec",
7969 .codec_dai_name = "rx_macro_echo",
7970 .no_pcm = 1,
7971 .dpcm_capture = 1,
7972 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
7973 .be_hw_params_fixup = msm_be_hw_params_fixup,
7974 .ignore_suspend = 1,
7975 .ops = &msm_cdc_dma_be_ops,
7976 },
7977 {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7978 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7979 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7980 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7981 .platform_name = "msm-pcm-routing",
7982 .codec_name = "bolero_codec",
7983 .codec_dai_name = "tx_macro_tx1",
7984 .no_pcm = 1,
7985 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7986 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7987 .be_hw_params_fixup = msm_be_hw_params_fixup,
7988 .ignore_suspend = 1,
7989 .ops = &msm_cdc_dma_be_ops,
7990 },
7991 {
7992 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7993 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7994 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7995 .platform_name = "msm-pcm-routing",
7996 .codec_name = "bolero_codec",
7997 .codec_dai_name = "tx_macro_tx2",
7998 .no_pcm = 1,
7999 .dpcm_capture = 1,
8000 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
8001 .be_hw_params_fixup = msm_be_hw_params_fixup,
8002 .ignore_suspend = 1,
8003 .ops = &msm_cdc_dma_be_ops,
8004 },
8005};
8006
8007static struct snd_soc_dai_link msm_sm6150_dai_links[
8008 ARRAY_SIZE(msm_common_dai_links) +
8009 ARRAY_SIZE(msm_tavil_fe_dai_links) +
8010 ARRAY_SIZE(msm_bolero_fe_dai_links) +
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8011 ARRAY_SIZE(msm_tasha_fe_dai_links) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8012 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]8013 ARRAY_SIZE(msm_int_compress_capture_dai) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8014 ARRAY_SIZE(msm_common_be_dai_links) +
8015 ARRAY_SIZE(msm_tavil_be_dai_links) +
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8016 ARRAY_SIZE(msm_tasha_be_dai_links) +
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8017 ARRAY_SIZE(msm_wcn_be_dai_links) +
8018 ARRAY_SIZE(ext_disp_be_dai_link) +
8019 ARRAY_SIZE(msm_mi2s_be_dai_links) +
8020 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
8021 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
8022 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
8023
8024static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
8025{
8026 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8027 struct snd_soc_pcm_runtime *rtd;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8028 struct snd_soc_component *component;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8029 int ret = 0;
8030 void *mbhc_calibration;
8031
8032 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8033 if (!rtd) {
8034 dev_err(card->dev,
8035 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8036 __func__, be_dl_name);
8037 ret = -EINVAL;
8038 goto err_pcm_runtime;
8039 }
8040
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8041 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
8042 if (!component) {
8043 pr_err("%s: component is NULL\n", __func__);
8044 ret = -EINVAL;
8045 goto err_pcm_runtime;
8046 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8047 mbhc_calibration = def_wcd_mbhc_cal();
8048 if (!mbhc_calibration) {
8049 ret = -ENOMEM;
8050 goto err_mbhc_cal;
8051 }
8052 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8053 ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8054 if (ret) {
8055 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8056 __func__, ret);
8057 goto err_hs_detect;
8058 }
8059 return 0;
8060
8061err_hs_detect:
8062 kfree(mbhc_calibration);
8063err_mbhc_cal:
8064err_pcm_runtime:
8065 return ret;
8066}
8067
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8068static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
8069{
8070 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8071 struct snd_soc_pcm_runtime *rtd;
8072 struct snd_soc_component *component;
8073 int ret = 0;
8074 void *mbhc_calibration;
8075
8076 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8077 if (!rtd) {
8078 dev_err(card->dev,
8079 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8080 __func__, be_dl_name);
8081 ret = -EINVAL;
8082 goto err_pcm_runtime;
8083 }
8084
8085 component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
8086 if (!component) {
8087 pr_err("%s: component is NULL\n", __func__);
8088 ret = -EINVAL;
8089 goto err_pcm_runtime;
8090 }
8091
8092 mbhc_calibration = def_wcd_mbhc_cal();
8093 if (!mbhc_calibration) {
8094 ret = -ENOMEM;
8095 goto err_mbhc_cal;
8096 }
8097 wcd_mbhc_cfg.calibration = mbhc_calibration;
8098 ret = tasha_mbhc_hs_detect(component, &wcd_mbhc_cfg);
8099 if (ret) {
8100 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
8101 __func__, ret);
8102 goto err_hs_detect;
8103 }
8104 return 0;
8105
8106err_hs_detect:
8107 kfree(mbhc_calibration);
8108err_mbhc_cal:
8109err_pcm_runtime:
8110 return ret;
8111}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8112
8113static int msm_populate_dai_link_component_of_node(
8114 struct snd_soc_card *card)
8115{
8116 int i, index, ret = 0;
8117 struct device *cdev = card->dev;
8118 struct snd_soc_dai_link *dai_link = card->dai_link;
8119 struct device_node *np;
8120
8121 if (!cdev) {
8122 pr_err("%s: Sound card device memory NULL\n", __func__);
8123 return -ENODEV;
8124 }
8125
8126 for (i = 0; i < card->num_links; i++) {
8127 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
8128 continue;
8129
8130 /* populate platform_of_node for snd card dai links */
8131 if (dai_link[i].platform_name &&
8132 !dai_link[i].platform_of_node) {
8133 index = of_property_match_string(cdev->of_node,
8134 "asoc-platform-names",
8135 dai_link[i].platform_name);
8136 if (index < 0) {
8137 pr_err("%s: No match found for platform name: %s\n",
8138 __func__, dai_link[i].platform_name);
8139 ret = index;
8140 goto err;
8141 }
8142 np = of_parse_phandle(cdev->of_node, "asoc-platform",
8143 index);
8144 if (!np) {
8145 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
8146 __func__, dai_link[i].platform_name,
8147 index);
8148 ret = -ENODEV;
8149 goto err;
8150 }
8151 dai_link[i].platform_of_node = np;
8152 dai_link[i].platform_name = NULL;
8153 }
8154
8155 /* populate cpu_of_node for snd card dai links */
8156 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
8157 index = of_property_match_string(cdev->of_node,
8158 "asoc-cpu-names",
8159 dai_link[i].cpu_dai_name);
8160 if (index >= 0) {
8161 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
8162 index);
8163 if (!np) {
8164 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
8165 __func__,
8166 dai_link[i].cpu_dai_name);
8167 ret = -ENODEV;
8168 goto err;
8169 }
8170 dai_link[i].cpu_of_node = np;
8171 dai_link[i].cpu_dai_name = NULL;
8172 }
8173 }
8174
8175 /* populate codec_of_node for snd card dai links */
8176 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
8177 index = of_property_match_string(cdev->of_node,
8178 "asoc-codec-names",
8179 dai_link[i].codec_name);
8180 if (index < 0)
8181 continue;
8182 np = of_parse_phandle(cdev->of_node, "asoc-codec",
8183 index);
8184 if (!np) {
8185 pr_err("%s: retrieving phandle for codec %s failed\n",
8186 __func__, dai_link[i].codec_name);
8187 ret = -ENODEV;
8188 goto err;
8189 }
8190 dai_link[i].codec_of_node = np;
8191 dai_link[i].codec_name = NULL;
8192 }
8193 }
8194
8195err:
8196 return ret;
8197}
8198
8199static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
8200{
8201 int ret = 0;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8202 struct snd_soc_component *component =
8203 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8204
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8205 ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
8206 ARRAY_SIZE(msm_ext_snd_controls));
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8207 if (ret < 0) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8208 dev_err(component->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8209 "%s: add_codec_controls failed, err = %d\n",
8210 __func__, ret);
8211 return ret;
8212 }
8213
8214 return 0;
8215}
8216
8217static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
8218 struct snd_pcm_hw_params *params)
8219{
8220 struct snd_soc_pcm_runtime *rtd = substream->private_data;
8221 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
8222
8223 int ret = 0;
8224 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
8225 151};
8226 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
8227 134, 135, 136, 137, 138, 139,
8228 140, 141, 142, 143};
8229
8230 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
8231 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
8232 slim_rx_cfg[SLIM_RX_0].channels,
8233 rx_ch);
8234 if (ret < 0)
8235 pr_err("%s: RX failed to set cpu chan map error %d\n",
8236 __func__, ret);
8237 } else {
8238 ret = snd_soc_dai_set_channel_map(cpu_dai,
8239 slim_tx_cfg[SLIM_TX_0].channels,
8240 tx_ch, 0, 0);
8241 if (ret < 0)
8242 pr_err("%s: TX failed to set cpu chan map error %d\n",
8243 __func__, ret);
8244 }
8245
8246 return ret;
8247}
8248
8249static struct snd_soc_ops msm_stub_be_ops = {
8250 .hw_params = msm_snd_stub_hw_params,
8251};
8252
8253static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
8254
8255 /* FrontEnd DAI Links */
8256 {
8257 .name = "MSMSTUB Media1",
8258 .stream_name = "MultiMedia1",
8259 .cpu_dai_name = "MultiMedia1",
8260 .platform_name = "msm-pcm-dsp.0",
8261 .dynamic = 1,
8262 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
8263 .dpcm_playback = 1,
8264 .dpcm_capture = 1,
8265 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
8266 SND_SOC_DPCM_TRIGGER_POST},
8267 .codec_dai_name = "snd-soc-dummy-dai",
8268 .codec_name = "snd-soc-dummy",
8269 .ignore_suspend = 1,
8270 /* this dainlink has playback support */
8271 .ignore_pmdown_time = 1,
8272 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
8273 },
8274};
8275
8276static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
8277
8278 /* Backend DAI Links */
8279 {
8280 .name = LPASS_BE_SLIMBUS_0_RX,
8281 .stream_name = "Slimbus Playback",
8282 .cpu_dai_name = "msm-dai-q6-dev.16384",
8283 .platform_name = "msm-pcm-routing",
8284 .codec_name = "msm-stub-codec.1",
8285 .codec_dai_name = "msm-stub-rx",
8286 .no_pcm = 1,
8287 .dpcm_playback = 1,
8288 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
8289 .init = &msm_audrx_stub_init,
8290 .be_hw_params_fixup = msm_be_hw_params_fixup,
8291 .ignore_pmdown_time = 1, /* dai link has playback support */
8292 .ignore_suspend = 1,
8293 .ops = &msm_stub_be_ops,
8294 },
8295 {
8296 .name = LPASS_BE_SLIMBUS_0_TX,
8297 .stream_name = "Slimbus Capture",
8298 .cpu_dai_name = "msm-dai-q6-dev.16385",
8299 .platform_name = "msm-pcm-routing",
8300 .codec_name = "msm-stub-codec.1",
8301 .codec_dai_name = "msm-stub-tx",
8302 .no_pcm = 1,
8303 .dpcm_capture = 1,
8304 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
8305 .be_hw_params_fixup = msm_be_hw_params_fixup,
8306 .ignore_suspend = 1,
8307 .ops = &msm_stub_be_ops,
8308 },
8309};
8310
8311static struct snd_soc_dai_link msm_stub_dai_links[
8312 ARRAY_SIZE(msm_stub_fe_dai_links) +
8313 ARRAY_SIZE(msm_stub_be_dai_links)];
8314
8315struct snd_soc_card snd_soc_card_stub_msm = {
8316 .name = "sm6150-stub-snd-card",
8317};
8318
8319static const struct of_device_id sm6150_asoc_machine_of_match[] = {
8320 { .compatible = "qcom,sm6150-asoc-snd",
8321 .data = "codec"},
8322 { .compatible = "qcom,sm6150-asoc-snd-stub",
8323 .data = "stub_codec"},
8324 {},
8325};
8326
8327static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
8328{
8329 struct snd_soc_card *card = NULL;
8330 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8331 int total_links = 0, rc = 0;
8332 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
8333 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
8334 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8335 const struct of_device_id *match;
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8336 u32 tasha_codec = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8337
8338 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
8339 if (!match) {
8340 dev_err(dev, "%s: No DT match found for sound card\n",
8341 __func__);
8342 return NULL;
8343 }
8344
8345 if (!strcmp(match->data, "codec")) {
8346 card = &snd_soc_card_sm6150_msm;
8347 memcpy(msm_sm6150_dai_links + total_links,
8348 msm_common_dai_links,
8349 sizeof(msm_common_dai_links));
8350
8351 total_links += ARRAY_SIZE(msm_common_dai_links);
8352
8353 memcpy(msm_sm6150_dai_links + total_links,
8354 msm_common_misc_fe_dai_links,
8355 sizeof(msm_common_misc_fe_dai_links));
8356
8357 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
8358
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8359 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
8360 &tavil_codec);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8361 if (rc)
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8362 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8363 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8364
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8365 rc = of_property_read_u32(dev->of_node, "qcom,tasha_codec",
8366 &tasha_codec);
8367 if (rc)
8368 dev_dbg(dev, "%s: No DT match for tasha codec\n",
8369 __func__);
8370
8371 if (tavil_codec) {
8372 card->late_probe =
8373 msm_snd_card_tavil_late_probe;
8374 memcpy(msm_sm6150_dai_links + total_links,
8375 msm_tavil_fe_dai_links,
8376 sizeof(msm_tavil_fe_dai_links));
8377 total_links +=
8378 ARRAY_SIZE(msm_tavil_fe_dai_links);
8379 } else if (tasha_codec) {
8380 card->late_probe =
8381 msm_snd_card_tasha_late_probe;
8382 memcpy(msm_sm6150_dai_links + total_links,
8383 msm_tasha_fe_dai_links,
8384 sizeof(msm_tasha_fe_dai_links));
8385 total_links +=
8386 ARRAY_SIZE(msm_tasha_fe_dai_links);
8387 } else {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8388 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8389 msm_bolero_fe_dai_links,
8390 sizeof(msm_bolero_fe_dai_links));
8391 total_links +=
8392 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8393 }
8394
8395 memcpy(msm_sm6150_dai_links + total_links,
Md Mansoor Ahmedfc755592018-11-29 11:50:59 +0530[diff] [blame]8396 msm_int_compress_capture_dai,
8397 sizeof(msm_int_compress_capture_dai));
8398
8399 total_links += ARRAY_SIZE(msm_int_compress_capture_dai);
8400
8401 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8402 msm_common_be_dai_links,
8403 sizeof(msm_common_be_dai_links));
8404
8405 total_links += ARRAY_SIZE(msm_common_be_dai_links);
8406
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8407 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8408 memcpy(msm_sm6150_dai_links + total_links,
8409 msm_tavil_be_dai_links,
8410 sizeof(msm_tavil_be_dai_links));
8411 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]8412 } else if (tasha_codec) {
8413 memcpy(msm_sm6150_dai_links + total_links,
8414 msm_tasha_be_dai_links,
8415 sizeof(msm_tasha_be_dai_links));
8416 total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8417 } else {
8418 memcpy(msm_sm6150_dai_links + total_links,
8419 msm_wsa_cdc_dma_be_dai_links,
8420 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8421 total_links +=
8422 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8423
8424 memcpy(msm_sm6150_dai_links + total_links,
8425 msm_rx_tx_cdc_dma_be_dai_links,
8426 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
8427 total_links +=
8428 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
8429 }
8430
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8431 rc = of_property_read_u32(dev->of_node,
8432 "qcom,ext-disp-audio-rx",
8433 &ext_disp_audio_intf);
8434 if (rc) {
8435 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8436 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8437 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]8438 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8439 memcpy(msm_sm6150_dai_links + total_links,
8440 ext_disp_be_dai_link,
8441 sizeof(ext_disp_be_dai_link));
8442 total_links +=
8443 ARRAY_SIZE(ext_disp_be_dai_link);
8444 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8445 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8446
8447 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
8448 &mi2s_audio_intf);
8449 if (rc) {
8450 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
8451 __func__);
8452 } else {
8453 if (mi2s_audio_intf) {
8454 memcpy(msm_sm6150_dai_links + total_links,
8455 msm_mi2s_be_dai_links,
8456 sizeof(msm_mi2s_be_dai_links));
8457 total_links +=
8458 ARRAY_SIZE(msm_mi2s_be_dai_links);
8459 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8460 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8461
8462
8463 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
8464 &wcn_btfm_intf);
8465 if (rc) {
8466 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
8467 __func__);
8468 } else {
8469 if (wcn_btfm_intf) {
8470 memcpy(msm_sm6150_dai_links + total_links,
8471 msm_wcn_be_dai_links,
8472 sizeof(msm_wcn_be_dai_links));
8473 total_links +=
8474 ARRAY_SIZE(msm_wcn_be_dai_links);
8475 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8476 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8477
8478 rc = of_property_read_u32(dev->of_node,
8479 "qcom,auxpcm-audio-intf",
8480 &auxpcm_audio_intf);
8481 if (rc) {
8482 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
8483 __func__);
8484 } else {
8485 if (auxpcm_audio_intf) {
8486 memcpy(msm_sm6150_dai_links + total_links,
8487 msm_auxpcm_be_dai_links,
8488 sizeof(msm_auxpcm_be_dai_links));
8489 total_links +=
8490 ARRAY_SIZE(msm_auxpcm_be_dai_links);
8491 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8492 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8493
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8494 dailink = msm_sm6150_dai_links;
8495 } else if (!strcmp(match->data, "stub_codec")) {
8496 card = &snd_soc_card_stub_msm;
8497
8498 memcpy(msm_stub_dai_links + total_links,
8499 msm_stub_fe_dai_links,
8500 sizeof(msm_stub_fe_dai_links));
8501 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
8502
8503 memcpy(msm_stub_dai_links + total_links,
8504 msm_stub_be_dai_links,
8505 sizeof(msm_stub_be_dai_links));
8506 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
8507
8508 dailink = msm_stub_dai_links;
8509 }
8510
8511 if (card) {
8512 card->dai_link = dailink;
8513 card->num_links = total_links;
8514 }
8515
8516 return card;
8517}
8518
8519static int msm_wsa881x_init(struct snd_soc_component *component)
8520{
8521 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8522 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
8523 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
8524 SPKR_L_BOOST, SPKR_L_VI};
8525 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
8526 SPKR_R_BOOST, SPKR_R_VI};
8527 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
8528 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8529 struct msm_asoc_mach_data *pdata;
8530 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8531 struct snd_card *card = component->card->snd_card;
8532 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8533 int ret = 0;
8534
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8535 if (!component) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8536 pr_err("%s codec is NULL\n", __func__);
8537 return -EINVAL;
8538 }
8539
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8540 dapm = snd_soc_component_get_dapm(component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8541
8542 if (!strcmp(component->name_prefix, "SpkrLeft")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8543 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
8544 __func__, component->name);
8545 wsa881x_set_channel_map(component, &spkleft_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8546 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8547 &ch_rate[0], &spkleft_port_types[0]);
8548 if (dapm->component) {
8549 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
8550 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
8551 }
8552 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8553 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
8554 __func__, component->name);
8555 wsa881x_set_channel_map(component, &spkright_ports[0],
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8556 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
8557 &ch_rate[0], &spkright_port_types[0]);
8558 if (dapm->component) {
8559 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
8560 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
8561 }
8562 } else {
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8563 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
8564 component->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8565 ret = -EINVAL;
8566 goto err;
8567 }
8568 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8569 if (!pdata->codec_root) {
8570 entry = snd_info_create_subdir(card->module, "codecs",
8571 card->proc_root);
8572 if (!entry) {
8573 pr_err("%s: Cannot create codecs module entry\n",
8574 __func__);
8575 ret = 0;
8576 goto err;
8577 }
8578 pdata->codec_root = entry;
8579 }
8580 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8581 component);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8582err:
8583 return ret;
8584}
8585
8586static int msm_aux_codec_init(struct snd_soc_component *component)
8587{
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8588 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8589 int ret = 0;
8590 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8591 struct snd_info_entry *entry;
8592 struct snd_card *card = component->card->snd_card;
8593 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8594
8595 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8596 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8597 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8598 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8599 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8600 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8601 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8602 snd_soc_dapm_sync(dapm);
8603
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8604 pdata = snd_soc_card_get_drvdata(component->card);
8605 if (!pdata->codec_root) {
8606 entry = snd_info_create_subdir(card->module, "codecs",
8607 card->proc_root);
8608 if (!entry) {
8609 pr_err("%s: Cannot create codecs module entry\n",
8610 __func__);
8611 ret = 0;
8612 goto codec_root_err;
8613 }
8614 pdata->codec_root = entry;
8615 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8616 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]8617codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8618 mbhc_calibration = def_wcd_mbhc_cal();
8619 if (!mbhc_calibration) {
8620 return -ENOMEM;
8621 }
8622 wcd_mbhc_cfg.calibration = mbhc_calibration;
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8623 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8624
8625 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8626}
8627
8628static int msm_init_aux_dev(struct platform_device *pdev,
8629 struct snd_soc_card *card)
8630{
8631 struct device_node *wsa_of_node;
8632 struct device_node *aux_codec_of_node;
8633 u32 wsa_max_devs;
8634 u32 wsa_dev_cnt;
Aditya Bavanari32b3e5e2018-12-04 17:19:56 +0530[diff] [blame]8635 u32 codec_max_aux_devs = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8636 u32 codec_aux_dev_cnt = 0;
8637 int i;
Md Mansoor Ahmed2382aaa2018-11-20 11:06:32 +0530[diff] [blame]8638 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
8639 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8640 const char *auxdev_name_prefix[1];
8641 char *dev_name_str = NULL;
8642 int found = 0;
8643 int codecs_found = 0;
8644 int ret = 0;
8645
8646 /* Get maximum WSA device count for this platform */
8647 ret = of_property_read_u32(pdev->dev.of_node,
8648 "qcom,wsa-max-devs", &wsa_max_devs);
8649 if (ret) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8650 dev_err(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8651 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8652 __func__, pdev->dev.of_node->full_name, ret);
8653 wsa_max_devs = 0;
8654 goto codec_aux_dev;
8655 }
8656 if (wsa_max_devs == 0) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8657 dev_dbg(&pdev->dev,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8658 "%s: Max WSA devices is 0 for this target?\n",
8659 __func__);
8660 goto codec_aux_dev;
8661 }
8662
8663 /* Get count of WSA device phandles for this platform */
8664 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8665 "qcom,wsa-devs", NULL);
8666 if (wsa_dev_cnt == -ENOENT) {
8667 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8668 __func__);
8669 goto err;
8670 } else if (wsa_dev_cnt <= 0) {
8671 dev_err(&pdev->dev,
8672 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8673 __func__, wsa_dev_cnt);
8674 ret = -EINVAL;
8675 goto err;
8676 }
8677
8678 /*
8679 * Expect total phandles count to be NOT less than maximum possible
8680 * WSA count. However, if it is less, then assign same value to
8681 * max count as well.
8682 */
8683 if (wsa_dev_cnt < wsa_max_devs) {
8684 dev_dbg(&pdev->dev,
8685 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8686 __func__, wsa_max_devs, wsa_dev_cnt);
8687 wsa_max_devs = wsa_dev_cnt;
8688 }
8689
8690 /* Make sure prefix string passed for each WSA device */
8691 ret = of_property_count_strings(pdev->dev.of_node,
8692 "qcom,wsa-aux-dev-prefix");
8693 if (ret != wsa_dev_cnt) {
8694 dev_err(&pdev->dev,
8695 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8696 __func__, wsa_dev_cnt, ret);
8697 ret = -EINVAL;
8698 goto err;
8699 }
8700
8701 /*
8702 * Alloc mem to store phandle and index info of WSA device, if already
8703 * registered with ALSA core
8704 */
8705 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8706 sizeof(struct msm_wsa881x_dev_info),
8707 GFP_KERNEL);
8708 if (!wsa881x_dev_info) {
8709 ret = -ENOMEM;
8710 goto err;
8711 }
8712
8713 /*
8714 * search and check whether all WSA devices are already
8715 * registered with ALSA core or not. If found a node, store
8716 * the node and the index in a local array of struct for later
8717 * use.
8718 */
8719 for (i = 0; i < wsa_dev_cnt; i++) {
8720 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8721 "qcom,wsa-devs", i);
8722 if (unlikely(!wsa_of_node)) {
8723 /* we should not be here */
8724 dev_err(&pdev->dev,
8725 "%s: wsa dev node is not present\n",
8726 __func__);
8727 ret = -EINVAL;
8728 goto err;
8729 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8730 if (soc_find_component_locked(wsa_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8731 /* WSA device registered with ALSA core */
8732 wsa881x_dev_info[found].of_node = wsa_of_node;
8733 wsa881x_dev_info[found].index = i;
8734 found++;
8735 if (found == wsa_max_devs)
8736 break;
8737 }
8738 }
8739
8740 if (found < wsa_max_devs) {
8741 dev_dbg(&pdev->dev,
8742 "%s: failed to find %d components. Found only %d\n",
8743 __func__, wsa_max_devs, found);
8744 return -EPROBE_DEFER;
8745 }
8746 dev_info(&pdev->dev,
8747 "%s: found %d wsa881x devices registered with ALSA core\n",
8748 __func__, found);
8749
8750codec_aux_dev:
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]8751 if (!strnstr(card->name, "tavil", strlen(card->name)) &&
8752 !strnstr(card->name, "tasha", strlen(card->name))) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8753 /* Get maximum aux codec device count for this platform */
8754 ret = of_property_read_u32(pdev->dev.of_node,
8755 "qcom,codec-max-aux-devs",
8756 &codec_max_aux_devs);
8757 if (ret) {
8758 dev_err(&pdev->dev,
8759 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
8760 __func__, pdev->dev.of_node->full_name, ret);
8761 codec_max_aux_devs = 0;
8762 goto aux_dev_register;
8763 }
8764 if (codec_max_aux_devs == 0) {
8765 dev_dbg(&pdev->dev,
8766 "%s: Max aux codec devices is 0 for this target?\n",
8767 __func__);
8768 goto aux_dev_register;
8769 }
8770
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8771 /* Get count of aux codec device phandles for this platform */
8772 codec_aux_dev_cnt = of_count_phandle_with_args(
8773 pdev->dev.of_node,
8774 "qcom,codec-aux-devs", NULL);
8775 if (codec_aux_dev_cnt == -ENOENT) {
8776 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8777 __func__);
8778 goto err;
8779 } else if (codec_aux_dev_cnt <= 0) {
8780 dev_err(&pdev->dev,
8781 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8782 __func__, codec_aux_dev_cnt);
8783 ret = -EINVAL;
8784 goto err;
8785 }
8786
8787 /*
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8788 * Expect total phandles count to be NOT less than maximum possible
8789 * AUX device count. However, if it is less, then assign same value to
8790 * max count as well.
8791 */
8792 if (codec_aux_dev_cnt < codec_max_aux_devs) {
8793 dev_dbg(&pdev->dev,
8794 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
8795 __func__, codec_max_aux_devs,
8796 codec_aux_dev_cnt);
8797 codec_max_aux_devs = codec_aux_dev_cnt;
8798 }
8799
8800 /*
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8801 * Alloc mem to store phandle and index info of aux codec
8802 * if already registered with ALSA core
8803 */
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8804 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8805 sizeof(struct aux_codec_dev_info),
8806 GFP_KERNEL);
8807 if (!aux_cdc_dev_info) {
8808 ret = -ENOMEM;
8809 goto err;
8810 }
8811
8812 /*
8813 * search and check whether all aux codecs are already
8814 * registered with ALSA core or not. If found a node, store
8815 * the node and the index in a local array of struct for later
8816 * use.
8817 */
8818 for (i = 0; i < codec_aux_dev_cnt; i++) {
8819 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8820 "qcom,codec-aux-devs", i);
8821 if (unlikely(!aux_codec_of_node)) {
8822 /* we should not be here */
8823 dev_err(&pdev->dev,
8824 "%s: aux codec dev node is not present\n",
8825 __func__);
8826 ret = -EINVAL;
8827 goto err;
8828 }
Aditya Bavanari849a5fd2018-12-04 15:51:56 +0530[diff] [blame]8829 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8830 /* AUX codec registered with ALSA core */
8831 aux_cdc_dev_info[codecs_found].of_node =
8832 aux_codec_of_node;
8833 aux_cdc_dev_info[codecs_found].index = i;
8834 codecs_found++;
8835 }
8836 }
8837
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8838 if (codecs_found < codec_max_aux_devs) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8839 dev_dbg(&pdev->dev,
8840 "%s: failed to find %d components. Found only %d\n",
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8841 __func__, codec_max_aux_devs, codecs_found);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8842 return -EPROBE_DEFER;
8843 }
8844 dev_info(&pdev->dev,
8845 "%s: found %d AUX codecs registered with ALSA core\n",
8846 __func__, codecs_found);
8847
8848 }
8849
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8850aux_dev_register:
8851 card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
8852 card->num_configs = wsa_max_devs + codec_max_aux_devs;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8853
8854 /* Alloc array of AUX devs struct */
8855 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8856 sizeof(struct snd_soc_aux_dev),
8857 GFP_KERNEL);
8858 if (!msm_aux_dev) {
8859 ret = -ENOMEM;
8860 goto err;
8861 }
8862
8863 /* Alloc array of codec conf struct */
8864 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8865 sizeof(struct snd_soc_codec_conf),
8866 GFP_KERNEL);
8867 if (!msm_codec_conf) {
8868 ret = -ENOMEM;
8869 goto err;
8870 }
8871
8872 for (i = 0; i < wsa_max_devs; i++) {
8873 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8874 GFP_KERNEL);
8875 if (!dev_name_str) {
8876 ret = -ENOMEM;
8877 goto err;
8878 }
8879
8880 ret = of_property_read_string_index(pdev->dev.of_node,
8881 "qcom,wsa-aux-dev-prefix",
8882 wsa881x_dev_info[i].index,
8883 auxdev_name_prefix);
8884 if (ret) {
8885 dev_err(&pdev->dev,
8886 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8887 __func__, ret);
8888 ret = -EINVAL;
8889 goto err;
8890 }
8891
8892 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8893 msm_aux_dev[i].name = dev_name_str;
8894 msm_aux_dev[i].codec_name = NULL;
8895 msm_aux_dev[i].codec_of_node =
8896 wsa881x_dev_info[i].of_node;
8897 msm_aux_dev[i].init = msm_wsa881x_init;
8898 msm_codec_conf[i].dev_name = NULL;
8899 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8900 msm_codec_conf[i].of_node =
8901 wsa881x_dev_info[i].of_node;
8902 }
8903
8904 for (i = 0; i < codec_aux_dev_cnt; i++) {
Aditya Bavanariec279c72018-11-22 15:52:25 +0530[diff] [blame]8905 msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8906 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8907 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8908 aux_cdc_dev_info[i].of_node;
8909 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8910 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8911 msm_codec_conf[wsa_max_devs + i].name_prefix =
8912 NULL;
8913 msm_codec_conf[wsa_max_devs + i].of_node =
8914 aux_cdc_dev_info[i].of_node;
8915 }
8916
8917 card->codec_conf = msm_codec_conf;
8918 card->aux_dev = msm_aux_dev;
8919err:
8920 return ret;
8921}
8922
8923static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8924{
8925 int count;
8926 u32 mi2s_master_slave[MI2S_MAX];
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8927 u32 mi2s_ext_mclk[MI2S_MAX];
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8928 int ret;
8929
8930 for (count = 0; count < MI2S_MAX; count++) {
8931 mutex_init(&mi2s_intf_conf[count].lock);
8932 mi2s_intf_conf[count].ref_cnt = 0;
8933 }
8934
8935 ret = of_property_read_u32_array(pdev->dev.of_node,
8936 "qcom,msm-mi2s-master",
8937 mi2s_master_slave, MI2S_MAX);
8938 if (ret) {
8939 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8940 __func__);
8941 } else {
8942 for (count = 0; count < MI2S_MAX; count++) {
8943 mi2s_intf_conf[count].msm_is_mi2s_master =
8944 mi2s_master_slave[count];
8945 }
8946 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8947
8948 ret = of_property_read_u32_array(pdev->dev.of_node,
8949 "qcom,msm-mi2s-ext-mclk",
8950 mi2s_ext_mclk, MI2S_MAX);
8951 if (ret) {
8952 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
8953 __func__);
8954 } else {
8955 for (count = 0; count < MI2S_MAX; count++)
8956 mi2s_intf_conf[count].msm_is_ext_mclk =
8957 mi2s_ext_mclk[count];
8958 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8959}
8960
8961static void msm_i2s_auxpcm_deinit(void)
8962{
8963 int count;
8964
8965 for (count = 0; count < MI2S_MAX; count++) {
8966 mutex_destroy(&mi2s_intf_conf[count].lock);
8967 mi2s_intf_conf[count].ref_cnt = 0;
8968 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]8969 mi2s_intf_conf[count].msm_is_ext_mclk = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8970 }
8971}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8972
8973static int sm6150_ssr_enable(struct device *dev, void *data)
8974{
8975 struct platform_device *pdev = to_platform_device(dev);
8976 struct snd_soc_card *card = platform_get_drvdata(pdev);
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]8977 struct msm_asoc_mach_data *pdata = NULL;
8978 struct snd_soc_component *component = NULL;
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8979 int ret = 0;
8980
8981 if (!card) {
8982 dev_err(dev, "%s: card is NULL\n", __func__);
8983 ret = -EINVAL;
8984 goto err;
8985 }
8986
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]8987 if (strnstr(card->name, "tavil", strlen(card->name)) ||
8988 strnstr(card->name, "tasha", strlen(card->name))) {
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8989 pdata = snd_soc_card_get_drvdata(card);
8990 if (!pdata->is_afe_config_done) {
8991 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8992 struct snd_soc_pcm_runtime *rtd;
8993
8994 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8995 if (!rtd) {
8996 dev_err(dev,
8997 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8998 __func__, be_dl_name);
8999 ret = -EINVAL;
9000 goto err;
9001 }
Meng Wang56a0f8f2018-09-06 18:17:30 +0800[diff] [blame]9002 component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
9003 if (!component) {
9004 dev_err(dev, "%s: component is NULL\n",
9005 __func__);
9006 ret = -EINVAL;
9007 goto err;
9008 }
9009 ret = msm_afe_set_config(component);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9010 if (ret)
9011 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
9012 __func__, ret);
9013 else
9014 pdata->is_afe_config_done = true;
9015 }
9016 }
9017 snd_soc_card_change_online_state(card, 1);
9018 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
9019
9020err:
9021 return ret;
9022}
9023
9024static void sm6150_ssr_disable(struct device *dev, void *data)
9025{
9026 struct platform_device *pdev = to_platform_device(dev);
9027 struct snd_soc_card *card = platform_get_drvdata(pdev);
9028 struct msm_asoc_mach_data *pdata;
9029
9030 if (!card) {
9031 dev_err(dev, "%s: card is NULL\n", __func__);
9032 return;
9033 }
9034
9035 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
9036 snd_soc_card_change_online_state(card, 0);
9037
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]9038 if (strnstr(card->name, "tavil", strlen(card->name)) ||
9039 strnstr(card->name, "tasha", strlen(card->name))) {
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9040 pdata = snd_soc_card_get_drvdata(card);
9041 msm_afe_clear_config();
9042 pdata->is_afe_config_done = false;
9043 }
9044}
9045
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9046static int msm_ext_prepare_hifi(struct msm_asoc_mach_data *pdata)
9047{
9048 int ret = 0;
9049
9050 if (gpio_is_valid(pdata->hph_en1_gpio)) {
9051 pr_debug("%s: hph_en1_gpio request %d\n", __func__,
9052 pdata->hph_en1_gpio);
9053 ret = gpio_request(pdata->hph_en1_gpio, "hph_en1_gpio");
9054 if (ret) {
9055 pr_err("%s: hph_en1_gpio request failed, ret:%d\n",
9056 __func__, ret);
9057 goto err;
9058 }
9059 }
9060 if (gpio_is_valid(pdata->hph_en0_gpio)) {
9061 pr_debug("%s: hph_en0_gpio request %d\n", __func__,
9062 pdata->hph_en0_gpio);
9063 ret = gpio_request(pdata->hph_en0_gpio, "hph_en0_gpio");
9064 if (ret)
9065 pr_err("%s: hph_en0_gpio request failed, ret:%d\n",
9066 __func__, ret);
9067 }
9068
9069err:
9070 return ret;
9071}
9072
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9073static const struct snd_event_ops sm6150_ssr_ops = {
9074 .enable = sm6150_ssr_enable,
9075 .disable = sm6150_ssr_disable,
9076};
9077
9078static int msm_audio_ssr_compare(struct device *dev, void *data)
9079{
9080 struct device_node *node = data;
9081
9082 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
9083 __func__, dev->of_node, node);
9084 return (dev->of_node && dev->of_node == node);
9085}
9086
9087static int msm_audio_ssr_register(struct device *dev)
9088{
9089 struct device_node *np = dev->of_node;
9090 struct snd_event_clients *ssr_clients = NULL;
9091 struct device_node *node;
9092 int ret;
9093 int i;
9094
9095 for (i = 0; ; i++) {
9096 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
9097 if (!node)
9098 break;
9099 snd_event_mstr_add_client(&ssr_clients,
9100 msm_audio_ssr_compare, node);
9101 }
9102
9103 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
9104 ssr_clients, NULL);
9105 if (!ret)
9106 snd_event_notify(dev, SND_EVENT_UP);
9107
9108 return ret;
9109}
9110
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9111static int msm_asoc_machine_probe(struct platform_device *pdev)
9112{
9113 struct snd_soc_card *card;
9114 struct msm_asoc_mach_data *pdata;
9115 const char *mbhc_audio_jack_type = NULL;
9116 int ret;
9117
9118 if (!pdev->dev.of_node) {
9119 dev_err(&pdev->dev, "No platform supplied from device tree\n");
9120 return -EINVAL;
9121 }
9122
9123 pdata = devm_kzalloc(&pdev->dev,
9124 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
9125 if (!pdata)
9126 return -ENOMEM;
9127
9128 card = populate_snd_card_dailinks(&pdev->dev);
9129 if (!card) {
9130 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
9131 ret = -EINVAL;
9132 goto err;
9133 }
9134 card->dev = &pdev->dev;
9135 platform_set_drvdata(pdev, card);
9136 snd_soc_card_set_drvdata(card, pdata);
9137
9138 ret = snd_soc_of_parse_card_name(card, "qcom,model");
9139 if (ret) {
9140 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
9141 ret);
9142 goto err;
9143 }
9144
9145 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
9146 if (ret) {
9147 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
9148 ret);
9149 goto err;
9150 }
9151
9152 ret = msm_populate_dai_link_component_of_node(card);
9153 if (ret) {
9154 ret = -EPROBE_DEFER;
9155 goto err;
9156 }
9157
9158 ret = msm_init_aux_dev(pdev, card);
9159 if (ret)
9160 goto err;
9161
9162 ret = devm_snd_soc_register_card(&pdev->dev, card);
9163 if (ret == -EPROBE_DEFER) {
9164 if (codec_reg_done)
9165 ret = -EINVAL;
9166 goto err;
9167 } else if (ret) {
9168 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
9169 ret);
9170 goto err;
9171 }
9172 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9173
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9174 pdata->hph_en1_gpio = of_get_named_gpio(pdev->dev.of_node,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9175 "qcom,hph-en1-gpio", 0);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9176 if (!gpio_is_valid(pdata->hph_en1_gpio))
9177 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
9178 "qcom,hph-en1-gpio", 0);
9179 if (!gpio_is_valid(pdata->hph_en1_gpio) && (!pdata->hph_en1_gpio_p)) {
9180 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9181 "qcom,hph-en1-gpio", pdev->dev.of_node->full_name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9182 }
9183
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9184 pdata->hph_en0_gpio = of_get_named_gpio(pdev->dev.of_node,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9185 "qcom,hph-en0-gpio", 0);
Aditya Bavanari45e2e652019-01-11 20:18:55 +0530[diff] [blame]9186 if (!gpio_is_valid(pdata->hph_en0_gpio))
9187 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
9188 "qcom,hph-en0-gpio", 0);
9189 if (!gpio_is_valid(pdata->hph_en0_gpio) && (!pdata->hph_en0_gpio_p)) {
9190 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9191 "qcom,hph-en0-gpio", pdev->dev.of_node->full_name);
9192 }
9193
9194 ret = msm_ext_prepare_hifi(pdata);
9195 if (ret) {
9196 dev_dbg(&pdev->dev, "msm_ext_prepare_hifi failed (%d)\n",
9197 ret);
9198 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9199 }
9200
9201 ret = of_property_read_string(pdev->dev.of_node,
9202 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
9203 if (ret) {
9204 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
9205 "qcom,mbhc-audio-jack-type",
9206 pdev->dev.of_node->full_name);
9207 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]9208 ret = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9209 } else {
9210 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
9211 wcd_mbhc_cfg.enable_anc_mic_detect = false;
9212 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
9213 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
9214 wcd_mbhc_cfg.enable_anc_mic_detect = true;
9215 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
9216 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
9217 wcd_mbhc_cfg.enable_anc_mic_detect = true;
9218 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
9219 } else {
9220 wcd_mbhc_cfg.enable_anc_mic_detect = false;
9221 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
9222 }
9223 }
Aditya Bavanari353a5832018-11-22 15:10:32 +0530[diff] [blame]9224
9225 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
9226 "qcom,pri-mi2s-gpios", 0);
9227 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
9228 "qcom,sec-mi2s-gpios", 0);
9229 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
9230 "qcom,tert-mi2s-gpios", 0);
9231 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
9232 "qcom,quat-mi2s-gpios", 0);
9233 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
9234 "qcom,quin-mi2s-gpios", 0);
9235
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9236 /*
9237 * Parse US-Euro gpio info from DT. Report no error if us-euro
9238 * entry is not found in DT file as some targets do not support
9239 * US-Euro detection
9240 */
9241 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
9242 "qcom,us-euro-gpios", 0);
9243 if (!pdata->us_euro_gpio_p) {
9244 dev_dbg(&pdev->dev, "property %s not detected in node %s",
9245 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
9246 } else {
9247 dev_dbg(&pdev->dev, "%s detected\n",
9248 "qcom,us-euro-gpios");
9249 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
9250 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]9251
9252 if (wcd_mbhc_cfg.enable_usbc_analog) {
9253 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
9254
9255 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
9256 "fsa4480-i2c-handle", 0);
9257 if (!pdata->fsa_handle)
9258 dev_err(&pdev->dev,
9259 "property %s not detected in node %s\n",
9260 "fsa4480-i2c-handle",
9261 pdev->dev.of_node->full_name);
9262 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9263
9264 msm_i2s_auxpcm_init(pdev);
Aditya Bavanari054e70e2019-01-25 19:34:16 +0530[diff] [blame]9265 if (!strnstr(card->name, "tavil", strlen(card->name)) &&
9266 !strnstr(card->name, "tasha", strlen(card->name))) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9267 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
9268 "qcom,cdc-dmic01-gpios",
9269 0);
9270 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
9271 "qcom,cdc-dmic23-gpios",
9272 0);
9273 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9274
9275 ret = msm_audio_ssr_register(&pdev->dev);
9276 if (ret)
9277 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
9278 __func__, ret);
9279
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9280err:
9281 return ret;
9282}
9283
9284static int msm_asoc_machine_remove(struct platform_device *pdev)
9285{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]9286 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9287 msm_i2s_auxpcm_deinit();
9288
9289 return 0;
9290}
9291
9292static struct platform_driver sm6150_asoc_machine_driver = {
9293 .driver = {
9294 .name = DRV_NAME,
9295 .owner = THIS_MODULE,
9296 .pm = &snd_soc_pm_ops,
9297 .of_match_table = sm6150_asoc_machine_of_match,
9298 },
9299 .probe = msm_asoc_machine_probe,
9300 .remove = msm_asoc_machine_remove,
9301};
9302module_platform_driver(sm6150_asoc_machine_driver);
9303
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]9304MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]9305MODULE_LICENSE("GPL v2");
9306MODULE_ALIAS("platform:" DRV_NAME);
9307MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);