blob: a63d54b7f68c2281e9d6d19dfe1ae6464d70e53c [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Sanghee Kim7b4c1322012-10-04 18:44:36 -070058const size_t GSC_DST_W_ALIGNMENT_RGB888 = 32;
59const size_t GSC_DST_H_ALIGNMENT_RGB888 = 1;
Greg Hackmannd6743822012-10-02 17:27:25 -070060const size_t FIMD_GSC_IDX = 0;
61const size_t HDMI_GSC_IDX = 1;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070062const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
63const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
64 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann67b2c312012-10-01 13:31:26 -070065const size_t BURSTLEN_BYTES = 16 * 8;
Benoit Goby93f9f5d2012-09-28 20:37:17 -070066const size_t NUM_HDMI_BUFFERS = 3;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Erik Gilling87e707e2012-06-29 17:35:13 -070068struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070069
Greg Hackmann9130e702012-07-30 14:53:04 -070070struct exynos5_gsc_map_t {
71 enum {
72 GSC_NONE = 0,
73 GSC_M2M,
74 // TODO: GSC_LOCAL_PATH
75 } mode;
76 int idx;
77};
78
Greg Hackmann86eb1c62012-05-30 09:25:51 -070079struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070080 int overlay_map[NUM_HW_WINDOWS];
81 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
82 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070083};
84
Greg Hackmann44a6d422012-09-17 17:31:30 -070085const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070086struct exynos5_gsc_data_t {
87 void *gsc;
88 exynos_gsc_img src_cfg;
89 exynos_gsc_img dst_cfg;
90 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
91 size_t current_buf;
92};
93
Benoit Goby93f9f5d2012-09-28 20:37:17 -070094struct hdmi_layer_t {
95 int id;
96 int fd;
97 bool enabled;
98 exynos_gsc_img cfg;
99
100 bool streaming;
101 size_t current_buf;
102 size_t queued_buf;
103};
104
Erik Gilling87e707e2012-06-29 17:35:13 -0700105struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700106 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700107
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700109 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700111
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700112 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700113 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700114 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700115 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -0700116 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700117
Greg Hackmannd92fe212012-09-11 14:28:41 -0700118 int32_t xres;
119 int32_t yres;
120 int32_t xdpi;
121 int32_t ydpi;
122 int32_t vsync_period;
123
Benoit Goby8bad7e32012-08-16 14:17:14 -0700124 int hdmi_mixer0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700125 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700126 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700127 bool hdmi_blanked;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700128 int hdmi_w;
129 int hdmi_h;
Benoit Gobyb5501902012-10-01 00:29:01 -0700130
Benoit Gobyb5501902012-10-01 00:29:01 -0700131 hdmi_layer_t hdmi_layers[2];
Greg Hackmann9130e702012-07-30 14:53:04 -0700132
133 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700134
135 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700136 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700137 const void *last_handles[NUM_HW_WINDOWS];
138 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700139};
140
Greg Hackmannefd98532012-10-02 12:00:42 -0700141static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
142 size_t gsc_idx);
143
Greg Hackmann9130e702012-07-30 14:53:04 -0700144static void dump_handle(private_handle_t *h)
145{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700146 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
147 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700148}
149
Erik Gilling87e707e2012-06-29 17:35:13 -0700150static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700151{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700152 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
153 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
154 l->compositionType, l->flags, l->handle, l->transform,
155 l->blending,
156 l->sourceCrop.left,
157 l->sourceCrop.top,
158 l->sourceCrop.right,
159 l->sourceCrop.bottom,
160 l->displayFrame.left,
161 l->displayFrame.top,
162 l->displayFrame.right,
163 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700164
Greg Hackmann9130e702012-07-30 14:53:04 -0700165 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
166 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700167}
168
169static void dump_config(s3c_fb_win_config &c)
170{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700171 ALOGV("\tstate = %u", c.state);
172 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
173 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
174 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700175 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700176 c.fd, c.offset, c.stride,
177 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700178 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700179 }
180 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
181 ALOGV("\t\tcolor = %u", c.color);
182 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700183}
184
Greg Hackmann9130e702012-07-30 14:53:04 -0700185static void dump_gsc_img(exynos_gsc_img &c)
186{
187 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
188 c.x, c.y, c.w, c.h, c.fw, c.fh);
189 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
190 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
191}
192
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
194inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700195template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
196template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
197
198static bool is_transformed(const hwc_layer_1_t &layer)
199{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700200 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700201}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700202
Greg Hackmann9130e702012-07-30 14:53:04 -0700203static bool is_rotated(const hwc_layer_1_t &layer)
204{
205 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
206 (layer.transform & HAL_TRANSFORM_ROT_180);
207}
208
Erik Gilling87e707e2012-06-29 17:35:13 -0700209static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700210{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700211 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
212 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700213}
214
Benoit Goby8bad7e32012-08-16 14:17:14 -0700215static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
216{
217 return c1.x != c2.x ||
218 c1.y != c2.y ||
219 c1.w != c2.w ||
220 c1.h != c2.h ||
221 c1.format != c2.format ||
222 c1.rot != c2.rot ||
223 c1.cacheable != c2.cacheable ||
224 c1.drmMode != c2.drmMode;
225}
226
227static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
228{
229 return gsc_dst_cfg_changed(c1, c2) ||
230 c1.fw != c2.fw ||
231 c1.fh != c2.fh;
232}
233
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700234static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
235{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700236 switch (format) {
237 case HAL_PIXEL_FORMAT_RGBA_8888:
238 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
239 case HAL_PIXEL_FORMAT_RGBX_8888:
240 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
241 case HAL_PIXEL_FORMAT_RGBA_5551:
242 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700243 case HAL_PIXEL_FORMAT_RGB_565:
244 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700245 case HAL_PIXEL_FORMAT_BGRA_8888:
246 return S3C_FB_PIXEL_FORMAT_BGRA_8888;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700247 default:
248 return S3C_FB_PIXEL_FORMAT_MAX;
249 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700250}
251
252static bool exynos5_format_is_supported(int format)
253{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700254 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255}
256
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700257static bool exynos5_format_is_rgb(int format)
258{
259 switch (format) {
260 case HAL_PIXEL_FORMAT_RGBA_8888:
261 case HAL_PIXEL_FORMAT_RGBX_8888:
262 case HAL_PIXEL_FORMAT_RGB_888:
263 case HAL_PIXEL_FORMAT_RGB_565:
264 case HAL_PIXEL_FORMAT_BGRA_8888:
265 case HAL_PIXEL_FORMAT_RGBA_5551:
266 case HAL_PIXEL_FORMAT_RGBA_4444:
267 return true;
268
269 default:
270 return false;
271 }
272}
273
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700274static bool exynos5_format_is_supported_by_gscaler(int format)
275{
Greg Hackmann9130e702012-07-30 14:53:04 -0700276 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700277 case HAL_PIXEL_FORMAT_RGBX_8888:
278 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700279 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700280 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700281 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700282 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700283
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700284 default:
285 return false;
286 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700287}
288
Greg Hackmann296668e2012-08-14 15:51:40 -0700289static bool exynos5_format_is_ycrcb(int format)
290{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700291 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700292}
293
Greg Hackmann9130e702012-07-30 14:53:04 -0700294static bool exynos5_format_requires_gscaler(int format)
295{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700296 return (exynos5_format_is_supported_by_gscaler(format) &&
297 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700298}
299
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700300static uint8_t exynos5_format_to_bpp(int format)
301{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700302 switch (format) {
303 case HAL_PIXEL_FORMAT_RGBA_8888:
304 case HAL_PIXEL_FORMAT_RGBX_8888:
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700305 case HAL_PIXEL_FORMAT_BGRA_8888:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700306 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700307
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700308 case HAL_PIXEL_FORMAT_RGBA_5551:
309 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700310 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700311 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700312
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700313 default:
314 ALOGW("unrecognized pixel format %u", format);
315 return 0;
316 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700317}
318
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700319static bool is_x_aligned(const hwc_layer_1_t &layer, int format)
320{
321 if (!exynos5_format_is_supported(format))
322 return true;
323
324 uint8_t bpp = exynos5_format_to_bpp(format);
325 uint8_t pixel_alignment = 32 / bpp;
326
327 return (layer.displayFrame.left % pixel_alignment) == 0 &&
328 (layer.displayFrame.right % pixel_alignment) == 0;
329}
330
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700331static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
332 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700333{
334 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
335
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700336 int max_w = is_rotated(layer) ? 2048 : 4800;
337 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700338
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700339 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
340 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
341 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700342
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700343 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
344 int dest_w, dest_h;
345 if (rot90or270) {
346 dest_w = HEIGHT(layer.displayFrame);
347 dest_h = WIDTH(layer.displayFrame);
348 } else {
349 dest_w = WIDTH(layer.displayFrame);
350 dest_h = HEIGHT(layer.displayFrame);
351 }
352 int max_downscale = local_path ? 4 : 16;
353 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700354
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700355 return exynos5_format_is_supported_by_gscaler(format) &&
356 handle->stride <= max_w &&
357 handle->stride % GSC_W_ALIGNMENT == 0 &&
358 src_w <= dest_w * max_downscale &&
359 dest_w <= src_w * max_upscale &&
360 handle->vstride <= max_h &&
361 handle->vstride % GSC_H_ALIGNMENT == 0 &&
362 src_h <= dest_h * max_downscale &&
363 dest_h <= src_h * max_upscale &&
364 // per 46.2
365 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
366 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
367 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700368}
369
Greg Hackmann09c45c22012-09-20 09:35:37 -0700370static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
371{
372 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700373 || is_transformed(layer) || !is_x_aligned(layer, format);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700374}
375
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700376int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
377{
378 struct v4l2_dv_preset preset;
379 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700380 int index = 0;
381 bool found = false;
382 int ret;
383
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700384 if (ioctl(dev->hdmi_layers[0].fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700385 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
386 return -1;
387 }
388
389 while (true) {
390 enum_preset.index = index++;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700391 ret = ioctl(dev->hdmi_layers[0].fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700392
393 if (ret < 0) {
394 if (errno == EINVAL)
395 break;
396 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
397 return -1;
398 }
399
400 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
401 __func__, enum_preset.index, enum_preset.preset,
402 enum_preset.width, enum_preset.height, enum_preset.name);
403
404 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700405 dev->hdmi_w = enum_preset.width;
406 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700407 found = true;
408 }
409 }
410
411 return found ? 0 : -1;
412}
413
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700414static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
415{
416 switch (blending) {
417 case HWC_BLENDING_NONE:
418 return S3C_FB_BLENDING_NONE;
419 case HWC_BLENDING_PREMULT:
420 return S3C_FB_BLENDING_PREMULT;
421 case HWC_BLENDING_COVERAGE:
422 return S3C_FB_BLENDING_COVERAGE;
423
424 default:
425 return S3C_FB_BLENDING_MAX;
426 }
427}
428
429static bool exynos5_blending_is_supported(int32_t blending)
430{
431 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
432}
433
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700434
435static int hdmi_enable_layer(struct exynos5_hwc_composer_device_1_t *dev,
436 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700437{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700438 if (hl.enabled)
439 return 0;
440
Benoit Goby8bad7e32012-08-16 14:17:14 -0700441 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700442 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700443 reqbuf.count = NUM_HDMI_BUFFERS;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700444 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700445 reqbuf.memory = V4L2_MEMORY_DMABUF;
446 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0) {
447 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700448 return -1;
449 }
450
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700451 if (reqbuf.count != NUM_HDMI_BUFFERS) {
452 ALOGE("%s: layer%d: didn't get buffer", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700453 return -1;
454 }
455
Benoit Gobyb5501902012-10-01 00:29:01 -0700456 if (hl.id == 1) {
457 if (exynos_v4l2_s_ctrl(hl.fd, V4L2_CID_TV_PIXEL_BLEND_ENABLE, 1) < 0) {
458 ALOGE("%s: layer%d: PIXEL_BLEND_ENABLE failed %d", __func__,
459 hl.id, errno);
460 return -1;
461 }
462 }
463
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700464 ALOGV("%s: layer%d enabled", __func__, hl.id);
465 hl.enabled = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700466 return 0;
467}
468
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700469static void hdmi_disable_layer(struct exynos5_hwc_composer_device_1_t *dev,
470 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700471{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700472 if (!hl.enabled)
473 return;
474
475 if (hl.streaming) {
476 if (exynos_v4l2_streamoff(hl.fd, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0)
477 ALOGE("%s: layer%d: streamoff failed %d", __func__, hl.id, errno);
478 hl.streaming = false;
479 }
480
Benoit Goby8bad7e32012-08-16 14:17:14 -0700481 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700482 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby8bad7e32012-08-16 14:17:14 -0700483 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700484 reqbuf.memory = V4L2_MEMORY_DMABUF;
485 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0)
486 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700487
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700488 memset(&hl.cfg, 0, sizeof(hl.cfg));
489 hl.current_buf = 0;
490 hl.queued_buf = 0;
491 hl.enabled = false;
492
493 ALOGV("%s: layer%d disabled", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700494}
495
Benoit Gobycdd61b32012-07-09 12:09:59 -0700496static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
497{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700498 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700499 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700500
Benoit Gobyad4e3582012-08-30 17:17:34 -0700501 if (dev->hdmi_blanked)
502 return 0;
503
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700504 struct v4l2_subdev_format sd_fmt;
505 memset(&sd_fmt, 0, sizeof(sd_fmt));
506 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SINK;
507 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
508 sd_fmt.format.width = dev->hdmi_w;
509 sd_fmt.format.height = dev->hdmi_h;
510 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
511 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
512 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700513 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700514 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700515
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700516 struct v4l2_subdev_crop sd_crop;
517 memset(&sd_crop, 0, sizeof(sd_crop));
518 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SINK;
519 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
520 sd_crop.rect.width = dev->hdmi_w;
521 sd_crop.rect.height = dev->hdmi_h;
522 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
523 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
524 return -1;
525 }
526
527 memset(&sd_fmt, 0, sizeof(sd_fmt));
528 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
529 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
530 sd_fmt.format.width = dev->hdmi_w;
531 sd_fmt.format.height = dev->hdmi_h;
532 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
533 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
534 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
535 return -1;
536 }
537
538 memset(&sd_crop, 0, sizeof(sd_crop));
539 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
540 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
541 sd_crop.rect.width = dev->hdmi_w;
542 sd_crop.rect.height = dev->hdmi_h;
543 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
544 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
545 return -1;
546 }
547
Benoit Gobyb5501902012-10-01 00:29:01 -0700548 hdmi_enable_layer(dev, dev->hdmi_layers[1]);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700549
Benoit Goby8bad7e32012-08-16 14:17:14 -0700550 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700551 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700552}
553
554static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
555{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700556 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700557 return;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700558
559 hdmi_disable_layer(dev, dev->hdmi_layers[0]);
Benoit Gobyb5501902012-10-01 00:29:01 -0700560 hdmi_disable_layer(dev, dev->hdmi_layers[1]);
561
Greg Hackmannefd98532012-10-02 12:00:42 -0700562 exynos5_cleanup_gsc_m2m(dev, HDMI_GSC_IDX);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700563 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700564}
565
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700566static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev,
567 hdmi_layer_t &hl,
Benoit Gobyb5501902012-10-01 00:29:01 -0700568 hwc_layer_1_t &layer,
569 private_handle_t *h)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700570{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700571 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700572
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700573 exynos_gsc_img cfg;
574 memset(&cfg, 0, sizeof(cfg));
575 cfg.x = layer.displayFrame.left;
576 cfg.y = layer.displayFrame.top;
577 cfg.w = WIDTH(layer.displayFrame);
578 cfg.h = HEIGHT(layer.displayFrame);
579
580 if (gsc_src_cfg_changed(hl.cfg, cfg)) {
Benoit Gobyb5501902012-10-01 00:29:01 -0700581 hdmi_disable_layer(dev, hl);
582
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700583 struct v4l2_format fmt;
584 memset(&fmt, 0, sizeof(fmt));
585 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
586 fmt.fmt.pix_mp.width = cfg.w;
587 fmt.fmt.pix_mp.height = cfg.h;
588 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
589 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
590 fmt.fmt.pix_mp.num_planes = 1;
591 ret = exynos_v4l2_s_fmt(hl.fd, &fmt);
592 if (ret < 0) {
593 ALOGE("%s: layer%d: s_fmt failed %d", __func__, hl.id, errno);
594 goto err;
595 }
596
Benoit Gobyb5501902012-10-01 00:29:01 -0700597 struct v4l2_subdev_crop sd_crop;
598 memset(&sd_crop, 0, sizeof(sd_crop));
599 if (hl.id == 0)
600 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
601 else
602 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
603 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
604 sd_crop.rect.left = cfg.x;
605 sd_crop.rect.top = cfg.y;
606 sd_crop.rect.width = cfg.w;
607 sd_crop.rect.height = cfg.h;
608 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
609 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
610 goto err;
611 }
612
613 hdmi_enable_layer(dev, hl);
614
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700615 ALOGV("HDMI layer%d configuration:", hl.id);
616 dump_gsc_img(cfg);
617 hl.cfg = cfg;
618 }
619
620 struct v4l2_buffer buffer;
621 struct v4l2_plane planes[1];
622
623 if (hl.queued_buf == NUM_HDMI_BUFFERS) {
624 memset(&buffer, 0, sizeof(buffer));
625 memset(planes, 0, sizeof(planes));
626 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
627 buffer.memory = V4L2_MEMORY_DMABUF;
628 buffer.length = 1;
629 buffer.m.planes = planes;
630 ret = exynos_v4l2_dqbuf(hl.fd, &buffer);
631 if (ret < 0) {
632 ALOGE("%s: layer%d: dqbuf failed %d", __func__, hl.id, errno);
633 goto err;
634 }
635 hl.queued_buf--;
636 }
637
638 memset(&buffer, 0, sizeof(buffer));
639 memset(planes, 0, sizeof(planes));
640 buffer.index = hl.current_buf;
641 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
642 buffer.memory = V4L2_MEMORY_DMABUF;
643 buffer.flags = V4L2_BUF_FLAG_USE_SYNC;
644 buffer.reserved = layer.acquireFenceFd;
645 buffer.length = 1;
646 buffer.m.planes = planes;
647 buffer.m.planes[0].m.fd = h->fd;
648 if (exynos_v4l2_qbuf(hl.fd, &buffer) < 0) {
649 ALOGE("%s: layer%d: qbuf failed %d", __func__, hl.id, errno);
650 ret = -1;
651 goto err;
652 }
653
654 layer.releaseFenceFd = buffer.reserved;
655
656 hl.queued_buf++;
657 hl.current_buf = (hl.current_buf + 1) % NUM_HDMI_BUFFERS;
658
659 if (!hl.streaming) {
660 if (exynos_v4l2_streamon(hl.fd, buffer.type) < 0) {
661 ALOGE("%s: layer%d: streamon failed %d", __func__, hl.id, errno);
662 ret = -1;
663 goto err;
664 }
665 hl.streaming = true;
666 }
Benoit Goby105be0b2012-09-21 13:19:30 -0700667
668err:
669 if (layer.acquireFenceFd >= 0)
670 close(layer.acquireFenceFd);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700671
Benoit Goby105be0b2012-09-21 13:19:30 -0700672 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700673}
674
Greg Hackmann81575142012-09-19 15:09:04 -0700675bool exynos5_is_offscreen(hwc_layer_1_t &layer,
676 struct exynos5_hwc_composer_device_1_t *pdev)
677{
678 return layer.sourceCrop.left > pdev->xres ||
679 layer.sourceCrop.right < 0 ||
680 layer.sourceCrop.top > pdev->yres ||
681 layer.sourceCrop.bottom < 0;
682}
683
Greg Hackmann67b2c312012-10-01 13:31:26 -0700684size_t exynos5_visible_width(hwc_layer_1_t &layer, int format,
685 struct exynos5_hwc_composer_device_1_t *pdev)
686{
687 int bpp;
688 if (exynos5_requires_gscaler(layer, format))
689 bpp = 32;
690 else
691 bpp = exynos5_format_to_bpp(format);
692 int left = max(layer.displayFrame.left, 0);
693 int right = min(layer.displayFrame.right, pdev->xres);
694
695 return (right - left) * bpp / 8;
696}
697
Greg Hackmann81575142012-09-19 15:09:04 -0700698bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
699 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700700{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700701 if (layer.flags & HWC_SKIP_LAYER) {
702 ALOGV("\tlayer %u: skipping", i);
703 return false;
704 }
705
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700706 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700707
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700708 if (!handle) {
709 ALOGV("\tlayer %u: handle is NULL", i);
710 return false;
711 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700712
Greg Hackmann09c45c22012-09-20 09:35:37 -0700713 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700714 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700715 ALOGV("\tlayer %u: gscaler required but not supported", i);
716 return false;
717 }
718 } else {
719 if (!exynos5_format_is_supported(handle->format)) {
720 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
721 return false;
722 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700723 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700724 if (!exynos5_blending_is_supported(layer.blending)) {
725 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700726 return false;
727 }
Greg Hackmann81575142012-09-19 15:09:04 -0700728 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
729 ALOGW("\tlayer %u: off-screen", i);
730 return false;
731 }
Greg Hackmann67b2c312012-10-01 13:31:26 -0700732 if (exynos5_visible_width(layer, handle->format, pdev) < BURSTLEN_BYTES) {
733 ALOGV("\tlayer %u: visible area is too narrow", i);
734 return false;
735 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700736
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700737 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700738}
739
Greg Hackmann31991d52012-07-13 13:23:11 -0700740inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
741{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700742 return !(r1.left > r2.right ||
743 r1.right < r2.left ||
744 r1.top > r2.bottom ||
745 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700746}
747
748inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
749{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700750 hwc_rect i;
751 i.top = max(r1.top, r2.top);
752 i.bottom = min(r1.bottom, r2.bottom);
753 i.left = max(r1.left, r2.left);
754 i.right = min(r1.right, r2.right);
755 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700756}
757
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700758static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700759 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700760{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700761 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700762
Greg Hackmann9130e702012-07-30 14:53:04 -0700763 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700764
Benoit Goby4f439962012-09-21 17:16:45 -0700765 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700766 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
767 pdev->bufs.overlay_map[i] = -1;
768
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700769 bool fb_needed = false;
770 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700771
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700772 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700773 for (size_t i = 0; i < contents->numHwLayers; i++) {
774 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700775
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700776 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
777 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700778 continue;
779 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700780
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700781 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
782 ALOGV("\tlayer %u: background supported", i);
783 dump_layer(&contents->hwLayers[i]);
784 continue;
785 }
786
Greg Hackmann81575142012-09-19 15:09:04 -0700787 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
788 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700789 ALOGV("\tlayer %u: overlay supported", i);
790 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700791 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700792 continue;
793 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700794
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700795 if (!fb_needed) {
796 first_fb = i;
797 fb_needed = true;
798 }
799 last_fb = i;
800 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700801
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700802 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700803 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700804
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700805 // can't composite overlays sandwiched between framebuffers
806 if (fb_needed)
807 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700808 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700809
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700810 // Incrementally try to add our supported layers to hardware windows.
811 // If adding a layer would violate a hardware constraint, force it
812 // into the framebuffer and try again. (Revisiting the entire list is
813 // necessary because adding a layer to the framebuffer can cause other
814 // windows to retroactively violate constraints.)
815 bool changed;
Greg Hackmannd6743822012-10-02 17:27:25 -0700816 bool gsc_used;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700817 do {
818 android::Vector<hwc_rect> rects;
819 android::Vector<hwc_rect> overlaps;
Greg Hackmannd6743822012-10-02 17:27:25 -0700820 size_t pixels_left, windows_left;
821
822 gsc_used = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700823
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700824 if (fb_needed) {
825 hwc_rect_t fb_rect;
826 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700827 fb_rect.right = pdev->xres - 1;
828 fb_rect.bottom = pdev->yres - 1;
829 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700830 windows_left = NUM_HW_WINDOWS - 1;
831 rects.push_back(fb_rect);
832 }
833 else {
834 pixels_left = MAX_PIXELS;
835 windows_left = NUM_HW_WINDOWS;
836 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700837
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700838 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700839
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700840 for (size_t i = 0; i < contents->numHwLayers; i++) {
841 hwc_layer_1_t &layer = contents->hwLayers[i];
842 if ((layer.flags & HWC_SKIP_LAYER) ||
843 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700844 continue;
845
846 private_handle_t *handle = private_handle_t::dynamicCast(
847 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700848
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700849 // we've already accounted for the framebuffer above
850 if (layer.compositionType == HWC_FRAMEBUFFER)
851 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700852
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 // only layer 0 can be HWC_BACKGROUND, so we can
854 // unconditionally allow it without extra checks
855 if (layer.compositionType == HWC_BACKGROUND) {
856 windows_left--;
857 continue;
858 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700859
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700860 size_t pixels_needed = WIDTH(layer.displayFrame) *
861 HEIGHT(layer.displayFrame);
862 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700863 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700864 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700865 can_compose = can_compose && !gsc_used;
Greg Hackmann31991d52012-07-13 13:23:11 -0700866
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700867 // hwc_rect_t right and bottom values are normally exclusive;
868 // the intersection logic is simpler if we make them inclusive
869 hwc_rect_t visible_rect = layer.displayFrame;
870 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700871
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700872 // no more than 2 layers can overlap on a given pixel
873 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
874 if (intersect(visible_rect, overlaps.itemAt(j)))
875 can_compose = false;
876 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700877
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700878 if (!can_compose) {
879 layer.compositionType = HWC_FRAMEBUFFER;
880 if (!fb_needed) {
881 first_fb = last_fb = i;
882 fb_needed = true;
883 }
884 else {
885 first_fb = min(i, first_fb);
886 last_fb = max(i, last_fb);
887 }
888 changed = true;
889 break;
890 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700891
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700892 for (size_t j = 0; j < rects.size(); j++) {
893 const hwc_rect_t &other_rect = rects.itemAt(j);
894 if (intersect(visible_rect, other_rect))
895 overlaps.push_back(intersection(visible_rect, other_rect));
896 }
897 rects.push_back(visible_rect);
898 pixels_left -= pixels_needed;
899 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700900 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700901 gsc_used = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700902 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700903
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700904 if (changed)
905 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700906 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700907 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700908
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700909 unsigned int nextWindow = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700910
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700911 for (size_t i = 0; i < contents->numHwLayers; i++) {
912 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700913
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700914 if (fb_needed && i == first_fb) {
915 ALOGV("assigning framebuffer to window %u\n",
916 nextWindow);
917 nextWindow++;
918 continue;
919 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700920
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700921 if (layer.compositionType != HWC_FRAMEBUFFER &&
922 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700923 ALOGV("assigning layer %u to window %u", i, nextWindow);
924 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700925 if (layer.compositionType == HWC_OVERLAY) {
926 private_handle_t *handle =
927 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700928 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmannd6743822012-10-02 17:27:25 -0700929 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[FIMD_GSC_IDX]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700930 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700931 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmannd6743822012-10-02 17:27:25 -0700932 pdev->bufs.gsc_map[nextWindow].idx = FIMD_GSC_IDX;
Greg Hackmann9130e702012-07-30 14:53:04 -0700933 }
934 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700935 nextWindow++;
936 }
937 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700938
Greg Hackmannefd98532012-10-02 12:00:42 -0700939 if (!gsc_used)
940 exynos5_cleanup_gsc_m2m(pdev, FIMD_GSC_IDX);
Greg Hackmann9130e702012-07-30 14:53:04 -0700941
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700942 if (fb_needed)
943 pdev->bufs.fb_window = first_fb;
944 else
945 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700946
Greg Hackmann9130e702012-07-30 14:53:04 -0700947 return 0;
948}
949
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700950static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
951 hwc_display_contents_1_t* contents)
952{
Benoit Goby922abbf2012-09-19 19:24:19 -0700953 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
Benoit Gobyb5501902012-10-01 00:29:01 -0700954 hwc_layer_1_t *video_layer = NULL;
Benoit Goby922abbf2012-09-19 19:24:19 -0700955
956 for (size_t i = 0; i < contents->numHwLayers; i++) {
957 hwc_layer_1_t &layer = contents->hwLayers[i];
958
959 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
960 ALOGV("\tlayer %u: framebuffer target", i);
Benoit Goby922abbf2012-09-19 19:24:19 -0700961 continue;
962 }
963
964 if (layer.compositionType == HWC_BACKGROUND) {
965 ALOGV("\tlayer %u: background layer", i);
966 dump_layer(&layer);
967 continue;
968 }
969
Benoit Gobyb5501902012-10-01 00:29:01 -0700970 if (layer.handle) {
971 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
972 if (h->flags & GRALLOC_USAGE_PROTECTED) {
973 if (!video_layer) {
974 video_layer = &layer;
975 layer.compositionType = HWC_OVERLAY;
976 ALOGV("\tlayer %u: video layer", i);
977 dump_layer(&layer);
978 continue;
979 }
980 }
981 }
982
Benoit Goby922abbf2012-09-19 19:24:19 -0700983 layer.compositionType = HWC_FRAMEBUFFER;
984 dump_layer(&layer);
985 }
986
987 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700988}
989
990static int exynos5_prepare(hwc_composer_device_1_t *dev,
991 size_t numDisplays, hwc_display_contents_1_t** displays)
992{
993 if (!numDisplays || !displays)
994 return 0;
995
996 exynos5_hwc_composer_device_1_t *pdev =
997 (exynos5_hwc_composer_device_1_t *)dev;
998 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
999 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
1000
1001 if (pdev->hdmi_hpd) {
1002 hdmi_enable(pdev);
1003 } else {
1004 hdmi_disable(pdev);
1005 }
1006
1007 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -07001008 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001009 if (err)
1010 return err;
1011 }
1012
1013 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001014 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
1015 if (err)
1016 return err;
1017 }
1018
1019 return 0;
1020}
1021
Greg Hackmann9130e702012-07-30 14:53:04 -07001022static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
1023 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001024 int gsc_idx, int dst_format)
Greg Hackmann9130e702012-07-30 14:53:04 -07001025{
Benoit Gobyb5501902012-10-01 00:29:01 -07001026 ALOGV("configuring gscaler %u for memory-to-memory", AVAILABLE_GSC_UNITS[gsc_idx]);
Greg Hackmann9130e702012-07-30 14:53:04 -07001027
1028 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
1029 buffer_handle_t dst_buf;
1030 private_handle_t *dst_handle;
1031 int ret = 0;
1032
Greg Hackmann4eaff152012-10-03 16:28:19 -07001033 if (layer.acquireFenceFd != -1) {
1034 int err = sync_wait(layer.acquireFenceFd, 100);
1035 if (err != 0)
1036 ALOGW("fence didn't signal in 100 ms: %s", strerror(errno));
1037 close(layer.acquireFenceFd);
1038 layer.acquireFenceFd = -1;
1039 }
1040
Greg Hackmann9130e702012-07-30 14:53:04 -07001041 exynos_gsc_img src_cfg, dst_cfg;
1042 memset(&src_cfg, 0, sizeof(src_cfg));
1043 memset(&dst_cfg, 0, sizeof(dst_cfg));
1044
1045 src_cfg.x = layer.sourceCrop.left;
1046 src_cfg.y = layer.sourceCrop.top;
1047 src_cfg.w = WIDTH(layer.sourceCrop);
1048 src_cfg.fw = src_handle->stride;
1049 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -07001050 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001051 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -07001052 if (exynos5_format_is_ycrcb(src_handle->format)) {
1053 src_cfg.uaddr = src_handle->fd2;
1054 src_cfg.vaddr = src_handle->fd1;
1055 } else {
1056 src_cfg.uaddr = src_handle->fd1;
1057 src_cfg.vaddr = src_handle->fd2;
1058 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001059 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001060 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -07001061
1062 dst_cfg.x = 0;
1063 dst_cfg.y = 0;
1064 dst_cfg.w = WIDTH(layer.displayFrame);
1065 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001066 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001067 dst_cfg.drmMode = src_cfg.drmMode;
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001068 dst_cfg.format = dst_format;
Greg Hackmann9130e702012-07-30 14:53:04 -07001069
1070 ALOGV("source configuration:");
1071 dump_gsc_img(src_cfg);
1072
Greg Hackmann4eaff152012-10-03 16:28:19 -07001073 bool reconfigure = gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1074 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg);
1075 if (reconfigure) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001076 int dst_stride;
1077 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1078 GRALLOC_USAGE_SW_WRITE_NEVER |
1079 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001080
1081 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1082 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001083
Sanghee Kim7b4c1322012-10-04 18:44:36 -07001084 int w = ALIGN(WIDTH(layer.displayFrame), GSC_DST_W_ALIGNMENT_RGB888);
1085 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_DST_H_ALIGNMENT_RGB888);
Greg Hackmann9130e702012-07-30 14:53:04 -07001086
1087 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1088 if (gsc_data->dst_buf[i]) {
1089 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1090 gsc_data->dst_buf[i] = NULL;
1091 }
1092
1093 int ret = alloc_device->alloc(alloc_device, w, h,
1094 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1095 &dst_stride);
1096 if (ret < 0) {
1097 ALOGE("failed to allocate destination buffer: %s",
1098 strerror(-ret));
1099 goto err_alloc;
1100 }
1101 }
1102
1103 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001104 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001105
Greg Hackmann9130e702012-07-30 14:53:04 -07001106 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1107 dst_handle = private_handle_t::dynamicCast(dst_buf);
1108
1109 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001110 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001111 dst_cfg.yaddr = dst_handle->fd;
1112
1113 ALOGV("destination configuration:");
1114 dump_gsc_img(dst_cfg);
1115
Greg Hackmannefd98532012-10-02 12:00:42 -07001116 if (gsc_data->gsc) {
1117 ALOGV("reusing open gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1118 } else {
1119 ALOGV("opening gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1120 gsc_data->gsc = exynos_gsc_create_exclusive(
1121 AVAILABLE_GSC_UNITS[gsc_idx], GSC_M2M_MODE, GSC_DUMMY);
1122 if (!gsc_data->gsc) {
1123 ALOGE("failed to create gscaler handle");
1124 ret = -1;
1125 goto err_alloc;
1126 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001127 }
1128
Greg Hackmann4eaff152012-10-03 16:28:19 -07001129 if (reconfigure) {
1130 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1131 if (ret < 0) {
1132 ALOGE("failed to configure gscaler %u", gsc_idx);
1133 goto err_gsc_config;
1134 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001135 }
1136
1137 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1138 if (ret < 0) {
1139 ALOGE("failed to run gscaler %u", gsc_idx);
1140 goto err_gsc_config;
1141 }
1142
Greg Hackmann4eaff152012-10-03 16:28:19 -07001143 ret = exynos_gsc_wait_frame_done_exclusive(gsc_data->gsc);
1144 if (ret < 0) {
1145 ALOGE("failed to wait for gscaler %u", gsc_idx);
1146 goto err_gsc_config;
1147 }
1148
Greg Hackmann9130e702012-07-30 14:53:04 -07001149 gsc_data->src_cfg = src_cfg;
1150 gsc_data->dst_cfg = dst_cfg;
1151
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001152 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001153
1154err_gsc_config:
1155 exynos_gsc_destroy(gsc_data->gsc);
1156 gsc_data->gsc = NULL;
1157err_alloc:
1158 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1159 if (gsc_data->dst_buf[i]) {
1160 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1161 gsc_data->dst_buf[i] = NULL;
1162 }
1163 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001164 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1165 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001166 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001167}
1168
Greg Hackmannefd98532012-10-02 12:00:42 -07001169
1170static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
1171 size_t gsc_idx)
1172{
1173 exynos5_gsc_data_t &gsc_data = pdev->gsc[gsc_idx];
1174 if (!gsc_data.gsc)
1175 return;
1176
1177 ALOGV("closing gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1178
Greg Hackmann4eaff152012-10-03 16:28:19 -07001179 exynos_gsc_stop_exclusive(gsc_data.gsc);
Greg Hackmannefd98532012-10-02 12:00:42 -07001180 exynos_gsc_destroy(gsc_data.gsc);
1181 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++)
1182 if (gsc_data.dst_buf[i])
1183 pdev->alloc_device->free(pdev->alloc_device, gsc_data.dst_buf[i]);
1184
1185 memset(&gsc_data, 0, sizeof(gsc_data));
1186}
1187
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001188static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001189 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001190 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001191 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001192{
Greg Hackmann81575142012-09-19 15:09:04 -07001193 uint32_t x, y;
1194 uint32_t w = WIDTH(displayFrame);
1195 uint32_t h = HEIGHT(displayFrame);
1196 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1197 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1198
1199 if (displayFrame.left < 0) {
1200 unsigned int crop = -displayFrame.left;
1201 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1202 crop);
1203 x = 0;
1204 w -= crop;
1205 offset += crop * bpp / 8;
1206 } else {
1207 x = displayFrame.left;
1208 }
1209
1210 if (displayFrame.right > pdev->xres) {
1211 unsigned int crop = displayFrame.right - pdev->xres;
1212 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1213 crop);
1214 w -= crop;
1215 }
1216
1217 if (displayFrame.top < 0) {
1218 unsigned int crop = -displayFrame.top;
1219 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1220 crop);
1221 y = 0;
1222 h -= crop;
1223 offset += handle->stride * crop * bpp / 8;
1224 } else {
1225 y = displayFrame.top;
1226 }
1227
1228 if (displayFrame.bottom > pdev->yres) {
1229 int crop = displayFrame.bottom - pdev->yres;
1230 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1231 crop);
1232 h -= crop;
1233 }
1234
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001235 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1236 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001237 cfg.x = x;
1238 cfg.y = y;
1239 cfg.w = w;
1240 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001241 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001242 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001243 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001244 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001245 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001246}
1247
Erik Gilling87e707e2012-06-29 17:35:13 -07001248static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001249 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001250{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001251 if (layer->compositionType == HWC_BACKGROUND) {
1252 hwc_color_t color = layer->backgroundColor;
1253 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1254 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1255 cfg.x = 0;
1256 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001257 cfg.w = pdev->xres;
1258 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001259 return;
1260 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001261
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001262 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001263 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001264 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001265}
1266
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001267static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001268 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001269{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001270 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001271 struct s3c_fb_win_config_data win_data;
1272 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001273
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001274 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001275 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1276 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001277
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001278 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001279 int layer_idx = pdata->overlay_map[i];
1280 if (layer_idx != -1) {
1281 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001282 private_handle_t *handle =
1283 private_handle_t::dynamicCast(layer.handle);
1284
1285 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1286 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001287 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001288
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001289 // RGBX8888 surfaces are already in the right color order from the GPU,
1290 // RGB565 and YUV surfaces need the Gscaler to swap R & B
1291 int dst_format = HAL_PIXEL_FORMAT_BGRA_8888;
1292 if (exynos5_format_is_rgb(handle->format) &&
1293 handle->format != HAL_PIXEL_FORMAT_RGB_565)
1294 dst_format = HAL_PIXEL_FORMAT_RGBX_8888;
1295
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001296 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001297 gsc_idx, dst_format);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001298 if (err < 0) {
Greg Hackmann4eaff152012-10-03 16:28:19 -07001299 ALOGE("failed to configure gscaler %u for layer %u",
Greg Hackmann9130e702012-07-30 14:53:04 -07001300 gsc_idx, i);
1301 continue;
1302 }
1303
Greg Hackmann9130e702012-07-30 14:53:04 -07001304 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1305 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1306 private_handle_t *dst_handle =
1307 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001308 hwc_rect_t sourceCrop = { 0, 0,
1309 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1310 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001311 layer.displayFrame, layer.blending, -1, config[i],
1312 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001313 } else {
1314 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001315 }
1316 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001317 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1318 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1319 config[i].blending = S3C_FB_BLENDING_NONE;
1320 }
1321
Greg Hackmann9130e702012-07-30 14:53:04 -07001322 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001323 dump_config(config[i]);
1324 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001325
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001326 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001327 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1328 if (config[i].fence_fd != -1)
1329 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001330 if (ret < 0) {
1331 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1332 return ret;
1333 }
1334
1335 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1336 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1337 pdev->last_fb_window = pdata->fb_window;
1338 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1339 int layer_idx = pdata->overlay_map[i];
1340 if (layer_idx != -1) {
1341 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1342 pdev->last_handles[i] = layer.handle;
1343 }
1344 }
1345
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001346 return win_data.fence;
1347}
1348
1349static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001350 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001351{
1352 if (!contents->dpy || !contents->sur)
1353 return 0;
1354
1355 hwc_layer_1_t *fb_layer = NULL;
1356
1357 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1358 for (size_t i = 0; i < contents->numHwLayers; i++) {
1359 if (contents->hwLayers[i].compositionType ==
1360 HWC_FRAMEBUFFER_TARGET) {
1361 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1362 fb_layer = &contents->hwLayers[i];
1363 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001364 }
1365 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001366
1367 if (CC_UNLIKELY(!fb_layer)) {
1368 ALOGE("framebuffer target expected, but not provided");
1369 return -EINVAL;
1370 }
1371
1372 ALOGV("framebuffer target buffer:");
1373 dump_layer(fb_layer);
Greg Hackmann600867e2012-08-23 12:58:02 -07001374 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001375
Benoit Goby922abbf2012-09-19 19:24:19 -07001376 int fence = exynos5_post_fimd(pdev, contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001377 if (fence < 0)
1378 return fence;
1379
1380 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1381 if (pdev->bufs.overlay_map[i] != -1) {
1382 hwc_layer_1_t &layer =
1383 contents->hwLayers[pdev->bufs.overlay_map[i]];
1384 int dup_fd = dup(fence);
1385 if (dup_fd < 0)
1386 ALOGW("release fence dup failed: %s", strerror(errno));
1387 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001388 }
1389 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001390 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001391
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001392 return 0;
1393}
1394
1395static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1396 hwc_display_contents_1_t* contents)
1397{
Benoit Gobyb5501902012-10-01 00:29:01 -07001398 hwc_layer_1_t *fb_layer = NULL;
1399 hwc_layer_1_t *video_layer = NULL;
1400
Benoit Goby105be0b2012-09-21 13:19:30 -07001401 if (!pdev->hdmi_enabled) {
1402 for (size_t i = 0; i < contents->numHwLayers; i++) {
1403 hwc_layer_1_t &layer = contents->hwLayers[i];
1404 if (layer.acquireFenceFd != -1)
1405 close(layer.acquireFenceFd);
Benoit Goby922abbf2012-09-19 19:24:19 -07001406 }
Benoit Goby48a69542012-09-21 17:12:28 -07001407 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001408 }
Benoit Goby48a69542012-09-21 17:12:28 -07001409
1410 for (size_t i = 0; i < contents->numHwLayers; i++) {
1411 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001412
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001413 if (layer.flags & HWC_SKIP_LAYER) {
1414 ALOGV("HDMI skipping layer %d", i);
1415 continue;
1416 }
1417
Benoit Gobyb5501902012-10-01 00:29:01 -07001418 if (layer.compositionType == HWC_OVERLAY) {
1419 if (!layer.handle)
1420 continue;
1421
1422 ALOGV("HDMI video layer:");
1423 dump_layer(&layer);
1424
Greg Hackmannd6743822012-10-02 17:27:25 -07001425 exynos5_gsc_data_t &gsc = pdev->gsc[HDMI_GSC_IDX];
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001426 exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc, 1,
1427 HAL_PIXEL_FORMAT_RGBX_8888);
Benoit Gobyb5501902012-10-01 00:29:01 -07001428
Benoit Gobyb5501902012-10-01 00:29:01 -07001429 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1430 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1431 private_handle_t *h = private_handle_t::dynamicCast(dst_buf);
1432
1433 hdmi_output(pdev, pdev->hdmi_layers[0], layer, h);
1434 video_layer = &layer;
1435 }
1436
Benoit Goby922abbf2012-09-19 19:24:19 -07001437 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1438 if (!layer.handle)
1439 continue;
1440
1441 ALOGV("HDMI FB layer:");
1442 dump_layer(&layer);
1443
Benoit Gobyb5501902012-10-01 00:29:01 -07001444 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
1445 hdmi_output(pdev, pdev->hdmi_layers[1], layer, h);
1446 fb_layer = &layer;
Benoit Goby922abbf2012-09-19 19:24:19 -07001447 }
1448 }
1449
Greg Hackmannefd98532012-10-02 12:00:42 -07001450 if (!video_layer) {
Benoit Gobyb5501902012-10-01 00:29:01 -07001451 hdmi_disable_layer(pdev, pdev->hdmi_layers[0]);
Greg Hackmannefd98532012-10-02 12:00:42 -07001452 exynos5_cleanup_gsc_m2m(pdev, HDMI_GSC_IDX);
1453 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001454 if (!fb_layer)
1455 hdmi_disable_layer(pdev, pdev->hdmi_layers[1]);
1456
Benoit Goby922abbf2012-09-19 19:24:19 -07001457 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001458}
1459
Jesse Halle94046d2012-07-31 14:34:08 -07001460static int exynos5_set(struct hwc_composer_device_1 *dev,
1461 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001462{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001463 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001464 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001465
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001466 exynos5_hwc_composer_device_1_t *pdev =
1467 (exynos5_hwc_composer_device_1_t *)dev;
1468 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1469 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001470
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001471 if (fimd_contents) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001472 int err = exynos5_set_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001473 if (err)
1474 return err;
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001475 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001476
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001477 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001478 int err = exynos5_set_hdmi(pdev, hdmi_contents);
1479 if (err)
1480 return err;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001481 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001482
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001483 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001484}
1485
Erik Gilling87e707e2012-06-29 17:35:13 -07001486static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001487 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001488{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001489 struct exynos5_hwc_composer_device_1_t* pdev =
1490 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001491 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001492}
1493
Erik Gilling87e707e2012-06-29 17:35:13 -07001494static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001495{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001496 struct exynos5_hwc_composer_device_1_t *pdev =
1497 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001498
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001499 switch (what) {
1500 case HWC_BACKGROUND_LAYER_SUPPORTED:
1501 // we support the background layer
1502 value[0] = 1;
1503 break;
1504 case HWC_VSYNC_PERIOD:
1505 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001506 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001507 break;
1508 default:
1509 // unsupported query
1510 return -EINVAL;
1511 }
1512 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001513}
1514
Jesse Halle94046d2012-07-31 14:34:08 -07001515static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1516 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001517{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001518 struct exynos5_hwc_composer_device_1_t *pdev =
1519 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001520
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001521 switch (event) {
1522 case HWC_EVENT_VSYNC:
1523 __u32 val = !!enabled;
1524 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1525 if (err < 0) {
1526 ALOGE("vsync ioctl failed");
1527 return -errno;
1528 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001529
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001530 return 0;
1531 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001532
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001533 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001534}
1535
Benoit Gobycdd61b32012-07-09 12:09:59 -07001536static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001537 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001538{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001539 const char *s = buff;
1540 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001541
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001542 while (*s) {
1543 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1544 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001545
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001546 s += strlen(s) + 1;
1547 if (s - buff >= len)
1548 break;
1549 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001550
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001551 if (pdev->hdmi_hpd) {
1552 if (hdmi_get_config(pdev)) {
1553 ALOGE("Error reading HDMI configuration");
1554 pdev->hdmi_hpd = false;
1555 return;
1556 }
1557 }
1558
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001559 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001560 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001561 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001562
Jesse Hallda5a71d2012-08-21 12:12:55 -07001563 /* hwc_dev->procs is set right after the device is opened, but there is
1564 * still a race condition where a hotplug event might occur after the open
1565 * but before the procs are registered. */
1566 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001567 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001568}
1569
Greg Hackmann29724852012-07-23 15:31:10 -07001570static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001571{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001572 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001573 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001574
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001575 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1576 if (err < 0) {
1577 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1578 return;
1579 }
1580
Greg Hackmann29724852012-07-23 15:31:10 -07001581 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001582 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001583 if (err < 0) {
1584 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1585 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001586 }
Greg Hackmann29724852012-07-23 15:31:10 -07001587 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001588
Greg Hackmann29724852012-07-23 15:31:10 -07001589 errno = 0;
1590 uint64_t timestamp = strtoull(buf, NULL, 0);
1591 if (!errno)
1592 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001593}
1594
1595static void *hwc_vsync_thread(void *data)
1596{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001597 struct exynos5_hwc_composer_device_1_t *pdev =
1598 (struct exynos5_hwc_composer_device_1_t *)data;
1599 char uevent_desc[4096];
1600 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001601
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001602 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001603
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001604 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001605
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001606 char temp[4096];
1607 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1608 if (err < 0) {
1609 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1610 return NULL;
1611 }
1612
Greg Hackmann29724852012-07-23 15:31:10 -07001613 struct pollfd fds[2];
1614 fds[0].fd = pdev->vsync_fd;
1615 fds[0].events = POLLPRI;
1616 fds[1].fd = uevent_get_fd();
1617 fds[1].events = POLLIN;
1618
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001619 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001620 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001621
Greg Hackmann29724852012-07-23 15:31:10 -07001622 if (err > 0) {
1623 if (fds[0].revents & POLLPRI) {
1624 handle_vsync_event(pdev);
1625 }
1626 else if (fds[1].revents & POLLIN) {
1627 int len = uevent_next_event(uevent_desc,
1628 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001629
Greg Hackmann29724852012-07-23 15:31:10 -07001630 bool hdmi = !strcmp(uevent_desc,
1631 "change@/devices/virtual/switch/hdmi");
1632 if (hdmi)
1633 handle_hdmi_uevent(pdev, uevent_desc, len);
1634 }
1635 }
1636 else if (err == -1) {
1637 if (errno == EINTR)
1638 break;
1639 ALOGE("error in vsync thread: %s", strerror(errno));
1640 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001641 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001642
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001643 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001644}
1645
Jesse Halle94046d2012-07-31 14:34:08 -07001646static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001647{
1648 struct exynos5_hwc_composer_device_1_t *pdev =
1649 (struct exynos5_hwc_composer_device_1_t *)dev;
1650
1651 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1652 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1653 if (err < 0) {
Greg Hackmann70231562012-09-28 10:28:51 -07001654 if (errno == EBUSY)
1655 ALOGI("%sblank ioctl failed (display already %sblanked)",
1656 blank ? "" : "un", blank ? "" : "un");
1657 else
1658 ALOGE("%sblank ioctl failed: %s", blank ? "" : "un",
1659 strerror(errno));
Colin Cross00359a82012-07-12 17:54:17 -07001660 return -errno;
1661 }
1662
Benoit Gobyad4e3582012-08-30 17:17:34 -07001663 if (pdev->hdmi_hpd) {
1664 if (blank && !pdev->hdmi_blanked)
1665 hdmi_disable(pdev);
1666 pdev->hdmi_blanked = !!blank;
1667 }
1668
Colin Cross00359a82012-07-12 17:54:17 -07001669 return 0;
1670}
1671
Greg Hackmann600867e2012-08-23 12:58:02 -07001672static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1673{
1674 if (buff_len <= 0)
1675 return;
1676
1677 struct exynos5_hwc_composer_device_1_t *pdev =
1678 (struct exynos5_hwc_composer_device_1_t *)dev;
1679
1680 android::String8 result;
1681
Benoit Goby8bad7e32012-08-16 14:17:14 -07001682 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1683 if (pdev->hdmi_enabled)
1684 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001685 result.append(
1686 " type | handle | color | blend | format | position | size | gsc \n"
1687 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1688 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1689
1690 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1691 struct s3c_fb_win_config &config = pdev->last_config[i];
1692 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1693 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1694 "DISABLED", "-", "-", "-", "-", "-", "-");
1695 }
1696 else {
1697 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1698 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1699 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001700 else
1701 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1702 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1703 intptr_t(pdev->last_handles[i]),
1704 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001705
1706 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1707 config.w, config.h);
1708 }
1709 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1710 result.appendFormat(" | %3s", "-");
1711 else
1712 result.appendFormat(" | %3d",
1713 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1714 result.append("\n");
1715 }
1716
1717 strlcpy(buff, result.string(), buff_len);
1718}
1719
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001720static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1721 int disp, uint32_t *configs, size_t *numConfigs)
1722{
1723 struct exynos5_hwc_composer_device_1_t *pdev =
1724 (struct exynos5_hwc_composer_device_1_t *)dev;
1725
1726 if (*numConfigs == 0)
1727 return 0;
1728
1729 if (disp == HWC_DISPLAY_PRIMARY) {
1730 configs[0] = 0;
1731 *numConfigs = 1;
1732 return 0;
1733 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001734 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001735 return -EINVAL;
1736 }
1737
1738 int err = hdmi_get_config(pdev);
1739 if (err) {
1740 return -EINVAL;
1741 }
1742
1743 configs[0] = 0;
1744 *numConfigs = 1;
1745 return 0;
1746 }
1747
1748 return -EINVAL;
1749}
1750
1751static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1752 const uint32_t attribute)
1753{
1754 switch(attribute) {
1755 case HWC_DISPLAY_VSYNC_PERIOD:
1756 return pdev->vsync_period;
1757
1758 case HWC_DISPLAY_WIDTH:
1759 return pdev->xres;
1760
1761 case HWC_DISPLAY_HEIGHT:
1762 return pdev->yres;
1763
1764 case HWC_DISPLAY_DPI_X:
1765 return pdev->xdpi;
1766
1767 case HWC_DISPLAY_DPI_Y:
1768 return pdev->ydpi;
1769
1770 default:
1771 ALOGE("unknown display attribute %u", attribute);
1772 return -EINVAL;
1773 }
1774}
1775
1776static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1777 const uint32_t attribute)
1778{
1779 switch(attribute) {
1780 case HWC_DISPLAY_VSYNC_PERIOD:
1781 return pdev->vsync_period;
1782
1783 case HWC_DISPLAY_WIDTH:
1784 return pdev->hdmi_w;
1785
1786 case HWC_DISPLAY_HEIGHT:
1787 return pdev->hdmi_h;
1788
1789 case HWC_DISPLAY_DPI_X:
1790 case HWC_DISPLAY_DPI_Y:
1791 return 0; // unknown
1792
1793 default:
1794 ALOGE("unknown display attribute %u", attribute);
1795 return -EINVAL;
1796 }
1797}
1798
Jesse Hall54aa0d22012-09-20 11:43:49 -07001799static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001800 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1801{
1802 struct exynos5_hwc_composer_device_1_t *pdev =
1803 (struct exynos5_hwc_composer_device_1_t *)dev;
1804
1805 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1806 if (disp == HWC_DISPLAY_PRIMARY)
1807 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1808 else if (disp == HWC_DISPLAY_EXTERNAL)
1809 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001810 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001811 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001812 return -EINVAL;
1813 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001814 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001815
1816 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001817}
1818
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001819static int exynos5_close(hw_device_t* device);
1820
1821static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001822 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001823{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001824 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001825 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001826 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001827
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001828 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1829 return -EINVAL;
1830 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001831
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001832 struct exynos5_hwc_composer_device_1_t *dev;
1833 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1834 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001835
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001836 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1837 (const struct hw_module_t **)&dev->gralloc_module)) {
1838 ALOGE("failed to get gralloc hw module");
1839 ret = -EINVAL;
1840 goto err_get_module;
1841 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001842
Greg Hackmann9130e702012-07-30 14:53:04 -07001843 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1844 &dev->alloc_device)) {
1845 ALOGE("failed to open gralloc");
1846 ret = -EINVAL;
1847 goto err_get_module;
1848 }
1849
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001850 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1851 if (dev->fd < 0) {
1852 ALOGE("failed to open framebuffer");
1853 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001854 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001855 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001856
Greg Hackmannd92fe212012-09-11 14:28:41 -07001857 struct fb_var_screeninfo info;
1858 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1859 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1860 ret = -errno;
1861 goto err_ioctl;
1862 }
1863
1864 refreshRate = 1000000000000LLU /
1865 (
1866 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1867 * ( info.left_margin + info.right_margin + info.xres )
1868 * info.pixclock
1869 );
1870
1871 if (refreshRate == 0) {
1872 ALOGW("invalid refresh rate, assuming 60 Hz");
1873 refreshRate = 60;
1874 }
1875
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001876 dev->xres = 2560;
1877 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001878 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1879 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1880 dev->vsync_period = 1000000000 / refreshRate;
1881
1882 ALOGV("using\n"
1883 "xres = %d px\n"
1884 "yres = %d px\n"
1885 "width = %d mm (%f dpi)\n"
1886 "height = %d mm (%f dpi)\n"
1887 "refresh rate = %d Hz\n",
1888 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1889 info.height, dev->ydpi / 1000.0, refreshRate);
1890
Benoit Goby8bad7e32012-08-16 14:17:14 -07001891 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001892 if (dev->hdmi_mixer0 < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001893 ALOGE("failed to open hdmi mixer0 subdev");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001894 ret = dev->hdmi_mixer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001895 goto err_ioctl;
1896 }
1897
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001898 dev->hdmi_layers[0].id = 0;
1899 dev->hdmi_layers[0].fd = open("/dev/video16", O_RDWR);
1900 if (dev->hdmi_layers[0].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001901 ALOGE("failed to open hdmi layer0 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001902 ret = dev->hdmi_layers[0].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001903 goto err_mixer0;
1904 }
1905
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001906 dev->hdmi_layers[1].id = 1;
1907 dev->hdmi_layers[1].fd = open("/dev/video17", O_RDWR);
1908 if (dev->hdmi_layers[1].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001909 ALOGE("failed to open hdmi layer1 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001910 ret = dev->hdmi_layers[1].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001911 goto err_hdmi0;
1912 }
1913
Greg Hackmann29724852012-07-23 15:31:10 -07001914 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1915 if (dev->vsync_fd < 0) {
1916 ALOGE("failed to open vsync attribute");
1917 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001918 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001919 }
1920
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001921 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1922 if (sw_fd) {
1923 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001924 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001925 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001926 if (hdmi_get_config(dev)) {
1927 ALOGE("Error reading HDMI configuration");
1928 dev->hdmi_hpd = false;
1929 }
1930 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001931 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001932
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001933 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001934 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001935 dev->base.common.module = const_cast<hw_module_t *>(module);
1936 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001937
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001938 dev->base.prepare = exynos5_prepare;
1939 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001940 dev->base.eventControl = exynos5_eventControl;
1941 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001942 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001943 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001944 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001945 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1946 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001947
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001948 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001949
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001950 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1951 if (ret) {
1952 ALOGE("failed to start vsync thread: %s", strerror(ret));
1953 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001954 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001955 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001956
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001957 char value[PROPERTY_VALUE_MAX];
1958 property_get("debug.hwc.force_gpu", value, "0");
1959 dev->force_gpu = atoi(value);
1960
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001961 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001962
Greg Hackmann29724852012-07-23 15:31:10 -07001963err_vsync:
1964 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001965err_mixer0:
1966 close(dev->hdmi_mixer0);
1967err_hdmi1:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001968 close(dev->hdmi_layers[0].fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001969err_hdmi0:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001970 close(dev->hdmi_layers[1].fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001971err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001972 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001973err_open_fb:
1974 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001975err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001976 free(dev);
1977 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001978}
1979
1980static int exynos5_close(hw_device_t *device)
1981{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001982 struct exynos5_hwc_composer_device_1_t *dev =
1983 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001984 pthread_kill(dev->vsync_thread, SIGTERM);
1985 pthread_join(dev->vsync_thread, NULL);
Greg Hackmannefd98532012-10-02 12:00:42 -07001986 for (size_t i = 0; i < NUM_GSC_UNITS; i++)
1987 exynos5_cleanup_gsc_m2m(dev, i);
Greg Hackmann9130e702012-07-30 14:53:04 -07001988 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001989 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001990 close(dev->hdmi_mixer0);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001991 close(dev->hdmi_layers[0].fd);
1992 close(dev->hdmi_layers[1].fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001993 close(dev->fd);
1994 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001995}
1996
1997static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001998 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001999};
2000
2001hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002002 common: {
2003 tag: HARDWARE_MODULE_TAG,
2004 module_api_version: HWC_MODULE_API_VERSION_0_1,
2005 hal_api_version: HARDWARE_HAL_API_VERSION,
2006 id: HWC_HARDWARE_MODULE_ID,
2007 name: "Samsung exynos5 hwcomposer module",
2008 author: "Google",
2009 methods: &exynos5_hwc_module_methods,
2010 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002011};