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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/************************************************************************
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07002 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08003 * Copyright(c) 2002-2007 Neterion Inc.
Joe Perchesd44570e2009-08-24 17:29:44 +00004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * This software may be used and distributed according to the terms of
6 * the GNU General Public License (GPL), incorporated herein by reference.
7 * Drivers based on or derived from this code fall under the GPL and must
8 * retain the authorship, copyright and license notice. This file is not
9 * a complete program and may only be used when the entire operating
10 * system is licensed under the GPL.
11 * See the file COPYING in this distribution for more information.
12 *
13 * Credits:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070014 * Jeff Garzik : For pointing out the improper error condition
15 * check in the s2io_xmit routine and also some
16 * issues in the Tx watch dog function. Also for
17 * patiently answering all those innumerable
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 * questions regaring the 2.6 porting issues.
19 * Stephen Hemminger : Providing proper 2.6 porting mechanism for some
20 * macros available only in 2.6 Kernel.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070021 * Francois Romieu : For pointing out all code part that were
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * deprecated and also styling related comments.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070023 * Grant Grundler : For helping me get rid of some Architecture
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * dependent code.
25 * Christopher Hellwig : Some more 2.6 specific issues in the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070026 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 * The module loadable parameters that are supported by the driver and a brief
Joe Perchesa2a20ae2009-08-24 17:29:46 +000028 * explanation of all the variables.
Ananda Raju9dc737a2006-04-21 19:05:41 -040029 *
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070030 * rx_ring_num : This can be used to program the number of receive rings used
31 * in the driver.
Ananda Raju9dc737a2006-04-21 19:05:41 -040032 * rx_ring_sz: This defines the number of receive blocks each ring can have.
33 * This is also an array of size 8.
Ananda Rajuda6971d2005-10-31 16:55:31 -050034 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
Veena Parat6d517a22007-07-23 02:20:51 -040035 * values are 1, 2.
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070037 * tx_fifo_len: This too is an array of 8. Each element defines the number of
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 * Tx descriptors that can be associated with each corresponding FIFO.
Ananda Raju9dc737a2006-04-21 19:05:41 -040039 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -070040 * 2(MSI_X). Default value is '2(MSI_X)'
Stephen Hemminger43b7c452007-10-05 12:39:21 -070041 * lro_enable: Specifies whether to enable Large Receive Offload (LRO) or not.
Ananda Raju9dc737a2006-04-21 19:05:41 -040042 * Possible values '1' for enable '0' for disable. Default is '0'
43 * lro_max_pkts: This parameter defines maximum number of packets can be
44 * aggregated as a single large packet
Sivakumar Subramani926930b2007-02-24 01:59:39 -050045 * napi: This parameter used to enable/disable NAPI (polling Rx)
46 * Possible values '1' for enable and '0' for disable. Default is '1'
47 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
48 * Possible values '1' for enable and '0' for disable. Default is '0'
49 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
50 * Possible values '1' for enable , '0' for disable.
51 * Default is '2' - which means disable in promisc mode
52 * and enable in non-promiscuous mode.
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -050053 * multiq: This parameter used to enable/disable MULTIQUEUE support.
54 * Possible values '1' for enable and '0' for disable. Default is '0'
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 ************************************************************************/
56
Joe Perches6cef2b8e2009-08-24 17:29:45 +000057#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059#include <linux/module.h>
60#include <linux/types.h>
61#include <linux/errno.h>
62#include <linux/ioport.h>
63#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -040064#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070065#include <linux/kernel.h>
66#include <linux/netdevice.h>
67#include <linux/etherdevice.h>
Ben Hutchings40239392009-04-29 08:13:29 +000068#include <linux/mdio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070069#include <linux/skbuff.h>
70#include <linux/init.h>
71#include <linux/delay.h>
72#include <linux/stddef.h>
73#include <linux/ioctl.h>
74#include <linux/timex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070075#include <linux/ethtool.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070076#include <linux/workqueue.h>
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -070077#include <linux/if_vlan.h>
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -050078#include <linux/ip.h>
79#include <linux/tcp.h>
Joe Perchesd44570e2009-08-24 17:29:44 +000080#include <linux/uaccess.h>
81#include <linux/io.h>
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -050082#include <net/tcp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#include <asm/system.h>
Andrew Mortonfe931392006-02-03 01:45:12 -080085#include <asm/div64.h>
Andrew Morton330ce0d2006-08-14 23:00:14 -070086#include <asm/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
88/* local include */
89#include "s2io.h"
90#include "s2io-regs.h"
91
Sreenivasa Honnur29d0a2b2008-07-09 23:50:13 -040092#define DRV_VERSION "2.0.26.25"
John Linville6c1792f2005-10-04 07:51:45 -040093
Linus Torvalds1da177e2005-04-16 15:20:36 -070094/* S2io Driver name & version. */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070095static char s2io_driver_name[] = "Neterion";
John Linville6c1792f2005-10-04 07:51:45 -040096static char s2io_driver_version[] = DRV_VERSION;
Linus Torvalds1da177e2005-04-16 15:20:36 -070097
Joe Perchesd44570e2009-08-24 17:29:44 +000098static int rxd_size[2] = {32, 48};
99static int rxd_count[2] = {127, 85};
Ananda Rajuda6971d2005-10-31 16:55:31 -0500100
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500101static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -0700102{
103 int ret;
104
105 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
Joe Perchesd44570e2009-08-24 17:29:44 +0000106 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -0700107
108 return ret;
109}
110
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700111/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 * Cards with following subsystem_id have a link state indication
113 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
114 * macro below identifies these cards given the subsystem_id.
115 */
Joe Perchesd44570e2009-08-24 17:29:44 +0000116#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
117 (dev_type == XFRAME_I_DEVICE) ? \
118 ((((subid >= 0x600B) && (subid <= 0x600D)) || \
119 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120
121#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
122 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123
Joe Perchesd44570e2009-08-24 17:29:44 +0000124static inline int is_s2io_card_up(const struct s2io_nic *sp)
Sivakumar Subramani92b84432007-09-06 06:51:14 -0400125{
126 return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
127}
128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129/* Ethtool related variables and Macros. */
Joe Perches6fce3652009-08-24 17:29:40 +0000130static const char s2io_gstrings[][ETH_GSTRING_LEN] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 "Register test\t(offline)",
132 "Eeprom test\t(offline)",
133 "Link test\t(online)",
134 "RLDRAM test\t(offline)",
135 "BIST Test\t(offline)"
136};
137
Joe Perches6fce3652009-08-24 17:29:40 +0000138static const char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 {"tmac_frms"},
140 {"tmac_data_octets"},
141 {"tmac_drop_frms"},
142 {"tmac_mcst_frms"},
143 {"tmac_bcst_frms"},
144 {"tmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400145 {"tmac_ttl_octets"},
146 {"tmac_ucst_frms"},
147 {"tmac_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 {"tmac_any_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400149 {"tmac_ttl_less_fb_octets"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 {"tmac_vld_ip_octets"},
151 {"tmac_vld_ip"},
152 {"tmac_drop_ip"},
153 {"tmac_icmp"},
154 {"tmac_rst_tcp"},
155 {"tmac_tcp"},
156 {"tmac_udp"},
157 {"rmac_vld_frms"},
158 {"rmac_data_octets"},
159 {"rmac_fcs_err_frms"},
160 {"rmac_drop_frms"},
161 {"rmac_vld_mcst_frms"},
162 {"rmac_vld_bcst_frms"},
163 {"rmac_in_rng_len_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400164 {"rmac_out_rng_len_err_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 {"rmac_long_frms"},
166 {"rmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400167 {"rmac_unsup_ctrl_frms"},
168 {"rmac_ttl_octets"},
169 {"rmac_accepted_ucst_frms"},
170 {"rmac_accepted_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 {"rmac_discarded_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400172 {"rmac_drop_events"},
173 {"rmac_ttl_less_fb_octets"},
174 {"rmac_ttl_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 {"rmac_usized_frms"},
176 {"rmac_osized_frms"},
177 {"rmac_frag_frms"},
178 {"rmac_jabber_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400179 {"rmac_ttl_64_frms"},
180 {"rmac_ttl_65_127_frms"},
181 {"rmac_ttl_128_255_frms"},
182 {"rmac_ttl_256_511_frms"},
183 {"rmac_ttl_512_1023_frms"},
184 {"rmac_ttl_1024_1518_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 {"rmac_ip"},
186 {"rmac_ip_octets"},
187 {"rmac_hdr_err_ip"},
188 {"rmac_drop_ip"},
189 {"rmac_icmp"},
190 {"rmac_tcp"},
191 {"rmac_udp"},
192 {"rmac_err_drp_udp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400193 {"rmac_xgmii_err_sym"},
194 {"rmac_frms_q0"},
195 {"rmac_frms_q1"},
196 {"rmac_frms_q2"},
197 {"rmac_frms_q3"},
198 {"rmac_frms_q4"},
199 {"rmac_frms_q5"},
200 {"rmac_frms_q6"},
201 {"rmac_frms_q7"},
202 {"rmac_full_q0"},
203 {"rmac_full_q1"},
204 {"rmac_full_q2"},
205 {"rmac_full_q3"},
206 {"rmac_full_q4"},
207 {"rmac_full_q5"},
208 {"rmac_full_q6"},
209 {"rmac_full_q7"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 {"rmac_pause_cnt"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400211 {"rmac_xgmii_data_err_cnt"},
212 {"rmac_xgmii_ctrl_err_cnt"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 {"rmac_accepted_ip"},
214 {"rmac_err_tcp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400215 {"rd_req_cnt"},
216 {"new_rd_req_cnt"},
217 {"new_rd_req_rtry_cnt"},
218 {"rd_rtry_cnt"},
219 {"wr_rtry_rd_ack_cnt"},
220 {"wr_req_cnt"},
221 {"new_wr_req_cnt"},
222 {"new_wr_req_rtry_cnt"},
223 {"wr_rtry_cnt"},
224 {"wr_disc_cnt"},
225 {"rd_rtry_wr_ack_cnt"},
226 {"txp_wr_cnt"},
227 {"txd_rd_cnt"},
228 {"txd_wr_cnt"},
229 {"rxd_rd_cnt"},
230 {"rxd_wr_cnt"},
231 {"txf_rd_cnt"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500232 {"rxf_wr_cnt"}
233};
234
Joe Perches6fce3652009-08-24 17:29:40 +0000235static const char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
Ananda Rajubd1034f2006-04-21 19:20:22 -0400236 {"rmac_ttl_1519_4095_frms"},
237 {"rmac_ttl_4096_8191_frms"},
238 {"rmac_ttl_8192_max_frms"},
239 {"rmac_ttl_gt_max_frms"},
240 {"rmac_osized_alt_frms"},
241 {"rmac_jabber_alt_frms"},
242 {"rmac_gt_max_alt_frms"},
243 {"rmac_vlan_frms"},
244 {"rmac_len_discard"},
245 {"rmac_fcs_discard"},
246 {"rmac_pf_discard"},
247 {"rmac_da_discard"},
248 {"rmac_red_discard"},
249 {"rmac_rts_discard"},
250 {"rmac_ingm_full_discard"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500251 {"link_fault_cnt"}
252};
253
Joe Perches6fce3652009-08-24 17:29:40 +0000254static const char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -0700255 {"\n DRIVER STATISTICS"},
256 {"single_bit_ecc_errs"},
257 {"double_bit_ecc_errs"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400258 {"parity_err_cnt"},
259 {"serious_err_cnt"},
260 {"soft_reset_cnt"},
261 {"fifo_full_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700262 {"ring_0_full_cnt"},
263 {"ring_1_full_cnt"},
264 {"ring_2_full_cnt"},
265 {"ring_3_full_cnt"},
266 {"ring_4_full_cnt"},
267 {"ring_5_full_cnt"},
268 {"ring_6_full_cnt"},
269 {"ring_7_full_cnt"},
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700270 {"alarm_transceiver_temp_high"},
271 {"alarm_transceiver_temp_low"},
272 {"alarm_laser_bias_current_high"},
273 {"alarm_laser_bias_current_low"},
274 {"alarm_laser_output_power_high"},
275 {"alarm_laser_output_power_low"},
276 {"warn_transceiver_temp_high"},
277 {"warn_transceiver_temp_low"},
278 {"warn_laser_bias_current_high"},
279 {"warn_laser_bias_current_low"},
280 {"warn_laser_output_power_high"},
281 {"warn_laser_output_power_low"},
282 {"lro_aggregated_pkts"},
283 {"lro_flush_both_count"},
284 {"lro_out_of_sequence_pkts"},
285 {"lro_flush_due_to_max_pkts"},
286 {"lro_avg_aggr_pkts"},
287 {"mem_alloc_fail_cnt"},
288 {"pci_map_fail_cnt"},
289 {"watchdog_timer_cnt"},
290 {"mem_allocated"},
291 {"mem_freed"},
292 {"link_up_cnt"},
293 {"link_down_cnt"},
294 {"link_up_time"},
295 {"link_down_time"},
296 {"tx_tcode_buf_abort_cnt"},
297 {"tx_tcode_desc_abort_cnt"},
298 {"tx_tcode_parity_err_cnt"},
299 {"tx_tcode_link_loss_cnt"},
300 {"tx_tcode_list_proc_err_cnt"},
301 {"rx_tcode_parity_err_cnt"},
302 {"rx_tcode_abort_cnt"},
303 {"rx_tcode_parity_abort_cnt"},
304 {"rx_tcode_rda_fail_cnt"},
305 {"rx_tcode_unkn_prot_cnt"},
306 {"rx_tcode_fcs_err_cnt"},
307 {"rx_tcode_buf_size_err_cnt"},
308 {"rx_tcode_rxd_corrupt_cnt"},
309 {"rx_tcode_unkn_err_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700310 {"tda_err_cnt"},
311 {"pfc_err_cnt"},
312 {"pcc_err_cnt"},
313 {"tti_err_cnt"},
314 {"tpa_err_cnt"},
315 {"sm_err_cnt"},
316 {"lso_err_cnt"},
317 {"mac_tmac_err_cnt"},
318 {"mac_rmac_err_cnt"},
319 {"xgxs_txgxs_err_cnt"},
320 {"xgxs_rxgxs_err_cnt"},
321 {"rc_err_cnt"},
322 {"prc_pcix_err_cnt"},
323 {"rpa_err_cnt"},
324 {"rda_err_cnt"},
325 {"rti_err_cnt"},
326 {"mc_err_cnt"}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327};
328
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200329#define S2IO_XENA_STAT_LEN ARRAY_SIZE(ethtool_xena_stats_keys)
330#define S2IO_ENHANCED_STAT_LEN ARRAY_SIZE(ethtool_enhanced_stats_keys)
331#define S2IO_DRIVER_STAT_LEN ARRAY_SIZE(ethtool_driver_stats_keys)
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500332
Joe Perchesd44570e2009-08-24 17:29:44 +0000333#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN)
334#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN)
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500335
Joe Perchesd44570e2009-08-24 17:29:44 +0000336#define XFRAME_I_STAT_STRINGS_LEN (XFRAME_I_STAT_LEN * ETH_GSTRING_LEN)
337#define XFRAME_II_STAT_STRINGS_LEN (XFRAME_II_STAT_LEN * ETH_GSTRING_LEN)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200339#define S2IO_TEST_LEN ARRAY_SIZE(s2io_gstrings)
Joe Perchesd44570e2009-08-24 17:29:44 +0000340#define S2IO_STRINGS_LEN (S2IO_TEST_LEN * ETH_GSTRING_LEN)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341
Joe Perchesd44570e2009-08-24 17:29:44 +0000342#define S2IO_TIMER_CONF(timer, handle, arg, exp) \
343 init_timer(&timer); \
344 timer.function = handle; \
345 timer.data = (unsigned long)arg; \
346 mod_timer(&timer, (jiffies + exp)) \
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -0700347
Sivakumar Subramani2fd37682007-09-14 07:39:19 -0400348/* copy mac addr to def_mac_addr array */
349static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
350{
351 sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr);
352 sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8);
353 sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16);
354 sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24);
355 sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32);
356 sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40);
357}
Stephen Hemminger04025092008-11-21 17:28:55 -0800358
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700359/* Add the vlan */
360static void s2io_vlan_rx_register(struct net_device *dev,
Stephen Hemminger04025092008-11-21 17:28:55 -0800361 struct vlan_group *grp)
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700362{
Surjit Reang2fda0962008-01-24 02:08:59 -0800363 int i;
Wang Chen4cf16532008-11-12 23:38:14 -0800364 struct s2io_nic *nic = netdev_priv(dev);
Surjit Reang2fda0962008-01-24 02:08:59 -0800365 unsigned long flags[MAX_TX_FIFOS];
Surjit Reang2fda0962008-01-24 02:08:59 -0800366 struct config_param *config = &nic->config;
Joe Perchesffb5df62009-08-24 17:29:47 +0000367 struct mac_info *mac_control = &nic->mac_control;
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700368
Joe Perches13d866a2009-08-24 17:29:41 +0000369 for (i = 0; i < config->tx_fifo_num; i++) {
370 struct fifo_info *fifo = &mac_control->fifos[i];
371
372 spin_lock_irqsave(&fifo->tx_lock, flags[i]);
373 }
Surjit Reang2fda0962008-01-24 02:08:59 -0800374
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700375 nic->vlgrp = grp;
Joe Perches13d866a2009-08-24 17:29:41 +0000376
377 for (i = config->tx_fifo_num - 1; i >= 0; i--) {
378 struct fifo_info *fifo = &mac_control->fifos[i];
379
380 spin_unlock_irqrestore(&fifo->tx_lock, flags[i]);
381 }
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700382}
383
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500384/* Unregister the vlan */
Stephen Hemminger04025092008-11-21 17:28:55 -0800385static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500386{
387 int i;
Wang Chen4cf16532008-11-12 23:38:14 -0800388 struct s2io_nic *nic = netdev_priv(dev);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500389 unsigned long flags[MAX_TX_FIFOS];
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500390 struct config_param *config = &nic->config;
Joe Perchesffb5df62009-08-24 17:29:47 +0000391 struct mac_info *mac_control = &nic->mac_control;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500392
Joe Perches13d866a2009-08-24 17:29:41 +0000393 for (i = 0; i < config->tx_fifo_num; i++) {
394 struct fifo_info *fifo = &mac_control->fifos[i];
395
396 spin_lock_irqsave(&fifo->tx_lock, flags[i]);
397 }
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500398
399 if (nic->vlgrp)
400 vlan_group_set_device(nic->vlgrp, vid, NULL);
401
Joe Perches13d866a2009-08-24 17:29:41 +0000402 for (i = config->tx_fifo_num - 1; i >= 0; i--) {
403 struct fifo_info *fifo = &mac_control->fifos[i];
404
405 spin_unlock_irqrestore(&fifo->tx_lock, flags[i]);
406 }
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500407}
408
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700409/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 * Constants to be programmed into the Xena's registers, to configure
411 * the XAUI.
412 */
413
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414#define END_SIGN 0x0
Arjan van de Venf71e1302006-03-03 21:33:57 -0500415static const u64 herc_act_dtx_cfg[] = {
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700416 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700417 0x8000051536750000ULL, 0x80000515367500E0ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700418 /* Write data */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700419 0x8000051536750004ULL, 0x80000515367500E4ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700420 /* Set address */
421 0x80010515003F0000ULL, 0x80010515003F00E0ULL,
422 /* Write data */
423 0x80010515003F0004ULL, 0x80010515003F00E4ULL,
424 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700425 0x801205150D440000ULL, 0x801205150D4400E0ULL,
426 /* Write data */
427 0x801205150D440004ULL, 0x801205150D4400E4ULL,
428 /* Set address */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700429 0x80020515F2100000ULL, 0x80020515F21000E0ULL,
430 /* Write data */
431 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
432 /* Done */
433 END_SIGN
434};
435
Arjan van de Venf71e1302006-03-03 21:33:57 -0500436static const u64 xena_dtx_cfg[] = {
Ananda Rajuc92ca042006-04-21 19:18:03 -0400437 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 0x8000051500000000ULL, 0x80000515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400439 /* Write data */
440 0x80000515D9350004ULL, 0x80000515D93500E4ULL,
441 /* Set address */
442 0x8001051500000000ULL, 0x80010515000000E0ULL,
443 /* Write data */
444 0x80010515001E0004ULL, 0x80010515001E00E4ULL,
445 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 0x8002051500000000ULL, 0x80020515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400447 /* Write data */
448 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 END_SIGN
450};
451
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700452/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453 * Constants for Fixing the MacAddress problem seen mostly on
454 * Alpha machines.
455 */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500456static const u64 fix_mac[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 0x0060000000000000ULL, 0x0060600000000000ULL,
458 0x0040600000000000ULL, 0x0000600000000000ULL,
459 0x0020600000000000ULL, 0x0060600000000000ULL,
460 0x0020600000000000ULL, 0x0060600000000000ULL,
461 0x0020600000000000ULL, 0x0060600000000000ULL,
462 0x0020600000000000ULL, 0x0060600000000000ULL,
463 0x0020600000000000ULL, 0x0060600000000000ULL,
464 0x0020600000000000ULL, 0x0060600000000000ULL,
465 0x0020600000000000ULL, 0x0060600000000000ULL,
466 0x0020600000000000ULL, 0x0060600000000000ULL,
467 0x0020600000000000ULL, 0x0060600000000000ULL,
468 0x0020600000000000ULL, 0x0060600000000000ULL,
469 0x0020600000000000ULL, 0x0000600000000000ULL,
470 0x0040600000000000ULL, 0x0060600000000000ULL,
471 END_SIGN
472};
473
Ananda Rajub41477f2006-07-24 19:52:49 -0400474MODULE_LICENSE("GPL");
475MODULE_VERSION(DRV_VERSION);
476
477
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478/* Module Loadable parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500479S2IO_PARM_INT(tx_fifo_num, FIFO_DEFAULT_NUM);
Ananda Rajub41477f2006-07-24 19:52:49 -0400480S2IO_PARM_INT(rx_ring_num, 1);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500481S2IO_PARM_INT(multiq, 0);
Ananda Rajub41477f2006-07-24 19:52:49 -0400482S2IO_PARM_INT(rx_ring_mode, 1);
483S2IO_PARM_INT(use_continuous_tx_intrs, 1);
484S2IO_PARM_INT(rmac_pause_time, 0x100);
485S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
486S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
487S2IO_PARM_INT(shared_splits, 0);
488S2IO_PARM_INT(tmac_util_period, 5);
489S2IO_PARM_INT(rmac_util_period, 5);
Ananda Rajub41477f2006-07-24 19:52:49 -0400490S2IO_PARM_INT(l3l4hdr_size, 128);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500491/* 0 is no steering, 1 is Priority steering, 2 is Default steering */
492S2IO_PARM_INT(tx_steering_type, TX_DEFAULT_STEERING);
Ananda Rajub41477f2006-07-24 19:52:49 -0400493/* Frequency of Rx desc syncs expressed as power of 2 */
494S2IO_PARM_INT(rxsync_frequency, 3);
Veena Parateccb8622007-07-23 02:23:54 -0400495/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -0700496S2IO_PARM_INT(intr_type, 2);
Ananda Rajub41477f2006-07-24 19:52:49 -0400497/* Large receive offload feature */
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700498static unsigned int lro_enable;
499module_param_named(lro, lro_enable, uint, 0);
500
Ananda Rajub41477f2006-07-24 19:52:49 -0400501/* Max pkts to be aggregated by LRO at one time. If not specified,
502 * aggregation happens until we hit max IP pkt size(64K)
503 */
504S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
Ananda Rajub41477f2006-07-24 19:52:49 -0400505S2IO_PARM_INT(indicate_max_pkts, 0);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -0500506
507S2IO_PARM_INT(napi, 1);
508S2IO_PARM_INT(ufo, 0);
Sivakumar Subramani926930b2007-02-24 01:59:39 -0500509S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
Ananda Rajub41477f2006-07-24 19:52:49 -0400510
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000512{DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513static unsigned int rx_ring_sz[MAX_RX_RINGS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000514{[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700515static unsigned int rts_frm_len[MAX_RX_RINGS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000516{[0 ...(MAX_RX_RINGS - 1)] = 0 };
Ananda Rajub41477f2006-07-24 19:52:49 -0400517
518module_param_array(tx_fifo_len, uint, NULL, 0);
519module_param_array(rx_ring_sz, uint, NULL, 0);
520module_param_array(rts_frm_len, uint, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700522/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 * S2IO device table.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700524 * This table lists all the devices that this driver supports.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 */
526static struct pci_device_id s2io_tbl[] __devinitdata = {
527 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
528 PCI_ANY_ID, PCI_ANY_ID},
529 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
530 PCI_ANY_ID, PCI_ANY_ID},
531 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
Joe Perchesd44570e2009-08-24 17:29:44 +0000532 PCI_ANY_ID, PCI_ANY_ID},
533 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
534 PCI_ANY_ID, PCI_ANY_ID},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 {0,}
536};
537
538MODULE_DEVICE_TABLE(pci, s2io_tbl);
539
Linas Vepstasd796fdb2007-05-14 18:37:30 -0500540static struct pci_error_handlers s2io_err_handler = {
541 .error_detected = s2io_io_error_detected,
542 .slot_reset = s2io_io_slot_reset,
543 .resume = s2io_io_resume,
544};
545
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546static struct pci_driver s2io_driver = {
Joe Perchesd44570e2009-08-24 17:29:44 +0000547 .name = "S2IO",
548 .id_table = s2io_tbl,
549 .probe = s2io_init_nic,
550 .remove = __devexit_p(s2io_rem_nic),
551 .err_handler = &s2io_err_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552};
553
554/* A simplifier macro used both by init and free shared_mem Fns(). */
555#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
556
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500557/* netqueue manipulation helper functions */
558static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
559{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700560 if (!sp->config.multiq) {
561 int i;
562
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500563 for (i = 0; i < sp->config.tx_fifo_num; i++)
564 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500565 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700566 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500567}
568
569static inline void s2io_stop_tx_queue(struct s2io_nic *sp, int fifo_no)
570{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700571 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500572 sp->mac_control.fifos[fifo_no].queue_state =
573 FIFO_QUEUE_STOP;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700574
575 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500576}
577
578static inline void s2io_start_all_tx_queue(struct s2io_nic *sp)
579{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700580 if (!sp->config.multiq) {
581 int i;
582
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500583 for (i = 0; i < sp->config.tx_fifo_num; i++)
584 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500585 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700586 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500587}
588
589static inline void s2io_start_tx_queue(struct s2io_nic *sp, int fifo_no)
590{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700591 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500592 sp->mac_control.fifos[fifo_no].queue_state =
593 FIFO_QUEUE_START;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700594
595 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500596}
597
598static inline void s2io_wake_all_tx_queue(struct s2io_nic *sp)
599{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700600 if (!sp->config.multiq) {
601 int i;
602
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500603 for (i = 0; i < sp->config.tx_fifo_num; i++)
604 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500605 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700606 netif_tx_wake_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500607}
608
609static inline void s2io_wake_tx_queue(
610 struct fifo_info *fifo, int cnt, u8 multiq)
611{
612
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500613 if (multiq) {
614 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
615 netif_wake_subqueue(fifo->dev, fifo->fifo_no);
David S. Millerb19fa1f2008-07-08 23:14:24 -0700616 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500617 if (netif_queue_stopped(fifo->dev)) {
618 fifo->queue_state = FIFO_QUEUE_START;
619 netif_wake_queue(fifo->dev);
620 }
621 }
622}
623
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624/**
625 * init_shared_mem - Allocation and Initialization of Memory
626 * @nic: Device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700627 * Description: The function allocates all the memory areas shared
628 * between the NIC and the driver. This includes Tx descriptors,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 * Rx descriptors and the statistics block.
630 */
631
632static int init_shared_mem(struct s2io_nic *nic)
633{
634 u32 size;
635 void *tmp_v_addr, *tmp_v_addr_next;
636 dma_addr_t tmp_p_addr, tmp_p_addr_next;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500637 struct RxD_block *pre_rxd_blk = NULL;
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500638 int i, j, blk_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 int lst_size, lst_per_page;
640 struct net_device *dev = nic->dev;
viro@zenIV.linux.org.uk8ae418c2005-09-02 20:15:29 +0100641 unsigned long tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500642 struct buffAdd *ba;
Joe Perchesffb5df62009-08-24 17:29:47 +0000643 struct config_param *config = &nic->config;
644 struct mac_info *mac_control = &nic->mac_control;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400645 unsigned long long mem_allocated = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646
Joe Perches13d866a2009-08-24 17:29:41 +0000647 /* Allocation and initialization of TXDLs in FIFOs */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 size = 0;
649 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000650 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
651
652 size += tx_cfg->fifo_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653 }
654 if (size > MAX_AVAILABLE_TXDS) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000655 DBG_PRINT(ERR_DBG,
656 "Too many TxDs requested: %d, max supported: %d\n",
657 size, MAX_AVAILABLE_TXDS);
Ananda Rajub41477f2006-07-24 19:52:49 -0400658 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 }
660
Surjit Reang2fda0962008-01-24 02:08:59 -0800661 size = 0;
662 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000663 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
664
665 size = tx_cfg->fifo_len;
Surjit Reang2fda0962008-01-24 02:08:59 -0800666 /*
667 * Legal values are from 2 to 8192
668 */
669 if (size < 2) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000670 DBG_PRINT(ERR_DBG, "Fifo %d: Invalid length (%d) - "
671 "Valid lengths are 2 through 8192\n",
672 i, size);
Surjit Reang2fda0962008-01-24 02:08:59 -0800673 return -EINVAL;
674 }
675 }
676
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500677 lst_size = (sizeof(struct TxD) * config->max_txds);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 lst_per_page = PAGE_SIZE / lst_size;
679
680 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000681 struct fifo_info *fifo = &mac_control->fifos[i];
682 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
683 int fifo_len = tx_cfg->fifo_len;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500684 int list_holder_size = fifo_len * sizeof(struct list_info_hold);
Joe Perches13d866a2009-08-24 17:29:41 +0000685
686 fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL);
687 if (!fifo->list_info) {
Joe Perchesd44570e2009-08-24 17:29:44 +0000688 DBG_PRINT(INFO_DBG, "Malloc failed for list_info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 return -ENOMEM;
690 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400691 mem_allocated += list_holder_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 }
693 for (i = 0; i < config->tx_fifo_num; i++) {
694 int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
695 lst_per_page);
Joe Perches13d866a2009-08-24 17:29:41 +0000696 struct fifo_info *fifo = &mac_control->fifos[i];
697 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
698
699 fifo->tx_curr_put_info.offset = 0;
700 fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1;
701 fifo->tx_curr_get_info.offset = 0;
702 fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1;
703 fifo->fifo_no = i;
704 fifo->nic = nic;
705 fifo->max_txds = MAX_SKB_FRAGS + 2;
706 fifo->dev = dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700707
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708 for (j = 0; j < page_num; j++) {
709 int k = 0;
710 dma_addr_t tmp_p;
711 void *tmp_v;
712 tmp_v = pci_alloc_consistent(nic->pdev,
713 PAGE_SIZE, &tmp_p);
714 if (!tmp_v) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000715 DBG_PRINT(INFO_DBG,
716 "pci_alloc_consistent failed for TxDL\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717 return -ENOMEM;
718 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700719 /* If we got a zero DMA address(can happen on
720 * certain platforms like PPC), reallocate.
721 * Store virtual address of page we don't want,
722 * to be freed later.
723 */
724 if (!tmp_p) {
725 mac_control->zerodma_virt_addr = tmp_v;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400726 DBG_PRINT(INIT_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000727 "%s: Zero DMA address for TxDL. "
728 "Virtual address %p\n",
729 dev->name, tmp_v);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700730 tmp_v = pci_alloc_consistent(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +0000731 PAGE_SIZE, &tmp_p);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700732 if (!tmp_v) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800733 DBG_PRINT(INFO_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000734 "pci_alloc_consistent failed for TxDL\n");
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700735 return -ENOMEM;
736 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400737 mem_allocated += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700738 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 while (k < lst_per_page) {
740 int l = (j * lst_per_page) + k;
Joe Perches13d866a2009-08-24 17:29:41 +0000741 if (l == tx_cfg->fifo_len)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700742 break;
Joe Perches13d866a2009-08-24 17:29:41 +0000743 fifo->list_info[l].list_virt_addr =
Joe Perchesd44570e2009-08-24 17:29:44 +0000744 tmp_v + (k * lst_size);
Joe Perches13d866a2009-08-24 17:29:41 +0000745 fifo->list_info[l].list_phy_addr =
Joe Perchesd44570e2009-08-24 17:29:44 +0000746 tmp_p + (k * lst_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 k++;
748 }
749 }
750 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751
Surjit Reang2fda0962008-01-24 02:08:59 -0800752 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000753 struct fifo_info *fifo = &mac_control->fifos[i];
754 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
755
756 size = tx_cfg->fifo_len;
757 fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
758 if (!fifo->ufo_in_band_v)
Surjit Reang2fda0962008-01-24 02:08:59 -0800759 return -ENOMEM;
760 mem_allocated += (size * sizeof(u64));
761 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -0500762
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 /* Allocation and initialization of RXDs in Rings */
764 size = 0;
765 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000766 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
767 struct ring_info *ring = &mac_control->rings[i];
768
769 if (rx_cfg->num_rxd % (rxd_count[nic->rxd_mode] + 1)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000770 DBG_PRINT(ERR_DBG, "%s: Ring%d RxD count is not a "
771 "multiple of RxDs per Block\n",
772 dev->name, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 return FAILURE;
774 }
Joe Perches13d866a2009-08-24 17:29:41 +0000775 size += rx_cfg->num_rxd;
776 ring->block_count = rx_cfg->num_rxd /
Joe Perchesd44570e2009-08-24 17:29:44 +0000777 (rxd_count[nic->rxd_mode] + 1);
Joe Perches13d866a2009-08-24 17:29:41 +0000778 ring->pkt_cnt = rx_cfg->num_rxd - ring->block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 }
Ananda Rajuda6971d2005-10-31 16:55:31 -0500780 if (nic->rxd_mode == RXD_MODE_1)
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500781 size = (size * (sizeof(struct RxD1)));
Ananda Rajuda6971d2005-10-31 16:55:31 -0500782 else
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500783 size = (size * (sizeof(struct RxD3)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784
785 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000786 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
787 struct ring_info *ring = &mac_control->rings[i];
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700788
Joe Perches13d866a2009-08-24 17:29:41 +0000789 ring->rx_curr_get_info.block_index = 0;
790 ring->rx_curr_get_info.offset = 0;
791 ring->rx_curr_get_info.ring_len = rx_cfg->num_rxd - 1;
792 ring->rx_curr_put_info.block_index = 0;
793 ring->rx_curr_put_info.offset = 0;
794 ring->rx_curr_put_info.ring_len = rx_cfg->num_rxd - 1;
795 ring->nic = nic;
796 ring->ring_no = i;
797 ring->lro = lro_enable;
798
799 blk_cnt = rx_cfg->num_rxd / (rxd_count[nic->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800 /* Allocating all the Rx blocks */
801 for (j = 0; j < blk_cnt; j++) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500802 struct rx_block_info *rx_blocks;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500803 int l;
804
Joe Perches13d866a2009-08-24 17:29:41 +0000805 rx_blocks = &ring->rx_blocks[j];
Joe Perchesd44570e2009-08-24 17:29:44 +0000806 size = SIZE_OF_BLOCK; /* size is always page size */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700807 tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
808 &tmp_p_addr);
809 if (tmp_v_addr == NULL) {
810 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700811 * In case of failure, free_shared_mem()
812 * is called, which should free any
813 * memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700814 * failure happened.
815 */
Ananda Rajuda6971d2005-10-31 16:55:31 -0500816 rx_blocks->block_virt_addr = tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700817 return -ENOMEM;
818 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400819 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820 memset(tmp_v_addr, 0, size);
Joe Perches4f870322009-08-24 17:29:42 +0000821
822 size = sizeof(struct rxd_info) *
823 rxd_count[nic->rxd_mode];
Ananda Rajuda6971d2005-10-31 16:55:31 -0500824 rx_blocks->block_virt_addr = tmp_v_addr;
825 rx_blocks->block_dma_addr = tmp_p_addr;
Joe Perches4f870322009-08-24 17:29:42 +0000826 rx_blocks->rxds = kmalloc(size, GFP_KERNEL);
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500827 if (!rx_blocks->rxds)
828 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000829 mem_allocated += size;
Joe Perchesd44570e2009-08-24 17:29:44 +0000830 for (l = 0; l < rxd_count[nic->rxd_mode]; l++) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500831 rx_blocks->rxds[l].virt_addr =
832 rx_blocks->block_virt_addr +
833 (rxd_size[nic->rxd_mode] * l);
834 rx_blocks->rxds[l].dma_addr =
835 rx_blocks->block_dma_addr +
836 (rxd_size[nic->rxd_mode] * l);
837 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 }
839 /* Interlinking all Rx Blocks */
840 for (j = 0; j < blk_cnt; j++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000841 int next = (j + 1) % blk_cnt;
842 tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
843 tmp_v_addr_next = ring->rx_blocks[next].block_virt_addr;
844 tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
845 tmp_p_addr_next = ring->rx_blocks[next].block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846
Joe Perchesd44570e2009-08-24 17:29:44 +0000847 pre_rxd_blk = (struct RxD_block *)tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 pre_rxd_blk->reserved_2_pNext_RxD_block =
Joe Perchesd44570e2009-08-24 17:29:44 +0000849 (unsigned long)tmp_v_addr_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850 pre_rxd_blk->pNext_RxD_Blk_physical =
Joe Perchesd44570e2009-08-24 17:29:44 +0000851 (u64)tmp_p_addr_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 }
853 }
Veena Parat6d517a22007-07-23 02:20:51 -0400854 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500855 /*
856 * Allocation of Storages for buffer addresses in 2BUFF mode
857 * and the buffers as well.
858 */
859 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000860 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
861 struct ring_info *ring = &mac_control->rings[i];
862
863 blk_cnt = rx_cfg->num_rxd /
Joe Perchesd44570e2009-08-24 17:29:44 +0000864 (rxd_count[nic->rxd_mode] + 1);
Joe Perches4f870322009-08-24 17:29:42 +0000865 size = sizeof(struct buffAdd *) * blk_cnt;
866 ring->ba = kmalloc(size, GFP_KERNEL);
Joe Perches13d866a2009-08-24 17:29:41 +0000867 if (!ring->ba)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000869 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500870 for (j = 0; j < blk_cnt; j++) {
871 int k = 0;
Joe Perches4f870322009-08-24 17:29:42 +0000872
873 size = sizeof(struct buffAdd) *
874 (rxd_count[nic->rxd_mode] + 1);
875 ring->ba[j] = kmalloc(size, GFP_KERNEL);
Joe Perches13d866a2009-08-24 17:29:41 +0000876 if (!ring->ba[j])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000878 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500879 while (k != rxd_count[nic->rxd_mode]) {
Joe Perches13d866a2009-08-24 17:29:41 +0000880 ba = &ring->ba[j][k];
Joe Perches4f870322009-08-24 17:29:42 +0000881 size = BUF0_LEN + ALIGN_SIZE;
882 ba->ba_0_org = kmalloc(size, GFP_KERNEL);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500883 if (!ba->ba_0_org)
884 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000885 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500886 tmp = (unsigned long)ba->ba_0_org;
887 tmp += ALIGN_SIZE;
Joe Perchesd44570e2009-08-24 17:29:44 +0000888 tmp &= ~((unsigned long)ALIGN_SIZE);
889 ba->ba_0 = (void *)tmp;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500890
Joe Perches4f870322009-08-24 17:29:42 +0000891 size = BUF1_LEN + ALIGN_SIZE;
892 ba->ba_1_org = kmalloc(size, GFP_KERNEL);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500893 if (!ba->ba_1_org)
894 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000895 mem_allocated += size;
Joe Perchesd44570e2009-08-24 17:29:44 +0000896 tmp = (unsigned long)ba->ba_1_org;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500897 tmp += ALIGN_SIZE;
Joe Perchesd44570e2009-08-24 17:29:44 +0000898 tmp &= ~((unsigned long)ALIGN_SIZE);
899 ba->ba_1 = (void *)tmp;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500900 k++;
901 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902 }
903 }
904 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700905
906 /* Allocation and initialization of Statistics block */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500907 size = sizeof(struct stat_block);
Joe Perchesd44570e2009-08-24 17:29:44 +0000908 mac_control->stats_mem =
909 pci_alloc_consistent(nic->pdev, size,
910 &mac_control->stats_mem_phy);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911
912 if (!mac_control->stats_mem) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700913 /*
914 * In case of failure, free_shared_mem() is called, which
915 * should free any memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 * failure happened.
917 */
918 return -ENOMEM;
919 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400920 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 mac_control->stats_mem_sz = size;
922
923 tmp_v_addr = mac_control->stats_mem;
Joe Perchesd44570e2009-08-24 17:29:44 +0000924 mac_control->stats_info = (struct stat_block *)tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925 memset(tmp_v_addr, 0, size);
Joe Perches9e39f7c2009-08-25 08:52:00 +0000926 DBG_PRINT(INIT_DBG, "%s: Ring Mem PHY: 0x%llx\n", dev->name,
Joe Perchesd44570e2009-08-24 17:29:44 +0000927 (unsigned long long)tmp_p_addr);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400928 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700929 return SUCCESS;
930}
931
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700932/**
933 * free_shared_mem - Free the allocated Memory
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 * @nic: Device private variable.
935 * Description: This function is to free all memory locations allocated by
936 * the init_shared_mem() function and return it to the kernel.
937 */
938
939static void free_shared_mem(struct s2io_nic *nic)
940{
941 int i, j, blk_cnt, size;
942 void *tmp_v_addr;
943 dma_addr_t tmp_p_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 int lst_size, lst_per_page;
Micah Gruber8910b492007-07-09 11:29:04 +0800945 struct net_device *dev;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400946 int page_num = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +0000947 struct config_param *config;
948 struct mac_info *mac_control;
949 struct stat_block *stats;
950 struct swStat *swstats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951
952 if (!nic)
953 return;
954
Micah Gruber8910b492007-07-09 11:29:04 +0800955 dev = nic->dev;
956
Linus Torvalds1da177e2005-04-16 15:20:36 -0700957 config = &nic->config;
Joe Perchesffb5df62009-08-24 17:29:47 +0000958 mac_control = &nic->mac_control;
959 stats = mac_control->stats_info;
960 swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961
Joe Perchesd44570e2009-08-24 17:29:44 +0000962 lst_size = sizeof(struct TxD) * config->max_txds;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963 lst_per_page = PAGE_SIZE / lst_size;
964
965 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000966 struct fifo_info *fifo = &mac_control->fifos[i];
967 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
968
969 page_num = TXD_MEM_PAGE_CNT(tx_cfg->fifo_len, lst_per_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 for (j = 0; j < page_num; j++) {
971 int mem_blks = (j * lst_per_page);
Joe Perches13d866a2009-08-24 17:29:41 +0000972 struct list_info_hold *fli;
973
974 if (!fifo->list_info)
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400975 return;
Joe Perches13d866a2009-08-24 17:29:41 +0000976
977 fli = &fifo->list_info[mem_blks];
978 if (!fli->list_virt_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 break;
980 pci_free_consistent(nic->pdev, PAGE_SIZE,
Joe Perches13d866a2009-08-24 17:29:41 +0000981 fli->list_virt_addr,
982 fli->list_phy_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +0000983 swstats->mem_freed += PAGE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700984 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700985 /* If we got a zero DMA address during allocation,
986 * free the page now
987 */
988 if (mac_control->zerodma_virt_addr) {
989 pci_free_consistent(nic->pdev, PAGE_SIZE,
990 mac_control->zerodma_virt_addr,
991 (dma_addr_t)0);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400992 DBG_PRINT(INIT_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000993 "%s: Freeing TxDL with zero DMA address. "
994 "Virtual address %p\n",
995 dev->name, mac_control->zerodma_virt_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +0000996 swstats->mem_freed += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700997 }
Joe Perches13d866a2009-08-24 17:29:41 +0000998 kfree(fifo->list_info);
Joe Perches82c2d022009-08-24 17:29:48 +0000999 swstats->mem_freed += tx_cfg->fifo_len *
Joe Perchesd44570e2009-08-24 17:29:44 +00001000 sizeof(struct list_info_hold);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001 }
1002
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003 size = SIZE_OF_BLOCK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001005 struct ring_info *ring = &mac_control->rings[i];
1006
1007 blk_cnt = ring->block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 for (j = 0; j < blk_cnt; j++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001009 tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
1010 tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 if (tmp_v_addr == NULL)
1012 break;
1013 pci_free_consistent(nic->pdev, size,
1014 tmp_v_addr, tmp_p_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +00001015 swstats->mem_freed += size;
Joe Perches13d866a2009-08-24 17:29:41 +00001016 kfree(ring->rx_blocks[j].rxds);
Joe Perchesffb5df62009-08-24 17:29:47 +00001017 swstats->mem_freed += sizeof(struct rxd_info) *
1018 rxd_count[nic->rxd_mode];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019 }
1020 }
1021
Veena Parat6d517a22007-07-23 02:20:51 -04001022 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05001023 /* Freeing buffer storage addresses in 2BUFF mode. */
1024 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001025 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
1026 struct ring_info *ring = &mac_control->rings[i];
1027
1028 blk_cnt = rx_cfg->num_rxd /
1029 (rxd_count[nic->rxd_mode] + 1);
Ananda Rajuda6971d2005-10-31 16:55:31 -05001030 for (j = 0; j < blk_cnt; j++) {
1031 int k = 0;
Joe Perches13d866a2009-08-24 17:29:41 +00001032 if (!ring->ba[j])
Ananda Rajuda6971d2005-10-31 16:55:31 -05001033 continue;
1034 while (k != rxd_count[nic->rxd_mode]) {
Joe Perches13d866a2009-08-24 17:29:41 +00001035 struct buffAdd *ba = &ring->ba[j][k];
Ananda Rajuda6971d2005-10-31 16:55:31 -05001036 kfree(ba->ba_0_org);
Joe Perchesffb5df62009-08-24 17:29:47 +00001037 swstats->mem_freed +=
1038 BUF0_LEN + ALIGN_SIZE;
Ananda Rajuda6971d2005-10-31 16:55:31 -05001039 kfree(ba->ba_1_org);
Joe Perchesffb5df62009-08-24 17:29:47 +00001040 swstats->mem_freed +=
1041 BUF1_LEN + ALIGN_SIZE;
Ananda Rajuda6971d2005-10-31 16:55:31 -05001042 k++;
1043 }
Joe Perches13d866a2009-08-24 17:29:41 +00001044 kfree(ring->ba[j]);
Joe Perchesffb5df62009-08-24 17:29:47 +00001045 swstats->mem_freed += sizeof(struct buffAdd) *
1046 (rxd_count[nic->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 }
Joe Perches13d866a2009-08-24 17:29:41 +00001048 kfree(ring->ba);
Joe Perchesffb5df62009-08-24 17:29:47 +00001049 swstats->mem_freed += sizeof(struct buffAdd *) *
1050 blk_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053
Surjit Reang2fda0962008-01-24 02:08:59 -08001054 for (i = 0; i < nic->config.tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001055 struct fifo_info *fifo = &mac_control->fifos[i];
1056 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
1057
1058 if (fifo->ufo_in_band_v) {
Joe Perchesffb5df62009-08-24 17:29:47 +00001059 swstats->mem_freed += tx_cfg->fifo_len *
1060 sizeof(u64);
Joe Perches13d866a2009-08-24 17:29:41 +00001061 kfree(fifo->ufo_in_band_v);
Surjit Reang2fda0962008-01-24 02:08:59 -08001062 }
1063 }
1064
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 if (mac_control->stats_mem) {
Joe Perchesffb5df62009-08-24 17:29:47 +00001066 swstats->mem_freed += mac_control->stats_mem_sz;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001067 pci_free_consistent(nic->pdev,
1068 mac_control->stats_mem_sz,
1069 mac_control->stats_mem,
1070 mac_control->stats_mem_phy);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001071 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001072}
1073
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001074/**
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001075 * s2io_verify_pci_mode -
1076 */
1077
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001078static int s2io_verify_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001079{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001080 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001081 register u64 val64 = 0;
1082 int mode;
1083
1084 val64 = readq(&bar0->pci_mode);
1085 mode = (u8)GET_PCI_MODE(val64);
1086
Joe Perchesd44570e2009-08-24 17:29:44 +00001087 if (val64 & PCI_MODE_UNKNOWN_MODE)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001088 return -1; /* Unknown PCI mode */
1089 return mode;
1090}
1091
Ananda Rajuc92ca042006-04-21 19:18:03 -04001092#define NEC_VENID 0x1033
1093#define NEC_DEVID 0x0125
1094static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
1095{
1096 struct pci_dev *tdev = NULL;
Alan Cox26d36b62006-09-15 15:22:51 +01001097 while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
1098 if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
Ilpo Järvinen7ad62dbc2008-05-13 14:16:54 +03001099 if (tdev->bus == s2io_pdev->bus->parent) {
Alan Cox26d36b62006-09-15 15:22:51 +01001100 pci_dev_put(tdev);
Ananda Rajuc92ca042006-04-21 19:18:03 -04001101 return 1;
Ilpo Järvinen7ad62dbc2008-05-13 14:16:54 +03001102 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001103 }
1104 }
1105 return 0;
1106}
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001107
Adrian Bunk7b32a312006-05-16 17:30:50 +02001108static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001109/**
1110 * s2io_print_pci_mode -
1111 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001112static int s2io_print_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001113{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001114 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001115 register u64 val64 = 0;
1116 int mode;
1117 struct config_param *config = &nic->config;
Joe Perches9e39f7c2009-08-25 08:52:00 +00001118 const char *pcimode;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001119
1120 val64 = readq(&bar0->pci_mode);
1121 mode = (u8)GET_PCI_MODE(val64);
1122
Joe Perchesd44570e2009-08-24 17:29:44 +00001123 if (val64 & PCI_MODE_UNKNOWN_MODE)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001124 return -1; /* Unknown PCI mode */
1125
Ananda Rajuc92ca042006-04-21 19:18:03 -04001126 config->bus_speed = bus_speed[mode];
1127
1128 if (s2io_on_nec_bridge(nic->pdev)) {
1129 DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00001130 nic->dev->name);
Ananda Rajuc92ca042006-04-21 19:18:03 -04001131 return mode;
1132 }
1133
Joe Perchesd44570e2009-08-24 17:29:44 +00001134 switch (mode) {
1135 case PCI_MODE_PCI_33:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001136 pcimode = "33MHz PCI bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001137 break;
1138 case PCI_MODE_PCI_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001139 pcimode = "66MHz PCI bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001140 break;
1141 case PCI_MODE_PCIX_M1_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001142 pcimode = "66MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001143 break;
1144 case PCI_MODE_PCIX_M1_100:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001145 pcimode = "100MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001146 break;
1147 case PCI_MODE_PCIX_M1_133:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001148 pcimode = "133MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001149 break;
1150 case PCI_MODE_PCIX_M2_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001151 pcimode = "133MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001152 break;
1153 case PCI_MODE_PCIX_M2_100:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001154 pcimode = "200MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001155 break;
1156 case PCI_MODE_PCIX_M2_133:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001157 pcimode = "266MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001158 break;
1159 default:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001160 pcimode = "unsupported bus!";
1161 mode = -1;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001162 }
1163
Joe Perches9e39f7c2009-08-25 08:52:00 +00001164 DBG_PRINT(ERR_DBG, "%s: Device is on %d bit %s\n",
1165 nic->dev->name, val64 & PCI_MODE_32_BITS ? 32 : 64, pcimode);
1166
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001167 return mode;
1168}
1169
1170/**
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001171 * init_tti - Initialization transmit traffic interrupt scheme
1172 * @nic: device private variable
1173 * @link: link status (UP/DOWN) used to enable/disable continuous
1174 * transmit interrupts
1175 * Description: The function configures transmit traffic interrupts
1176 * Return Value: SUCCESS on success and
1177 * '-1' on failure
1178 */
1179
Adrian Bunk0d66afe2008-03-04 15:19:22 -08001180static int init_tti(struct s2io_nic *nic, int link)
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001181{
1182 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1183 register u64 val64 = 0;
1184 int i;
Joe Perchesffb5df62009-08-24 17:29:47 +00001185 struct config_param *config = &nic->config;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001186
1187 for (i = 0; i < config->tx_fifo_num; i++) {
1188 /*
1189 * TTI Initialization. Default Tx timer gets us about
1190 * 250 interrupts per sec. Continuous interrupts are enabled
1191 * by default.
1192 */
1193 if (nic->device_type == XFRAME_II_DEVICE) {
1194 int count = (nic->config.bus_speed * 125)/2;
1195 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
1196 } else
1197 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
1198
1199 val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001200 TTI_DATA1_MEM_TX_URNG_B(0x10) |
1201 TTI_DATA1_MEM_TX_URNG_C(0x30) |
1202 TTI_DATA1_MEM_TX_TIMER_AC_EN;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001203 if (i == 0)
1204 if (use_continuous_tx_intrs && (link == LINK_UP))
1205 val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001206 writeq(val64, &bar0->tti_data1_mem);
1207
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001208 if (nic->config.intr_type == MSI_X) {
1209 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1210 TTI_DATA2_MEM_TX_UFC_B(0x100) |
1211 TTI_DATA2_MEM_TX_UFC_C(0x200) |
1212 TTI_DATA2_MEM_TX_UFC_D(0x300);
1213 } else {
1214 if ((nic->config.tx_steering_type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00001215 TX_DEFAULT_STEERING) &&
1216 (config->tx_fifo_num > 1) &&
1217 (i >= nic->udp_fifo_idx) &&
1218 (i < (nic->udp_fifo_idx +
1219 nic->total_udp_fifos)))
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001220 val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
1221 TTI_DATA2_MEM_TX_UFC_B(0x80) |
1222 TTI_DATA2_MEM_TX_UFC_C(0x100) |
1223 TTI_DATA2_MEM_TX_UFC_D(0x120);
1224 else
1225 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1226 TTI_DATA2_MEM_TX_UFC_B(0x20) |
1227 TTI_DATA2_MEM_TX_UFC_C(0x40) |
1228 TTI_DATA2_MEM_TX_UFC_D(0x80);
1229 }
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001230
1231 writeq(val64, &bar0->tti_data2_mem);
1232
Joe Perchesd44570e2009-08-24 17:29:44 +00001233 val64 = TTI_CMD_MEM_WE |
1234 TTI_CMD_MEM_STROBE_NEW_CMD |
1235 TTI_CMD_MEM_OFFSET(i);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001236 writeq(val64, &bar0->tti_command_mem);
1237
1238 if (wait_for_cmd_complete(&bar0->tti_command_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00001239 TTI_CMD_MEM_STROBE_NEW_CMD,
1240 S2IO_BIT_RESET) != SUCCESS)
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001241 return FAILURE;
1242 }
1243
1244 return SUCCESS;
1245}
1246
1247/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001248 * init_nic - Initialization of hardware
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001249 * @nic: device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001250 * Description: The function sequentially configures every block
1251 * of the H/W from their reset values.
1252 * Return Value: SUCCESS on success and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 * '-1' on failure (endian settings incorrect).
1254 */
1255
1256static int init_nic(struct s2io_nic *nic)
1257{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001258 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259 struct net_device *dev = nic->dev;
1260 register u64 val64 = 0;
1261 void __iomem *add;
1262 u32 time;
1263 int i, j;
Ananda Rajuc92ca042006-04-21 19:18:03 -04001264 int dtx_cnt = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001265 unsigned long long mem_share;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001266 int mem_size;
Joe Perchesffb5df62009-08-24 17:29:47 +00001267 struct config_param *config = &nic->config;
1268 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001269
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001270 /* to set the swapper controle on the card */
Joe Perchesd44570e2009-08-24 17:29:44 +00001271 if (s2io_set_swapper(nic)) {
1272 DBG_PRINT(ERR_DBG, "ERROR: Setting Swapper failed\n");
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001273 return -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274 }
1275
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001276 /*
1277 * Herc requires EOI to be removed from reset before XGXS, so..
1278 */
1279 if (nic->device_type & XFRAME_II_DEVICE) {
1280 val64 = 0xA500000000ULL;
1281 writeq(val64, &bar0->sw_reset);
1282 msleep(500);
1283 val64 = readq(&bar0->sw_reset);
1284 }
1285
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286 /* Remove XGXS from reset state */
1287 val64 = 0;
1288 writeq(val64, &bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001289 msleep(500);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001290 val64 = readq(&bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001291
Sreenivasa Honnur79620242007-12-05 23:59:28 -05001292 /* Ensure that it's safe to access registers by checking
1293 * RIC_RUNNING bit is reset. Check is valid only for XframeII.
1294 */
1295 if (nic->device_type == XFRAME_II_DEVICE) {
1296 for (i = 0; i < 50; i++) {
1297 val64 = readq(&bar0->adapter_status);
1298 if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
1299 break;
1300 msleep(10);
1301 }
1302 if (i == 50)
1303 return -ENODEV;
1304 }
1305
Linus Torvalds1da177e2005-04-16 15:20:36 -07001306 /* Enable Receiving broadcasts */
1307 add = &bar0->mac_cfg;
1308 val64 = readq(&bar0->mac_cfg);
1309 val64 |= MAC_RMAC_BCAST_ENABLE;
1310 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00001311 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001312 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1313 writel((u32) (val64 >> 32), (add + 4));
1314
1315 /* Read registers in all blocks */
1316 val64 = readq(&bar0->mac_int_mask);
1317 val64 = readq(&bar0->mc_int_mask);
1318 val64 = readq(&bar0->xgxs_int_mask);
1319
1320 /* Set MTU */
1321 val64 = dev->mtu;
1322 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
1323
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001324 if (nic->device_type & XFRAME_II_DEVICE) {
1325 while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07001326 SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
Linus Torvalds1da177e2005-04-16 15:20:36 -07001327 &bar0->dtx_control, UF);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001328 if (dtx_cnt & 0x1)
1329 msleep(1); /* Necessary!! */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330 dtx_cnt++;
1331 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001332 } else {
Ananda Rajuc92ca042006-04-21 19:18:03 -04001333 while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
1334 SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
1335 &bar0->dtx_control, UF);
1336 val64 = readq(&bar0->dtx_control);
1337 dtx_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001338 }
1339 }
1340
1341 /* Tx DMA Initialization */
1342 val64 = 0;
1343 writeq(val64, &bar0->tx_fifo_partition_0);
1344 writeq(val64, &bar0->tx_fifo_partition_1);
1345 writeq(val64, &bar0->tx_fifo_partition_2);
1346 writeq(val64, &bar0->tx_fifo_partition_3);
1347
Linus Torvalds1da177e2005-04-16 15:20:36 -07001348 for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001349 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
1350
1351 val64 |= vBIT(tx_cfg->fifo_len - 1, ((j * 32) + 19), 13) |
1352 vBIT(tx_cfg->fifo_priority, ((j * 32) + 5), 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001353
1354 if (i == (config->tx_fifo_num - 1)) {
1355 if (i % 2 == 0)
1356 i++;
1357 }
1358
1359 switch (i) {
1360 case 1:
1361 writeq(val64, &bar0->tx_fifo_partition_0);
1362 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001363 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001364 break;
1365 case 3:
1366 writeq(val64, &bar0->tx_fifo_partition_1);
1367 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001368 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001369 break;
1370 case 5:
1371 writeq(val64, &bar0->tx_fifo_partition_2);
1372 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001373 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001374 break;
1375 case 7:
1376 writeq(val64, &bar0->tx_fifo_partition_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001377 val64 = 0;
1378 j = 0;
1379 break;
1380 default:
1381 j++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382 break;
1383 }
1384 }
1385
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001386 /*
1387 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
1388 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
1389 */
Joe Perchesd44570e2009-08-24 17:29:44 +00001390 if ((nic->device_type == XFRAME_I_DEVICE) && (nic->pdev->revision < 4))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001391 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);
1392
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393 val64 = readq(&bar0->tx_fifo_partition_0);
1394 DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00001395 &bar0->tx_fifo_partition_0, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001397 /*
1398 * Initialization of Tx_PA_CONFIG register to ignore packet
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399 * integrity checking.
1400 */
1401 val64 = readq(&bar0->tx_pa_cfg);
Joe Perchesd44570e2009-08-24 17:29:44 +00001402 val64 |= TX_PA_CFG_IGNORE_FRM_ERR |
1403 TX_PA_CFG_IGNORE_SNAP_OUI |
1404 TX_PA_CFG_IGNORE_LLC_CTRL |
1405 TX_PA_CFG_IGNORE_L2_ERR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001406 writeq(val64, &bar0->tx_pa_cfg);
1407
1408 /* Rx DMA intialization. */
1409 val64 = 0;
1410 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001411 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
1412
1413 val64 |= vBIT(rx_cfg->ring_priority, (5 + (i * 8)), 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414 }
1415 writeq(val64, &bar0->rx_queue_priority);
1416
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001417 /*
1418 * Allocating equal share of memory to all the
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419 * configured Rings.
1420 */
1421 val64 = 0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001422 if (nic->device_type & XFRAME_II_DEVICE)
1423 mem_size = 32;
1424 else
1425 mem_size = 64;
1426
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427 for (i = 0; i < config->rx_ring_num; i++) {
1428 switch (i) {
1429 case 0:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001430 mem_share = (mem_size / config->rx_ring_num +
1431 mem_size % config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432 val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
1433 continue;
1434 case 1:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001435 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001436 val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
1437 continue;
1438 case 2:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001439 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440 val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
1441 continue;
1442 case 3:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001443 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001444 val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
1445 continue;
1446 case 4:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001447 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448 val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
1449 continue;
1450 case 5:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001451 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001452 val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
1453 continue;
1454 case 6:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001455 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456 val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
1457 continue;
1458 case 7:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001459 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001460 val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
1461 continue;
1462 }
1463 }
1464 writeq(val64, &bar0->rx_queue_cfg);
1465
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001466 /*
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001467 * Filling Tx round robin registers
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001468 * as per the number of FIFOs for equal scheduling priority
Linus Torvalds1da177e2005-04-16 15:20:36 -07001469 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001470 switch (config->tx_fifo_num) {
1471 case 1:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001472 val64 = 0x0;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001473 writeq(val64, &bar0->tx_w_round_robin_0);
1474 writeq(val64, &bar0->tx_w_round_robin_1);
1475 writeq(val64, &bar0->tx_w_round_robin_2);
1476 writeq(val64, &bar0->tx_w_round_robin_3);
1477 writeq(val64, &bar0->tx_w_round_robin_4);
1478 break;
1479 case 2:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001480 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001481 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001482 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001483 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001484 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001485 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001486 writeq(val64, &bar0->tx_w_round_robin_4);
1487 break;
1488 case 3:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001489 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001490 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001491 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001492 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001493 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001494 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001495 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001496 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001497 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001498 writeq(val64, &bar0->tx_w_round_robin_4);
1499 break;
1500 case 4:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001501 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001502 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001503 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001504 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001505 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001506 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001507 writeq(val64, &bar0->tx_w_round_robin_4);
1508 break;
1509 case 5:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001510 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001511 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001512 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001513 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001514 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001515 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001516 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001517 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001518 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001519 writeq(val64, &bar0->tx_w_round_robin_4);
1520 break;
1521 case 6:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001522 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001523 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001524 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001525 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001526 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001527 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001528 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001529 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001530 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001531 writeq(val64, &bar0->tx_w_round_robin_4);
1532 break;
1533 case 7:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001534 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001535 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001536 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001537 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001538 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001539 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001540 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001541 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001542 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001543 writeq(val64, &bar0->tx_w_round_robin_4);
1544 break;
1545 case 8:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001546 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001547 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001548 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001549 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001550 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001551 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001552 writeq(val64, &bar0->tx_w_round_robin_4);
1553 break;
1554 }
1555
Ananda Rajub41477f2006-07-24 19:52:49 -04001556 /* Enable all configured Tx FIFO partitions */
Ananda Raju5d3213c2006-04-21 19:23:26 -04001557 val64 = readq(&bar0->tx_fifo_partition_0);
1558 val64 |= (TX_FIFO_PARTITION_EN);
1559 writeq(val64, &bar0->tx_fifo_partition_0);
1560
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001561 /* Filling the Rx round robin registers as per the
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001562 * number of Rings and steering based on QoS with
1563 * equal priority.
1564 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001565 switch (config->rx_ring_num) {
1566 case 1:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001567 val64 = 0x0;
1568 writeq(val64, &bar0->rx_w_round_robin_0);
1569 writeq(val64, &bar0->rx_w_round_robin_1);
1570 writeq(val64, &bar0->rx_w_round_robin_2);
1571 writeq(val64, &bar0->rx_w_round_robin_3);
1572 writeq(val64, &bar0->rx_w_round_robin_4);
1573
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001574 val64 = 0x8080808080808080ULL;
1575 writeq(val64, &bar0->rts_qos_steering);
1576 break;
1577 case 2:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001578 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001579 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001580 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001581 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001582 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001583 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001584 writeq(val64, &bar0->rx_w_round_robin_4);
1585
1586 val64 = 0x8080808040404040ULL;
1587 writeq(val64, &bar0->rts_qos_steering);
1588 break;
1589 case 3:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001590 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001591 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001592 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001593 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001594 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001595 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001596 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001597 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001598 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001599 writeq(val64, &bar0->rx_w_round_robin_4);
1600
1601 val64 = 0x8080804040402020ULL;
1602 writeq(val64, &bar0->rts_qos_steering);
1603 break;
1604 case 4:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001605 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001606 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001607 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001608 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001609 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001610 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001611 writeq(val64, &bar0->rx_w_round_robin_4);
1612
1613 val64 = 0x8080404020201010ULL;
1614 writeq(val64, &bar0->rts_qos_steering);
1615 break;
1616 case 5:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001617 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001618 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001619 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001620 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001621 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001622 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001623 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001624 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001625 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001626 writeq(val64, &bar0->rx_w_round_robin_4);
1627
1628 val64 = 0x8080404020201008ULL;
1629 writeq(val64, &bar0->rts_qos_steering);
1630 break;
1631 case 6:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001632 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001633 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001634 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001635 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001636 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001637 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001638 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001639 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001640 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001641 writeq(val64, &bar0->rx_w_round_robin_4);
1642
1643 val64 = 0x8080404020100804ULL;
1644 writeq(val64, &bar0->rts_qos_steering);
1645 break;
1646 case 7:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001647 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001648 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001649 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001650 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001651 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001652 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001653 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001654 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001655 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001656 writeq(val64, &bar0->rx_w_round_robin_4);
1657
1658 val64 = 0x8080402010080402ULL;
1659 writeq(val64, &bar0->rts_qos_steering);
1660 break;
1661 case 8:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001662 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001663 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001664 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001665 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001666 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001667 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001668 writeq(val64, &bar0->rx_w_round_robin_4);
1669
1670 val64 = 0x8040201008040201ULL;
1671 writeq(val64, &bar0->rts_qos_steering);
1672 break;
1673 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001674
1675 /* UDP Fix */
1676 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001677 for (i = 0; i < 8; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001678 writeq(val64, &bar0->rts_frm_len_n[i]);
1679
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001680 /* Set the default rts frame length for the rings configured */
1681 val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
1682 for (i = 0 ; i < config->rx_ring_num ; i++)
1683 writeq(val64, &bar0->rts_frm_len_n[i]);
1684
1685 /* Set the frame length for the configured rings
1686 * desired by the user
1687 */
1688 for (i = 0; i < config->rx_ring_num; i++) {
1689 /* If rts_frm_len[i] == 0 then it is assumed that user not
1690 * specified frame length steering.
1691 * If the user provides the frame length then program
1692 * the rts_frm_len register for those values or else
1693 * leave it as it is.
1694 */
1695 if (rts_frm_len[i] != 0) {
1696 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
Joe Perchesd44570e2009-08-24 17:29:44 +00001697 &bar0->rts_frm_len_n[i]);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001698 }
1699 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001700
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001701 /* Disable differentiated services steering logic */
1702 for (i = 0; i < 64; i++) {
1703 if (rts_ds_steer(nic, i, 0) == FAILURE) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00001704 DBG_PRINT(ERR_DBG,
1705 "%s: rts_ds_steer failed on codepoint %d\n",
1706 dev->name, i);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001707 return -ENODEV;
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001708 }
1709 }
1710
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001711 /* Program statistics memory */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001712 writeq(mac_control->stats_mem_phy, &bar0->stat_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001713
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001714 if (nic->device_type == XFRAME_II_DEVICE) {
1715 val64 = STAT_BC(0x320);
1716 writeq(val64, &bar0->stat_byte_cnt);
1717 }
1718
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001719 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720 * Initializing the sampling rate for the device to calculate the
1721 * bandwidth utilization.
1722 */
1723 val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001724 MAC_RX_LINK_UTIL_VAL(rmac_util_period);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001725 writeq(val64, &bar0->mac_link_util);
1726
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001727 /*
1728 * Initializing the Transmit and Receive Traffic Interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001729 * Scheme.
1730 */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001731
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001732 /* Initialize TTI */
1733 if (SUCCESS != init_tti(nic, nic->last_link_state))
1734 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001735
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001736 /* RTI Initialization */
1737 if (nic->device_type == XFRAME_II_DEVICE) {
1738 /*
1739 * Programmed to generate Apprx 500 Intrs per
1740 * second
1741 */
1742 int count = (nic->config.bus_speed * 125)/4;
1743 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
1744 } else
1745 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
1746 val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001747 RTI_DATA1_MEM_RX_URNG_B(0x10) |
1748 RTI_DATA1_MEM_RX_URNG_C(0x30) |
1749 RTI_DATA1_MEM_RX_TIMER_AC_EN;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001750
1751 writeq(val64, &bar0->rti_data1_mem);
1752
1753 val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
1754 RTI_DATA2_MEM_RX_UFC_B(0x2) ;
1755 if (nic->config.intr_type == MSI_X)
Joe Perchesd44570e2009-08-24 17:29:44 +00001756 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) |
1757 RTI_DATA2_MEM_RX_UFC_D(0x40));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001758 else
Joe Perchesd44570e2009-08-24 17:29:44 +00001759 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) |
1760 RTI_DATA2_MEM_RX_UFC_D(0x80));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001761 writeq(val64, &bar0->rti_data2_mem);
1762
1763 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001764 val64 = RTI_CMD_MEM_WE |
1765 RTI_CMD_MEM_STROBE_NEW_CMD |
1766 RTI_CMD_MEM_OFFSET(i);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001767 writeq(val64, &bar0->rti_command_mem);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001768
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001769 /*
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001770 * Once the operation completes, the Strobe bit of the
1771 * command register will be reset. We poll for this
1772 * particular condition. We wait for a maximum of 500ms
1773 * for the operation to complete, if it's not complete
1774 * by then we return error.
1775 */
1776 time = 0;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00001777 while (true) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001778 val64 = readq(&bar0->rti_command_mem);
1779 if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
1780 break;
1781
1782 if (time > 10) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00001783 DBG_PRINT(ERR_DBG, "%s: RTI init failed\n",
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001784 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001785 return -ENODEV;
raghavendra.koushik@neterion.comb6e3f982005-08-03 12:38:01 -07001786 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001787 time++;
1788 msleep(50);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001789 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001790 }
1791
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001792 /*
1793 * Initializing proper values as Pause threshold into all
Linus Torvalds1da177e2005-04-16 15:20:36 -07001794 * the 8 Queues on Rx side.
1795 */
1796 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
1797 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);
1798
1799 /* Disable RMAC PAD STRIPPING */
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01001800 add = &bar0->mac_cfg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001801 val64 = readq(&bar0->mac_cfg);
1802 val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
1803 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1804 writel((u32) (val64), add);
1805 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1806 writel((u32) (val64 >> 32), (add + 4));
1807 val64 = readq(&bar0->mac_cfg);
1808
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05001809 /* Enable FCS stripping by adapter */
1810 add = &bar0->mac_cfg;
1811 val64 = readq(&bar0->mac_cfg);
1812 val64 |= MAC_CFG_RMAC_STRIP_FCS;
1813 if (nic->device_type == XFRAME_II_DEVICE)
1814 writeq(val64, &bar0->mac_cfg);
1815 else {
1816 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1817 writel((u32) (val64), add);
1818 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1819 writel((u32) (val64 >> 32), (add + 4));
1820 }
1821
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001822 /*
1823 * Set the time value to be inserted in the pause frame
Linus Torvalds1da177e2005-04-16 15:20:36 -07001824 * generated by xena.
1825 */
1826 val64 = readq(&bar0->rmac_pause_cfg);
1827 val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
1828 val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
1829 writeq(val64, &bar0->rmac_pause_cfg);
1830
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001831 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001832 * Set the Threshold Limit for Generating the pause frame
1833 * If the amount of data in any Queue exceeds ratio of
1834 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
1835 * pause frame is generated
1836 */
1837 val64 = 0;
1838 for (i = 0; i < 4; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001839 val64 |= (((u64)0xFF00 |
1840 nic->mac_control.mc_pause_threshold_q0q3)
1841 << (i * 2 * 8));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842 }
1843 writeq(val64, &bar0->mc_pause_thresh_q0q3);
1844
1845 val64 = 0;
1846 for (i = 0; i < 4; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001847 val64 |= (((u64)0xFF00 |
1848 nic->mac_control.mc_pause_threshold_q4q7)
1849 << (i * 2 * 8));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001850 }
1851 writeq(val64, &bar0->mc_pause_thresh_q4q7);
1852
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001853 /*
1854 * TxDMA will stop Read request if the number of read split has
Linus Torvalds1da177e2005-04-16 15:20:36 -07001855 * exceeded the limit pointed by shared_splits
1856 */
1857 val64 = readq(&bar0->pic_control);
1858 val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
1859 writeq(val64, &bar0->pic_control);
1860
Ananda Raju863c11a2006-04-21 19:03:13 -04001861 if (nic->config.bus_speed == 266) {
1862 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
1863 writeq(0x0, &bar0->read_retry_delay);
1864 writeq(0x0, &bar0->write_retry_delay);
1865 }
1866
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001867 /*
1868 * Programming the Herc to split every write transaction
1869 * that does not start on an ADB to reduce disconnects.
1870 */
1871 if (nic->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05001872 val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
1873 MISC_LINK_STABILITY_PRD(3);
Ananda Raju863c11a2006-04-21 19:03:13 -04001874 writeq(val64, &bar0->misc_control);
1875 val64 = readq(&bar0->pic_control2);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07001876 val64 &= ~(s2BIT(13)|s2BIT(14)|s2BIT(15));
Ananda Raju863c11a2006-04-21 19:03:13 -04001877 writeq(val64, &bar0->pic_control2);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001878 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001879 if (strstr(nic->product_name, "CX4")) {
1880 val64 = TMAC_AVG_IPG(0x17);
1881 writeq(val64, &bar0->tmac_avg_ipg);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001882 }
1883
Linus Torvalds1da177e2005-04-16 15:20:36 -07001884 return SUCCESS;
1885}
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001886#define LINK_UP_DOWN_INTERRUPT 1
1887#define MAC_RMAC_ERR_TIMER 2
1888
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001889static int s2io_link_fault_indication(struct s2io_nic *nic)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001890{
1891 if (nic->device_type == XFRAME_II_DEVICE)
1892 return LINK_UP_DOWN_INTERRUPT;
1893 else
1894 return MAC_RMAC_ERR_TIMER;
1895}
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07001896
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001897/**
1898 * do_s2io_write_bits - update alarm bits in alarm register
1899 * @value: alarm bits
1900 * @flag: interrupt status
1901 * @addr: address value
1902 * Description: update alarm bits in alarm register
1903 * Return Value:
1904 * NONE.
1905 */
1906static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
1907{
1908 u64 temp64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001909
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001910 temp64 = readq(addr);
1911
Joe Perchesd44570e2009-08-24 17:29:44 +00001912 if (flag == ENABLE_INTRS)
1913 temp64 &= ~((u64)value);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001914 else
Joe Perchesd44570e2009-08-24 17:29:44 +00001915 temp64 |= ((u64)value);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001916 writeq(temp64, addr);
1917}
1918
Stephen Hemminger43b7c452007-10-05 12:39:21 -07001919static void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001920{
1921 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1922 register u64 gen_int_mask = 0;
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001923 u64 interruptible;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001924
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001925 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001926 if (mask & TX_DMA_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001927 gen_int_mask |= TXDMA_INT_M;
1928
1929 do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
Joe Perchesd44570e2009-08-24 17:29:44 +00001930 TXDMA_PCC_INT | TXDMA_TTI_INT |
1931 TXDMA_LSO_INT | TXDMA_TPA_INT |
1932 TXDMA_SM_INT, flag, &bar0->txdma_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001933
1934 do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00001935 PFC_MISC_0_ERR | PFC_MISC_1_ERR |
1936 PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
1937 &bar0->pfc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001938
1939 do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00001940 TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
1941 TDA_PCIX_ERR, flag, &bar0->tda_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001942
1943 do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001944 PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
1945 PCC_N_SERR | PCC_6_COF_OV_ERR |
1946 PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
1947 PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
1948 PCC_TXB_ECC_SG_ERR,
1949 flag, &bar0->pcc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001950
1951 do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001952 TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001953
1954 do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
Joe Perchesd44570e2009-08-24 17:29:44 +00001955 LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
1956 LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
1957 flag, &bar0->lso_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001958
1959 do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
Joe Perchesd44570e2009-08-24 17:29:44 +00001960 flag, &bar0->tpa_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001961
1962 do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001963 }
1964
1965 if (mask & TX_MAC_INTR) {
1966 gen_int_mask |= TXMAC_INT_M;
1967 do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001968 &bar0->mac_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001969 do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001970 TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
1971 TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
1972 flag, &bar0->mac_tmac_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001973 }
1974
1975 if (mask & TX_XGXS_INTR) {
1976 gen_int_mask |= TXXGXS_INT_M;
1977 do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001978 &bar0->xgxs_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001979 do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001980 TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
1981 flag, &bar0->xgxs_txgxs_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001982 }
1983
1984 if (mask & RX_DMA_INTR) {
1985 gen_int_mask |= RXDMA_INT_M;
1986 do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
Joe Perchesd44570e2009-08-24 17:29:44 +00001987 RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
1988 flag, &bar0->rxdma_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001989 do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001990 RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
1991 RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
1992 RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001993 do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
Joe Perchesd44570e2009-08-24 17:29:44 +00001994 PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
1995 PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
1996 &bar0->prc_pcix_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001997 do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001998 RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
1999 &bar0->rpa_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002000 do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00002001 RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
2002 RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
2003 RDA_FRM_ECC_SG_ERR |
2004 RDA_MISC_ERR|RDA_PCIX_ERR,
2005 flag, &bar0->rda_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002006 do_s2io_write_bits(RTI_SM_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00002007 RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
2008 flag, &bar0->rti_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002009 }
2010
2011 if (mask & RX_MAC_INTR) {
2012 gen_int_mask |= RXMAC_INT_M;
2013 do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002014 &bar0->mac_int_mask);
2015 interruptible = (RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
2016 RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
2017 RMAC_DOUBLE_ECC_ERR);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04002018 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER)
2019 interruptible |= RMAC_LINK_STATE_CHANGE_INT;
2020 do_s2io_write_bits(interruptible,
Joe Perchesd44570e2009-08-24 17:29:44 +00002021 flag, &bar0->mac_rmac_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002022 }
2023
Joe Perchesd44570e2009-08-24 17:29:44 +00002024 if (mask & RX_XGXS_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002025 gen_int_mask |= RXXGXS_INT_M;
2026 do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002027 &bar0->xgxs_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002028 do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002029 &bar0->xgxs_rxgxs_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002030 }
2031
2032 if (mask & MC_INTR) {
2033 gen_int_mask |= MC_INT_M;
Joe Perchesd44570e2009-08-24 17:29:44 +00002034 do_s2io_write_bits(MC_INT_MASK_MC_INT,
2035 flag, &bar0->mc_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002036 do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
Joe Perchesd44570e2009-08-24 17:29:44 +00002037 MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
2038 &bar0->mc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002039 }
2040 nic->general_int_mask = gen_int_mask;
2041
2042 /* Remove this line when alarm interrupts are enabled */
2043 nic->general_int_mask = 0;
2044}
Joe Perchesd44570e2009-08-24 17:29:44 +00002045
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002046/**
2047 * en_dis_able_nic_intrs - Enable or Disable the interrupts
Linus Torvalds1da177e2005-04-16 15:20:36 -07002048 * @nic: device private variable,
2049 * @mask: A mask indicating which Intr block must be modified and,
2050 * @flag: A flag indicating whether to enable or disable the Intrs.
2051 * Description: This function will either disable or enable the interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002052 * depending on the flag argument. The mask argument can be used to
2053 * enable/disable any Intr block.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002054 * Return Value: NONE.
2055 */
2056
2057static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
2058{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002059 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002060 register u64 temp64 = 0, intr_mask = 0;
2061
2062 intr_mask = nic->general_int_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002063
2064 /* Top level interrupt classification */
2065 /* PIC Interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002066 if (mask & TX_PIC_INTR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002067 /* Enable PIC Intrs in the general intr mask register */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002068 intr_mask |= TXPIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002069 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002070 /*
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002071 * If Hercules adapter enable GPIO otherwise
Ananda Rajub41477f2006-07-24 19:52:49 -04002072 * disable all PCIX, Flash, MDIO, IIC and GPIO
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002073 * interrupts for now.
2074 * TODO
Linus Torvalds1da177e2005-04-16 15:20:36 -07002075 */
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002076 if (s2io_link_fault_indication(nic) ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002077 LINK_UP_DOWN_INTERRUPT) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002078 do_s2io_write_bits(PIC_INT_GPIO, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002079 &bar0->pic_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002080 do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002081 &bar0->gpio_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002082 } else
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002083 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002084 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002085 /*
2086 * Disable PIC Intrs in the general
2087 * intr mask register
Linus Torvalds1da177e2005-04-16 15:20:36 -07002088 */
2089 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002090 }
2091 }
2092
Linus Torvalds1da177e2005-04-16 15:20:36 -07002093 /* Tx traffic interrupts */
2094 if (mask & TX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002095 intr_mask |= TXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002096 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002097 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002098 * Enable all the Tx side interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002099 * writing 0 Enables all 64 TX interrupt levels
Linus Torvalds1da177e2005-04-16 15:20:36 -07002100 */
2101 writeq(0x0, &bar0->tx_traffic_mask);
2102 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002103 /*
2104 * Disable Tx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002105 * register.
2106 */
2107 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002108 }
2109 }
2110
2111 /* Rx traffic interrupts */
2112 if (mask & RX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002113 intr_mask |= RXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002114 if (flag == ENABLE_INTRS) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002115 /* writing 0 Enables all 8 RX interrupt levels */
2116 writeq(0x0, &bar0->rx_traffic_mask);
2117 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002118 /*
2119 * Disable Rx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002120 * register.
2121 */
2122 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002123 }
2124 }
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002125
2126 temp64 = readq(&bar0->general_int_mask);
2127 if (flag == ENABLE_INTRS)
Joe Perchesd44570e2009-08-24 17:29:44 +00002128 temp64 &= ~((u64)intr_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002129 else
2130 temp64 = DISABLE_ALL_INTRS;
2131 writeq(temp64, &bar0->general_int_mask);
2132
2133 nic->general_int_mask = readq(&bar0->general_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002134}
2135
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002136/**
2137 * verify_pcc_quiescent- Checks for PCC quiescent state
2138 * Return: 1 If PCC is quiescence
2139 * 0 If PCC is not quiescence
2140 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002141static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002142{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002143 int ret = 0, herc;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002144 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002145 u64 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002146
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002147 herc = (sp->device_type == XFRAME_II_DEVICE);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002148
Tobias Klauserf957bcf2009-06-04 23:07:59 +00002149 if (flag == false) {
Auke Kok44c10132007-06-08 15:46:36 -07002150 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002151 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002152 ret = 1;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002153 } else {
2154 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002155 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002156 }
2157 } else {
Auke Kok44c10132007-06-08 15:46:36 -07002158 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002159 if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002160 ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002161 ret = 1;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002162 } else {
2163 if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002164 ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002165 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002166 }
2167 }
2168
2169 return ret;
2170}
2171/**
2172 * verify_xena_quiescence - Checks whether the H/W is ready
Linus Torvalds1da177e2005-04-16 15:20:36 -07002173 * Description: Returns whether the H/W is ready to go or not. Depending
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002174 * on whether adapter enable bit was written or not the comparison
Linus Torvalds1da177e2005-04-16 15:20:36 -07002175 * differs and the calling function passes the input argument flag to
2176 * indicate this.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002177 * Return: 1 If xena is quiescence
Linus Torvalds1da177e2005-04-16 15:20:36 -07002178 * 0 If Xena is not quiescence
2179 */
2180
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002181static int verify_xena_quiescence(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002182{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002183 int mode;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002184 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002185 u64 val64 = readq(&bar0->adapter_status);
2186 mode = s2io_verify_pci_mode(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002187
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002188 if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002189 DBG_PRINT(ERR_DBG, "TDMA is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002190 return 0;
2191 }
2192 if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002193 DBG_PRINT(ERR_DBG, "RDMA is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002194 return 0;
2195 }
2196 if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002197 DBG_PRINT(ERR_DBG, "PFC is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002198 return 0;
2199 }
2200 if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002201 DBG_PRINT(ERR_DBG, "TMAC BUF is not empty!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002202 return 0;
2203 }
2204 if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002205 DBG_PRINT(ERR_DBG, "PIC is not QUIESCENT!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002206 return 0;
2207 }
2208 if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002209 DBG_PRINT(ERR_DBG, "MC_DRAM is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002210 return 0;
2211 }
2212 if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002213 DBG_PRINT(ERR_DBG, "MC_QUEUES is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002214 return 0;
2215 }
2216 if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002217 DBG_PRINT(ERR_DBG, "M_PLL is not locked!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002218 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002219 }
2220
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002221 /*
2222 * In PCI 33 mode, the P_PLL is not used, and therefore,
2223 * the the P_PLL_LOCK bit in the adapter_status register will
2224 * not be asserted.
2225 */
2226 if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002227 sp->device_type == XFRAME_II_DEVICE &&
2228 mode != PCI_MODE_PCI_33) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002229 DBG_PRINT(ERR_DBG, "P_PLL is not locked!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002230 return 0;
2231 }
2232 if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002233 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002234 DBG_PRINT(ERR_DBG, "RC_PRC is not QUIESCENT!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002235 return 0;
2236 }
2237 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002238}
2239
2240/**
2241 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
2242 * @sp: Pointer to device specifc structure
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002243 * Description :
Linus Torvalds1da177e2005-04-16 15:20:36 -07002244 * New procedure to clear mac address reading problems on Alpha platforms
2245 *
2246 */
2247
Joe Perchesd44570e2009-08-24 17:29:44 +00002248static void fix_mac_address(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002249{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002250 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002251 u64 val64;
2252 int i = 0;
2253
2254 while (fix_mac[i] != END_SIGN) {
2255 writeq(fix_mac[i++], &bar0->gpio_control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002256 udelay(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002257 val64 = readq(&bar0->gpio_control);
2258 }
2259}
2260
2261/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002262 * start_nic - Turns the device on
Linus Torvalds1da177e2005-04-16 15:20:36 -07002263 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002264 * Description:
2265 * This function actually turns the device on. Before this function is
2266 * called,all Registers are configured from their reset states
2267 * and shared memory is allocated but the NIC is still quiescent. On
Linus Torvalds1da177e2005-04-16 15:20:36 -07002268 * calling this function, the device interrupts are cleared and the NIC is
2269 * literally switched on by writing into the adapter control register.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002270 * Return Value:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002271 * SUCCESS on success and -1 on failure.
2272 */
2273
2274static int start_nic(struct s2io_nic *nic)
2275{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002276 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002277 struct net_device *dev = nic->dev;
2278 register u64 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002279 u16 subid, i;
Joe Perchesffb5df62009-08-24 17:29:47 +00002280 struct config_param *config = &nic->config;
2281 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002282
2283 /* PRC Initialization and configuration */
2284 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002285 struct ring_info *ring = &mac_control->rings[i];
2286
Joe Perchesd44570e2009-08-24 17:29:44 +00002287 writeq((u64)ring->rx_blocks[0].block_dma_addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002288 &bar0->prc_rxd0_n[i]);
2289
2290 val64 = readq(&bar0->prc_ctrl_n[i]);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002291 if (nic->rxd_mode == RXD_MODE_1)
2292 val64 |= PRC_CTRL_RC_ENABLED;
2293 else
2294 val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
Ananda Raju863c11a2006-04-21 19:03:13 -04002295 if (nic->device_type == XFRAME_II_DEVICE)
2296 val64 |= PRC_CTRL_GROUP_READS;
2297 val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
2298 val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002299 writeq(val64, &bar0->prc_ctrl_n[i]);
2300 }
2301
Ananda Rajuda6971d2005-10-31 16:55:31 -05002302 if (nic->rxd_mode == RXD_MODE_3B) {
2303 /* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
2304 val64 = readq(&bar0->rx_pa_cfg);
2305 val64 |= RX_PA_CFG_IGNORE_L2_ERR;
2306 writeq(val64, &bar0->rx_pa_cfg);
2307 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002308
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002309 if (vlan_tag_strip == 0) {
2310 val64 = readq(&bar0->rx_pa_cfg);
2311 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
2312 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03002313 nic->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002314 }
2315
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002316 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002317 * Enabling MC-RLDRAM. After enabling the device, we timeout
2318 * for around 100ms, which is approximately the time required
2319 * for the device to be ready for operation.
2320 */
2321 val64 = readq(&bar0->mc_rldram_mrs);
2322 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
2323 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
2324 val64 = readq(&bar0->mc_rldram_mrs);
2325
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002326 msleep(100); /* Delay by around 100 ms. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002327
2328 /* Enabling ECC Protection. */
2329 val64 = readq(&bar0->adapter_control);
2330 val64 &= ~ADAPTER_ECC_EN;
2331 writeq(val64, &bar0->adapter_control);
2332
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002333 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002334 * Verify if the device is ready to be enabled, if so enable
Linus Torvalds1da177e2005-04-16 15:20:36 -07002335 * it.
2336 */
2337 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002338 if (!verify_xena_quiescence(nic)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002339 DBG_PRINT(ERR_DBG, "%s: device is not ready, "
2340 "Adapter status reads: 0x%llx\n",
2341 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002342 return FAILURE;
2343 }
2344
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002345 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002346 * With some switches, link might be already up at this point.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002347 * Because of this weird behavior, when we enable laser,
2348 * we may not get link. We need to handle this. We cannot
2349 * figure out which switch is misbehaving. So we are forced to
2350 * make a global change.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002351 */
2352
2353 /* Enabling Laser. */
2354 val64 = readq(&bar0->adapter_control);
2355 val64 |= ADAPTER_EOI_TX_ON;
2356 writeq(val64, &bar0->adapter_control);
2357
Ananda Rajuc92ca042006-04-21 19:18:03 -04002358 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
2359 /*
2360 * Dont see link state interrupts initally on some switches,
2361 * so directly scheduling the link state task here.
2362 */
2363 schedule_work(&nic->set_link_task);
2364 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002365 /* SXE-002: Initialize link and activity LED */
2366 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07002367 if (((subid & 0xFF) >= 0x07) &&
2368 (nic->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002369 val64 = readq(&bar0->gpio_control);
2370 val64 |= 0x0000800000000000ULL;
2371 writeq(val64, &bar0->gpio_control);
2372 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01002373 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002374 }
2375
Linus Torvalds1da177e2005-04-16 15:20:36 -07002376 return SUCCESS;
2377}
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002378/**
2379 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2380 */
Joe Perchesd44570e2009-08-24 17:29:44 +00002381static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data,
2382 struct TxD *txdlp, int get_off)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002383{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002384 struct s2io_nic *nic = fifo_data->nic;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002385 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002386 struct TxD *txds;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002387 u16 j, frg_cnt;
2388
2389 txds = txdlp;
Surjit Reang2fda0962008-01-24 02:08:59 -08002390 if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002391 pci_unmap_single(nic->pdev, (dma_addr_t)txds->Buffer_Pointer,
2392 sizeof(u64), PCI_DMA_TODEVICE);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002393 txds++;
2394 }
2395
Joe Perchesd44570e2009-08-24 17:29:44 +00002396 skb = (struct sk_buff *)((unsigned long)txds->Host_Control);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002397 if (!skb) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002398 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002399 return NULL;
2400 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002401 pci_unmap_single(nic->pdev, (dma_addr_t)txds->Buffer_Pointer,
2402 skb->len - skb->data_len, PCI_DMA_TODEVICE);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002403 frg_cnt = skb_shinfo(skb)->nr_frags;
2404 if (frg_cnt) {
2405 txds++;
2406 for (j = 0; j < frg_cnt; j++, txds++) {
2407 skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
2408 if (!txds->Buffer_Pointer)
2409 break;
Joe Perchesd44570e2009-08-24 17:29:44 +00002410 pci_unmap_page(nic->pdev,
2411 (dma_addr_t)txds->Buffer_Pointer,
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002412 frag->size, PCI_DMA_TODEVICE);
2413 }
2414 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002415 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
2416 return skb;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002417}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002418
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002419/**
2420 * free_tx_buffers - Free all queued Tx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002421 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002422 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002423 * Free all queued Tx buffers.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002424 * Return Value: void
Joe Perchesd44570e2009-08-24 17:29:44 +00002425 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002426
2427static void free_tx_buffers(struct s2io_nic *nic)
2428{
2429 struct net_device *dev = nic->dev;
2430 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002431 struct TxD *txdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002432 int i, j;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002433 int cnt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00002434 struct config_param *config = &nic->config;
2435 struct mac_info *mac_control = &nic->mac_control;
2436 struct stat_block *stats = mac_control->stats_info;
2437 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002438
2439 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002440 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
2441 struct fifo_info *fifo = &mac_control->fifos[i];
Surjit Reang2fda0962008-01-24 02:08:59 -08002442 unsigned long flags;
Joe Perches13d866a2009-08-24 17:29:41 +00002443
2444 spin_lock_irqsave(&fifo->tx_lock, flags);
2445 for (j = 0; j < tx_cfg->fifo_len; j++) {
2446 txdp = (struct TxD *)fifo->list_info[j].list_virt_addr;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002447 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
2448 if (skb) {
Joe Perchesffb5df62009-08-24 17:29:47 +00002449 swstats->mem_freed += skb->truesize;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002450 dev_kfree_skb(skb);
2451 cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002452 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002453 }
2454 DBG_PRINT(INTR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00002455 "%s: forcibly freeing %d skbs on FIFO%d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002456 dev->name, cnt, i);
Joe Perches13d866a2009-08-24 17:29:41 +00002457 fifo->tx_curr_get_info.offset = 0;
2458 fifo->tx_curr_put_info.offset = 0;
2459 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002460 }
2461}
2462
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002463/**
2464 * stop_nic - To stop the nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07002465 * @nic ; device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002466 * Description:
2467 * This function does exactly the opposite of what the start_nic()
Linus Torvalds1da177e2005-04-16 15:20:36 -07002468 * function does. This function is called to stop the device.
2469 * Return Value:
2470 * void.
2471 */
2472
2473static void stop_nic(struct s2io_nic *nic)
2474{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002475 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002476 register u64 val64 = 0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04002477 u16 interruptible;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002478
2479 /* Disable all interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002480 en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07002481 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002482 interruptible |= TX_PIC_INTR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002483 en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);
2484
Ananda Raju5d3213c2006-04-21 19:23:26 -04002485 /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
2486 val64 = readq(&bar0->adapter_control);
2487 val64 &= ~(ADAPTER_CNTL_EN);
2488 writeq(val64, &bar0->adapter_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002489}
2490
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002491/**
2492 * fill_rx_buffers - Allocates the Rx side skbs
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002493 * @ring_info: per ring structure
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002494 * @from_card_up: If this is true, we will map the buffer to get
2495 * the dma address for buf0 and buf1 to give it to the card.
2496 * Else we will sync the already mapped buffer to give it to the card.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002497 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002498 * The function allocates Rx side skbs and puts the physical
2499 * address of these buffers into the RxD buffer pointers, so that the NIC
2500 * can DMA the received frame into these locations.
2501 * The NIC supports 3 receive modes, viz
2502 * 1. single buffer,
2503 * 2. three buffer and
2504 * 3. Five buffer modes.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002505 * Each mode defines how many fragments the received frame will be split
2506 * up into by the NIC. The frame is split into L3 header, L4 Header,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507 * L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
2508 * is split into 3 fragments. As of now only single buffer mode is
2509 * supported.
2510 * Return Value:
2511 * SUCCESS on success or an appropriate -ve value on failure.
2512 */
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002513static int fill_rx_buffers(struct s2io_nic *nic, struct ring_info *ring,
Joe Perchesd44570e2009-08-24 17:29:44 +00002514 int from_card_up)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002515{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002516 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002517 struct RxD_t *rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002518 int off, size, block_no, block_no1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002519 u32 alloc_tab = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002520 u32 alloc_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002521 u64 tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002522 struct buffAdd *ba;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002523 struct RxD_t *first_rxdp = NULL;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002524 u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002525 int rxd_index = 0;
Veena Parat6d517a22007-07-23 02:20:51 -04002526 struct RxD1 *rxdp1;
2527 struct RxD3 *rxdp3;
Joe Perchesffb5df62009-08-24 17:29:47 +00002528 struct swStat *swstats = &ring->nic->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002529
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002530 alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002531
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002532 block_no1 = ring->rx_curr_get_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002533 while (alloc_tab < alloc_cnt) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002534 block_no = ring->rx_curr_put_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002535
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002536 off = ring->rx_curr_put_info.offset;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002537
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002538 rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr;
2539
2540 rxd_index = off + 1;
2541 if (block_no)
2542 rxd_index += (block_no * ring->rxd_count);
2543
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002544 if ((block_no == block_no1) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002545 (off == ring->rx_curr_get_info.offset) &&
2546 (rxdp->Host_Control)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002547 DBG_PRINT(INTR_DBG, "%s: Get and Put info equated\n",
2548 ring->dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002549 goto end;
2550 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002551 if (off && (off == ring->rxd_count)) {
2552 ring->rx_curr_put_info.block_index++;
2553 if (ring->rx_curr_put_info.block_index ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002554 ring->block_count)
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002555 ring->rx_curr_put_info.block_index = 0;
2556 block_no = ring->rx_curr_put_info.block_index;
2557 off = 0;
2558 ring->rx_curr_put_info.offset = off;
2559 rxdp = ring->rx_blocks[block_no].block_virt_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002560 DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002561 ring->dev->name, rxdp);
2562
Linus Torvalds1da177e2005-04-16 15:20:36 -07002563 }
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002564
Ananda Rajuda6971d2005-10-31 16:55:31 -05002565 if ((rxdp->Control_1 & RXD_OWN_XENA) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002566 ((ring->rxd_mode == RXD_MODE_3B) &&
2567 (rxdp->Control_2 & s2BIT(0)))) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002568 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002569 goto end;
2570 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002571 /* calculate size of skb based on ring mode */
Joe Perchesd44570e2009-08-24 17:29:44 +00002572 size = ring->mtu +
2573 HEADER_ETHERNET_II_802_3_SIZE +
2574 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002575 if (ring->rxd_mode == RXD_MODE_1)
Ananda Rajuda6971d2005-10-31 16:55:31 -05002576 size += NET_IP_ALIGN;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002577 else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002578 size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002579
Ananda Rajuda6971d2005-10-31 16:55:31 -05002580 /* allocate skb */
2581 skb = dev_alloc_skb(size);
Joe Perchesd44570e2009-08-24 17:29:44 +00002582 if (!skb) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002583 DBG_PRINT(INFO_DBG, "%s: Could not allocate skb\n",
2584 ring->dev->name);
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002585 if (first_rxdp) {
2586 wmb();
2587 first_rxdp->Control_1 |= RXD_OWN_XENA;
2588 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002589 swstats->mem_alloc_fail_cnt++;
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002590
Ananda Rajuda6971d2005-10-31 16:55:31 -05002591 return -ENOMEM ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002592 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002593 swstats->mem_allocated += skb->truesize;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002594
2595 if (ring->rxd_mode == RXD_MODE_1) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002596 /* 1 buffer mode - normal operation mode */
Joe Perchesd44570e2009-08-24 17:29:44 +00002597 rxdp1 = (struct RxD1 *)rxdp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002598 memset(rxdp, 0, sizeof(struct RxD1));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002599 skb_reserve(skb, NET_IP_ALIGN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002600 rxdp1->Buffer0_ptr =
2601 pci_map_single(ring->pdev, skb->data,
2602 size - NET_IP_ALIGN,
2603 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002604 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002605 rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002606 goto pci_map_failed;
2607
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002608 rxdp->Control_2 =
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002609 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002610 rxdp->Host_Control = (unsigned long)skb;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002611 } else if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002612 /*
Veena Parat6d517a22007-07-23 02:20:51 -04002613 * 2 buffer mode -
2614 * 2 buffer mode provides 128
Ananda Rajuda6971d2005-10-31 16:55:31 -05002615 * byte aligned receive buffers.
Ananda Rajuda6971d2005-10-31 16:55:31 -05002616 */
2617
Joe Perchesd44570e2009-08-24 17:29:44 +00002618 rxdp3 = (struct RxD3 *)rxdp;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002619 /* save buffer pointers to avoid frequent dma mapping */
Veena Parat6d517a22007-07-23 02:20:51 -04002620 Buffer0_ptr = rxdp3->Buffer0_ptr;
2621 Buffer1_ptr = rxdp3->Buffer1_ptr;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002622 memset(rxdp, 0, sizeof(struct RxD3));
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002623 /* restore the buffer pointers for dma sync*/
Veena Parat6d517a22007-07-23 02:20:51 -04002624 rxdp3->Buffer0_ptr = Buffer0_ptr;
2625 rxdp3->Buffer1_ptr = Buffer1_ptr;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002626
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002627 ba = &ring->ba[block_no][off];
Ananda Rajuda6971d2005-10-31 16:55:31 -05002628 skb_reserve(skb, BUF0_LEN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002629 tmp = (u64)(unsigned long)skb->data;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002630 tmp += ALIGN_SIZE;
2631 tmp &= ~ALIGN_SIZE;
2632 skb->data = (void *) (unsigned long)tmp;
Arnaldo Carvalho de Melo27a884d2007-04-19 20:29:13 -07002633 skb_reset_tail_pointer(skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002634
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002635 if (from_card_up) {
Veena Parat6d517a22007-07-23 02:20:51 -04002636 rxdp3->Buffer0_ptr =
Joe Perchesd44570e2009-08-24 17:29:44 +00002637 pci_map_single(ring->pdev, ba->ba_0,
2638 BUF0_LEN,
2639 PCI_DMA_FROMDEVICE);
2640 if (pci_dma_mapping_error(nic->pdev,
2641 rxdp3->Buffer0_ptr))
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002642 goto pci_map_failed;
2643 } else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002644 pci_dma_sync_single_for_device(ring->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002645 (dma_addr_t)rxdp3->Buffer0_ptr,
2646 BUF0_LEN,
2647 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04002648
Ananda Rajuda6971d2005-10-31 16:55:31 -05002649 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002650 if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002651 /* Two buffer mode */
2652
2653 /*
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002654 * Buffer2 will have L3/L4 header plus
Ananda Rajuda6971d2005-10-31 16:55:31 -05002655 * L4 payload
2656 */
Joe Perchesd44570e2009-08-24 17:29:44 +00002657 rxdp3->Buffer2_ptr = pci_map_single(ring->pdev,
2658 skb->data,
2659 ring->mtu + 4,
2660 PCI_DMA_FROMDEVICE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002661
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002662 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002663 rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002664 goto pci_map_failed;
2665
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002666 if (from_card_up) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002667 rxdp3->Buffer1_ptr =
2668 pci_map_single(ring->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002669 ba->ba_1,
2670 BUF1_LEN,
2671 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002672
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002673 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002674 rxdp3->Buffer1_ptr)) {
2675 pci_unmap_single(ring->pdev,
2676 (dma_addr_t)(unsigned long)
2677 skb->data,
2678 ring->mtu + 4,
2679 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002680 goto pci_map_failed;
2681 }
Ananda Raju75c30b12006-07-24 19:55:09 -04002682 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002683 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
2684 rxdp->Control_2 |= SET_BUFFER2_SIZE_3
Joe Perchesd44570e2009-08-24 17:29:44 +00002685 (ring->mtu + 4);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002686 }
Jiri Slabyb7b5a122007-10-18 23:40:29 -07002687 rxdp->Control_2 |= s2BIT(0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002688 rxdp->Host_Control = (unsigned long) (skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002689 }
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002690 if (alloc_tab & ((1 << rxsync_frequency) - 1))
2691 rxdp->Control_1 |= RXD_OWN_XENA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002692 off++;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002693 if (off == (ring->rxd_count + 1))
Ananda Rajuda6971d2005-10-31 16:55:31 -05002694 off = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002695 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002696
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002697 rxdp->Control_2 |= SET_RXD_MARKER;
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002698 if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
2699 if (first_rxdp) {
2700 wmb();
2701 first_rxdp->Control_1 |= RXD_OWN_XENA;
2702 }
2703 first_rxdp = rxdp;
2704 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002705 ring->rx_bufs_left += 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002706 alloc_tab++;
2707 }
2708
Joe Perchesd44570e2009-08-24 17:29:44 +00002709end:
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002710 /* Transfer ownership of first descriptor to adapter just before
2711 * exiting. Before that, use memory barrier so that ownership
2712 * and other fields are seen by adapter correctly.
2713 */
2714 if (first_rxdp) {
2715 wmb();
2716 first_rxdp->Control_1 |= RXD_OWN_XENA;
2717 }
2718
Linus Torvalds1da177e2005-04-16 15:20:36 -07002719 return SUCCESS;
Joe Perchesd44570e2009-08-24 17:29:44 +00002720
Veena Parat491abf22007-07-23 02:37:14 -04002721pci_map_failed:
Joe Perchesffb5df62009-08-24 17:29:47 +00002722 swstats->pci_map_fail_cnt++;
2723 swstats->mem_freed += skb->truesize;
Veena Parat491abf22007-07-23 02:37:14 -04002724 dev_kfree_skb_irq(skb);
2725 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002726}
2727
Ananda Rajuda6971d2005-10-31 16:55:31 -05002728static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
2729{
2730 struct net_device *dev = sp->dev;
2731 int j;
2732 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002733 struct RxD_t *rxdp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002734 struct buffAdd *ba;
Veena Parat6d517a22007-07-23 02:20:51 -04002735 struct RxD1 *rxdp1;
2736 struct RxD3 *rxdp3;
Joe Perchesffb5df62009-08-24 17:29:47 +00002737 struct mac_info *mac_control = &sp->mac_control;
2738 struct stat_block *stats = mac_control->stats_info;
2739 struct swStat *swstats = &stats->sw_stat;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002740
Ananda Rajuda6971d2005-10-31 16:55:31 -05002741 for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
2742 rxdp = mac_control->rings[ring_no].
Joe Perchesd44570e2009-08-24 17:29:44 +00002743 rx_blocks[blk].rxds[j].virt_addr;
2744 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control);
2745 if (!skb)
Ananda Rajuda6971d2005-10-31 16:55:31 -05002746 continue;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002747 if (sp->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002748 rxdp1 = (struct RxD1 *)rxdp;
2749 pci_unmap_single(sp->pdev,
2750 (dma_addr_t)rxdp1->Buffer0_ptr,
2751 dev->mtu +
2752 HEADER_ETHERNET_II_802_3_SIZE +
2753 HEADER_802_2_SIZE + HEADER_SNAP_SIZE,
2754 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002755 memset(rxdp, 0, sizeof(struct RxD1));
Joe Perchesd44570e2009-08-24 17:29:44 +00002756 } else if (sp->rxd_mode == RXD_MODE_3B) {
2757 rxdp3 = (struct RxD3 *)rxdp;
2758 ba = &mac_control->rings[ring_no].ba[blk][j];
2759 pci_unmap_single(sp->pdev,
2760 (dma_addr_t)rxdp3->Buffer0_ptr,
2761 BUF0_LEN,
2762 PCI_DMA_FROMDEVICE);
2763 pci_unmap_single(sp->pdev,
2764 (dma_addr_t)rxdp3->Buffer1_ptr,
2765 BUF1_LEN,
2766 PCI_DMA_FROMDEVICE);
2767 pci_unmap_single(sp->pdev,
2768 (dma_addr_t)rxdp3->Buffer2_ptr,
2769 dev->mtu + 4,
2770 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002771 memset(rxdp, 0, sizeof(struct RxD3));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002772 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002773 swstats->mem_freed += skb->truesize;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002774 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002775 mac_control->rings[ring_no].rx_bufs_left -= 1;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002776 }
2777}
2778
Linus Torvalds1da177e2005-04-16 15:20:36 -07002779/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002780 * free_rx_buffers - Frees all Rx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002781 * @sp: device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002782 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002783 * This function will free all Rx buffers allocated by host.
2784 * Return Value:
2785 * NONE.
2786 */
2787
2788static void free_rx_buffers(struct s2io_nic *sp)
2789{
2790 struct net_device *dev = sp->dev;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002791 int i, blk = 0, buf_cnt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00002792 struct config_param *config = &sp->config;
2793 struct mac_info *mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002794
2795 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002796 struct ring_info *ring = &mac_control->rings[i];
2797
Ananda Rajuda6971d2005-10-31 16:55:31 -05002798 for (blk = 0; blk < rx_ring_sz[i]; blk++)
Joe Perchesd44570e2009-08-24 17:29:44 +00002799 free_rxd_blk(sp, i, blk);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002800
Joe Perches13d866a2009-08-24 17:29:41 +00002801 ring->rx_curr_put_info.block_index = 0;
2802 ring->rx_curr_get_info.block_index = 0;
2803 ring->rx_curr_put_info.offset = 0;
2804 ring->rx_curr_get_info.offset = 0;
2805 ring->rx_bufs_left = 0;
Joe Perches9e39f7c2009-08-25 08:52:00 +00002806 DBG_PRINT(INIT_DBG, "%s: Freed 0x%x Rx Buffers on ring%d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002807 dev->name, buf_cnt, i);
2808 }
2809}
2810
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002811static int s2io_chk_rx_buffers(struct s2io_nic *nic, struct ring_info *ring)
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002812{
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002813 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002814 DBG_PRINT(INFO_DBG, "%s: Out of memory in Rx Intr!!\n",
2815 ring->dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002816 }
2817 return 0;
2818}
2819
Linus Torvalds1da177e2005-04-16 15:20:36 -07002820/**
2821 * s2io_poll - Rx interrupt handler for NAPI support
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002822 * @napi : pointer to the napi structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002823 * @budget : The number of packets that were budgeted to be processed
Linus Torvalds1da177e2005-04-16 15:20:36 -07002824 * during one pass through the 'Poll" function.
2825 * Description:
2826 * Comes into picture only if NAPI support has been incorporated. It does
2827 * the same thing that rx_intr_handler does, but not in a interrupt context
2828 * also It will process only a given number of packets.
2829 * Return value:
2830 * 0 on success and 1 if there are No Rx packets to be processed.
2831 */
2832
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002833static int s2io_poll_msix(struct napi_struct *napi, int budget)
2834{
2835 struct ring_info *ring = container_of(napi, struct ring_info, napi);
2836 struct net_device *dev = ring->dev;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002837 int pkts_processed = 0;
Al Viro1a79d1c2008-06-02 10:59:02 +01002838 u8 __iomem *addr = NULL;
2839 u8 val8 = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08002840 struct s2io_nic *nic = netdev_priv(dev);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002841 struct XENA_dev_config __iomem *bar0 = nic->bar0;
2842 int budget_org = budget;
2843
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002844 if (unlikely(!is_s2io_card_up(nic)))
2845 return 0;
2846
2847 pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002848 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002849
2850 if (pkts_processed < budget_org) {
Ben Hutchings288379f2009-01-19 16:43:59 -08002851 napi_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002852 /*Re Enable MSI-Rx Vector*/
Al Viro1a79d1c2008-06-02 10:59:02 +01002853 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002854 addr += 7 - ring->ring_no;
2855 val8 = (ring->ring_no == 0) ? 0x3f : 0xbf;
2856 writeb(val8, addr);
2857 val8 = readb(addr);
2858 }
2859 return pkts_processed;
2860}
Joe Perchesd44570e2009-08-24 17:29:44 +00002861
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002862static int s2io_poll_inta(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002863{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002864 struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002865 int pkts_processed = 0;
2866 int ring_pkts_processed, i;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002867 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002868 int budget_org = budget;
Joe Perchesffb5df62009-08-24 17:29:47 +00002869 struct config_param *config = &nic->config;
2870 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002871
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002872 if (unlikely(!is_s2io_card_up(nic)))
2873 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002874
2875 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002876 struct ring_info *ring = &mac_control->rings[i];
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002877 ring_pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002878 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002879 pkts_processed += ring_pkts_processed;
2880 budget -= ring_pkts_processed;
2881 if (budget <= 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002882 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002883 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002884 if (pkts_processed < budget_org) {
Ben Hutchings288379f2009-01-19 16:43:59 -08002885 napi_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002886 /* Re enable the Rx interrupts for the ring */
2887 writeq(0, &bar0->rx_traffic_mask);
2888 readl(&bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002889 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002890 return pkts_processed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002891}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002892
Ananda Rajub41477f2006-07-24 19:52:49 -04002893#ifdef CONFIG_NET_POLL_CONTROLLER
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002894/**
Ananda Rajub41477f2006-07-24 19:52:49 -04002895 * s2io_netpoll - netpoll event handler entry point
Brian Haley612eff02006-06-15 14:36:36 -04002896 * @dev : pointer to the device structure.
2897 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04002898 * This function will be called by upper layer to check for events on the
2899 * interface in situations where interrupts are disabled. It is used for
2900 * specific in-kernel networking tasks, such as remote consoles and kernel
2901 * debugging over the network (example netdump in RedHat).
Brian Haley612eff02006-06-15 14:36:36 -04002902 */
Brian Haley612eff02006-06-15 14:36:36 -04002903static void s2io_netpoll(struct net_device *dev)
2904{
Wang Chen4cf16532008-11-12 23:38:14 -08002905 struct s2io_nic *nic = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002906 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ananda Rajub41477f2006-07-24 19:52:49 -04002907 u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
Brian Haley612eff02006-06-15 14:36:36 -04002908 int i;
Joe Perchesffb5df62009-08-24 17:29:47 +00002909 struct config_param *config = &nic->config;
2910 struct mac_info *mac_control = &nic->mac_control;
Brian Haley612eff02006-06-15 14:36:36 -04002911
Linas Vepstasd796fdb2007-05-14 18:37:30 -05002912 if (pci_channel_offline(nic->pdev))
2913 return;
2914
Brian Haley612eff02006-06-15 14:36:36 -04002915 disable_irq(dev->irq);
2916
Brian Haley612eff02006-06-15 14:36:36 -04002917 writeq(val64, &bar0->rx_traffic_int);
Ananda Rajub41477f2006-07-24 19:52:49 -04002918 writeq(val64, &bar0->tx_traffic_int);
Brian Haley612eff02006-06-15 14:36:36 -04002919
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002920 /* we need to free up the transmitted skbufs or else netpoll will
Ananda Rajub41477f2006-07-24 19:52:49 -04002921 * run out of skbs and will fail and eventually netpoll application such
2922 * as netdump will fail.
2923 */
2924 for (i = 0; i < config->tx_fifo_num; i++)
2925 tx_intr_handler(&mac_control->fifos[i]);
2926
2927 /* check for received packet and indicate up to network */
Joe Perches13d866a2009-08-24 17:29:41 +00002928 for (i = 0; i < config->rx_ring_num; i++) {
2929 struct ring_info *ring = &mac_control->rings[i];
2930
2931 rx_intr_handler(ring, 0);
2932 }
Brian Haley612eff02006-06-15 14:36:36 -04002933
2934 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002935 struct ring_info *ring = &mac_control->rings[i];
2936
2937 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002938 DBG_PRINT(INFO_DBG,
2939 "%s: Out of memory in Rx Netpoll!!\n",
2940 dev->name);
Brian Haley612eff02006-06-15 14:36:36 -04002941 break;
2942 }
2943 }
Brian Haley612eff02006-06-15 14:36:36 -04002944 enable_irq(dev->irq);
2945 return;
2946}
2947#endif
2948
2949/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002950 * rx_intr_handler - Rx interrupt handler
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002951 * @ring_info: per ring structure.
2952 * @budget: budget for napi processing.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002953 * Description:
2954 * If the interrupt is because of a received frame or if the
Linus Torvalds1da177e2005-04-16 15:20:36 -07002955 * receive ring contains fresh as yet un-processed frames,this function is
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002956 * called. It picks out the RxD at which place the last Rx processing had
2957 * stopped and sends the skb to the OSM's Rx handler and then increments
Linus Torvalds1da177e2005-04-16 15:20:36 -07002958 * the offset.
2959 * Return Value:
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002960 * No. of napi packets processed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002961 */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002962static int rx_intr_handler(struct ring_info *ring_data, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002963{
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002964 int get_block, put_block;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002965 struct rx_curr_get_info get_info, put_info;
2966 struct RxD_t *rxdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002967 struct sk_buff *skb;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002968 int pkt_cnt = 0, napi_pkts = 0;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002969 int i;
Joe Perchesd44570e2009-08-24 17:29:44 +00002970 struct RxD1 *rxdp1;
2971 struct RxD3 *rxdp3;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002972
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002973 get_info = ring_data->rx_curr_get_info;
2974 get_block = get_info.block_index;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002975 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002976 put_block = put_info.block_index;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002977 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002978
Ananda Rajuda6971d2005-10-31 16:55:31 -05002979 while (RXD_IS_UP2DT(rxdp)) {
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002980 /*
2981 * If your are next to put index then it's
2982 * FIFO full condition
2983 */
Ananda Rajuda6971d2005-10-31 16:55:31 -05002984 if ((get_block == put_block) &&
2985 (get_info.offset + 1) == put_info.offset) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002986 DBG_PRINT(INTR_DBG, "%s: Ring Full\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00002987 ring_data->dev->name);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002988 break;
2989 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002990 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002991 if (skb == NULL) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002992 DBG_PRINT(ERR_DBG, "%s: NULL skb in Rx Intr\n",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002993 ring_data->dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002994 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002995 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002996 if (ring_data->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002997 rxdp1 = (struct RxD1 *)rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002998 pci_unmap_single(ring_data->pdev, (dma_addr_t)
Joe Perchesd44570e2009-08-24 17:29:44 +00002999 rxdp1->Buffer0_ptr,
3000 ring_data->mtu +
3001 HEADER_ETHERNET_II_802_3_SIZE +
3002 HEADER_802_2_SIZE +
3003 HEADER_SNAP_SIZE,
3004 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003005 } else if (ring_data->rxd_mode == RXD_MODE_3B) {
Joe Perchesd44570e2009-08-24 17:29:44 +00003006 rxdp3 = (struct RxD3 *)rxdp;
3007 pci_dma_sync_single_for_cpu(ring_data->pdev,
3008 (dma_addr_t)rxdp3->Buffer0_ptr,
3009 BUF0_LEN,
3010 PCI_DMA_FROMDEVICE);
3011 pci_unmap_single(ring_data->pdev,
3012 (dma_addr_t)rxdp3->Buffer2_ptr,
3013 ring_data->mtu + 4,
3014 PCI_DMA_FROMDEVICE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05003015 }
Ananda Raju863c11a2006-04-21 19:03:13 -04003016 prefetch(skb->data);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003017 rx_osm_handler(ring_data, rxdp);
3018 get_info.offset++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003019 ring_data->rx_curr_get_info.offset = get_info.offset;
3020 rxdp = ring_data->rx_blocks[get_block].
Joe Perchesd44570e2009-08-24 17:29:44 +00003021 rxds[get_info.offset].virt_addr;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003022 if (get_info.offset == rxd_count[ring_data->rxd_mode]) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003023 get_info.offset = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003024 ring_data->rx_curr_get_info.offset = get_info.offset;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003025 get_block++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003026 if (get_block == ring_data->block_count)
3027 get_block = 0;
3028 ring_data->rx_curr_get_info.block_index = get_block;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003029 rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
3030 }
3031
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003032 if (ring_data->nic->config.napi) {
3033 budget--;
3034 napi_pkts++;
3035 if (!budget)
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003036 break;
3037 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003038 pkt_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003039 if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
3040 break;
3041 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003042 if (ring_data->lro) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003043 /* Clear all LRO sessions before exiting */
Joe Perchesd44570e2009-08-24 17:29:44 +00003044 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003045 struct lro *lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003046 if (lro->in_use) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003047 update_L3L4_header(ring_data->nic, lro);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05003048 queue_rx_frame(lro->parent, lro->vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003049 clear_lro_session(lro);
3050 }
3051 }
3052 }
Joe Perchesd44570e2009-08-24 17:29:44 +00003053 return napi_pkts;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003054}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003055
3056/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003057 * tx_intr_handler - Transmit interrupt handler
3058 * @nic : device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003059 * Description:
3060 * If an interrupt was raised to indicate DMA complete of the
3061 * Tx packet, this function is called. It identifies the last TxD
3062 * whose buffer was freed and frees all skbs whose data have already
Linus Torvalds1da177e2005-04-16 15:20:36 -07003063 * DMA'ed into the NICs internal memory.
3064 * Return Value:
3065 * NONE
3066 */
3067
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003068static void tx_intr_handler(struct fifo_info *fifo_data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003069{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003070 struct s2io_nic *nic = fifo_data->nic;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003071 struct tx_curr_get_info get_info, put_info;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003072 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003073 struct TxD *txdlp;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003074 int pkt_cnt = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08003075 unsigned long flags = 0;
Olaf Heringf9046eb2007-06-19 22:41:10 +02003076 u8 err_mask;
Joe Perchesffb5df62009-08-24 17:29:47 +00003077 struct stat_block *stats = nic->mac_control.stats_info;
3078 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003079
Surjit Reang2fda0962008-01-24 02:08:59 -08003080 if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
Joe Perchesd44570e2009-08-24 17:29:44 +00003081 return;
Surjit Reang2fda0962008-01-24 02:08:59 -08003082
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003083 get_info = fifo_data->tx_curr_get_info;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003084 memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
Joe Perchesd44570e2009-08-24 17:29:44 +00003085 txdlp = (struct TxD *)
3086 fifo_data->list_info[get_info.offset].list_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003087 while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
3088 (get_info.offset != put_info.offset) &&
3089 (txdlp->Host_Control)) {
3090 /* Check for TxD errors */
3091 if (txdlp->Control_1 & TXD_T_CODE) {
3092 unsigned long long err;
3093 err = txdlp->Control_1 & TXD_T_CODE;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003094 if (err & 0x1) {
Joe Perchesffb5df62009-08-24 17:29:47 +00003095 swstats->parity_err_cnt++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003096 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003097
3098 /* update t_code statistics */
Olaf Heringf9046eb2007-06-19 22:41:10 +02003099 err_mask = err >> 48;
Joe Perchesd44570e2009-08-24 17:29:44 +00003100 switch (err_mask) {
3101 case 2:
Joe Perchesffb5df62009-08-24 17:29:47 +00003102 swstats->tx_buf_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003103 break;
3104
Joe Perchesd44570e2009-08-24 17:29:44 +00003105 case 3:
Joe Perchesffb5df62009-08-24 17:29:47 +00003106 swstats->tx_desc_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003107 break;
3108
Joe Perchesd44570e2009-08-24 17:29:44 +00003109 case 7:
Joe Perchesffb5df62009-08-24 17:29:47 +00003110 swstats->tx_parity_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003111 break;
3112
Joe Perchesd44570e2009-08-24 17:29:44 +00003113 case 10:
Joe Perchesffb5df62009-08-24 17:29:47 +00003114 swstats->tx_link_loss_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003115 break;
3116
Joe Perchesd44570e2009-08-24 17:29:44 +00003117 case 15:
Joe Perchesffb5df62009-08-24 17:29:47 +00003118 swstats->tx_list_proc_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003119 break;
Joe Perchesd44570e2009-08-24 17:29:44 +00003120 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003121 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003122
Ananda Rajufed5ecc2005-11-14 15:25:08 -05003123 skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003124 if (skb == NULL) {
Surjit Reang2fda0962008-01-24 02:08:59 -08003125 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
Joe Perches9e39f7c2009-08-25 08:52:00 +00003126 DBG_PRINT(ERR_DBG, "%s: NULL skb in Tx Free Intr\n",
3127 __func__);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003128 return;
3129 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003130 pkt_cnt++;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003131
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003132 /* Updating the statistics block */
Breno Leitaodc56e632008-07-22 16:27:20 -03003133 nic->dev->stats.tx_bytes += skb->len;
Joe Perchesffb5df62009-08-24 17:29:47 +00003134 swstats->mem_freed += skb->truesize;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003135 dev_kfree_skb_irq(skb);
3136
3137 get_info.offset++;
Ananda Raju863c11a2006-04-21 19:03:13 -04003138 if (get_info.offset == get_info.fifo_len + 1)
3139 get_info.offset = 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00003140 txdlp = (struct TxD *)
3141 fifo_data->list_info[get_info.offset].list_virt_addr;
3142 fifo_data->tx_curr_get_info.offset = get_info.offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003143 }
3144
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003145 s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq);
Surjit Reang2fda0962008-01-24 02:08:59 -08003146
3147 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003148}
3149
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003150/**
Ananda Rajubd1034f2006-04-21 19:20:22 -04003151 * s2io_mdio_write - Function to write in to MDIO registers
3152 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3153 * @addr : address value
3154 * @value : data value
3155 * @dev : pointer to net_device structure
3156 * Description:
3157 * This function is used to write values to the MDIO registers
3158 * NONE
3159 */
Joe Perchesd44570e2009-08-24 17:29:44 +00003160static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value,
3161 struct net_device *dev)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003162{
Joe Perchesd44570e2009-08-24 17:29:44 +00003163 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08003164 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003165 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003166
Joe Perchesd44570e2009-08-24 17:29:44 +00003167 /* address transaction */
3168 val64 = MDIO_MMD_INDX_ADDR(addr) |
3169 MDIO_MMD_DEV_ADDR(mmd_type) |
3170 MDIO_MMS_PRT_ADDR(0x0);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003171 writeq(val64, &bar0->mdio_control);
3172 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3173 writeq(val64, &bar0->mdio_control);
3174 udelay(100);
3175
Joe Perchesd44570e2009-08-24 17:29:44 +00003176 /* Data transaction */
3177 val64 = MDIO_MMD_INDX_ADDR(addr) |
3178 MDIO_MMD_DEV_ADDR(mmd_type) |
3179 MDIO_MMS_PRT_ADDR(0x0) |
3180 MDIO_MDIO_DATA(value) |
3181 MDIO_OP(MDIO_OP_WRITE_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003182 writeq(val64, &bar0->mdio_control);
3183 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3184 writeq(val64, &bar0->mdio_control);
3185 udelay(100);
3186
Joe Perchesd44570e2009-08-24 17:29:44 +00003187 val64 = MDIO_MMD_INDX_ADDR(addr) |
3188 MDIO_MMD_DEV_ADDR(mmd_type) |
3189 MDIO_MMS_PRT_ADDR(0x0) |
3190 MDIO_OP(MDIO_OP_READ_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003191 writeq(val64, &bar0->mdio_control);
3192 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3193 writeq(val64, &bar0->mdio_control);
3194 udelay(100);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003195}
3196
3197/**
3198 * s2io_mdio_read - Function to write in to MDIO registers
3199 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3200 * @addr : address value
3201 * @dev : pointer to net_device structure
3202 * Description:
3203 * This function is used to read values to the MDIO registers
3204 * NONE
3205 */
3206static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
3207{
3208 u64 val64 = 0x0;
3209 u64 rval64 = 0x0;
Wang Chen4cf16532008-11-12 23:38:14 -08003210 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003211 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003212
3213 /* address transaction */
Joe Perchesd44570e2009-08-24 17:29:44 +00003214 val64 = val64 | (MDIO_MMD_INDX_ADDR(addr)
3215 | MDIO_MMD_DEV_ADDR(mmd_type)
3216 | MDIO_MMS_PRT_ADDR(0x0));
Ananda Rajubd1034f2006-04-21 19:20:22 -04003217 writeq(val64, &bar0->mdio_control);
3218 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3219 writeq(val64, &bar0->mdio_control);
3220 udelay(100);
3221
3222 /* Data transaction */
Joe Perchesd44570e2009-08-24 17:29:44 +00003223 val64 = MDIO_MMD_INDX_ADDR(addr) |
3224 MDIO_MMD_DEV_ADDR(mmd_type) |
3225 MDIO_MMS_PRT_ADDR(0x0) |
3226 MDIO_OP(MDIO_OP_READ_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003227 writeq(val64, &bar0->mdio_control);
3228 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3229 writeq(val64, &bar0->mdio_control);
3230 udelay(100);
3231
3232 /* Read the value from regs */
3233 rval64 = readq(&bar0->mdio_control);
3234 rval64 = rval64 & 0xFFFF0000;
3235 rval64 = rval64 >> 16;
3236 return rval64;
3237}
Joe Perchesd44570e2009-08-24 17:29:44 +00003238
Ananda Rajubd1034f2006-04-21 19:20:22 -04003239/**
3240 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
Uwe Kleine-Königfbfecd32009-10-28 20:11:04 +01003241 * @counter : counter value to be updated
Ananda Rajubd1034f2006-04-21 19:20:22 -04003242 * @flag : flag to indicate the status
3243 * @type : counter type
3244 * Description:
3245 * This function is to check the status of the xpak counters value
3246 * NONE
3247 */
3248
Joe Perchesd44570e2009-08-24 17:29:44 +00003249static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index,
3250 u16 flag, u16 type)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003251{
3252 u64 mask = 0x3;
3253 u64 val64;
3254 int i;
Joe Perchesd44570e2009-08-24 17:29:44 +00003255 for (i = 0; i < index; i++)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003256 mask = mask << 0x2;
3257
Joe Perchesd44570e2009-08-24 17:29:44 +00003258 if (flag > 0) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04003259 *counter = *counter + 1;
3260 val64 = *regs_stat & mask;
3261 val64 = val64 >> (index * 0x2);
3262 val64 = val64 + 1;
Joe Perchesd44570e2009-08-24 17:29:44 +00003263 if (val64 == 3) {
3264 switch (type) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04003265 case 1:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003266 DBG_PRINT(ERR_DBG,
3267 "Take Xframe NIC out of service.\n");
3268 DBG_PRINT(ERR_DBG,
3269"Excessive temperatures may result in premature transceiver failure.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003270 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003271 case 2:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003272 DBG_PRINT(ERR_DBG,
3273 "Take Xframe NIC out of service.\n");
3274 DBG_PRINT(ERR_DBG,
3275"Excessive bias currents may indicate imminent laser diode failure.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003276 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003277 case 3:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003278 DBG_PRINT(ERR_DBG,
3279 "Take Xframe NIC out of service.\n");
3280 DBG_PRINT(ERR_DBG,
3281"Excessive laser output power may saturate far-end receiver.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003282 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003283 default:
Joe Perchesd44570e2009-08-24 17:29:44 +00003284 DBG_PRINT(ERR_DBG,
3285 "Incorrect XPAK Alarm type\n");
Ananda Rajubd1034f2006-04-21 19:20:22 -04003286 }
3287 val64 = 0x0;
3288 }
3289 val64 = val64 << (index * 0x2);
3290 *regs_stat = (*regs_stat & (~mask)) | (val64);
3291
3292 } else {
3293 *regs_stat = *regs_stat & (~mask);
3294 }
3295}
3296
3297/**
3298 * s2io_updt_xpak_counter - Function to update the xpak counters
3299 * @dev : pointer to net_device struct
3300 * Description:
3301 * This function is to upate the status of the xpak counters value
3302 * NONE
3303 */
3304static void s2io_updt_xpak_counter(struct net_device *dev)
3305{
3306 u16 flag = 0x0;
3307 u16 type = 0x0;
3308 u16 val16 = 0x0;
3309 u64 val64 = 0x0;
3310 u64 addr = 0x0;
3311
Wang Chen4cf16532008-11-12 23:38:14 -08003312 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00003313 struct stat_block *stats = sp->mac_control.stats_info;
3314 struct xpakStat *xstats = &stats->xpak_stat;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003315
3316 /* Check the communication with the MDIO slave */
Ben Hutchings40239392009-04-29 08:13:29 +00003317 addr = MDIO_CTRL1;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003318 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003319 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Joe Perchesd44570e2009-08-24 17:29:44 +00003320 if ((val64 == 0xFFFF) || (val64 == 0x0000)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003321 DBG_PRINT(ERR_DBG,
3322 "ERR: MDIO slave access failed - Returned %llx\n",
3323 (unsigned long long)val64);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003324 return;
3325 }
3326
Ben Hutchings40239392009-04-29 08:13:29 +00003327 /* Check for the expected value of control reg 1 */
Joe Perchesd44570e2009-08-24 17:29:44 +00003328 if (val64 != MDIO_CTRL1_SPEED10G) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003329 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - "
3330 "Returned: %llx- Expected: 0x%x\n",
Ben Hutchings40239392009-04-29 08:13:29 +00003331 (unsigned long long)val64, MDIO_CTRL1_SPEED10G);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003332 return;
3333 }
3334
3335 /* Loading the DOM register to MDIO register */
3336 addr = 0xA100;
Ben Hutchings40239392009-04-29 08:13:29 +00003337 s2io_mdio_write(MDIO_MMD_PMAPMD, addr, val16, dev);
3338 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003339
3340 /* Reading the Alarm flags */
3341 addr = 0xA070;
3342 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003343 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003344
3345 flag = CHECKBIT(val64, 0x7);
3346 type = 1;
Joe Perchesffb5df62009-08-24 17:29:47 +00003347 s2io_chk_xpak_counter(&xstats->alarm_transceiver_temp_high,
3348 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003349 0x0, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003350
Joe Perchesd44570e2009-08-24 17:29:44 +00003351 if (CHECKBIT(val64, 0x6))
Joe Perchesffb5df62009-08-24 17:29:47 +00003352 xstats->alarm_transceiver_temp_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003353
3354 flag = CHECKBIT(val64, 0x3);
3355 type = 2;
Joe Perchesffb5df62009-08-24 17:29:47 +00003356 s2io_chk_xpak_counter(&xstats->alarm_laser_bias_current_high,
3357 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003358 0x2, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003359
Joe Perchesd44570e2009-08-24 17:29:44 +00003360 if (CHECKBIT(val64, 0x2))
Joe Perchesffb5df62009-08-24 17:29:47 +00003361 xstats->alarm_laser_bias_current_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003362
3363 flag = CHECKBIT(val64, 0x1);
3364 type = 3;
Joe Perchesffb5df62009-08-24 17:29:47 +00003365 s2io_chk_xpak_counter(&xstats->alarm_laser_output_power_high,
3366 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003367 0x4, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003368
Joe Perchesd44570e2009-08-24 17:29:44 +00003369 if (CHECKBIT(val64, 0x0))
Joe Perchesffb5df62009-08-24 17:29:47 +00003370 xstats->alarm_laser_output_power_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003371
3372 /* Reading the Warning flags */
3373 addr = 0xA074;
3374 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003375 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003376
Joe Perchesd44570e2009-08-24 17:29:44 +00003377 if (CHECKBIT(val64, 0x7))
Joe Perchesffb5df62009-08-24 17:29:47 +00003378 xstats->warn_transceiver_temp_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003379
Joe Perchesd44570e2009-08-24 17:29:44 +00003380 if (CHECKBIT(val64, 0x6))
Joe Perchesffb5df62009-08-24 17:29:47 +00003381 xstats->warn_transceiver_temp_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003382
Joe Perchesd44570e2009-08-24 17:29:44 +00003383 if (CHECKBIT(val64, 0x3))
Joe Perchesffb5df62009-08-24 17:29:47 +00003384 xstats->warn_laser_bias_current_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003385
Joe Perchesd44570e2009-08-24 17:29:44 +00003386 if (CHECKBIT(val64, 0x2))
Joe Perchesffb5df62009-08-24 17:29:47 +00003387 xstats->warn_laser_bias_current_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003388
Joe Perchesd44570e2009-08-24 17:29:44 +00003389 if (CHECKBIT(val64, 0x1))
Joe Perchesffb5df62009-08-24 17:29:47 +00003390 xstats->warn_laser_output_power_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003391
Joe Perchesd44570e2009-08-24 17:29:44 +00003392 if (CHECKBIT(val64, 0x0))
Joe Perchesffb5df62009-08-24 17:29:47 +00003393 xstats->warn_laser_output_power_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003394}
3395
3396/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003397 * wait_for_cmd_complete - waits for a command to complete.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003398 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07003399 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003400 * Description: Function that waits for a command to Write into RMAC
3401 * ADDR DATA registers to be completed and returns either success or
3402 * error depending on whether the command was complete or not.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003403 * Return value:
3404 * SUCCESS on success and FAILURE on failure.
3405 */
3406
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003407static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
Joe Perchesd44570e2009-08-24 17:29:44 +00003408 int bit_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003409{
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003410 int ret = FAILURE, cnt = 0, delay = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003411 u64 val64;
3412
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003413 if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
3414 return FAILURE;
3415
3416 do {
Ananda Rajuc92ca042006-04-21 19:18:03 -04003417 val64 = readq(addr);
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003418 if (bit_state == S2IO_BIT_RESET) {
3419 if (!(val64 & busy_bit)) {
3420 ret = SUCCESS;
3421 break;
3422 }
3423 } else {
Ram Vepa2d146eb2010-01-19 12:36:20 -08003424 if (val64 & busy_bit) {
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003425 ret = SUCCESS;
3426 break;
3427 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003428 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04003429
Joe Perchesd44570e2009-08-24 17:29:44 +00003430 if (in_interrupt())
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003431 mdelay(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003432 else
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003433 msleep(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003434
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003435 if (++cnt >= 10)
3436 delay = 50;
3437 } while (cnt < 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003438 return ret;
3439}
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003440/*
3441 * check_pci_device_id - Checks if the device id is supported
3442 * @id : device id
3443 * Description: Function to check if the pci device id is supported by driver.
3444 * Return value: Actual device id if supported else PCI_ANY_ID
3445 */
3446static u16 check_pci_device_id(u16 id)
3447{
3448 switch (id) {
3449 case PCI_DEVICE_ID_HERC_WIN:
3450 case PCI_DEVICE_ID_HERC_UNI:
3451 return XFRAME_II_DEVICE;
3452 case PCI_DEVICE_ID_S2IO_UNI:
3453 case PCI_DEVICE_ID_S2IO_WIN:
3454 return XFRAME_I_DEVICE;
3455 default:
3456 return PCI_ANY_ID;
3457 }
3458}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003459
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003460/**
3461 * s2io_reset - Resets the card.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003462 * @sp : private member of the device structure.
3463 * Description: Function to Reset the card. This function then also
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003464 * restores the previously saved PCI configuration space registers as
Linus Torvalds1da177e2005-04-16 15:20:36 -07003465 * the card reset also resets the configuration space.
3466 * Return value:
3467 * void.
3468 */
3469
Joe Perchesd44570e2009-08-24 17:29:44 +00003470static void s2io_reset(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003471{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003472 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003473 u64 val64;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003474 u16 subid, pci_cmd;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003475 int i;
3476 u16 val16;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003477 unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
3478 unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;
Joe Perchesffb5df62009-08-24 17:29:47 +00003479 struct stat_block *stats;
3480 struct swStat *swstats;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003481
Joe Perches9e39f7c2009-08-25 08:52:00 +00003482 DBG_PRINT(INIT_DBG, "%s: Resetting XFrame card %s\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00003483 __func__, sp->dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003484
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003485 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07003486 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003487
Linus Torvalds1da177e2005-04-16 15:20:36 -07003488 val64 = SW_RESET_ALL;
3489 writeq(val64, &bar0->sw_reset);
Joe Perchesd44570e2009-08-24 17:29:44 +00003490 if (strstr(sp->product_name, "CX4"))
Ananda Rajuc92ca042006-04-21 19:18:03 -04003491 msleep(750);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003492 msleep(250);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003493 for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
3494
3495 /* Restore the PCI state saved during initialization. */
3496 pci_restore_state(sp->pdev);
Breno Leitaob8a623b2009-11-10 09:44:23 +00003497 pci_save_state(sp->pdev);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003498 pci_read_config_word(sp->pdev, 0x2, &val16);
3499 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
3500 break;
3501 msleep(200);
3502 }
3503
Joe Perchesd44570e2009-08-24 17:29:44 +00003504 if (check_pci_device_id(val16) == (u16)PCI_ANY_ID)
3505 DBG_PRINT(ERR_DBG, "%s SW_Reset failed!\n", __func__);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003506
3507 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);
3508
3509 s2io_init_pci(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003510
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003511 /* Set swapper to enable I/O register access */
3512 s2io_set_swapper(sp);
3513
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08003514 /* restore mac_addr entries */
3515 do_s2io_restore_unicast_mc(sp);
3516
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003517 /* Restore the MSIX table entries from local variables */
3518 restore_xmsi_data(sp);
3519
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003520 /* Clear certain PCI/PCI-X fields after reset */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003521 if (sp->device_type == XFRAME_II_DEVICE) {
Ananda Rajub41477f2006-07-24 19:52:49 -04003522 /* Clear "detected parity error" bit */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003523 pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003524
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003525 /* Clearing PCIX Ecc status register */
3526 pci_write_config_dword(sp->pdev, 0x68, 0x7C);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003527
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003528 /* Clearing PCI_STATUS error reflected here */
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003529 writeq(s2BIT(62), &bar0->txpic_int_reg);
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003530 }
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003531
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003532 /* Reset device statistics maintained by OS */
Joe Perchesd44570e2009-08-24 17:29:44 +00003533 memset(&sp->stats, 0, sizeof(struct net_device_stats));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003534
Joe Perchesffb5df62009-08-24 17:29:47 +00003535 stats = sp->mac_control.stats_info;
3536 swstats = &stats->sw_stat;
3537
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003538 /* save link up/down time/cnt, reset/memory/watchdog cnt */
Joe Perchesffb5df62009-08-24 17:29:47 +00003539 up_cnt = swstats->link_up_cnt;
3540 down_cnt = swstats->link_down_cnt;
3541 up_time = swstats->link_up_time;
3542 down_time = swstats->link_down_time;
3543 reset_cnt = swstats->soft_reset_cnt;
3544 mem_alloc_cnt = swstats->mem_allocated;
3545 mem_free_cnt = swstats->mem_freed;
3546 watchdog_cnt = swstats->watchdog_timer_cnt;
3547
3548 memset(stats, 0, sizeof(struct stat_block));
3549
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003550 /* restore link up/down time/cnt, reset/memory/watchdog cnt */
Joe Perchesffb5df62009-08-24 17:29:47 +00003551 swstats->link_up_cnt = up_cnt;
3552 swstats->link_down_cnt = down_cnt;
3553 swstats->link_up_time = up_time;
3554 swstats->link_down_time = down_time;
3555 swstats->soft_reset_cnt = reset_cnt;
3556 swstats->mem_allocated = mem_alloc_cnt;
3557 swstats->mem_freed = mem_free_cnt;
3558 swstats->watchdog_timer_cnt = watchdog_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003559
Linus Torvalds1da177e2005-04-16 15:20:36 -07003560 /* SXE-002: Configure link and activity LED to turn it off */
3561 subid = sp->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003562 if (((subid & 0xFF) >= 0x07) &&
3563 (sp->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003564 val64 = readq(&bar0->gpio_control);
3565 val64 |= 0x0000800000000000ULL;
3566 writeq(val64, &bar0->gpio_control);
3567 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01003568 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003569 }
3570
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003571 /*
3572 * Clear spurious ECC interrupts that would have occured on
3573 * XFRAME II cards after reset.
3574 */
3575 if (sp->device_type == XFRAME_II_DEVICE) {
3576 val64 = readq(&bar0->pcc_err_reg);
3577 writeq(val64, &bar0->pcc_err_reg);
3578 }
3579
Tobias Klauserf957bcf2009-06-04 23:07:59 +00003580 sp->device_enabled_once = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003581}
3582
3583/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003584 * s2io_set_swapper - to set the swapper controle on the card
3585 * @sp : private member of the device structure,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003586 * pointer to the s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003587 * Description: Function to set the swapper control on the card
Linus Torvalds1da177e2005-04-16 15:20:36 -07003588 * correctly depending on the 'endianness' of the system.
3589 * Return value:
3590 * SUCCESS on success and FAILURE on failure.
3591 */
3592
Joe Perchesd44570e2009-08-24 17:29:44 +00003593static int s2io_set_swapper(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003594{
3595 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003596 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003597 u64 val64, valt, valr;
3598
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003599 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003600 * Set proper endian settings and verify the same by reading
3601 * the PIF Feed-back register.
3602 */
3603
3604 val64 = readq(&bar0->pif_rd_swapper_fb);
3605 if (val64 != 0x0123456789ABCDEFULL) {
3606 int i = 0;
3607 u64 value[] = { 0xC30000C3C30000C3ULL, /* FE=1, SE=1 */
3608 0x8100008181000081ULL, /* FE=1, SE=0 */
3609 0x4200004242000042ULL, /* FE=0, SE=1 */
3610 0}; /* FE=0, SE=0 */
3611
Joe Perchesd44570e2009-08-24 17:29:44 +00003612 while (i < 4) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003613 writeq(value[i], &bar0->swapper_ctrl);
3614 val64 = readq(&bar0->pif_rd_swapper_fb);
3615 if (val64 == 0x0123456789ABCDEFULL)
3616 break;
3617 i++;
3618 }
3619 if (i == 4) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003620 DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, "
3621 "feedback read %llx\n",
3622 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003623 return FAILURE;
3624 }
3625 valr = value[i];
3626 } else {
3627 valr = readq(&bar0->swapper_ctrl);
3628 }
3629
3630 valt = 0x0123456789ABCDEFULL;
3631 writeq(valt, &bar0->xmsi_address);
3632 val64 = readq(&bar0->xmsi_address);
3633
Joe Perchesd44570e2009-08-24 17:29:44 +00003634 if (val64 != valt) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003635 int i = 0;
3636 u64 value[] = { 0x00C3C30000C3C300ULL, /* FE=1, SE=1 */
3637 0x0081810000818100ULL, /* FE=1, SE=0 */
3638 0x0042420000424200ULL, /* FE=0, SE=1 */
3639 0}; /* FE=0, SE=0 */
3640
Joe Perchesd44570e2009-08-24 17:29:44 +00003641 while (i < 4) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003642 writeq((value[i] | valr), &bar0->swapper_ctrl);
3643 writeq(valt, &bar0->xmsi_address);
3644 val64 = readq(&bar0->xmsi_address);
Joe Perchesd44570e2009-08-24 17:29:44 +00003645 if (val64 == valt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003646 break;
3647 i++;
3648 }
Joe Perchesd44570e2009-08-24 17:29:44 +00003649 if (i == 4) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003650 unsigned long long x = val64;
Joe Perches9e39f7c2009-08-25 08:52:00 +00003651 DBG_PRINT(ERR_DBG,
3652 "Write failed, Xmsi_addr reads:0x%llx\n", x);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003653 return FAILURE;
3654 }
3655 }
3656 val64 = readq(&bar0->swapper_ctrl);
3657 val64 &= 0xFFFF000000000000ULL;
3658
Joe Perchesd44570e2009-08-24 17:29:44 +00003659#ifdef __BIG_ENDIAN
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003660 /*
3661 * The device by default set to a big endian format, so a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003662 * big endian driver need not set anything.
3663 */
3664 val64 |= (SWAPPER_CTRL_TXP_FE |
Joe Perchesd44570e2009-08-24 17:29:44 +00003665 SWAPPER_CTRL_TXP_SE |
3666 SWAPPER_CTRL_TXD_R_FE |
3667 SWAPPER_CTRL_TXD_W_FE |
3668 SWAPPER_CTRL_TXF_R_FE |
3669 SWAPPER_CTRL_RXD_R_FE |
3670 SWAPPER_CTRL_RXD_W_FE |
3671 SWAPPER_CTRL_RXF_W_FE |
3672 SWAPPER_CTRL_XMSI_FE |
3673 SWAPPER_CTRL_STATS_FE |
3674 SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003675 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003676 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003677 writeq(val64, &bar0->swapper_ctrl);
3678#else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003679 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003680 * Initially we enable all bits to make it accessible by the
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003681 * driver, then we selectively enable only those bits that
Linus Torvalds1da177e2005-04-16 15:20:36 -07003682 * we want to set.
3683 */
3684 val64 |= (SWAPPER_CTRL_TXP_FE |
Joe Perchesd44570e2009-08-24 17:29:44 +00003685 SWAPPER_CTRL_TXP_SE |
3686 SWAPPER_CTRL_TXD_R_FE |
3687 SWAPPER_CTRL_TXD_R_SE |
3688 SWAPPER_CTRL_TXD_W_FE |
3689 SWAPPER_CTRL_TXD_W_SE |
3690 SWAPPER_CTRL_TXF_R_FE |
3691 SWAPPER_CTRL_RXD_R_FE |
3692 SWAPPER_CTRL_RXD_R_SE |
3693 SWAPPER_CTRL_RXD_W_FE |
3694 SWAPPER_CTRL_RXD_W_SE |
3695 SWAPPER_CTRL_RXF_W_FE |
3696 SWAPPER_CTRL_XMSI_FE |
3697 SWAPPER_CTRL_STATS_FE |
3698 SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003699 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003700 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003701 writeq(val64, &bar0->swapper_ctrl);
3702#endif
3703 val64 = readq(&bar0->swapper_ctrl);
3704
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003705 /*
3706 * Verifying if endian settings are accurate by reading a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003707 * feedback register.
3708 */
3709 val64 = readq(&bar0->pif_rd_swapper_fb);
3710 if (val64 != 0x0123456789ABCDEFULL) {
3711 /* Endian settings are incorrect, calls for another dekko. */
Joe Perches9e39f7c2009-08-25 08:52:00 +00003712 DBG_PRINT(ERR_DBG,
3713 "%s: Endian settings are wrong, feedback read %llx\n",
3714 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003715 return FAILURE;
3716 }
3717
3718 return SUCCESS;
3719}
3720
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003721static int wait_for_msix_trans(struct s2io_nic *nic, int i)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003722{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003723 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003724 u64 val64;
3725 int ret = 0, cnt = 0;
3726
3727 do {
3728 val64 = readq(&bar0->xmsi_access);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003729 if (!(val64 & s2BIT(15)))
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003730 break;
3731 mdelay(1);
3732 cnt++;
Joe Perchesd44570e2009-08-24 17:29:44 +00003733 } while (cnt < 5);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003734 if (cnt == 5) {
3735 DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
3736 ret = 1;
3737 }
3738
3739 return ret;
3740}
3741
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003742static void restore_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003743{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003744 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003745 u64 val64;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003746 int i, msix_index;
3747
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003748 if (nic->device_type == XFRAME_I_DEVICE)
3749 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003750
Joe Perchesd44570e2009-08-24 17:29:44 +00003751 for (i = 0; i < MAX_REQUESTED_MSI_X; i++) {
3752 msix_index = (i) ? ((i-1) * 8 + 1) : 0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003753 writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
3754 writeq(nic->msix_info[i].data, &bar0->xmsi_data);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003755 val64 = (s2BIT(7) | s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003756 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003757 if (wait_for_msix_trans(nic, msix_index)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003758 DBG_PRINT(ERR_DBG, "%s: index: %d failed\n",
3759 __func__, msix_index);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003760 continue;
3761 }
3762 }
3763}
3764
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003765static void store_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003766{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003767 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003768 u64 val64, addr, data;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003769 int i, msix_index;
3770
3771 if (nic->device_type == XFRAME_I_DEVICE)
3772 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003773
3774 /* Store and display */
Joe Perchesd44570e2009-08-24 17:29:44 +00003775 for (i = 0; i < MAX_REQUESTED_MSI_X; i++) {
3776 msix_index = (i) ? ((i-1) * 8 + 1) : 0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003777 val64 = (s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003778 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003779 if (wait_for_msix_trans(nic, msix_index)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003780 DBG_PRINT(ERR_DBG, "%s: index: %d failed\n",
3781 __func__, msix_index);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003782 continue;
3783 }
3784 addr = readq(&bar0->xmsi_address);
3785 data = readq(&bar0->xmsi_data);
3786 if (addr && data) {
3787 nic->msix_info[i].addr = addr;
3788 nic->msix_info[i].data = data;
3789 }
3790 }
3791}
3792
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003793static int s2io_enable_msi_x(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003794{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003795 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003796 u64 rx_mat;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003797 u16 msi_control; /* Temp variable */
3798 int ret, i, j, msix_indx = 1;
Joe Perches4f870322009-08-24 17:29:42 +00003799 int size;
Joe Perchesffb5df62009-08-24 17:29:47 +00003800 struct stat_block *stats = nic->mac_control.stats_info;
3801 struct swStat *swstats = &stats->sw_stat;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003802
Joe Perches4f870322009-08-24 17:29:42 +00003803 size = nic->num_entries * sizeof(struct msix_entry);
Joe Perches44364a02009-08-24 17:29:43 +00003804 nic->entries = kzalloc(size, GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003805 if (!nic->entries) {
Joe Perchesd44570e2009-08-24 17:29:44 +00003806 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3807 __func__);
Joe Perchesffb5df62009-08-24 17:29:47 +00003808 swstats->mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003809 return -ENOMEM;
3810 }
Joe Perchesffb5df62009-08-24 17:29:47 +00003811 swstats->mem_allocated += size;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003812
Joe Perches4f870322009-08-24 17:29:42 +00003813 size = nic->num_entries * sizeof(struct s2io_msix_entry);
Joe Perches44364a02009-08-24 17:29:43 +00003814 nic->s2io_entries = kzalloc(size, GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003815 if (!nic->s2io_entries) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003816 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00003817 __func__);
Joe Perchesffb5df62009-08-24 17:29:47 +00003818 swstats->mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003819 kfree(nic->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003820 swstats->mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003821 += (nic->num_entries * sizeof(struct msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003822 return -ENOMEM;
3823 }
Joe Perchesffb5df62009-08-24 17:29:47 +00003824 swstats->mem_allocated += size;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003825
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003826 nic->entries[0].entry = 0;
3827 nic->s2io_entries[0].entry = 0;
3828 nic->s2io_entries[0].in_use = MSIX_FLG;
3829 nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
3830 nic->s2io_entries[0].arg = &nic->mac_control.fifos;
3831
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003832 for (i = 1; i < nic->num_entries; i++) {
3833 nic->entries[i].entry = ((i - 1) * 8) + 1;
3834 nic->s2io_entries[i].entry = ((i - 1) * 8) + 1;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003835 nic->s2io_entries[i].arg = NULL;
3836 nic->s2io_entries[i].in_use = 0;
3837 }
3838
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003839 rx_mat = readq(&bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003840 for (j = 0; j < nic->config.rx_ring_num; j++) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003841 rx_mat |= RX_MAT_SET(j, msix_indx);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003842 nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j];
3843 nic->s2io_entries[j+1].type = MSIX_RING_TYPE;
3844 nic->s2io_entries[j+1].in_use = MSIX_FLG;
3845 msix_indx += 8;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003846 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003847 writeq(rx_mat, &bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003848 readq(&bar0->rx_mat);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003849
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003850 ret = pci_enable_msix(nic->pdev, nic->entries, nic->num_entries);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003851 /* We fail init if error or we get less vectors than min required */
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003852 if (ret) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003853 DBG_PRINT(ERR_DBG, "Enabling MSI-X failed\n");
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003854 kfree(nic->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003855 swstats->mem_freed += nic->num_entries *
3856 sizeof(struct msix_entry);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003857 kfree(nic->s2io_entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003858 swstats->mem_freed += nic->num_entries *
3859 sizeof(struct s2io_msix_entry);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003860 nic->entries = NULL;
3861 nic->s2io_entries = NULL;
3862 return -ENOMEM;
3863 }
3864
3865 /*
3866 * To enable MSI-X, MSI also needs to be enabled, due to a bug
3867 * in the herc NIC. (Temp change, needs to be removed later)
3868 */
3869 pci_read_config_word(nic->pdev, 0x42, &msi_control);
3870 msi_control |= 0x1; /* Enable MSI */
3871 pci_write_config_word(nic->pdev, 0x42, msi_control);
3872
3873 return 0;
3874}
3875
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003876/* Handle software interrupt used during MSI(X) test */
Adrian Bunk33390a72007-12-11 23:23:06 +01003877static irqreturn_t s2io_test_intr(int irq, void *dev_id)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003878{
3879 struct s2io_nic *sp = dev_id;
3880
3881 sp->msi_detected = 1;
3882 wake_up(&sp->msi_wait);
3883
3884 return IRQ_HANDLED;
3885}
3886
3887/* Test interrupt path by forcing a a software IRQ */
Adrian Bunk33390a72007-12-11 23:23:06 +01003888static int s2io_test_msi(struct s2io_nic *sp)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003889{
3890 struct pci_dev *pdev = sp->pdev;
3891 struct XENA_dev_config __iomem *bar0 = sp->bar0;
3892 int err;
3893 u64 val64, saved64;
3894
3895 err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
Joe Perchesd44570e2009-08-24 17:29:44 +00003896 sp->name, sp);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003897 if (err) {
3898 DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00003899 sp->dev->name, pci_name(pdev), pdev->irq);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003900 return err;
3901 }
3902
Joe Perchesd44570e2009-08-24 17:29:44 +00003903 init_waitqueue_head(&sp->msi_wait);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003904 sp->msi_detected = 0;
3905
3906 saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
3907 val64 |= SCHED_INT_CTRL_ONE_SHOT;
3908 val64 |= SCHED_INT_CTRL_TIMER_EN;
3909 val64 |= SCHED_INT_CTRL_INT2MSI(1);
3910 writeq(val64, &bar0->scheduled_int_ctrl);
3911
3912 wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);
3913
3914 if (!sp->msi_detected) {
3915 /* MSI(X) test failed, go back to INTx mode */
Joe Perches24500222007-11-19 17:48:28 -08003916 DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated "
Joe Perches9e39f7c2009-08-25 08:52:00 +00003917 "using MSI(X) during test\n",
3918 sp->dev->name, pci_name(pdev));
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003919
3920 err = -EOPNOTSUPP;
3921 }
3922
3923 free_irq(sp->entries[1].vector, sp);
3924
3925 writeq(saved64, &bar0->scheduled_int_ctrl);
3926
3927 return err;
3928}
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003929
3930static void remove_msix_isr(struct s2io_nic *sp)
3931{
3932 int i;
3933 u16 msi_control;
3934
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003935 for (i = 0; i < sp->num_entries; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00003936 if (sp->s2io_entries[i].in_use == MSIX_REGISTERED_SUCCESS) {
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003937 int vector = sp->entries[i].vector;
3938 void *arg = sp->s2io_entries[i].arg;
3939 free_irq(vector, arg);
3940 }
3941 }
3942
3943 kfree(sp->entries);
3944 kfree(sp->s2io_entries);
3945 sp->entries = NULL;
3946 sp->s2io_entries = NULL;
3947
3948 pci_read_config_word(sp->pdev, 0x42, &msi_control);
3949 msi_control &= 0xFFFE; /* Disable MSI */
3950 pci_write_config_word(sp->pdev, 0x42, msi_control);
3951
3952 pci_disable_msix(sp->pdev);
3953}
3954
3955static void remove_inta_isr(struct s2io_nic *sp)
3956{
3957 struct net_device *dev = sp->dev;
3958
3959 free_irq(sp->pdev->irq, dev);
3960}
3961
Linus Torvalds1da177e2005-04-16 15:20:36 -07003962/* ********************************************************* *
3963 * Functions defined below concern the OS part of the driver *
3964 * ********************************************************* */
3965
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003966/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003967 * s2io_open - open entry point of the driver
3968 * @dev : pointer to the device structure.
3969 * Description:
3970 * This function is the open entry point of the driver. It mainly calls a
3971 * function to allocate Rx buffers and inserts them into the buffer
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003972 * descriptors and then enables the Rx part of the NIC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003973 * Return value:
3974 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3975 * file on failure.
3976 */
3977
Adrian Bunkac1f60d2005-11-06 01:46:47 +01003978static int s2io_open(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003979{
Wang Chen4cf16532008-11-12 23:38:14 -08003980 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00003981 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003982 int err = 0;
3983
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003984 /*
3985 * Make sure you have link off by default every time
Linus Torvalds1da177e2005-04-16 15:20:36 -07003986 * Nic is initialized
3987 */
3988 netif_carrier_off(dev);
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003989 sp->last_link_state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003990
3991 /* Initialize H/W and enable interrupts */
Ananda Rajuc92ca042006-04-21 19:18:03 -04003992 err = s2io_card_up(sp);
3993 if (err) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003994 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
3995 dev->name);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07003996 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003997 }
3998
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04003999 if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004000 DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004001 s2io_card_down(sp);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004002 err = -ENODEV;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004003 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004004 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004005 s2io_start_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004006 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004007
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004008hw_init_failed:
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07004009 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004010 if (sp->entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004011 kfree(sp->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00004012 swstats->mem_freed += sp->num_entries *
4013 sizeof(struct msix_entry);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004014 }
4015 if (sp->s2io_entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004016 kfree(sp->s2io_entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00004017 swstats->mem_freed += sp->num_entries *
4018 sizeof(struct s2io_msix_entry);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004019 }
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004020 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004021 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004022}
4023
4024/**
4025 * s2io_close -close entry point of the driver
4026 * @dev : device pointer.
4027 * Description:
4028 * This is the stop entry point of the driver. It needs to undo exactly
4029 * whatever was done by the open entry point,thus it's usually referred to
4030 * as the close function.Among other things this function mainly stops the
4031 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
4032 * Return value:
4033 * 0 on success and an appropriate (-)ve integer as defined in errno.h
4034 * file on failure.
4035 */
4036
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004037static int s2io_close(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004038{
Wang Chen4cf16532008-11-12 23:38:14 -08004039 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004040 struct config_param *config = &sp->config;
4041 u64 tmp64;
4042 int offset;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004043
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05004044 /* Return if the device is already closed *
Joe Perchesd44570e2009-08-24 17:29:44 +00004045 * Can happen when s2io_card_up failed in change_mtu *
4046 */
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05004047 if (!is_s2io_card_up(sp))
4048 return 0;
4049
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004050 s2io_stop_all_tx_queue(sp);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004051 /* delete all populated mac entries */
4052 for (offset = 1; offset < config->max_mc_addr; offset++) {
4053 tmp64 = do_s2io_read_unicast_mc(sp, offset);
4054 if (tmp64 != S2IO_DISABLE_MAC_ENTRY)
4055 do_s2io_delete_unicast_mc(sp, tmp64);
4056 }
4057
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004058 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004059
Linus Torvalds1da177e2005-04-16 15:20:36 -07004060 return 0;
4061}
4062
4063/**
4064 * s2io_xmit - Tx entry point of te driver
4065 * @skb : the socket buffer containing the Tx data.
4066 * @dev : device pointer.
4067 * Description :
4068 * This function is the Tx entry point of the driver. S2IO NIC supports
4069 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
4070 * NOTE: when device cant queue the pkt,just the trans_start variable will
4071 * not be upadted.
4072 * Return value:
4073 * 0 on success & 1 on failure.
4074 */
4075
Stephen Hemminger613573252009-08-31 19:50:58 +00004076static netdev_tx_t s2io_xmit(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004077{
Wang Chen4cf16532008-11-12 23:38:14 -08004078 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004079 u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
4080 register u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004081 struct TxD *txdp;
4082 struct TxFIFO_element __iomem *tx_fifo;
Surjit Reang2fda0962008-01-24 02:08:59 -08004083 unsigned long flags = 0;
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004084 u16 vlan_tag = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004085 struct fifo_info *fifo = NULL;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004086 int do_spin_lock = 1;
Ananda Raju75c30b12006-07-24 19:55:09 -04004087 int offload_type;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004088 int enable_per_list_interrupt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00004089 struct config_param *config = &sp->config;
4090 struct mac_info *mac_control = &sp->mac_control;
4091 struct stat_block *stats = mac_control->stats_info;
4092 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004093
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004094 DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004095
4096 if (unlikely(skb->len <= 0)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00004097 DBG_PRINT(TX_DBG, "%s: Buffer has no data..\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004098 dev_kfree_skb_any(skb);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004099 return NETDEV_TX_OK;
Surjit Reang2fda0962008-01-24 02:08:59 -08004100 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004101
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004102 if (!is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004103 DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07004104 dev->name);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004105 dev_kfree_skb(skb);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004106 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004107 }
4108
4109 queue = 0;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004110 if (sp->vlgrp && vlan_tx_tag_present(skb))
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004111 vlan_tag = vlan_tx_tag_get(skb);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004112 if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) {
4113 if (skb->protocol == htons(ETH_P_IP)) {
4114 struct iphdr *ip;
4115 struct tcphdr *th;
4116 ip = ip_hdr(skb);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004117
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004118 if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
4119 th = (struct tcphdr *)(((unsigned char *)ip) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004120 ip->ihl*4);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004121
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004122 if (ip->protocol == IPPROTO_TCP) {
4123 queue_len = sp->total_tcp_fifos;
4124 queue = (ntohs(th->source) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004125 ntohs(th->dest)) &
4126 sp->fifo_selector[queue_len - 1];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004127 if (queue >= queue_len)
4128 queue = queue_len - 1;
4129 } else if (ip->protocol == IPPROTO_UDP) {
4130 queue_len = sp->total_udp_fifos;
4131 queue = (ntohs(th->source) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004132 ntohs(th->dest)) &
4133 sp->fifo_selector[queue_len - 1];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004134 if (queue >= queue_len)
4135 queue = queue_len - 1;
4136 queue += sp->udp_fifo_idx;
4137 if (skb->len > 1024)
4138 enable_per_list_interrupt = 1;
4139 do_spin_lock = 0;
4140 }
4141 }
4142 }
4143 } else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING)
4144 /* get fifo number based on skb->priority value */
4145 queue = config->fifo_mapping
Joe Perchesd44570e2009-08-24 17:29:44 +00004146 [skb->priority & (MAX_TX_FIFOS - 1)];
Surjit Reang2fda0962008-01-24 02:08:59 -08004147 fifo = &mac_control->fifos[queue];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004148
4149 if (do_spin_lock)
4150 spin_lock_irqsave(&fifo->tx_lock, flags);
4151 else {
4152 if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
4153 return NETDEV_TX_LOCKED;
4154 }
4155
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004156 if (sp->config.multiq) {
4157 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
4158 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4159 return NETDEV_TX_BUSY;
4160 }
David S. Millerb19fa1f2008-07-08 23:14:24 -07004161 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004162 if (netif_queue_stopped(dev)) {
4163 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4164 return NETDEV_TX_BUSY;
4165 }
4166 }
4167
Joe Perchesd44570e2009-08-24 17:29:44 +00004168 put_off = (u16)fifo->tx_curr_put_info.offset;
4169 get_off = (u16)fifo->tx_curr_get_info.offset;
4170 txdp = (struct TxD *)fifo->list_info[put_off].list_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004171
Surjit Reang2fda0962008-01-24 02:08:59 -08004172 queue_len = fifo->tx_curr_put_info.fifo_len + 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004173 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004174 if (txdp->Host_Control ||
Joe Perchesd44570e2009-08-24 17:29:44 +00004175 ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07004176 DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004177 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004178 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004179 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004180 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004181 }
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004182
Ananda Raju75c30b12006-07-24 19:55:09 -04004183 offload_type = s2io_offload_type(skb);
Ananda Raju75c30b12006-07-24 19:55:09 -04004184 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004185 txdp->Control_1 |= TXD_TCP_LSO_EN;
Ananda Raju75c30b12006-07-24 19:55:09 -04004186 txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
Linus Torvalds1da177e2005-04-16 15:20:36 -07004187 }
Patrick McHardy84fa7932006-08-29 16:44:56 -07004188 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004189 txdp->Control_2 |= (TXD_TX_CKO_IPV4_EN |
4190 TXD_TX_CKO_TCP_EN |
4191 TXD_TX_CKO_UDP_EN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004192 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004193 txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
4194 txdp->Control_1 |= TXD_LIST_OWN_XENA;
Surjit Reang2fda0962008-01-24 02:08:59 -08004195 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004196 if (enable_per_list_interrupt)
4197 if (put_off & (queue_len >> 5))
4198 txdp->Control_2 |= TXD_INT_TYPE_PER_LIST;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004199 if (vlan_tag) {
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004200 txdp->Control_2 |= TXD_VLAN_ENABLE;
4201 txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
4202 }
4203
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004204 frg_len = skb->len - skb->data_len;
Ananda Raju75c30b12006-07-24 19:55:09 -04004205 if (offload_type == SKB_GSO_UDP) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004206 int ufo_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004207
Ananda Raju75c30b12006-07-24 19:55:09 -04004208 ufo_size = s2io_udp_mss(skb);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004209 ufo_size &= ~7;
4210 txdp->Control_1 |= TXD_UFO_EN;
4211 txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
4212 txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
4213#ifdef __BIG_ENDIAN
Al Viro3459feb2008-03-16 22:23:14 +00004214 /* both variants do cpu_to_be64(be32_to_cpu(...)) */
Surjit Reang2fda0962008-01-24 02:08:59 -08004215 fifo->ufo_in_band_v[put_off] =
Joe Perchesd44570e2009-08-24 17:29:44 +00004216 (__force u64)skb_shinfo(skb)->ip6_frag_id;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004217#else
Surjit Reang2fda0962008-01-24 02:08:59 -08004218 fifo->ufo_in_band_v[put_off] =
Joe Perchesd44570e2009-08-24 17:29:44 +00004219 (__force u64)skb_shinfo(skb)->ip6_frag_id << 32;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004220#endif
Surjit Reang2fda0962008-01-24 02:08:59 -08004221 txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004222 txdp->Buffer_Pointer = pci_map_single(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00004223 fifo->ufo_in_band_v,
4224 sizeof(u64),
4225 PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004226 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004227 goto pci_map_failed;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004228 txdp++;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004229 }
4230
Joe Perchesd44570e2009-08-24 17:29:44 +00004231 txdp->Buffer_Pointer = pci_map_single(sp->pdev, skb->data,
4232 frg_len, PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004233 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004234 goto pci_map_failed;
4235
Joe Perchesd44570e2009-08-24 17:29:44 +00004236 txdp->Host_Control = (unsigned long)skb;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004237 txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
Ananda Raju75c30b12006-07-24 19:55:09 -04004238 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004239 txdp->Control_1 |= TXD_UFO_EN;
4240
4241 frg_cnt = skb_shinfo(skb)->nr_frags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004242 /* For fragmented SKB. */
4243 for (i = 0; i < frg_cnt; i++) {
4244 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004245 /* A '0' length fragment will be ignored */
4246 if (!frag->size)
4247 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004248 txdp++;
Joe Perchesd44570e2009-08-24 17:29:44 +00004249 txdp->Buffer_Pointer = (u64)pci_map_page(sp->pdev, frag->page,
4250 frag->page_offset,
4251 frag->size,
4252 PCI_DMA_TODEVICE);
Ananda Rajuefd51b52006-01-19 14:11:54 -05004253 txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
Ananda Raju75c30b12006-07-24 19:55:09 -04004254 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004255 txdp->Control_1 |= TXD_UFO_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004256 }
4257 txdp->Control_1 |= TXD_GATHER_CODE_LAST;
4258
Ananda Raju75c30b12006-07-24 19:55:09 -04004259 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004260 frg_cnt++; /* as Txd0 was used for inband header */
4261
Linus Torvalds1da177e2005-04-16 15:20:36 -07004262 tx_fifo = mac_control->tx_FIFO_start[queue];
Surjit Reang2fda0962008-01-24 02:08:59 -08004263 val64 = fifo->list_info[put_off].list_phy_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004264 writeq(val64, &tx_fifo->TxDL_Pointer);
4265
4266 val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
4267 TX_FIFO_LAST_LIST);
Ananda Raju75c30b12006-07-24 19:55:09 -04004268 if (offload_type)
4269 val64 |= TX_FIFO_SPECIAL_FUNC;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004270
Linus Torvalds1da177e2005-04-16 15:20:36 -07004271 writeq(val64, &tx_fifo->List_Control);
4272
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07004273 mmiowb();
4274
Linus Torvalds1da177e2005-04-16 15:20:36 -07004275 put_off++;
Surjit Reang2fda0962008-01-24 02:08:59 -08004276 if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
Ananda Raju863c11a2006-04-21 19:03:13 -04004277 put_off = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004278 fifo->tx_curr_put_info.offset = put_off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004279
4280 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004281 if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
Joe Perchesffb5df62009-08-24 17:29:47 +00004282 swstats->fifo_full_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004283 DBG_PRINT(TX_DBG,
4284 "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
4285 put_off, get_off);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004286 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004287 }
Joe Perchesffb5df62009-08-24 17:29:47 +00004288 swstats->mem_allocated += skb->truesize;
Surjit Reang2fda0962008-01-24 02:08:59 -08004289 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004290
Sreenivasa Honnurf6f4bfa2008-03-25 15:11:56 -04004291 if (sp->config.intr_type == MSI_X)
4292 tx_intr_handler(fifo);
4293
Patrick McHardy6ed10652009-06-23 06:03:08 +00004294 return NETDEV_TX_OK;
Joe Perchesffb5df62009-08-24 17:29:47 +00004295
Veena Parat491abf22007-07-23 02:37:14 -04004296pci_map_failed:
Joe Perchesffb5df62009-08-24 17:29:47 +00004297 swstats->pci_map_fail_cnt++;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004298 s2io_stop_tx_queue(sp, fifo->fifo_no);
Joe Perchesffb5df62009-08-24 17:29:47 +00004299 swstats->mem_freed += skb->truesize;
Veena Parat491abf22007-07-23 02:37:14 -04004300 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004301 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004302 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004303}
4304
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004305static void
4306s2io_alarm_handle(unsigned long data)
4307{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004308 struct s2io_nic *sp = (struct s2io_nic *)data;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004309 struct net_device *dev = sp->dev;
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004310
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004311 s2io_handle_errors(dev);
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004312 mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
4313}
4314
David Howells7d12e782006-10-05 14:55:46 +01004315static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004316{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004317 struct ring_info *ring = (struct ring_info *)dev_id;
4318 struct s2io_nic *sp = ring->nic;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004319 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004320
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004321 if (unlikely(!is_s2io_card_up(sp)))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004322 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004323
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004324 if (sp->config.napi) {
Al Viro1a79d1c2008-06-02 10:59:02 +01004325 u8 __iomem *addr = NULL;
4326 u8 val8 = 0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004327
Al Viro1a79d1c2008-06-02 10:59:02 +01004328 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004329 addr += (7 - ring->ring_no);
4330 val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
4331 writeb(val8, addr);
4332 val8 = readb(addr);
Ben Hutchings288379f2009-01-19 16:43:59 -08004333 napi_schedule(&ring->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004334 } else {
4335 rx_intr_handler(ring, 0);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004336 s2io_chk_rx_buffers(sp, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004337 }
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05004338
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004339 return IRQ_HANDLED;
4340}
4341
David Howells7d12e782006-10-05 14:55:46 +01004342static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004343{
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004344 int i;
4345 struct fifo_info *fifos = (struct fifo_info *)dev_id;
4346 struct s2io_nic *sp = fifos->nic;
4347 struct XENA_dev_config __iomem *bar0 = sp->bar0;
4348 struct config_param *config = &sp->config;
4349 u64 reason;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004350
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004351 if (unlikely(!is_s2io_card_up(sp)))
4352 return IRQ_NONE;
4353
4354 reason = readq(&bar0->general_int_status);
4355 if (unlikely(reason == S2IO_MINUS_ONE))
4356 /* Nothing much can be done. Get out */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004357 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004358
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004359 if (reason & (GEN_INTR_TXPIC | GEN_INTR_TXTRAFFIC)) {
4360 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004361
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004362 if (reason & GEN_INTR_TXPIC)
4363 s2io_txpic_intr_handle(sp);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004364
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004365 if (reason & GEN_INTR_TXTRAFFIC)
4366 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004367
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004368 for (i = 0; i < config->tx_fifo_num; i++)
4369 tx_intr_handler(&fifos[i]);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004370
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004371 writeq(sp->general_int_mask, &bar0->general_int_mask);
4372 readl(&bar0->general_int_status);
4373 return IRQ_HANDLED;
4374 }
4375 /* The interrupt was not raised by us */
4376 return IRQ_NONE;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004377}
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004378
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004379static void s2io_txpic_intr_handle(struct s2io_nic *sp)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004380{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004381 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004382 u64 val64;
4383
4384 val64 = readq(&bar0->pic_int_status);
4385 if (val64 & PIC_INT_GPIO) {
4386 val64 = readq(&bar0->gpio_int_reg);
4387 if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
4388 (val64 & GPIO_INT_REG_LINK_UP)) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004389 /*
4390 * This is unstable state so clear both up/down
4391 * interrupt and adapter to re-evaluate the link state.
4392 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004393 val64 |= GPIO_INT_REG_LINK_DOWN;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004394 val64 |= GPIO_INT_REG_LINK_UP;
4395 writeq(val64, &bar0->gpio_int_reg);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004396 val64 = readq(&bar0->gpio_int_mask);
4397 val64 &= ~(GPIO_INT_MASK_LINK_UP |
4398 GPIO_INT_MASK_LINK_DOWN);
4399 writeq(val64, &bar0->gpio_int_mask);
Joe Perchesd44570e2009-08-24 17:29:44 +00004400 } else if (val64 & GPIO_INT_REG_LINK_UP) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004401 val64 = readq(&bar0->adapter_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00004402 /* Enable Adapter */
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004403 val64 = readq(&bar0->adapter_control);
4404 val64 |= ADAPTER_CNTL_EN;
4405 writeq(val64, &bar0->adapter_control);
4406 val64 |= ADAPTER_LED_ON;
4407 writeq(val64, &bar0->adapter_control);
4408 if (!sp->device_enabled_once)
4409 sp->device_enabled_once = 1;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004410
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004411 s2io_link(sp, LINK_UP);
4412 /*
4413 * unmask link down interrupt and mask link-up
4414 * intr
4415 */
4416 val64 = readq(&bar0->gpio_int_mask);
4417 val64 &= ~GPIO_INT_MASK_LINK_DOWN;
4418 val64 |= GPIO_INT_MASK_LINK_UP;
4419 writeq(val64, &bar0->gpio_int_mask);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004420
Joe Perchesd44570e2009-08-24 17:29:44 +00004421 } else if (val64 & GPIO_INT_REG_LINK_DOWN) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004422 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004423 s2io_link(sp, LINK_DOWN);
4424 /* Link is down so unmaks link up interrupt */
4425 val64 = readq(&bar0->gpio_int_mask);
4426 val64 &= ~GPIO_INT_MASK_LINK_UP;
4427 val64 |= GPIO_INT_MASK_LINK_DOWN;
4428 writeq(val64, &bar0->gpio_int_mask);
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05004429
4430 /* turn off LED */
4431 val64 = readq(&bar0->adapter_control);
Joe Perchesd44570e2009-08-24 17:29:44 +00004432 val64 = val64 & (~ADAPTER_LED_ON);
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05004433 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004434 }
4435 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04004436 val64 = readq(&bar0->gpio_int_mask);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004437}
4438
Linus Torvalds1da177e2005-04-16 15:20:36 -07004439/**
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004440 * do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
4441 * @value: alarm bits
4442 * @addr: address value
4443 * @cnt: counter variable
4444 * Description: Check for alarm and increment the counter
4445 * Return Value:
4446 * 1 - if alarm bit set
4447 * 0 - if alarm bit is not set
4448 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004449static int do_s2io_chk_alarm_bit(u64 value, void __iomem *addr,
4450 unsigned long long *cnt)
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004451{
4452 u64 val64;
4453 val64 = readq(addr);
Joe Perchesd44570e2009-08-24 17:29:44 +00004454 if (val64 & value) {
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004455 writeq(val64, addr);
4456 (*cnt)++;
4457 return 1;
4458 }
4459 return 0;
4460
4461}
4462
4463/**
4464 * s2io_handle_errors - Xframe error indication handler
4465 * @nic: device private variable
4466 * Description: Handle alarms such as loss of link, single or
4467 * double ECC errors, critical and serious errors.
4468 * Return Value:
4469 * NONE
4470 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004471static void s2io_handle_errors(void *dev_id)
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004472{
Joe Perchesd44570e2009-08-24 17:29:44 +00004473 struct net_device *dev = (struct net_device *)dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004474 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004475 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Joe Perchesd44570e2009-08-24 17:29:44 +00004476 u64 temp64 = 0, val64 = 0;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004477 int i = 0;
4478
4479 struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
4480 struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;
4481
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004482 if (!is_s2io_card_up(sp))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004483 return;
4484
4485 if (pci_channel_offline(sp->pdev))
4486 return;
4487
4488 memset(&sw_stat->ring_full_cnt, 0,
Joe Perchesd44570e2009-08-24 17:29:44 +00004489 sizeof(sw_stat->ring_full_cnt));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004490
4491 /* Handling the XPAK counters update */
Joe Perchesd44570e2009-08-24 17:29:44 +00004492 if (stats->xpak_timer_count < 72000) {
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004493 /* waiting for an hour */
4494 stats->xpak_timer_count++;
4495 } else {
4496 s2io_updt_xpak_counter(dev);
4497 /* reset the count to zero */
4498 stats->xpak_timer_count = 0;
4499 }
4500
4501 /* Handling link status change error Intr */
4502 if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
4503 val64 = readq(&bar0->mac_rmac_err_reg);
4504 writeq(val64, &bar0->mac_rmac_err_reg);
4505 if (val64 & RMAC_LINK_STATE_CHANGE_INT)
4506 schedule_work(&sp->set_link_task);
4507 }
4508
4509 /* In case of a serious error, the device will be Reset. */
4510 if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
Joe Perchesd44570e2009-08-24 17:29:44 +00004511 &sw_stat->serious_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004512 goto reset;
4513
4514 /* Check for data parity error */
4515 if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
Joe Perchesd44570e2009-08-24 17:29:44 +00004516 &sw_stat->parity_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004517 goto reset;
4518
4519 /* Check for ring full counter */
4520 if (sp->device_type == XFRAME_II_DEVICE) {
4521 val64 = readq(&bar0->ring_bump_counter1);
Joe Perchesd44570e2009-08-24 17:29:44 +00004522 for (i = 0; i < 4; i++) {
4523 temp64 = (val64 & vBIT(0xFFFF, (i*16), 16));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004524 temp64 >>= 64 - ((i+1)*16);
4525 sw_stat->ring_full_cnt[i] += temp64;
4526 }
4527
4528 val64 = readq(&bar0->ring_bump_counter2);
Joe Perchesd44570e2009-08-24 17:29:44 +00004529 for (i = 0; i < 4; i++) {
4530 temp64 = (val64 & vBIT(0xFFFF, (i*16), 16));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004531 temp64 >>= 64 - ((i+1)*16);
Joe Perchesd44570e2009-08-24 17:29:44 +00004532 sw_stat->ring_full_cnt[i+4] += temp64;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004533 }
4534 }
4535
4536 val64 = readq(&bar0->txdma_int_status);
4537 /*check for pfc_err*/
4538 if (val64 & TXDMA_PFC_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004539 if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
4540 PFC_MISC_0_ERR | PFC_MISC_1_ERR |
4541 PFC_PCIX_ERR,
4542 &bar0->pfc_err_reg,
4543 &sw_stat->pfc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004544 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004545 do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR,
4546 &bar0->pfc_err_reg,
4547 &sw_stat->pfc_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004548 }
4549
4550 /*check for tda_err*/
4551 if (val64 & TXDMA_TDA_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004552 if (do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR |
4553 TDA_SM0_ERR_ALARM |
4554 TDA_SM1_ERR_ALARM,
4555 &bar0->tda_err_reg,
4556 &sw_stat->tda_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004557 goto reset;
4558 do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004559 &bar0->tda_err_reg,
4560 &sw_stat->tda_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004561 }
4562 /*check for pcc_err*/
4563 if (val64 & TXDMA_PCC_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004564 if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
4565 PCC_N_SERR | PCC_6_COF_OV_ERR |
4566 PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
4567 PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR |
4568 PCC_TXB_ECC_DB_ERR,
4569 &bar0->pcc_err_reg,
4570 &sw_stat->pcc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004571 goto reset;
4572 do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004573 &bar0->pcc_err_reg,
4574 &sw_stat->pcc_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004575 }
4576
4577 /*check for tti_err*/
4578 if (val64 & TXDMA_TTI_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004579 if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM,
4580 &bar0->tti_err_reg,
4581 &sw_stat->tti_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004582 goto reset;
4583 do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004584 &bar0->tti_err_reg,
4585 &sw_stat->tti_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004586 }
4587
4588 /*check for lso_err*/
4589 if (val64 & TXDMA_LSO_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004590 if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT |
4591 LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
4592 &bar0->lso_err_reg,
4593 &sw_stat->lso_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004594 goto reset;
4595 do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
Joe Perchesd44570e2009-08-24 17:29:44 +00004596 &bar0->lso_err_reg,
4597 &sw_stat->lso_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004598 }
4599
4600 /*check for tpa_err*/
4601 if (val64 & TXDMA_TPA_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004602 if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM,
4603 &bar0->tpa_err_reg,
4604 &sw_stat->tpa_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004605 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004606 do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP,
4607 &bar0->tpa_err_reg,
4608 &sw_stat->tpa_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004609 }
4610
4611 /*check for sm_err*/
4612 if (val64 & TXDMA_SM_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004613 if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM,
4614 &bar0->sm_err_reg,
4615 &sw_stat->sm_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004616 goto reset;
4617 }
4618
4619 val64 = readq(&bar0->mac_int_status);
4620 if (val64 & MAC_INT_STATUS_TMAC_INT) {
4621 if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004622 &bar0->mac_tmac_err_reg,
4623 &sw_stat->mac_tmac_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004624 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004625 do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
4626 TMAC_DESC_ECC_SG_ERR |
4627 TMAC_DESC_ECC_DB_ERR,
4628 &bar0->mac_tmac_err_reg,
4629 &sw_stat->mac_tmac_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004630 }
4631
4632 val64 = readq(&bar0->xgxs_int_status);
4633 if (val64 & XGXS_INT_STATUS_TXGXS) {
4634 if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004635 &bar0->xgxs_txgxs_err_reg,
4636 &sw_stat->xgxs_txgxs_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004637 goto reset;
4638 do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004639 &bar0->xgxs_txgxs_err_reg,
4640 &sw_stat->xgxs_txgxs_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004641 }
4642
4643 val64 = readq(&bar0->rxdma_int_status);
4644 if (val64 & RXDMA_INT_RC_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004645 if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR |
4646 RC_FTC_ECC_DB_ERR |
4647 RC_PRCn_SM_ERR_ALARM |
4648 RC_FTC_SM_ERR_ALARM,
4649 &bar0->rc_err_reg,
4650 &sw_stat->rc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004651 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004652 do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR |
4653 RC_FTC_ECC_SG_ERR |
4654 RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
4655 &sw_stat->rc_err_cnt);
4656 if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn |
4657 PRC_PCI_AB_WR_Rn |
4658 PRC_PCI_AB_F_WR_Rn,
4659 &bar0->prc_pcix_err_reg,
4660 &sw_stat->prc_pcix_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004661 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004662 do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn |
4663 PRC_PCI_DP_WR_Rn |
4664 PRC_PCI_DP_F_WR_Rn,
4665 &bar0->prc_pcix_err_reg,
4666 &sw_stat->prc_pcix_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004667 }
4668
4669 if (val64 & RXDMA_INT_RPA_INT_M) {
4670 if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004671 &bar0->rpa_err_reg,
4672 &sw_stat->rpa_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004673 goto reset;
4674 do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004675 &bar0->rpa_err_reg,
4676 &sw_stat->rpa_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004677 }
4678
4679 if (val64 & RXDMA_INT_RDA_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004680 if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR |
4681 RDA_FRM_ECC_DB_N_AERR |
4682 RDA_SM1_ERR_ALARM |
4683 RDA_SM0_ERR_ALARM |
4684 RDA_RXD_ECC_DB_SERR,
4685 &bar0->rda_err_reg,
4686 &sw_stat->rda_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004687 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004688 do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR |
4689 RDA_FRM_ECC_SG_ERR |
4690 RDA_MISC_ERR |
4691 RDA_PCIX_ERR,
4692 &bar0->rda_err_reg,
4693 &sw_stat->rda_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004694 }
4695
4696 if (val64 & RXDMA_INT_RTI_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004697 if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM,
4698 &bar0->rti_err_reg,
4699 &sw_stat->rti_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004700 goto reset;
4701 do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004702 &bar0->rti_err_reg,
4703 &sw_stat->rti_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004704 }
4705
4706 val64 = readq(&bar0->mac_int_status);
4707 if (val64 & MAC_INT_STATUS_RMAC_INT) {
4708 if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004709 &bar0->mac_rmac_err_reg,
4710 &sw_stat->mac_rmac_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004711 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004712 do_s2io_chk_alarm_bit(RMAC_UNUSED_INT |
4713 RMAC_SINGLE_ECC_ERR |
4714 RMAC_DOUBLE_ECC_ERR,
4715 &bar0->mac_rmac_err_reg,
4716 &sw_stat->mac_rmac_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004717 }
4718
4719 val64 = readq(&bar0->xgxs_int_status);
4720 if (val64 & XGXS_INT_STATUS_RXGXS) {
4721 if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004722 &bar0->xgxs_rxgxs_err_reg,
4723 &sw_stat->xgxs_rxgxs_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004724 goto reset;
4725 }
4726
4727 val64 = readq(&bar0->mc_int_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00004728 if (val64 & MC_INT_STATUS_MC_INT) {
4729 if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR,
4730 &bar0->mc_err_reg,
4731 &sw_stat->mc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004732 goto reset;
4733
4734 /* Handling Ecc errors */
4735 if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
4736 writeq(val64, &bar0->mc_err_reg);
4737 if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
4738 sw_stat->double_ecc_errs++;
4739 if (sp->device_type != XFRAME_II_DEVICE) {
4740 /*
4741 * Reset XframeI only if critical error
4742 */
4743 if (val64 &
Joe Perchesd44570e2009-08-24 17:29:44 +00004744 (MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
4745 MC_ERR_REG_MIRI_ECC_DB_ERR_1))
4746 goto reset;
4747 }
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004748 } else
4749 sw_stat->single_ecc_errs++;
4750 }
4751 }
4752 return;
4753
4754reset:
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004755 s2io_stop_all_tx_queue(sp);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004756 schedule_work(&sp->rst_timer_task);
4757 sw_stat->soft_reset_cnt++;
4758 return;
4759}
4760
4761/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07004762 * s2io_isr - ISR handler of the device .
4763 * @irq: the irq of the device.
4764 * @dev_id: a void pointer to the dev structure of the NIC.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004765 * Description: This function is the ISR handler of the device. It
4766 * identifies the reason for the interrupt and calls the relevant
4767 * service routines. As a contongency measure, this ISR allocates the
Linus Torvalds1da177e2005-04-16 15:20:36 -07004768 * recv buffers, if their numbers are below the panic value which is
4769 * presently set to 25% of the original number of rcv buffers allocated.
4770 * Return value:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004771 * IRQ_HANDLED: will be returned if IRQ was handled by this routine
Linus Torvalds1da177e2005-04-16 15:20:36 -07004772 * IRQ_NONE: will be returned if interrupt is not from our device
4773 */
David Howells7d12e782006-10-05 14:55:46 +01004774static irqreturn_t s2io_isr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004775{
Joe Perchesd44570e2009-08-24 17:29:44 +00004776 struct net_device *dev = (struct net_device *)dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004777 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004778 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004779 int i;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004780 u64 reason = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004781 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004782 struct config_param *config;
4783
Linas Vepstasd796fdb2007-05-14 18:37:30 -05004784 /* Pretend we handled any irq's from a disconnected card */
4785 if (pci_channel_offline(sp->pdev))
4786 return IRQ_NONE;
4787
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004788 if (!is_s2io_card_up(sp))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004789 return IRQ_NONE;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004790
Linus Torvalds1da177e2005-04-16 15:20:36 -07004791 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00004792 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004793
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004794 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07004795 * Identify the cause for interrupt and call the appropriate
4796 * interrupt handler. Causes for the interrupt could be;
4797 * 1. Rx of packet.
4798 * 2. Tx complete.
4799 * 3. Link down.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004800 */
4801 reason = readq(&bar0->general_int_status);
4802
Joe Perchesd44570e2009-08-24 17:29:44 +00004803 if (unlikely(reason == S2IO_MINUS_ONE))
4804 return IRQ_HANDLED; /* Nothing much can be done. Get out */
Linus Torvalds1da177e2005-04-16 15:20:36 -07004805
Joe Perchesd44570e2009-08-24 17:29:44 +00004806 if (reason &
4807 (GEN_INTR_RXTRAFFIC | GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC)) {
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004808 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
4809
4810 if (config->napi) {
4811 if (reason & GEN_INTR_RXTRAFFIC) {
Ben Hutchings288379f2009-01-19 16:43:59 -08004812 napi_schedule(&sp->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004813 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
4814 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4815 readl(&bar0->rx_traffic_int);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004816 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004817 } else {
4818 /*
4819 * rx_traffic_int reg is an R1 register, writing all 1's
4820 * will ensure that the actual interrupt causing bit
4821 * get's cleared and hence a read can be avoided.
4822 */
4823 if (reason & GEN_INTR_RXTRAFFIC)
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004824 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004825
Joe Perches13d866a2009-08-24 17:29:41 +00004826 for (i = 0; i < config->rx_ring_num; i++) {
4827 struct ring_info *ring = &mac_control->rings[i];
4828
4829 rx_intr_handler(ring, 0);
4830 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004831 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004832
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004833 /*
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004834 * tx_traffic_int reg is an R1 register, writing all 1's
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004835 * will ensure that the actual interrupt causing bit get's
4836 * cleared and hence a read can be avoided.
4837 */
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004838 if (reason & GEN_INTR_TXTRAFFIC)
4839 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004840
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004841 for (i = 0; i < config->tx_fifo_num; i++)
4842 tx_intr_handler(&mac_control->fifos[i]);
4843
4844 if (reason & GEN_INTR_TXPIC)
4845 s2io_txpic_intr_handle(sp);
4846
4847 /*
4848 * Reallocate the buffers from the interrupt handler itself.
4849 */
4850 if (!config->napi) {
Joe Perches13d866a2009-08-24 17:29:41 +00004851 for (i = 0; i < config->rx_ring_num; i++) {
4852 struct ring_info *ring = &mac_control->rings[i];
4853
4854 s2io_chk_rx_buffers(sp, ring);
4855 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004856 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004857 writeq(sp->general_int_mask, &bar0->general_int_mask);
4858 readl(&bar0->general_int_status);
4859
4860 return IRQ_HANDLED;
4861
Joe Perchesd44570e2009-08-24 17:29:44 +00004862 } else if (!reason) {
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004863 /* The interrupt was not raised by us */
4864 return IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004865 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004866
Linus Torvalds1da177e2005-04-16 15:20:36 -07004867 return IRQ_HANDLED;
4868}
4869
4870/**
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004871 * s2io_updt_stats -
4872 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004873static void s2io_updt_stats(struct s2io_nic *sp)
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004874{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004875 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004876 u64 val64;
4877 int cnt = 0;
4878
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004879 if (is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004880 /* Apprx 30us on a 133 MHz bus */
4881 val64 = SET_UPDT_CLICKS(10) |
4882 STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
4883 writeq(val64, &bar0->stat_cfg);
4884 do {
4885 udelay(100);
4886 val64 = readq(&bar0->stat_cfg);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07004887 if (!(val64 & s2BIT(0)))
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004888 break;
4889 cnt++;
4890 if (cnt == 5)
4891 break; /* Updt failed */
Joe Perchesd44570e2009-08-24 17:29:44 +00004892 } while (1);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04004893 }
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004894}
4895
4896/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004897 * s2io_get_stats - Updates the device statistics structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004898 * @dev : pointer to the device structure.
4899 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004900 * This function updates the device statistics structure in the s2io_nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07004901 * structure and returns a pointer to the same.
4902 * Return value:
4903 * pointer to the updated net_device_stats structure.
4904 */
4905
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004906static struct net_device_stats *s2io_get_stats(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004907{
Wang Chen4cf16532008-11-12 23:38:14 -08004908 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00004909 struct config_param *config = &sp->config;
4910 struct mac_info *mac_control = &sp->mac_control;
4911 struct stat_block *stats = mac_control->stats_info;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004912 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004913
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004914 /* Configure Stats for immediate updt */
4915 s2io_updt_stats(sp);
4916
Breno Leitaodc56e632008-07-22 16:27:20 -03004917 /* Using sp->stats as a staging area, because reset (due to mtu
4918 change, for example) will clear some hardware counters */
Joe Perchesffb5df62009-08-24 17:29:47 +00004919 dev->stats.tx_packets += le32_to_cpu(stats->tmac_frms) -
Breno Leitaodc56e632008-07-22 16:27:20 -03004920 sp->stats.tx_packets;
Joe Perchesffb5df62009-08-24 17:29:47 +00004921 sp->stats.tx_packets = le32_to_cpu(stats->tmac_frms);
4922
4923 dev->stats.tx_errors += le32_to_cpu(stats->tmac_any_err_frms) -
Breno Leitaodc56e632008-07-22 16:27:20 -03004924 sp->stats.tx_errors;
Joe Perchesffb5df62009-08-24 17:29:47 +00004925 sp->stats.tx_errors = le32_to_cpu(stats->tmac_any_err_frms);
4926
4927 dev->stats.rx_errors += le64_to_cpu(stats->rmac_drop_frms) -
Breno Leitaodc56e632008-07-22 16:27:20 -03004928 sp->stats.rx_errors;
Joe Perchesffb5df62009-08-24 17:29:47 +00004929 sp->stats.rx_errors = le64_to_cpu(stats->rmac_drop_frms);
4930
4931 dev->stats.multicast = le32_to_cpu(stats->rmac_vld_mcst_frms) -
Breno Leitaodc56e632008-07-22 16:27:20 -03004932 sp->stats.multicast;
Joe Perchesffb5df62009-08-24 17:29:47 +00004933 sp->stats.multicast = le32_to_cpu(stats->rmac_vld_mcst_frms);
4934
4935 dev->stats.rx_length_errors = le64_to_cpu(stats->rmac_long_frms) -
Breno Leitaodc56e632008-07-22 16:27:20 -03004936 sp->stats.rx_length_errors;
Joe Perchesffb5df62009-08-24 17:29:47 +00004937 sp->stats.rx_length_errors = le64_to_cpu(stats->rmac_long_frms);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004938
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004939 /* collect per-ring rx_packets and rx_bytes */
Breno Leitaodc56e632008-07-22 16:27:20 -03004940 dev->stats.rx_packets = dev->stats.rx_bytes = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004941 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00004942 struct ring_info *ring = &mac_control->rings[i];
4943
4944 dev->stats.rx_packets += ring->rx_packets;
4945 dev->stats.rx_bytes += ring->rx_bytes;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004946 }
4947
Joe Perchesd44570e2009-08-24 17:29:44 +00004948 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004949}
4950
4951/**
4952 * s2io_set_multicast - entry point for multicast address enable/disable.
4953 * @dev : pointer to the device structure
4954 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004955 * This function is a driver entry point which gets called by the kernel
4956 * whenever multicast addresses must be enabled/disabled. This also gets
Linus Torvalds1da177e2005-04-16 15:20:36 -07004957 * called to set/reset promiscuous mode. Depending on the deivce flag, we
4958 * determine, if multicast address must be enabled or if promiscuous mode
4959 * is to be disabled etc.
4960 * Return value:
4961 * void.
4962 */
4963
4964static void s2io_set_multicast(struct net_device *dev)
4965{
4966 int i, j, prev_cnt;
4967 struct dev_mc_list *mclist;
Wang Chen4cf16532008-11-12 23:38:14 -08004968 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004969 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004970 u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
Joe Perchesd44570e2009-08-24 17:29:44 +00004971 0xfeffffffffffULL;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004972 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004973 void __iomem *add;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004974 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004975
4976 if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
4977 /* Enable all Multicast addresses */
4978 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
4979 &bar0->rmac_addr_data0_mem);
4980 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
4981 &bar0->rmac_addr_data1_mem);
4982 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00004983 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4984 RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004985 writeq(val64, &bar0->rmac_addr_cmd_mem);
4986 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004987 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00004988 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
4989 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004990
4991 sp->m_cast_flg = 1;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004992 sp->all_multi_pos = config->max_mc_addr - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004993 } else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
4994 /* Disable all Multicast addresses */
4995 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
4996 &bar0->rmac_addr_data0_mem);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07004997 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
4998 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004999 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00005000 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5001 RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005002 writeq(val64, &bar0->rmac_addr_cmd_mem);
5003 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005004 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005005 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5006 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005007
5008 sp->m_cast_flg = 0;
5009 sp->all_multi_pos = 0;
5010 }
5011
5012 if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
5013 /* Put the NIC into promiscuous mode */
5014 add = &bar0->mac_cfg;
5015 val64 = readq(&bar0->mac_cfg);
5016 val64 |= MAC_CFG_RMAC_PROM_ENABLE;
5017
5018 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00005019 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005020 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5021 writel((u32) (val64 >> 32), (add + 4));
5022
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005023 if (vlan_tag_strip != 1) {
5024 val64 = readq(&bar0->rx_pa_cfg);
5025 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
5026 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005027 sp->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005028 }
5029
Linus Torvalds1da177e2005-04-16 15:20:36 -07005030 val64 = readq(&bar0->mac_cfg);
5031 sp->promisc_flg = 1;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07005032 DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005033 dev->name);
5034 } else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
5035 /* Remove the NIC from promiscuous mode */
5036 add = &bar0->mac_cfg;
5037 val64 = readq(&bar0->mac_cfg);
5038 val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;
5039
5040 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00005041 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005042 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5043 writel((u32) (val64 >> 32), (add + 4));
5044
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005045 if (vlan_tag_strip != 0) {
5046 val64 = readq(&bar0->rx_pa_cfg);
5047 val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
5048 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005049 sp->vlan_strip_flag = 1;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005050 }
5051
Linus Torvalds1da177e2005-04-16 15:20:36 -07005052 val64 = readq(&bar0->mac_cfg);
5053 sp->promisc_flg = 0;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005054 DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005055 }
5056
5057 /* Update individual M_CAST address list */
5058 if ((!sp->m_cast_flg) && dev->mc_count) {
5059 if (dev->mc_count >
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005060 (config->max_mc_addr - config->max_mac_addr)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005061 DBG_PRINT(ERR_DBG,
5062 "%s: No more Rx filters can be added - "
5063 "please enable ALL_MULTI instead\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005064 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005065 return;
5066 }
5067
5068 prev_cnt = sp->mc_addr_count;
5069 sp->mc_addr_count = dev->mc_count;
5070
5071 /* Clear out the previous list of Mc in the H/W. */
5072 for (i = 0; i < prev_cnt; i++) {
5073 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
5074 &bar0->rmac_addr_data0_mem);
5075 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
Joe Perchesd44570e2009-08-24 17:29:44 +00005076 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005077 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00005078 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5079 RMAC_ADDR_CMD_MEM_OFFSET
5080 (config->mc_start_offset + i);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005081 writeq(val64, &bar0->rmac_addr_cmd_mem);
5082
5083 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005084 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005085 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5086 S2IO_BIT_RESET)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005087 DBG_PRINT(ERR_DBG,
5088 "%s: Adding Multicasts failed\n",
5089 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005090 return;
5091 }
5092 }
5093
5094 /* Create the new Rx filter list and update the same in H/W. */
5095 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
5096 i++, mclist = mclist->next) {
5097 memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
5098 ETH_ALEN);
Jeff Garzika7a80d52006-03-04 12:06:51 -05005099 mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005100 for (j = 0; j < ETH_ALEN; j++) {
5101 mac_addr |= mclist->dmi_addr[j];
5102 mac_addr <<= 8;
5103 }
5104 mac_addr >>= 8;
5105 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
5106 &bar0->rmac_addr_data0_mem);
5107 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
Joe Perchesd44570e2009-08-24 17:29:44 +00005108 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005109 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00005110 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5111 RMAC_ADDR_CMD_MEM_OFFSET
5112 (i + config->mc_start_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005113 writeq(val64, &bar0->rmac_addr_cmd_mem);
5114
5115 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005116 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005117 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5118 S2IO_BIT_RESET)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005119 DBG_PRINT(ERR_DBG,
5120 "%s: Adding Multicasts failed\n",
5121 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005122 return;
5123 }
5124 }
5125 }
5126}
5127
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005128/* read from CAM unicast & multicast addresses and store it in
5129 * def_mac_addr structure
5130 */
Hannes Ederdac499f2008-12-25 23:56:45 -08005131static void do_s2io_store_unicast_mc(struct s2io_nic *sp)
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005132{
5133 int offset;
5134 u64 mac_addr = 0x0;
5135 struct config_param *config = &sp->config;
5136
5137 /* store unicast & multicast mac addresses */
5138 for (offset = 0; offset < config->max_mc_addr; offset++) {
5139 mac_addr = do_s2io_read_unicast_mc(sp, offset);
5140 /* if read fails disable the entry */
5141 if (mac_addr == FAILURE)
5142 mac_addr = S2IO_DISABLE_MAC_ENTRY;
5143 do_s2io_copy_mac_addr(sp, offset, mac_addr);
5144 }
5145}
5146
5147/* restore unicast & multicast MAC to CAM from def_mac_addr structure */
5148static void do_s2io_restore_unicast_mc(struct s2io_nic *sp)
5149{
5150 int offset;
5151 struct config_param *config = &sp->config;
5152 /* restore unicast mac address */
5153 for (offset = 0; offset < config->max_mac_addr; offset++)
5154 do_s2io_prog_unicast(sp->dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005155 sp->def_mac_addr[offset].mac_addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005156
5157 /* restore multicast mac address */
5158 for (offset = config->mc_start_offset;
Joe Perchesd44570e2009-08-24 17:29:44 +00005159 offset < config->max_mc_addr; offset++)
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005160 do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr);
5161}
5162
5163/* add a multicast MAC address to CAM */
5164static int do_s2io_add_mc(struct s2io_nic *sp, u8 *addr)
5165{
5166 int i;
5167 u64 mac_addr = 0;
5168 struct config_param *config = &sp->config;
5169
5170 for (i = 0; i < ETH_ALEN; i++) {
5171 mac_addr <<= 8;
5172 mac_addr |= addr[i];
5173 }
5174 if ((0ULL == mac_addr) || (mac_addr == S2IO_DISABLE_MAC_ENTRY))
5175 return SUCCESS;
5176
5177 /* check if the multicast mac already preset in CAM */
5178 for (i = config->mc_start_offset; i < config->max_mc_addr; i++) {
5179 u64 tmp64;
5180 tmp64 = do_s2io_read_unicast_mc(sp, i);
5181 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5182 break;
5183
5184 if (tmp64 == mac_addr)
5185 return SUCCESS;
5186 }
5187 if (i == config->max_mc_addr) {
5188 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00005189 "CAM full no space left for multicast MAC\n");
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005190 return FAILURE;
5191 }
5192 /* Update the internal structure with this new mac address */
5193 do_s2io_copy_mac_addr(sp, i, mac_addr);
5194
Joe Perchesd44570e2009-08-24 17:29:44 +00005195 return do_s2io_add_mac(sp, mac_addr, i);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005196}
5197
5198/* add MAC address to CAM */
5199static int do_s2io_add_mac(struct s2io_nic *sp, u64 addr, int off)
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005200{
5201 u64 val64;
5202 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5203
5204 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr),
Joe Perchesd44570e2009-08-24 17:29:44 +00005205 &bar0->rmac_addr_data0_mem);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005206
Joe Perchesd44570e2009-08-24 17:29:44 +00005207 val64 = RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005208 RMAC_ADDR_CMD_MEM_OFFSET(off);
5209 writeq(val64, &bar0->rmac_addr_cmd_mem);
5210
5211 /* Wait till command completes */
5212 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005213 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5214 S2IO_BIT_RESET)) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005215 DBG_PRINT(INFO_DBG, "do_s2io_add_mac failed\n");
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005216 return FAILURE;
5217 }
5218 return SUCCESS;
5219}
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005220/* deletes a specified unicast/multicast mac entry from CAM */
5221static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr)
5222{
5223 int offset;
5224 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, tmp64;
5225 struct config_param *config = &sp->config;
5226
5227 for (offset = 1;
Joe Perchesd44570e2009-08-24 17:29:44 +00005228 offset < config->max_mc_addr; offset++) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005229 tmp64 = do_s2io_read_unicast_mc(sp, offset);
5230 if (tmp64 == addr) {
5231 /* disable the entry by writing 0xffffffffffffULL */
5232 if (do_s2io_add_mac(sp, dis_addr, offset) == FAILURE)
5233 return FAILURE;
5234 /* store the new mac list from CAM */
5235 do_s2io_store_unicast_mc(sp);
5236 return SUCCESS;
5237 }
5238 }
5239 DBG_PRINT(ERR_DBG, "MAC address 0x%llx not found in CAM\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00005240 (unsigned long long)addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005241 return FAILURE;
5242}
5243
5244/* read mac entries from CAM */
5245static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
5246{
5247 u64 tmp64 = 0xffffffffffff0000ULL, val64;
5248 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5249
5250 /* read mac addr */
Joe Perchesd44570e2009-08-24 17:29:44 +00005251 val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005252 RMAC_ADDR_CMD_MEM_OFFSET(offset);
5253 writeq(val64, &bar0->rmac_addr_cmd_mem);
5254
5255 /* Wait till command completes */
5256 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005257 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5258 S2IO_BIT_RESET)) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005259 DBG_PRINT(INFO_DBG, "do_s2io_read_unicast_mc failed\n");
5260 return FAILURE;
5261 }
5262 tmp64 = readq(&bar0->rmac_addr_data0_mem);
Joe Perchesd44570e2009-08-24 17:29:44 +00005263
5264 return tmp64 >> 16;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005265}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005266
Linus Torvalds1da177e2005-04-16 15:20:36 -07005267/**
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005268 * s2io_set_mac_addr driver entry point
5269 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005270
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005271static int s2io_set_mac_addr(struct net_device *dev, void *p)
5272{
5273 struct sockaddr *addr = p;
5274
5275 if (!is_valid_ether_addr(addr->sa_data))
5276 return -EINVAL;
5277
5278 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
5279
5280 /* store the MAC address in CAM */
Joe Perchesd44570e2009-08-24 17:29:44 +00005281 return do_s2io_prog_unicast(dev, dev->dev_addr);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005282}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005283/**
5284 * do_s2io_prog_unicast - Programs the Xframe mac address
Linus Torvalds1da177e2005-04-16 15:20:36 -07005285 * @dev : pointer to the device structure.
5286 * @addr: a uchar pointer to the new mac address which is to be set.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005287 * Description : This procedure will program the Xframe to receive
Linus Torvalds1da177e2005-04-16 15:20:36 -07005288 * frames with new Mac Address
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005289 * Return value: SUCCESS on success and an appropriate (-)ve integer
Linus Torvalds1da177e2005-04-16 15:20:36 -07005290 * as defined in errno.h file on failure.
5291 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005292
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005293static int do_s2io_prog_unicast(struct net_device *dev, u8 *addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005294{
Wang Chen4cf16532008-11-12 23:38:14 -08005295 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005296 register u64 mac_addr = 0, perm_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005297 int i;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005298 u64 tmp64;
5299 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005300
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005301 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00005302 * Set the new MAC address as the new unicast filter and reflect this
5303 * change on the device address registered with the OS. It will be
5304 * at offset 0.
5305 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005306 for (i = 0; i < ETH_ALEN; i++) {
5307 mac_addr <<= 8;
5308 mac_addr |= addr[i];
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005309 perm_addr <<= 8;
5310 perm_addr |= sp->def_mac_addr[0].mac_addr[i];
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005311 }
5312
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005313 /* check if the dev_addr is different than perm_addr */
5314 if (mac_addr == perm_addr)
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005315 return SUCCESS;
5316
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005317 /* check if the mac already preset in CAM */
5318 for (i = 1; i < config->max_mac_addr; i++) {
5319 tmp64 = do_s2io_read_unicast_mc(sp, i);
5320 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5321 break;
5322
5323 if (tmp64 == mac_addr) {
5324 DBG_PRINT(INFO_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00005325 "MAC addr:0x%llx already present in CAM\n",
5326 (unsigned long long)mac_addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005327 return SUCCESS;
5328 }
5329 }
5330 if (i == config->max_mac_addr) {
5331 DBG_PRINT(ERR_DBG, "CAM full no space left for Unicast MAC\n");
5332 return FAILURE;
5333 }
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005334 /* Update the internal structure with this new mac address */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005335 do_s2io_copy_mac_addr(sp, i, mac_addr);
Joe Perchesd44570e2009-08-24 17:29:44 +00005336
5337 return do_s2io_add_mac(sp, mac_addr, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005338}
5339
5340/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005341 * s2io_ethtool_sset - Sets different link parameters.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005342 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
5343 * @info: pointer to the structure with parameters given by ethtool to set
5344 * link information.
5345 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005346 * The function sets different link parameters provided by the user onto
Linus Torvalds1da177e2005-04-16 15:20:36 -07005347 * the NIC.
5348 * Return value:
5349 * 0 on success.
Joe Perchesd44570e2009-08-24 17:29:44 +00005350 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005351
5352static int s2io_ethtool_sset(struct net_device *dev,
5353 struct ethtool_cmd *info)
5354{
Wang Chen4cf16532008-11-12 23:38:14 -08005355 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005356 if ((info->autoneg == AUTONEG_ENABLE) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00005357 (info->speed != SPEED_10000) ||
5358 (info->duplex != DUPLEX_FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005359 return -EINVAL;
5360 else {
5361 s2io_close(sp->dev);
5362 s2io_open(sp->dev);
5363 }
5364
5365 return 0;
5366}
5367
5368/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005369 * s2io_ethtol_gset - Return link specific information.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005370 * @sp : private member of the device structure, pointer to the
5371 * s2io_nic structure.
5372 * @info : pointer to the structure with parameters given by ethtool
5373 * to return link information.
5374 * Description:
5375 * Returns link specific information like speed, duplex etc.. to ethtool.
5376 * Return value :
5377 * return 0 on success.
5378 */
5379
5380static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
5381{
Wang Chen4cf16532008-11-12 23:38:14 -08005382 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005383 info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5384 info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5385 info->port = PORT_FIBRE;
Sivakumar Subramani1a7eb722007-09-14 07:43:16 -04005386
5387 /* info->transceiver */
5388 info->transceiver = XCVR_EXTERNAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005389
5390 if (netif_carrier_ok(sp->dev)) {
5391 info->speed = 10000;
5392 info->duplex = DUPLEX_FULL;
5393 } else {
5394 info->speed = -1;
5395 info->duplex = -1;
5396 }
5397
5398 info->autoneg = AUTONEG_DISABLE;
5399 return 0;
5400}
5401
5402/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005403 * s2io_ethtool_gdrvinfo - Returns driver specific information.
5404 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005405 * s2io_nic structure.
5406 * @info : pointer to the structure with parameters given by ethtool to
5407 * return driver information.
5408 * Description:
5409 * Returns driver specefic information like name, version etc.. to ethtool.
5410 * Return value:
5411 * void
5412 */
5413
5414static void s2io_ethtool_gdrvinfo(struct net_device *dev,
5415 struct ethtool_drvinfo *info)
5416{
Wang Chen4cf16532008-11-12 23:38:14 -08005417 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005418
John W. Linvilledbc23092005-09-28 17:50:51 -04005419 strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
5420 strncpy(info->version, s2io_driver_version, sizeof(info->version));
5421 strncpy(info->fw_version, "", sizeof(info->fw_version));
5422 strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
Linus Torvalds1da177e2005-04-16 15:20:36 -07005423 info->regdump_len = XENA_REG_SPACE;
5424 info->eedump_len = XENA_EEPROM_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005425}
5426
5427/**
5428 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005429 * @sp: private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005430 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005431 * @regs : pointer to the structure with parameters given by ethtool for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005432 * dumping the registers.
5433 * @reg_space: The input argumnet into which all the registers are dumped.
5434 * Description:
5435 * Dumps the entire register space of xFrame NIC into the user given
5436 * buffer area.
5437 * Return value :
5438 * void .
Joe Perchesd44570e2009-08-24 17:29:44 +00005439 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005440
5441static void s2io_ethtool_gregs(struct net_device *dev,
5442 struct ethtool_regs *regs, void *space)
5443{
5444 int i;
5445 u64 reg;
Joe Perchesd44570e2009-08-24 17:29:44 +00005446 u8 *reg_space = (u8 *)space;
Wang Chen4cf16532008-11-12 23:38:14 -08005447 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005448
5449 regs->len = XENA_REG_SPACE;
5450 regs->version = sp->pdev->subsystem_device;
5451
5452 for (i = 0; i < regs->len; i += 8) {
5453 reg = readq(sp->bar0 + i);
5454 memcpy((reg_space + i), &reg, 8);
5455 }
5456}
5457
5458/**
5459 * s2io_phy_id - timer function that alternates adapter LED.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005460 * @data : address of the private member of the device structure, which
Linus Torvalds1da177e2005-04-16 15:20:36 -07005461 * is a pointer to the s2io_nic structure, provided as an u32.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005462 * Description: This is actually the timer function that alternates the
5463 * adapter LED bit of the adapter control bit to set/reset every time on
5464 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
Linus Torvalds1da177e2005-04-16 15:20:36 -07005465 * once every second.
Joe Perchesd44570e2009-08-24 17:29:44 +00005466 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005467static void s2io_phy_id(unsigned long data)
5468{
Joe Perchesd44570e2009-08-24 17:29:44 +00005469 struct s2io_nic *sp = (struct s2io_nic *)data;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005470 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005471 u64 val64 = 0;
5472 u16 subid;
5473
5474 subid = sp->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005475 if ((sp->device_type == XFRAME_II_DEVICE) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00005476 ((subid & 0xFF) >= 0x07)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005477 val64 = readq(&bar0->gpio_control);
5478 val64 ^= GPIO_CTRL_GPIO_0;
5479 writeq(val64, &bar0->gpio_control);
5480 } else {
5481 val64 = readq(&bar0->adapter_control);
5482 val64 ^= ADAPTER_LED_ON;
5483 writeq(val64, &bar0->adapter_control);
5484 }
5485
5486 mod_timer(&sp->id_timer, jiffies + HZ / 2);
5487}
5488
5489/**
5490 * s2io_ethtool_idnic - To physically identify the nic on the system.
5491 * @sp : private member of the device structure, which is a pointer to the
5492 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005493 * @id : pointer to the structure with identification parameters given by
Linus Torvalds1da177e2005-04-16 15:20:36 -07005494 * ethtool.
5495 * Description: Used to physically identify the NIC on the system.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005496 * The Link LED will blink for a time specified by the user for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005497 * identification.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005498 * NOTE: The Link has to be Up to be able to blink the LED. Hence
Linus Torvalds1da177e2005-04-16 15:20:36 -07005499 * identification is possible only if it's link is up.
5500 * Return value:
5501 * int , returns 0 on success
5502 */
5503
5504static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
5505{
5506 u64 val64 = 0, last_gpio_ctrl_val;
Wang Chen4cf16532008-11-12 23:38:14 -08005507 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005508 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005509 u16 subid;
5510
5511 subid = sp->pdev->subsystem_device;
5512 last_gpio_ctrl_val = readq(&bar0->gpio_control);
Joe Perchesd44570e2009-08-24 17:29:44 +00005513 if ((sp->device_type == XFRAME_I_DEVICE) && ((subid & 0xFF) < 0x07)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005514 val64 = readq(&bar0->adapter_control);
5515 if (!(val64 & ADAPTER_CNTL_EN)) {
Joe Perches6cef2b8e2009-08-24 17:29:45 +00005516 pr_err("Adapter Link down, cannot blink LED\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07005517 return -EFAULT;
5518 }
5519 }
5520 if (sp->id_timer.function == NULL) {
5521 init_timer(&sp->id_timer);
5522 sp->id_timer.function = s2io_phy_id;
Joe Perchesd44570e2009-08-24 17:29:44 +00005523 sp->id_timer.data = (unsigned long)sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005524 }
5525 mod_timer(&sp->id_timer, jiffies);
5526 if (data)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005527 msleep_interruptible(data * HZ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005528 else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005529 msleep_interruptible(MAX_FLICKER_TIME);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005530 del_timer_sync(&sp->id_timer);
5531
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005532 if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005533 writeq(last_gpio_ctrl_val, &bar0->gpio_control);
5534 last_gpio_ctrl_val = readq(&bar0->gpio_control);
5535 }
5536
5537 return 0;
5538}
5539
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005540static void s2io_ethtool_gringparam(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005541 struct ethtool_ringparam *ering)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005542{
Wang Chen4cf16532008-11-12 23:38:14 -08005543 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesd44570e2009-08-24 17:29:44 +00005544 int i, tx_desc_count = 0, rx_desc_count = 0;
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005545
5546 if (sp->rxd_mode == RXD_MODE_1)
5547 ering->rx_max_pending = MAX_RX_DESC_1;
5548 else if (sp->rxd_mode == RXD_MODE_3B)
5549 ering->rx_max_pending = MAX_RX_DESC_2;
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005550
5551 ering->tx_max_pending = MAX_TX_DESC;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005552 for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005553 tx_desc_count += sp->config.tx_cfg[i].fifo_len;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005554
Joe Perches9e39f7c2009-08-25 08:52:00 +00005555 DBG_PRINT(INFO_DBG, "max txds: %d\n", sp->config.max_txds);
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005556 ering->tx_pending = tx_desc_count;
5557 rx_desc_count = 0;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005558 for (i = 0 ; i < sp->config.rx_ring_num ; i++)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005559 rx_desc_count += sp->config.rx_cfg[i].num_rxd;
Veena Paratb6627672007-07-23 02:39:43 -04005560
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005561 ering->rx_pending = rx_desc_count;
5562
5563 ering->rx_mini_max_pending = 0;
5564 ering->rx_mini_pending = 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00005565 if (sp->rxd_mode == RXD_MODE_1)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005566 ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
5567 else if (sp->rxd_mode == RXD_MODE_3B)
5568 ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
5569 ering->rx_jumbo_pending = rx_desc_count;
5570}
5571
Linus Torvalds1da177e2005-04-16 15:20:36 -07005572/**
5573 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005574 * @sp : private member of the device structure, which is a pointer to the
5575 * s2io_nic structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005576 * @ep : pointer to the structure with pause parameters given by ethtool.
5577 * Description:
5578 * Returns the Pause frame generation and reception capability of the NIC.
5579 * Return value:
5580 * void
5581 */
5582static void s2io_ethtool_getpause_data(struct net_device *dev,
5583 struct ethtool_pauseparam *ep)
5584{
5585 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005586 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005587 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005588
5589 val64 = readq(&bar0->rmac_pause_cfg);
5590 if (val64 & RMAC_PAUSE_GEN_ENABLE)
Tobias Klauserf957bcf2009-06-04 23:07:59 +00005591 ep->tx_pause = true;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005592 if (val64 & RMAC_PAUSE_RX_ENABLE)
Tobias Klauserf957bcf2009-06-04 23:07:59 +00005593 ep->rx_pause = true;
5594 ep->autoneg = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005595}
5596
5597/**
5598 * s2io_ethtool_setpause_data - set/reset pause frame generation.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005599 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005600 * s2io_nic structure.
5601 * @ep : pointer to the structure with pause parameters given by ethtool.
5602 * Description:
5603 * It can be used to set or reset Pause frame generation or reception
5604 * support of the NIC.
5605 * Return value:
5606 * int, returns 0 on Success
5607 */
5608
5609static int s2io_ethtool_setpause_data(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005610 struct ethtool_pauseparam *ep)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005611{
5612 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005613 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005614 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005615
5616 val64 = readq(&bar0->rmac_pause_cfg);
5617 if (ep->tx_pause)
5618 val64 |= RMAC_PAUSE_GEN_ENABLE;
5619 else
5620 val64 &= ~RMAC_PAUSE_GEN_ENABLE;
5621 if (ep->rx_pause)
5622 val64 |= RMAC_PAUSE_RX_ENABLE;
5623 else
5624 val64 &= ~RMAC_PAUSE_RX_ENABLE;
5625 writeq(val64, &bar0->rmac_pause_cfg);
5626 return 0;
5627}
5628
5629/**
5630 * read_eeprom - reads 4 bytes of data from user given offset.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005631 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005632 * s2io_nic structure.
5633 * @off : offset at which the data must be written
5634 * @data : Its an output parameter where the data read at the given
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005635 * offset is stored.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005636 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005637 * Will read 4 bytes of data from the user given offset and return the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005638 * read data.
5639 * NOTE: Will allow to read only part of the EEPROM visible through the
5640 * I2C bus.
5641 * Return value:
5642 * -1 on failure and 0 on success.
5643 */
5644
5645#define S2IO_DEV_ID 5
Joe Perchesd44570e2009-08-24 17:29:44 +00005646static int read_eeprom(struct s2io_nic *sp, int off, u64 *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005647{
5648 int ret = -1;
5649 u32 exit_cnt = 0;
5650 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005651 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005652
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005653 if (sp->device_type == XFRAME_I_DEVICE) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005654 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) |
5655 I2C_CONTROL_ADDR(off) |
5656 I2C_CONTROL_BYTE_CNT(0x3) |
5657 I2C_CONTROL_READ |
5658 I2C_CONTROL_CNTL_START;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005659 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005660
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005661 while (exit_cnt < 5) {
5662 val64 = readq(&bar0->i2c_control);
5663 if (I2C_CONTROL_CNTL_END(val64)) {
5664 *data = I2C_CONTROL_GET_DATA(val64);
5665 ret = 0;
5666 break;
5667 }
5668 msleep(50);
5669 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005670 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005671 }
5672
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005673 if (sp->device_type == XFRAME_II_DEVICE) {
5674 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005675 SPI_CONTROL_BYTECNT(0x3) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005676 SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
5677 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5678 val64 |= SPI_CONTROL_REQ;
5679 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5680 while (exit_cnt < 5) {
5681 val64 = readq(&bar0->spi_control);
5682 if (val64 & SPI_CONTROL_NACK) {
5683 ret = 1;
5684 break;
5685 } else if (val64 & SPI_CONTROL_DONE) {
5686 *data = readq(&bar0->spi_data);
5687 *data &= 0xffffff;
5688 ret = 0;
5689 break;
5690 }
5691 msleep(50);
5692 exit_cnt++;
5693 }
5694 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005695 return ret;
5696}
5697
5698/**
5699 * write_eeprom - actually writes the relevant part of the data value.
5700 * @sp : private member of the device structure, which is a pointer to the
5701 * s2io_nic structure.
5702 * @off : offset at which the data must be written
5703 * @data : The data that is to be written
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005704 * @cnt : Number of bytes of the data that are actually to be written into
Linus Torvalds1da177e2005-04-16 15:20:36 -07005705 * the Eeprom. (max of 3)
5706 * Description:
5707 * Actually writes the relevant part of the data value into the Eeprom
5708 * through the I2C bus.
5709 * Return value:
5710 * 0 on success, -1 on failure.
5711 */
5712
Joe Perchesd44570e2009-08-24 17:29:44 +00005713static int write_eeprom(struct s2io_nic *sp, int off, u64 data, int cnt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005714{
5715 int exit_cnt = 0, ret = -1;
5716 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005717 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005718
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005719 if (sp->device_type == XFRAME_I_DEVICE) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005720 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) |
5721 I2C_CONTROL_ADDR(off) |
5722 I2C_CONTROL_BYTE_CNT(cnt) |
5723 I2C_CONTROL_SET_DATA((u32)data) |
5724 I2C_CONTROL_CNTL_START;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005725 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005726
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005727 while (exit_cnt < 5) {
5728 val64 = readq(&bar0->i2c_control);
5729 if (I2C_CONTROL_CNTL_END(val64)) {
5730 if (!(val64 & I2C_CONTROL_NACK))
5731 ret = 0;
5732 break;
5733 }
5734 msleep(50);
5735 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005736 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005737 }
5738
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005739 if (sp->device_type == XFRAME_II_DEVICE) {
5740 int write_cnt = (cnt == 8) ? 0 : cnt;
Joe Perchesd44570e2009-08-24 17:29:44 +00005741 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005742
5743 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005744 SPI_CONTROL_BYTECNT(write_cnt) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005745 SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
5746 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5747 val64 |= SPI_CONTROL_REQ;
5748 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5749 while (exit_cnt < 5) {
5750 val64 = readq(&bar0->spi_control);
5751 if (val64 & SPI_CONTROL_NACK) {
5752 ret = 1;
5753 break;
5754 } else if (val64 & SPI_CONTROL_DONE) {
5755 ret = 0;
5756 break;
5757 }
5758 msleep(50);
5759 exit_cnt++;
5760 }
5761 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005762 return ret;
5763}
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005764static void s2io_vpd_read(struct s2io_nic *nic)
Ananda Raju9dc737a2006-04-21 19:05:41 -04005765{
Ananda Rajub41477f2006-07-24 19:52:49 -04005766 u8 *vpd_data;
5767 u8 data;
Joe Perchesd44570e2009-08-24 17:29:44 +00005768 int i = 0, cnt, fail = 0;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005769 int vpd_addr = 0x80;
Joe Perchesffb5df62009-08-24 17:29:47 +00005770 struct swStat *swstats = &nic->mac_control.stats_info->sw_stat;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005771
5772 if (nic->device_type == XFRAME_II_DEVICE) {
5773 strcpy(nic->product_name, "Xframe II 10GbE network adapter");
5774 vpd_addr = 0x80;
Joe Perchesd44570e2009-08-24 17:29:44 +00005775 } else {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005776 strcpy(nic->product_name, "Xframe I 10GbE network adapter");
5777 vpd_addr = 0x50;
5778 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005779 strcpy(nic->serial_num, "NOT AVAILABLE");
Ananda Raju9dc737a2006-04-21 19:05:41 -04005780
Ananda Rajub41477f2006-07-24 19:52:49 -04005781 vpd_data = kmalloc(256, GFP_KERNEL);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005782 if (!vpd_data) {
Joe Perchesffb5df62009-08-24 17:29:47 +00005783 swstats->mem_alloc_fail_cnt++;
Ananda Rajub41477f2006-07-24 19:52:49 -04005784 return;
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005785 }
Joe Perchesffb5df62009-08-24 17:29:47 +00005786 swstats->mem_allocated += 256;
Ananda Rajub41477f2006-07-24 19:52:49 -04005787
Joe Perchesd44570e2009-08-24 17:29:44 +00005788 for (i = 0; i < 256; i += 4) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005789 pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
5790 pci_read_config_byte(nic->pdev, (vpd_addr + 2), &data);
5791 pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
Joe Perchesd44570e2009-08-24 17:29:44 +00005792 for (cnt = 0; cnt < 5; cnt++) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005793 msleep(2);
5794 pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
5795 if (data == 0x80)
5796 break;
5797 }
5798 if (cnt >= 5) {
5799 DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
5800 fail = 1;
5801 break;
5802 }
5803 pci_read_config_dword(nic->pdev, (vpd_addr + 4),
5804 (u32 *)&vpd_data[i]);
5805 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005806
Joe Perchesd44570e2009-08-24 17:29:44 +00005807 if (!fail) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005808 /* read serial number of adapter */
5809 for (cnt = 0; cnt < 256; cnt++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005810 if ((vpd_data[cnt] == 'S') &&
5811 (vpd_data[cnt+1] == 'N') &&
5812 (vpd_data[cnt+2] < VPD_STRING_LEN)) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005813 memset(nic->serial_num, 0, VPD_STRING_LEN);
5814 memcpy(nic->serial_num, &vpd_data[cnt + 3],
Joe Perchesd44570e2009-08-24 17:29:44 +00005815 vpd_data[cnt+2]);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005816 break;
5817 }
5818 }
5819 }
5820
5821 if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005822 memset(nic->product_name, 0, vpd_data[1]);
5823 memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
5824 }
Ananda Rajub41477f2006-07-24 19:52:49 -04005825 kfree(vpd_data);
Joe Perchesffb5df62009-08-24 17:29:47 +00005826 swstats->mem_freed += 256;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005827}
5828
Linus Torvalds1da177e2005-04-16 15:20:36 -07005829/**
5830 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
5831 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005832 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005833 * containing all relevant information.
5834 * @data_buf : user defined value to be written into Eeprom.
5835 * Description: Reads the values stored in the Eeprom at given offset
5836 * for a given length. Stores these values int the input argument data
5837 * buffer 'data_buf' and returns these to the caller (ethtool.)
5838 * Return value:
5839 * int 0 on success
5840 */
5841
5842static int s2io_ethtool_geeprom(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005843 struct ethtool_eeprom *eeprom, u8 * data_buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005844{
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005845 u32 i, valid;
5846 u64 data;
Wang Chen4cf16532008-11-12 23:38:14 -08005847 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005848
5849 eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);
5850
5851 if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
5852 eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;
5853
5854 for (i = 0; i < eeprom->len; i += 4) {
5855 if (read_eeprom(sp, (eeprom->offset + i), &data)) {
5856 DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
5857 return -EFAULT;
5858 }
5859 valid = INV(data);
5860 memcpy((data_buf + i), &valid, 4);
5861 }
5862 return 0;
5863}
5864
5865/**
5866 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
5867 * @sp : private member of the device structure, which is a pointer to the
5868 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005869 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005870 * containing all relevant information.
5871 * @data_buf ; user defined value to be written into Eeprom.
5872 * Description:
5873 * Tries to write the user provided value in the Eeprom, at the offset
5874 * given by the user.
5875 * Return value:
5876 * 0 on success, -EFAULT on failure.
5877 */
5878
5879static int s2io_ethtool_seeprom(struct net_device *dev,
5880 struct ethtool_eeprom *eeprom,
Joe Perchesd44570e2009-08-24 17:29:44 +00005881 u8 *data_buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005882{
5883 int len = eeprom->len, cnt = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005884 u64 valid = 0, data;
Wang Chen4cf16532008-11-12 23:38:14 -08005885 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005886
5887 if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
5888 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00005889 "ETHTOOL_WRITE_EEPROM Err: "
5890 "Magic value is wrong, it is 0x%x should be 0x%x\n",
5891 (sp->pdev->vendor | (sp->pdev->device << 16)),
5892 eeprom->magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005893 return -EFAULT;
5894 }
5895
5896 while (len) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005897 data = (u32)data_buf[cnt] & 0x000000FF;
5898 if (data)
5899 valid = (u32)(data << 24);
5900 else
Linus Torvalds1da177e2005-04-16 15:20:36 -07005901 valid = data;
5902
5903 if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
5904 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00005905 "ETHTOOL_WRITE_EEPROM Err: "
5906 "Cannot write into the specified offset\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07005907 return -EFAULT;
5908 }
5909 cnt++;
5910 len--;
5911 }
5912
5913 return 0;
5914}
5915
5916/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005917 * s2io_register_test - reads and writes into all clock domains.
5918 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005919 * s2io_nic structure.
5920 * @data : variable that returns the result of each of the test conducted b
5921 * by the driver.
5922 * Description:
5923 * Read and write into all clock domains. The NIC has 3 clock domains,
5924 * see that registers in all the three regions are accessible.
5925 * Return value:
5926 * 0 on success.
5927 */
5928
Joe Perchesd44570e2009-08-24 17:29:44 +00005929static int s2io_register_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005930{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005931 struct XENA_dev_config __iomem *bar0 = sp->bar0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005932 u64 val64 = 0, exp_val;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005933 int fail = 0;
5934
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005935 val64 = readq(&bar0->pif_rd_swapper_fb);
5936 if (val64 != 0x123456789abcdefULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005937 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005938 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005939 }
5940
5941 val64 = readq(&bar0->rmac_pause_cfg);
5942 if (val64 != 0xc000ffff00000000ULL) {
5943 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005944 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005945 }
5946
5947 val64 = readq(&bar0->rx_queue_cfg);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005948 if (sp->device_type == XFRAME_II_DEVICE)
5949 exp_val = 0x0404040404040404ULL;
5950 else
5951 exp_val = 0x0808080808080808ULL;
5952 if (val64 != exp_val) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005953 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005954 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005955 }
5956
5957 val64 = readq(&bar0->xgxs_efifo_cfg);
5958 if (val64 != 0x000000001923141EULL) {
5959 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005960 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005961 }
5962
5963 val64 = 0x5A5A5A5A5A5A5A5AULL;
5964 writeq(val64, &bar0->xmsi_data);
5965 val64 = readq(&bar0->xmsi_data);
5966 if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
5967 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005968 DBG_PRINT(ERR_DBG, "Write Test level %d fails\n", 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005969 }
5970
5971 val64 = 0xA5A5A5A5A5A5A5A5ULL;
5972 writeq(val64, &bar0->xmsi_data);
5973 val64 = readq(&bar0->xmsi_data);
5974 if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
5975 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005976 DBG_PRINT(ERR_DBG, "Write Test level %d fails\n", 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005977 }
5978
5979 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005980 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005981}
5982
5983/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005984 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005985 * @sp : private member of the device structure, which is a pointer to the
5986 * s2io_nic structure.
5987 * @data:variable that returns the result of each of the test conducted by
5988 * the driver.
5989 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005990 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
Linus Torvalds1da177e2005-04-16 15:20:36 -07005991 * register.
5992 * Return value:
5993 * 0 on success.
5994 */
5995
Joe Perchesd44570e2009-08-24 17:29:44 +00005996static int s2io_eeprom_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005997{
5998 int fail = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005999 u64 ret_data, org_4F0, org_7F0;
6000 u8 saved_4F0 = 0, saved_7F0 = 0;
6001 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006002
6003 /* Test Write Error at offset 0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006004 /* Note that SPI interface allows write access to all areas
6005 * of EEPROM. Hence doing all negative testing only for Xframe I.
6006 */
6007 if (sp->device_type == XFRAME_I_DEVICE)
6008 if (!write_eeprom(sp, 0, 0, 3))
6009 fail = 1;
6010
6011 /* Save current values at offsets 0x4F0 and 0x7F0 */
6012 if (!read_eeprom(sp, 0x4F0, &org_4F0))
6013 saved_4F0 = 1;
6014 if (!read_eeprom(sp, 0x7F0, &org_7F0))
6015 saved_7F0 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006016
6017 /* Test Write at offset 4f0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006018 if (write_eeprom(sp, 0x4F0, 0x012345, 3))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006019 fail = 1;
6020 if (read_eeprom(sp, 0x4F0, &ret_data))
6021 fail = 1;
6022
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006023 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08006024 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
Joe Perchesd44570e2009-08-24 17:29:44 +00006025 "Data written %llx Data read %llx\n",
6026 dev->name, (unsigned long long)0x12345,
6027 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006028 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006029 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006030
6031 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006032 write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006033
6034 /* Test Write Request Error at offset 0x7c */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006035 if (sp->device_type == XFRAME_I_DEVICE)
6036 if (!write_eeprom(sp, 0x07C, 0, 3))
6037 fail = 1;
6038
6039 /* Test Write Request at offset 0x7f0 */
6040 if (write_eeprom(sp, 0x7F0, 0x012345, 3))
6041 fail = 1;
6042 if (read_eeprom(sp, 0x7F0, &ret_data))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006043 fail = 1;
6044
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006045 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08006046 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
Joe Perchesd44570e2009-08-24 17:29:44 +00006047 "Data written %llx Data read %llx\n",
6048 dev->name, (unsigned long long)0x12345,
6049 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006050 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006051 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006052
6053 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006054 write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006055
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006056 if (sp->device_type == XFRAME_I_DEVICE) {
6057 /* Test Write Error at offset 0x80 */
6058 if (!write_eeprom(sp, 0x080, 0, 3))
6059 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006060
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006061 /* Test Write Error at offset 0xfc */
6062 if (!write_eeprom(sp, 0x0FC, 0, 3))
6063 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006064
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006065 /* Test Write Error at offset 0x100 */
6066 if (!write_eeprom(sp, 0x100, 0, 3))
6067 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006068
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006069 /* Test Write Error at offset 4ec */
6070 if (!write_eeprom(sp, 0x4EC, 0, 3))
6071 fail = 1;
6072 }
6073
6074 /* Restore values at offsets 0x4F0 and 0x7F0 */
6075 if (saved_4F0)
6076 write_eeprom(sp, 0x4F0, org_4F0, 3);
6077 if (saved_7F0)
6078 write_eeprom(sp, 0x7F0, org_7F0, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006079
6080 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006081 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006082}
6083
6084/**
6085 * s2io_bist_test - invokes the MemBist test of the card .
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006086 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006087 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006088 * @data:variable that returns the result of each of the test conducted by
Linus Torvalds1da177e2005-04-16 15:20:36 -07006089 * the driver.
6090 * Description:
6091 * This invokes the MemBist test of the card. We give around
6092 * 2 secs time for the Test to complete. If it's still not complete
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006093 * within this peiod, we consider that the test failed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006094 * Return value:
6095 * 0 on success and -1 on failure.
6096 */
6097
Joe Perchesd44570e2009-08-24 17:29:44 +00006098static int s2io_bist_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006099{
6100 u8 bist = 0;
6101 int cnt = 0, ret = -1;
6102
6103 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6104 bist |= PCI_BIST_START;
6105 pci_write_config_word(sp->pdev, PCI_BIST, bist);
6106
6107 while (cnt < 20) {
6108 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6109 if (!(bist & PCI_BIST_START)) {
6110 *data = (bist & PCI_BIST_CODE_MASK);
6111 ret = 0;
6112 break;
6113 }
6114 msleep(100);
6115 cnt++;
6116 }
6117
6118 return ret;
6119}
6120
6121/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006122 * s2io-link_test - verifies the link state of the nic
6123 * @sp ; private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006124 * s2io_nic structure.
6125 * @data: variable that returns the result of each of the test conducted by
6126 * the driver.
6127 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006128 * The function verifies the link state of the NIC and updates the input
Linus Torvalds1da177e2005-04-16 15:20:36 -07006129 * argument 'data' appropriately.
6130 * Return value:
6131 * 0 on success.
6132 */
6133
Joe Perchesd44570e2009-08-24 17:29:44 +00006134static int s2io_link_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006135{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006136 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006137 u64 val64;
6138
6139 val64 = readq(&bar0->adapter_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00006140 if (!(LINK_IS_UP(val64)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006141 *data = 1;
Ananda Rajuc92ca042006-04-21 19:18:03 -04006142 else
6143 *data = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006144
Ananda Rajub41477f2006-07-24 19:52:49 -04006145 return *data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006146}
6147
6148/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006149 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
6150 * @sp - private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006151 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006152 * @data - variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006153 * conducted by the driver.
6154 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006155 * This is one of the offline test that tests the read and write
Linus Torvalds1da177e2005-04-16 15:20:36 -07006156 * access to the RldRam chip on the NIC.
6157 * Return value:
6158 * 0 on success.
6159 */
6160
Joe Perchesd44570e2009-08-24 17:29:44 +00006161static int s2io_rldram_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006162{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006163 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006164 u64 val64;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006165 int cnt, iteration = 0, test_fail = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006166
6167 val64 = readq(&bar0->adapter_control);
6168 val64 &= ~ADAPTER_ECC_EN;
6169 writeq(val64, &bar0->adapter_control);
6170
6171 val64 = readq(&bar0->mc_rldram_test_ctrl);
6172 val64 |= MC_RLDRAM_TEST_MODE;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006173 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006174
6175 val64 = readq(&bar0->mc_rldram_mrs);
6176 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
6177 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6178
6179 val64 |= MC_RLDRAM_MRS_ENABLE;
6180 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6181
6182 while (iteration < 2) {
6183 val64 = 0x55555555aaaa0000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006184 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006185 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006186 writeq(val64, &bar0->mc_rldram_test_d0);
6187
6188 val64 = 0xaaaa5a5555550000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006189 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006190 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006191 writeq(val64, &bar0->mc_rldram_test_d1);
6192
6193 val64 = 0x55aaaaaaaa5a0000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006194 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006195 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006196 writeq(val64, &bar0->mc_rldram_test_d2);
6197
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006198 val64 = (u64) (0x0000003ffffe0100ULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006199 writeq(val64, &bar0->mc_rldram_test_add);
6200
Joe Perchesd44570e2009-08-24 17:29:44 +00006201 val64 = MC_RLDRAM_TEST_MODE |
6202 MC_RLDRAM_TEST_WRITE |
6203 MC_RLDRAM_TEST_GO;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006204 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006205
6206 for (cnt = 0; cnt < 5; cnt++) {
6207 val64 = readq(&bar0->mc_rldram_test_ctrl);
6208 if (val64 & MC_RLDRAM_TEST_DONE)
6209 break;
6210 msleep(200);
6211 }
6212
6213 if (cnt == 5)
6214 break;
6215
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006216 val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
6217 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006218
6219 for (cnt = 0; cnt < 5; cnt++) {
6220 val64 = readq(&bar0->mc_rldram_test_ctrl);
6221 if (val64 & MC_RLDRAM_TEST_DONE)
6222 break;
6223 msleep(500);
6224 }
6225
6226 if (cnt == 5)
6227 break;
6228
6229 val64 = readq(&bar0->mc_rldram_test_ctrl);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006230 if (!(val64 & MC_RLDRAM_TEST_PASS))
6231 test_fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006232
6233 iteration++;
6234 }
6235
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006236 *data = test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006237
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006238 /* Bring the adapter out of test mode */
6239 SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);
6240
6241 return test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006242}
6243
6244/**
6245 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
6246 * @sp : private member of the device structure, which is a pointer to the
6247 * s2io_nic structure.
6248 * @ethtest : pointer to a ethtool command specific structure that will be
6249 * returned to the user.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006250 * @data : variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006251 * conducted by the driver.
6252 * Description:
6253 * This function conducts 6 tests ( 4 offline and 2 online) to determine
6254 * the health of the card.
6255 * Return value:
6256 * void
6257 */
6258
6259static void s2io_ethtool_test(struct net_device *dev,
6260 struct ethtool_test *ethtest,
Joe Perchesd44570e2009-08-24 17:29:44 +00006261 uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006262{
Wang Chen4cf16532008-11-12 23:38:14 -08006263 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006264 int orig_state = netif_running(sp->dev);
6265
6266 if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
6267 /* Offline Tests. */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006268 if (orig_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006269 s2io_close(sp->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006270
6271 if (s2io_register_test(sp, &data[0]))
6272 ethtest->flags |= ETH_TEST_FL_FAILED;
6273
6274 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006275
6276 if (s2io_rldram_test(sp, &data[3]))
6277 ethtest->flags |= ETH_TEST_FL_FAILED;
6278
6279 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006280
6281 if (s2io_eeprom_test(sp, &data[1]))
6282 ethtest->flags |= ETH_TEST_FL_FAILED;
6283
6284 if (s2io_bist_test(sp, &data[4]))
6285 ethtest->flags |= ETH_TEST_FL_FAILED;
6286
6287 if (orig_state)
6288 s2io_open(sp->dev);
6289
6290 data[2] = 0;
6291 } else {
6292 /* Online Tests. */
6293 if (!orig_state) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006294 DBG_PRINT(ERR_DBG, "%s: is not up, cannot run test\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07006295 dev->name);
6296 data[0] = -1;
6297 data[1] = -1;
6298 data[2] = -1;
6299 data[3] = -1;
6300 data[4] = -1;
6301 }
6302
6303 if (s2io_link_test(sp, &data[2]))
6304 ethtest->flags |= ETH_TEST_FL_FAILED;
6305
6306 data[0] = 0;
6307 data[1] = 0;
6308 data[3] = 0;
6309 data[4] = 0;
6310 }
6311}
6312
6313static void s2io_get_ethtool_stats(struct net_device *dev,
6314 struct ethtool_stats *estats,
Joe Perchesd44570e2009-08-24 17:29:44 +00006315 u64 *tmp_stats)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006316{
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006317 int i = 0, k;
Wang Chen4cf16532008-11-12 23:38:14 -08006318 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00006319 struct stat_block *stats = sp->mac_control.stats_info;
6320 struct swStat *swstats = &stats->sw_stat;
6321 struct xpakStat *xstats = &stats->xpak_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006322
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006323 s2io_updt_stats(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006324 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006325 (u64)le32_to_cpu(stats->tmac_frms_oflow) << 32 |
6326 le32_to_cpu(stats->tmac_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006327 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006328 (u64)le32_to_cpu(stats->tmac_data_octets_oflow) << 32 |
6329 le32_to_cpu(stats->tmac_data_octets);
6330 tmp_stats[i++] = le64_to_cpu(stats->tmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006331 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006332 (u64)le32_to_cpu(stats->tmac_mcst_frms_oflow) << 32 |
6333 le32_to_cpu(stats->tmac_mcst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006334 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006335 (u64)le32_to_cpu(stats->tmac_bcst_frms_oflow) << 32 |
6336 le32_to_cpu(stats->tmac_bcst_frms);
6337 tmp_stats[i++] = le64_to_cpu(stats->tmac_pause_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006338 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006339 (u64)le32_to_cpu(stats->tmac_ttl_octets_oflow) << 32 |
6340 le32_to_cpu(stats->tmac_ttl_octets);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006341 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006342 (u64)le32_to_cpu(stats->tmac_ucst_frms_oflow) << 32 |
6343 le32_to_cpu(stats->tmac_ucst_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006344 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006345 (u64)le32_to_cpu(stats->tmac_nucst_frms_oflow) << 32 |
6346 le32_to_cpu(stats->tmac_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006347 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006348 (u64)le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 |
6349 le32_to_cpu(stats->tmac_any_err_frms);
6350 tmp_stats[i++] = le64_to_cpu(stats->tmac_ttl_less_fb_octets);
6351 tmp_stats[i++] = le64_to_cpu(stats->tmac_vld_ip_octets);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006352 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006353 (u64)le32_to_cpu(stats->tmac_vld_ip_oflow) << 32 |
6354 le32_to_cpu(stats->tmac_vld_ip);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006355 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006356 (u64)le32_to_cpu(stats->tmac_drop_ip_oflow) << 32 |
6357 le32_to_cpu(stats->tmac_drop_ip);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006358 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006359 (u64)le32_to_cpu(stats->tmac_icmp_oflow) << 32 |
6360 le32_to_cpu(stats->tmac_icmp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006361 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006362 (u64)le32_to_cpu(stats->tmac_rst_tcp_oflow) << 32 |
6363 le32_to_cpu(stats->tmac_rst_tcp);
6364 tmp_stats[i++] = le64_to_cpu(stats->tmac_tcp);
6365 tmp_stats[i++] = (u64)le32_to_cpu(stats->tmac_udp_oflow) << 32 |
6366 le32_to_cpu(stats->tmac_udp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006367 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006368 (u64)le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 |
6369 le32_to_cpu(stats->rmac_vld_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006370 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006371 (u64)le32_to_cpu(stats->rmac_data_octets_oflow) << 32 |
6372 le32_to_cpu(stats->rmac_data_octets);
6373 tmp_stats[i++] = le64_to_cpu(stats->rmac_fcs_err_frms);
6374 tmp_stats[i++] = le64_to_cpu(stats->rmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006375 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006376 (u64)le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 |
6377 le32_to_cpu(stats->rmac_vld_mcst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006378 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006379 (u64)le32_to_cpu(stats->rmac_vld_bcst_frms_oflow) << 32 |
6380 le32_to_cpu(stats->rmac_vld_bcst_frms);
6381 tmp_stats[i++] = le32_to_cpu(stats->rmac_in_rng_len_err_frms);
6382 tmp_stats[i++] = le32_to_cpu(stats->rmac_out_rng_len_err_frms);
6383 tmp_stats[i++] = le64_to_cpu(stats->rmac_long_frms);
6384 tmp_stats[i++] = le64_to_cpu(stats->rmac_pause_ctrl_frms);
6385 tmp_stats[i++] = le64_to_cpu(stats->rmac_unsup_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006386 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006387 (u64)le32_to_cpu(stats->rmac_ttl_octets_oflow) << 32 |
6388 le32_to_cpu(stats->rmac_ttl_octets);
Joe Perchesd44570e2009-08-24 17:29:44 +00006389 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006390 (u64)le32_to_cpu(stats->rmac_accepted_ucst_frms_oflow) << 32
6391 | le32_to_cpu(stats->rmac_accepted_ucst_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006392 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006393 (u64)le32_to_cpu(stats->rmac_accepted_nucst_frms_oflow)
6394 << 32 | le32_to_cpu(stats->rmac_accepted_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006395 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006396 (u64)le32_to_cpu(stats->rmac_discarded_frms_oflow) << 32 |
6397 le32_to_cpu(stats->rmac_discarded_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006398 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006399 (u64)le32_to_cpu(stats->rmac_drop_events_oflow)
6400 << 32 | le32_to_cpu(stats->rmac_drop_events);
6401 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_less_fb_octets);
6402 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006403 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006404 (u64)le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 |
6405 le32_to_cpu(stats->rmac_usized_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006406 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006407 (u64)le32_to_cpu(stats->rmac_osized_frms_oflow) << 32 |
6408 le32_to_cpu(stats->rmac_osized_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006409 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006410 (u64)le32_to_cpu(stats->rmac_frag_frms_oflow) << 32 |
6411 le32_to_cpu(stats->rmac_frag_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006412 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006413 (u64)le32_to_cpu(stats->rmac_jabber_frms_oflow) << 32 |
6414 le32_to_cpu(stats->rmac_jabber_frms);
6415 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_64_frms);
6416 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_65_127_frms);
6417 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_128_255_frms);
6418 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_256_511_frms);
6419 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_512_1023_frms);
6420 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_1024_1518_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006421 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006422 (u64)le32_to_cpu(stats->rmac_ip_oflow) << 32 |
6423 le32_to_cpu(stats->rmac_ip);
6424 tmp_stats[i++] = le64_to_cpu(stats->rmac_ip_octets);
6425 tmp_stats[i++] = le32_to_cpu(stats->rmac_hdr_err_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006426 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006427 (u64)le32_to_cpu(stats->rmac_drop_ip_oflow) << 32 |
6428 le32_to_cpu(stats->rmac_drop_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006429 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006430 (u64)le32_to_cpu(stats->rmac_icmp_oflow) << 32 |
6431 le32_to_cpu(stats->rmac_icmp);
6432 tmp_stats[i++] = le64_to_cpu(stats->rmac_tcp);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006433 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006434 (u64)le32_to_cpu(stats->rmac_udp_oflow) << 32 |
6435 le32_to_cpu(stats->rmac_udp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006436 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006437 (u64)le32_to_cpu(stats->rmac_err_drp_udp_oflow) << 32 |
6438 le32_to_cpu(stats->rmac_err_drp_udp);
6439 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_err_sym);
6440 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q0);
6441 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q1);
6442 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q2);
6443 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q3);
6444 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q4);
6445 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q5);
6446 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q6);
6447 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q7);
6448 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q0);
6449 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q1);
6450 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q2);
6451 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q3);
6452 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q4);
6453 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q5);
6454 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q6);
6455 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q7);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006456 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006457 (u64)le32_to_cpu(stats->rmac_pause_cnt_oflow) << 32 |
6458 le32_to_cpu(stats->rmac_pause_cnt);
6459 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_data_err_cnt);
6460 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_ctrl_err_cnt);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006461 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006462 (u64)le32_to_cpu(stats->rmac_accepted_ip_oflow) << 32 |
6463 le32_to_cpu(stats->rmac_accepted_ip);
6464 tmp_stats[i++] = le32_to_cpu(stats->rmac_err_tcp);
6465 tmp_stats[i++] = le32_to_cpu(stats->rd_req_cnt);
6466 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_cnt);
6467 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_rtry_cnt);
6468 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_cnt);
6469 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_rd_ack_cnt);
6470 tmp_stats[i++] = le32_to_cpu(stats->wr_req_cnt);
6471 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_cnt);
6472 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_rtry_cnt);
6473 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_cnt);
6474 tmp_stats[i++] = le32_to_cpu(stats->wr_disc_cnt);
6475 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_wr_ack_cnt);
6476 tmp_stats[i++] = le32_to_cpu(stats->txp_wr_cnt);
6477 tmp_stats[i++] = le32_to_cpu(stats->txd_rd_cnt);
6478 tmp_stats[i++] = le32_to_cpu(stats->txd_wr_cnt);
6479 tmp_stats[i++] = le32_to_cpu(stats->rxd_rd_cnt);
6480 tmp_stats[i++] = le32_to_cpu(stats->rxd_wr_cnt);
6481 tmp_stats[i++] = le32_to_cpu(stats->txf_rd_cnt);
6482 tmp_stats[i++] = le32_to_cpu(stats->rxf_wr_cnt);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006483
6484 /* Enhanced statistics exist only for Hercules */
Joe Perchesd44570e2009-08-24 17:29:44 +00006485 if (sp->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006486 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006487 le64_to_cpu(stats->rmac_ttl_1519_4095_frms);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006488 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006489 le64_to_cpu(stats->rmac_ttl_4096_8191_frms);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006490 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006491 le64_to_cpu(stats->rmac_ttl_8192_max_frms);
6492 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_gt_max_frms);
6493 tmp_stats[i++] = le64_to_cpu(stats->rmac_osized_alt_frms);
6494 tmp_stats[i++] = le64_to_cpu(stats->rmac_jabber_alt_frms);
6495 tmp_stats[i++] = le64_to_cpu(stats->rmac_gt_max_alt_frms);
6496 tmp_stats[i++] = le64_to_cpu(stats->rmac_vlan_frms);
6497 tmp_stats[i++] = le32_to_cpu(stats->rmac_len_discard);
6498 tmp_stats[i++] = le32_to_cpu(stats->rmac_fcs_discard);
6499 tmp_stats[i++] = le32_to_cpu(stats->rmac_pf_discard);
6500 tmp_stats[i++] = le32_to_cpu(stats->rmac_da_discard);
6501 tmp_stats[i++] = le32_to_cpu(stats->rmac_red_discard);
6502 tmp_stats[i++] = le32_to_cpu(stats->rmac_rts_discard);
6503 tmp_stats[i++] = le32_to_cpu(stats->rmac_ingm_full_discard);
6504 tmp_stats[i++] = le32_to_cpu(stats->link_fault_cnt);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006505 }
6506
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006507 tmp_stats[i++] = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00006508 tmp_stats[i++] = swstats->single_ecc_errs;
6509 tmp_stats[i++] = swstats->double_ecc_errs;
6510 tmp_stats[i++] = swstats->parity_err_cnt;
6511 tmp_stats[i++] = swstats->serious_err_cnt;
6512 tmp_stats[i++] = swstats->soft_reset_cnt;
6513 tmp_stats[i++] = swstats->fifo_full_cnt;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006514 for (k = 0; k < MAX_RX_RINGS; k++)
Joe Perchesffb5df62009-08-24 17:29:47 +00006515 tmp_stats[i++] = swstats->ring_full_cnt[k];
6516 tmp_stats[i++] = xstats->alarm_transceiver_temp_high;
6517 tmp_stats[i++] = xstats->alarm_transceiver_temp_low;
6518 tmp_stats[i++] = xstats->alarm_laser_bias_current_high;
6519 tmp_stats[i++] = xstats->alarm_laser_bias_current_low;
6520 tmp_stats[i++] = xstats->alarm_laser_output_power_high;
6521 tmp_stats[i++] = xstats->alarm_laser_output_power_low;
6522 tmp_stats[i++] = xstats->warn_transceiver_temp_high;
6523 tmp_stats[i++] = xstats->warn_transceiver_temp_low;
6524 tmp_stats[i++] = xstats->warn_laser_bias_current_high;
6525 tmp_stats[i++] = xstats->warn_laser_bias_current_low;
6526 tmp_stats[i++] = xstats->warn_laser_output_power_high;
6527 tmp_stats[i++] = xstats->warn_laser_output_power_low;
6528 tmp_stats[i++] = swstats->clubbed_frms_cnt;
6529 tmp_stats[i++] = swstats->sending_both;
6530 tmp_stats[i++] = swstats->outof_sequence_pkts;
6531 tmp_stats[i++] = swstats->flush_max_pkts;
6532 if (swstats->num_aggregations) {
6533 u64 tmp = swstats->sum_avg_pkts_aggregated;
Ananda Rajubd1034f2006-04-21 19:20:22 -04006534 int count = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04006535 /*
Ananda Rajubd1034f2006-04-21 19:20:22 -04006536 * Since 64-bit divide does not work on all platforms,
6537 * do repeated subtraction.
6538 */
Joe Perchesffb5df62009-08-24 17:29:47 +00006539 while (tmp >= swstats->num_aggregations) {
6540 tmp -= swstats->num_aggregations;
Ananda Rajubd1034f2006-04-21 19:20:22 -04006541 count++;
6542 }
6543 tmp_stats[i++] = count;
Joe Perchesd44570e2009-08-24 17:29:44 +00006544 } else
Ananda Rajubd1034f2006-04-21 19:20:22 -04006545 tmp_stats[i++] = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00006546 tmp_stats[i++] = swstats->mem_alloc_fail_cnt;
6547 tmp_stats[i++] = swstats->pci_map_fail_cnt;
6548 tmp_stats[i++] = swstats->watchdog_timer_cnt;
6549 tmp_stats[i++] = swstats->mem_allocated;
6550 tmp_stats[i++] = swstats->mem_freed;
6551 tmp_stats[i++] = swstats->link_up_cnt;
6552 tmp_stats[i++] = swstats->link_down_cnt;
6553 tmp_stats[i++] = swstats->link_up_time;
6554 tmp_stats[i++] = swstats->link_down_time;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006555
Joe Perchesffb5df62009-08-24 17:29:47 +00006556 tmp_stats[i++] = swstats->tx_buf_abort_cnt;
6557 tmp_stats[i++] = swstats->tx_desc_abort_cnt;
6558 tmp_stats[i++] = swstats->tx_parity_err_cnt;
6559 tmp_stats[i++] = swstats->tx_link_loss_cnt;
6560 tmp_stats[i++] = swstats->tx_list_proc_err_cnt;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006561
Joe Perchesffb5df62009-08-24 17:29:47 +00006562 tmp_stats[i++] = swstats->rx_parity_err_cnt;
6563 tmp_stats[i++] = swstats->rx_abort_cnt;
6564 tmp_stats[i++] = swstats->rx_parity_abort_cnt;
6565 tmp_stats[i++] = swstats->rx_rda_fail_cnt;
6566 tmp_stats[i++] = swstats->rx_unkn_prot_cnt;
6567 tmp_stats[i++] = swstats->rx_fcs_err_cnt;
6568 tmp_stats[i++] = swstats->rx_buf_size_err_cnt;
6569 tmp_stats[i++] = swstats->rx_rxd_corrupt_cnt;
6570 tmp_stats[i++] = swstats->rx_unkn_err_cnt;
6571 tmp_stats[i++] = swstats->tda_err_cnt;
6572 tmp_stats[i++] = swstats->pfc_err_cnt;
6573 tmp_stats[i++] = swstats->pcc_err_cnt;
6574 tmp_stats[i++] = swstats->tti_err_cnt;
6575 tmp_stats[i++] = swstats->tpa_err_cnt;
6576 tmp_stats[i++] = swstats->sm_err_cnt;
6577 tmp_stats[i++] = swstats->lso_err_cnt;
6578 tmp_stats[i++] = swstats->mac_tmac_err_cnt;
6579 tmp_stats[i++] = swstats->mac_rmac_err_cnt;
6580 tmp_stats[i++] = swstats->xgxs_txgxs_err_cnt;
6581 tmp_stats[i++] = swstats->xgxs_rxgxs_err_cnt;
6582 tmp_stats[i++] = swstats->rc_err_cnt;
6583 tmp_stats[i++] = swstats->prc_pcix_err_cnt;
6584 tmp_stats[i++] = swstats->rpa_err_cnt;
6585 tmp_stats[i++] = swstats->rda_err_cnt;
6586 tmp_stats[i++] = swstats->rti_err_cnt;
6587 tmp_stats[i++] = swstats->mc_err_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006588}
6589
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006590static int s2io_ethtool_get_regs_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006591{
Joe Perchesd44570e2009-08-24 17:29:44 +00006592 return XENA_REG_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006593}
6594
6595
Joe Perchesd44570e2009-08-24 17:29:44 +00006596static u32 s2io_ethtool_get_rx_csum(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006597{
Wang Chen4cf16532008-11-12 23:38:14 -08006598 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006599
Joe Perchesd44570e2009-08-24 17:29:44 +00006600 return sp->rx_csum;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006601}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006602
6603static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006604{
Wang Chen4cf16532008-11-12 23:38:14 -08006605 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006606
6607 if (data)
6608 sp->rx_csum = 1;
6609 else
6610 sp->rx_csum = 0;
6611
6612 return 0;
6613}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006614
6615static int s2io_get_eeprom_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006616{
Joe Perchesd44570e2009-08-24 17:29:44 +00006617 return XENA_EEPROM_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006618}
6619
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006620static int s2io_get_sset_count(struct net_device *dev, int sset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006621{
Wang Chen4cf16532008-11-12 23:38:14 -08006622 struct s2io_nic *sp = netdev_priv(dev);
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006623
6624 switch (sset) {
6625 case ETH_SS_TEST:
6626 return S2IO_TEST_LEN;
6627 case ETH_SS_STATS:
Joe Perchesd44570e2009-08-24 17:29:44 +00006628 switch (sp->device_type) {
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006629 case XFRAME_I_DEVICE:
6630 return XFRAME_I_STAT_LEN;
6631 case XFRAME_II_DEVICE:
6632 return XFRAME_II_STAT_LEN;
6633 default:
6634 return 0;
6635 }
6636 default:
6637 return -EOPNOTSUPP;
6638 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006639}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006640
6641static void s2io_ethtool_get_strings(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006642 u32 stringset, u8 *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006643{
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006644 int stat_size = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08006645 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006646
Linus Torvalds1da177e2005-04-16 15:20:36 -07006647 switch (stringset) {
6648 case ETH_SS_TEST:
6649 memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
6650 break;
6651 case ETH_SS_STATS:
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006652 stat_size = sizeof(ethtool_xena_stats_keys);
Joe Perchesd44570e2009-08-24 17:29:44 +00006653 memcpy(data, &ethtool_xena_stats_keys, stat_size);
6654 if (sp->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006655 memcpy(data + stat_size,
Joe Perchesd44570e2009-08-24 17:29:44 +00006656 &ethtool_enhanced_stats_keys,
6657 sizeof(ethtool_enhanced_stats_keys));
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006658 stat_size += sizeof(ethtool_enhanced_stats_keys);
6659 }
6660
6661 memcpy(data + stat_size, &ethtool_driver_stats_keys,
Joe Perchesd44570e2009-08-24 17:29:44 +00006662 sizeof(ethtool_driver_stats_keys));
Linus Torvalds1da177e2005-04-16 15:20:36 -07006663 }
6664}
Linus Torvalds1da177e2005-04-16 15:20:36 -07006665
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006666static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006667{
6668 if (data)
6669 dev->features |= NETIF_F_IP_CSUM;
6670 else
6671 dev->features &= ~NETIF_F_IP_CSUM;
6672
6673 return 0;
6674}
6675
Ananda Raju75c30b12006-07-24 19:55:09 -04006676static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
6677{
6678 return (dev->features & NETIF_F_TSO) != 0;
6679}
6680static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
6681{
6682 if (data)
6683 dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
6684 else
6685 dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
6686
6687 return 0;
6688}
Linus Torvalds1da177e2005-04-16 15:20:36 -07006689
Jeff Garzik7282d492006-09-13 14:30:00 -04006690static const struct ethtool_ops netdev_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006691 .get_settings = s2io_ethtool_gset,
6692 .set_settings = s2io_ethtool_sset,
6693 .get_drvinfo = s2io_ethtool_gdrvinfo,
6694 .get_regs_len = s2io_ethtool_get_regs_len,
6695 .get_regs = s2io_ethtool_gregs,
6696 .get_link = ethtool_op_get_link,
6697 .get_eeprom_len = s2io_get_eeprom_len,
6698 .get_eeprom = s2io_ethtool_geeprom,
6699 .set_eeprom = s2io_ethtool_seeprom,
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04006700 .get_ringparam = s2io_ethtool_gringparam,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006701 .get_pauseparam = s2io_ethtool_getpause_data,
6702 .set_pauseparam = s2io_ethtool_setpause_data,
6703 .get_rx_csum = s2io_ethtool_get_rx_csum,
6704 .set_rx_csum = s2io_ethtool_set_rx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006705 .set_tx_csum = s2io_ethtool_op_set_tx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006706 .set_sg = ethtool_op_set_sg,
Ananda Raju75c30b12006-07-24 19:55:09 -04006707 .get_tso = s2io_ethtool_op_get_tso,
6708 .set_tso = s2io_ethtool_op_set_tso,
Ananda Rajufed5ecc2005-11-14 15:25:08 -05006709 .set_ufo = ethtool_op_set_ufo,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006710 .self_test = s2io_ethtool_test,
6711 .get_strings = s2io_ethtool_get_strings,
6712 .phys_id = s2io_ethtool_idnic,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006713 .get_ethtool_stats = s2io_get_ethtool_stats,
6714 .get_sset_count = s2io_get_sset_count,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006715};
6716
6717/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006718 * s2io_ioctl - Entry point for the Ioctl
Linus Torvalds1da177e2005-04-16 15:20:36 -07006719 * @dev : Device pointer.
6720 * @ifr : An IOCTL specefic structure, that can contain a pointer to
6721 * a proprietary structure used to pass information to the driver.
6722 * @cmd : This is used to distinguish between the different commands that
6723 * can be passed to the IOCTL functions.
6724 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006725 * Currently there are no special functionality supported in IOCTL, hence
6726 * function always return EOPNOTSUPPORTED
Linus Torvalds1da177e2005-04-16 15:20:36 -07006727 */
6728
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006729static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006730{
6731 return -EOPNOTSUPP;
6732}
6733
6734/**
6735 * s2io_change_mtu - entry point to change MTU size for the device.
6736 * @dev : device pointer.
6737 * @new_mtu : the new MTU size for the device.
6738 * Description: A driver entry point to change MTU size for the device.
6739 * Before changing the MTU the device must be stopped.
6740 * Return value:
6741 * 0 on success and an appropriate (-)ve integer as defined in errno.h
6742 * file on failure.
6743 */
6744
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006745static int s2io_change_mtu(struct net_device *dev, int new_mtu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006746{
Wang Chen4cf16532008-11-12 23:38:14 -08006747 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006748 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006749
6750 if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006751 DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006752 return -EPERM;
6753 }
6754
Linus Torvalds1da177e2005-04-16 15:20:36 -07006755 dev->mtu = new_mtu;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006756 if (netif_running(dev)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006757 s2io_stop_all_tx_queue(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006758 s2io_card_down(sp);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006759 ret = s2io_card_up(sp);
6760 if (ret) {
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006761 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07006762 __func__);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006763 return ret;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006764 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006765 s2io_wake_all_tx_queue(sp);
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006766 } else { /* Device is down */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006767 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006768 u64 val64 = new_mtu;
6769
6770 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
6771 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006772
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006773 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006774}
6775
6776/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07006777 * s2io_set_link - Set the LInk status
6778 * @data: long pointer to device private structue
6779 * Description: Sets the link status for the adapter
6780 */
6781
David Howellsc4028952006-11-22 14:57:56 +00006782static void s2io_set_link(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006783{
Joe Perchesd44570e2009-08-24 17:29:44 +00006784 struct s2io_nic *nic = container_of(work, struct s2io_nic,
6785 set_link_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006786 struct net_device *dev = nic->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006787 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006788 register u64 val64;
6789 u16 subid;
6790
Francois Romieu22747d62007-02-15 23:37:50 +01006791 rtnl_lock();
6792
6793 if (!netif_running(dev))
6794 goto out_unlock;
6795
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006796 if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006797 /* The card is being reset, no point doing anything */
Francois Romieu22747d62007-02-15 23:37:50 +01006798 goto out_unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006799 }
6800
6801 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006802 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
6803 /*
6804 * Allow a small delay for the NICs self initiated
6805 * cleanup to complete.
6806 */
6807 msleep(100);
6808 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006809
6810 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006811 if (LINK_IS_UP(val64)) {
6812 if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
6813 if (verify_xena_quiescence(nic)) {
6814 val64 = readq(&bar0->adapter_control);
6815 val64 |= ADAPTER_CNTL_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006816 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006817 if (CARDS_WITH_FAULTY_LINK_INDICATORS(
Joe Perchesd44570e2009-08-24 17:29:44 +00006818 nic->device_type, subid)) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006819 val64 = readq(&bar0->gpio_control);
6820 val64 |= GPIO_CTRL_GPIO_0;
6821 writeq(val64, &bar0->gpio_control);
6822 val64 = readq(&bar0->gpio_control);
6823 } else {
6824 val64 |= ADAPTER_LED_ON;
6825 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006826 }
Tobias Klauserf957bcf2009-06-04 23:07:59 +00006827 nic->device_enabled_once = true;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006828 } else {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006829 DBG_PRINT(ERR_DBG,
6830 "%s: Error: device is not Quiescent\n",
6831 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006832 s2io_stop_all_tx_queue(nic);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006833 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006834 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006835 val64 = readq(&bar0->adapter_control);
6836 val64 |= ADAPTER_LED_ON;
6837 writeq(val64, &bar0->adapter_control);
6838 s2io_link(nic, LINK_UP);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006839 } else {
6840 if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
6841 subid)) {
6842 val64 = readq(&bar0->gpio_control);
6843 val64 &= ~GPIO_CTRL_GPIO_0;
6844 writeq(val64, &bar0->gpio_control);
6845 val64 = readq(&bar0->gpio_control);
6846 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006847 /* turn off LED */
6848 val64 = readq(&bar0->adapter_control);
Joe Perchesd44570e2009-08-24 17:29:44 +00006849 val64 = val64 & (~ADAPTER_LED_ON);
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006850 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006851 s2io_link(nic, LINK_DOWN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006852 }
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006853 clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
Francois Romieu22747d62007-02-15 23:37:50 +01006854
6855out_unlock:
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05006856 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07006857}
6858
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006859static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
Joe Perchesd44570e2009-08-24 17:29:44 +00006860 struct buffAdd *ba,
6861 struct sk_buff **skb, u64 *temp0, u64 *temp1,
6862 u64 *temp2, int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006863{
6864 struct net_device *dev = sp->dev;
Veena Parat491abf22007-07-23 02:37:14 -04006865 struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006866
6867 if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006868 struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006869 /* allocate skb */
6870 if (*skb) {
6871 DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
6872 /*
6873 * As Rx frame are not going to be processed,
6874 * using same mapped address for the Rxd
6875 * buffer pointer
6876 */
Veena Parat6d517a22007-07-23 02:20:51 -04006877 rxdp1->Buffer0_ptr = *temp0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006878 } else {
6879 *skb = dev_alloc_skb(size);
6880 if (!(*skb)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006881 DBG_PRINT(INFO_DBG,
6882 "%s: Out of memory to allocate %s\n",
6883 dev->name, "1 buf mode SKBs");
Joe Perchesffb5df62009-08-24 17:29:47 +00006884 stats->mem_alloc_fail_cnt++;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006885 return -ENOMEM ;
6886 }
Joe Perchesffb5df62009-08-24 17:29:47 +00006887 stats->mem_allocated += (*skb)->truesize;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006888 /* storing the mapped addr in a temp variable
6889 * such it will be used for next rxd whose
6890 * Host Control is NULL
6891 */
Veena Parat6d517a22007-07-23 02:20:51 -04006892 rxdp1->Buffer0_ptr = *temp0 =
Joe Perchesd44570e2009-08-24 17:29:44 +00006893 pci_map_single(sp->pdev, (*skb)->data,
6894 size - NET_IP_ALIGN,
6895 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006896 if (pci_dma_mapping_error(sp->pdev, rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006897 goto memalloc_failed;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006898 rxdp->Host_Control = (unsigned long) (*skb);
6899 }
6900 } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006901 struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006902 /* Two buffer Mode */
6903 if (*skb) {
Veena Parat6d517a22007-07-23 02:20:51 -04006904 rxdp3->Buffer2_ptr = *temp2;
6905 rxdp3->Buffer0_ptr = *temp0;
6906 rxdp3->Buffer1_ptr = *temp1;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006907 } else {
6908 *skb = dev_alloc_skb(size);
David Rientjes2ceaac72006-10-30 14:19:25 -08006909 if (!(*skb)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006910 DBG_PRINT(INFO_DBG,
6911 "%s: Out of memory to allocate %s\n",
6912 dev->name,
6913 "2 buf mode SKBs");
Joe Perchesffb5df62009-08-24 17:29:47 +00006914 stats->mem_alloc_fail_cnt++;
David Rientjes2ceaac72006-10-30 14:19:25 -08006915 return -ENOMEM;
6916 }
Joe Perchesffb5df62009-08-24 17:29:47 +00006917 stats->mem_allocated += (*skb)->truesize;
Veena Parat6d517a22007-07-23 02:20:51 -04006918 rxdp3->Buffer2_ptr = *temp2 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006919 pci_map_single(sp->pdev, (*skb)->data,
6920 dev->mtu + 4,
6921 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006922 if (pci_dma_mapping_error(sp->pdev, rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006923 goto memalloc_failed;
Veena Parat6d517a22007-07-23 02:20:51 -04006924 rxdp3->Buffer0_ptr = *temp0 =
Joe Perchesd44570e2009-08-24 17:29:44 +00006925 pci_map_single(sp->pdev, ba->ba_0, BUF0_LEN,
6926 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006927 if (pci_dma_mapping_error(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006928 rxdp3->Buffer0_ptr)) {
6929 pci_unmap_single(sp->pdev,
6930 (dma_addr_t)rxdp3->Buffer2_ptr,
6931 dev->mtu + 4,
6932 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04006933 goto memalloc_failed;
6934 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006935 rxdp->Host_Control = (unsigned long) (*skb);
6936
6937 /* Buffer-1 will be dummy buffer not used */
Veena Parat6d517a22007-07-23 02:20:51 -04006938 rxdp3->Buffer1_ptr = *temp1 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006939 pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
Joe Perchesd44570e2009-08-24 17:29:44 +00006940 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006941 if (pci_dma_mapping_error(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006942 rxdp3->Buffer1_ptr)) {
6943 pci_unmap_single(sp->pdev,
6944 (dma_addr_t)rxdp3->Buffer0_ptr,
6945 BUF0_LEN, PCI_DMA_FROMDEVICE);
6946 pci_unmap_single(sp->pdev,
6947 (dma_addr_t)rxdp3->Buffer2_ptr,
6948 dev->mtu + 4,
6949 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04006950 goto memalloc_failed;
6951 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006952 }
6953 }
6954 return 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00006955
6956memalloc_failed:
6957 stats->pci_map_fail_cnt++;
6958 stats->mem_freed += (*skb)->truesize;
6959 dev_kfree_skb(*skb);
6960 return -ENOMEM;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006961}
Veena Parat491abf22007-07-23 02:37:14 -04006962
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006963static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
6964 int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006965{
6966 struct net_device *dev = sp->dev;
6967 if (sp->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006968 rxdp->Control_2 = SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006969 } else if (sp->rxd_mode == RXD_MODE_3B) {
6970 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
6971 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
Joe Perchesd44570e2009-08-24 17:29:44 +00006972 rxdp->Control_2 |= SET_BUFFER2_SIZE_3(dev->mtu + 4);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006973 }
6974}
6975
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006976static int rxd_owner_bit_reset(struct s2io_nic *sp)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006977{
6978 int i, j, k, blk_cnt = 0, size;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006979 struct config_param *config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00006980 struct mac_info *mac_control = &sp->mac_control;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006981 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006982 struct RxD_t *rxdp = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006983 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006984 struct buffAdd *ba = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006985 u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;
6986
6987 /* Calculate the size based on ring mode */
6988 size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
6989 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
6990 if (sp->rxd_mode == RXD_MODE_1)
6991 size += NET_IP_ALIGN;
6992 else if (sp->rxd_mode == RXD_MODE_3B)
6993 size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006994
6995 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00006996 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
6997 struct ring_info *ring = &mac_control->rings[i];
6998
Joe Perchesd44570e2009-08-24 17:29:44 +00006999 blk_cnt = rx_cfg->num_rxd / (rxd_count[sp->rxd_mode] + 1);
Ananda Raju5d3213c2006-04-21 19:23:26 -04007000
7001 for (j = 0; j < blk_cnt; j++) {
7002 for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007003 rxdp = ring->rx_blocks[j].rxds[k].virt_addr;
7004 if (sp->rxd_mode == RXD_MODE_3B)
Joe Perches13d866a2009-08-24 17:29:41 +00007005 ba = &ring->ba[j][k];
Joe Perchesd44570e2009-08-24 17:29:44 +00007006 if (set_rxd_buffer_pointer(sp, rxdp, ba, &skb,
7007 (u64 *)&temp0_64,
7008 (u64 *)&temp1_64,
7009 (u64 *)&temp2_64,
7010 size) == -ENOMEM) {
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05007011 return 0;
7012 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04007013
7014 set_rxd_buffer_size(sp, rxdp, size);
7015 wmb();
7016 /* flip the Ownership bit to Hardware */
7017 rxdp->Control_1 |= RXD_OWN_XENA;
7018 }
7019 }
7020 }
7021 return 0;
7022
7023}
7024
Joe Perchesd44570e2009-08-24 17:29:44 +00007025static int s2io_add_isr(struct s2io_nic *sp)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007026{
7027 int ret = 0;
7028 struct net_device *dev = sp->dev;
7029 int err = 0;
7030
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007031 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007032 ret = s2io_enable_msi_x(sp);
7033 if (ret) {
7034 DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007035 sp->config.intr_type = INTA;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007036 }
7037
Joe Perchesd44570e2009-08-24 17:29:44 +00007038 /*
7039 * Store the values of the MSIX table in
7040 * the struct s2io_nic structure
7041 */
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007042 store_xmsi_data(sp);
7043
7044 /* After proper initialization of H/W, register ISR */
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007045 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007046 int i, msix_rx_cnt = 0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007047
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007048 for (i = 0; i < sp->num_entries; i++) {
7049 if (sp->s2io_entries[i].in_use == MSIX_FLG) {
7050 if (sp->s2io_entries[i].type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00007051 MSIX_RING_TYPE) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007052 sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
7053 dev->name, i);
7054 err = request_irq(sp->entries[i].vector,
Joe Perchesd44570e2009-08-24 17:29:44 +00007055 s2io_msix_ring_handle,
7056 0,
7057 sp->desc[i],
7058 sp->s2io_entries[i].arg);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007059 } else if (sp->s2io_entries[i].type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00007060 MSIX_ALARM_TYPE) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007061 sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
Joe Perchesd44570e2009-08-24 17:29:44 +00007062 dev->name, i);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007063 err = request_irq(sp->entries[i].vector,
Joe Perchesd44570e2009-08-24 17:29:44 +00007064 s2io_msix_fifo_handle,
7065 0,
7066 sp->desc[i],
7067 sp->s2io_entries[i].arg);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007068
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007069 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007070 /* if either data or addr is zero print it. */
7071 if (!(sp->msix_info[i].addr &&
Joe Perchesd44570e2009-08-24 17:29:44 +00007072 sp->msix_info[i].data)) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007073 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007074 "%s @Addr:0x%llx Data:0x%llx\n",
7075 sp->desc[i],
7076 (unsigned long long)
7077 sp->msix_info[i].addr,
7078 (unsigned long long)
7079 ntohl(sp->msix_info[i].data));
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007080 } else
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007081 msix_rx_cnt++;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007082 if (err) {
7083 remove_msix_isr(sp);
7084
7085 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007086 "%s:MSI-X-%d registration "
7087 "failed\n", dev->name, i);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007088
7089 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007090 "%s: Defaulting to INTA\n",
7091 dev->name);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007092 sp->config.intr_type = INTA;
7093 break;
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007094 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007095 sp->s2io_entries[i].in_use =
7096 MSIX_REGISTERED_SUCCESS;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007097 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007098 }
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007099 if (!err) {
Joe Perches6cef2b8e2009-08-24 17:29:45 +00007100 pr_info("MSI-X-RX %d entries enabled\n", --msix_rx_cnt);
Joe Perches9e39f7c2009-08-25 08:52:00 +00007101 DBG_PRINT(INFO_DBG,
7102 "MSI-X-TX entries enabled through alarm vector\n");
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007103 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007104 }
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007105 if (sp->config.intr_type == INTA) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007106 err = request_irq((int)sp->pdev->irq, s2io_isr, IRQF_SHARED,
7107 sp->name, dev);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007108 if (err) {
7109 DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
7110 dev->name);
7111 return -1;
7112 }
7113 }
7114 return 0;
7115}
Joe Perchesd44570e2009-08-24 17:29:44 +00007116
7117static void s2io_rem_isr(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007118{
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007119 if (sp->config.intr_type == MSI_X)
7120 remove_msix_isr(sp);
7121 else
7122 remove_inta_isr(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007123}
7124
Joe Perchesd44570e2009-08-24 17:29:44 +00007125static void do_s2io_card_down(struct s2io_nic *sp, int do_io)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007126{
7127 int cnt = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007128 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007129 register u64 val64 = 0;
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007130 struct config_param *config;
7131 config = &sp->config;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007132
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007133 if (!is_s2io_card_up(sp))
7134 return;
7135
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007136 del_timer_sync(&sp->alarm_timer);
7137 /* If s2io_set_link task is executing, wait till it completes. */
Joe Perchesd44570e2009-08-24 17:29:44 +00007138 while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state)))
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007139 msleep(50);
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007140 clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007141
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007142 /* Disable napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007143 if (sp->config.napi) {
7144 int off = 0;
7145 if (config->intr_type == MSI_X) {
7146 for (; off < sp->config.rx_ring_num; off++)
7147 napi_disable(&sp->mac_control.rings[off].napi);
Joe Perchesd44570e2009-08-24 17:29:44 +00007148 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007149 else
7150 napi_disable(&sp->napi);
7151 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007152
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007153 /* disable Tx and Rx traffic on the NIC */
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007154 if (do_io)
7155 stop_nic(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007156
7157 s2io_rem_isr(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007158
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007159 /* stop the tx queue, indicate link down */
7160 s2io_link(sp, LINK_DOWN);
7161
Linus Torvalds1da177e2005-04-16 15:20:36 -07007162 /* Check if the device is Quiescent and then Reset the NIC */
Joe Perchesd44570e2009-08-24 17:29:44 +00007163 while (do_io) {
Ananda Raju5d3213c2006-04-21 19:23:26 -04007164 /* As per the HW requirement we need to replenish the
7165 * receive buffer to avoid the ring bump. Since there is
7166 * no intention of processing the Rx frame at this pointwe are
7167 * just settting the ownership bit of rxd in Each Rx
7168 * ring to HW and set the appropriate buffer size
7169 * based on the ring mode
7170 */
7171 rxd_owner_bit_reset(sp);
7172
Linus Torvalds1da177e2005-04-16 15:20:36 -07007173 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007174 if (verify_xena_quiescence(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007175 if (verify_pcc_quiescent(sp, sp->device_enabled_once))
7176 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007177 }
7178
7179 msleep(50);
7180 cnt++;
7181 if (cnt == 10) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007182 DBG_PRINT(ERR_DBG, "Device not Quiescent - "
7183 "adapter status reads 0x%llx\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007184 (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007185 break;
7186 }
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007187 }
7188 if (do_io)
7189 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007190
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007191 /* Free all Tx buffers */
7192 free_tx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007193
7194 /* Free all Rx buffers */
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007195 free_rx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007196
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007197 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007198}
7199
Joe Perchesd44570e2009-08-24 17:29:44 +00007200static void s2io_card_down(struct s2io_nic *sp)
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007201{
7202 do_s2io_card_down(sp, 1);
7203}
7204
Joe Perchesd44570e2009-08-24 17:29:44 +00007205static int s2io_card_up(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007206{
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007207 int i, ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007208 struct config_param *config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007209 struct mac_info *mac_control;
Joe Perchesd44570e2009-08-24 17:29:44 +00007210 struct net_device *dev = (struct net_device *)sp->dev;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007211 u16 interruptible;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007212
7213 /* Initialize the H/W I/O registers */
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007214 ret = init_nic(sp);
7215 if (ret != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007216 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
7217 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007218 if (ret != -EIO)
7219 s2io_reset(sp);
7220 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007221 }
7222
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007223 /*
7224 * Initializing the Rx buffers. For now we are considering only 1
Linus Torvalds1da177e2005-04-16 15:20:36 -07007225 * Rx ring and initializing buffers into 30 Rx blocks
7226 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007227 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007228 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007229
7230 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007231 struct ring_info *ring = &mac_control->rings[i];
7232
7233 ring->mtu = dev->mtu;
7234 ret = fill_rx_buffers(sp, ring, 1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007235 if (ret) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007236 DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
7237 dev->name);
7238 s2io_reset(sp);
7239 free_rx_buffers(sp);
7240 return -ENOMEM;
7241 }
7242 DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
Joe Perches13d866a2009-08-24 17:29:41 +00007243 ring->rx_bufs_left);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007244 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007245
7246 /* Initialise napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007247 if (config->napi) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007248 if (config->intr_type == MSI_X) {
7249 for (i = 0; i < sp->config.rx_ring_num; i++)
7250 napi_enable(&sp->mac_control.rings[i].napi);
7251 } else {
7252 napi_enable(&sp->napi);
7253 }
7254 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007255
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007256 /* Maintain the state prior to the open */
7257 if (sp->promisc_flg)
7258 sp->promisc_flg = 0;
7259 if (sp->m_cast_flg) {
7260 sp->m_cast_flg = 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00007261 sp->all_multi_pos = 0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007262 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007263
7264 /* Setting its receive mode */
7265 s2io_set_multicast(dev);
7266
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007267 if (sp->lro) {
Ananda Rajub41477f2006-07-24 19:52:49 -04007268 /* Initialize max aggregatable pkts per session based on MTU */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007269 sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
Joe Perchesd44570e2009-08-24 17:29:44 +00007270 /* Check if we can use (if specified) user provided value */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007271 if (lro_max_pkts < sp->lro_max_aggr_per_sess)
7272 sp->lro_max_aggr_per_sess = lro_max_pkts;
7273 }
7274
Linus Torvalds1da177e2005-04-16 15:20:36 -07007275 /* Enable Rx Traffic and interrupts on the NIC */
7276 if (start_nic(sp)) {
7277 DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007278 s2io_reset(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007279 free_rx_buffers(sp);
7280 return -ENODEV;
7281 }
7282
7283 /* Add interrupt service routine */
7284 if (s2io_add_isr(sp) != 0) {
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007285 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007286 s2io_rem_isr(sp);
7287 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007288 free_rx_buffers(sp);
7289 return -ENODEV;
7290 }
7291
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07007292 S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));
7293
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007294 set_bit(__S2IO_STATE_CARD_UP, &sp->state);
7295
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007296 /* Enable select interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007297 en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007298 if (sp->config.intr_type != INTA) {
7299 interruptible = TX_TRAFFIC_INTR | TX_PIC_INTR;
7300 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7301 } else {
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007302 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007303 interruptible |= TX_PIC_INTR;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007304 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7305 }
7306
Linus Torvalds1da177e2005-04-16 15:20:36 -07007307 return 0;
7308}
7309
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007310/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07007311 * s2io_restart_nic - Resets the NIC.
7312 * @data : long pointer to the device private structure
7313 * Description:
7314 * This function is scheduled to be run by the s2io_tx_watchdog
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007315 * function after 0.5 secs to reset the NIC. The idea is to reduce
Linus Torvalds1da177e2005-04-16 15:20:36 -07007316 * the run time of the watch dog routine which is run holding a
7317 * spin lock.
7318 */
7319
David Howellsc4028952006-11-22 14:57:56 +00007320static void s2io_restart_nic(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007321{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007322 struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
David Howellsc4028952006-11-22 14:57:56 +00007323 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007324
Francois Romieu22747d62007-02-15 23:37:50 +01007325 rtnl_lock();
7326
7327 if (!netif_running(dev))
7328 goto out_unlock;
7329
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007330 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007331 if (s2io_card_up(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007332 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007333 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007334 s2io_wake_all_tx_queue(sp);
Joe Perchesd44570e2009-08-24 17:29:44 +00007335 DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n", dev->name);
Francois Romieu22747d62007-02-15 23:37:50 +01007336out_unlock:
7337 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07007338}
7339
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007340/**
7341 * s2io_tx_watchdog - Watchdog for transmit side.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007342 * @dev : Pointer to net device structure
7343 * Description:
7344 * This function is triggered if the Tx Queue is stopped
7345 * for a pre-defined amount of time when the Interface is still up.
7346 * If the Interface is jammed in such a situation, the hardware is
7347 * reset (by s2io_close) and restarted again (by s2io_open) to
7348 * overcome any problem that might have been caused in the hardware.
7349 * Return value:
7350 * void
7351 */
7352
7353static void s2io_tx_watchdog(struct net_device *dev)
7354{
Wang Chen4cf16532008-11-12 23:38:14 -08007355 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00007356 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007357
7358 if (netif_carrier_ok(dev)) {
Joe Perchesffb5df62009-08-24 17:29:47 +00007359 swstats->watchdog_timer_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007360 schedule_work(&sp->rst_timer_task);
Joe Perchesffb5df62009-08-24 17:29:47 +00007361 swstats->soft_reset_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007362 }
7363}
7364
7365/**
7366 * rx_osm_handler - To perform some OS related operations on SKB.
7367 * @sp: private member of the device structure,pointer to s2io_nic structure.
7368 * @skb : the socket buffer pointer.
7369 * @len : length of the packet
7370 * @cksum : FCS checksum of the frame.
7371 * @ring_no : the ring from which this RxD was extracted.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007372 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04007373 * This function is called by the Rx interrupt serivce routine to perform
Linus Torvalds1da177e2005-04-16 15:20:36 -07007374 * some OS related operations on the SKB before passing it to the upper
7375 * layers. It mainly checks if the checksum is OK, if so adds it to the
7376 * SKBs cksum variable, increments the Rx packet count and passes the SKB
7377 * to the upper layer. If the checksum is wrong, it increments the Rx
7378 * packet error count, frees the SKB and returns error.
7379 * Return value:
7380 * SUCCESS on success and -1 on failure.
7381 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007382static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007383{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007384 struct s2io_nic *sp = ring_data->nic;
Joe Perchesd44570e2009-08-24 17:29:44 +00007385 struct net_device *dev = (struct net_device *)ring_data->dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007386 struct sk_buff *skb = (struct sk_buff *)
Joe Perchesd44570e2009-08-24 17:29:44 +00007387 ((unsigned long)rxdp->Host_Control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007388 int ring_no = ring_data->ring_no;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007389 u16 l3_csum, l4_csum;
Ananda Raju863c11a2006-04-21 19:03:13 -04007390 unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
Ingo Molnar2e6a6842008-11-25 16:47:35 -08007391 struct lro *uninitialized_var(lro);
Olaf Heringf9046eb2007-06-19 22:41:10 +02007392 u8 err_mask;
Joe Perchesffb5df62009-08-24 17:29:47 +00007393 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007394
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007395 skb->dev = dev;
Ananda Rajuc92ca042006-04-21 19:18:03 -04007396
Ananda Raju863c11a2006-04-21 19:03:13 -04007397 if (err) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04007398 /* Check for parity error */
Joe Perchesd44570e2009-08-24 17:29:44 +00007399 if (err & 0x1)
Joe Perchesffb5df62009-08-24 17:29:47 +00007400 swstats->parity_err_cnt++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007401
Olaf Heringf9046eb2007-06-19 22:41:10 +02007402 err_mask = err >> 48;
Joe Perchesd44570e2009-08-24 17:29:44 +00007403 switch (err_mask) {
7404 case 1:
Joe Perchesffb5df62009-08-24 17:29:47 +00007405 swstats->rx_parity_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007406 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04007407
Joe Perchesd44570e2009-08-24 17:29:44 +00007408 case 2:
Joe Perchesffb5df62009-08-24 17:29:47 +00007409 swstats->rx_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007410 break;
7411
Joe Perchesd44570e2009-08-24 17:29:44 +00007412 case 3:
Joe Perchesffb5df62009-08-24 17:29:47 +00007413 swstats->rx_parity_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007414 break;
7415
Joe Perchesd44570e2009-08-24 17:29:44 +00007416 case 4:
Joe Perchesffb5df62009-08-24 17:29:47 +00007417 swstats->rx_rda_fail_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007418 break;
7419
Joe Perchesd44570e2009-08-24 17:29:44 +00007420 case 5:
Joe Perchesffb5df62009-08-24 17:29:47 +00007421 swstats->rx_unkn_prot_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007422 break;
7423
Joe Perchesd44570e2009-08-24 17:29:44 +00007424 case 6:
Joe Perchesffb5df62009-08-24 17:29:47 +00007425 swstats->rx_fcs_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007426 break;
7427
Joe Perchesd44570e2009-08-24 17:29:44 +00007428 case 7:
Joe Perchesffb5df62009-08-24 17:29:47 +00007429 swstats->rx_buf_size_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007430 break;
7431
Joe Perchesd44570e2009-08-24 17:29:44 +00007432 case 8:
Joe Perchesffb5df62009-08-24 17:29:47 +00007433 swstats->rx_rxd_corrupt_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007434 break;
7435
Joe Perchesd44570e2009-08-24 17:29:44 +00007436 case 15:
Joe Perchesffb5df62009-08-24 17:29:47 +00007437 swstats->rx_unkn_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007438 break;
7439 }
Ananda Raju863c11a2006-04-21 19:03:13 -04007440 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00007441 * Drop the packet if bad transfer code. Exception being
7442 * 0x5, which could be due to unsupported IPv6 extension header.
7443 * In this case, we let stack handle the packet.
7444 * Note that in this case, since checksum will be incorrect,
7445 * stack will validate the same.
7446 */
Olaf Heringf9046eb2007-06-19 22:41:10 +02007447 if (err_mask != 0x5) {
7448 DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007449 dev->name, err_mask);
Breno Leitaodc56e632008-07-22 16:27:20 -03007450 dev->stats.rx_crc_errors++;
Joe Perchesffb5df62009-08-24 17:29:47 +00007451 swstats->mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007452 += skb->truesize;
Ananda Raju863c11a2006-04-21 19:03:13 -04007453 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007454 ring_data->rx_bufs_left -= 1;
Ananda Raju863c11a2006-04-21 19:03:13 -04007455 rxdp->Host_Control = 0;
7456 return 0;
7457 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007458 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007459
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007460 /* Updating statistics */
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007461 ring_data->rx_packets++;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007462 rxdp->Host_Control = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007463 if (sp->rxd_mode == RXD_MODE_1) {
7464 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007465
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007466 ring_data->rx_bytes += len;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007467 skb_put(skb, len);
7468
Veena Parat6d517a22007-07-23 02:20:51 -04007469 } else if (sp->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05007470 int get_block = ring_data->rx_curr_get_info.block_index;
7471 int get_off = ring_data->rx_curr_get_info.offset;
7472 int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
7473 int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
7474 unsigned char *buff = skb_push(skb, buf0_len);
7475
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007476 struct buffAdd *ba = &ring_data->ba[get_block][get_off];
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007477 ring_data->rx_bytes += buf0_len + buf2_len;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007478 memcpy(buff, ba->ba_0, buf0_len);
Veena Parat6d517a22007-07-23 02:20:51 -04007479 skb_put(skb, buf2_len);
Ananda Rajuda6971d2005-10-31 16:55:31 -05007480 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007481
Joe Perchesd44570e2009-08-24 17:29:44 +00007482 if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) &&
7483 ((!ring_data->lro) ||
7484 (ring_data->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007485 (sp->rx_csum)) {
7486 l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
7487 l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
7488 if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7489 /*
7490 * NIC verifies if the Checksum of the received
7491 * frame is Ok or not and accordingly returns
7492 * a flag in the RxD.
7493 */
7494 skb->ip_summed = CHECKSUM_UNNECESSARY;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007495 if (ring_data->lro) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007496 u32 tcp_len;
7497 u8 *tcp;
7498 int ret = 0;
7499
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007500 ret = s2io_club_tcp_session(ring_data,
Joe Perchesd44570e2009-08-24 17:29:44 +00007501 skb->data, &tcp,
7502 &tcp_len, &lro,
7503 rxdp, sp);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007504 switch (ret) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007505 case 3: /* Begin anew */
7506 lro->parent = skb;
7507 goto aggregate;
7508 case 1: /* Aggregate */
7509 lro_append_pkt(sp, lro, skb, tcp_len);
7510 goto aggregate;
7511 case 4: /* Flush session */
7512 lro_append_pkt(sp, lro, skb, tcp_len);
7513 queue_rx_frame(lro->parent,
7514 lro->vlan_tag);
7515 clear_lro_session(lro);
Joe Perchesffb5df62009-08-24 17:29:47 +00007516 swstats->flush_max_pkts++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007517 goto aggregate;
7518 case 2: /* Flush both */
7519 lro->parent->data_len = lro->frags_len;
Joe Perchesffb5df62009-08-24 17:29:47 +00007520 swstats->sending_both++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007521 queue_rx_frame(lro->parent,
7522 lro->vlan_tag);
7523 clear_lro_session(lro);
7524 goto send_up;
7525 case 0: /* sessions exceeded */
7526 case -1: /* non-TCP or not L2 aggregatable */
7527 case 5: /*
7528 * First pkt in session not
7529 * L3/L4 aggregatable
7530 */
7531 break;
7532 default:
7533 DBG_PRINT(ERR_DBG,
7534 "%s: Samadhana!!\n",
7535 __func__);
7536 BUG();
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007537 }
7538 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007539 } else {
7540 /*
7541 * Packet with erroneous checksum, let the
7542 * upper layers deal with it.
7543 */
7544 skb->ip_summed = CHECKSUM_NONE;
7545 }
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007546 } else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007547 skb->ip_summed = CHECKSUM_NONE;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007548
Joe Perchesffb5df62009-08-24 17:29:47 +00007549 swstats->mem_freed += skb->truesize;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007550send_up:
David S. Miller0c8dfc82009-01-27 16:22:32 -08007551 skb_record_rx_queue(skb, ring_no);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007552 queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007553aggregate:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007554 sp->mac_control.rings[ring_no].rx_bufs_left -= 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007555 return SUCCESS;
7556}
7557
7558/**
7559 * s2io_link - stops/starts the Tx queue.
7560 * @sp : private member of the device structure, which is a pointer to the
7561 * s2io_nic structure.
7562 * @link : inidicates whether link is UP/DOWN.
7563 * Description:
7564 * This function stops/starts the Tx queue depending on whether the link
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007565 * status of the NIC is is down or up. This is called by the Alarm
7566 * interrupt handler whenever a link change interrupt comes up.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007567 * Return value:
7568 * void.
7569 */
7570
Joe Perchesd44570e2009-08-24 17:29:44 +00007571static void s2io_link(struct s2io_nic *sp, int link)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007572{
Joe Perchesd44570e2009-08-24 17:29:44 +00007573 struct net_device *dev = (struct net_device *)sp->dev;
Joe Perchesffb5df62009-08-24 17:29:47 +00007574 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007575
7576 if (link != sp->last_link_state) {
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007577 init_tti(sp, link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007578 if (link == LINK_DOWN) {
7579 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007580 s2io_stop_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007581 netif_carrier_off(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00007582 if (swstats->link_up_cnt)
7583 swstats->link_up_time =
7584 jiffies - sp->start_time;
7585 swstats->link_down_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007586 } else {
7587 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
Joe Perchesffb5df62009-08-24 17:29:47 +00007588 if (swstats->link_down_cnt)
7589 swstats->link_down_time =
Joe Perchesd44570e2009-08-24 17:29:44 +00007590 jiffies - sp->start_time;
Joe Perchesffb5df62009-08-24 17:29:47 +00007591 swstats->link_up_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007592 netif_carrier_on(dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007593 s2io_wake_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007594 }
7595 }
7596 sp->last_link_state = link;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007597 sp->start_time = jiffies;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007598}
7599
7600/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007601 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
7602 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07007603 * s2io_nic structure.
7604 * Description:
7605 * This function initializes a few of the PCI and PCI-X configuration registers
7606 * with recommended values.
7607 * Return value:
7608 * void
7609 */
7610
Joe Perchesd44570e2009-08-24 17:29:44 +00007611static void s2io_init_pci(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007612{
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007613 u16 pci_cmd = 0, pcix_cmd = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007614
7615 /* Enable Data Parity Error Recovery in PCI-X command register. */
7616 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007617 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007618 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007619 (pcix_cmd | 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007620 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007621 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007622
7623 /* Set the PErr Response bit in PCI command register. */
7624 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
7625 pci_write_config_word(sp->pdev, PCI_COMMAND,
7626 (pci_cmd | PCI_COMMAND_PARITY));
7627 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007628}
7629
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007630static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type,
Joe Perchesd44570e2009-08-24 17:29:44 +00007631 u8 *dev_multiq)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007632{
Joe Perchesd44570e2009-08-24 17:29:44 +00007633 if ((tx_fifo_num > MAX_TX_FIFOS) || (tx_fifo_num < 1)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007634 DBG_PRINT(ERR_DBG, "Requested number of tx fifos "
Joe Perchesd44570e2009-08-24 17:29:44 +00007635 "(%d) not supported\n", tx_fifo_num);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007636
7637 if (tx_fifo_num < 1)
7638 tx_fifo_num = 1;
7639 else
7640 tx_fifo_num = MAX_TX_FIFOS;
7641
Joe Perches9e39f7c2009-08-25 08:52:00 +00007642 DBG_PRINT(ERR_DBG, "Default to %d tx fifos\n", tx_fifo_num);
Ananda Raju9dc737a2006-04-21 19:05:41 -04007643 }
Surjit Reang2fda0962008-01-24 02:08:59 -08007644
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007645 if (multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007646 *dev_multiq = multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007647
7648 if (tx_steering_type && (1 == tx_fifo_num)) {
7649 if (tx_steering_type != TX_DEFAULT_STEERING)
7650 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007651 "Tx steering is not supported with "
Joe Perchesd44570e2009-08-24 17:29:44 +00007652 "one fifo. Disabling Tx steering.\n");
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007653 tx_steering_type = NO_STEERING;
7654 }
7655
7656 if ((tx_steering_type < NO_STEERING) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00007657 (tx_steering_type > TX_DEFAULT_STEERING)) {
7658 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007659 "Requested transmit steering not supported\n");
7660 DBG_PRINT(ERR_DBG, "Disabling transmit steering\n");
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007661 tx_steering_type = NO_STEERING;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007662 }
7663
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007664 if (rx_ring_num > MAX_RX_RINGS) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007665 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007666 "Requested number of rx rings not supported\n");
7667 DBG_PRINT(ERR_DBG, "Default to %d rx rings\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007668 MAX_RX_RINGS);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007669 rx_ring_num = MAX_RX_RINGS;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007670 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007671
Veena Parateccb8622007-07-23 02:23:54 -04007672 if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007673 DBG_PRINT(ERR_DBG, "Wrong intr_type requested. "
Ananda Raju9dc737a2006-04-21 19:05:41 -04007674 "Defaulting to INTA\n");
7675 *dev_intr_type = INTA;
7676 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007677
Ananda Raju9dc737a2006-04-21 19:05:41 -04007678 if ((*dev_intr_type == MSI_X) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00007679 ((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
7680 (pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007681 DBG_PRINT(ERR_DBG, "Xframe I does not support MSI_X. "
Joe Perchesd44570e2009-08-24 17:29:44 +00007682 "Defaulting to INTA\n");
Ananda Raju9dc737a2006-04-21 19:05:41 -04007683 *dev_intr_type = INTA;
7684 }
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007685
Veena Parat6d517a22007-07-23 02:20:51 -04007686 if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007687 DBG_PRINT(ERR_DBG, "Requested ring mode not supported\n");
7688 DBG_PRINT(ERR_DBG, "Defaulting to 1-buffer mode\n");
Veena Parat6d517a22007-07-23 02:20:51 -04007689 rx_ring_mode = 1;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007690 }
7691 return SUCCESS;
7692}
7693
Linus Torvalds1da177e2005-04-16 15:20:36 -07007694/**
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007695 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
7696 * or Traffic class respectively.
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007697 * @nic: device private variable
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007698 * Description: The function configures the receive steering to
7699 * desired receive ring.
7700 * Return Value: SUCCESS on success and
7701 * '-1' on failure (endian settings incorrect).
7702 */
7703static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
7704{
7705 struct XENA_dev_config __iomem *bar0 = nic->bar0;
7706 register u64 val64 = 0;
7707
7708 if (ds_codepoint > 63)
7709 return FAILURE;
7710
7711 val64 = RTS_DS_MEM_DATA(ring);
7712 writeq(val64, &bar0->rts_ds_mem_data);
7713
7714 val64 = RTS_DS_MEM_CTRL_WE |
7715 RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
7716 RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);
7717
7718 writeq(val64, &bar0->rts_ds_mem_ctrl);
7719
7720 return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
Joe Perchesd44570e2009-08-24 17:29:44 +00007721 RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
7722 S2IO_BIT_RESET);
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007723}
7724
Stephen Hemminger04025092008-11-21 17:28:55 -08007725static const struct net_device_ops s2io_netdev_ops = {
7726 .ndo_open = s2io_open,
7727 .ndo_stop = s2io_close,
7728 .ndo_get_stats = s2io_get_stats,
7729 .ndo_start_xmit = s2io_xmit,
7730 .ndo_validate_addr = eth_validate_addr,
7731 .ndo_set_multicast_list = s2io_set_multicast,
7732 .ndo_do_ioctl = s2io_ioctl,
7733 .ndo_set_mac_address = s2io_set_mac_addr,
7734 .ndo_change_mtu = s2io_change_mtu,
7735 .ndo_vlan_rx_register = s2io_vlan_rx_register,
7736 .ndo_vlan_rx_kill_vid = s2io_vlan_rx_kill_vid,
7737 .ndo_tx_timeout = s2io_tx_watchdog,
7738#ifdef CONFIG_NET_POLL_CONTROLLER
7739 .ndo_poll_controller = s2io_netpoll,
7740#endif
7741};
7742
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007743/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007744 * s2io_init_nic - Initialization of the adapter .
Linus Torvalds1da177e2005-04-16 15:20:36 -07007745 * @pdev : structure containing the PCI related information of the device.
7746 * @pre: List of PCI devices supported by the driver listed in s2io_tbl.
7747 * Description:
7748 * The function initializes an adapter identified by the pci_dec structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007749 * All OS related initialization including memory and device structure and
7750 * initlaization of the device private variable is done. Also the swapper
7751 * control register is initialized to enable read and write into the I/O
Linus Torvalds1da177e2005-04-16 15:20:36 -07007752 * registers of the device.
7753 * Return value:
7754 * returns 0 on success and negative on failure.
7755 */
7756
7757static int __devinit
7758s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
7759{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007760 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007761 struct net_device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007762 int i, j, ret;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007763 int dma_flag = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007764 u32 mac_up, mac_down;
7765 u64 val64 = 0, tmp64 = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007766 struct XENA_dev_config __iomem *bar0 = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007767 u16 subid;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007768 struct config_param *config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007769 struct mac_info *mac_control;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007770 int mode;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007771 u8 dev_intr_type = intr_type;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007772 u8 dev_multiq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007773
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007774 ret = s2io_verify_parm(pdev, &dev_intr_type, &dev_multiq);
7775 if (ret)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007776 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007777
Joe Perchesd44570e2009-08-24 17:29:44 +00007778 ret = pci_enable_device(pdev);
7779 if (ret) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007780 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007781 "%s: pci_enable_device failed\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007782 return ret;
7783 }
7784
Yang Hongyang6a355282009-04-06 19:01:13 -07007785 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007786 DBG_PRINT(INIT_DBG, "%s: Using 64bit DMA\n", __func__);
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007787 dma_flag = true;
Joe Perchesd44570e2009-08-24 17:29:44 +00007788 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007789 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007790 "Unable to obtain 64bit DMA "
7791 "for consistent allocations\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07007792 pci_disable_device(pdev);
7793 return -ENOMEM;
7794 }
Yang Hongyang284901a2009-04-06 19:01:15 -07007795 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007796 DBG_PRINT(INIT_DBG, "%s: Using 32bit DMA\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007797 } else {
7798 pci_disable_device(pdev);
7799 return -ENOMEM;
7800 }
Joe Perchesd44570e2009-08-24 17:29:44 +00007801 ret = pci_request_regions(pdev, s2io_driver_name);
7802 if (ret) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007803 DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007804 __func__, ret);
Veena Parateccb8622007-07-23 02:23:54 -04007805 pci_disable_device(pdev);
7806 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007807 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007808 if (dev_multiq)
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007809 dev = alloc_etherdev_mq(sizeof(struct s2io_nic), tx_fifo_num);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007810 else
David S. Millerb19fa1f2008-07-08 23:14:24 -07007811 dev = alloc_etherdev(sizeof(struct s2io_nic));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007812 if (dev == NULL) {
7813 DBG_PRINT(ERR_DBG, "Device allocation failed\n");
7814 pci_disable_device(pdev);
7815 pci_release_regions(pdev);
7816 return -ENODEV;
7817 }
7818
7819 pci_set_master(pdev);
7820 pci_set_drvdata(pdev, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007821 SET_NETDEV_DEV(dev, &pdev->dev);
7822
7823 /* Private member variable initialized to s2io NIC structure */
Wang Chen4cf16532008-11-12 23:38:14 -08007824 sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007825 memset(sp, 0, sizeof(struct s2io_nic));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007826 sp->dev = dev;
7827 sp->pdev = pdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007828 sp->high_dma_flag = dma_flag;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007829 sp->device_enabled_once = false;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007830 if (rx_ring_mode == 1)
7831 sp->rxd_mode = RXD_MODE_1;
7832 if (rx_ring_mode == 2)
7833 sp->rxd_mode = RXD_MODE_3B;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007834
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007835 sp->config.intr_type = dev_intr_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007836
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007837 if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00007838 (pdev->device == PCI_DEVICE_ID_HERC_UNI))
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007839 sp->device_type = XFRAME_II_DEVICE;
7840 else
7841 sp->device_type = XFRAME_I_DEVICE;
7842
Stephen Hemminger43b7c452007-10-05 12:39:21 -07007843 sp->lro = lro_enable;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04007844
Linus Torvalds1da177e2005-04-16 15:20:36 -07007845 /* Initialize some PCI/PCI-X fields of the NIC. */
7846 s2io_init_pci(sp);
7847
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007848 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07007849 * Setting the device configuration parameters.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007850 * Most of these parameters can be specified by the user during
7851 * module insertion as they are module loadable parameters. If
7852 * these parameters are not not specified during load time, they
Linus Torvalds1da177e2005-04-16 15:20:36 -07007853 * are initialized with default values.
7854 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007855 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007856 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007857
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007858 config->napi = napi;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007859 config->tx_steering_type = tx_steering_type;
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007860
Linus Torvalds1da177e2005-04-16 15:20:36 -07007861 /* Tx side parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007862 if (config->tx_steering_type == TX_PRIORITY_STEERING)
7863 config->tx_fifo_num = MAX_TX_FIFOS;
7864 else
7865 config->tx_fifo_num = tx_fifo_num;
7866
7867 /* Initialize the fifos used for tx steering */
7868 if (config->tx_fifo_num < 5) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007869 if (config->tx_fifo_num == 1)
7870 sp->total_tcp_fifos = 1;
7871 else
7872 sp->total_tcp_fifos = config->tx_fifo_num - 1;
7873 sp->udp_fifo_idx = config->tx_fifo_num - 1;
7874 sp->total_udp_fifos = 1;
7875 sp->other_fifo_idx = sp->total_tcp_fifos - 1;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007876 } else {
7877 sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM -
Joe Perchesd44570e2009-08-24 17:29:44 +00007878 FIFO_OTHER_MAX_NUM);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007879 sp->udp_fifo_idx = sp->total_tcp_fifos;
7880 sp->total_udp_fifos = FIFO_UDP_MAX_NUM;
7881 sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM;
7882 }
7883
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007884 config->multiq = dev_multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007885 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007886 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
7887
7888 tx_cfg->fifo_len = tx_fifo_len[i];
7889 tx_cfg->fifo_priority = i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007890 }
7891
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007892 /* mapping the QoS priority to the configured fifos */
7893 for (i = 0; i < MAX_TX_FIFOS; i++)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007894 config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i];
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007895
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007896 /* map the hashing selector table to the configured fifos */
7897 for (i = 0; i < config->tx_fifo_num; i++)
7898 sp->fifo_selector[i] = fifo_selector[i];
7899
7900
Linus Torvalds1da177e2005-04-16 15:20:36 -07007901 config->tx_intr_type = TXD_INT_TYPE_UTILZ;
7902 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007903 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
7904
7905 tx_cfg->f_no_snoop = (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
7906 if (tx_cfg->fifo_len < 65) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007907 config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
7908 break;
7909 }
7910 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05007911 /* + 2 because one Txd for skb->data and one Txd for UFO */
7912 config->max_txds = MAX_SKB_FRAGS + 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007913
7914 /* Rx side parameters. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007915 config->rx_ring_num = rx_ring_num;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007916 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007917 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
7918 struct ring_info *ring = &mac_control->rings[i];
7919
7920 rx_cfg->num_rxd = rx_ring_sz[i] * (rxd_count[sp->rxd_mode] + 1);
7921 rx_cfg->ring_priority = i;
7922 ring->rx_bufs_left = 0;
7923 ring->rxd_mode = sp->rxd_mode;
7924 ring->rxd_count = rxd_count[sp->rxd_mode];
7925 ring->pdev = sp->pdev;
7926 ring->dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007927 }
7928
7929 for (i = 0; i < rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007930 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
7931
7932 rx_cfg->ring_org = RING_ORG_BUFF1;
7933 rx_cfg->f_no_snoop = (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007934 }
7935
7936 /* Setting Mac Control parameters */
7937 mac_control->rmac_pause_time = rmac_pause_time;
7938 mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
7939 mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;
7940
7941
Linus Torvalds1da177e2005-04-16 15:20:36 -07007942 /* initialize the shared memory used by the NIC and the host */
7943 if (init_shared_mem(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007944 DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007945 ret = -ENOMEM;
7946 goto mem_alloc_failed;
7947 }
7948
Arjan van de Ven275f1652008-10-20 21:42:39 -07007949 sp->bar0 = pci_ioremap_bar(pdev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007950 if (!sp->bar0) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007951 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007952 dev->name);
7953 ret = -ENOMEM;
7954 goto bar0_remap_failed;
7955 }
7956
Arjan van de Ven275f1652008-10-20 21:42:39 -07007957 sp->bar1 = pci_ioremap_bar(pdev, 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007958 if (!sp->bar1) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007959 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007960 dev->name);
7961 ret = -ENOMEM;
7962 goto bar1_remap_failed;
7963 }
7964
7965 dev->irq = pdev->irq;
Joe Perchesd44570e2009-08-24 17:29:44 +00007966 dev->base_addr = (unsigned long)sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007967
7968 /* Initializing the BAR1 address as the start of the FIFO pointer. */
7969 for (j = 0; j < MAX_TX_FIFOS; j++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007970 mac_control->tx_FIFO_start[j] =
7971 (struct TxFIFO_element __iomem *)
7972 (sp->bar1 + (j * 0x00020000));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007973 }
7974
7975 /* Driver entry points */
Stephen Hemminger04025092008-11-21 17:28:55 -08007976 dev->netdev_ops = &s2io_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007977 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07007978 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Brian Haley612eff02006-06-15 14:36:36 -04007979
Linus Torvalds1da177e2005-04-16 15:20:36 -07007980 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007981 if (sp->high_dma_flag == true)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007982 dev->features |= NETIF_F_HIGHDMA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007983 dev->features |= NETIF_F_TSO;
Herbert Xuf83ef8c2006-06-30 13:37:03 -07007984 dev->features |= NETIF_F_TSO6;
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05007985 if ((sp->device_type & XFRAME_II_DEVICE) && (ufo)) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05007986 dev->features |= NETIF_F_UFO;
7987 dev->features |= NETIF_F_HW_CSUM;
7988 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007989 dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
David Howellsc4028952006-11-22 14:57:56 +00007990 INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
7991 INIT_WORK(&sp->set_link_task, s2io_set_link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007992
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07007993 pci_save_state(sp->pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007994
7995 /* Setting swapper control on the NIC, for proper reset operation */
7996 if (s2io_set_swapper(sp)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007997 DBG_PRINT(ERR_DBG, "%s: swapper settings are wrong\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007998 dev->name);
7999 ret = -EAGAIN;
8000 goto set_swap_failed;
8001 }
8002
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008003 /* Verify if the Herc works on the slot its placed into */
8004 if (sp->device_type & XFRAME_II_DEVICE) {
8005 mode = s2io_verify_pci_mode(sp);
8006 if (mode < 0) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00008007 DBG_PRINT(ERR_DBG, "%s: Unsupported PCI bus mode\n",
8008 __func__);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008009 ret = -EBADSLT;
8010 goto set_swap_failed;
8011 }
8012 }
8013
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008014 if (sp->config.intr_type == MSI_X) {
8015 sp->num_entries = config->rx_ring_num + 1;
8016 ret = s2io_enable_msi_x(sp);
8017
8018 if (!ret) {
8019 ret = s2io_test_msi(sp);
8020 /* rollback MSI-X, will re-enable during add_isr() */
8021 remove_msix_isr(sp);
8022 }
8023 if (ret) {
8024
8025 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00008026 "MSI-X requested but failed to enable\n");
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008027 sp->config.intr_type = INTA;
8028 }
8029 }
8030
8031 if (config->intr_type == MSI_X) {
Joe Perches13d866a2009-08-24 17:29:41 +00008032 for (i = 0; i < config->rx_ring_num ; i++) {
8033 struct ring_info *ring = &mac_control->rings[i];
8034
8035 netif_napi_add(dev, &ring->napi, s2io_poll_msix, 64);
8036 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008037 } else {
8038 netif_napi_add(dev, &sp->napi, s2io_poll_inta, 64);
8039 }
8040
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008041 /* Not needed for Herc */
8042 if (sp->device_type & XFRAME_I_DEVICE) {
8043 /*
8044 * Fix for all "FFs" MAC address problems observed on
8045 * Alpha platforms
8046 */
8047 fix_mac_address(sp);
8048 s2io_reset(sp);
8049 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07008050
8051 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07008052 * MAC address initialization.
8053 * For now only one mac address will be read and used.
8054 */
8055 bar0 = sp->bar0;
8056 val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Joe Perchesd44570e2009-08-24 17:29:44 +00008057 RMAC_ADDR_CMD_MEM_OFFSET(0 + S2IO_MAC_ADDR_START_OFFSET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008058 writeq(val64, &bar0->rmac_addr_cmd_mem);
Ananda Rajuc92ca042006-04-21 19:18:03 -04008059 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00008060 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
8061 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008062 tmp64 = readq(&bar0->rmac_addr_data0_mem);
Joe Perchesd44570e2009-08-24 17:29:44 +00008063 mac_down = (u32)tmp64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008064 mac_up = (u32) (tmp64 >> 32);
8065
Linus Torvalds1da177e2005-04-16 15:20:36 -07008066 sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
8067 sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
8068 sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
8069 sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
8070 sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
8071 sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);
8072
Linus Torvalds1da177e2005-04-16 15:20:36 -07008073 /* Set the factory defined MAC address initially */
8074 dev->addr_len = ETH_ALEN;
8075 memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04008076 memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008077
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08008078 /* initialize number of multicast & unicast MAC entries variables */
8079 if (sp->device_type == XFRAME_I_DEVICE) {
8080 config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES;
8081 config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES;
8082 config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET;
8083 } else if (sp->device_type == XFRAME_II_DEVICE) {
8084 config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES;
8085 config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES;
8086 config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET;
8087 }
8088
8089 /* store mac addresses from CAM to s2io_nic structure */
8090 do_s2io_store_unicast_mc(sp);
8091
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008092 /* Configure MSIX vector for number of rings configured plus one */
8093 if ((sp->device_type == XFRAME_II_DEVICE) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00008094 (config->intr_type == MSI_X))
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008095 sp->num_entries = config->rx_ring_num + 1;
8096
Joe Perchesd44570e2009-08-24 17:29:44 +00008097 /* Store the values of the MSIX table in the s2io_nic structure */
Sivakumar Subramanic77dd432007-08-06 05:36:28 -04008098 store_xmsi_data(sp);
Ananda Rajub41477f2006-07-24 19:52:49 -04008099 /* reset Nic and bring it to known state */
8100 s2io_reset(sp);
8101
Linus Torvalds1da177e2005-04-16 15:20:36 -07008102 /*
Sreenivasa Honnur99993af2008-04-23 13:29:42 -04008103 * Initialize link state flags
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008104 * and the card state parameter
Linus Torvalds1da177e2005-04-16 15:20:36 -07008105 */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04008106 sp->state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008107
Linus Torvalds1da177e2005-04-16 15:20:36 -07008108 /* Initialize spinlocks */
Joe Perches13d866a2009-08-24 17:29:41 +00008109 for (i = 0; i < sp->config.tx_fifo_num; i++) {
8110 struct fifo_info *fifo = &mac_control->fifos[i];
8111
8112 spin_lock_init(&fifo->tx_lock);
8113 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008114
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008115 /*
8116 * SXE-002: Configure link and activity LED to init state
8117 * on driver load.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008118 */
8119 subid = sp->pdev->subsystem_device;
8120 if ((subid & 0xFF) >= 0x07) {
8121 val64 = readq(&bar0->gpio_control);
8122 val64 |= 0x0000800000000000ULL;
8123 writeq(val64, &bar0->gpio_control);
8124 val64 = 0x0411040400000000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00008125 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008126 val64 = readq(&bar0->gpio_control);
8127 }
8128
8129 sp->rx_csum = 1; /* Rx chksum verify enabled by default */
8130
8131 if (register_netdev(dev)) {
8132 DBG_PRINT(ERR_DBG, "Device registration failed\n");
8133 ret = -ENODEV;
8134 goto register_failed;
8135 }
Ananda Raju9dc737a2006-04-21 19:05:41 -04008136 s2io_vpd_read(sp);
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08008137 DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00008138 DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n", dev->name,
Auke Kok44c10132007-06-08 15:46:36 -07008139 sp->product_name, pdev->revision);
Ananda Rajub41477f2006-07-24 19:52:49 -04008140 DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
8141 s2io_driver_version);
Joe Perches9e39f7c2009-08-25 08:52:00 +00008142 DBG_PRINT(ERR_DBG, "%s: MAC Address: %pM\n", dev->name, dev->dev_addr);
8143 DBG_PRINT(ERR_DBG, "Serial number: %s\n", sp->serial_num);
Ananda Raju9dc737a2006-04-21 19:05:41 -04008144 if (sp->device_type & XFRAME_II_DEVICE) {
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07008145 mode = s2io_print_pci_mode(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008146 if (mode < 0) {
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008147 ret = -EBADSLT;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008148 unregister_netdev(dev);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008149 goto set_swap_failed;
8150 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008151 }
Joe Perchesd44570e2009-08-24 17:29:44 +00008152 switch (sp->rxd_mode) {
8153 case RXD_MODE_1:
8154 DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
8155 dev->name);
8156 break;
8157 case RXD_MODE_3B:
8158 DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
8159 dev->name);
8160 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008161 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008162
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008163 switch (sp->config.napi) {
8164 case 0:
8165 DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name);
8166 break;
8167 case 1:
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008168 DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008169 break;
8170 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008171
8172 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
Joe Perchesd44570e2009-08-24 17:29:44 +00008173 sp->config.tx_fifo_num);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008174
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008175 DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name,
8176 sp->config.rx_ring_num);
8177
Joe Perchesd44570e2009-08-24 17:29:44 +00008178 switch (sp->config.intr_type) {
8179 case INTA:
8180 DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
8181 break;
8182 case MSI_X:
8183 DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
8184 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008185 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008186 if (sp->config.multiq) {
Joe Perches13d866a2009-08-24 17:29:41 +00008187 for (i = 0; i < sp->config.tx_fifo_num; i++) {
8188 struct fifo_info *fifo = &mac_control->fifos[i];
8189
8190 fifo->multiq = config->multiq;
8191 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008192 DBG_PRINT(ERR_DBG, "%s: Multiqueue support enabled\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00008193 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008194 } else
8195 DBG_PRINT(ERR_DBG, "%s: Multiqueue support disabled\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00008196 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008197
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008198 switch (sp->config.tx_steering_type) {
8199 case NO_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008200 DBG_PRINT(ERR_DBG, "%s: No steering enabled for transmit\n",
8201 dev->name);
8202 break;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008203 case TX_PRIORITY_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008204 DBG_PRINT(ERR_DBG,
8205 "%s: Priority steering enabled for transmit\n",
8206 dev->name);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008207 break;
8208 case TX_DEFAULT_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008209 DBG_PRINT(ERR_DBG,
8210 "%s: Default steering enabled for transmit\n",
8211 dev->name);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008212 }
8213
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008214 if (sp->lro)
8215 DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
Ananda Raju9dc737a2006-04-21 19:05:41 -04008216 dev->name);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008217 if (ufo)
Joe Perchesd44570e2009-08-24 17:29:44 +00008218 DBG_PRINT(ERR_DBG,
8219 "%s: UDP Fragmentation Offload(UFO) enabled\n",
8220 dev->name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008221 /* Initialize device name */
Ananda Raju9dc737a2006-04-21 19:05:41 -04008222 sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008223
Breno Leitaocd0fce02008-09-04 17:52:54 -03008224 if (vlan_tag_strip)
8225 sp->vlan_strip_flag = 1;
8226 else
8227 sp->vlan_strip_flag = 0;
8228
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008229 /*
8230 * Make Link state as off at this point, when the Link change
8231 * interrupt comes the state will be automatically changed to
Linus Torvalds1da177e2005-04-16 15:20:36 -07008232 * the right state.
8233 */
8234 netif_carrier_off(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008235
8236 return 0;
8237
Joe Perchesd44570e2009-08-24 17:29:44 +00008238register_failed:
8239set_swap_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008240 iounmap(sp->bar1);
Joe Perchesd44570e2009-08-24 17:29:44 +00008241bar1_remap_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008242 iounmap(sp->bar0);
Joe Perchesd44570e2009-08-24 17:29:44 +00008243bar0_remap_failed:
8244mem_alloc_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008245 free_shared_mem(sp);
8246 pci_disable_device(pdev);
Veena Parateccb8622007-07-23 02:23:54 -04008247 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008248 pci_set_drvdata(pdev, NULL);
8249 free_netdev(dev);
8250
8251 return ret;
8252}
8253
8254/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008255 * s2io_rem_nic - Free the PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -07008256 * @pdev: structure containing the PCI related information of the device.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008257 * Description: This function is called by the Pci subsystem to release a
Linus Torvalds1da177e2005-04-16 15:20:36 -07008258 * PCI device and free up all resource held up by the device. This could
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008259 * be in response to a Hot plug event or when the driver is to be removed
Linus Torvalds1da177e2005-04-16 15:20:36 -07008260 * from memory.
8261 */
8262
8263static void __devexit s2io_rem_nic(struct pci_dev *pdev)
8264{
8265 struct net_device *dev =
Joe Perchesd44570e2009-08-24 17:29:44 +00008266 (struct net_device *)pci_get_drvdata(pdev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008267 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008268
8269 if (dev == NULL) {
8270 DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
8271 return;
8272 }
8273
Francois Romieu22747d62007-02-15 23:37:50 +01008274 flush_scheduled_work();
8275
Wang Chen4cf16532008-11-12 23:38:14 -08008276 sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008277 unregister_netdev(dev);
8278
8279 free_shared_mem(sp);
8280 iounmap(sp->bar0);
8281 iounmap(sp->bar1);
Veena Parateccb8622007-07-23 02:23:54 -04008282 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008283 pci_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008284 free_netdev(dev);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05008285 pci_disable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008286}
8287
8288/**
8289 * s2io_starter - Entry point for the driver
8290 * Description: This function is the entry point for the driver. It verifies
8291 * the module loadable parameters and initializes PCI configuration space.
8292 */
8293
Stephen Hemminger43b7c452007-10-05 12:39:21 -07008294static int __init s2io_starter(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008295{
Jeff Garzik29917622006-08-19 17:48:59 -04008296 return pci_register_driver(&s2io_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008297}
8298
8299/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008300 * s2io_closer - Cleanup routine for the driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008301 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
8302 */
8303
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008304static __exit void s2io_closer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008305{
8306 pci_unregister_driver(&s2io_driver);
8307 DBG_PRINT(INIT_DBG, "cleanup done\n");
8308}
8309
8310module_init(s2io_starter);
8311module_exit(s2io_closer);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008312
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008313static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
Joe Perchesd44570e2009-08-24 17:29:44 +00008314 struct tcphdr **tcp, struct RxD_t *rxdp,
8315 struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008316{
8317 int ip_off;
8318 u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;
8319
8320 if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00008321 DBG_PRINT(INIT_DBG,
8322 "%s: Non-TCP frames not supported for LRO\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008323 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008324 return -1;
8325 }
8326
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008327 /* Checking for DIX type or DIX type with VLAN */
Joe Perchesd44570e2009-08-24 17:29:44 +00008328 if ((l2_type == 0) || (l2_type == 4)) {
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008329 ip_off = HEADER_ETHERNET_II_802_3_SIZE;
8330 /*
8331 * If vlan stripping is disabled and the frame is VLAN tagged,
8332 * shift the offset by the VLAN header size bytes.
8333 */
Breno Leitaocd0fce02008-09-04 17:52:54 -03008334 if ((!sp->vlan_strip_flag) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00008335 (rxdp->Control_1 & RXD_FRAME_VLAN_TAG))
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008336 ip_off += HEADER_VLAN_SIZE;
8337 } else {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008338 /* LLC, SNAP etc are considered non-mergeable */
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008339 return -1;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008340 }
8341
8342 *ip = (struct iphdr *)((u8 *)buffer + ip_off);
8343 ip_len = (u8)((*ip)->ihl);
8344 ip_len <<= 2;
8345 *tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);
8346
8347 return 0;
8348}
8349
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008350static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008351 struct tcphdr *tcp)
8352{
Joe Perchesd44570e2009-08-24 17:29:44 +00008353 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
8354 if ((lro->iph->saddr != ip->saddr) ||
8355 (lro->iph->daddr != ip->daddr) ||
8356 (lro->tcph->source != tcp->source) ||
8357 (lro->tcph->dest != tcp->dest))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008358 return -1;
8359 return 0;
8360}
8361
8362static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
8363{
Joe Perchesd44570e2009-08-24 17:29:44 +00008364 return ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008365}
8366
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008367static void initiate_new_session(struct lro *lro, u8 *l2h,
Joe Perchesd44570e2009-08-24 17:29:44 +00008368 struct iphdr *ip, struct tcphdr *tcp,
8369 u32 tcp_pyld_len, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008370{
Joe Perchesd44570e2009-08-24 17:29:44 +00008371 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008372 lro->l2h = l2h;
8373 lro->iph = ip;
8374 lro->tcph = tcp;
8375 lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
Surjit Reangc8855952008-02-03 04:27:38 -08008376 lro->tcp_ack = tcp->ack_seq;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008377 lro->sg_num = 1;
8378 lro->total_len = ntohs(ip->tot_len);
8379 lro->frags_len = 0;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008380 lro->vlan_tag = vlan_tag;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008381 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00008382 * Check if we saw TCP timestamp.
8383 * Other consistency checks have already been done.
8384 */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008385 if (tcp->doff == 8) {
Surjit Reangc8855952008-02-03 04:27:38 -08008386 __be32 *ptr;
8387 ptr = (__be32 *)(tcp+1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008388 lro->saw_ts = 1;
Surjit Reangc8855952008-02-03 04:27:38 -08008389 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008390 lro->cur_tsecr = *(ptr+2);
8391 }
8392 lro->in_use = 1;
8393}
8394
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008395static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008396{
8397 struct iphdr *ip = lro->iph;
8398 struct tcphdr *tcp = lro->tcph;
Al Virobd4f3ae2007-02-09 16:40:15 +00008399 __sum16 nchk;
Joe Perchesffb5df62009-08-24 17:29:47 +00008400 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
8401
Joe Perchesd44570e2009-08-24 17:29:44 +00008402 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008403
8404 /* Update L3 header */
8405 ip->tot_len = htons(lro->total_len);
8406 ip->check = 0;
8407 nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
8408 ip->check = nchk;
8409
8410 /* Update L4 header */
8411 tcp->ack_seq = lro->tcp_ack;
8412 tcp->window = lro->window;
8413
8414 /* Update tsecr field if this session has timestamps enabled */
8415 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008416 __be32 *ptr = (__be32 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008417 *(ptr+2) = lro->cur_tsecr;
8418 }
8419
8420 /* Update counters required for calculation of
8421 * average no. of packets aggregated.
8422 */
Joe Perchesffb5df62009-08-24 17:29:47 +00008423 swstats->sum_avg_pkts_aggregated += lro->sg_num;
8424 swstats->num_aggregations++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008425}
8426
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008427static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
Joe Perchesd44570e2009-08-24 17:29:44 +00008428 struct tcphdr *tcp, u32 l4_pyld)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008429{
Joe Perchesd44570e2009-08-24 17:29:44 +00008430 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008431 lro->total_len += l4_pyld;
8432 lro->frags_len += l4_pyld;
8433 lro->tcp_next_seq += l4_pyld;
8434 lro->sg_num++;
8435
8436 /* Update ack seq no. and window ad(from this pkt) in LRO object */
8437 lro->tcp_ack = tcp->ack_seq;
8438 lro->window = tcp->window;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008439
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008440 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008441 __be32 *ptr;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008442 /* Update tsecr and tsval from this packet */
Surjit Reangc8855952008-02-03 04:27:38 -08008443 ptr = (__be32 *)(tcp+1);
8444 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008445 lro->cur_tsecr = *(ptr + 2);
8446 }
8447}
8448
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008449static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008450 struct tcphdr *tcp, u32 tcp_pyld_len)
8451{
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008452 u8 *ptr;
8453
Joe Perchesd44570e2009-08-24 17:29:44 +00008454 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Andrew Morton79dc1902006-02-03 01:45:13 -08008455
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008456 if (!tcp_pyld_len) {
8457 /* Runt frame or a pure ack */
8458 return -1;
8459 }
8460
8461 if (ip->ihl != 5) /* IP has options */
8462 return -1;
8463
Ananda Raju75c30b12006-07-24 19:55:09 -04008464 /* If we see CE codepoint in IP header, packet is not mergeable */
8465 if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
8466 return -1;
8467
8468 /* If we see ECE or CWR flags in TCP header, packet is not mergeable */
Joe Perchesd44570e2009-08-24 17:29:44 +00008469 if (tcp->urg || tcp->psh || tcp->rst ||
8470 tcp->syn || tcp->fin ||
8471 tcp->ece || tcp->cwr || !tcp->ack) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008472 /*
8473 * Currently recognize only the ack control word and
8474 * any other control field being set would result in
8475 * flushing the LRO session
8476 */
8477 return -1;
8478 }
8479
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008480 /*
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008481 * Allow only one TCP timestamp option. Don't aggregate if
8482 * any other options are detected.
8483 */
8484 if (tcp->doff != 5 && tcp->doff != 8)
8485 return -1;
8486
8487 if (tcp->doff == 8) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008488 ptr = (u8 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008489 while (*ptr == TCPOPT_NOP)
8490 ptr++;
8491 if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
8492 return -1;
8493
8494 /* Ensure timestamp value increases monotonically */
8495 if (l_lro)
Surjit Reangc8855952008-02-03 04:27:38 -08008496 if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2))))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008497 return -1;
8498
8499 /* timestamp echo reply should be non-zero */
Surjit Reangc8855952008-02-03 04:27:38 -08008500 if (*((__be32 *)(ptr+6)) == 0)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008501 return -1;
8502 }
8503
8504 return 0;
8505}
8506
Joe Perchesd44570e2009-08-24 17:29:44 +00008507static int s2io_club_tcp_session(struct ring_info *ring_data, u8 *buffer,
8508 u8 **tcp, u32 *tcp_len, struct lro **lro,
8509 struct RxD_t *rxdp, struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008510{
8511 struct iphdr *ip;
8512 struct tcphdr *tcph;
8513 int ret = 0, i;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008514 u16 vlan_tag = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00008515 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008516
Joe Perchesd44570e2009-08-24 17:29:44 +00008517 ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
8518 rxdp, sp);
8519 if (ret)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008520 return ret;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008521
Joe Perchesd44570e2009-08-24 17:29:44 +00008522 DBG_PRINT(INFO_DBG, "IP Saddr: %x Daddr: %x\n", ip->saddr, ip->daddr);
8523
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008524 vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008525 tcph = (struct tcphdr *)*tcp;
8526 *tcp_len = get_l4_pyld_length(ip, tcph);
Joe Perchesd44570e2009-08-24 17:29:44 +00008527 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008528 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008529 if (l_lro->in_use) {
8530 if (check_for_socket_match(l_lro, ip, tcph))
8531 continue;
8532 /* Sock pair matched */
8533 *lro = l_lro;
8534
8535 if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00008536 DBG_PRINT(INFO_DBG, "%s: Out of sequence. "
8537 "expected 0x%x, actual 0x%x\n",
8538 __func__,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008539 (*lro)->tcp_next_seq,
8540 ntohl(tcph->seq));
8541
Joe Perchesffb5df62009-08-24 17:29:47 +00008542 swstats->outof_sequence_pkts++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008543 ret = 2;
8544 break;
8545 }
8546
Joe Perchesd44570e2009-08-24 17:29:44 +00008547 if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,
8548 *tcp_len))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008549 ret = 1; /* Aggregate */
8550 else
8551 ret = 2; /* Flush both */
8552 break;
8553 }
8554 }
8555
8556 if (ret == 0) {
8557 /* Before searching for available LRO objects,
8558 * check if the pkt is L3/L4 aggregatable. If not
8559 * don't create new LRO session. Just send this
8560 * packet up.
8561 */
Joe Perchesd44570e2009-08-24 17:29:44 +00008562 if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008563 return 5;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008564
Joe Perchesd44570e2009-08-24 17:29:44 +00008565 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008566 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008567 if (!(l_lro->in_use)) {
8568 *lro = l_lro;
8569 ret = 3; /* Begin anew */
8570 break;
8571 }
8572 }
8573 }
8574
8575 if (ret == 0) { /* sessions exceeded */
Joe Perches9e39f7c2009-08-25 08:52:00 +00008576 DBG_PRINT(INFO_DBG, "%s: All LRO sessions already in use\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008577 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008578 *lro = NULL;
8579 return ret;
8580 }
8581
8582 switch (ret) {
Joe Perchesd44570e2009-08-24 17:29:44 +00008583 case 3:
8584 initiate_new_session(*lro, buffer, ip, tcph, *tcp_len,
8585 vlan_tag);
8586 break;
8587 case 2:
8588 update_L3L4_header(sp, *lro);
8589 break;
8590 case 1:
8591 aggregate_new_rx(*lro, ip, tcph, *tcp_len);
8592 if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008593 update_L3L4_header(sp, *lro);
Joe Perchesd44570e2009-08-24 17:29:44 +00008594 ret = 4; /* Flush the LRO */
8595 }
8596 break;
8597 default:
Joe Perches9e39f7c2009-08-25 08:52:00 +00008598 DBG_PRINT(ERR_DBG, "%s: Don't know, can't say!!\n", __func__);
Joe Perchesd44570e2009-08-24 17:29:44 +00008599 break;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008600 }
8601
8602 return ret;
8603}
8604
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008605static void clear_lro_session(struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008606{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008607 static u16 lro_struct_size = sizeof(struct lro);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008608
8609 memset(lro, 0, lro_struct_size);
8610}
8611
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008612static void queue_rx_frame(struct sk_buff *skb, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008613{
8614 struct net_device *dev = skb->dev;
Wang Chen4cf16532008-11-12 23:38:14 -08008615 struct s2io_nic *sp = netdev_priv(dev);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008616
8617 skb->protocol = eth_type_trans(skb, dev);
Joe Perchesd44570e2009-08-24 17:29:44 +00008618 if (sp->vlgrp && vlan_tag && (sp->vlan_strip_flag)) {
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008619 /* Queueing the vlan frame to the upper layer */
8620 if (sp->config.napi)
8621 vlan_hwaccel_receive_skb(skb, sp->vlgrp, vlan_tag);
8622 else
8623 vlan_hwaccel_rx(skb, sp->vlgrp, vlan_tag);
8624 } else {
8625 if (sp->config.napi)
8626 netif_receive_skb(skb);
8627 else
8628 netif_rx(skb);
8629 }
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008630}
8631
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008632static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
Joe Perchesd44570e2009-08-24 17:29:44 +00008633 struct sk_buff *skb, u32 tcp_len)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008634{
Ananda Raju75c30b12006-07-24 19:55:09 -04008635 struct sk_buff *first = lro->parent;
Joe Perchesffb5df62009-08-24 17:29:47 +00008636 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008637
8638 first->len += tcp_len;
8639 first->data_len = lro->frags_len;
8640 skb_pull(skb, (skb->len - tcp_len));
Ananda Raju75c30b12006-07-24 19:55:09 -04008641 if (skb_shinfo(first)->frag_list)
8642 lro->last_frag->next = skb;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008643 else
8644 skb_shinfo(first)->frag_list = skb;
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008645 first->truesize += skb->truesize;
Ananda Raju75c30b12006-07-24 19:55:09 -04008646 lro->last_frag = skb;
Joe Perchesffb5df62009-08-24 17:29:47 +00008647 swstats->clubbed_frms_cnt++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008648 return;
8649}
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008650
8651/**
8652 * s2io_io_error_detected - called when PCI error is detected
8653 * @pdev: Pointer to PCI device
Rolf Eike Beer8453d432007-07-10 11:58:02 +02008654 * @state: The current pci connection state
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008655 *
8656 * This function is called after a PCI bus error affecting
8657 * this device has been detected.
8658 */
8659static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00008660 pci_channel_state_t state)
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008661{
8662 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008663 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008664
8665 netif_device_detach(netdev);
8666
Dean Nelson1e3c8bd2009-07-31 09:13:56 +00008667 if (state == pci_channel_io_perm_failure)
8668 return PCI_ERS_RESULT_DISCONNECT;
8669
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008670 if (netif_running(netdev)) {
8671 /* Bring down the card, while avoiding PCI I/O */
8672 do_s2io_card_down(sp, 0);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008673 }
8674 pci_disable_device(pdev);
8675
8676 return PCI_ERS_RESULT_NEED_RESET;
8677}
8678
8679/**
8680 * s2io_io_slot_reset - called after the pci bus has been reset.
8681 * @pdev: Pointer to PCI device
8682 *
8683 * Restart the card from scratch, as if from a cold-boot.
8684 * At this point, the card has exprienced a hard reset,
8685 * followed by fixups by BIOS, and has its config space
8686 * set up identically to what it was at cold boot.
8687 */
8688static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
8689{
8690 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008691 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008692
8693 if (pci_enable_device(pdev)) {
Joe Perches6cef2b8e2009-08-24 17:29:45 +00008694 pr_err("Cannot re-enable PCI device after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008695 return PCI_ERS_RESULT_DISCONNECT;
8696 }
8697
8698 pci_set_master(pdev);
8699 s2io_reset(sp);
8700
8701 return PCI_ERS_RESULT_RECOVERED;
8702}
8703
8704/**
8705 * s2io_io_resume - called when traffic can start flowing again.
8706 * @pdev: Pointer to PCI device
8707 *
8708 * This callback is called when the error recovery driver tells
8709 * us that its OK to resume normal operation.
8710 */
8711static void s2io_io_resume(struct pci_dev *pdev)
8712{
8713 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008714 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008715
8716 if (netif_running(netdev)) {
8717 if (s2io_card_up(sp)) {
Joe Perches6cef2b8e2009-08-24 17:29:45 +00008718 pr_err("Can't bring device back up after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008719 return;
8720 }
8721
8722 if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
8723 s2io_card_down(sp);
Joe Perches6cef2b8e2009-08-24 17:29:45 +00008724 pr_err("Can't restore mac addr after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008725 return;
8726 }
8727 }
8728
8729 netif_device_attach(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07008730 netif_tx_wake_all_queues(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008731}