blob: 01ac8974eb078fd85e3a5db8b21e355190034538 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujithcee075a2009-03-13 09:07:23 +05302 * Copyright (c) 2008-2009 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070017#include <linux/nl80211.h>
Sujith394cf0a2009-02-09 13:26:54 +053018#include "ath9k.h"
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -070019#include "btcoex.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070020
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070021static char *dev_info = "ath9k";
22
23MODULE_AUTHOR("Atheros Communications");
24MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
25MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
26MODULE_LICENSE("Dual BSD/GPL");
27
Jouni Malinenb3bd89c2009-02-24 13:42:01 +020028static int modparam_nohwcrypt;
29module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
30MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
31
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -040032static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
33module_param_named(debug, ath9k_debug, uint, 0);
Luis R. Rodriguezaf1fc672009-10-08 01:00:18 -040034MODULE_PARM_DESC(debug, "Debugging mask");
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -040035
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080036/* We use the hw_value as an index into our private channel structure */
37
38#define CHAN2G(_freq, _idx) { \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040041 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080042}
43
44#define CHAN5G(_freq, _idx) { \
45 .band = IEEE80211_BAND_5GHZ, \
46 .center_freq = (_freq), \
47 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040048 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080049}
50
51/* Some 2 GHz radios are actually tunable on 2312-2732
52 * on 5 MHz steps, we support the channels which we know
53 * we have calibration data for all cards though to make
54 * this static */
55static struct ieee80211_channel ath9k_2ghz_chantable[] = {
56 CHAN2G(2412, 0), /* Channel 1 */
57 CHAN2G(2417, 1), /* Channel 2 */
58 CHAN2G(2422, 2), /* Channel 3 */
59 CHAN2G(2427, 3), /* Channel 4 */
60 CHAN2G(2432, 4), /* Channel 5 */
61 CHAN2G(2437, 5), /* Channel 6 */
62 CHAN2G(2442, 6), /* Channel 7 */
63 CHAN2G(2447, 7), /* Channel 8 */
64 CHAN2G(2452, 8), /* Channel 9 */
65 CHAN2G(2457, 9), /* Channel 10 */
66 CHAN2G(2462, 10), /* Channel 11 */
67 CHAN2G(2467, 11), /* Channel 12 */
68 CHAN2G(2472, 12), /* Channel 13 */
69 CHAN2G(2484, 13), /* Channel 14 */
70};
71
72/* Some 5 GHz radios are actually tunable on XXXX-YYYY
73 * on 5 MHz steps, we support the channels which we know
74 * we have calibration data for all cards though to make
75 * this static */
76static struct ieee80211_channel ath9k_5ghz_chantable[] = {
77 /* _We_ call this UNII 1 */
78 CHAN5G(5180, 14), /* Channel 36 */
79 CHAN5G(5200, 15), /* Channel 40 */
80 CHAN5G(5220, 16), /* Channel 44 */
81 CHAN5G(5240, 17), /* Channel 48 */
82 /* _We_ call this UNII 2 */
83 CHAN5G(5260, 18), /* Channel 52 */
84 CHAN5G(5280, 19), /* Channel 56 */
85 CHAN5G(5300, 20), /* Channel 60 */
86 CHAN5G(5320, 21), /* Channel 64 */
87 /* _We_ call this "Middle band" */
88 CHAN5G(5500, 22), /* Channel 100 */
89 CHAN5G(5520, 23), /* Channel 104 */
90 CHAN5G(5540, 24), /* Channel 108 */
91 CHAN5G(5560, 25), /* Channel 112 */
92 CHAN5G(5580, 26), /* Channel 116 */
93 CHAN5G(5600, 27), /* Channel 120 */
94 CHAN5G(5620, 28), /* Channel 124 */
95 CHAN5G(5640, 29), /* Channel 128 */
96 CHAN5G(5660, 30), /* Channel 132 */
97 CHAN5G(5680, 31), /* Channel 136 */
98 CHAN5G(5700, 32), /* Channel 140 */
99 /* _We_ call this UNII 3 */
100 CHAN5G(5745, 33), /* Channel 149 */
101 CHAN5G(5765, 34), /* Channel 153 */
102 CHAN5G(5785, 35), /* Channel 157 */
103 CHAN5G(5805, 36), /* Channel 161 */
104 CHAN5G(5825, 37), /* Channel 165 */
105};
106
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800107static void ath_cache_conf_rate(struct ath_softc *sc,
108 struct ieee80211_conf *conf)
Sujithff37e332008-11-24 12:07:55 +0530109{
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800110 switch (conf->channel->band) {
111 case IEEE80211_BAND_2GHZ:
112 if (conf_is_ht20(conf))
113 sc->cur_rate_table =
114 sc->hw_rate_table[ATH9K_MODE_11NG_HT20];
115 else if (conf_is_ht40_minus(conf))
116 sc->cur_rate_table =
117 sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS];
118 else if (conf_is_ht40_plus(conf))
119 sc->cur_rate_table =
120 sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS];
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800121 else
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800122 sc->cur_rate_table =
123 sc->hw_rate_table[ATH9K_MODE_11G];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800124 break;
125 case IEEE80211_BAND_5GHZ:
126 if (conf_is_ht20(conf))
127 sc->cur_rate_table =
128 sc->hw_rate_table[ATH9K_MODE_11NA_HT20];
129 else if (conf_is_ht40_minus(conf))
130 sc->cur_rate_table =
131 sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS];
132 else if (conf_is_ht40_plus(conf))
133 sc->cur_rate_table =
134 sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS];
135 else
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800136 sc->cur_rate_table =
137 sc->hw_rate_table[ATH9K_MODE_11A];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800138 break;
139 default:
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800140 BUG_ON(1);
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800141 break;
142 }
Sujithff37e332008-11-24 12:07:55 +0530143}
144
145static void ath_update_txpow(struct ath_softc *sc)
146{
Sujithcbe61d82009-02-09 13:27:12 +0530147 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530148 u32 txpow;
149
Sujith17d79042009-02-09 13:27:03 +0530150 if (sc->curtxpow != sc->config.txpowlimit) {
151 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
Sujithff37e332008-11-24 12:07:55 +0530152 /* read back in case value is clamped */
153 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
Sujith17d79042009-02-09 13:27:03 +0530154 sc->curtxpow = txpow;
Sujithff37e332008-11-24 12:07:55 +0530155 }
156}
157
158static u8 parse_mpdudensity(u8 mpdudensity)
159{
160 /*
161 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
162 * 0 for no restriction
163 * 1 for 1/4 us
164 * 2 for 1/2 us
165 * 3 for 1 us
166 * 4 for 2 us
167 * 5 for 4 us
168 * 6 for 8 us
169 * 7 for 16 us
170 */
171 switch (mpdudensity) {
172 case 0:
173 return 0;
174 case 1:
175 case 2:
176 case 3:
177 /* Our lower layer calculations limit our precision to
178 1 microsecond */
179 return 1;
180 case 4:
181 return 2;
182 case 5:
183 return 4;
184 case 6:
185 return 8;
186 case 7:
187 return 16;
188 default:
189 return 0;
190 }
191}
192
193static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
194{
Luis R. Rodriguez4f0fc7c2009-05-06 02:20:00 -0400195 const struct ath_rate_table *rate_table = NULL;
Sujithff37e332008-11-24 12:07:55 +0530196 struct ieee80211_supported_band *sband;
197 struct ieee80211_rate *rate;
198 int i, maxrates;
199
200 switch (band) {
201 case IEEE80211_BAND_2GHZ:
202 rate_table = sc->hw_rate_table[ATH9K_MODE_11G];
203 break;
204 case IEEE80211_BAND_5GHZ:
205 rate_table = sc->hw_rate_table[ATH9K_MODE_11A];
206 break;
207 default:
208 break;
209 }
210
211 if (rate_table == NULL)
212 return;
213
214 sband = &sc->sbands[band];
215 rate = sc->rates[band];
216
217 if (rate_table->rate_cnt > ATH_RATE_MAX)
218 maxrates = ATH_RATE_MAX;
219 else
220 maxrates = rate_table->rate_cnt;
221
222 for (i = 0; i < maxrates; i++) {
223 rate[i].bitrate = rate_table->info[i].ratekbps / 100;
224 rate[i].hw_value = rate_table->info[i].ratecode;
Sujithf46730d2009-01-27 13:51:03 +0530225 if (rate_table->info[i].short_preamble) {
226 rate[i].hw_value_short = rate_table->info[i].ratecode |
227 rate_table->info[i].short_preamble;
228 rate[i].flags = IEEE80211_RATE_SHORT_PREAMBLE;
229 }
Sujithff37e332008-11-24 12:07:55 +0530230 sband->n_bitrates++;
Sujithf46730d2009-01-27 13:51:03 +0530231
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700232 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
233 "Rate: %2dMbps, ratecode: %2d\n",
234 rate[i].bitrate / 10, rate[i].hw_value);
Sujithff37e332008-11-24 12:07:55 +0530235 }
236}
237
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +0530238static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
239 struct ieee80211_hw *hw)
240{
241 struct ieee80211_channel *curchan = hw->conf.channel;
242 struct ath9k_channel *channel;
243 u8 chan_idx;
244
245 chan_idx = curchan->hw_value;
246 channel = &sc->sc_ah->channels[chan_idx];
247 ath9k_update_ichannel(sc, hw, channel);
248 return channel;
249}
250
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700251static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
Luis R. Rodriguez8c77a562009-09-09 21:02:34 -0700252{
253 unsigned long flags;
254 bool ret;
255
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700256 spin_lock_irqsave(&sc->sc_pm_lock, flags);
257 ret = ath9k_hw_setpower(sc->sc_ah, mode);
258 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
Luis R. Rodriguez8c77a562009-09-09 21:02:34 -0700259
260 return ret;
261}
262
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700263void ath9k_ps_wakeup(struct ath_softc *sc)
264{
265 unsigned long flags;
266
267 spin_lock_irqsave(&sc->sc_pm_lock, flags);
268 if (++sc->ps_usecount != 1)
269 goto unlock;
270
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700271 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700272
273 unlock:
274 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
275}
276
277void ath9k_ps_restore(struct ath_softc *sc)
278{
279 unsigned long flags;
280
281 spin_lock_irqsave(&sc->sc_pm_lock, flags);
282 if (--sc->ps_usecount != 0)
283 goto unlock;
284
285 if (sc->ps_enabled &&
286 !(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
287 SC_OP_WAIT_FOR_CAB |
288 SC_OP_WAIT_FOR_PSPOLL_DATA |
289 SC_OP_WAIT_FOR_TX_ACK)))
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700290 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700291
292 unlock:
293 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
294}
295
Sujithff37e332008-11-24 12:07:55 +0530296/*
297 * Set/change channels. If the channel is really being changed, it's done
298 * by reseting the chip. To accomplish this we must first cleanup any pending
299 * DMA, then restart stuff.
300*/
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200301int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
302 struct ath9k_channel *hchan)
Sujithff37e332008-11-24 12:07:55 +0530303{
Sujithcbe61d82009-02-09 13:27:12 +0530304 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700305 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700306 struct ieee80211_conf *conf = &common->hw->conf;
Sujithff37e332008-11-24 12:07:55 +0530307 bool fastcc = true, stopped;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800308 struct ieee80211_channel *channel = hw->conf.channel;
309 int r;
Sujithff37e332008-11-24 12:07:55 +0530310
311 if (sc->sc_flags & SC_OP_INVALID)
312 return -EIO;
313
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530314 ath9k_ps_wakeup(sc);
315
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800316 /*
317 * This is only performed if the channel settings have
318 * actually changed.
319 *
320 * To switch channels clear any pending DMA operations;
321 * wait long enough for the RX fifo to drain, reset the
322 * hardware at the new frequency, and then re-enable
323 * the relevant bits of the h/w.
324 */
325 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +0530326 ath_drain_all_txq(sc, false);
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800327 stopped = ath_stoprecv(sc);
Sujithff37e332008-11-24 12:07:55 +0530328
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800329 /* XXX: do not flush receive queue here. We don't want
330 * to flush data frames already in queue because of
331 * changing channel. */
Sujithff37e332008-11-24 12:07:55 +0530332
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800333 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
334 fastcc = false;
Sujithff37e332008-11-24 12:07:55 +0530335
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700336 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700337 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700338 sc->sc_ah->curchan->channel,
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700339 channel->center_freq, conf_is_ht40(conf));
Sujith99405f92008-11-24 12:08:35 +0530340
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800341 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800342
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800343 r = ath9k_hw_reset(ah, hchan, fastcc);
344 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700345 ath_print(common, ATH_DBG_FATAL,
346 "Unable to reset channel (%u Mhz) "
347 "reset status %d\n",
348 channel->center_freq, r);
Sujithff37e332008-11-24 12:07:55 +0530349 spin_unlock_bh(&sc->sc_resetlock);
Gabor Juhos39892792009-06-15 17:49:09 +0200350 goto ps_restore;
Sujithff37e332008-11-24 12:07:55 +0530351 }
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800352 spin_unlock_bh(&sc->sc_resetlock);
353
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800354 sc->sc_flags &= ~SC_OP_FULL_RESET;
355
356 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700357 ath_print(common, ATH_DBG_FATAL,
358 "Unable to restart recv logic\n");
Gabor Juhos39892792009-06-15 17:49:09 +0200359 r = -EIO;
360 goto ps_restore;
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800361 }
362
363 ath_cache_conf_rate(sc, &hw->conf);
364 ath_update_txpow(sc);
Sujith17d79042009-02-09 13:27:03 +0530365 ath9k_hw_set_interrupts(ah, sc->imask);
Gabor Juhos39892792009-06-15 17:49:09 +0200366
367 ps_restore:
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530368 ath9k_ps_restore(sc);
Gabor Juhos39892792009-06-15 17:49:09 +0200369 return r;
Sujithff37e332008-11-24 12:07:55 +0530370}
371
372/*
373 * This routine performs the periodic noise floor calibration function
374 * that is used to adjust and optimize the chip performance. This
375 * takes environmental changes (location, temperature) into account.
376 * When the task is complete, it reschedules itself depending on the
377 * appropriate interval that was calculated.
378 */
379static void ath_ani_calibrate(unsigned long data)
380{
Sujith20977d32009-02-20 15:13:28 +0530381 struct ath_softc *sc = (struct ath_softc *)data;
382 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700383 struct ath_common *common = ath9k_hw_common(ah);
Sujithff37e332008-11-24 12:07:55 +0530384 bool longcal = false;
385 bool shortcal = false;
386 bool aniflag = false;
387 unsigned int timestamp = jiffies_to_msecs(jiffies);
Sujith20977d32009-02-20 15:13:28 +0530388 u32 cal_interval, short_cal_interval;
Sujithff37e332008-11-24 12:07:55 +0530389
Sujith20977d32009-02-20 15:13:28 +0530390 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
391 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
Sujithff37e332008-11-24 12:07:55 +0530392
393 /*
394 * don't calibrate when we're scanning.
395 * we are most likely not on our home channel.
396 */
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530397 spin_lock(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +0530398 if (sc->sc_flags & SC_OP_SCANNING)
Sujith20977d32009-02-20 15:13:28 +0530399 goto set_timer;
Sujithff37e332008-11-24 12:07:55 +0530400
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300401 /* Only calibrate if awake */
402 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
403 goto set_timer;
404
405 ath9k_ps_wakeup(sc);
406
Sujithff37e332008-11-24 12:07:55 +0530407 /* Long calibration runs independently of short calibration. */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800408 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530409 longcal = true;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700410 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800411 common->ani.longcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530412 }
413
Sujith17d79042009-02-09 13:27:03 +0530414 /* Short calibration applies only while caldone is false */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800415 if (!common->ani.caldone) {
416 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
Sujithff37e332008-11-24 12:07:55 +0530417 shortcal = true;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700418 ath_print(common, ATH_DBG_ANI,
419 "shortcal @%lu\n", jiffies);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800420 common->ani.shortcal_timer = timestamp;
421 common->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530422 }
423 } else {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800424 if ((timestamp - common->ani.resetcal_timer) >=
Sujithff37e332008-11-24 12:07:55 +0530425 ATH_RESTART_CALINTERVAL) {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800426 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
427 if (common->ani.caldone)
428 common->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530429 }
430 }
431
432 /* Verify whether we must check ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800433 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530434 aniflag = true;
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800435 common->ani.checkani_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530436 }
437
438 /* Skip all processing if there's nothing to do. */
439 if (longcal || shortcal || aniflag) {
440 /* Call ANI routine if necessary */
441 if (aniflag)
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +0530442 ath9k_hw_ani_monitor(ah, ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530443
444 /* Perform calibration if necessary */
445 if (longcal || shortcal) {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800446 common->ani.caldone =
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700447 ath9k_hw_calibrate(ah,
448 ah->curchan,
449 common->rx_chainmask,
450 longcal);
Sujithff37e332008-11-24 12:07:55 +0530451
Sujith379f0442009-04-13 21:56:48 +0530452 if (longcal)
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800453 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
Sujith379f0442009-04-13 21:56:48 +0530454 ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530455
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700456 ath_print(common, ATH_DBG_ANI,
457 " calibrate chan %u/%x nf: %d\n",
458 ah->curchan->channel,
459 ah->curchan->channelFlags,
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800460 common->ani.noise_floor);
Sujithff37e332008-11-24 12:07:55 +0530461 }
462 }
463
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300464 ath9k_ps_restore(sc);
465
Sujith20977d32009-02-20 15:13:28 +0530466set_timer:
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530467 spin_unlock(&sc->ani_lock);
Sujithff37e332008-11-24 12:07:55 +0530468 /*
469 * Set timer interval based on previous results.
470 * The interval must be the shortest necessary to satisfy ANI,
471 * short calibration and long calibration.
472 */
Sujithaac92072008-12-02 18:37:54 +0530473 cal_interval = ATH_LONG_CALINTERVAL;
Sujith2660b812009-02-09 13:27:26 +0530474 if (sc->sc_ah->config.enable_ani)
Sujithaac92072008-12-02 18:37:54 +0530475 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800476 if (!common->ani.caldone)
Sujith20977d32009-02-20 15:13:28 +0530477 cal_interval = min(cal_interval, (u32)short_cal_interval);
Sujithff37e332008-11-24 12:07:55 +0530478
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800479 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
Sujithff37e332008-11-24 12:07:55 +0530480}
481
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800482static void ath_start_ani(struct ath_common *common)
Sujith415f7382009-04-13 21:56:46 +0530483{
484 unsigned long timestamp = jiffies_to_msecs(jiffies);
485
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800486 common->ani.longcal_timer = timestamp;
487 common->ani.shortcal_timer = timestamp;
488 common->ani.checkani_timer = timestamp;
Sujith415f7382009-04-13 21:56:46 +0530489
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800490 mod_timer(&common->ani.timer,
Sujith415f7382009-04-13 21:56:46 +0530491 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
492}
493
Sujithff37e332008-11-24 12:07:55 +0530494/*
495 * Update tx/rx chainmask. For legacy association,
496 * hard code chainmask to 1x1, for 11n association, use
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +0530497 * the chainmask configuration, for bt coexistence, use
498 * the chainmask configuration even in legacy mode.
Sujithff37e332008-11-24 12:07:55 +0530499 */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200500void ath_update_chainmask(struct ath_softc *sc, int is_ht)
Sujithff37e332008-11-24 12:07:55 +0530501{
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700502 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700503 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700504
Sujith3d832612009-08-21 12:00:28 +0530505 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -0700506 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700507 common->tx_chainmask = ah->caps.tx_chainmask;
508 common->rx_chainmask = ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +0530509 } else {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700510 common->tx_chainmask = 1;
511 common->rx_chainmask = 1;
Sujithff37e332008-11-24 12:07:55 +0530512 }
513
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700514 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700515 "tx chmask: %d, rx chmask: %d\n",
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700516 common->tx_chainmask,
517 common->rx_chainmask);
Sujithff37e332008-11-24 12:07:55 +0530518}
519
520static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
521{
522 struct ath_node *an;
523
524 an = (struct ath_node *)sta->drv_priv;
525
Sujith87792ef2009-03-30 15:28:48 +0530526 if (sc->sc_flags & SC_OP_TXAGGR) {
Sujithff37e332008-11-24 12:07:55 +0530527 ath_tx_node_init(sc, an);
Sujith9e98ac62009-07-23 15:32:34 +0530528 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
Sujith87792ef2009-03-30 15:28:48 +0530529 sta->ht_cap.ampdu_factor);
530 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
Senthil Balasubramaniana59b5a52009-07-14 20:17:07 -0400531 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
Sujith87792ef2009-03-30 15:28:48 +0530532 }
Sujithff37e332008-11-24 12:07:55 +0530533}
534
535static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
536{
537 struct ath_node *an = (struct ath_node *)sta->drv_priv;
538
539 if (sc->sc_flags & SC_OP_TXAGGR)
540 ath_tx_node_cleanup(sc, an);
541}
542
543static void ath9k_tasklet(unsigned long data)
544{
545 struct ath_softc *sc = (struct ath_softc *)data;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700546 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700547 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700548
Sujith17d79042009-02-09 13:27:03 +0530549 u32 status = sc->intrstatus;
Sujithff37e332008-11-24 12:07:55 +0530550
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400551 ath9k_ps_wakeup(sc);
552
Sujithff37e332008-11-24 12:07:55 +0530553 if (status & ATH9K_INT_FATAL) {
Sujithff37e332008-11-24 12:07:55 +0530554 ath_reset(sc, false);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400555 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530556 return;
Sujithff37e332008-11-24 12:07:55 +0530557 }
558
Sujith063d8be2009-03-30 15:28:49 +0530559 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
560 spin_lock_bh(&sc->rx.rxflushlock);
561 ath_rx_tasklet(sc, 0);
562 spin_unlock_bh(&sc->rx.rxflushlock);
563 }
564
565 if (status & ATH9K_INT_TX)
566 ath_tx_tasklet(sc);
567
Gabor Juhos96148322009-07-24 17:27:21 +0200568 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
Jouni Malinen54ce8462009-05-19 17:01:40 +0300569 /*
570 * TSF sync does not look correct; remain awake to sync with
571 * the next Beacon.
572 */
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700573 ath_print(common, ATH_DBG_PS,
574 "TSFOOR - Sync with next Beacon\n");
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300575 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
Jouni Malinen54ce8462009-05-19 17:01:40 +0300576 }
577
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -0700578 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Vasanthakumar Thiagarajanebb8e1d2009-09-01 17:46:32 +0530579 if (status & ATH9K_INT_GENTIMER)
580 ath_gen_timer_isr(sc->sc_ah);
581
Sujithff37e332008-11-24 12:07:55 +0530582 /* re-enable hardware interrupt */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700583 ath9k_hw_set_interrupts(ah, sc->imask);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400584 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530585}
586
Gabor Juhos6baff7f2009-01-14 20:17:06 +0100587irqreturn_t ath_isr(int irq, void *dev)
Sujithff37e332008-11-24 12:07:55 +0530588{
Sujith063d8be2009-03-30 15:28:49 +0530589#define SCHED_INTR ( \
590 ATH9K_INT_FATAL | \
591 ATH9K_INT_RXORN | \
592 ATH9K_INT_RXEOL | \
593 ATH9K_INT_RX | \
594 ATH9K_INT_TX | \
595 ATH9K_INT_BMISS | \
596 ATH9K_INT_CST | \
Vasanthakumar Thiagarajanebb8e1d2009-09-01 17:46:32 +0530597 ATH9K_INT_TSFOOR | \
598 ATH9K_INT_GENTIMER)
Sujith063d8be2009-03-30 15:28:49 +0530599
Sujithff37e332008-11-24 12:07:55 +0530600 struct ath_softc *sc = dev;
Sujithcbe61d82009-02-09 13:27:12 +0530601 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530602 enum ath9k_int status;
603 bool sched = false;
604
Sujith063d8be2009-03-30 15:28:49 +0530605 /*
606 * The hardware is not ready/present, don't
607 * touch anything. Note this can happen early
608 * on if the IRQ is shared.
609 */
610 if (sc->sc_flags & SC_OP_INVALID)
611 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530612
Sujithff37e332008-11-24 12:07:55 +0530613
Sujith063d8be2009-03-30 15:28:49 +0530614 /* shared irq, not for us */
Sujithff37e332008-11-24 12:07:55 +0530615
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400616 if (!ath9k_hw_intrpend(ah))
Sujith063d8be2009-03-30 15:28:49 +0530617 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530618
Sujith063d8be2009-03-30 15:28:49 +0530619 /*
620 * Figure out the reason(s) for the interrupt. Note
621 * that the hal returns a pseudo-ISR that may include
622 * bits we haven't explicitly enabled so we mask the
623 * value to insure we only process bits we requested.
624 */
625 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
626 status &= sc->imask; /* discard unasked-for bits */
627
628 /*
629 * If there are no status bits set, then this interrupt was not
630 * for me (should have been caught above).
631 */
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400632 if (!status)
Sujith063d8be2009-03-30 15:28:49 +0530633 return IRQ_NONE;
Sujith063d8be2009-03-30 15:28:49 +0530634
635 /* Cache the status */
636 sc->intrstatus = status;
637
638 if (status & SCHED_INTR)
639 sched = true;
640
641 /*
642 * If a FATAL or RXORN interrupt is received, we have to reset the
643 * chip immediately.
644 */
645 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
646 goto chip_reset;
647
648 if (status & ATH9K_INT_SWBA)
649 tasklet_schedule(&sc->bcon_tasklet);
650
651 if (status & ATH9K_INT_TXURN)
652 ath9k_hw_updatetxtriglevel(ah, true);
653
654 if (status & ATH9K_INT_MIB) {
655 /*
656 * Disable interrupts until we service the MIB
657 * interrupt; otherwise it will continue to
658 * fire.
659 */
660 ath9k_hw_set_interrupts(ah, 0);
661 /*
662 * Let the hal handle the event. We assume
663 * it will clear whatever condition caused
664 * the interrupt.
665 */
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +0530666 ath9k_hw_procmibevent(ah);
Sujith063d8be2009-03-30 15:28:49 +0530667 ath9k_hw_set_interrupts(ah, sc->imask);
668 }
669
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400670 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
671 if (status & ATH9K_INT_TIM_TIMER) {
Sujith063d8be2009-03-30 15:28:49 +0530672 /* Clear RxAbort bit so that we can
673 * receive frames */
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700674 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400675 ath9k_hw_setrxabort(sc->sc_ah, 0);
Sujith063d8be2009-03-30 15:28:49 +0530676 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
677 }
Sujith063d8be2009-03-30 15:28:49 +0530678
679chip_reset:
680
Sujith817e11d2008-12-07 21:42:44 +0530681 ath_debug_stat_interrupt(sc, status);
682
Sujithff37e332008-11-24 12:07:55 +0530683 if (sched) {
684 /* turn off every interrupt except SWBA */
Sujith17d79042009-02-09 13:27:03 +0530685 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
Sujithff37e332008-11-24 12:07:55 +0530686 tasklet_schedule(&sc->intr_tq);
687 }
688
689 return IRQ_HANDLED;
Sujith063d8be2009-03-30 15:28:49 +0530690
691#undef SCHED_INTR
Sujithff37e332008-11-24 12:07:55 +0530692}
693
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700694static u32 ath_get_extchanmode(struct ath_softc *sc,
Sujith99405f92008-11-24 12:08:35 +0530695 struct ieee80211_channel *chan,
Sujith094d05d2008-12-12 11:57:43 +0530696 enum nl80211_channel_type channel_type)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700697{
698 u32 chanmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700699
700 switch (chan->band) {
701 case IEEE80211_BAND_2GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530702 switch(channel_type) {
703 case NL80211_CHAN_NO_HT:
704 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700705 chanmode = CHANNEL_G_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530706 break;
707 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700708 chanmode = CHANNEL_G_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530709 break;
710 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700711 chanmode = CHANNEL_G_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530712 break;
713 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700714 break;
715 case IEEE80211_BAND_5GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530716 switch(channel_type) {
717 case NL80211_CHAN_NO_HT:
718 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700719 chanmode = CHANNEL_A_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530720 break;
721 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700722 chanmode = CHANNEL_A_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530723 break;
724 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700725 chanmode = CHANNEL_A_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530726 break;
727 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700728 break;
729 default:
730 break;
731 }
732
733 return chanmode;
734}
735
Jouni Malinen6ace2892008-12-17 13:32:17 +0200736static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200737 struct ath9k_keyval *hk, const u8 *addr,
738 bool authenticator)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700739{
Jouni Malinen6ace2892008-12-17 13:32:17 +0200740 const u8 *key_rxmic;
741 const u8 *key_txmic;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700742
Jouni Malinen6ace2892008-12-17 13:32:17 +0200743 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
744 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700745
746 if (addr == NULL) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200747 /*
748 * Group key installation - only two key cache entries are used
749 * regardless of splitmic capability since group key is only
750 * used either for TX or RX.
751 */
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200752 if (authenticator) {
753 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
754 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
755 } else {
756 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
757 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
758 }
Jouni Malinend216aaa2009-03-03 13:11:53 +0200759 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700760 }
Sujith17d79042009-02-09 13:27:03 +0530761 if (!sc->splitmic) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200762 /* TX and RX keys share the same key cache entry. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700763 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
764 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
Jouni Malinend216aaa2009-03-03 13:11:53 +0200765 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700766 }
Jouni Malinend216aaa2009-03-03 13:11:53 +0200767
768 /* Separate key cache entries for TX and RX */
769
770 /* TX key goes at first index, RX key at +32. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700771 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
Jouni Malinend216aaa2009-03-03 13:11:53 +0200772 if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) {
773 /* TX MIC entry failed. No need to proceed further */
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700774 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
775 "Setting TX MIC Key Failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700776 return 0;
777 }
778
779 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
780 /* XXX delete tx key on failure? */
Jouni Malinend216aaa2009-03-03 13:11:53 +0200781 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix + 32, hk, addr);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200782}
783
784static int ath_reserve_key_cache_slot_tkip(struct ath_softc *sc)
785{
786 int i;
787
Sujith17d79042009-02-09 13:27:03 +0530788 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) {
789 if (test_bit(i, sc->keymap) ||
790 test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200791 continue; /* At least one part of TKIP key allocated */
Sujith17d79042009-02-09 13:27:03 +0530792 if (sc->splitmic &&
793 (test_bit(i + 32, sc->keymap) ||
794 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200795 continue; /* At least one part of TKIP key allocated */
796
797 /* Found a free slot for a TKIP key */
798 return i;
799 }
800 return -1;
801}
802
803static int ath_reserve_key_cache_slot(struct ath_softc *sc)
804{
805 int i;
806
807 /* First, try to find slots that would not be available for TKIP. */
Sujith17d79042009-02-09 13:27:03 +0530808 if (sc->splitmic) {
809 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 4; i++) {
810 if (!test_bit(i, sc->keymap) &&
811 (test_bit(i + 32, sc->keymap) ||
812 test_bit(i + 64, sc->keymap) ||
813 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200814 return i;
Sujith17d79042009-02-09 13:27:03 +0530815 if (!test_bit(i + 32, sc->keymap) &&
816 (test_bit(i, sc->keymap) ||
817 test_bit(i + 64, sc->keymap) ||
818 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200819 return i + 32;
Sujith17d79042009-02-09 13:27:03 +0530820 if (!test_bit(i + 64, sc->keymap) &&
821 (test_bit(i , sc->keymap) ||
822 test_bit(i + 32, sc->keymap) ||
823 test_bit(i + 64 + 32, sc->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200824 return i + 64;
Sujith17d79042009-02-09 13:27:03 +0530825 if (!test_bit(i + 64 + 32, sc->keymap) &&
826 (test_bit(i, sc->keymap) ||
827 test_bit(i + 32, sc->keymap) ||
828 test_bit(i + 64, sc->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200829 return i + 64 + 32;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200830 }
831 } else {
Sujith17d79042009-02-09 13:27:03 +0530832 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) {
833 if (!test_bit(i, sc->keymap) &&
834 test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200835 return i;
Sujith17d79042009-02-09 13:27:03 +0530836 if (test_bit(i, sc->keymap) &&
837 !test_bit(i + 64, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200838 return i + 64;
839 }
840 }
841
842 /* No partially used TKIP slots, pick any available slot */
Sujith17d79042009-02-09 13:27:03 +0530843 for (i = IEEE80211_WEP_NKID; i < sc->keymax; i++) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200844 /* Do not allow slots that could be needed for TKIP group keys
845 * to be used. This limitation could be removed if we know that
846 * TKIP will not be used. */
847 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
848 continue;
Sujith17d79042009-02-09 13:27:03 +0530849 if (sc->splitmic) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200850 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
851 continue;
852 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
853 continue;
854 }
855
Sujith17d79042009-02-09 13:27:03 +0530856 if (!test_bit(i, sc->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200857 return i; /* Found a free slot for a key */
858 }
859
860 /* No free slot found */
861 return -1;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700862}
863
864static int ath_key_config(struct ath_softc *sc,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200865 struct ieee80211_vif *vif,
Johannes Bergdc822b52008-12-29 12:55:09 +0100866 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700867 struct ieee80211_key_conf *key)
868{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700869 struct ath9k_keyval hk;
870 const u8 *mac = NULL;
871 int ret = 0;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200872 int idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700873
874 memset(&hk, 0, sizeof(hk));
875
876 switch (key->alg) {
877 case ALG_WEP:
878 hk.kv_type = ATH9K_CIPHER_WEP;
879 break;
880 case ALG_TKIP:
881 hk.kv_type = ATH9K_CIPHER_TKIP;
882 break;
883 case ALG_CCMP:
884 hk.kv_type = ATH9K_CIPHER_AES_CCM;
885 break;
886 default:
Jouni Malinenca470b22009-01-08 13:32:12 +0200887 return -EOPNOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700888 }
889
Jouni Malinen6ace2892008-12-17 13:32:17 +0200890 hk.kv_len = key->keylen;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700891 memcpy(hk.kv_val, key->key, key->keylen);
892
Jouni Malinen6ace2892008-12-17 13:32:17 +0200893 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
894 /* For now, use the default keys for broadcast keys. This may
895 * need to change with virtual interfaces. */
896 idx = key->keyidx;
897 } else if (key->keyidx) {
Johannes Bergdc822b52008-12-29 12:55:09 +0100898 if (WARN_ON(!sta))
899 return -EOPNOTSUPP;
900 mac = sta->addr;
901
Jouni Malinen6ace2892008-12-17 13:32:17 +0200902 if (vif->type != NL80211_IFTYPE_AP) {
903 /* Only keyidx 0 should be used with unicast key, but
904 * allow this for client mode for now. */
905 idx = key->keyidx;
906 } else
907 return -EIO;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700908 } else {
Johannes Bergdc822b52008-12-29 12:55:09 +0100909 if (WARN_ON(!sta))
910 return -EOPNOTSUPP;
911 mac = sta->addr;
912
Jouni Malinen6ace2892008-12-17 13:32:17 +0200913 if (key->alg == ALG_TKIP)
914 idx = ath_reserve_key_cache_slot_tkip(sc);
915 else
916 idx = ath_reserve_key_cache_slot(sc);
917 if (idx < 0)
Jouni Malinenca470b22009-01-08 13:32:12 +0200918 return -ENOSPC; /* no free key cache entries */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700919 }
920
921 if (key->alg == ALG_TKIP)
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200922 ret = ath_setkey_tkip(sc, idx, key->key, &hk, mac,
923 vif->type == NL80211_IFTYPE_AP);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700924 else
Jouni Malinend216aaa2009-03-03 13:11:53 +0200925 ret = ath9k_hw_set_keycache_entry(sc->sc_ah, idx, &hk, mac);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700926
927 if (!ret)
928 return -EIO;
929
Sujith17d79042009-02-09 13:27:03 +0530930 set_bit(idx, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200931 if (key->alg == ALG_TKIP) {
Sujith17d79042009-02-09 13:27:03 +0530932 set_bit(idx + 64, sc->keymap);
933 if (sc->splitmic) {
934 set_bit(idx + 32, sc->keymap);
935 set_bit(idx + 64 + 32, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200936 }
937 }
938
939 return idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700940}
941
942static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
943{
Jouni Malinen6ace2892008-12-17 13:32:17 +0200944 ath9k_hw_keyreset(sc->sc_ah, key->hw_key_idx);
945 if (key->hw_key_idx < IEEE80211_WEP_NKID)
946 return;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700947
Sujith17d79042009-02-09 13:27:03 +0530948 clear_bit(key->hw_key_idx, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200949 if (key->alg != ALG_TKIP)
950 return;
951
Sujith17d79042009-02-09 13:27:03 +0530952 clear_bit(key->hw_key_idx + 64, sc->keymap);
953 if (sc->splitmic) {
954 clear_bit(key->hw_key_idx + 32, sc->keymap);
955 clear_bit(key->hw_key_idx + 64 + 32, sc->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200956 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700957}
958
Sujitheb2599c2009-01-23 11:20:44 +0530959static void setup_ht_cap(struct ath_softc *sc,
960 struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700961{
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700962 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530963 u8 tx_streams, rx_streams;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700964
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200965 ht_info->ht_supported = true;
966 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
967 IEEE80211_HT_CAP_SM_PS |
968 IEEE80211_HT_CAP_SGI_40 |
969 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700970
Sujith9e98ac62009-07-23 15:32:34 +0530971 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
972 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
Sujitheb2599c2009-01-23 11:20:44 +0530973
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200974 /* set up supported mcs set */
975 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700976 tx_streams = !(common->tx_chainmask & (common->tx_chainmask - 1)) ?
977 1 : 2;
978 rx_streams = !(common->rx_chainmask & (common->rx_chainmask - 1)) ?
979 1 : 2;
Sujitheb2599c2009-01-23 11:20:44 +0530980
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530981 if (tx_streams != rx_streams) {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700982 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700983 "TX streams %d, RX streams: %d\n",
984 tx_streams, rx_streams);
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530985 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
986 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
987 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
Sujitheb2599c2009-01-23 11:20:44 +0530988 }
989
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530990 ht_info->mcs.rx_mask[0] = 0xff;
991 if (rx_streams >= 2)
992 ht_info->mcs.rx_mask[1] = 0xff;
993
994 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700995}
996
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530997static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +0530998 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530999 struct ieee80211_bss_conf *bss_conf)
1000{
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07001001 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001002 struct ath_common *common = ath9k_hw_common(ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301003
1004 if (bss_conf->assoc) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001005 ath_print(common, ATH_DBG_CONFIG,
1006 "Bss Info ASSOC %d, bssid: %pM\n",
1007 bss_conf->aid, common->curbssid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301008
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301009 /* New association, store aid */
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001010 common->curaid = bss_conf->aid;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07001011 ath9k_hw_write_associd(ah);
Jouni Malinenccdfeab2009-05-20 21:59:08 +03001012
Senthil Balasubramanian2664f202009-06-24 18:56:39 +05301013 /*
1014 * Request a re-configuration of Beacon related timers
1015 * on the receipt of the first Beacon frame (i.e.,
1016 * after time sync with the AP).
1017 */
1018 sc->sc_flags |= SC_OP_BEACON_SYNC;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301019
1020 /* Configure the beacon */
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001021 ath_beacon_config(sc, vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301022
1023 /* Reset rssi stats */
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +05301024 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301025
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001026 ath_start_ani(common);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301027 } else {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001028 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001029 common->curaid = 0;
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +05301030 /* Stop ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001031 del_timer_sync(&common->ani.timer);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301032 }
1033}
1034
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301035/********************************/
1036/* LED functions */
1037/********************************/
1038
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301039static void ath_led_blink_work(struct work_struct *work)
1040{
1041 struct ath_softc *sc = container_of(work, struct ath_softc,
1042 ath_led_blink_work.work);
1043
1044 if (!(sc->sc_flags & SC_OP_LED_ASSOCIATED))
1045 return;
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301046
1047 if ((sc->led_on_duration == ATH_LED_ON_DURATION_IDLE) ||
1048 (sc->led_off_duration == ATH_LED_OFF_DURATION_IDLE))
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301049 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301050 else
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301051 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301052 (sc->sc_flags & SC_OP_LED_ON) ? 1 : 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301053
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04001054 ieee80211_queue_delayed_work(sc->hw,
1055 &sc->ath_led_blink_work,
1056 (sc->sc_flags & SC_OP_LED_ON) ?
1057 msecs_to_jiffies(sc->led_off_duration) :
1058 msecs_to_jiffies(sc->led_on_duration));
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301059
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301060 sc->led_on_duration = sc->led_on_cnt ?
1061 max((ATH_LED_ON_DURATION_IDLE - sc->led_on_cnt), 25) :
1062 ATH_LED_ON_DURATION_IDLE;
1063 sc->led_off_duration = sc->led_off_cnt ?
1064 max((ATH_LED_OFF_DURATION_IDLE - sc->led_off_cnt), 10) :
1065 ATH_LED_OFF_DURATION_IDLE;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301066 sc->led_on_cnt = sc->led_off_cnt = 0;
1067 if (sc->sc_flags & SC_OP_LED_ON)
1068 sc->sc_flags &= ~SC_OP_LED_ON;
1069 else
1070 sc->sc_flags |= SC_OP_LED_ON;
1071}
1072
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301073static void ath_led_brightness(struct led_classdev *led_cdev,
1074 enum led_brightness brightness)
1075{
1076 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1077 struct ath_softc *sc = led->sc;
1078
1079 switch (brightness) {
1080 case LED_OFF:
1081 if (led->led_type == ATH_LED_ASSOC ||
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301082 led->led_type == ATH_LED_RADIO) {
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301083 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301084 (led->led_type == ATH_LED_RADIO));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301085 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301086 if (led->led_type == ATH_LED_RADIO)
1087 sc->sc_flags &= ~SC_OP_LED_ON;
1088 } else {
1089 sc->led_off_cnt++;
1090 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301091 break;
1092 case LED_FULL:
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301093 if (led->led_type == ATH_LED_ASSOC) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301094 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04001095 ieee80211_queue_delayed_work(sc->hw,
1096 &sc->ath_led_blink_work, 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301097 } else if (led->led_type == ATH_LED_RADIO) {
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301098 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301099 sc->sc_flags |= SC_OP_LED_ON;
1100 } else {
1101 sc->led_on_cnt++;
1102 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301103 break;
1104 default:
1105 break;
1106 }
1107}
1108
1109static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1110 char *trigger)
1111{
1112 int ret;
1113
1114 led->sc = sc;
1115 led->led_cdev.name = led->name;
1116 led->led_cdev.default_trigger = trigger;
1117 led->led_cdev.brightness_set = ath_led_brightness;
1118
1119 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1120 if (ret)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001121 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1122 "Failed to register led:%s", led->name);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301123 else
1124 led->registered = 1;
1125 return ret;
1126}
1127
1128static void ath_unregister_led(struct ath_led *led)
1129{
1130 if (led->registered) {
1131 led_classdev_unregister(&led->led_cdev);
1132 led->registered = 0;
1133 }
1134}
1135
1136static void ath_deinit_leds(struct ath_softc *sc)
1137{
1138 ath_unregister_led(&sc->assoc_led);
1139 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1140 ath_unregister_led(&sc->tx_led);
1141 ath_unregister_led(&sc->rx_led);
1142 ath_unregister_led(&sc->radio_led);
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301143 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301144}
1145
1146static void ath_init_leds(struct ath_softc *sc)
1147{
1148 char *trigger;
1149 int ret;
1150
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301151 if (AR_SREV_9287(sc->sc_ah))
1152 sc->sc_ah->led_pin = ATH_LED_PIN_9287;
1153 else
1154 sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
1155
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301156 /* Configure gpio 1 for output */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301157 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301158 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1159 /* LED off, active low */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301160 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301161
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301162 INIT_DELAYED_WORK(&sc->ath_led_blink_work, ath_led_blink_work);
1163
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301164 trigger = ieee80211_get_radio_led_name(sc->hw);
1165 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001166 "ath9k-%s::radio", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301167 ret = ath_register_led(sc, &sc->radio_led, trigger);
1168 sc->radio_led.led_type = ATH_LED_RADIO;
1169 if (ret)
1170 goto fail;
1171
1172 trigger = ieee80211_get_assoc_led_name(sc->hw);
1173 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001174 "ath9k-%s::assoc", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301175 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1176 sc->assoc_led.led_type = ATH_LED_ASSOC;
1177 if (ret)
1178 goto fail;
1179
1180 trigger = ieee80211_get_tx_led_name(sc->hw);
1181 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001182 "ath9k-%s::tx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301183 ret = ath_register_led(sc, &sc->tx_led, trigger);
1184 sc->tx_led.led_type = ATH_LED_TX;
1185 if (ret)
1186 goto fail;
1187
1188 trigger = ieee80211_get_rx_led_name(sc->hw);
1189 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001190 "ath9k-%s::rx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301191 ret = ath_register_led(sc, &sc->rx_led, trigger);
1192 sc->rx_led.led_type = ATH_LED_RX;
1193 if (ret)
1194 goto fail;
1195
1196 return;
1197
1198fail:
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001199 cancel_delayed_work_sync(&sc->ath_led_blink_work);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301200 ath_deinit_leds(sc);
1201}
1202
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001203void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301204{
Sujithcbe61d82009-02-09 13:27:12 +05301205 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001206 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001207 struct ieee80211_channel *channel = hw->conf.channel;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001208 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301209
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301210 ath9k_ps_wakeup(sc);
Vivek Natarajan93b1b372009-09-17 09:24:58 +05301211 ath9k_hw_configpcipowersave(ah, 0, 0);
Sujithd2f5b3a2009-04-13 21:56:25 +05301212
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301213 if (!ah->curchan)
1214 ah->curchan = ath_get_curchannel(sc, sc->hw);
1215
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301216 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301217 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001218 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001219 ath_print(common, ATH_DBG_FATAL,
1220 "Unable to reset channel %u (%uMhz) ",
1221 "reset status %d\n",
1222 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301223 }
1224 spin_unlock_bh(&sc->sc_resetlock);
1225
1226 ath_update_txpow(sc);
1227 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001228 ath_print(common, ATH_DBG_FATAL,
1229 "Unable to restart recv logic\n");
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301230 return;
1231 }
1232
1233 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001234 ath_beacon_config(sc, NULL); /* restart beacons */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301235
1236 /* Re-Enable interrupts */
Sujith17d79042009-02-09 13:27:03 +05301237 ath9k_hw_set_interrupts(ah, sc->imask);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301238
1239 /* Enable LED */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301240 ath9k_hw_cfg_output(ah, ah->led_pin,
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301241 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301242 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301243
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001244 ieee80211_wake_queues(hw);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301245 ath9k_ps_restore(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301246}
1247
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001248void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301249{
Sujithcbe61d82009-02-09 13:27:12 +05301250 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001251 struct ieee80211_channel *channel = hw->conf.channel;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001252 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301253
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301254 ath9k_ps_wakeup(sc);
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001255 ieee80211_stop_queues(hw);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301256
1257 /* Disable LED */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301258 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1259 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301260
1261 /* Disable interrupts */
1262 ath9k_hw_set_interrupts(ah, 0);
1263
Sujith043a0402009-01-16 21:38:47 +05301264 ath_drain_all_txq(sc, false); /* clear pending tx frames */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301265 ath_stoprecv(sc); /* turn off frame recv */
1266 ath_flushrecv(sc); /* flush recv queue */
1267
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301268 if (!ah->curchan)
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001269 ah->curchan = ath_get_curchannel(sc, hw);
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301270
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301271 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301272 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001273 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001274 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1275 "Unable to reset channel %u (%uMhz) "
1276 "reset status %d\n",
1277 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301278 }
1279 spin_unlock_bh(&sc->sc_resetlock);
1280
1281 ath9k_hw_phy_disable(ah);
Vivek Natarajan93b1b372009-09-17 09:24:58 +05301282 ath9k_hw_configpcipowersave(ah, 1, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301283 ath9k_ps_restore(sc);
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07001284 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301285}
1286
Gabor Juhos5077fd32009-03-06 11:17:55 +01001287/*******************/
1288/* Rfkill */
1289/*******************/
1290
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301291static bool ath_is_rfkill_set(struct ath_softc *sc)
1292{
Sujithcbe61d82009-02-09 13:27:12 +05301293 struct ath_hw *ah = sc->sc_ah;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301294
Sujith2660b812009-02-09 13:27:26 +05301295 return ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
1296 ah->rfkill_polarity;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301297}
1298
Johannes Berg3b319aa2009-06-13 14:50:26 +05301299static void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301300{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301301 struct ath_wiphy *aphy = hw->priv;
1302 struct ath_softc *sc = aphy->sc;
1303 bool blocked = !!ath_is_rfkill_set(sc);
1304
1305 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
Johannes Berg19d337d2009-06-02 13:01:37 +02001306}
1307
Johannes Berg3b319aa2009-06-13 14:50:26 +05301308static void ath_start_rfkill_poll(struct ath_softc *sc)
Johannes Berg19d337d2009-06-02 13:01:37 +02001309{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301310 struct ath_hw *ah = sc->sc_ah;
Johannes Berg19d337d2009-06-02 13:01:37 +02001311
Johannes Berg3b319aa2009-06-13 14:50:26 +05301312 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1313 wiphy_rfkill_start_polling(sc->hw->wiphy);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301314}
1315
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001316static void ath9k_uninit_hw(struct ath_softc *sc)
1317{
1318 struct ath_hw *ah = sc->sc_ah;
1319
1320 BUG_ON(!ah);
1321
1322 ath9k_exit_debug(ah);
1323 ath9k_hw_detach(ah);
1324 sc->sc_ah = NULL;
1325}
1326
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001327static void ath_clean_core(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301328{
1329 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001330 struct ath_hw *ah = sc->sc_ah;
Sujith9c84b792008-10-29 10:17:13 +05301331 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301332
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301333 ath9k_ps_wakeup(sc);
1334
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001335 dev_dbg(sc->dev, "Detach ATH hw\n");
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301336
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001337 ath_deinit_leds(sc);
Sujithe31f7b92009-09-23 13:49:12 +05301338 wiphy_rfkill_stop_polling(sc->hw->wiphy);
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001339
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001340 for (i = 0; i < sc->num_sec_wiphy; i++) {
1341 struct ath_wiphy *aphy = sc->sec_wiphy[i];
1342 if (aphy == NULL)
1343 continue;
1344 sc->sec_wiphy[i] = NULL;
1345 ieee80211_unregister_hw(aphy->hw);
1346 ieee80211_free_hw(aphy->hw);
1347 }
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +05301348 ieee80211_unregister_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301349 ath_rx_cleanup(sc);
1350 ath_tx_cleanup(sc);
1351
Sujith9c84b792008-10-29 10:17:13 +05301352 tasklet_kill(&sc->intr_tq);
1353 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301354
Sujith9c84b792008-10-29 10:17:13 +05301355 if (!(sc->sc_flags & SC_OP_INVALID))
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07001356 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301357
Sujith9c84b792008-10-29 10:17:13 +05301358 /* cleanup tx queues */
1359 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1360 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301361 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujith9c84b792008-10-29 10:17:13 +05301362
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001363 if ((sc->btcoex.no_stomp_timer) &&
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001364 ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001365 ath_gen_timer_free(ah, sc->btcoex.no_stomp_timer);
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001366}
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301367
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001368void ath_detach(struct ath_softc *sc)
1369{
1370 ath_clean_core(sc);
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001371 ath9k_uninit_hw(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301372}
1373
Luis R. Rodriguezbd96d392009-10-06 21:19:10 -04001374void ath_cleanup(struct ath_softc *sc)
1375{
1376 struct ath_hw *ah = sc->sc_ah;
1377 struct ath_common *common = ath9k_hw_common(ah);
1378
1379 ath_clean_core(sc);
1380 free_irq(sc->irq, sc);
1381 ath_bus_cleanup(common);
1382 kfree(sc->sec_wiphy);
1383 ieee80211_free_hw(sc->hw);
1384
1385 ath9k_uninit_hw(sc);
1386}
1387
Bob Copelande3bb2492009-03-30 22:30:30 -04001388static int ath9k_reg_notifier(struct wiphy *wiphy,
1389 struct regulatory_request *request)
1390{
1391 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1392 struct ath_wiphy *aphy = hw->priv;
1393 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001394 struct ath_regulatory *reg = ath9k_hw_regulatory(sc->sc_ah);
Bob Copelande3bb2492009-03-30 22:30:30 -04001395
1396 return ath_reg_notifier_apply(wiphy, request, reg);
1397}
1398
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001399/*
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001400 * Detects if there is any priority bt traffic
1401 */
1402static void ath_detect_bt_priority(struct ath_softc *sc)
1403{
1404 struct ath_btcoex *btcoex = &sc->btcoex;
1405 struct ath_hw *ah = sc->sc_ah;
1406
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001407 if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001408 btcoex->bt_priority_cnt++;
1409
1410 if (time_after(jiffies, btcoex->bt_priority_time +
1411 msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
1412 if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001413 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
1414 "BT priority traffic detected");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001415 sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
1416 } else {
1417 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
1418 }
1419
1420 btcoex->bt_priority_cnt = 0;
1421 btcoex->bt_priority_time = jiffies;
1422 }
1423}
1424
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001425/*
1426 * Configures appropriate weight based on stomp type.
1427 */
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001428static void ath9k_btcoex_bt_stomp(struct ath_softc *sc,
1429 enum ath_stomp_type stomp_type)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001430{
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001431 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001432
1433 switch (stomp_type) {
1434 case ATH_BTCOEX_STOMP_ALL:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001435 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1436 AR_STOMP_ALL_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001437 break;
1438 case ATH_BTCOEX_STOMP_LOW:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001439 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1440 AR_STOMP_LOW_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001441 break;
1442 case ATH_BTCOEX_STOMP_NONE:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001443 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1444 AR_STOMP_NONE_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001445 break;
1446 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001447 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
1448 "Invalid Stomptype\n");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001449 break;
1450 }
1451
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001452 ath9k_hw_btcoex_enable(ah);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001453}
1454
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001455static void ath9k_gen_timer_start(struct ath_hw *ah,
1456 struct ath_gen_timer *timer,
1457 u32 timer_next,
1458 u32 timer_period)
1459{
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001460 struct ath_common *common = ath9k_hw_common(ah);
1461 struct ath_softc *sc = (struct ath_softc *) common->priv;
1462
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001463 ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
1464
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001465 if ((sc->imask & ATH9K_INT_GENTIMER) == 0) {
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001466 ath9k_hw_set_interrupts(ah, 0);
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001467 sc->imask |= ATH9K_INT_GENTIMER;
1468 ath9k_hw_set_interrupts(ah, sc->imask);
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001469 }
1470}
1471
1472static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
1473{
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001474 struct ath_common *common = ath9k_hw_common(ah);
1475 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001476 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
1477
1478 ath9k_hw_gen_timer_stop(ah, timer);
1479
1480 /* if no timer is enabled, turn off interrupt mask */
1481 if (timer_table->timer_mask.val == 0) {
1482 ath9k_hw_set_interrupts(ah, 0);
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001483 sc->imask &= ~ATH9K_INT_GENTIMER;
1484 ath9k_hw_set_interrupts(ah, sc->imask);
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001485 }
1486}
1487
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001488/*
1489 * This is the master bt coex timer which runs for every
1490 * 45ms, bt traffic will be given priority during 55% of this
1491 * period while wlan gets remaining 45%
1492 */
1493static void ath_btcoex_period_timer(unsigned long data)
1494{
1495 struct ath_softc *sc = (struct ath_softc *) data;
1496 struct ath_hw *ah = sc->sc_ah;
1497 struct ath_btcoex *btcoex = &sc->btcoex;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001498
1499 ath_detect_bt_priority(sc);
1500
1501 spin_lock_bh(&btcoex->btcoex_lock);
1502
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001503 ath9k_btcoex_bt_stomp(sc, btcoex->bt_stomp_type);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001504
1505 spin_unlock_bh(&btcoex->btcoex_lock);
1506
1507 if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
1508 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001509 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001510
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001511 ath9k_gen_timer_start(ah,
1512 btcoex->no_stomp_timer,
1513 (ath9k_hw_gettsf32(ah) +
1514 btcoex->btcoex_no_stomp),
1515 btcoex->btcoex_no_stomp * 10);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001516 btcoex->hw_timer_enabled = true;
1517 }
1518
1519 mod_timer(&btcoex->period_timer, jiffies +
1520 msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
1521}
1522
1523/*
1524 * Generic tsf based hw timer which configures weight
1525 * registers to time slice between wlan and bt traffic
1526 */
1527static void ath_btcoex_no_stomp_timer(void *arg)
1528{
1529 struct ath_softc *sc = (struct ath_softc *)arg;
1530 struct ath_hw *ah = sc->sc_ah;
1531 struct ath_btcoex *btcoex = &sc->btcoex;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001532
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001533 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
1534 "no stomp timer running \n");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001535
1536 spin_lock_bh(&btcoex->btcoex_lock);
1537
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001538 if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW)
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001539 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_NONE);
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001540 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001541 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_LOW);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001542
1543 spin_unlock_bh(&btcoex->btcoex_lock);
1544}
1545
1546static int ath_init_btcoex_timer(struct ath_softc *sc)
1547{
1548 struct ath_btcoex *btcoex = &sc->btcoex;
1549
1550 btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000;
1551 btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
1552 btcoex->btcoex_period / 100;
1553
1554 setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
1555 (unsigned long) sc);
1556
1557 spin_lock_init(&btcoex->btcoex_lock);
1558
1559 btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
1560 ath_btcoex_no_stomp_timer,
1561 ath_btcoex_no_stomp_timer,
1562 (void *) sc, AR_FIRST_NDP_TIMER);
1563
1564 if (!btcoex->no_stomp_timer)
1565 return -ENOMEM;
1566
1567 return 0;
1568}
1569
1570/*
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001571 * Read and write, they both share the same lock. We do this to serialize
1572 * reads and writes on Atheros 802.11n PCI devices only. This is required
1573 * as the FIFO on these devices can only accept sanely 2 requests. After
1574 * that the device goes bananas. Serializing the reads/writes prevents this
1575 * from happening.
1576 */
1577
1578static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
1579{
1580 struct ath_hw *ah = (struct ath_hw *) hw_priv;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001581 struct ath_common *common = ath9k_hw_common(ah);
1582 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001583
1584 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
1585 unsigned long flags;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001586 spin_lock_irqsave(&sc->sc_serial_rw, flags);
1587 iowrite32(val, sc->mem + reg_offset);
1588 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001589 } else
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001590 iowrite32(val, sc->mem + reg_offset);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001591}
1592
1593static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
1594{
1595 struct ath_hw *ah = (struct ath_hw *) hw_priv;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001596 struct ath_common *common = ath9k_hw_common(ah);
1597 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001598 u32 val;
1599
1600 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
1601 unsigned long flags;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001602 spin_lock_irqsave(&sc->sc_serial_rw, flags);
1603 val = ioread32(sc->mem + reg_offset);
1604 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001605 } else
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001606 val = ioread32(sc->mem + reg_offset);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001607 return val;
1608}
1609
Luis R. Rodriguez2ddb5c82009-09-14 02:09:38 -07001610static const struct ath_ops ath9k_common_ops = {
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001611 .read = ath9k_ioread32,
1612 .write = ath9k_iowrite32,
1613};
1614
1615/*
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001616 * Initialize and fill ath_softc, ath_sofct is the
1617 * "Software Carrier" struct. Historically it has existed
1618 * to allow the separation between hardware specific
1619 * variables (now in ath_hw) and driver specific variables.
1620 */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001621static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
1622 const struct ath_bus_ops *bus_ops)
Sujithff37e332008-11-24 12:07:55 +05301623{
Sujithcbe61d82009-02-09 13:27:12 +05301624 struct ath_hw *ah = NULL;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001625 struct ath_common *common;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001626 int r = 0, i;
Sujithff37e332008-11-24 12:07:55 +05301627 int csz = 0;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001628 int qnum;
Sujithff37e332008-11-24 12:07:55 +05301629
1630 /* XXX: hardware will not be ready until ath_open() being called */
1631 sc->sc_flags |= SC_OP_INVALID;
Sujith88b126a2008-11-28 22:19:02 +05301632
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001633 spin_lock_init(&sc->wiphy_lock);
Sujithff37e332008-11-24 12:07:55 +05301634 spin_lock_init(&sc->sc_resetlock);
Luis R. Rodriguez61584252009-03-12 18:18:49 -04001635 spin_lock_init(&sc->sc_serial_rw);
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05301636 spin_lock_init(&sc->ani_lock);
Gabor Juhos04717cc2009-07-14 20:17:13 -04001637 spin_lock_init(&sc->sc_pm_lock);
Sujithaa33de02008-12-18 11:40:16 +05301638 mutex_init(&sc->mutex);
Sujithff37e332008-11-24 12:07:55 +05301639 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
Sujith9fc9ab02009-03-03 10:16:51 +05301640 tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
Sujithff37e332008-11-24 12:07:55 +05301641 (unsigned long)sc);
1642
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001643 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001644 if (!ah)
1645 return -ENOMEM;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001646
Luis R. Rodriguez8df5d1b2009-08-03 12:24:37 -07001647 ah->hw_version.devid = devid;
Vasanthakumar Thiagarajanaeac3552009-09-09 15:25:49 +05301648 ah->hw_version.subsysid = subsysid;
Luis R. Rodrigueze1e2f932009-08-03 12:24:38 -07001649 sc->sc_ah = ah;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001650
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001651 common = ath9k_hw_common(ah);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001652 common->ops = &ath9k_common_ops;
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001653 common->bus_ops = bus_ops;
Luis R. Rodriguez13b81552009-09-10 17:52:45 -07001654 common->ah = ah;
Luis R. Rodriguezb002a4a2009-09-13 00:03:27 -07001655 common->hw = sc->hw;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001656 common->priv = sc;
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -04001657 common->debug_mask = ath9k_debug;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001658
1659 /*
1660 * Cache line size is used to size and align various
1661 * structures used to communicate with the hardware.
1662 */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001663 ath_read_cachesize(common, &csz);
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001664 /* XXX assert csz is non-zero */
1665 common->cachelsz = csz << 2; /* convert to bytes */
1666
Luis R. Rodriguezf637cfd2009-08-03 12:24:46 -07001667 r = ath9k_hw_init(ah);
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001668 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001669 ath_print(common, ATH_DBG_FATAL,
1670 "Unable to initialize hardware; "
1671 "initialization status: %d\n", r);
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001672 goto bad_free_hw;
1673 }
1674
1675 if (ath9k_init_debug(ah) < 0) {
1676 ath_print(common, ATH_DBG_FATAL,
1677 "Unable to create debugfs files\n");
1678 goto bad_free_hw;
Sujithff37e332008-11-24 12:07:55 +05301679 }
Sujithff37e332008-11-24 12:07:55 +05301680
1681 /* Get the hardware key cache size. */
Sujith2660b812009-02-09 13:27:26 +05301682 sc->keymax = ah->caps.keycache_size;
Sujith17d79042009-02-09 13:27:03 +05301683 if (sc->keymax > ATH_KEYMAX) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001684 ath_print(common, ATH_DBG_ANY,
1685 "Warning, using only %u entries in %u key cache\n",
1686 ATH_KEYMAX, sc->keymax);
Sujith17d79042009-02-09 13:27:03 +05301687 sc->keymax = ATH_KEYMAX;
Sujithff37e332008-11-24 12:07:55 +05301688 }
1689
1690 /*
1691 * Reset the key cache since some parts do not
1692 * reset the contents on initial power up.
1693 */
Sujith17d79042009-02-09 13:27:03 +05301694 for (i = 0; i < sc->keymax; i++)
Sujithff37e332008-11-24 12:07:55 +05301695 ath9k_hw_keyreset(ah, (u16) i);
Sujithff37e332008-11-24 12:07:55 +05301696
Sujithff37e332008-11-24 12:07:55 +05301697 /* default to MONITOR mode */
Sujith2660b812009-02-09 13:27:26 +05301698 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
Colin McCabed97809d2008-12-01 13:38:55 -08001699
Sujithff37e332008-11-24 12:07:55 +05301700 /* Setup rate tables */
1701
1702 ath_rate_attach(sc);
1703 ath_setup_rates(sc, IEEE80211_BAND_2GHZ);
1704 ath_setup_rates(sc, IEEE80211_BAND_5GHZ);
1705
1706 /*
1707 * Allocate hardware transmit queues: one queue for
1708 * beacon frames and one data queue for each QoS
1709 * priority. Note that the hal handles reseting
1710 * these queues at the needed time.
1711 */
Luis R. Rodriguez536b3a72009-10-06 21:19:11 -04001712 sc->beacon.beaconq = ath9k_hw_beaconq_setup(ah);
Sujithb77f4832008-12-07 21:44:03 +05301713 if (sc->beacon.beaconq == -1) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001714 ath_print(common, ATH_DBG_FATAL,
1715 "Unable to setup a beacon xmit queue\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001716 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301717 goto bad2;
1718 }
Sujithb77f4832008-12-07 21:44:03 +05301719 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
1720 if (sc->beacon.cabq == NULL) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001721 ath_print(common, ATH_DBG_FATAL,
1722 "Unable to setup CAB xmit queue\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001723 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301724 goto bad2;
1725 }
1726
Sujith17d79042009-02-09 13:27:03 +05301727 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
Sujithff37e332008-11-24 12:07:55 +05301728 ath_cabq_update(sc);
1729
Sujithb77f4832008-12-07 21:44:03 +05301730 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
1731 sc->tx.hwq_map[i] = -1;
Sujithff37e332008-11-24 12:07:55 +05301732
1733 /* Setup data queues */
1734 /* NB: ensure BK queue is the lowest priority h/w queue */
1735 if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001736 ath_print(common, ATH_DBG_FATAL,
1737 "Unable to setup xmit queue for BK traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001738 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301739 goto bad2;
1740 }
1741
1742 if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001743 ath_print(common, ATH_DBG_FATAL,
1744 "Unable to setup xmit queue for BE traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001745 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301746 goto bad2;
1747 }
1748 if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001749 ath_print(common, ATH_DBG_FATAL,
1750 "Unable to setup xmit queue for VI traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001751 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301752 goto bad2;
1753 }
1754 if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001755 ath_print(common, ATH_DBG_FATAL,
1756 "Unable to setup xmit queue for VO traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001757 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301758 goto bad2;
1759 }
1760
1761 /* Initializes the noise floor to a reasonable default value.
1762 * Later on this will be updated during ANI processing. */
1763
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001764 common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
1765 setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc);
Sujithff37e332008-11-24 12:07:55 +05301766
1767 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1768 ATH9K_CIPHER_TKIP, NULL)) {
1769 /*
1770 * Whether we should enable h/w TKIP MIC.
1771 * XXX: if we don't support WME TKIP MIC, then we wouldn't
1772 * report WMM capable, so it's always safe to turn on
1773 * TKIP MIC in this case.
1774 */
1775 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
1776 0, 1, NULL);
1777 }
1778
1779 /*
1780 * Check whether the separate key cache entries
1781 * are required to handle both tx+rx MIC keys.
1782 * With split mic keys the number of stations is limited
1783 * to 27 otherwise 59.
1784 */
1785 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1786 ATH9K_CIPHER_TKIP, NULL)
1787 && ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1788 ATH9K_CIPHER_MIC, NULL)
1789 && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
1790 0, NULL))
Sujith17d79042009-02-09 13:27:03 +05301791 sc->splitmic = 1;
Sujithff37e332008-11-24 12:07:55 +05301792
1793 /* turn on mcast key search if possible */
1794 if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
1795 (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
1796 1, NULL);
1797
Sujith17d79042009-02-09 13:27:03 +05301798 sc->config.txpowlimit = ATH_TXPOWER_MAX;
Sujithff37e332008-11-24 12:07:55 +05301799
1800 /* 11n Capabilities */
Sujith2660b812009-02-09 13:27:26 +05301801 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujithff37e332008-11-24 12:07:55 +05301802 sc->sc_flags |= SC_OP_TXAGGR;
1803 sc->sc_flags |= SC_OP_RXAGGR;
1804 }
1805
Luis R. Rodriguez43c27612009-09-13 21:07:07 -07001806 common->tx_chainmask = ah->caps.tx_chainmask;
1807 common->rx_chainmask = ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +05301808
1809 ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
Sujithb77f4832008-12-07 21:44:03 +05301810 sc->rx.defant = ath9k_hw_getdefantenna(ah);
Sujithff37e332008-11-24 12:07:55 +05301811
Jouni Malinen8ca21f02009-03-03 19:23:27 +02001812 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001813 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
Sujithff37e332008-11-24 12:07:55 +05301814
Sujithb77f4832008-12-07 21:44:03 +05301815 sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */
Sujithff37e332008-11-24 12:07:55 +05301816
1817 /* initialize beacon slots */
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001818 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001819 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001820 sc->beacon.bslot_aphy[i] = NULL;
1821 }
Sujithff37e332008-11-24 12:07:55 +05301822
Sujithff37e332008-11-24 12:07:55 +05301823 /* setup channels and rates */
1824
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001825 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301826 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1827 sc->rates[IEEE80211_BAND_2GHZ];
1828 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001829 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
1830 ARRAY_SIZE(ath9k_2ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301831
Sujith2660b812009-02-09 13:27:26 +05301832 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) {
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001833 sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301834 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1835 sc->rates[IEEE80211_BAND_5GHZ];
1836 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001837 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
1838 ARRAY_SIZE(ath9k_5ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301839 }
1840
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001841 switch (ah->btcoex_hw.scheme) {
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001842 case ATH_BTCOEX_CFG_NONE:
1843 break;
1844 case ATH_BTCOEX_CFG_2WIRE:
1845 ath9k_hw_btcoex_init_2wire(ah);
1846 break;
1847 case ATH_BTCOEX_CFG_3WIRE:
1848 ath9k_hw_btcoex_init_3wire(ah);
1849 r = ath_init_btcoex_timer(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301850 if (r)
1851 goto bad2;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001852 qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001853 ath9k_hw_init_btcoex_hw(ah, qnum);
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001854 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001855 break;
1856 default:
1857 WARN_ON(1);
1858 break;
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301859 }
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +05301860
Sujithff37e332008-11-24 12:07:55 +05301861 return 0;
1862bad2:
1863 /* cleanup tx queues */
1864 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1865 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301866 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujithff37e332008-11-24 12:07:55 +05301867
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001868bad_free_hw:
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001869 ath9k_uninit_hw(sc);
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001870 return r;
Sujithff37e332008-11-24 12:07:55 +05301871}
1872
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001873void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301874{
Sujith9c84b792008-10-29 10:17:13 +05301875 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1876 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1877 IEEE80211_HW_SIGNAL_DBM |
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301878 IEEE80211_HW_AMPDU_AGGREGATION |
1879 IEEE80211_HW_SUPPORTS_PS |
Sujitheeee1322009-03-10 10:39:53 +05301880 IEEE80211_HW_PS_NULLFUNC_STACK |
1881 IEEE80211_HW_SPECTRUM_MGMT;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301882
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02001883 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
Jouni Malinen0ced0e12009-01-08 13:32:13 +02001884 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
1885
Sujith9c84b792008-10-29 10:17:13 +05301886 hw->wiphy->interface_modes =
1887 BIT(NL80211_IFTYPE_AP) |
1888 BIT(NL80211_IFTYPE_STATION) |
Pat Erley9cb54122009-03-20 22:59:59 -04001889 BIT(NL80211_IFTYPE_ADHOC) |
1890 BIT(NL80211_IFTYPE_MESH_POINT);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301891
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301892 hw->queues = 4;
Sujithe63835b2008-11-18 09:07:53 +05301893 hw->max_rates = 4;
Sujith171387e2009-02-17 15:36:25 +05301894 hw->channel_change_time = 5000;
Jouni Malinen465ca842009-03-03 19:23:34 +02001895 hw->max_listen_interval = 10;
Luis R. Rodriguezdd190182009-07-14 20:13:56 -04001896 /* Hardware supports 10 but we use 4 */
1897 hw->max_rate_tries = 4;
Sujith528f0c62008-10-29 10:14:26 +05301898 hw->sta_data_size = sizeof(struct ath_node);
Sujith17d79042009-02-09 13:27:03 +05301899 hw->vif_data_size = sizeof(struct ath_vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301900
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301901 hw->rate_control_algorithm = "ath9k_rate_control";
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301902
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001903 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1904 &sc->sbands[IEEE80211_BAND_2GHZ];
1905 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
1906 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1907 &sc->sbands[IEEE80211_BAND_5GHZ];
1908}
1909
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001910/* Device driver core initialization */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001911int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
1912 const struct ath_bus_ops *bus_ops)
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001913{
1914 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001915 struct ath_common *common;
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001916 struct ath_hw *ah;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001917 int error = 0, i;
Bob Copeland3a702e42009-03-30 22:30:29 -04001918 struct ath_regulatory *reg;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001919
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001920 dev_dbg(sc->dev, "Attach ATH hw\n");
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001921
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001922 error = ath_init_softc(devid, sc, subsysid, bus_ops);
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001923 if (error != 0)
1924 return error;
1925
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001926 ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001927 common = ath9k_hw_common(ah);
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001928
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001929 /* get mac address from hardware and set in mac80211 */
1930
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001931 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001932
1933 ath_set_hw_capab(sc, hw);
1934
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001935 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
Luis R. Rodriguezc26c2e52009-05-19 18:27:11 -04001936 ath9k_reg_notifier);
1937 if (error)
1938 return error;
1939
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001940 reg = &common->regulatory;
Luis R. Rodriguezc26c2e52009-05-19 18:27:11 -04001941
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001942 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujitheb2599c2009-01-23 11:20:44 +05301943 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001944 if (test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes))
Sujitheb2599c2009-01-23 11:20:44 +05301945 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
Sujith9c84b792008-10-29 10:17:13 +05301946 }
1947
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301948 /* initialize tx/rx engine */
1949 error = ath_tx_init(sc, ATH_TXBUF);
1950 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301951 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301952
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301953 error = ath_rx_init(sc, ATH_RXBUF);
1954 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301955 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301956
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001957 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
Jouni Malinenf98c3bd2009-03-03 19:23:39 +02001958 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
1959 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001960
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301961 error = ieee80211_register_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301962
Bob Copeland3a702e42009-03-30 22:30:29 -04001963 if (!ath_is_world_regd(reg)) {
Bob Copelandc02cf372009-03-30 22:30:28 -04001964 error = regulatory_hint(hw->wiphy, reg->alpha2);
Luis R. Rodriguezfe33eb32009-02-21 00:04:30 -05001965 if (error)
1966 goto error_attach;
1967 }
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001968
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301969 /* Initialize LED control */
1970 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301971
Johannes Berg3b319aa2009-06-13 14:50:26 +05301972 ath_start_rfkill_poll(sc);
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001973
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301974 return 0;
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301975
1976error_attach:
1977 /* cleanup tx queues */
1978 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1979 if (ATH_TXQ_SETUP(sc, i))
1980 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1981
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001982 ath9k_uninit_hw(sc);
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301983
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301984 return error;
1985}
1986
Sujithff37e332008-11-24 12:07:55 +05301987int ath_reset(struct ath_softc *sc, bool retry_tx)
1988{
Sujithcbe61d82009-02-09 13:27:12 +05301989 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001990 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez030bb492008-12-23 15:58:37 -08001991 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001992 int r;
Sujithff37e332008-11-24 12:07:55 +05301993
1994 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +05301995 ath_drain_all_txq(sc, retry_tx);
Sujithff37e332008-11-24 12:07:55 +05301996 ath_stoprecv(sc);
1997 ath_flushrecv(sc);
1998
1999 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05302000 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002001 if (r)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002002 ath_print(common, ATH_DBG_FATAL,
2003 "Unable to reset hardware; reset status %d\n", r);
Sujithff37e332008-11-24 12:07:55 +05302004 spin_unlock_bh(&sc->sc_resetlock);
2005
2006 if (ath_startrecv(sc) != 0)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002007 ath_print(common, ATH_DBG_FATAL,
2008 "Unable to start recv logic\n");
Sujithff37e332008-11-24 12:07:55 +05302009
2010 /*
2011 * We may be doing a reset in response to a request
2012 * that changes the channel so update any state that
2013 * might change as a result.
2014 */
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08002015 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05302016
2017 ath_update_txpow(sc);
2018
2019 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002020 ath_beacon_config(sc, NULL); /* restart beacons */
Sujithff37e332008-11-24 12:07:55 +05302021
Sujith17d79042009-02-09 13:27:03 +05302022 ath9k_hw_set_interrupts(ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05302023
2024 if (retry_tx) {
2025 int i;
2026 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2027 if (ATH_TXQ_SETUP(sc, i)) {
Sujithb77f4832008-12-07 21:44:03 +05302028 spin_lock_bh(&sc->tx.txq[i].axq_lock);
2029 ath_txq_schedule(sc, &sc->tx.txq[i]);
2030 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
Sujithff37e332008-11-24 12:07:55 +05302031 }
2032 }
2033 }
2034
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002035 return r;
Sujithff37e332008-11-24 12:07:55 +05302036}
2037
2038/*
2039 * This function will allocate both the DMA descriptor structure, and the
2040 * buffers it contains. These are used to contain the descriptors used
2041 * by the system.
2042*/
2043int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
2044 struct list_head *head, const char *name,
2045 int nbuf, int ndesc)
2046{
2047#define DS2PHYS(_dd, _ds) \
2048 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
2049#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
2050#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002051 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujithff37e332008-11-24 12:07:55 +05302052 struct ath_desc *ds;
2053 struct ath_buf *bf;
2054 int i, bsize, error;
2055
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002056 ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
2057 name, nbuf, ndesc);
Sujithff37e332008-11-24 12:07:55 +05302058
Senthil Balasubramanianb03a9db2009-03-06 11:24:09 +05302059 INIT_LIST_HEAD(head);
Sujithff37e332008-11-24 12:07:55 +05302060 /* ath_desc must be a multiple of DWORDs */
2061 if ((sizeof(struct ath_desc) % 4) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002062 ath_print(common, ATH_DBG_FATAL,
2063 "ath_desc not DWORD aligned\n");
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -07002064 BUG_ON((sizeof(struct ath_desc) % 4) != 0);
Sujithff37e332008-11-24 12:07:55 +05302065 error = -ENOMEM;
2066 goto fail;
2067 }
2068
Sujithff37e332008-11-24 12:07:55 +05302069 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
2070
2071 /*
2072 * Need additional DMA memory because we can't use
2073 * descriptors that cross the 4K page boundary. Assume
2074 * one skipped descriptor per 4K page.
2075 */
Sujith2660b812009-02-09 13:27:26 +05302076 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
Sujithff37e332008-11-24 12:07:55 +05302077 u32 ndesc_skipped =
2078 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
2079 u32 dma_len;
2080
2081 while (ndesc_skipped) {
2082 dma_len = ndesc_skipped * sizeof(struct ath_desc);
2083 dd->dd_desc_len += dma_len;
2084
2085 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
2086 };
2087 }
2088
2089 /* allocate descriptors */
Gabor Juhos7da3c552009-01-14 20:17:03 +01002090 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05302091 &dd->dd_desc_paddr, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05302092 if (dd->dd_desc == NULL) {
2093 error = -ENOMEM;
2094 goto fail;
2095 }
2096 ds = dd->dd_desc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002097 ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
2098 name, ds, (u32) dd->dd_desc_len,
2099 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
Sujithff37e332008-11-24 12:07:55 +05302100
2101 /* allocate buffers */
2102 bsize = sizeof(struct ath_buf) * nbuf;
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05302103 bf = kzalloc(bsize, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05302104 if (bf == NULL) {
2105 error = -ENOMEM;
2106 goto fail2;
2107 }
Sujithff37e332008-11-24 12:07:55 +05302108 dd->dd_bufptr = bf;
2109
Sujithff37e332008-11-24 12:07:55 +05302110 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
2111 bf->bf_desc = ds;
2112 bf->bf_daddr = DS2PHYS(dd, ds);
2113
Sujith2660b812009-02-09 13:27:26 +05302114 if (!(sc->sc_ah->caps.hw_caps &
Sujithff37e332008-11-24 12:07:55 +05302115 ATH9K_HW_CAP_4KB_SPLITTRANS)) {
2116 /*
2117 * Skip descriptor addresses which can cause 4KB
2118 * boundary crossing (addr + length) with a 32 dword
2119 * descriptor fetch.
2120 */
2121 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -07002122 BUG_ON((caddr_t) bf->bf_desc >=
Sujithff37e332008-11-24 12:07:55 +05302123 ((caddr_t) dd->dd_desc +
2124 dd->dd_desc_len));
2125
2126 ds += ndesc;
2127 bf->bf_desc = ds;
2128 bf->bf_daddr = DS2PHYS(dd, ds);
2129 }
2130 }
2131 list_add_tail(&bf->list, head);
2132 }
2133 return 0;
2134fail2:
Gabor Juhos7da3c552009-01-14 20:17:03 +01002135 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2136 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05302137fail:
2138 memset(dd, 0, sizeof(*dd));
2139 return error;
2140#undef ATH_DESC_4KB_BOUND_CHECK
2141#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
2142#undef DS2PHYS
2143}
2144
2145void ath_descdma_cleanup(struct ath_softc *sc,
2146 struct ath_descdma *dd,
2147 struct list_head *head)
2148{
Gabor Juhos7da3c552009-01-14 20:17:03 +01002149 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2150 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05302151
2152 INIT_LIST_HEAD(head);
2153 kfree(dd->dd_bufptr);
2154 memset(dd, 0, sizeof(*dd));
2155}
2156
2157int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
2158{
2159 int qnum;
2160
2161 switch (queue) {
2162 case 0:
Sujithb77f4832008-12-07 21:44:03 +05302163 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
Sujithff37e332008-11-24 12:07:55 +05302164 break;
2165 case 1:
Sujithb77f4832008-12-07 21:44:03 +05302166 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
Sujithff37e332008-11-24 12:07:55 +05302167 break;
2168 case 2:
Sujithb77f4832008-12-07 21:44:03 +05302169 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05302170 break;
2171 case 3:
Sujithb77f4832008-12-07 21:44:03 +05302172 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
Sujithff37e332008-11-24 12:07:55 +05302173 break;
2174 default:
Sujithb77f4832008-12-07 21:44:03 +05302175 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05302176 break;
2177 }
2178
2179 return qnum;
2180}
2181
2182int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
2183{
2184 int qnum;
2185
2186 switch (queue) {
2187 case ATH9K_WME_AC_VO:
2188 qnum = 0;
2189 break;
2190 case ATH9K_WME_AC_VI:
2191 qnum = 1;
2192 break;
2193 case ATH9K_WME_AC_BE:
2194 qnum = 2;
2195 break;
2196 case ATH9K_WME_AC_BK:
2197 qnum = 3;
2198 break;
2199 default:
2200 qnum = -1;
2201 break;
2202 }
2203
2204 return qnum;
2205}
2206
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002207/* XXX: Remove me once we don't depend on ath9k_channel for all
2208 * this redundant data */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002209void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
2210 struct ath9k_channel *ichan)
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002211{
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002212 struct ieee80211_channel *chan = hw->conf.channel;
2213 struct ieee80211_conf *conf = &hw->conf;
2214
2215 ichan->channel = chan->center_freq;
2216 ichan->chan = chan;
2217
2218 if (chan->band == IEEE80211_BAND_2GHZ) {
2219 ichan->chanmode = CHANNEL_G;
Sujith88132622009-09-03 12:08:53 +05302220 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002221 } else {
2222 ichan->chanmode = CHANNEL_A;
2223 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
2224 }
2225
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -07002226 if (conf_is_ht(conf))
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002227 ichan->chanmode = ath_get_extchanmode(sc, chan,
2228 conf->channel_type);
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002229}
2230
Sujithff37e332008-11-24 12:07:55 +05302231/**********************/
2232/* mac80211 callbacks */
2233/**********************/
2234
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002235/*
2236 * (Re)start btcoex timers
2237 */
2238static void ath9k_btcoex_timer_resume(struct ath_softc *sc)
2239{
2240 struct ath_btcoex *btcoex = &sc->btcoex;
2241 struct ath_hw *ah = sc->sc_ah;
2242
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002243 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
2244 "Starting btcoex timers");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002245
2246 /* make sure duty cycle timer is also stopped when resuming */
2247 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07002248 ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002249
2250 btcoex->bt_priority_cnt = 0;
2251 btcoex->bt_priority_time = jiffies;
2252 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
2253
2254 mod_timer(&btcoex->period_timer, jiffies);
2255}
2256
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002257static int ath9k_start(struct ieee80211_hw *hw)
2258{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002259 struct ath_wiphy *aphy = hw->priv;
2260 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002261 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002262 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002263 struct ieee80211_channel *curchan = hw->conf.channel;
Sujithff37e332008-11-24 12:07:55 +05302264 struct ath9k_channel *init_channel;
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302265 int r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002266
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002267 ath_print(common, ATH_DBG_CONFIG,
2268 "Starting driver with initial channel: %d MHz\n",
2269 curchan->center_freq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002270
Sujith141b38b2009-02-04 08:10:07 +05302271 mutex_lock(&sc->mutex);
2272
Jouni Malinen9580a222009-03-03 19:23:33 +02002273 if (ath9k_wiphy_started(sc)) {
2274 if (sc->chan_idx == curchan->hw_value) {
2275 /*
2276 * Already on the operational channel, the new wiphy
2277 * can be marked active.
2278 */
2279 aphy->state = ATH_WIPHY_ACTIVE;
2280 ieee80211_wake_queues(hw);
2281 } else {
2282 /*
2283 * Another wiphy is on another channel, start the new
2284 * wiphy in paused state.
2285 */
2286 aphy->state = ATH_WIPHY_PAUSED;
2287 ieee80211_stop_queues(hw);
2288 }
2289 mutex_unlock(&sc->mutex);
2290 return 0;
2291 }
2292 aphy->state = ATH_WIPHY_ACTIVE;
2293
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002294 /* setup initial channel */
2295
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302296 sc->chan_idx = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002297
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302298 init_channel = ath_get_curchannel(sc, hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002299
Sujithff37e332008-11-24 12:07:55 +05302300 /* Reset SERDES registers */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002301 ath9k_hw_configpcipowersave(ah, 0, 0);
Sujithff37e332008-11-24 12:07:55 +05302302
2303 /*
2304 * The basic interface to setting the hardware in a good
2305 * state is ``reset''. On return the hardware is known to
2306 * be powered up and with interrupts disabled. This must
2307 * be followed by initialization of the appropriate bits
2308 * and then setup of the interrupt mask.
2309 */
2310 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002311 r = ath9k_hw_reset(ah, init_channel, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002312 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002313 ath_print(common, ATH_DBG_FATAL,
2314 "Unable to reset hardware; reset status %d "
2315 "(freq %u MHz)\n", r,
2316 curchan->center_freq);
Sujithff37e332008-11-24 12:07:55 +05302317 spin_unlock_bh(&sc->sc_resetlock);
Sujith141b38b2009-02-04 08:10:07 +05302318 goto mutex_unlock;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002319 }
Sujithff37e332008-11-24 12:07:55 +05302320 spin_unlock_bh(&sc->sc_resetlock);
2321
2322 /*
2323 * This is needed only to setup initial state
2324 * but it's best done after a reset.
2325 */
2326 ath_update_txpow(sc);
2327
2328 /*
2329 * Setup the hardware after reset:
2330 * The receive engine is set going.
2331 * Frame transmit is handled entirely
2332 * in the frame output path; there's nothing to do
2333 * here except setup the interrupt mask.
2334 */
2335 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002336 ath_print(common, ATH_DBG_FATAL,
2337 "Unable to start recv logic\n");
Sujith141b38b2009-02-04 08:10:07 +05302338 r = -EIO;
2339 goto mutex_unlock;
Sujithff37e332008-11-24 12:07:55 +05302340 }
2341
2342 /* Setup our intr mask. */
Sujith17d79042009-02-09 13:27:03 +05302343 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
Sujithff37e332008-11-24 12:07:55 +05302344 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
2345 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
2346
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002347 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
Sujith17d79042009-02-09 13:27:03 +05302348 sc->imask |= ATH9K_INT_GTT;
Sujithff37e332008-11-24 12:07:55 +05302349
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002350 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
Sujith17d79042009-02-09 13:27:03 +05302351 sc->imask |= ATH9K_INT_CST;
Sujithff37e332008-11-24 12:07:55 +05302352
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08002353 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05302354
2355 sc->sc_flags &= ~SC_OP_INVALID;
2356
2357 /* Disable BMISS interrupt when we're not associated */
Sujith17d79042009-02-09 13:27:03 +05302358 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002359 ath9k_hw_set_interrupts(ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05302360
Jouni Malinenbce048d2009-03-03 19:23:28 +02002361 ieee80211_wake_queues(hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002362
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04002363 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002364
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002365 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
2366 !ah->btcoex_hw.enabled) {
Luis R. Rodriguez5e197292009-09-09 15:15:55 -07002367 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
2368 AR_STOMP_LOW_WLAN_WGHT);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002369 ath9k_hw_btcoex_enable(ah);
Vasanthakumar Thiagarajanf985ad12009-08-26 21:08:43 +05302370
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07002371 if (common->bus_ops->bt_coex_prep)
2372 common->bus_ops->bt_coex_prep(common);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002373 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002374 ath9k_btcoex_timer_resume(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05302375 }
2376
Sujith141b38b2009-02-04 08:10:07 +05302377mutex_unlock:
2378 mutex_unlock(&sc->mutex);
2379
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002380 return r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002381}
2382
2383static int ath9k_tx(struct ieee80211_hw *hw,
2384 struct sk_buff *skb)
2385{
Jouni Malinen147583c2008-08-11 14:01:50 +03002386 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Jouni Malinenbce048d2009-03-03 19:23:28 +02002387 struct ath_wiphy *aphy = hw->priv;
2388 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002389 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith528f0c62008-10-29 10:14:26 +05302390 struct ath_tx_control txctl;
2391 int hdrlen, padsize;
2392
Jouni Malinen8089cc42009-03-03 19:23:38 +02002393 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002394 ath_print(common, ATH_DBG_XMIT,
2395 "ath9k: %s: TX in unexpected wiphy state "
2396 "%d\n", wiphy_name(hw->wiphy), aphy->state);
Jouni Malinenee166a02009-03-03 19:23:36 +02002397 goto exit;
2398 }
2399
Gabor Juhos96148322009-07-24 17:27:21 +02002400 if (sc->ps_enabled) {
Jouni Malinendc8c4582009-05-19 17:01:42 +03002401 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2402 /*
2403 * mac80211 does not set PM field for normal data frames, so we
2404 * need to update that based on the current PS mode.
2405 */
2406 if (ieee80211_is_data(hdr->frame_control) &&
2407 !ieee80211_is_nullfunc(hdr->frame_control) &&
2408 !ieee80211_has_pm(hdr->frame_control)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002409 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
2410 "while in PS mode\n");
Jouni Malinendc8c4582009-05-19 17:01:42 +03002411 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2412 }
2413 }
2414
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002415 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
2416 /*
2417 * We are using PS-Poll and mac80211 can request TX while in
2418 * power save mode. Need to wake up hardware for the TX to be
2419 * completed and if needed, also for RX of buffered frames.
2420 */
2421 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2422 ath9k_ps_wakeup(sc);
2423 ath9k_hw_setrxabort(sc->sc_ah, 0);
2424 if (ieee80211_is_pspoll(hdr->frame_control)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002425 ath_print(common, ATH_DBG_PS,
2426 "Sending PS-Poll to pick a buffered frame\n");
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002427 sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA;
2428 } else {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002429 ath_print(common, ATH_DBG_PS,
2430 "Wake up to complete TX\n");
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002431 sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK;
2432 }
2433 /*
2434 * The actual restore operation will happen only after
2435 * the sc_flags bit is cleared. We are just dropping
2436 * the ps_usecount here.
2437 */
2438 ath9k_ps_restore(sc);
2439 }
2440
Sujith528f0c62008-10-29 10:14:26 +05302441 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +03002442
2443 /*
2444 * As a temporary workaround, assign seq# here; this will likely need
2445 * to be cleaned up to work better with Beacon transmission and virtual
2446 * BSSes.
2447 */
2448 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
2449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2450 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
Sujithb77f4832008-12-07 21:44:03 +05302451 sc->tx.seq_no += 0x10;
Jouni Malinen147583c2008-08-11 14:01:50 +03002452 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
Sujithb77f4832008-12-07 21:44:03 +05302453 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
Jouni Malinen147583c2008-08-11 14:01:50 +03002454 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002455
2456 /* Add the padding after the header if this is not already done */
2457 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
2458 if (hdrlen & 3) {
2459 padsize = hdrlen % 4;
2460 if (skb_headroom(skb) < padsize)
2461 return -1;
2462 skb_push(skb, padsize);
2463 memmove(skb->data, skb->data + padsize, hdrlen);
2464 }
2465
Sujith528f0c62008-10-29 10:14:26 +05302466 /* Check if a tx queue is available */
2467
2468 txctl.txq = ath_test_get_txq(sc, skb);
2469 if (!txctl.txq)
2470 goto exit;
2471
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002472 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002473
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002474 if (ath_tx_start(hw, skb, &txctl) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002475 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
Sujith528f0c62008-10-29 10:14:26 +05302476 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002477 }
2478
2479 return 0;
Sujith528f0c62008-10-29 10:14:26 +05302480exit:
2481 dev_kfree_skb_any(skb);
2482 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002483}
2484
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002485/*
2486 * Pause btcoex timer and bt duty cycle timer
2487 */
2488static void ath9k_btcoex_timer_pause(struct ath_softc *sc)
2489{
2490 struct ath_btcoex *btcoex = &sc->btcoex;
2491 struct ath_hw *ah = sc->sc_ah;
2492
2493 del_timer_sync(&btcoex->period_timer);
2494
2495 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07002496 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002497
2498 btcoex->hw_timer_enabled = false;
2499}
2500
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002501static void ath9k_stop(struct ieee80211_hw *hw)
2502{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002503 struct ath_wiphy *aphy = hw->priv;
2504 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002505 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002506 struct ath_common *common = ath9k_hw_common(ah);
Sujith9c84b792008-10-29 10:17:13 +05302507
Sujith4c483812009-08-18 10:51:52 +05302508 mutex_lock(&sc->mutex);
2509
Jouni Malinen9580a222009-03-03 19:23:33 +02002510 aphy->state = ATH_WIPHY_INACTIVE;
2511
Luis R. Rodriguezc94dbff2009-07-27 11:53:04 -07002512 cancel_delayed_work_sync(&sc->ath_led_blink_work);
2513 cancel_delayed_work_sync(&sc->tx_complete_work);
2514
2515 if (!sc->num_sec_wiphy) {
2516 cancel_delayed_work_sync(&sc->wiphy_work);
2517 cancel_work_sync(&sc->chan_work);
2518 }
2519
Sujith9c84b792008-10-29 10:17:13 +05302520 if (sc->sc_flags & SC_OP_INVALID) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002521 ath_print(common, ATH_DBG_ANY, "Device not present\n");
Sujith4c483812009-08-18 10:51:52 +05302522 mutex_unlock(&sc->mutex);
Sujith9c84b792008-10-29 10:17:13 +05302523 return;
2524 }
2525
Jouni Malinen9580a222009-03-03 19:23:33 +02002526 if (ath9k_wiphy_started(sc)) {
2527 mutex_unlock(&sc->mutex);
2528 return; /* another wiphy still in use */
2529 }
2530
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002531 if (ah->btcoex_hw.enabled) {
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002532 ath9k_hw_btcoex_disable(ah);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002533 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002534 ath9k_btcoex_timer_pause(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05302535 }
2536
Sujithff37e332008-11-24 12:07:55 +05302537 /* make sure h/w will not generate any interrupt
2538 * before setting the invalid flag. */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002539 ath9k_hw_set_interrupts(ah, 0);
Sujithff37e332008-11-24 12:07:55 +05302540
2541 if (!(sc->sc_flags & SC_OP_INVALID)) {
Sujith043a0402009-01-16 21:38:47 +05302542 ath_drain_all_txq(sc, false);
Sujithff37e332008-11-24 12:07:55 +05302543 ath_stoprecv(sc);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002544 ath9k_hw_phy_disable(ah);
Sujithff37e332008-11-24 12:07:55 +05302545 } else
Sujithb77f4832008-12-07 21:44:03 +05302546 sc->rx.rxlink = NULL;
Sujithff37e332008-11-24 12:07:55 +05302547
Sujithff37e332008-11-24 12:07:55 +05302548 /* disable HAL and put h/w to sleep */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002549 ath9k_hw_disable(ah);
2550 ath9k_hw_configpcipowersave(ah, 1, 1);
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07002551 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
Sujithff37e332008-11-24 12:07:55 +05302552
2553 sc->sc_flags |= SC_OP_INVALID;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002554
Sujith141b38b2009-02-04 08:10:07 +05302555 mutex_unlock(&sc->mutex);
2556
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002557 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002558}
2559
2560static int ath9k_add_interface(struct ieee80211_hw *hw,
2561 struct ieee80211_if_init_conf *conf)
2562{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002563 struct ath_wiphy *aphy = hw->priv;
2564 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002565 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith17d79042009-02-09 13:27:03 +05302566 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Colin McCabed97809d2008-12-01 13:38:55 -08002567 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002568 int ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002569
Sujith141b38b2009-02-04 08:10:07 +05302570 mutex_lock(&sc->mutex);
2571
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002572 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
2573 sc->nvifs > 0) {
2574 ret = -ENOBUFS;
2575 goto out;
2576 }
2577
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002578 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02002579 case NL80211_IFTYPE_STATION:
Colin McCabed97809d2008-12-01 13:38:55 -08002580 ic_opmode = NL80211_IFTYPE_STATION;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002581 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02002582 case NL80211_IFTYPE_ADHOC:
Johannes Berg05c914f2008-09-11 00:01:58 +02002583 case NL80211_IFTYPE_AP:
Pat Erley9cb54122009-03-20 22:59:59 -04002584 case NL80211_IFTYPE_MESH_POINT:
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002585 if (sc->nbcnvifs >= ATH_BCBUF) {
2586 ret = -ENOBUFS;
2587 goto out;
2588 }
Pat Erley9cb54122009-03-20 22:59:59 -04002589 ic_opmode = conf->type;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03002590 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002591 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002592 ath_print(common, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05302593 "Interface type %d not yet supported\n", conf->type);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002594 ret = -EOPNOTSUPP;
2595 goto out;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002596 }
2597
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002598 ath_print(common, ATH_DBG_CONFIG,
2599 "Attach a VIF of type: %d\n", ic_opmode);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002600
Sujith17d79042009-02-09 13:27:03 +05302601 /* Set the VIF opmode */
Sujith5640b082008-10-29 10:16:06 +05302602 avp->av_opmode = ic_opmode;
2603 avp->av_bslot = -1;
2604
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002605 sc->nvifs++;
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002606
2607 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
2608 ath9k_set_bssid_mask(hw);
2609
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002610 if (sc->nvifs > 1)
2611 goto out; /* skip global settings for secondary vif */
2612
Sujithb238e902009-03-03 10:16:56 +05302613 if (ic_opmode == NL80211_IFTYPE_AP) {
Sujith5640b082008-10-29 10:16:06 +05302614 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
Sujithb238e902009-03-03 10:16:56 +05302615 sc->sc_flags |= SC_OP_TSF_RESET;
2616 }
Sujith5640b082008-10-29 10:16:06 +05302617
Sujith5640b082008-10-29 10:16:06 +05302618 /* Set the device opmode */
Sujith2660b812009-02-09 13:27:26 +05302619 sc->sc_ah->opmode = ic_opmode;
Sujith5640b082008-10-29 10:16:06 +05302620
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302621 /*
2622 * Enable MIB interrupts when there are hardware phy counters.
2623 * Note we only do this (at the moment) for station mode.
2624 */
Sujith4af9cf42009-02-12 10:06:47 +05302625 if ((conf->type == NL80211_IFTYPE_STATION) ||
Pat Erley9cb54122009-03-20 22:59:59 -04002626 (conf->type == NL80211_IFTYPE_ADHOC) ||
2627 (conf->type == NL80211_IFTYPE_MESH_POINT)) {
Sujith1aa8e842009-08-13 09:34:25 +05302628 sc->imask |= ATH9K_INT_MIB;
Sujith4af9cf42009-02-12 10:06:47 +05302629 sc->imask |= ATH9K_INT_TSFOOR;
2630 }
2631
Sujith17d79042009-02-09 13:27:03 +05302632 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302633
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +05302634 if (conf->type == NL80211_IFTYPE_AP ||
2635 conf->type == NL80211_IFTYPE_ADHOC ||
2636 conf->type == NL80211_IFTYPE_MONITOR)
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08002637 ath_start_ani(common);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002638
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002639out:
Sujith141b38b2009-02-04 08:10:07 +05302640 mutex_unlock(&sc->mutex);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002641 return ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002642}
2643
2644static void ath9k_remove_interface(struct ieee80211_hw *hw,
2645 struct ieee80211_if_init_conf *conf)
2646{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002647 struct ath_wiphy *aphy = hw->priv;
2648 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002649 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith17d79042009-02-09 13:27:03 +05302650 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002651 int i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002652
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002653 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002654
Sujith141b38b2009-02-04 08:10:07 +05302655 mutex_lock(&sc->mutex);
2656
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002657 /* Stop ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08002658 del_timer_sync(&common->ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002659
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002660 /* Reclaim beacon resources */
Pat Erley9cb54122009-03-20 22:59:59 -04002661 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
2662 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
2663 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
Sujithb77f4832008-12-07 21:44:03 +05302664 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002665 ath_beacon_return(sc, avp);
2666 }
2667
Sujith672840a2008-08-11 14:05:08 +05302668 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002669
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002670 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
2671 if (sc->beacon.bslot[i] == conf->vif) {
2672 printk(KERN_DEBUG "%s: vif had allocated beacon "
2673 "slot\n", __func__);
2674 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002675 sc->beacon.bslot_aphy[i] = NULL;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002676 }
2677 }
2678
Sujith17d79042009-02-09 13:27:03 +05302679 sc->nvifs--;
Sujith141b38b2009-02-04 08:10:07 +05302680
2681 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002682}
2683
Johannes Berge8975582008-10-09 12:18:51 +02002684static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002685{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002686 struct ath_wiphy *aphy = hw->priv;
2687 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002688 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Johannes Berge8975582008-10-09 12:18:51 +02002689 struct ieee80211_conf *conf = &hw->conf;
Vivek Natarajan8782b412009-03-30 14:17:00 +05302690 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002691 bool disable_radio;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002692
Sujithaa33de02008-12-18 11:40:16 +05302693 mutex_lock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302694
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002695 /*
2696 * Leave this as the first check because we need to turn on the
2697 * radio if it was disabled before prior to processing the rest
2698 * of the changes. Likewise we must only disable the radio towards
2699 * the end.
2700 */
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002701 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002702 bool enable_radio;
2703 bool all_wiphys_idle;
2704 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002705
2706 spin_lock_bh(&sc->wiphy_lock);
2707 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002708 ath9k_set_wiphy_idle(aphy, idle);
2709
2710 if (!idle && all_wiphys_idle)
2711 enable_radio = true;
2712
2713 /*
2714 * After we unlock here its possible another wiphy
2715 * can be re-renabled so to account for that we will
2716 * only disable the radio toward the end of this routine
2717 * if by then all wiphys are still idle.
2718 */
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002719 spin_unlock_bh(&sc->wiphy_lock);
2720
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002721 if (enable_radio) {
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08002722 ath_radio_enable(sc, hw);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002723 ath_print(common, ATH_DBG_CONFIG,
2724 "not-idle: enabling radio\n");
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002725 }
2726 }
2727
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302728 if (changed & IEEE80211_CONF_CHANGE_PS) {
2729 if (conf->flags & IEEE80211_CONF_PS) {
Vivek Natarajan8782b412009-03-30 14:17:00 +05302730 if (!(ah->caps.hw_caps &
2731 ATH9K_HW_CAP_AUTOSLEEP)) {
2732 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
2733 sc->imask |= ATH9K_INT_TIM_TIMER;
2734 ath9k_hw_set_interrupts(sc->sc_ah,
2735 sc->imask);
2736 }
2737 ath9k_hw_setrxabort(sc->sc_ah, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302738 }
Gabor Juhos96148322009-07-24 17:27:21 +02002739 sc->ps_enabled = true;
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302740 } else {
Gabor Juhos96148322009-07-24 17:27:21 +02002741 sc->ps_enabled = false;
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07002742 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302743 if (!(ah->caps.hw_caps &
2744 ATH9K_HW_CAP_AUTOSLEEP)) {
2745 ath9k_hw_setrxabort(sc->sc_ah, 0);
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002746 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON |
2747 SC_OP_WAIT_FOR_CAB |
2748 SC_OP_WAIT_FOR_PSPOLL_DATA |
2749 SC_OP_WAIT_FOR_TX_ACK);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302750 if (sc->imask & ATH9K_INT_TIM_TIMER) {
2751 sc->imask &= ~ATH9K_INT_TIM_TIMER;
2752 ath9k_hw_set_interrupts(sc->sc_ah,
2753 sc->imask);
2754 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302755 }
2756 }
2757 }
2758
Johannes Berg47979382009-01-07 10:13:27 +01002759 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
Sujith99405f92008-11-24 12:08:35 +05302760 struct ieee80211_channel *curchan = hw->conf.channel;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002761 int pos = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002762
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002763 aphy->chan_idx = pos;
2764 aphy->chan_is_ht = conf_is_ht(conf);
2765
Jouni Malinen8089cc42009-03-03 19:23:38 +02002766 if (aphy->state == ATH_WIPHY_SCAN ||
2767 aphy->state == ATH_WIPHY_ACTIVE)
2768 ath9k_wiphy_pause_all_forced(sc, aphy);
2769 else {
2770 /*
2771 * Do not change operational channel based on a paused
2772 * wiphy changes.
2773 */
2774 goto skip_chan_change;
2775 }
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002776
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002777 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
2778 curchan->center_freq);
Johannes Bergae5eb022008-10-14 16:58:37 +02002779
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002780 /* XXX: remove me eventualy */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002781 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
Sujithe11602b2008-11-27 09:46:27 +05302782
Luis R. Rodriguezecf70442008-12-23 15:58:43 -08002783 ath_update_chainmask(sc, conf_is_ht(conf));
Sujith86060f02009-01-07 14:25:29 +05302784
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002785 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002786 ath_print(common, ATH_DBG_FATAL,
2787 "Unable to set channel\n");
Sujithaa33de02008-12-18 11:40:16 +05302788 mutex_unlock(&sc->mutex);
Sujithe11602b2008-11-27 09:46:27 +05302789 return -EINVAL;
2790 }
Sujith094d05d2008-12-12 11:57:43 +05302791 }
Sujith86b89ee2008-08-07 10:54:57 +05302792
Jouni Malinen8089cc42009-03-03 19:23:38 +02002793skip_chan_change:
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07002794 if (changed & IEEE80211_CONF_CHANGE_POWER)
Sujith17d79042009-02-09 13:27:03 +05302795 sc->config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002796
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002797 spin_lock_bh(&sc->wiphy_lock);
2798 disable_radio = ath9k_all_wiphys_idle(sc);
2799 spin_unlock_bh(&sc->wiphy_lock);
2800
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002801 if (disable_radio) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002802 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08002803 ath_radio_disable(sc, hw);
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002804 }
2805
Sujithaa33de02008-12-18 11:40:16 +05302806 mutex_unlock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302807
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002808 return 0;
2809}
2810
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002811#define SUPPORTED_FILTERS \
2812 (FIF_PROMISC_IN_BSS | \
2813 FIF_ALLMULTI | \
2814 FIF_CONTROL | \
Luis R. Rodriguezaf6a3fc2009-08-08 21:55:16 -04002815 FIF_PSPOLL | \
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002816 FIF_OTHER_BSS | \
2817 FIF_BCN_PRBRESP_PROMISC | \
2818 FIF_FCSFAIL)
2819
Sujith7dcfdcd2008-08-11 14:03:13 +05302820/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002821static void ath9k_configure_filter(struct ieee80211_hw *hw,
2822 unsigned int changed_flags,
2823 unsigned int *total_flags,
Johannes Berg3ac64be2009-08-17 16:16:53 +02002824 u64 multicast)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002825{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002826 struct ath_wiphy *aphy = hw->priv;
2827 struct ath_softc *sc = aphy->sc;
Sujith7dcfdcd2008-08-11 14:03:13 +05302828 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002829
2830 changed_flags &= SUPPORTED_FILTERS;
2831 *total_flags &= SUPPORTED_FILTERS;
2832
Sujithb77f4832008-12-07 21:44:03 +05302833 sc->rx.rxfilter = *total_flags;
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002834 ath9k_ps_wakeup(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302835 rfilt = ath_calcrxfilter(sc);
2836 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002837 ath9k_ps_restore(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302838
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002839 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
2840 "Set HW RX filter: 0x%x\n", rfilt);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002841}
2842
2843static void ath9k_sta_notify(struct ieee80211_hw *hw,
2844 struct ieee80211_vif *vif,
2845 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02002846 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002847{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002848 struct ath_wiphy *aphy = hw->priv;
2849 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002850
2851 switch (cmd) {
2852 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05302853 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002854 break;
2855 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05302856 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002857 break;
2858 default:
2859 break;
2860 }
2861}
2862
Sujith141b38b2009-02-04 08:10:07 +05302863static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002864 const struct ieee80211_tx_queue_params *params)
2865{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002866 struct ath_wiphy *aphy = hw->priv;
2867 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002868 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujithea9880f2008-08-07 10:53:10 +05302869 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002870 int ret = 0, qnum;
2871
2872 if (queue >= WME_NUM_AC)
2873 return 0;
2874
Sujith141b38b2009-02-04 08:10:07 +05302875 mutex_lock(&sc->mutex);
2876
Sujith1ffb0612009-03-30 15:28:46 +05302877 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
2878
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002879 qi.tqi_aifs = params->aifs;
2880 qi.tqi_cwmin = params->cw_min;
2881 qi.tqi_cwmax = params->cw_max;
2882 qi.tqi_burstTime = params->txop;
2883 qnum = ath_get_hal_qnum(queue, sc);
2884
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002885 ath_print(common, ATH_DBG_CONFIG,
2886 "Configure tx [queue/halq] [%d/%d], "
2887 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
2888 queue, qnum, params->aifs, params->cw_min,
2889 params->cw_max, params->txop);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002890
2891 ret = ath_txq_update(sc, qnum, &qi);
2892 if (ret)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002893 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002894
Sujith141b38b2009-02-04 08:10:07 +05302895 mutex_unlock(&sc->mutex);
2896
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002897 return ret;
2898}
2899
2900static int ath9k_set_key(struct ieee80211_hw *hw,
2901 enum set_key_cmd cmd,
Johannes Bergdc822b52008-12-29 12:55:09 +01002902 struct ieee80211_vif *vif,
2903 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002904 struct ieee80211_key_conf *key)
2905{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002906 struct ath_wiphy *aphy = hw->priv;
2907 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002908 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002909 int ret = 0;
2910
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02002911 if (modparam_nohwcrypt)
2912 return -ENOSPC;
2913
Sujith141b38b2009-02-04 08:10:07 +05302914 mutex_lock(&sc->mutex);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302915 ath9k_ps_wakeup(sc);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002916 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002917
2918 switch (cmd) {
2919 case SET_KEY:
Jouni Malinen3f53dd62009-02-26 11:18:46 +02002920 ret = ath_key_config(sc, vif, sta, key);
Jouni Malinen6ace2892008-12-17 13:32:17 +02002921 if (ret >= 0) {
2922 key->hw_key_idx = ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002923 /* push IV and Michael MIC generation to stack */
2924 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05302925 if (key->alg == ALG_TKIP)
2926 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Jouni Malinen0ced0e12009-01-08 13:32:13 +02002927 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
2928 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
Jouni Malinen6ace2892008-12-17 13:32:17 +02002929 ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002930 }
2931 break;
2932 case DISABLE_KEY:
2933 ath_key_delete(sc, key);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002934 break;
2935 default:
2936 ret = -EINVAL;
2937 }
2938
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302939 ath9k_ps_restore(sc);
Sujith141b38b2009-02-04 08:10:07 +05302940 mutex_unlock(&sc->mutex);
2941
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002942 return ret;
2943}
2944
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002945static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2946 struct ieee80211_vif *vif,
2947 struct ieee80211_bss_conf *bss_conf,
2948 u32 changed)
2949{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002950 struct ath_wiphy *aphy = hw->priv;
2951 struct ath_softc *sc = aphy->sc;
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002952 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002953 struct ath_common *common = ath9k_hw_common(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002954 struct ath_vif *avp = (void *)vif->drv_priv;
2955 u32 rfilt = 0;
2956 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002957
Sujith141b38b2009-02-04 08:10:07 +05302958 mutex_lock(&sc->mutex);
2959
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002960 /*
2961 * TODO: Need to decide which hw opmode to use for
2962 * multi-interface cases
2963 * XXX: This belongs into add_interface!
2964 */
2965 if (vif->type == NL80211_IFTYPE_AP &&
2966 ah->opmode != NL80211_IFTYPE_AP) {
2967 ah->opmode = NL80211_IFTYPE_STATION;
2968 ath9k_hw_setopmode(ah);
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002969 memcpy(common->curbssid, common->macaddr, ETH_ALEN);
2970 common->curaid = 0;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07002971 ath9k_hw_write_associd(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002972 /* Request full reset to get hw opmode changed properly */
2973 sc->sc_flags |= SC_OP_FULL_RESET;
2974 }
2975
2976 if ((changed & BSS_CHANGED_BSSID) &&
2977 !is_zero_ether_addr(bss_conf->bssid)) {
2978 switch (vif->type) {
2979 case NL80211_IFTYPE_STATION:
2980 case NL80211_IFTYPE_ADHOC:
2981 case NL80211_IFTYPE_MESH_POINT:
2982 /* Set BSSID */
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002983 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002984 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002985 common->curaid = 0;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07002986 ath9k_hw_write_associd(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002987
2988 /* Set aggregation protection mode parameters */
2989 sc->config.ath_aggr_prot = 0;
2990
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002991 ath_print(common, ATH_DBG_CONFIG,
2992 "RX filter 0x%x bssid %pM aid 0x%x\n",
2993 rfilt, common->curbssid, common->curaid);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002994
2995 /* need to reconfigure the beacon */
2996 sc->sc_flags &= ~SC_OP_BEACONS ;
2997
2998 break;
2999 default:
3000 break;
3001 }
3002 }
3003
3004 if ((vif->type == NL80211_IFTYPE_ADHOC) ||
3005 (vif->type == NL80211_IFTYPE_AP) ||
3006 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
3007 if ((changed & BSS_CHANGED_BEACON) ||
3008 (changed & BSS_CHANGED_BEACON_ENABLED &&
3009 bss_conf->enable_beacon)) {
3010 /*
3011 * Allocate and setup the beacon frame.
3012 *
3013 * Stop any previous beacon DMA. This may be
3014 * necessary, for example, when an ibss merge
3015 * causes reconfiguration; we may be called
3016 * with beacon transmission active.
3017 */
3018 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
3019
3020 error = ath_beacon_alloc(aphy, vif);
3021 if (!error)
3022 ath_beacon_config(sc, vif);
3023 }
3024 }
3025
3026 /* Check for WLAN_CAPABILITY_PRIVACY ? */
3027 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
3028 for (i = 0; i < IEEE80211_WEP_NKID; i++)
3029 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
3030 ath9k_hw_keysetmac(sc->sc_ah,
3031 (u16)i,
Luis R. Rodriguez15107182009-09-10 09:22:37 -07003032 common->curbssid);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02003033 }
3034
3035 /* Only legacy IBSS for now */
3036 if (vif->type == NL80211_IFTYPE_ADHOC)
3037 ath_update_chainmask(sc, 0);
3038
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003039 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003040 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
3041 bss_conf->use_short_preamble);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003042 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05303043 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003044 else
Sujith672840a2008-08-11 14:05:08 +05303045 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003046 }
3047
3048 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003049 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
3050 bss_conf->use_cts_prot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003051 if (bss_conf->use_cts_prot &&
3052 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05303053 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003054 else
Sujith672840a2008-08-11 14:05:08 +05303055 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003056 }
3057
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003058 if (changed & BSS_CHANGED_ASSOC) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003059 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003060 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05303061 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003062 }
Sujith141b38b2009-02-04 08:10:07 +05303063
Johannes Berg57c4d7b2009-04-23 16:10:04 +02003064 /*
3065 * The HW TSF has to be reset when the beacon interval changes.
3066 * We set the flag here, and ath_beacon_config_ap() would take this
3067 * into account when it gets called through the subsequent
3068 * config_interface() call - with IFCC_BEACON in the changed field.
3069 */
3070
3071 if (changed & BSS_CHANGED_BEACON_INT) {
3072 sc->sc_flags |= SC_OP_TSF_RESET;
3073 sc->beacon_interval = bss_conf->beacon_int;
3074 }
3075
Sujith141b38b2009-02-04 08:10:07 +05303076 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003077}
3078
3079static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
3080{
3081 u64 tsf;
Jouni Malinenbce048d2009-03-03 19:23:28 +02003082 struct ath_wiphy *aphy = hw->priv;
3083 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003084
Sujith141b38b2009-02-04 08:10:07 +05303085 mutex_lock(&sc->mutex);
3086 tsf = ath9k_hw_gettsf64(sc->sc_ah);
3087 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003088
3089 return tsf;
3090}
3091
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003092static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
3093{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003094 struct ath_wiphy *aphy = hw->priv;
3095 struct ath_softc *sc = aphy->sc;
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003096
Sujith141b38b2009-02-04 08:10:07 +05303097 mutex_lock(&sc->mutex);
3098 ath9k_hw_settsf64(sc->sc_ah, tsf);
3099 mutex_unlock(&sc->mutex);
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003100}
3101
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003102static void ath9k_reset_tsf(struct ieee80211_hw *hw)
3103{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003104 struct ath_wiphy *aphy = hw->priv;
3105 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003106
Sujith141b38b2009-02-04 08:10:07 +05303107 mutex_lock(&sc->mutex);
Luis R. Rodriguez21526d52009-09-09 20:05:39 -07003108
3109 ath9k_ps_wakeup(sc);
Sujith141b38b2009-02-04 08:10:07 +05303110 ath9k_hw_reset_tsf(sc->sc_ah);
Luis R. Rodriguez21526d52009-09-09 20:05:39 -07003111 ath9k_ps_restore(sc);
3112
Sujith141b38b2009-02-04 08:10:07 +05303113 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003114}
3115
3116static int ath9k_ampdu_action(struct ieee80211_hw *hw,
Sujith141b38b2009-02-04 08:10:07 +05303117 enum ieee80211_ampdu_mlme_action action,
3118 struct ieee80211_sta *sta,
3119 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003120{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003121 struct ath_wiphy *aphy = hw->priv;
3122 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003123 int ret = 0;
3124
3125 switch (action) {
3126 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05303127 if (!(sc->sc_flags & SC_OP_RXAGGR))
3128 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003129 break;
3130 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003131 break;
3132 case IEEE80211_AMPDU_TX_START:
Sujithf83da962009-07-23 15:32:37 +05303133 ath_tx_aggr_start(sc, sta, tid, ssn);
3134 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003135 break;
3136 case IEEE80211_AMPDU_TX_STOP:
Sujithf83da962009-07-23 15:32:37 +05303137 ath_tx_aggr_stop(sc, sta, tid);
Johannes Berg17741cd2008-09-11 00:02:02 +02003138 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003139 break;
Johannes Bergb1720232009-03-23 17:28:39 +01003140 case IEEE80211_AMPDU_TX_OPERATIONAL:
Sujith8469cde2008-10-29 10:19:28 +05303141 ath_tx_aggr_resume(sc, sta, tid);
3142 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003143 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003144 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
3145 "Unknown AMPDU action\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003146 }
3147
3148 return ret;
3149}
3150
Sujith0c98de62009-03-03 10:16:45 +05303151static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
3152{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003153 struct ath_wiphy *aphy = hw->priv;
3154 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05303155
Sujith3d832612009-08-21 12:00:28 +05303156 mutex_lock(&sc->mutex);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003157 if (ath9k_wiphy_scanning(sc)) {
3158 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
3159 "same time\n");
3160 /*
3161 * Do not allow the concurrent scanning state for now. This
3162 * could be improved with scanning control moved into ath9k.
3163 */
Sujith3d832612009-08-21 12:00:28 +05303164 mutex_unlock(&sc->mutex);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003165 return;
3166 }
3167
3168 aphy->state = ATH_WIPHY_SCAN;
3169 ath9k_wiphy_pause_all_forced(sc, aphy);
3170
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303171 spin_lock_bh(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +05303172 sc->sc_flags |= SC_OP_SCANNING;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303173 spin_unlock_bh(&sc->ani_lock);
Sujith3d832612009-08-21 12:00:28 +05303174 mutex_unlock(&sc->mutex);
Sujith0c98de62009-03-03 10:16:45 +05303175}
3176
3177static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
3178{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003179 struct ath_wiphy *aphy = hw->priv;
3180 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05303181
Sujith3d832612009-08-21 12:00:28 +05303182 mutex_lock(&sc->mutex);
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303183 spin_lock_bh(&sc->ani_lock);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003184 aphy->state = ATH_WIPHY_ACTIVE;
Sujith0c98de62009-03-03 10:16:45 +05303185 sc->sc_flags &= ~SC_OP_SCANNING;
Sujith9c07a772009-04-13 21:56:36 +05303186 sc->sc_flags |= SC_OP_FULL_RESET;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303187 spin_unlock_bh(&sc->ani_lock);
Vivek Natarajand0bec342009-09-02 15:50:55 +05303188 ath_beacon_config(sc, NULL);
Sujith3d832612009-08-21 12:00:28 +05303189 mutex_unlock(&sc->mutex);
Sujith0c98de62009-03-03 10:16:45 +05303190}
3191
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003192struct ieee80211_ops ath9k_ops = {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003193 .tx = ath9k_tx,
3194 .start = ath9k_start,
3195 .stop = ath9k_stop,
3196 .add_interface = ath9k_add_interface,
3197 .remove_interface = ath9k_remove_interface,
3198 .config = ath9k_config,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003199 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003200 .sta_notify = ath9k_sta_notify,
3201 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003202 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003203 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003204 .get_tsf = ath9k_get_tsf,
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003205 .set_tsf = ath9k_set_tsf,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003206 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02003207 .ampdu_action = ath9k_ampdu_action,
Sujith0c98de62009-03-03 10:16:45 +05303208 .sw_scan_start = ath9k_sw_scan_start,
3209 .sw_scan_complete = ath9k_sw_scan_complete,
Johannes Berg3b319aa2009-06-13 14:50:26 +05303210 .rfkill_poll = ath9k_rfkill_poll_state,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003211};
3212
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003213static int __init ath9k_init(void)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003214{
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303215 int error;
3216
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303217 /* Register rate control algorithm */
3218 error = ath_rate_control_register();
3219 if (error != 0) {
3220 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08003221 "ath9k: Unable to register rate control "
3222 "algorithm: %d\n",
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303223 error);
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003224 goto err_out;
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303225 }
3226
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003227 error = ath9k_debug_create_root();
3228 if (error) {
3229 printk(KERN_ERR
3230 "ath9k: Unable to create debugfs root: %d\n",
3231 error);
3232 goto err_rate_unregister;
3233 }
3234
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003235 error = ath_pci_init();
3236 if (error < 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003237 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08003238 "ath9k: No PCI devices found, driver not installed.\n");
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003239 error = -ENODEV;
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003240 goto err_remove_root;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003241 }
3242
Gabor Juhos09329d32009-01-14 20:17:07 +01003243 error = ath_ahb_init();
3244 if (error < 0) {
3245 error = -ENODEV;
3246 goto err_pci_exit;
3247 }
3248
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003249 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003250
Gabor Juhos09329d32009-01-14 20:17:07 +01003251 err_pci_exit:
3252 ath_pci_exit();
3253
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003254 err_remove_root:
3255 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003256 err_rate_unregister:
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303257 ath_rate_control_unregister();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003258 err_out:
3259 return error;
3260}
3261module_init(ath9k_init);
3262
3263static void __exit ath9k_exit(void)
3264{
Gabor Juhos09329d32009-01-14 20:17:07 +01003265 ath_ahb_exit();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003266 ath_pci_exit();
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003267 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003268 ath_rate_control_unregister();
Sujith04bd4632008-11-28 22:18:05 +05303269 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003270}
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003271module_exit(ath9k_exit);