blob: 1ac2f14667585c5f9ceadbdaad240abfb5a8865f [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
Ben Greear384914b2014-08-25 08:37:32 +030025#include <linux/uuid.h>
26#include <linux/time.h>
Kalle Valo5e3dd152013-06-12 20:52:10 +030027
Michal Kazioredb82362013-07-05 16:15:14 +030028#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030029#include "htc.h"
30#include "hw.h"
31#include "targaddrs.h"
32#include "wmi.h"
33#include "../ath.h"
34#include "../regd.h"
Janusz Dziedzic9702c682013-11-20 09:59:41 +020035#include "../dfs_pattern_detector.h"
Simon Wunderlich855aed12014-08-02 09:12:54 +030036#include "spectral.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030037
38#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
39#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
40#define WO(_f) ((_f##_OFFSET) >> 2)
41
42#define ATH10K_SCAN_ID 0
43#define WMI_READY_TIMEOUT (5 * HZ)
44#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020045#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030046
47/* Antenna noise floor */
48#define ATH10K_DEFAULT_NOISE_FLOOR -95
49
Bartosz Markowski71098612013-11-14 09:01:15 +010050#define ATH10K_MAX_NUM_MGMT_PENDING 128
Bartosz Markowski5e00d312013-09-26 17:47:12 +020051
Kalle Valo5a13e762014-01-20 11:01:46 +020052/* number of failed packets */
53#define ATH10K_KICKOUT_THRESHOLD 50
54
55/*
56 * Use insanely high numbers to make sure that the firmware implementation
57 * won't start, we have the same functionality already in hostapd. Unit
58 * is seconds.
59 */
60#define ATH10K_KEEPALIVE_MIN_IDLE 3747
61#define ATH10K_KEEPALIVE_MAX_IDLE 3895
62#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
63
Kalle Valo5e3dd152013-06-12 20:52:10 +030064struct ath10k;
65
Kalle Valo5e3dd152013-06-12 20:52:10 +030066struct ath10k_skb_cb {
67 dma_addr_t paddr;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020068 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030069
70 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030071 u8 tid;
72 bool is_offchan;
Michal Kaziora16942e2014-02-27 18:50:04 +020073 struct ath10k_htt_txbuf *txbuf;
74 u32 txbuf_paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +030075 } __packed htt;
Michal Kazior748afc42014-01-23 12:48:21 +010076
77 struct {
78 bool dtim_zero;
79 bool deliver_cab;
80 } bcn;
Kalle Valo5e3dd152013-06-12 20:52:10 +030081} __packed;
82
83static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
84{
85 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
86 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
87 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
88}
89
Kalle Valo5e3dd152013-06-12 20:52:10 +030090static inline u32 host_interest_item_address(u32 item_offset)
91{
92 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
93}
94
95struct ath10k_bmi {
96 bool done_sent;
97};
98
Bartosz Markowskib3effe62013-09-26 17:47:11 +020099struct ath10k_mem_chunk {
100 void *vaddr;
101 dma_addr_t paddr;
102 u32 len;
103 u32 req_id;
104};
105
Kalle Valo5e3dd152013-06-12 20:52:10 +0300106struct ath10k_wmi {
107 enum ath10k_htc_ep_id eid;
108 struct completion service_ready;
109 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200110 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200111 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200112 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200113 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200114
115 u32 num_mem_chunks;
Michal Kazior5c01aa3d2014-09-18 15:21:24 +0200116 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300117};
118
Michal Kazior60ef4012014-09-25 12:33:48 +0200119struct ath10k_fw_stats_peer {
Michal Kazior53268492014-09-25 12:33:50 +0200120 struct list_head list;
121
Kalle Valo5e3dd152013-06-12 20:52:10 +0300122 u8 peer_macaddr[ETH_ALEN];
123 u32 peer_rssi;
124 u32 peer_tx_rate;
Ben Greear23c3aae2014-03-28 14:35:15 +0200125 u32 peer_rx_rate; /* 10x only */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300126};
127
Michal Kazior53268492014-09-25 12:33:50 +0200128struct ath10k_fw_stats_pdev {
129 struct list_head list;
130
Kalle Valo5e3dd152013-06-12 20:52:10 +0300131 /* PDEV stats */
132 s32 ch_noise_floor;
133 u32 tx_frame_count;
134 u32 rx_frame_count;
135 u32 rx_clear_count;
136 u32 cycle_count;
137 u32 phy_err_count;
138 u32 chan_tx_power;
Chun-Yeow Yeoh52e346d2014-03-28 14:35:16 +0200139 u32 ack_rx_bad;
140 u32 rts_bad;
141 u32 rts_good;
142 u32 fcs_bad;
143 u32 no_beacons;
144 u32 mib_int_count;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300145
146 /* PDEV TX stats */
147 s32 comp_queued;
148 s32 comp_delivered;
149 s32 msdu_enqued;
150 s32 mpdu_enqued;
151 s32 wmm_drop;
152 s32 local_enqued;
153 s32 local_freed;
154 s32 hw_queued;
155 s32 hw_reaped;
156 s32 underrun;
157 s32 tx_abort;
158 s32 mpdus_requed;
159 u32 tx_ko;
160 u32 data_rc;
161 u32 self_triggers;
162 u32 sw_retry_failure;
163 u32 illgl_rate_phy_err;
164 u32 pdev_cont_xretry;
165 u32 pdev_tx_timeout;
166 u32 pdev_resets;
167 u32 phy_underrun;
168 u32 txop_ovf;
169
170 /* PDEV RX stats */
171 s32 mid_ppdu_route_change;
172 s32 status_rcvd;
173 s32 r0_frags;
174 s32 r1_frags;
175 s32 r2_frags;
176 s32 r3_frags;
177 s32 htt_msdus;
178 s32 htt_mpdus;
179 s32 loc_msdus;
180 s32 loc_mpdus;
181 s32 oversize_amsdu;
182 s32 phy_errs;
183 s32 phy_err_drop;
184 s32 mpdu_errs;
Michal Kazior53268492014-09-25 12:33:50 +0200185};
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior53268492014-09-25 12:33:50 +0200187struct ath10k_fw_stats {
188 struct list_head pdevs;
189 struct list_head peers;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300190};
191
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200192struct ath10k_dfs_stats {
193 u32 phy_errors;
194 u32 pulses_total;
195 u32 pulses_detected;
196 u32 pulses_discarded;
197 u32 radar_detected;
198};
199
Kalle Valo5e3dd152013-06-12 20:52:10 +0300200#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
201
202struct ath10k_peer {
203 struct list_head list;
204 int vdev_id;
205 u8 addr[ETH_ALEN];
206 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
207 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
208};
209
Michal Kazior9797feb2014-02-14 14:49:48 +0100210struct ath10k_sta {
211 struct ath10k_vif *arvif;
212
213 /* the following are protected by ar->data_lock */
214 u32 changed; /* IEEE80211_RC_* */
215 u32 bw;
216 u32 nss;
217 u32 smps;
218
219 struct work_struct update_wk;
220};
221
Kalle Valo5e3dd152013-06-12 20:52:10 +0300222#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
223
224struct ath10k_vif {
Michal Kazior05791192013-10-16 15:44:45 +0300225 struct list_head list;
226
Kalle Valo5e3dd152013-06-12 20:52:10 +0300227 u32 vdev_id;
228 enum wmi_vdev_type vdev_type;
229 enum wmi_vdev_subtype vdev_subtype;
230 u32 beacon_interval;
231 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200232 struct sk_buff *beacon;
Michal Kazior748afc42014-01-23 12:48:21 +0100233 /* protected by data_lock */
234 bool beacon_sent;
Michal Kazior64badcb2014-09-18 11:18:02 +0300235 void *beacon_buf;
236 dma_addr_t beacon_paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300237
238 struct ath10k *ar;
239 struct ieee80211_vif *vif;
240
Michal Kaziorc930f742014-01-23 11:38:25 +0100241 bool is_started;
242 bool is_up;
Simon Wunderlich855aed12014-08-02 09:12:54 +0300243 bool spectral_enabled;
Michal Kaziorc930f742014-01-23 11:38:25 +0100244 u32 aid;
245 u8 bssid[ETH_ALEN];
246
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300247 struct work_struct wep_key_work;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
Michal Kaziorcc4827b2013-10-16 15:44:45 +0300249 u8 def_wep_key_idx;
250 u8 def_wep_key_newidx;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300251
252 u16 tx_seq_no;
253
254 union {
255 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256 u32 uapsd;
257 } sta;
258 struct {
259 /* 127 stations; wmi limit */
260 u8 tim_bitmap[16];
261 u8 tim_len;
262 u32 ssid_len;
263 u8 ssid[IEEE80211_MAX_SSID_LEN];
264 bool hidden_ssid;
265 /* P2P_IE with NoA attribute for P2P_GO case */
266 u32 noa_len;
267 u8 *noa_data;
268 } ap;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300269 } u;
Janusz Dziedzic51ab1a02014-01-08 09:08:33 +0100270
271 u8 fixed_rate;
272 u8 fixed_nss;
Janusz Dziedzic9f81f722014-01-17 20:04:14 +0100273 u8 force_sgi;
Marek Kwaczynskie81bd102014-03-11 12:58:00 +0200274 bool use_cts_prot;
275 int num_legacy_stations;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300276};
277
278struct ath10k_vif_iter {
279 u32 vdev_id;
280 struct ath10k_vif *arvif;
281};
282
Ben Greear384914b2014-08-25 08:37:32 +0300283/* used for crash-dump storage, protected by data-lock */
284struct ath10k_fw_crash_data {
285 bool crashed_since_read;
286
287 uuid_le uuid;
288 struct timespec timestamp;
289 __le32 registers[REG_DUMP_COUNT_QCA988X];
290};
291
Kalle Valo5e3dd152013-06-12 20:52:10 +0300292struct ath10k_debug {
293 struct dentry *debugfs_phy;
294
Michal Kazior60ef4012014-09-25 12:33:48 +0200295 struct ath10k_fw_stats fw_stats;
296 struct completion fw_stats_complete;
Michal Kazior53268492014-09-25 12:33:50 +0200297 bool fw_stats_done;
Michal Kaziorc4f8c832014-09-04 10:18:32 +0200298 DECLARE_BITMAP(wmi_service_bitmap, WMI_SERVICE_MAX);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300299
Kalle Valoa3d135e2013-09-03 11:44:10 +0300300 unsigned long htt_stats_mask;
301 struct delayed_work htt_stats_dwork;
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200302 struct ath10k_dfs_stats dfs_stats;
303 struct ath_dfs_pool_stats dfs_pool_stats;
Kalle Valof118a3e2014-01-03 12:59:31 +0200304
Rajkumar Manoharan90174452014-10-03 08:02:33 +0300305 /* protected by conf_mutex */
Kalle Valof118a3e2014-01-03 12:59:31 +0200306 u32 fw_dbglog_mask;
Rajkumar Manoharan90174452014-10-03 08:02:33 +0300307 u32 pktlog_filter;
Janusz Dziedzicd3856232014-06-02 21:19:46 +0300308
309 u8 htt_max_amsdu;
310 u8 htt_max_ampdu;
Ben Greear384914b2014-08-25 08:37:32 +0300311
312 struct ath10k_fw_crash_data *fw_crash_data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313};
314
Michal Kaziorf7843d72013-07-16 09:38:52 +0200315enum ath10k_state {
316 ATH10K_STATE_OFF = 0,
317 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200318
319 /* When doing firmware recovery the device is first powered down.
320 * mac80211 is supposed to call in to start() hook later on. It is
321 * however possible that driver unloading and firmware crash overlap.
322 * mac80211 can wait on conf_mutex in stop() while the device is
323 * stopped in ath10k_core_restart() work holding conf_mutex. The state
324 * RESTARTED means that the device is up and mac80211 has started hw
325 * reconfiguration. Once mac80211 is done with the reconfiguration we
326 * set the state to STATE_ON in restart_complete(). */
327 ATH10K_STATE_RESTARTING,
328 ATH10K_STATE_RESTARTED,
329
330 /* The device has crashed while restarting hw. This state is like ON
331 * but commands are blocked in HTC and -ECOMM response is given. This
332 * prevents completion timeouts and makes the driver more responsive to
333 * userspace commands. This is also prevents recursive recovery. */
334 ATH10K_STATE_WEDGED,
Kalle Valo43d2a302014-09-10 18:23:30 +0300335
336 /* factory tests */
337 ATH10K_STATE_UTF,
338};
339
340enum ath10k_firmware_mode {
341 /* the default mode, standard 802.11 functionality */
342 ATH10K_FIRMWARE_MODE_NORMAL,
343
344 /* factory tests etc */
345 ATH10K_FIRMWARE_MODE_UTF,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200346};
347
Michal Kazior0d9b0432013-08-09 10:13:33 +0200348enum ath10k_fw_features {
349 /* wmi_mgmt_rx_hdr contains extra RSSI information */
350 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
351
Bartosz Markowskice428702013-09-26 17:47:05 +0200352 /* firmware from 10X branch */
353 ATH10K_FW_FEATURE_WMI_10X = 1,
354
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200355 /* firmware support tx frame management over WMI, otherwise it's HTT */
356 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
357
Bartosz Markowskid3541812013-12-10 16:20:40 +0100358 /* Firmware does not support P2P */
359 ATH10K_FW_FEATURE_NO_P2P = 3,
360
Michal Kazior24c88f72014-07-25 13:32:17 +0200361 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature bit
362 * is required to be set as well.
363 */
364 ATH10K_FW_FEATURE_WMI_10_2 = 4,
365
Michal Kazior0d9b0432013-08-09 10:13:33 +0200366 /* keep last */
367 ATH10K_FW_FEATURE_COUNT,
368};
369
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200370enum ath10k_dev_flags {
371 /* Indicates that ath10k device is during CAC phase of DFS */
372 ATH10K_CAC_RUNNING,
Michal Kazior6782cb62014-05-23 12:28:47 +0200373 ATH10K_FLAG_CORE_REGISTERED,
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200374};
375
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200376enum ath10k_scan_state {
377 ATH10K_SCAN_IDLE,
378 ATH10K_SCAN_STARTING,
379 ATH10K_SCAN_RUNNING,
380 ATH10K_SCAN_ABORTING,
381};
382
383static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
384{
385 switch (state) {
386 case ATH10K_SCAN_IDLE:
387 return "idle";
388 case ATH10K_SCAN_STARTING:
389 return "starting";
390 case ATH10K_SCAN_RUNNING:
391 return "running";
392 case ATH10K_SCAN_ABORTING:
393 return "aborting";
394 }
395
396 return "unknown";
397}
398
Kalle Valo5e3dd152013-06-12 20:52:10 +0300399struct ath10k {
400 struct ath_common ath_common;
401 struct ieee80211_hw *hw;
402 struct device *dev;
403 u8 mac_addr[ETH_ALEN];
404
Kalle Valoe01ae682013-09-01 11:22:14 +0300405 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406 u32 target_version;
407 u8 fw_version_major;
408 u32 fw_version_minor;
409 u16 fw_version_release;
410 u16 fw_version_build;
411 u32 phy_capability;
412 u32 hw_min_tx_power;
413 u32 hw_max_tx_power;
414 u32 ht_cap_info;
415 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200416 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300417
Michal Kazior0d9b0432013-08-09 10:13:33 +0200418 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
419
Kalle Valo5e3dd152013-06-12 20:52:10 +0300420 struct targetdef *targetdef;
421 struct hostdef *hostdef;
422
423 bool p2p;
424
425 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300426 const struct ath10k_hif_ops *ops;
427 } hif;
428
Marek Puzyniak9042e172014-02-10 17:14:23 +0100429 struct completion target_suspend;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300430
431 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300432 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300433 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300434 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300435
436 struct ath10k_hw_params {
437 u32 id;
438 const char *name;
439 u32 patch_load_addr;
440
441 struct ath10k_hw_params_fw {
442 const char *dir;
443 const char *fw;
444 const char *otp;
445 const char *board;
446 } fw;
447 } hw_params;
448
Kalle Valo36527912013-09-27 19:54:55 +0300449 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300450 const void *board_data;
451 size_t board_len;
452
Michal Kazior29385052013-07-16 09:38:58 +0200453 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300454 const void *otp_data;
455 size_t otp_len;
456
Michal Kazior29385052013-07-16 09:38:58 +0200457 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300458 const void *firmware_data;
459 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200460
Kalle Valo1a222432013-09-27 19:55:07 +0300461 int fw_api;
462
Kalle Valo5e3dd152013-06-12 20:52:10 +0300463 struct {
464 struct completion started;
465 struct completion completed;
466 struct completion on_channel;
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200467 struct delayed_work timeout;
468 enum ath10k_scan_state state;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300469 bool is_roc;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300470 int vdev_id;
471 int roc_freq;
472 } scan;
473
474 struct {
475 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
476 } mac;
477
478 /* should never be NULL; needed for regular htt rx */
479 struct ieee80211_channel *rx_channel;
480
481 /* valid during scan; needed for mgmt rx during scan */
482 struct ieee80211_channel *scan_channel;
483
Michal Kaziorc930f742014-01-23 11:38:25 +0100484 /* current operating channel definition */
485 struct cfg80211_chan_def chandef;
486
Ben Greear16c11172014-09-23 14:17:16 -0700487 unsigned long long free_vdev_map;
Michal Kazior1bbc0972014-04-08 09:45:47 +0300488 bool monitor;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300489 int monitor_vdev_id;
Michal Kazior1bbc0972014-04-08 09:45:47 +0300490 bool monitor_started;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300491 unsigned int filter_flags;
Marek Puzyniake8a50f82013-11-20 09:59:47 +0200492 unsigned long dev_flags;
Marek Puzyniak7d9b40b2013-11-20 10:00:28 +0200493 u32 dfs_block_radar_events;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300494
Michal Kaziord6500972014-04-08 09:56:09 +0300495 /* protected by conf_mutex */
496 bool radar_enabled;
497 int num_started_vdevs;
498
Ben Greear46acf7b2014-05-16 17:15:38 +0300499 /* Protected by conf-mutex */
500 u8 supp_tx_chainmask;
501 u8 supp_rx_chainmask;
502 u8 cfg_tx_chainmask;
503 u8 cfg_rx_chainmask;
504
Kalle Valo5e3dd152013-06-12 20:52:10 +0300505 struct wmi_pdev_set_wmm_params_arg wmm_params;
506 struct completion install_key_done;
507
508 struct completion vdev_setup_done;
509
510 struct workqueue_struct *workqueue;
511
512 /* prevents concurrent FW reconfiguration */
513 struct mutex conf_mutex;
514
515 /* protects shared structure data */
516 spinlock_t data_lock;
517
Michal Kazior05791192013-10-16 15:44:45 +0300518 struct list_head arvifs;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300519 struct list_head peers;
520 wait_queue_head_t peer_mapping_wq;
521
Bartosz Markowski0e759f32014-01-02 14:38:33 +0100522 /* number of created peers; protected by data_lock */
523 int num_peers;
524
Kalle Valo5e3dd152013-06-12 20:52:10 +0300525 struct work_struct offchan_tx_work;
526 struct sk_buff_head offchan_tx_queue;
527 struct completion offchan_tx_completed;
528 struct sk_buff *offchan_tx_skb;
529
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200530 struct work_struct wmi_mgmt_tx_work;
531 struct sk_buff_head wmi_mgmt_tx_queue;
532
Michal Kaziorf7843d72013-07-16 09:38:52 +0200533 enum ath10k_state state;
534
Michal Kazior6782cb62014-05-23 12:28:47 +0200535 struct work_struct register_work;
Michal Kazioraffd3212013-07-16 09:54:35 +0200536 struct work_struct restart_work;
537
Michal Kazior2e1dea42013-07-31 10:32:40 +0200538 /* cycle count is reported twice for each visited channel during scan.
539 * access protected by data_lock */
540 u32 survey_last_rx_clear_count;
541 u32 survey_last_cycle_count;
542 struct survey_info survey[ATH10K_NUM_CHANS];
543
Janusz Dziedzic9702c682013-11-20 09:59:41 +0200544 struct dfs_pattern_detector *dfs_detector;
545
Kalle Valo5e3dd152013-06-12 20:52:10 +0300546#ifdef CONFIG_ATH10K_DEBUGFS
547 struct ath10k_debug debug;
548#endif
Simon Wunderlich855aed12014-08-02 09:12:54 +0300549
550 struct {
551 /* relay(fs) channel for spectral scan */
552 struct rchan *rfs_chan_spec_scan;
553
554 /* spectral_mode and spec_config are protected by conf_mutex */
555 enum ath10k_spectral_mode mode;
556 struct ath10k_spec_scan config;
557 } spectral;
Michal Kaziore7b54192014-08-07 11:03:27 +0200558
Kalle Valo43d2a302014-09-10 18:23:30 +0300559 struct {
560 /* protected by conf_mutex */
561 const struct firmware *utf;
562 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
563
564 /* protected by data_lock */
565 bool utf_monitor;
566 } testmode;
567
Ben Greearf51dbe72014-09-29 14:41:46 +0300568 struct {
569 /* protected by data_lock */
570 u32 fw_crash_counter;
571 u32 fw_warm_reset_counter;
572 u32 fw_cold_reset_counter;
573 } stats;
574
Michal Kaziore7b54192014-08-07 11:03:27 +0200575 /* must be last */
576 u8 drv_priv[0] __aligned(sizeof(void *));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577};
578
Michal Kaziore7b54192014-08-07 11:03:27 +0200579struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580 const struct ath10k_hif_ops *hif_ops);
581void ath10k_core_destroy(struct ath10k *ar);
582
Kalle Valo43d2a302014-09-10 18:23:30 +0300583int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100584int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200585void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300586int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300587void ath10k_core_unregister(struct ath10k *ar);
588
Kalle Valo5e3dd152013-06-12 20:52:10 +0300589#endif /* _CORE_H_ */